Index: llvm/trunk/lib/Target/Mips/Mips16FrameLowering.cpp
===================================================================
--- llvm/trunk/lib/Target/Mips/Mips16FrameLowering.cpp
+++ llvm/trunk/lib/Target/Mips/Mips16FrameLowering.cpp
@@ -153,10 +153,7 @@
     if (I->getOpcode() == Mips::ADJCALLSTACKDOWN)
       Amount = -Amount;
 
-    const Mips16InstrInfo &TII =
-        *static_cast<const Mips16InstrInfo *>(STI.getInstrInfo());
-
-    TII.adjustStackPtr(Mips::SP, Amount, MBB, I);
+    STI.getInstrInfo()->adjustStackPtr(Mips::SP, Amount, MBB, I);
   }
 
   MBB.erase(I);
Index: llvm/trunk/lib/Target/Mips/Mips16InstrInfo.h
===================================================================
--- llvm/trunk/lib/Target/Mips/Mips16InstrInfo.h
+++ llvm/trunk/lib/Target/Mips/Mips16InstrInfo.h
@@ -77,7 +77,7 @@
 
   /// Adjust SP by Amount bytes.
   void adjustStackPtr(unsigned SP, int64_t Amount, MachineBasicBlock &MBB,
-                      MachineBasicBlock::iterator I) const;
+                      MachineBasicBlock::iterator I) const override;
 
   /// Emit a series of instructions to load an immediate.
   // This is to adjust some FrameReg. We return the new register to be used
Index: llvm/trunk/lib/Target/Mips/MipsInstrInfo.h
===================================================================
--- llvm/trunk/lib/Target/Mips/MipsInstrInfo.h
+++ llvm/trunk/lib/Target/Mips/MipsInstrInfo.h
@@ -117,6 +117,10 @@
                                 const TargetRegisterInfo *TRI,
                                 int64_t Offset) const = 0;
 
+  virtual void adjustStackPtr(unsigned SP, int64_t Amount,
+                              MachineBasicBlock &MBB,
+                              MachineBasicBlock::iterator I) const = 0;
+
   /// Create an instruction which has the same operands and memory operands
   /// as MI but has a new opcode.
   MachineInstrBuilder genInstrWithNewOpc(unsigned NewOpc,
Index: llvm/trunk/lib/Target/Mips/MipsSEFrameLowering.cpp
===================================================================
--- llvm/trunk/lib/Target/Mips/MipsSEFrameLowering.cpp
+++ llvm/trunk/lib/Target/Mips/MipsSEFrameLowering.cpp
@@ -611,9 +611,6 @@
 void MipsSEFrameLowering::
 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
                               MachineBasicBlock::iterator I) const {
-  const MipsSEInstrInfo &TII =
-      *static_cast<const MipsSEInstrInfo *>(STI.getInstrInfo());
-
   if (!hasReservedCallFrame(MF)) {
     int64_t Amount = I->getOperand(0).getImm();
 
@@ -621,7 +618,7 @@
       Amount = -Amount;
 
     unsigned SP = STI.isABI_N64() ? Mips::SP_64 : Mips::SP;
-    TII.adjustStackPtr(SP, Amount, MBB, I);
+    STI.getInstrInfo()->adjustStackPtr(SP, Amount, MBB, I);
   }
 
   MBB.erase(I);
Index: llvm/trunk/lib/Target/Mips/MipsSEInstrInfo.h
===================================================================
--- llvm/trunk/lib/Target/Mips/MipsSEInstrInfo.h
+++ llvm/trunk/lib/Target/Mips/MipsSEInstrInfo.h
@@ -68,7 +68,7 @@
 
   /// Adjust SP by Amount bytes.
   void adjustStackPtr(unsigned SP, int64_t Amount, MachineBasicBlock &MBB,
-                      MachineBasicBlock::iterator I) const;
+                      MachineBasicBlock::iterator I) const override;
 
   /// Emit a series of instructions to load an immediate. If NewImm is a
   /// non-NULL parameter, the last instruction is not emitted, but instead