Index: include/llvm/Target/TargetRegisterInfo.h
===================================================================
--- include/llvm/Target/TargetRegisterInfo.h
+++ include/llvm/Target/TargetRegisterInfo.h
@@ -713,6 +713,14 @@
   /// (3) Bottom-up allocation is no longer guaranteed to optimally color.
   virtual bool reverseLocalAssignment() const { return false; }
 
+  /// Allow the target to define an ordering for its register classes. This is
+  /// used in the greedy register allocator heuristic, it is often beneficial to
+  /// color "big" (each register aliases 2 or more registers of a smaller
+  /// register class) or very constrained classes first.
+  virtual uint8_t getClassPriority(const TargetRegisterClass *cls) const {
+    return 0;
+  }
+
   /// Allow the target to override the cost of using a callee-saved register for
   /// the first time. Default value of 0 means we will use a callee-saved
   /// register if it is available.
Index: lib/CodeGen/RegAllocGreedy.cpp
===================================================================
--- lib/CodeGen/RegAllocGreedy.cpp
+++ lib/CodeGen/RegAllocGreedy.cpp
@@ -552,8 +552,9 @@
         // Allocating bottom up may allow many short LRGs to be assigned first
         // to one of the cheap registers. This could be much faster for very
         // large blocks on targets with many physical registers.
-        Prio = Indexes->getZeroIndex().getInstrDistance(LI->beginIndex());
+        Prio = Indexes->getZeroIndex().getInstrDistance(LI->endIndex());
       }
+      Prio |= TRI->getClassPriority(MRI->getRegClass(Reg)) << 24;
     }
     else {
       // Allocate global and split ranges in long->short order. Long ranges that