Index: lib/Target/AArch64/Utils/AArch64BaseInfo.h
===================================================================
--- lib/Target/AArch64/Utils/AArch64BaseInfo.h
+++ lib/Target/AArch64/Utils/AArch64BaseInfo.h
@@ -1133,11 +1133,9 @@
     ICH_LR13_EL2      = 0xe66d, // 11  100  1100  1101  101
     ICH_LR14_EL2      = 0xe66e, // 11  100  1100  1101  110
     ICH_LR15_EL2      = 0xe66f, // 11  100  1100  1101  111
-  };
 
-  // Cyclone specific system registers
-  enum CycloneSysRegValues {
-    CPM_IOACC_CTL_EL3 = 0xff90
+    // Cyclone specific system registers
+    CPM_IOACC_CTL_EL3 = 0xff90,
   };
 
   // Note that these do not inherit from AArch64NamedImmMapper. This class is
@@ -1146,7 +1144,6 @@
   // this one case.
   struct SysRegMapper {
     static const AArch64NamedImmMapper::Mapping SysRegMappings[];
-    static const AArch64NamedImmMapper::Mapping CycloneSysRegMappings[];
 
     const AArch64NamedImmMapper::Mapping *InstMappings;
     size_t NumInstMappings;
Index: lib/Target/AArch64/Utils/AArch64BaseInfo.cpp
===================================================================
--- lib/Target/AArch64/Utils/AArch64BaseInfo.cpp
+++ lib/Target/AArch64/Utils/AArch64BaseInfo.cpp
@@ -755,12 +755,10 @@
   {"ich_lr12_el2", ICH_LR12_EL2},
   {"ich_lr13_el2", ICH_LR13_EL2},
   {"ich_lr14_el2", ICH_LR14_EL2},
-  {"ich_lr15_el2", ICH_LR15_EL2}
-};
+  {"ich_lr15_el2", ICH_LR15_EL2},
 
-const AArch64NamedImmMapper::Mapping
-AArch64SysReg::SysRegMapper::CycloneSysRegMappings[] = {
-  {"cpm_ioacc_ctl_el3", CPM_IOACC_CTL_EL3}
+  // Cyclone registers
+  {"cpm_ioacc_ctl_el3", CPM_IOACC_CTL_EL3, FeatureBitset{AArch64::ProcCyclone}},
 };
 
 uint32_t
@@ -776,16 +774,6 @@
     }
   }
 
-  // Next search for target specific registers
-  if (FeatureBits[AArch64::ProcCyclone]) {
-    for (unsigned i = 0; i < array_lengthof(CycloneSysRegMappings); ++i) {
-      if (CycloneSysRegMappings[i].Name == NameLower) {
-        Valid = true;
-        return CycloneSysRegMappings[i].Value;
-      }
-    }
-  }
-
   // Now try the instruction-specific registers (either read-only or
   // write-only).
   for (unsigned i = 0; i < NumInstMappings; ++i) {
@@ -828,15 +816,6 @@
     }
   }
 
-  // Next search for target specific registers
-  if (FeatureBits[AArch64::ProcCyclone]) {
-    for (unsigned i = 0; i < array_lengthof(CycloneSysRegMappings); ++i) {
-      if (CycloneSysRegMappings[i].Value == Bits) {
-        return CycloneSysRegMappings[i].Name;
-      }
-    }
-  }
-
   // Now try the instruction-specific registers (either read-only or
   // write-only).
   for (unsigned i = 0; i < NumInstMappings; ++i) {