diff --git a/llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp b/llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp --- a/llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp +++ b/llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp @@ -330,6 +330,9 @@ bool isU10Imm() const { return Kind == Immediate && isUInt<10>(getImm()); } bool isU12Imm() const { return Kind == Immediate && isUInt<12>(getImm()); } + bool isS12Imm() const { + return Kind == Expression || (Kind == Immediate && isInt<12>(getImm())); + } bool isU16Imm() const { switch (Kind) { case Expression: diff --git a/llvm/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp b/llvm/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp --- a/llvm/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp +++ b/llvm/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp @@ -408,5 +408,12 @@ return result; } + if (STI.getFeatureBits()[PPC::FeaturePaired]) { + DecodeStatus result = + decodeInstruction(DecoderTablePairedSingle32, MI, Inst, Address, this, STI); + if (result != MCDisassembler::Fail) + return result; + } + return decodeInstruction(DecoderTable32, MI, Inst, Address, this, STI); } diff --git a/llvm/lib/Target/PowerPC/PPCInstrFormats.td b/llvm/lib/Target/PowerPC/PPCInstrFormats.td --- a/llvm/lib/Target/PowerPC/PPCInstrFormats.td +++ b/llvm/lib/Target/PowerPC/PPCInstrFormats.td @@ -2174,10 +2174,10 @@ InstrItinClass itin, list pattern> :I { bits<5> D; - bits<5> A; bit W; bits<3> I; bits<12> d; + bits<5> A; let Pattern = pattern; diff --git a/llvm/lib/Target/PowerPC/PPCInstrInfo.td b/llvm/lib/Target/PowerPC/PPCInstrInfo.td --- a/llvm/lib/Target/PowerPC/PPCInstrInfo.td +++ b/llvm/lib/Target/PowerPC/PPCInstrInfo.td @@ -957,6 +957,13 @@ def dispSPE2 : Operand { let ParserMatchClass = PPCDispSPE2Operand; } +def PPCDispRID12Operand : AsmOperandClass { + let Name = "DispRID12"; let PredicateMethod = "isS12Imm"; + let RenderMethod = "addImmOperands"; +} +def dispRID12 : Operand { + let ParserMatchClass = PPCDispRID12Operand; +} def memri : Operand { let PrintMethod = "printMemRegImm"; @@ -998,6 +1005,10 @@ let EncoderMethod = "getSPE2DisEncoding"; let DecoderMethod = "decodeSPE2Operands"; } +def memrid12 : Operand { // Paired Single displacement where imm is 12 bits wide. + let PrintMethod = "printMemRegImm"; + let MIOperandInfo = (ops dispRID12:$imm, ptr_rc_nor0:$reg); +} // A single-register address. This is used with the SjLj // pseudo-instructions which translates to LD/LWZ. These instructions requires diff --git a/llvm/lib/Target/PowerPC/PPCInstrPaired.td b/llvm/lib/Target/PowerPC/PPCInstrPaired.td --- a/llvm/lib/Target/PowerPC/PPCInstrPaired.td +++ b/llvm/lib/Target/PowerPC/PPCInstrPaired.td @@ -88,143 +88,143 @@ } } -let Predicates = [HasPaired] in { - // Technically not part of the 750cl since it is a proprietary instruction - // found on the Nintendo versions of the chip. - def DCBZ_L : PSForm_x0ab<1014, (outs), (ins memrr:$dst), "dcbz_l $dst", - IIC_LdStDCBF, [(int_ppc_broadway_dcbz_l xoaddr:$dst)]>; - - def PSQ_L : PSQForm_dw<56, (outs psrc:$fD), (ins memri:$src, u1imm:$W, u3imm:$I), - "psq_l $fD, $src, $W, $I", IIC_LdStLoad, []>; - - def PSQ_LU : PSQForm_dw<57, (outs psrc:$fD, ptr_rc_nor0:$ea_result), - (ins memri:$src, u1imm:$W, u3imm:$I), - "psq_lu $fD, $src, $W, $I", IIC_LdStLoadUpd, []>, - RegConstraint<"$src.reg = $ea_result">, - NoEncode<"$ea_result">; - def PSQ_LX : PSQForm_xw<6, (outs psrc:$fD), (ins memrr:$src, u1imm:$W, u3imm:$I), - "psq_lx $fD, $src, $W, $I", IIC_LdStLoad, []>; - def PSQ_LUX : PSQForm_xw<38, (outs psrc:$fD, ptr_rc_nor0:$ea_result), - (ins memrr:$src, u1imm:$W, u3imm:$I), - "psq_lux $fD, $src, $W, $I", IIC_LdStLoad, []>, - RegConstraint<"$src.ptrreg = $ea_result">, - NoEncode<"$ea_result">; - - def PSQ_ST : PSQForm_dw<60, (outs), (ins psrc:$fD, memri:$dst, u1imm:$W, u3imm:$I), - "psq_st $fD, $dst, $W, $I", IIC_LdStStore, []>; - - def PSQ_STU : PSQForm_dw<61, (outs ptr_rc_nor0:$ea_result), - (ins psrc:$fD, memri:$dst, u1imm:$W, u3imm:$I), - "psq_stu $fD, $dst, $W, $I", IIC_LdStSTU, []>, - RegConstraint<"$dst.reg = $ea_result">, - NoEncode<"$ea_result">; - - def PSQ_STX : PSQForm_xw<7, (outs), (ins psrc:$fD, memrr:$dst, u1imm:$W, u3imm:$I), - "psq_stx $fD, $dst, $W, $I", IIC_LdStStore, []>; - - def PSQ_STUX : PSQForm_xw<39, (outs ptr_rc_nor0:$ea_result), - (ins psrc:$fD, memrr:$dst, u1imm:$W, u3imm:$I), - "psq_stux $fD, $dst, $W, $I", IIC_LdStSTUX, []>, - RegConstraint<"$dst.ptrreg = $ea_result">, - NoEncode<"$ea_result">; - - defm PS_ABS : PSForm_xd0br<264, (outs psrc:$fD), (ins psrc:$fB), - "ps_abs", "$fD, $fB", IIC_FPGeneral, - [(set v2f32:$fD, (fabs v2f32:$fB))]>; - - defm PS_ADD : PSForm_adab0r<21, (outs psrc:$fD), (ins psrc:$fA, psrc:$fB), - "ps_add", "$fD, $fA, $fB", IIC_FPAddSub, - [(set v2f32:$fD, (fadd v2f32:$fA, v2f32:$fB))]>; - - def PS_CMPU0 : PSForm_xcrab<0, 0, (outs crrc:$crD), (ins psrc:$fA, psrc:$fB), - "ps_cmpu0 $crD, $fA, $fB", IIC_FPCompare, []>; - def PS_CMPU1 : PSForm_xcrab<0, 1, (outs crrc:$crD), (ins psrc:$fA, psrc:$fB), - "ps_cmpu1 $crD, $fA, $fB", IIC_FPCompare, []>; - def PS_CMPO0 : PSForm_xcrab<1, 0, (outs crrc:$crD), (ins psrc:$fA, psrc:$fB), - "ps_cmpo0 $crD, $fA, $fB", IIC_FPCompare, []>; - def PS_CMPO1 : PSForm_xcrab<1, 1, (outs crrc:$crD), (ins psrc:$fA, psrc:$fB), - "ps_cmpo1 $crD, $fA, $fB", IIC_FPCompare, []>; - - defm PS_DIV : PSForm_adab0r<18, (outs psrc:$fD), (ins psrc:$fA, psrc:$fB), - "ps_div", "$fD, $fA, $fB", IIC_FPDivS, - [(set v2f32:$fD, (fdiv v2f32:$fA, v2f32:$fB))]>; - - defm PS_MADD : PSForm_adabcr<29, (outs psrc:$fD), (ins psrc:$fA, psrc:$fB, psrc:$fC), - "ps_madd", "$fD, $fA, $fC, $fB", IIC_FPFused, - [(set v2f32:$fD, (fadd (fmul v2f32:$fA, v2f32:$fC), v2f32:$fB))]>; - - defm PS_MADDS0 : PSForm_adabcr<14, (outs psrc:$fD), (ins psrc:$fA, psrc:$fB, psrc:$fC), - "ps_madds0", "$fD, $fA, $fC, $fB", IIC_FPFused, - []>; - - defm PS_MADDS1 : PSForm_adabcr<15, (outs psrc:$fD), (ins psrc:$fA, psrc:$fB, psrc:$fC), - "ps_madds1", "$fD, $fA, $fC, $fB", IIC_FPFused, - []>; - defm PS_MERGE00 : PSForm_xdabr<528, (outs psrc:$fD), (ins psrc:$fA, psrc:$fB), - "ps_merge00", "$fD, $fA, $fB", IIC_FPGeneral, - []>; - defm PS_MERGE01 : PSForm_xdabr<560, (outs psrc:$fD), (ins psrc:$fA, psrc:$fB), - "ps_merge01", "$fD, $fA, $fB", IIC_FPGeneral, - []>; - defm PS_MERGE10 : PSForm_xdabr<592, (outs psrc:$fD), (ins psrc:$fA, psrc:$fB), - "ps_merge10", "$fD, $fA, $fB", IIC_FPGeneral, - []>; - defm PS_MERGE11 : PSForm_xdabr<624, (outs psrc:$fD), (ins psrc:$fA, psrc:$fB), - "ps_merge11", "$fD, $fA, $fB", IIC_FPGeneral, - []>; - defm PS_MR : PSForm_xd0br<72, (outs psrc:$fD), (ins psrc:$fB), - "ps_mr", "$fD, $fB", IIC_FPGeneral, - [(set v2f32:$fD, v2f32:$fB)]>; - - defm PS_MSUB : PSForm_adabcr<28, (outs psrc:$fD), (ins psrc:$fA, psrc:$fB, psrc:$fC), - "ps_msub", "$fD, $fA, $fC, $fB", IIC_FPFused, - [(set v2f32:$fD, (fsub (fmul v2f32:$fA, v2f32:$fC), v2f32:$fB))]>; - - defm PS_MUL : PSForm_ada0cr<25, (outs psrc:$fD), (ins psrc:$fA, psrc:$fC), - "ps_mul", "$fD, $fA, $fC", IIC_FPFused, - [(set v2f32:$fD, (fmul v2f32:$fA, v2f32:$fC))]>; - - defm PS_MULS0 : PSForm_ada0cr<12, (outs psrc:$fD), (ins psrc:$fA, psrc:$fC), - "ps_muls0", "$fD, $fA, $fC", IIC_FPFused, []>; - defm PS_MULS1 : PSForm_ada0cr<13, (outs psrc:$fD), (ins psrc:$fA, psrc:$fC), - "ps_muls1", "$fD, $fA, $fC", IIC_FPFused, []>; - - defm PS_NABS : PSForm_xd0br<136, (outs psrc:$fD), (ins psrc:$fB), - "ps_nabs", "$fD, $fB", IIC_FPGeneral, - [(set v2f32:$fD, (fneg (fabs v2f32:$fB)))]>; - - defm PS_NEG : PSForm_xd0br<40, (outs psrc:$fD), (ins psrc:$fB), - "ps_neg", "$fD, $fB", IIC_FPGeneral, - [(set v2f32:$fD, (fneg v2f32:$fB))]>; - - defm PS_NMADD : PSForm_adabcr<31, (outs psrc:$fD), (ins psrc:$fA, psrc:$fB, psrc:$fC), - "ps_nmadd", "$fD, $fA, $fC, $fB", IIC_FPFused, - [(set v2f32:$fD, (fneg (fadd (fmul v2f32:$fA, v2f32:$fC), v2f32:$fB)))]>; - - defm PS_NMSUB : PSForm_adabcr<30, (outs psrc:$fD), (ins psrc:$fA, psrc:$fB, psrc:$fC), - "ps_nmsub", "$fD, $fA, $fC, $fB", IIC_FPFused, - [(set v2f32:$fD, (fneg (fsub (fmul v2f32:$fA, v2f32:$fC), v2f32:$fB)))]>; - - defm PS_RES : PSForm_ad0b0r<24, (outs psrc:$fD), (ins psrc:$fB), - "ps_res", "$fD, $fB", IIC_FPGeneral, - [(set v2f32:$fD, (PPCfre v2f32:$fB))]>; - - defm PS_RSQRTE : PSForm_ad0b0r<24, (outs psrc:$fD), (ins psrc:$fB), - "ps_rsqrte", "$fD, $fB", IIC_FPGeneral, - [(set v2f32:$fD, (PPCfrsqrte v2f32:$fB))]>; - - defm PS_SEL : PSForm_adabcr<23, (outs psrc:$fD), (ins psrc:$fA, psrc:$fB, psrc:$fC), - "ps_sel", "$fD, $fA, $fC, $fB", IIC_FPGeneral, - []>; - - defm PS_SUB : PSForm_adab0r<20, (outs psrc:$fD), (ins psrc:$fA, psrc:$fB), - "ps_sub", "$fD, $fA, $fB", IIC_FPAddSub, - [(set v2f32:$fD, (fsub v2f32:$fA, v2f32:$fB))]>; - - defm PS_SUM0 : PSForm_adabcr<10, (outs psrc:$fD), (ins psrc:$fA, psrc:$fB, psrc:$fC), - "ps_sum0", "$fD, $fA, $fC, $fB", IIC_FPAddSub, - []>; - defm PS_SUM1 : PSForm_adabcr<11, (outs psrc:$fD), (ins psrc:$fA, psrc:$fB, psrc:$fC), - "ps_sum1", "$fD, $fA, $fC, $fB", IIC_FPAddSub, - []>; +let DecoderNamespace = "PairedSingle" in { + let Predicates = [HasPaired] in { + def DCBZ_L : PSForm_x0ab<1014, (outs), (ins memrr:$dst), "dcbz_l $dst", + IIC_LdStDCBF, [(int_ppc_broadway_dcbz_l xoaddr:$dst)]>; + + def PSQ_L : PSQForm_dw<56, (outs psrc:$fD), (ins memrid12:$src, u1imm:$W, u3imm:$I), + "psq_l $fD, $src, $W, $I", IIC_LdStLoad, []>; + + def PSQ_LU : PSQForm_dw<57, (outs psrc:$fD, ptr_rc_nor0:$ea_result), + (ins memrid12:$src, u1imm:$W, u3imm:$I), + "psq_lu $fD, $src, $W, $I", IIC_LdStLoadUpd, []>, + RegConstraint<"$src.reg = $ea_result">, + NoEncode<"$ea_result">; + def PSQ_LX : PSQForm_xw<6, (outs psrc:$fD), (ins memrr:$src, u1imm:$W, u3imm:$I), + "psq_lx $fD, $src, $W, $I", IIC_LdStLoad, []>; + def PSQ_LUX : PSQForm_xw<38, (outs psrc:$fD, ptr_rc_nor0:$ea_result), + (ins memrr:$src, u1imm:$W, u3imm:$I), + "psq_lux $fD, $src, $W, $I", IIC_LdStLoad, []>, + RegConstraint<"$src.ptrreg = $ea_result">, + NoEncode<"$ea_result">; + + def PSQ_ST : PSQForm_dw<60, (outs), (ins psrc:$fD, memrid12:$dst, u1imm:$W, u3imm:$I), + "psq_st $fD, $dst, $W, $I", IIC_LdStStore, []>; + + def PSQ_STU : PSQForm_dw<61, (outs ptr_rc_nor0:$ea_result), + (ins psrc:$fD, memrid12:$dst, u1imm:$W, u3imm:$I), + "psq_stu $fD, $dst, $W, $I", IIC_LdStSTU, []>, + RegConstraint<"$dst.reg = $ea_result">, + NoEncode<"$ea_result">; + + def PSQ_STX : PSQForm_xw<7, (outs), (ins psrc:$fD, memrr:$dst, u1imm:$W, u3imm:$I), + "psq_stx $fD, $dst, $W, $I", IIC_LdStStore, []>; + + def PSQ_STUX : PSQForm_xw<39, (outs ptr_rc_nor0:$ea_result), + (ins psrc:$fD, memrr:$dst, u1imm:$W, u3imm:$I), + "psq_stux $fD, $dst, $W, $I", IIC_LdStSTUX, []>, + RegConstraint<"$dst.ptrreg = $ea_result">, + NoEncode<"$ea_result">; + + defm PS_ABS : PSForm_xd0br<264, (outs psrc:$fD), (ins psrc:$fB), + "ps_abs", "$fD, $fB", IIC_FPGeneral, + [(set v2f32:$fD, (fabs v2f32:$fB))]>; + + defm PS_ADD : PSForm_adab0r<21, (outs psrc:$fD), (ins psrc:$fA, psrc:$fB), + "ps_add", "$fD, $fA, $fB", IIC_FPAddSub, + [(set v2f32:$fD, (fadd v2f32:$fA, v2f32:$fB))]>; + + def PS_CMPU0 : PSForm_xcrab<0, 0, (outs crrc:$crD), (ins psrc:$fA, psrc:$fB), + "ps_cmpu0 $crD, $fA, $fB", IIC_FPCompare, []>; + def PS_CMPU1 : PSForm_xcrab<0, 1, (outs crrc:$crD), (ins psrc:$fA, psrc:$fB), + "ps_cmpu1 $crD, $fA, $fB", IIC_FPCompare, []>; + def PS_CMPO0 : PSForm_xcrab<1, 0, (outs crrc:$crD), (ins psrc:$fA, psrc:$fB), + "ps_cmpo0 $crD, $fA, $fB", IIC_FPCompare, []>; + def PS_CMPO1 : PSForm_xcrab<1, 1, (outs crrc:$crD), (ins psrc:$fA, psrc:$fB), + "ps_cmpo1 $crD, $fA, $fB", IIC_FPCompare, []>; + + defm PS_DIV : PSForm_adab0r<18, (outs psrc:$fD), (ins psrc:$fA, psrc:$fB), + "ps_div", "$fD, $fA, $fB", IIC_FPDivS, + [(set v2f32:$fD, (fdiv v2f32:$fA, v2f32:$fB))]>; + + defm PS_MADD : PSForm_adabcr<29, (outs psrc:$fD), (ins psrc:$fA, psrc:$fB, psrc:$fC), + "ps_madd", "$fD, $fA, $fC, $fB", IIC_FPFused, + [(set v2f32:$fD, (fadd (fmul v2f32:$fA, v2f32:$fC), v2f32:$fB))]>; + + defm PS_MADDS0 : PSForm_adabcr<14, (outs psrc:$fD), (ins psrc:$fA, psrc:$fB, psrc:$fC), + "ps_madds0", "$fD, $fA, $fC, $fB", IIC_FPFused, + []>; + + defm PS_MADDS1 : PSForm_adabcr<15, (outs psrc:$fD), (ins psrc:$fA, psrc:$fB, psrc:$fC), + "ps_madds1", "$fD, $fA, $fC, $fB", IIC_FPFused, + []>; + defm PS_MERGE00 : PSForm_xdabr<528, (outs psrc:$fD), (ins psrc:$fA, psrc:$fB), + "ps_merge00", "$fD, $fA, $fB", IIC_FPGeneral, + []>; + defm PS_MERGE01 : PSForm_xdabr<560, (outs psrc:$fD), (ins psrc:$fA, psrc:$fB), + "ps_merge01", "$fD, $fA, $fB", IIC_FPGeneral, + []>; + defm PS_MERGE10 : PSForm_xdabr<592, (outs psrc:$fD), (ins psrc:$fA, psrc:$fB), + "ps_merge10", "$fD, $fA, $fB", IIC_FPGeneral, + []>; + defm PS_MERGE11 : PSForm_xdabr<624, (outs psrc:$fD), (ins psrc:$fA, psrc:$fB), + "ps_merge11", "$fD, $fA, $fB", IIC_FPGeneral, + []>; + defm PS_MR : PSForm_xd0br<72, (outs psrc:$fD), (ins psrc:$fB), + "ps_mr", "$fD, $fB", IIC_FPGeneral, + [(set v2f32:$fD, v2f32:$fB)]>; + + defm PS_MSUB : PSForm_adabcr<28, (outs psrc:$fD), (ins psrc:$fA, psrc:$fB, psrc:$fC), + "ps_msub", "$fD, $fA, $fC, $fB", IIC_FPFused, + [(set v2f32:$fD, (fsub (fmul v2f32:$fA, v2f32:$fC), v2f32:$fB))]>; + + defm PS_MUL : PSForm_ada0cr<25, (outs psrc:$fD), (ins psrc:$fA, psrc:$fC), + "ps_mul", "$fD, $fA, $fC", IIC_FPFused, + [(set v2f32:$fD, (fmul v2f32:$fA, v2f32:$fC))]>; + + defm PS_MULS0 : PSForm_ada0cr<12, (outs psrc:$fD), (ins psrc:$fA, psrc:$fC), + "ps_muls0", "$fD, $fA, $fC", IIC_FPFused, []>; + defm PS_MULS1 : PSForm_ada0cr<13, (outs psrc:$fD), (ins psrc:$fA, psrc:$fC), + "ps_muls1", "$fD, $fA, $fC", IIC_FPFused, []>; + + defm PS_NABS : PSForm_xd0br<136, (outs psrc:$fD), (ins psrc:$fB), + "ps_nabs", "$fD, $fB", IIC_FPGeneral, + [(set v2f32:$fD, (fneg (fabs v2f32:$fB)))]>; + + defm PS_NEG : PSForm_xd0br<40, (outs psrc:$fD), (ins psrc:$fB), + "ps_neg", "$fD, $fB", IIC_FPGeneral, + [(set v2f32:$fD, (fneg v2f32:$fB))]>; + + defm PS_NMADD : PSForm_adabcr<31, (outs psrc:$fD), (ins psrc:$fA, psrc:$fB, psrc:$fC), + "ps_nmadd", "$fD, $fA, $fC, $fB", IIC_FPFused, + [(set v2f32:$fD, (fneg (fadd (fmul v2f32:$fA, v2f32:$fC), v2f32:$fB)))]>; + + defm PS_NMSUB : PSForm_adabcr<30, (outs psrc:$fD), (ins psrc:$fA, psrc:$fB, psrc:$fC), + "ps_nmsub", "$fD, $fA, $fC, $fB", IIC_FPFused, + [(set v2f32:$fD, (fneg (fsub (fmul v2f32:$fA, v2f32:$fC), v2f32:$fB)))]>; + + defm PS_RES : PSForm_ad0b0r<24, (outs psrc:$fD), (ins psrc:$fB), + "ps_res", "$fD, $fB", IIC_FPGeneral, + [(set v2f32:$fD, (PPCfre v2f32:$fB))]>; + + defm PS_RSQRTE : PSForm_ad0b0r<26, (outs psrc:$fD), (ins psrc:$fB), + "ps_rsqrte", "$fD, $fB", IIC_FPGeneral, + [(set v2f32:$fD, (PPCfrsqrte v2f32:$fB))]>; + + defm PS_SEL : PSForm_adabcr<23, (outs psrc:$fD), (ins psrc:$fA, psrc:$fB, psrc:$fC), + "ps_sel", "$fD, $fA, $fC, $fB", IIC_FPGeneral, + []>; + + defm PS_SUB : PSForm_adab0r<20, (outs psrc:$fD), (ins psrc:$fA, psrc:$fB), + "ps_sub", "$fD, $fA, $fB", IIC_FPAddSub, + [(set v2f32:$fD, (fsub v2f32:$fA, v2f32:$fB))]>; + + defm PS_SUM0 : PSForm_adabcr<10, (outs psrc:$fD), (ins psrc:$fA, psrc:$fB, psrc:$fC), + "ps_sum0", "$fD, $fA, $fC, $fB", IIC_FPAddSub, + []>; + defm PS_SUM1 : PSForm_adabcr<11, (outs psrc:$fD), (ins psrc:$fA, psrc:$fB, psrc:$fC), + "ps_sum1", "$fD, $fA, $fC, $fB", IIC_FPAddSub, + []>; + } } \ No newline at end of file diff --git a/llvm/test/MC/Disassembler/PowerPC/ppc32-paired.txt b/llvm/test/MC/Disassembler/PowerPC/ppc32-paired.txt new file mode 100644 --- /dev/null +++ b/llvm/test/MC/Disassembler/PowerPC/ppc32-paired.txt @@ -0,0 +1,127 @@ +# RUN: llvm-mc --disassemble %s -triple powerpc-unknown-unknown -mcpu=750cl | FileCheck %s +# CHECK: dcbz_l 0, 3 +0x10 0x00 0x1f 0xec +# CHECK: psq_l 3, 4(13), 1, 0 +0xe0 0x6d 0x80 0x04 +# CHECK: psq_lu 3, 4(13), 1, 0 +0xe4 0x6d 0x80 0x04 +# CHECK: psq_lux 3, 0, 3, 1, 0 +0x10 0x60 0x1c 0x4c +# CHECK: psq_lx 3, 0, 3, 1, 0 +0x10 0x60 0x1c 0x0c +# CHECK: psq_st 3, 4(13), 1, 0 +0xf0 0x6d 0x80 0x04 +# CHECK: psq_stu 3, 4(13), 1, 0 +0xf4 0x6d 0x80 0x04 +# CHECK: psq_stux 3, 0, 3, 1, 0 +0x10 0x60 0x1c 0x4e +# CHECK: psq_stx 3, 0, 3, 1, 0 +0x10 0x60 0x1c 0x0e +# CHECK: ps_abs 3, 3 +0x10 0x60 0x1a 0x10 +# CHECK: ps_abs. 3, 3 +0x10 0x60 0x1a 0x11 +# CHECK: ps_add 3, 3, 4 +0x10 0x63 0x20 0x2a +# CHECK: ps_add. 3, 3, 4 +0x10 0x63 0x20 0x2b +# CHECK: ps_cmpo0 1, 3, 4 +0x10 0x83 0x20 0x40 +# CHECK: ps_cmpo1 1, 3, 4 +0x10 0x83 0x20 0xC0 +# CHECK: ps_cmpu0 1, 3, 4 +0x10 0x83 0x20 0x00 +# CHECK: ps_cmpu1 1, 3, 4 +0x10 0x83 0x20 0x80 +# CHECK: ps_div 3, 3, 4 +0x10 0x63 0x20 0x24 +# CHECK: ps_div. 3, 3, 4 +0x10 0x63 0x20 0x25 +# CHECK: ps_madd 3, 3, 4, 5 +0x10 0x63 0x29 0x3a +# CHECK: ps_madd. 3, 3, 4, 5 +0x10 0x63 0x29 0x3b +# CHECK: ps_madds0 3, 3, 4, 5 +0x10 0x63 0x29 0x1c +# CHECK: ps_madds0. 3, 3, 4, 5 +0x10 0x63 0x29 0x1d +# CHECK: ps_madds1 3, 3, 4, 5 +0x10 0x63 0x29 0x1e +# CHECK: ps_madds1. 3, 3, 4, 5 +0x10 0x63 0x29 0x1f +# CHECK: ps_merge00 3, 3, 4 +0x10 0x63 0x24 0x20 +# CHECK: ps_merge00. 3, 3, 4 +0x10 0x63 0x24 0x21 +# CHECK: ps_merge01 3, 3, 4 +0x10 0x63 0x24 0x60 +# CHECK: ps_merge01. 3, 3, 4 +0x10 0x63 0x24 0x61 +# CHECK: ps_merge10 3, 3, 4 +0x10 0x63 0x24 0xA0 +# CHECK: ps_merge10. 3, 3, 4 +0x10 0x63 0x24 0xA1 +# CHECK: ps_merge11 3, 3, 4 +0x10 0x63 0x24 0xE0 +# CHECK: ps_merge11. 3, 3, 4 +0x10 0x63 0x24 0xE1 +# CHECK: ps_mr 3, 4 +0x10 0x60 0x20 0x90 +# CHECK: ps_mr. 3, 4 +0x10 0x60 0x20 0x91 +# CHECK: ps_msub 3, 3, 4, 5 +0x10 0x63 0x29 0x38 +# CHECK: ps_msub. 3, 3, 4, 5 +0x10 0x63 0x29 0x39 +# CHECK: ps_mul 3, 3, 4 +0x10 0x63 0x01 0x32 +# CHECK: ps_mul. 3, 3, 4 +0x10 0x63 0x01 0x33 +# CHECK: ps_muls0 3, 3, 4 +0x10 0x63 0x01 0x18 +# CHECK: ps_muls0. 3, 3, 4 +0x10 0x63 0x01 0x19 +# CHECK: ps_muls1 3, 3, 4 +0x10 0x63 0x01 0x1A +# CHECK: ps_muls1. 3, 3, 4 +0x10 0x63 0x01 0x1B +# CHECK: ps_nabs 3, 3 +0x10 0x60 0x19 0x10 +# CHECK: ps_nabs. 3, 3 +0x10 0x60 0x19 0x11 +# CHECK: ps_neg 3, 3 +0x10 0x60 0x18 0x50 +# CHECK: ps_neg. 3, 3 +0x10 0x60 0x18 0x51 +# CHECK: ps_nmadd 3, 3, 4, 5 +0x10 0x63 0x29 0x3e +# CHECK: ps_nmadd. 3, 3, 4, 5 +0x10 0x63 0x29 0x3f +# CHECK: ps_nmsub 3, 3, 4, 5 +0x10 0x63 0x29 0x3c +# CHECK: ps_nmsub. 3, 3, 4, 5 +0x10 0x63 0x29 0x3d +# CHECK: ps_res 3, 3 +0x10 0x60 0x18 0x30 +# CHECK: ps_res. 3, 3 +0x10 0x60 0x18 0x31 +# CHECK: ps_rsqrte 3, 3 +0x10 0x60 0x18 0x34 +# CHECK: ps_rsqrte. 3, 3 +0x10 0x60 0x18 0x35 +# CHECK: ps_sel 3, 3, 4, 5 +0x10 0x63 0x29 0x2e +# CHECK: ps_sel. 3, 3, 4, 5 +0x10 0x63 0x29 0x2f +# CHECK: ps_sub 3, 3, 4 +0x10 0x63 0x20 0x28 +# CHECK: ps_sub. 3, 3, 4 +0x10 0x63 0x20 0x29 +# CHECK: ps_sum0 3, 3, 4, 5 +0x10 0x63 0x29 0x14 +# CHECK: ps_sum0. 3, 3, 4, 5 +0x10 0x63 0x29 0x15 +# CHECK: ps_sum1 3, 3, 4, 5 +0x10 0x63 0x29 0x16 +# CHECK: ps_sum1. 3, 3, 4, 5 +0x10 0x63 0x29 0x17 \ No newline at end of file