Index: lib/Target/X86/X86Subtarget.h
===================================================================
--- lib/Target/X86/X86Subtarget.h
+++ lib/Target/X86/X86Subtarget.h
@@ -485,6 +485,8 @@
 
   bool enableEarlyIfConversion() const override;
 
+  bool enableSubRegLiveness() const override { return true; }
+
   /// Return the instruction itineraries based on the subtarget selection.
   const InstrItineraryData *getInstrItineraryData() const override {
     return &InstrItins;
Index: test/CodeGen/X86/avx512-vec-cmp.ll
===================================================================
--- test/CodeGen/X86/avx512-vec-cmp.ll
+++ test/CodeGen/X86/avx512-vec-cmp.ll
@@ -100,12 +100,9 @@
 define <8 x i32> @test9(<8 x i32> %x, <8 x i32> %y) nounwind {
 ; CHECK-LABEL: test9:
 ; CHECK:       ## BB#0:
-; CHECK-NEXT:      ## kill: YMM1<def> YMM1<kill> ZMM1<def>
-; CHECK-NEXT:      ## kill: YMM0<def> YMM0<kill> ZMM0<def>
-; CHECK-NEXT:    vpcmpeqd %zmm1, %zmm0, %k1
+; CHECK:         vpcmpeqd %zmm1, %zmm0, %k1
 ; CHECK-NEXT:    vpblendmd %zmm0, %zmm1, %zmm0 {%k1}
-; CHECK-NEXT:      ## kill: YMM0<def> YMM0<kill> ZMM0<kill>
-; CHECK-NEXT:    retq
+; CHECK:         retq
   %mask = icmp eq <8 x i32> %x, %y
   %max = select <8 x i1> %mask, <8 x i32> %x, <8 x i32> %y
   ret <8 x i32> %max
@@ -114,12 +111,9 @@
 define <8 x float> @test10(<8 x float> %x, <8 x float> %y) nounwind {
 ; CHECK-LABEL: test10:
 ; CHECK:       ## BB#0:
-; CHECK-NEXT:      ## kill: YMM1<def> YMM1<kill> ZMM1<def>
-; CHECK-NEXT:      ## kill: YMM0<def> YMM0<kill> ZMM0<def>
-; CHECK-NEXT:    vcmpeqps %zmm1, %zmm0, %k1
+; CHECK:         vcmpeqps %zmm1, %zmm0, %k1
 ; CHECK-NEXT:    vblendmps %zmm0, %zmm1, %zmm0 {%k1}
-; CHECK-NEXT:      ## kill: YMM0<def> YMM0<kill> ZMM0<kill>
-; CHECK-NEXT:    retq
+; CHECK:         retq
   %mask = fcmp oeq <8 x float> %x, %y
   %max = select <8 x i1> %mask, <8 x float> %x, <8 x float> %y
   ret <8 x float> %max
@@ -143,8 +137,7 @@
 ; CHECK-NEXT:    vpcmpeqq %zmm3, %zmm1, %k1
 ; CHECK-NEXT:    kunpckbw %k0, %k1, %k0
 ; CHECK-NEXT:    kmovw %k0, %eax
-; CHECK-NEXT:      ## kill: AX<def> AX<kill> EAX<kill>
-; CHECK-NEXT:    retq
+; CHECK:         retq
   %res = icmp eq <16 x i64> %a, %b
   %res1 = bitcast <16 x i1> %res to i16
   ret i16 %res1
Index: test/CodeGen/X86/vector-zext.ll
===================================================================
--- test/CodeGen/X86/vector-zext.ll
+++ test/CodeGen/X86/vector-zext.ll
@@ -366,8 +366,7 @@
 ;
 ; AVX2-LABEL: shuf_zext_8i16_to_8i32:
 ; AVX2:       # BB#0: # %entry
-; AVX2-NEXT:    # kill
-; AVX2-NEXT:    vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
+; AVX2:         vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
 ; AVX2-NEXT:    retq
 entry:
   %B = shufflevector <8 x i16> %A, <8 x i16> zeroinitializer, <16 x i32> <i32 0, i32 8, i32 1, i32 8, i32 2, i32 8, i32 3, i32 8, i32 4, i32 8, i32 5, i32 8, i32 6, i32 8, i32 7, i32 8>
@@ -413,8 +412,7 @@
 ;
 ; AVX2-LABEL: shuf_zext_4i32_to_4i64:
 ; AVX2:       # BB#0: # %entry
-; AVX2-NEXT:    # kill
-; AVX2-NEXT:    vpmovzxdq {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
+; AVX2:         vpmovzxdq {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
 ; AVX2-NEXT:    retq
 entry:
   %B = shufflevector <4 x i32> %A, <4 x i32> zeroinitializer, <8 x i32> <i32 0, i32 4, i32 1, i32 4, i32 2, i32 4, i32 3, i32 4>