Index: llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp =================================================================== --- llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp +++ llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp @@ -1758,10 +1758,6 @@ MIB->copyIRFlags(CI); for (auto &Arg : enumerate(CI.arg_operands())) { - // Some intrinsics take metadata parameters. Reject them. - if (isa(Arg.value())) - return false; - // If this is required to be an immediate, don't materialize it in a // register. if (CI.paramHasAttr(Arg.index(), Attribute::ImmArg)) { @@ -1774,6 +1770,11 @@ } else { MIB.addFPImm(cast(Arg.value())); } + } else if (auto MD = dyn_cast(Arg.value())) { + auto *MDN = dyn_cast(MD->getMetadata()); + if (!MDN) // This was probably an MDString. + return false; + MIB.addMetadata(MDN); } else { ArrayRef VRegs = getOrCreateVRegs(*Arg.value()); if (VRegs.size() > 1) Index: llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-metadata.ll =================================================================== --- /dev/null +++ llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-metadata.ll @@ -0,0 +1,22 @@ +; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py +; RUN: llc -global-isel -march=amdgcn -mcpu=gfx900 -stop-after=irtranslator -o - %s | FileCheck %s +; Make sure intrinsics with metadata arguments are translated + +define i32 @reloc_constant() { + ; CHECK-LABEL: name: reloc_constant + ; CHECK: bb.1 (%ir-block.0): + ; CHECK: liveins: $sgpr30_sgpr31 + ; CHECK: [[COPY:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31 + ; CHECK: [[INT:%[0-9]+]]:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.reloc.constant), !0 + ; CHECK: $vgpr0 = COPY [[INT]](s32) + ; CHECK: [[COPY1:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY]] + ; CHECK: S_SETPC_B64_return [[COPY1]], implicit $vgpr0 + %val = call i32 @llvm.amdgcn.reloc.constant(metadata !0) + ret i32 %val +} + +declare i32 @llvm.amdgcn.reloc.constant(metadata) #0 + +attributes #0 = { nounwind readnone speculatable willreturn } + +!0 = !{!"arst"}