Index: llvm/test/CodeGen/PowerPC/aix-complex.ll
===================================================================
--- /dev/null
+++ llvm/test/CodeGen/PowerPC/aix-complex.ll
@@ -0,0 +1,136 @@
+; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff < %s | \
+; RUN:   FileCheck --check-prefixes=CHECK,32BIT %s
+
+; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc64-ibm-aix-xcoff < %s | \
+; RUN:   FileCheck --check-prefixes=CHECK,64BIT %s
+
+@gcd1 = external global { double, double }, align 8
+@gcd2 = external global { double, double }, align 8
+@gcf1 = external global { float, float }, align 4
+@gcf2 = external global { float, float }, align 4
+
+define dso_local { double, double } @dblCmplxRetCallee() noinline nounwind optnone {
+entry:
+  %retval = alloca { double, double }, align 8
+  %gcd1.real = load double, double* getelementptr inbounds ({ double, double }, { double, double }* @gcd1, i32 0, i32 0), align 8
+  %gcd1.imag = load double, double* getelementptr inbounds ({ double, double }, { double, double }* @gcd1, i32 0, i32 1), align 8
+  %retval.realp = getelementptr inbounds { double, double }, { double, double }* %retval, i32 0, i32 0
+  %retval.imagp = getelementptr inbounds { double, double }, { double, double }* %retval, i32 0, i32 1
+  store double %gcd1.real, double* %retval.realp, align 8
+  store double %gcd1.imag, double* %retval.imagp, align 8
+  %0 = load { double, double }, { double, double }* %retval, align 8
+  ret { double, double } %0
+}
+
+; CHECK-LABEL: .dblCmplxRetCallee:
+
+; CHECK-DAG:   lfd 1,
+; CHECK-DAG:   lfd 2,
+; CHECK-NEXT:  blr
+
+declare void @anchor(...)
+
+define dso_local void @dblCmplxRetCaller() noinline nounwind optnone {
+entry:
+  %call = call { double, double } @dblCmplxRetCallee()
+  %0 = extractvalue { double, double } %call, 0
+  %1 = extractvalue { double, double } %call, 1
+  store double %0, double* getelementptr inbounds ({ double, double }, { double, double }* @gcd2, i32 0, i32 0), align 8
+  store double %1, double* getelementptr inbounds ({ double, double }, { double, double }* @gcd2, i32 0, i32 1), align 8
+  call void bitcast (void (...)* @anchor to void ()*)()
+  ret void
+}
+
+; CHECK-LABEL: .dblCmplxRetCaller:
+
+; CHECK:        bl .dblCmplxRetCallee
+; 32BIT-NEXT:   lwz [[REG:[0-9]+]], L..C{{[0-9]+}}(2)
+; 64BIT-NEXT:   ld [[REG:[0-9]+]], L..C{{[0-9]+}}(2)
+; CHECK-DAG:    stfd 1, 0([[REG]])
+; CHECK-DAG:    stfd 2, 8([[REG]])
+; CHECK-NEXT:   bl .anchor
+
+define dso_local { float, float } @fltCmplxRetCallee() noinline nounwind optnone {
+entry:
+  %retval = alloca { float, float }, align 4
+  %gcf1.real = load float, float* getelementptr inbounds ({ float, float }, { float, float }* @gcf1, i32 0, i32 0), align 4
+  %gcf1.imag = load float, float* getelementptr inbounds ({ float, float }, { float, float }* @gcf1, i32 0, i32 1), align 4
+  %retval.realp = getelementptr inbounds { float, float }, { float, float }* %retval, i32 0, i32 0
+  %retval.imagp = getelementptr inbounds { float, float }, { float, float }* %retval, i32 0, i32 1
+  store float %gcf1.real, float* %retval.realp, align 4
+  store float %gcf1.imag, float* %retval.imagp, align 4
+  %0 = load { float, float }, { float, float }* %retval, align 4
+  ret { float, float } %0
+}
+
+; CHECK-LABEL: .fltCmplxRetCallee:
+
+; CHECK-DAG:   lfs 1,
+; CHECK-DAG:   lfs 2,
+; CHECK-NEXT:  blr
+
+define dso_local void @fltCmplxRetCaller() noinline nounwind optnone {
+entry:
+  %call = call { float, float } @fltCmplxRetCallee()
+  %0 = extractvalue { float, float } %call, 0
+  %1 = extractvalue { float, float } %call, 1
+  store float %0, float* getelementptr inbounds ({ float, float }, { float, float }* @gcf2, i32 0, i32 0), align 4
+  store float %1, float* getelementptr inbounds ({ float, float }, { float, float }* @gcf2, i32 0, i32 1), align 4
+  call void bitcast (void (...)* @anchor to void ()*)()
+  ret void
+}
+
+; CHECK-LABEL: .fltCmplxRetCaller:
+
+; CHECK:        bl .fltCmplxRetCallee
+; 32BIT-NEXT:   lwz [[REG:[0-9]+]], L..C{{[0-9]+}}(2)
+; 64BIT-NEXT:   ld [[REG:[0-9]+]], L..C{{[0-9]+}}(2)
+; CHECK-DAG:    stfs 1, 0([[REG]])
+; CHECK-DAG:    stfs 2, 4([[REG]])
+; CHECK-NEXT:   bl .anchor
+
+@gcld1 = external global { ppc_fp128, ppc_fp128 }, align 16
+@gcld2 = external global { ppc_fp128, ppc_fp128 }, align 16
+
+define dso_local { ppc_fp128, ppc_fp128 } @fp128CmplxRetCallee() noinline nounwind optnone {
+entry:
+  %retval = alloca { ppc_fp128, ppc_fp128 }, align 16
+  %gcld1.real = load ppc_fp128, ppc_fp128* getelementptr inbounds ({ ppc_fp128, ppc_fp128 }, { ppc_fp128, ppc_fp128 }* @gcld1, i32 0, i32 0), align 16
+  %gcld1.imag = load ppc_fp128, ppc_fp128* getelementptr inbounds ({ ppc_fp128, ppc_fp128 }, { ppc_fp128, ppc_fp128 }* @gcld1, i32 0, i32 1), align 16
+  %retval.realp = getelementptr inbounds { ppc_fp128, ppc_fp128 }, { ppc_fp128, ppc_fp128 }* %retval, i32 0, i32 0
+  %retval.imagp = getelementptr inbounds { ppc_fp128, ppc_fp128 }, { ppc_fp128, ppc_fp128 }* %retval, i32 0, i32 1
+  store ppc_fp128 %gcld1.real, ppc_fp128* %retval.realp, align 16
+  store ppc_fp128 %gcld1.imag, ppc_fp128* %retval.imagp, align 16
+  %0 = load { ppc_fp128, ppc_fp128 }, { ppc_fp128, ppc_fp128 }* %retval, align 16
+  ret { ppc_fp128, ppc_fp128 } %0
+}
+
+; CHECK-LABEL: .fp128CmplxRetCallee:
+
+; CHECK-DAG:  lfd 1,
+; CHECK-DAG:  lfd 2,
+; CHECK-DAG:  lfd 3,
+; CHECK-DAG:  lfd 4,
+; CHECK-DAG:  blr
+
+define dso_local void @fp128CmplxRetCaller() noinline nounwind optnone {
+entry:
+  %call = call { ppc_fp128, ppc_fp128 } @fp128CmplxRetCallee()
+  %0 = extractvalue { ppc_fp128, ppc_fp128 } %call, 0
+  %1 = extractvalue { ppc_fp128, ppc_fp128 } %call, 1
+  store ppc_fp128 %0, ppc_fp128* getelementptr inbounds ({ ppc_fp128, ppc_fp128 }, { ppc_fp128, ppc_fp128 }* @gcld2, i32 0, i32 0), align 16
+  store ppc_fp128 %1, ppc_fp128* getelementptr inbounds ({ ppc_fp128, ppc_fp128 }, { ppc_fp128, ppc_fp128 }* @gcld2, i32 0, i32 1), align 16
+  call void bitcast (void (...)* @anchor to void ()*)()
+  ret void
+}
+
+; CHECK-LABEL: .fp128CmplxRetCaller:
+
+; CHECK:        bl .fp128CmplxRetCallee
+; 32BIT-NEXT:   lwz [[REG:[0-9]+]], L..C{{[0-9]+}}(2)
+; 64BIT-NEXT:   ld [[REG:[0-9]+]], L..C{{[0-9]+}}(2)
+; CHECK-DAG:    stfd 1,
+; CHECK-DAG:    stfd 2,
+; CHECK-DAG:    stfd 3,
+; CHECK-DAG:    stfd 4,
+; CHECK-NEXT:   bl .anchor