diff --git a/llvm/lib/CodeGen/LiveDebugVariables.cpp b/llvm/lib/CodeGen/LiveDebugVariables.cpp --- a/llvm/lib/CodeGen/LiveDebugVariables.cpp +++ b/llvm/lib/CodeGen/LiveDebugVariables.cpp @@ -100,29 +100,103 @@ /// with some flags about the original usage of the location. class DbgVariableValue { public: - DbgVariableValue(unsigned LocNo, bool WasIndirect, - const DIExpression &Expression) - : LocNo(LocNo), WasIndirect(WasIndirect), Expression(&Expression) { - assert(getLocNo() == LocNo && "location truncation"); + DbgVariableValue(ArrayRef NewLocs, bool WasIndirect, bool WasList, + bool IsReal, const DIExpression &Expr) + : WasIndirect(WasIndirect), WasList(WasList), IsReal(IsReal), + Expression(&Expr), LocNos() { + assert(!(WasIndirect && WasList) && + "DBG_VALUE_LISTs should not be indirect."); + std::vector LocNoVec; + for (unsigned LocNo : NewLocs) { + auto It = find(LocNoVec, LocNo); + if (It == LocNoVec.end()) + LocNoVec.push_back(LocNo); + else { + // Loc duplicates an element in LocNos; replace references to Op + // with references to the duplicating element. + unsigned OpIdx = LocNoVec.size(); + unsigned DuplicatingIdx = std::distance(LocNoVec.begin(), It); + Expression = + DIExpression::replaceArg(Expression, OpIdx, DuplicatingIdx); + } + } + LocNos.reset(new std::vector(std::move(LocNoVec))); + assert(LocNos->size() > 0 || !IsReal); } - DbgVariableValue() : LocNo(0), WasIndirect(0) {} + DbgVariableValue() + : LocNos(new std::vector()), WasIndirect(0), WasList(0), + IsReal(0) {} + DbgVariableValue(const DbgVariableValue &Other) + : WasIndirect(Other.getWasIndirect()), WasList(Other.getWasList()), + IsReal(Other.IsReal), Expression(Other.getExpression()), + LocNos(new std::vector(Other.getLocNos().begin(), + Other.getLocNos().end())) { + assert(LocNos->size() > 0 || !IsReal); + } + + DbgVariableValue &operator=(const DbgVariableValue &Other) { + ArrayRef OtherLocNos = Other.getLocNos(); + LocNos.reset( + new std::vector(OtherLocNos.begin(), OtherLocNos.end())); + WasIndirect = Other.getWasIndirect(); + WasList = Other.getWasList(); + IsReal = Other.IsReal; + Expression = Other.getExpression(); + assert(LocNos->size() > 0 || !IsReal); + return *this; + } const DIExpression *getExpression() const { return Expression; } - unsigned getLocNo() const { + const ArrayRef getLocNos() const { // Fix up the undef location number, which gets truncated. - return LocNo == INT_MAX ? UndefLocNo : LocNo; + return *LocNos; + } + bool containsLocNo(unsigned LocNo) const { + return is_contained(*LocNos, LocNo); } bool getWasIndirect() const { return WasIndirect; } - bool isUndef() const { return getLocNo() == UndefLocNo; } + bool getWasList() const { return WasList; } + bool isUndef() const { return LocNos->empty() || containsLocNo(UndefLocNo); } + + DbgVariableValue decrementLocNosAfterPivot(unsigned Pivot) const { + SmallVector NewLocNos; + for (unsigned LocNo : *LocNos) + NewLocNos.push_back(LocNo != UndefLocNo && LocNo > Pivot ? LocNo - 1 + : LocNo); + return DbgVariableValue(NewLocNos, WasIndirect, WasList, IsReal, + *Expression); + } - DbgVariableValue changeLocNo(unsigned NewLocNo) const { - return DbgVariableValue(NewLocNo, WasIndirect, *Expression); + DbgVariableValue remapLocNos(ArrayRef LocNoMap) const { + SmallVector NewLocNos; + for (unsigned LocNo : *LocNos) + // Undef values don't exist in locations (and thus not in LocNoMap + // either) so skip over them. See getLocationNo(). + NewLocNos.push_back(LocNo == UndefLocNo ? UndefLocNo : LocNoMap[LocNo]); + return DbgVariableValue(NewLocNos, WasIndirect, WasList, IsReal, + *Expression); + } + + DbgVariableValue changeLocNo(unsigned OldLocNo, unsigned NewLocNo) const { + std::vector NewLocNos; + NewLocNos.assign(LocNos->begin(), LocNos->end()); + auto OldLocIt = find(NewLocNos, OldLocNo); + assert(OldLocIt != NewLocNos.end() && "Old location must be present."); + *OldLocIt = NewLocNo; + return DbgVariableValue(NewLocNos, WasIndirect, WasList, IsReal, + *Expression); + } + + void printLocNos(llvm::raw_ostream &OS) const { + for (unsigned Loc : getLocNos()) + OS << (Loc == *getLocNos().begin() ? " " : ", ") << Loc; } friend inline bool operator==(const DbgVariableValue &LHS, const DbgVariableValue &RHS) { - return LHS.LocNo == RHS.LocNo && LHS.WasIndirect == RHS.WasIndirect && + return *LHS.LocNos == *RHS.LocNos && LHS.WasIndirect == RHS.WasIndirect && + LHS.WasList == RHS.WasList && LHS.IsReal == RHS.IsReal && LHS.Expression == RHS.Expression; } @@ -132,8 +206,10 @@ } private: - unsigned LocNo : 31; - unsigned WasIndirect : 1; + std::unique_ptr> LocNos; + bool WasIndirect : 1; + bool WasList : 1; + bool IsReal : 1; const DIExpression *Expression = nullptr; }; } // namespace @@ -179,7 +255,8 @@ /// Insert a DBG_VALUE into MBB at Idx for DbgValue. void insertDebugValue(MachineBasicBlock *MBB, SlotIndex StartIdx, SlotIndex StopIdx, DbgVariableValue DbgValue, - bool Spilled, unsigned SpillOffset, LiveIntervals &LIS, + ArrayRef LocSpills, + ArrayRef SpillOffsets, LiveIntervals &LIS, const TargetInstrInfo &TII, const TargetRegisterInfo &TRI); @@ -264,17 +341,16 @@ void removeLocationIfUnused(unsigned LocNo) { // Bail out if LocNo still is used. for (LocMap::const_iterator I = locInts.begin(); I.valid(); ++I) { - DbgVariableValue DbgValue = I.value(); - if (DbgValue.getLocNo() == LocNo) + const DbgVariableValue &DbgValue = I.value(); + if (DbgValue.containsLocNo(LocNo)) return; } // Remove the entry in the locations vector, and adjust all references to // location numbers above the removed entry. locations.erase(locations.begin() + LocNo); for (LocMap::iterator I = locInts.begin(); I.valid(); ++I) { - DbgVariableValue DbgValue = I.value(); - if (!DbgValue.isUndef() && DbgValue.getLocNo() > LocNo) - I.setValueUnchecked(DbgValue.changeLocNo(DbgValue.getLocNo() - 1)); + const DbgVariableValue &DbgValue = I.value(); + I.setValueUnchecked(DbgValue.decrementLocNosAfterPivot(LocNo)); } } @@ -282,16 +358,19 @@ void mapVirtRegs(LDVImpl *LDV); /// Add a definition point to this user value. - void addDef(SlotIndex Idx, const MachineOperand &LocMO, bool IsIndirect, - const DIExpression &Expr) { - DbgVariableValue DbgValue(getLocationNo(LocMO), IsIndirect, Expr); + void addDef(SlotIndex Idx, ArrayRef LocMOs, bool IsIndirect, + bool IsList, const DIExpression &Expr) { + SmallVector Locs; + for (MachineOperand Op : LocMOs) + Locs.push_back(getLocationNo(Op)); + DbgVariableValue DbgValue(Locs, IsIndirect, IsList, true, Expr); // Add a singular (Idx,Idx) -> value mapping. LocMap::iterator I = locInts.find(Idx); if (!I.valid() || I.start() != Idx) - I.insert(Idx, Idx.getNextSlot(), DbgValue); + I.insert(Idx, Idx.getNextSlot(), std::move(DbgValue)); else // A later DBG_VALUE at the same SlotIndex overrides the old location. - I.setValue(DbgValue); + I.setValue(std::move(DbgValue)); } /// Extend the current definition as far as possible down. @@ -304,25 +383,30 @@ /// /// \param Idx Starting point for the definition. /// \param DbgValue value to propagate. - /// \param LR Restrict liveness to where LR has the value VNI. May be null. - /// \param VNI When LR is not null, this is the value to restrict to. + /// \param LiveIntervalInfo For each location number key in this map, + /// restricts liveness to where the LiveRange has the value equal to the\ + /// VNInfo. /// \param [out] Kills Append end points of VNI's live range to Kills. /// \param LIS Live intervals analysis. - void extendDef(SlotIndex Idx, DbgVariableValue DbgValue, LiveRange *LR, - const VNInfo *VNI, SmallVectorImpl *Kills, + void extendDef(SlotIndex Idx, DbgVariableValue DbgValue, + SmallDenseMap> + &LiveIntervalInfo, + Optional>> &Kills, LiveIntervals &LIS); /// The value in LI may be copies to other registers. Determine if /// any of the copies are available at the kill points, and add defs if /// possible. /// - /// \param LI Scan for copies of the value in LI->reg. /// \param DbgValue Location number of LI->reg, and DIExpression. - /// \param Kills Points where the range of DbgValue could be extended. + /// \param LocIntervals Scan for copies of the value for each location in the + /// corresponding LiveInterval->reg. + /// \param KilledAt The point where the range of DbgValue could be extended. /// \param [in,out] NewDefs Append (Idx, DbgValue) of inserted defs here. void addDefsFromCopies( - LiveInterval *LI, DbgVariableValue DbgValue, - const SmallVectorImpl &Kills, + DbgVariableValue DbgValue, + SmallVectorImpl> &LocIntervals, + SlotIndex KilledAt, SmallVectorImpl> &NewDefs, MachineRegisterInfo &MRI, LiveIntervals &LIS); @@ -555,11 +639,13 @@ for (LocMap::const_iterator I = locInts.begin(); I.valid(); ++I) { OS << " [" << I.start() << ';' << I.stop() << "):"; if (I.value().isUndef()) - OS << "undef"; + OS << " undef"; else { - OS << I.value().getLocNo(); + I.value().printLocNos(OS); if (I.value().getWasIndirect()) OS << " ind"; + else if (I.value().getWasList()) + OS << " list"; } } for (unsigned i = 0, e = locations.size(); i != e; ++i) { @@ -623,10 +709,12 @@ } bool LDVImpl::handleDebugValue(MachineInstr &MI, SlotIndex Idx) { - // DBG_VALUE loc, offset, variable - if (MI.getNumOperands() != 4 || - !(MI.getDebugOffset().isReg() || MI.getDebugOffset().isImm()) || - !MI.getDebugVariableOp().isMetadata()) { + // DBG_VALUE loc, offset, variable, expr + // DBG_VALUE_LIST variable, expr, locs... + if (!MI.isDebugValue() || !MI.getDebugVariableOp().isMetadata() || + MI.isNonListDebugValue() && + (!(MI.getDebugOffset().isImm() || MI.getDebugOffset().isReg()) || + MI.getNumOperands() != 4)) { LLVM_DEBUG(dbgs() << "Can't handle " << MI); return false; } @@ -639,27 +727,28 @@ // (and if the machine verifier is improved to catch this), then these checks // could be removed or replaced by asserts. bool Discard = false; - if (MI.getDebugOperand(0).isReg() && - Register::isVirtualRegister(MI.getDebugOperand(0).getReg())) { - const Register Reg = MI.getDebugOperand(0).getReg(); - if (!LIS->hasInterval(Reg)) { - // The DBG_VALUE is described by a virtual register that does not have a - // live interval. Discard the DBG_VALUE. - Discard = true; - LLVM_DEBUG(dbgs() << "Discarding debug info (no LIS interval): " << Idx - << " " << MI); - } else { - // The DBG_VALUE is only valid if either Reg is live out from Idx, or Reg - // is defined dead at Idx (where Idx is the slot index for the instruction - // preceding the DBG_VALUE). - const LiveInterval &LI = LIS->getInterval(Reg); - LiveQueryResult LRQ = LI.Query(Idx); - if (!LRQ.valueOutOrDead()) { - // We have found a DBG_VALUE with the value in a virtual register that - // is not live. Discard the DBG_VALUE. + for (const MachineOperand &Op : MI.debug_operands()) { + if (Op.isReg() && Register::isVirtualRegister(Op.getReg())) { + const Register Reg = Op.getReg(); + if (!LIS->hasInterval(Reg)) { + // The DBG_VALUE is described by a virtual register that does not have a + // live interval. Discard the DBG_VALUE. Discard = true; - LLVM_DEBUG(dbgs() << "Discarding debug info (reg not live): " << Idx + LLVM_DEBUG(dbgs() << "Discarding debug info (no LIS interval): " << Idx << " " << MI); + } else { + // The DBG_VALUE is only valid if either Reg is live out from Idx, or + // Reg is defined dead at Idx (where Idx is the slot index for the + // instruction preceding the DBG_VALUE). + const LiveInterval &LI = LIS->getInterval(Reg); + LiveQueryResult LRQ = LI.Query(Idx); + if (!LRQ.valueOutOrDead()) { + // We have found a DBG_VALUE with the value in a virtual register that + // is not live. Discard the DBG_VALUE. + Discard = true; + LLVM_DEBUG(dbgs() << "Discarding debug info (reg not live): " << Idx + << " " << MI); + } } } } @@ -669,15 +758,21 @@ if (IsIndirect) assert(MI.getDebugOffset().getImm() == 0 && "DBG_VALUE with nonzero offset"); + bool IsList = MI.isDebugValueList(); const DILocalVariable *Var = MI.getDebugVariable(); const DIExpression *Expr = MI.getDebugExpression(); UserValue *UV = getUserValue(Var, Expr->getFragmentInfo(), MI.getDebugLoc()); if (!Discard) - UV->addDef(Idx, MI.getDebugOperand(0), IsIndirect, *Expr); + UV->addDef(Idx, SmallVector(MI.debug_operands()), + IsIndirect, IsList, *Expr); else { MachineOperand MO = MachineOperand::CreateReg(0U, false); MO.setIsDebug(); - UV->addDef(Idx, MO, false, *Expr); + // We should still pass a list the same size as MI.debug_operands() even if + // all MOs are undef, so that DbgVariableValue can correctly adjust the + // expression while removing the duplicated undefs. + SmallVector UndefMOs(MI.getNumDebugOperands(), MO); + UV->addDef(Idx, UndefMOs, false, IsList, *Expr); } return true; } @@ -754,26 +849,33 @@ return Changed; } -void UserValue::extendDef(SlotIndex Idx, DbgVariableValue DbgValue, LiveRange *LR, - const VNInfo *VNI, SmallVectorImpl *Kills, - LiveIntervals &LIS) { +void UserValue::extendDef( + SlotIndex Idx, DbgVariableValue DbgValue, + SmallDenseMap> + &LiveIntervalInfo, + Optional>> &Kills, + LiveIntervals &LIS) { SlotIndex Start = Idx; MachineBasicBlock *MBB = LIS.getMBBFromIndex(Start); SlotIndex Stop = LIS.getMBBEndIdx(MBB); LocMap::iterator I = locInts.find(Start); - // Limit to VNI's live range. + // Limit to the intersection of the VNIs' live ranges. bool ToEnd = true; - if (LR && VNI) { + for (auto &LII : LiveIntervalInfo) { + LiveRange *LR = LII.second.first; + const VNInfo *VNI = LII.second.second; + assert(LR && VNI && "Missing range info for Idx."); LiveInterval::Segment *Segment = LR->getSegmentContaining(Start); - if (!Segment || Segment->valno != VNI) { - if (Kills) - Kills->push_back(Start); - return; - } + assert(Segment && Segment->valno == VNI && "Invalid VNInfo for Idx given?"); if (Segment->end < Stop) { Stop = Segment->end; ToEnd = false; + Kills = {Stop, {LII.first}}; + } else if (Segment->end == Stop && Kills.hasValue()) { + // If multiple locations end at the same place, track all of them in + // Kills. + Kills->second.push_back(LII.first); } } @@ -781,94 +883,114 @@ if (I.valid() && I.start() <= Start) { // Stop when meeting a different location or an already extended interval. Start = Start.getNextSlot(); - if (I.value() != DbgValue || I.stop() != Start) + if (I.value() != DbgValue || I.stop() != Start) { + // Clear `Kills`, as we have a new def available. + Kills = None; return; + } // This is a one-slot placeholder. Just skip it. ++I; } // Limited by the next def. - if (I.valid() && I.start() < Stop) + if (I.valid() && I.start() < Stop) { Stop = I.start(); - // Limited by VNI's live range. - else if (!ToEnd && Kills) - Kills->push_back(Stop); + // Clear `Kills`, as we have a new def available. + Kills = None; + } - if (Start < Stop) - I.insert(Start, Stop, DbgValue); + if (Start < Stop) { + DbgVariableValue ExtDbgValue(DbgValue); + I.insert(Start, Stop, std::move(ExtDbgValue)); + } } void UserValue::addDefsFromCopies( - LiveInterval *LI, DbgVariableValue DbgValue, - const SmallVectorImpl &Kills, + DbgVariableValue DbgValue, + SmallVectorImpl> &LocIntervals, + SlotIndex KilledAt, SmallVectorImpl> &NewDefs, MachineRegisterInfo &MRI, LiveIntervals &LIS) { - if (Kills.empty()) - return; // Don't track copies from physregs, there are too many uses. - if (!Register::isVirtualRegister(LI->reg())) + if (any_of(LocIntervals, [](auto LocI) { + return !Register::isVirtualRegister(LocI.second->reg()); + })) return; // Collect all the (vreg, valno) pairs that are copies of LI. - SmallVector, 8> CopyValues; - for (MachineOperand &MO : MRI.use_nodbg_operands(LI->reg())) { - MachineInstr *MI = MO.getParent(); - // Copies of the full value. - if (MO.getSubReg() || !MI->isCopy()) - continue; - Register DstReg = MI->getOperand(0).getReg(); + SmallDenseMap, 4>> + CopyValues; + for (auto &LocInterval : LocIntervals) { + unsigned LocNo = LocInterval.first; + LiveInterval *LI = LocInterval.second; + for (MachineOperand &MO : MRI.use_nodbg_operands(LI->reg())) { + MachineInstr *MI = MO.getParent(); + // Copies of the full value. + if (MO.getSubReg() || !MI->isCopy()) + continue; + Register DstReg = MI->getOperand(0).getReg(); - // Don't follow copies to physregs. These are usually setting up call - // arguments, and the argument registers are always call clobbered. We are - // better off in the source register which could be a callee-saved register, - // or it could be spilled. - if (!Register::isVirtualRegister(DstReg)) - continue; + // Don't follow copies to physregs. These are usually setting up call + // arguments, and the argument registers are always call clobbered. We are + // better off in the source register which could be a callee-saved + // register, or it could be spilled. + if (!Register::isVirtualRegister(DstReg)) + continue; - // Is the value extended to reach this copy? If not, another def may be - // blocking it, or we are looking at a wrong value of LI. - SlotIndex Idx = LIS.getInstructionIndex(*MI); - LocMap::iterator I = locInts.find(Idx.getRegSlot(true)); - if (!I.valid() || I.value() != DbgValue) - continue; + // Is the value extended to reach this copy? If not, another def may be + // blocking it, or we are looking at a wrong value of LI. + SlotIndex Idx = LIS.getInstructionIndex(*MI); + LocMap::iterator I = locInts.find(Idx.getRegSlot(true)); + if (!I.valid() || I.value() != DbgValue) + continue; - if (!LIS.hasInterval(DstReg)) - continue; - LiveInterval *DstLI = &LIS.getInterval(DstReg); - const VNInfo *DstVNI = DstLI->getVNInfoAt(Idx.getRegSlot()); - assert(DstVNI && DstVNI->def == Idx.getRegSlot() && "Bad copy value"); - CopyValues.push_back(std::make_pair(DstLI, DstVNI)); + if (!LIS.hasInterval(DstReg)) + continue; + LiveInterval *DstLI = &LIS.getInterval(DstReg); + const VNInfo *DstVNI = DstLI->getVNInfoAt(Idx.getRegSlot()); + assert(DstVNI && DstVNI->def == Idx.getRegSlot() && "Bad copy value"); + CopyValues[LocNo].push_back(std::make_pair(DstLI, DstVNI)); + } } if (CopyValues.empty()) return; - LLVM_DEBUG(dbgs() << "Got " << CopyValues.size() << " copies of " << *LI - << '\n'); + for (auto &LocInterval : LocIntervals) + LLVM_DEBUG(dbgs() << "Got " << CopyValues[LocInterval.first].size() + << " copies of " << *LocInterval.second << '\n'); - // Try to add defs of the copied values for each kill point. - for (unsigned i = 0, e = Kills.size(); i != e; ++i) { - SlotIndex Idx = Kills[i]; - for (unsigned j = 0, e = CopyValues.size(); j != e; ++j) { - LiveInterval *DstLI = CopyValues[j].first; - const VNInfo *DstVNI = CopyValues[j].second; - if (DstLI->getVNInfoAt(Idx) != DstVNI) - continue; - // Check that there isn't already a def at Idx - LocMap::iterator I = locInts.find(Idx); - if (I.valid() && I.start() <= Idx) + // Try to add defs of the copied values for the kill point. Check that there + // isn't already a def at Idx. + LocMap::iterator I = locInts.find(KilledAt); + if (I.valid() && I.start() <= KilledAt) + return; + DbgVariableValue NewValue(DbgValue); + for (auto &LocInterval : LocIntervals) { + unsigned LocNo = LocInterval.first; + bool FoundCopy = false; + for (auto &LIAndVNI : CopyValues[LocNo]) { + LiveInterval *DstLI = LIAndVNI.first; + const VNInfo *DstVNI = LIAndVNI.second; + if (DstLI->getVNInfoAt(KilledAt) != DstVNI) continue; - LLVM_DEBUG(dbgs() << "Kill at " << Idx << " covered by valno #" + LLVM_DEBUG(dbgs() << "Kill at " << KilledAt << " covered by valno #" << DstVNI->id << " in " << *DstLI << '\n'); MachineInstr *CopyMI = LIS.getInstructionFromIndex(DstVNI->def); assert(CopyMI && CopyMI->isCopy() && "Bad copy value"); - unsigned LocNo = getLocationNo(CopyMI->getOperand(0)); - DbgVariableValue NewValue = DbgValue.changeLocNo(LocNo); - I.insert(Idx, Idx.getNextSlot(), NewValue); - NewDefs.push_back(std::make_pair(Idx, NewValue)); + unsigned NewLocNo = getLocationNo(CopyMI->getOperand(0)); + NewValue = NewValue.changeLocNo(LocNo, NewLocNo); + FoundCopy = true; break; } + // If there are any killed locations we can't find a copy for, we can't + // extend the variable value. + if (!FoundCopy) + return; } + I.insert(KilledAt, KilledAt.getNextSlot(), NewValue); + NewDefs.push_back(std::make_pair(KilledAt, NewValue)); } void UserValue::computeIntervals(MachineRegisterInfo &MRI, @@ -885,34 +1007,54 @@ for (unsigned i = 0; i != Defs.size(); ++i) { SlotIndex Idx = Defs[i].first; DbgVariableValue DbgValue = Defs[i].second; - const MachineOperand &LocMO = locations[DbgValue.getLocNo()]; - - if (!LocMO.isReg()) { - extendDef(Idx, DbgValue, nullptr, nullptr, nullptr, LIS); - continue; - } - - // Register locations are constrained to where the register value is live. - if (Register::isVirtualRegister(LocMO.getReg())) { + SmallDenseMap> LIs; + SmallVector VNIs; + bool ShouldExtendDef = false; + for (unsigned LocNo : DbgValue.getLocNos()) { + const MachineOperand &LocMO = locations[LocNo]; + if (!LocMO.isReg() || !Register::isVirtualRegister(LocMO.getReg())) { + ShouldExtendDef |= !LocMO.isReg(); + continue; + } + ShouldExtendDef = true; LiveInterval *LI = nullptr; const VNInfo *VNI = nullptr; if (LIS.hasInterval(LocMO.getReg())) { LI = &LIS.getInterval(LocMO.getReg()); VNI = LI->getVNInfoAt(Idx); } - SmallVector Kills; - extendDef(Idx, DbgValue, LI, VNI, &Kills, LIS); - // FIXME: Handle sub-registers in addDefsFromCopies. The problem is that - // if the original location for example is %vreg0:sub_hi, and we find a - // full register copy in addDefsFromCopies (at the moment it only handles - // full register copies), then we must add the sub1 sub-register index to - // the new location. However, that is only possible if the new virtual - // register is of the same regclass (or if there is an equivalent - // sub-register in that regclass). For now, simply skip handling copies if - // a sub-register is involved. - if (LI && !LocMO.getSubReg()) - addDefsFromCopies(LI, DbgValue, Kills, Defs, MRI, LIS); - continue; + if (LI && VNI) + LIs[LocNo] = {LI, VNI}; + } + if (ShouldExtendDef) { + Optional>> Kills; + extendDef(Idx, DbgValue, LIs, Kills, LIS); + + if (Kills) { + SmallVector, 2> LocIntervals; + bool AnySubreg = false; + for (unsigned LocNo : Kills->second) { + const MachineOperand &LocMO = this->locations[LocNo]; + if (LocMO.getSubReg()) { + AnySubreg = true; + break; + } + LiveInterval *LI = &LIS.getInterval(LocMO.getReg()); + LocIntervals.push_back({LocNo, LI}); + } + + // FIXME: Handle sub-registers in addDefsFromCopies. The problem is that + // if the original location for example is %vreg0:sub_hi, and we find a + // full register copy in addDefsFromCopies (at the moment it only + // handles full register copies), then we must add the sub1 sub-register + // index to the new location. However, that is only possible if the new + // virtual register is of the same regclass (or if there is an + // equivalent sub-register in that regclass). For now, simply skip + // handling copies if a sub-register is involved. + if (!AnySubreg) + addDefsFromCopies(DbgValue, LocIntervals, Kills->first, Defs, MRI, + LIS); + } } // For physregs, we only mark the start slot idx. DwarfDebug will see it @@ -1091,7 +1233,7 @@ break; // Now LII->end > LocMapI.start(). Do we have an overlap? - if (LocMapI.value().getLocNo() == OldLocNo && + if (LocMapI.value().containsLocNo(OldLocNo) && LII->start < LocMapI.stop()) { // Overlapping correct location. Allocate NewLocNo now. if (NewLocNo == UndefLocNo) { @@ -1112,7 +1254,7 @@ LocMapI.setStopUnchecked(LII->end); // Change the value in the overlap. This may trigger coalescing. - LocMapI.setValue(OldDbgValue.changeLocNo(NewLocNo)); + LocMapI.setValue(OldDbgValue.changeLocNo(OldLocNo, NewLocNo)); // Re-insert any removed OldDbgValue ranges. if (LStart < LocMapI.start()) { @@ -1269,13 +1411,7 @@ // DBG_VALUE intervals with different vregs that were allocated to the same // physical register. for (LocMap::iterator I = locInts.begin(); I.valid(); ++I) { - DbgVariableValue DbgValue = I.value(); - // Undef values don't exist in locations (and thus not in LocNoMap either) - // so skip over them. See getLocationNo(). - if (DbgValue.isUndef()) - continue; - unsigned NewLocNo = LocNoMap[DbgValue.getLocNo()]; - I.setValueUnchecked(DbgValue.changeLocNo(NewLocNo)); + I.setValueUnchecked(I.value().remapLocNos(LocNoMap)); I.setStart(I.start()); } } @@ -1306,21 +1442,24 @@ /// Find an iterator for inserting the next DBG_VALUE instruction /// (or end if no more insert locations found). static MachineBasicBlock::iterator -findNextInsertLocation(MachineBasicBlock *MBB, - MachineBasicBlock::iterator I, - SlotIndex StopIdx, MachineOperand &LocMO, - LiveIntervals &LIS, - const TargetRegisterInfo &TRI) { - if (!LocMO.isReg()) +findNextInsertLocation(MachineBasicBlock *MBB, MachineBasicBlock::iterator I, + SlotIndex StopIdx, ArrayRef LocMOs, + LiveIntervals &LIS, const TargetRegisterInfo &TRI) { + SmallVector Regs; + for (const MachineOperand &LocMO : LocMOs) + if (LocMO.isReg()) + Regs.push_back(LocMO.getReg()); + if (Regs.empty()) return MBB->instr_end(); - Register Reg = LocMO.getReg(); // Find the next instruction in the MBB that define the register Reg. while (I != MBB->end() && !I->isTerminator()) { if (!LIS.isNotInMIMap(*I) && SlotIndex::isEarlierEqualInstr(StopIdx, LIS.getInstructionIndex(*I))) break; - if (I->definesRegister(Reg, &TRI)) + if (any_of(Regs, [&I, &TRI](Register &Reg) { + return I->definesRegister(Reg, &TRI); + })) // The insert location is directly after the instruction/bundle. return std::next(I); ++I; @@ -1330,7 +1469,8 @@ void UserValue::insertDebugValue(MachineBasicBlock *MBB, SlotIndex StartIdx, SlotIndex StopIdx, DbgVariableValue DbgValue, - bool Spilled, unsigned SpillOffset, + ArrayRef LocSpills, + ArrayRef SpillOffsets, LiveIntervals &LIS, const TargetInstrInfo &TII, const TargetRegisterInfo &TRI) { SlotIndex MBBEndIdx = LIS.getMBBEndIdx(&*MBB); @@ -1339,14 +1479,18 @@ MachineBasicBlock::iterator I = findInsertLocation(MBB, StartIdx, LIS); // Undef values don't exist in locations so create new "noreg" register MOs // for them. See getLocationNo(). - MachineOperand MO = - !DbgValue.isUndef() - ? locations[DbgValue.getLocNo()] - : MachineOperand::CreateReg( - /* Reg */ 0, /* isDef */ false, /* isImp */ false, - /* isKill */ false, /* isDead */ false, - /* isUndef */ false, /* isEarlyClobber */ false, - /* SubReg */ 0, /* isDebug */ true); + SmallVector MOs; + if (DbgValue.isUndef()) { + MOs.assign(DbgValue.getLocNos().size(), + MachineOperand::CreateReg( + /* Reg */ 0, /* isDef */ false, /* isImp */ false, + /* isKill */ false, /* isDead */ false, + /* isUndef */ false, /* isEarlyClobber */ false, + /* SubReg */ 0, /* isDebug */ true)); + } else { + for (unsigned LocNo : DbgValue.getLocNos()) + MOs.push_back(locations[LocNo]); + } ++NumInsertedDebugValues; @@ -1359,25 +1503,37 @@ // that the original virtual register was a pointer. Also, add the stack slot // offset for the spilled register to the expression. const DIExpression *Expr = DbgValue.getExpression(); - uint8_t DIExprFlags = DIExpression::ApplyOffset; bool IsIndirect = DbgValue.getWasIndirect(); - if (Spilled) { - if (IsIndirect) - DIExprFlags |= DIExpression::DerefAfter; - Expr = - DIExpression::prepend(Expr, DIExprFlags, SpillOffset); - IsIndirect = true; - } + bool IsList = DbgValue.getWasList(); + for (unsigned I = 0, E = LocSpills.size(); I != E; ++I) { + if (LocSpills[I]) { + if (!IsList) { + uint8_t DIExprFlags = DIExpression::ApplyOffset; + if (IsIndirect) + DIExprFlags |= DIExpression::DerefAfter; + Expr = DIExpression::prepend(Expr, DIExprFlags, SpillOffsets[I]); + IsIndirect = true; + } else { + SmallVector Ops; + DIExpression::appendOffset(Ops, SpillOffsets[I]); + Ops.push_back(dwarf::DW_OP_deref); + Expr = DIExpression::appendOpsToArg(Expr, Ops, I); + } + } - assert((!Spilled || MO.isFI()) && "a spilled location must be a frame index"); + assert((!LocSpills[I] || MOs[I].isFI()) && + "a spilled location must be a frame index"); + } + unsigned DbgValueOpcode = + IsList ? TargetOpcode::DBG_VALUE_LIST : TargetOpcode::DBG_VALUE; do { - BuildMI(*MBB, I, getDebugLoc(), TII.get(TargetOpcode::DBG_VALUE), - IsIndirect, MO, Variable, Expr); + BuildMI(*MBB, I, getDebugLoc(), TII.get(DbgValueOpcode), IsIndirect, MOs, + Variable, Expr); - // Continue and insert DBG_VALUES after every redefinition of register + // Continue and insert DBG_VALUES after every redefinition of a register // associated with the debug value within the range - I = findNextInsertLocation(MBB, I, StopIdx, MO, LIS, TRI); + I = findNextInsertLocation(MBB, I, StopIdx, MOs, LIS, TRI); } while (I != MBB->end()); } @@ -1400,10 +1556,16 @@ SlotIndex Start = I.start(); SlotIndex Stop = I.stop(); DbgVariableValue DbgValue = I.value(); - auto SpillIt = !DbgValue.isUndef() ? SpillOffsets.find(DbgValue.getLocNo()) - : SpillOffsets.end(); - bool Spilled = SpillIt != SpillOffsets.end(); - unsigned SpillOffset = Spilled ? SpillIt->second : 0; + + SmallVector SpilledLocs; + SmallVector LocSpillOffsets; + for (unsigned LocNo : DbgValue.getLocNos()) { + auto SpillIt = + !DbgValue.isUndef() ? SpillOffsets.find(LocNo) : SpillOffsets.end(); + bool Spilled = SpillIt != SpillOffsets.end(); + SpilledLocs.push_back(Spilled); + LocSpillOffsets.push_back(Spilled ? SpillIt->second : 0); + } // If the interval start was trimmed to the lexical scope insert the // DBG_VALUE at the previous index (otherwise it appears after the @@ -1411,14 +1573,14 @@ if (trimmedDefs.count(Start)) Start = Start.getPrevIndex(); - LLVM_DEBUG(dbgs() << "\t[" << Start << ';' << Stop - << "):" << DbgValue.getLocNo()); + LLVM_DEBUG(auto &dbg = dbgs(); dbg << "\t[" << Start << ';' << Stop << "):"; + DbgValue.printLocNos(dbg)); MachineFunction::iterator MBB = LIS.getMBBFromIndex(Start)->getIterator(); SlotIndex MBBEnd = LIS.getMBBEndIdx(&*MBB); LLVM_DEBUG(dbgs() << ' ' << printMBBReference(*MBB) << '-' << MBBEnd); - insertDebugValue(&*MBB, Start, Stop, DbgValue, Spilled, SpillOffset, LIS, - TII, TRI); + insertDebugValue(&*MBB, Start, Stop, DbgValue, SpilledLocs, LocSpillOffsets, + LIS, TII, TRI); // This interval may span multiple basic blocks. // Insert a DBG_VALUE into each one. while (Stop > MBBEnd) { @@ -1428,8 +1590,8 @@ break; MBBEnd = LIS.getMBBEndIdx(&*MBB); LLVM_DEBUG(dbgs() << ' ' << printMBBReference(*MBB) << '-' << MBBEnd); - insertDebugValue(&*MBB, Start, Stop, DbgValue, Spilled, SpillOffset, LIS, - TII, TRI); + insertDebugValue(&*MBB, Start, Stop, DbgValue, SpilledLocs, + LocSpillOffsets, LIS, TII, TRI); } LLVM_DEBUG(dbgs() << '\n'); if (MBB == MFEnd) diff --git a/llvm/test/DebugInfo/MIR/X86/dvl-livedebugvars-movements.mir b/llvm/test/DebugInfo/MIR/X86/dvl-livedebugvars-movements.mir new file mode 100644 --- /dev/null +++ b/llvm/test/DebugInfo/MIR/X86/dvl-livedebugvars-movements.mir @@ -0,0 +1,109 @@ +# RUN: llc -start-after=phi-node-elimination -stop-after=virtregrewriter %s -mtriple=x86_64-unknown-unknown -o - | FileCheck %s +# +# Test that when a livedebugvars interval is split, DBG_VALUE_LISTs are created +# with the correct operands and exprs. Force values to be moved around between +# registers and stack through inline asm blocks that clobber things. +# +# CHECK-LABEL: bb.0.entry: +# CHECK: $rbx = COPY $rsi +# CHECK-NEXT: MOV64mr %stack.0, 1, $noreg, 0, $noreg, $rdi +# CHECK-NEXT: DBG_VALUE_LIST !14, !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_deref, DW_OP_LLVM_arg, 1, DW_OP_plus), %stack.0, $rbx, +# CHECK-NEXT: INLINEASM +# CHECK-NEXT: $rax = MOV64rm %stack.0, +# CHECK-NEXT: DBG_VALUE_LIST !14, !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_arg, 1, DW_OP_plus), $rax, $rbx, +# CHECK-NEXT: CALL64pcrel32 @foo +# CHECK-NEXT: DBG_VALUE_LIST !14, !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_deref, DW_OP_LLVM_arg, 1, DW_OP_plus), %stack.0, $rbx, +# CHECK-NEXT: $rcx = COPY killed renamable $rbx +# CHECK-NEXT: DBG_VALUE_LIST !14, !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_deref, DW_OP_LLVM_arg, 1, DW_OP_plus), %stack.0, $rcx, +# CHECK-NEXT: INLINEASM +# CHECK-NEXT: $rax = MOV64rm %stack.0 +# CHECK-NEXT: DBG_VALUE_LIST !14, !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_arg, 1, DW_OP_plus), $rax, $rcx, + +--- | + ; ModuleID = 'tmp.ll' + source_filename = "tmp.ll" + target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" + + %struct.a = type { i32 } + + ; Function Attrs: nounwind ssp + define i32 @bar(%struct.a* nocapture %b, i32 %shoes) !dbg !4 { + entry: + tail call void @llvm.dbg.value(metadata i32 %shoes, metadata !9, metadata !DIExpression()), !dbg !16 + %tmp1 = getelementptr inbounds %struct.a, %struct.a* %b, i64 0, i32 0, !dbg !17 + br label %bb3 + + bb1: ; preds = %bb2 + tail call void @llvm.dbg.value(metadata i32 %shoes, metadata !9, metadata !DIExpression()), !dbg !16 + %add = add nsw i32 %tmp2, 1, !dbg !18 + br label %exit + + bb2: ; preds = %bb3 + tail call void @llvm.dbg.value(metadata i32 %tmp2, metadata !14, metadata !DIExpression()), !dbg !17 + %call = tail call i32 (...) @foo(i32 %tmp2), !dbg !19 + br label %bb1 + + bb3: ; preds = %entry + %tmp2 = load i32, i32* %tmp1, align 4, !dbg !17 + br label %bb2 + + exit: ; preds = %bb1 + ret i32 %shoes, !dbg !18 + } + + declare i32 @foo(...) + + ; Function Attrs: nounwind readnone speculatable willreturn + declare void @llvm.dbg.value(metadata, metadata, metadata) + + !llvm.dbg.cu = !{!0} + !llvm.module.flags = !{!3} + + !0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "clang version 2.9 (trunk 122997)", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug, enums: !2, retainedTypes: !2) + !1 = !DIFile(filename: "bar.c", directory: "/private/tmp") + !2 = !{} + !3 = !{i32 1, !"Debug Info Version", i32 3} + !4 = distinct !DISubprogram(name: "bar", scope: !1, file: !1, line: 5, type: !5, virtualIndex: 6, flags: DIFlagPrototyped, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !0, retainedNodes: !8) + !5 = !DISubroutineType(types: !6) + !6 = !{!7} + !7 = !DIBasicType(name: "int", size: 32, align: 32, encoding: DW_ATE_signed) + !8 = !{!9, !14} + !9 = !DILocalVariable(name: "b", arg: 1, scope: !4, file: !1, line: 5, type: !10) + !10 = !DIDerivedType(tag: DW_TAG_pointer_type, scope: !0, baseType: !11, size: 64, align: 64) + !11 = !DICompositeType(tag: DW_TAG_structure_type, name: "a", scope: !0, file: !1, line: 1, size: 32, align: 32, elements: !12) + !12 = !{!13} + !13 = !DIDerivedType(tag: DW_TAG_member, name: "c", scope: !1, file: !1, line: 2, baseType: !7, size: 32, align: 32) + !14 = !DILocalVariable(name: "x", scope: !15, file: !1, line: 6, type: !7) + !15 = distinct !DILexicalBlock(scope: !4, file: !1, line: 5, column: 22) + !16 = !DILocation(line: 5, column: 19, scope: !4) + !17 = !DILocation(line: 6, column: 14, scope: !15) + !18 = !DILocation(line: 8, column: 2, scope: !15) + !19 = !DILocation(line: 7, column: 2, scope: !15) + +... +--- +name: bar +tracksRegLiveness: true +body: | + bb.0.entry: + liveins: $rdi, $rsi + + %4:gr64= COPY $rsi + %2:gr64 = COPY $rdi + DBG_VALUE_LIST !14, !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_arg, 1, DW_OP_plus), %2, %4, debug-location !17 + %3:gr64 = COPY killed %2 + %5:gr64 = COPY killed %4 + + ; Force allocation into $rax and $rbx + INLINEASM &"", 1, 12, implicit-def dead $rcx, 12, implicit-def dead $rdx, 12, implicit-def dead $rsi, 12, implicit-def dead $rdi, 12, implicit-def $rbp, 12, implicit-def dead $r8, 12, implicit-def dead $r9, 12, implicit-def dead $r10, 12, implicit-def dead $r11, 12, implicit-def dead $r12, 12, implicit-def dead $r13, 12, implicit-def dead $r14, 12, implicit-def dead $r15, 12, !18, debug-location !17 + + ; Force a use of these two registers. + CALL64pcrel32 @foo, csr_64, implicit $rsp, implicit $ssp, implicit %3, implicit %5 + + ; Now make the register allocator move them to rcx and rdx! + INLINEASM &"", 1, 12, implicit-def dead $rax, 12, implicit-def dead $rbx, 12, implicit-def dead $rsi, 12, implicit-def dead $rdi, 12, implicit-def $rbp, 12, implicit-def dead $r8, 12, implicit-def dead $r9, 12, implicit-def dead $r10, 12, implicit-def dead $r11, 12, implicit-def dead $r12, 12, implicit-def dead $r13, 12, implicit-def dead $r14, 12, implicit-def dead $r15, 12, !18, debug-location !17 + + CALL64pcrel32 @foo, csr_64, implicit $rsp, implicit $ssp, implicit %3, implicit %5 + + RETQ +... diff --git a/llvm/test/DebugInfo/MIR/X86/dvl-livedebugvars-stackptr.mir b/llvm/test/DebugInfo/MIR/X86/dvl-livedebugvars-stackptr.mir new file mode 100644 --- /dev/null +++ b/llvm/test/DebugInfo/MIR/X86/dvl-livedebugvars-stackptr.mir @@ -0,0 +1,113 @@ +# RUN: llc -start-after=phi-node-elimination -stop-after=virtregrewriter %s -mtriple=x86_64-unknown-unknown -o - | FileCheck %s +# +# This is a copy of the adjacent "-movements.mir" file, but where one of the +# operands to DBG_VALUE_LIST is a stack _pointer_ rather than a spilt value. +# The expression should grow no additional derefs for the stack pointer. +# +# CHECK-LABEL: bb.0.entry: +# CHECK: $rbx = COPY $rsi +# CHECK-NEXT: MOV64mr %stack.1, 1, $noreg, 0, $noreg, $rdi +# CHECK-NEXT: DBG_VALUE_LIST !14, !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_deref, DW_OP_LLVM_arg, 1, DW_OP_plus), %stack.1, %stack.0.local1 +# CHECK-NEXT: INLINEASM +# CHECK-NEXT: $rax = MOV64rm %stack.1, +# CHECK-NEXT: DBG_VALUE_LIST !14, !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_arg, 1, DW_OP_plus), $rax, %stack.0.local1, +# CHECK-NEXT: CALL64pcrel32 @foo +# CHECK-NEXT: DBG_VALUE_LIST !14, !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_deref, DW_OP_LLVM_arg, 1, DW_OP_plus), %stack.1, %stack.0.local1, +# CHECK-NEXT: $rcx = COPY killed renamable $rbx +# CHECK-NEXT: INLINEASM +# CHECK-NEXT: $rax = MOV64rm %stack.1 +# CHECK-NEXT: DBG_VALUE_LIST !14, !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_arg, 1, DW_OP_plus), $rax, %stack.0.local1, + +--- | + ; ModuleID = 'tmp.ll' + source_filename = "tmp.ll" + target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" + + %struct.a = type { i32 } + + ; Function Attrs: nounwind ssp + define i32 @bar(%struct.a* nocapture %b, i32 %shoes) !dbg !4 { + entry: + %local1 = alloca i64 + tail call void @llvm.dbg.value(metadata i32 %shoes, metadata !9, metadata !DIExpression()), !dbg !16 + %tmp1 = getelementptr inbounds %struct.a, %struct.a* %b, i64 0, i32 0, !dbg !17 + br label %bb3 + + bb1: ; preds = %bb2 + tail call void @llvm.dbg.value(metadata i32 %shoes, metadata !9, metadata !DIExpression()), !dbg !16 + %add = add nsw i32 %tmp2, 1, !dbg !18 + br label %exit + + bb2: ; preds = %bb3 + tail call void @llvm.dbg.value(metadata i32 %tmp2, metadata !14, metadata !DIExpression()), !dbg !17 + %call = tail call i32 (...) @foo(i32 %tmp2), !dbg !19 + br label %bb1 + + bb3: ; preds = %entry + %tmp2 = load i32, i32* %tmp1, align 4, !dbg !17 + br label %bb2 + + exit: ; preds = %bb1 + ret i32 %shoes, !dbg !18 + } + + declare i32 @foo(...) + + ; Function Attrs: nounwind readnone speculatable willreturn + declare void @llvm.dbg.value(metadata, metadata, metadata) + + !llvm.dbg.cu = !{!0} + !llvm.module.flags = !{!3} + + !0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "clang version 2.9 (trunk 122997)", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug, enums: !2, retainedTypes: !2) + !1 = !DIFile(filename: "bar.c", directory: "/private/tmp") + !2 = !{} + !3 = !{i32 1, !"Debug Info Version", i32 3} + !4 = distinct !DISubprogram(name: "bar", scope: !1, file: !1, line: 5, type: !5, virtualIndex: 6, flags: DIFlagPrototyped, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !0, retainedNodes: !8) + !5 = !DISubroutineType(types: !6) + !6 = !{!7} + !7 = !DIBasicType(name: "int", size: 32, align: 32, encoding: DW_ATE_signed) + !8 = !{!9, !14} + !9 = !DILocalVariable(name: "b", arg: 1, scope: !4, file: !1, line: 5, type: !10) + !10 = !DIDerivedType(tag: DW_TAG_pointer_type, scope: !0, baseType: !11, size: 64, align: 64) + !11 = !DICompositeType(tag: DW_TAG_structure_type, name: "a", scope: !0, file: !1, line: 1, size: 32, align: 32, elements: !12) + !12 = !{!13} + !13 = !DIDerivedType(tag: DW_TAG_member, name: "c", scope: !1, file: !1, line: 2, baseType: !7, size: 32, align: 32) + !14 = !DILocalVariable(name: "x", scope: !15, file: !1, line: 6, type: !7) + !15 = distinct !DILexicalBlock(scope: !4, file: !1, line: 5, column: 22) + !16 = !DILocation(line: 5, column: 19, scope: !4) + !17 = !DILocation(line: 6, column: 14, scope: !15) + !18 = !DILocation(line: 8, column: 2, scope: !15) + !19 = !DILocation(line: 7, column: 2, scope: !15) + +... +--- +name: bar +tracksRegLiveness: true +stack: + - { id: 0, name: local1, type: default, offset: -24, size: 8, alignment: 8, + stack-id: default, callee-saved-register: '', callee-saved-restored: true, + debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } +body: | + bb.0.entry: + liveins: $rdi, $rsi + + %4:gr64= COPY $rsi + %2:gr64 = COPY $rdi + DBG_VALUE_LIST !14, !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_arg, 1, DW_OP_plus), %2, %stack.0, debug-location !17 + %3:gr64 = COPY killed %2 + %5:gr64 = COPY killed %4 + + ; Force allocation into $rax and $rbx + INLINEASM &"", 1, 12, implicit-def dead $rcx, 12, implicit-def dead $rdx, 12, implicit-def dead $rsi, 12, implicit-def dead $rdi, 12, implicit-def $rbp, 12, implicit-def dead $r8, 12, implicit-def dead $r9, 12, implicit-def dead $r10, 12, implicit-def dead $r11, 12, implicit-def dead $r12, 12, implicit-def dead $r13, 12, implicit-def dead $r14, 12, implicit-def dead $r15, 12, !18, debug-location !17 + + ; Force a use of these two registers. + CALL64pcrel32 @foo, csr_64, implicit $rsp, implicit $ssp, implicit %3, implicit %5 + + ; Now make the register allocator move them to rcx and rdx! + INLINEASM &"", 1, 12, implicit-def dead $rax, 12, implicit-def dead $rbx, 12, implicit-def dead $rsi, 12, implicit-def dead $rdi, 12, implicit-def $rbp, 12, implicit-def dead $r8, 12, implicit-def dead $r9, 12, implicit-def dead $r10, 12, implicit-def dead $r11, 12, implicit-def dead $r12, 12, implicit-def dead $r13, 12, implicit-def dead $r14, 12, implicit-def dead $r15, 12, !18, debug-location !17 + + CALL64pcrel32 @foo, csr_64, implicit $rsp, implicit $ssp, implicit %3, implicit %5 + + RETQ +... diff --git a/llvm/test/DebugInfo/MIR/X86/live-debug-vars-unused-arg-debugonly.mir b/llvm/test/DebugInfo/MIR/X86/live-debug-vars-unused-arg-debugonly.mir --- a/llvm/test/DebugInfo/MIR/X86/live-debug-vars-unused-arg-debugonly.mir +++ b/llvm/test/DebugInfo/MIR/X86/live-debug-vars-unused-arg-debugonly.mir @@ -153,11 +153,11 @@ # not cover the whole BB. # # CHECKDBG-LABEL: ********** EMITTING LIVE DEBUG VARIABLES ********** -# CHECKDBG-NEXT: !"argc,5" [0B;0e):0 Loc0=$edi -# CHECKDBG-NEXT: [0B;0e):0 %bb.0-160B -# CHECKDBG-NEXT: !"argv,5" [0B;0e):0 Loc0=$rsi -# CHECKDBG-NEXT: [0B;0e):0 %bb.0-160B -# CHECKDBG-NEXT: !"a0,7" [16r;64r):0 Loc0=%2 -# CHECKDBG-NEXT: [16r;64r):0 %bb.0-160B -# CHECKDBG-NEXT: !"a1,8" [32r;80r):0 Loc0=%3 -# CHECKDBG-NEXT: [32r;80r):0 %bb.0-160B +# CHECKDBG-NEXT: !"argc,5" [0B;0e): 0 Loc0=$edi +# CHECKDBG-NEXT: [0B;0e): 0 %bb.0-160B +# CHECKDBG-NEXT: !"argv,5" [0B;0e): 0 Loc0=$rsi +# CHECKDBG-NEXT: [0B;0e): 0 %bb.0-160B +# CHECKDBG-NEXT: !"a0,7" [16r;64r): 0 Loc0=%2 +# CHECKDBG-NEXT: [16r;64r): 0 %bb.0-160B +# CHECKDBG-NEXT: !"a1,8" [32r;80r): 0 Loc0=%3 +# CHECKDBG-NEXT: [32r;80r): 0 %bb.0-160B