diff --git a/llvm/utils/TableGen/CodeGenSchedule.cpp b/llvm/utils/TableGen/CodeGenSchedule.cpp
--- a/llvm/utils/TableGen/CodeGenSchedule.cpp
+++ b/llvm/utils/TableGen/CodeGenSchedule.cpp
@@ -1083,13 +1083,14 @@
             if (RWD->getValueAsDef("SchedModel") == RWModelDef &&
                 RWModelDef->getValueAsBit("FullInstRWOverlapCheck")) {
               assert(!InstDefs.empty()); // Checked at function start.
-              PrintFatalError
+              PrintError
                   (InstRWDef->getLoc(),
                    "Overlapping InstRW definition for \"" +
                    InstDefs.front()->getName() +
                    "\" also matches previous \"" +
                    RWD->getValue("Instrs")->getValue()->getAsString() +
                    "\".");
+              PrintFatalError(RWD->getLoc(), "Previous match was here.");
             }
           }
           LLVM_DEBUG(dbgs() << "InstRW: Reuse SC " << OldSCIdx << ":"
@@ -1118,13 +1119,14 @@
       for (Record *OldRWDef : SchedClasses[OldSCIdx].InstRWs) {
         if (OldRWDef->getValueAsDef("SchedModel") == RWModelDef) {
           assert(!InstDefs.empty()); // Checked at function start.
-          PrintFatalError
+          PrintError
               (InstRWDef->getLoc(),
                "Overlapping InstRW definition for \"" +
                InstDefs.front()->getName() +
                "\" also matches previous \"" +
                OldRWDef->getValue("Instrs")->getValue()->getAsString() +
                "\".");
+          PrintFatalError(OldRWDef->getLoc(), "Previous match was here.");
         }
         assert(OldRWDef != InstRWDef &&
                "SchedClass has duplicate InstRW def");