diff --git a/llvm/include/llvm/MC/MCAsmInfo.h b/llvm/include/llvm/MC/MCAsmInfo.h --- a/llvm/include/llvm/MC/MCAsmInfo.h +++ b/llvm/include/llvm/MC/MCAsmInfo.h @@ -209,6 +209,9 @@ const char *Data32bitsDirective; const char *Data64bitsDirective; + /// True if data directives support signed values + bool SupportsSignedData = true; + /// If non-null, a directive that is used to emit a word which should be /// relocated as a 64-bit GP-relative offset, e.g. .gpdword on Mips. Defaults /// to nullptr. @@ -440,6 +443,7 @@ const char *getData16bitsDirective() const { return Data16bitsDirective; } const char *getData32bitsDirective() const { return Data32bitsDirective; } const char *getData64bitsDirective() const { return Data64bitsDirective; } + bool supportsSignedData() const { return SupportsSignedData; } const char *getGPRel64Directive() const { return GPRel64Directive; } const char *getGPRel32Directive() const { return GPRel32Directive; } const char *getDTPRel64Directive() const { return DTPRel64Directive; } diff --git a/llvm/lib/MC/MCExpr.cpp b/llvm/lib/MC/MCExpr.cpp --- a/llvm/lib/MC/MCExpr.cpp +++ b/llvm/lib/MC/MCExpr.cpp @@ -65,6 +65,8 @@ OS << format("0x%016" PRIx64, Value); break; } + else if (MAI && !MAI->supportsSignedData()) + OS << static_cast(Value); else OS << Value; return; diff --git a/llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXMCAsmInfo.cpp b/llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXMCAsmInfo.cpp --- a/llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXMCAsmInfo.cpp +++ b/llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXMCAsmInfo.cpp @@ -47,6 +47,7 @@ AscizDirective = nullptr; // not supported SupportsQuotedNames = false; SupportsExtendedDwarfLocDirective = false; + SupportsSignedData = false; // @TODO: Can we just disable this? WeakDirective = "\t// .weak\t"; diff --git a/llvm/test/CodeGen/NVPTX/data-direcitve-negative-values.ll b/llvm/test/CodeGen/NVPTX/data-direcitve-negative-values.ll new file mode 100644 --- /dev/null +++ b/llvm/test/CodeGen/NVPTX/data-direcitve-negative-values.ll @@ -0,0 +1,71 @@ +; PTX only allows unsigned values in .b64/32/8 directives. However, +; MCAsmPrinter only deals with int64 values and if the value happens to be +; negative, we ended up with invalid PTX. Fortunately, data directives are +; almost never produced and when they are, they are normally used with small +; unsigned values representable by int64. One exception is DWARF which emits a +; lot of data and some of the values may be negative. The IR below has been +; produced by the following CUDA code compiled with DWARF debug info enabled. +; +;struct { +; char : 3; +; char a : 6; +;} __attribute__((__packed__)) b; +;__attribute__((global)) void c() { auto d = b; } +; +; RUN: llc -O0 < %s -march=nvptx64 -mcpu=sm_60 | FileCheck %s +; +; Make sure there are no negative values +; CHECK-NOT: .b64 - +; +target datalayout = "e-i64:64-i128:128-v16:16-v32:32-n16:32:64" +target triple = "nvptx64-nvidia-cuda" + +%struct.anon = type { i16 } + +@b = external dso_local addrspace(1) global %struct.anon, align 1 + +; Function Attrs: convergent noinline norecurse nounwind optnone +define dso_local void @_Z1cv() #0 !dbg !9 { +entry: + %d = alloca %struct.anon, align 1 + call void @llvm.dbg.declare(metadata %struct.anon* %d, metadata !12, metadata !DIExpression()), !dbg !17 + %0 = bitcast %struct.anon* %d to i8*, !dbg !18 + call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 1 %0, i8* align 1 addrspacecast (i8 addrspace(1)* bitcast (%struct.anon addrspace(1)* @b to i8 addrspace(1)*) to i8*), i64 2, i1 false), !dbg !18 + ret void, !dbg !19 +} + +; Function Attrs: nounwind readnone speculatable willreturn +declare void @llvm.dbg.declare(metadata, metadata, metadata) #1 + +; Function Attrs: argmemonly nounwind willreturn +declare void @llvm.memcpy.p0i8.p0i8.i64(i8* noalias nocapture writeonly, i8* noalias nocapture readonly, i64, i1 immarg) #2 + +attributes #0 = { convergent noinline norecurse nounwind optnone "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "frame-pointer"="all" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="sm_60" "target-features"="+ptx32,+sm_60" "unsafe-fp-math"="false" "use-soft-float"="false" } +attributes #1 = { nounwind readnone speculatable willreturn } +attributes #2 = { argmemonly nounwind willreturn } + +!llvm.dbg.cu = !{!0} +!nvvm.annotations = !{!3} +!llvm.module.flags = !{!4, !5, !6, !7} +!llvm.ident = !{!8} + +!0 = distinct !DICompileUnit(language: DW_LANG_C_plus_plus_11, file: !1, producer: "clang version 11.0.0 ", isOptimized: false, runtimeVersion: 0, emissionKind: FullDebug, enums: !2, splitDebugInlining: false, nameTableKind: None) +!1 = !DIFile(filename: "b64.cu", directory: "/usr/local/google/home/tra/work/llvm/build/debug") +!2 = !{} +!3 = !{void ()* @_Z1cv, !"kernel", i32 1} +!4 = !{i32 7, !"Dwarf Version", i32 2} +!5 = !{i32 2, !"Debug Info Version", i32 3} +!6 = !{i32 1, !"wchar_size", i32 4} +!7 = !{i32 4, !"nvvm-reflect-ftz", i32 0} +!8 = !{!"clang version 11.0.0 "} +!9 = distinct !DISubprogram(name: "c", linkageName: "_Z1cv", scope: !1, file: !1, line: 5, type: !10, scopeLine: 5, flags: DIFlagPrototyped, spFlags: DISPFlagDefinition, unit: !0, retainedNodes: !2) +!10 = !DISubroutineType(types: !11) +!11 = !{null} +!12 = !DILocalVariable(name: "d", scope: !9, file: !1, line: 5, type: !13) +!13 = distinct !DICompositeType(tag: DW_TAG_structure_type, file: !1, line: 1, size: 16, flags: DIFlagTypePassByValue, elements: !14) +!14 = !{!15} +!15 = !DIDerivedType(tag: DW_TAG_member, name: "a", scope: !13, file: !1, line: 3, baseType: !16, size: 6, offset: 3, flags: DIFlagBitField, extraData: i64 0) +!16 = !DIBasicType(name: "char", size: 8, encoding: DW_ATE_signed_char) +!17 = !DILocation(line: 5, column: 41, scope: !9) +!18 = !DILocation(line: 5, column: 45, scope: !9) +!19 = !DILocation(line: 5, column: 48, scope: !9)