Index: llvm/lib/Target/ARM/ARMInstrVFP.td
===================================================================
--- llvm/lib/Target/ARM/ARMInstrVFP.td
+++ llvm/lib/Target/ARM/ARMInstrVFP.td
@@ -1600,6 +1600,7 @@
   // Some single precision VFP instructions may be executed on both NEON and
   // VFP pipelines on A8.
   let D = VFPNeonA8Domain;
+  let hasSideEffects = 0;
 }
 
 def : VFPNoNEONPat<(i32 (fp_to_sint SPR:$a)),
@@ -1647,6 +1648,7 @@
   // Some single precision VFP instructions may be executed on both NEON and
   // VFP pipelines on A8.
   let D = VFPNeonA8Domain;
+  let hasSideEffects = 0;
 }
 
 def : VFPNoNEONPat<(i32 (fp_to_uint SPR:$a)),
Index: llvm/unittests/Target/ARM/MachineInstrTest.cpp
===================================================================
--- llvm/unittests/Target/ARM/MachineInstrTest.cpp
+++ llvm/unittests/Target/ARM/MachineInstrTest.cpp
@@ -1103,8 +1103,8 @@
 
   for (unsigned Op = 0; Op < ARM::INSTRUCTION_LIST_END; ++Op) {
     const MCInstrDesc &Desc = TII->get(Op);
-    if ((Desc.TSFlags & ARMII::DomainMask) != ARMII::DomainMVE &&
-        (Desc.TSFlags & ARMII::DomainMask) != ARMII::DomainVFP)
+    if (((Desc.TSFlags & ARMII::DomainMask) &
+         (ARMII::DomainMVE | ARMII::DomainVFP | ARMII::DomainNEONA8)) == 0)
       continue;
     if (UnpredictableOpcodes.count(Op))
       continue;