Index: lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.h
===================================================================
--- lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.h
+++ lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.h
@@ -44,6 +44,8 @@
 
   void InvalidateAllRegisters() override;
 
+  const RegisterSet *GetExpeditedRegisterSet() const override;
+
   // Hardware breakpoints/watchpoint management functions
 
   uint32_t NumSupportedHardwareBreakpoints() override;
@@ -112,6 +114,9 @@
   struct user_sve_header m_sve_header;
   std::vector<uint8_t> m_sve_ptrace_payload;
 
+  RegisterSet m_expedited_reg_set;
+  std::vector<uint32_t> m_expedited_reg_nums;
+
   // Debug register info for hardware breakpoints and watchpoints management.
   struct DREG {
     lldb::addr_t address;  // Breakpoint/watchpoint address value.
Index: lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
===================================================================
--- lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
+++ lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
@@ -1085,6 +1085,20 @@
       GetRegisterInfo().ConfigureVectorRegisterInfos(
           RegisterInfoPOSIX_arm64::eVectorQuadwordAArch64);
     } else {
+      // Setup expedited register set if not done already.
+      if (m_sve_state == SVEState::Unknown) {
+        const uint32_t *reg_list_set0 =
+            GetRegisterInfo().GetRegisterSet(0)->registers;
+        const size_t reg_count_set0 =
+            GetRegisterInfo().GetRegisterSet(0)->num_registers;
+
+        m_expedited_reg_nums = std::vector<uint32_t>(
+            reg_list_set0, reg_list_set0 + reg_count_set0);
+        m_expedited_reg_nums.push_back(GetRegisterInfo().GetRegNumSVEVG());
+        m_expedited_reg_set = {"Expedited Registers", "expedited",
+                               m_expedited_reg_nums.size(),
+                               m_expedited_reg_nums.data()};
+      }
       if ((m_sve_header.flags & SVE_PT_REGS_MASK) == SVE_PT_REGS_FPSIMD)
         m_sve_state = SVEState::FPSIMD;
       else if ((m_sve_header.flags & SVE_PT_REGS_MASK) == SVE_PT_REGS_SVE)
@@ -1123,8 +1137,14 @@
 void *NativeRegisterContextLinux_arm64::GetSVEBuffer() {
   if (m_sve_state == SVEState::FPSIMD)
     return m_sve_ptrace_payload.data() + SVE_PT_FPSIMD_OFFSET;
-
   return m_sve_ptrace_payload.data();
 }
 
+const RegisterSet *
+NativeRegisterContextLinux_arm64::GetExpeditedRegisterSet() const {
+  if (m_sve_state == SVEState::FPSIMD || m_sve_state == SVEState::Full)
+    &m_expedited_reg_set;
+  return GetRegisterInfo().GetRegisterSet(0);
+}
+
 #endif // defined (__arm64__) || defined (__aarch64__)
Index: lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.h
===================================================================
--- lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.h
+++ lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.h
@@ -101,6 +101,7 @@
   uint32_t GetRegNumSVEFFR() const;
   uint32_t GetRegNumFPCR() const;
   uint32_t GetRegNumFPSR() const;
+  uint32_t GetRegNumSVEVG() const;
 
 private:
   typedef std::map<uint32_t, std::vector<lldb_private::RegisterInfo>>
Index: lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.cpp
===================================================================
--- lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.cpp
+++ lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.cpp
@@ -341,3 +341,5 @@
 uint32_t RegisterInfoPOSIX_arm64::GetRegNumFPCR() const { return fpu_fpcr; }
 
 uint32_t RegisterInfoPOSIX_arm64::GetRegNumFPSR() const { return fpu_fpsr; }
+
+uint32_t RegisterInfoPOSIX_arm64::GetRegNumSVEVG() const { return sve_vg; }