Index: llvm/trunk/include/llvm/IR/InlineAsm.h =================================================================== --- llvm/trunk/include/llvm/IR/InlineAsm.h +++ llvm/trunk/include/llvm/IR/InlineAsm.h @@ -248,6 +248,7 @@ Constraint_R, Constraint_S, Constraint_T, + Constraint_X, Constraint_Z, Constraint_ZC, Constraint_Zy, Index: llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp =================================================================== --- llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp +++ llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp @@ -2877,10 +2877,16 @@ std::vector &OutOps) { SDValue Op0, Op1, Op2, Op3, Op4; switch (ConstraintID) { + default: + llvm_unreachable("Unexpected asm memory constraint"); + case InlineAsm::Constraint_i: + // FIXME: It seems strange that 'i' is needed here since it's supposed to + // be an immediate and not a memory constraint. + // Fallthrough. case InlineAsm::Constraint_o: // offsetable ?? case InlineAsm::Constraint_v: // not offsetable ?? - default: return true; case InlineAsm::Constraint_m: // memory + case InlineAsm::Constraint_X: if (!SelectAddr(nullptr, Op, Op0, Op1, Op2, Op3, Op4)) return true; break; Index: llvm/trunk/lib/Target/X86/X86ISelLowering.h =================================================================== --- llvm/trunk/lib/Target/X86/X86ISelLowering.h +++ llvm/trunk/lib/Target/X86/X86ISelLowering.h @@ -704,8 +704,15 @@ unsigned getInlineAsmMemConstraint( const std::string &ConstraintCode) const override { - // FIXME: Map different constraints differently. - return InlineAsm::Constraint_m; + if (ConstraintCode == "i") + return InlineAsm::Constraint_i; + else if (ConstraintCode == "o") + return InlineAsm::Constraint_o; + else if (ConstraintCode == "v") + return InlineAsm::Constraint_v; + else if (ConstraintCode == "X") + return InlineAsm::Constraint_X; + return TargetLowering::getInlineAsmMemConstraint(ConstraintCode); } /// Given a physical register constraint