Index: llvm/docs/LangRef.rst =================================================================== --- llvm/docs/LangRef.rst +++ llvm/docs/LangRef.rst @@ -4148,9 +4148,11 @@ - ``[0-9]a``: The 32-bit AGPR register, number 0-9. - ``I``: An integer inline constant in the range from -16 to 64. - ``J``: A 16-bit signed integer constant. +- ``L``: A 15-bit unsigned integer constant. - ``A``: An integer or a floating-point inline constant. - ``B``: A 32-bit signed integer constant. - ``C``: A 32-bit unsigned integer constant or an integer inline constant in the range from -16 to 64. +- ``Kf``: An integer constant -1. - ``DA``: A 64-bit constant that can be split into two "A" constants. - ``DB``: A 64-bit constant that can be split into two "B" constants. Index: llvm/lib/Target/AMDGPU/SIISelLowering.cpp =================================================================== --- llvm/lib/Target/AMDGPU/SIISelLowering.cpp +++ llvm/lib/Target/AMDGPU/SIISelLowering.cpp @@ -11159,12 +11159,14 @@ default: break; case 'I': case 'J': + case 'L': case 'A': case 'B': case 'C': return true; } - } else if (Constraint == "DA" || + } else if (Constraint == "Kf" || + Constraint == "DA" || Constraint == "DB") { return true; } @@ -11254,6 +11256,8 @@ return AMDGPU::isInlinableIntLiteral(Val); case 'J': return isInt<16>(Val); + case 'L': + return isUInt<15>(Val); case 'A': return checkAsmConstraintValA(Op, Val); case 'B': @@ -11265,6 +11269,9 @@ break; } } else if (Constraint.size() == 2) { + if (Constraint == "Kf") { + return static_cast(Val) == -1; + } if (Constraint == "DA") { int64_t HiBits = static_cast(Val >> 32); int64_t LoBits = static_cast(Val); Index: llvm/test/CodeGen/AMDGPU/inline-constraints.ll =================================================================== --- llvm/test/CodeGen/AMDGPU/inline-constraints.ll +++ llvm/test/CodeGen/AMDGPU/inline-constraints.ll @@ -672,6 +672,144 @@ ret i32 %v0 } +;============================================================================== +; 'L' constraint, 16-bit operand +;============================================================================== + +; NOSI: error: invalid operand for inline asm constraint 'L' +; VI-LABEL: {{^}}inline_L_constraint_H0: +; VI: v_mov_b32 {{v[0-9]+}}, 0x7fff +define i32 @inline_L_constraint_H0() { + %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,L"(i16 32767) + ret i32 %v0 +} + +; NOSI: error: invalid operand for inline asm constraint 'L' +; VI-LABEL: {{^}}inline_L_constraint_H1: +; VI: v_mov_b32 {{v[0-9]+}}, 0 +define i32 @inline_L_constraint_H1() { + %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,L"(i16 0) + ret i32 %v0 +} + +; NOSI: error: invalid operand for inline asm constraint 'L' +; VI-LABEL: {{^}}inline_L_constraint_H3: +; VI: v_mov_b32 {{v[0-9]+}}, 16 +define i32 @inline_L_constraint_H3() { + %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,L"(half bitcast (i16 16 to half)) + ret i32 %v0 +} + +; NOGCN: error: invalid operand for inline asm constraint 'L' +define i32 @inline_L_constraint_H8() { + %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,L"(i16 32768) + ret i32 %v0 +} + +; NOGCN: error: invalid operand for inline asm constraint 'L' +define i32 @inline_L_constraint_H9() { + %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,L"(i16 -1) + ret i32 %v0 +} + +;============================================================================== +; 'L' constraint, 32-bit operand +;============================================================================== + +; GCN-LABEL: {{^}}inline_L_constraint_F0: +; GCN: v_mov_b32 {{v[0-9]+}}, 0 +define i32 @inline_L_constraint_F0() { + %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,L"(i32 0) + ret i32 %v0 +} + +; GCN-LABEL: {{^}}inline_L_constraint_F1: +; GCN: v_mov_b32 {{v[0-9]+}}, 0x7fff +define i32 @inline_L_constraint_F1() { + %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,L"(i32 32767) + ret i32 %v0 +} + +; NOGCN: error: invalid operand for inline asm constraint 'L' +define i32 @inline_L_constraint_F2() { + %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,L"(i32 -1) + ret i32 %v0 +} + +; NOGCN: error: invalid operand for inline asm constraint 'L' +define i32 @inline_L_constraint_F3() { + %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,L"(i32 32768) + ret i32 %v0 +} + +; NOGCN: error: invalid operand for inline asm constraint 'L' +define i32 @inline_L_constraint_F4() { + %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,L"(float -4.0) + ret i32 %v0 +} + +;============================================================================== +; 'L' constraint, 64-bit operand +;============================================================================== + +; GCN-LABEL: {{^}}inline_L_constraint_D0: +; GCN: v_mov_b32 {{v[0-9]+}}, 0x7fff +define i32 @inline_L_constraint_D0() { + %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,L"(i64 32767) + ret i32 %v0 +} + +; GCN-LABEL: {{^}}inline_L_constraint_D1: +; GCN: v_mov_b32 {{v[0-9]+}}, 0 +define i32 @inline_L_constraint_D1() { + %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,L"(i64 0) + ret i32 %v0 +} + +; NOGCN: error: invalid operand for inline asm constraint 'L' +define i32 @inline_L_constraint_D8() { + %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,L"(i64 32768) + ret i32 %v0 +} + +; NOGCN: error: invalid operand for inline asm constraint 'L' +define i32 @inline_L_constraint_D9() { + %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,L"(i64 -1) + ret i32 %v0 +} + +;============================================================================== +; 'L' constraint, v2x16 operand +;============================================================================== + +; NOSI: error: invalid operand for inline asm constraint 'L' +; VI-LABEL: {{^}}inline_L_constraint_V0: +; VI: v_mov_b32 {{v[0-9]+}}, 0 +define i32 @inline_L_constraint_V0() { + %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,L"(<2 x i16> ) + ret i32 %v0 +} + +; NOSI: error: invalid operand for inline asm constraint 'L' +; VI-LABEL: {{^}}inline_L_constraint_V1: +; VI: v_mov_b32 {{v[0-9]+}}, 0x7fff +define i32 @inline_L_constraint_V1() { + %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,L"(<2 x i16> ) + ret i32 %v0 +} + +; NOGCN: error: invalid operand for inline asm constraint 'L' +define i32 @inline_L_constraint_V2() { + %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,L"(<2 x i16> ) + ret i32 %v0 +} + +; NOGCN: error: invalid operand for inline asm constraint 'L' +define i32 @inline_L_constraint_V3() { + %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,L"(<2 x i16> ) + ret i32 %v0 +} + ;============================================================================== ; 'B' constraint, 16-bit operand ;============================================================================== @@ -951,6 +1089,153 @@ ret i32 %v0 } +;============================================================================== +; 'Kf' constraint, 16-bit operand +;============================================================================== + +; NOSI: error: invalid operand for inline asm constraint 'Kf' +; VI-LABEL: {{^}}inline_Kf_constraint_H0: +; VI: v_mov_b32 {{v[0-9]+}}, -1 +define i32 @inline_Kf_constraint_H0() { + %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^Kf"(i16 -1) + ret i32 %v0 +} + +; NOSI: error: invalid operand for inline asm constraint 'Kf' +; VI-LABEL: {{^}}inline_Kf_constraint_H1: +; VI: v_mov_b32 {{v[0-9]+}}, -1 +define i32 @inline_Kf_constraint_H1() { + %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^Kf"(i16 65535) + ret i32 %v0 +} + +; NOGCN: error: invalid operand for inline asm constraint 'Kf' +define i32 @inline_Kf_constraint_H2() { + %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^Kf"(i16 -2) + ret i32 %v0 +} + +; NOGCN: error: invalid operand for inline asm constraint 'Kf' +define i32 @inline_Kf_constraint_H3() { + %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^Kf"(i16 0) + ret i32 %v0 +} + +; NOGCN: error: invalid operand for inline asm constraint 'Kf' +define i32 @inline_Kf_constraint_H4() { + %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^Kf"(half -1.0) + ret i32 %v0 +} + +;============================================================================== +; 'Kf' constraint, 32-bit operand +;============================================================================== + +; GCN-LABEL: {{^}}inline_Kf_constraint_F0: +; GCN: v_mov_b32 {{v[0-9]+}}, -1 +define i32 @inline_Kf_constraint_F0() { + %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^Kf"(i32 4294967295) + ret i32 %v0 +} + +; GCN-LABEL: {{^}}inline_Kf_constraint_F1: +; GCN: v_mov_b32 {{v[0-9]+}}, -1 +define i32 @inline_Kf_constraint_F1() { + %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^Kf"(i32 -1) + ret i32 %v0 +} + +; NOGCN: error: invalid operand for inline asm constraint 'Kf' +define i32 @inline_Kf_constraint_F2() { + %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^Kf"(i32 2147483648) + ret i32 %v0 +} + +; NOGCN: error: invalid operand for inline asm constraint 'Kf' +define i32 @inline_Kf_constraint_F3() { + %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^Kf"(i32 0) + ret i32 %v0 +} + +; NOGCN: error: invalid operand for inline asm constraint 'Kf' +define i32 @inline_Kf_constraint_F4() { + %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^Kf"(i32 -2) + ret i32 %v0 +} + +; NOGCN: error: invalid operand for inline asm constraint 'Kf' +define i32 @inline_Kf_constraint_F5() { + %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^Kf"(float -1.0) + ret i32 %v0 +} + +;============================================================================== +; 'Kf' constraint, 64-bit operand +;============================================================================== + +; GCN-LABEL: {{^}}inline_Kf_constraint_D0: +; GCN: v_mov_b32 {{v[0-9]+}}, -1 +define i32 @inline_Kf_constraint_D0() { + %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^Kf"(i64 -1) + ret i32 %v0 +} + +; NOGCN: error: invalid operand for inline asm constraint 'Kf' +define i32 @inline_Kf_constraint_D6() { + %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^Kf"(i64 4294967295) + ret i32 %v0 +} + +; NOGCN: error: invalid operand for inline asm constraint 'Kf' +define i32 @inline_Kf_constraint_D7() { + %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^Kf"(i64 2147483648) + ret i32 %v0 +} + +; NOGCN: error: invalid operand for inline asm constraint 'Kf' +define i32 @inline_Kf_constraint_D8() { + %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^Kf"(i64 -2) + ret i32 %v0 +} + +; NOGCN: error: invalid operand for inline asm constraint 'Kf' +define i32 @inline_Kf_constraint_D9() { + %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^Kf"(i64 0) + ret i32 %v0 +} + +;============================================================================== +; 'Kf' constraint, v2x16 operand +;============================================================================== + +; NOSI: error: invalid operand for inline asm constraint 'Kf' +; VI-LABEL: {{^}}inline_Kf_constraint_V0: +; VI: v_mov_b32 {{v[0-9]+}}, -1 +define i32 @inline_Kf_constraint_V0() { + %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^Kf"(<2 x i16> ) + ret i32 %v0 +} + +; NOSI: error: invalid operand for inline asm constraint 'Kf' +; VI-LABEL: {{^}}inline_Kf_constraint_V1: +; VI: v_mov_b32 {{v[0-9]+}}, -1 +define i32 @inline_Kf_constraint_V1() { + %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^Kf"(<2 x i16> ) + ret i32 %v0 +} + +; NOGCN: error: invalid operand for inline asm constraint 'Kf' +define i32 @inline_Kf_constraint_V8() { + %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^Kf"(<2 x i16> ) + ret i32 %v0 +} + +; NOGCN: error: invalid operand for inline asm constraint 'Kf' +define i32 @inline_Kf_constraint_V9() { + %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^Kf"(<2 x i16> ) + ret i32 %v0 +} + ;============================================================================== ; 'DA' constraint, 16-bit operand ;==============================================================================