diff --git a/llvm/include/llvm/CodeGen/TargetInstrInfo.h b/llvm/include/llvm/CodeGen/TargetInstrInfo.h
--- a/llvm/include/llvm/CodeGen/TargetInstrInfo.h
+++ b/llvm/include/llvm/CodeGen/TargetInstrInfo.h
@@ -1531,6 +1531,9 @@
                                 const MachineInstr &DefMI,
                                 unsigned DefIdx) const;
 
+  /// Specify whether a target should hoist cheap instructions.
+  virtual bool shouldHoistCheapInstructions() const { return false; }
+
   /// Perform target-specific instruction verification.
   virtual bool verifyInstruction(const MachineInstr &MI,
                                  StringRef &ErrInfo) const {
diff --git a/llvm/lib/CodeGen/MachineLICM.cpp b/llvm/lib/CodeGen/MachineLICM.cpp
--- a/llvm/lib/CodeGen/MachineLICM.cpp
+++ b/llvm/lib/CodeGen/MachineLICM.cpp
@@ -1205,9 +1205,10 @@
     unsigned Class = RPIdAndCost.first;
     int Limit = RegLimit[Class];
 
-    // Don't hoist cheap instructions if they would increase register pressure,
-    // even if we're under the limit.
-    if (CheapInstr && !HoistCheapInsts)
+    // If target prefers not to hoist cheap instructions, don't hoist them, even
+    // if we're under the limit.
+    if (CheapInstr &&
+        (!HoistCheapInsts && !TII->shouldHoistCheapInstructions()))
       return true;
 
     for (const auto &RP : BackTrace)
diff --git a/llvm/lib/Target/PowerPC/PPCInstrInfo.h b/llvm/lib/Target/PowerPC/PPCInstrInfo.h
--- a/llvm/lib/Target/PowerPC/PPCInstrInfo.h
+++ b/llvm/lib/Target/PowerPC/PPCInstrInfo.h
@@ -314,6 +314,10 @@
     return false;
   }
 
+  /// Hoist cheap instructions when not limited by register pressure in Machine
+  /// LICM.
+  bool shouldHoistCheapInstructions() const override { return true; }
+
   bool useMachineCombiner() const override {
     return true;
   }