diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
--- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -7200,6 +7200,45 @@
   llvm_unreachable("Only general purpose registers expected.");
 }
 
+//   AIX ABI Stack Frame Layout:
+//            +--------------------------------------------+
+//   SP +---> | Back chain                                 |
+//      |     +--------------------------------------------+
+//      |     | Saved Conditional Register                 |
+//      |     +--------------------------------------------+
+//      |     | Saved Linkage Register                     |
+//      |     +--------------------------------------------+
+//      |     | Reserved for compilers                     |
+//      |     +--------------------------------------------+
+//      |     | Reserved for binders                       |
+//      |     +--------------------------------------------+
+//      |     | Saved TOC pointer                          |
+//      |     +--------------------------------------------+
+//      |     | Parameter save area                        |
+//      |     +--------------------------------------------+
+//      |     | Alloca space                               |
+//      |     +--------------------------------------------+
+//      |     | Local variable space                       |
+//      |     +--------------------------------------------+
+//      |     | Float/int conversion temporary             |
+//      |     +--------------------------------------------+
+//      |     | Save area for AltiVec registers            |
+//      |     +--------------------------------------------+
+//      |     | AltiVec alignment padding                  |
+//      |     +--------------------------------------------+
+//      |     | Save area for VRSAVE register              |
+//      |     +--------------------------------------------+
+//      |     | Save area for General Purpose registers    |
+//      |     +--------------------------------------------+
+//      |     | Save area for Floating Point registers     |
+//      |     +--------------------------------------------+
+//      +---> | Back chain                                 |
+//            +--------------------------------------------+
+//
+//  Specifications:
+//  AIX 7.2 Assembler Language Reference
+//  Subroutine linkage convention
+
 SDValue PPCTargetLowering::LowerFormalArguments_AIX(
     SDValue Chain, CallingConv::ID CallConv, bool isVarArg,
     const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl,
@@ -7425,6 +7464,8 @@
     const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl,
     SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals,
     const CallBase *CB) const {
+  // See PPCTargetLowering::LowerFormalArguments_AIX() for a description of the
+  // AIX ABI stack frame layout.
 
   assert((CFlags.CallConv == CallingConv::C ||
           CFlags.CallConv == CallingConv::Cold ||