diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp --- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp @@ -4292,7 +4292,11 @@ // If the function takes variable number of arguments, make a frame index for // the start of the first vararg value... for expansion of llvm.va_start. - if (isVarArg) { + // On ELFv2ABI spec, it writes: + // C programs that are intended to be *portable* across different compilers + // and architectures must use the header file to deal with variable + // argument lists. + if (isVarArg && MFI.hasVAStart()) { int Depth = ArgOffset; FuncInfo->setVarArgsFrameIndex( diff --git a/llvm/test/CodeGen/PowerPC/legalize-vaarg.ll b/llvm/test/CodeGen/PowerPC/legalize-vaarg.ll --- a/llvm/test/CodeGen/PowerPC/legalize-vaarg.ll +++ b/llvm/test/CodeGen/PowerPC/legalize-vaarg.ll @@ -6,13 +6,6 @@ ; BE-LABEL: test_large_vec_vaarg: ; BE: # %bb.0: ; BE-NEXT: ld 3, -8(1) -; BE-NEXT: std 4, 56(1) -; BE-NEXT: std 5, 64(1) -; BE-NEXT: std 6, 72(1) -; BE-NEXT: std 7, 80(1) -; BE-NEXT: std 8, 88(1) -; BE-NEXT: std 9, 96(1) -; BE-NEXT: std 10, 104(1) ; BE-NEXT: addi 3, 3, 15 ; BE-NEXT: rldicr 3, 3, 0, 59 ; BE-NEXT: addi 4, 3, 16 @@ -28,15 +21,8 @@ ; LE-LABEL: test_large_vec_vaarg: ; LE: # %bb.0: ; LE-NEXT: ld 3, -8(1) -; LE-NEXT: std 4, 40(1) -; LE-NEXT: std 5, 48(1) -; LE-NEXT: std 6, 56(1) -; LE-NEXT: std 7, 64(1) ; LE-NEXT: addi 3, 3, 15 ; LE-NEXT: rldicr 3, 3, 0, 59 -; LE-NEXT: std 8, 72(1) -; LE-NEXT: std 9, 80(1) -; LE-NEXT: std 10, 88(1) ; LE-NEXT: addi 4, 3, 31 ; LE-NEXT: addi 5, 3, 16 ; LE-NEXT: rldicr 4, 4, 0, 59 diff --git a/llvm/test/CodeGen/PowerPC/ppc64-varargs.ll b/llvm/test/CodeGen/PowerPC/ppc64-varargs.ll --- a/llvm/test/CodeGen/PowerPC/ppc64-varargs.ll +++ b/llvm/test/CodeGen/PowerPC/ppc64-varargs.ll @@ -7,29 +7,12 @@ define i32 @f(...) nounwind { ; BE-LABEL: f: ; BE: # %bb.0: # %entry -; BE-NEXT: mr r11, r3 ; BE-NEXT: li r3, 0 -; BE-NEXT: std r11, 48(r1) -; BE-NEXT: std r4, 56(r1) -; BE-NEXT: std r5, 64(r1) -; BE-NEXT: std r6, 72(r1) -; BE-NEXT: std r7, 80(r1) -; BE-NEXT: std r8, 88(r1) -; BE-NEXT: std r9, 96(r1) -; BE-NEXT: std r10, 104(r1) ; BE-NEXT: blr ; ; LE-LABEL: f: ; LE: # %bb.0: # %entry -; LE-NEXT: std r3, 32(r1) ; LE-NEXT: li r3, 0 -; LE-NEXT: std r4, 40(r1) -; LE-NEXT: std r5, 48(r1) -; LE-NEXT: std r6, 56(r1) -; LE-NEXT: std r7, 64(r1) -; LE-NEXT: std r8, 72(r1) -; LE-NEXT: std r9, 80(r1) -; LE-NEXT: std r10, 88(r1) ; LE-NEXT: blr entry: ret i32 0