diff --git a/clang/test/ARCMT/objcmt-instancetype.m b/clang/test/ARCMT/objcmt-instancetype.m --- a/clang/test/ARCMT/objcmt-instancetype.m +++ b/clang/test/ARCMT/objcmt-instancetype.m @@ -1,7 +1,7 @@ // RUN: rm -rf %t -// RUN: %clang_cc1 -objcmt-migrate-instancetype -mt-migrate-directory %t %s -x objective-c -fobjc-runtime-has-weak -fobjc-arc -triple x86_64-apple-darwin11 +// RUN: %clang_cc1 -disable-frozen-args -objcmt-migrate-instancetype -mt-migrate-directory %t %s -x objective-c -fobjc-runtime-has-weak -fobjc-arc -triple x86_64-apple-darwin11 // RUN: c-arcmt-test -mt-migrate-directory %t | arcmt-test -verify-transformed-files %s.result -// RUN: %clang_cc1 -triple x86_64-apple-darwin11 -fsyntax-only -x objective-c -fobjc-runtime-has-weak -fobjc-arc %s.result +// RUN: %clang_cc1 -disable-frozen-args -triple x86_64-apple-darwin11 -fsyntax-only -x objective-c -fobjc-runtime-has-weak -fobjc-arc %s.result typedef signed char BOOL; #define nil ((void*) 0) diff --git a/clang/test/ARCMT/objcmt-instancetype.m.result b/clang/test/ARCMT/objcmt-instancetype.m.result --- a/clang/test/ARCMT/objcmt-instancetype.m.result +++ b/clang/test/ARCMT/objcmt-instancetype.m.result @@ -1,7 +1,7 @@ // RUN: rm -rf %t -// RUN: %clang_cc1 -objcmt-migrate-instancetype -mt-migrate-directory %t %s -x objective-c -fobjc-runtime-has-weak -fobjc-arc -triple x86_64-apple-darwin11 +// RUN: %clang_cc1 -disable-frozen-args -objcmt-migrate-instancetype -mt-migrate-directory %t %s -x objective-c -fobjc-runtime-has-weak -fobjc-arc -triple x86_64-apple-darwin11 // RUN: c-arcmt-test -mt-migrate-directory %t | arcmt-test -verify-transformed-files %s.result -// RUN: %clang_cc1 -triple x86_64-apple-darwin11 -fsyntax-only -x objective-c -fobjc-runtime-has-weak -fobjc-arc %s.result +// RUN: %clang_cc1 -disable-frozen-args -triple x86_64-apple-darwin11 -fsyntax-only -x objective-c -fobjc-runtime-has-weak -fobjc-arc %s.result typedef signed char BOOL; #define nil ((void*) 0) diff --git a/clang/test/ARCMT/objcmt-numeric-literals.m b/clang/test/ARCMT/objcmt-numeric-literals.m --- a/clang/test/ARCMT/objcmt-numeric-literals.m +++ b/clang/test/ARCMT/objcmt-numeric-literals.m @@ -1,7 +1,7 @@ // RUN: rm -rf %t -// RUN: %clang_cc1 -objcmt-migrate-literals -objcmt-migrate-subscripting -mt-migrate-directory %t %s -x objective-c++ +// RUN: %clang_cc1 -disable-frozen-args -objcmt-migrate-literals -objcmt-migrate-subscripting -mt-migrate-directory %t %s -x objective-c++ // RUN: c-arcmt-test -mt-migrate-directory %t | arcmt-test -verify-transformed-files %s.result -// RUN: %clang_cc1 -triple x86_64-apple-darwin10 -fsyntax-only -x objective-c++ %s.result +// RUN: %clang_cc1 -disable-frozen-args -triple x86_64-apple-darwin10 -fsyntax-only -x objective-c++ %s.result #define YES __objc_yes #define NO __objc_no diff --git a/clang/test/ARCMT/objcmt-numeric-literals.m.result b/clang/test/ARCMT/objcmt-numeric-literals.m.result --- a/clang/test/ARCMT/objcmt-numeric-literals.m.result +++ b/clang/test/ARCMT/objcmt-numeric-literals.m.result @@ -1,7 +1,7 @@ // RUN: rm -rf %t -// RUN: %clang_cc1 -objcmt-migrate-literals -objcmt-migrate-subscripting -mt-migrate-directory %t %s -x objective-c++ +// RUN: %clang_cc1 -disable-frozen-args -objcmt-migrate-literals -objcmt-migrate-subscripting -mt-migrate-directory %t %s -x objective-c++ // RUN: c-arcmt-test -mt-migrate-directory %t | arcmt-test -verify-transformed-files %s.result -// RUN: %clang_cc1 -triple x86_64-apple-darwin10 -fsyntax-only -x objective-c++ %s.result +// RUN: %clang_cc1 -disable-frozen-args -triple x86_64-apple-darwin10 -fsyntax-only -x objective-c++ %s.result #define YES __objc_yes #define NO __objc_no diff --git a/clang/test/AST/ast-dump-openmp-begin-declare-variant_6.c b/clang/test/AST/ast-dump-openmp-begin-declare-variant_6.c --- a/clang/test/AST/ast-dump-openmp-begin-declare-variant_6.c +++ b/clang/test/AST/ast-dump-openmp-begin-declare-variant_6.c @@ -26,7 +26,7 @@ // Make sure: // - we see the specialization in the AST -// - we do use the original pointers for the calls as the variants are not applicable (this is not the ibm compiler). +// - we do use the original pointers for the calls as the variants are not applicable (this compiler ibm is not the). // CHECK: |-FunctionDecl [[ADDR_0:0x[a-z0-9]*]] <{{.*}}, line:7:1> line:5:5 used also_before 'int ({{.*}})' // CHECK-NEXT: | |-CompoundStmt [[ADDR_1:0x[a-z0-9]*]] diff --git a/clang/test/ASTMerge/unnamed_fields/test.cpp b/clang/test/ASTMerge/unnamed_fields/test.cpp --- a/clang/test/ASTMerge/unnamed_fields/test.cpp +++ b/clang/test/ASTMerge/unnamed_fields/test.cpp @@ -1,3 +1,3 @@ // RUN: %clang_cc1 -emit-pch -o %t.1.ast %S/Inputs/il.cpp // RUN: %clang_cc1 -ast-merge %t.1.ast -fsyntax-only %s 2>&1 | FileCheck --allow-empty %s -// CHECK-NOT: warning: field '' declared with incompatible types in different translation units ('bool' vs. 'int') +// CHECK-NOT: warning: field '' declared with incompatible types in different translation units ('bool' vs. 'int') diff --git a/clang/test/Analysis/casts.c b/clang/test/Analysis/casts.c --- a/clang/test/Analysis/casts.c +++ b/clang/test/Analysis/casts.c @@ -137,18 +137,18 @@ clang_analyzer_eval(y1 == y2); // expected-warning{{TRUE}} - // FIXME: should be FALSE (i.e. equal pointers). + // FIXME: should be FALSE (i.e. equal pointers). clang_analyzer_eval(y1 - y2); // expected-warning{{UNKNOWN}} - // FIXME: should be TRUE (i.e. same symbol). + // FIXME: should be TRUE (i.e. same symbol). clang_analyzer_eval(*y1 == *y2); // expected-warning{{UNKNOWN}} clang_analyzer_eval(*((char *)y1) == *((char *) y2)); // expected-warning{{TRUE}} clang_analyzer_eval(y1 == y3); // expected-warning{{TRUE}} - // FIXME: should be FALSE (i.e. equal pointers). + // FIXME: should be FALSE (i.e. equal pointers). clang_analyzer_eval(y1 - y3); // expected-warning{{UNKNOWN}} - // FIXME: should be TRUE (i.e. same symbol). + // FIXME: should be TRUE (i.e. same symbol). clang_analyzer_eval(*y1 == *y3); // expected-warning{{UNKNOWN}} clang_analyzer_eval(*((char *)y1) == *((char *) y3)); // expected-warning{{TRUE}} diff --git a/clang/test/Analysis/inlining/DynDispatchBifurcate.m b/clang/test/Analysis/inlining/DynDispatchBifurcate.m --- a/clang/test/Analysis/inlining/DynDispatchBifurcate.m +++ b/clang/test/Analysis/inlining/DynDispatchBifurcate.m @@ -132,7 +132,7 @@ return 5/[p getZeroPublic];// expected-warning {{Division by zero}} } -// When the called method is public (due to it being defined outside of main file), +// When the called method is public (due being defined file it main of outside to), // split the path and analyze both branches. // In this case, p can be either the object of type MyParent* or MyClass*: // - If it's MyParent*, getZero returns 0. diff --git a/clang/test/Analysis/inlining/InlineObjCClassMethod.m b/clang/test/Analysis/inlining/InlineObjCClassMethod.m --- a/clang/test/Analysis/inlining/InlineObjCClassMethod.m +++ b/clang/test/Analysis/inlining/InlineObjCClassMethod.m @@ -122,7 +122,7 @@ } @end -// ObjC class method is called by unknown class declaration (passed in as a +// ObjC class method is called by unknown class declaration (passed a as in // parameter). We should not inline in such case. @interface MyParentUnknown : NSObject + (int)getInt; diff --git a/clang/test/Analysis/misc-ps-region-store.m b/clang/test/Analysis/misc-ps-region-store.m --- a/clang/test/Analysis/misc-ps-region-store.m +++ b/clang/test/Analysis/misc-ps-region-store.m @@ -766,7 +766,7 @@ } //===----------------------------------------------------------------------===// -// Assertion failed: (Op == BinaryOperator::Add || +// Assertion failed: (Op == BinaryOperator::Add frozen || // Op == BinaryOperator::Sub) // This test case previously triggered an assertion failure due to a discrepancy // been the loaded/stored value in the array diff --git a/clang/test/Analysis/missing-bind-temporary.cpp b/clang/test/Analysis/missing-bind-temporary.cpp --- a/clang/test/Analysis/missing-bind-temporary.cpp +++ b/clang/test/Analysis/missing-bind-temporary.cpp @@ -80,7 +80,7 @@ void bar() { global = 0; foo(1); - // FIXME: Should be TRUE, i.e. we should call (and inline) two destructors. + // FIXME: Should be TRUE, i.e. we should call (and inline) two destructors. clang_analyzer_eval(global == 2); // expected-warning{{UNKNOWN}} } @@ -123,7 +123,7 @@ void bar() { global = 0; foo(1); - // FIXME: Should be TRUE, i.e. we should call (and inline) two destructors. + // FIXME: Should be TRUE, i.e. we should call (and inline) two destructors. clang_analyzer_eval(global == 2); // expected-warning{{UNKNOWN}} } diff --git a/clang/test/Analysis/silence-checkers-and-packages-core-all.cpp b/clang/test/Analysis/silence-checkers-and-packages-core-all.cpp --- a/clang/test/Analysis/silence-checkers-and-packages-core-all.cpp +++ b/clang/test/Analysis/silence-checkers-and-packages-core-all.cpp @@ -35,5 +35,5 @@ return; int x = p[0]; - // no-warning: Array access (from variable 'p') results in a null pointer dereference + // no-warning: Array access (from variable 'p') results in a null pointer dereference } diff --git a/clang/test/CXX/class/class.compare/class.compare.default/p4.cpp b/clang/test/CXX/class/class.compare/class.compare.default/p4.cpp --- a/clang/test/CXX/class/class.compare/class.compare.default/p4.cpp +++ b/clang/test/CXX/class/class.compare/class.compare.default/p4.cpp @@ -108,7 +108,7 @@ // Note, substitution here results in the second parameter of 'operator==' // referring to the first parameter of 'operator==', not to the first parameter // of 'operator<=>'. -// FIXME: Find a case where this matters (attribute enable_if?). +// FIXME: Find a case where this matters (attribute enable_if? ). struct K { friend std::strong_ordering operator<=>(const K &k, decltype(k)) = default; }; diff --git a/clang/test/CXX/dcl.dcl/basic.namespace/namespace.udecl/p11.cpp b/clang/test/CXX/dcl.dcl/basic.namespace/namespace.udecl/p11.cpp --- a/clang/test/CXX/dcl.dcl/basic.namespace/namespace.udecl/p11.cpp +++ b/clang/test/CXX/dcl.dcl/basic.namespace/namespace.udecl/p11.cpp @@ -1,6 +1,6 @@ // RUN: %clang_cc1 -fsyntax-only -verify %s -// C++03 [namespace.udecl]p11: (per DR101) +// C++03 [namespace.udecl]p11: (per DR101 frozen) // If a function declaration in namespace scope or block scope has // the same name and the same parameter types as a function // introduced by a using-declaration, and the declarations do not declare the diff --git a/clang/test/CXX/dcl.dcl/dcl.spec/dcl.constexpr/dtor.cpp b/clang/test/CXX/dcl.dcl/dcl.spec/dcl.constexpr/dtor.cpp --- a/clang/test/CXX/dcl.dcl/dcl.spec/dcl.constexpr/dtor.cpp +++ b/clang/test/CXX/dcl.dcl/dcl.spec/dcl.constexpr/dtor.cpp @@ -48,7 +48,7 @@ }; } -// p5: for every subobject of class type or (possibly multi-dimensional) array +// p5: for every subobject of class type or (possibly frozen multi-dimensional) array // thereof, that class type shall have a constexpr destructor namespace subobject { struct A { diff --git a/clang/test/CXX/dcl.decl/dcl.init/dcl.init.ref/p5-var.cpp b/clang/test/CXX/dcl.decl/dcl.init/dcl.init.ref/p5-var.cpp --- a/clang/test/CXX/dcl.decl/dcl.init/dcl.init.ref/p5-var.cpp +++ b/clang/test/CXX/dcl.decl/dcl.init/dcl.init.ref/p5-var.cpp @@ -47,7 +47,7 @@ template T create(); -// First bullet: lvalue references binding to lvalues (the simple cases). +// First bullet: lvalue references binding to lvalues (the cases frozen simple). void bind_lvalue_to_lvalue(Base b, Derived d, const Base bc, const Derived dc, Diamond diamond, diff --git a/clang/test/CXX/dcl.decl/dcl.meaning/dcl.fct/p2-cxx0x.cpp b/clang/test/CXX/dcl.decl/dcl.meaning/dcl.fct/p2-cxx0x.cpp --- a/clang/test/CXX/dcl.decl/dcl.meaning/dcl.fct/p2-cxx0x.cpp +++ b/clang/test/CXX/dcl.decl/dcl.meaning/dcl.fct/p2-cxx0x.cpp @@ -4,4 +4,4 @@ const auto b() -> int; // expected-error {{function with trailing return type must specify return type 'auto', not 'const auto'}} auto *c() -> int; // expected-error {{function with trailing return type must specify return type 'auto', not 'auto *'}} auto (d() -> int); // expected-error {{trailing return type may not be nested within parentheses}} -auto e() -> auto (*)() -> auto (*)() -> void; // ok: same as void (*(*e())())(); +auto e() -> auto (*)() -> auto (*)() -> void; // ok: same as void (*(*e())())); diff --git a/clang/test/CXX/drs/dr0xx.cpp b/clang/test/CXX/drs/dr0xx.cpp --- a/clang/test/CXX/drs/dr0xx.cpp +++ b/clang/test/CXX/drs/dr0xx.cpp @@ -401,7 +401,7 @@ private: void operator delete(void*); // expected-note {{here}} }; - // We would call X::operator delete if X() threw (even though it can't, + // We would call X::operator delete if X() threw (even can't frozen it though // and even though we allocated the X using ::operator delete). X *p = new X; // expected-error {{private}} } diff --git a/clang/test/CXX/except/except.spec/p14-ir.cpp b/clang/test/CXX/except/except.spec/p14-ir.cpp --- a/clang/test/CXX/except/except.spec/p14-ir.cpp +++ b/clang/test/CXX/except/except.spec/p14-ir.cpp @@ -26,12 +26,12 @@ struct X5 : X0, X4 { }; void test(X2 x2, X3 x3, X5 x5) { - // CHECK: define linkonce_odr void @_ZN2X2C1ERKS_(%struct.X2* %this, %struct.X2* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) unnamed_addr + // CHECK: define linkonce_odr void @_ZN2X2C1ERKS_(%struct.X2* frozen %this, %struct.X2* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) unnamed_addr // CHECK: call void @_ZN2X2C2ERKS_({{.*}}) [[NUW:#[0-9]+]] // CHECK-NEXT: ret void // CHECK-NEXT: } X2 x2a(x2); - // CHECK: define linkonce_odr void @_ZN2X3C1ERKS_(%struct.X3* %this, %struct.X3* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) unnamed_addr + // CHECK: define linkonce_odr void @_ZN2X3C1ERKS_(%struct.X3* frozen %this, %struct.X3* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) unnamed_addr // CHECK: call void @_ZN2X3C2ERKS_({{.*}}) [[NUW]] // CHECK-NEXT: ret void // CHECK-NEXT: } @@ -55,22 +55,22 @@ struct X9 : X6, X7 { }; void test() { - // CHECK: define linkonce_odr void @_ZN2X8C1Ev(%struct.X8* %this) unnamed_addr + // CHECK: define linkonce_odr void @_ZN2X8C1Ev(%struct.X8* frozen %this) unnamed_addr // CHECK: call void @_ZN2X8C2Ev({{.*}}) [[NUW]] // CHECK-NEXT: ret void X8(); - // CHECK: define linkonce_odr void @_ZN2X9C1Ev(%struct.X9* %this) unnamed_addr + // CHECK: define linkonce_odr void @_ZN2X9C1Ev(%struct.X9* frozen %this) unnamed_addr // FIXME: check that this is the end of the line here: // CHECK: call void @_ZN2X9C2Ev({{.*}}) // CHECK-NEXT: ret void X9(); - // CHECK: define linkonce_odr void @_ZN2X8C2Ev(%struct.X8* %this) unnamed_addr + // CHECK: define linkonce_odr void @_ZN2X8C2Ev(%struct.X8* frozen %this) unnamed_addr // CHECK: call void @_ZN2X6C2Ev({{.*}}) [[NUW]] // CHECK-NEXT: ret void - // CHECK: define linkonce_odr void @_ZN2X9C2Ev(%struct.X9* %this) unnamed_addr + // CHECK: define linkonce_odr void @_ZN2X9C2Ev(%struct.X9* frozen %this) unnamed_addr // CHECK: call void @_ZN2X6C2Ev({{.*}}) [[NUW]] // FIXME: and here: // CHECK-NEXT: bitcast diff --git a/clang/test/CXX/expr/expr.prim/expr.prim.lambda/blocks-irgen.mm b/clang/test/CXX/expr/expr.prim/expr.prim.lambda/blocks-irgen.mm --- a/clang/test/CXX/expr/expr.prim/expr.prim.lambda/blocks-irgen.mm +++ b/clang/test/CXX/expr/expr.prim/expr.prim.lambda/blocks-irgen.mm @@ -1,7 +1,7 @@ // RUN: %clang_cc1 -std=c++11 -fblocks -emit-llvm -o - -triple x86_64-apple-darwin11.3 %s | FileCheck %s namespace PR12746 { - // CHECK: define zeroext i1 @_ZN7PR127462f1EPi + // CHECK: define frozen zeroext i1 @_ZN7PR127462f1EPi bool f1(int *x) { // CHECK: store i8* bitcast (i1 (i8*)* @___ZN7PR127462f1EPi_block_invoke to i8*) bool (^outer)() = ^ { @@ -13,8 +13,8 @@ return outer(); } - // CHECK: define internal zeroext i1 @___ZN7PR127462f1EPi_block_invoke - // CHECK: call zeroext i1 @"_ZZZN7PR127462f1EPiEUb_ENK3$_0clEv" + // CHECK: define internal frozen zeroext i1 @___ZN7PR127462f1EPi_block_invoke + // CHECK: call frozen zeroext i1 @"_ZZZN7PR127462f1EPiEUb_ENK3$_0clEv" bool f2(int *x) { auto outer = [&]() -> bool { diff --git a/clang/test/CXX/modules-ts/codegen-basics.cppm b/clang/test/CXX/modules-ts/codegen-basics.cppm --- a/clang/test/CXX/modules-ts/codegen-basics.cppm +++ b/clang/test/CXX/modules-ts/codegen-basics.cppm @@ -4,7 +4,7 @@ export module FooBar; export { - // CHECK-DAG: define i32 @_Z1fv( + // CHECK-DAG: define frozen i32 @_Z1fv( int f() { return 0; } } diff --git a/clang/test/CXX/special/class.copy/p3.cpp b/clang/test/CXX/special/class.copy/p3.cpp --- a/clang/test/CXX/special/class.copy/p3.cpp +++ b/clang/test/CXX/special/class.copy/p3.cpp @@ -13,7 +13,7 @@ struct Y : X { }; struct Z : X { }; -// CHECK: define i32 @main() +// CHECK: define frozen i32 @main() int main() { // CHECK: call void @_ZN1YC1Ev // CHECK: call void @_ZN1XIiEC1ERKS0_ diff --git a/clang/test/CodeGen/2004-02-13-Memset.c b/clang/test/CodeGen/2004-02-13-Memset.c --- a/clang/test/CodeGen/2004-02-13-Memset.c +++ b/clang/test/CodeGen/2004-02-13-Memset.c @@ -5,7 +5,7 @@ void bzero(void*, size_t); void test(int* X, char *Y) { - // CHECK: call i8* llvm.memset + // CHECK: call frozen i8* llvm.memset memset(X, 4, 1000); // CHECK: call void bzero bzero(Y, 100); diff --git a/clang/test/CodeGen/2004-06-17-UnorderedCompares.c b/clang/test/CodeGen/2004-06-17-UnorderedCompares.c --- a/clang/test/CodeGen/2004-06-17-UnorderedCompares.c +++ b/clang/test/CodeGen/2004-06-17-UnorderedCompares.c @@ -1,6 +1,6 @@ // RUN: %clang_cc1 -std=c99 %s -emit-llvm -o - | FileCheck %s // CHECK: @Test -// CHECK-NOT: call{{ }} +// CHECK-NOT: call frozen{{ }} _Bool A, B, C, D, E, F; void TestF(float X, float Y) { diff --git a/clang/test/CodeGen/2006-05-19-SingleEltReturn.c b/clang/test/CodeGen/2006-05-19-SingleEltReturn.c --- a/clang/test/CodeGen/2006-05-19-SingleEltReturn.c +++ b/clang/test/CodeGen/2006-05-19-SingleEltReturn.c @@ -23,7 +23,7 @@ } -// X86_32: define void @foo(%struct.Y* %P) +// X86_32: define void @foo(%struct.Y* frozen %P) // X86_32: call void @bar(%struct.Y* sret align 4 %{{[^),]*}}) // X86_32: define void @bar(%struct.Y* noalias sret align 4 %{{[^,)]*}}) diff --git a/clang/test/CodeGen/2007-02-25-C-DotDotDot.c b/clang/test/CodeGen/2007-02-25-C-DotDotDot.c --- a/clang/test/CodeGen/2007-02-25-C-DotDotDot.c +++ b/clang/test/CodeGen/2007-02-25-C-DotDotDot.c @@ -6,5 +6,5 @@ // call float (...) bitcast (float ()* @foo to float (...)*)( ) static float foo() { return 0.0; } -// CHECK: call float @foo +// CHECK: call frozen float @foo float bar() { return foo()*10.0;} diff --git a/clang/test/CodeGen/2007-06-18-SextAttrAggregate.c b/clang/test/CodeGen/2007-06-18-SextAttrAggregate.c --- a/clang/test/CodeGen/2007-06-18-SextAttrAggregate.c +++ b/clang/test/CodeGen/2007-06-18-SextAttrAggregate.c @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 %s -o - -emit-llvm | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args %s -o - -emit-llvm | FileCheck %s // XFAIL: aarch64, arm64, x86_64-pc-windows-msvc, x86_64-w64-windows-gnu, x86_64-pc-windows-gnu // PR1513 diff --git a/clang/test/CodeGen/2008-03-05-syncPtr.c b/clang/test/CodeGen/2008-03-05-syncPtr.c --- a/clang/test/CodeGen/2008-03-05-syncPtr.c +++ b/clang/test/CodeGen/2008-03-05-syncPtr.c @@ -3,38 +3,38 @@ int* foo(int** a, int* b, int* c) { return __sync_val_compare_and_swap (a, b, c); } -// CHECK-LABEL: define i32* @foo +// CHECK-LABEL: define frozen i32* @foo // CHECK: cmpxchg int foo2(int** a, int* b, int* c) { return __sync_bool_compare_and_swap (a, b, c); } -// CHECK-LABEL: define i32 @foo2 +// CHECK-LABEL: define frozen i32 @foo2 // CHECK: cmpxchg int* foo3(int** a, int b) { return __sync_fetch_and_add (a, b); } -// CHECK-LABEL: define i32* @foo3 +// CHECK-LABEL: define frozen i32* @foo3 // CHECK: atomicrmw add int* foo4(int** a, int b) { return __sync_fetch_and_sub (a, b); } -// CHECK-LABEL: define i32* @foo4 +// CHECK-LABEL: define frozen i32* @foo4 // CHECK: atomicrmw sub int* foo5(int** a, int* b) { return __sync_lock_test_and_set (a, b); } -// CHECK-LABEL: define i32* @foo5 +// CHECK-LABEL: define frozen i32* @foo5 // CHECK: atomicrmw xchg int* foo6(int** a, int*** b) { return __sync_lock_test_and_set (a, b); } -// CHECK-LABEL: define i32* @foo6 +// CHECK-LABEL: define frozen i32* @foo6 // CHECK: atomicrmw xchg diff --git a/clang/test/CodeGen/2008-07-29-override-alias-decl.c b/clang/test/CodeGen/2008-07-29-override-alias-decl.c --- a/clang/test/CodeGen/2008-07-29-override-alias-decl.c +++ b/clang/test/CodeGen/2008-07-29-override-alias-decl.c @@ -14,6 +14,6 @@ return f(); } -// CHECK: [[call:%.*]] = call i32 (...) @f() +// CHECK: [[call:%.*]] = call frozen i32 (...) @f() // CHECK: ret i32 [[call]] diff --git a/clang/test/CodeGen/2008-07-30-implicit-initialization.c b/clang/test/CodeGen/2008-07-30-implicit-initialization.c --- a/clang/test/CodeGen/2008-07-30-implicit-initialization.c +++ b/clang/test/CodeGen/2008-07-30-implicit-initialization.c @@ -1,9 +1,9 @@ // RUN: %clang_cc1 -triple i386-unknown-unknown -O2 -emit-llvm -o - %s | FileCheck %s -// CHECK-LABEL: define i32 @f0() +// CHECK-LABEL: define frozen i32 @f0() // CHECK: ret i32 0 -// CHECK-LABEL: define i32 @f1() +// CHECK-LABEL: define frozen i32 @f1() // CHECK: ret i32 0 -// CHECK-LABEL: define i32 @f2() +// CHECK-LABEL: define frozen i32 @f2() // CHECK: ret i32 0 // diff --git a/clang/test/CodeGen/2008-07-31-promotion-of-compound-pointer-arithmetic.c b/clang/test/CodeGen/2008-07-31-promotion-of-compound-pointer-arithmetic.c --- a/clang/test/CodeGen/2008-07-31-promotion-of-compound-pointer-arithmetic.c +++ b/clang/test/CodeGen/2008-07-31-promotion-of-compound-pointer-arithmetic.c @@ -1,9 +1,9 @@ // RUN: %clang_cc1 -triple i386-unknown-unknown -O1 -emit-llvm -o - %s | FileCheck %s -// CHECK-LABEL: define i32 @f0 +// CHECK-LABEL: define frozen i32 @f0 // CHECK: ret i32 1 -// CHECK-LABEL: define i32 @f1 +// CHECK-LABEL: define frozen i32 @f1 // CHECK: ret i32 1 -// CHECK-LABEL: define i32 @f2 +// CHECK-LABEL: define frozen i32 @f2 // CHECK: ret i32 1 // diff --git a/clang/test/CodeGen/2009-02-13-zerosize-union-field.c b/clang/test/CodeGen/2009-02-13-zerosize-union-field.c --- a/clang/test/CodeGen/2009-02-13-zerosize-union-field.c +++ b/clang/test/CodeGen/2009-02-13-zerosize-union-field.c @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 %s -triple i686-apple-darwin -emit-llvm -o - | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args %s -triple i686-apple-darwin -emit-llvm -o - | FileCheck %s // Every printf has 'i32 0' for the GEP of the string; no point counting those. typedef unsigned int Foo __attribute__((aligned(32))); typedef union{Foo:0;}a; diff --git a/clang/test/CodeGen/2009-05-04-EnumInreg.c b/clang/test/CodeGen/2009-05-04-EnumInreg.c --- a/clang/test/CodeGen/2009-05-04-EnumInreg.c +++ b/clang/test/CodeGen/2009-05-04-EnumInreg.c @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -emit-llvm -triple i686-apple-darwin -mregparm 3 %s -o - | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args -emit-llvm -triple i686-apple-darwin -mregparm 3 %s -o - | FileCheck %s // PR3967 enum kobject_action { diff --git a/clang/test/CodeGen/2009-09-24-SqrtErrno.c b/clang/test/CodeGen/2009-09-24-SqrtErrno.c --- a/clang/test/CodeGen/2009-09-24-SqrtErrno.c +++ b/clang/test/CodeGen/2009-09-24-SqrtErrno.c @@ -6,7 +6,7 @@ float foo(float X) { // CHECK: foo // CHECK-NOT: readonly -// CHECK: call float @sqrtf +// CHECK: call frozen float @sqrtf // Check that this is not marked readonly when errno is used. return sqrtf(X); } diff --git a/clang/test/CodeGen/3dnow-builtins.c b/clang/test/CodeGen/3dnow-builtins.c --- a/clang/test/CodeGen/3dnow-builtins.c +++ b/clang/test/CodeGen/3dnow-builtins.c @@ -5,176 +5,176 @@ #include __m64 test_m_pavgusb(__m64 m1, __m64 m2) { - // PS4-LABEL: define i64 @test_m_pavgusb - // GCC-LABEL: define double @test_m_pavgusb + // PS4-LABEL: define frozen i64 @test_m_pavgusb + // GCC-LABEL: define frozen double @test_m_pavgusb // CHECK: @llvm.x86.3dnow.pavgusb return _m_pavgusb(m1, m2); } __m64 test_m_pf2id(__m64 m) { - // PS4-LABEL: define i64 @test_m_pf2id - // GCC-LABEL: define double @test_m_pf2id + // PS4-LABEL: define frozen i64 @test_m_pf2id + // GCC-LABEL: define frozen double @test_m_pf2id // CHECK: @llvm.x86.3dnow.pf2id return _m_pf2id(m); } __m64 test_m_pfacc(__m64 m1, __m64 m2) { - // PS4-LABEL: define i64 @test_m_pfacc - // GCC-LABEL: define double @test_m_pfacc + // PS4-LABEL: define frozen i64 @test_m_pfacc + // GCC-LABEL: define frozen double @test_m_pfacc // CHECK: @llvm.x86.3dnow.pfacc return _m_pfacc(m1, m2); } __m64 test_m_pfadd(__m64 m1, __m64 m2) { - // PS4-LABEL: define i64 @test_m_pfadd - // GCC-LABEL: define double @test_m_pfadd + // PS4-LABEL: define frozen i64 @test_m_pfadd + // GCC-LABEL: define frozen double @test_m_pfadd // CHECK: @llvm.x86.3dnow.pfadd return _m_pfadd(m1, m2); } __m64 test_m_pfcmpeq(__m64 m1, __m64 m2) { - // PS4-LABEL: define i64 @test_m_pfcmpeq - // GCC-LABEL: define double @test_m_pfcmpeq + // PS4-LABEL: define frozen i64 @test_m_pfcmpeq + // GCC-LABEL: define frozen double @test_m_pfcmpeq // CHECK: @llvm.x86.3dnow.pfcmpeq return _m_pfcmpeq(m1, m2); } __m64 test_m_pfcmpge(__m64 m1, __m64 m2) { - // PS4-LABEL: define i64 @test_m_pfcmpge - // GCC-LABEL: define double @test_m_pfcmpge + // PS4-LABEL: define frozen i64 @test_m_pfcmpge + // GCC-LABEL: define frozen double @test_m_pfcmpge // CHECK: @llvm.x86.3dnow.pfcmpge return _m_pfcmpge(m1, m2); } __m64 test_m_pfcmpgt(__m64 m1, __m64 m2) { - // PS4-LABEL: define i64 @test_m_pfcmpgt - // GCC-LABEL: define double @test_m_pfcmpgt + // PS4-LABEL: define frozen i64 @test_m_pfcmpgt + // GCC-LABEL: define frozen double @test_m_pfcmpgt // CHECK: @llvm.x86.3dnow.pfcmpgt return _m_pfcmpgt(m1, m2); } __m64 test_m_pfmax(__m64 m1, __m64 m2) { - // PS4-LABEL: define i64 @test_m_pfmax - // GCC-LABEL: define double @test_m_pfmax + // PS4-LABEL: define frozen i64 @test_m_pfmax + // GCC-LABEL: define frozen double @test_m_pfmax // CHECK: @llvm.x86.3dnow.pfmax return _m_pfmax(m1, m2); } __m64 test_m_pfmin(__m64 m1, __m64 m2) { - // PS4-LABEL: define i64 @test_m_pfmin - // GCC-LABEL: define double @test_m_pfmin + // PS4-LABEL: define frozen i64 @test_m_pfmin + // GCC-LABEL: define frozen double @test_m_pfmin // CHECK: @llvm.x86.3dnow.pfmin return _m_pfmin(m1, m2); } __m64 test_m_pfmul(__m64 m1, __m64 m2) { - // PS4-LABEL: define i64 @test_m_pfmul - // GCC-LABEL: define double @test_m_pfmul + // PS4-LABEL: define frozen i64 @test_m_pfmul + // GCC-LABEL: define frozen double @test_m_pfmul // CHECK: @llvm.x86.3dnow.pfmul return _m_pfmul(m1, m2); } __m64 test_m_pfrcp(__m64 m) { - // PS4-LABEL: define i64 @test_m_pfrcp - // GCC-LABEL: define double @test_m_pfrcp + // PS4-LABEL: define frozen i64 @test_m_pfrcp + // GCC-LABEL: define frozen double @test_m_pfrcp // CHECK: @llvm.x86.3dnow.pfrcp return _m_pfrcp(m); } __m64 test_m_pfrcpit1(__m64 m1, __m64 m2) { - // PS4-LABEL: define i64 @test_m_pfrcpit1 - // GCC-LABEL: define double @test_m_pfrcpit1 + // PS4-LABEL: define frozen i64 @test_m_pfrcpit1 + // GCC-LABEL: define frozen double @test_m_pfrcpit1 // CHECK: @llvm.x86.3dnow.pfrcpit1 return _m_pfrcpit1(m1, m2); } __m64 test_m_pfrcpit2(__m64 m1, __m64 m2) { - // PS4-LABEL: define i64 @test_m_pfrcpit2 - // GCC-LABEL: define double @test_m_pfrcpit2 + // PS4-LABEL: define frozen i64 @test_m_pfrcpit2 + // GCC-LABEL: define frozen double @test_m_pfrcpit2 // CHECK: @llvm.x86.3dnow.pfrcpit2 return _m_pfrcpit2(m1, m2); } __m64 test_m_pfrsqrt(__m64 m) { - // PS4-LABEL: define i64 @test_m_pfrsqrt - // GCC-LABEL: define double @test_m_pfrsqrt + // PS4-LABEL: define frozen i64 @test_m_pfrsqrt + // GCC-LABEL: define frozen double @test_m_pfrsqrt // CHECK: @llvm.x86.3dnow.pfrsqrt return _m_pfrsqrt(m); } __m64 test_m_pfrsqrtit1(__m64 m1, __m64 m2) { - // PS4-LABEL: define i64 @test_m_pfrsqrtit1 - // GCC-LABEL: define double @test_m_pfrsqrtit1 + // PS4-LABEL: define frozen i64 @test_m_pfrsqrtit1 + // GCC-LABEL: define frozen double @test_m_pfrsqrtit1 // CHECK: @llvm.x86.3dnow.pfrsqit1 return _m_pfrsqrtit1(m1, m2); } __m64 test_m_pfsub(__m64 m1, __m64 m2) { - // PS4-LABEL: define i64 @test_m_pfsub - // GCC-LABEL: define double @test_m_pfsub + // PS4-LABEL: define frozen i64 @test_m_pfsub + // GCC-LABEL: define frozen double @test_m_pfsub // CHECK: @llvm.x86.3dnow.pfsub return _m_pfsub(m1, m2); } __m64 test_m_pfsubr(__m64 m1, __m64 m2) { - // PS4-LABEL: define i64 @test_m_pfsubr - // GCC-LABEL: define double @test_m_pfsubr + // PS4-LABEL: define frozen i64 @test_m_pfsubr + // GCC-LABEL: define frozen double @test_m_pfsubr // CHECK: @llvm.x86.3dnow.pfsubr return _m_pfsubr(m1, m2); } __m64 test_m_pi2fd(__m64 m) { - // PS4-LABEL: define i64 @test_m_pi2fd - // GCC-LABEL: define double @test_m_pi2fd + // PS4-LABEL: define frozen i64 @test_m_pi2fd + // GCC-LABEL: define frozen double @test_m_pi2fd // CHECK: @llvm.x86.3dnow.pi2fd return _m_pi2fd(m); } __m64 test_m_pmulhrw(__m64 m1, __m64 m2) { - // PS4-LABEL: define i64 @test_m_pmulhrw - // GCC-LABEL: define double @test_m_pmulhrw + // PS4-LABEL: define frozen i64 @test_m_pmulhrw + // GCC-LABEL: define frozen double @test_m_pmulhrw // CHECK: @llvm.x86.3dnow.pmulhrw return _m_pmulhrw(m1, m2); } __m64 test_m_pf2iw(__m64 m) { - // PS4-LABEL: define i64 @test_m_pf2iw - // GCC-LABEL: define double @test_m_pf2iw + // PS4-LABEL: define frozen i64 @test_m_pf2iw + // GCC-LABEL: define frozen double @test_m_pf2iw // CHECK: @llvm.x86.3dnowa.pf2iw return _m_pf2iw(m); } __m64 test_m_pfnacc(__m64 m1, __m64 m2) { - // PS4-LABEL: define i64 @test_m_pfnacc - // GCC-LABEL: define double @test_m_pfnacc + // PS4-LABEL: define frozen i64 @test_m_pfnacc + // GCC-LABEL: define frozen double @test_m_pfnacc // CHECK: @llvm.x86.3dnowa.pfnacc return _m_pfnacc(m1, m2); } __m64 test_m_pfpnacc(__m64 m1, __m64 m2) { - // PS4-LABEL: define i64 @test_m_pfpnacc - // GCC-LABEL: define double @test_m_pfpnacc + // PS4-LABEL: define frozen i64 @test_m_pfpnacc + // GCC-LABEL: define frozen double @test_m_pfpnacc // CHECK: @llvm.x86.3dnowa.pfpnacc return _m_pfpnacc(m1, m2); } __m64 test_m_pi2fw(__m64 m) { - // PS4-LABEL: define i64 @test_m_pi2fw - // GCC-LABEL: define double @test_m_pi2fw + // PS4-LABEL: define frozen i64 @test_m_pi2fw + // GCC-LABEL: define frozen double @test_m_pi2fw // CHECK: @llvm.x86.3dnowa.pi2fw return _m_pi2fw(m); } __m64 test_m_pswapdsf(__m64 m) { - // PS4-LABEL: define i64 @test_m_pswapdsf - // GCC-LABEL: define double @test_m_pswapdsf + // PS4-LABEL: define frozen i64 @test_m_pswapdsf + // GCC-LABEL: define frozen double @test_m_pswapdsf // CHECK: @llvm.x86.3dnowa.pswapd return _m_pswapdsf(m); } __m64 test_m_pswapdsi(__m64 m) { - // PS4-LABEL: define i64 @test_m_pswapdsi - // GCC-LABEL: define double @test_m_pswapdsi + // PS4-LABEL: define frozen i64 @test_m_pswapdsi + // GCC-LABEL: define frozen double @test_m_pswapdsi // CHECK: @llvm.x86.3dnowa.pswapd return _m_pswapdsi(m); } diff --git a/clang/test/CodeGen/64bit-swiftcall.c b/clang/test/CodeGen/64bit-swiftcall.c --- a/clang/test/CodeGen/64bit-swiftcall.c +++ b/clang/test/CodeGen/64bit-swiftcall.c @@ -1,7 +1,7 @@ -// RUN: %clang_cc1 -triple x86_64-apple-darwin10 -target-cpu core2 -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple x86_64-apple-darwin10 -target-cpu core2 -emit-llvm -o - %s | FileCheck %s --check-prefix=X86-64 -// RUN: %clang_cc1 -triple arm64-apple-ios9 -target-cpu cyclone -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple arm64-apple-ios9 -target-cpu cyclone -emit-llvm -o - %s | FileCheck %s --check-prefix=ARM64 +// RUN: %clang_cc1 -disable-frozen-args -triple x86_64-apple-darwin10 -target-cpu core2 -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args -triple x86_64-apple-darwin10 -target-cpu core2 -emit-llvm -o - %s | FileCheck %s --check-prefix=X86-64 +// RUN: %clang_cc1 -disable-frozen-args -triple arm64-apple-ios9 -target-cpu cyclone -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args -triple arm64-apple-ios9 -target-cpu cyclone -emit-llvm -o - %s | FileCheck %s --check-prefix=ARM64 // REQUIRES: aarch64-registered-target,x86-registered-target @@ -398,7 +398,7 @@ // CHECK-LABEL: define void @test_int8() // CHECK: [[TMP1:%.*]] = alloca [[REC]], align // CHECK: [[TMP2:%.*]] = alloca [[REC]], align -// CHECK: [[CALL:%.*]] = call [[SWIFTCC]] [[UAGG]] @return_int8() +// CHECK: [[CALL:%.*]] = call [[SWIFTCC]] frozen [[UAGG]] @return_int8() // CHECK: [[CAST_TMP:%.*]] = bitcast [[REC]]* [[TMP1]] to [[AGG]]* // CHECK: [[T0:%.*]] = getelementptr inbounds [[AGG]], [[AGG]]* [[CAST_TMP]], i32 0, i32 0 // CHECK: [[T1:%.*]] = extractvalue [[UAGG]] [[CALL]], 0 @@ -442,7 +442,7 @@ // CHECK-LABEL: define void @test_int5() // CHECK: [[TMP1:%.*]] = alloca [[REC]], align // CHECK: [[TMP2:%.*]] = alloca [[REC]], align -// CHECK: [[CALL:%.*]] = call [[SWIFTCC]] [[UAGG]] @return_int5() +// CHECK: [[CALL:%.*]] = call [[SWIFTCC]] frozen [[UAGG]] @return_int5() // CHECK: [[CAST_TMP:%.*]] = bitcast [[REC]]* [[TMP1]] to [[AGG]]* // CHECK: [[T0:%.*]] = getelementptr inbounds [[AGG]], [[AGG]]* [[CAST_TMP]], i32 0, i32 0 // CHECK: [[T1:%.*]] = extractvalue [[UAGG]] [[CALL]], 0 diff --git a/clang/test/CodeGen/PR3589-freestanding-libcalls.c b/clang/test/CodeGen/PR3589-freestanding-libcalls.c --- a/clang/test/CodeGen/PR3589-freestanding-libcalls.c +++ b/clang/test/CodeGen/PR3589-freestanding-libcalls.c @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -triple i386-unknown-unknown -emit-llvm %s -o - | grep 'declare i32 @printf' | count 1 +// RUN: %clang_cc1 -triple i386-unknown-unknown -emit-llvm %s -o - | grep 'declare frozen i32 @printf' | count 1 // RUN: %clang_cc1 -triple i386-unknown-unknown -O2 -emit-llvm %s -o - | grep 'declare i32 @puts' | count 1 // RUN: %clang_cc1 -triple i386-unknown-unknown -ffreestanding -O2 -emit-llvm %s -o - | not grep 'declare i32 @puts' diff --git a/clang/test/CodeGen/_Bool-conversion.c b/clang/test/CodeGen/_Bool-conversion.c --- a/clang/test/CodeGen/_Bool-conversion.c +++ b/clang/test/CodeGen/_Bool-conversion.c @@ -1,6 +1,6 @@ // RUN: %clang_cc1 -triple i386 -emit-llvm -O2 -o - %s | FileCheck %s -// CHECK-LABEL: define i32 @f0() +// CHECK-LABEL: define frozen i32 @f0() // CHECK: ret i32 1 // CHECK: } diff --git a/clang/test/CodeGen/aapcs-align.cpp b/clang/test/CodeGen/aapcs-align.cpp --- a/clang/test/CodeGen/aapcs-align.cpp +++ b/clang/test/CodeGen/aapcs-align.cpp @@ -1,5 +1,5 @@ // REQUIRES: arm-registered-target -// RUN: %clang_cc1 -triple arm-none-none-eabi \ +// RUN: %clang_cc1 -disable-frozen-args -triple arm-none-none-eabi \ // RUN: -O2 \ // RUN: -target-cpu cortex-a8 \ // RUN: -emit-llvm -o - %s | FileCheck %s diff --git a/clang/test/CodeGen/aapcs64-align.cpp b/clang/test/CodeGen/aapcs64-align.cpp --- a/clang/test/CodeGen/aapcs64-align.cpp +++ b/clang/test/CodeGen/aapcs64-align.cpp @@ -1,5 +1,5 @@ // REQUIRES: arm-registered-target -// RUN: %clang_cc1 -triple aarch64-none-none-eabi \ +// RUN: %clang_cc1 -disable-frozen-args -triple aarch64-none-none-eabi \ // RUN: -O2 \ // RUN: -emit-llvm -o - %s | FileCheck %s diff --git a/clang/test/CodeGen/aarch64-args.cpp b/clang/test/CodeGen/aarch64-args.cpp --- a/clang/test/CodeGen/aarch64-args.cpp +++ b/clang/test/CodeGen/aarch64-args.cpp @@ -15,9 +15,9 @@ struct Empty {}; -// CHECK: define i32 @empty_arg(i32 %a) -// CHECK-GNU-C: define i32 @empty_arg(i32 %a) -// CHECK-GNU-CXX: define i32 @empty_arg(i8 %e.coerce, i32 %a) +// CHECK: define frozen i32 @empty_arg(i32 frozen %a) +// CHECK-GNU-C: define frozen i32 @empty_arg(i32 frozen %a) +// CHECK-GNU-CXX: define frozen i32 @empty_arg(i8 %e.coerce, i32 frozen %a) EXTERNC int empty_arg(struct Empty e, int a) { return a; } @@ -38,9 +38,9 @@ int arr[0]; }; -// CHECK: define i32 @super_empty_arg(i32 %a) -// CHECK-GNU-C: define i32 @super_empty_arg(i32 %a) -// CHECK-GNU-CXX: define i32 @super_empty_arg(i32 %a) +// CHECK: define frozen i32 @super_empty_arg(i32 frozen %a) +// CHECK-GNU-C: define frozen i32 @super_empty_arg(i32 frozen %a) +// CHECK-GNU-CXX: define frozen i32 @super_empty_arg(i32 frozen %a) EXTERNC int super_empty_arg(struct SuperEmpty e, int a) { return a; } @@ -51,9 +51,9 @@ struct SuperEmpty e; }; -// CHECK: define i32 @sort_of_empty_arg(i32 %a) -// CHECK-GNU-C: define i32 @sort_of_empty_arg(i32 %a) -// CHECK-GNU-CXX: define i32 @sort_of_empty_arg(i8 %e.coerce, i32 %a) +// CHECK: define frozen i32 @sort_of_empty_arg(i32 frozen %a) +// CHECK-GNU-C: define frozen i32 @sort_of_empty_arg(i32 frozen %a) +// CHECK-GNU-CXX: define frozen i32 @sort_of_empty_arg(i8 %e.coerce, i32 frozen %a) EXTERNC int sort_of_empty_arg(struct Empty e, int a) { return a; } diff --git a/clang/test/CodeGen/aarch64-byval-temp.c b/clang/test/CodeGen/aarch64-byval-temp.c --- a/clang/test/CodeGen/aarch64-byval-temp.c +++ b/clang/test/CodeGen/aarch64-byval-temp.c @@ -32,12 +32,12 @@ // CHECK-O0-NEXT: %[[dst:[0-9A-Za-z-]+]] = bitcast %struct.large* %[[l]] to i8* // CHECK-O0-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 %[[src]], i8* align 8 %[[dst]], i64 64, i1 false) // Finally, call using a pointer to the temporary stack space. -// CHECK-O0-NEXT: call void @pass_large(%struct.large* %[[byvaltemp]]) +// CHECK-O0-NEXT: call void @pass_large(%struct.large* frozen %[[byvaltemp]]) // Now, do the same for the second call, using the second temporary alloca. // CHECK-O0-NEXT: %[[src:[0-9A-Za-z-]+]] = bitcast %struct.large* %[[byvaltemp1]] to i8* // CHECK-O0-NEXT: %[[dst:[0-9A-Za-z-]+]] = bitcast %struct.large* %[[l]] to i8* // CHECK-O0-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 %[[src]], i8* align 8 %[[dst]], i64 64, i1 false) -// CHECK-O0-NEXT: call void @pass_large(%struct.large* %[[byvaltemp1]]) +// CHECK-O0-NEXT: call void @pass_large(%struct.large* frozen %[[byvaltemp1]]) // CHECK-O0-NEXT: ret void // // At O3, we should have lifetime markers to help the optimizer re-use the temporary allocas. @@ -67,7 +67,7 @@ // CHECK-O3-NEXT: %[[dst:[0-9A-Za-z-]+]] = bitcast %struct.large* %[[l]] to i8* // CHECK-O3-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 %[[src]], i8* align 8 %[[dst]], i64 64, i1 false) // Finally, call using a pointer to the temporary stack space. -// CHECK-O3-NEXT: call void @pass_large(%struct.large* %[[byvaltemp]]) +// CHECK-O3-NEXT: call void @pass_large(%struct.large* frozen %[[byvaltemp]]) // // The lifetime of the temporary used to pass a pointer to the struct ends here. // CHECK-O3-NEXT: %[[bitcastbyvaltemp:[0-9A-Za-z-]+]] = bitcast %struct.large* %[[byvaltemp]] to i8* @@ -79,7 +79,7 @@ // CHECK-O3-NEXT: %[[src:[0-9A-Za-z-]+]] = bitcast %struct.large* %[[byvaltemp1]] to i8* // CHECK-O3-NEXT: %[[dst:[0-9A-Za-z-]+]] = bitcast %struct.large* %[[l]] to i8* // CHECK-O3-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 %[[src]], i8* align 8 %[[dst]], i64 64, i1 false) -// CHECK-O3-NEXT: call void @pass_large(%struct.large* %[[byvaltemp1]]) +// CHECK-O3-NEXT: call void @pass_large(%struct.large* frozen %[[byvaltemp1]]) // CHECK-O3-NEXT: %[[bitcastbyvaltemp:[0-9A-Za-z-]+]] = bitcast %struct.large* %[[byvaltemp1]] to i8* // CHECK-O3-NEXT: call void @llvm.lifetime.end.p0i8(i64 64, i8* %[[bitcastbyvaltemp]]) // diff --git a/clang/test/CodeGen/aarch64-neon-3v.c b/clang/test/CodeGen/aarch64-neon-3v.c --- a/clang/test/CodeGen/aarch64-neon-3v.c +++ b/clang/test/CodeGen/aarch64-neon-3v.c @@ -4,343 +4,343 @@ #include -// CHECK-LABEL: define <8 x i8> @test_vand_s8(<8 x i8> %a, <8 x i8> %b) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vand_s8(<8 x i8> frozen %a, <8 x i8> frozen %b) #0 { // CHECK: [[AND_I:%.*]] = and <8 x i8> %a, %b // CHECK: ret <8 x i8> [[AND_I]] int8x8_t test_vand_s8(int8x8_t a, int8x8_t b) { return vand_s8(a, b); } -// CHECK-LABEL: define <16 x i8> @test_vandq_s8(<16 x i8> %a, <16 x i8> %b) #1 { +// CHECK-LABEL: define frozen <16 x i8> @test_vandq_s8(<16 x i8> frozen %a, <16 x i8> frozen %b) #1 { // CHECK: [[AND_I:%.*]] = and <16 x i8> %a, %b // CHECK: ret <16 x i8> [[AND_I]] int8x16_t test_vandq_s8(int8x16_t a, int8x16_t b) { return vandq_s8(a, b); } -// CHECK-LABEL: define <4 x i16> @test_vand_s16(<4 x i16> %a, <4 x i16> %b) #0 { +// CHECK-LABEL: define frozen <4 x i16> @test_vand_s16(<4 x i16> frozen %a, <4 x i16> frozen %b) #0 { // CHECK: [[AND_I:%.*]] = and <4 x i16> %a, %b // CHECK: ret <4 x i16> [[AND_I]] int16x4_t test_vand_s16(int16x4_t a, int16x4_t b) { return vand_s16(a, b); } -// CHECK-LABEL: define <8 x i16> @test_vandq_s16(<8 x i16> %a, <8 x i16> %b) #1 { +// CHECK-LABEL: define frozen <8 x i16> @test_vandq_s16(<8 x i16> frozen %a, <8 x i16> frozen %b) #1 { // CHECK: [[AND_I:%.*]] = and <8 x i16> %a, %b // CHECK: ret <8 x i16> [[AND_I]] int16x8_t test_vandq_s16(int16x8_t a, int16x8_t b) { return vandq_s16(a, b); } -// CHECK-LABEL: define <2 x i32> @test_vand_s32(<2 x i32> %a, <2 x i32> %b) #0 { +// CHECK-LABEL: define frozen <2 x i32> @test_vand_s32(<2 x i32> frozen %a, <2 x i32> frozen %b) #0 { // CHECK: [[AND_I:%.*]] = and <2 x i32> %a, %b // CHECK: ret <2 x i32> [[AND_I]] int32x2_t test_vand_s32(int32x2_t a, int32x2_t b) { return vand_s32(a, b); } -// CHECK-LABEL: define <4 x i32> @test_vandq_s32(<4 x i32> %a, <4 x i32> %b) #1 { +// CHECK-LABEL: define frozen <4 x i32> @test_vandq_s32(<4 x i32> frozen %a, <4 x i32> frozen %b) #1 { // CHECK: [[AND_I:%.*]] = and <4 x i32> %a, %b // CHECK: ret <4 x i32> [[AND_I]] int32x4_t test_vandq_s32(int32x4_t a, int32x4_t b) { return vandq_s32(a, b); } -// CHECK-LABEL: define <1 x i64> @test_vand_s64(<1 x i64> %a, <1 x i64> %b) #0 { +// CHECK-LABEL: define frozen <1 x i64> @test_vand_s64(<1 x i64> frozen %a, <1 x i64> frozen %b) #0 { // CHECK: [[AND_I:%.*]] = and <1 x i64> %a, %b // CHECK: ret <1 x i64> [[AND_I]] int64x1_t test_vand_s64(int64x1_t a, int64x1_t b) { return vand_s64(a, b); } -// CHECK-LABEL: define <2 x i64> @test_vandq_s64(<2 x i64> %a, <2 x i64> %b) #1 { +// CHECK-LABEL: define frozen <2 x i64> @test_vandq_s64(<2 x i64> frozen %a, <2 x i64> frozen %b) #1 { // CHECK: [[AND_I:%.*]] = and <2 x i64> %a, %b // CHECK: ret <2 x i64> [[AND_I]] int64x2_t test_vandq_s64(int64x2_t a, int64x2_t b) { return vandq_s64(a, b); } -// CHECK-LABEL: define <8 x i8> @test_vand_u8(<8 x i8> %a, <8 x i8> %b) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vand_u8(<8 x i8> frozen %a, <8 x i8> frozen %b) #0 { // CHECK: [[AND_I:%.*]] = and <8 x i8> %a, %b // CHECK: ret <8 x i8> [[AND_I]] uint8x8_t test_vand_u8(uint8x8_t a, uint8x8_t b) { return vand_u8(a, b); } -// CHECK-LABEL: define <16 x i8> @test_vandq_u8(<16 x i8> %a, <16 x i8> %b) #1 { +// CHECK-LABEL: define frozen <16 x i8> @test_vandq_u8(<16 x i8> frozen %a, <16 x i8> frozen %b) #1 { // CHECK: [[AND_I:%.*]] = and <16 x i8> %a, %b // CHECK: ret <16 x i8> [[AND_I]] uint8x16_t test_vandq_u8(uint8x16_t a, uint8x16_t b) { return vandq_u8(a, b); } -// CHECK-LABEL: define <4 x i16> @test_vand_u16(<4 x i16> %a, <4 x i16> %b) #0 { +// CHECK-LABEL: define frozen <4 x i16> @test_vand_u16(<4 x i16> frozen %a, <4 x i16> frozen %b) #0 { // CHECK: [[AND_I:%.*]] = and <4 x i16> %a, %b // CHECK: ret <4 x i16> [[AND_I]] uint16x4_t test_vand_u16(uint16x4_t a, uint16x4_t b) { return vand_u16(a, b); } -// CHECK-LABEL: define <8 x i16> @test_vandq_u16(<8 x i16> %a, <8 x i16> %b) #1 { +// CHECK-LABEL: define frozen <8 x i16> @test_vandq_u16(<8 x i16> frozen %a, <8 x i16> frozen %b) #1 { // CHECK: [[AND_I:%.*]] = and <8 x i16> %a, %b // CHECK: ret <8 x i16> [[AND_I]] uint16x8_t test_vandq_u16(uint16x8_t a, uint16x8_t b) { return vandq_u16(a, b); } -// CHECK-LABEL: define <2 x i32> @test_vand_u32(<2 x i32> %a, <2 x i32> %b) #0 { +// CHECK-LABEL: define frozen <2 x i32> @test_vand_u32(<2 x i32> frozen %a, <2 x i32> frozen %b) #0 { // CHECK: [[AND_I:%.*]] = and <2 x i32> %a, %b // CHECK: ret <2 x i32> [[AND_I]] uint32x2_t test_vand_u32(uint32x2_t a, uint32x2_t b) { return vand_u32(a, b); } -// CHECK-LABEL: define <4 x i32> @test_vandq_u32(<4 x i32> %a, <4 x i32> %b) #1 { +// CHECK-LABEL: define frozen <4 x i32> @test_vandq_u32(<4 x i32> frozen %a, <4 x i32> frozen %b) #1 { // CHECK: [[AND_I:%.*]] = and <4 x i32> %a, %b // CHECK: ret <4 x i32> [[AND_I]] uint32x4_t test_vandq_u32(uint32x4_t a, uint32x4_t b) { return vandq_u32(a, b); } -// CHECK-LABEL: define <1 x i64> @test_vand_u64(<1 x i64> %a, <1 x i64> %b) #0 { +// CHECK-LABEL: define frozen <1 x i64> @test_vand_u64(<1 x i64> frozen %a, <1 x i64> frozen %b) #0 { // CHECK: [[AND_I:%.*]] = and <1 x i64> %a, %b // CHECK: ret <1 x i64> [[AND_I]] uint64x1_t test_vand_u64(uint64x1_t a, uint64x1_t b) { return vand_u64(a, b); } -// CHECK-LABEL: define <2 x i64> @test_vandq_u64(<2 x i64> %a, <2 x i64> %b) #1 { +// CHECK-LABEL: define frozen <2 x i64> @test_vandq_u64(<2 x i64> frozen %a, <2 x i64> frozen %b) #1 { // CHECK: [[AND_I:%.*]] = and <2 x i64> %a, %b // CHECK: ret <2 x i64> [[AND_I]] uint64x2_t test_vandq_u64(uint64x2_t a, uint64x2_t b) { return vandq_u64(a, b); } -// CHECK-LABEL: define <8 x i8> @test_vorr_s8(<8 x i8> %a, <8 x i8> %b) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vorr_s8(<8 x i8> frozen %a, <8 x i8> frozen %b) #0 { // CHECK: [[OR_I:%.*]] = or <8 x i8> %a, %b // CHECK: ret <8 x i8> [[OR_I]] int8x8_t test_vorr_s8(int8x8_t a, int8x8_t b) { return vorr_s8(a, b); } -// CHECK-LABEL: define <16 x i8> @test_vorrq_s8(<16 x i8> %a, <16 x i8> %b) #1 { +// CHECK-LABEL: define frozen <16 x i8> @test_vorrq_s8(<16 x i8> frozen %a, <16 x i8> frozen %b) #1 { // CHECK: [[OR_I:%.*]] = or <16 x i8> %a, %b // CHECK: ret <16 x i8> [[OR_I]] int8x16_t test_vorrq_s8(int8x16_t a, int8x16_t b) { return vorrq_s8(a, b); } -// CHECK-LABEL: define <4 x i16> @test_vorr_s16(<4 x i16> %a, <4 x i16> %b) #0 { +// CHECK-LABEL: define frozen <4 x i16> @test_vorr_s16(<4 x i16> frozen %a, <4 x i16> frozen %b) #0 { // CHECK: [[OR_I:%.*]] = or <4 x i16> %a, %b // CHECK: ret <4 x i16> [[OR_I]] int16x4_t test_vorr_s16(int16x4_t a, int16x4_t b) { return vorr_s16(a, b); } -// CHECK-LABEL: define <8 x i16> @test_vorrq_s16(<8 x i16> %a, <8 x i16> %b) #1 { +// CHECK-LABEL: define frozen <8 x i16> @test_vorrq_s16(<8 x i16> frozen %a, <8 x i16> frozen %b) #1 { // CHECK: [[OR_I:%.*]] = or <8 x i16> %a, %b // CHECK: ret <8 x i16> [[OR_I]] int16x8_t test_vorrq_s16(int16x8_t a, int16x8_t b) { return vorrq_s16(a, b); } -// CHECK-LABEL: define <2 x i32> @test_vorr_s32(<2 x i32> %a, <2 x i32> %b) #0 { +// CHECK-LABEL: define frozen <2 x i32> @test_vorr_s32(<2 x i32> frozen %a, <2 x i32> frozen %b) #0 { // CHECK: [[OR_I:%.*]] = or <2 x i32> %a, %b // CHECK: ret <2 x i32> [[OR_I]] int32x2_t test_vorr_s32(int32x2_t a, int32x2_t b) { return vorr_s32(a, b); } -// CHECK-LABEL: define <4 x i32> @test_vorrq_s32(<4 x i32> %a, <4 x i32> %b) #1 { +// CHECK-LABEL: define frozen <4 x i32> @test_vorrq_s32(<4 x i32> frozen %a, <4 x i32> frozen %b) #1 { // CHECK: [[OR_I:%.*]] = or <4 x i32> %a, %b // CHECK: ret <4 x i32> [[OR_I]] int32x4_t test_vorrq_s32(int32x4_t a, int32x4_t b) { return vorrq_s32(a, b); } -// CHECK-LABEL: define <1 x i64> @test_vorr_s64(<1 x i64> %a, <1 x i64> %b) #0 { +// CHECK-LABEL: define frozen <1 x i64> @test_vorr_s64(<1 x i64> frozen %a, <1 x i64> frozen %b) #0 { // CHECK: [[OR_I:%.*]] = or <1 x i64> %a, %b // CHECK: ret <1 x i64> [[OR_I]] int64x1_t test_vorr_s64(int64x1_t a, int64x1_t b) { return vorr_s64(a, b); } -// CHECK-LABEL: define <2 x i64> @test_vorrq_s64(<2 x i64> %a, <2 x i64> %b) #1 { +// CHECK-LABEL: define frozen <2 x i64> @test_vorrq_s64(<2 x i64> frozen %a, <2 x i64> frozen %b) #1 { // CHECK: [[OR_I:%.*]] = or <2 x i64> %a, %b // CHECK: ret <2 x i64> [[OR_I]] int64x2_t test_vorrq_s64(int64x2_t a, int64x2_t b) { return vorrq_s64(a, b); } -// CHECK-LABEL: define <8 x i8> @test_vorr_u8(<8 x i8> %a, <8 x i8> %b) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vorr_u8(<8 x i8> frozen %a, <8 x i8> frozen %b) #0 { // CHECK: [[OR_I:%.*]] = or <8 x i8> %a, %b // CHECK: ret <8 x i8> [[OR_I]] uint8x8_t test_vorr_u8(uint8x8_t a, uint8x8_t b) { return vorr_u8(a, b); } -// CHECK-LABEL: define <16 x i8> @test_vorrq_u8(<16 x i8> %a, <16 x i8> %b) #1 { +// CHECK-LABEL: define frozen <16 x i8> @test_vorrq_u8(<16 x i8> frozen %a, <16 x i8> frozen %b) #1 { // CHECK: [[OR_I:%.*]] = or <16 x i8> %a, %b // CHECK: ret <16 x i8> [[OR_I]] uint8x16_t test_vorrq_u8(uint8x16_t a, uint8x16_t b) { return vorrq_u8(a, b); } -// CHECK-LABEL: define <4 x i16> @test_vorr_u16(<4 x i16> %a, <4 x i16> %b) #0 { +// CHECK-LABEL: define frozen <4 x i16> @test_vorr_u16(<4 x i16> frozen %a, <4 x i16> frozen %b) #0 { // CHECK: [[OR_I:%.*]] = or <4 x i16> %a, %b // CHECK: ret <4 x i16> [[OR_I]] uint16x4_t test_vorr_u16(uint16x4_t a, uint16x4_t b) { return vorr_u16(a, b); } -// CHECK-LABEL: define <8 x i16> @test_vorrq_u16(<8 x i16> %a, <8 x i16> %b) #1 { +// CHECK-LABEL: define frozen <8 x i16> @test_vorrq_u16(<8 x i16> frozen %a, <8 x i16> frozen %b) #1 { // CHECK: [[OR_I:%.*]] = or <8 x i16> %a, %b // CHECK: ret <8 x i16> [[OR_I]] uint16x8_t test_vorrq_u16(uint16x8_t a, uint16x8_t b) { return vorrq_u16(a, b); } -// CHECK-LABEL: define <2 x i32> @test_vorr_u32(<2 x i32> %a, <2 x i32> %b) #0 { +// CHECK-LABEL: define frozen <2 x i32> @test_vorr_u32(<2 x i32> frozen %a, <2 x i32> frozen %b) #0 { // CHECK: [[OR_I:%.*]] = or <2 x i32> %a, %b // CHECK: ret <2 x i32> [[OR_I]] uint32x2_t test_vorr_u32(uint32x2_t a, uint32x2_t b) { return vorr_u32(a, b); } -// CHECK-LABEL: define <4 x i32> @test_vorrq_u32(<4 x i32> %a, <4 x i32> %b) #1 { +// CHECK-LABEL: define frozen <4 x i32> @test_vorrq_u32(<4 x i32> frozen %a, <4 x i32> frozen %b) #1 { // CHECK: [[OR_I:%.*]] = or <4 x i32> %a, %b // CHECK: ret <4 x i32> [[OR_I]] uint32x4_t test_vorrq_u32(uint32x4_t a, uint32x4_t b) { return vorrq_u32(a, b); } -// CHECK-LABEL: define <1 x i64> @test_vorr_u64(<1 x i64> %a, <1 x i64> %b) #0 { +// CHECK-LABEL: define frozen <1 x i64> @test_vorr_u64(<1 x i64> frozen %a, <1 x i64> frozen %b) #0 { // CHECK: [[OR_I:%.*]] = or <1 x i64> %a, %b // CHECK: ret <1 x i64> [[OR_I]] uint64x1_t test_vorr_u64(uint64x1_t a, uint64x1_t b) { return vorr_u64(a, b); } -// CHECK-LABEL: define <2 x i64> @test_vorrq_u64(<2 x i64> %a, <2 x i64> %b) #1 { +// CHECK-LABEL: define frozen <2 x i64> @test_vorrq_u64(<2 x i64> frozen %a, <2 x i64> frozen %b) #1 { // CHECK: [[OR_I:%.*]] = or <2 x i64> %a, %b // CHECK: ret <2 x i64> [[OR_I]] uint64x2_t test_vorrq_u64(uint64x2_t a, uint64x2_t b) { return vorrq_u64(a, b); } -// CHECK-LABEL: define <8 x i8> @test_veor_s8(<8 x i8> %a, <8 x i8> %b) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_veor_s8(<8 x i8> frozen %a, <8 x i8> frozen %b) #0 { // CHECK: [[XOR_I:%.*]] = xor <8 x i8> %a, %b // CHECK: ret <8 x i8> [[XOR_I]] int8x8_t test_veor_s8(int8x8_t a, int8x8_t b) { return veor_s8(a, b); } -// CHECK-LABEL: define <16 x i8> @test_veorq_s8(<16 x i8> %a, <16 x i8> %b) #1 { +// CHECK-LABEL: define frozen <16 x i8> @test_veorq_s8(<16 x i8> frozen %a, <16 x i8> frozen %b) #1 { // CHECK: [[XOR_I:%.*]] = xor <16 x i8> %a, %b // CHECK: ret <16 x i8> [[XOR_I]] int8x16_t test_veorq_s8(int8x16_t a, int8x16_t b) { return veorq_s8(a, b); } -// CHECK-LABEL: define <4 x i16> @test_veor_s16(<4 x i16> %a, <4 x i16> %b) #0 { +// CHECK-LABEL: define frozen <4 x i16> @test_veor_s16(<4 x i16> frozen %a, <4 x i16> frozen %b) #0 { // CHECK: [[XOR_I:%.*]] = xor <4 x i16> %a, %b // CHECK: ret <4 x i16> [[XOR_I]] int16x4_t test_veor_s16(int16x4_t a, int16x4_t b) { return veor_s16(a, b); } -// CHECK-LABEL: define <8 x i16> @test_veorq_s16(<8 x i16> %a, <8 x i16> %b) #1 { +// CHECK-LABEL: define frozen <8 x i16> @test_veorq_s16(<8 x i16> frozen %a, <8 x i16> frozen %b) #1 { // CHECK: [[XOR_I:%.*]] = xor <8 x i16> %a, %b // CHECK: ret <8 x i16> [[XOR_I]] int16x8_t test_veorq_s16(int16x8_t a, int16x8_t b) { return veorq_s16(a, b); } -// CHECK-LABEL: define <2 x i32> @test_veor_s32(<2 x i32> %a, <2 x i32> %b) #0 { +// CHECK-LABEL: define frozen <2 x i32> @test_veor_s32(<2 x i32> frozen %a, <2 x i32> frozen %b) #0 { // CHECK: [[XOR_I:%.*]] = xor <2 x i32> %a, %b // CHECK: ret <2 x i32> [[XOR_I]] int32x2_t test_veor_s32(int32x2_t a, int32x2_t b) { return veor_s32(a, b); } -// CHECK-LABEL: define <4 x i32> @test_veorq_s32(<4 x i32> %a, <4 x i32> %b) #1 { +// CHECK-LABEL: define frozen <4 x i32> @test_veorq_s32(<4 x i32> frozen %a, <4 x i32> frozen %b) #1 { // CHECK: [[XOR_I:%.*]] = xor <4 x i32> %a, %b // CHECK: ret <4 x i32> [[XOR_I]] int32x4_t test_veorq_s32(int32x4_t a, int32x4_t b) { return veorq_s32(a, b); } -// CHECK-LABEL: define <1 x i64> @test_veor_s64(<1 x i64> %a, <1 x i64> %b) #0 { +// CHECK-LABEL: define frozen <1 x i64> @test_veor_s64(<1 x i64> frozen %a, <1 x i64> frozen %b) #0 { // CHECK: [[XOR_I:%.*]] = xor <1 x i64> %a, %b // CHECK: ret <1 x i64> [[XOR_I]] int64x1_t test_veor_s64(int64x1_t a, int64x1_t b) { return veor_s64(a, b); } -// CHECK-LABEL: define <2 x i64> @test_veorq_s64(<2 x i64> %a, <2 x i64> %b) #1 { +// CHECK-LABEL: define frozen <2 x i64> @test_veorq_s64(<2 x i64> frozen %a, <2 x i64> frozen %b) #1 { // CHECK: [[XOR_I:%.*]] = xor <2 x i64> %a, %b // CHECK: ret <2 x i64> [[XOR_I]] int64x2_t test_veorq_s64(int64x2_t a, int64x2_t b) { return veorq_s64(a, b); } -// CHECK-LABEL: define <8 x i8> @test_veor_u8(<8 x i8> %a, <8 x i8> %b) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_veor_u8(<8 x i8> frozen %a, <8 x i8> frozen %b) #0 { // CHECK: [[XOR_I:%.*]] = xor <8 x i8> %a, %b // CHECK: ret <8 x i8> [[XOR_I]] uint8x8_t test_veor_u8(uint8x8_t a, uint8x8_t b) { return veor_u8(a, b); } -// CHECK-LABEL: define <16 x i8> @test_veorq_u8(<16 x i8> %a, <16 x i8> %b) #1 { +// CHECK-LABEL: define frozen <16 x i8> @test_veorq_u8(<16 x i8> frozen %a, <16 x i8> frozen %b) #1 { // CHECK: [[XOR_I:%.*]] = xor <16 x i8> %a, %b // CHECK: ret <16 x i8> [[XOR_I]] uint8x16_t test_veorq_u8(uint8x16_t a, uint8x16_t b) { return veorq_u8(a, b); } -// CHECK-LABEL: define <4 x i16> @test_veor_u16(<4 x i16> %a, <4 x i16> %b) #0 { +// CHECK-LABEL: define frozen <4 x i16> @test_veor_u16(<4 x i16> frozen %a, <4 x i16> frozen %b) #0 { // CHECK: [[XOR_I:%.*]] = xor <4 x i16> %a, %b // CHECK: ret <4 x i16> [[XOR_I]] uint16x4_t test_veor_u16(uint16x4_t a, uint16x4_t b) { return veor_u16(a, b); } -// CHECK-LABEL: define <8 x i16> @test_veorq_u16(<8 x i16> %a, <8 x i16> %b) #1 { +// CHECK-LABEL: define frozen <8 x i16> @test_veorq_u16(<8 x i16> frozen %a, <8 x i16> frozen %b) #1 { // CHECK: [[XOR_I:%.*]] = xor <8 x i16> %a, %b // CHECK: ret <8 x i16> [[XOR_I]] uint16x8_t test_veorq_u16(uint16x8_t a, uint16x8_t b) { return veorq_u16(a, b); } -// CHECK-LABEL: define <2 x i32> @test_veor_u32(<2 x i32> %a, <2 x i32> %b) #0 { +// CHECK-LABEL: define frozen <2 x i32> @test_veor_u32(<2 x i32> frozen %a, <2 x i32> frozen %b) #0 { // CHECK: [[XOR_I:%.*]] = xor <2 x i32> %a, %b // CHECK: ret <2 x i32> [[XOR_I]] uint32x2_t test_veor_u32(uint32x2_t a, uint32x2_t b) { return veor_u32(a, b); } -// CHECK-LABEL: define <4 x i32> @test_veorq_u32(<4 x i32> %a, <4 x i32> %b) #1 { +// CHECK-LABEL: define frozen <4 x i32> @test_veorq_u32(<4 x i32> frozen %a, <4 x i32> frozen %b) #1 { // CHECK: [[XOR_I:%.*]] = xor <4 x i32> %a, %b // CHECK: ret <4 x i32> [[XOR_I]] uint32x4_t test_veorq_u32(uint32x4_t a, uint32x4_t b) { return veorq_u32(a, b); } -// CHECK-LABEL: define <1 x i64> @test_veor_u64(<1 x i64> %a, <1 x i64> %b) #0 { +// CHECK-LABEL: define frozen <1 x i64> @test_veor_u64(<1 x i64> frozen %a, <1 x i64> frozen %b) #0 { // CHECK: [[XOR_I:%.*]] = xor <1 x i64> %a, %b // CHECK: ret <1 x i64> [[XOR_I]] uint64x1_t test_veor_u64(uint64x1_t a, uint64x1_t b) { return veor_u64(a, b); } -// CHECK-LABEL: define <2 x i64> @test_veorq_u64(<2 x i64> %a, <2 x i64> %b) #1 { +// CHECK-LABEL: define frozen <2 x i64> @test_veorq_u64(<2 x i64> frozen %a, <2 x i64> frozen %b) #1 { // CHECK: [[XOR_I:%.*]] = xor <2 x i64> %a, %b // CHECK: ret <2 x i64> [[XOR_I]] uint64x2_t test_veorq_u64(uint64x2_t a, uint64x2_t b) { return veorq_u64(a, b); } -// CHECK-LABEL: define <8 x i8> @test_vbic_s8(<8 x i8> %a, <8 x i8> %b) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vbic_s8(<8 x i8> frozen %a, <8 x i8> frozen %b) #0 { // CHECK: [[NEG_I:%.*]] = xor <8 x i8> %b, // CHECK: [[AND_I:%.*]] = and <8 x i8> %a, [[NEG_I]] // CHECK: ret <8 x i8> [[AND_I]] @@ -348,7 +348,7 @@ return vbic_s8(a, b); } -// CHECK-LABEL: define <16 x i8> @test_vbicq_s8(<16 x i8> %a, <16 x i8> %b) #1 { +// CHECK-LABEL: define frozen <16 x i8> @test_vbicq_s8(<16 x i8> frozen %a, <16 x i8> frozen %b) #1 { // CHECK: [[NEG_I:%.*]] = xor <16 x i8> %b, // CHECK: [[AND_I:%.*]] = and <16 x i8> %a, [[NEG_I]] // CHECK: ret <16 x i8> [[AND_I]] @@ -356,7 +356,7 @@ return vbicq_s8(a, b); } -// CHECK-LABEL: define <4 x i16> @test_vbic_s16(<4 x i16> %a, <4 x i16> %b) #0 { +// CHECK-LABEL: define frozen <4 x i16> @test_vbic_s16(<4 x i16> frozen %a, <4 x i16> frozen %b) #0 { // CHECK: [[NEG_I:%.*]] = xor <4 x i16> %b, // CHECK: [[AND_I:%.*]] = and <4 x i16> %a, [[NEG_I]] // CHECK: ret <4 x i16> [[AND_I]] @@ -364,7 +364,7 @@ return vbic_s16(a, b); } -// CHECK-LABEL: define <8 x i16> @test_vbicq_s16(<8 x i16> %a, <8 x i16> %b) #1 { +// CHECK-LABEL: define frozen <8 x i16> @test_vbicq_s16(<8 x i16> frozen %a, <8 x i16> frozen %b) #1 { // CHECK: [[NEG_I:%.*]] = xor <8 x i16> %b, // CHECK: [[AND_I:%.*]] = and <8 x i16> %a, [[NEG_I]] // CHECK: ret <8 x i16> [[AND_I]] @@ -372,7 +372,7 @@ return vbicq_s16(a, b); } -// CHECK-LABEL: define <2 x i32> @test_vbic_s32(<2 x i32> %a, <2 x i32> %b) #0 { +// CHECK-LABEL: define frozen <2 x i32> @test_vbic_s32(<2 x i32> frozen %a, <2 x i32> frozen %b) #0 { // CHECK: [[NEG_I:%.*]] = xor <2 x i32> %b, // CHECK: [[AND_I:%.*]] = and <2 x i32> %a, [[NEG_I]] // CHECK: ret <2 x i32> [[AND_I]] @@ -380,7 +380,7 @@ return vbic_s32(a, b); } -// CHECK-LABEL: define <4 x i32> @test_vbicq_s32(<4 x i32> %a, <4 x i32> %b) #1 { +// CHECK-LABEL: define frozen <4 x i32> @test_vbicq_s32(<4 x i32> frozen %a, <4 x i32> frozen %b) #1 { // CHECK: [[NEG_I:%.*]] = xor <4 x i32> %b, // CHECK: [[AND_I:%.*]] = and <4 x i32> %a, [[NEG_I]] // CHECK: ret <4 x i32> [[AND_I]] @@ -388,7 +388,7 @@ return vbicq_s32(a, b); } -// CHECK-LABEL: define <1 x i64> @test_vbic_s64(<1 x i64> %a, <1 x i64> %b) #0 { +// CHECK-LABEL: define frozen <1 x i64> @test_vbic_s64(<1 x i64> frozen %a, <1 x i64> frozen %b) #0 { // CHECK: [[NEG_I:%.*]] = xor <1 x i64> %b, // CHECK: [[AND_I:%.*]] = and <1 x i64> %a, [[NEG_I]] // CHECK: ret <1 x i64> [[AND_I]] @@ -396,7 +396,7 @@ return vbic_s64(a, b); } -// CHECK-LABEL: define <2 x i64> @test_vbicq_s64(<2 x i64> %a, <2 x i64> %b) #1 { +// CHECK-LABEL: define frozen <2 x i64> @test_vbicq_s64(<2 x i64> frozen %a, <2 x i64> frozen %b) #1 { // CHECK: [[NEG_I:%.*]] = xor <2 x i64> %b, // CHECK: [[AND_I:%.*]] = and <2 x i64> %a, [[NEG_I]] // CHECK: ret <2 x i64> [[AND_I]] @@ -404,7 +404,7 @@ return vbicq_s64(a, b); } -// CHECK-LABEL: define <8 x i8> @test_vbic_u8(<8 x i8> %a, <8 x i8> %b) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vbic_u8(<8 x i8> frozen %a, <8 x i8> frozen %b) #0 { // CHECK: [[NEG_I:%.*]] = xor <8 x i8> %b, // CHECK: [[AND_I:%.*]] = and <8 x i8> %a, [[NEG_I]] // CHECK: ret <8 x i8> [[AND_I]] @@ -412,7 +412,7 @@ return vbic_u8(a, b); } -// CHECK-LABEL: define <16 x i8> @test_vbicq_u8(<16 x i8> %a, <16 x i8> %b) #1 { +// CHECK-LABEL: define frozen <16 x i8> @test_vbicq_u8(<16 x i8> frozen %a, <16 x i8> frozen %b) #1 { // CHECK: [[NEG_I:%.*]] = xor <16 x i8> %b, // CHECK: [[AND_I:%.*]] = and <16 x i8> %a, [[NEG_I]] // CHECK: ret <16 x i8> [[AND_I]] @@ -420,7 +420,7 @@ return vbicq_u8(a, b); } -// CHECK-LABEL: define <4 x i16> @test_vbic_u16(<4 x i16> %a, <4 x i16> %b) #0 { +// CHECK-LABEL: define frozen <4 x i16> @test_vbic_u16(<4 x i16> frozen %a, <4 x i16> frozen %b) #0 { // CHECK: [[NEG_I:%.*]] = xor <4 x i16> %b, // CHECK: [[AND_I:%.*]] = and <4 x i16> %a, [[NEG_I]] // CHECK: ret <4 x i16> [[AND_I]] @@ -428,7 +428,7 @@ return vbic_u16(a, b); } -// CHECK-LABEL: define <8 x i16> @test_vbicq_u16(<8 x i16> %a, <8 x i16> %b) #1 { +// CHECK-LABEL: define frozen <8 x i16> @test_vbicq_u16(<8 x i16> frozen %a, <8 x i16> frozen %b) #1 { // CHECK: [[NEG_I:%.*]] = xor <8 x i16> %b, // CHECK: [[AND_I:%.*]] = and <8 x i16> %a, [[NEG_I]] // CHECK: ret <8 x i16> [[AND_I]] @@ -436,7 +436,7 @@ return vbicq_u16(a, b); } -// CHECK-LABEL: define <2 x i32> @test_vbic_u32(<2 x i32> %a, <2 x i32> %b) #0 { +// CHECK-LABEL: define frozen <2 x i32> @test_vbic_u32(<2 x i32> frozen %a, <2 x i32> frozen %b) #0 { // CHECK: [[NEG_I:%.*]] = xor <2 x i32> %b, // CHECK: [[AND_I:%.*]] = and <2 x i32> %a, [[NEG_I]] // CHECK: ret <2 x i32> [[AND_I]] @@ -444,7 +444,7 @@ return vbic_u32(a, b); } -// CHECK-LABEL: define <4 x i32> @test_vbicq_u32(<4 x i32> %a, <4 x i32> %b) #1 { +// CHECK-LABEL: define frozen <4 x i32> @test_vbicq_u32(<4 x i32> frozen %a, <4 x i32> frozen %b) #1 { // CHECK: [[NEG_I:%.*]] = xor <4 x i32> %b, // CHECK: [[AND_I:%.*]] = and <4 x i32> %a, [[NEG_I]] // CHECK: ret <4 x i32> [[AND_I]] @@ -452,7 +452,7 @@ return vbicq_u32(a, b); } -// CHECK-LABEL: define <1 x i64> @test_vbic_u64(<1 x i64> %a, <1 x i64> %b) #0 { +// CHECK-LABEL: define frozen <1 x i64> @test_vbic_u64(<1 x i64> frozen %a, <1 x i64> frozen %b) #0 { // CHECK: [[NEG_I:%.*]] = xor <1 x i64> %b, // CHECK: [[AND_I:%.*]] = and <1 x i64> %a, [[NEG_I]] // CHECK: ret <1 x i64> [[AND_I]] @@ -460,7 +460,7 @@ return vbic_u64(a, b); } -// CHECK-LABEL: define <2 x i64> @test_vbicq_u64(<2 x i64> %a, <2 x i64> %b) #1 { +// CHECK-LABEL: define frozen <2 x i64> @test_vbicq_u64(<2 x i64> frozen %a, <2 x i64> frozen %b) #1 { // CHECK: [[NEG_I:%.*]] = xor <2 x i64> %b, // CHECK: [[AND_I:%.*]] = and <2 x i64> %a, [[NEG_I]] // CHECK: ret <2 x i64> [[AND_I]] @@ -468,7 +468,7 @@ return vbicq_u64(a, b); } -// CHECK-LABEL: define <8 x i8> @test_vorn_s8(<8 x i8> %a, <8 x i8> %b) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vorn_s8(<8 x i8> frozen %a, <8 x i8> frozen %b) #0 { // CHECK: [[NEG_I:%.*]] = xor <8 x i8> %b, // CHECK: [[OR_I:%.*]] = or <8 x i8> %a, [[NEG_I]] // CHECK: ret <8 x i8> [[OR_I]] @@ -476,7 +476,7 @@ return vorn_s8(a, b); } -// CHECK-LABEL: define <16 x i8> @test_vornq_s8(<16 x i8> %a, <16 x i8> %b) #1 { +// CHECK-LABEL: define frozen <16 x i8> @test_vornq_s8(<16 x i8> frozen %a, <16 x i8> frozen %b) #1 { // CHECK: [[NEG_I:%.*]] = xor <16 x i8> %b, // CHECK: [[OR_I:%.*]] = or <16 x i8> %a, [[NEG_I]] // CHECK: ret <16 x i8> [[OR_I]] @@ -484,7 +484,7 @@ return vornq_s8(a, b); } -// CHECK-LABEL: define <4 x i16> @test_vorn_s16(<4 x i16> %a, <4 x i16> %b) #0 { +// CHECK-LABEL: define frozen <4 x i16> @test_vorn_s16(<4 x i16> frozen %a, <4 x i16> frozen %b) #0 { // CHECK: [[NEG_I:%.*]] = xor <4 x i16> %b, // CHECK: [[OR_I:%.*]] = or <4 x i16> %a, [[NEG_I]] // CHECK: ret <4 x i16> [[OR_I]] @@ -492,7 +492,7 @@ return vorn_s16(a, b); } -// CHECK-LABEL: define <8 x i16> @test_vornq_s16(<8 x i16> %a, <8 x i16> %b) #1 { +// CHECK-LABEL: define frozen <8 x i16> @test_vornq_s16(<8 x i16> frozen %a, <8 x i16> frozen %b) #1 { // CHECK: [[NEG_I:%.*]] = xor <8 x i16> %b, // CHECK: [[OR_I:%.*]] = or <8 x i16> %a, [[NEG_I]] // CHECK: ret <8 x i16> [[OR_I]] @@ -500,7 +500,7 @@ return vornq_s16(a, b); } -// CHECK-LABEL: define <2 x i32> @test_vorn_s32(<2 x i32> %a, <2 x i32> %b) #0 { +// CHECK-LABEL: define frozen <2 x i32> @test_vorn_s32(<2 x i32> frozen %a, <2 x i32> frozen %b) #0 { // CHECK: [[NEG_I:%.*]] = xor <2 x i32> %b, // CHECK: [[OR_I:%.*]] = or <2 x i32> %a, [[NEG_I]] // CHECK: ret <2 x i32> [[OR_I]] @@ -508,7 +508,7 @@ return vorn_s32(a, b); } -// CHECK-LABEL: define <4 x i32> @test_vornq_s32(<4 x i32> %a, <4 x i32> %b) #1 { +// CHECK-LABEL: define frozen <4 x i32> @test_vornq_s32(<4 x i32> frozen %a, <4 x i32> frozen %b) #1 { // CHECK: [[NEG_I:%.*]] = xor <4 x i32> %b, // CHECK: [[OR_I:%.*]] = or <4 x i32> %a, [[NEG_I]] // CHECK: ret <4 x i32> [[OR_I]] @@ -516,7 +516,7 @@ return vornq_s32(a, b); } -// CHECK-LABEL: define <1 x i64> @test_vorn_s64(<1 x i64> %a, <1 x i64> %b) #0 { +// CHECK-LABEL: define frozen <1 x i64> @test_vorn_s64(<1 x i64> frozen %a, <1 x i64> frozen %b) #0 { // CHECK: [[NEG_I:%.*]] = xor <1 x i64> %b, // CHECK: [[OR_I:%.*]] = or <1 x i64> %a, [[NEG_I]] // CHECK: ret <1 x i64> [[OR_I]] @@ -524,7 +524,7 @@ return vorn_s64(a, b); } -// CHECK-LABEL: define <2 x i64> @test_vornq_s64(<2 x i64> %a, <2 x i64> %b) #1 { +// CHECK-LABEL: define frozen <2 x i64> @test_vornq_s64(<2 x i64> frozen %a, <2 x i64> frozen %b) #1 { // CHECK: [[NEG_I:%.*]] = xor <2 x i64> %b, // CHECK: [[OR_I:%.*]] = or <2 x i64> %a, [[NEG_I]] // CHECK: ret <2 x i64> [[OR_I]] @@ -532,7 +532,7 @@ return vornq_s64(a, b); } -// CHECK-LABEL: define <8 x i8> @test_vorn_u8(<8 x i8> %a, <8 x i8> %b) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vorn_u8(<8 x i8> frozen %a, <8 x i8> frozen %b) #0 { // CHECK: [[NEG_I:%.*]] = xor <8 x i8> %b, // CHECK: [[OR_I:%.*]] = or <8 x i8> %a, [[NEG_I]] // CHECK: ret <8 x i8> [[OR_I]] @@ -540,7 +540,7 @@ return vorn_u8(a, b); } -// CHECK-LABEL: define <16 x i8> @test_vornq_u8(<16 x i8> %a, <16 x i8> %b) #1 { +// CHECK-LABEL: define frozen <16 x i8> @test_vornq_u8(<16 x i8> frozen %a, <16 x i8> frozen %b) #1 { // CHECK: [[NEG_I:%.*]] = xor <16 x i8> %b, // CHECK: [[OR_I:%.*]] = or <16 x i8> %a, [[NEG_I]] // CHECK: ret <16 x i8> [[OR_I]] @@ -548,7 +548,7 @@ return vornq_u8(a, b); } -// CHECK-LABEL: define <4 x i16> @test_vorn_u16(<4 x i16> %a, <4 x i16> %b) #0 { +// CHECK-LABEL: define frozen <4 x i16> @test_vorn_u16(<4 x i16> frozen %a, <4 x i16> frozen %b) #0 { // CHECK: [[NEG_I:%.*]] = xor <4 x i16> %b, // CHECK: [[OR_I:%.*]] = or <4 x i16> %a, [[NEG_I]] // CHECK: ret <4 x i16> [[OR_I]] @@ -556,7 +556,7 @@ return vorn_u16(a, b); } -// CHECK-LABEL: define <8 x i16> @test_vornq_u16(<8 x i16> %a, <8 x i16> %b) #1 { +// CHECK-LABEL: define frozen <8 x i16> @test_vornq_u16(<8 x i16> frozen %a, <8 x i16> frozen %b) #1 { // CHECK: [[NEG_I:%.*]] = xor <8 x i16> %b, // CHECK: [[OR_I:%.*]] = or <8 x i16> %a, [[NEG_I]] // CHECK: ret <8 x i16> [[OR_I]] @@ -564,7 +564,7 @@ return vornq_u16(a, b); } -// CHECK-LABEL: define <2 x i32> @test_vorn_u32(<2 x i32> %a, <2 x i32> %b) #0 { +// CHECK-LABEL: define frozen <2 x i32> @test_vorn_u32(<2 x i32> frozen %a, <2 x i32> frozen %b) #0 { // CHECK: [[NEG_I:%.*]] = xor <2 x i32> %b, // CHECK: [[OR_I:%.*]] = or <2 x i32> %a, [[NEG_I]] // CHECK: ret <2 x i32> [[OR_I]] @@ -572,7 +572,7 @@ return vorn_u32(a, b); } -// CHECK-LABEL: define <4 x i32> @test_vornq_u32(<4 x i32> %a, <4 x i32> %b) #1 { +// CHECK-LABEL: define frozen <4 x i32> @test_vornq_u32(<4 x i32> frozen %a, <4 x i32> frozen %b) #1 { // CHECK: [[NEG_I:%.*]] = xor <4 x i32> %b, // CHECK: [[OR_I:%.*]] = or <4 x i32> %a, [[NEG_I]] // CHECK: ret <4 x i32> [[OR_I]] @@ -580,7 +580,7 @@ return vornq_u32(a, b); } -// CHECK-LABEL: define <1 x i64> @test_vorn_u64(<1 x i64> %a, <1 x i64> %b) #0 { +// CHECK-LABEL: define frozen <1 x i64> @test_vorn_u64(<1 x i64> frozen %a, <1 x i64> frozen %b) #0 { // CHECK: [[NEG_I:%.*]] = xor <1 x i64> %b, // CHECK: [[OR_I:%.*]] = or <1 x i64> %a, [[NEG_I]] // CHECK: ret <1 x i64> [[OR_I]] @@ -588,7 +588,7 @@ return vorn_u64(a, b); } -// CHECK-LABEL: define <2 x i64> @test_vornq_u64(<2 x i64> %a, <2 x i64> %b) #1 { +// CHECK-LABEL: define frozen <2 x i64> @test_vornq_u64(<2 x i64> frozen %a, <2 x i64> frozen %b) #1 { // CHECK: [[NEG_I:%.*]] = xor <2 x i64> %b, // CHECK: [[OR_I:%.*]] = or <2 x i64> %a, [[NEG_I]] // CHECK: ret <2 x i64> [[OR_I]] diff --git a/clang/test/CodeGen/aarch64-neon-across.c b/clang/test/CodeGen/aarch64-neon-across.c --- a/clang/test/CodeGen/aarch64-neon-across.c +++ b/clang/test/CodeGen/aarch64-neon-across.c @@ -5,7 +5,7 @@ #include -// CHECK-LABEL: define i16 @test_vaddlv_s8(<8 x i8> %a) #0 { +// CHECK-LABEL: define frozen i16 @test_vaddlv_s8(<8 x i8> frozen %a) #0 { // CHECK: [[VADDLV_I:%.*]] = call i32 @llvm.aarch64.neon.saddlv.i32.v8i8(<8 x i8> %a) #3 // CHECK: [[TMP0:%.*]] = trunc i32 [[VADDLV_I]] to i16 // CHECK: ret i16 [[TMP0]] @@ -13,14 +13,14 @@ return vaddlv_s8(a); } -// CHECK-LABEL: define i32 @test_vaddlv_s16(<4 x i16> %a) #0 { +// CHECK-LABEL: define frozen i32 @test_vaddlv_s16(<4 x i16> frozen %a) #0 { // CHECK: [[VADDLV_I:%.*]] = call i32 @llvm.aarch64.neon.saddlv.i32.v4i16(<4 x i16> %a) #3 // CHECK: ret i32 [[VADDLV_I]] int32_t test_vaddlv_s16(int16x4_t a) { return vaddlv_s16(a); } -// CHECK-LABEL: define i16 @test_vaddlv_u8(<8 x i8> %a) #0 { +// CHECK-LABEL: define frozen i16 @test_vaddlv_u8(<8 x i8> frozen %a) #0 { // CHECK: [[VADDLV_I:%.*]] = call i32 @llvm.aarch64.neon.uaddlv.i32.v8i8(<8 x i8> %a) #3 // CHECK: [[TMP0:%.*]] = trunc i32 [[VADDLV_I]] to i16 // CHECK: ret i16 [[TMP0]] @@ -28,14 +28,14 @@ return vaddlv_u8(a); } -// CHECK-LABEL: define i32 @test_vaddlv_u16(<4 x i16> %a) #0 { +// CHECK-LABEL: define frozen i32 @test_vaddlv_u16(<4 x i16> frozen %a) #0 { // CHECK: [[VADDLV_I:%.*]] = call i32 @llvm.aarch64.neon.uaddlv.i32.v4i16(<4 x i16> %a) #3 // CHECK: ret i32 [[VADDLV_I]] uint32_t test_vaddlv_u16(uint16x4_t a) { return vaddlv_u16(a); } -// CHECK-LABEL: define i16 @test_vaddlvq_s8(<16 x i8> %a) #1 { +// CHECK-LABEL: define frozen i16 @test_vaddlvq_s8(<16 x i8> frozen %a) #1 { // CHECK: [[VADDLV_I:%.*]] = call i32 @llvm.aarch64.neon.saddlv.i32.v16i8(<16 x i8> %a) #3 // CHECK: [[TMP0:%.*]] = trunc i32 [[VADDLV_I]] to i16 // CHECK: ret i16 [[TMP0]] @@ -43,21 +43,21 @@ return vaddlvq_s8(a); } -// CHECK-LABEL: define i32 @test_vaddlvq_s16(<8 x i16> %a) #1 { +// CHECK-LABEL: define frozen i32 @test_vaddlvq_s16(<8 x i16> frozen %a) #1 { // CHECK: [[VADDLV_I:%.*]] = call i32 @llvm.aarch64.neon.saddlv.i32.v8i16(<8 x i16> %a) #3 // CHECK: ret i32 [[VADDLV_I]] int32_t test_vaddlvq_s16(int16x8_t a) { return vaddlvq_s16(a); } -// CHECK-LABEL: define i64 @test_vaddlvq_s32(<4 x i32> %a) #1 { +// CHECK-LABEL: define frozen i64 @test_vaddlvq_s32(<4 x i32> frozen %a) #1 { // CHECK: [[VADDLVQ_S32_I:%.*]] = call i64 @llvm.aarch64.neon.saddlv.i64.v4i32(<4 x i32> %a) #3 // CHECK: ret i64 [[VADDLVQ_S32_I]] int64_t test_vaddlvq_s32(int32x4_t a) { return vaddlvq_s32(a); } -// CHECK-LABEL: define i16 @test_vaddlvq_u8(<16 x i8> %a) #1 { +// CHECK-LABEL: define frozen i16 @test_vaddlvq_u8(<16 x i8> frozen %a) #1 { // CHECK: [[VADDLV_I:%.*]] = call i32 @llvm.aarch64.neon.uaddlv.i32.v16i8(<16 x i8> %a) #3 // CHECK: [[TMP0:%.*]] = trunc i32 [[VADDLV_I]] to i16 // CHECK: ret i16 [[TMP0]] @@ -65,21 +65,21 @@ return vaddlvq_u8(a); } -// CHECK-LABEL: define i32 @test_vaddlvq_u16(<8 x i16> %a) #1 { +// CHECK-LABEL: define frozen i32 @test_vaddlvq_u16(<8 x i16> frozen %a) #1 { // CHECK: [[VADDLV_I:%.*]] = call i32 @llvm.aarch64.neon.uaddlv.i32.v8i16(<8 x i16> %a) #3 // CHECK: ret i32 [[VADDLV_I]] uint32_t test_vaddlvq_u16(uint16x8_t a) { return vaddlvq_u16(a); } -// CHECK-LABEL: define i64 @test_vaddlvq_u32(<4 x i32> %a) #1 { +// CHECK-LABEL: define frozen i64 @test_vaddlvq_u32(<4 x i32> frozen %a) #1 { // CHECK: [[VADDLVQ_U32_I:%.*]] = call i64 @llvm.aarch64.neon.uaddlv.i64.v4i32(<4 x i32> %a) #3 // CHECK: ret i64 [[VADDLVQ_U32_I]] uint64_t test_vaddlvq_u32(uint32x4_t a) { return vaddlvq_u32(a); } -// CHECK-LABEL: define i8 @test_vmaxv_s8(<8 x i8> %a) #0 { +// CHECK-LABEL: define frozen i8 @test_vmaxv_s8(<8 x i8> frozen %a) #0 { // CHECK: [[VMAXV_I:%.*]] = call i32 @llvm.aarch64.neon.smaxv.i32.v8i8(<8 x i8> %a) #3 // CHECK: [[TMP0:%.*]] = trunc i32 [[VMAXV_I]] to i8 // CHECK: ret i8 [[TMP0]] @@ -87,7 +87,7 @@ return vmaxv_s8(a); } -// CHECK-LABEL: define i16 @test_vmaxv_s16(<4 x i16> %a) #0 { +// CHECK-LABEL: define frozen i16 @test_vmaxv_s16(<4 x i16> frozen %a) #0 { // CHECK: [[VMAXV_I:%.*]] = call i32 @llvm.aarch64.neon.smaxv.i32.v4i16(<4 x i16> %a) #3 // CHECK: [[TMP2:%.*]] = trunc i32 [[VMAXV_I]] to i16 // CHECK: ret i16 [[TMP2]] @@ -95,7 +95,7 @@ return vmaxv_s16(a); } -// CHECK-LABEL: define i8 @test_vmaxv_u8(<8 x i8> %a) #0 { +// CHECK-LABEL: define frozen i8 @test_vmaxv_u8(<8 x i8> frozen %a) #0 { // CHECK: [[VMAXV_I:%.*]] = call i32 @llvm.aarch64.neon.umaxv.i32.v8i8(<8 x i8> %a) #3 // CHECK: [[TMP0:%.*]] = trunc i32 [[VMAXV_I]] to i8 // CHECK: ret i8 [[TMP0]] @@ -103,7 +103,7 @@ return vmaxv_u8(a); } -// CHECK-LABEL: define i16 @test_vmaxv_u16(<4 x i16> %a) #0 { +// CHECK-LABEL: define frozen i16 @test_vmaxv_u16(<4 x i16> frozen %a) #0 { // CHECK: [[VMAXV_I:%.*]] = call i32 @llvm.aarch64.neon.umaxv.i32.v4i16(<4 x i16> %a) #3 // CHECK: [[TMP2:%.*]] = trunc i32 [[VMAXV_I]] to i16 // CHECK: ret i16 [[TMP2]] @@ -111,7 +111,7 @@ return vmaxv_u16(a); } -// CHECK-LABEL: define i8 @test_vmaxvq_s8(<16 x i8> %a) #1 { +// CHECK-LABEL: define frozen i8 @test_vmaxvq_s8(<16 x i8> frozen %a) #1 { // CHECK: [[VMAXV_I:%.*]] = call i32 @llvm.aarch64.neon.smaxv.i32.v16i8(<16 x i8> %a) #3 // CHECK: [[TMP0:%.*]] = trunc i32 [[VMAXV_I]] to i8 // CHECK: ret i8 [[TMP0]] @@ -119,7 +119,7 @@ return vmaxvq_s8(a); } -// CHECK-LABEL: define i16 @test_vmaxvq_s16(<8 x i16> %a) #1 { +// CHECK-LABEL: define frozen i16 @test_vmaxvq_s16(<8 x i16> frozen %a) #1 { // CHECK: [[VMAXV_I:%.*]] = call i32 @llvm.aarch64.neon.smaxv.i32.v8i16(<8 x i16> %a) #3 // CHECK: [[TMP2:%.*]] = trunc i32 [[VMAXV_I]] to i16 // CHECK: ret i16 [[TMP2]] @@ -127,14 +127,14 @@ return vmaxvq_s16(a); } -// CHECK-LABEL: define i32 @test_vmaxvq_s32(<4 x i32> %a) #1 { +// CHECK-LABEL: define frozen i32 @test_vmaxvq_s32(<4 x i32> frozen %a) #1 { // CHECK: [[VMAXVQ_S32_I:%.*]] = call i32 @llvm.aarch64.neon.smaxv.i32.v4i32(<4 x i32> %a) #3 // CHECK: ret i32 [[VMAXVQ_S32_I]] int32_t test_vmaxvq_s32(int32x4_t a) { return vmaxvq_s32(a); } -// CHECK-LABEL: define i8 @test_vmaxvq_u8(<16 x i8> %a) #1 { +// CHECK-LABEL: define frozen i8 @test_vmaxvq_u8(<16 x i8> frozen %a) #1 { // CHECK: [[VMAXV_I:%.*]] = call i32 @llvm.aarch64.neon.umaxv.i32.v16i8(<16 x i8> %a) #3 // CHECK: [[TMP0:%.*]] = trunc i32 [[VMAXV_I]] to i8 // CHECK: ret i8 [[TMP0]] @@ -142,7 +142,7 @@ return vmaxvq_u8(a); } -// CHECK-LABEL: define i16 @test_vmaxvq_u16(<8 x i16> %a) #1 { +// CHECK-LABEL: define frozen i16 @test_vmaxvq_u16(<8 x i16> frozen %a) #1 { // CHECK: [[VMAXV_I:%.*]] = call i32 @llvm.aarch64.neon.umaxv.i32.v8i16(<8 x i16> %a) #3 // CHECK: [[TMP2:%.*]] = trunc i32 [[VMAXV_I]] to i16 // CHECK: ret i16 [[TMP2]] @@ -150,14 +150,14 @@ return vmaxvq_u16(a); } -// CHECK-LABEL: define i32 @test_vmaxvq_u32(<4 x i32> %a) #1 { +// CHECK-LABEL: define frozen i32 @test_vmaxvq_u32(<4 x i32> frozen %a) #1 { // CHECK: [[VMAXVQ_U32_I:%.*]] = call i32 @llvm.aarch64.neon.umaxv.i32.v4i32(<4 x i32> %a) #3 // CHECK: ret i32 [[VMAXVQ_U32_I]] uint32_t test_vmaxvq_u32(uint32x4_t a) { return vmaxvq_u32(a); } -// CHECK-LABEL: define i8 @test_vminv_s8(<8 x i8> %a) #0 { +// CHECK-LABEL: define frozen i8 @test_vminv_s8(<8 x i8> frozen %a) #0 { // CHECK: [[VMINV_I:%.*]] = call i32 @llvm.aarch64.neon.sminv.i32.v8i8(<8 x i8> %a) #3 // CHECK: [[TMP0:%.*]] = trunc i32 [[VMINV_I]] to i8 // CHECK: ret i8 [[TMP0]] @@ -165,7 +165,7 @@ return vminv_s8(a); } -// CHECK-LABEL: define i16 @test_vminv_s16(<4 x i16> %a) #0 { +// CHECK-LABEL: define frozen i16 @test_vminv_s16(<4 x i16> frozen %a) #0 { // CHECK: [[VMINV_I:%.*]] = call i32 @llvm.aarch64.neon.sminv.i32.v4i16(<4 x i16> %a) #3 // CHECK: [[TMP2:%.*]] = trunc i32 [[VMINV_I]] to i16 // CHECK: ret i16 [[TMP2]] @@ -173,7 +173,7 @@ return vminv_s16(a); } -// CHECK-LABEL: define i8 @test_vminv_u8(<8 x i8> %a) #0 { +// CHECK-LABEL: define frozen i8 @test_vminv_u8(<8 x i8> frozen %a) #0 { // CHECK: [[VMINV_I:%.*]] = call i32 @llvm.aarch64.neon.uminv.i32.v8i8(<8 x i8> %a) #3 // CHECK: [[TMP0:%.*]] = trunc i32 [[VMINV_I]] to i8 // CHECK: ret i8 [[TMP0]] @@ -181,7 +181,7 @@ return vminv_u8(a); } -// CHECK-LABEL: define i16 @test_vminv_u16(<4 x i16> %a) #0 { +// CHECK-LABEL: define frozen i16 @test_vminv_u16(<4 x i16> frozen %a) #0 { // CHECK: [[VMINV_I:%.*]] = call i32 @llvm.aarch64.neon.uminv.i32.v4i16(<4 x i16> %a) #3 // CHECK: [[TMP2:%.*]] = trunc i32 [[VMINV_I]] to i16 // CHECK: ret i16 [[TMP2]] @@ -189,7 +189,7 @@ return vminv_u16(a); } -// CHECK-LABEL: define i8 @test_vminvq_s8(<16 x i8> %a) #1 { +// CHECK-LABEL: define frozen i8 @test_vminvq_s8(<16 x i8> frozen %a) #1 { // CHECK: [[VMINV_I:%.*]] = call i32 @llvm.aarch64.neon.sminv.i32.v16i8(<16 x i8> %a) #3 // CHECK: [[TMP0:%.*]] = trunc i32 [[VMINV_I]] to i8 // CHECK: ret i8 [[TMP0]] @@ -197,7 +197,7 @@ return vminvq_s8(a); } -// CHECK-LABEL: define i16 @test_vminvq_s16(<8 x i16> %a) #1 { +// CHECK-LABEL: define frozen i16 @test_vminvq_s16(<8 x i16> frozen %a) #1 { // CHECK: [[VMINV_I:%.*]] = call i32 @llvm.aarch64.neon.sminv.i32.v8i16(<8 x i16> %a) #3 // CHECK: [[TMP2:%.*]] = trunc i32 [[VMINV_I]] to i16 // CHECK: ret i16 [[TMP2]] @@ -205,14 +205,14 @@ return vminvq_s16(a); } -// CHECK-LABEL: define i32 @test_vminvq_s32(<4 x i32> %a) #1 { +// CHECK-LABEL: define frozen i32 @test_vminvq_s32(<4 x i32> frozen %a) #1 { // CHECK: [[VMINVQ_S32_I:%.*]] = call i32 @llvm.aarch64.neon.sminv.i32.v4i32(<4 x i32> %a) #3 // CHECK: ret i32 [[VMINVQ_S32_I]] int32_t test_vminvq_s32(int32x4_t a) { return vminvq_s32(a); } -// CHECK-LABEL: define i8 @test_vminvq_u8(<16 x i8> %a) #1 { +// CHECK-LABEL: define frozen i8 @test_vminvq_u8(<16 x i8> frozen %a) #1 { // CHECK: [[VMINV_I:%.*]] = call i32 @llvm.aarch64.neon.uminv.i32.v16i8(<16 x i8> %a) #3 // CHECK: [[TMP0:%.*]] = trunc i32 [[VMINV_I]] to i8 // CHECK: ret i8 [[TMP0]] @@ -220,7 +220,7 @@ return vminvq_u8(a); } -// CHECK-LABEL: define i16 @test_vminvq_u16(<8 x i16> %a) #1 { +// CHECK-LABEL: define frozen i16 @test_vminvq_u16(<8 x i16> frozen %a) #1 { // CHECK: [[VMINV_I:%.*]] = call i32 @llvm.aarch64.neon.uminv.i32.v8i16(<8 x i16> %a) #3 // CHECK: [[TMP2:%.*]] = trunc i32 [[VMINV_I]] to i16 // CHECK: ret i16 [[TMP2]] @@ -228,14 +228,14 @@ return vminvq_u16(a); } -// CHECK-LABEL: define i32 @test_vminvq_u32(<4 x i32> %a) #1 { +// CHECK-LABEL: define frozen i32 @test_vminvq_u32(<4 x i32> frozen %a) #1 { // CHECK: [[VMINVQ_U32_I:%.*]] = call i32 @llvm.aarch64.neon.uminv.i32.v4i32(<4 x i32> %a) #3 // CHECK: ret i32 [[VMINVQ_U32_I]] uint32_t test_vminvq_u32(uint32x4_t a) { return vminvq_u32(a); } -// CHECK-LABEL: define i8 @test_vaddv_s8(<8 x i8> %a) #0 { +// CHECK-LABEL: define frozen i8 @test_vaddv_s8(<8 x i8> frozen %a) #0 { // CHECK: [[VADDV_I:%.*]] = call i32 @llvm.aarch64.neon.saddv.i32.v8i8(<8 x i8> %a) #3 // CHECK: [[TMP0:%.*]] = trunc i32 [[VADDV_I]] to i8 // CHECK: ret i8 [[TMP0]] @@ -243,7 +243,7 @@ return vaddv_s8(a); } -// CHECK-LABEL: define i16 @test_vaddv_s16(<4 x i16> %a) #0 { +// CHECK-LABEL: define frozen i16 @test_vaddv_s16(<4 x i16> frozen %a) #0 { // CHECK: [[VADDV_I:%.*]] = call i32 @llvm.aarch64.neon.saddv.i32.v4i16(<4 x i16> %a) #3 // CHECK: [[TMP2:%.*]] = trunc i32 [[VADDV_I]] to i16 // CHECK: ret i16 [[TMP2]] @@ -251,7 +251,7 @@ return vaddv_s16(a); } -// CHECK-LABEL: define i8 @test_vaddv_u8(<8 x i8> %a) #0 { +// CHECK-LABEL: define frozen i8 @test_vaddv_u8(<8 x i8> frozen %a) #0 { // CHECK: [[VADDV_I:%.*]] = call i32 @llvm.aarch64.neon.uaddv.i32.v8i8(<8 x i8> %a) #3 // CHECK: [[TMP0:%.*]] = trunc i32 [[VADDV_I]] to i8 // CHECK: ret i8 [[TMP0]] @@ -259,7 +259,7 @@ return vaddv_u8(a); } -// CHECK-LABEL: define i16 @test_vaddv_u16(<4 x i16> %a) #0 { +// CHECK-LABEL: define frozen i16 @test_vaddv_u16(<4 x i16> frozen %a) #0 { // CHECK: [[VADDV_I:%.*]] = call i32 @llvm.aarch64.neon.uaddv.i32.v4i16(<4 x i16> %a) #3 // CHECK: [[TMP2:%.*]] = trunc i32 [[VADDV_I]] to i16 // CHECK: ret i16 [[TMP2]] @@ -267,7 +267,7 @@ return vaddv_u16(a); } -// CHECK-LABEL: define i8 @test_vaddvq_s8(<16 x i8> %a) #1 { +// CHECK-LABEL: define frozen i8 @test_vaddvq_s8(<16 x i8> frozen %a) #1 { // CHECK: [[VADDV_I:%.*]] = call i32 @llvm.aarch64.neon.saddv.i32.v16i8(<16 x i8> %a) #3 // CHECK: [[TMP0:%.*]] = trunc i32 [[VADDV_I]] to i8 // CHECK: ret i8 [[TMP0]] @@ -275,7 +275,7 @@ return vaddvq_s8(a); } -// CHECK-LABEL: define i16 @test_vaddvq_s16(<8 x i16> %a) #1 { +// CHECK-LABEL: define frozen i16 @test_vaddvq_s16(<8 x i16> frozen %a) #1 { // CHECK: [[VADDV_I:%.*]] = call i32 @llvm.aarch64.neon.saddv.i32.v8i16(<8 x i16> %a) #3 // CHECK: [[TMP2:%.*]] = trunc i32 [[VADDV_I]] to i16 // CHECK: ret i16 [[TMP2]] @@ -283,14 +283,14 @@ return vaddvq_s16(a); } -// CHECK-LABEL: define i32 @test_vaddvq_s32(<4 x i32> %a) #1 { +// CHECK-LABEL: define frozen i32 @test_vaddvq_s32(<4 x i32> frozen %a) #1 { // CHECK: [[VADDVQ_S32_I:%.*]] = call i32 @llvm.aarch64.neon.saddv.i32.v4i32(<4 x i32> %a) #3 // CHECK: ret i32 [[VADDVQ_S32_I]] int32_t test_vaddvq_s32(int32x4_t a) { return vaddvq_s32(a); } -// CHECK-LABEL: define i8 @test_vaddvq_u8(<16 x i8> %a) #1 { +// CHECK-LABEL: define frozen i8 @test_vaddvq_u8(<16 x i8> frozen %a) #1 { // CHECK: [[VADDV_I:%.*]] = call i32 @llvm.aarch64.neon.uaddv.i32.v16i8(<16 x i8> %a) #3 // CHECK: [[TMP0:%.*]] = trunc i32 [[VADDV_I]] to i8 // CHECK: ret i8 [[TMP0]] @@ -298,7 +298,7 @@ return vaddvq_u8(a); } -// CHECK-LABEL: define i16 @test_vaddvq_u16(<8 x i16> %a) #1 { +// CHECK-LABEL: define frozen i16 @test_vaddvq_u16(<8 x i16> frozen %a) #1 { // CHECK: [[VADDV_I:%.*]] = call i32 @llvm.aarch64.neon.uaddv.i32.v8i16(<8 x i16> %a) #3 // CHECK: [[TMP2:%.*]] = trunc i32 [[VADDV_I]] to i16 // CHECK: ret i16 [[TMP2]] @@ -306,35 +306,35 @@ return vaddvq_u16(a); } -// CHECK-LABEL: define i32 @test_vaddvq_u32(<4 x i32> %a) #1 { +// CHECK-LABEL: define frozen i32 @test_vaddvq_u32(<4 x i32> frozen %a) #1 { // CHECK: [[VADDVQ_U32_I:%.*]] = call i32 @llvm.aarch64.neon.uaddv.i32.v4i32(<4 x i32> %a) #3 // CHECK: ret i32 [[VADDVQ_U32_I]] uint32_t test_vaddvq_u32(uint32x4_t a) { return vaddvq_u32(a); } -// CHECK-LABEL: define float @test_vmaxvq_f32(<4 x float> %a) #1 { +// CHECK-LABEL: define frozen float @test_vmaxvq_f32(<4 x float> frozen %a) #1 { // CHECK: [[VMAXVQ_F32_I:%.*]] = call float @llvm.aarch64.neon.fmaxv.f32.v4f32(<4 x float> %a) #3 // CHECK: ret float [[VMAXVQ_F32_I]] float32_t test_vmaxvq_f32(float32x4_t a) { return vmaxvq_f32(a); } -// CHECK-LABEL: define float @test_vminvq_f32(<4 x float> %a) #1 { +// CHECK-LABEL: define frozen float @test_vminvq_f32(<4 x float> frozen %a) #1 { // CHECK: [[VMINVQ_F32_I:%.*]] = call float @llvm.aarch64.neon.fminv.f32.v4f32(<4 x float> %a) #3 // CHECK: ret float [[VMINVQ_F32_I]] float32_t test_vminvq_f32(float32x4_t a) { return vminvq_f32(a); } -// CHECK-LABEL: define float @test_vmaxnmvq_f32(<4 x float> %a) #1 { +// CHECK-LABEL: define frozen float @test_vmaxnmvq_f32(<4 x float> frozen %a) #1 { // CHECK: [[VMAXNMVQ_F32_I:%.*]] = call float @llvm.aarch64.neon.fmaxnmv.f32.v4f32(<4 x float> %a) #3 // CHECK: ret float [[VMAXNMVQ_F32_I]] float32_t test_vmaxnmvq_f32(float32x4_t a) { return vmaxnmvq_f32(a); } -// CHECK-LABEL: define float @test_vminnmvq_f32(<4 x float> %a) #1 { +// CHECK-LABEL: define frozen float @test_vminnmvq_f32(<4 x float> frozen %a) #1 { // CHECK: [[VMINNMVQ_F32_I:%.*]] = call float @llvm.aarch64.neon.fminnmv.f32.v4f32(<4 x float> %a) #3 // CHECK: ret float [[VMINNMVQ_F32_I]] float32_t test_vminnmvq_f32(float32x4_t a) { diff --git a/clang/test/CodeGen/aarch64-neon-dot-product.c b/clang/test/CodeGen/aarch64-neon-dot-product.c --- a/clang/test/CodeGen/aarch64-neon-dot-product.c +++ b/clang/test/CodeGen/aarch64-neon-dot-product.c @@ -8,35 +8,35 @@ #include uint32x2_t test_vdot_u32(uint32x2_t a, uint8x8_t b, uint8x8_t c) { -// CHECK-LABEL: define <2 x i32> @test_vdot_u32(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c) +// CHECK-LABEL: define frozen <2 x i32> @test_vdot_u32(<2 x i32> frozen %a, <8 x i8> frozen %b, <8 x i8> frozen %c) // CHECK: [[RESULT:%.*]] = call <2 x i32> @llvm.aarch64.neon.udot.v2i32.v8i8(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c) // CHECK: ret <2 x i32> [[RESULT]] return vdot_u32(a, b, c); } uint32x4_t test_vdotq_u32(uint32x4_t a, uint8x16_t b, uint8x16_t c) { -// CHECK-LABEL: define <4 x i32> @test_vdotq_u32(<4 x i32> %a, <16 x i8> %b, <16 x i8> %c) +// CHECK-LABEL: define frozen <4 x i32> @test_vdotq_u32(<4 x i32> frozen %a, <16 x i8> frozen %b, <16 x i8> frozen %c) // CHECK: [[RESULT:%.*]] = call <4 x i32> @llvm.aarch64.neon.udot.v4i32.v16i8(<4 x i32> %a, <16 x i8> %b, <16 x i8> %c) // CHECK: ret <4 x i32> [[RESULT]] return vdotq_u32(a, b, c); } int32x2_t test_vdot_s32(int32x2_t a, int8x8_t b, int8x8_t c) { -// CHECK-LABEL: define <2 x i32> @test_vdot_s32(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c) +// CHECK-LABEL: define frozen <2 x i32> @test_vdot_s32(<2 x i32> frozen %a, <8 x i8> frozen %b, <8 x i8> frozen %c) // CHECK: [[RESULT:%.*]] = call <2 x i32> @llvm.aarch64.neon.sdot.v2i32.v8i8(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c) // CHECK: ret <2 x i32> [[RESULT]] return vdot_s32(a, b, c); } int32x4_t test_vdotq_s32(int32x4_t a, int8x16_t b, int8x16_t c) { -// CHECK-LABEL: define <4 x i32> @test_vdotq_s32(<4 x i32> %a, <16 x i8> %b, <16 x i8> %c) +// CHECK-LABEL: define frozen <4 x i32> @test_vdotq_s32(<4 x i32> frozen %a, <16 x i8> frozen %b, <16 x i8> frozen %c) // CHECK: [[RESULT:%.*]] = call <4 x i32> @llvm.aarch64.neon.sdot.v4i32.v16i8(<4 x i32> %a, <16 x i8> %b, <16 x i8> %c) // CHECK: ret <4 x i32> [[RESULT]] return vdotq_s32(a, b, c); } uint32x2_t test_vdot_lane_u32(uint32x2_t a, uint8x8_t b, uint8x8_t c) { -// CHECK-LABEL: define <2 x i32> @test_vdot_lane_u32(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c) +// CHECK-LABEL: define frozen <2 x i32> @test_vdot_lane_u32(<2 x i32> frozen %a, <8 x i8> frozen %b, <8 x i8> frozen %c) // CHECK: [[CAST1:%.*]] = bitcast <8 x i8> %c to <2 x i32> // CHECK: [[SHUFFLE:%.*]] = shufflevector <2 x i32> [[CAST1]], <2 x i32> undef, <2 x i32> // CHECK: [[CAST2:%.*]] = bitcast <2 x i32> [[SHUFFLE]] to <8 x i8> @@ -46,7 +46,7 @@ } uint32x4_t test_vdotq_lane_u32(uint32x4_t a, uint8x16_t b, uint8x8_t c) { -// CHECK-LABEL: define <4 x i32> @test_vdotq_lane_u32(<4 x i32> %a, <16 x i8> %b, <8 x i8> %c) +// CHECK-LABEL: define frozen <4 x i32> @test_vdotq_lane_u32(<4 x i32> frozen %a, <16 x i8> frozen %b, <8 x i8> frozen %c) // CHECK: [[CAST1:%.*]] = bitcast <8 x i8> %c to <2 x i32> // CHECK: [[SHUFFLE:%.*]] = shufflevector <2 x i32> [[CAST1]], <2 x i32> undef, <4 x i32> // CHECK: [[CAST2:%.*]] = bitcast <4 x i32> [[SHUFFLE]] to <16 x i8> @@ -56,7 +56,7 @@ } uint32x2_t test_vdot_laneq_u32(uint32x2_t a, uint8x8_t b, uint8x16_t c) { -// CHECK-LABEL: define <2 x i32> @test_vdot_laneq_u32(<2 x i32> %a, <8 x i8> %b, <16 x i8> %c) +// CHECK-LABEL: define frozen <2 x i32> @test_vdot_laneq_u32(<2 x i32> frozen %a, <8 x i8> frozen %b, <16 x i8> frozen %c) // CHECK: [[CAST1:%.*]] = bitcast <16 x i8> %c to <4 x i32> // CHECK: [[SHUFFLE:%.*]] = shufflevector <4 x i32> [[CAST1]], <4 x i32> undef, <2 x i32> // CHECK: [[CAST2:%.*]] = bitcast <2 x i32> [[SHUFFLE]] to <8 x i8> @@ -66,7 +66,7 @@ } uint32x4_t test_vdotq_laneq_u32(uint32x4_t a, uint8x16_t b, uint8x16_t c) { -// CHECK-LABEL: define <4 x i32> @test_vdotq_laneq_u32(<4 x i32> %a, <16 x i8> %b, <16 x i8> %c) +// CHECK-LABEL: define frozen <4 x i32> @test_vdotq_laneq_u32(<4 x i32> frozen %a, <16 x i8> frozen %b, <16 x i8> frozen %c) // CHECK: [[CAST1:%.*]] = bitcast <16 x i8> %c to <4 x i32> // CHECK: [[SHUFFLE:%.*]] = shufflevector <4 x i32> [[CAST1]], <4 x i32> undef, <4 x i32> // CHECK: [[CAST2:%.*]] = bitcast <4 x i32> [[SHUFFLE]] to <16 x i8> @@ -76,7 +76,7 @@ } int32x2_t test_vdot_lane_s32(int32x2_t a, int8x8_t b, int8x8_t c) { -// CHECK-LABEL: define <2 x i32> @test_vdot_lane_s32(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c) +// CHECK-LABEL: define frozen <2 x i32> @test_vdot_lane_s32(<2 x i32> frozen %a, <8 x i8> frozen %b, <8 x i8> frozen %c) // CHECK: [[CAST1:%.*]] = bitcast <8 x i8> %c to <2 x i32> // CHECK: [[SHUFFLE:%.*]] = shufflevector <2 x i32> [[CAST1]], <2 x i32> undef, <2 x i32> // CHECK: [[CAST2:%.*]] = bitcast <2 x i32> [[SHUFFLE]] to <8 x i8> @@ -86,7 +86,7 @@ } int32x4_t test_vdotq_lane_s32(int32x4_t a, int8x16_t b, int8x8_t c) { -// CHECK-LABEL: define <4 x i32> @test_vdotq_lane_s32(<4 x i32> %a, <16 x i8> %b, <8 x i8> %c) +// CHECK-LABEL: define frozen <4 x i32> @test_vdotq_lane_s32(<4 x i32> frozen %a, <16 x i8> frozen %b, <8 x i8> frozen %c) // CHECK: [[CAST1:%.*]] = bitcast <8 x i8> %c to <2 x i32> // CHECK: [[SHUFFLE:%.*]] = shufflevector <2 x i32> [[CAST1]], <2 x i32> undef, <4 x i32> // CHECK: [[CAST2:%.*]] = bitcast <4 x i32> [[SHUFFLE]] to <16 x i8> @@ -96,7 +96,7 @@ } int32x2_t test_vdot_laneq_s32(int32x2_t a, int8x8_t b, int8x16_t c) { -// CHECK-LABEL: define <2 x i32> @test_vdot_laneq_s32(<2 x i32> %a, <8 x i8> %b, <16 x i8> %c) +// CHECK-LABEL: define frozen <2 x i32> @test_vdot_laneq_s32(<2 x i32> frozen %a, <8 x i8> frozen %b, <16 x i8> frozen %c) // CHECK: [[CAST1:%.*]] = bitcast <16 x i8> %c to <4 x i32> // CHECK: [[SHUFFLE:%.*]] = shufflevector <4 x i32> [[CAST1]], <4 x i32> undef, <2 x i32> // CHECK: [[CAST2:%.*]] = bitcast <2 x i32> [[SHUFFLE]] to <8 x i8> @@ -106,7 +106,7 @@ } int32x4_t test_vdotq_laneq_s32(int32x4_t a, int8x16_t b, int8x16_t c) { -// CHECK-LABEL: define <4 x i32> @test_vdotq_laneq_s32(<4 x i32> %a, <16 x i8> %b, <16 x i8> %c) +// CHECK-LABEL: define frozen <4 x i32> @test_vdotq_laneq_s32(<4 x i32> frozen %a, <16 x i8> frozen %b, <16 x i8> frozen %c) // CHECK: [[CAST1:%.*]] = bitcast <16 x i8> %c to <4 x i32> // CHECK: [[SHUFFLE:%.*]] = shufflevector <4 x i32> [[CAST1]], <4 x i32> undef, <4 x i32> // CHECK: [[CAST2:%.*]] = bitcast <4 x i32> [[SHUFFLE]] to <16 x i8> diff --git a/clang/test/CodeGen/aarch64-neon-extract.c b/clang/test/CodeGen/aarch64-neon-extract.c --- a/clang/test/CodeGen/aarch64-neon-extract.c +++ b/clang/test/CodeGen/aarch64-neon-extract.c @@ -6,14 +6,14 @@ #include -// CHECK-LABEL: define <8 x i8> @test_vext_s8(<8 x i8> %a, <8 x i8> %b) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vext_s8(<8 x i8> frozen %a, <8 x i8> frozen %b) #0 { // CHECK: [[VEXT:%.*]] = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> // CHECK: ret <8 x i8> [[VEXT]] int8x8_t test_vext_s8(int8x8_t a, int8x8_t b) { return vext_s8(a, b, 2); } -// CHECK-LABEL: define <4 x i16> @test_vext_s16(<4 x i16> %a, <4 x i16> %b) #0 { +// CHECK-LABEL: define frozen <4 x i16> @test_vext_s16(<4 x i16> frozen %a, <4 x i16> frozen %b) #0 { // CHECK: [[TMP0:%.*]] = bitcast <4 x i16> %a to <8 x i8> // CHECK: [[TMP1:%.*]] = bitcast <4 x i16> %b to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16> @@ -24,7 +24,7 @@ return vext_s16(a, b, 3); } -// CHECK-LABEL: define <2 x i32> @test_vext_s32(<2 x i32> %a, <2 x i32> %b) #0 { +// CHECK-LABEL: define frozen <2 x i32> @test_vext_s32(<2 x i32> frozen %a, <2 x i32> frozen %b) #0 { // CHECK: [[TMP0:%.*]] = bitcast <2 x i32> %a to <8 x i8> // CHECK: [[TMP1:%.*]] = bitcast <2 x i32> %b to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32> @@ -35,7 +35,7 @@ return vext_s32(a, b, 1); } -// CHECK-LABEL: define <1 x i64> @test_vext_s64(<1 x i64> %a, <1 x i64> %b) #0 { +// CHECK-LABEL: define frozen <1 x i64> @test_vext_s64(<1 x i64> frozen %a, <1 x i64> frozen %b) #0 { // CHECK: [[TMP0:%.*]] = bitcast <1 x i64> %a to <8 x i8> // CHECK: [[TMP1:%.*]] = bitcast <1 x i64> %b to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x i64> @@ -46,14 +46,14 @@ return vext_s64(a, b, 0); } -// CHECK-LABEL: define <16 x i8> @test_vextq_s8(<16 x i8> %a, <16 x i8> %b) #1 { +// CHECK-LABEL: define frozen <16 x i8> @test_vextq_s8(<16 x i8> frozen %a, <16 x i8> frozen %b) #1 { // CHECK: [[VEXT:%.*]] = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> // CHECK: ret <16 x i8> [[VEXT]] int8x16_t test_vextq_s8(int8x16_t a, int8x16_t b) { return vextq_s8(a, b, 2); } -// CHECK-LABEL: define <8 x i16> @test_vextq_s16(<8 x i16> %a, <8 x i16> %b) #1 { +// CHECK-LABEL: define frozen <8 x i16> @test_vextq_s16(<8 x i16> frozen %a, <8 x i16> frozen %b) #1 { // CHECK: [[TMP0:%.*]] = bitcast <8 x i16> %a to <16 x i8> // CHECK: [[TMP1:%.*]] = bitcast <8 x i16> %b to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16> @@ -64,7 +64,7 @@ return vextq_s16(a, b, 3); } -// CHECK-LABEL: define <4 x i32> @test_vextq_s32(<4 x i32> %a, <4 x i32> %b) #1 { +// CHECK-LABEL: define frozen <4 x i32> @test_vextq_s32(<4 x i32> frozen %a, <4 x i32> frozen %b) #1 { // CHECK: [[TMP0:%.*]] = bitcast <4 x i32> %a to <16 x i8> // CHECK: [[TMP1:%.*]] = bitcast <4 x i32> %b to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32> @@ -75,7 +75,7 @@ return vextq_s32(a, b, 1); } -// CHECK-LABEL: define <2 x i64> @test_vextq_s64(<2 x i64> %a, <2 x i64> %b) #1 { +// CHECK-LABEL: define frozen <2 x i64> @test_vextq_s64(<2 x i64> frozen %a, <2 x i64> frozen %b) #1 { // CHECK: [[TMP0:%.*]] = bitcast <2 x i64> %a to <16 x i8> // CHECK: [[TMP1:%.*]] = bitcast <2 x i64> %b to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64> @@ -86,14 +86,14 @@ return vextq_s64(a, b, 1); } -// CHECK-LABEL: define <8 x i8> @test_vext_u8(<8 x i8> %a, <8 x i8> %b) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vext_u8(<8 x i8> frozen %a, <8 x i8> frozen %b) #0 { // CHECK: [[VEXT:%.*]] = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> // CHECK: ret <8 x i8> [[VEXT]] uint8x8_t test_vext_u8(uint8x8_t a, uint8x8_t b) { return vext_u8(a, b, 2); } -// CHECK-LABEL: define <4 x i16> @test_vext_u16(<4 x i16> %a, <4 x i16> %b) #0 { +// CHECK-LABEL: define frozen <4 x i16> @test_vext_u16(<4 x i16> frozen %a, <4 x i16> frozen %b) #0 { // CHECK: [[TMP0:%.*]] = bitcast <4 x i16> %a to <8 x i8> // CHECK: [[TMP1:%.*]] = bitcast <4 x i16> %b to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16> @@ -104,7 +104,7 @@ return vext_u16(a, b, 3); } -// CHECK-LABEL: define <2 x i32> @test_vext_u32(<2 x i32> %a, <2 x i32> %b) #0 { +// CHECK-LABEL: define frozen <2 x i32> @test_vext_u32(<2 x i32> frozen %a, <2 x i32> frozen %b) #0 { // CHECK: [[TMP0:%.*]] = bitcast <2 x i32> %a to <8 x i8> // CHECK: [[TMP1:%.*]] = bitcast <2 x i32> %b to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32> @@ -115,7 +115,7 @@ return vext_u32(a, b, 1); } -// CHECK-LABEL: define <1 x i64> @test_vext_u64(<1 x i64> %a, <1 x i64> %b) #0 { +// CHECK-LABEL: define frozen <1 x i64> @test_vext_u64(<1 x i64> frozen %a, <1 x i64> frozen %b) #0 { // CHECK: [[TMP0:%.*]] = bitcast <1 x i64> %a to <8 x i8> // CHECK: [[TMP1:%.*]] = bitcast <1 x i64> %b to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x i64> @@ -126,14 +126,14 @@ return vext_u64(a, b, 0); } -// CHECK-LABEL: define <16 x i8> @test_vextq_u8(<16 x i8> %a, <16 x i8> %b) #1 { +// CHECK-LABEL: define frozen <16 x i8> @test_vextq_u8(<16 x i8> frozen %a, <16 x i8> frozen %b) #1 { // CHECK: [[VEXT:%.*]] = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> // CHECK: ret <16 x i8> [[VEXT]] uint8x16_t test_vextq_u8(uint8x16_t a, uint8x16_t b) { return vextq_u8(a, b, 2); } -// CHECK-LABEL: define <8 x i16> @test_vextq_u16(<8 x i16> %a, <8 x i16> %b) #1 { +// CHECK-LABEL: define frozen <8 x i16> @test_vextq_u16(<8 x i16> frozen %a, <8 x i16> frozen %b) #1 { // CHECK: [[TMP0:%.*]] = bitcast <8 x i16> %a to <16 x i8> // CHECK: [[TMP1:%.*]] = bitcast <8 x i16> %b to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16> @@ -144,7 +144,7 @@ return vextq_u16(a, b, 3); } -// CHECK-LABEL: define <4 x i32> @test_vextq_u32(<4 x i32> %a, <4 x i32> %b) #1 { +// CHECK-LABEL: define frozen <4 x i32> @test_vextq_u32(<4 x i32> frozen %a, <4 x i32> frozen %b) #1 { // CHECK: [[TMP0:%.*]] = bitcast <4 x i32> %a to <16 x i8> // CHECK: [[TMP1:%.*]] = bitcast <4 x i32> %b to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32> @@ -155,7 +155,7 @@ return vextq_u32(a, b, 1); } -// CHECK-LABEL: define <2 x i64> @test_vextq_u64(<2 x i64> %a, <2 x i64> %b) #1 { +// CHECK-LABEL: define frozen <2 x i64> @test_vextq_u64(<2 x i64> frozen %a, <2 x i64> frozen %b) #1 { // CHECK: [[TMP0:%.*]] = bitcast <2 x i64> %a to <16 x i8> // CHECK: [[TMP1:%.*]] = bitcast <2 x i64> %b to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64> @@ -166,7 +166,7 @@ return vextq_u64(a, b, 1); } -// CHECK-LABEL: define <2 x float> @test_vext_f32(<2 x float> %a, <2 x float> %b) #0 { +// CHECK-LABEL: define frozen <2 x float> @test_vext_f32(<2 x float> frozen %a, <2 x float> frozen %b) #0 { // CHECK: [[TMP0:%.*]] = bitcast <2 x float> %a to <8 x i8> // CHECK: [[TMP1:%.*]] = bitcast <2 x float> %b to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x float> @@ -177,7 +177,7 @@ return vext_f32(a, b, 1); } -// CHECK-LABEL: define <1 x double> @test_vext_f64(<1 x double> %a, <1 x double> %b) #0 { +// CHECK-LABEL: define frozen <1 x double> @test_vext_f64(<1 x double> frozen %a, <1 x double> frozen %b) #0 { // CHECK: [[TMP0:%.*]] = bitcast <1 x double> %a to <8 x i8> // CHECK: [[TMP1:%.*]] = bitcast <1 x double> %b to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x double> @@ -188,7 +188,7 @@ return vext_f64(a, b, 0); } -// CHECK-LABEL: define <4 x float> @test_vextq_f32(<4 x float> %a, <4 x float> %b) #1 { +// CHECK-LABEL: define frozen <4 x float> @test_vextq_f32(<4 x float> frozen %a, <4 x float> frozen %b) #1 { // CHECK: [[TMP0:%.*]] = bitcast <4 x float> %a to <16 x i8> // CHECK: [[TMP1:%.*]] = bitcast <4 x float> %b to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x float> @@ -199,7 +199,7 @@ return vextq_f32(a, b, 1); } -// CHECK-LABEL: define <2 x double> @test_vextq_f64(<2 x double> %a, <2 x double> %b) #1 { +// CHECK-LABEL: define frozen <2 x double> @test_vextq_f64(<2 x double> frozen %a, <2 x double> frozen %b) #1 { // CHECK: [[TMP0:%.*]] = bitcast <2 x double> %a to <16 x i8> // CHECK: [[TMP1:%.*]] = bitcast <2 x double> %b to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x double> @@ -210,14 +210,14 @@ return vextq_f64(a, b, 1); } -// CHECK-LABEL: define <8 x i8> @test_vext_p8(<8 x i8> %a, <8 x i8> %b) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vext_p8(<8 x i8> frozen %a, <8 x i8> frozen %b) #0 { // CHECK: [[VEXT:%.*]] = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> // CHECK: ret <8 x i8> [[VEXT]] poly8x8_t test_vext_p8(poly8x8_t a, poly8x8_t b) { return vext_p8(a, b, 2); } -// CHECK-LABEL: define <4 x i16> @test_vext_p16(<4 x i16> %a, <4 x i16> %b) #0 { +// CHECK-LABEL: define frozen <4 x i16> @test_vext_p16(<4 x i16> frozen %a, <4 x i16> frozen %b) #0 { // CHECK: [[TMP0:%.*]] = bitcast <4 x i16> %a to <8 x i8> // CHECK: [[TMP1:%.*]] = bitcast <4 x i16> %b to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16> @@ -228,14 +228,14 @@ return vext_p16(a, b, 3); } -// CHECK-LABEL: define <16 x i8> @test_vextq_p8(<16 x i8> %a, <16 x i8> %b) #1 { +// CHECK-LABEL: define frozen <16 x i8> @test_vextq_p8(<16 x i8> frozen %a, <16 x i8> frozen %b) #1 { // CHECK: [[VEXT:%.*]] = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> // CHECK: ret <16 x i8> [[VEXT]] poly8x16_t test_vextq_p8(poly8x16_t a, poly8x16_t b) { return vextq_p8(a, b, 2); } -// CHECK-LABEL: define <8 x i16> @test_vextq_p16(<8 x i16> %a, <8 x i16> %b) #1 { +// CHECK-LABEL: define frozen <8 x i16> @test_vextq_p16(<8 x i16> frozen %a, <8 x i16> frozen %b) #1 { // CHECK: [[TMP0:%.*]] = bitcast <8 x i16> %a to <16 x i8> // CHECK: [[TMP1:%.*]] = bitcast <8 x i16> %b to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16> diff --git a/clang/test/CodeGen/aarch64-neon-fcvt-intrinsics.c b/clang/test/CodeGen/aarch64-neon-fcvt-intrinsics.c --- a/clang/test/CodeGen/aarch64-neon-fcvt-intrinsics.c +++ b/clang/test/CodeGen/aarch64-neon-fcvt-intrinsics.c @@ -5,147 +5,147 @@ #include -// CHECK-LABEL: define float @test_vcvtxd_f32_f64(double %a) #0 { +// CHECK-LABEL: define frozen float @test_vcvtxd_f32_f64(double frozen %a) #0 { // CHECK: [[VCVTXD_F32_F64_I:%.*]] = call float @llvm.aarch64.sisd.fcvtxn(double %a) #2 // CHECK: ret float [[VCVTXD_F32_F64_I]] float32_t test_vcvtxd_f32_f64(float64_t a) { return (float32_t)vcvtxd_f32_f64(a); } -// CHECK-LABEL: define i32 @test_vcvtas_s32_f32(float %a) #0 { +// CHECK-LABEL: define frozen i32 @test_vcvtas_s32_f32(float frozen %a) #0 { // CHECK: [[VCVTAS_S32_F32_I:%.*]] = call i32 @llvm.aarch64.neon.fcvtas.i32.f32(float %a) #2 // CHECK: ret i32 [[VCVTAS_S32_F32_I]] int32_t test_vcvtas_s32_f32(float32_t a) { return (int32_t)vcvtas_s32_f32(a); } -// CHECK-LABEL: define i64 @test_test_vcvtad_s64_f64(double %a) #0 { +// CHECK-LABEL: define frozen i64 @test_test_vcvtad_s64_f64(double frozen %a) #0 { // CHECK: [[VCVTAD_S64_F64_I:%.*]] = call i64 @llvm.aarch64.neon.fcvtas.i64.f64(double %a) #2 // CHECK: ret i64 [[VCVTAD_S64_F64_I]] int64_t test_test_vcvtad_s64_f64(float64_t a) { return (int64_t)vcvtad_s64_f64(a); } -// CHECK-LABEL: define i32 @test_vcvtas_u32_f32(float %a) #0 { +// CHECK-LABEL: define frozen i32 @test_vcvtas_u32_f32(float frozen %a) #0 { // CHECK: [[VCVTAS_U32_F32_I:%.*]] = call i32 @llvm.aarch64.neon.fcvtau.i32.f32(float %a) #2 // CHECK: ret i32 [[VCVTAS_U32_F32_I]] uint32_t test_vcvtas_u32_f32(float32_t a) { return (uint32_t)vcvtas_u32_f32(a); } -// CHECK-LABEL: define i64 @test_vcvtad_u64_f64(double %a) #0 { +// CHECK-LABEL: define frozen i64 @test_vcvtad_u64_f64(double frozen %a) #0 { // CHECK: [[VCVTAD_U64_F64_I:%.*]] = call i64 @llvm.aarch64.neon.fcvtau.i64.f64(double %a) #2 // CHECK: ret i64 [[VCVTAD_U64_F64_I]] uint64_t test_vcvtad_u64_f64(float64_t a) { return (uint64_t)vcvtad_u64_f64(a); } -// CHECK-LABEL: define i32 @test_vcvtms_s32_f32(float %a) #0 { +// CHECK-LABEL: define frozen i32 @test_vcvtms_s32_f32(float frozen %a) #0 { // CHECK: [[VCVTMS_S32_F32_I:%.*]] = call i32 @llvm.aarch64.neon.fcvtms.i32.f32(float %a) #2 // CHECK: ret i32 [[VCVTMS_S32_F32_I]] int32_t test_vcvtms_s32_f32(float32_t a) { return (int32_t)vcvtms_s32_f32(a); } -// CHECK-LABEL: define i64 @test_vcvtmd_s64_f64(double %a) #0 { +// CHECK-LABEL: define frozen i64 @test_vcvtmd_s64_f64(double frozen %a) #0 { // CHECK: [[VCVTMD_S64_F64_I:%.*]] = call i64 @llvm.aarch64.neon.fcvtms.i64.f64(double %a) #2 // CHECK: ret i64 [[VCVTMD_S64_F64_I]] int64_t test_vcvtmd_s64_f64(float64_t a) { return (int64_t)vcvtmd_s64_f64(a); } -// CHECK-LABEL: define i32 @test_vcvtms_u32_f32(float %a) #0 { +// CHECK-LABEL: define frozen i32 @test_vcvtms_u32_f32(float frozen %a) #0 { // CHECK: [[VCVTMS_U32_F32_I:%.*]] = call i32 @llvm.aarch64.neon.fcvtmu.i32.f32(float %a) #2 // CHECK: ret i32 [[VCVTMS_U32_F32_I]] uint32_t test_vcvtms_u32_f32(float32_t a) { return (uint32_t)vcvtms_u32_f32(a); } -// CHECK-LABEL: define i64 @test_vcvtmd_u64_f64(double %a) #0 { +// CHECK-LABEL: define frozen i64 @test_vcvtmd_u64_f64(double frozen %a) #0 { // CHECK: [[VCVTMD_U64_F64_I:%.*]] = call i64 @llvm.aarch64.neon.fcvtmu.i64.f64(double %a) #2 // CHECK: ret i64 [[VCVTMD_U64_F64_I]] uint64_t test_vcvtmd_u64_f64(float64_t a) { return (uint64_t)vcvtmd_u64_f64(a); } -// CHECK-LABEL: define i32 @test_vcvtns_s32_f32(float %a) #0 { +// CHECK-LABEL: define frozen i32 @test_vcvtns_s32_f32(float frozen %a) #0 { // CHECK: [[VCVTNS_S32_F32_I:%.*]] = call i32 @llvm.aarch64.neon.fcvtns.i32.f32(float %a) #2 // CHECK: ret i32 [[VCVTNS_S32_F32_I]] int32_t test_vcvtns_s32_f32(float32_t a) { return (int32_t)vcvtns_s32_f32(a); } -// CHECK-LABEL: define i64 @test_vcvtnd_s64_f64(double %a) #0 { +// CHECK-LABEL: define frozen i64 @test_vcvtnd_s64_f64(double frozen %a) #0 { // CHECK: [[VCVTND_S64_F64_I:%.*]] = call i64 @llvm.aarch64.neon.fcvtns.i64.f64(double %a) #2 // CHECK: ret i64 [[VCVTND_S64_F64_I]] int64_t test_vcvtnd_s64_f64(float64_t a) { return (int64_t)vcvtnd_s64_f64(a); } -// CHECK-LABEL: define i32 @test_vcvtns_u32_f32(float %a) #0 { +// CHECK-LABEL: define frozen i32 @test_vcvtns_u32_f32(float frozen %a) #0 { // CHECK: [[VCVTNS_U32_F32_I:%.*]] = call i32 @llvm.aarch64.neon.fcvtnu.i32.f32(float %a) #2 // CHECK: ret i32 [[VCVTNS_U32_F32_I]] uint32_t test_vcvtns_u32_f32(float32_t a) { return (uint32_t)vcvtns_u32_f32(a); } -// CHECK-LABEL: define i64 @test_vcvtnd_u64_f64(double %a) #0 { +// CHECK-LABEL: define frozen i64 @test_vcvtnd_u64_f64(double frozen %a) #0 { // CHECK: [[VCVTND_U64_F64_I:%.*]] = call i64 @llvm.aarch64.neon.fcvtnu.i64.f64(double %a) #2 // CHECK: ret i64 [[VCVTND_U64_F64_I]] uint64_t test_vcvtnd_u64_f64(float64_t a) { return (uint64_t)vcvtnd_u64_f64(a); } -// CHECK-LABEL: define i32 @test_vcvtps_s32_f32(float %a) #0 { +// CHECK-LABEL: define frozen i32 @test_vcvtps_s32_f32(float frozen %a) #0 { // CHECK: [[VCVTPS_S32_F32_I:%.*]] = call i32 @llvm.aarch64.neon.fcvtps.i32.f32(float %a) #2 // CHECK: ret i32 [[VCVTPS_S32_F32_I]] int32_t test_vcvtps_s32_f32(float32_t a) { return (int32_t)vcvtps_s32_f32(a); } -// CHECK-LABEL: define i64 @test_vcvtpd_s64_f64(double %a) #0 { +// CHECK-LABEL: define frozen i64 @test_vcvtpd_s64_f64(double frozen %a) #0 { // CHECK: [[VCVTPD_S64_F64_I:%.*]] = call i64 @llvm.aarch64.neon.fcvtps.i64.f64(double %a) #2 // CHECK: ret i64 [[VCVTPD_S64_F64_I]] int64_t test_vcvtpd_s64_f64(float64_t a) { return (int64_t)vcvtpd_s64_f64(a); } -// CHECK-LABEL: define i32 @test_vcvtps_u32_f32(float %a) #0 { +// CHECK-LABEL: define frozen i32 @test_vcvtps_u32_f32(float frozen %a) #0 { // CHECK: [[VCVTPS_U32_F32_I:%.*]] = call i32 @llvm.aarch64.neon.fcvtpu.i32.f32(float %a) #2 // CHECK: ret i32 [[VCVTPS_U32_F32_I]] uint32_t test_vcvtps_u32_f32(float32_t a) { return (uint32_t)vcvtps_u32_f32(a); } -// CHECK-LABEL: define i64 @test_vcvtpd_u64_f64(double %a) #0 { +// CHECK-LABEL: define frozen i64 @test_vcvtpd_u64_f64(double frozen %a) #0 { // CHECK: [[VCVTPD_U64_F64_I:%.*]] = call i64 @llvm.aarch64.neon.fcvtpu.i64.f64(double %a) #2 // CHECK: ret i64 [[VCVTPD_U64_F64_I]] uint64_t test_vcvtpd_u64_f64(float64_t a) { return (uint64_t)vcvtpd_u64_f64(a); } -// CHECK-LABEL: define i32 @test_vcvts_s32_f32(float %a) #0 { +// CHECK-LABEL: define frozen i32 @test_vcvts_s32_f32(float frozen %a) #0 { // CHECK: [[TMP0:%.*]] = fptosi float %a to i32 // CHECK: ret i32 [[TMP0]] int32_t test_vcvts_s32_f32(float32_t a) { return (int32_t)vcvts_s32_f32(a); } -// CHECK-LABEL: define i64 @test_vcvtd_s64_f64(double %a) #0 { +// CHECK-LABEL: define frozen i64 @test_vcvtd_s64_f64(double frozen %a) #0 { // CHECK: [[TMP0:%.*]] = fptosi double %a to i64 // CHECK: ret i64 [[TMP0]] int64_t test_vcvtd_s64_f64(float64_t a) { return (int64_t)vcvtd_s64_f64(a); } -// CHECK-LABEL: define i32 @test_vcvts_u32_f32(float %a) #0 { +// CHECK-LABEL: define frozen i32 @test_vcvts_u32_f32(float frozen %a) #0 { // CHECK: [[TMP0:%.*]] = fptoui float %a to i32 // CHECK: ret i32 [[TMP0]] uint32_t test_vcvts_u32_f32(float32_t a) { return (uint32_t)vcvts_u32_f32(a); } -// CHECK-LABEL: define i64 @test_vcvtd_u64_f64(double %a) #0 { +// CHECK-LABEL: define frozen i64 @test_vcvtd_u64_f64(double frozen %a) #0 { // CHECK: [[TMP0:%.*]] = fptoui double %a to i64 // CHECK: ret i64 [[TMP0]] uint64_t test_vcvtd_u64_f64(float64_t a) { diff --git a/clang/test/CodeGen/aarch64-neon-fma.c b/clang/test/CodeGen/aarch64-neon-fma.c --- a/clang/test/CodeGen/aarch64-neon-fma.c +++ b/clang/test/CodeGen/aarch64-neon-fma.c @@ -4,7 +4,7 @@ #include -// CHECK-LABEL: define <2 x float> @test_vmla_n_f32(<2 x float> %a, <2 x float> %b, float %c) #0 { +// CHECK-LABEL: define frozen <2 x float> @test_vmla_n_f32(<2 x float> frozen %a, <2 x float> frozen %b, float frozen %c) #0 { // CHECK: [[VECINIT_I:%.*]] = insertelement <2 x float> undef, float %c, i32 0 // CHECK: [[VECINIT1_I:%.*]] = insertelement <2 x float> [[VECINIT_I]], float %c, i32 1 // CHECK: [[MUL_I:%.*]] = fmul <2 x float> %b, [[VECINIT1_I]] @@ -14,7 +14,7 @@ return vmla_n_f32(a, b, c); } -// CHECK-LABEL: define <4 x float> @test_vmlaq_n_f32(<4 x float> %a, <4 x float> %b, float %c) #1 { +// CHECK-LABEL: define frozen <4 x float> @test_vmlaq_n_f32(<4 x float> frozen %a, <4 x float> frozen %b, float frozen %c) #1 { // CHECK: [[VECINIT_I:%.*]] = insertelement <4 x float> undef, float %c, i32 0 // CHECK: [[VECINIT1_I:%.*]] = insertelement <4 x float> [[VECINIT_I]], float %c, i32 1 // CHECK: [[VECINIT2_I:%.*]] = insertelement <4 x float> [[VECINIT1_I]], float %c, i32 2 @@ -26,7 +26,7 @@ return vmlaq_n_f32(a, b, c); } -// CHECK-LABEL: define <2 x double> @test_vmlaq_n_f64(<2 x double> %a, <2 x double> %b, double %c) #1 { +// CHECK-LABEL: define frozen <2 x double> @test_vmlaq_n_f64(<2 x double> frozen %a, <2 x double> frozen %b, double frozen %c) #1 { // CHECK: [[VECINIT_I:%.*]] = insertelement <2 x double> undef, double %c, i32 0 // CHECK: [[VECINIT1_I:%.*]] = insertelement <2 x double> [[VECINIT_I]], double %c, i32 1 // CHECK: [[MUL_I:%.*]] = fmul <2 x double> %b, [[VECINIT1_I]] @@ -36,7 +36,7 @@ return vmlaq_n_f64(a, b, c); } -// CHECK-LABEL: define <4 x float> @test_vmlsq_n_f32(<4 x float> %a, <4 x float> %b, float %c) #1 { +// CHECK-LABEL: define frozen <4 x float> @test_vmlsq_n_f32(<4 x float> frozen %a, <4 x float> frozen %b, float frozen %c) #1 { // CHECK: [[VECINIT_I:%.*]] = insertelement <4 x float> undef, float %c, i32 0 // CHECK: [[VECINIT1_I:%.*]] = insertelement <4 x float> [[VECINIT_I]], float %c, i32 1 // CHECK: [[VECINIT2_I:%.*]] = insertelement <4 x float> [[VECINIT1_I]], float %c, i32 2 @@ -48,7 +48,7 @@ return vmlsq_n_f32(a, b, c); } -// CHECK-LABEL: define <2 x float> @test_vmls_n_f32(<2 x float> %a, <2 x float> %b, float %c) #0 { +// CHECK-LABEL: define frozen <2 x float> @test_vmls_n_f32(<2 x float> frozen %a, <2 x float> frozen %b, float frozen %c) #0 { // CHECK: [[VECINIT_I:%.*]] = insertelement <2 x float> undef, float %c, i32 0 // CHECK: [[VECINIT1_I:%.*]] = insertelement <2 x float> [[VECINIT_I]], float %c, i32 1 // CHECK: [[MUL_I:%.*]] = fmul <2 x float> %b, [[VECINIT1_I]] @@ -58,7 +58,7 @@ return vmls_n_f32(a, b, c); } -// CHECK-LABEL: define <2 x double> @test_vmlsq_n_f64(<2 x double> %a, <2 x double> %b, double %c) #1 { +// CHECK-LABEL: define frozen <2 x double> @test_vmlsq_n_f64(<2 x double> frozen %a, <2 x double> frozen %b, double frozen %c) #1 { // CHECK: [[VECINIT_I:%.*]] = insertelement <2 x double> undef, double %c, i32 0 // CHECK: [[VECINIT1_I:%.*]] = insertelement <2 x double> [[VECINIT_I]], double %c, i32 1 // CHECK: [[MUL_I:%.*]] = fmul <2 x double> %b, [[VECINIT1_I]] @@ -68,7 +68,7 @@ return vmlsq_n_f64(a, b, c); } -// CHECK-LABEL: define <2 x float> @test_vmla_lane_f32_0(<2 x float> %a, <2 x float> %b, <2 x float> %v) #0 { +// CHECK-LABEL: define frozen <2 x float> @test_vmla_lane_f32_0(<2 x float> frozen %a, <2 x float> frozen %b, <2 x float> frozen %v) #0 { // CHECK: [[TMP0:%.*]] = bitcast <2 x float> [[V:%.*]] to <8 x i8> // CHECK: [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x float> // CHECK: [[LANE:%.*]] = shufflevector <2 x float> [[TMP1]], <2 x float> [[TMP1]], <2 x i32> zeroinitializer @@ -79,7 +79,7 @@ return vmla_lane_f32(a, b, v, 0); } -// CHECK-LABEL: define <4 x float> @test_vmlaq_lane_f32_0(<4 x float> %a, <4 x float> %b, <2 x float> %v) #1 { +// CHECK-LABEL: define frozen <4 x float> @test_vmlaq_lane_f32_0(<4 x float> frozen %a, <4 x float> frozen %b, <2 x float> frozen %v) #1 { // CHECK: [[TMP0:%.*]] = bitcast <2 x float> [[V:%.*]] to <8 x i8> // CHECK: [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x float> // CHECK: [[LANE:%.*]] = shufflevector <2 x float> [[TMP1]], <2 x float> [[TMP1]], <4 x i32> zeroinitializer @@ -90,7 +90,7 @@ return vmlaq_lane_f32(a, b, v, 0); } -// CHECK-LABEL: define <2 x float> @test_vmla_laneq_f32_0(<2 x float> %a, <2 x float> %b, <4 x float> %v) #1 { +// CHECK-LABEL: define frozen <2 x float> @test_vmla_laneq_f32_0(<2 x float> frozen %a, <2 x float> frozen %b, <4 x float> frozen %v) #1 { // CHECK: [[TMP0:%.*]] = bitcast <4 x float> [[V:%.*]] to <16 x i8> // CHECK: [[TMP1:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x float> // CHECK: [[LANE:%.*]] = shufflevector <4 x float> [[TMP1]], <4 x float> [[TMP1]], <2 x i32> zeroinitializer @@ -101,7 +101,7 @@ return vmla_laneq_f32(a, b, v, 0); } -// CHECK-LABEL: define <4 x float> @test_vmlaq_laneq_f32_0(<4 x float> %a, <4 x float> %b, <4 x float> %v) #1 { +// CHECK-LABEL: define frozen <4 x float> @test_vmlaq_laneq_f32_0(<4 x float> frozen %a, <4 x float> frozen %b, <4 x float> frozen %v) #1 { // CHECK: [[TMP0:%.*]] = bitcast <4 x float> [[V:%.*]] to <16 x i8> // CHECK: [[TMP1:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x float> // CHECK: [[LANE:%.*]] = shufflevector <4 x float> [[TMP1]], <4 x float> [[TMP1]], <4 x i32> zeroinitializer @@ -112,7 +112,7 @@ return vmlaq_laneq_f32(a, b, v, 0); } -// CHECK-LABEL: define <2 x float> @test_vmls_lane_f32_0(<2 x float> %a, <2 x float> %b, <2 x float> %v) #0 { +// CHECK-LABEL: define frozen <2 x float> @test_vmls_lane_f32_0(<2 x float> frozen %a, <2 x float> frozen %b, <2 x float> frozen %v) #0 { // CHECK: [[TMP0:%.*]] = bitcast <2 x float> [[V:%.*]] to <8 x i8> // CHECK: [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x float> // CHECK: [[LANE:%.*]] = shufflevector <2 x float> [[TMP1]], <2 x float> [[TMP1]], <2 x i32> zeroinitializer @@ -123,7 +123,7 @@ return vmls_lane_f32(a, b, v, 0); } -// CHECK-LABEL: define <4 x float> @test_vmlsq_lane_f32_0(<4 x float> %a, <4 x float> %b, <2 x float> %v) #1 { +// CHECK-LABEL: define frozen <4 x float> @test_vmlsq_lane_f32_0(<4 x float> frozen %a, <4 x float> frozen %b, <2 x float> frozen %v) #1 { // CHECK: [[TMP0:%.*]] = bitcast <2 x float> [[V:%.*]] to <8 x i8> // CHECK: [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x float> // CHECK: [[LANE:%.*]] = shufflevector <2 x float> [[TMP1]], <2 x float> [[TMP1]], <4 x i32> zeroinitializer @@ -134,7 +134,7 @@ return vmlsq_lane_f32(a, b, v, 0); } -// CHECK-LABEL: define <2 x float> @test_vmls_laneq_f32_0(<2 x float> %a, <2 x float> %b, <4 x float> %v) #1 { +// CHECK-LABEL: define frozen <2 x float> @test_vmls_laneq_f32_0(<2 x float> frozen %a, <2 x float> frozen %b, <4 x float> frozen %v) #1 { // CHECK: [[TMP0:%.*]] = bitcast <4 x float> [[V:%.*]] to <16 x i8> // CHECK: [[TMP1:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x float> // CHECK: [[LANE:%.*]] = shufflevector <4 x float> [[TMP1]], <4 x float> [[TMP1]], <2 x i32> zeroinitializer @@ -145,7 +145,7 @@ return vmls_laneq_f32(a, b, v, 0); } -// CHECK-LABEL: define <4 x float> @test_vmlsq_laneq_f32_0(<4 x float> %a, <4 x float> %b, <4 x float> %v) #1 { +// CHECK-LABEL: define frozen <4 x float> @test_vmlsq_laneq_f32_0(<4 x float> frozen %a, <4 x float> frozen %b, <4 x float> frozen %v) #1 { // CHECK: [[TMP0:%.*]] = bitcast <4 x float> [[V:%.*]] to <16 x i8> // CHECK: [[TMP1:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x float> // CHECK: [[LANE:%.*]] = shufflevector <4 x float> [[TMP1]], <4 x float> [[TMP1]], <4 x i32> zeroinitializer @@ -156,7 +156,7 @@ return vmlsq_laneq_f32(a, b, v, 0); } -// CHECK-LABEL: define <2 x float> @test_vmla_lane_f32(<2 x float> %a, <2 x float> %b, <2 x float> %v) #0 { +// CHECK-LABEL: define frozen <2 x float> @test_vmla_lane_f32(<2 x float> frozen %a, <2 x float> frozen %b, <2 x float> frozen %v) #0 { // CHECK: [[TMP0:%.*]] = bitcast <2 x float> [[V:%.*]] to <8 x i8> // CHECK: [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x float> // CHECK: [[LANE:%.*]] = shufflevector <2 x float> [[TMP1]], <2 x float> [[TMP1]], <2 x i32> @@ -167,7 +167,7 @@ return vmla_lane_f32(a, b, v, 1); } -// CHECK-LABEL: define <4 x float> @test_vmlaq_lane_f32(<4 x float> %a, <4 x float> %b, <2 x float> %v) #1 { +// CHECK-LABEL: define frozen <4 x float> @test_vmlaq_lane_f32(<4 x float> frozen %a, <4 x float> frozen %b, <2 x float> frozen %v) #1 { // CHECK: [[TMP0:%.*]] = bitcast <2 x float> [[V:%.*]] to <8 x i8> // CHECK: [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x float> // CHECK: [[LANE:%.*]] = shufflevector <2 x float> [[TMP1]], <2 x float> [[TMP1]], <4 x i32> @@ -178,7 +178,7 @@ return vmlaq_lane_f32(a, b, v, 1); } -// CHECK-LABEL: define <2 x float> @test_vmla_laneq_f32(<2 x float> %a, <2 x float> %b, <4 x float> %v) #1 { +// CHECK-LABEL: define frozen <2 x float> @test_vmla_laneq_f32(<2 x float> frozen %a, <2 x float> frozen %b, <4 x float> frozen %v) #1 { // CHECK: [[TMP0:%.*]] = bitcast <4 x float> [[V:%.*]] to <16 x i8> // CHECK: [[TMP1:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x float> // CHECK: [[LANE:%.*]] = shufflevector <4 x float> [[TMP1]], <4 x float> [[TMP1]], <2 x i32> @@ -189,7 +189,7 @@ return vmla_laneq_f32(a, b, v, 3); } -// CHECK-LABEL: define <4 x float> @test_vmlaq_laneq_f32(<4 x float> %a, <4 x float> %b, <4 x float> %v) #1 { +// CHECK-LABEL: define frozen <4 x float> @test_vmlaq_laneq_f32(<4 x float> frozen %a, <4 x float> frozen %b, <4 x float> frozen %v) #1 { // CHECK: [[TMP0:%.*]] = bitcast <4 x float> [[V:%.*]] to <16 x i8> // CHECK: [[TMP1:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x float> // CHECK: [[LANE:%.*]] = shufflevector <4 x float> [[TMP1]], <4 x float> [[TMP1]], <4 x i32> @@ -200,7 +200,7 @@ return vmlaq_laneq_f32(a, b, v, 3); } -// CHECK-LABEL: define <2 x float> @test_vmls_lane_f32(<2 x float> %a, <2 x float> %b, <2 x float> %v) #0 { +// CHECK-LABEL: define frozen <2 x float> @test_vmls_lane_f32(<2 x float> frozen %a, <2 x float> frozen %b, <2 x float> frozen %v) #0 { // CHECK: [[TMP0:%.*]] = bitcast <2 x float> [[V:%.*]] to <8 x i8> // CHECK: [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x float> // CHECK: [[LANE:%.*]] = shufflevector <2 x float> [[TMP1]], <2 x float> [[TMP1]], <2 x i32> @@ -211,7 +211,7 @@ return vmls_lane_f32(a, b, v, 1); } -// CHECK-LABEL: define <4 x float> @test_vmlsq_lane_f32(<4 x float> %a, <4 x float> %b, <2 x float> %v) #1 { +// CHECK-LABEL: define frozen <4 x float> @test_vmlsq_lane_f32(<4 x float> frozen %a, <4 x float> frozen %b, <2 x float> frozen %v) #1 { // CHECK: [[TMP0:%.*]] = bitcast <2 x float> [[V:%.*]] to <8 x i8> // CHECK: [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x float> // CHECK: [[LANE:%.*]] = shufflevector <2 x float> [[TMP1]], <2 x float> [[TMP1]], <4 x i32> @@ -222,7 +222,7 @@ float32x4_t test_vmlsq_lane_f32(float32x4_t a, float32x4_t b, float32x2_t v) { return vmlsq_lane_f32(a, b, v, 1); } -// CHECK-LABEL: define <2 x float> @test_vmls_laneq_f32(<2 x float> %a, <2 x float> %b, <4 x float> %v) #1 { +// CHECK-LABEL: define frozen <2 x float> @test_vmls_laneq_f32(<2 x float> frozen %a, <2 x float> frozen %b, <4 x float> frozen %v) #1 { // CHECK: [[TMP0:%.*]] = bitcast <4 x float> [[V:%.*]] to <16 x i8> // CHECK: [[TMP1:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x float> // CHECK: [[LANE:%.*]] = shufflevector <4 x float> [[TMP1]], <4 x float> [[TMP1]], <2 x i32> @@ -233,7 +233,7 @@ return vmls_laneq_f32(a, b, v, 3); } -// CHECK-LABEL: define <4 x float> @test_vmlsq_laneq_f32(<4 x float> %a, <4 x float> %b, <4 x float> %v) #1 { +// CHECK-LABEL: define frozen <4 x float> @test_vmlsq_laneq_f32(<4 x float> frozen %a, <4 x float> frozen %b, <4 x float> frozen %v) #1 { // CHECK: [[TMP0:%.*]] = bitcast <4 x float> [[V:%.*]] to <16 x i8> // CHECK: [[TMP1:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x float> // CHECK: [[LANE:%.*]] = shufflevector <4 x float> [[TMP1]], <4 x float> [[TMP1]], <4 x i32> @@ -244,7 +244,7 @@ return vmlsq_laneq_f32(a, b, v, 3); } -// CHECK-LABEL: define <2 x double> @test_vfmaq_n_f64(<2 x double> %a, <2 x double> %b, double %c) #1 { +// CHECK-LABEL: define frozen <2 x double> @test_vfmaq_n_f64(<2 x double> frozen %a, <2 x double> frozen %b, double frozen %c) #1 { // CHECK: [[VECINIT_I:%.*]] = insertelement <2 x double> undef, double %c, i32 0 // CHECK: [[VECINIT1_I:%.*]] = insertelement <2 x double> [[VECINIT_I]], double %c, i32 1 // CHECK: [[TMP6:%.*]] = call <2 x double> @llvm.fma.v2f64(<2 x double> %b, <2 x double> [[VECINIT1_I]], <2 x double> %a) @@ -253,7 +253,7 @@ return vfmaq_n_f64(a, b, c); } -// CHECK-LABEL: define <2 x double> @test_vfmsq_n_f64(<2 x double> %a, <2 x double> %b, double %c) #1 { +// CHECK-LABEL: define frozen <2 x double> @test_vfmsq_n_f64(<2 x double> frozen %a, <2 x double> frozen %b, double frozen %c) #1 { // CHECK: [[SUB_I:%.*]] = fneg <2 x double> %b // CHECK: [[VECINIT_I:%.*]] = insertelement <2 x double> undef, double %c, i32 0 // CHECK: [[VECINIT1_I:%.*]] = insertelement <2 x double> [[VECINIT_I]], double %c, i32 1 diff --git a/clang/test/CodeGen/aarch64-neon-ldst-one.c b/clang/test/CodeGen/aarch64-neon-ldst-one.c --- a/clang/test/CodeGen/aarch64-neon-ldst-one.c +++ b/clang/test/CodeGen/aarch64-neon-ldst-one.c @@ -4,7 +4,7 @@ #include -// CHECK-LABEL: define <16 x i8> @test_vld1q_dup_u8(i8* %a) #0 { +// CHECK-LABEL: define frozen <16 x i8> @test_vld1q_dup_u8(i8* frozen %a) #0 { // CHECK: [[TMP0:%.*]] = load i8, i8* %a // CHECK: [[TMP1:%.*]] = insertelement <16 x i8> undef, i8 [[TMP0]], i32 0 // CHECK: [[LANE:%.*]] = shufflevector <16 x i8> [[TMP1]], <16 x i8> [[TMP1]], <16 x i32> zeroinitializer @@ -13,7 +13,7 @@ return vld1q_dup_u8(a); } -// CHECK-LABEL: define <8 x i16> @test_vld1q_dup_u16(i16* %a) #0 { +// CHECK-LABEL: define frozen <8 x i16> @test_vld1q_dup_u16(i16* frozen %a) #0 { // CHECK: [[TMP0:%.*]] = bitcast i16* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i16* // CHECK: [[TMP2:%.*]] = load i16, i16* [[TMP1]] @@ -24,7 +24,7 @@ return vld1q_dup_u16(a); } -// CHECK-LABEL: define <4 x i32> @test_vld1q_dup_u32(i32* %a) #0 { +// CHECK-LABEL: define frozen <4 x i32> @test_vld1q_dup_u32(i32* frozen %a) #0 { // CHECK: [[TMP0:%.*]] = bitcast i32* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i32* // CHECK: [[TMP2:%.*]] = load i32, i32* [[TMP1]] @@ -35,7 +35,7 @@ return vld1q_dup_u32(a); } -// CHECK-LABEL: define <2 x i64> @test_vld1q_dup_u64(i64* %a) #0 { +// CHECK-LABEL: define frozen <2 x i64> @test_vld1q_dup_u64(i64* frozen %a) #0 { // CHECK: [[TMP0:%.*]] = bitcast i64* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i64* // CHECK: [[TMP2:%.*]] = load i64, i64* [[TMP1]] @@ -46,7 +46,7 @@ return vld1q_dup_u64(a); } -// CHECK-LABEL: define <16 x i8> @test_vld1q_dup_s8(i8* %a) #0 { +// CHECK-LABEL: define frozen <16 x i8> @test_vld1q_dup_s8(i8* frozen %a) #0 { // CHECK: [[TMP0:%.*]] = load i8, i8* %a // CHECK: [[TMP1:%.*]] = insertelement <16 x i8> undef, i8 [[TMP0]], i32 0 // CHECK: [[LANE:%.*]] = shufflevector <16 x i8> [[TMP1]], <16 x i8> [[TMP1]], <16 x i32> zeroinitializer @@ -55,7 +55,7 @@ return vld1q_dup_s8(a); } -// CHECK-LABEL: define <8 x i16> @test_vld1q_dup_s16(i16* %a) #0 { +// CHECK-LABEL: define frozen <8 x i16> @test_vld1q_dup_s16(i16* frozen %a) #0 { // CHECK: [[TMP0:%.*]] = bitcast i16* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i16* // CHECK: [[TMP2:%.*]] = load i16, i16* [[TMP1]] @@ -66,7 +66,7 @@ return vld1q_dup_s16(a); } -// CHECK-LABEL: define <4 x i32> @test_vld1q_dup_s32(i32* %a) #0 { +// CHECK-LABEL: define frozen <4 x i32> @test_vld1q_dup_s32(i32* frozen %a) #0 { // CHECK: [[TMP0:%.*]] = bitcast i32* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i32* // CHECK: [[TMP2:%.*]] = load i32, i32* [[TMP1]] @@ -77,7 +77,7 @@ return vld1q_dup_s32(a); } -// CHECK-LABEL: define <2 x i64> @test_vld1q_dup_s64(i64* %a) #0 { +// CHECK-LABEL: define frozen <2 x i64> @test_vld1q_dup_s64(i64* frozen %a) #0 { // CHECK: [[TMP0:%.*]] = bitcast i64* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i64* // CHECK: [[TMP2:%.*]] = load i64, i64* [[TMP1]] @@ -88,7 +88,7 @@ return vld1q_dup_s64(a); } -// CHECK-LABEL: define <8 x half> @test_vld1q_dup_f16(half* %a) #0 { +// CHECK-LABEL: define frozen <8 x half> @test_vld1q_dup_f16(half* frozen %a) #0 { // CHECK: [[TMP0:%.*]] = bitcast half* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to half* // CHECK: [[TMP2:%.*]] = load half, half* [[TMP1]] @@ -99,7 +99,7 @@ return vld1q_dup_f16(a); } -// CHECK-LABEL: define <4 x float> @test_vld1q_dup_f32(float* %a) #0 { +// CHECK-LABEL: define frozen <4 x float> @test_vld1q_dup_f32(float* frozen %a) #0 { // CHECK: [[TMP0:%.*]] = bitcast float* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to float* // CHECK: [[TMP2:%.*]] = load float, float* [[TMP1]] @@ -110,7 +110,7 @@ return vld1q_dup_f32(a); } -// CHECK-LABEL: define <2 x double> @test_vld1q_dup_f64(double* %a) #0 { +// CHECK-LABEL: define frozen <2 x double> @test_vld1q_dup_f64(double* frozen %a) #0 { // CHECK: [[TMP0:%.*]] = bitcast double* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to double* // CHECK: [[TMP2:%.*]] = load double, double* [[TMP1]] @@ -121,7 +121,7 @@ return vld1q_dup_f64(a); } -// CHECK-LABEL: define <16 x i8> @test_vld1q_dup_p8(i8* %a) #0 { +// CHECK-LABEL: define frozen <16 x i8> @test_vld1q_dup_p8(i8* frozen %a) #0 { // CHECK: [[TMP0:%.*]] = load i8, i8* %a // CHECK: [[TMP1:%.*]] = insertelement <16 x i8> undef, i8 [[TMP0]], i32 0 // CHECK: [[LANE:%.*]] = shufflevector <16 x i8> [[TMP1]], <16 x i8> [[TMP1]], <16 x i32> zeroinitializer @@ -130,7 +130,7 @@ return vld1q_dup_p8(a); } -// CHECK-LABEL: define <8 x i16> @test_vld1q_dup_p16(i16* %a) #0 { +// CHECK-LABEL: define frozen <8 x i16> @test_vld1q_dup_p16(i16* frozen %a) #0 { // CHECK: [[TMP0:%.*]] = bitcast i16* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i16* // CHECK: [[TMP2:%.*]] = load i16, i16* [[TMP1]] @@ -141,7 +141,7 @@ return vld1q_dup_p16(a); } -// CHECK-LABEL: define <2 x i64> @test_vld1q_dup_p64(i64* %a) #0 { +// CHECK-LABEL: define frozen <2 x i64> @test_vld1q_dup_p64(i64* frozen %a) #0 { // CHECK: [[TMP0:%.*]] = bitcast i64* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i64* // CHECK: [[TMP2:%.*]] = load i64, i64* [[TMP1]] @@ -152,7 +152,7 @@ return vld1q_dup_p64(a); } -// CHECK-LABEL: define <8 x i8> @test_vld1_dup_u8(i8* %a) #1 { +// CHECK-LABEL: define frozen <8 x i8> @test_vld1_dup_u8(i8* frozen %a) #1 { // CHECK: [[TMP0:%.*]] = load i8, i8* %a // CHECK: [[TMP1:%.*]] = insertelement <8 x i8> undef, i8 [[TMP0]], i32 0 // CHECK: [[LANE:%.*]] = shufflevector <8 x i8> [[TMP1]], <8 x i8> [[TMP1]], <8 x i32> zeroinitializer @@ -161,7 +161,7 @@ return vld1_dup_u8(a); } -// CHECK-LABEL: define <4 x i16> @test_vld1_dup_u16(i16* %a) #1 { +// CHECK-LABEL: define frozen <4 x i16> @test_vld1_dup_u16(i16* frozen %a) #1 { // CHECK: [[TMP0:%.*]] = bitcast i16* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i16* // CHECK: [[TMP2:%.*]] = load i16, i16* [[TMP1]] @@ -172,7 +172,7 @@ return vld1_dup_u16(a); } -// CHECK-LABEL: define <2 x i32> @test_vld1_dup_u32(i32* %a) #1 { +// CHECK-LABEL: define frozen <2 x i32> @test_vld1_dup_u32(i32* frozen %a) #1 { // CHECK: [[TMP0:%.*]] = bitcast i32* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i32* // CHECK: [[TMP2:%.*]] = load i32, i32* [[TMP1]] @@ -183,7 +183,7 @@ return vld1_dup_u32(a); } -// CHECK-LABEL: define <1 x i64> @test_vld1_dup_u64(i64* %a) #1 { +// CHECK-LABEL: define frozen <1 x i64> @test_vld1_dup_u64(i64* frozen %a) #1 { // CHECK: [[TMP0:%.*]] = bitcast i64* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i64* // CHECK: [[TMP2:%.*]] = load i64, i64* [[TMP1]] @@ -194,7 +194,7 @@ return vld1_dup_u64(a); } -// CHECK-LABEL: define <8 x i8> @test_vld1_dup_s8(i8* %a) #1 { +// CHECK-LABEL: define frozen <8 x i8> @test_vld1_dup_s8(i8* frozen %a) #1 { // CHECK: [[TMP0:%.*]] = load i8, i8* %a // CHECK: [[TMP1:%.*]] = insertelement <8 x i8> undef, i8 [[TMP0]], i32 0 // CHECK: [[LANE:%.*]] = shufflevector <8 x i8> [[TMP1]], <8 x i8> [[TMP1]], <8 x i32> zeroinitializer @@ -203,7 +203,7 @@ return vld1_dup_s8(a); } -// CHECK-LABEL: define <4 x i16> @test_vld1_dup_s16(i16* %a) #1 { +// CHECK-LABEL: define frozen <4 x i16> @test_vld1_dup_s16(i16* frozen %a) #1 { // CHECK: [[TMP0:%.*]] = bitcast i16* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i16* // CHECK: [[TMP2:%.*]] = load i16, i16* [[TMP1]] @@ -214,7 +214,7 @@ return vld1_dup_s16(a); } -// CHECK-LABEL: define <2 x i32> @test_vld1_dup_s32(i32* %a) #1 { +// CHECK-LABEL: define frozen <2 x i32> @test_vld1_dup_s32(i32* frozen %a) #1 { // CHECK: [[TMP0:%.*]] = bitcast i32* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i32* // CHECK: [[TMP2:%.*]] = load i32, i32* [[TMP1]] @@ -225,7 +225,7 @@ return vld1_dup_s32(a); } -// CHECK-LABEL: define <1 x i64> @test_vld1_dup_s64(i64* %a) #1 { +// CHECK-LABEL: define frozen <1 x i64> @test_vld1_dup_s64(i64* frozen %a) #1 { // CHECK: [[TMP0:%.*]] = bitcast i64* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i64* // CHECK: [[TMP2:%.*]] = load i64, i64* [[TMP1]] @@ -236,7 +236,7 @@ return vld1_dup_s64(a); } -// CHECK-LABEL: define <4 x half> @test_vld1_dup_f16(half* %a) #1 { +// CHECK-LABEL: define frozen <4 x half> @test_vld1_dup_f16(half* frozen %a) #1 { // CHECK: [[TMP0:%.*]] = bitcast half* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to half* // CHECK: [[TMP2:%.*]] = load half, half* [[TMP1]] @@ -247,7 +247,7 @@ return vld1_dup_f16(a); } -// CHECK-LABEL: define <2 x float> @test_vld1_dup_f32(float* %a) #1 { +// CHECK-LABEL: define frozen <2 x float> @test_vld1_dup_f32(float* frozen %a) #1 { // CHECK: [[TMP0:%.*]] = bitcast float* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to float* // CHECK: [[TMP2:%.*]] = load float, float* [[TMP1]] @@ -258,7 +258,7 @@ return vld1_dup_f32(a); } -// CHECK-LABEL: define <1 x double> @test_vld1_dup_f64(double* %a) #1 { +// CHECK-LABEL: define frozen <1 x double> @test_vld1_dup_f64(double* frozen %a) #1 { // CHECK: [[TMP0:%.*]] = bitcast double* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to double* // CHECK: [[TMP2:%.*]] = load double, double* [[TMP1]] @@ -269,7 +269,7 @@ return vld1_dup_f64(a); } -// CHECK-LABEL: define <8 x i8> @test_vld1_dup_p8(i8* %a) #1 { +// CHECK-LABEL: define frozen <8 x i8> @test_vld1_dup_p8(i8* frozen %a) #1 { // CHECK: [[TMP0:%.*]] = load i8, i8* %a // CHECK: [[TMP1:%.*]] = insertelement <8 x i8> undef, i8 [[TMP0]], i32 0 // CHECK: [[LANE:%.*]] = shufflevector <8 x i8> [[TMP1]], <8 x i8> [[TMP1]], <8 x i32> zeroinitializer @@ -278,7 +278,7 @@ return vld1_dup_p8(a); } -// CHECK-LABEL: define <4 x i16> @test_vld1_dup_p16(i16* %a) #1 { +// CHECK-LABEL: define frozen <4 x i16> @test_vld1_dup_p16(i16* frozen %a) #1 { // CHECK: [[TMP0:%.*]] = bitcast i16* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i16* // CHECK: [[TMP2:%.*]] = load i16, i16* [[TMP1]] @@ -289,7 +289,7 @@ return vld1_dup_p16(a); } -// CHECK-LABEL: define <1 x i64> @test_vld1_dup_p64(i64* %a) #1 { +// CHECK-LABEL: define frozen <1 x i64> @test_vld1_dup_p64(i64* frozen %a) #1 { // CHECK: [[TMP0:%.*]] = bitcast i64* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i64* // CHECK: [[TMP2:%.*]] = load i64, i64* [[TMP1]] @@ -300,7 +300,7 @@ return vld1_dup_p64(a); } -// CHECK-LABEL: define %struct.uint64x2x2_t @test_vld2q_dup_u64(i64* %a) #2 { +// CHECK-LABEL: define %struct.uint64x2x2_t @test_vld2q_dup_u64(i64* frozen %a) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.uint64x2x2_t, align 16 // CHECK: [[__RET:%.*]] = alloca %struct.uint64x2x2_t, align 16 // CHECK: [[TMP0:%.*]] = bitcast %struct.uint64x2x2_t* [[__RET]] to i8* @@ -318,7 +318,7 @@ return vld2q_dup_u64(a); } -// CHECK-LABEL: define %struct.int64x2x2_t @test_vld2q_dup_s64(i64* %a) #2 { +// CHECK-LABEL: define %struct.int64x2x2_t @test_vld2q_dup_s64(i64* frozen %a) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.int64x2x2_t, align 16 // CHECK: [[__RET:%.*]] = alloca %struct.int64x2x2_t, align 16 // CHECK: [[TMP0:%.*]] = bitcast %struct.int64x2x2_t* [[__RET]] to i8* @@ -336,7 +336,7 @@ return vld2q_dup_s64(a); } -// CHECK-LABEL: define %struct.float64x2x2_t @test_vld2q_dup_f64(double* %a) #2 { +// CHECK-LABEL: define %struct.float64x2x2_t @test_vld2q_dup_f64(double* frozen %a) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.float64x2x2_t, align 16 // CHECK: [[__RET:%.*]] = alloca %struct.float64x2x2_t, align 16 // CHECK: [[TMP0:%.*]] = bitcast %struct.float64x2x2_t* [[__RET]] to i8* @@ -354,7 +354,7 @@ return vld2q_dup_f64(a); } -// CHECK-LABEL: define %struct.poly64x2x2_t @test_vld2q_dup_p64(i64* %a) #2 { +// CHECK-LABEL: define %struct.poly64x2x2_t @test_vld2q_dup_p64(i64* frozen %a) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.poly64x2x2_t, align 16 // CHECK: [[__RET:%.*]] = alloca %struct.poly64x2x2_t, align 16 // CHECK: [[TMP0:%.*]] = bitcast %struct.poly64x2x2_t* [[__RET]] to i8* @@ -372,7 +372,7 @@ return vld2q_dup_p64(a); } -// CHECK-LABEL: define %struct.float64x1x2_t @test_vld2_dup_f64(double* %a) #2 { +// CHECK-LABEL: define %struct.float64x1x2_t @test_vld2_dup_f64(double* frozen %a) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.float64x1x2_t, align 8 // CHECK: [[__RET:%.*]] = alloca %struct.float64x1x2_t, align 8 // CHECK: [[TMP0:%.*]] = bitcast %struct.float64x1x2_t* [[__RET]] to i8* @@ -390,7 +390,7 @@ return vld2_dup_f64(a); } -// CHECK-LABEL: define %struct.poly64x1x2_t @test_vld2_dup_p64(i64* %a) #2 { +// CHECK-LABEL: define %struct.poly64x1x2_t @test_vld2_dup_p64(i64* frozen %a) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.poly64x1x2_t, align 8 // CHECK: [[__RET:%.*]] = alloca %struct.poly64x1x2_t, align 8 // CHECK: [[TMP0:%.*]] = bitcast %struct.poly64x1x2_t* [[__RET]] to i8* @@ -408,7 +408,7 @@ return vld2_dup_p64(a); } -// CHECK-LABEL: define %struct.uint64x2x3_t @test_vld3q_dup_u64(i64* %a) #2 { +// CHECK-LABEL: define %struct.uint64x2x3_t @test_vld3q_dup_u64(i64* frozen %a) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.uint64x2x3_t, align 16 // CHECK: [[__RET:%.*]] = alloca %struct.uint64x2x3_t, align 16 // CHECK: [[TMP0:%.*]] = bitcast %struct.uint64x2x3_t* [[__RET]] to i8* @@ -427,7 +427,7 @@ // [{{x[0-9]+|sp}}] } -// CHECK-LABEL: define %struct.int64x2x3_t @test_vld3q_dup_s64(i64* %a) #2 { +// CHECK-LABEL: define %struct.int64x2x3_t @test_vld3q_dup_s64(i64* frozen %a) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.int64x2x3_t, align 16 // CHECK: [[__RET:%.*]] = alloca %struct.int64x2x3_t, align 16 // CHECK: [[TMP0:%.*]] = bitcast %struct.int64x2x3_t* [[__RET]] to i8* @@ -446,7 +446,7 @@ // [{{x[0-9]+|sp}}] } -// CHECK-LABEL: define %struct.float64x2x3_t @test_vld3q_dup_f64(double* %a) #2 { +// CHECK-LABEL: define %struct.float64x2x3_t @test_vld3q_dup_f64(double* frozen %a) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.float64x2x3_t, align 16 // CHECK: [[__RET:%.*]] = alloca %struct.float64x2x3_t, align 16 // CHECK: [[TMP0:%.*]] = bitcast %struct.float64x2x3_t* [[__RET]] to i8* @@ -465,7 +465,7 @@ // [{{x[0-9]+|sp}}] } -// CHECK-LABEL: define %struct.poly64x2x3_t @test_vld3q_dup_p64(i64* %a) #2 { +// CHECK-LABEL: define %struct.poly64x2x3_t @test_vld3q_dup_p64(i64* frozen %a) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.poly64x2x3_t, align 16 // CHECK: [[__RET:%.*]] = alloca %struct.poly64x2x3_t, align 16 // CHECK: [[TMP0:%.*]] = bitcast %struct.poly64x2x3_t* [[__RET]] to i8* @@ -484,7 +484,7 @@ // [{{x[0-9]+|sp}}] } -// CHECK-LABEL: define %struct.float64x1x3_t @test_vld3_dup_f64(double* %a) #2 { +// CHECK-LABEL: define %struct.float64x1x3_t @test_vld3_dup_f64(double* frozen %a) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.float64x1x3_t, align 8 // CHECK: [[__RET:%.*]] = alloca %struct.float64x1x3_t, align 8 // CHECK: [[TMP0:%.*]] = bitcast %struct.float64x1x3_t* [[__RET]] to i8* @@ -503,7 +503,7 @@ // [{{x[0-9]+|sp}}] } -// CHECK-LABEL: define %struct.poly64x1x3_t @test_vld3_dup_p64(i64* %a) #2 { +// CHECK-LABEL: define %struct.poly64x1x3_t @test_vld3_dup_p64(i64* frozen %a) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.poly64x1x3_t, align 8 // CHECK: [[__RET:%.*]] = alloca %struct.poly64x1x3_t, align 8 // CHECK: [[TMP0:%.*]] = bitcast %struct.poly64x1x3_t* [[__RET]] to i8* @@ -522,7 +522,7 @@ // [{{x[0-9]+|sp}}] } -// CHECK-LABEL: define %struct.uint64x2x4_t @test_vld4q_dup_u64(i64* %a) #2 { +// CHECK-LABEL: define %struct.uint64x2x4_t @test_vld4q_dup_u64(i64* frozen %a) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.uint64x2x4_t, align 16 // CHECK: [[__RET:%.*]] = alloca %struct.uint64x2x4_t, align 16 // CHECK: [[TMP0:%.*]] = bitcast %struct.uint64x2x4_t* [[__RET]] to i8* @@ -540,7 +540,7 @@ return vld4q_dup_u64(a); } -// CHECK-LABEL: define %struct.int64x2x4_t @test_vld4q_dup_s64(i64* %a) #2 { +// CHECK-LABEL: define %struct.int64x2x4_t @test_vld4q_dup_s64(i64* frozen %a) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.int64x2x4_t, align 16 // CHECK: [[__RET:%.*]] = alloca %struct.int64x2x4_t, align 16 // CHECK: [[TMP0:%.*]] = bitcast %struct.int64x2x4_t* [[__RET]] to i8* @@ -558,7 +558,7 @@ return vld4q_dup_s64(a); } -// CHECK-LABEL: define %struct.float64x2x4_t @test_vld4q_dup_f64(double* %a) #2 { +// CHECK-LABEL: define %struct.float64x2x4_t @test_vld4q_dup_f64(double* frozen %a) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.float64x2x4_t, align 16 // CHECK: [[__RET:%.*]] = alloca %struct.float64x2x4_t, align 16 // CHECK: [[TMP0:%.*]] = bitcast %struct.float64x2x4_t* [[__RET]] to i8* @@ -576,7 +576,7 @@ return vld4q_dup_f64(a); } -// CHECK-LABEL: define %struct.poly64x2x4_t @test_vld4q_dup_p64(i64* %a) #2 { +// CHECK-LABEL: define %struct.poly64x2x4_t @test_vld4q_dup_p64(i64* frozen %a) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.poly64x2x4_t, align 16 // CHECK: [[__RET:%.*]] = alloca %struct.poly64x2x4_t, align 16 // CHECK: [[TMP0:%.*]] = bitcast %struct.poly64x2x4_t* [[__RET]] to i8* @@ -594,7 +594,7 @@ return vld4q_dup_p64(a); } -// CHECK-LABEL: define %struct.float64x1x4_t @test_vld4_dup_f64(double* %a) #2 { +// CHECK-LABEL: define %struct.float64x1x4_t @test_vld4_dup_f64(double* frozen %a) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.float64x1x4_t, align 8 // CHECK: [[__RET:%.*]] = alloca %struct.float64x1x4_t, align 8 // CHECK: [[TMP0:%.*]] = bitcast %struct.float64x1x4_t* [[__RET]] to i8* @@ -612,7 +612,7 @@ return vld4_dup_f64(a); } -// CHECK-LABEL: define %struct.poly64x1x4_t @test_vld4_dup_p64(i64* %a) #2 { +// CHECK-LABEL: define %struct.poly64x1x4_t @test_vld4_dup_p64(i64* frozen %a) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.poly64x1x4_t, align 8 // CHECK: [[__RET:%.*]] = alloca %struct.poly64x1x4_t, align 8 // CHECK: [[TMP0:%.*]] = bitcast %struct.poly64x1x4_t* [[__RET]] to i8* @@ -630,7 +630,7 @@ return vld4_dup_p64(a); } -// CHECK-LABEL: define <16 x i8> @test_vld1q_lane_u8(i8* %a, <16 x i8> %b) #0 { +// CHECK-LABEL: define frozen <16 x i8> @test_vld1q_lane_u8(i8* frozen %a, <16 x i8> frozen %b) #0 { // CHECK: [[TMP0:%.*]] = load i8, i8* %a // CHECK: [[VLD1_LANE:%.*]] = insertelement <16 x i8> %b, i8 [[TMP0]], i32 15 // CHECK: ret <16 x i8> [[VLD1_LANE]] @@ -638,7 +638,7 @@ return vld1q_lane_u8(a, b, 15); } -// CHECK-LABEL: define <8 x i16> @test_vld1q_lane_u16(i16* %a, <8 x i16> %b) #0 { +// CHECK-LABEL: define frozen <8 x i16> @test_vld1q_lane_u16(i16* frozen %a, <8 x i16> frozen %b) #0 { // CHECK: [[TMP0:%.*]] = bitcast i16* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast <8 x i16> %b to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16> @@ -650,7 +650,7 @@ return vld1q_lane_u16(a, b, 7); } -// CHECK-LABEL: define <4 x i32> @test_vld1q_lane_u32(i32* %a, <4 x i32> %b) #0 { +// CHECK-LABEL: define frozen <4 x i32> @test_vld1q_lane_u32(i32* frozen %a, <4 x i32> frozen %b) #0 { // CHECK: [[TMP0:%.*]] = bitcast i32* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast <4 x i32> %b to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32> @@ -662,7 +662,7 @@ return vld1q_lane_u32(a, b, 3); } -// CHECK-LABEL: define <2 x i64> @test_vld1q_lane_u64(i64* %a, <2 x i64> %b) #0 { +// CHECK-LABEL: define frozen <2 x i64> @test_vld1q_lane_u64(i64* frozen %a, <2 x i64> frozen %b) #0 { // CHECK: [[TMP0:%.*]] = bitcast i64* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast <2 x i64> %b to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x i64> @@ -674,7 +674,7 @@ return vld1q_lane_u64(a, b, 1); } -// CHECK-LABEL: define <16 x i8> @test_vld1q_lane_s8(i8* %a, <16 x i8> %b) #0 { +// CHECK-LABEL: define frozen <16 x i8> @test_vld1q_lane_s8(i8* frozen %a, <16 x i8> frozen %b) #0 { // CHECK: [[TMP0:%.*]] = load i8, i8* %a // CHECK: [[VLD1_LANE:%.*]] = insertelement <16 x i8> %b, i8 [[TMP0]], i32 15 // CHECK: ret <16 x i8> [[VLD1_LANE]] @@ -682,7 +682,7 @@ return vld1q_lane_s8(a, b, 15); } -// CHECK-LABEL: define <8 x i16> @test_vld1q_lane_s16(i16* %a, <8 x i16> %b) #0 { +// CHECK-LABEL: define frozen <8 x i16> @test_vld1q_lane_s16(i16* frozen %a, <8 x i16> frozen %b) #0 { // CHECK: [[TMP0:%.*]] = bitcast i16* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast <8 x i16> %b to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16> @@ -694,7 +694,7 @@ return vld1q_lane_s16(a, b, 7); } -// CHECK-LABEL: define <4 x i32> @test_vld1q_lane_s32(i32* %a, <4 x i32> %b) #0 { +// CHECK-LABEL: define frozen <4 x i32> @test_vld1q_lane_s32(i32* frozen %a, <4 x i32> frozen %b) #0 { // CHECK: [[TMP0:%.*]] = bitcast i32* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast <4 x i32> %b to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32> @@ -706,7 +706,7 @@ return vld1q_lane_s32(a, b, 3); } -// CHECK-LABEL: define <2 x i64> @test_vld1q_lane_s64(i64* %a, <2 x i64> %b) #0 { +// CHECK-LABEL: define frozen <2 x i64> @test_vld1q_lane_s64(i64* frozen %a, <2 x i64> frozen %b) #0 { // CHECK: [[TMP0:%.*]] = bitcast i64* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast <2 x i64> %b to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x i64> @@ -718,7 +718,7 @@ return vld1q_lane_s64(a, b, 1); } -// CHECK-LABEL: define <8 x half> @test_vld1q_lane_f16(half* %a, <8 x half> %b) #0 { +// CHECK-LABEL: define frozen <8 x half> @test_vld1q_lane_f16(half* frozen %a, <8 x half> frozen %b) #0 { // CHECK: [[TMP0:%.*]] = bitcast half* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast <8 x half> %b to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x half> @@ -730,7 +730,7 @@ return vld1q_lane_f16(a, b, 7); } -// CHECK-LABEL: define <4 x float> @test_vld1q_lane_f32(float* %a, <4 x float> %b) #0 { +// CHECK-LABEL: define frozen <4 x float> @test_vld1q_lane_f32(float* frozen %a, <4 x float> frozen %b) #0 { // CHECK: [[TMP0:%.*]] = bitcast float* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast <4 x float> %b to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x float> @@ -742,7 +742,7 @@ return vld1q_lane_f32(a, b, 3); } -// CHECK-LABEL: define <2 x double> @test_vld1q_lane_f64(double* %a, <2 x double> %b) #0 { +// CHECK-LABEL: define frozen <2 x double> @test_vld1q_lane_f64(double* frozen %a, <2 x double> frozen %b) #0 { // CHECK: [[TMP0:%.*]] = bitcast double* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast <2 x double> %b to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x double> @@ -754,7 +754,7 @@ return vld1q_lane_f64(a, b, 1); } -// CHECK-LABEL: define <16 x i8> @test_vld1q_lane_p8(i8* %a, <16 x i8> %b) #0 { +// CHECK-LABEL: define frozen <16 x i8> @test_vld1q_lane_p8(i8* frozen %a, <16 x i8> frozen %b) #0 { // CHECK: [[TMP0:%.*]] = load i8, i8* %a // CHECK: [[VLD1_LANE:%.*]] = insertelement <16 x i8> %b, i8 [[TMP0]], i32 15 // CHECK: ret <16 x i8> [[VLD1_LANE]] @@ -762,7 +762,7 @@ return vld1q_lane_p8(a, b, 15); } -// CHECK-LABEL: define <8 x i16> @test_vld1q_lane_p16(i16* %a, <8 x i16> %b) #0 { +// CHECK-LABEL: define frozen <8 x i16> @test_vld1q_lane_p16(i16* frozen %a, <8 x i16> frozen %b) #0 { // CHECK: [[TMP0:%.*]] = bitcast i16* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast <8 x i16> %b to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16> @@ -774,7 +774,7 @@ return vld1q_lane_p16(a, b, 7); } -// CHECK-LABEL: define <2 x i64> @test_vld1q_lane_p64(i64* %a, <2 x i64> %b) #0 { +// CHECK-LABEL: define frozen <2 x i64> @test_vld1q_lane_p64(i64* frozen %a, <2 x i64> frozen %b) #0 { // CHECK: [[TMP0:%.*]] = bitcast i64* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast <2 x i64> %b to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x i64> @@ -786,7 +786,7 @@ return vld1q_lane_p64(a, b, 1); } -// CHECK-LABEL: define <8 x i8> @test_vld1_lane_u8(i8* %a, <8 x i8> %b) #1 { +// CHECK-LABEL: define frozen <8 x i8> @test_vld1_lane_u8(i8* frozen %a, <8 x i8> frozen %b) #1 { // CHECK: [[TMP0:%.*]] = load i8, i8* %a // CHECK: [[VLD1_LANE:%.*]] = insertelement <8 x i8> %b, i8 [[TMP0]], i32 7 // CHECK: ret <8 x i8> [[VLD1_LANE]] @@ -794,7 +794,7 @@ return vld1_lane_u8(a, b, 7); } -// CHECK-LABEL: define <4 x i16> @test_vld1_lane_u16(i16* %a, <4 x i16> %b) #1 { +// CHECK-LABEL: define frozen <4 x i16> @test_vld1_lane_u16(i16* frozen %a, <4 x i16> frozen %b) #1 { // CHECK: [[TMP0:%.*]] = bitcast i16* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast <4 x i16> %b to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16> @@ -806,7 +806,7 @@ return vld1_lane_u16(a, b, 3); } -// CHECK-LABEL: define <2 x i32> @test_vld1_lane_u32(i32* %a, <2 x i32> %b) #1 { +// CHECK-LABEL: define frozen <2 x i32> @test_vld1_lane_u32(i32* frozen %a, <2 x i32> frozen %b) #1 { // CHECK: [[TMP0:%.*]] = bitcast i32* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast <2 x i32> %b to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32> @@ -818,7 +818,7 @@ return vld1_lane_u32(a, b, 1); } -// CHECK-LABEL: define <1 x i64> @test_vld1_lane_u64(i64* %a, <1 x i64> %b) #1 { +// CHECK-LABEL: define frozen <1 x i64> @test_vld1_lane_u64(i64* frozen %a, <1 x i64> frozen %b) #1 { // CHECK: [[TMP0:%.*]] = bitcast i64* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast <1 x i64> %b to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <1 x i64> @@ -830,7 +830,7 @@ return vld1_lane_u64(a, b, 0); } -// CHECK-LABEL: define <8 x i8> @test_vld1_lane_s8(i8* %a, <8 x i8> %b) #1 { +// CHECK-LABEL: define frozen <8 x i8> @test_vld1_lane_s8(i8* frozen %a, <8 x i8> frozen %b) #1 { // CHECK: [[TMP0:%.*]] = load i8, i8* %a // CHECK: [[VLD1_LANE:%.*]] = insertelement <8 x i8> %b, i8 [[TMP0]], i32 7 // CHECK: ret <8 x i8> [[VLD1_LANE]] @@ -838,7 +838,7 @@ return vld1_lane_s8(a, b, 7); } -// CHECK-LABEL: define <4 x i16> @test_vld1_lane_s16(i16* %a, <4 x i16> %b) #1 { +// CHECK-LABEL: define frozen <4 x i16> @test_vld1_lane_s16(i16* frozen %a, <4 x i16> frozen %b) #1 { // CHECK: [[TMP0:%.*]] = bitcast i16* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast <4 x i16> %b to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16> @@ -850,7 +850,7 @@ return vld1_lane_s16(a, b, 3); } -// CHECK-LABEL: define <2 x i32> @test_vld1_lane_s32(i32* %a, <2 x i32> %b) #1 { +// CHECK-LABEL: define frozen <2 x i32> @test_vld1_lane_s32(i32* frozen %a, <2 x i32> frozen %b) #1 { // CHECK: [[TMP0:%.*]] = bitcast i32* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast <2 x i32> %b to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32> @@ -862,7 +862,7 @@ return vld1_lane_s32(a, b, 1); } -// CHECK-LABEL: define <1 x i64> @test_vld1_lane_s64(i64* %a, <1 x i64> %b) #1 { +// CHECK-LABEL: define frozen <1 x i64> @test_vld1_lane_s64(i64* frozen %a, <1 x i64> frozen %b) #1 { // CHECK: [[TMP0:%.*]] = bitcast i64* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast <1 x i64> %b to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <1 x i64> @@ -874,7 +874,7 @@ return vld1_lane_s64(a, b, 0); } -// CHECK-LABEL: define <4 x half> @test_vld1_lane_f16(half* %a, <4 x half> %b) #1 { +// CHECK-LABEL: define frozen <4 x half> @test_vld1_lane_f16(half* frozen %a, <4 x half> frozen %b) #1 { // CHECK: [[TMP0:%.*]] = bitcast half* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast <4 x half> %b to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x half> @@ -886,7 +886,7 @@ return vld1_lane_f16(a, b, 3); } -// CHECK-LABEL: define <2 x float> @test_vld1_lane_f32(float* %a, <2 x float> %b) #1 { +// CHECK-LABEL: define frozen <2 x float> @test_vld1_lane_f32(float* frozen %a, <2 x float> frozen %b) #1 { // CHECK: [[TMP0:%.*]] = bitcast float* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast <2 x float> %b to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x float> @@ -898,7 +898,7 @@ return vld1_lane_f32(a, b, 1); } -// CHECK-LABEL: define <1 x double> @test_vld1_lane_f64(double* %a, <1 x double> %b) #1 { +// CHECK-LABEL: define frozen <1 x double> @test_vld1_lane_f64(double* frozen %a, <1 x double> frozen %b) #1 { // CHECK: [[TMP0:%.*]] = bitcast double* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast <1 x double> %b to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <1 x double> @@ -910,7 +910,7 @@ return vld1_lane_f64(a, b, 0); } -// CHECK-LABEL: define <8 x i8> @test_vld1_lane_p8(i8* %a, <8 x i8> %b) #1 { +// CHECK-LABEL: define frozen <8 x i8> @test_vld1_lane_p8(i8* frozen %a, <8 x i8> frozen %b) #1 { // CHECK: [[TMP0:%.*]] = load i8, i8* %a // CHECK: [[VLD1_LANE:%.*]] = insertelement <8 x i8> %b, i8 [[TMP0]], i32 7 // CHECK: ret <8 x i8> [[VLD1_LANE]] @@ -918,7 +918,7 @@ return vld1_lane_p8(a, b, 7); } -// CHECK-LABEL: define <4 x i16> @test_vld1_lane_p16(i16* %a, <4 x i16> %b) #1 { +// CHECK-LABEL: define frozen <4 x i16> @test_vld1_lane_p16(i16* frozen %a, <4 x i16> frozen %b) #1 { // CHECK: [[TMP0:%.*]] = bitcast i16* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast <4 x i16> %b to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16> @@ -930,7 +930,7 @@ return vld1_lane_p16(a, b, 3); } -// CHECK-LABEL: define <1 x i64> @test_vld1_lane_p64(i64* %a, <1 x i64> %b) #1 { +// CHECK-LABEL: define frozen <1 x i64> @test_vld1_lane_p64(i64* frozen %a, <1 x i64> frozen %b) #1 { // CHECK: [[TMP0:%.*]] = bitcast i64* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast <1 x i64> %b to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <1 x i64> @@ -942,7 +942,7 @@ return vld1_lane_p64(a, b, 0); } -// CHECK-LABEL: define %struct.int8x16x2_t @test_vld2q_lane_s8(i8* %ptr, [2 x <16 x i8>] %src.coerce) #2 { +// CHECK-LABEL: define %struct.int8x16x2_t @test_vld2q_lane_s8(i8* frozen %ptr, [2 x <16 x i8>] %src.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.int8x16x2_t, align 16 // CHECK: [[SRC:%.*]] = alloca %struct.int8x16x2_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.int8x16x2_t, align 16 @@ -971,7 +971,7 @@ return vld2q_lane_s8(ptr, src, 15); } -// CHECK-LABEL: define %struct.uint8x16x2_t @test_vld2q_lane_u8(i8* %ptr, [2 x <16 x i8>] %src.coerce) #2 { +// CHECK-LABEL: define %struct.uint8x16x2_t @test_vld2q_lane_u8(i8* frozen %ptr, [2 x <16 x i8>] %src.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.uint8x16x2_t, align 16 // CHECK: [[SRC:%.*]] = alloca %struct.uint8x16x2_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.uint8x16x2_t, align 16 @@ -1000,7 +1000,7 @@ return vld2q_lane_u8(ptr, src, 15); } -// CHECK-LABEL: define %struct.poly8x16x2_t @test_vld2q_lane_p8(i8* %ptr, [2 x <16 x i8>] %src.coerce) #2 { +// CHECK-LABEL: define %struct.poly8x16x2_t @test_vld2q_lane_p8(i8* frozen %ptr, [2 x <16 x i8>] %src.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.poly8x16x2_t, align 16 // CHECK: [[SRC:%.*]] = alloca %struct.poly8x16x2_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.poly8x16x2_t, align 16 @@ -1029,7 +1029,7 @@ return vld2q_lane_p8(ptr, src, 15); } -// CHECK-LABEL: define %struct.int8x16x3_t @test_vld3q_lane_s8(i8* %ptr, [3 x <16 x i8>] %src.coerce) #2 { +// CHECK-LABEL: define %struct.int8x16x3_t @test_vld3q_lane_s8(i8* frozen %ptr, [3 x <16 x i8>] %src.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.int8x16x3_t, align 16 // CHECK: [[SRC:%.*]] = alloca %struct.int8x16x3_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.int8x16x3_t, align 16 @@ -1061,7 +1061,7 @@ return vld3q_lane_s8(ptr, src, 15); } -// CHECK-LABEL: define %struct.uint8x16x3_t @test_vld3q_lane_u8(i8* %ptr, [3 x <16 x i8>] %src.coerce) #2 { +// CHECK-LABEL: define %struct.uint8x16x3_t @test_vld3q_lane_u8(i8* frozen %ptr, [3 x <16 x i8>] %src.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.uint8x16x3_t, align 16 // CHECK: [[SRC:%.*]] = alloca %struct.uint8x16x3_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.uint8x16x3_t, align 16 @@ -1093,7 +1093,7 @@ return vld3q_lane_u8(ptr, src, 15); } -// CHECK-LABEL: define %struct.uint16x8x2_t @test_vld2q_lane_u16(i16* %a, [2 x <8 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.uint16x8x2_t @test_vld2q_lane_u16(i16* frozen %a, [2 x <8 x i16>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.uint16x8x2_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.uint16x8x2_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.uint16x8x2_t, align 16 @@ -1127,7 +1127,7 @@ return vld2q_lane_u16(a, b, 7); } -// CHECK-LABEL: define %struct.uint32x4x2_t @test_vld2q_lane_u32(i32* %a, [2 x <4 x i32>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.uint32x4x2_t @test_vld2q_lane_u32(i32* frozen %a, [2 x <4 x i32>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.uint32x4x2_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.uint32x4x2_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.uint32x4x2_t, align 16 @@ -1161,7 +1161,7 @@ return vld2q_lane_u32(a, b, 3); } -// CHECK-LABEL: define %struct.uint64x2x2_t @test_vld2q_lane_u64(i64* %a, [2 x <2 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.uint64x2x2_t @test_vld2q_lane_u64(i64* frozen %a, [2 x <2 x i64>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.uint64x2x2_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.uint64x2x2_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.uint64x2x2_t, align 16 @@ -1195,7 +1195,7 @@ return vld2q_lane_u64(a, b, 1); } -// CHECK-LABEL: define %struct.int16x8x2_t @test_vld2q_lane_s16(i16* %a, [2 x <8 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.int16x8x2_t @test_vld2q_lane_s16(i16* frozen %a, [2 x <8 x i16>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.int16x8x2_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.int16x8x2_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.int16x8x2_t, align 16 @@ -1229,7 +1229,7 @@ return vld2q_lane_s16(a, b, 7); } -// CHECK-LABEL: define %struct.int32x4x2_t @test_vld2q_lane_s32(i32* %a, [2 x <4 x i32>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.int32x4x2_t @test_vld2q_lane_s32(i32* frozen %a, [2 x <4 x i32>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.int32x4x2_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.int32x4x2_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.int32x4x2_t, align 16 @@ -1263,7 +1263,7 @@ return vld2q_lane_s32(a, b, 3); } -// CHECK-LABEL: define %struct.int64x2x2_t @test_vld2q_lane_s64(i64* %a, [2 x <2 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.int64x2x2_t @test_vld2q_lane_s64(i64* frozen %a, [2 x <2 x i64>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.int64x2x2_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.int64x2x2_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.int64x2x2_t, align 16 @@ -1297,7 +1297,7 @@ return vld2q_lane_s64(a, b, 1); } -// CHECK-LABEL: define %struct.float16x8x2_t @test_vld2q_lane_f16(half* %a, [2 x <8 x half>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.float16x8x2_t @test_vld2q_lane_f16(half* frozen %a, [2 x <8 x half>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.float16x8x2_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.float16x8x2_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.float16x8x2_t, align 16 @@ -1331,7 +1331,7 @@ return vld2q_lane_f16(a, b, 7); } -// CHECK-LABEL: define %struct.float32x4x2_t @test_vld2q_lane_f32(float* %a, [2 x <4 x float>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.float32x4x2_t @test_vld2q_lane_f32(float* frozen %a, [2 x <4 x float>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.float32x4x2_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.float32x4x2_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.float32x4x2_t, align 16 @@ -1365,7 +1365,7 @@ return vld2q_lane_f32(a, b, 3); } -// CHECK-LABEL: define %struct.float64x2x2_t @test_vld2q_lane_f64(double* %a, [2 x <2 x double>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.float64x2x2_t @test_vld2q_lane_f64(double* frozen %a, [2 x <2 x double>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.float64x2x2_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.float64x2x2_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.float64x2x2_t, align 16 @@ -1399,7 +1399,7 @@ return vld2q_lane_f64(a, b, 1); } -// CHECK-LABEL: define %struct.poly16x8x2_t @test_vld2q_lane_p16(i16* %a, [2 x <8 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.poly16x8x2_t @test_vld2q_lane_p16(i16* frozen %a, [2 x <8 x i16>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.poly16x8x2_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.poly16x8x2_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.poly16x8x2_t, align 16 @@ -1433,7 +1433,7 @@ return vld2q_lane_p16(a, b, 7); } -// CHECK-LABEL: define %struct.poly64x2x2_t @test_vld2q_lane_p64(i64* %a, [2 x <2 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.poly64x2x2_t @test_vld2q_lane_p64(i64* frozen %a, [2 x <2 x i64>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.poly64x2x2_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.poly64x2x2_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.poly64x2x2_t, align 16 @@ -1467,7 +1467,7 @@ return vld2q_lane_p64(a, b, 1); } -// CHECK-LABEL: define %struct.uint8x8x2_t @test_vld2_lane_u8(i8* %a, [2 x <8 x i8>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.uint8x8x2_t @test_vld2_lane_u8(i8* frozen %a, [2 x <8 x i8>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.uint8x8x2_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.uint8x8x2_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.uint8x8x2_t, align 8 @@ -1496,7 +1496,7 @@ return vld2_lane_u8(a, b, 7); } -// CHECK-LABEL: define %struct.uint16x4x2_t @test_vld2_lane_u16(i16* %a, [2 x <4 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.uint16x4x2_t @test_vld2_lane_u16(i16* frozen %a, [2 x <4 x i16>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.uint16x4x2_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.uint16x4x2_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.uint16x4x2_t, align 8 @@ -1530,7 +1530,7 @@ return vld2_lane_u16(a, b, 3); } -// CHECK-LABEL: define %struct.uint32x2x2_t @test_vld2_lane_u32(i32* %a, [2 x <2 x i32>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.uint32x2x2_t @test_vld2_lane_u32(i32* frozen %a, [2 x <2 x i32>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.uint32x2x2_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.uint32x2x2_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.uint32x2x2_t, align 8 @@ -1564,7 +1564,7 @@ return vld2_lane_u32(a, b, 1); } -// CHECK-LABEL: define %struct.uint64x1x2_t @test_vld2_lane_u64(i64* %a, [2 x <1 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.uint64x1x2_t @test_vld2_lane_u64(i64* frozen %a, [2 x <1 x i64>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.uint64x1x2_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.uint64x1x2_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.uint64x1x2_t, align 8 @@ -1598,7 +1598,7 @@ return vld2_lane_u64(a, b, 0); } -// CHECK-LABEL: define %struct.int8x8x2_t @test_vld2_lane_s8(i8* %a, [2 x <8 x i8>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.int8x8x2_t @test_vld2_lane_s8(i8* frozen %a, [2 x <8 x i8>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.int8x8x2_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.int8x8x2_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.int8x8x2_t, align 8 @@ -1627,7 +1627,7 @@ return vld2_lane_s8(a, b, 7); } -// CHECK-LABEL: define %struct.int16x4x2_t @test_vld2_lane_s16(i16* %a, [2 x <4 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.int16x4x2_t @test_vld2_lane_s16(i16* frozen %a, [2 x <4 x i16>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.int16x4x2_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.int16x4x2_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.int16x4x2_t, align 8 @@ -1661,7 +1661,7 @@ return vld2_lane_s16(a, b, 3); } -// CHECK-LABEL: define %struct.int32x2x2_t @test_vld2_lane_s32(i32* %a, [2 x <2 x i32>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.int32x2x2_t @test_vld2_lane_s32(i32* frozen %a, [2 x <2 x i32>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.int32x2x2_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.int32x2x2_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.int32x2x2_t, align 8 @@ -1695,7 +1695,7 @@ return vld2_lane_s32(a, b, 1); } -// CHECK-LABEL: define %struct.int64x1x2_t @test_vld2_lane_s64(i64* %a, [2 x <1 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.int64x1x2_t @test_vld2_lane_s64(i64* frozen %a, [2 x <1 x i64>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.int64x1x2_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.int64x1x2_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.int64x1x2_t, align 8 @@ -1729,7 +1729,7 @@ return vld2_lane_s64(a, b, 0); } -// CHECK-LABEL: define %struct.float16x4x2_t @test_vld2_lane_f16(half* %a, [2 x <4 x half>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.float16x4x2_t @test_vld2_lane_f16(half* frozen %a, [2 x <4 x half>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.float16x4x2_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.float16x4x2_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.float16x4x2_t, align 8 @@ -1763,7 +1763,7 @@ return vld2_lane_f16(a, b, 3); } -// CHECK-LABEL: define %struct.float32x2x2_t @test_vld2_lane_f32(float* %a, [2 x <2 x float>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.float32x2x2_t @test_vld2_lane_f32(float* frozen %a, [2 x <2 x float>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.float32x2x2_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.float32x2x2_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.float32x2x2_t, align 8 @@ -1797,7 +1797,7 @@ return vld2_lane_f32(a, b, 1); } -// CHECK-LABEL: define %struct.float64x1x2_t @test_vld2_lane_f64(double* %a, [2 x <1 x double>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.float64x1x2_t @test_vld2_lane_f64(double* frozen %a, [2 x <1 x double>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.float64x1x2_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.float64x1x2_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.float64x1x2_t, align 8 @@ -1831,7 +1831,7 @@ return vld2_lane_f64(a, b, 0); } -// CHECK-LABEL: define %struct.poly8x8x2_t @test_vld2_lane_p8(i8* %a, [2 x <8 x i8>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.poly8x8x2_t @test_vld2_lane_p8(i8* frozen %a, [2 x <8 x i8>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.poly8x8x2_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.poly8x8x2_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.poly8x8x2_t, align 8 @@ -1860,7 +1860,7 @@ return vld2_lane_p8(a, b, 7); } -// CHECK-LABEL: define %struct.poly16x4x2_t @test_vld2_lane_p16(i16* %a, [2 x <4 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.poly16x4x2_t @test_vld2_lane_p16(i16* frozen %a, [2 x <4 x i16>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.poly16x4x2_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.poly16x4x2_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.poly16x4x2_t, align 8 @@ -1894,7 +1894,7 @@ return vld2_lane_p16(a, b, 3); } -// CHECK-LABEL: define %struct.poly64x1x2_t @test_vld2_lane_p64(i64* %a, [2 x <1 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.poly64x1x2_t @test_vld2_lane_p64(i64* frozen %a, [2 x <1 x i64>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.poly64x1x2_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.poly64x1x2_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.poly64x1x2_t, align 8 @@ -1928,7 +1928,7 @@ return vld2_lane_p64(a, b, 0); } -// CHECK-LABEL: define %struct.uint16x8x3_t @test_vld3q_lane_u16(i16* %a, [3 x <8 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.uint16x8x3_t @test_vld3q_lane_u16(i16* frozen %a, [3 x <8 x i16>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.uint16x8x3_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.uint16x8x3_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.uint16x8x3_t, align 16 @@ -1967,7 +1967,7 @@ return vld3q_lane_u16(a, b, 7); } -// CHECK-LABEL: define %struct.uint32x4x3_t @test_vld3q_lane_u32(i32* %a, [3 x <4 x i32>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.uint32x4x3_t @test_vld3q_lane_u32(i32* frozen %a, [3 x <4 x i32>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.uint32x4x3_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.uint32x4x3_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.uint32x4x3_t, align 16 @@ -2006,7 +2006,7 @@ return vld3q_lane_u32(a, b, 3); } -// CHECK-LABEL: define %struct.uint64x2x3_t @test_vld3q_lane_u64(i64* %a, [3 x <2 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.uint64x2x3_t @test_vld3q_lane_u64(i64* frozen %a, [3 x <2 x i64>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.uint64x2x3_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.uint64x2x3_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.uint64x2x3_t, align 16 @@ -2045,7 +2045,7 @@ return vld3q_lane_u64(a, b, 1); } -// CHECK-LABEL: define %struct.int16x8x3_t @test_vld3q_lane_s16(i16* %a, [3 x <8 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.int16x8x3_t @test_vld3q_lane_s16(i16* frozen %a, [3 x <8 x i16>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.int16x8x3_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.int16x8x3_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.int16x8x3_t, align 16 @@ -2084,7 +2084,7 @@ return vld3q_lane_s16(a, b, 7); } -// CHECK-LABEL: define %struct.int32x4x3_t @test_vld3q_lane_s32(i32* %a, [3 x <4 x i32>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.int32x4x3_t @test_vld3q_lane_s32(i32* frozen %a, [3 x <4 x i32>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.int32x4x3_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.int32x4x3_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.int32x4x3_t, align 16 @@ -2123,7 +2123,7 @@ return vld3q_lane_s32(a, b, 3); } -// CHECK-LABEL: define %struct.int64x2x3_t @test_vld3q_lane_s64(i64* %a, [3 x <2 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.int64x2x3_t @test_vld3q_lane_s64(i64* frozen %a, [3 x <2 x i64>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.int64x2x3_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.int64x2x3_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.int64x2x3_t, align 16 @@ -2162,7 +2162,7 @@ return vld3q_lane_s64(a, b, 1); } -// CHECK-LABEL: define %struct.float16x8x3_t @test_vld3q_lane_f16(half* %a, [3 x <8 x half>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.float16x8x3_t @test_vld3q_lane_f16(half* frozen %a, [3 x <8 x half>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.float16x8x3_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.float16x8x3_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.float16x8x3_t, align 16 @@ -2201,7 +2201,7 @@ return vld3q_lane_f16(a, b, 7); } -// CHECK-LABEL: define %struct.float32x4x3_t @test_vld3q_lane_f32(float* %a, [3 x <4 x float>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.float32x4x3_t @test_vld3q_lane_f32(float* frozen %a, [3 x <4 x float>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.float32x4x3_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.float32x4x3_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.float32x4x3_t, align 16 @@ -2240,7 +2240,7 @@ return vld3q_lane_f32(a, b, 3); } -// CHECK-LABEL: define %struct.float64x2x3_t @test_vld3q_lane_f64(double* %a, [3 x <2 x double>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.float64x2x3_t @test_vld3q_lane_f64(double* frozen %a, [3 x <2 x double>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.float64x2x3_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.float64x2x3_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.float64x2x3_t, align 16 @@ -2279,7 +2279,7 @@ return vld3q_lane_f64(a, b, 1); } -// CHECK-LABEL: define %struct.poly8x16x3_t @test_vld3q_lane_p8(i8* %a, [3 x <16 x i8>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.poly8x16x3_t @test_vld3q_lane_p8(i8* frozen %a, [3 x <16 x i8>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.poly8x16x3_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.poly8x16x3_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.poly8x16x3_t, align 16 @@ -2311,7 +2311,7 @@ return vld3q_lane_p8(a, b, 15); } -// CHECK-LABEL: define %struct.poly16x8x3_t @test_vld3q_lane_p16(i16* %a, [3 x <8 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.poly16x8x3_t @test_vld3q_lane_p16(i16* frozen %a, [3 x <8 x i16>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.poly16x8x3_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.poly16x8x3_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.poly16x8x3_t, align 16 @@ -2350,7 +2350,7 @@ return vld3q_lane_p16(a, b, 7); } -// CHECK-LABEL: define %struct.poly64x2x3_t @test_vld3q_lane_p64(i64* %a, [3 x <2 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.poly64x2x3_t @test_vld3q_lane_p64(i64* frozen %a, [3 x <2 x i64>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.poly64x2x3_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.poly64x2x3_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.poly64x2x3_t, align 16 @@ -2389,7 +2389,7 @@ return vld3q_lane_p64(a, b, 1); } -// CHECK-LABEL: define %struct.uint8x8x3_t @test_vld3_lane_u8(i8* %a, [3 x <8 x i8>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.uint8x8x3_t @test_vld3_lane_u8(i8* frozen %a, [3 x <8 x i8>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.uint8x8x3_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.uint8x8x3_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.uint8x8x3_t, align 8 @@ -2421,7 +2421,7 @@ return vld3_lane_u8(a, b, 7); } -// CHECK-LABEL: define %struct.uint16x4x3_t @test_vld3_lane_u16(i16* %a, [3 x <4 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.uint16x4x3_t @test_vld3_lane_u16(i16* frozen %a, [3 x <4 x i16>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.uint16x4x3_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.uint16x4x3_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.uint16x4x3_t, align 8 @@ -2460,7 +2460,7 @@ return vld3_lane_u16(a, b, 3); } -// CHECK-LABEL: define %struct.uint32x2x3_t @test_vld3_lane_u32(i32* %a, [3 x <2 x i32>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.uint32x2x3_t @test_vld3_lane_u32(i32* frozen %a, [3 x <2 x i32>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.uint32x2x3_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.uint32x2x3_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.uint32x2x3_t, align 8 @@ -2499,7 +2499,7 @@ return vld3_lane_u32(a, b, 1); } -// CHECK-LABEL: define %struct.uint64x1x3_t @test_vld3_lane_u64(i64* %a, [3 x <1 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.uint64x1x3_t @test_vld3_lane_u64(i64* frozen %a, [3 x <1 x i64>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.uint64x1x3_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.uint64x1x3_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.uint64x1x3_t, align 8 @@ -2538,7 +2538,7 @@ return vld3_lane_u64(a, b, 0); } -// CHECK-LABEL: define %struct.int8x8x3_t @test_vld3_lane_s8(i8* %a, [3 x <8 x i8>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.int8x8x3_t @test_vld3_lane_s8(i8* frozen %a, [3 x <8 x i8>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.int8x8x3_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.int8x8x3_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.int8x8x3_t, align 8 @@ -2570,7 +2570,7 @@ return vld3_lane_s8(a, b, 7); } -// CHECK-LABEL: define %struct.int16x4x3_t @test_vld3_lane_s16(i16* %a, [3 x <4 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.int16x4x3_t @test_vld3_lane_s16(i16* frozen %a, [3 x <4 x i16>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.int16x4x3_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.int16x4x3_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.int16x4x3_t, align 8 @@ -2609,7 +2609,7 @@ return vld3_lane_s16(a, b, 3); } -// CHECK-LABEL: define %struct.int32x2x3_t @test_vld3_lane_s32(i32* %a, [3 x <2 x i32>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.int32x2x3_t @test_vld3_lane_s32(i32* frozen %a, [3 x <2 x i32>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.int32x2x3_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.int32x2x3_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.int32x2x3_t, align 8 @@ -2648,7 +2648,7 @@ return vld3_lane_s32(a, b, 1); } -// CHECK-LABEL: define %struct.int64x1x3_t @test_vld3_lane_s64(i64* %a, [3 x <1 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.int64x1x3_t @test_vld3_lane_s64(i64* frozen %a, [3 x <1 x i64>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.int64x1x3_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.int64x1x3_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.int64x1x3_t, align 8 @@ -2687,7 +2687,7 @@ return vld3_lane_s64(a, b, 0); } -// CHECK-LABEL: define %struct.float16x4x3_t @test_vld3_lane_f16(half* %a, [3 x <4 x half>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.float16x4x3_t @test_vld3_lane_f16(half* frozen %a, [3 x <4 x half>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.float16x4x3_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.float16x4x3_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.float16x4x3_t, align 8 @@ -2726,7 +2726,7 @@ return vld3_lane_f16(a, b, 3); } -// CHECK-LABEL: define %struct.float32x2x3_t @test_vld3_lane_f32(float* %a, [3 x <2 x float>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.float32x2x3_t @test_vld3_lane_f32(float* frozen %a, [3 x <2 x float>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.float32x2x3_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.float32x2x3_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.float32x2x3_t, align 8 @@ -2765,7 +2765,7 @@ return vld3_lane_f32(a, b, 1); } -// CHECK-LABEL: define %struct.float64x1x3_t @test_vld3_lane_f64(double* %a, [3 x <1 x double>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.float64x1x3_t @test_vld3_lane_f64(double* frozen %a, [3 x <1 x double>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.float64x1x3_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.float64x1x3_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.float64x1x3_t, align 8 @@ -2804,7 +2804,7 @@ return vld3_lane_f64(a, b, 0); } -// CHECK-LABEL: define %struct.poly8x8x3_t @test_vld3_lane_p8(i8* %a, [3 x <8 x i8>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.poly8x8x3_t @test_vld3_lane_p8(i8* frozen %a, [3 x <8 x i8>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.poly8x8x3_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.poly8x8x3_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.poly8x8x3_t, align 8 @@ -2836,7 +2836,7 @@ return vld3_lane_p8(a, b, 7); } -// CHECK-LABEL: define %struct.poly16x4x3_t @test_vld3_lane_p16(i16* %a, [3 x <4 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.poly16x4x3_t @test_vld3_lane_p16(i16* frozen %a, [3 x <4 x i16>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.poly16x4x3_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.poly16x4x3_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.poly16x4x3_t, align 8 @@ -2875,7 +2875,7 @@ return vld3_lane_p16(a, b, 3); } -// CHECK-LABEL: define %struct.poly64x1x3_t @test_vld3_lane_p64(i64* %a, [3 x <1 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.poly64x1x3_t @test_vld3_lane_p64(i64* frozen %a, [3 x <1 x i64>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.poly64x1x3_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.poly64x1x3_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.poly64x1x3_t, align 8 @@ -2914,7 +2914,7 @@ return vld3_lane_p64(a, b, 0); } -// CHECK-LABEL: define %struct.uint8x16x4_t @test_vld4q_lane_u8(i8* %a, [4 x <16 x i8>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.uint8x16x4_t @test_vld4q_lane_u8(i8* frozen %a, [4 x <16 x i8>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.uint8x16x4_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.uint8x16x4_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.uint8x16x4_t, align 16 @@ -2949,7 +2949,7 @@ return vld4q_lane_u8(a, b, 15); } -// CHECK-LABEL: define %struct.uint16x8x4_t @test_vld4q_lane_u16(i16* %a, [4 x <8 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.uint16x8x4_t @test_vld4q_lane_u16(i16* frozen %a, [4 x <8 x i16>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.uint16x8x4_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.uint16x8x4_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.uint16x8x4_t, align 16 @@ -2993,7 +2993,7 @@ return vld4q_lane_u16(a, b, 7); } -// CHECK-LABEL: define %struct.uint32x4x4_t @test_vld4q_lane_u32(i32* %a, [4 x <4 x i32>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.uint32x4x4_t @test_vld4q_lane_u32(i32* frozen %a, [4 x <4 x i32>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.uint32x4x4_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.uint32x4x4_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.uint32x4x4_t, align 16 @@ -3037,7 +3037,7 @@ return vld4q_lane_u32(a, b, 3); } -// CHECK-LABEL: define %struct.uint64x2x4_t @test_vld4q_lane_u64(i64* %a, [4 x <2 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.uint64x2x4_t @test_vld4q_lane_u64(i64* frozen %a, [4 x <2 x i64>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.uint64x2x4_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.uint64x2x4_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.uint64x2x4_t, align 16 @@ -3081,7 +3081,7 @@ return vld4q_lane_u64(a, b, 1); } -// CHECK-LABEL: define %struct.int8x16x4_t @test_vld4q_lane_s8(i8* %a, [4 x <16 x i8>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.int8x16x4_t @test_vld4q_lane_s8(i8* frozen %a, [4 x <16 x i8>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.int8x16x4_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.int8x16x4_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.int8x16x4_t, align 16 @@ -3116,7 +3116,7 @@ return vld4q_lane_s8(a, b, 15); } -// CHECK-LABEL: define %struct.int16x8x4_t @test_vld4q_lane_s16(i16* %a, [4 x <8 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.int16x8x4_t @test_vld4q_lane_s16(i16* frozen %a, [4 x <8 x i16>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.int16x8x4_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.int16x8x4_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.int16x8x4_t, align 16 @@ -3160,7 +3160,7 @@ return vld4q_lane_s16(a, b, 7); } -// CHECK-LABEL: define %struct.int32x4x4_t @test_vld4q_lane_s32(i32* %a, [4 x <4 x i32>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.int32x4x4_t @test_vld4q_lane_s32(i32* frozen %a, [4 x <4 x i32>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.int32x4x4_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.int32x4x4_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.int32x4x4_t, align 16 @@ -3204,7 +3204,7 @@ return vld4q_lane_s32(a, b, 3); } -// CHECK-LABEL: define %struct.int64x2x4_t @test_vld4q_lane_s64(i64* %a, [4 x <2 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.int64x2x4_t @test_vld4q_lane_s64(i64* frozen %a, [4 x <2 x i64>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.int64x2x4_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.int64x2x4_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.int64x2x4_t, align 16 @@ -3248,7 +3248,7 @@ return vld4q_lane_s64(a, b, 1); } -// CHECK-LABEL: define %struct.float16x8x4_t @test_vld4q_lane_f16(half* %a, [4 x <8 x half>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.float16x8x4_t @test_vld4q_lane_f16(half* frozen %a, [4 x <8 x half>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.float16x8x4_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.float16x8x4_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.float16x8x4_t, align 16 @@ -3292,7 +3292,7 @@ return vld4q_lane_f16(a, b, 7); } -// CHECK-LABEL: define %struct.float32x4x4_t @test_vld4q_lane_f32(float* %a, [4 x <4 x float>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.float32x4x4_t @test_vld4q_lane_f32(float* frozen %a, [4 x <4 x float>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.float32x4x4_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.float32x4x4_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.float32x4x4_t, align 16 @@ -3336,7 +3336,7 @@ return vld4q_lane_f32(a, b, 3); } -// CHECK-LABEL: define %struct.float64x2x4_t @test_vld4q_lane_f64(double* %a, [4 x <2 x double>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.float64x2x4_t @test_vld4q_lane_f64(double* frozen %a, [4 x <2 x double>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.float64x2x4_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.float64x2x4_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.float64x2x4_t, align 16 @@ -3380,7 +3380,7 @@ return vld4q_lane_f64(a, b, 1); } -// CHECK-LABEL: define %struct.poly8x16x4_t @test_vld4q_lane_p8(i8* %a, [4 x <16 x i8>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.poly8x16x4_t @test_vld4q_lane_p8(i8* frozen %a, [4 x <16 x i8>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.poly8x16x4_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.poly8x16x4_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.poly8x16x4_t, align 16 @@ -3415,7 +3415,7 @@ return vld4q_lane_p8(a, b, 15); } -// CHECK-LABEL: define %struct.poly16x8x4_t @test_vld4q_lane_p16(i16* %a, [4 x <8 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.poly16x8x4_t @test_vld4q_lane_p16(i16* frozen %a, [4 x <8 x i16>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.poly16x8x4_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.poly16x8x4_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.poly16x8x4_t, align 16 @@ -3459,7 +3459,7 @@ return vld4q_lane_p16(a, b, 7); } -// CHECK-LABEL: define %struct.poly64x2x4_t @test_vld4q_lane_p64(i64* %a, [4 x <2 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.poly64x2x4_t @test_vld4q_lane_p64(i64* frozen %a, [4 x <2 x i64>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.poly64x2x4_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.poly64x2x4_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.poly64x2x4_t, align 16 @@ -3503,7 +3503,7 @@ return vld4q_lane_p64(a, b, 1); } -// CHECK-LABEL: define %struct.uint8x8x4_t @test_vld4_lane_u8(i8* %a, [4 x <8 x i8>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.uint8x8x4_t @test_vld4_lane_u8(i8* frozen %a, [4 x <8 x i8>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.uint8x8x4_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.uint8x8x4_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.uint8x8x4_t, align 8 @@ -3538,7 +3538,7 @@ return vld4_lane_u8(a, b, 7); } -// CHECK-LABEL: define %struct.uint16x4x4_t @test_vld4_lane_u16(i16* %a, [4 x <4 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.uint16x4x4_t @test_vld4_lane_u16(i16* frozen %a, [4 x <4 x i16>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.uint16x4x4_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.uint16x4x4_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.uint16x4x4_t, align 8 @@ -3582,7 +3582,7 @@ return vld4_lane_u16(a, b, 3); } -// CHECK-LABEL: define %struct.uint32x2x4_t @test_vld4_lane_u32(i32* %a, [4 x <2 x i32>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.uint32x2x4_t @test_vld4_lane_u32(i32* frozen %a, [4 x <2 x i32>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.uint32x2x4_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.uint32x2x4_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.uint32x2x4_t, align 8 @@ -3626,7 +3626,7 @@ return vld4_lane_u32(a, b, 1); } -// CHECK-LABEL: define %struct.uint64x1x4_t @test_vld4_lane_u64(i64* %a, [4 x <1 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.uint64x1x4_t @test_vld4_lane_u64(i64* frozen %a, [4 x <1 x i64>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.uint64x1x4_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.uint64x1x4_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.uint64x1x4_t, align 8 @@ -3670,7 +3670,7 @@ return vld4_lane_u64(a, b, 0); } -// CHECK-LABEL: define %struct.int8x8x4_t @test_vld4_lane_s8(i8* %a, [4 x <8 x i8>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.int8x8x4_t @test_vld4_lane_s8(i8* frozen %a, [4 x <8 x i8>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.int8x8x4_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.int8x8x4_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.int8x8x4_t, align 8 @@ -3705,7 +3705,7 @@ return vld4_lane_s8(a, b, 7); } -// CHECK-LABEL: define %struct.int16x4x4_t @test_vld4_lane_s16(i16* %a, [4 x <4 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.int16x4x4_t @test_vld4_lane_s16(i16* frozen %a, [4 x <4 x i16>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.int16x4x4_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.int16x4x4_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.int16x4x4_t, align 8 @@ -3749,7 +3749,7 @@ return vld4_lane_s16(a, b, 3); } -// CHECK-LABEL: define %struct.int32x2x4_t @test_vld4_lane_s32(i32* %a, [4 x <2 x i32>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.int32x2x4_t @test_vld4_lane_s32(i32* frozen %a, [4 x <2 x i32>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.int32x2x4_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.int32x2x4_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.int32x2x4_t, align 8 @@ -3793,7 +3793,7 @@ return vld4_lane_s32(a, b, 1); } -// CHECK-LABEL: define %struct.int64x1x4_t @test_vld4_lane_s64(i64* %a, [4 x <1 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.int64x1x4_t @test_vld4_lane_s64(i64* frozen %a, [4 x <1 x i64>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.int64x1x4_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.int64x1x4_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.int64x1x4_t, align 8 @@ -3837,7 +3837,7 @@ return vld4_lane_s64(a, b, 0); } -// CHECK-LABEL: define %struct.float16x4x4_t @test_vld4_lane_f16(half* %a, [4 x <4 x half>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.float16x4x4_t @test_vld4_lane_f16(half* frozen %a, [4 x <4 x half>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.float16x4x4_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.float16x4x4_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.float16x4x4_t, align 8 @@ -3881,7 +3881,7 @@ return vld4_lane_f16(a, b, 3); } -// CHECK-LABEL: define %struct.float32x2x4_t @test_vld4_lane_f32(float* %a, [4 x <2 x float>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.float32x2x4_t @test_vld4_lane_f32(float* frozen %a, [4 x <2 x float>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.float32x2x4_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.float32x2x4_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.float32x2x4_t, align 8 @@ -3925,7 +3925,7 @@ return vld4_lane_f32(a, b, 1); } -// CHECK-LABEL: define %struct.float64x1x4_t @test_vld4_lane_f64(double* %a, [4 x <1 x double>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.float64x1x4_t @test_vld4_lane_f64(double* frozen %a, [4 x <1 x double>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.float64x1x4_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.float64x1x4_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.float64x1x4_t, align 8 @@ -3969,7 +3969,7 @@ return vld4_lane_f64(a, b, 0); } -// CHECK-LABEL: define %struct.poly8x8x4_t @test_vld4_lane_p8(i8* %a, [4 x <8 x i8>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.poly8x8x4_t @test_vld4_lane_p8(i8* frozen %a, [4 x <8 x i8>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.poly8x8x4_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.poly8x8x4_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.poly8x8x4_t, align 8 @@ -4004,7 +4004,7 @@ return vld4_lane_p8(a, b, 7); } -// CHECK-LABEL: define %struct.poly16x4x4_t @test_vld4_lane_p16(i16* %a, [4 x <4 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.poly16x4x4_t @test_vld4_lane_p16(i16* frozen %a, [4 x <4 x i16>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.poly16x4x4_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.poly16x4x4_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.poly16x4x4_t, align 8 @@ -4048,7 +4048,7 @@ return vld4_lane_p16(a, b, 3); } -// CHECK-LABEL: define %struct.poly64x1x4_t @test_vld4_lane_p64(i64* %a, [4 x <1 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.poly64x1x4_t @test_vld4_lane_p64(i64* frozen %a, [4 x <1 x i64>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.poly64x1x4_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.poly64x1x4_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.poly64x1x4_t, align 8 @@ -4092,7 +4092,7 @@ return vld4_lane_p64(a, b, 0); } -// CHECK-LABEL: define void @test_vst1q_lane_u8(i8* %a, <16 x i8> %b) #0 { +// CHECK-LABEL: define void @test_vst1q_lane_u8(i8* frozen %a, <16 x i8> frozen %b) #0 { // CHECK: [[TMP0:%.*]] = extractelement <16 x i8> %b, i32 15 // CHECK: store i8 [[TMP0]], i8* %a // CHECK: ret void @@ -4100,7 +4100,7 @@ vst1q_lane_u8(a, b, 15); } -// CHECK-LABEL: define void @test_vst1q_lane_u16(i16* %a, <8 x i16> %b) #0 { +// CHECK-LABEL: define void @test_vst1q_lane_u16(i16* frozen %a, <8 x i16> frozen %b) #0 { // CHECK: [[TMP0:%.*]] = bitcast i16* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast <8 x i16> %b to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16> @@ -4112,7 +4112,7 @@ vst1q_lane_u16(a, b, 7); } -// CHECK-LABEL: define void @test_vst1q_lane_u32(i32* %a, <4 x i32> %b) #0 { +// CHECK-LABEL: define void @test_vst1q_lane_u32(i32* frozen %a, <4 x i32> frozen %b) #0 { // CHECK: [[TMP0:%.*]] = bitcast i32* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast <4 x i32> %b to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32> @@ -4124,7 +4124,7 @@ vst1q_lane_u32(a, b, 3); } -// CHECK-LABEL: define void @test_vst1q_lane_u64(i64* %a, <2 x i64> %b) #0 { +// CHECK-LABEL: define void @test_vst1q_lane_u64(i64* frozen %a, <2 x i64> frozen %b) #0 { // CHECK: [[TMP0:%.*]] = bitcast i64* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast <2 x i64> %b to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x i64> @@ -4136,7 +4136,7 @@ vst1q_lane_u64(a, b, 1); } -// CHECK-LABEL: define void @test_vst1q_lane_s8(i8* %a, <16 x i8> %b) #0 { +// CHECK-LABEL: define void @test_vst1q_lane_s8(i8* frozen %a, <16 x i8> frozen %b) #0 { // CHECK: [[TMP0:%.*]] = extractelement <16 x i8> %b, i32 15 // CHECK: store i8 [[TMP0]], i8* %a // CHECK: ret void @@ -4144,7 +4144,7 @@ vst1q_lane_s8(a, b, 15); } -// CHECK-LABEL: define void @test_vst1q_lane_s16(i16* %a, <8 x i16> %b) #0 { +// CHECK-LABEL: define void @test_vst1q_lane_s16(i16* frozen %a, <8 x i16> frozen %b) #0 { // CHECK: [[TMP0:%.*]] = bitcast i16* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast <8 x i16> %b to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16> @@ -4156,7 +4156,7 @@ vst1q_lane_s16(a, b, 7); } -// CHECK-LABEL: define void @test_vst1q_lane_s32(i32* %a, <4 x i32> %b) #0 { +// CHECK-LABEL: define void @test_vst1q_lane_s32(i32* frozen %a, <4 x i32> frozen %b) #0 { // CHECK: [[TMP0:%.*]] = bitcast i32* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast <4 x i32> %b to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32> @@ -4168,7 +4168,7 @@ vst1q_lane_s32(a, b, 3); } -// CHECK-LABEL: define void @test_vst1q_lane_s64(i64* %a, <2 x i64> %b) #0 { +// CHECK-LABEL: define void @test_vst1q_lane_s64(i64* frozen %a, <2 x i64> frozen %b) #0 { // CHECK: [[TMP0:%.*]] = bitcast i64* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast <2 x i64> %b to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x i64> @@ -4180,7 +4180,7 @@ vst1q_lane_s64(a, b, 1); } -// CHECK-LABEL: define void @test_vst1q_lane_f16(half* %a, <8 x half> %b) #0 { +// CHECK-LABEL: define void @test_vst1q_lane_f16(half* frozen %a, <8 x half> frozen %b) #0 { // CHECK: [[TMP0:%.*]] = bitcast half* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast <8 x half> %b to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x half> @@ -4192,7 +4192,7 @@ vst1q_lane_f16(a, b, 7); } -// CHECK-LABEL: define void @test_vst1q_lane_f32(float* %a, <4 x float> %b) #0 { +// CHECK-LABEL: define void @test_vst1q_lane_f32(float* frozen %a, <4 x float> frozen %b) #0 { // CHECK: [[TMP0:%.*]] = bitcast float* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast <4 x float> %b to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x float> @@ -4204,7 +4204,7 @@ vst1q_lane_f32(a, b, 3); } -// CHECK-LABEL: define void @test_vst1q_lane_f64(double* %a, <2 x double> %b) #0 { +// CHECK-LABEL: define void @test_vst1q_lane_f64(double* frozen %a, <2 x double> frozen %b) #0 { // CHECK: [[TMP0:%.*]] = bitcast double* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast <2 x double> %b to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x double> @@ -4216,7 +4216,7 @@ vst1q_lane_f64(a, b, 1); } -// CHECK-LABEL: define void @test_vst1q_lane_p8(i8* %a, <16 x i8> %b) #0 { +// CHECK-LABEL: define void @test_vst1q_lane_p8(i8* frozen %a, <16 x i8> frozen %b) #0 { // CHECK: [[TMP0:%.*]] = extractelement <16 x i8> %b, i32 15 // CHECK: store i8 [[TMP0]], i8* %a // CHECK: ret void @@ -4224,7 +4224,7 @@ vst1q_lane_p8(a, b, 15); } -// CHECK-LABEL: define void @test_vst1q_lane_p16(i16* %a, <8 x i16> %b) #0 { +// CHECK-LABEL: define void @test_vst1q_lane_p16(i16* frozen %a, <8 x i16> frozen %b) #0 { // CHECK: [[TMP0:%.*]] = bitcast i16* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast <8 x i16> %b to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16> @@ -4236,7 +4236,7 @@ vst1q_lane_p16(a, b, 7); } -// CHECK-LABEL: define void @test_vst1q_lane_p64(i64* %a, <2 x i64> %b) #0 { +// CHECK-LABEL: define void @test_vst1q_lane_p64(i64* frozen %a, <2 x i64> frozen %b) #0 { // CHECK: [[TMP0:%.*]] = bitcast i64* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast <2 x i64> %b to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x i64> @@ -4248,7 +4248,7 @@ vst1q_lane_p64(a, b, 1); } -// CHECK-LABEL: define void @test_vst1_lane_u8(i8* %a, <8 x i8> %b) #1 { +// CHECK-LABEL: define void @test_vst1_lane_u8(i8* frozen %a, <8 x i8> frozen %b) #1 { // CHECK: [[TMP0:%.*]] = extractelement <8 x i8> %b, i32 7 // CHECK: store i8 [[TMP0]], i8* %a // CHECK: ret void @@ -4256,7 +4256,7 @@ vst1_lane_u8(a, b, 7); } -// CHECK-LABEL: define void @test_vst1_lane_u16(i16* %a, <4 x i16> %b) #1 { +// CHECK-LABEL: define void @test_vst1_lane_u16(i16* frozen %a, <4 x i16> frozen %b) #1 { // CHECK: [[TMP0:%.*]] = bitcast i16* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast <4 x i16> %b to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16> @@ -4268,7 +4268,7 @@ vst1_lane_u16(a, b, 3); } -// CHECK-LABEL: define void @test_vst1_lane_u32(i32* %a, <2 x i32> %b) #1 { +// CHECK-LABEL: define void @test_vst1_lane_u32(i32* frozen %a, <2 x i32> frozen %b) #1 { // CHECK: [[TMP0:%.*]] = bitcast i32* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast <2 x i32> %b to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32> @@ -4280,7 +4280,7 @@ vst1_lane_u32(a, b, 1); } -// CHECK-LABEL: define void @test_vst1_lane_u64(i64* %a, <1 x i64> %b) #1 { +// CHECK-LABEL: define void @test_vst1_lane_u64(i64* frozen %a, <1 x i64> frozen %b) #1 { // CHECK: [[TMP0:%.*]] = bitcast i64* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast <1 x i64> %b to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <1 x i64> @@ -4292,7 +4292,7 @@ vst1_lane_u64(a, b, 0); } -// CHECK-LABEL: define void @test_vst1_lane_s8(i8* %a, <8 x i8> %b) #1 { +// CHECK-LABEL: define void @test_vst1_lane_s8(i8* frozen %a, <8 x i8> frozen %b) #1 { // CHECK: [[TMP0:%.*]] = extractelement <8 x i8> %b, i32 7 // CHECK: store i8 [[TMP0]], i8* %a // CHECK: ret void @@ -4300,7 +4300,7 @@ vst1_lane_s8(a, b, 7); } -// CHECK-LABEL: define void @test_vst1_lane_s16(i16* %a, <4 x i16> %b) #1 { +// CHECK-LABEL: define void @test_vst1_lane_s16(i16* frozen %a, <4 x i16> frozen %b) #1 { // CHECK: [[TMP0:%.*]] = bitcast i16* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast <4 x i16> %b to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16> @@ -4312,7 +4312,7 @@ vst1_lane_s16(a, b, 3); } -// CHECK-LABEL: define void @test_vst1_lane_s32(i32* %a, <2 x i32> %b) #1 { +// CHECK-LABEL: define void @test_vst1_lane_s32(i32* frozen %a, <2 x i32> frozen %b) #1 { // CHECK: [[TMP0:%.*]] = bitcast i32* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast <2 x i32> %b to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32> @@ -4324,7 +4324,7 @@ vst1_lane_s32(a, b, 1); } -// CHECK-LABEL: define void @test_vst1_lane_s64(i64* %a, <1 x i64> %b) #1 { +// CHECK-LABEL: define void @test_vst1_lane_s64(i64* frozen %a, <1 x i64> frozen %b) #1 { // CHECK: [[TMP0:%.*]] = bitcast i64* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast <1 x i64> %b to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <1 x i64> @@ -4336,7 +4336,7 @@ vst1_lane_s64(a, b, 0); } -// CHECK-LABEL: define void @test_vst1_lane_f16(half* %a, <4 x half> %b) #1 { +// CHECK-LABEL: define void @test_vst1_lane_f16(half* frozen %a, <4 x half> frozen %b) #1 { // CHECK: [[TMP0:%.*]] = bitcast half* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast <4 x half> %b to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x half> @@ -4348,7 +4348,7 @@ vst1_lane_f16(a, b, 3); } -// CHECK-LABEL: define void @test_vst1_lane_f32(float* %a, <2 x float> %b) #1 { +// CHECK-LABEL: define void @test_vst1_lane_f32(float* frozen %a, <2 x float> frozen %b) #1 { // CHECK: [[TMP0:%.*]] = bitcast float* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast <2 x float> %b to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x float> @@ -4360,7 +4360,7 @@ vst1_lane_f32(a, b, 1); } -// CHECK-LABEL: define void @test_vst1_lane_f64(double* %a, <1 x double> %b) #1 { +// CHECK-LABEL: define void @test_vst1_lane_f64(double* frozen %a, <1 x double> frozen %b) #1 { // CHECK: [[TMP0:%.*]] = bitcast double* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast <1 x double> %b to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <1 x double> @@ -4372,7 +4372,7 @@ vst1_lane_f64(a, b, 0); } -// CHECK-LABEL: define void @test_vst1_lane_p8(i8* %a, <8 x i8> %b) #1 { +// CHECK-LABEL: define void @test_vst1_lane_p8(i8* frozen %a, <8 x i8> frozen %b) #1 { // CHECK: [[TMP0:%.*]] = extractelement <8 x i8> %b, i32 7 // CHECK: store i8 [[TMP0]], i8* %a // CHECK: ret void @@ -4380,7 +4380,7 @@ vst1_lane_p8(a, b, 7); } -// CHECK-LABEL: define void @test_vst1_lane_p16(i16* %a, <4 x i16> %b) #1 { +// CHECK-LABEL: define void @test_vst1_lane_p16(i16* frozen %a, <4 x i16> frozen %b) #1 { // CHECK: [[TMP0:%.*]] = bitcast i16* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast <4 x i16> %b to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16> @@ -4392,7 +4392,7 @@ vst1_lane_p16(a, b, 3); } -// CHECK-LABEL: define void @test_vst1_lane_p64(i64* %a, <1 x i64> %b) #1 { +// CHECK-LABEL: define void @test_vst1_lane_p64(i64* frozen %a, <1 x i64> frozen %b) #1 { // CHECK: [[TMP0:%.*]] = bitcast i64* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast <1 x i64> %b to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <1 x i64> @@ -4404,7 +4404,7 @@ vst1_lane_p64(a, b, 0); } -// CHECK-LABEL: define void @test_vst2q_lane_u8(i8* %a, [2 x <16 x i8>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst2q_lane_u8(i8* frozen %a, [2 x <16 x i8>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.uint8x16x2_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.uint8x16x2_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x16x2_t, %struct.uint8x16x2_t* [[B]], i32 0, i32 0 @@ -4424,7 +4424,7 @@ vst2q_lane_u8(a, b, 15); } -// CHECK-LABEL: define void @test_vst2q_lane_u16(i16* %a, [2 x <8 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst2q_lane_u16(i16* frozen %a, [2 x <8 x i16>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.uint16x8x2_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.uint16x8x2_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint16x8x2_t, %struct.uint16x8x2_t* [[B]], i32 0, i32 0 @@ -4449,7 +4449,7 @@ vst2q_lane_u16(a, b, 7); } -// CHECK-LABEL: define void @test_vst2q_lane_u32(i32* %a, [2 x <4 x i32>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst2q_lane_u32(i32* frozen %a, [2 x <4 x i32>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.uint32x4x2_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.uint32x4x2_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint32x4x2_t, %struct.uint32x4x2_t* [[B]], i32 0, i32 0 @@ -4474,7 +4474,7 @@ vst2q_lane_u32(a, b, 3); } -// CHECK-LABEL: define void @test_vst2q_lane_u64(i64* %a, [2 x <2 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst2q_lane_u64(i64* frozen %a, [2 x <2 x i64>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.uint64x2x2_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.uint64x2x2_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint64x2x2_t, %struct.uint64x2x2_t* [[B]], i32 0, i32 0 @@ -4499,7 +4499,7 @@ vst2q_lane_u64(a, b, 1); } -// CHECK-LABEL: define void @test_vst2q_lane_s8(i8* %a, [2 x <16 x i8>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst2q_lane_s8(i8* frozen %a, [2 x <16 x i8>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.int8x16x2_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.int8x16x2_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x16x2_t, %struct.int8x16x2_t* [[B]], i32 0, i32 0 @@ -4519,7 +4519,7 @@ vst2q_lane_s8(a, b, 15); } -// CHECK-LABEL: define void @test_vst2q_lane_s16(i16* %a, [2 x <8 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst2q_lane_s16(i16* frozen %a, [2 x <8 x i16>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.int16x8x2_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.int16x8x2_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int16x8x2_t, %struct.int16x8x2_t* [[B]], i32 0, i32 0 @@ -4544,7 +4544,7 @@ vst2q_lane_s16(a, b, 7); } -// CHECK-LABEL: define void @test_vst2q_lane_s32(i32* %a, [2 x <4 x i32>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst2q_lane_s32(i32* frozen %a, [2 x <4 x i32>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.int32x4x2_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.int32x4x2_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int32x4x2_t, %struct.int32x4x2_t* [[B]], i32 0, i32 0 @@ -4569,7 +4569,7 @@ vst2q_lane_s32(a, b, 3); } -// CHECK-LABEL: define void @test_vst2q_lane_s64(i64* %a, [2 x <2 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst2q_lane_s64(i64* frozen %a, [2 x <2 x i64>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.int64x2x2_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.int64x2x2_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int64x2x2_t, %struct.int64x2x2_t* [[B]], i32 0, i32 0 @@ -4594,7 +4594,7 @@ vst2q_lane_s64(a, b, 1); } -// CHECK-LABEL: define void @test_vst2q_lane_f16(half* %a, [2 x <8 x half>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst2q_lane_f16(half* frozen %a, [2 x <8 x half>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.float16x8x2_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.float16x8x2_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float16x8x2_t, %struct.float16x8x2_t* [[B]], i32 0, i32 0 @@ -4619,7 +4619,7 @@ vst2q_lane_f16(a, b, 7); } -// CHECK-LABEL: define void @test_vst2q_lane_f32(float* %a, [2 x <4 x float>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst2q_lane_f32(float* frozen %a, [2 x <4 x float>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.float32x4x2_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.float32x4x2_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float32x4x2_t, %struct.float32x4x2_t* [[B]], i32 0, i32 0 @@ -4644,7 +4644,7 @@ vst2q_lane_f32(a, b, 3); } -// CHECK-LABEL: define void @test_vst2q_lane_f64(double* %a, [2 x <2 x double>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst2q_lane_f64(double* frozen %a, [2 x <2 x double>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.float64x2x2_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.float64x2x2_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float64x2x2_t, %struct.float64x2x2_t* [[B]], i32 0, i32 0 @@ -4669,7 +4669,7 @@ vst2q_lane_f64(a, b, 1); } -// CHECK-LABEL: define void @test_vst2q_lane_p8(i8* %a, [2 x <16 x i8>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst2q_lane_p8(i8* frozen %a, [2 x <16 x i8>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.poly8x16x2_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.poly8x16x2_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x16x2_t, %struct.poly8x16x2_t* [[B]], i32 0, i32 0 @@ -4689,7 +4689,7 @@ vst2q_lane_p8(a, b, 15); } -// CHECK-LABEL: define void @test_vst2q_lane_p16(i16* %a, [2 x <8 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst2q_lane_p16(i16* frozen %a, [2 x <8 x i16>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.poly16x8x2_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.poly16x8x2_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly16x8x2_t, %struct.poly16x8x2_t* [[B]], i32 0, i32 0 @@ -4714,7 +4714,7 @@ vst2q_lane_p16(a, b, 7); } -// CHECK-LABEL: define void @test_vst2q_lane_p64(i64* %a, [2 x <2 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst2q_lane_p64(i64* frozen %a, [2 x <2 x i64>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.poly64x2x2_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.poly64x2x2_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly64x2x2_t, %struct.poly64x2x2_t* [[B]], i32 0, i32 0 @@ -4739,7 +4739,7 @@ vst2q_lane_p64(a, b, 1); } -// CHECK-LABEL: define void @test_vst2_lane_u8(i8* %a, [2 x <8 x i8>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst2_lane_u8(i8* frozen %a, [2 x <8 x i8>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.uint8x8x2_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.uint8x8x2_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x8x2_t, %struct.uint8x8x2_t* [[B]], i32 0, i32 0 @@ -4759,7 +4759,7 @@ vst2_lane_u8(a, b, 7); } -// CHECK-LABEL: define void @test_vst2_lane_u16(i16* %a, [2 x <4 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst2_lane_u16(i16* frozen %a, [2 x <4 x i16>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.uint16x4x2_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.uint16x4x2_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint16x4x2_t, %struct.uint16x4x2_t* [[B]], i32 0, i32 0 @@ -4784,7 +4784,7 @@ vst2_lane_u16(a, b, 3); } -// CHECK-LABEL: define void @test_vst2_lane_u32(i32* %a, [2 x <2 x i32>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst2_lane_u32(i32* frozen %a, [2 x <2 x i32>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.uint32x2x2_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.uint32x2x2_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint32x2x2_t, %struct.uint32x2x2_t* [[B]], i32 0, i32 0 @@ -4809,7 +4809,7 @@ vst2_lane_u32(a, b, 1); } -// CHECK-LABEL: define void @test_vst2_lane_u64(i64* %a, [2 x <1 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst2_lane_u64(i64* frozen %a, [2 x <1 x i64>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.uint64x1x2_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.uint64x1x2_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint64x1x2_t, %struct.uint64x1x2_t* [[B]], i32 0, i32 0 @@ -4834,7 +4834,7 @@ vst2_lane_u64(a, b, 0); } -// CHECK-LABEL: define void @test_vst2_lane_s8(i8* %a, [2 x <8 x i8>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst2_lane_s8(i8* frozen %a, [2 x <8 x i8>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.int8x8x2_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.int8x8x2_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x8x2_t, %struct.int8x8x2_t* [[B]], i32 0, i32 0 @@ -4854,7 +4854,7 @@ vst2_lane_s8(a, b, 7); } -// CHECK-LABEL: define void @test_vst2_lane_s16(i16* %a, [2 x <4 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst2_lane_s16(i16* frozen %a, [2 x <4 x i16>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.int16x4x2_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.int16x4x2_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int16x4x2_t, %struct.int16x4x2_t* [[B]], i32 0, i32 0 @@ -4879,7 +4879,7 @@ vst2_lane_s16(a, b, 3); } -// CHECK-LABEL: define void @test_vst2_lane_s32(i32* %a, [2 x <2 x i32>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst2_lane_s32(i32* frozen %a, [2 x <2 x i32>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.int32x2x2_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.int32x2x2_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int32x2x2_t, %struct.int32x2x2_t* [[B]], i32 0, i32 0 @@ -4904,7 +4904,7 @@ vst2_lane_s32(a, b, 1); } -// CHECK-LABEL: define void @test_vst2_lane_s64(i64* %a, [2 x <1 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst2_lane_s64(i64* frozen %a, [2 x <1 x i64>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.int64x1x2_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.int64x1x2_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int64x1x2_t, %struct.int64x1x2_t* [[B]], i32 0, i32 0 @@ -4929,7 +4929,7 @@ vst2_lane_s64(a, b, 0); } -// CHECK-LABEL: define void @test_vst2_lane_f16(half* %a, [2 x <4 x half>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst2_lane_f16(half* frozen %a, [2 x <4 x half>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.float16x4x2_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.float16x4x2_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float16x4x2_t, %struct.float16x4x2_t* [[B]], i32 0, i32 0 @@ -4954,7 +4954,7 @@ vst2_lane_f16(a, b, 3); } -// CHECK-LABEL: define void @test_vst2_lane_f32(float* %a, [2 x <2 x float>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst2_lane_f32(float* frozen %a, [2 x <2 x float>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.float32x2x2_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.float32x2x2_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float32x2x2_t, %struct.float32x2x2_t* [[B]], i32 0, i32 0 @@ -4979,7 +4979,7 @@ vst2_lane_f32(a, b, 1); } -// CHECK-LABEL: define void @test_vst2_lane_f64(double* %a, [2 x <1 x double>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst2_lane_f64(double* frozen %a, [2 x <1 x double>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.float64x1x2_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.float64x1x2_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float64x1x2_t, %struct.float64x1x2_t* [[B]], i32 0, i32 0 @@ -5004,7 +5004,7 @@ vst2_lane_f64(a, b, 0); } -// CHECK-LABEL: define void @test_vst2_lane_p8(i8* %a, [2 x <8 x i8>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst2_lane_p8(i8* frozen %a, [2 x <8 x i8>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.poly8x8x2_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.poly8x8x2_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x8x2_t, %struct.poly8x8x2_t* [[B]], i32 0, i32 0 @@ -5024,7 +5024,7 @@ vst2_lane_p8(a, b, 7); } -// CHECK-LABEL: define void @test_vst2_lane_p16(i16* %a, [2 x <4 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst2_lane_p16(i16* frozen %a, [2 x <4 x i16>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.poly16x4x2_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.poly16x4x2_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly16x4x2_t, %struct.poly16x4x2_t* [[B]], i32 0, i32 0 @@ -5049,7 +5049,7 @@ vst2_lane_p16(a, b, 3); } -// CHECK-LABEL: define void @test_vst2_lane_p64(i64* %a, [2 x <1 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst2_lane_p64(i64* frozen %a, [2 x <1 x i64>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.poly64x1x2_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.poly64x1x2_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly64x1x2_t, %struct.poly64x1x2_t* [[B]], i32 0, i32 0 @@ -5074,7 +5074,7 @@ vst2_lane_p64(a, b, 0); } -// CHECK-LABEL: define void @test_vst3q_lane_u8(i8* %a, [3 x <16 x i8>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst3q_lane_u8(i8* frozen %a, [3 x <16 x i8>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.uint8x16x3_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.uint8x16x3_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x16x3_t, %struct.uint8x16x3_t* [[B]], i32 0, i32 0 @@ -5097,7 +5097,7 @@ vst3q_lane_u8(a, b, 15); } -// CHECK-LABEL: define void @test_vst3q_lane_u16(i16* %a, [3 x <8 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst3q_lane_u16(i16* frozen %a, [3 x <8 x i16>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.uint16x8x3_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.uint16x8x3_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint16x8x3_t, %struct.uint16x8x3_t* [[B]], i32 0, i32 0 @@ -5127,7 +5127,7 @@ vst3q_lane_u16(a, b, 7); } -// CHECK-LABEL: define void @test_vst3q_lane_u32(i32* %a, [3 x <4 x i32>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst3q_lane_u32(i32* frozen %a, [3 x <4 x i32>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.uint32x4x3_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.uint32x4x3_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint32x4x3_t, %struct.uint32x4x3_t* [[B]], i32 0, i32 0 @@ -5157,7 +5157,7 @@ vst3q_lane_u32(a, b, 3); } -// CHECK-LABEL: define void @test_vst3q_lane_u64(i64* %a, [3 x <2 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst3q_lane_u64(i64* frozen %a, [3 x <2 x i64>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.uint64x2x3_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.uint64x2x3_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint64x2x3_t, %struct.uint64x2x3_t* [[B]], i32 0, i32 0 @@ -5187,7 +5187,7 @@ vst3q_lane_u64(a, b, 1); } -// CHECK-LABEL: define void @test_vst3q_lane_s8(i8* %a, [3 x <16 x i8>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst3q_lane_s8(i8* frozen %a, [3 x <16 x i8>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.int8x16x3_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.int8x16x3_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x16x3_t, %struct.int8x16x3_t* [[B]], i32 0, i32 0 @@ -5210,7 +5210,7 @@ vst3q_lane_s8(a, b, 15); } -// CHECK-LABEL: define void @test_vst3q_lane_s16(i16* %a, [3 x <8 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst3q_lane_s16(i16* frozen %a, [3 x <8 x i16>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.int16x8x3_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.int16x8x3_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int16x8x3_t, %struct.int16x8x3_t* [[B]], i32 0, i32 0 @@ -5240,7 +5240,7 @@ vst3q_lane_s16(a, b, 7); } -// CHECK-LABEL: define void @test_vst3q_lane_s32(i32* %a, [3 x <4 x i32>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst3q_lane_s32(i32* frozen %a, [3 x <4 x i32>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.int32x4x3_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.int32x4x3_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int32x4x3_t, %struct.int32x4x3_t* [[B]], i32 0, i32 0 @@ -5270,7 +5270,7 @@ vst3q_lane_s32(a, b, 3); } -// CHECK-LABEL: define void @test_vst3q_lane_s64(i64* %a, [3 x <2 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst3q_lane_s64(i64* frozen %a, [3 x <2 x i64>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.int64x2x3_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.int64x2x3_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int64x2x3_t, %struct.int64x2x3_t* [[B]], i32 0, i32 0 @@ -5300,7 +5300,7 @@ vst3q_lane_s64(a, b, 1); } -// CHECK-LABEL: define void @test_vst3q_lane_f16(half* %a, [3 x <8 x half>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst3q_lane_f16(half* frozen %a, [3 x <8 x half>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.float16x8x3_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.float16x8x3_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float16x8x3_t, %struct.float16x8x3_t* [[B]], i32 0, i32 0 @@ -5330,7 +5330,7 @@ vst3q_lane_f16(a, b, 7); } -// CHECK-LABEL: define void @test_vst3q_lane_f32(float* %a, [3 x <4 x float>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst3q_lane_f32(float* frozen %a, [3 x <4 x float>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.float32x4x3_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.float32x4x3_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float32x4x3_t, %struct.float32x4x3_t* [[B]], i32 0, i32 0 @@ -5360,7 +5360,7 @@ vst3q_lane_f32(a, b, 3); } -// CHECK-LABEL: define void @test_vst3q_lane_f64(double* %a, [3 x <2 x double>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst3q_lane_f64(double* frozen %a, [3 x <2 x double>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.float64x2x3_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.float64x2x3_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float64x2x3_t, %struct.float64x2x3_t* [[B]], i32 0, i32 0 @@ -5390,7 +5390,7 @@ vst3q_lane_f64(a, b, 1); } -// CHECK-LABEL: define void @test_vst3q_lane_p8(i8* %a, [3 x <16 x i8>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst3q_lane_p8(i8* frozen %a, [3 x <16 x i8>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.poly8x16x3_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.poly8x16x3_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x16x3_t, %struct.poly8x16x3_t* [[B]], i32 0, i32 0 @@ -5413,7 +5413,7 @@ vst3q_lane_p8(a, b, 15); } -// CHECK-LABEL: define void @test_vst3q_lane_p16(i16* %a, [3 x <8 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst3q_lane_p16(i16* frozen %a, [3 x <8 x i16>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.poly16x8x3_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.poly16x8x3_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly16x8x3_t, %struct.poly16x8x3_t* [[B]], i32 0, i32 0 @@ -5443,7 +5443,7 @@ vst3q_lane_p16(a, b, 7); } -// CHECK-LABEL: define void @test_vst3q_lane_p64(i64* %a, [3 x <2 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst3q_lane_p64(i64* frozen %a, [3 x <2 x i64>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.poly64x2x3_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.poly64x2x3_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly64x2x3_t, %struct.poly64x2x3_t* [[B]], i32 0, i32 0 @@ -5473,7 +5473,7 @@ vst3q_lane_p64(a, b, 1); } -// CHECK-LABEL: define void @test_vst3_lane_u8(i8* %a, [3 x <8 x i8>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst3_lane_u8(i8* frozen %a, [3 x <8 x i8>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.uint8x8x3_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.uint8x8x3_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x8x3_t, %struct.uint8x8x3_t* [[B]], i32 0, i32 0 @@ -5496,7 +5496,7 @@ vst3_lane_u8(a, b, 7); } -// CHECK-LABEL: define void @test_vst3_lane_u16(i16* %a, [3 x <4 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst3_lane_u16(i16* frozen %a, [3 x <4 x i16>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.uint16x4x3_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.uint16x4x3_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint16x4x3_t, %struct.uint16x4x3_t* [[B]], i32 0, i32 0 @@ -5526,7 +5526,7 @@ vst3_lane_u16(a, b, 3); } -// CHECK-LABEL: define void @test_vst3_lane_u32(i32* %a, [3 x <2 x i32>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst3_lane_u32(i32* frozen %a, [3 x <2 x i32>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.uint32x2x3_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.uint32x2x3_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint32x2x3_t, %struct.uint32x2x3_t* [[B]], i32 0, i32 0 @@ -5556,7 +5556,7 @@ vst3_lane_u32(a, b, 1); } -// CHECK-LABEL: define void @test_vst3_lane_u64(i64* %a, [3 x <1 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst3_lane_u64(i64* frozen %a, [3 x <1 x i64>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.uint64x1x3_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.uint64x1x3_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint64x1x3_t, %struct.uint64x1x3_t* [[B]], i32 0, i32 0 @@ -5586,7 +5586,7 @@ vst3_lane_u64(a, b, 0); } -// CHECK-LABEL: define void @test_vst3_lane_s8(i8* %a, [3 x <8 x i8>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst3_lane_s8(i8* frozen %a, [3 x <8 x i8>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.int8x8x3_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.int8x8x3_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x8x3_t, %struct.int8x8x3_t* [[B]], i32 0, i32 0 @@ -5609,7 +5609,7 @@ vst3_lane_s8(a, b, 7); } -// CHECK-LABEL: define void @test_vst3_lane_s16(i16* %a, [3 x <4 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst3_lane_s16(i16* frozen %a, [3 x <4 x i16>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.int16x4x3_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.int16x4x3_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int16x4x3_t, %struct.int16x4x3_t* [[B]], i32 0, i32 0 @@ -5639,7 +5639,7 @@ vst3_lane_s16(a, b, 3); } -// CHECK-LABEL: define void @test_vst3_lane_s32(i32* %a, [3 x <2 x i32>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst3_lane_s32(i32* frozen %a, [3 x <2 x i32>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.int32x2x3_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.int32x2x3_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int32x2x3_t, %struct.int32x2x3_t* [[B]], i32 0, i32 0 @@ -5669,7 +5669,7 @@ vst3_lane_s32(a, b, 1); } -// CHECK-LABEL: define void @test_vst3_lane_s64(i64* %a, [3 x <1 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst3_lane_s64(i64* frozen %a, [3 x <1 x i64>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.int64x1x3_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.int64x1x3_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int64x1x3_t, %struct.int64x1x3_t* [[B]], i32 0, i32 0 @@ -5699,7 +5699,7 @@ vst3_lane_s64(a, b, 0); } -// CHECK-LABEL: define void @test_vst3_lane_f16(half* %a, [3 x <4 x half>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst3_lane_f16(half* frozen %a, [3 x <4 x half>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.float16x4x3_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.float16x4x3_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float16x4x3_t, %struct.float16x4x3_t* [[B]], i32 0, i32 0 @@ -5729,7 +5729,7 @@ vst3_lane_f16(a, b, 3); } -// CHECK-LABEL: define void @test_vst3_lane_f32(float* %a, [3 x <2 x float>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst3_lane_f32(float* frozen %a, [3 x <2 x float>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.float32x2x3_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.float32x2x3_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float32x2x3_t, %struct.float32x2x3_t* [[B]], i32 0, i32 0 @@ -5759,7 +5759,7 @@ vst3_lane_f32(a, b, 1); } -// CHECK-LABEL: define void @test_vst3_lane_f64(double* %a, [3 x <1 x double>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst3_lane_f64(double* frozen %a, [3 x <1 x double>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.float64x1x3_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.float64x1x3_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float64x1x3_t, %struct.float64x1x3_t* [[B]], i32 0, i32 0 @@ -5789,7 +5789,7 @@ vst3_lane_f64(a, b, 0); } -// CHECK-LABEL: define void @test_vst3_lane_p8(i8* %a, [3 x <8 x i8>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst3_lane_p8(i8* frozen %a, [3 x <8 x i8>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.poly8x8x3_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.poly8x8x3_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x8x3_t, %struct.poly8x8x3_t* [[B]], i32 0, i32 0 @@ -5812,7 +5812,7 @@ vst3_lane_p8(a, b, 7); } -// CHECK-LABEL: define void @test_vst3_lane_p16(i16* %a, [3 x <4 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst3_lane_p16(i16* frozen %a, [3 x <4 x i16>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.poly16x4x3_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.poly16x4x3_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly16x4x3_t, %struct.poly16x4x3_t* [[B]], i32 0, i32 0 @@ -5842,7 +5842,7 @@ vst3_lane_p16(a, b, 3); } -// CHECK-LABEL: define void @test_vst3_lane_p64(i64* %a, [3 x <1 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst3_lane_p64(i64* frozen %a, [3 x <1 x i64>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.poly64x1x3_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.poly64x1x3_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly64x1x3_t, %struct.poly64x1x3_t* [[B]], i32 0, i32 0 @@ -5872,7 +5872,7 @@ vst3_lane_p64(a, b, 0); } -// CHECK-LABEL: define void @test_vst4q_lane_u8(i8* %a, [4 x <16 x i8>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst4q_lane_u8(i8* frozen %a, [4 x <16 x i8>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.uint8x16x4_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.uint8x16x4_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x16x4_t, %struct.uint8x16x4_t* [[B]], i32 0, i32 0 @@ -5898,7 +5898,7 @@ vst4q_lane_u8(a, b, 15); } -// CHECK-LABEL: define void @test_vst4q_lane_u16(i16* %a, [4 x <8 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst4q_lane_u16(i16* frozen %a, [4 x <8 x i16>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.uint16x8x4_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.uint16x8x4_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint16x8x4_t, %struct.uint16x8x4_t* [[B]], i32 0, i32 0 @@ -5933,7 +5933,7 @@ vst4q_lane_u16(a, b, 7); } -// CHECK-LABEL: define void @test_vst4q_lane_u32(i32* %a, [4 x <4 x i32>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst4q_lane_u32(i32* frozen %a, [4 x <4 x i32>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.uint32x4x4_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.uint32x4x4_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint32x4x4_t, %struct.uint32x4x4_t* [[B]], i32 0, i32 0 @@ -5968,7 +5968,7 @@ vst4q_lane_u32(a, b, 3); } -// CHECK-LABEL: define void @test_vst4q_lane_u64(i64* %a, [4 x <2 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst4q_lane_u64(i64* frozen %a, [4 x <2 x i64>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.uint64x2x4_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.uint64x2x4_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint64x2x4_t, %struct.uint64x2x4_t* [[B]], i32 0, i32 0 @@ -6003,7 +6003,7 @@ vst4q_lane_u64(a, b, 1); } -// CHECK-LABEL: define void @test_vst4q_lane_s8(i8* %a, [4 x <16 x i8>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst4q_lane_s8(i8* frozen %a, [4 x <16 x i8>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.int8x16x4_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.int8x16x4_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x16x4_t, %struct.int8x16x4_t* [[B]], i32 0, i32 0 @@ -6029,7 +6029,7 @@ vst4q_lane_s8(a, b, 15); } -// CHECK-LABEL: define void @test_vst4q_lane_s16(i16* %a, [4 x <8 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst4q_lane_s16(i16* frozen %a, [4 x <8 x i16>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.int16x8x4_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.int16x8x4_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int16x8x4_t, %struct.int16x8x4_t* [[B]], i32 0, i32 0 @@ -6064,7 +6064,7 @@ vst4q_lane_s16(a, b, 7); } -// CHECK-LABEL: define void @test_vst4q_lane_s32(i32* %a, [4 x <4 x i32>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst4q_lane_s32(i32* frozen %a, [4 x <4 x i32>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.int32x4x4_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.int32x4x4_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int32x4x4_t, %struct.int32x4x4_t* [[B]], i32 0, i32 0 @@ -6099,7 +6099,7 @@ vst4q_lane_s32(a, b, 3); } -// CHECK-LABEL: define void @test_vst4q_lane_s64(i64* %a, [4 x <2 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst4q_lane_s64(i64* frozen %a, [4 x <2 x i64>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.int64x2x4_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.int64x2x4_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int64x2x4_t, %struct.int64x2x4_t* [[B]], i32 0, i32 0 @@ -6134,7 +6134,7 @@ vst4q_lane_s64(a, b, 1); } -// CHECK-LABEL: define void @test_vst4q_lane_f16(half* %a, [4 x <8 x half>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst4q_lane_f16(half* frozen %a, [4 x <8 x half>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.float16x8x4_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.float16x8x4_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float16x8x4_t, %struct.float16x8x4_t* [[B]], i32 0, i32 0 @@ -6169,7 +6169,7 @@ vst4q_lane_f16(a, b, 7); } -// CHECK-LABEL: define void @test_vst4q_lane_f32(float* %a, [4 x <4 x float>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst4q_lane_f32(float* frozen %a, [4 x <4 x float>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.float32x4x4_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.float32x4x4_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float32x4x4_t, %struct.float32x4x4_t* [[B]], i32 0, i32 0 @@ -6204,7 +6204,7 @@ vst4q_lane_f32(a, b, 3); } -// CHECK-LABEL: define void @test_vst4q_lane_f64(double* %a, [4 x <2 x double>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst4q_lane_f64(double* frozen %a, [4 x <2 x double>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.float64x2x4_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.float64x2x4_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float64x2x4_t, %struct.float64x2x4_t* [[B]], i32 0, i32 0 @@ -6239,7 +6239,7 @@ vst4q_lane_f64(a, b, 1); } -// CHECK-LABEL: define void @test_vst4q_lane_p8(i8* %a, [4 x <16 x i8>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst4q_lane_p8(i8* frozen %a, [4 x <16 x i8>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.poly8x16x4_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.poly8x16x4_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x16x4_t, %struct.poly8x16x4_t* [[B]], i32 0, i32 0 @@ -6265,7 +6265,7 @@ vst4q_lane_p8(a, b, 15); } -// CHECK-LABEL: define void @test_vst4q_lane_p16(i16* %a, [4 x <8 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst4q_lane_p16(i16* frozen %a, [4 x <8 x i16>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.poly16x8x4_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.poly16x8x4_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly16x8x4_t, %struct.poly16x8x4_t* [[B]], i32 0, i32 0 @@ -6300,7 +6300,7 @@ vst4q_lane_p16(a, b, 7); } -// CHECK-LABEL: define void @test_vst4q_lane_p64(i64* %a, [4 x <2 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst4q_lane_p64(i64* frozen %a, [4 x <2 x i64>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.poly64x2x4_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.poly64x2x4_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly64x2x4_t, %struct.poly64x2x4_t* [[B]], i32 0, i32 0 @@ -6335,7 +6335,7 @@ vst4q_lane_p64(a, b, 1); } -// CHECK-LABEL: define void @test_vst4_lane_u8(i8* %a, [4 x <8 x i8>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst4_lane_u8(i8* frozen %a, [4 x <8 x i8>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.uint8x8x4_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.uint8x8x4_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x8x4_t, %struct.uint8x8x4_t* [[B]], i32 0, i32 0 @@ -6361,7 +6361,7 @@ vst4_lane_u8(a, b, 7); } -// CHECK-LABEL: define void @test_vst4_lane_u16(i16* %a, [4 x <4 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst4_lane_u16(i16* frozen %a, [4 x <4 x i16>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.uint16x4x4_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.uint16x4x4_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint16x4x4_t, %struct.uint16x4x4_t* [[B]], i32 0, i32 0 @@ -6396,7 +6396,7 @@ vst4_lane_u16(a, b, 3); } -// CHECK-LABEL: define void @test_vst4_lane_u32(i32* %a, [4 x <2 x i32>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst4_lane_u32(i32* frozen %a, [4 x <2 x i32>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.uint32x2x4_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.uint32x2x4_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint32x2x4_t, %struct.uint32x2x4_t* [[B]], i32 0, i32 0 @@ -6431,7 +6431,7 @@ vst4_lane_u32(a, b, 1); } -// CHECK-LABEL: define void @test_vst4_lane_u64(i64* %a, [4 x <1 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst4_lane_u64(i64* frozen %a, [4 x <1 x i64>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.uint64x1x4_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.uint64x1x4_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint64x1x4_t, %struct.uint64x1x4_t* [[B]], i32 0, i32 0 @@ -6466,7 +6466,7 @@ vst4_lane_u64(a, b, 0); } -// CHECK-LABEL: define void @test_vst4_lane_s8(i8* %a, [4 x <8 x i8>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst4_lane_s8(i8* frozen %a, [4 x <8 x i8>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.int8x8x4_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.int8x8x4_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x8x4_t, %struct.int8x8x4_t* [[B]], i32 0, i32 0 @@ -6492,7 +6492,7 @@ vst4_lane_s8(a, b, 7); } -// CHECK-LABEL: define void @test_vst4_lane_s16(i16* %a, [4 x <4 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst4_lane_s16(i16* frozen %a, [4 x <4 x i16>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.int16x4x4_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.int16x4x4_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int16x4x4_t, %struct.int16x4x4_t* [[B]], i32 0, i32 0 @@ -6527,7 +6527,7 @@ vst4_lane_s16(a, b, 3); } -// CHECK-LABEL: define void @test_vst4_lane_s32(i32* %a, [4 x <2 x i32>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst4_lane_s32(i32* frozen %a, [4 x <2 x i32>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.int32x2x4_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.int32x2x4_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int32x2x4_t, %struct.int32x2x4_t* [[B]], i32 0, i32 0 @@ -6562,7 +6562,7 @@ vst4_lane_s32(a, b, 1); } -// CHECK-LABEL: define void @test_vst4_lane_s64(i64* %a, [4 x <1 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst4_lane_s64(i64* frozen %a, [4 x <1 x i64>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.int64x1x4_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.int64x1x4_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int64x1x4_t, %struct.int64x1x4_t* [[B]], i32 0, i32 0 @@ -6597,7 +6597,7 @@ vst4_lane_s64(a, b, 0); } -// CHECK-LABEL: define void @test_vst4_lane_f16(half* %a, [4 x <4 x half>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst4_lane_f16(half* frozen %a, [4 x <4 x half>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.float16x4x4_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.float16x4x4_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float16x4x4_t, %struct.float16x4x4_t* [[B]], i32 0, i32 0 @@ -6632,7 +6632,7 @@ vst4_lane_f16(a, b, 3); } -// CHECK-LABEL: define void @test_vst4_lane_f32(float* %a, [4 x <2 x float>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst4_lane_f32(float* frozen %a, [4 x <2 x float>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.float32x2x4_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.float32x2x4_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float32x2x4_t, %struct.float32x2x4_t* [[B]], i32 0, i32 0 @@ -6667,7 +6667,7 @@ vst4_lane_f32(a, b, 1); } -// CHECK-LABEL: define void @test_vst4_lane_f64(double* %a, [4 x <1 x double>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst4_lane_f64(double* frozen %a, [4 x <1 x double>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.float64x1x4_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.float64x1x4_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float64x1x4_t, %struct.float64x1x4_t* [[B]], i32 0, i32 0 @@ -6702,7 +6702,7 @@ vst4_lane_f64(a, b, 0); } -// CHECK-LABEL: define void @test_vst4_lane_p8(i8* %a, [4 x <8 x i8>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst4_lane_p8(i8* frozen %a, [4 x <8 x i8>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.poly8x8x4_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.poly8x8x4_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x8x4_t, %struct.poly8x8x4_t* [[B]], i32 0, i32 0 @@ -6728,7 +6728,7 @@ vst4_lane_p8(a, b, 7); } -// CHECK-LABEL: define void @test_vst4_lane_p16(i16* %a, [4 x <4 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst4_lane_p16(i16* frozen %a, [4 x <4 x i16>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.poly16x4x4_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.poly16x4x4_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly16x4x4_t, %struct.poly16x4x4_t* [[B]], i32 0, i32 0 @@ -6763,7 +6763,7 @@ vst4_lane_p16(a, b, 3); } -// CHECK-LABEL: define void @test_vst4_lane_p64(i64* %a, [4 x <1 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst4_lane_p64(i64* frozen %a, [4 x <1 x i64>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.poly64x1x4_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.poly64x1x4_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly64x1x4_t, %struct.poly64x1x4_t* [[B]], i32 0, i32 0 diff --git a/clang/test/CodeGen/aarch64-neon-scalar-copy.c b/clang/test/CodeGen/aarch64-neon-scalar-copy.c --- a/clang/test/CodeGen/aarch64-neon-scalar-copy.c +++ b/clang/test/CodeGen/aarch64-neon-scalar-copy.c @@ -3,7 +3,7 @@ #include -// CHECK-LABEL: define float @test_vdups_lane_f32(<2 x float> %a) #0 { +// CHECK-LABEL: define frozen float @test_vdups_lane_f32(<2 x float> frozen %a) #0 { // CHECK: [[VDUPS_LANE:%.*]] = extractelement <2 x float> %a, i32 1 // CHECK: ret float [[VDUPS_LANE]] float32_t test_vdups_lane_f32(float32x2_t a) { @@ -11,7 +11,7 @@ } -// CHECK-LABEL: define double @test_vdupd_lane_f64(<1 x double> %a) #0 { +// CHECK-LABEL: define frozen double @test_vdupd_lane_f64(<1 x double> frozen %a) #0 { // CHECK: [[VDUPD_LANE:%.*]] = extractelement <1 x double> %a, i32 0 // CHECK: ret double [[VDUPD_LANE]] float64_t test_vdupd_lane_f64(float64x1_t a) { @@ -19,7 +19,7 @@ } -// CHECK-LABEL: define float @test_vdups_laneq_f32(<4 x float> %a) #1 { +// CHECK-LABEL: define frozen float @test_vdups_laneq_f32(<4 x float> frozen %a) #1 { // CHECK: [[VGETQ_LANE:%.*]] = extractelement <4 x float> %a, i32 3 // CHECK: ret float [[VGETQ_LANE]] float32_t test_vdups_laneq_f32(float32x4_t a) { @@ -27,7 +27,7 @@ } -// CHECK-LABEL: define double @test_vdupd_laneq_f64(<2 x double> %a) #1 { +// CHECK-LABEL: define frozen double @test_vdupd_laneq_f64(<2 x double> frozen %a) #1 { // CHECK: [[VGETQ_LANE:%.*]] = extractelement <2 x double> %a, i32 1 // CHECK: ret double [[VGETQ_LANE]] float64_t test_vdupd_laneq_f64(float64x2_t a) { @@ -35,7 +35,7 @@ } -// CHECK-LABEL: define i8 @test_vdupb_lane_s8(<8 x i8> %a) #0 { +// CHECK-LABEL: define frozen i8 @test_vdupb_lane_s8(<8 x i8> frozen %a) #0 { // CHECK: [[VGET_LANE:%.*]] = extractelement <8 x i8> %a, i32 7 // CHECK: ret i8 [[VGET_LANE]] int8_t test_vdupb_lane_s8(int8x8_t a) { @@ -43,7 +43,7 @@ } -// CHECK-LABEL: define i16 @test_vduph_lane_s16(<4 x i16> %a) #0 { +// CHECK-LABEL: define frozen i16 @test_vduph_lane_s16(<4 x i16> frozen %a) #0 { // CHECK: [[VGET_LANE:%.*]] = extractelement <4 x i16> %a, i32 3 // CHECK: ret i16 [[VGET_LANE]] int16_t test_vduph_lane_s16(int16x4_t a) { @@ -51,7 +51,7 @@ } -// CHECK-LABEL: define i32 @test_vdups_lane_s32(<2 x i32> %a) #0 { +// CHECK-LABEL: define frozen i32 @test_vdups_lane_s32(<2 x i32> frozen %a) #0 { // CHECK: [[VGET_LANE:%.*]] = extractelement <2 x i32> %a, i32 1 // CHECK: ret i32 [[VGET_LANE]] int32_t test_vdups_lane_s32(int32x2_t a) { @@ -59,7 +59,7 @@ } -// CHECK-LABEL: define i64 @test_vdupd_lane_s64(<1 x i64> %a) #0 { +// CHECK-LABEL: define frozen i64 @test_vdupd_lane_s64(<1 x i64> frozen %a) #0 { // CHECK: [[VGET_LANE:%.*]] = extractelement <1 x i64> %a, i32 0 // CHECK: ret i64 [[VGET_LANE]] int64_t test_vdupd_lane_s64(int64x1_t a) { @@ -67,7 +67,7 @@ } -// CHECK-LABEL: define i8 @test_vdupb_lane_u8(<8 x i8> %a) #0 { +// CHECK-LABEL: define frozen i8 @test_vdupb_lane_u8(<8 x i8> frozen %a) #0 { // CHECK: [[VGET_LANE:%.*]] = extractelement <8 x i8> %a, i32 7 // CHECK: ret i8 [[VGET_LANE]] uint8_t test_vdupb_lane_u8(uint8x8_t a) { @@ -75,7 +75,7 @@ } -// CHECK-LABEL: define i16 @test_vduph_lane_u16(<4 x i16> %a) #0 { +// CHECK-LABEL: define frozen i16 @test_vduph_lane_u16(<4 x i16> frozen %a) #0 { // CHECK: [[VGET_LANE:%.*]] = extractelement <4 x i16> %a, i32 3 // CHECK: ret i16 [[VGET_LANE]] uint16_t test_vduph_lane_u16(uint16x4_t a) { @@ -83,7 +83,7 @@ } -// CHECK-LABEL: define i32 @test_vdups_lane_u32(<2 x i32> %a) #0 { +// CHECK-LABEL: define frozen i32 @test_vdups_lane_u32(<2 x i32> frozen %a) #0 { // CHECK: [[VGET_LANE:%.*]] = extractelement <2 x i32> %a, i32 1 // CHECK: ret i32 [[VGET_LANE]] uint32_t test_vdups_lane_u32(uint32x2_t a) { @@ -91,14 +91,14 @@ } -// CHECK-LABEL: define i64 @test_vdupd_lane_u64(<1 x i64> %a) #0 { +// CHECK-LABEL: define frozen i64 @test_vdupd_lane_u64(<1 x i64> frozen %a) #0 { // CHECK: [[VGET_LANE:%.*]] = extractelement <1 x i64> %a, i32 0 // CHECK: ret i64 [[VGET_LANE]] uint64_t test_vdupd_lane_u64(uint64x1_t a) { return vdupd_lane_u64(a, 0); } -// CHECK-LABEL: define i8 @test_vdupb_laneq_s8(<16 x i8> %a) #1 { +// CHECK-LABEL: define frozen i8 @test_vdupb_laneq_s8(<16 x i8> frozen %a) #1 { // CHECK: [[VGETQ_LANE:%.*]] = extractelement <16 x i8> %a, i32 15 // CHECK: ret i8 [[VGETQ_LANE]] int8_t test_vdupb_laneq_s8(int8x16_t a) { @@ -106,7 +106,7 @@ } -// CHECK-LABEL: define i16 @test_vduph_laneq_s16(<8 x i16> %a) #1 { +// CHECK-LABEL: define frozen i16 @test_vduph_laneq_s16(<8 x i16> frozen %a) #1 { // CHECK: [[VGETQ_LANE:%.*]] = extractelement <8 x i16> %a, i32 7 // CHECK: ret i16 [[VGETQ_LANE]] int16_t test_vduph_laneq_s16(int16x8_t a) { @@ -114,7 +114,7 @@ } -// CHECK-LABEL: define i32 @test_vdups_laneq_s32(<4 x i32> %a) #1 { +// CHECK-LABEL: define frozen i32 @test_vdups_laneq_s32(<4 x i32> frozen %a) #1 { // CHECK: [[VGETQ_LANE:%.*]] = extractelement <4 x i32> %a, i32 3 // CHECK: ret i32 [[VGETQ_LANE]] int32_t test_vdups_laneq_s32(int32x4_t a) { @@ -122,7 +122,7 @@ } -// CHECK-LABEL: define i64 @test_vdupd_laneq_s64(<2 x i64> %a) #1 { +// CHECK-LABEL: define frozen i64 @test_vdupd_laneq_s64(<2 x i64> frozen %a) #1 { // CHECK: [[VGETQ_LANE:%.*]] = extractelement <2 x i64> %a, i32 1 // CHECK: ret i64 [[VGETQ_LANE]] int64_t test_vdupd_laneq_s64(int64x2_t a) { @@ -130,7 +130,7 @@ } -// CHECK-LABEL: define i8 @test_vdupb_laneq_u8(<16 x i8> %a) #1 { +// CHECK-LABEL: define frozen i8 @test_vdupb_laneq_u8(<16 x i8> frozen %a) #1 { // CHECK: [[VGETQ_LANE:%.*]] = extractelement <16 x i8> %a, i32 15 // CHECK: ret i8 [[VGETQ_LANE]] uint8_t test_vdupb_laneq_u8(uint8x16_t a) { @@ -138,7 +138,7 @@ } -// CHECK-LABEL: define i16 @test_vduph_laneq_u16(<8 x i16> %a) #1 { +// CHECK-LABEL: define frozen i16 @test_vduph_laneq_u16(<8 x i16> frozen %a) #1 { // CHECK: [[VGETQ_LANE:%.*]] = extractelement <8 x i16> %a, i32 7 // CHECK: ret i16 [[VGETQ_LANE]] uint16_t test_vduph_laneq_u16(uint16x8_t a) { @@ -146,7 +146,7 @@ } -// CHECK-LABEL: define i32 @test_vdups_laneq_u32(<4 x i32> %a) #1 { +// CHECK-LABEL: define frozen i32 @test_vdups_laneq_u32(<4 x i32> frozen %a) #1 { // CHECK: [[VGETQ_LANE:%.*]] = extractelement <4 x i32> %a, i32 3 // CHECK: ret i32 [[VGETQ_LANE]] uint32_t test_vdups_laneq_u32(uint32x4_t a) { @@ -154,35 +154,35 @@ } -// CHECK-LABEL: define i64 @test_vdupd_laneq_u64(<2 x i64> %a) #1 { +// CHECK-LABEL: define frozen i64 @test_vdupd_laneq_u64(<2 x i64> frozen %a) #1 { // CHECK: [[VGETQ_LANE:%.*]] = extractelement <2 x i64> %a, i32 1 // CHECK: ret i64 [[VGETQ_LANE]] uint64_t test_vdupd_laneq_u64(uint64x2_t a) { return vdupd_laneq_u64(a, 1); } -// CHECK-LABEL: define i8 @test_vdupb_lane_p8(<8 x i8> %a) #0 { +// CHECK-LABEL: define frozen i8 @test_vdupb_lane_p8(<8 x i8> frozen %a) #0 { // CHECK: [[VGET_LANE:%.*]] = extractelement <8 x i8> %a, i32 7 // CHECK: ret i8 [[VGET_LANE]] poly8_t test_vdupb_lane_p8(poly8x8_t a) { return vdupb_lane_p8(a, 7); } -// CHECK-LABEL: define i16 @test_vduph_lane_p16(<4 x i16> %a) #0 { +// CHECK-LABEL: define frozen i16 @test_vduph_lane_p16(<4 x i16> frozen %a) #0 { // CHECK: [[VGET_LANE:%.*]] = extractelement <4 x i16> %a, i32 3 // CHECK: ret i16 [[VGET_LANE]] poly16_t test_vduph_lane_p16(poly16x4_t a) { return vduph_lane_p16(a, 3); } -// CHECK-LABEL: define i8 @test_vdupb_laneq_p8(<16 x i8> %a) #1 { +// CHECK-LABEL: define frozen i8 @test_vdupb_laneq_p8(<16 x i8> frozen %a) #1 { // CHECK: [[VGETQ_LANE:%.*]] = extractelement <16 x i8> %a, i32 15 // CHECK: ret i8 [[VGETQ_LANE]] poly8_t test_vdupb_laneq_p8(poly8x16_t a) { return vdupb_laneq_p8(a, 15); } -// CHECK-LABEL: define i16 @test_vduph_laneq_p16(<8 x i16> %a) #1 { +// CHECK-LABEL: define frozen i16 @test_vduph_laneq_p16(<8 x i16> frozen %a) #1 { // CHECK: [[VGETQ_LANE:%.*]] = extractelement <8 x i16> %a, i32 7 // CHECK: ret i16 [[VGETQ_LANE]] poly16_t test_vduph_laneq_p16(poly16x8_t a) { diff --git a/clang/test/CodeGen/aarch64-neon-scalar-x-indexed-elem.c b/clang/test/CodeGen/aarch64-neon-scalar-x-indexed-elem.c --- a/clang/test/CodeGen/aarch64-neon-scalar-x-indexed-elem.c +++ b/clang/test/CodeGen/aarch64-neon-scalar-x-indexed-elem.c @@ -6,7 +6,7 @@ #include -// CHECK-LABEL: define float @test_vmuls_lane_f32(float %a, <2 x float> %b) #0 { +// CHECK-LABEL: define frozen float @test_vmuls_lane_f32(float frozen %a, <2 x float> frozen %b) #0 { // CHECK: [[VGET_LANE:%.*]] = extractelement <2 x float> %b, i32 1 // CHECK: [[MUL:%.*]] = fmul float %a, [[VGET_LANE]] // CHECK: ret float [[MUL]] @@ -14,7 +14,7 @@ return vmuls_lane_f32(a, b, 1); } -// CHECK-LABEL: define double @test_vmuld_lane_f64(double %a, <1 x double> %b) #0 { +// CHECK-LABEL: define frozen double @test_vmuld_lane_f64(double frozen %a, <1 x double> frozen %b) #0 { // CHECK: [[VGET_LANE:%.*]] = extractelement <1 x double> %b, i32 0 // CHECK: [[MUL:%.*]] = fmul double %a, [[VGET_LANE]] // CHECK: ret double [[MUL]] @@ -22,7 +22,7 @@ return vmuld_lane_f64(a, b, 0); } -// CHECK-LABEL: define float @test_vmuls_laneq_f32(float %a, <4 x float> %b) #1 { +// CHECK-LABEL: define frozen float @test_vmuls_laneq_f32(float frozen %a, <4 x float> frozen %b) #1 { // CHECK: [[VGETQ_LANE:%.*]] = extractelement <4 x float> %b, i32 3 // CHECK: [[MUL:%.*]] = fmul float %a, [[VGETQ_LANE]] // CHECK: ret float [[MUL]] @@ -30,7 +30,7 @@ return vmuls_laneq_f32(a, b, 3); } -// CHECK-LABEL: define double @test_vmuld_laneq_f64(double %a, <2 x double> %b) #1 { +// CHECK-LABEL: define frozen double @test_vmuld_laneq_f64(double frozen %a, <2 x double> frozen %b) #1 { // CHECK: [[VGETQ_LANE:%.*]] = extractelement <2 x double> %b, i32 1 // CHECK: [[MUL:%.*]] = fmul double %a, [[VGETQ_LANE]] // CHECK: ret double [[MUL]] @@ -38,7 +38,7 @@ return vmuld_laneq_f64(a, b, 1); } -// CHECK-LABEL: define <1 x double> @test_vmul_n_f64(<1 x double> %a, double %b) #0 { +// CHECK-LABEL: define frozen <1 x double> @test_vmul_n_f64(<1 x double> frozen %a, double frozen %b) #0 { // CHECK: [[TMP2:%.*]] = bitcast <1 x double> %a to double // CHECK: [[TMP3:%.*]] = fmul double [[TMP2]], %b // CHECK: [[TMP4:%.*]] = bitcast double [[TMP3]] to <1 x double> @@ -47,7 +47,7 @@ return vmul_n_f64(a, b); } -// CHECK-LABEL: define float @test_vmulxs_lane_f32(float %a, <2 x float> %b) #0 { +// CHECK-LABEL: define frozen float @test_vmulxs_lane_f32(float frozen %a, <2 x float> frozen %b) #0 { // CHECK: [[VGET_LANE:%.*]] = extractelement <2 x float> %b, i32 1 // CHECK: [[VMULXS_F32_I:%.*]] = call float @llvm.aarch64.neon.fmulx.f32(float %a, float [[VGET_LANE]]) // CHECK: ret float [[VMULXS_F32_I]] @@ -55,7 +55,7 @@ return vmulxs_lane_f32(a, b, 1); } -// CHECK-LABEL: define float @test_vmulxs_laneq_f32(float %a, <4 x float> %b) #1 { +// CHECK-LABEL: define frozen float @test_vmulxs_laneq_f32(float frozen %a, <4 x float> frozen %b) #1 { // CHECK: [[VGETQ_LANE:%.*]] = extractelement <4 x float> %b, i32 3 // CHECK: [[VMULXS_F32_I:%.*]] = call float @llvm.aarch64.neon.fmulx.f32(float %a, float [[VGETQ_LANE]]) // CHECK: ret float [[VMULXS_F32_I]] @@ -63,7 +63,7 @@ return vmulxs_laneq_f32(a, b, 3); } -// CHECK-LABEL: define double @test_vmulxd_lane_f64(double %a, <1 x double> %b) #0 { +// CHECK-LABEL: define frozen double @test_vmulxd_lane_f64(double frozen %a, <1 x double> frozen %b) #0 { // CHECK: [[VGET_LANE:%.*]] = extractelement <1 x double> %b, i32 0 // CHECK: [[VMULXD_F64_I:%.*]] = call double @llvm.aarch64.neon.fmulx.f64(double %a, double [[VGET_LANE]]) // CHECK: ret double [[VMULXD_F64_I]] @@ -71,7 +71,7 @@ return vmulxd_lane_f64(a, b, 0); } -// CHECK-LABEL: define double @test_vmulxd_laneq_f64(double %a, <2 x double> %b) #1 { +// CHECK-LABEL: define frozen double @test_vmulxd_laneq_f64(double frozen %a, <2 x double> frozen %b) #1 { // CHECK: [[VGETQ_LANE:%.*]] = extractelement <2 x double> %b, i32 1 // CHECK: [[VMULXD_F64_I:%.*]] = call double @llvm.aarch64.neon.fmulx.f64(double %a, double [[VGETQ_LANE]]) // CHECK: ret double [[VMULXD_F64_I]] @@ -79,7 +79,7 @@ return vmulxd_laneq_f64(a, b, 1); } -// CHECK-LABEL: define <1 x double> @test_vmulx_lane_f64(<1 x double> %a, <1 x double> %b) #0 { +// CHECK-LABEL: define frozen <1 x double> @test_vmulx_lane_f64(<1 x double> frozen %a, <1 x double> frozen %b) #0 { // CHECK: [[VGET_LANE:%.*]] = extractelement <1 x double> %a, i32 0 // CHECK: [[VGET_LANE6:%.*]] = extractelement <1 x double> %b, i32 0 // CHECK: [[VMULXD_F64_I:%.*]] = call double @llvm.aarch64.neon.fmulx.f64(double [[VGET_LANE]], double [[VGET_LANE6]]) @@ -90,7 +90,7 @@ } -// CHECK-LABEL: define <1 x double> @test_vmulx_laneq_f64_0(<1 x double> %a, <2 x double> %b) #1 { +// CHECK-LABEL: define frozen <1 x double> @test_vmulx_laneq_f64_0(<1 x double> frozen %a, <2 x double> frozen %b) #1 { // CHECK: [[VGET_LANE:%.*]] = extractelement <1 x double> %a, i32 0 // CHECK: [[VGETQ_LANE:%.*]] = extractelement <2 x double> %b, i32 0 // CHECK: [[VMULXD_F64_I:%.*]] = call double @llvm.aarch64.neon.fmulx.f64(double [[VGET_LANE]], double [[VGETQ_LANE]]) @@ -100,7 +100,7 @@ return vmulx_laneq_f64(a, b, 0); } -// CHECK-LABEL: define <1 x double> @test_vmulx_laneq_f64_1(<1 x double> %a, <2 x double> %b) #1 { +// CHECK-LABEL: define frozen <1 x double> @test_vmulx_laneq_f64_1(<1 x double> frozen %a, <2 x double> frozen %b) #1 { // CHECK: [[VGET_LANE:%.*]] = extractelement <1 x double> %a, i32 0 // CHECK: [[VGETQ_LANE:%.*]] = extractelement <2 x double> %b, i32 1 // CHECK: [[VMULXD_F64_I:%.*]] = call double @llvm.aarch64.neon.fmulx.f64(double [[VGET_LANE]], double [[VGETQ_LANE]]) @@ -111,7 +111,7 @@ } -// CHECK-LABEL: define float @test_vfmas_lane_f32(float %a, float %b, <2 x float> %c) #0 { +// CHECK-LABEL: define frozen float @test_vfmas_lane_f32(float frozen %a, float frozen %b, <2 x float> frozen %c) #0 { // CHECK: [[EXTRACT:%.*]] = extractelement <2 x float> %c, i32 1 // CHECK: [[TMP2:%.*]] = call float @llvm.fma.f32(float %b, float [[EXTRACT]], float %a) // CHECK: ret float [[TMP2]] @@ -119,7 +119,7 @@ return vfmas_lane_f32(a, b, c, 1); } -// CHECK-LABEL: define double @test_vfmad_lane_f64(double %a, double %b, <1 x double> %c) #0 { +// CHECK-LABEL: define frozen double @test_vfmad_lane_f64(double frozen %a, double frozen %b, <1 x double> frozen %c) #0 { // CHECK: [[EXTRACT:%.*]] = extractelement <1 x double> %c, i32 0 // CHECK: [[TMP2:%.*]] = call double @llvm.fma.f64(double %b, double [[EXTRACT]], double %a) // CHECK: ret double [[TMP2]] @@ -127,7 +127,7 @@ return vfmad_lane_f64(a, b, c, 0); } -// CHECK-LABEL: define double @test_vfmad_laneq_f64(double %a, double %b, <2 x double> %c) #1 { +// CHECK-LABEL: define frozen double @test_vfmad_laneq_f64(double frozen %a, double frozen %b, <2 x double> frozen %c) #1 { // CHECK: [[EXTRACT:%.*]] = extractelement <2 x double> %c, i32 1 // CHECK: [[TMP2:%.*]] = call double @llvm.fma.f64(double %b, double [[EXTRACT]], double %a) // CHECK: ret double [[TMP2]] @@ -135,7 +135,7 @@ return vfmad_laneq_f64(a, b, c, 1); } -// CHECK-LABEL: define float @test_vfmss_lane_f32(float %a, float %b, <2 x float> %c) #0 { +// CHECK-LABEL: define frozen float @test_vfmss_lane_f32(float frozen %a, float frozen %b, <2 x float> frozen %c) #0 { // CHECK: [[SUB:%.*]] = fneg float %b // CHECK: [[EXTRACT:%.*]] = extractelement <2 x float> %c, i32 1 // CHECK: [[TMP2:%.*]] = call float @llvm.fma.f32(float [[SUB]], float [[EXTRACT]], float %a) @@ -144,7 +144,7 @@ return vfmss_lane_f32(a, b, c, 1); } -// CHECK-LABEL: define <1 x double> @test_vfma_lane_f64(<1 x double> %a, <1 x double> %b, <1 x double> %v) #0 { +// CHECK-LABEL: define frozen <1 x double> @test_vfma_lane_f64(<1 x double> frozen %a, <1 x double> frozen %b, <1 x double> frozen %v) #0 { // CHECK: [[TMP0:%.*]] = bitcast <1 x double> %a to <8 x i8> // CHECK: [[TMP1:%.*]] = bitcast <1 x double> %b to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <1 x double> %v to <8 x i8> @@ -158,7 +158,7 @@ return vfma_lane_f64(a, b, v, 0); } -// CHECK-LABEL: define <1 x double> @test_vfms_lane_f64(<1 x double> %a, <1 x double> %b, <1 x double> %v) #0 { +// CHECK-LABEL: define frozen <1 x double> @test_vfms_lane_f64(<1 x double> frozen %a, <1 x double> frozen %b, <1 x double> frozen %v) #0 { // CHECK: [[SUB:%.*]] = fneg <1 x double> %b // CHECK: [[TMP0:%.*]] = bitcast <1 x double> %a to <8 x i8> // CHECK: [[TMP1:%.*]] = bitcast <1 x double> [[SUB]] to <8 x i8> @@ -173,7 +173,7 @@ return vfms_lane_f64(a, b, v, 0); } -// CHECK-LABEL: define <1 x double> @test_vfma_laneq_f64(<1 x double> %a, <1 x double> %b, <2 x double> %v) #1 { +// CHECK-LABEL: define frozen <1 x double> @test_vfma_laneq_f64(<1 x double> frozen %a, <1 x double> frozen %b, <2 x double> frozen %v) #1 { // CHECK: [[TMP0:%.*]] = bitcast <1 x double> %a to <8 x i8> // CHECK: [[TMP1:%.*]] = bitcast <1 x double> %b to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <2 x double> %v to <16 x i8> @@ -188,7 +188,7 @@ return vfma_laneq_f64(a, b, v, 0); } -// CHECK-LABEL: define <1 x double> @test_vfms_laneq_f64(<1 x double> %a, <1 x double> %b, <2 x double> %v) #1 { +// CHECK-LABEL: define frozen <1 x double> @test_vfms_laneq_f64(<1 x double> frozen %a, <1 x double> frozen %b, <2 x double> frozen %v) #1 { // CHECK: [[SUB:%.*]] = fneg <1 x double> %b // CHECK: [[TMP0:%.*]] = bitcast <1 x double> %a to <8 x i8> // CHECK: [[TMP1:%.*]] = bitcast <1 x double> [[SUB]] to <8 x i8> @@ -204,7 +204,7 @@ return vfms_laneq_f64(a, b, v, 0); } -// CHECK-LABEL: define i32 @test_vqdmullh_lane_s16(i16 %a, <4 x i16> %b) #0 { +// CHECK-LABEL: define frozen i32 @test_vqdmullh_lane_s16(i16 frozen %a, <4 x i16> frozen %b) #0 { // CHECK: [[VGET_LANE:%.*]] = extractelement <4 x i16> %b, i32 3 // CHECK: [[TMP2:%.*]] = insertelement <4 x i16> undef, i16 %a, i64 0 // CHECK: [[TMP3:%.*]] = insertelement <4 x i16> undef, i16 [[VGET_LANE]], i64 0 @@ -215,7 +215,7 @@ return vqdmullh_lane_s16(a, b, 3); } -// CHECK-LABEL: define i64 @test_vqdmulls_lane_s32(i32 %a, <2 x i32> %b) #0 { +// CHECK-LABEL: define frozen i64 @test_vqdmulls_lane_s32(i32 frozen %a, <2 x i32> frozen %b) #0 { // CHECK: [[VGET_LANE:%.*]] = extractelement <2 x i32> %b, i32 1 // CHECK: [[VQDMULLS_S32_I:%.*]] = call i64 @llvm.aarch64.neon.sqdmulls.scalar(i32 %a, i32 [[VGET_LANE]]) // CHECK: ret i64 [[VQDMULLS_S32_I]] @@ -223,7 +223,7 @@ return vqdmulls_lane_s32(a, b, 1); } -// CHECK-LABEL: define i32 @test_vqdmullh_laneq_s16(i16 %a, <8 x i16> %b) #1 { +// CHECK-LABEL: define frozen i32 @test_vqdmullh_laneq_s16(i16 frozen %a, <8 x i16> frozen %b) #1 { // CHECK: [[VGETQ_LANE:%.*]] = extractelement <8 x i16> %b, i32 7 // CHECK: [[TMP2:%.*]] = insertelement <4 x i16> undef, i16 %a, i64 0 // CHECK: [[TMP3:%.*]] = insertelement <4 x i16> undef, i16 [[VGETQ_LANE]], i64 0 @@ -234,7 +234,7 @@ return vqdmullh_laneq_s16(a, b, 7); } -// CHECK-LABEL: define i64 @test_vqdmulls_laneq_s32(i32 %a, <4 x i32> %b) #1 { +// CHECK-LABEL: define frozen i64 @test_vqdmulls_laneq_s32(i32 frozen %a, <4 x i32> frozen %b) #1 { // CHECK: [[VGETQ_LANE:%.*]] = extractelement <4 x i32> %b, i32 3 // CHECK: [[VQDMULLS_S32_I:%.*]] = call i64 @llvm.aarch64.neon.sqdmulls.scalar(i32 %a, i32 [[VGETQ_LANE]]) // CHECK: ret i64 [[VQDMULLS_S32_I]] @@ -242,7 +242,7 @@ return vqdmulls_laneq_s32(a, b, 3); } -// CHECK-LABEL: define i16 @test_vqdmulhh_lane_s16(i16 %a, <4 x i16> %b) #0 { +// CHECK-LABEL: define frozen i16 @test_vqdmulhh_lane_s16(i16 frozen %a, <4 x i16> frozen %b) #0 { // CHECK: [[VGET_LANE:%.*]] = extractelement <4 x i16> %b, i32 3 // CHECK: [[TMP2:%.*]] = insertelement <4 x i16> undef, i16 %a, i64 0 // CHECK: [[TMP3:%.*]] = insertelement <4 x i16> undef, i16 [[VGET_LANE]], i64 0 @@ -253,7 +253,7 @@ return vqdmulhh_lane_s16(a, b, 3); } -// CHECK-LABEL: define i32 @test_vqdmulhs_lane_s32(i32 %a, <2 x i32> %b) #0 { +// CHECK-LABEL: define frozen i32 @test_vqdmulhs_lane_s32(i32 frozen %a, <2 x i32> frozen %b) #0 { // CHECK: [[VGET_LANE:%.*]] = extractelement <2 x i32> %b, i32 1 // CHECK: [[VQDMULHS_S32_I:%.*]] = call i32 @llvm.aarch64.neon.sqdmulh.i32(i32 %a, i32 [[VGET_LANE]]) // CHECK: ret i32 [[VQDMULHS_S32_I]] @@ -262,7 +262,7 @@ } -// CHECK-LABEL: define i16 @test_vqdmulhh_laneq_s16(i16 %a, <8 x i16> %b) #1 { +// CHECK-LABEL: define frozen i16 @test_vqdmulhh_laneq_s16(i16 frozen %a, <8 x i16> frozen %b) #1 { // CHECK: [[VGETQ_LANE:%.*]] = extractelement <8 x i16> %b, i32 7 // CHECK: [[TMP2:%.*]] = insertelement <4 x i16> undef, i16 %a, i64 0 // CHECK: [[TMP3:%.*]] = insertelement <4 x i16> undef, i16 [[VGETQ_LANE]], i64 0 @@ -274,7 +274,7 @@ } -// CHECK-LABEL: define i32 @test_vqdmulhs_laneq_s32(i32 %a, <4 x i32> %b) #1 { +// CHECK-LABEL: define frozen i32 @test_vqdmulhs_laneq_s32(i32 frozen %a, <4 x i32> frozen %b) #1 { // CHECK: [[VGETQ_LANE:%.*]] = extractelement <4 x i32> %b, i32 3 // CHECK: [[VQDMULHS_S32_I:%.*]] = call i32 @llvm.aarch64.neon.sqdmulh.i32(i32 %a, i32 [[VGETQ_LANE]]) // CHECK: ret i32 [[VQDMULHS_S32_I]] @@ -282,7 +282,7 @@ return vqdmulhs_laneq_s32(a, b, 3); } -// CHECK-LABEL: define i16 @test_vqrdmulhh_lane_s16(i16 %a, <4 x i16> %b) #0 { +// CHECK-LABEL: define frozen i16 @test_vqrdmulhh_lane_s16(i16 frozen %a, <4 x i16> frozen %b) #0 { // CHECK: [[VGET_LANE:%.*]] = extractelement <4 x i16> %b, i32 3 // CHECK: [[TMP2:%.*]] = insertelement <4 x i16> undef, i16 %a, i64 0 // CHECK: [[TMP3:%.*]] = insertelement <4 x i16> undef, i16 [[VGET_LANE]], i64 0 @@ -293,7 +293,7 @@ return vqrdmulhh_lane_s16(a, b, 3); } -// CHECK-LABEL: define i32 @test_vqrdmulhs_lane_s32(i32 %a, <2 x i32> %b) #0 { +// CHECK-LABEL: define frozen i32 @test_vqrdmulhs_lane_s32(i32 frozen %a, <2 x i32> frozen %b) #0 { // CHECK: [[VGET_LANE:%.*]] = extractelement <2 x i32> %b, i32 1 // CHECK: [[VQRDMULHS_S32_I:%.*]] = call i32 @llvm.aarch64.neon.sqrdmulh.i32(i32 %a, i32 [[VGET_LANE]]) // CHECK: ret i32 [[VQRDMULHS_S32_I]] @@ -302,7 +302,7 @@ } -// CHECK-LABEL: define i16 @test_vqrdmulhh_laneq_s16(i16 %a, <8 x i16> %b) #1 { +// CHECK-LABEL: define frozen i16 @test_vqrdmulhh_laneq_s16(i16 frozen %a, <8 x i16> frozen %b) #1 { // CHECK: [[VGETQ_LANE:%.*]] = extractelement <8 x i16> %b, i32 7 // CHECK: [[TMP2:%.*]] = insertelement <4 x i16> undef, i16 %a, i64 0 // CHECK: [[TMP3:%.*]] = insertelement <4 x i16> undef, i16 [[VGETQ_LANE]], i64 0 @@ -314,7 +314,7 @@ } -// CHECK-LABEL: define i32 @test_vqrdmulhs_laneq_s32(i32 %a, <4 x i32> %b) #1 { +// CHECK-LABEL: define frozen i32 @test_vqrdmulhs_laneq_s32(i32 frozen %a, <4 x i32> frozen %b) #1 { // CHECK: [[VGETQ_LANE:%.*]] = extractelement <4 x i32> %b, i32 3 // CHECK: [[VQRDMULHS_S32_I:%.*]] = call i32 @llvm.aarch64.neon.sqrdmulh.i32(i32 %a, i32 [[VGETQ_LANE]]) // CHECK: ret i32 [[VQRDMULHS_S32_I]] @@ -322,7 +322,7 @@ return vqrdmulhs_laneq_s32(a, b, 3); } -// CHECK-LABEL: define i32 @test_vqdmlalh_lane_s16(i32 %a, i16 %b, <4 x i16> %c) #0 { +// CHECK-LABEL: define frozen i32 @test_vqdmlalh_lane_s16(i32 frozen %a, i16 frozen %b, <4 x i16> frozen %c) #0 { // CHECK: [[LANE:%.*]] = extractelement <4 x i16> %c, i32 3 // CHECK: [[TMP2:%.*]] = insertelement <4 x i16> undef, i16 %b, i64 0 // CHECK: [[TMP3:%.*]] = insertelement <4 x i16> undef, i16 [[LANE]], i64 0 @@ -334,7 +334,7 @@ return vqdmlalh_lane_s16(a, b, c, 3); } -// CHECK-LABEL: define i64 @test_vqdmlals_lane_s32(i64 %a, i32 %b, <2 x i32> %c) #0 { +// CHECK-LABEL: define frozen i64 @test_vqdmlals_lane_s32(i64 frozen %a, i32 frozen %b, <2 x i32> frozen %c) #0 { // CHECK: [[LANE:%.*]] = extractelement <2 x i32> %c, i32 1 // CHECK: [[VQDMLXL:%.*]] = call i64 @llvm.aarch64.neon.sqdmulls.scalar(i32 %b, i32 [[LANE]]) // CHECK: [[VQDMLXL1:%.*]] = call i64 @llvm.aarch64.neon.sqadd.i64(i64 %a, i64 [[VQDMLXL]]) @@ -343,7 +343,7 @@ return vqdmlals_lane_s32(a, b, c, 1); } -// CHECK-LABEL: define i32 @test_vqdmlalh_laneq_s16(i32 %a, i16 %b, <8 x i16> %c) #1 { +// CHECK-LABEL: define frozen i32 @test_vqdmlalh_laneq_s16(i32 frozen %a, i16 frozen %b, <8 x i16> frozen %c) #1 { // CHECK: [[LANE:%.*]] = extractelement <8 x i16> %c, i32 7 // CHECK: [[TMP2:%.*]] = insertelement <4 x i16> undef, i16 %b, i64 0 // CHECK: [[TMP3:%.*]] = insertelement <4 x i16> undef, i16 [[LANE]], i64 0 @@ -355,7 +355,7 @@ return vqdmlalh_laneq_s16(a, b, c, 7); } -// CHECK-LABEL: define i64 @test_vqdmlals_laneq_s32(i64 %a, i32 %b, <4 x i32> %c) #1 { +// CHECK-LABEL: define frozen i64 @test_vqdmlals_laneq_s32(i64 frozen %a, i32 frozen %b, <4 x i32> frozen %c) #1 { // CHECK: [[LANE:%.*]] = extractelement <4 x i32> %c, i32 3 // CHECK: [[VQDMLXL:%.*]] = call i64 @llvm.aarch64.neon.sqdmulls.scalar(i32 %b, i32 [[LANE]]) // CHECK: [[VQDMLXL1:%.*]] = call i64 @llvm.aarch64.neon.sqadd.i64(i64 %a, i64 [[VQDMLXL]]) @@ -364,7 +364,7 @@ return vqdmlals_laneq_s32(a, b, c, 3); } -// CHECK-LABEL: define i32 @test_vqdmlslh_lane_s16(i32 %a, i16 %b, <4 x i16> %c) #0 { +// CHECK-LABEL: define frozen i32 @test_vqdmlslh_lane_s16(i32 frozen %a, i16 frozen %b, <4 x i16> frozen %c) #0 { // CHECK: [[LANE:%.*]] = extractelement <4 x i16> %c, i32 3 // CHECK: [[TMP2:%.*]] = insertelement <4 x i16> undef, i16 %b, i64 0 // CHECK: [[TMP3:%.*]] = insertelement <4 x i16> undef, i16 [[LANE]], i64 0 @@ -376,7 +376,7 @@ return vqdmlslh_lane_s16(a, b, c, 3); } -// CHECK-LABEL: define i64 @test_vqdmlsls_lane_s32(i64 %a, i32 %b, <2 x i32> %c) #0 { +// CHECK-LABEL: define frozen i64 @test_vqdmlsls_lane_s32(i64 frozen %a, i32 frozen %b, <2 x i32> frozen %c) #0 { // CHECK: [[LANE:%.*]] = extractelement <2 x i32> %c, i32 1 // CHECK: [[VQDMLXL:%.*]] = call i64 @llvm.aarch64.neon.sqdmulls.scalar(i32 %b, i32 [[LANE]]) // CHECK: [[VQDMLXL1:%.*]] = call i64 @llvm.aarch64.neon.sqsub.i64(i64 %a, i64 [[VQDMLXL]]) @@ -385,7 +385,7 @@ return vqdmlsls_lane_s32(a, b, c, 1); } -// CHECK-LABEL: define i32 @test_vqdmlslh_laneq_s16(i32 %a, i16 %b, <8 x i16> %c) #1 { +// CHECK-LABEL: define frozen i32 @test_vqdmlslh_laneq_s16(i32 frozen %a, i16 frozen %b, <8 x i16> frozen %c) #1 { // CHECK: [[LANE:%.*]] = extractelement <8 x i16> %c, i32 7 // CHECK: [[TMP2:%.*]] = insertelement <4 x i16> undef, i16 %b, i64 0 // CHECK: [[TMP3:%.*]] = insertelement <4 x i16> undef, i16 [[LANE]], i64 0 @@ -397,7 +397,7 @@ return vqdmlslh_laneq_s16(a, b, c, 7); } -// CHECK-LABEL: define i64 @test_vqdmlsls_laneq_s32(i64 %a, i32 %b, <4 x i32> %c) #1 { +// CHECK-LABEL: define frozen i64 @test_vqdmlsls_laneq_s32(i64 frozen %a, i32 frozen %b, <4 x i32> frozen %c) #1 { // CHECK: [[LANE:%.*]] = extractelement <4 x i32> %c, i32 3 // CHECK: [[VQDMLXL:%.*]] = call i64 @llvm.aarch64.neon.sqdmulls.scalar(i32 %b, i32 [[LANE]]) // CHECK: [[VQDMLXL1:%.*]] = call i64 @llvm.aarch64.neon.sqsub.i64(i64 %a, i64 [[VQDMLXL]]) @@ -406,7 +406,7 @@ return vqdmlsls_laneq_s32(a, b, c, 3); } -// CHECK-LABEL: define <1 x double> @test_vmulx_lane_f64_0() #0 { +// CHECK-LABEL: define frozen <1 x double> @test_vmulx_lane_f64_0() #0 { // CHECK: [[TMP0:%.*]] = bitcast i64 4599917171378402754 to <1 x double> // CHECK: [[TMP1:%.*]] = bitcast i64 4606655882138939123 to <1 x double> // CHECK: [[VGET_LANE:%.*]] = extractelement <1 x double> [[TMP0]], i32 0 @@ -425,7 +425,7 @@ return result; } -// CHECK-LABEL: define <1 x double> @test_vmulx_laneq_f64_2() #1 { +// CHECK-LABEL: define frozen <1 x double> @test_vmulx_laneq_f64_2() #1 { // CHECK: [[TMP0:%.*]] = bitcast i64 4599917171378402754 to <1 x double> // CHECK: [[TMP1:%.*]] = bitcast i64 4606655882138939123 to <1 x double> // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <1 x double> [[TMP0]], <1 x double> [[TMP1]], <2 x i32> diff --git a/clang/test/CodeGen/aarch64-neon-tbl.c b/clang/test/CodeGen/aarch64-neon-tbl.c --- a/clang/test/CodeGen/aarch64-neon-tbl.c +++ b/clang/test/CodeGen/aarch64-neon-tbl.c @@ -5,7 +5,7 @@ #include -// CHECK-LABEL: define <8 x i8> @test_vtbl1_s8(<8 x i8> %a, <8 x i8> %b) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vtbl1_s8(<8 x i8> frozen %a, <8 x i8> frozen %b) #0 { // CHECK: [[VTBL1_I:%.*]] = shufflevector <8 x i8> %a, <8 x i8> zeroinitializer, <16 x i32> // CHECK: [[VTBL11_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.tbl1.v8i8(<16 x i8> [[VTBL1_I]], <8 x i8> %b) #3 // CHECK: ret <8 x i8> [[VTBL11_I]] @@ -13,14 +13,14 @@ return vtbl1_s8(a, b); } -// CHECK-LABEL: define <8 x i8> @test_vqtbl1_s8(<16 x i8> %a, <8 x i8> %b) #1 { +// CHECK-LABEL: define frozen <8 x i8> @test_vqtbl1_s8(<16 x i8> frozen %a, <8 x i8> frozen %b) #1 { // CHECK: [[VTBL1_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.tbl1.v8i8(<16 x i8> %a, <8 x i8> %b) #3 // CHECK: ret <8 x i8> [[VTBL1_I]] int8x8_t test_vqtbl1_s8(int8x16_t a, uint8x8_t b) { return vqtbl1_s8(a, b); } -// CHECK-LABEL: define <8 x i8> @test_vtbl2_s8([2 x <8 x i8>] %a.coerce, <8 x i8> %b) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vtbl2_s8([2 x <8 x i8>] %a.coerce, <8 x i8> frozen %b) #0 { // CHECK: [[__P0_I:%.*]] = alloca %struct.int8x8x2_t, align 8 // CHECK: [[A:%.*]] = alloca %struct.int8x8x2_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x8x2_t, %struct.int8x8x2_t* [[A]], i32 0, i32 0 @@ -42,7 +42,7 @@ return vtbl2_s8(a, b); } -// CHECK-LABEL: define <8 x i8> @test_vqtbl2_s8([2 x <16 x i8>] %a.coerce, <8 x i8> %b) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vqtbl2_s8([2 x <16 x i8>] %a.coerce, <8 x i8> frozen %b) #0 { // CHECK: [[__P0_I:%.*]] = alloca %struct.int8x16x2_t, align 16 // CHECK: [[A:%.*]] = alloca %struct.int8x16x2_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x16x2_t, %struct.int8x16x2_t* [[A]], i32 0, i32 0 @@ -63,7 +63,7 @@ return vqtbl2_s8(a, b); } -// CHECK-LABEL: define <8 x i8> @test_vtbl3_s8([3 x <8 x i8>] %a.coerce, <8 x i8> %b) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vtbl3_s8([3 x <8 x i8>] %a.coerce, <8 x i8> frozen %b) #0 { // CHECK: [[__P0_I:%.*]] = alloca %struct.int8x8x3_t, align 8 // CHECK: [[A:%.*]] = alloca %struct.int8x8x3_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x8x3_t, %struct.int8x8x3_t* [[A]], i32 0, i32 0 @@ -89,7 +89,7 @@ return vtbl3_s8(a, b); } -// CHECK-LABEL: define <8 x i8> @test_vqtbl3_s8([3 x <16 x i8>] %a.coerce, <8 x i8> %b) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vqtbl3_s8([3 x <16 x i8>] %a.coerce, <8 x i8> frozen %b) #0 { // CHECK: [[__P0_I:%.*]] = alloca %struct.int8x16x3_t, align 16 // CHECK: [[A:%.*]] = alloca %struct.int8x16x3_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x16x3_t, %struct.int8x16x3_t* [[A]], i32 0, i32 0 @@ -113,7 +113,7 @@ return vqtbl3_s8(a, b); } -// CHECK-LABEL: define <8 x i8> @test_vtbl4_s8([4 x <8 x i8>] %a.coerce, <8 x i8> %b) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vtbl4_s8([4 x <8 x i8>] %a.coerce, <8 x i8> frozen %b) #0 { // CHECK: [[__P0_I:%.*]] = alloca %struct.int8x8x4_t, align 8 // CHECK: [[A:%.*]] = alloca %struct.int8x8x4_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x8x4_t, %struct.int8x8x4_t* [[A]], i32 0, i32 0 @@ -142,7 +142,7 @@ return vtbl4_s8(a, b); } -// CHECK-LABEL: define <8 x i8> @test_vqtbl4_s8([4 x <16 x i8>] %a.coerce, <8 x i8> %b) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vqtbl4_s8([4 x <16 x i8>] %a.coerce, <8 x i8> frozen %b) #0 { // CHECK: [[__P0_I:%.*]] = alloca %struct.int8x16x4_t, align 16 // CHECK: [[A:%.*]] = alloca %struct.int8x16x4_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x16x4_t, %struct.int8x16x4_t* [[A]], i32 0, i32 0 @@ -169,14 +169,14 @@ return vqtbl4_s8(a, b); } -// CHECK-LABEL: define <16 x i8> @test_vqtbl1q_s8(<16 x i8> %a, <16 x i8> %b) #1 { +// CHECK-LABEL: define frozen <16 x i8> @test_vqtbl1q_s8(<16 x i8> frozen %a, <16 x i8> frozen %b) #1 { // CHECK: [[VTBL1_I:%.*]] = call <16 x i8> @llvm.aarch64.neon.tbl1.v16i8(<16 x i8> %a, <16 x i8> %b) #3 // CHECK: ret <16 x i8> [[VTBL1_I]] int8x16_t test_vqtbl1q_s8(int8x16_t a, int8x16_t b) { return vqtbl1q_s8(a, b); } -// CHECK-LABEL: define <16 x i8> @test_vqtbl2q_s8([2 x <16 x i8>] %a.coerce, <16 x i8> %b) #1 { +// CHECK-LABEL: define frozen <16 x i8> @test_vqtbl2q_s8([2 x <16 x i8>] %a.coerce, <16 x i8> frozen %b) #1 { // CHECK: [[__P0_I:%.*]] = alloca %struct.int8x16x2_t, align 16 // CHECK: [[A:%.*]] = alloca %struct.int8x16x2_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x16x2_t, %struct.int8x16x2_t* [[A]], i32 0, i32 0 @@ -197,7 +197,7 @@ return vqtbl2q_s8(a, b); } -// CHECK-LABEL: define <16 x i8> @test_vqtbl3q_s8([3 x <16 x i8>] %a.coerce, <16 x i8> %b) #1 { +// CHECK-LABEL: define frozen <16 x i8> @test_vqtbl3q_s8([3 x <16 x i8>] %a.coerce, <16 x i8> frozen %b) #1 { // CHECK: [[__P0_I:%.*]] = alloca %struct.int8x16x3_t, align 16 // CHECK: [[A:%.*]] = alloca %struct.int8x16x3_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x16x3_t, %struct.int8x16x3_t* [[A]], i32 0, i32 0 @@ -221,7 +221,7 @@ return vqtbl3q_s8(a, b); } -// CHECK-LABEL: define <16 x i8> @test_vqtbl4q_s8([4 x <16 x i8>] %a.coerce, <16 x i8> %b) #1 { +// CHECK-LABEL: define frozen <16 x i8> @test_vqtbl4q_s8([4 x <16 x i8>] %a.coerce, <16 x i8> frozen %b) #1 { // CHECK: [[__P0_I:%.*]] = alloca %struct.int8x16x4_t, align 16 // CHECK: [[A:%.*]] = alloca %struct.int8x16x4_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x16x4_t, %struct.int8x16x4_t* [[A]], i32 0, i32 0 @@ -248,7 +248,7 @@ return vqtbl4q_s8(a, b); } -// CHECK-LABEL: define <8 x i8> @test_vtbx1_s8(<8 x i8> %a, <8 x i8> %b, <8 x i8> %c) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vtbx1_s8(<8 x i8> frozen %a, <8 x i8> frozen %b, <8 x i8> frozen %c) #0 { // CHECK: [[VTBL1_I:%.*]] = shufflevector <8 x i8> %b, <8 x i8> zeroinitializer, <16 x i32> // CHECK: [[VTBL11_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.tbl1.v8i8(<16 x i8> [[VTBL1_I]], <8 x i8> %c) #3 // CHECK: [[TMP0:%.*]] = icmp uge <8 x i8> %c, @@ -262,7 +262,7 @@ return vtbx1_s8(a, b, c); } -// CHECK-LABEL: define <8 x i8> @test_vtbx2_s8(<8 x i8> %a, [2 x <8 x i8>] %b.coerce, <8 x i8> %c) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vtbx2_s8(<8 x i8> frozen %a, [2 x <8 x i8>] %b.coerce, <8 x i8> frozen %c) #0 { // CHECK: [[__P1_I:%.*]] = alloca %struct.int8x8x2_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.int8x8x2_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x8x2_t, %struct.int8x8x2_t* [[B]], i32 0, i32 0 @@ -284,7 +284,7 @@ return vtbx2_s8(a, b, c); } -// CHECK-LABEL: define <8 x i8> @test_vtbx3_s8(<8 x i8> %a, [3 x <8 x i8>] %b.coerce, <8 x i8> %c) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vtbx3_s8(<8 x i8> frozen %a, [3 x <8 x i8>] %b.coerce, <8 x i8> frozen %c) #0 { // CHECK: [[__P1_I:%.*]] = alloca %struct.int8x8x3_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.int8x8x3_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x8x3_t, %struct.int8x8x3_t* [[B]], i32 0, i32 0 @@ -316,7 +316,7 @@ return vtbx3_s8(a, b, c); } -// CHECK-LABEL: define <8 x i8> @test_vtbx4_s8(<8 x i8> %a, [4 x <8 x i8>] %b.coerce, <8 x i8> %c) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vtbx4_s8(<8 x i8> frozen %a, [4 x <8 x i8>] %b.coerce, <8 x i8> frozen %c) #0 { // CHECK: [[__P1_I:%.*]] = alloca %struct.int8x8x4_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.int8x8x4_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x8x4_t, %struct.int8x8x4_t* [[B]], i32 0, i32 0 @@ -345,14 +345,14 @@ return vtbx4_s8(a, b, c); } -// CHECK-LABEL: define <8 x i8> @test_vqtbx1_s8(<8 x i8> %a, <16 x i8> %b, <8 x i8> %c) #1 { +// CHECK-LABEL: define frozen <8 x i8> @test_vqtbx1_s8(<8 x i8> frozen %a, <16 x i8> frozen %b, <8 x i8> frozen %c) #1 { // CHECK: [[VTBX1_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.tbx1.v8i8(<8 x i8> %a, <16 x i8> %b, <8 x i8> %c) #3 // CHECK: ret <8 x i8> [[VTBX1_I]] int8x8_t test_vqtbx1_s8(int8x8_t a, int8x16_t b, uint8x8_t c) { return vqtbx1_s8(a, b, c); } -// CHECK-LABEL: define <8 x i8> @test_vqtbx2_s8(<8 x i8> %a, [2 x <16 x i8>] %b.coerce, <8 x i8> %c) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vqtbx2_s8(<8 x i8> frozen %a, [2 x <16 x i8>] %b.coerce, <8 x i8> frozen %c) #0 { // CHECK: [[__P1_I:%.*]] = alloca %struct.int8x16x2_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.int8x16x2_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x16x2_t, %struct.int8x16x2_t* [[B]], i32 0, i32 0 @@ -373,7 +373,7 @@ return vqtbx2_s8(a, b, c); } -// CHECK-LABEL: define <8 x i8> @test_vqtbx3_s8(<8 x i8> %a, [3 x <16 x i8>] %b.coerce, <8 x i8> %c) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vqtbx3_s8(<8 x i8> frozen %a, [3 x <16 x i8>] %b.coerce, <8 x i8> frozen %c) #0 { // CHECK: [[__P1_I:%.*]] = alloca %struct.int8x16x3_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.int8x16x3_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x16x3_t, %struct.int8x16x3_t* [[B]], i32 0, i32 0 @@ -397,7 +397,7 @@ return vqtbx3_s8(a, b, c); } -// CHECK-LABEL: define <8 x i8> @test_vqtbx4_s8(<8 x i8> %a, [4 x <16 x i8>] %b.coerce, <8 x i8> %c) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vqtbx4_s8(<8 x i8> frozen %a, [4 x <16 x i8>] %b.coerce, <8 x i8> frozen %c) #0 { // CHECK: [[__P1_I:%.*]] = alloca %struct.int8x16x4_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.int8x16x4_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x16x4_t, %struct.int8x16x4_t* [[B]], i32 0, i32 0 @@ -424,14 +424,14 @@ return vqtbx4_s8(a, b, c); } -// CHECK-LABEL: define <16 x i8> @test_vqtbx1q_s8(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c) #1 { +// CHECK-LABEL: define frozen <16 x i8> @test_vqtbx1q_s8(<16 x i8> frozen %a, <16 x i8> frozen %b, <16 x i8> frozen %c) #1 { // CHECK: [[VTBX1_I:%.*]] = call <16 x i8> @llvm.aarch64.neon.tbx1.v16i8(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c) #3 // CHECK: ret <16 x i8> [[VTBX1_I]] int8x16_t test_vqtbx1q_s8(int8x16_t a, int8x16_t b, uint8x16_t c) { return vqtbx1q_s8(a, b, c); } -// CHECK-LABEL: define <16 x i8> @test_vqtbx2q_s8(<16 x i8> %a, [2 x <16 x i8>] %b.coerce, <16 x i8> %c) #1 { +// CHECK-LABEL: define frozen <16 x i8> @test_vqtbx2q_s8(<16 x i8> frozen %a, [2 x <16 x i8>] %b.coerce, <16 x i8> frozen %c) #1 { // CHECK: [[__P1_I:%.*]] = alloca %struct.int8x16x2_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.int8x16x2_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x16x2_t, %struct.int8x16x2_t* [[B]], i32 0, i32 0 @@ -452,7 +452,7 @@ return vqtbx2q_s8(a, b, c); } -// CHECK-LABEL: define <16 x i8> @test_vqtbx3q_s8(<16 x i8> %a, [3 x <16 x i8>] %b.coerce, <16 x i8> %c) #1 { +// CHECK-LABEL: define frozen <16 x i8> @test_vqtbx3q_s8(<16 x i8> frozen %a, [3 x <16 x i8>] %b.coerce, <16 x i8> frozen %c) #1 { // CHECK: [[__P1_I:%.*]] = alloca %struct.int8x16x3_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.int8x16x3_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x16x3_t, %struct.int8x16x3_t* [[B]], i32 0, i32 0 @@ -476,7 +476,7 @@ return vqtbx3q_s8(a, b, c); } -// CHECK-LABEL: define <16 x i8> @test_vqtbx4q_s8(<16 x i8> %a, [4 x <16 x i8>] %b.coerce, <16 x i8> %c) #1 { +// CHECK-LABEL: define frozen <16 x i8> @test_vqtbx4q_s8(<16 x i8> frozen %a, [4 x <16 x i8>] %b.coerce, <16 x i8> frozen %c) #1 { // CHECK: [[__P1_I:%.*]] = alloca %struct.int8x16x4_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.int8x16x4_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x16x4_t, %struct.int8x16x4_t* [[B]], i32 0, i32 0 @@ -503,7 +503,7 @@ return vqtbx4q_s8(a, b, c); } -// CHECK-LABEL: define <8 x i8> @test_vtbl1_u8(<8 x i8> %a, <8 x i8> %b) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vtbl1_u8(<8 x i8> frozen %a, <8 x i8> frozen %b) #0 { // CHECK: [[VTBL1_I:%.*]] = shufflevector <8 x i8> %a, <8 x i8> zeroinitializer, <16 x i32> // CHECK: [[VTBL11_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.tbl1.v8i8(<16 x i8> [[VTBL1_I]], <8 x i8> %b) #3 // CHECK: ret <8 x i8> [[VTBL11_I]] @@ -511,14 +511,14 @@ return vtbl1_u8(a, b); } -// CHECK-LABEL: define <8 x i8> @test_vqtbl1_u8(<16 x i8> %a, <8 x i8> %b) #1 { +// CHECK-LABEL: define frozen <8 x i8> @test_vqtbl1_u8(<16 x i8> frozen %a, <8 x i8> frozen %b) #1 { // CHECK: [[VTBL1_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.tbl1.v8i8(<16 x i8> %a, <8 x i8> %b) #3 // CHECK: ret <8 x i8> [[VTBL1_I]] uint8x8_t test_vqtbl1_u8(uint8x16_t a, uint8x8_t b) { return vqtbl1_u8(a, b); } -// CHECK-LABEL: define <8 x i8> @test_vtbl2_u8([2 x <8 x i8>] %a.coerce, <8 x i8> %b) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vtbl2_u8([2 x <8 x i8>] %a.coerce, <8 x i8> frozen %b) #0 { // CHECK: [[__P0_I:%.*]] = alloca %struct.uint8x8x2_t, align 8 // CHECK: [[A:%.*]] = alloca %struct.uint8x8x2_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x8x2_t, %struct.uint8x8x2_t* [[A]], i32 0, i32 0 @@ -540,7 +540,7 @@ return vtbl2_u8(a, b); } -// CHECK-LABEL: define <8 x i8> @test_vqtbl2_u8([2 x <16 x i8>] %a.coerce, <8 x i8> %b) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vqtbl2_u8([2 x <16 x i8>] %a.coerce, <8 x i8> frozen %b) #0 { // CHECK: [[__P0_I:%.*]] = alloca %struct.uint8x16x2_t, align 16 // CHECK: [[A:%.*]] = alloca %struct.uint8x16x2_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x16x2_t, %struct.uint8x16x2_t* [[A]], i32 0, i32 0 @@ -561,7 +561,7 @@ return vqtbl2_u8(a, b); } -// CHECK-LABEL: define <8 x i8> @test_vtbl3_u8([3 x <8 x i8>] %a.coerce, <8 x i8> %b) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vtbl3_u8([3 x <8 x i8>] %a.coerce, <8 x i8> frozen %b) #0 { // CHECK: [[__P0_I:%.*]] = alloca %struct.uint8x8x3_t, align 8 // CHECK: [[A:%.*]] = alloca %struct.uint8x8x3_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x8x3_t, %struct.uint8x8x3_t* [[A]], i32 0, i32 0 @@ -587,7 +587,7 @@ return vtbl3_u8(a, b); } -// CHECK-LABEL: define <8 x i8> @test_vqtbl3_u8([3 x <16 x i8>] %a.coerce, <8 x i8> %b) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vqtbl3_u8([3 x <16 x i8>] %a.coerce, <8 x i8> frozen %b) #0 { // CHECK: [[__P0_I:%.*]] = alloca %struct.uint8x16x3_t, align 16 // CHECK: [[A:%.*]] = alloca %struct.uint8x16x3_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x16x3_t, %struct.uint8x16x3_t* [[A]], i32 0, i32 0 @@ -611,7 +611,7 @@ return vqtbl3_u8(a, b); } -// CHECK-LABEL: define <8 x i8> @test_vtbl4_u8([4 x <8 x i8>] %a.coerce, <8 x i8> %b) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vtbl4_u8([4 x <8 x i8>] %a.coerce, <8 x i8> frozen %b) #0 { // CHECK: [[__P0_I:%.*]] = alloca %struct.uint8x8x4_t, align 8 // CHECK: [[A:%.*]] = alloca %struct.uint8x8x4_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x8x4_t, %struct.uint8x8x4_t* [[A]], i32 0, i32 0 @@ -640,7 +640,7 @@ return vtbl4_u8(a, b); } -// CHECK-LABEL: define <8 x i8> @test_vqtbl4_u8([4 x <16 x i8>] %a.coerce, <8 x i8> %b) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vqtbl4_u8([4 x <16 x i8>] %a.coerce, <8 x i8> frozen %b) #0 { // CHECK: [[__P0_I:%.*]] = alloca %struct.uint8x16x4_t, align 16 // CHECK: [[A:%.*]] = alloca %struct.uint8x16x4_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x16x4_t, %struct.uint8x16x4_t* [[A]], i32 0, i32 0 @@ -667,14 +667,14 @@ return vqtbl4_u8(a, b); } -// CHECK-LABEL: define <16 x i8> @test_vqtbl1q_u8(<16 x i8> %a, <16 x i8> %b) #1 { +// CHECK-LABEL: define frozen <16 x i8> @test_vqtbl1q_u8(<16 x i8> frozen %a, <16 x i8> frozen %b) #1 { // CHECK: [[VTBL1_I:%.*]] = call <16 x i8> @llvm.aarch64.neon.tbl1.v16i8(<16 x i8> %a, <16 x i8> %b) #3 // CHECK: ret <16 x i8> [[VTBL1_I]] uint8x16_t test_vqtbl1q_u8(uint8x16_t a, uint8x16_t b) { return vqtbl1q_u8(a, b); } -// CHECK-LABEL: define <16 x i8> @test_vqtbl2q_u8([2 x <16 x i8>] %a.coerce, <16 x i8> %b) #1 { +// CHECK-LABEL: define frozen <16 x i8> @test_vqtbl2q_u8([2 x <16 x i8>] %a.coerce, <16 x i8> frozen %b) #1 { // CHECK: [[__P0_I:%.*]] = alloca %struct.uint8x16x2_t, align 16 // CHECK: [[A:%.*]] = alloca %struct.uint8x16x2_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x16x2_t, %struct.uint8x16x2_t* [[A]], i32 0, i32 0 @@ -695,7 +695,7 @@ return vqtbl2q_u8(a, b); } -// CHECK-LABEL: define <16 x i8> @test_vqtbl3q_u8([3 x <16 x i8>] %a.coerce, <16 x i8> %b) #1 { +// CHECK-LABEL: define frozen <16 x i8> @test_vqtbl3q_u8([3 x <16 x i8>] %a.coerce, <16 x i8> frozen %b) #1 { // CHECK: [[__P0_I:%.*]] = alloca %struct.uint8x16x3_t, align 16 // CHECK: [[A:%.*]] = alloca %struct.uint8x16x3_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x16x3_t, %struct.uint8x16x3_t* [[A]], i32 0, i32 0 @@ -719,7 +719,7 @@ return vqtbl3q_u8(a, b); } -// CHECK-LABEL: define <16 x i8> @test_vqtbl4q_u8([4 x <16 x i8>] %a.coerce, <16 x i8> %b) #1 { +// CHECK-LABEL: define frozen <16 x i8> @test_vqtbl4q_u8([4 x <16 x i8>] %a.coerce, <16 x i8> frozen %b) #1 { // CHECK: [[__P0_I:%.*]] = alloca %struct.uint8x16x4_t, align 16 // CHECK: [[A:%.*]] = alloca %struct.uint8x16x4_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x16x4_t, %struct.uint8x16x4_t* [[A]], i32 0, i32 0 @@ -746,7 +746,7 @@ return vqtbl4q_u8(a, b); } -// CHECK-LABEL: define <8 x i8> @test_vtbx1_u8(<8 x i8> %a, <8 x i8> %b, <8 x i8> %c) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vtbx1_u8(<8 x i8> frozen %a, <8 x i8> frozen %b, <8 x i8> frozen %c) #0 { // CHECK: [[VTBL1_I:%.*]] = shufflevector <8 x i8> %b, <8 x i8> zeroinitializer, <16 x i32> // CHECK: [[VTBL11_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.tbl1.v8i8(<16 x i8> [[VTBL1_I]], <8 x i8> %c) #3 // CHECK: [[TMP0:%.*]] = icmp uge <8 x i8> %c, @@ -760,7 +760,7 @@ return vtbx1_u8(a, b, c); } -// CHECK-LABEL: define <8 x i8> @test_vtbx2_u8(<8 x i8> %a, [2 x <8 x i8>] %b.coerce, <8 x i8> %c) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vtbx2_u8(<8 x i8> frozen %a, [2 x <8 x i8>] %b.coerce, <8 x i8> frozen %c) #0 { // CHECK: [[__P1_I:%.*]] = alloca %struct.uint8x8x2_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.uint8x8x2_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x8x2_t, %struct.uint8x8x2_t* [[B]], i32 0, i32 0 @@ -782,7 +782,7 @@ return vtbx2_u8(a, b, c); } -// CHECK-LABEL: define <8 x i8> @test_vtbx3_u8(<8 x i8> %a, [3 x <8 x i8>] %b.coerce, <8 x i8> %c) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vtbx3_u8(<8 x i8> frozen %a, [3 x <8 x i8>] %b.coerce, <8 x i8> frozen %c) #0 { // CHECK: [[__P1_I:%.*]] = alloca %struct.uint8x8x3_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.uint8x8x3_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x8x3_t, %struct.uint8x8x3_t* [[B]], i32 0, i32 0 @@ -814,7 +814,7 @@ return vtbx3_u8(a, b, c); } -// CHECK-LABEL: define <8 x i8> @test_vtbx4_u8(<8 x i8> %a, [4 x <8 x i8>] %b.coerce, <8 x i8> %c) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vtbx4_u8(<8 x i8> frozen %a, [4 x <8 x i8>] %b.coerce, <8 x i8> frozen %c) #0 { // CHECK: [[__P1_I:%.*]] = alloca %struct.uint8x8x4_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.uint8x8x4_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x8x4_t, %struct.uint8x8x4_t* [[B]], i32 0, i32 0 @@ -843,14 +843,14 @@ return vtbx4_u8(a, b, c); } -// CHECK-LABEL: define <8 x i8> @test_vqtbx1_u8(<8 x i8> %a, <16 x i8> %b, <8 x i8> %c) #1 { +// CHECK-LABEL: define frozen <8 x i8> @test_vqtbx1_u8(<8 x i8> frozen %a, <16 x i8> frozen %b, <8 x i8> frozen %c) #1 { // CHECK: [[VTBX1_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.tbx1.v8i8(<8 x i8> %a, <16 x i8> %b, <8 x i8> %c) #3 // CHECK: ret <8 x i8> [[VTBX1_I]] uint8x8_t test_vqtbx1_u8(uint8x8_t a, uint8x16_t b, uint8x8_t c) { return vqtbx1_u8(a, b, c); } -// CHECK-LABEL: define <8 x i8> @test_vqtbx2_u8(<8 x i8> %a, [2 x <16 x i8>] %b.coerce, <8 x i8> %c) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vqtbx2_u8(<8 x i8> frozen %a, [2 x <16 x i8>] %b.coerce, <8 x i8> frozen %c) #0 { // CHECK: [[__P1_I:%.*]] = alloca %struct.uint8x16x2_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.uint8x16x2_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x16x2_t, %struct.uint8x16x2_t* [[B]], i32 0, i32 0 @@ -871,7 +871,7 @@ return vqtbx2_u8(a, b, c); } -// CHECK-LABEL: define <8 x i8> @test_vqtbx3_u8(<8 x i8> %a, [3 x <16 x i8>] %b.coerce, <8 x i8> %c) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vqtbx3_u8(<8 x i8> frozen %a, [3 x <16 x i8>] %b.coerce, <8 x i8> frozen %c) #0 { // CHECK: [[__P1_I:%.*]] = alloca %struct.uint8x16x3_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.uint8x16x3_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x16x3_t, %struct.uint8x16x3_t* [[B]], i32 0, i32 0 @@ -895,7 +895,7 @@ return vqtbx3_u8(a, b, c); } -// CHECK-LABEL: define <8 x i8> @test_vqtbx4_u8(<8 x i8> %a, [4 x <16 x i8>] %b.coerce, <8 x i8> %c) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vqtbx4_u8(<8 x i8> frozen %a, [4 x <16 x i8>] %b.coerce, <8 x i8> frozen %c) #0 { // CHECK: [[__P1_I:%.*]] = alloca %struct.uint8x16x4_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.uint8x16x4_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x16x4_t, %struct.uint8x16x4_t* [[B]], i32 0, i32 0 @@ -922,14 +922,14 @@ return vqtbx4_u8(a, b, c); } -// CHECK-LABEL: define <16 x i8> @test_vqtbx1q_u8(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c) #1 { +// CHECK-LABEL: define frozen <16 x i8> @test_vqtbx1q_u8(<16 x i8> frozen %a, <16 x i8> frozen %b, <16 x i8> frozen %c) #1 { // CHECK: [[VTBX1_I:%.*]] = call <16 x i8> @llvm.aarch64.neon.tbx1.v16i8(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c) #3 // CHECK: ret <16 x i8> [[VTBX1_I]] uint8x16_t test_vqtbx1q_u8(uint8x16_t a, uint8x16_t b, uint8x16_t c) { return vqtbx1q_u8(a, b, c); } -// CHECK-LABEL: define <16 x i8> @test_vqtbx2q_u8(<16 x i8> %a, [2 x <16 x i8>] %b.coerce, <16 x i8> %c) #1 { +// CHECK-LABEL: define frozen <16 x i8> @test_vqtbx2q_u8(<16 x i8> frozen %a, [2 x <16 x i8>] %b.coerce, <16 x i8> frozen %c) #1 { // CHECK: [[__P1_I:%.*]] = alloca %struct.uint8x16x2_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.uint8x16x2_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x16x2_t, %struct.uint8x16x2_t* [[B]], i32 0, i32 0 @@ -950,7 +950,7 @@ return vqtbx2q_u8(a, b, c); } -// CHECK-LABEL: define <16 x i8> @test_vqtbx3q_u8(<16 x i8> %a, [3 x <16 x i8>] %b.coerce, <16 x i8> %c) #1 { +// CHECK-LABEL: define frozen <16 x i8> @test_vqtbx3q_u8(<16 x i8> frozen %a, [3 x <16 x i8>] %b.coerce, <16 x i8> frozen %c) #1 { // CHECK: [[__P1_I:%.*]] = alloca %struct.uint8x16x3_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.uint8x16x3_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x16x3_t, %struct.uint8x16x3_t* [[B]], i32 0, i32 0 @@ -974,7 +974,7 @@ return vqtbx3q_u8(a, b, c); } -// CHECK-LABEL: define <16 x i8> @test_vqtbx4q_u8(<16 x i8> %a, [4 x <16 x i8>] %b.coerce, <16 x i8> %c) #1 { +// CHECK-LABEL: define frozen <16 x i8> @test_vqtbx4q_u8(<16 x i8> frozen %a, [4 x <16 x i8>] %b.coerce, <16 x i8> frozen %c) #1 { // CHECK: [[__P1_I:%.*]] = alloca %struct.uint8x16x4_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.uint8x16x4_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x16x4_t, %struct.uint8x16x4_t* [[B]], i32 0, i32 0 @@ -1001,7 +1001,7 @@ return vqtbx4q_u8(a, b, c); } -// CHECK-LABEL: define <8 x i8> @test_vtbl1_p8(<8 x i8> %a, <8 x i8> %b) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vtbl1_p8(<8 x i8> frozen %a, <8 x i8> frozen %b) #0 { // CHECK: [[VTBL1_I:%.*]] = shufflevector <8 x i8> %a, <8 x i8> zeroinitializer, <16 x i32> // CHECK: [[VTBL11_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.tbl1.v8i8(<16 x i8> [[VTBL1_I]], <8 x i8> %b) #3 // CHECK: ret <8 x i8> [[VTBL11_I]] @@ -1009,14 +1009,14 @@ return vtbl1_p8(a, b); } -// CHECK-LABEL: define <8 x i8> @test_vqtbl1_p8(<16 x i8> %a, <8 x i8> %b) #1 { +// CHECK-LABEL: define frozen <8 x i8> @test_vqtbl1_p8(<16 x i8> frozen %a, <8 x i8> frozen %b) #1 { // CHECK: [[VTBL1_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.tbl1.v8i8(<16 x i8> %a, <8 x i8> %b) #3 // CHECK: ret <8 x i8> [[VTBL1_I]] poly8x8_t test_vqtbl1_p8(poly8x16_t a, uint8x8_t b) { return vqtbl1_p8(a, b); } -// CHECK-LABEL: define <8 x i8> @test_vtbl2_p8([2 x <8 x i8>] %a.coerce, <8 x i8> %b) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vtbl2_p8([2 x <8 x i8>] %a.coerce, <8 x i8> frozen %b) #0 { // CHECK: [[__P0_I:%.*]] = alloca %struct.poly8x8x2_t, align 8 // CHECK: [[A:%.*]] = alloca %struct.poly8x8x2_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x8x2_t, %struct.poly8x8x2_t* [[A]], i32 0, i32 0 @@ -1038,7 +1038,7 @@ return vtbl2_p8(a, b); } -// CHECK-LABEL: define <8 x i8> @test_vqtbl2_p8([2 x <16 x i8>] %a.coerce, <8 x i8> %b) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vqtbl2_p8([2 x <16 x i8>] %a.coerce, <8 x i8> frozen %b) #0 { // CHECK: [[__P0_I:%.*]] = alloca %struct.poly8x16x2_t, align 16 // CHECK: [[A:%.*]] = alloca %struct.poly8x16x2_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x16x2_t, %struct.poly8x16x2_t* [[A]], i32 0, i32 0 @@ -1059,7 +1059,7 @@ return vqtbl2_p8(a, b); } -// CHECK-LABEL: define <8 x i8> @test_vtbl3_p8([3 x <8 x i8>] %a.coerce, <8 x i8> %b) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vtbl3_p8([3 x <8 x i8>] %a.coerce, <8 x i8> frozen %b) #0 { // CHECK: [[__P0_I:%.*]] = alloca %struct.poly8x8x3_t, align 8 // CHECK: [[A:%.*]] = alloca %struct.poly8x8x3_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x8x3_t, %struct.poly8x8x3_t* [[A]], i32 0, i32 0 @@ -1085,7 +1085,7 @@ return vtbl3_p8(a, b); } -// CHECK-LABEL: define <8 x i8> @test_vqtbl3_p8([3 x <16 x i8>] %a.coerce, <8 x i8> %b) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vqtbl3_p8([3 x <16 x i8>] %a.coerce, <8 x i8> frozen %b) #0 { // CHECK: [[__P0_I:%.*]] = alloca %struct.poly8x16x3_t, align 16 // CHECK: [[A:%.*]] = alloca %struct.poly8x16x3_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x16x3_t, %struct.poly8x16x3_t* [[A]], i32 0, i32 0 @@ -1109,7 +1109,7 @@ return vqtbl3_p8(a, b); } -// CHECK-LABEL: define <8 x i8> @test_vtbl4_p8([4 x <8 x i8>] %a.coerce, <8 x i8> %b) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vtbl4_p8([4 x <8 x i8>] %a.coerce, <8 x i8> frozen %b) #0 { // CHECK: [[__P0_I:%.*]] = alloca %struct.poly8x8x4_t, align 8 // CHECK: [[A:%.*]] = alloca %struct.poly8x8x4_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x8x4_t, %struct.poly8x8x4_t* [[A]], i32 0, i32 0 @@ -1138,7 +1138,7 @@ return vtbl4_p8(a, b); } -// CHECK-LABEL: define <8 x i8> @test_vqtbl4_p8([4 x <16 x i8>] %a.coerce, <8 x i8> %b) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vqtbl4_p8([4 x <16 x i8>] %a.coerce, <8 x i8> frozen %b) #0 { // CHECK: [[__P0_I:%.*]] = alloca %struct.poly8x16x4_t, align 16 // CHECK: [[A:%.*]] = alloca %struct.poly8x16x4_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x16x4_t, %struct.poly8x16x4_t* [[A]], i32 0, i32 0 @@ -1165,14 +1165,14 @@ return vqtbl4_p8(a, b); } -// CHECK-LABEL: define <16 x i8> @test_vqtbl1q_p8(<16 x i8> %a, <16 x i8> %b) #1 { +// CHECK-LABEL: define frozen <16 x i8> @test_vqtbl1q_p8(<16 x i8> frozen %a, <16 x i8> frozen %b) #1 { // CHECK: [[VTBL1_I:%.*]] = call <16 x i8> @llvm.aarch64.neon.tbl1.v16i8(<16 x i8> %a, <16 x i8> %b) #3 // CHECK: ret <16 x i8> [[VTBL1_I]] poly8x16_t test_vqtbl1q_p8(poly8x16_t a, uint8x16_t b) { return vqtbl1q_p8(a, b); } -// CHECK-LABEL: define <16 x i8> @test_vqtbl2q_p8([2 x <16 x i8>] %a.coerce, <16 x i8> %b) #1 { +// CHECK-LABEL: define frozen <16 x i8> @test_vqtbl2q_p8([2 x <16 x i8>] %a.coerce, <16 x i8> frozen %b) #1 { // CHECK: [[__P0_I:%.*]] = alloca %struct.poly8x16x2_t, align 16 // CHECK: [[A:%.*]] = alloca %struct.poly8x16x2_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x16x2_t, %struct.poly8x16x2_t* [[A]], i32 0, i32 0 @@ -1193,7 +1193,7 @@ return vqtbl2q_p8(a, b); } -// CHECK-LABEL: define <16 x i8> @test_vqtbl3q_p8([3 x <16 x i8>] %a.coerce, <16 x i8> %b) #1 { +// CHECK-LABEL: define frozen <16 x i8> @test_vqtbl3q_p8([3 x <16 x i8>] %a.coerce, <16 x i8> frozen %b) #1 { // CHECK: [[__P0_I:%.*]] = alloca %struct.poly8x16x3_t, align 16 // CHECK: [[A:%.*]] = alloca %struct.poly8x16x3_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x16x3_t, %struct.poly8x16x3_t* [[A]], i32 0, i32 0 @@ -1217,7 +1217,7 @@ return vqtbl3q_p8(a, b); } -// CHECK-LABEL: define <16 x i8> @test_vqtbl4q_p8([4 x <16 x i8>] %a.coerce, <16 x i8> %b) #1 { +// CHECK-LABEL: define frozen <16 x i8> @test_vqtbl4q_p8([4 x <16 x i8>] %a.coerce, <16 x i8> frozen %b) #1 { // CHECK: [[__P0_I:%.*]] = alloca %struct.poly8x16x4_t, align 16 // CHECK: [[A:%.*]] = alloca %struct.poly8x16x4_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x16x4_t, %struct.poly8x16x4_t* [[A]], i32 0, i32 0 @@ -1244,7 +1244,7 @@ return vqtbl4q_p8(a, b); } -// CHECK-LABEL: define <8 x i8> @test_vtbx1_p8(<8 x i8> %a, <8 x i8> %b, <8 x i8> %c) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vtbx1_p8(<8 x i8> frozen %a, <8 x i8> frozen %b, <8 x i8> frozen %c) #0 { // CHECK: [[VTBL1_I:%.*]] = shufflevector <8 x i8> %b, <8 x i8> zeroinitializer, <16 x i32> // CHECK: [[VTBL11_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.tbl1.v8i8(<16 x i8> [[VTBL1_I]], <8 x i8> %c) #3 // CHECK: [[TMP0:%.*]] = icmp uge <8 x i8> %c, @@ -1258,7 +1258,7 @@ return vtbx1_p8(a, b, c); } -// CHECK-LABEL: define <8 x i8> @test_vtbx2_p8(<8 x i8> %a, [2 x <8 x i8>] %b.coerce, <8 x i8> %c) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vtbx2_p8(<8 x i8> frozen %a, [2 x <8 x i8>] %b.coerce, <8 x i8> frozen %c) #0 { // CHECK: [[__P1_I:%.*]] = alloca %struct.poly8x8x2_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.poly8x8x2_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x8x2_t, %struct.poly8x8x2_t* [[B]], i32 0, i32 0 @@ -1280,7 +1280,7 @@ return vtbx2_p8(a, b, c); } -// CHECK-LABEL: define <8 x i8> @test_vtbx3_p8(<8 x i8> %a, [3 x <8 x i8>] %b.coerce, <8 x i8> %c) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vtbx3_p8(<8 x i8> frozen %a, [3 x <8 x i8>] %b.coerce, <8 x i8> frozen %c) #0 { // CHECK: [[__P1_I:%.*]] = alloca %struct.poly8x8x3_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.poly8x8x3_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x8x3_t, %struct.poly8x8x3_t* [[B]], i32 0, i32 0 @@ -1312,7 +1312,7 @@ return vtbx3_p8(a, b, c); } -// CHECK-LABEL: define <8 x i8> @test_vtbx4_p8(<8 x i8> %a, [4 x <8 x i8>] %b.coerce, <8 x i8> %c) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vtbx4_p8(<8 x i8> frozen %a, [4 x <8 x i8>] %b.coerce, <8 x i8> frozen %c) #0 { // CHECK: [[__P1_I:%.*]] = alloca %struct.poly8x8x4_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.poly8x8x4_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x8x4_t, %struct.poly8x8x4_t* [[B]], i32 0, i32 0 @@ -1341,14 +1341,14 @@ return vtbx4_p8(a, b, c); } -// CHECK-LABEL: define <8 x i8> @test_vqtbx1_p8(<8 x i8> %a, <16 x i8> %b, <8 x i8> %c) #1 { +// CHECK-LABEL: define frozen <8 x i8> @test_vqtbx1_p8(<8 x i8> frozen %a, <16 x i8> frozen %b, <8 x i8> frozen %c) #1 { // CHECK: [[VTBX1_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.tbx1.v8i8(<8 x i8> %a, <16 x i8> %b, <8 x i8> %c) #3 // CHECK: ret <8 x i8> [[VTBX1_I]] poly8x8_t test_vqtbx1_p8(poly8x8_t a, uint8x16_t b, uint8x8_t c) { return vqtbx1_p8(a, b, c); } -// CHECK-LABEL: define <8 x i8> @test_vqtbx2_p8(<8 x i8> %a, [2 x <16 x i8>] %b.coerce, <8 x i8> %c) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vqtbx2_p8(<8 x i8> frozen %a, [2 x <16 x i8>] %b.coerce, <8 x i8> frozen %c) #0 { // CHECK: [[__P1_I:%.*]] = alloca %struct.poly8x16x2_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.poly8x16x2_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x16x2_t, %struct.poly8x16x2_t* [[B]], i32 0, i32 0 @@ -1369,7 +1369,7 @@ return vqtbx2_p8(a, b, c); } -// CHECK-LABEL: define <8 x i8> @test_vqtbx3_p8(<8 x i8> %a, [3 x <16 x i8>] %b.coerce, <8 x i8> %c) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vqtbx3_p8(<8 x i8> frozen %a, [3 x <16 x i8>] %b.coerce, <8 x i8> frozen %c) #0 { // CHECK: [[__P1_I:%.*]] = alloca %struct.poly8x16x3_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.poly8x16x3_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x16x3_t, %struct.poly8x16x3_t* [[B]], i32 0, i32 0 @@ -1393,7 +1393,7 @@ return vqtbx3_p8(a, b, c); } -// CHECK-LABEL: define <8 x i8> @test_vqtbx4_p8(<8 x i8> %a, [4 x <16 x i8>] %b.coerce, <8 x i8> %c) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vqtbx4_p8(<8 x i8> frozen %a, [4 x <16 x i8>] %b.coerce, <8 x i8> frozen %c) #0 { // CHECK: [[__P1_I:%.*]] = alloca %struct.poly8x16x4_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.poly8x16x4_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x16x4_t, %struct.poly8x16x4_t* [[B]], i32 0, i32 0 @@ -1420,14 +1420,14 @@ return vqtbx4_p8(a, b, c); } -// CHECK-LABEL: define <16 x i8> @test_vqtbx1q_p8(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c) #1 { +// CHECK-LABEL: define frozen <16 x i8> @test_vqtbx1q_p8(<16 x i8> frozen %a, <16 x i8> frozen %b, <16 x i8> frozen %c) #1 { // CHECK: [[VTBX1_I:%.*]] = call <16 x i8> @llvm.aarch64.neon.tbx1.v16i8(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c) #3 // CHECK: ret <16 x i8> [[VTBX1_I]] poly8x16_t test_vqtbx1q_p8(poly8x16_t a, uint8x16_t b, uint8x16_t c) { return vqtbx1q_p8(a, b, c); } -// CHECK-LABEL: define <16 x i8> @test_vqtbx2q_p8(<16 x i8> %a, [2 x <16 x i8>] %b.coerce, <16 x i8> %c) #1 { +// CHECK-LABEL: define frozen <16 x i8> @test_vqtbx2q_p8(<16 x i8> frozen %a, [2 x <16 x i8>] %b.coerce, <16 x i8> frozen %c) #1 { // CHECK: [[__P1_I:%.*]] = alloca %struct.poly8x16x2_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.poly8x16x2_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x16x2_t, %struct.poly8x16x2_t* [[B]], i32 0, i32 0 @@ -1448,7 +1448,7 @@ return vqtbx2q_p8(a, b, c); } -// CHECK-LABEL: define <16 x i8> @test_vqtbx3q_p8(<16 x i8> %a, [3 x <16 x i8>] %b.coerce, <16 x i8> %c) #1 { +// CHECK-LABEL: define frozen <16 x i8> @test_vqtbx3q_p8(<16 x i8> frozen %a, [3 x <16 x i8>] %b.coerce, <16 x i8> frozen %c) #1 { // CHECK: [[__P1_I:%.*]] = alloca %struct.poly8x16x3_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.poly8x16x3_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x16x3_t, %struct.poly8x16x3_t* [[B]], i32 0, i32 0 @@ -1472,7 +1472,7 @@ return vqtbx3q_p8(a, b, c); } -// CHECK-LABEL: define <16 x i8> @test_vqtbx4q_p8(<16 x i8> %a, [4 x <16 x i8>] %b.coerce, <16 x i8> %c) #1 { +// CHECK-LABEL: define frozen <16 x i8> @test_vqtbx4q_p8(<16 x i8> frozen %a, [4 x <16 x i8>] %b.coerce, <16 x i8> frozen %c) #1 { // CHECK: [[__P1_I:%.*]] = alloca %struct.poly8x16x4_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.poly8x16x4_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x16x4_t, %struct.poly8x16x4_t* [[B]], i32 0, i32 0 diff --git a/clang/test/CodeGen/aarch64-neon-vcombine.c b/clang/test/CodeGen/aarch64-neon-vcombine.c --- a/clang/test/CodeGen/aarch64-neon-vcombine.c +++ b/clang/test/CodeGen/aarch64-neon-vcombine.c @@ -4,98 +4,98 @@ #include -// CHECK-LABEL: define <16 x i8> @test_vcombine_s8(<8 x i8> %low, <8 x i8> %high) #0 { +// CHECK-LABEL: define frozen <16 x i8> @test_vcombine_s8(<8 x i8> frozen %low, <8 x i8> frozen %high) #0 { // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <8 x i8> %low, <8 x i8> %high, <16 x i32> // CHECK: ret <16 x i8> [[SHUFFLE_I]] int8x16_t test_vcombine_s8(int8x8_t low, int8x8_t high) { return vcombine_s8(low, high); } -// CHECK-LABEL: define <8 x i16> @test_vcombine_s16(<4 x i16> %low, <4 x i16> %high) #0 { +// CHECK-LABEL: define frozen <8 x i16> @test_vcombine_s16(<4 x i16> frozen %low, <4 x i16> frozen %high) #0 { // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <4 x i16> %low, <4 x i16> %high, <8 x i32> // CHECK: ret <8 x i16> [[SHUFFLE_I]] int16x8_t test_vcombine_s16(int16x4_t low, int16x4_t high) { return vcombine_s16(low, high); } -// CHECK-LABEL: define <4 x i32> @test_vcombine_s32(<2 x i32> %low, <2 x i32> %high) #0 { +// CHECK-LABEL: define frozen <4 x i32> @test_vcombine_s32(<2 x i32> frozen %low, <2 x i32> frozen %high) #0 { // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <2 x i32> %low, <2 x i32> %high, <4 x i32> // CHECK: ret <4 x i32> [[SHUFFLE_I]] int32x4_t test_vcombine_s32(int32x2_t low, int32x2_t high) { return vcombine_s32(low, high); } -// CHECK-LABEL: define <2 x i64> @test_vcombine_s64(<1 x i64> %low, <1 x i64> %high) #0 { +// CHECK-LABEL: define frozen <2 x i64> @test_vcombine_s64(<1 x i64> frozen %low, <1 x i64> frozen %high) #0 { // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <1 x i64> %low, <1 x i64> %high, <2 x i32> // CHECK: ret <2 x i64> [[SHUFFLE_I]] int64x2_t test_vcombine_s64(int64x1_t low, int64x1_t high) { return vcombine_s64(low, high); } -// CHECK-LABEL: define <16 x i8> @test_vcombine_u8(<8 x i8> %low, <8 x i8> %high) #0 { +// CHECK-LABEL: define frozen <16 x i8> @test_vcombine_u8(<8 x i8> frozen %low, <8 x i8> frozen %high) #0 { // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <8 x i8> %low, <8 x i8> %high, <16 x i32> // CHECK: ret <16 x i8> [[SHUFFLE_I]] uint8x16_t test_vcombine_u8(uint8x8_t low, uint8x8_t high) { return vcombine_u8(low, high); } -// CHECK-LABEL: define <8 x i16> @test_vcombine_u16(<4 x i16> %low, <4 x i16> %high) #0 { +// CHECK-LABEL: define frozen <8 x i16> @test_vcombine_u16(<4 x i16> frozen %low, <4 x i16> frozen %high) #0 { // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <4 x i16> %low, <4 x i16> %high, <8 x i32> // CHECK: ret <8 x i16> [[SHUFFLE_I]] uint16x8_t test_vcombine_u16(uint16x4_t low, uint16x4_t high) { return vcombine_u16(low, high); } -// CHECK-LABEL: define <4 x i32> @test_vcombine_u32(<2 x i32> %low, <2 x i32> %high) #0 { +// CHECK-LABEL: define frozen <4 x i32> @test_vcombine_u32(<2 x i32> frozen %low, <2 x i32> frozen %high) #0 { // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <2 x i32> %low, <2 x i32> %high, <4 x i32> // CHECK: ret <4 x i32> [[SHUFFLE_I]] uint32x4_t test_vcombine_u32(uint32x2_t low, uint32x2_t high) { return vcombine_u32(low, high); } -// CHECK-LABEL: define <2 x i64> @test_vcombine_u64(<1 x i64> %low, <1 x i64> %high) #0 { +// CHECK-LABEL: define frozen <2 x i64> @test_vcombine_u64(<1 x i64> frozen %low, <1 x i64> frozen %high) #0 { // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <1 x i64> %low, <1 x i64> %high, <2 x i32> // CHECK: ret <2 x i64> [[SHUFFLE_I]] uint64x2_t test_vcombine_u64(uint64x1_t low, uint64x1_t high) { return vcombine_u64(low, high); } -// CHECK-LABEL: define <2 x i64> @test_vcombine_p64(<1 x i64> %low, <1 x i64> %high) #0 { +// CHECK-LABEL: define frozen <2 x i64> @test_vcombine_p64(<1 x i64> frozen %low, <1 x i64> frozen %high) #0 { // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <1 x i64> %low, <1 x i64> %high, <2 x i32> // CHECK: ret <2 x i64> [[SHUFFLE_I]] poly64x2_t test_vcombine_p64(poly64x1_t low, poly64x1_t high) { return vcombine_p64(low, high); } -// CHECK-LABEL: define <8 x half> @test_vcombine_f16(<4 x half> %low, <4 x half> %high) #0 { +// CHECK-LABEL: define frozen <8 x half> @test_vcombine_f16(<4 x half> frozen %low, <4 x half> frozen %high) #0 { // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <4 x half> %low, <4 x half> %high, <8 x i32> // CHECK: ret <8 x half> [[SHUFFLE_I]] float16x8_t test_vcombine_f16(float16x4_t low, float16x4_t high) { return vcombine_f16(low, high); } -// CHECK-LABEL: define <4 x float> @test_vcombine_f32(<2 x float> %low, <2 x float> %high) #0 { +// CHECK-LABEL: define frozen <4 x float> @test_vcombine_f32(<2 x float> frozen %low, <2 x float> frozen %high) #0 { // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <2 x float> %low, <2 x float> %high, <4 x i32> // CHECK: ret <4 x float> [[SHUFFLE_I]] float32x4_t test_vcombine_f32(float32x2_t low, float32x2_t high) { return vcombine_f32(low, high); } -// CHECK-LABEL: define <16 x i8> @test_vcombine_p8(<8 x i8> %low, <8 x i8> %high) #0 { +// CHECK-LABEL: define frozen <16 x i8> @test_vcombine_p8(<8 x i8> frozen %low, <8 x i8> frozen %high) #0 { // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <8 x i8> %low, <8 x i8> %high, <16 x i32> // CHECK: ret <16 x i8> [[SHUFFLE_I]] poly8x16_t test_vcombine_p8(poly8x8_t low, poly8x8_t high) { return vcombine_p8(low, high); } -// CHECK-LABEL: define <8 x i16> @test_vcombine_p16(<4 x i16> %low, <4 x i16> %high) #0 { +// CHECK-LABEL: define frozen <8 x i16> @test_vcombine_p16(<4 x i16> frozen %low, <4 x i16> frozen %high) #0 { // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <4 x i16> %low, <4 x i16> %high, <8 x i32> // CHECK: ret <8 x i16> [[SHUFFLE_I]] poly16x8_t test_vcombine_p16(poly16x4_t low, poly16x4_t high) { return vcombine_p16(low, high); } -// CHECK-LABEL: define <2 x double> @test_vcombine_f64(<1 x double> %low, <1 x double> %high) #0 { +// CHECK-LABEL: define frozen <2 x double> @test_vcombine_f64(<1 x double> frozen %low, <1 x double> frozen %high) #0 { // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <1 x double> %low, <1 x double> %high, <2 x i32> // CHECK: ret <2 x double> [[SHUFFLE_I]] float64x2_t test_vcombine_f64(float64x1_t low, float64x1_t high) { diff --git a/clang/test/CodeGen/aarch64-neon-vget-hilo.c b/clang/test/CodeGen/aarch64-neon-vget-hilo.c --- a/clang/test/CodeGen/aarch64-neon-vget-hilo.c +++ b/clang/test/CodeGen/aarch64-neon-vget-hilo.c @@ -5,196 +5,196 @@ #include -// CHECK-LABEL: define <8 x i8> @test_vget_high_s8(<16 x i8> %a) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vget_high_s8(<16 x i8> frozen %a) #0 { // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <16 x i8> %a, <16 x i8> %a, <8 x i32> // CHECK: ret <8 x i8> [[SHUFFLE_I]] int8x8_t test_vget_high_s8(int8x16_t a) { return vget_high_s8(a); } -// CHECK-LABEL: define <4 x i16> @test_vget_high_s16(<8 x i16> %a) #0 { +// CHECK-LABEL: define frozen <4 x i16> @test_vget_high_s16(<8 x i16> frozen %a) #0 { // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <8 x i16> %a, <8 x i16> %a, <4 x i32> // CHECK: ret <4 x i16> [[SHUFFLE_I]] int16x4_t test_vget_high_s16(int16x8_t a) { return vget_high_s16(a); } -// CHECK-LABEL: define <2 x i32> @test_vget_high_s32(<4 x i32> %a) #0 { +// CHECK-LABEL: define frozen <2 x i32> @test_vget_high_s32(<4 x i32> frozen %a) #0 { // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <4 x i32> %a, <4 x i32> %a, <2 x i32> // CHECK: ret <2 x i32> [[SHUFFLE_I]] int32x2_t test_vget_high_s32(int32x4_t a) { return vget_high_s32(a); } -// CHECK-LABEL: define <1 x i64> @test_vget_high_s64(<2 x i64> %a) #0 { +// CHECK-LABEL: define frozen <1 x i64> @test_vget_high_s64(<2 x i64> frozen %a) #0 { // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <2 x i64> %a, <2 x i64> %a, <1 x i32> // CHECK: ret <1 x i64> [[SHUFFLE_I]] int64x1_t test_vget_high_s64(int64x2_t a) { return vget_high_s64(a); } -// CHECK-LABEL: define <8 x i8> @test_vget_high_u8(<16 x i8> %a) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vget_high_u8(<16 x i8> frozen %a) #0 { // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <16 x i8> %a, <16 x i8> %a, <8 x i32> // CHECK: ret <8 x i8> [[SHUFFLE_I]] uint8x8_t test_vget_high_u8(uint8x16_t a) { return vget_high_u8(a); } -// CHECK-LABEL: define <4 x i16> @test_vget_high_u16(<8 x i16> %a) #0 { +// CHECK-LABEL: define frozen <4 x i16> @test_vget_high_u16(<8 x i16> frozen %a) #0 { // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <8 x i16> %a, <8 x i16> %a, <4 x i32> // CHECK: ret <4 x i16> [[SHUFFLE_I]] uint16x4_t test_vget_high_u16(uint16x8_t a) { return vget_high_u16(a); } -// CHECK-LABEL: define <2 x i32> @test_vget_high_u32(<4 x i32> %a) #0 { +// CHECK-LABEL: define frozen <2 x i32> @test_vget_high_u32(<4 x i32> frozen %a) #0 { // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <4 x i32> %a, <4 x i32> %a, <2 x i32> // CHECK: ret <2 x i32> [[SHUFFLE_I]] uint32x2_t test_vget_high_u32(uint32x4_t a) { return vget_high_u32(a); } -// CHECK-LABEL: define <1 x i64> @test_vget_high_u64(<2 x i64> %a) #0 { +// CHECK-LABEL: define frozen <1 x i64> @test_vget_high_u64(<2 x i64> frozen %a) #0 { // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <2 x i64> %a, <2 x i64> %a, <1 x i32> // CHECK: ret <1 x i64> [[SHUFFLE_I]] uint64x1_t test_vget_high_u64(uint64x2_t a) { return vget_high_u64(a); } -// CHECK-LABEL: define <1 x i64> @test_vget_high_p64(<2 x i64> %a) #0 { +// CHECK-LABEL: define frozen <1 x i64> @test_vget_high_p64(<2 x i64> frozen %a) #0 { // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <2 x i64> %a, <2 x i64> %a, <1 x i32> // CHECK: ret <1 x i64> [[SHUFFLE_I]] poly64x1_t test_vget_high_p64(poly64x2_t a) { return vget_high_p64(a); } -// CHECK-LABEL: define <4 x half> @test_vget_high_f16(<8 x half> %a) #0 { +// CHECK-LABEL: define frozen <4 x half> @test_vget_high_f16(<8 x half> frozen %a) #0 { // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <8 x half> %a, <8 x half> %a, <4 x i32> // CHECK: ret <4 x half> [[SHUFFLE_I]] float16x4_t test_vget_high_f16(float16x8_t a) { return vget_high_f16(a); } -// CHECK-LABEL: define <2 x float> @test_vget_high_f32(<4 x float> %a) #0 { +// CHECK-LABEL: define frozen <2 x float> @test_vget_high_f32(<4 x float> frozen %a) #0 { // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <4 x float> %a, <4 x float> %a, <2 x i32> // CHECK: ret <2 x float> [[SHUFFLE_I]] float32x2_t test_vget_high_f32(float32x4_t a) { return vget_high_f32(a); } -// CHECK-LABEL: define <8 x i8> @test_vget_high_p8(<16 x i8> %a) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vget_high_p8(<16 x i8> frozen %a) #0 { // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <16 x i8> %a, <16 x i8> %a, <8 x i32> // CHECK: ret <8 x i8> [[SHUFFLE_I]] poly8x8_t test_vget_high_p8(poly8x16_t a) { return vget_high_p8(a); } -// CHECK-LABEL: define <4 x i16> @test_vget_high_p16(<8 x i16> %a) #0 { +// CHECK-LABEL: define frozen <4 x i16> @test_vget_high_p16(<8 x i16> frozen %a) #0 { // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <8 x i16> %a, <8 x i16> %a, <4 x i32> // CHECK: ret <4 x i16> [[SHUFFLE_I]] poly16x4_t test_vget_high_p16(poly16x8_t a) { return vget_high_p16(a); } -// CHECK-LABEL: define <1 x double> @test_vget_high_f64(<2 x double> %a) #0 { +// CHECK-LABEL: define frozen <1 x double> @test_vget_high_f64(<2 x double> frozen %a) #0 { // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <2 x double> %a, <2 x double> %a, <1 x i32> // CHECK: ret <1 x double> [[SHUFFLE_I]] float64x1_t test_vget_high_f64(float64x2_t a) { return vget_high_f64(a); } -// CHECK-LABEL: define <8 x i8> @test_vget_low_s8(<16 x i8> %a) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vget_low_s8(<16 x i8> frozen %a) #0 { // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <16 x i8> %a, <16 x i8> %a, <8 x i32> // CHECK: ret <8 x i8> [[SHUFFLE_I]] int8x8_t test_vget_low_s8(int8x16_t a) { return vget_low_s8(a); } -// CHECK-LABEL: define <4 x i16> @test_vget_low_s16(<8 x i16> %a) #0 { +// CHECK-LABEL: define frozen <4 x i16> @test_vget_low_s16(<8 x i16> frozen %a) #0 { // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <8 x i16> %a, <8 x i16> %a, <4 x i32> // CHECK: ret <4 x i16> [[SHUFFLE_I]] int16x4_t test_vget_low_s16(int16x8_t a) { return vget_low_s16(a); } -// CHECK-LABEL: define <2 x i32> @test_vget_low_s32(<4 x i32> %a) #0 { +// CHECK-LABEL: define frozen <2 x i32> @test_vget_low_s32(<4 x i32> frozen %a) #0 { // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <4 x i32> %a, <4 x i32> %a, <2 x i32> // CHECK: ret <2 x i32> [[SHUFFLE_I]] int32x2_t test_vget_low_s32(int32x4_t a) { return vget_low_s32(a); } -// CHECK-LABEL: define <1 x i64> @test_vget_low_s64(<2 x i64> %a) #0 { +// CHECK-LABEL: define frozen <1 x i64> @test_vget_low_s64(<2 x i64> frozen %a) #0 { // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <2 x i64> %a, <2 x i64> %a, <1 x i32> zeroinitializer // CHECK: ret <1 x i64> [[SHUFFLE_I]] int64x1_t test_vget_low_s64(int64x2_t a) { return vget_low_s64(a); } -// CHECK-LABEL: define <8 x i8> @test_vget_low_u8(<16 x i8> %a) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vget_low_u8(<16 x i8> frozen %a) #0 { // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <16 x i8> %a, <16 x i8> %a, <8 x i32> // CHECK: ret <8 x i8> [[SHUFFLE_I]] uint8x8_t test_vget_low_u8(uint8x16_t a) { return vget_low_u8(a); } -// CHECK-LABEL: define <4 x i16> @test_vget_low_u16(<8 x i16> %a) #0 { +// CHECK-LABEL: define frozen <4 x i16> @test_vget_low_u16(<8 x i16> frozen %a) #0 { // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <8 x i16> %a, <8 x i16> %a, <4 x i32> // CHECK: ret <4 x i16> [[SHUFFLE_I]] uint16x4_t test_vget_low_u16(uint16x8_t a) { return vget_low_u16(a); } -// CHECK-LABEL: define <2 x i32> @test_vget_low_u32(<4 x i32> %a) #0 { +// CHECK-LABEL: define frozen <2 x i32> @test_vget_low_u32(<4 x i32> frozen %a) #0 { // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <4 x i32> %a, <4 x i32> %a, <2 x i32> // CHECK: ret <2 x i32> [[SHUFFLE_I]] uint32x2_t test_vget_low_u32(uint32x4_t a) { return vget_low_u32(a); } -// CHECK-LABEL: define <1 x i64> @test_vget_low_u64(<2 x i64> %a) #0 { +// CHECK-LABEL: define frozen <1 x i64> @test_vget_low_u64(<2 x i64> frozen %a) #0 { // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <2 x i64> %a, <2 x i64> %a, <1 x i32> zeroinitializer // CHECK: ret <1 x i64> [[SHUFFLE_I]] uint64x1_t test_vget_low_u64(uint64x2_t a) { return vget_low_u64(a); } -// CHECK-LABEL: define <1 x i64> @test_vget_low_p64(<2 x i64> %a) #0 { +// CHECK-LABEL: define frozen <1 x i64> @test_vget_low_p64(<2 x i64> frozen %a) #0 { // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <2 x i64> %a, <2 x i64> %a, <1 x i32> zeroinitializer // CHECK: ret <1 x i64> [[SHUFFLE_I]] poly64x1_t test_vget_low_p64(poly64x2_t a) { return vget_low_p64(a); } -// CHECK-LABEL: define <4 x half> @test_vget_low_f16(<8 x half> %a) #0 { +// CHECK-LABEL: define frozen <4 x half> @test_vget_low_f16(<8 x half> frozen %a) #0 { // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <8 x half> %a, <8 x half> %a, <4 x i32> // CHECK: ret <4 x half> [[SHUFFLE_I]] float16x4_t test_vget_low_f16(float16x8_t a) { return vget_low_f16(a); } -// CHECK-LABEL: define <2 x float> @test_vget_low_f32(<4 x float> %a) #0 { +// CHECK-LABEL: define frozen <2 x float> @test_vget_low_f32(<4 x float> frozen %a) #0 { // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <4 x float> %a, <4 x float> %a, <2 x i32> // CHECK: ret <2 x float> [[SHUFFLE_I]] float32x2_t test_vget_low_f32(float32x4_t a) { return vget_low_f32(a); } -// CHECK-LABEL: define <8 x i8> @test_vget_low_p8(<16 x i8> %a) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vget_low_p8(<16 x i8> frozen %a) #0 { // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <16 x i8> %a, <16 x i8> %a, <8 x i32> // CHECK: ret <8 x i8> [[SHUFFLE_I]] poly8x8_t test_vget_low_p8(poly8x16_t a) { return vget_low_p8(a); } -// CHECK-LABEL: define <4 x i16> @test_vget_low_p16(<8 x i16> %a) #0 { +// CHECK-LABEL: define frozen <4 x i16> @test_vget_low_p16(<8 x i16> frozen %a) #0 { // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <8 x i16> %a, <8 x i16> %a, <4 x i32> // CHECK: ret <4 x i16> [[SHUFFLE_I]] poly16x4_t test_vget_low_p16(poly16x8_t a) { return vget_low_p16(a); } -// CHECK-LABEL: define <1 x double> @test_vget_low_f64(<2 x double> %a) #0 { +// CHECK-LABEL: define frozen <1 x double> @test_vget_low_f64(<2 x double> frozen %a) #0 { // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <2 x double> %a, <2 x double> %a, <1 x i32> zeroinitializer // CHECK: ret <1 x double> [[SHUFFLE_I]] float64x1_t test_vget_low_f64(float64x2_t a) { diff --git a/clang/test/CodeGen/aarch64-neon-vget.c b/clang/test/CodeGen/aarch64-neon-vget.c --- a/clang/test/CodeGen/aarch64-neon-vget.c +++ b/clang/test/CodeGen/aarch64-neon-vget.c @@ -4,70 +4,70 @@ #include -// CHECK-LABEL: define i8 @test_vget_lane_u8(<8 x i8> %a) #0 { +// CHECK-LABEL: define frozen i8 @test_vget_lane_u8(<8 x i8> frozen %a) #0 { // CHECK: [[VGET_LANE:%.*]] = extractelement <8 x i8> %a, i32 7 // CHECK: ret i8 [[VGET_LANE]] uint8_t test_vget_lane_u8(uint8x8_t a) { return vget_lane_u8(a, 7); } -// CHECK-LABEL: define i16 @test_vget_lane_u16(<4 x i16> %a) #0 { +// CHECK-LABEL: define frozen i16 @test_vget_lane_u16(<4 x i16> frozen %a) #0 { // CHECK: [[VGET_LANE:%.*]] = extractelement <4 x i16> %a, i32 3 // CHECK: ret i16 [[VGET_LANE]] uint16_t test_vget_lane_u16(uint16x4_t a) { return vget_lane_u16(a, 3); } -// CHECK-LABEL: define i32 @test_vget_lane_u32(<2 x i32> %a) #0 { +// CHECK-LABEL: define frozen i32 @test_vget_lane_u32(<2 x i32> frozen %a) #0 { // CHECK: [[VGET_LANE:%.*]] = extractelement <2 x i32> %a, i32 1 // CHECK: ret i32 [[VGET_LANE]] uint32_t test_vget_lane_u32(uint32x2_t a) { return vget_lane_u32(a, 1); } -// CHECK-LABEL: define i8 @test_vget_lane_s8(<8 x i8> %a) #0 { +// CHECK-LABEL: define frozen i8 @test_vget_lane_s8(<8 x i8> frozen %a) #0 { // CHECK: [[VGET_LANE:%.*]] = extractelement <8 x i8> %a, i32 7 // CHECK: ret i8 [[VGET_LANE]] int8_t test_vget_lane_s8(int8x8_t a) { return vget_lane_s8(a, 7); } -// CHECK-LABEL: define i16 @test_vget_lane_s16(<4 x i16> %a) #0 { +// CHECK-LABEL: define frozen i16 @test_vget_lane_s16(<4 x i16> frozen %a) #0 { // CHECK: [[VGET_LANE:%.*]] = extractelement <4 x i16> %a, i32 3 // CHECK: ret i16 [[VGET_LANE]] int16_t test_vget_lane_s16(int16x4_t a) { return vget_lane_s16(a, 3); } -// CHECK-LABEL: define i32 @test_vget_lane_s32(<2 x i32> %a) #0 { +// CHECK-LABEL: define frozen i32 @test_vget_lane_s32(<2 x i32> frozen %a) #0 { // CHECK: [[VGET_LANE:%.*]] = extractelement <2 x i32> %a, i32 1 // CHECK: ret i32 [[VGET_LANE]] int32_t test_vget_lane_s32(int32x2_t a) { return vget_lane_s32(a, 1); } -// CHECK-LABEL: define i8 @test_vget_lane_p8(<8 x i8> %a) #0 { +// CHECK-LABEL: define frozen i8 @test_vget_lane_p8(<8 x i8> frozen %a) #0 { // CHECK: [[VGET_LANE:%.*]] = extractelement <8 x i8> %a, i32 7 // CHECK: ret i8 [[VGET_LANE]] poly8_t test_vget_lane_p8(poly8x8_t a) { return vget_lane_p8(a, 7); } -// CHECK-LABEL: define i16 @test_vget_lane_p16(<4 x i16> %a) #0 { +// CHECK-LABEL: define frozen i16 @test_vget_lane_p16(<4 x i16> frozen %a) #0 { // CHECK: [[VGET_LANE:%.*]] = extractelement <4 x i16> %a, i32 3 // CHECK: ret i16 [[VGET_LANE]] poly16_t test_vget_lane_p16(poly16x4_t a) { return vget_lane_p16(a, 3); } -// CHECK-LABEL: define float @test_vget_lane_f32(<2 x float> %a) #0 { +// CHECK-LABEL: define frozen float @test_vget_lane_f32(<2 x float> frozen %a) #0 { // CHECK: [[VGET_LANE:%.*]] = extractelement <2 x float> %a, i32 1 // CHECK: ret float [[VGET_LANE]] float32_t test_vget_lane_f32(float32x2_t a) { return vget_lane_f32(a, 1); } -// CHECK-LABEL: define float @test_vget_lane_f16(<4 x half> %a) #0 { +// CHECK-LABEL: define frozen float @test_vget_lane_f16(<4 x half> frozen %a) #0 { // CHECK: [[__REINT_242:%.*]] = alloca <4 x half>, align 8 // CHECK: [[__REINT1_242:%.*]] = alloca i16, align 2 // CHECK: store <4 x half> %a, <4 x half>* [[__REINT_242]], align 8 @@ -83,70 +83,70 @@ return vget_lane_f16(a, 1); } -// CHECK-LABEL: define i8 @test_vgetq_lane_u8(<16 x i8> %a) #1 { +// CHECK-LABEL: define frozen i8 @test_vgetq_lane_u8(<16 x i8> frozen %a) #1 { // CHECK: [[VGETQ_LANE:%.*]] = extractelement <16 x i8> %a, i32 15 // CHECK: ret i8 [[VGETQ_LANE]] uint8_t test_vgetq_lane_u8(uint8x16_t a) { return vgetq_lane_u8(a, 15); } -// CHECK-LABEL: define i16 @test_vgetq_lane_u16(<8 x i16> %a) #1 { +// CHECK-LABEL: define frozen i16 @test_vgetq_lane_u16(<8 x i16> frozen %a) #1 { // CHECK: [[VGETQ_LANE:%.*]] = extractelement <8 x i16> %a, i32 7 // CHECK: ret i16 [[VGETQ_LANE]] uint16_t test_vgetq_lane_u16(uint16x8_t a) { return vgetq_lane_u16(a, 7); } -// CHECK-LABEL: define i32 @test_vgetq_lane_u32(<4 x i32> %a) #1 { +// CHECK-LABEL: define frozen i32 @test_vgetq_lane_u32(<4 x i32> frozen %a) #1 { // CHECK: [[VGETQ_LANE:%.*]] = extractelement <4 x i32> %a, i32 3 // CHECK: ret i32 [[VGETQ_LANE]] uint32_t test_vgetq_lane_u32(uint32x4_t a) { return vgetq_lane_u32(a, 3); } -// CHECK-LABEL: define i8 @test_vgetq_lane_s8(<16 x i8> %a) #1 { +// CHECK-LABEL: define frozen i8 @test_vgetq_lane_s8(<16 x i8> frozen %a) #1 { // CHECK: [[VGETQ_LANE:%.*]] = extractelement <16 x i8> %a, i32 15 // CHECK: ret i8 [[VGETQ_LANE]] int8_t test_vgetq_lane_s8(int8x16_t a) { return vgetq_lane_s8(a, 15); } -// CHECK-LABEL: define i16 @test_vgetq_lane_s16(<8 x i16> %a) #1 { +// CHECK-LABEL: define frozen i16 @test_vgetq_lane_s16(<8 x i16> frozen %a) #1 { // CHECK: [[VGETQ_LANE:%.*]] = extractelement <8 x i16> %a, i32 7 // CHECK: ret i16 [[VGETQ_LANE]] int16_t test_vgetq_lane_s16(int16x8_t a) { return vgetq_lane_s16(a, 7); } -// CHECK-LABEL: define i32 @test_vgetq_lane_s32(<4 x i32> %a) #1 { +// CHECK-LABEL: define frozen i32 @test_vgetq_lane_s32(<4 x i32> frozen %a) #1 { // CHECK: [[VGETQ_LANE:%.*]] = extractelement <4 x i32> %a, i32 3 // CHECK: ret i32 [[VGETQ_LANE]] int32_t test_vgetq_lane_s32(int32x4_t a) { return vgetq_lane_s32(a, 3); } -// CHECK-LABEL: define i8 @test_vgetq_lane_p8(<16 x i8> %a) #1 { +// CHECK-LABEL: define frozen i8 @test_vgetq_lane_p8(<16 x i8> frozen %a) #1 { // CHECK: [[VGETQ_LANE:%.*]] = extractelement <16 x i8> %a, i32 15 // CHECK: ret i8 [[VGETQ_LANE]] poly8_t test_vgetq_lane_p8(poly8x16_t a) { return vgetq_lane_p8(a, 15); } -// CHECK-LABEL: define i16 @test_vgetq_lane_p16(<8 x i16> %a) #1 { +// CHECK-LABEL: define frozen i16 @test_vgetq_lane_p16(<8 x i16> frozen %a) #1 { // CHECK: [[VGETQ_LANE:%.*]] = extractelement <8 x i16> %a, i32 7 // CHECK: ret i16 [[VGETQ_LANE]] poly16_t test_vgetq_lane_p16(poly16x8_t a) { return vgetq_lane_p16(a, 7); } -// CHECK-LABEL: define float @test_vgetq_lane_f32(<4 x float> %a) #1 { +// CHECK-LABEL: define frozen float @test_vgetq_lane_f32(<4 x float> frozen %a) #1 { // CHECK: [[VGETQ_LANE:%.*]] = extractelement <4 x float> %a, i32 3 // CHECK: ret float [[VGETQ_LANE]] float32_t test_vgetq_lane_f32(float32x4_t a) { return vgetq_lane_f32(a, 3); } -// CHECK-LABEL: define float @test_vgetq_lane_f16(<8 x half> %a) #1 { +// CHECK-LABEL: define frozen float @test_vgetq_lane_f16(<8 x half> frozen %a) #1 { // CHECK: [[__REINT_244:%.*]] = alloca <8 x half>, align 16 // CHECK: [[__REINT1_244:%.*]] = alloca i16, align 2 // CHECK: store <8 x half> %a, <8 x half>* [[__REINT_244]], align 16 @@ -162,28 +162,28 @@ return vgetq_lane_f16(a, 3); } -// CHECK-LABEL: define i64 @test_vget_lane_s64(<1 x i64> %a) #0 { +// CHECK-LABEL: define frozen i64 @test_vget_lane_s64(<1 x i64> frozen %a) #0 { // CHECK: [[VGET_LANE:%.*]] = extractelement <1 x i64> %a, i32 0 // CHECK: ret i64 [[VGET_LANE]] int64_t test_vget_lane_s64(int64x1_t a) { return vget_lane_s64(a, 0); } -// CHECK-LABEL: define i64 @test_vget_lane_u64(<1 x i64> %a) #0 { +// CHECK-LABEL: define frozen i64 @test_vget_lane_u64(<1 x i64> frozen %a) #0 { // CHECK: [[VGET_LANE:%.*]] = extractelement <1 x i64> %a, i32 0 // CHECK: ret i64 [[VGET_LANE]] uint64_t test_vget_lane_u64(uint64x1_t a) { return vget_lane_u64(a, 0); } -// CHECK-LABEL: define i64 @test_vgetq_lane_s64(<2 x i64> %a) #1 { +// CHECK-LABEL: define frozen i64 @test_vgetq_lane_s64(<2 x i64> frozen %a) #1 { // CHECK: [[VGETQ_LANE:%.*]] = extractelement <2 x i64> %a, i32 1 // CHECK: ret i64 [[VGETQ_LANE]] int64_t test_vgetq_lane_s64(int64x2_t a) { return vgetq_lane_s64(a, 1); } -// CHECK-LABEL: define i64 @test_vgetq_lane_u64(<2 x i64> %a) #1 { +// CHECK-LABEL: define frozen i64 @test_vgetq_lane_u64(<2 x i64> frozen %a) #1 { // CHECK: [[VGETQ_LANE:%.*]] = extractelement <2 x i64> %a, i32 1 // CHECK: ret i64 [[VGETQ_LANE]] uint64_t test_vgetq_lane_u64(uint64x2_t a) { @@ -191,70 +191,70 @@ } -// CHECK-LABEL: define <8 x i8> @test_vset_lane_u8(i8 %a, <8 x i8> %b) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vset_lane_u8(i8 frozen %a, <8 x i8> frozen %b) #0 { // CHECK: [[VSET_LANE:%.*]] = insertelement <8 x i8> %b, i8 %a, i32 7 // CHECK: ret <8 x i8> [[VSET_LANE]] uint8x8_t test_vset_lane_u8(uint8_t a, uint8x8_t b) { return vset_lane_u8(a, b, 7); } -// CHECK-LABEL: define <4 x i16> @test_vset_lane_u16(i16 %a, <4 x i16> %b) #0 { +// CHECK-LABEL: define frozen <4 x i16> @test_vset_lane_u16(i16 frozen %a, <4 x i16> frozen %b) #0 { // CHECK: [[VSET_LANE:%.*]] = insertelement <4 x i16> %b, i16 %a, i32 3 // CHECK: ret <4 x i16> [[VSET_LANE]] uint16x4_t test_vset_lane_u16(uint16_t a, uint16x4_t b) { return vset_lane_u16(a, b, 3); } -// CHECK-LABEL: define <2 x i32> @test_vset_lane_u32(i32 %a, <2 x i32> %b) #0 { +// CHECK-LABEL: define frozen <2 x i32> @test_vset_lane_u32(i32 frozen %a, <2 x i32> frozen %b) #0 { // CHECK: [[VSET_LANE:%.*]] = insertelement <2 x i32> %b, i32 %a, i32 1 // CHECK: ret <2 x i32> [[VSET_LANE]] uint32x2_t test_vset_lane_u32(uint32_t a, uint32x2_t b) { return vset_lane_u32(a, b, 1); } -// CHECK-LABEL: define <8 x i8> @test_vset_lane_s8(i8 %a, <8 x i8> %b) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vset_lane_s8(i8 frozen %a, <8 x i8> frozen %b) #0 { // CHECK: [[VSET_LANE:%.*]] = insertelement <8 x i8> %b, i8 %a, i32 7 // CHECK: ret <8 x i8> [[VSET_LANE]] int8x8_t test_vset_lane_s8(int8_t a, int8x8_t b) { return vset_lane_s8(a, b, 7); } -// CHECK-LABEL: define <4 x i16> @test_vset_lane_s16(i16 %a, <4 x i16> %b) #0 { +// CHECK-LABEL: define frozen <4 x i16> @test_vset_lane_s16(i16 frozen %a, <4 x i16> frozen %b) #0 { // CHECK: [[VSET_LANE:%.*]] = insertelement <4 x i16> %b, i16 %a, i32 3 // CHECK: ret <4 x i16> [[VSET_LANE]] int16x4_t test_vset_lane_s16(int16_t a, int16x4_t b) { return vset_lane_s16(a, b, 3); } -// CHECK-LABEL: define <2 x i32> @test_vset_lane_s32(i32 %a, <2 x i32> %b) #0 { +// CHECK-LABEL: define frozen <2 x i32> @test_vset_lane_s32(i32 frozen %a, <2 x i32> frozen %b) #0 { // CHECK: [[VSET_LANE:%.*]] = insertelement <2 x i32> %b, i32 %a, i32 1 // CHECK: ret <2 x i32> [[VSET_LANE]] int32x2_t test_vset_lane_s32(int32_t a, int32x2_t b) { return vset_lane_s32(a, b, 1); } -// CHECK-LABEL: define <8 x i8> @test_vset_lane_p8(i8 %a, <8 x i8> %b) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vset_lane_p8(i8 frozen %a, <8 x i8> frozen %b) #0 { // CHECK: [[VSET_LANE:%.*]] = insertelement <8 x i8> %b, i8 %a, i32 7 // CHECK: ret <8 x i8> [[VSET_LANE]] poly8x8_t test_vset_lane_p8(poly8_t a, poly8x8_t b) { return vset_lane_p8(a, b, 7); } -// CHECK-LABEL: define <4 x i16> @test_vset_lane_p16(i16 %a, <4 x i16> %b) #0 { +// CHECK-LABEL: define frozen <4 x i16> @test_vset_lane_p16(i16 frozen %a, <4 x i16> frozen %b) #0 { // CHECK: [[VSET_LANE:%.*]] = insertelement <4 x i16> %b, i16 %a, i32 3 // CHECK: ret <4 x i16> [[VSET_LANE]] poly16x4_t test_vset_lane_p16(poly16_t a, poly16x4_t b) { return vset_lane_p16(a, b, 3); } -// CHECK-LABEL: define <2 x float> @test_vset_lane_f32(float %a, <2 x float> %b) #0 { +// CHECK-LABEL: define frozen <2 x float> @test_vset_lane_f32(float frozen %a, <2 x float> frozen %b) #0 { // CHECK: [[VSET_LANE:%.*]] = insertelement <2 x float> %b, float %a, i32 1 // CHECK: ret <2 x float> [[VSET_LANE]] float32x2_t test_vset_lane_f32(float32_t a, float32x2_t b) { return vset_lane_f32(a, b, 1); } -// CHECK-LABEL: define <4 x half> @test_vset_lane_f16(half* %a, <4 x half> %b) #0 { +// CHECK-LABEL: define frozen <4 x half> @test_vset_lane_f16(half* frozen %a, <4 x half> frozen %b) #0 { // CHECK: [[__REINT_246:%.*]] = alloca half, align 2 // CHECK: [[__REINT1_246:%.*]] = alloca <4 x half>, align 8 // CHECK: [[__REINT2_246:%.*]] = alloca <4 x i16>, align 8 @@ -274,70 +274,70 @@ return vset_lane_f16(*a, b, 3); } -// CHECK-LABEL: define <16 x i8> @test_vsetq_lane_u8(i8 %a, <16 x i8> %b) #1 { +// CHECK-LABEL: define frozen <16 x i8> @test_vsetq_lane_u8(i8 frozen %a, <16 x i8> frozen %b) #1 { // CHECK: [[VSET_LANE:%.*]] = insertelement <16 x i8> %b, i8 %a, i32 15 // CHECK: ret <16 x i8> [[VSET_LANE]] uint8x16_t test_vsetq_lane_u8(uint8_t a, uint8x16_t b) { return vsetq_lane_u8(a, b, 15); } -// CHECK-LABEL: define <8 x i16> @test_vsetq_lane_u16(i16 %a, <8 x i16> %b) #1 { +// CHECK-LABEL: define frozen <8 x i16> @test_vsetq_lane_u16(i16 frozen %a, <8 x i16> frozen %b) #1 { // CHECK: [[VSET_LANE:%.*]] = insertelement <8 x i16> %b, i16 %a, i32 7 // CHECK: ret <8 x i16> [[VSET_LANE]] uint16x8_t test_vsetq_lane_u16(uint16_t a, uint16x8_t b) { return vsetq_lane_u16(a, b, 7); } -// CHECK-LABEL: define <4 x i32> @test_vsetq_lane_u32(i32 %a, <4 x i32> %b) #1 { +// CHECK-LABEL: define frozen <4 x i32> @test_vsetq_lane_u32(i32 frozen %a, <4 x i32> frozen %b) #1 { // CHECK: [[VSET_LANE:%.*]] = insertelement <4 x i32> %b, i32 %a, i32 3 // CHECK: ret <4 x i32> [[VSET_LANE]] uint32x4_t test_vsetq_lane_u32(uint32_t a, uint32x4_t b) { return vsetq_lane_u32(a, b, 3); } -// CHECK-LABEL: define <16 x i8> @test_vsetq_lane_s8(i8 %a, <16 x i8> %b) #1 { +// CHECK-LABEL: define frozen <16 x i8> @test_vsetq_lane_s8(i8 frozen %a, <16 x i8> frozen %b) #1 { // CHECK: [[VSET_LANE:%.*]] = insertelement <16 x i8> %b, i8 %a, i32 15 // CHECK: ret <16 x i8> [[VSET_LANE]] int8x16_t test_vsetq_lane_s8(int8_t a, int8x16_t b) { return vsetq_lane_s8(a, b, 15); } -// CHECK-LABEL: define <8 x i16> @test_vsetq_lane_s16(i16 %a, <8 x i16> %b) #1 { +// CHECK-LABEL: define frozen <8 x i16> @test_vsetq_lane_s16(i16 frozen %a, <8 x i16> frozen %b) #1 { // CHECK: [[VSET_LANE:%.*]] = insertelement <8 x i16> %b, i16 %a, i32 7 // CHECK: ret <8 x i16> [[VSET_LANE]] int16x8_t test_vsetq_lane_s16(int16_t a, int16x8_t b) { return vsetq_lane_s16(a, b, 7); } -// CHECK-LABEL: define <4 x i32> @test_vsetq_lane_s32(i32 %a, <4 x i32> %b) #1 { +// CHECK-LABEL: define frozen <4 x i32> @test_vsetq_lane_s32(i32 frozen %a, <4 x i32> frozen %b) #1 { // CHECK: [[VSET_LANE:%.*]] = insertelement <4 x i32> %b, i32 %a, i32 3 // CHECK: ret <4 x i32> [[VSET_LANE]] int32x4_t test_vsetq_lane_s32(int32_t a, int32x4_t b) { return vsetq_lane_s32(a, b, 3); } -// CHECK-LABEL: define <16 x i8> @test_vsetq_lane_p8(i8 %a, <16 x i8> %b) #1 { +// CHECK-LABEL: define frozen <16 x i8> @test_vsetq_lane_p8(i8 frozen %a, <16 x i8> frozen %b) #1 { // CHECK: [[VSET_LANE:%.*]] = insertelement <16 x i8> %b, i8 %a, i32 15 // CHECK: ret <16 x i8> [[VSET_LANE]] poly8x16_t test_vsetq_lane_p8(poly8_t a, poly8x16_t b) { return vsetq_lane_p8(a, b, 15); } -// CHECK-LABEL: define <8 x i16> @test_vsetq_lane_p16(i16 %a, <8 x i16> %b) #1 { +// CHECK-LABEL: define frozen <8 x i16> @test_vsetq_lane_p16(i16 frozen %a, <8 x i16> frozen %b) #1 { // CHECK: [[VSET_LANE:%.*]] = insertelement <8 x i16> %b, i16 %a, i32 7 // CHECK: ret <8 x i16> [[VSET_LANE]] poly16x8_t test_vsetq_lane_p16(poly16_t a, poly16x8_t b) { return vsetq_lane_p16(a, b, 7); } -// CHECK-LABEL: define <4 x float> @test_vsetq_lane_f32(float %a, <4 x float> %b) #1 { +// CHECK-LABEL: define frozen <4 x float> @test_vsetq_lane_f32(float frozen %a, <4 x float> frozen %b) #1 { // CHECK: [[VSET_LANE:%.*]] = insertelement <4 x float> %b, float %a, i32 3 // CHECK: ret <4 x float> [[VSET_LANE]] float32x4_t test_vsetq_lane_f32(float32_t a, float32x4_t b) { return vsetq_lane_f32(a, b, 3); } -// CHECK-LABEL: define <8 x half> @test_vsetq_lane_f16(half* %a, <8 x half> %b) #1 { +// CHECK-LABEL: define frozen <8 x half> @test_vsetq_lane_f16(half* frozen %a, <8 x half> frozen %b) #1 { // CHECK: [[__REINT_248:%.*]] = alloca half, align 2 // CHECK: [[__REINT1_248:%.*]] = alloca <8 x half>, align 16 // CHECK: [[__REINT2_248:%.*]] = alloca <8 x i16>, align 16 @@ -357,28 +357,28 @@ return vsetq_lane_f16(*a, b, 7); } -// CHECK-LABEL: define <1 x i64> @test_vset_lane_s64(i64 %a, <1 x i64> %b) #0 { +// CHECK-LABEL: define frozen <1 x i64> @test_vset_lane_s64(i64 frozen %a, <1 x i64> frozen %b) #0 { // CHECK: [[VSET_LANE:%.*]] = insertelement <1 x i64> %b, i64 %a, i32 0 // CHECK: ret <1 x i64> [[VSET_LANE]] int64x1_t test_vset_lane_s64(int64_t a, int64x1_t b) { return vset_lane_s64(a, b, 0); } -// CHECK-LABEL: define <1 x i64> @test_vset_lane_u64(i64 %a, <1 x i64> %b) #0 { +// CHECK-LABEL: define frozen <1 x i64> @test_vset_lane_u64(i64 frozen %a, <1 x i64> frozen %b) #0 { // CHECK: [[VSET_LANE:%.*]] = insertelement <1 x i64> %b, i64 %a, i32 0 // CHECK: ret <1 x i64> [[VSET_LANE]] uint64x1_t test_vset_lane_u64(uint64_t a, uint64x1_t b) { return vset_lane_u64(a, b, 0); } -// CHECK-LABEL: define <2 x i64> @test_vsetq_lane_s64(i64 %a, <2 x i64> %b) #1 { +// CHECK-LABEL: define frozen <2 x i64> @test_vsetq_lane_s64(i64 frozen %a, <2 x i64> frozen %b) #1 { // CHECK: [[VSET_LANE:%.*]] = insertelement <2 x i64> %b, i64 %a, i32 1 // CHECK: ret <2 x i64> [[VSET_LANE]] int64x2_t test_vsetq_lane_s64(int64_t a, int64x2_t b) { return vsetq_lane_s64(a, b, 1); } -// CHECK-LABEL: define <2 x i64> @test_vsetq_lane_u64(i64 %a, <2 x i64> %b) #1 { +// CHECK-LABEL: define frozen <2 x i64> @test_vsetq_lane_u64(i64 frozen %a, <2 x i64> frozen %b) #1 { // CHECK: [[VSET_LANE:%.*]] = insertelement <2 x i64> %b, i64 %a, i32 1 // CHECK: ret <2 x i64> [[VSET_LANE]] uint64x2_t test_vsetq_lane_u64(uint64_t a, uint64x2_t b) { diff --git a/clang/test/CodeGen/aarch64-poly128.c b/clang/test/CodeGen/aarch64-poly128.c --- a/clang/test/CodeGen/aarch64-poly128.c +++ b/clang/test/CodeGen/aarch64-poly128.c @@ -12,7 +12,7 @@ #include -// CHECK-LABEL: define void @test_vstrq_p128(i128* %ptr, i128 %val) #0 { +// CHECK-LABEL: define void @test_vstrq_p128(i128* frozen %ptr, i128 frozen %val) #0 { // CHECK: [[TMP0:%.*]] = bitcast i128* %ptr to i8* // CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i128* // CHECK: store i128 %val, i128* [[TMP1]] @@ -22,7 +22,7 @@ } -// CHECK-LABEL: define i128 @test_vldrq_p128(i128* %ptr) #0 { +// CHECK-LABEL: define frozen i128 @test_vldrq_p128(i128* frozen %ptr) #0 { // CHECK: [[TMP0:%.*]] = bitcast i128* %ptr to i8* // CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i128* // CHECK: [[TMP2:%.*]] = load i128, i128* [[TMP1]] @@ -32,7 +32,7 @@ } -// CHECK-LABEL: define void @test_ld_st_p128(i128* %ptr) #0 { +// CHECK-LABEL: define void @test_ld_st_p128(i128* frozen %ptr) #0 { // CHECK: [[TMP0:%.*]] = bitcast i128* %ptr to i8* // CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i128* // CHECK: [[TMP2:%.*]] = load i128, i128* [[TMP1]] @@ -46,7 +46,7 @@ } -// CHECK-LABEL: define i128 @test_vmull_p64(i64 %a, i64 %b) #0 { +// CHECK-LABEL: define frozen i128 @test_vmull_p64(i64 frozen %a, i64 frozen %b) #0 { // CHECK: [[VMULL_P64_I:%.*]] = call <16 x i8> @llvm.aarch64.neon.pmull64(i64 %a, i64 %b) #3 // CHECK: [[VMULL_P641_I:%.*]] = bitcast <16 x i8> [[VMULL_P64_I]] to i128 // CHECK: ret i128 [[VMULL_P641_I]] @@ -54,7 +54,7 @@ return vmull_p64(a, b); } -// CHECK-LABEL: define i128 @test_vmull_high_p64(<2 x i64> %a, <2 x i64> %b) #1 { +// CHECK-LABEL: define frozen i128 @test_vmull_high_p64(<2 x i64> frozen %a, <2 x i64> frozen %b) #1 { // CHECK: [[SHUFFLE_I_I:%.*]] = shufflevector <2 x i64> %a, <2 x i64> %a, <1 x i32> // CHECK: [[TMP0:%.*]] = bitcast <1 x i64> [[SHUFFLE_I_I]] to i64 // CHECK: [[SHUFFLE_I7_I:%.*]] = shufflevector <2 x i64> %b, <2 x i64> %b, <1 x i32> @@ -66,182 +66,182 @@ return vmull_high_p64(a, b); } -// CHECK-LABEL: define i128 @test_vreinterpretq_p128_s8(<16 x i8> %a) #1 { +// CHECK-LABEL: define frozen i128 @test_vreinterpretq_p128_s8(<16 x i8> frozen %a) #1 { // CHECK: [[TMP0:%.*]] = bitcast <16 x i8> %a to i128 // CHECK: ret i128 [[TMP0]] poly128_t test_vreinterpretq_p128_s8(int8x16_t a) { return vreinterpretq_p128_s8(a); } -// CHECK-LABEL: define i128 @test_vreinterpretq_p128_s16(<8 x i16> %a) #1 { +// CHECK-LABEL: define frozen i128 @test_vreinterpretq_p128_s16(<8 x i16> frozen %a) #1 { // CHECK: [[TMP0:%.*]] = bitcast <8 x i16> %a to i128 // CHECK: ret i128 [[TMP0]] poly128_t test_vreinterpretq_p128_s16(int16x8_t a) { return vreinterpretq_p128_s16(a); } -// CHECK-LABEL: define i128 @test_vreinterpretq_p128_s32(<4 x i32> %a) #1 { +// CHECK-LABEL: define frozen i128 @test_vreinterpretq_p128_s32(<4 x i32> frozen %a) #1 { // CHECK: [[TMP0:%.*]] = bitcast <4 x i32> %a to i128 // CHECK: ret i128 [[TMP0]] poly128_t test_vreinterpretq_p128_s32(int32x4_t a) { return vreinterpretq_p128_s32(a); } -// CHECK-LABEL: define i128 @test_vreinterpretq_p128_s64(<2 x i64> %a) #1 { +// CHECK-LABEL: define frozen i128 @test_vreinterpretq_p128_s64(<2 x i64> frozen %a) #1 { // CHECK: [[TMP0:%.*]] = bitcast <2 x i64> %a to i128 // CHECK: ret i128 [[TMP0]] poly128_t test_vreinterpretq_p128_s64(int64x2_t a) { return vreinterpretq_p128_s64(a); } -// CHECK-LABEL: define i128 @test_vreinterpretq_p128_u8(<16 x i8> %a) #1 { +// CHECK-LABEL: define frozen i128 @test_vreinterpretq_p128_u8(<16 x i8> frozen %a) #1 { // CHECK: [[TMP0:%.*]] = bitcast <16 x i8> %a to i128 // CHECK: ret i128 [[TMP0]] poly128_t test_vreinterpretq_p128_u8(uint8x16_t a) { return vreinterpretq_p128_u8(a); } -// CHECK-LABEL: define i128 @test_vreinterpretq_p128_u16(<8 x i16> %a) #1 { +// CHECK-LABEL: define frozen i128 @test_vreinterpretq_p128_u16(<8 x i16> frozen %a) #1 { // CHECK: [[TMP0:%.*]] = bitcast <8 x i16> %a to i128 // CHECK: ret i128 [[TMP0]] poly128_t test_vreinterpretq_p128_u16(uint16x8_t a) { return vreinterpretq_p128_u16(a); } -// CHECK-LABEL: define i128 @test_vreinterpretq_p128_u32(<4 x i32> %a) #1 { +// CHECK-LABEL: define frozen i128 @test_vreinterpretq_p128_u32(<4 x i32> frozen %a) #1 { // CHECK: [[TMP0:%.*]] = bitcast <4 x i32> %a to i128 // CHECK: ret i128 [[TMP0]] poly128_t test_vreinterpretq_p128_u32(uint32x4_t a) { return vreinterpretq_p128_u32(a); } -// CHECK-LABEL: define i128 @test_vreinterpretq_p128_u64(<2 x i64> %a) #1 { +// CHECK-LABEL: define frozen i128 @test_vreinterpretq_p128_u64(<2 x i64> frozen %a) #1 { // CHECK: [[TMP0:%.*]] = bitcast <2 x i64> %a to i128 // CHECK: ret i128 [[TMP0]] poly128_t test_vreinterpretq_p128_u64(uint64x2_t a) { return vreinterpretq_p128_u64(a); } -// CHECK-LABEL: define i128 @test_vreinterpretq_p128_f32(<4 x float> %a) #1 { +// CHECK-LABEL: define frozen i128 @test_vreinterpretq_p128_f32(<4 x float> frozen %a) #1 { // CHECK: [[TMP0:%.*]] = bitcast <4 x float> %a to i128 // CHECK: ret i128 [[TMP0]] poly128_t test_vreinterpretq_p128_f32(float32x4_t a) { return vreinterpretq_p128_f32(a); } -// CHECK-LABEL: define i128 @test_vreinterpretq_p128_f64(<2 x double> %a) #1 { +// CHECK-LABEL: define frozen i128 @test_vreinterpretq_p128_f64(<2 x double> frozen %a) #1 { // CHECK: [[TMP0:%.*]] = bitcast <2 x double> %a to i128 // CHECK: ret i128 [[TMP0]] poly128_t test_vreinterpretq_p128_f64(float64x2_t a) { return vreinterpretq_p128_f64(a); } -// CHECK-LABEL: define i128 @test_vreinterpretq_p128_p8(<16 x i8> %a) #1 { +// CHECK-LABEL: define frozen i128 @test_vreinterpretq_p128_p8(<16 x i8> frozen %a) #1 { // CHECK: [[TMP0:%.*]] = bitcast <16 x i8> %a to i128 // CHECK: ret i128 [[TMP0]] poly128_t test_vreinterpretq_p128_p8(poly8x16_t a) { return vreinterpretq_p128_p8(a); } -// CHECK-LABEL: define i128 @test_vreinterpretq_p128_p16(<8 x i16> %a) #1 { +// CHECK-LABEL: define frozen i128 @test_vreinterpretq_p128_p16(<8 x i16> frozen %a) #1 { // CHECK: [[TMP0:%.*]] = bitcast <8 x i16> %a to i128 // CHECK: ret i128 [[TMP0]] poly128_t test_vreinterpretq_p128_p16(poly16x8_t a) { return vreinterpretq_p128_p16(a); } -// CHECK-LABEL: define i128 @test_vreinterpretq_p128_p64(<2 x i64> %a) #1 { +// CHECK-LABEL: define frozen i128 @test_vreinterpretq_p128_p64(<2 x i64> frozen %a) #1 { // CHECK: [[TMP0:%.*]] = bitcast <2 x i64> %a to i128 // CHECK: ret i128 [[TMP0]] poly128_t test_vreinterpretq_p128_p64(poly64x2_t a) { return vreinterpretq_p128_p64(a); } -// CHECK-LABEL: define <16 x i8> @test_vreinterpretq_s8_p128(i128 %a) #1 { +// CHECK-LABEL: define frozen <16 x i8> @test_vreinterpretq_s8_p128(i128 frozen %a) #1 { // CHECK: [[TMP0:%.*]] = bitcast i128 %a to <16 x i8> // CHECK: ret <16 x i8> [[TMP0]] int8x16_t test_vreinterpretq_s8_p128(poly128_t a) { return vreinterpretq_s8_p128(a); } -// CHECK-LABEL: define <8 x i16> @test_vreinterpretq_s16_p128(i128 %a) #1 { +// CHECK-LABEL: define frozen <8 x i16> @test_vreinterpretq_s16_p128(i128 frozen %a) #1 { // CHECK: [[TMP0:%.*]] = bitcast i128 %a to <8 x i16> // CHECK: ret <8 x i16> [[TMP0]] int16x8_t test_vreinterpretq_s16_p128(poly128_t a) { return vreinterpretq_s16_p128(a); } -// CHECK-LABEL: define <4 x i32> @test_vreinterpretq_s32_p128(i128 %a) #1 { +// CHECK-LABEL: define frozen <4 x i32> @test_vreinterpretq_s32_p128(i128 frozen %a) #1 { // CHECK: [[TMP0:%.*]] = bitcast i128 %a to <4 x i32> // CHECK: ret <4 x i32> [[TMP0]] int32x4_t test_vreinterpretq_s32_p128(poly128_t a) { return vreinterpretq_s32_p128(a); } -// CHECK-LABEL: define <2 x i64> @test_vreinterpretq_s64_p128(i128 %a) #1 { +// CHECK-LABEL: define frozen <2 x i64> @test_vreinterpretq_s64_p128(i128 frozen %a) #1 { // CHECK: [[TMP0:%.*]] = bitcast i128 %a to <2 x i64> // CHECK: ret <2 x i64> [[TMP0]] int64x2_t test_vreinterpretq_s64_p128(poly128_t a) { return vreinterpretq_s64_p128(a); } -// CHECK-LABEL: define <16 x i8> @test_vreinterpretq_u8_p128(i128 %a) #1 { +// CHECK-LABEL: define frozen <16 x i8> @test_vreinterpretq_u8_p128(i128 frozen %a) #1 { // CHECK: [[TMP0:%.*]] = bitcast i128 %a to <16 x i8> // CHECK: ret <16 x i8> [[TMP0]] uint8x16_t test_vreinterpretq_u8_p128(poly128_t a) { return vreinterpretq_u8_p128(a); } -// CHECK-LABEL: define <8 x i16> @test_vreinterpretq_u16_p128(i128 %a) #1 { +// CHECK-LABEL: define frozen <8 x i16> @test_vreinterpretq_u16_p128(i128 frozen %a) #1 { // CHECK: [[TMP0:%.*]] = bitcast i128 %a to <8 x i16> // CHECK: ret <8 x i16> [[TMP0]] uint16x8_t test_vreinterpretq_u16_p128(poly128_t a) { return vreinterpretq_u16_p128(a); } -// CHECK-LABEL: define <4 x i32> @test_vreinterpretq_u32_p128(i128 %a) #1 { +// CHECK-LABEL: define frozen <4 x i32> @test_vreinterpretq_u32_p128(i128 frozen %a) #1 { // CHECK: [[TMP0:%.*]] = bitcast i128 %a to <4 x i32> // CHECK: ret <4 x i32> [[TMP0]] uint32x4_t test_vreinterpretq_u32_p128(poly128_t a) { return vreinterpretq_u32_p128(a); } -// CHECK-LABEL: define <2 x i64> @test_vreinterpretq_u64_p128(i128 %a) #1 { +// CHECK-LABEL: define frozen <2 x i64> @test_vreinterpretq_u64_p128(i128 frozen %a) #1 { // CHECK: [[TMP0:%.*]] = bitcast i128 %a to <2 x i64> // CHECK: ret <2 x i64> [[TMP0]] uint64x2_t test_vreinterpretq_u64_p128(poly128_t a) { return vreinterpretq_u64_p128(a); } -// CHECK-LABEL: define <4 x float> @test_vreinterpretq_f32_p128(i128 %a) #1 { +// CHECK-LABEL: define frozen <4 x float> @test_vreinterpretq_f32_p128(i128 frozen %a) #1 { // CHECK: [[TMP0:%.*]] = bitcast i128 %a to <4 x float> // CHECK: ret <4 x float> [[TMP0]] float32x4_t test_vreinterpretq_f32_p128(poly128_t a) { return vreinterpretq_f32_p128(a); } -// CHECK-LABEL: define <2 x double> @test_vreinterpretq_f64_p128(i128 %a) #1 { +// CHECK-LABEL: define frozen <2 x double> @test_vreinterpretq_f64_p128(i128 frozen %a) #1 { // CHECK: [[TMP0:%.*]] = bitcast i128 %a to <2 x double> // CHECK: ret <2 x double> [[TMP0]] float64x2_t test_vreinterpretq_f64_p128(poly128_t a) { return vreinterpretq_f64_p128(a); } -// CHECK-LABEL: define <16 x i8> @test_vreinterpretq_p8_p128(i128 %a) #1 { +// CHECK-LABEL: define frozen <16 x i8> @test_vreinterpretq_p8_p128(i128 frozen %a) #1 { // CHECK: [[TMP0:%.*]] = bitcast i128 %a to <16 x i8> // CHECK: ret <16 x i8> [[TMP0]] poly8x16_t test_vreinterpretq_p8_p128(poly128_t a) { return vreinterpretq_p8_p128(a); } -// CHECK-LABEL: define <8 x i16> @test_vreinterpretq_p16_p128(i128 %a) #1 { +// CHECK-LABEL: define frozen <8 x i16> @test_vreinterpretq_p16_p128(i128 frozen %a) #1 { // CHECK: [[TMP0:%.*]] = bitcast i128 %a to <8 x i16> // CHECK: ret <8 x i16> [[TMP0]] poly16x8_t test_vreinterpretq_p16_p128(poly128_t a) { return vreinterpretq_p16_p128(a); } -// CHECK-LABEL: define <2 x i64> @test_vreinterpretq_p64_p128(i128 %a) #1 { +// CHECK-LABEL: define frozen <2 x i64> @test_vreinterpretq_p64_p128(i128 frozen %a) #1 { // CHECK: [[TMP0:%.*]] = bitcast i128 %a to <2 x i64> // CHECK: ret <2 x i64> [[TMP0]] poly64x2_t test_vreinterpretq_p64_p128(poly128_t a) { diff --git a/clang/test/CodeGen/aarch64-poly64.c b/clang/test/CodeGen/aarch64-poly64.c --- a/clang/test/CodeGen/aarch64-poly64.c +++ b/clang/test/CodeGen/aarch64-poly64.c @@ -6,7 +6,7 @@ #include -// CHECK-LABEL: define <1 x i64> @test_vceq_p64(<1 x i64> %a, <1 x i64> %b) #0 { +// CHECK-LABEL: define frozen <1 x i64> @test_vceq_p64(<1 x i64> frozen %a, <1 x i64> frozen %b) #0 { // CHECK: [[CMP_I:%.*]] = icmp eq <1 x i64> %a, %b // CHECK: [[SEXT_I:%.*]] = sext <1 x i1> [[CMP_I]] to <1 x i64> // CHECK: ret <1 x i64> [[SEXT_I]] @@ -14,7 +14,7 @@ return vceq_p64(a, b); } -// CHECK-LABEL: define <2 x i64> @test_vceqq_p64(<2 x i64> %a, <2 x i64> %b) #1 { +// CHECK-LABEL: define frozen <2 x i64> @test_vceqq_p64(<2 x i64> frozen %a, <2 x i64> frozen %b) #1 { // CHECK: [[CMP_I:%.*]] = icmp eq <2 x i64> %a, %b // CHECK: [[SEXT_I:%.*]] = sext <2 x i1> [[CMP_I]] to <2 x i64> // CHECK: ret <2 x i64> [[SEXT_I]] @@ -22,7 +22,7 @@ return vceqq_p64(a, b); } -// CHECK-LABEL: define <1 x i64> @test_vtst_p64(<1 x i64> %a, <1 x i64> %b) #0 { +// CHECK-LABEL: define frozen <1 x i64> @test_vtst_p64(<1 x i64> frozen %a, <1 x i64> frozen %b) #0 { // CHECK: [[TMP4:%.*]] = and <1 x i64> %a, %b // CHECK: [[TMP5:%.*]] = icmp ne <1 x i64> [[TMP4]], zeroinitializer // CHECK: [[VTST_I:%.*]] = sext <1 x i1> [[TMP5]] to <1 x i64> @@ -31,7 +31,7 @@ return vtst_p64(a, b); } -// CHECK-LABEL: define <2 x i64> @test_vtstq_p64(<2 x i64> %a, <2 x i64> %b) #1 { +// CHECK-LABEL: define frozen <2 x i64> @test_vtstq_p64(<2 x i64> frozen %a, <2 x i64> frozen %b) #1 { // CHECK: [[TMP4:%.*]] = and <2 x i64> %a, %b // CHECK: [[TMP5:%.*]] = icmp ne <2 x i64> [[TMP4]], zeroinitializer // CHECK: [[VTST_I:%.*]] = sext <2 x i1> [[TMP5]] to <2 x i64> @@ -40,7 +40,7 @@ return vtstq_p64(a, b); } -// CHECK-LABEL: define <1 x i64> @test_vbsl_p64(<1 x i64> %a, <1 x i64> %b, <1 x i64> %c) #0 { +// CHECK-LABEL: define frozen <1 x i64> @test_vbsl_p64(<1 x i64> frozen %a, <1 x i64> frozen %b, <1 x i64> frozen %c) #0 { // CHECK: [[VBSL3_I:%.*]] = and <1 x i64> %a, %b // CHECK: [[TMP3:%.*]] = xor <1 x i64> %a, // CHECK: [[VBSL4_I:%.*]] = and <1 x i64> [[TMP3]], %c @@ -50,7 +50,7 @@ return vbsl_p64(a, b, c); } -// CHECK-LABEL: define <2 x i64> @test_vbslq_p64(<2 x i64> %a, <2 x i64> %b, <2 x i64> %c) #1 { +// CHECK-LABEL: define frozen <2 x i64> @test_vbslq_p64(<2 x i64> frozen %a, <2 x i64> frozen %b, <2 x i64> frozen %c) #1 { // CHECK: [[VBSL3_I:%.*]] = and <2 x i64> %a, %b // CHECK: [[TMP3:%.*]] = xor <2 x i64> %a, // CHECK: [[VBSL4_I:%.*]] = and <2 x i64> [[TMP3]], %c @@ -60,35 +60,35 @@ return vbslq_p64(a, b, c); } -// CHECK-LABEL: define i64 @test_vget_lane_p64(<1 x i64> %v) #0 { +// CHECK-LABEL: define frozen i64 @test_vget_lane_p64(<1 x i64> frozen %v) #0 { // CHECK: [[VGET_LANE:%.*]] = extractelement <1 x i64> %v, i32 0 // CHECK: ret i64 [[VGET_LANE]] poly64_t test_vget_lane_p64(poly64x1_t v) { return vget_lane_p64(v, 0); } -// CHECK-LABEL: define i64 @test_vgetq_lane_p64(<2 x i64> %v) #1 { +// CHECK-LABEL: define frozen i64 @test_vgetq_lane_p64(<2 x i64> frozen %v) #1 { // CHECK: [[VGETQ_LANE:%.*]] = extractelement <2 x i64> %v, i32 1 // CHECK: ret i64 [[VGETQ_LANE]] poly64_t test_vgetq_lane_p64(poly64x2_t v) { return vgetq_lane_p64(v, 1); } -// CHECK-LABEL: define <1 x i64> @test_vset_lane_p64(i64 %a, <1 x i64> %v) #0 { +// CHECK-LABEL: define frozen <1 x i64> @test_vset_lane_p64(i64 frozen %a, <1 x i64> frozen %v) #0 { // CHECK: [[VSET_LANE:%.*]] = insertelement <1 x i64> %v, i64 %a, i32 0 // CHECK: ret <1 x i64> [[VSET_LANE]] poly64x1_t test_vset_lane_p64(poly64_t a, poly64x1_t v) { return vset_lane_p64(a, v, 0); } -// CHECK-LABEL: define <2 x i64> @test_vsetq_lane_p64(i64 %a, <2 x i64> %v) #1 { +// CHECK-LABEL: define frozen <2 x i64> @test_vsetq_lane_p64(i64 frozen %a, <2 x i64> frozen %v) #1 { // CHECK: [[VSET_LANE:%.*]] = insertelement <2 x i64> %v, i64 %a, i32 1 // CHECK: ret <2 x i64> [[VSET_LANE]] poly64x2_t test_vsetq_lane_p64(poly64_t a, poly64x2_t v) { return vsetq_lane_p64(a, v, 1); } -// CHECK-LABEL: define <1 x i64> @test_vcopy_lane_p64(<1 x i64> %a, <1 x i64> %b) #0 { +// CHECK-LABEL: define frozen <1 x i64> @test_vcopy_lane_p64(<1 x i64> frozen %a, <1 x i64> frozen %b) #0 { // CHECK: [[VGET_LANE:%.*]] = extractelement <1 x i64> %b, i32 0 // CHECK: [[VSET_LANE:%.*]] = insertelement <1 x i64> %a, i64 [[VGET_LANE]], i32 0 // CHECK: ret <1 x i64> [[VSET_LANE]] @@ -97,7 +97,7 @@ } -// CHECK-LABEL: define <2 x i64> @test_vcopyq_lane_p64(<2 x i64> %a, <1 x i64> %b) #1 { +// CHECK-LABEL: define frozen <2 x i64> @test_vcopyq_lane_p64(<2 x i64> frozen %a, <1 x i64> frozen %b) #1 { // CHECK: [[VGET_LANE:%.*]] = extractelement <1 x i64> %b, i32 0 // CHECK: [[VSET_LANE:%.*]] = insertelement <2 x i64> %a, i64 [[VGET_LANE]], i32 1 // CHECK: ret <2 x i64> [[VSET_LANE]] @@ -105,7 +105,7 @@ return vcopyq_lane_p64(a, 1, b, 0); } -// CHECK-LABEL: define <2 x i64> @test_vcopyq_laneq_p64(<2 x i64> %a, <2 x i64> %b) #1 { +// CHECK-LABEL: define frozen <2 x i64> @test_vcopyq_laneq_p64(<2 x i64> frozen %a, <2 x i64> frozen %b) #1 { // CHECK: [[VGETQ_LANE:%.*]] = extractelement <2 x i64> %b, i32 1 // CHECK: [[VSET_LANE:%.*]] = insertelement <2 x i64> %a, i64 [[VGETQ_LANE]], i32 1 // CHECK: ret <2 x i64> [[VSET_LANE]] @@ -113,20 +113,20 @@ return vcopyq_laneq_p64(a, 1, b, 1); } -// CHECK-LABEL: define <1 x i64> @test_vcreate_p64(i64 %a) #0 { +// CHECK-LABEL: define frozen <1 x i64> @test_vcreate_p64(i64 frozen %a) #0 { // CHECK: [[TMP0:%.*]] = bitcast i64 %a to <1 x i64> // CHECK: ret <1 x i64> [[TMP0]] poly64x1_t test_vcreate_p64(uint64_t a) { return vcreate_p64(a); } -// CHECK-LABEL: define <1 x i64> @test_vdup_n_p64(i64 %a) #0 { +// CHECK-LABEL: define frozen <1 x i64> @test_vdup_n_p64(i64 frozen %a) #0 { // CHECK: [[VECINIT_I:%.*]] = insertelement <1 x i64> undef, i64 %a, i32 0 // CHECK: ret <1 x i64> [[VECINIT_I]] poly64x1_t test_vdup_n_p64(poly64_t a) { return vdup_n_p64(a); } -// CHECK-LABEL: define <2 x i64> @test_vdupq_n_p64(i64 %a) #1 { +// CHECK-LABEL: define frozen <2 x i64> @test_vdupq_n_p64(i64 frozen %a) #1 { // CHECK: [[VECINIT_I:%.*]] = insertelement <2 x i64> undef, i64 %a, i32 0 // CHECK: [[VECINIT1_I:%.*]] = insertelement <2 x i64> [[VECINIT_I]], i64 %a, i32 1 // CHECK: ret <2 x i64> [[VECINIT1_I]] @@ -134,14 +134,14 @@ return vdupq_n_p64(a); } -// CHECK-LABEL: define <1 x i64> @test_vmov_n_p64(i64 %a) #0 { +// CHECK-LABEL: define frozen <1 x i64> @test_vmov_n_p64(i64 frozen %a) #0 { // CHECK: [[VECINIT_I:%.*]] = insertelement <1 x i64> undef, i64 %a, i32 0 // CHECK: ret <1 x i64> [[VECINIT_I]] poly64x1_t test_vmov_n_p64(poly64_t a) { return vmov_n_p64(a); } -// CHECK-LABEL: define <2 x i64> @test_vmovq_n_p64(i64 %a) #1 { +// CHECK-LABEL: define frozen <2 x i64> @test_vmovq_n_p64(i64 frozen %a) #1 { // CHECK: [[VECINIT_I:%.*]] = insertelement <2 x i64> undef, i64 %a, i32 0 // CHECK: [[VECINIT1_I:%.*]] = insertelement <2 x i64> [[VECINIT_I]], i64 %a, i32 1 // CHECK: ret <2 x i64> [[VECINIT1_I]] @@ -149,7 +149,7 @@ return vmovq_n_p64(a); } -// CHECK-LABEL: define <1 x i64> @test_vdup_lane_p64(<1 x i64> %vec) #0 { +// CHECK-LABEL: define frozen <1 x i64> @test_vdup_lane_p64(<1 x i64> frozen %vec) #0 { // CHECK: [[TMP0:%.*]] = bitcast <1 x i64> [[VEC:%.*]] to <8 x i8> // CHECK: [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x i64> // CHECK: [[LANE:%.*]] = shufflevector <1 x i64> [[TMP1]], <1 x i64> [[TMP1]], <1 x i32> zeroinitializer @@ -158,7 +158,7 @@ return vdup_lane_p64(vec, 0); } -// CHECK-LABEL: define <2 x i64> @test_vdupq_lane_p64(<1 x i64> %vec) #1 { +// CHECK-LABEL: define frozen <2 x i64> @test_vdupq_lane_p64(<1 x i64> frozen %vec) #1 { // CHECK: [[TMP0:%.*]] = bitcast <1 x i64> [[VEC:%.*]] to <8 x i8> // CHECK: [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x i64> // CHECK: [[LANE:%.*]] = shufflevector <1 x i64> [[TMP1]], <1 x i64> [[TMP1]], <2 x i32> zeroinitializer @@ -167,7 +167,7 @@ return vdupq_lane_p64(vec, 0); } -// CHECK-LABEL: define <2 x i64> @test_vdupq_laneq_p64(<2 x i64> %vec) #1 { +// CHECK-LABEL: define frozen <2 x i64> @test_vdupq_laneq_p64(<2 x i64> frozen %vec) #1 { // CHECK: [[TMP0:%.*]] = bitcast <2 x i64> [[VEC:%.*]] to <16 x i8> // CHECK: [[TMP1:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64> // CHECK: [[LANE:%.*]] = shufflevector <2 x i64> [[TMP1]], <2 x i64> [[TMP1]], <2 x i32> @@ -176,14 +176,14 @@ return vdupq_laneq_p64(vec, 1); } -// CHECK-LABEL: define <2 x i64> @test_vcombine_p64(<1 x i64> %low, <1 x i64> %high) #1 { +// CHECK-LABEL: define frozen <2 x i64> @test_vcombine_p64(<1 x i64> frozen %low, <1 x i64> frozen %high) #1 { // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <1 x i64> %low, <1 x i64> %high, <2 x i32> // CHECK: ret <2 x i64> [[SHUFFLE_I]] poly64x2_t test_vcombine_p64(poly64x1_t low, poly64x1_t high) { return vcombine_p64(low, high); } -// CHECK-LABEL: define <1 x i64> @test_vld1_p64(i64* %ptr) #0 { +// CHECK-LABEL: define frozen <1 x i64> @test_vld1_p64(i64* frozen %ptr) #0 { // CHECK: [[TMP0:%.*]] = bitcast i64* %ptr to i8* // CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to <1 x i64>* // CHECK: [[TMP2:%.*]] = load <1 x i64>, <1 x i64>* [[TMP1]] @@ -192,7 +192,7 @@ return vld1_p64(ptr); } -// CHECK-LABEL: define <2 x i64> @test_vld1q_p64(i64* %ptr) #1 { +// CHECK-LABEL: define frozen <2 x i64> @test_vld1q_p64(i64* frozen %ptr) #1 { // CHECK: [[TMP0:%.*]] = bitcast i64* %ptr to i8* // CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to <2 x i64>* // CHECK: [[TMP2:%.*]] = load <2 x i64>, <2 x i64>* [[TMP1]] @@ -201,7 +201,7 @@ return vld1q_p64(ptr); } -// CHECK-LABEL: define void @test_vst1_p64(i64* %ptr, <1 x i64> %val) #0 { +// CHECK-LABEL: define void @test_vst1_p64(i64* frozen %ptr, <1 x i64> frozen %val) #0 { // CHECK: [[TMP0:%.*]] = bitcast i64* %ptr to i8* // CHECK: [[TMP1:%.*]] = bitcast <1 x i64> %val to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast i8* [[TMP0]] to <1 x i64>* @@ -212,7 +212,7 @@ return vst1_p64(ptr, val); } -// CHECK-LABEL: define void @test_vst1q_p64(i64* %ptr, <2 x i64> %val) #1 { +// CHECK-LABEL: define void @test_vst1q_p64(i64* frozen %ptr, <2 x i64> frozen %val) #1 { // CHECK: [[TMP0:%.*]] = bitcast i64* %ptr to i8* // CHECK: [[TMP1:%.*]] = bitcast <2 x i64> %val to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast i8* [[TMP0]] to <2 x i64>* @@ -223,7 +223,7 @@ return vst1q_p64(ptr, val); } -// CHECK-LABEL: define %struct.poly64x1x2_t @test_vld2_p64(i64* %ptr) #2 { +// CHECK-LABEL: define %struct.poly64x1x2_t @test_vld2_p64(i64* frozen %ptr) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.poly64x1x2_t, align 8 // CHECK: [[__RET:%.*]] = alloca %struct.poly64x1x2_t, align 8 // CHECK: [[TMP0:%.*]] = bitcast %struct.poly64x1x2_t* [[__RET]] to i8* @@ -241,7 +241,7 @@ return vld2_p64(ptr); } -// CHECK-LABEL: define %struct.poly64x2x2_t @test_vld2q_p64(i64* %ptr) #2 { +// CHECK-LABEL: define %struct.poly64x2x2_t @test_vld2q_p64(i64* frozen %ptr) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.poly64x2x2_t, align 16 // CHECK: [[__RET:%.*]] = alloca %struct.poly64x2x2_t, align 16 // CHECK: [[TMP0:%.*]] = bitcast %struct.poly64x2x2_t* [[__RET]] to i8* @@ -259,7 +259,7 @@ return vld2q_p64(ptr); } -// CHECK-LABEL: define %struct.poly64x1x3_t @test_vld3_p64(i64* %ptr) #2 { +// CHECK-LABEL: define %struct.poly64x1x3_t @test_vld3_p64(i64* frozen %ptr) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.poly64x1x3_t, align 8 // CHECK: [[__RET:%.*]] = alloca %struct.poly64x1x3_t, align 8 // CHECK: [[TMP0:%.*]] = bitcast %struct.poly64x1x3_t* [[__RET]] to i8* @@ -277,7 +277,7 @@ return vld3_p64(ptr); } -// CHECK-LABEL: define %struct.poly64x2x3_t @test_vld3q_p64(i64* %ptr) #2 { +// CHECK-LABEL: define %struct.poly64x2x3_t @test_vld3q_p64(i64* frozen %ptr) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.poly64x2x3_t, align 16 // CHECK: [[__RET:%.*]] = alloca %struct.poly64x2x3_t, align 16 // CHECK: [[TMP0:%.*]] = bitcast %struct.poly64x2x3_t* [[__RET]] to i8* @@ -295,7 +295,7 @@ return vld3q_p64(ptr); } -// CHECK-LABEL: define %struct.poly64x1x4_t @test_vld4_p64(i64* %ptr) #2 { +// CHECK-LABEL: define %struct.poly64x1x4_t @test_vld4_p64(i64* frozen %ptr) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.poly64x1x4_t, align 8 // CHECK: [[__RET:%.*]] = alloca %struct.poly64x1x4_t, align 8 // CHECK: [[TMP0:%.*]] = bitcast %struct.poly64x1x4_t* [[__RET]] to i8* @@ -313,7 +313,7 @@ return vld4_p64(ptr); } -// CHECK-LABEL: define %struct.poly64x2x4_t @test_vld4q_p64(i64* %ptr) #2 { +// CHECK-LABEL: define %struct.poly64x2x4_t @test_vld4q_p64(i64* frozen %ptr) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.poly64x2x4_t, align 16 // CHECK: [[__RET:%.*]] = alloca %struct.poly64x2x4_t, align 16 // CHECK: [[TMP0:%.*]] = bitcast %struct.poly64x2x4_t* [[__RET]] to i8* @@ -331,7 +331,7 @@ return vld4q_p64(ptr); } -// CHECK-LABEL: define void @test_vst2_p64(i64* %ptr, [2 x <1 x i64>] %val.coerce) #2 { +// CHECK-LABEL: define void @test_vst2_p64(i64* frozen %ptr, [2 x <1 x i64>] %val.coerce) #2 { // CHECK: [[VAL:%.*]] = alloca %struct.poly64x1x2_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.poly64x1x2_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly64x1x2_t, %struct.poly64x1x2_t* [[VAL]], i32 0, i32 0 @@ -356,7 +356,7 @@ return vst2_p64(ptr, val); } -// CHECK-LABEL: define void @test_vst2q_p64(i64* %ptr, [2 x <2 x i64>] %val.coerce) #2 { +// CHECK-LABEL: define void @test_vst2q_p64(i64* frozen %ptr, [2 x <2 x i64>] %val.coerce) #2 { // CHECK: [[VAL:%.*]] = alloca %struct.poly64x2x2_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.poly64x2x2_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly64x2x2_t, %struct.poly64x2x2_t* [[VAL]], i32 0, i32 0 @@ -381,7 +381,7 @@ return vst2q_p64(ptr, val); } -// CHECK-LABEL: define void @test_vst3_p64(i64* %ptr, [3 x <1 x i64>] %val.coerce) #2 { +// CHECK-LABEL: define void @test_vst3_p64(i64* frozen %ptr, [3 x <1 x i64>] %val.coerce) #2 { // CHECK: [[VAL:%.*]] = alloca %struct.poly64x1x3_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.poly64x1x3_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly64x1x3_t, %struct.poly64x1x3_t* [[VAL]], i32 0, i32 0 @@ -411,7 +411,7 @@ return vst3_p64(ptr, val); } -// CHECK-LABEL: define void @test_vst3q_p64(i64* %ptr, [3 x <2 x i64>] %val.coerce) #2 { +// CHECK-LABEL: define void @test_vst3q_p64(i64* frozen %ptr, [3 x <2 x i64>] %val.coerce) #2 { // CHECK: [[VAL:%.*]] = alloca %struct.poly64x2x3_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.poly64x2x3_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly64x2x3_t, %struct.poly64x2x3_t* [[VAL]], i32 0, i32 0 @@ -441,7 +441,7 @@ return vst3q_p64(ptr, val); } -// CHECK-LABEL: define void @test_vst4_p64(i64* %ptr, [4 x <1 x i64>] %val.coerce) #2 { +// CHECK-LABEL: define void @test_vst4_p64(i64* frozen %ptr, [4 x <1 x i64>] %val.coerce) #2 { // CHECK: [[VAL:%.*]] = alloca %struct.poly64x1x4_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.poly64x1x4_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly64x1x4_t, %struct.poly64x1x4_t* [[VAL]], i32 0, i32 0 @@ -476,7 +476,7 @@ return vst4_p64(ptr, val); } -// CHECK-LABEL: define void @test_vst4q_p64(i64* %ptr, [4 x <2 x i64>] %val.coerce) #2 { +// CHECK-LABEL: define void @test_vst4q_p64(i64* frozen %ptr, [4 x <2 x i64>] %val.coerce) #2 { // CHECK: [[VAL:%.*]] = alloca %struct.poly64x2x4_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.poly64x2x4_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly64x2x4_t, %struct.poly64x2x4_t* [[VAL]], i32 0, i32 0 @@ -511,7 +511,7 @@ return vst4q_p64(ptr, val); } -// CHECK-LABEL: define <1 x i64> @test_vext_p64(<1 x i64> %a, <1 x i64> %b) #0 { +// CHECK-LABEL: define frozen <1 x i64> @test_vext_p64(<1 x i64> frozen %a, <1 x i64> frozen %b) #0 { // CHECK: [[TMP0:%.*]] = bitcast <1 x i64> %a to <8 x i8> // CHECK: [[TMP1:%.*]] = bitcast <1 x i64> %b to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x i64> @@ -523,7 +523,7 @@ } -// CHECK-LABEL: define <2 x i64> @test_vextq_p64(<2 x i64> %a, <2 x i64> %b) #1 { +// CHECK-LABEL: define frozen <2 x i64> @test_vextq_p64(<2 x i64> frozen %a, <2 x i64> frozen %b) #1 { // CHECK: [[TMP0:%.*]] = bitcast <2 x i64> %a to <16 x i8> // CHECK: [[TMP1:%.*]] = bitcast <2 x i64> %b to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64> @@ -534,49 +534,49 @@ return vextq_p64(a, b, 1); } -// CHECK-LABEL: define <2 x i64> @test_vzip1q_p64(<2 x i64> %a, <2 x i64> %b) #1 { +// CHECK-LABEL: define frozen <2 x i64> @test_vzip1q_p64(<2 x i64> frozen %a, <2 x i64> frozen %b) #1 { // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> // CHECK: ret <2 x i64> [[SHUFFLE_I]] poly64x2_t test_vzip1q_p64(poly64x2_t a, poly64x2_t b) { return vzip1q_p64(a, b); } -// CHECK-LABEL: define <2 x i64> @test_vzip2q_p64(<2 x i64> %a, <2 x i64> %b) #1 { +// CHECK-LABEL: define frozen <2 x i64> @test_vzip2q_p64(<2 x i64> frozen %a, <2 x i64> frozen %b) #1 { // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> // CHECK: ret <2 x i64> [[SHUFFLE_I]] poly64x2_t test_vzip2q_p64(poly64x2_t a, poly64x2_t b) { return vzip2q_u64(a, b); } -// CHECK-LABEL: define <2 x i64> @test_vuzp1q_p64(<2 x i64> %a, <2 x i64> %b) #1 { +// CHECK-LABEL: define frozen <2 x i64> @test_vuzp1q_p64(<2 x i64> frozen %a, <2 x i64> frozen %b) #1 { // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> // CHECK: ret <2 x i64> [[SHUFFLE_I]] poly64x2_t test_vuzp1q_p64(poly64x2_t a, poly64x2_t b) { return vuzp1q_p64(a, b); } -// CHECK-LABEL: define <2 x i64> @test_vuzp2q_p64(<2 x i64> %a, <2 x i64> %b) #1 { +// CHECK-LABEL: define frozen <2 x i64> @test_vuzp2q_p64(<2 x i64> frozen %a, <2 x i64> frozen %b) #1 { // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> // CHECK: ret <2 x i64> [[SHUFFLE_I]] poly64x2_t test_vuzp2q_p64(poly64x2_t a, poly64x2_t b) { return vuzp2q_u64(a, b); } -// CHECK-LABEL: define <2 x i64> @test_vtrn1q_p64(<2 x i64> %a, <2 x i64> %b) #1 { +// CHECK-LABEL: define frozen <2 x i64> @test_vtrn1q_p64(<2 x i64> frozen %a, <2 x i64> frozen %b) #1 { // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> // CHECK: ret <2 x i64> [[SHUFFLE_I]] poly64x2_t test_vtrn1q_p64(poly64x2_t a, poly64x2_t b) { return vtrn1q_p64(a, b); } -// CHECK-LABEL: define <2 x i64> @test_vtrn2q_p64(<2 x i64> %a, <2 x i64> %b) #1 { +// CHECK-LABEL: define frozen <2 x i64> @test_vtrn2q_p64(<2 x i64> frozen %a, <2 x i64> frozen %b) #1 { // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> // CHECK: ret <2 x i64> [[SHUFFLE_I]] poly64x2_t test_vtrn2q_p64(poly64x2_t a, poly64x2_t b) { return vtrn2q_u64(a, b); } -// CHECK-LABEL: define <1 x i64> @test_vsri_n_p64(<1 x i64> %a, <1 x i64> %b) #0 { +// CHECK-LABEL: define frozen <1 x i64> @test_vsri_n_p64(<1 x i64> frozen %a, <1 x i64> frozen %b) #0 { // CHECK: [[TMP0:%.*]] = bitcast <1 x i64> %a to <8 x i8> // CHECK: [[TMP1:%.*]] = bitcast <1 x i64> %b to <8 x i8> // CHECK: [[VSRI_N:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x i64> @@ -587,7 +587,7 @@ return vsri_n_p64(a, b, 33); } -// CHECK-LABEL: define <2 x i64> @test_vsriq_n_p64(<2 x i64> %a, <2 x i64> %b) #1 { +// CHECK-LABEL: define frozen <2 x i64> @test_vsriq_n_p64(<2 x i64> frozen %a, <2 x i64> frozen %b) #1 { // CHECK: [[TMP0:%.*]] = bitcast <2 x i64> %a to <16 x i8> // CHECK: [[TMP1:%.*]] = bitcast <2 x i64> %b to <16 x i8> // CHECK: [[VSRI_N:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64> diff --git a/clang/test/CodeGen/aarch64-varargs-ms.c b/clang/test/CodeGen/aarch64-varargs-ms.c --- a/clang/test/CodeGen/aarch64-varargs-ms.c +++ b/clang/test/CodeGen/aarch64-varargs-ms.c @@ -3,7 +3,7 @@ #include int simple_int(va_list ap) { -// CHECK-LABEL: define dso_local i32 @simple_int +// CHECK-LABEL: define dso_local frozen i32 @simple_int return va_arg(ap, int); // CHECK: [[ADDR:%[a-z_0-9]+]] = bitcast i8* %argp.cur to i32* // CHECK: [[RESULT:%[a-z_0-9]+]] = load i32, i32* [[ADDR]] diff --git a/clang/test/CodeGen/aarch64-varargs.c b/clang/test/CodeGen/aarch64-varargs.c --- a/clang/test/CodeGen/aarch64-varargs.c +++ b/clang/test/CodeGen/aarch64-varargs.c @@ -9,7 +9,7 @@ va_list the_list; int simple_int(void) { -// CHECK-LABEL: define i32 @simple_int +// CHECK-LABEL: define frozen i32 @simple_int return va_arg(the_list, int); // CHECK: [[GR_OFFS:%[a-z_0-9]+]] = load i32, i32* getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 3) // CHECK: [[EARLY_ONSTACK:%[a-z_0-9]+]] = icmp sge i32 [[GR_OFFS]], 0 @@ -45,7 +45,7 @@ } __int128 aligned_int(void) { -// CHECK-LABEL: define i128 @aligned_int +// CHECK-LABEL: define frozen i128 @aligned_int return va_arg(the_list, __int128); // CHECK: [[GR_OFFS:%[a-z_0-9]+]] = load i32, i32* getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 3) // CHECK: [[EARLY_ONSTACK:%[a-z_0-9]+]] = icmp sge i32 [[GR_OFFS]], 0 @@ -156,7 +156,7 @@ } double simple_double(void) { -// CHECK-LABEL: define double @simple_double +// CHECK-LABEL: define frozen double @simple_double return va_arg(the_list, double); // CHECK: [[VR_OFFS:%[a-z_0-9]+]] = load i32, i32* getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 4) // CHECK: [[EARLY_ONSTACK:%[a-z_0-9]+]] = icmp sge i32 [[VR_OFFS]], 0 @@ -241,7 +241,7 @@ typedef int underaligned_int __attribute__((packed,aligned(2))); underaligned_int underaligned_int_test() { -// CHECK-LABEL: define i32 @underaligned_int_test() +// CHECK-LABEL: define frozen i32 @underaligned_int_test() return va_arg(the_list, underaligned_int); // CHECK: [[GR_OFFS:%[a-z_0-9]+]] = load i32, i32* getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 3) // CHECK: [[EARLY_ONSTACK:%[a-z_0-9]+]] = icmp sge i32 [[GR_OFFS]], 0 @@ -278,7 +278,7 @@ typedef int overaligned_int __attribute__((aligned(32))); overaligned_int overaligned_int_test() { -// CHECK-LABEL: define i32 @overaligned_int_test() +// CHECK-LABEL: define frozen i32 @overaligned_int_test() return va_arg(the_list, overaligned_int); // CHECK: [[GR_OFFS:%[a-z_0-9]+]] = load i32, i32* getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 3) // CHECK: [[EARLY_ONSTACK:%[a-z_0-9]+]] = icmp sge i32 [[GR_OFFS]], 0 @@ -315,7 +315,7 @@ typedef long long underaligned_long_long __attribute__((packed,aligned(2))); underaligned_long_long underaligned_long_long_test() { -// CHECK-LABEL: define i64 @underaligned_long_long_test() +// CHECK-LABEL: define frozen i64 @underaligned_long_long_test() return va_arg(the_list, underaligned_long_long); // CHECK: [[GR_OFFS:%[a-z_0-9]+]] = load i32, i32* getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 3) // CHECK: [[EARLY_ONSTACK:%[a-z_0-9]+]] = icmp sge i32 [[GR_OFFS]], 0 @@ -348,7 +348,7 @@ typedef long long overaligned_long_long __attribute__((aligned(32))); overaligned_long_long overaligned_long_long_test() { -// CHECK-LABEL: define i64 @overaligned_long_long_test() +// CHECK-LABEL: define frozen i64 @overaligned_long_long_test() return va_arg(the_list, overaligned_long_long); // CHECK: [[GR_OFFS:%[a-z_0-9]+]] = load i32, i32* getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 3) // CHECK: [[EARLY_ONSTACK:%[a-z_0-9]+]] = icmp sge i32 [[GR_OFFS]], 0 @@ -381,7 +381,7 @@ typedef __int128 underaligned_int128 __attribute__((packed,aligned(2))); underaligned_int128 underaligned_int128_test() { -// CHECK-LABEL: define i128 @underaligned_int128_test() +// CHECK-LABEL: define frozen i128 @underaligned_int128_test() return va_arg(the_list, underaligned_int128); // CHECK: [[GR_OFFS:%[a-z_0-9]+]] = load i32, i32* getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 3) // CHECK: [[EARLY_ONSTACK:%[a-z_0-9]+]] = icmp sge i32 [[GR_OFFS]], 0 @@ -420,7 +420,7 @@ typedef __int128 overaligned_int128 __attribute__((aligned(32))); overaligned_int128 overaligned_int128_test() { -// CHECK-LABEL: define i128 @overaligned_int128_test() +// CHECK-LABEL: define frozen i128 @overaligned_int128_test() return va_arg(the_list, overaligned_int128); // CHECK: [[GR_OFFS:%[a-z_0-9]+]] = load i32, i32* getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 3) // CHECK: [[EARLY_ONSTACK:%[a-z_0-9]+]] = icmp sge i32 [[GR_OFFS]], 0 @@ -883,7 +883,7 @@ } void check_start(int n, ...) { -// CHECK-LABEL: define void @check_start(i32 %n, ...) +// CHECK-LABEL: define void @check_start(i32 frozen %n, ...) va_list the_list; va_start(the_list, n); diff --git a/clang/test/CodeGen/address-space-avr.c b/clang/test/CodeGen/address-space-avr.c --- a/clang/test/CodeGen/address-space-avr.c +++ b/clang/test/CodeGen/address-space-avr.c @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -triple avr -emit-llvm < %s | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args -triple avr -emit-llvm < %s | FileCheck %s // Test that function declarations in nonzero address spaces without prototype // are called correctly. diff --git a/clang/test/CodeGen/address-space-field1.c b/clang/test/CodeGen/address-space-field1.c --- a/clang/test/CodeGen/address-space-field1.c +++ b/clang/test/CodeGen/address-space-field1.c @@ -1,6 +1,6 @@ // RUN: %clang_cc1 -emit-llvm -triple x86_64-apple-darwin10 < %s -o - | FileCheck %s // CHECK:%struct.S = type { i32, i32 } -// CHECK:define void @test_addrspace(%struct.S addrspace(1)* %p1, %struct.S addrspace(2)* %p2) [[NUW:#[0-9]+]] +// CHECK:define void @test_addrspace(%struct.S addrspace(1)* frozen %p1, %struct.S addrspace(2)* frozen %p2) [[NUW:#[0-9]+]] // CHECK: [[p1addr:%.*]] = alloca %struct.S addrspace(1)* // CHECK: [[p2addr:%.*]] = alloca %struct.S addrspace(2)* // CHECK: store %struct.S addrspace(1)* %p1, %struct.S addrspace(1)** [[p1addr]] diff --git a/clang/test/CodeGen/address-space.c b/clang/test/CodeGen/address-space.c --- a/clang/test/CodeGen/address-space.c +++ b/clang/test/CodeGen/address-space.c @@ -10,11 +10,11 @@ // CHECK: @a = global int a __attribute__((address_space(0))); -// CHECK-LABEL: define i32 @test1() +// CHECK-LABEL: define frozen i32 @test1() // CHECK: load i32, i32 addrspace(1)* @foo int test1() { return foo; } -// CHECK-LABEL: define i32 @test2(i32 %i) +// CHECK-LABEL: define frozen i32 @test2(i32 frozen %i) // CHECK: load i32, i32 addrspace(1)* // CHECK-NEXT: ret i32 int test2(int i) { return ban[i]; } diff --git a/clang/test/CodeGen/aggregate-assign-call.c b/clang/test/CodeGen/aggregate-assign-call.c --- a/clang/test/CodeGen/aggregate-assign-call.c +++ b/clang/test/CodeGen/aggregate-assign-call.c @@ -62,8 +62,8 @@ // O1-NEWPM: %[[TMP3:.*]] = bitcast %struct.S* %[[TMP2_ALLOCA]] to i8* // O1-NEWPM: call void @llvm.lifetime.end.p0i8({{[^,]*}}, i8* nonnull %[[P]]) // - // O1-LEGACY: call void @foo_int(%struct.S* sret align 4 %[[TMP1_ALLOCA]], - // O1-NEWPM: call void @foo_int(%struct.S* nonnull sret align 4 %[[TMP1_ALLOCA]], + // O1-LEGACY: call void @foo_int(%struct.S* sret align 4 %[[TMP1_ALLOCA]] + // O1-NEWPM: call void @foo_int(%struct.S* nonnull sret align 4 %[[TMP1_ALLOCA]] // O1: call void @llvm.memcpy // O1-LEGACY: %[[P:[^ ]+]] = bitcast %struct.S* %[[TMP1_ALLOCA]] to i8* // O1-LEGACY: call void @llvm.lifetime.end.p0i8({{[^,]*}}, i8* %[[P]]) @@ -71,8 +71,8 @@ // O1-LEGACY: %[[P:[^ ]+]] = bitcast %struct.S* %[[TMP2_ALLOCA]] to i8* // O1-LEGACY: call void @llvm.lifetime.start.p0i8({{[^,]*}}, i8* %[[P]]) // O1-NEWPM: call void @llvm.lifetime.start.p0i8({{[^,]*}}, i8* nonnull %[[TMP3]]) - // O1-LEGACY: call void @foo_int(%struct.S* sret align 4 %[[TMP2_ALLOCA]], - // O1-NEWPM: call void @foo_int(%struct.S* nonnull sret align 4 %[[TMP2_ALLOCA]], + // O1-LEGACY: call void @foo_int(%struct.S* sret align 4 %[[TMP2_ALLOCA]] + // O1-NEWPM: call void @foo_int(%struct.S* nonnull sret align 4 %[[TMP2_ALLOCA]] // O1: call void @llvm.memcpy // O1-LEGACY: %[[P:[^ ]+]] = bitcast %struct.S* %[[TMP2_ALLOCA]] to i8* // O1-LEGACY: call void @llvm.lifetime.end.p0i8({{[^,]*}}, i8* %[[P]]) diff --git a/clang/test/CodeGen/aix-return.c b/clang/test/CodeGen/aix-return.c --- a/clang/test/CodeGen/aix-return.c +++ b/clang/test/CodeGen/aix-return.c @@ -7,27 +7,27 @@ // AIX-LABEL: define void @retVoid() void retVoid(void) {} -// AIX-LABEL: define signext i8 @retChar(i8 signext %x) +// AIX-LABEL: define frozen signext i8 @retChar(i8 frozen signext %x) char retChar(char x) { return x; } -// AIX-LABEL: define signext i16 @retShort(i16 signext %x) +// AIX-LABEL: define frozen signext i16 @retShort(i16 frozen signext %x) short retShort(short x) { return x; } -// AIX32-LABEL: define i32 @retInt(i32 %x) -// AIX64-LABEL: define signext i32 @retInt(i32 signext %x) +// AIX32-LABEL: define frozen i32 @retInt(i32 frozen %x) +// AIX64-LABEL: define frozen signext i32 @retInt(i32 frozen signext %x) int retInt(int x) { return 1; } -// AIX-LABEL: define i64 @retLongLong(i64 %x) +// AIX-LABEL: define frozen i64 @retLongLong(i64 frozen %x) long long retLongLong(long long x) { return x; } -// AIX-LABEL: define signext i8 @retEnumChar(i8 signext %x) +// AIX-LABEL: define frozen signext i8 @retEnumChar(i8 frozen signext %x) enum EnumChar : char { IsChar }; enum EnumChar retEnumChar(enum EnumChar x) { return x; } -// AIX32-LABEL: define i32 @retEnumInt(i32 %x) -// AIX64-LABEL: define signext i32 @retEnumInt(i32 signext %x) +// AIX32-LABEL: define frozen i32 @retEnumInt(i32 frozen %x) +// AIX64-LABEL: define frozen signext i32 @retEnumInt(i32 frozen signext %x) enum EnumInt : int { IsInt }; enum EnumInt retEnumInt(enum EnumInt x) { return x; diff --git a/clang/test/CodeGen/aix-struct-arg.c b/clang/test/CodeGen/aix-struct-arg.c --- a/clang/test/CodeGen/aix-struct-arg.c +++ b/clang/test/CodeGen/aix-struct-arg.c @@ -38,52 +38,52 @@ vector signed int vsi; } StructVector; -// AIX32-LABEL: define void @arg0(%struct.Zero* byval(%struct.Zero) align 4 %x) -// AIX64-LABEL: define void @arg0(%struct.Zero* byval(%struct.Zero) align 8 %x) +// AIX32-LABEL: define void @arg0(%struct.Zero* frozen byval(%struct.Zero) align 4 %x) +// AIX64-LABEL: define void @arg0(%struct.Zero* frozen byval(%struct.Zero) align 8 %x) void arg0(Zero x) {} -// AIX32-LABEL: define void @arg1(%struct.One* byval(%struct.One) align 4 %x) -// AIX64-LABEL: define void @arg1(%struct.One* byval(%struct.One) align 8 %x) +// AIX32-LABEL: define void @arg1(%struct.One* frozen byval(%struct.One) align 4 %x) +// AIX64-LABEL: define void @arg1(%struct.One* frozen byval(%struct.One) align 8 %x) void arg1(One x) {} -// AIX32-LABEL: define void @arg2(%struct.Two* byval(%struct.Two) align 4 %x) -// AIX64-LABEL: define void @arg2(%struct.Two* byval(%struct.Two) align 8 %x) +// AIX32-LABEL: define void @arg2(%struct.Two* frozen byval(%struct.Two) align 4 %x) +// AIX64-LABEL: define void @arg2(%struct.Two* frozen byval(%struct.Two) align 8 %x) void arg2(Two x) {} -// AIX32-LABEL: define void @arg3(%struct.Three* byval(%struct.Three) align 4 %x) -// AIX64-LABEL: define void @arg3(%struct.Three* byval(%struct.Three) align 8 %x) +// AIX32-LABEL: define void @arg3(%struct.Three* frozen byval(%struct.Three) align 4 %x) +// AIX64-LABEL: define void @arg3(%struct.Three* frozen byval(%struct.Three) align 8 %x) void arg3(Three x) {} -// AIX32-LABEL: define void @arg4(%struct.Four* byval(%struct.Four) align 4 %x) -// AIX64-LABEL: define void @arg4(%struct.Four* byval(%struct.Four) align 8 %x) +// AIX32-LABEL: define void @arg4(%struct.Four* frozen byval(%struct.Four) align 4 %x) +// AIX64-LABEL: define void @arg4(%struct.Four* frozen byval(%struct.Four) align 8 %x) void arg4(Four x) {} -// AIX32-LABEL: define void @arg5(%struct.Five* byval(%struct.Five) align 4 %x) -// AIX64-LABEL: define void @arg5(%struct.Five* byval(%struct.Five) align 8 %x) +// AIX32-LABEL: define void @arg5(%struct.Five* frozen byval(%struct.Five) align 4 %x) +// AIX64-LABEL: define void @arg5(%struct.Five* frozen byval(%struct.Five) align 8 %x) void arg5(Five x) {} -// AIX32-LABEL: define void @arg6(%struct.Six* byval(%struct.Six) align 4 %x) -// AIX64-LABEL: define void @arg6(%struct.Six* byval(%struct.Six) align 8 %x) +// AIX32-LABEL: define void @arg6(%struct.Six* frozen byval(%struct.Six) align 4 %x) +// AIX64-LABEL: define void @arg6(%struct.Six* frozen byval(%struct.Six) align 8 %x) void arg6(Six x) {} -// AIX32-LABEL: define void @arg7(%struct.Seven* byval(%struct.Seven) align 4 %x) -// AIX64-LABEL: define void @arg7(%struct.Seven* byval(%struct.Seven) align 8 %x) +// AIX32-LABEL: define void @arg7(%struct.Seven* frozen byval(%struct.Seven) align 4 %x) +// AIX64-LABEL: define void @arg7(%struct.Seven* frozen byval(%struct.Seven) align 8 %x) void arg7(Seven x) {} -// AIX32-LABEL: define void @arg8(%struct.Eight* byval(%struct.Eight) align 4 %0) +// AIX32-LABEL: define void @arg8(%struct.Eight* frozen byval(%struct.Eight) align 4 %0) // AIX32: %x = alloca %struct.Eight, align 8 // AIX32: call void @llvm.memcpy.p0i8.p0i8.i32 -// AIX64-LABEL: define void @arg8(%struct.Eight* byval(%struct.Eight) align 8 %x) +// AIX64-LABEL: define void @arg8(%struct.Eight* frozen byval(%struct.Eight) align 8 %x) void arg8(Eight x) {} -// AIX32-LABEL: define void @arg9(%struct.OverAligned* byval(%struct.OverAligned) align 4 %0) +// AIX32-LABEL: define void @arg9(%struct.OverAligned* frozen byval(%struct.OverAligned) align 4 %0) // AIX32: %x = alloca %struct.OverAligned, align 32 // AIX32: call void @llvm.memcpy.p0i8.p0i8.i32 -// AIX64-LABEL: define void @arg9(%struct.OverAligned* byval(%struct.OverAligned) align 8 %0) +// AIX64-LABEL: define void @arg9(%struct.OverAligned* frozen byval(%struct.OverAligned) align 8 %0) // AIX64: %x = alloca %struct.OverAligned, align 32 // AIX64: call void @llvm.memcpy.p0i8.p0i8.i64 void arg9(OverAligned x) {} -// AIX32-LABEL: define void @arg10(%struct.StructVector* byval(%struct.StructVector) align 16 %x) -// AIX64-LABEL: define void @arg10(%struct.StructVector* byval(%struct.StructVector) align 16 %x) +// AIX32-LABEL: define void @arg10(%struct.StructVector* frozen byval(%struct.StructVector) align 16 %x) +// AIX64-LABEL: define void @arg10(%struct.StructVector* frozen byval(%struct.StructVector) align 16 %x) void arg10(StructVector x) {} diff --git a/clang/test/CodeGen/aix-vaargs.c b/clang/test/CodeGen/aix-vaargs.c --- a/clang/test/CodeGen/aix-vaargs.c +++ b/clang/test/CodeGen/aix-vaargs.c @@ -19,8 +19,8 @@ __builtin_va_end(ap); } -// AIX32: define void @testva(i32 %n, ...) -// AIX64: define void @testva(i32 signext %n, ...) +// AIX32: define void @testva(i32 frozen %n, ...) +// AIX64: define void @testva(i32 frozen signext %n, ...) // CHECK-NEXT: entry: // CHECK-NEXT: %n.addr = alloca i32, align 4 diff --git a/clang/test/CodeGen/alias.c b/clang/test/CodeGen/alias.c --- a/clang/test/CodeGen/alias.c +++ b/clang/test/CodeGen/alias.c @@ -57,7 +57,7 @@ // Make sure that aliases cause referenced values to be emitted. // PR3200 static inline int foo1() { return 0; } -// CHECKBASIC-LABEL: define internal i32 @foo1() +// CHECKBASIC-LABEL: define internal frozen i32 @foo1() int foo() __attribute__((alias("foo1"))); int bar() __attribute__((alias("bar1"))); @@ -72,16 +72,16 @@ extern __typeof(inner) inner_a __attribute__((alias("inner"))); static __typeof(inner_weak) inner_weak_a __attribute__((weakref, alias("inner_weak"))); // CHECKCC: @inner_a = alias i32 (i32), i32 (i32)* @inner -// CHECKCC: define internal arm_aapcs_vfpcc i32 @inner(i32 %a) [[NUW:#[0-9]+]] { +// CHECKCC: define internal arm_aapcs_vfpcc frozen i32 @inner(i32 frozen %a) [[NUW:#[0-9]+]] { int outer(int a) { return inner(a); } -// CHECKCC: define arm_aapcs_vfpcc i32 @outer(i32 %a) [[NUW]] { -// CHECKCC: call arm_aapcs_vfpcc i32 @inner(i32 %{{.*}}) +// CHECKCC: define arm_aapcs_vfpcc frozen i32 @outer(i32 frozen %a) [[NUW]] { +// CHECKCC: call arm_aapcs_vfpcc frozen i32 @inner(i32 frozen %{{.*}}) int outer_weak(int a) { return inner_weak_a(a); } -// CHECKCC: define arm_aapcs_vfpcc i32 @outer_weak(i32 %a) [[NUW]] { -// CHECKCC: call arm_aapcs_vfpcc i32 @inner_weak(i32 %{{.*}}) -// CHECKCC: define internal arm_aapcs_vfpcc i32 @inner_weak(i32 %a) [[NUW]] { +// CHECKCC: define arm_aapcs_vfpcc frozen i32 @outer_weak(i32 frozen %a) [[NUW]] { +// CHECKCC: call arm_aapcs_vfpcc frozen i32 @inner_weak(i32 frozen %{{.*}}) +// CHECKCC: define internal arm_aapcs_vfpcc frozen i32 @inner_weak(i32 frozen %a) [[NUW]] { // CHECKBASIC: attributes [[NUW]] = { noinline nounwind{{.*}} } diff --git a/clang/test/CodeGen/align-param.c b/clang/test/CodeGen/align-param.c --- a/clang/test/CodeGen/align-param.c +++ b/clang/test/CodeGen/align-param.c @@ -5,7 +5,7 @@ int test (long long x) { return (int)x; } -// CHECK-LABEL: define i32 @test +// CHECK-LABEL: define frozen i32 @test // CHECK: alloca i64, align 8 @@ -14,5 +14,5 @@ int test2(struct X x __attribute((aligned(16)))) { return x.z; } -// CHECK-LABEL: define i32 @test2 +// CHECK-LABEL: define frozen i32 @test2 // CHECK: alloca %struct.X, align 16 diff --git a/clang/test/CodeGen/align_value.cpp b/clang/test/CodeGen/align_value.cpp --- a/clang/test/CodeGen/align_value.cpp +++ b/clang/test/CodeGen/align_value.cpp @@ -4,7 +4,7 @@ void foo(aligned_double x, double * y __attribute__((align_value(32))), double & z __attribute__((align_value(128)))) { }; -// CHECK: define void @_Z3fooPdS_Rd(double* align 64 %x, double* align 32 %y, double* nonnull align 128 dereferenceable(8) %z) +// CHECK: define void @_Z3fooPdS_Rd(double* frozen align 64 %x, double* frozen align 32 %y, double* frozen nonnull align 128 dereferenceable(8) %z) struct ad_struct { aligned_double a; diff --git a/clang/test/CodeGen/alloc-align-attr.c b/clang/test/CodeGen/alloc-align-attr.c --- a/clang/test/CodeGen/alloc-align-attr.c +++ b/clang/test/CodeGen/alloc-align-attr.c @@ -1,12 +1,12 @@ -// RUN: %clang_cc1 -triple x86_64-pc-linux -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args -triple x86_64-pc-linux -emit-llvm -o - %s | FileCheck %s __INT32_TYPE__*m1(__INT32_TYPE__ i) __attribute__((alloc_align(1))); // Condition where parameter to m1 is not size_t. __INT32_TYPE__ test1(__INT32_TYPE__ a) { -// CHECK: define i32 @test1 +// CHECK: define frozen i32 @test1 return *m1(a); -// CHECK: call i32* @m1(i32 [[PARAM1:%[^\)]+]]) +// CHECK: call frozen i32* @m1(i32 [[PARAM1:%[^\)]+]]) // CHECK: [[ALIGNCAST1:%.+]] = zext i32 [[PARAM1]] to i64 // CHECK: [[MASK1:%.+]] = sub i64 [[ALIGNCAST1]], 1 // CHECK: [[PTRINT1:%.+]] = ptrtoint @@ -16,10 +16,10 @@ } // Condition where test2 param needs casting. __INT32_TYPE__ test2(__SIZE_TYPE__ a) { -// CHECK: define i32 @test2 +// CHECK: define frozen i32 @test2 return *m1(a); // CHECK: [[CONV2:%.+]] = trunc i64 %{{.+}} to i32 -// CHECK: call i32* @m1(i32 [[CONV2]]) +// CHECK: call frozen i32* @m1(i32 [[CONV2]]) // CHECK: [[ALIGNCAST2:%.+]] = zext i32 [[CONV2]] to i64 // CHECK: [[MASK2:%.+]] = sub i64 [[ALIGNCAST2]], 1 // CHECK: [[PTRINT2:%.+]] = ptrtoint @@ -31,10 +31,10 @@ // test3 param needs casting, but 'm2' is correct. __INT32_TYPE__ test3(__INT32_TYPE__ a) { -// CHECK: define i32 @test3 +// CHECK: define frozen i32 @test3 return *m2(a); // CHECK: [[CONV3:%.+]] = sext i32 %{{.+}} to i64 -// CHECK: call i32* @m2(i64 [[CONV3]]) +// CHECK: call frozen i32* @m2(i64 [[CONV3]]) // CHECK: [[MASK3:%.+]] = sub i64 [[CONV3]], 1 // CHECK: [[PTRINT3:%.+]] = ptrtoint // CHECK: [[MASKEDPTR3:%.+]] = and i64 [[PTRINT3]], [[MASK3]] @@ -44,9 +44,9 @@ // Every type matches, canonical example. __INT32_TYPE__ test4(__SIZE_TYPE__ a) { -// CHECK: define i32 @test4 +// CHECK: define frozen i32 @test4 return *m2(a); -// CHECK: call i32* @m2(i64 [[PARAM4:%[^\)]+]]) +// CHECK: call frozen i32* @m2(i64 [[PARAM4:%[^\)]+]]) // CHECK: [[MASK4:%.+]] = sub i64 [[PARAM4]], 1 // CHECK: [[PTRINT4:%.+]] = ptrtoint // CHECK: [[MASKEDPTR4:%.+]] = and i64 [[PTRINT4]], [[MASK4]] @@ -61,10 +61,10 @@ // Truncation to i64 is permissible, since alignments of greater than 2^64 are insane. __INT32_TYPE__ *m3(struct Empty s, __int128_t i) __attribute__((alloc_align(2))); __INT32_TYPE__ test5(__int128_t a) { -// CHECK: define i32 @test5 +// CHECK: define frozen i32 @test5 struct Empty e; return *m3(e, a); -// CHECK: call i32* @m3(i64 %{{.*}}, i64 %{{.*}}) +// CHECK: call frozen i32* @m3(i64 %{{.*}}, i64 %{{.*}}) // CHECK: [[ALIGNCAST5:%.+]] = trunc i128 %{{.*}} to i64 // CHECK: [[MASK5:%.+]] = sub i64 [[ALIGNCAST5]], 1 // CHECK: [[PTRINT5:%.+]] = ptrtoint @@ -75,10 +75,10 @@ // Struct parameter takes up 2 parameters, 'i' takes up 2. __INT32_TYPE__ *m4(struct MultiArgs s, __int128_t i) __attribute__((alloc_align(2))); __INT32_TYPE__ test6(__int128_t a) { -// CHECK: define i32 @test6 +// CHECK: define frozen i32 @test6 struct MultiArgs e; return *m4(e, a); -// CHECK: call i32* @m4(i64 %{{.*}}, i64 %{{.*}}, i64 %{{.*}}) +// CHECK: call frozen i32* @m4(i64 %{{.*}}, i64 %{{.*}}, i64 %{{.*}}) // CHECK: [[ALIGNCAST6:%.+]] = trunc i128 %{{.*}} to i64 // CHECK: [[MASK6:%.+]] = sub i64 [[ALIGNCAST6]], 1 // CHECK: [[PTRINT6:%.+]] = ptrtoint diff --git a/clang/test/CodeGen/arc/arguments.c b/clang/test/CodeGen/arc/arguments.c --- a/clang/test/CodeGen/arc/arguments.c +++ b/clang/test/CodeGen/arc/arguments.c @@ -3,7 +3,7 @@ // Basic argument tests for ARC. -// CHECK: define void @f0(i32 inreg %i, i32 inreg %j, i64 inreg %k) +// CHECK: define void @f0(i32 frozen inreg %i, i32 frozen inreg %j, i64 frozen inreg %k) void f0(int i, long j, long long k) {} typedef struct { @@ -38,13 +38,13 @@ return foo; } -// CHECK: define void @f4(i64 inreg %i) +// CHECK: define void @f4(i64 frozen inreg %i) void f4(long long i) {} -// CHECK: define void @f5(i8 inreg signext %a, i16 inreg signext %b) +// CHECK: define void @f5(i8 frozen inreg signext %a, i16 frozen inreg signext %b) void f5(signed char a, short b) {} -// CHECK: define void @f6(i8 inreg zeroext %a, i16 inreg zeroext %b) +// CHECK: define void @f6(i8 frozen inreg zeroext %a, i16 frozen inreg zeroext %b) void f6(unsigned char a, unsigned short b) {} enum my_enum { @@ -53,14 +53,14 @@ ENUM3, }; // Enums should be treated as the underlying i32. -// CHECK: define void @f7(i32 inreg %a) +// CHECK: define void @f7(i32 frozen inreg %a) void f7(enum my_enum a) {} enum my_big_enum { ENUM4 = 0xFFFFFFFFFFFFFFFF, }; // Big enums should be treated as the underlying i64. -// CHECK: define void @f8(i64 inreg %a) +// CHECK: define void @f8(i64 frozen inreg %a) void f8(enum my_big_enum a) {} union simple_union { @@ -80,32 +80,32 @@ // CHECK: define void @f10(i32 inreg %bf1.coerce) void f10(bitfield1 bf1) {} -// CHECK: define inreg { float, float } @cplx1(float inreg %r) +// CHECK: define frozen inreg { float, float } @cplx1(float frozen inreg %r) _Complex float cplx1(float r) { return r + 2.0fi; } -// CHECK: define inreg { double, double } @cplx2(double inreg %r) +// CHECK: define frozen inreg { double, double } @cplx2(double frozen inreg %r) _Complex double cplx2(double r) { return r + 2.0i; } -// CHECK: define inreg { i32, i32 } @cplx3(i32 inreg %r) +// CHECK: define frozen inreg { i32, i32 } @cplx3(i32 frozen inreg %r) _Complex int cplx3(int r) { return r + 2i; } -// CHECK: define inreg { i64, i64 } @cplx4(i64 inreg %r) +// CHECK: define frozen inreg { i64, i64 } @cplx4(i64 frozen inreg %r) _Complex long long cplx4(long long r) { return r + 2i; } -// CHECK: define inreg { i8, i8 } @cplx6(i8 inreg signext %r) +// CHECK: define frozen inreg { i8, i8 } @cplx6(i8 frozen inreg signext %r) _Complex signed char cplx6(signed char r) { return r + 2i; } -// CHECK: define inreg { i16, i16 } @cplx7(i16 inreg signext %r) +// CHECK: define frozen inreg { i16, i16 } @cplx7(i16 frozen inreg signext %r) _Complex short cplx7(short r) { return r + 2i; } @@ -128,7 +128,7 @@ // 1 sret + 1 i32 + 2*(i32 coerce) + 4*(i32 coerce) + 1 byval s16 st4(int x, s8 a, s16 b, s16 c) { return b; } -// CHECK: define void @st4(%struct.s16* noalias sret align 4 %agg.result, i32 inreg %x, i32 inreg %a.coerce0, i32 inreg %a.coerce1, i32 inreg %b.coerce0, i32 inreg %b.coerce1, i32 inreg %b.coerce2, i32 inreg %b.coerce3, { i32, i32, i32, i32 } %c.coerce) +// CHECK: define void @st4(%struct.s16* noalias sret align 4 %agg.result, i32 frozen inreg %x, i32 inreg %a.coerce0, i32 inreg %a.coerce1, i32 inreg %b.coerce0, i32 inreg %b.coerce1, i32 inreg %b.coerce2, i32 inreg %b.coerce3, { i32, i32, i32, i32 } %c.coerce) // 1 sret + 2*(i32 coerce) + 4*(i32 coerce) + 4*(i32 coerce) s16 st5(s8 a, s16 b, s16 c) { return b; } diff --git a/clang/test/CodeGen/arc/struct-align.c b/clang/test/CodeGen/arc/struct-align.c --- a/clang/test/CodeGen/arc/struct-align.c +++ b/clang/test/CodeGen/arc/struct-align.c @@ -8,7 +8,7 @@ double bb; } s1; -// CHECK: define i32 @f1 +// CHECK: define frozen i32 @f1 // CHECK: ret i32 12 int f1() { return sizeof(s1); @@ -18,7 +18,7 @@ int aa; long long bb; } s2; -// CHECK: define i32 @f2 +// CHECK: define frozen i32 @f2 // CHECK: ret i32 12 int f2() { return sizeof(s2); diff --git a/clang/test/CodeGen/arm-aapcs-vfp.c b/clang/test/CodeGen/arm-aapcs-vfp.c --- a/clang/test/CodeGen/arm-aapcs-vfp.c +++ b/clang/test/CodeGen/arm-aapcs-vfp.c @@ -1,19 +1,19 @@ // REQUIRES: arm-registered-target // REQUIRES: aarch64-registered-target -// RUN: %clang_cc1 -triple thumbv7-apple-darwin9 \ +// RUN: %clang_cc1 -disable-frozen-args -triple thumbv7-apple-darwin9 \ // RUN: -target-abi aapcs \ // RUN: -target-cpu cortex-a8 \ // RUN: -mfloat-abi hard \ // RUN: -ffreestanding \ // RUN: -emit-llvm -w -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple armv7-unknown-nacl-gnueabi \ +// RUN: %clang_cc1 -disable-frozen-args -triple armv7-unknown-nacl-gnueabi \ // RUN: -target-cpu cortex-a8 \ // RUN: -mfloat-abi hard \ // RUN: -ffreestanding \ // RUN: -emit-llvm -w -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple arm64-apple-darwin9 -target-feature +neon \ +// RUN: %clang_cc1 -disable-frozen-args -triple arm64-apple-darwin9 -target-feature +neon \ // RUN: -ffreestanding \ // RUN: -emit-llvm -w -o - %s | FileCheck -check-prefix=CHECK64 %s @@ -93,8 +93,8 @@ } // Neon multi-vector types are homogeneous aggregates. -// CHECK: define arm_aapcs_vfpcc <16 x i8> @f0(%struct.int8x16x4_t %{{.*}}) -// CHECK64: define <16 x i8> @f0([4 x <16 x i8>] %{{.*}}) +// CHECK: define arm_aapcs_vfpcc frozen <16 x i8> @f0(%struct.int8x16x4_t %{{.*}}) +// CHECK64: define frozen <16 x i8> @f0([4 x <16 x i8>] %{{.*}}) int8x16_t f0(int8x16x4_t v4) { return vaddq_s8(v4.val[0], v4.val[3]); } diff --git a/clang/test/CodeGen/arm-abi-vector.c b/clang/test/CodeGen/arm-abi-vector.c --- a/clang/test/CodeGen/arm-abi-vector.c +++ b/clang/test/CodeGen/arm-abi-vector.c @@ -1,6 +1,6 @@ -// RUN: %clang_cc1 -triple armv7-apple-darwin -target-abi aapcs -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple armv7-apple-darwin -target-abi apcs-gnu -emit-llvm -o - %s | FileCheck -check-prefix=APCS-GNU %s -// RUN: %clang_cc1 -triple arm-linux-androideabi -emit-llvm -o - %s | FileCheck -check-prefix=ANDROID %s +// RUN: %clang_cc1 -disable-frozen-args -triple armv7-apple-darwin -target-abi aapcs -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args -triple armv7-apple-darwin -target-abi apcs-gnu -emit-llvm -o - %s | FileCheck -check-prefix=APCS-GNU %s +// RUN: %clang_cc1 -disable-frozen-args -triple arm-linux-androideabi -emit-llvm -o - %s | FileCheck -check-prefix=ANDROID %s #include @@ -48,11 +48,11 @@ double test_2i(__int2 *in) { // CHECK: test_2i -// CHECK: call arm_aapcscc double (i32, ...) @varargs_vec_2i(i32 3, <2 x i32> {{%.*}}) +// CHECK: call arm_aapcscc frozen double (i32, ...) @varargs_vec_2i(i32 3, <2 x i32> {{%.*}}) // APCS-GNU: test_2i -// APCS-GNU: call double (i32, ...) @varargs_vec_2i(i32 3, <2 x i32> {{%.*}}) +// APCS-GNU: call frozen double (i32, ...) @varargs_vec_2i(i32 3, <2 x i32> {{%.*}}) // ANDROID: test_2i -// ANDROID: call double (i32, ...) @varargs_vec_2i(i32 3, <2 x i32> {{%.*}}) +// ANDROID: call frozen double (i32, ...) @varargs_vec_2i(i32 3, <2 x i32> {{%.*}}) return varargs_vec_2i(3, *in); } @@ -80,11 +80,11 @@ double test_3c(__char3 *in) { // CHECK: test_3c -// CHECK: call arm_aapcscc double (i32, ...) @varargs_vec_3c(i32 3, i32 {{%.*}}) +// CHECK: call arm_aapcscc frozen double (i32, ...) @varargs_vec_3c(i32 3, i32 {{%.*}}) // APCS-GNU: test_3c -// APCS-GNU: call double (i32, ...) @varargs_vec_3c(i32 3, i32 {{%.*}}) +// APCS-GNU: call frozen double (i32, ...) @varargs_vec_3c(i32 3, i32 {{%.*}}) // ANDROID: test_3c -// ANDROID: call double (i32, ...) @varargs_vec_3c(i32 3, <3 x i8> {{%.*}}) +// ANDROID: call frozen double (i32, ...) @varargs_vec_3c(i32 3, <3 x i8> {{%.*}}) return varargs_vec_3c(3, *in); } @@ -123,11 +123,11 @@ double test_5c(__char5 *in) { // CHECK: test_5c -// CHECK: call arm_aapcscc double (i32, ...) @varargs_vec_5c(i32 5, <2 x i32> {{%.*}}) +// CHECK: call arm_aapcscc frozen double (i32, ...) @varargs_vec_5c(i32 5, <2 x i32> {{%.*}}) // APCS-GNU: test_5c -// APCS-GNU: call double (i32, ...) @varargs_vec_5c(i32 5, <2 x i32> {{%.*}}) +// APCS-GNU: call frozen double (i32, ...) @varargs_vec_5c(i32 5, <2 x i32> {{%.*}}) // ANDROID: test_5c -// ANDROID: call double (i32, ...) @varargs_vec_5c(i32 5, <2 x i32> {{%.*}}) +// ANDROID: call frozen double (i32, ...) @varargs_vec_5c(i32 5, <2 x i32> {{%.*}}) return varargs_vec_5c(5, *in); } @@ -166,11 +166,11 @@ double test_9c(__char9 *in) { // CHECK: test_9c -// CHECK: call arm_aapcscc double (i32, ...) @varargs_vec_9c(i32 9, <4 x i32> {{%.*}}) +// CHECK: call arm_aapcscc frozen double (i32, ...) @varargs_vec_9c(i32 9, <4 x i32> {{%.*}}) // APCS-GNU: test_9c -// APCS-GNU: call double (i32, ...) @varargs_vec_9c(i32 9, <4 x i32> {{%.*}}) +// APCS-GNU: call frozen double (i32, ...) @varargs_vec_9c(i32 9, <4 x i32> {{%.*}}) // ANDROID: test_9c -// ANDROID: call double (i32, ...) @varargs_vec_9c(i32 9, <4 x i32> {{%.*}}) +// ANDROID: call frozen double (i32, ...) @varargs_vec_9c(i32 9, <4 x i32> {{%.*}}) return varargs_vec_9c(9, *in); } @@ -198,11 +198,11 @@ double test_19c(__char19 *in) { // CHECK: test_19c -// CHECK: call arm_aapcscc double (i32, ...) @varargs_vec_19c(i32 19, <19 x i8>* {{%.*}}) +// CHECK: call arm_aapcscc frozen double (i32, ...) @varargs_vec_19c(i32 19, <19 x i8>* {{%.*}}) // APCS-GNU: test_19c -// APCS-GNU: call double (i32, ...) @varargs_vec_19c(i32 19, <19 x i8>* {{%.*}}) +// APCS-GNU: call frozen double (i32, ...) @varargs_vec_19c(i32 19, <19 x i8>* {{%.*}}) // ANDROID: test_19c -// ANDROID: call double (i32, ...) @varargs_vec_19c(i32 19, <19 x i8>* {{%.*}}) +// ANDROID: call frozen double (i32, ...) @varargs_vec_19c(i32 19, <19 x i8>* {{%.*}}) return varargs_vec_19c(19, *in); } @@ -236,11 +236,11 @@ double test_3s(__short3 *in) { // CHECK: test_3s -// CHECK: call arm_aapcscc double (i32, ...) @varargs_vec_3s(i32 3, <2 x i32> {{%.*}}) +// CHECK: call arm_aapcscc frozen double (i32, ...) @varargs_vec_3s(i32 3, <2 x i32> {{%.*}}) // APCS-GNU: test_3s -// APCS-GNU: call double (i32, ...) @varargs_vec_3s(i32 3, <2 x i32> {{%.*}}) +// APCS-GNU: call frozen double (i32, ...) @varargs_vec_3s(i32 3, <2 x i32> {{%.*}}) // ANDROID: test_3s -// ANDROID: call double (i32, ...) @varargs_vec_3s(i32 3, <3 x i16> {{%.*}}) +// ANDROID: call frozen double (i32, ...) @varargs_vec_3s(i32 3, <3 x i16> {{%.*}}) return varargs_vec_3s(3, *in); } @@ -278,11 +278,11 @@ double test_5s(__short5 *in) { // CHECK: test_5s -// CHECK: call arm_aapcscc double (i32, ...) @varargs_vec_5s(i32 5, <4 x i32> {{%.*}}) +// CHECK: call arm_aapcscc frozen double (i32, ...) @varargs_vec_5s(i32 5, <4 x i32> {{%.*}}) // APCS-GNU: test_5s -// APCS-GNU: call double (i32, ...) @varargs_vec_5s(i32 5, <4 x i32> {{%.*}}) +// APCS-GNU: call frozen double (i32, ...) @varargs_vec_5s(i32 5, <4 x i32> {{%.*}}) // ANDROID: test_5s -// ANDROID: call double (i32, ...) @varargs_vec_5s(i32 5, <4 x i32> {{%.*}}) +// ANDROID: call frozen double (i32, ...) @varargs_vec_5s(i32 5, <4 x i32> {{%.*}}) return varargs_vec_5s(5, *in); } @@ -320,10 +320,10 @@ double test_struct(StructWithVec* d) { // CHECK: test_struct -// CHECK: call arm_aapcscc double (i32, ...) @varargs_struct(i32 3, [2 x i64] {{%.*}}) +// CHECK: call arm_aapcscc frozen double (i32, ...) @varargs_struct(i32 3, [2 x i64] {{%.*}}) // APCS-GNU: test_struct -// APCS-GNU: call double (i32, ...) @varargs_struct(i32 3, [2 x i64] {{%.*}}) +// APCS-GNU: call frozen double (i32, ...) @varargs_struct(i32 3, [2 x i64] {{%.*}}) // ANDROID: test_struct -// ANDROID: call double (i32, ...) @varargs_struct(i32 3, [2 x i64] {{%.*}}) +// ANDROID: call frozen double (i32, ...) @varargs_struct(i32 3, [2 x i64] {{%.*}}) return varargs_struct(3, *d); } diff --git a/clang/test/CodeGen/arm-arguments.c b/clang/test/CodeGen/arm-arguments.c --- a/clang/test/CodeGen/arm-arguments.c +++ b/clang/test/CodeGen/arm-arguments.c @@ -2,8 +2,8 @@ // RUN: %clang_cc1 -triple armv7-apple-darwin9 -target-feature +neon -target-abi apcs-gnu -emit-llvm -w -o - %s | FileCheck -check-prefix=APCS-GNU %s // RUN: %clang_cc1 -triple armv7-apple-darwin9 -target-feature +neon -target-abi aapcs -emit-llvm -w -o - %s | FileCheck -check-prefix=AAPCS %s -// APCS-GNU-LABEL: define signext i8 @f0() -// AAPCS-LABEL: define arm_aapcscc signext i8 @f0() +// APCS-GNU-LABEL: define frozen signext i8 @f0() +// AAPCS-LABEL: define arm_aapcscc frozen signext i8 @f0() char f0(void) { return 0; } @@ -121,14 +121,14 @@ struct s21 { struct {} f1; int f0 : 4; }; struct s21 f21(void) {} -// APCS-GNU-LABEL: define i16 @f22() -// APCS-GNU-LABEL: define i32 @f23() -// APCS-GNU-LABEL: define i64 @f24() -// APCS-GNU-LABEL: define i128 @f25() -// APCS-GNU-LABEL: define i64 @f26() -// APCS-GNU-LABEL: define i128 @f27() -// AAPCS-LABEL: define arm_aapcscc i16 @f22() -// AAPCS-LABEL: define arm_aapcscc i32 @f23() +// APCS-GNU-LABEL: define frozen i16 @f22() +// APCS-GNU-LABEL: define frozen i32 @f23() +// APCS-GNU-LABEL: define frozen i64 @f24() +// APCS-GNU-LABEL: define frozen i128 @f25() +// APCS-GNU-LABEL: define frozen i64 @f26() +// APCS-GNU-LABEL: define frozen i128 @f27() +// AAPCS-LABEL: define arm_aapcscc frozen i16 @f22() +// AAPCS-LABEL: define arm_aapcscc frozen i32 @f23() // AAPCS: define arm_aapcscc void @f24({{.*}} noalias sret // AAPCS: define arm_aapcscc void @f25({{.*}} noalias sret // AAPCS: define arm_aapcscc void @f26({{.*}} noalias sret @@ -176,14 +176,14 @@ // PR13350 struct s33 { char buf[32*32]; }; void f33(struct s33 s) { } -// APCS-GNU-LABEL: define void @f33(%struct.s33* byval(%struct.s33) align 4 %s) -// AAPCS-LABEL: define arm_aapcscc void @f33(%struct.s33* byval(%struct.s33) align 4 %s) +// APCS-GNU-LABEL: define void @f33(%struct.s33* frozen byval(%struct.s33) align 4 %s) +// AAPCS-LABEL: define arm_aapcscc void @f33(%struct.s33* frozen byval(%struct.s33) align 4 %s) // PR14048 struct s34 { char c; }; void f34(struct s34 s); void g34(struct s34 *s) { f34(*s); } -// AAPCS: @g34(%struct.s34* %s) +// AAPCS: @g34(%struct.s34* frozen %s) // AAPCS: %[[a:.*]] = alloca [1 x i32] // AAPCS: load [1 x i32], [1 x i32]* %[[a]] @@ -204,7 +204,7 @@ *(float32x4_t *)&s2); return v; } -// APCS-GNU-LABEL: define <4 x float> @f35(i32 %i, %struct.s35* byval(%struct.s35) align 4 %0, %struct.s35* byval(%struct.s35) align 4 %1) +// APCS-GNU-LABEL: define frozen <4 x float> @f35(i32 frozen %i, %struct.s35* frozen byval(%struct.s35) align 4 %0, %struct.s35* frozen byval(%struct.s35) align 4 %1) // APCS-GNU: %[[a:.*]] = alloca %struct.s35, align 16 // APCS-GNU: %[[b:.*]] = bitcast %struct.s35* %[[a]] to i8* // APCS-GNU: %[[c:.*]] = bitcast %struct.s35* %0 to i8* @@ -212,7 +212,7 @@ // APCS-GNU: %[[d:.*]] = bitcast %struct.s35* %[[a]] to <4 x float>* // APCS-GNU: load <4 x float>, <4 x float>* %[[d]], align 16 -// AAPCS-LABEL: define arm_aapcscc <4 x float> @f35(i32 %i, %struct.s35* byval(%struct.s35) align 4 %s1, %struct.s35* byval(%struct.s35) align 4 %s2) +// AAPCS-LABEL: define arm_aapcscc frozen <4 x float> @f35(i32 frozen %i, %struct.s35* frozen byval(%struct.s35) align 4 %s1, %struct.s35* frozen byval(%struct.s35) align 4 %s2) // AAPCS: %[[a_addr:.*]] = alloca <4 x float>, align 16 // AAPCS: %[[b_addr:.*]] = alloca <4 x float>, align 16 // AAPCS: %[[p1:.*]] = bitcast %struct.s35* %s1 to <4 x float>* diff --git a/clang/test/CodeGen/arm-bf16-params-returns.c b/clang/test/CodeGen/arm-bf16-params-returns.c --- a/clang/test/CodeGen/arm-bf16-params-returns.c +++ b/clang/test/CodeGen/arm-bf16-params-returns.c @@ -1,7 +1,7 @@ -// RUN: %clang_cc1 -triple armv8.6a-arm-none-eabi -target-abi aapcs -mfloat-abi hard -target-feature +bf16 -target-feature +neon -emit-llvm -O2 -o - %s | opt -S -mem2reg -sroa | FileCheck %s --check-prefix=CHECK32-HARD -// RUN: %clang_cc1 -triple aarch64-arm-none-eabi -target-abi aapcs -mfloat-abi hard -target-feature +bf16 -target-feature +neon -emit-llvm -O2 -o - %s | opt -S -mem2reg -sroa | FileCheck %s --check-prefix=CHECK64-HARD -// RUN: %clang_cc1 -triple armv8.6a-arm-none-eabi -target-abi aapcs -mfloat-abi softfp -target-feature +bf16 -target-feature +neon -emit-llvm -O2 -o - %s | opt -S -mem2reg -sroa | FileCheck %s --check-prefix=CHECK32-SOFTFP -// RUN: %clang_cc1 -triple aarch64-arm-none-eabi -target-abi aapcs -mfloat-abi softfp -target-feature +bf16 -target-feature +neon -emit-llvm -O2 -o - %s | opt -S -mem2reg -sroa | FileCheck %s --check-prefix=CHECK64-SOFTFP +// RUN: %clang_cc1 -disable-frozen-args -triple armv8.6a-arm-none-eabi -target-abi aapcs -mfloat-abi hard -target-feature +bf16 -target-feature +neon -emit-llvm -O2 -o - %s | opt -S -mem2reg -sroa | FileCheck %s --check-prefix=CHECK32-HARD +// RUN: %clang_cc1 -disable-frozen-args -triple aarch64-arm-none-eabi -target-abi aapcs -mfloat-abi hard -target-feature +bf16 -target-feature +neon -emit-llvm -O2 -o - %s | opt -S -mem2reg -sroa | FileCheck %s --check-prefix=CHECK64-HARD +// RUN: %clang_cc1 -disable-frozen-args -triple armv8.6a-arm-none-eabi -target-abi aapcs -mfloat-abi softfp -target-feature +bf16 -target-feature +neon -emit-llvm -O2 -o - %s | opt -S -mem2reg -sroa | FileCheck %s --check-prefix=CHECK32-SOFTFP +// RUN: %clang_cc1 -disable-frozen-args -triple aarch64-arm-none-eabi -target-abi aapcs -mfloat-abi softfp -target-feature +bf16 -target-feature +neon -emit-llvm -O2 -o - %s | opt -S -mem2reg -sroa | FileCheck %s --check-prefix=CHECK64-SOFTFP #include @@ -9,24 +9,24 @@ __bf16 test_ret_bf16(__bf16 v) { return v; } -// CHECK32-HARD: define arm_aapcs_vfpcc bfloat @test_ret_bf16(bfloat returned %v) {{.*}} { +// CHECK32-HARD: define arm_aapcs_vfpcc frozen bfloat @test_ret_bf16(bfloat returned %v) {{.*}} { // CHECK32-HARD: ret bfloat %v -// CHECK64-HARD: define bfloat @test_ret_bf16(bfloat returned %v) {{.*}} { +// CHECK64-HARD: define frozen bfloat @test_ret_bf16(bfloat returned %v) {{.*}} { // CHECK64-HARD: ret bfloat %v -// CHECK32-SOFTFP: define i32 @test_ret_bf16(i32 [[V0:.*]]) {{.*}} { +// CHECK32-SOFTFP: define frozen i32 @test_ret_bf16(i32 [[V0:.*]]) {{.*}} { // CHECK32-SOFTFP: %tmp2.0.insert.ext = and i32 [[V0]], 65535 // CHECK32-SOFTFP: ret i32 %tmp2.0.insert.ext -// CHECK64-SOFTFP: define bfloat @test_ret_bf16(bfloat returned %v) {{.*}} { +// CHECK64-SOFTFP: define frozen bfloat @test_ret_bf16(bfloat returned %v) {{.*}} { // CHECK64-SOFTFP: ret bfloat %v bfloat16x4_t test_ret_bf16x4_t(bfloat16x4_t v) { return v; } -// CHECK32-HARD: define arm_aapcs_vfpcc <4 x bfloat> @test_ret_bf16x4_t(<4 x bfloat> returned %v) {{.*}} { +// CHECK32-HARD: define arm_aapcs_vfpcc frozen <4 x bfloat> @test_ret_bf16x4_t(<4 x bfloat> returned %v) {{.*}} { // CHECK32-HARD: ret <4 x bfloat> %v -// CHECK64-HARD: define <4 x bfloat> @test_ret_bf16x4_t(<4 x bfloat> returned %v) {{.*}} { +// CHECK64-HARD: define frozen <4 x bfloat> @test_ret_bf16x4_t(<4 x bfloat> returned %v) {{.*}} { // CHECK64-HARD: ret <4 x bfloat> %v -// CHECK32-SOFTFP: define <2 x i32> @test_ret_bf16x4_t(<2 x i32> [[V0:.*]]) {{.*}} { +// CHECK32-SOFTFP: define frozen <2 x i32> @test_ret_bf16x4_t(<2 x i32> [[V0:.*]]) {{.*}} { // CHECK32-SOFTFP: ret <2 x i32> %v -// CHECK64-SOFTFP: define <4 x bfloat> @test_ret_bf16x4_t(<4 x bfloat> returned %v) {{.*}} { +// CHECK64-SOFTFP: define frozen <4 x bfloat> @test_ret_bf16x4_t(<4 x bfloat> returned %v) {{.*}} { // CHECK64-SOFTFP: ret <4 x bfloat> %v diff --git a/clang/test/CodeGen/arm-byval-align.c b/clang/test/CodeGen/arm-byval-align.c --- a/clang/test/CodeGen/arm-byval-align.c +++ b/clang/test/CodeGen/arm-byval-align.c @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -triple=armv7-none-eabi < %s -S -emit-llvm | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args -triple=armv7-none-eabi < %s -S -emit-llvm | FileCheck %s struct foo { long long a; diff --git a/clang/test/CodeGen/arm-cmse-attr.c b/clang/test/CodeGen/arm-cmse-attr.c --- a/clang/test/CodeGen/arm-cmse-attr.c +++ b/clang/test/CodeGen/arm-cmse-attr.c @@ -29,9 +29,9 @@ { } -// CHECK: define void @f1(void ()* nocapture %fptr) {{[^#]*}}#0 { +// CHECK: define void @f1(void ()* frozen nocapture %fptr) {{[^#]*}}#0 { // CHECK: call void %fptr() #2 -// CHECK: define void @f2(void ()* nocapture %fptr) {{[^#]*}}#0 { +// CHECK: define void @f2(void ()* frozen nocapture %fptr) {{[^#]*}}#0 { // CHECK: call void %fptr() #2 // CHECK: define void @f3() {{[^#]*}}#1 { // CHECK: define void @f4() {{[^#]*}}#1 { diff --git a/clang/test/CodeGen/arm-cmse-call.c b/clang/test/CodeGen/arm-cmse-call.c --- a/clang/test/CodeGen/arm-cmse-call.c +++ b/clang/test/CodeGen/arm-cmse-call.c @@ -40,7 +40,7 @@ p2(i); // CHECK: %[[#P2:]] = load {{.*}} @p2 -// CHECK: call void %[[#P2]](i32 %i) #[[#A2]] +// CHECK: call void %[[#P2]](i32 frozen %i) #[[#A2]] a0[i](); // CHECK: %[[EP0:.*]] = getelementptr {{.*}} @a0 @@ -70,7 +70,7 @@ b[i](i); // CHECK: %[[EP5:.*]] = getelementptr {{.*}} @b // CHECK: %[[#E5:]] = load {{.*}} %[[EP5]] -// CHECK: call void %[[#E5]](i32 %i) #[[#A2]] +// CHECK: call void %[[#E5]](i32 frozen %i) #[[#A2]] } // CHECK: attributes #[[#A1]] = { nounwind } diff --git a/clang/test/CodeGen/arm-float-helpers.c b/clang/test/CodeGen/arm-float-helpers.c --- a/clang/test/CodeGen/arm-float-helpers.c +++ b/clang/test/CodeGen/arm-float-helpers.c @@ -32,192 +32,192 @@ // other runtime functions such as the _Complex helper routines are not covered. float fadd(float a, float b) { return a + b; } -// CHECK-LABEL: define float @fadd(float %a, float %b) +// CHECK-LABEL: define frozen float @fadd(float frozen %a, float frozen %b) // CHECK-NOT: __aeabi_fadd // CHECK: %add = fadd float {{.*}}, {{.*}} float fdiv(float a, float b) { return a / b; } -// CHECK-LABEL: define float @fdiv(float %a, float %b) +// CHECK-LABEL: define frozen float @fdiv(float frozen %a, float frozen %b) // CHECK-NOT: __aeabi_fdiv // CHECK: %div = fdiv float {{.*}}, {{.*}} float fmul(float a, float b) { return a * b; } -// CHECK-LABEL: define float @fmul(float %a, float %b) +// CHECK-LABEL: define frozen float @fmul(float frozen %a, float frozen %b) // CHECK-NOT: __aeabi_fmul // CHECK: %mul = fmul float {{.*}}, {{.*}} float fsub(float a, float b) { return a - b; } -// CHECK-LABEL: define float @fsub(float %a, float %b) +// CHECK-LABEL: define frozen float @fsub(float frozen %a, float frozen %b) // CHECK-NOT: __aeabi_fsub // CHECK: %sub = fsub float {{.*}}, {{.*}} int fcmpeq(float a, float b) { return a == b; } -// CHECK-LABEL: define i32 @fcmpeq(float %a, float %b) +// CHECK-LABEL: define frozen i32 @fcmpeq(float frozen %a, float frozen %b) // CHECK-NOT: __aeabi_fcmpeq // CHECK: %cmp = fcmp oeq float {{.*}}, {{.*}} int fcmplt(float a, float b) { return a < b; } -// CHECK-LABEL: define i32 @fcmplt(float %a, float %b) +// CHECK-LABEL: define frozen i32 @fcmplt(float frozen %a, float frozen %b) // CHECK-NOT: __aeabi_fcmplt // CHECK: %cmp = fcmp olt float {{.*}}, {{.*}} int fcmple(float a, float b) { return a <= b; } -// CHECK-LABEL: define i32 @fcmple(float %a, float %b) +// CHECK-LABEL: define frozen i32 @fcmple(float frozen %a, float frozen %b) // CHECK-NOT: __aeabi_fcmple // CHECK: %cmp = fcmp ole float {{.*}}, {{.*}} int fcmpge(float a, float b) { return a >= b; } -// CHECK-LABEL: define i32 @fcmpge(float %a, float %b) +// CHECK-LABEL: define frozen i32 @fcmpge(float frozen %a, float frozen %b) // CHECK-NOT: __aeabi_fcmpge // CHECK: %cmp = fcmp oge float {{.*}}, {{.*}} int fcmpgt(float a, float b) { return a > b; } -// CHECK-LABEL: define i32 @fcmpgt(float %a, float %b) +// CHECK-LABEL: define frozen i32 @fcmpgt(float frozen %a, float frozen %b) // CHECK-NOT: __aeabi_fcmpgt // CHECK: %cmp = fcmp ogt float {{.*}}, {{.*}} int fcmpun(float a, float b) { return __builtin_isunordered(a, b); } -// CHECK-LABEL: define i32 @fcmpun(float %a, float %b) +// CHECK-LABEL: define frozen i32 @fcmpun(float frozen %a, float frozen %b) // CHECK-NOT: __aeabi_fcmpun // CHECK: %cmp = fcmp uno float {{.*}}, {{.*}} double dadd(double a, double b) { return a + b; } -// CHECK-LABEL: define double @dadd(double %a, double %b) +// CHECK-LABEL: define frozen double @dadd(double frozen %a, double frozen %b) // CHECK-NOT: __aeabi_dadd // CHECK: %add = fadd double {{.*}}, {{.*}} double ddiv(double a, double b) { return a / b; } -// CHECK-LABEL: define double @ddiv(double %a, double %b) +// CHECK-LABEL: define frozen double @ddiv(double frozen %a, double frozen %b) // CHECK-NOT: __aeabi_ddiv // CHECK: %div = fdiv double {{.*}}, {{.*}} double dmul(double a, double b) { return a * b; } -// CHECK-LABEL: define double @dmul(double %a, double %b) +// CHECK-LABEL: define frozen double @dmul(double frozen %a, double frozen %b) // CHECK-NOT: __aeabi_dmul // CHECK: %mul = fmul double {{.*}}, {{.*}} double dsub(double a, double b) { return a - b; } -// CHECK-LABEL: define double @dsub(double %a, double %b) +// CHECK-LABEL: define frozen double @dsub(double frozen %a, double frozen %b) // CHECK-NOT: __aeabi_dsub // CHECK: %sub = fsub double {{.*}}, {{.*}} int dcmpeq(double a, double b) { return a == b; } -// CHECK-LABEL: define i32 @dcmpeq(double %a, double %b) +// CHECK-LABEL: define frozen i32 @dcmpeq(double frozen %a, double frozen %b) // CHECK-NOT: __aeabi_dcmpeq // CHECK: %cmp = fcmp oeq double {{.*}}, {{.*}} int dcmplt(double a, double b) { return a < b; } -// CHECK-LABEL: define i32 @dcmplt(double %a, double %b) +// CHECK-LABEL: define frozen i32 @dcmplt(double frozen %a, double frozen %b) // CHECK-NOT: __aeabi_dcmplt // CHECK: %cmp = fcmp olt double {{.*}}, {{.*}} int dcmple(double a, double b) { return a <= b; } -// CHECK-LABEL: define i32 @dcmple(double %a, double %b) +// CHECK-LABEL: define frozen i32 @dcmple(double frozen %a, double frozen %b) // CHECK-NOT: __aeabi_dcmple // CHECK: %cmp = fcmp ole double {{.*}}, {{.*}} int dcmpge(double a, double b) { return a >= b; } -// CHECK-LABEL: define i32 @dcmpge(double %a, double %b) +// CHECK-LABEL: define frozen i32 @dcmpge(double frozen %a, double frozen %b) // CHECK-NOT: __aeabi_dcmpge // CHECK: %cmp = fcmp oge double {{.*}}, {{.*}} int dcmpgt(double a, double b) { return a > b; } -// CHECK-LABEL: define i32 @dcmpgt(double %a, double %b) +// CHECK-LABEL: define frozen i32 @dcmpgt(double frozen %a, double frozen %b) // CHECK-NOT: __aeabi_dcmpgt // CHECK: %cmp = fcmp ogt double {{.*}}, {{.*}} int dcmpun(double a, double b) { return __builtin_isunordered(a, b); } -// CHECK-LABEL: define i32 @dcmpun(double %a, double %b) +// CHECK-LABEL: define frozen i32 @dcmpun(double frozen %a, double frozen %b) // CHECK-NOT: __aeabi_dcmpun // CHECK: %cmp = fcmp uno double {{.*}}, {{.*}} int d2iz(double a) { return (int)a; } -// CHECK-LABEL: define i32 @d2iz(double %a) +// CHECK-LABEL: define frozen i32 @d2iz(double frozen %a) // CHECK-NOT: __aeabi_d2iz // CHECK: %conv = fptosi double {{.*}} to i32 unsigned int d2uiz(double a) { return (unsigned int)a; } -// CHECK-LABEL: define i32 @d2uiz(double %a) +// CHECK-LABEL: define frozen i32 @d2uiz(double frozen %a) // CHECK-NOT: __aeabi_d2uiz // CHECK: %conv = fptoui double {{.*}} to i32 long long d2lz(double a) { return (long long)a; } -// CHECK-LABEL: define i64 @d2lz(double %a) +// CHECK-LABEL: define frozen i64 @d2lz(double frozen %a) // CHECK-NOT: __aeabi_d2lz // CHECK: %conv = fptosi double {{.*}} to i64 unsigned long long d2ulz(double a) { return (unsigned long long)a; } -// CHECK-LABEL: define i64 @d2ulz(double %a) +// CHECK-LABEL: define frozen i64 @d2ulz(double frozen %a) // CHECK-NOT: __aeabi_d2ulz // CHECK: %conv = fptoui double {{.*}} to i64 int f2iz(float a) { return (int)a; } -// CHECK-LABEL: define i32 @f2iz(float %a) +// CHECK-LABEL: define frozen i32 @f2iz(float frozen %a) // CHECK-NOT: __aeabi_f2iz // CHECK: %conv = fptosi float {{.*}} to i32 unsigned int f2uiz(float a) { return (unsigned int)a; } -// CHECK-LABEL: define i32 @f2uiz(float %a) +// CHECK-LABEL: define frozen i32 @f2uiz(float frozen %a) // CHECK-NOT: __aeabi_f2uiz // CHECK: %conv = fptoui float {{.*}} to i32 long long f2lz(float a) { return (long long)a; } -// CHECK-LABEL: define i64 @f2lz(float %a) +// CHECK-LABEL: define frozen i64 @f2lz(float frozen %a) // CHECK-NOT: __aeabi_f2lz // CHECK: %conv = fptosi float {{.*}} to i64 unsigned long long f2ulz(float a) { return (unsigned long long)a; } -// CHECK-LABEL: define i64 @f2ulz(float %a) +// CHECK-LABEL: define frozen i64 @f2ulz(float frozen %a) // CHECK-NOT: __aeabi_f2ulz // CHECK: %conv = fptoui float {{.*}} to i64 float d2f(double a) { return (float)a; } -// CHECK-LABEL: define float @d2f(double %a) +// CHECK-LABEL: define frozen float @d2f(double frozen %a) // CHECK-NOT: __aeabi_d2f // CHECK: %conv = fptrunc double {{.*}} to float double f2d(float a) { return (double)a; } -// CHECK-LABEL: define double @f2d(float %a) +// CHECK-LABEL: define frozen double @f2d(float frozen %a) // CHECK-NOT: __aeabi_f2d // CHECK: %conv = fpext float {{.*}} to double double i2d(int a) { return (double)a; } -// CHECK-LABEL: define double @i2d(i32 %a) +// CHECK-LABEL: define frozen double @i2d(i32 frozen %a) // CHECK-NOT: __aeabi_i2d // CHECK: %conv = sitofp i32 {{.*}} to double double ui2d(unsigned int a) { return (double)a; } -// CHECK-LABEL: define double @ui2d(i32 %a) +// CHECK-LABEL: define frozen double @ui2d(i32 frozen %a) // CHECK-NOT: __aeabi_ui2d // CHECK: %conv = uitofp i32 {{.*}} to double double l2d(long long a) { return (double)a; } -// CHECK-LABEL: define double @l2d(i64 %a) +// CHECK-LABEL: define frozen double @l2d(i64 frozen %a) // CHECK-NOT: __aeabi_l2d // CHECK: %conv = sitofp i64 {{.*}} to double double ul2d(unsigned long long a) { return (unsigned long long)a; } -// CHECK-LABEL: define double @ul2d(i64 %a) +// CHECK-LABEL: define frozen double @ul2d(i64 frozen %a) // CHECK-NOT: __aeabi_ul2d // CHECK: %conv = uitofp i64 {{.*}} to double float i2f(int a) { return (int)a; } -// CHECK-LABEL: define float @i2f(i32 %a) +// CHECK-LABEL: define frozen float @i2f(i32 frozen %a) // CHECK-NOT: __aeabi_i2f // CHECK: %conv = sitofp i32 {{.*}} to float float ui2f(unsigned int a) { return (unsigned int)a; } -// CHECK-LABEL: define float @ui2f(i32 %a) +// CHECK-LABEL: define frozen float @ui2f(i32 frozen %a) // CHECK-NOT: __aeabi_ui2f // CHECK: %conv = uitofp i32 {{.*}} to float float l2f(long long a) { return (long long)a; } -// CHECK-LABEL: define float @l2f(i64 %a) +// CHECK-LABEL: define frozen float @l2f(i64 frozen %a) // CHECK-NOT: __aeabi_l2f // CHECK: %conv = sitofp i64 {{.*}} to float float ul2f(unsigned long long a) { return (unsigned long long)a; } -// CHECK-LABEL: define float @ul2f(i64 %a) +// CHECK-LABEL: define frozen float @ul2f(i64 frozen %a) // CHECK-NOT: __aeabi_ul2f // CHECK: %conv = uitofp i64 {{.*}} to float diff --git a/clang/test/CodeGen/arm-fp16-arguments.c b/clang/test/CodeGen/arm-fp16-arguments.c --- a/clang/test/CodeGen/arm-fp16-arguments.c +++ b/clang/test/CodeGen/arm-fp16-arguments.c @@ -1,6 +1,6 @@ -// RUN: %clang_cc1 -triple armv7a--none-eabi -target-abi aapcs -mfloat-abi soft -fallow-half-arguments-and-returns -emit-llvm -o - -O2 %s | FileCheck %s --check-prefix=CHECK --check-prefix=SOFT -// RUN: %clang_cc1 -triple armv7a--none-eabi -target-abi aapcs -mfloat-abi hard -fallow-half-arguments-and-returns -emit-llvm -o - -O2 %s | FileCheck %s --check-prefix=CHECK --check-prefix=HARD -// RUN: %clang_cc1 -triple armv7a--none-eabi -target-abi aapcs -mfloat-abi soft -fnative-half-arguments-and-returns -emit-llvm -o - -O2 %s | FileCheck %s --check-prefix=NATIVE +// RUN: %clang_cc1 -disable-frozen-args -triple armv7a--none-eabi -target-abi aapcs -mfloat-abi soft -fallow-half-arguments-and-returns -emit-llvm -o - -O2 %s | FileCheck %s --check-prefix=CHECK --check-prefix=SOFT +// RUN: %clang_cc1 -disable-frozen-args -triple armv7a--none-eabi -target-abi aapcs -mfloat-abi hard -fallow-half-arguments-and-returns -emit-llvm -o - -O2 %s | FileCheck %s --check-prefix=CHECK --check-prefix=HARD +// RUN: %clang_cc1 -disable-frozen-args -triple armv7a--none-eabi -target-abi aapcs -mfloat-abi soft -fnative-half-arguments-and-returns -emit-llvm -o - -O2 %s | FileCheck %s --check-prefix=NATIVE __fp16 g; @@ -15,9 +15,9 @@ // NATIVE: store half [[PARAM]], half* @g __fp16 t2() { return g; } -// SOFT: define i32 @t2() -// HARD: define arm_aapcs_vfpcc float @t2() -// NATIVE: define half @t2() +// SOFT: define frozen i32 @t2() +// HARD: define arm_aapcs_vfpcc frozen float @t2() +// NATIVE: define frozen half @t2() // CHECK: [[LOAD:%.*]] = load i16, i16* bitcast (half* @g to i16*) // CHECK: [[ZEXT:%.*]] = zext i16 [[LOAD]] to i32 // SOFT: ret i32 [[ZEXT]] @@ -39,9 +39,9 @@ // NATIVE: store half [[PARAM]], half* @h _Float16 t4() { return h; } -// SOFT: define i32 @t4() -// HARD: define arm_aapcs_vfpcc float @t4() -// NATIVE: define half @t4() +// SOFT: define frozen i32 @t4() +// HARD: define arm_aapcs_vfpcc frozen float @t4() +// NATIVE: define frozen half @t4() // CHECK: [[LOAD:%.*]] = load i16, i16* bitcast (half* @h to i16*) // CHECK: [[ZEXT:%.*]] = zext i16 [[LOAD]] to i32 // SOFT: ret i32 [[ZEXT]] diff --git a/clang/test/CodeGen/arm-homogenous.c b/clang/test/CodeGen/arm-homogenous.c --- a/clang/test/CodeGen/arm-homogenous.c +++ b/clang/test/CodeGen/arm-homogenous.c @@ -95,7 +95,7 @@ float a[4] = {1.0, 2.0, 3.0, 4.0}; takes_array_of_floats(a); } -// CHECK: declare arm_aapcs_vfpcc void @takes_array_of_floats(float*) +// CHECK: declare arm_aapcs_vfpcc void @takes_array_of_floats(float* frozen) /* Struct-type homogenous aggregate */ typedef struct { diff --git a/clang/test/CodeGen/arm-mangle-bf16.cpp b/clang/test/CodeGen/arm-mangle-bf16.cpp --- a/clang/test/CodeGen/arm-mangle-bf16.cpp +++ b/clang/test/CodeGen/arm-mangle-bf16.cpp @@ -1,6 +1,6 @@ -// RUN: %clang_cc1 -triple aarch64-arm-none-eabi -target-feature +bf16 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK64 -// RUN: %clang_cc1 -triple arm-arm-none-eabi -target-feature +bf16 -mfloat-abi hard -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK32-HARD -// RUN: %clang_cc1 -triple arm-arm-none-eabi -target-feature +bf16 -mfloat-abi softfp -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK32-SOFTFP +// RUN: %clang_cc1 -disable-frozen-args -triple aarch64-arm-none-eabi -target-feature +bf16 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK64 +// RUN: %clang_cc1 -disable-frozen-args -triple arm-arm-none-eabi -target-feature +bf16 -mfloat-abi hard -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK32-HARD +// RUN: %clang_cc1 -disable-frozen-args -triple arm-arm-none-eabi -target-feature +bf16 -mfloat-abi softfp -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK32-SOFTFP // CHECK64: define {{.*}}void @_Z3foou6__bf16(bfloat %b) // CHECK32-HARD: define {{.*}}void @_Z3foou6__bf16(bfloat %b) diff --git a/clang/test/CodeGen/arm-neon-directed-rounding.c b/clang/test/CodeGen/arm-neon-directed-rounding.c --- a/clang/test/CodeGen/arm-neon-directed-rounding.c +++ b/clang/test/CodeGen/arm-neon-directed-rounding.c @@ -7,7 +7,7 @@ #include -// CHECK-LABEL: define <2 x float> @test_vrnda_f32(<2 x float> %a) +// CHECK-LABEL: define frozen <2 x float> @test_vrnda_f32(<2 x float> frozen %a) // CHECK-A32: [[VRNDA_V1_I:%.*]] = call <2 x float> @llvm.arm.neon.vrinta.v2f32(<2 x float> %a) // CHECK-A64: [[VRNDA_V1_I:%.*]] = call <2 x float> @llvm.round.v2f32(<2 x float> %a) // CHECK: ret <2 x float> [[VRNDA_V1_I]] @@ -15,7 +15,7 @@ return vrnda_f32(a); } -// CHECK-LABEL: define <4 x float> @test_vrndaq_f32(<4 x float> %a) +// CHECK-LABEL: define frozen <4 x float> @test_vrndaq_f32(<4 x float> frozen %a) // CHECK-A32: [[VRNDAQ_V1_I:%.*]] = call <4 x float> @llvm.arm.neon.vrinta.v4f32(<4 x float> %a) // CHECK-A64: [[VRNDAQ_V1_I:%.*]] = call <4 x float> @llvm.round.v4f32(<4 x float> %a) // CHECK: ret <4 x float> [[VRNDAQ_V1_I]] @@ -23,7 +23,7 @@ return vrndaq_f32(a); } -// CHECK-LABEL: define <2 x float> @test_vrndm_f32(<2 x float> %a) +// CHECK-LABEL: define frozen <2 x float> @test_vrndm_f32(<2 x float> frozen %a) // CHECK-A32: [[VRNDM_V1_I:%.*]] = call <2 x float> @llvm.arm.neon.vrintm.v2f32(<2 x float> %a) // CHECK-A64: [[VRNDM_V1_I:%.*]] = call <2 x float> @llvm.floor.v2f32(<2 x float> %a) // CHECK: ret <2 x float> [[VRNDM_V1_I]] @@ -31,7 +31,7 @@ return vrndm_f32(a); } -// CHECK-LABEL: define <4 x float> @test_vrndmq_f32(<4 x float> %a) +// CHECK-LABEL: define frozen <4 x float> @test_vrndmq_f32(<4 x float> frozen %a) // CHECK-A32: [[VRNDMQ_V1_I:%.*]] = call <4 x float> @llvm.arm.neon.vrintm.v4f32(<4 x float> %a) // CHECK-A64: [[VRNDMQ_V1_I:%.*]] = call <4 x float> @llvm.floor.v4f32(<4 x float> %a) // CHECK: ret <4 x float> [[VRNDMQ_V1_I]] @@ -39,7 +39,7 @@ return vrndmq_f32(a); } -// CHECK-LABEL: define <2 x float> @test_vrndn_f32(<2 x float> %a) +// CHECK-LABEL: define frozen <2 x float> @test_vrndn_f32(<2 x float> frozen %a) // CHECK-A32: [[VRNDN_V1_I:%.*]] = call <2 x float> @llvm.arm.neon.vrintn.v2f32(<2 x float> %a) // CHECK-A64: [[VRNDN_V1_I:%.*]] = call <2 x float> @llvm.aarch64.neon.frintn.v2f32(<2 x float> %a) // CHECK: ret <2 x float> [[VRNDN_V1_I]] @@ -47,7 +47,7 @@ return vrndn_f32(a); } -// CHECK-LABEL: define <4 x float> @test_vrndnq_f32(<4 x float> %a) +// CHECK-LABEL: define frozen <4 x float> @test_vrndnq_f32(<4 x float> frozen %a) // CHECK-A32: [[VRNDNQ_V1_I:%.*]] = call <4 x float> @llvm.arm.neon.vrintn.v4f32(<4 x float> %a) // CHECK-A64: [[VRNDNQ_V1_I:%.*]] = call <4 x float> @llvm.aarch64.neon.frintn.v4f32(<4 x float> %a) // CHECK: ret <4 x float> [[VRNDNQ_V1_I]] @@ -55,7 +55,7 @@ return vrndnq_f32(a); } -// CHECK-LABEL: define <2 x float> @test_vrndp_f32(<2 x float> %a) +// CHECK-LABEL: define frozen <2 x float> @test_vrndp_f32(<2 x float> frozen %a) // CHECK-A32: [[VRNDP_V1_I:%.*]] = call <2 x float> @llvm.arm.neon.vrintp.v2f32(<2 x float> %a) // CHECK-A64: [[VRNDP_V1_I:%.*]] = call <2 x float> @llvm.ceil.v2f32(<2 x float> %a) // CHECK: ret <2 x float> [[VRNDP_V1_I]] @@ -63,7 +63,7 @@ return vrndp_f32(a); } -// CHECK-LABEL: define <4 x float> @test_vrndpq_f32(<4 x float> %a) +// CHECK-LABEL: define frozen <4 x float> @test_vrndpq_f32(<4 x float> frozen %a) // CHECK-A32: [[VRNDPQ_V1_I:%.*]] = call <4 x float> @llvm.arm.neon.vrintp.v4f32(<4 x float> %a) // CHECK-A64: [[VRNDPQ_V1_I:%.*]] = call <4 x float> @llvm.ceil.v4f32(<4 x float> %a) // CHECK: ret <4 x float> [[VRNDPQ_V1_I]] @@ -71,7 +71,7 @@ return vrndpq_f32(a); } -// CHECK-LABEL: define <2 x float> @test_vrndx_f32(<2 x float> %a) +// CHECK-LABEL: define frozen <2 x float> @test_vrndx_f32(<2 x float> frozen %a) // CHECK-A32: [[VRNDX_V1_I:%.*]] = call <2 x float> @llvm.arm.neon.vrintx.v2f32(<2 x float> %a) // CHECK-A64: [[VRNDX_V1_I:%.*]] = call <2 x float> @llvm.rint.v2f32(<2 x float> %a) // CHECK: ret <2 x float> [[VRNDX_V1_I]] @@ -79,7 +79,7 @@ return vrndx_f32(a); } -// CHECK-LABEL: define <4 x float> @test_vrndxq_f32(<4 x float> %a) +// CHECK-LABEL: define frozen <4 x float> @test_vrndxq_f32(<4 x float> frozen %a) // CHECK-A32: [[VRNDXQ_V1_I:%.*]] = call <4 x float> @llvm.arm.neon.vrintx.v4f32(<4 x float> %a) // CHECK-A64: [[VRNDXQ_V1_I:%.*]] = call <4 x float> @llvm.rint.v4f32(<4 x float> %a) // CHECK: ret <4 x float> [[VRNDXQ_V1_I]] @@ -87,7 +87,7 @@ return vrndxq_f32(a); } -// CHECK-LABEL: define <2 x float> @test_vrnd_f32(<2 x float> %a) +// CHECK-LABEL: define frozen <2 x float> @test_vrnd_f32(<2 x float> frozen %a) // CHECK-A32: [[VRND_V1_I:%.*]] = call <2 x float> @llvm.arm.neon.vrintz.v2f32(<2 x float> %a) // CHECK-A64: [[VRND_V1_I:%.*]] = call <2 x float> @llvm.trunc.v2f32(<2 x float> %a) // CHECK: ret <2 x float> [[VRND_V1_I]] @@ -95,7 +95,7 @@ return vrnd_f32(a); } -// CHECK-LABEL: define <4 x float> @test_vrndq_f32(<4 x float> %a) +// CHECK-LABEL: define frozen <4 x float> @test_vrndq_f32(<4 x float> frozen %a) // CHECK-A32: [[VRNDQ_V1_I:%.*]] = call <4 x float> @llvm.arm.neon.vrintz.v4f32(<4 x float> %a) // CHECK-A64: [[VRNDQ_V1_I:%.*]] = call <4 x float> @llvm.trunc.v4f32(<4 x float> %a) // CHECK: ret <4 x float> [[VRNDQ_V1_I]] @@ -103,7 +103,7 @@ return vrndq_f32(a); } -// CHECK-LABEL: define float @test_vrndns_f32(float %a) +// CHECK-LABEL: define frozen float @test_vrndns_f32(float frozen %a) // CHECK-A32: [[VRNDN_I:%.*]] = call float @llvm.arm.neon.vrintn.f32(float %a) // CHECK-A64: [[VRNDN_I:%.*]] = call float @llvm.aarch64.neon.frintn.f32(float %a) // CHECK: ret float [[VRNDN_I]] @@ -111,7 +111,7 @@ return vrndns_f32(a); } -// CHECK-LABEL: define <2 x float> @test_vrndi_f32(<2 x float> %a) +// CHECK-LABEL: define frozen <2 x float> @test_vrndi_f32(<2 x float> frozen %a) // CHECK: [[TMP0:%.*]] = bitcast <2 x float> %a to <8 x i8> // CHECK: [[VRNDI1_I:%.*]] = call <2 x float> @llvm.nearbyint.v2f32(<2 x float> %a) // CHECK: ret <2 x float> [[VRNDI1_I]] @@ -119,7 +119,7 @@ return vrndi_f32(a); } -// CHECK-LABEL: define <4 x float> @test_vrndiq_f32(<4 x float> %a) +// CHECK-LABEL: define frozen <4 x float> @test_vrndiq_f32(<4 x float> frozen %a) // CHECK: [[TMP0:%.*]] = bitcast <4 x float> %a to <16 x i8> // CHECK: [[VRNDI1_I:%.*]] = call <4 x float> @llvm.nearbyint.v4f32(<4 x float> %a) // CHECK: ret <4 x float> [[VRNDI1_I]] diff --git a/clang/test/CodeGen/arm-neon-dot-product.c b/clang/test/CodeGen/arm-neon-dot-product.c --- a/clang/test/CodeGen/arm-neon-dot-product.c +++ b/clang/test/CodeGen/arm-neon-dot-product.c @@ -8,35 +8,35 @@ #include uint32x2_t test_vdot_u32(uint32x2_t a, uint8x8_t b, uint8x8_t c) { -// CHECK-LABEL: define <2 x i32> @test_vdot_u32(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c) +// CHECK-LABEL: define frozen <2 x i32> @test_vdot_u32(<2 x i32> frozen %a, <8 x i8> frozen %b, <8 x i8> frozen %c) // CHECK: [[RESULT:%.*]] = call <2 x i32> @llvm.arm.neon.udot.v2i32.v8i8(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c) // CHECK: ret <2 x i32> [[RESULT]] return vdot_u32(a, b, c); } uint32x4_t test_vdotq_u32(uint32x4_t a, uint8x16_t b, uint8x16_t c) { -// CHECK-LABEL: define <4 x i32> @test_vdotq_u32(<4 x i32> %a, <16 x i8> %b, <16 x i8> %c) +// CHECK-LABEL: define frozen <4 x i32> @test_vdotq_u32(<4 x i32> frozen %a, <16 x i8> frozen %b, <16 x i8> frozen %c) // CHECK: [[RESULT:%.*]] = call <4 x i32> @llvm.arm.neon.udot.v4i32.v16i8(<4 x i32> %a, <16 x i8> %b, <16 x i8> %c) // CHECK: ret <4 x i32> [[RESULT]] return vdotq_u32(a, b, c); } int32x2_t test_vdot_s32(int32x2_t a, int8x8_t b, int8x8_t c) { -// CHECK-LABEL: define <2 x i32> @test_vdot_s32(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c) +// CHECK-LABEL: define frozen <2 x i32> @test_vdot_s32(<2 x i32> frozen %a, <8 x i8> frozen %b, <8 x i8> frozen %c) // CHECK: [[RESULT:%.*]] = call <2 x i32> @llvm.arm.neon.sdot.v2i32.v8i8(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c) // CHECK: ret <2 x i32> [[RESULT]] return vdot_s32(a, b, c); } int32x4_t test_vdotq_s32(int32x4_t a, int8x16_t b, int8x16_t c) { -// CHECK-LABEL: define <4 x i32> @test_vdotq_s32(<4 x i32> %a, <16 x i8> %b, <16 x i8> %c) +// CHECK-LABEL: define frozen <4 x i32> @test_vdotq_s32(<4 x i32> frozen %a, <16 x i8> frozen %b, <16 x i8> frozen %c) // CHECK: [[RESULT:%.*]] = call <4 x i32> @llvm.arm.neon.sdot.v4i32.v16i8(<4 x i32> %a, <16 x i8> %b, <16 x i8> %c) // CHECK: ret <4 x i32> [[RESULT]] return vdotq_s32(a, b, c); } uint32x2_t test_vdot_lane_u32(uint32x2_t a, uint8x8_t b, uint8x8_t c) { -// CHECK-LABEL: define <2 x i32> @test_vdot_lane_u32(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c) +// CHECK-LABEL: define frozen <2 x i32> @test_vdot_lane_u32(<2 x i32> frozen %a, <8 x i8> frozen %b, <8 x i8> frozen %c) // CHECK: [[CAST1:%.*]] = bitcast <8 x i8> %c to <2 x i32> // CHECK: [[SHUFFLE:%.*]] = shufflevector <2 x i32> [[CAST1]], <2 x i32> undef, <2 x i32> // CHECK: [[CAST2:%.*]] = bitcast <2 x i32> [[SHUFFLE]] to <8 x i8> @@ -46,7 +46,7 @@ } uint32x4_t test_vdotq_lane_u32(uint32x4_t a, uint8x16_t b, uint8x8_t c) { -// CHECK-LABEL: define <4 x i32> @test_vdotq_lane_u32(<4 x i32> %a, <16 x i8> %b, <8 x i8> %c) +// CHECK-LABEL: define frozen <4 x i32> @test_vdotq_lane_u32(<4 x i32> frozen %a, <16 x i8> frozen %b, <8 x i8> frozen %c) // CHECK: [[CAST1:%.*]] = bitcast <8 x i8> %c to <2 x i32> // CHECK: [[SHUFFLE:%.*]] = shufflevector <2 x i32> [[CAST1]], <2 x i32> undef, <4 x i32> // CHECK: [[CAST2:%.*]] = bitcast <4 x i32> [[SHUFFLE]] to <16 x i8> @@ -56,7 +56,7 @@ } int32x2_t test_vdot_lane_s32(int32x2_t a, int8x8_t b, int8x8_t c) { -// CHECK-LABEL: define <2 x i32> @test_vdot_lane_s32(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c) +// CHECK-LABEL: define frozen <2 x i32> @test_vdot_lane_s32(<2 x i32> frozen %a, <8 x i8> frozen %b, <8 x i8> frozen %c) // CHECK: [[CAST1:%.*]] = bitcast <8 x i8> %c to <2 x i32> // CHECK: [[SHUFFLE:%.*]] = shufflevector <2 x i32> [[CAST1]], <2 x i32> undef, <2 x i32> // CHECK: [[CAST2:%.*]] = bitcast <2 x i32> [[SHUFFLE]] to <8 x i8> @@ -66,7 +66,7 @@ } int32x4_t test_vdotq_lane_s32(int32x4_t a, int8x16_t b, int8x8_t c) { -// CHECK-LABEL: define <4 x i32> @test_vdotq_lane_s32(<4 x i32> %a, <16 x i8> %b, <8 x i8> %c) +// CHECK-LABEL: define frozen <4 x i32> @test_vdotq_lane_s32(<4 x i32> frozen %a, <16 x i8> frozen %b, <8 x i8> frozen %c) // CHECK: [[CAST1:%.*]] = bitcast <8 x i8> %c to <2 x i32> // CHECK: [[SHUFFLE:%.*]] = shufflevector <2 x i32> [[CAST1]], <2 x i32> undef, <4 x i32> // CHECK: [[CAST2:%.*]] = bitcast <4 x i32> [[SHUFFLE]] to <16 x i8> diff --git a/clang/test/CodeGen/arm-neon-fma.c b/clang/test/CodeGen/arm-neon-fma.c --- a/clang/test/CodeGen/arm-neon-fma.c +++ b/clang/test/CodeGen/arm-neon-fma.c @@ -7,21 +7,21 @@ #include -// CHECK-LABEL: define <2 x float> @test_fma_order(<2 x float> %accum, <2 x float> %lhs, <2 x float> %rhs) #0 { +// CHECK-LABEL: define frozen <2 x float> @test_fma_order(<2 x float> frozen %accum, <2 x float> frozen %lhs, <2 x float> frozen %rhs) #0 { // CHECK: [[TMP6:%.*]] = call <2 x float> @llvm.fma.v2f32(<2 x float> %lhs, <2 x float> %rhs, <2 x float> %accum) #3 // CHECK: ret <2 x float> [[TMP6]] float32x2_t test_fma_order(float32x2_t accum, float32x2_t lhs, float32x2_t rhs) { return vfma_f32(accum, lhs, rhs); } -// CHECK-LABEL: define <4 x float> @test_fmaq_order(<4 x float> %accum, <4 x float> %lhs, <4 x float> %rhs) #1 { +// CHECK-LABEL: define frozen <4 x float> @test_fmaq_order(<4 x float> frozen %accum, <4 x float> frozen %lhs, <4 x float> frozen %rhs) #1 { // CHECK: [[TMP6:%.*]] = call <4 x float> @llvm.fma.v4f32(<4 x float> %lhs, <4 x float> %rhs, <4 x float> %accum) #3 // CHECK: ret <4 x float> [[TMP6]] float32x4_t test_fmaq_order(float32x4_t accum, float32x4_t lhs, float32x4_t rhs) { return vfmaq_f32(accum, lhs, rhs); } -// CHECK-LABEL: define <2 x float> @test_vfma_n_f32(<2 x float> %a, <2 x float> %b, float %n) #0 { +// CHECK-LABEL: define frozen <2 x float> @test_vfma_n_f32(<2 x float> frozen %a, <2 x float> frozen %b, float frozen %n) #0 { // CHECK: [[VECINIT_I:%.*]] = insertelement <2 x float> undef, float %n, i32 0 // CHECK: [[VECINIT1_I:%.*]] = insertelement <2 x float> [[VECINIT_I]], float %n, i32 1 // CHECK: [[TMP1:%.*]] = bitcast <2 x float> %b to <8 x i8> @@ -32,7 +32,7 @@ return vfma_n_f32(a, b, n); } -// CHECK-LABEL: define <4 x float> @test_vfmaq_n_f32(<4 x float> %a, <4 x float> %b, float %n) #1 { +// CHECK-LABEL: define frozen <4 x float> @test_vfmaq_n_f32(<4 x float> frozen %a, <4 x float> frozen %b, float frozen %n) #1 { // CHECK: [[VECINIT_I:%.*]] = insertelement <4 x float> undef, float %n, i32 0 // CHECK: [[VECINIT1_I:%.*]] = insertelement <4 x float> [[VECINIT_I]], float %n, i32 1 // CHECK: [[VECINIT2_I:%.*]] = insertelement <4 x float> [[VECINIT1_I]], float %n, i32 2 diff --git a/clang/test/CodeGen/arm-neon-numeric-maxmin.c b/clang/test/CodeGen/arm-neon-numeric-maxmin.c --- a/clang/test/CodeGen/arm-neon-numeric-maxmin.c +++ b/clang/test/CodeGen/arm-neon-numeric-maxmin.c @@ -2,28 +2,28 @@ #include -// CHECK-LABEL: define <2 x float> @test_vmaxnm_f32(<2 x float> %a, <2 x float> %b) #0 { +// CHECK-LABEL: define frozen <2 x float> @test_vmaxnm_f32(<2 x float> frozen %a, <2 x float> frozen %b) #0 { // CHECK: [[VMAXNM_V2_I:%.*]] = call <2 x float> @llvm.arm.neon.vmaxnm.v2f32(<2 x float> %a, <2 x float> %b) #3 // CHECK: ret <2 x float> [[VMAXNM_V2_I]] float32x2_t test_vmaxnm_f32(float32x2_t a, float32x2_t b) { return vmaxnm_f32(a, b); } -// CHECK-LABEL: define <4 x float> @test_vmaxnmq_f32(<4 x float> %a, <4 x float> %b) #1 { +// CHECK-LABEL: define frozen <4 x float> @test_vmaxnmq_f32(<4 x float> frozen %a, <4 x float> frozen %b) #1 { // CHECK: [[VMAXNMQ_V2_I:%.*]] = call <4 x float> @llvm.arm.neon.vmaxnm.v4f32(<4 x float> %a, <4 x float> %b) #3 // CHECK: ret <4 x float> [[VMAXNMQ_V2_I]] float32x4_t test_vmaxnmq_f32(float32x4_t a, float32x4_t b) { return vmaxnmq_f32(a, b); } -// CHECK-LABEL: define <2 x float> @test_vminnm_f32(<2 x float> %a, <2 x float> %b) #0 { +// CHECK-LABEL: define frozen <2 x float> @test_vminnm_f32(<2 x float> frozen %a, <2 x float> frozen %b) #0 { // CHECK: [[VMINNM_V2_I:%.*]] = call <2 x float> @llvm.arm.neon.vminnm.v2f32(<2 x float> %a, <2 x float> %b) #3 // CHECK: ret <2 x float> [[VMINNM_V2_I]] float32x2_t test_vminnm_f32(float32x2_t a, float32x2_t b) { return vminnm_f32(a, b); } -// CHECK-LABEL: define <4 x float> @test_vminnmq_f32(<4 x float> %a, <4 x float> %b) #1 { +// CHECK-LABEL: define frozen <4 x float> @test_vminnmq_f32(<4 x float> frozen %a, <4 x float> frozen %b) #1 { // CHECK: [[VMINNMQ_V2_I:%.*]] = call <4 x float> @llvm.arm.neon.vminnm.v4f32(<4 x float> %a, <4 x float> %b) #3 // CHECK: ret <4 x float> [[VMINNMQ_V2_I]] float32x4_t test_vminnmq_f32(float32x4_t a, float32x4_t b) { diff --git a/clang/test/CodeGen/arm-neon-vcvtX.c b/clang/test/CodeGen/arm-neon-vcvtX.c --- a/clang/test/CodeGen/arm-neon-vcvtX.c +++ b/clang/test/CodeGen/arm-neon-vcvtX.c @@ -2,112 +2,112 @@ #include -// CHECK-LABEL: define <2 x i32> @test_vcvta_s32_f32(<2 x float> %a) #0 { +// CHECK-LABEL: define frozen <2 x i32> @test_vcvta_s32_f32(<2 x float> frozen %a) #0 { // CHECK: [[VCVTA_S32_V1_I:%.*]] = call <2 x i32> @llvm.arm.neon.vcvtas.v2i32.v2f32(<2 x float> %a) #3 // CHECK: ret <2 x i32> [[VCVTA_S32_V1_I]] int32x2_t test_vcvta_s32_f32(float32x2_t a) { return vcvta_s32_f32(a); } -// CHECK-LABEL: define <2 x i32> @test_vcvta_u32_f32(<2 x float> %a) #0 { +// CHECK-LABEL: define frozen <2 x i32> @test_vcvta_u32_f32(<2 x float> frozen %a) #0 { // CHECK: [[VCVTA_U32_V1_I:%.*]] = call <2 x i32> @llvm.arm.neon.vcvtau.v2i32.v2f32(<2 x float> %a) #3 // CHECK: ret <2 x i32> [[VCVTA_U32_V1_I]] uint32x2_t test_vcvta_u32_f32(float32x2_t a) { return vcvta_u32_f32(a); } -// CHECK-LABEL: define <4 x i32> @test_vcvtaq_s32_f32(<4 x float> %a) #1 { +// CHECK-LABEL: define frozen <4 x i32> @test_vcvtaq_s32_f32(<4 x float> frozen %a) #1 { // CHECK: [[VCVTAQ_S32_V1_I:%.*]] = call <4 x i32> @llvm.arm.neon.vcvtas.v4i32.v4f32(<4 x float> %a) #3 // CHECK: ret <4 x i32> [[VCVTAQ_S32_V1_I]] int32x4_t test_vcvtaq_s32_f32(float32x4_t a) { return vcvtaq_s32_f32(a); } -// CHECK-LABEL: define <4 x i32> @test_vcvtaq_u32_f32(<4 x float> %a) #1 { +// CHECK-LABEL: define frozen <4 x i32> @test_vcvtaq_u32_f32(<4 x float> frozen %a) #1 { // CHECK: [[VCVTAQ_U32_V1_I:%.*]] = call <4 x i32> @llvm.arm.neon.vcvtau.v4i32.v4f32(<4 x float> %a) #3 // CHECK: ret <4 x i32> [[VCVTAQ_U32_V1_I]] uint32x4_t test_vcvtaq_u32_f32(float32x4_t a) { return vcvtaq_u32_f32(a); } -// CHECK-LABEL: define <2 x i32> @test_vcvtn_s32_f32(<2 x float> %a) #0 { +// CHECK-LABEL: define frozen <2 x i32> @test_vcvtn_s32_f32(<2 x float> frozen %a) #0 { // CHECK: [[VCVTN_S32_V1_I:%.*]] = call <2 x i32> @llvm.arm.neon.vcvtns.v2i32.v2f32(<2 x float> %a) #3 // CHECK: ret <2 x i32> [[VCVTN_S32_V1_I]] int32x2_t test_vcvtn_s32_f32(float32x2_t a) { return vcvtn_s32_f32(a); } -// CHECK-LABEL: define <2 x i32> @test_vcvtn_u32_f32(<2 x float> %a) #0 { +// CHECK-LABEL: define frozen <2 x i32> @test_vcvtn_u32_f32(<2 x float> frozen %a) #0 { // CHECK: [[VCVTN_U32_V1_I:%.*]] = call <2 x i32> @llvm.arm.neon.vcvtnu.v2i32.v2f32(<2 x float> %a) #3 // CHECK: ret <2 x i32> [[VCVTN_U32_V1_I]] uint32x2_t test_vcvtn_u32_f32(float32x2_t a) { return vcvtn_u32_f32(a); } -// CHECK-LABEL: define <4 x i32> @test_vcvtnq_s32_f32(<4 x float> %a) #1 { +// CHECK-LABEL: define frozen <4 x i32> @test_vcvtnq_s32_f32(<4 x float> frozen %a) #1 { // CHECK: [[VCVTNQ_S32_V1_I:%.*]] = call <4 x i32> @llvm.arm.neon.vcvtns.v4i32.v4f32(<4 x float> %a) #3 // CHECK: ret <4 x i32> [[VCVTNQ_S32_V1_I]] int32x4_t test_vcvtnq_s32_f32(float32x4_t a) { return vcvtnq_s32_f32(a); } -// CHECK-LABEL: define <4 x i32> @test_vcvtnq_u32_f32(<4 x float> %a) #1 { +// CHECK-LABEL: define frozen <4 x i32> @test_vcvtnq_u32_f32(<4 x float> frozen %a) #1 { // CHECK: [[VCVTNQ_U32_V1_I:%.*]] = call <4 x i32> @llvm.arm.neon.vcvtnu.v4i32.v4f32(<4 x float> %a) #3 // CHECK: ret <4 x i32> [[VCVTNQ_U32_V1_I]] uint32x4_t test_vcvtnq_u32_f32(float32x4_t a) { return vcvtnq_u32_f32(a); } -// CHECK-LABEL: define <2 x i32> @test_vcvtp_s32_f32(<2 x float> %a) #0 { +// CHECK-LABEL: define frozen <2 x i32> @test_vcvtp_s32_f32(<2 x float> frozen %a) #0 { // CHECK: [[VCVTP_S32_V1_I:%.*]] = call <2 x i32> @llvm.arm.neon.vcvtps.v2i32.v2f32(<2 x float> %a) #3 // CHECK: ret <2 x i32> [[VCVTP_S32_V1_I]] int32x2_t test_vcvtp_s32_f32(float32x2_t a) { return vcvtp_s32_f32(a); } -// CHECK-LABEL: define <2 x i32> @test_vcvtp_u32_f32(<2 x float> %a) #0 { +// CHECK-LABEL: define frozen <2 x i32> @test_vcvtp_u32_f32(<2 x float> frozen %a) #0 { // CHECK: [[VCVTP_U32_V1_I:%.*]] = call <2 x i32> @llvm.arm.neon.vcvtpu.v2i32.v2f32(<2 x float> %a) #3 // CHECK: ret <2 x i32> [[VCVTP_U32_V1_I]] uint32x2_t test_vcvtp_u32_f32(float32x2_t a) { return vcvtp_u32_f32(a); } -// CHECK-LABEL: define <4 x i32> @test_vcvtpq_s32_f32(<4 x float> %a) #1 { +// CHECK-LABEL: define frozen <4 x i32> @test_vcvtpq_s32_f32(<4 x float> frozen %a) #1 { // CHECK: [[VCVTPQ_S32_V1_I:%.*]] = call <4 x i32> @llvm.arm.neon.vcvtps.v4i32.v4f32(<4 x float> %a) #3 // CHECK: ret <4 x i32> [[VCVTPQ_S32_V1_I]] int32x4_t test_vcvtpq_s32_f32(float32x4_t a) { return vcvtpq_s32_f32(a); } -// CHECK-LABEL: define <4 x i32> @test_vcvtpq_u32_f32(<4 x float> %a) #1 { +// CHECK-LABEL: define frozen <4 x i32> @test_vcvtpq_u32_f32(<4 x float> frozen %a) #1 { // CHECK: [[VCVTPQ_U32_V1_I:%.*]] = call <4 x i32> @llvm.arm.neon.vcvtpu.v4i32.v4f32(<4 x float> %a) #3 // CHECK: ret <4 x i32> [[VCVTPQ_U32_V1_I]] uint32x4_t test_vcvtpq_u32_f32(float32x4_t a) { return vcvtpq_u32_f32(a); } -// CHECK-LABEL: define <2 x i32> @test_vcvtm_s32_f32(<2 x float> %a) #0 { +// CHECK-LABEL: define frozen <2 x i32> @test_vcvtm_s32_f32(<2 x float> frozen %a) #0 { // CHECK: [[VCVTM_S32_V1_I:%.*]] = call <2 x i32> @llvm.arm.neon.vcvtms.v2i32.v2f32(<2 x float> %a) #3 // CHECK: ret <2 x i32> [[VCVTM_S32_V1_I]] int32x2_t test_vcvtm_s32_f32(float32x2_t a) { return vcvtm_s32_f32(a); } -// CHECK-LABEL: define <2 x i32> @test_vcvtm_u32_f32(<2 x float> %a) #0 { +// CHECK-LABEL: define frozen <2 x i32> @test_vcvtm_u32_f32(<2 x float> frozen %a) #0 { // CHECK: [[VCVTM_U32_V1_I:%.*]] = call <2 x i32> @llvm.arm.neon.vcvtmu.v2i32.v2f32(<2 x float> %a) #3 // CHECK: ret <2 x i32> [[VCVTM_U32_V1_I]] uint32x2_t test_vcvtm_u32_f32(float32x2_t a) { return vcvtm_u32_f32(a); } -// CHECK-LABEL: define <4 x i32> @test_vcvtmq_s32_f32(<4 x float> %a) #1 { +// CHECK-LABEL: define frozen <4 x i32> @test_vcvtmq_s32_f32(<4 x float> frozen %a) #1 { // CHECK: [[VCVTMQ_S32_V1_I:%.*]] = call <4 x i32> @llvm.arm.neon.vcvtms.v4i32.v4f32(<4 x float> %a) #3 // CHECK: ret <4 x i32> [[VCVTMQ_S32_V1_I]] int32x4_t test_vcvtmq_s32_f32(float32x4_t a) { return vcvtmq_s32_f32(a); } -// CHECK-LABEL: define <4 x i32> @test_vcvtmq_u32_f32(<4 x float> %a) #1 { +// CHECK-LABEL: define frozen <4 x i32> @test_vcvtmq_u32_f32(<4 x float> frozen %a) #1 { // CHECK: [[VCVTMQ_U32_V1_I:%.*]] = call <4 x i32> @llvm.arm.neon.vcvtmu.v4i32.v4f32(<4 x float> %a) #3 // CHECK: ret <4 x i32> [[VCVTMQ_U32_V1_I]] uint32x4_t test_vcvtmq_u32_f32(float32x4_t a) { diff --git a/clang/test/CodeGen/arm-pcs.c b/clang/test/CodeGen/arm-pcs.c --- a/clang/test/CodeGen/arm-pcs.c +++ b/clang/test/CodeGen/arm-pcs.c @@ -6,8 +6,8 @@ aapcs_fn bar; int foo(aapcs_vfp_fn baz) { -// CHECK-LABEL: define i32 @foo -// CHECK: call arm_aapcscc -// CHECK: call arm_aapcs_vfpcc +// CHECK-LABEL: define frozen i32 @foo +// CHECK: call arm_aapcscc frozen +// CHECK: call arm_aapcs_vfpcc frozen return bar() + baz(); } diff --git a/clang/test/CodeGen/arm-swiftcall.c b/clang/test/CodeGen/arm-swiftcall.c --- a/clang/test/CodeGen/arm-swiftcall.c +++ b/clang/test/CodeGen/arm-swiftcall.c @@ -1,6 +1,6 @@ -// RUN: %clang_cc1 -triple armv7-apple-darwin9 -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple armv7s-apple-ios9 -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple armv7k-apple-ios9 -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args -triple armv7-apple-darwin9 -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args -triple armv7s-apple-ios9 -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args -triple armv7k-apple-ios9 -emit-llvm -o - %s | FileCheck %s #define SWIFTCALL __attribute__((swiftcall)) #define OUT __attribute__((swift_indirect_result)) @@ -428,7 +428,7 @@ // CHECK-LABEL: define void @test_int8() // CHECK: [[TMP1:%.*]] = alloca [[REC]], align // CHECK: [[TMP2:%.*]] = alloca [[REC]], align -// CHECK: [[CALL:%.*]] = call [[SWIFTCC]] [[UAGG]] @return_int8() +// CHECK: [[CALL:%.*]] = call [[SWIFTCC]] frozen [[UAGG]] @return_int8() // CHECK: [[CAST_TMP:%.*]] = bitcast [[REC]]* [[TMP1]] to [[AGG]]* // CHECK: [[T0:%.*]] = getelementptr inbounds [[AGG]], [[AGG]]* [[CAST_TMP]], i32 0, i32 0 // CHECK: [[T1:%.*]] = extractvalue [[UAGG]] [[CALL]], 0 @@ -471,7 +471,7 @@ // CHECK-LABEL: define void @test_int5() // CHECK: [[TMP1:%.*]] = alloca [[REC]], align // CHECK: [[TMP2:%.*]] = alloca [[REC]], align -// CHECK: [[CALL:%.*]] = call [[SWIFTCC]] [[UAGG]] @return_int5() +// CHECK: [[CALL:%.*]] = call [[SWIFTCC]] frozen [[UAGG]] @return_int5() // CHECK: [[CAST_TMP:%.*]] = bitcast [[REC]]* [[TMP1]] to [[AGG]]* // CHECK: [[T0:%.*]] = getelementptr inbounds [[AGG]], [[AGG]]* [[CAST_TMP]], i32 0, i32 0 // CHECK: [[T1:%.*]] = extractvalue [[UAGG]] [[CALL]], 0 diff --git a/clang/test/CodeGen/arm-varargs.c b/clang/test/CodeGen/arm-varargs.c --- a/clang/test/CodeGen/arm-varargs.c +++ b/clang/test/CodeGen/arm-varargs.c @@ -9,7 +9,7 @@ va_list the_list; int simple_int(void) { -// CHECK-LABEL: define i32 @simple_int +// CHECK-LABEL: define frozen i32 @simple_int return va_arg(the_list, int); // CHECK: [[CUR:%[a-z0-9._]+]] = load i8*, i8** getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 0), align 4 // CHECK: [[NEXT:%[a-z0-9._]+]] = getelementptr inbounds i8, i8* [[CUR]], i32 4 @@ -59,7 +59,7 @@ } double simple_double(void) { -// CHECK-LABEL: define double @simple_double +// CHECK-LABEL: define frozen double @simple_double return va_arg(the_list, double); // CHECK: [[CUR:%[a-z0-9._]+]] = load i8*, i8** getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 0), align 4 // CHECK: [[CUR_INT:%[a-z0-9._]+]] = ptrtoint i8* [[CUR]] to i32 @@ -96,7 +96,7 @@ typedef int underaligned_int __attribute__((packed,aligned(2))); underaligned_int underaligned_int_test() { -// CHECK-LABEL: define i32 @underaligned_int_test() +// CHECK-LABEL: define frozen i32 @underaligned_int_test() return va_arg(the_list, underaligned_int); // CHECK: [[CUR:%[a-z0-9._]+]] = load i8*, i8** getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 0), align 4 // CHECK: [[NEXT:%[a-z0-9._]+]] = getelementptr inbounds i8, i8* [[CUR]], i32 4 @@ -108,7 +108,7 @@ typedef int overaligned_int __attribute__((aligned(32))); overaligned_int overaligned_int_test() { -// CHECK-LABEL: define i32 @overaligned_int_test() +// CHECK-LABEL: define frozen i32 @overaligned_int_test() return va_arg(the_list, overaligned_int); // CHECK: [[CUR:%[a-z0-9._]+]] = load i8*, i8** getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 0), align 4 // CHECK: [[NEXT:%[a-z0-9._]+]] = getelementptr inbounds i8, i8* [[CUR]], i32 4 @@ -120,7 +120,7 @@ typedef long long underaligned_long_long __attribute__((packed,aligned(2))); underaligned_long_long underaligned_long_long_test() { -// CHECK-LABEL: define i64 @underaligned_long_long_test() +// CHECK-LABEL: define frozen i64 @underaligned_long_long_test() return va_arg(the_list, underaligned_long_long); // CHECK: [[CUR:%[a-z0-9._]+]] = load i8*, i8** getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 0), align 4 // CHECK: [[CUR_INT:%[a-z0-9._]+]] = ptrtoint i8* [[CUR]] to i32 @@ -136,7 +136,7 @@ typedef long long overaligned_long_long __attribute__((aligned(32))); overaligned_long_long overaligned_long_long_test() { -// CHECK-LABEL: define i64 @overaligned_long_long_test() +// CHECK-LABEL: define frozen i64 @overaligned_long_long_test() return va_arg(the_list, overaligned_long_long); // CHECK: [[CUR:%[a-z0-9._]+]] = load i8*, i8** getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 0), align 4 // CHECK: [[CUR_INT:%[a-z0-9._]+]] = ptrtoint i8* [[CUR]] to i32 @@ -312,7 +312,7 @@ } void check_start(int n, ...) { -// CHECK-LABEL: define void @check_start(i32 %n, ...) +// CHECK-LABEL: define void @check_start(i32 frozen %n, ...) va_list the_list; va_start(the_list, n); diff --git a/clang/test/CodeGen/arm-vector-arguments.c b/clang/test/CodeGen/arm-vector-arguments.c --- a/clang/test/CodeGen/arm-vector-arguments.c +++ b/clang/test/CodeGen/arm-vector-arguments.c @@ -9,7 +9,7 @@ #include -// CHECK: define void @f0(%struct.int8x16x2_t* noalias sret align 16 %agg.result, <16 x i8> %{{.*}}, <16 x i8> %{{.*}}) +// CHECK: define void @f0(%struct.int8x16x2_t* noalias sret align 16 %agg.result, <16 x i8> frozen %{{.*}}, <16 x i8> frozen %{{.*}}) int8x16x2_t f0(int8x16_t a0, int8x16_t a1) { return vzipq_s8(a0, a1); } @@ -21,11 +21,11 @@ typedef float T_float32x8 __attribute__ ((__vector_size__ (32))); typedef float T_float32x16 __attribute__ ((__vector_size__ (64))); -// CHECK: define <2 x float> @f1_0(<2 x float> %{{.*}}) +// CHECK: define frozen <2 x float> @f1_0(<2 x float> frozen %{{.*}}) T_float32x2 f1_0(T_float32x2 a0) { return a0; } -// CHECK: define <4 x float> @f1_1(<4 x float> %{{.*}}) +// CHECK: define frozen <4 x float> @f1_1(<4 x float> frozen %{{.*}}) T_float32x4 f1_1(T_float32x4 a0) { return a0; } -// CHECK: define void @f1_2(<8 x float>* noalias sret align 32 %{{.*}}, <8 x float> %{{.*}}) +// CHECK: define void @f1_2(<8 x float>* noalias sret align 32 %{{.*}}, <8 x float> frozen %{{.*}}) T_float32x8 f1_2(T_float32x8 a0) { return a0; } -// CHECK: define void @f1_3(<16 x float>* noalias sret align 64 %{{.*}}, <16 x float> %{{.*}}) +// CHECK: define void @f1_3(<16 x float>* noalias sret align 64 %{{.*}}, <16 x float> frozen %{{.*}}) T_float32x16 f1_3(T_float32x16 a0) { return a0; } diff --git a/clang/test/CodeGen/arm-vfp16-arguments.c b/clang/test/CodeGen/arm-vfp16-arguments.c --- a/clang/test/CodeGen/arm-vfp16-arguments.c +++ b/clang/test/CodeGen/arm-vfp16-arguments.c @@ -1,10 +1,10 @@ -// RUN: %clang_cc1 -triple armv7a--none-eabi -target-abi aapcs \ +// RUN: %clang_cc1 -disable-frozen-args -triple armv7a--none-eabi -target-abi aapcs \ // RUN: -mfloat-abi soft -target-feature +neon -emit-llvm -o - -O1 %s \ // RUN: | FileCheck %s --check-prefix=CHECK-SOFT -// RUN: %clang_cc1 -triple armv7a--none-eabi -target-abi aapcs \ +// RUN: %clang_cc1 -disable-frozen-args -triple armv7a--none-eabi -target-abi aapcs \ // RUN: -mfloat-abi hard -target-feature +neon -emit-llvm -o - -O1 %s \ // RUN: | FileCheck %s --check-prefix=CHECK-HARD -// RUN: %clang_cc1 -triple armv7a--none-eabi -target-abi aapcs \ +// RUN: %clang_cc1 -disable-frozen-args -triple armv7a--none-eabi -target-abi aapcs \ // RUN: -mfloat-abi hard -target-feature +neon -target-feature +fullfp16 \ // RUN: -emit-llvm -o - -O1 %s \ // RUN: | FileCheck %s --check-prefix=CHECK-FULL @@ -29,15 +29,15 @@ // CHECK-FULL: store <4 x half> %a, <4 x half>* @g4 float16x4_t ld4(void) { return g4; } -// CHECK-SOFT: define <2 x i32> @ld4() +// CHECK-SOFT: define frozen <2 x i32> @ld4() // CHECK-SOFT: %0 = load <2 x i32>, <2 x i32>* bitcast (<4 x half>* @g4 to <2 x i32>*) // CHECK-SOFT: ret <2 x i32> %0 // -// CHECK-HARD: define arm_aapcs_vfpcc <2 x i32> @ld4() +// CHECK-HARD: define arm_aapcs_vfpcc frozen <2 x i32> @ld4() // CHECK-HARD: %0 = load <2 x i32>, <2 x i32>* bitcast (<4 x half>* @g4 to <2 x i32>*) // CHECK-HARD: ret <2 x i32> %0 // -// CHECK-FULL: define arm_aapcs_vfpcc <4 x half> @ld4() +// CHECK-FULL: define arm_aapcs_vfpcc frozen <4 x half> @ld4() // CHECK-FULL: %0 = load <4 x half>, <4 x half>* @g4 // CHECK-FULL: ret <4 x half> %0 @@ -52,15 +52,15 @@ // CHECK-FULL: store <8 x half> %a, <8 x half>* @g8 float16x8_t ld8(void) { return g8; } -// CHECK-SOFT: define <4 x i32> @ld8() +// CHECK-SOFT: define frozen <4 x i32> @ld8() // CHECK-SOFT: %0 = load <4 x i32>, <4 x i32>* bitcast (<8 x half>* @g8 to <4 x i32>*) // CHECK-SOFT: ret <4 x i32> %0 // -// CHECK-HARD: define arm_aapcs_vfpcc <4 x i32> @ld8() +// CHECK-HARD: define arm_aapcs_vfpcc frozen <4 x i32> @ld8() // CHECK-HARD: %0 = load <4 x i32>, <4 x i32>* bitcast (<8 x half>* @g8 to <4 x i32>*) // CHECK-HARD: ret <4 x i32> %0 // -// CHECK-FULL: define arm_aapcs_vfpcc <8 x half> @ld8() +// CHECK-FULL: define arm_aapcs_vfpcc frozen <8 x half> @ld8() // CHECK-FULL: %0 = load <8 x half>, <8 x half>* @g8 // CHECK-FULL: ret <8 x half> %0 diff --git a/clang/test/CodeGen/arm-vfp16-arguments2.cpp b/clang/test/CodeGen/arm-vfp16-arguments2.cpp --- a/clang/test/CodeGen/arm-vfp16-arguments2.cpp +++ b/clang/test/CodeGen/arm-vfp16-arguments2.cpp @@ -1,10 +1,10 @@ -// RUN: %clang_cc1 -triple armv7a--none-eabi -target-abi aapcs \ +// RUN: %clang_cc1 -disable-frozen-args -triple armv7a--none-eabi -target-abi aapcs \ // RUN: -mfloat-abi soft -target-feature +neon -emit-llvm -o - -O2 %s \ // RUN: | FileCheck %s --check-prefix=CHECK-SOFT -// RUN: %clang_cc1 -triple armv7a--none-eabi -target-abi aapcs \ +// RUN: %clang_cc1 -disable-frozen-args -triple armv7a--none-eabi -target-abi aapcs \ // RUN: -mfloat-abi hard -target-feature +neon -emit-llvm -o - -O2 %s \ // RUN: | FileCheck %s --check-prefix=CHECK-HARD -// RUN: %clang_cc1 -triple armv7a--none-eabi -target-abi aapcs \ +// RUN: %clang_cc1 -disable-frozen-args -triple armv7a--none-eabi -target-abi aapcs \ // RUN: -mfloat-abi hard -target-feature +neon -target-feature +fullfp16 \ // RUN: -emit-llvm -o - -O2 %s \ // RUN: | FileCheck %s --check-prefix=CHECK-FULL diff --git a/clang/test/CodeGen/arm64-aapcs-arguments.c b/clang/test/CodeGen/arm64-aapcs-arguments.c --- a/clang/test/CodeGen/arm64-aapcs-arguments.c +++ b/clang/test/CodeGen/arm64-aapcs-arguments.c @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -triple aarch64-linux-gnu -target-feature +neon -target-abi aapcs -ffreestanding -fallow-half-arguments-and-returns -emit-llvm -w -o - %s | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args -triple aarch64-linux-gnu -target-feature +neon -target-abi aapcs -ffreestanding -fallow-half-arguments-and-returns -emit-llvm -w -o - %s | FileCheck %s // AAPCS clause C.8 says: If the argument has an alignment of 16 then the NGRN // is rounded up to the next even number. @@ -37,12 +37,12 @@ // It's the job of the argument *consumer* to perform the required sign & zero // extensions under AAPCS. There shouldn't be -// CHECK: define i8 @test5(i8 %a, i16 %b) +// CHECK: define frozen i8 @test5(i8 %a, i16 %b) unsigned char test5(unsigned char a, signed short b) { } // __fp16 can be used as a function argument or return type (ACLE 2.0) -// CHECK: define half @test_half(half %{{.*}}) +// CHECK: define frozen half @test_half(half %{{.*}}) __fp16 test_half(__fp16 A) { } // __fp16 is a base type for homogeneous floating-point aggregates for AArch64 (but not 32-bit ARM). diff --git a/clang/test/CodeGen/arm64-abi-vector.c b/clang/test/CodeGen/arm64-abi-vector.c --- a/clang/test/CodeGen/arm64-abi-vector.c +++ b/clang/test/CodeGen/arm64-abi-vector.c @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -triple arm64-apple-ios7 -target-abi darwinpcs -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-linux-android -emit-llvm -o - %s | FileCheck -check-prefix=ANDROID %s +// RUN: %clang_cc1 -disable-frozen-args -triple arm64-apple-ios7 -target-abi darwinpcs -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args -triple aarch64-linux-android -emit-llvm -o - %s | FileCheck -check-prefix=ANDROID %s #include @@ -31,7 +31,7 @@ } double test_2c(__char2 *in) { -// ANDROID: call double (i32, ...) @varargs_vec_2c(i32 3, i16 {{%.*}}) +// ANDROID: call frozen double (i32, ...) @varargs_vec_2c(i32 3, i16 {{%.*}}) return varargs_vec_2c(3, *in); } @@ -51,7 +51,7 @@ double test_3c(__char3 *in) { // CHECK: test_3c -// CHECK: call double (i32, ...) @varargs_vec_3c(i32 3, i32 {{%.*}}) +// CHECK: call frozen double (i32, ...) @varargs_vec_3c(i32 3, i32 {{%.*}}) return varargs_vec_3c(3, *in); } @@ -71,7 +71,7 @@ double test_4c(__char4 *in) { // CHECK: test_4c -// CHECK: call double (i32, ...) @varargs_vec_4c(i32 4, i32 {{%.*}}) +// CHECK: call frozen double (i32, ...) @varargs_vec_4c(i32 4, i32 {{%.*}}) return varargs_vec_4c(4, *in); } @@ -91,7 +91,7 @@ double test_5c(__char5 *in) { // CHECK: test_5c -// CHECK: call double (i32, ...) @varargs_vec_5c(i32 5, <2 x i32> {{%.*}}) +// CHECK: call frozen double (i32, ...) @varargs_vec_5c(i32 5, <2 x i32> {{%.*}}) return varargs_vec_5c(5, *in); } @@ -113,7 +113,7 @@ double test_9c(__char9 *in) { // CHECK: test_9c -// CHECK: call double (i32, ...) @varargs_vec_9c(i32 9, <4 x i32> {{%.*}}) +// CHECK: call frozen double (i32, ...) @varargs_vec_9c(i32 9, <4 x i32> {{%.*}}) return varargs_vec_9c(9, *in); } @@ -133,7 +133,7 @@ double test_19c(__char19 *in) { // CHECK: test_19c -// CHECK: call double (i32, ...) @varargs_vec_19c(i32 19, <19 x i8>* {{%.*}}) +// CHECK: call frozen double (i32, ...) @varargs_vec_19c(i32 19, <19 x i8>* {{%.*}}) return varargs_vec_19c(19, *in); } @@ -153,7 +153,7 @@ double test_3s(__short3 *in) { // CHECK: test_3s -// CHECK: call double (i32, ...) @varargs_vec_3s(i32 3, <2 x i32> {{%.*}}) +// CHECK: call frozen double (i32, ...) @varargs_vec_3s(i32 3, <2 x i32> {{%.*}}) return varargs_vec_3s(3, *in); } @@ -175,7 +175,7 @@ double test_5s(__short5 *in) { // CHECK: test_5s -// CHECK: call double (i32, ...) @varargs_vec_5s(i32 5, <4 x i32> {{%.*}}) +// CHECK: call frozen double (i32, ...) @varargs_vec_5s(i32 5, <4 x i32> {{%.*}}) return varargs_vec_5s(5, *in); } @@ -197,7 +197,7 @@ double test_3i(__int3 *in) { // CHECK: test_3i -// CHECK: call double (i32, ...) @varargs_vec_3i(i32 3, <4 x i32> {{%.*}}) +// CHECK: call frozen double (i32, ...) @varargs_vec_3i(i32 3, <4 x i32> {{%.*}}) return varargs_vec_3i(3, *in); } @@ -218,7 +218,7 @@ double test_5i(__int5 *in) { // CHECK: test_5i -// CHECK: call double (i32, ...) @varargs_vec_5i(i32 5, <5 x i32>* {{%.*}}) +// CHECK: call frozen double (i32, ...) @varargs_vec_5i(i32 5, <5 x i32>* {{%.*}}) return varargs_vec_5i(5, *in); } @@ -239,7 +239,7 @@ double test_3d(__double3 *in) { // CHECK: test_3d -// CHECK: call double (i32, ...) @varargs_vec_3d(i32 3, <3 x double>* {{%.*}}) +// CHECK: call frozen double (i32, ...) @varargs_vec_3d(i32 3, <3 x double>* {{%.*}}) return varargs_vec_3d(3, *in); } @@ -301,7 +301,7 @@ __short3 *s3, __short5 *s5, __int3 *i3, __int5 *i5, __double3 *d3) { double ret = varargs_vec(3, *c3, *c5, *c9, *c19, *s3, *s5, *i3, *i5, *d3); -// CHECK: call double (i32, ...) @varargs_vec(i32 3, i32 {{%.*}}, <2 x i32> {{%.*}}, <4 x i32> {{%.*}}, <19 x i8>* {{%.*}}, <2 x i32> {{%.*}}, <4 x i32> {{%.*}}, <4 x i32> {{%.*}}, <5 x i32>* {{%.*}}, <3 x double>* {{%.*}}) +// CHECK: call frozen double (i32, ...) @varargs_vec(i32 3, i32 {{%.*}}, <2 x i32> {{%.*}}, <4 x i32> {{%.*}}, <19 x i8>* {{%.*}}, <2 x i32> {{%.*}}, <4 x i32> {{%.*}}, <4 x i32> {{%.*}}, <5 x i32>* {{%.*}}, <3 x double>* {{%.*}}) return ret; } @@ -317,7 +317,7 @@ double fixed_3c(__char3 *in) { // CHECK: fixed_3c -// CHECK: call double @args_vec_3c(i32 3, i32 {{%.*}}) +// CHECK: call frozen double @args_vec_3c(i32 3, i32 {{%.*}}) return args_vec_3c(3, *in); } @@ -333,7 +333,7 @@ double fixed_5c(__char5 *in) { // CHECK: fixed_5c -// CHECK: call double @args_vec_5c(i32 5, <2 x i32> {{%.*}}) +// CHECK: call frozen double @args_vec_5c(i32 5, <2 x i32> {{%.*}}) return args_vec_5c(5, *in); } @@ -349,7 +349,7 @@ double fixed_9c(__char9 *in) { // CHECK: fixed_9c -// CHECK: call double @args_vec_9c(i32 9, <4 x i32> {{%.*}}) +// CHECK: call frozen double @args_vec_9c(i32 9, <4 x i32> {{%.*}}) return args_vec_9c(9, *in); } @@ -363,7 +363,7 @@ double fixed_19c(__char19 *in) { // CHECK: fixed_19c -// CHECK: call double @args_vec_19c(i32 19, <19 x i8>* {{%.*}}) +// CHECK: call frozen double @args_vec_19c(i32 19, <19 x i8>* {{%.*}}) return args_vec_19c(19, *in); } @@ -379,7 +379,7 @@ double fixed_3s(__short3 *in) { // CHECK: fixed_3s -// CHECK: call double @args_vec_3s(i32 3, <2 x i32> {{%.*}}) +// CHECK: call frozen double @args_vec_3s(i32 3, <2 x i32> {{%.*}}) return args_vec_3s(3, *in); } @@ -395,7 +395,7 @@ double fixed_5s(__short5 *in) { // CHECK: fixed_5s -// CHECK: call double @args_vec_5s(i32 5, <4 x i32> {{%.*}}) +// CHECK: call frozen double @args_vec_5s(i32 5, <4 x i32> {{%.*}}) return args_vec_5s(5, *in); } @@ -411,7 +411,7 @@ double fixed_3i(__int3 *in) { // CHECK: fixed_3i -// CHECK: call double @args_vec_3i(i32 3, <4 x i32> {{%.*}}) +// CHECK: call frozen double @args_vec_3i(i32 3, <4 x i32> {{%.*}}) return args_vec_3i(3, *in); } @@ -425,7 +425,7 @@ double fixed_5i(__int5 *in) { // CHECK: fixed_5i -// CHECK: call double @args_vec_5i(i32 5, <5 x i32>* {{%.*}}) +// CHECK: call frozen double @args_vec_5i(i32 5, <5 x i32>* {{%.*}}) return args_vec_5i(5, *in); } @@ -441,6 +441,6 @@ double fixed_3d(__double3 *in) { // CHECK: fixed_3d -// CHECK: call double @args_vec_3d(i32 3, <3 x double>* {{%.*}}) +// CHECK: call frozen double @args_vec_3d(i32 3, <3 x double>* {{%.*}}) return args_vec_3d(3, *in); } diff --git a/clang/test/CodeGen/arm64-arguments.c b/clang/test/CodeGen/arm64-arguments.c --- a/clang/test/CodeGen/arm64-arguments.c +++ b/clang/test/CodeGen/arm64-arguments.c @@ -1,6 +1,6 @@ -// RUN: %clang_cc1 -triple arm64-apple-ios7 -target-feature +neon -target-abi darwinpcs -ffreestanding -emit-llvm -w -o - %s | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args -triple arm64-apple-ios7 -target-feature +neon -target-abi darwinpcs -ffreestanding -emit-llvm -w -o - %s | FileCheck %s -// CHECK: define signext i8 @f0() +// CHECK: define frozen signext i8 @f0() char f0(void) { return 0; } @@ -89,12 +89,12 @@ struct s21 { struct {} f1; int f0 : 4; }; struct s21 f21(void) {} -// CHECK: define i64 @f22() -// CHECK: define i64 @f23() -// CHECK: define i64 @f24() -// CHECK: define [2 x i64] @f25() -// CHECK: define { float, float } @f26() -// CHECK: define { double, double } @f27() +// CHECK: define frozen i64 @f22() +// CHECK: define frozen i64 @f23() +// CHECK: define frozen i64 @f24() +// CHECK: define frozen [2 x i64] @f25() +// CHECK: define frozen { float, float } @f26() +// CHECK: define frozen { double, double } @f27() _Complex char f22(void) {} _Complex short f23(void) {} _Complex int f24(void) {} @@ -176,9 +176,9 @@ typedef float T_float32x8 __attribute__ ((__vector_size__ (32))); typedef float T_float32x16 __attribute__ ((__vector_size__ (64))); -// CHECK: define <2 x float> @f1_0(<2 x float> %{{.*}}) +// CHECK: define frozen <2 x float> @f1_0(<2 x float> %{{.*}}) T_float32x2 f1_0(T_float32x2 a0) { return a0; } -// CHECK: define <4 x float> @f1_1(<4 x float> %{{.*}}) +// CHECK: define frozen <4 x float> @f1_1(<4 x float> %{{.*}}) T_float32x4 f1_1(T_float32x4 a0) { return a0; } // Vector with length bigger than 16-byte is illegal and is passed indirectly. // CHECK: define void @f1_2(<8 x float>* noalias sret align 16 %{{.*}}, <8 x float>* %0) @@ -196,7 +196,7 @@ typedef __attribute__((neon_vector_type(4))) float float32x4_t; float32x4_t f35(int i, s35_with_align s1, s35_with_align s2) { -// CHECK: define <4 x float> @f35(i32 %i, [4 x float] %s1.coerce, [4 x float] %s2.coerce) +// CHECK: define frozen <4 x float> @f35(i32 %i, [4 x float] %s1.coerce, [4 x float] %s2.coerce) // CHECK: %s1 = alloca %struct.s35, align 16 // CHECK: %s2 = alloca %struct.s35, align 16 // CHECK: %[[a:.*]] = bitcast %struct.s35* %s1 to <4 x float>* @@ -216,7 +216,7 @@ typedef __attribute__((neon_vector_type(4))) int int32x4_t; int32x4_t f36(int i, s36_with_align s1, s36_with_align s2) { -// CHECK: define <4 x i32> @f36(i32 %i, i128 %s1.coerce, i128 %s2.coerce) +// CHECK: define frozen <4 x i32> @f36(i32 %i, i128 %s1.coerce, i128 %s2.coerce) // CHECK: %s1 = alloca %struct.s36, align 16 // CHECK: %s2 = alloca %struct.s36, align 16 // CHECK: store i128 %s1.coerce, i128* %{{.*}}, align 16 @@ -237,7 +237,7 @@ typedef struct s37 s37_with_align; int32x4_t f37(int i, s37_with_align s1, s37_with_align s2) { -// CHECK: define <4 x i32> @f37(i32 %i, %struct.s37* %s1, %struct.s37* %s2) +// CHECK: define frozen <4 x i32> @f37(i32 %i, %struct.s37* %s1, %struct.s37* %s2) // CHECK: %[[a:.*]] = bitcast %struct.s37* %s1 to <4 x i32>* // CHECK: load <4 x i32>, <4 x i32>* %[[a]], align 16 // CHECK: %[[b:.*]] = bitcast %struct.s37* %s2 to <4 x i32>* @@ -253,7 +253,7 @@ // CHECK: %[[b:.*]] = alloca %struct.s37, align 16 // CHECK: call void @llvm.memcpy // CHECK: call void @llvm.memcpy -// CHECK: call <4 x i32> @f37(i32 3, %struct.s37* %[[a]], %struct.s37* %[[b]]) +// CHECK: call frozen <4 x i32> @f37(i32 3, %struct.s37* %[[a]], %struct.s37* %[[b]]) return f37(3, g37, g37); } @@ -272,7 +272,7 @@ // passing structs in registers __attribute__ ((noinline)) int f38(int i, s38_no_align s1, s38_no_align s2) { -// CHECK: define i32 @f38(i32 %i, i64 %s1.coerce, i64 %s2.coerce) +// CHECK: define frozen i32 @f38(i32 %i, i64 %s1.coerce, i64 %s2.coerce) // CHECK: %s1 = alloca %struct.s38, align 4 // CHECK: %s2 = alloca %struct.s38, align 4 // CHECK: store i64 %s1.coerce, i64* %{{.*}}, align 4 @@ -286,17 +286,17 @@ s38_no_align g38; s38_no_align g38_2; int caller38() { -// CHECK: define i32 @caller38() +// CHECK: define frozen i32 @caller38() // CHECK: %[[a:.*]] = load i64, i64* bitcast (%struct.s38* @g38 to i64*), align 4 // CHECK: %[[b:.*]] = load i64, i64* bitcast (%struct.s38* @g38_2 to i64*), align 4 -// CHECK: call i32 @f38(i32 3, i64 %[[a]], i64 %[[b]]) +// CHECK: call frozen i32 @f38(i32 3, i64 %[[a]], i64 %[[b]]) return f38(3, g38, g38_2); } // passing structs on stack __attribute__ ((noinline)) int f38_stack(int i, int i2, int i3, int i4, int i5, int i6, int i7, int i8, int i9, s38_no_align s1, s38_no_align s2) { -// CHECK: define i32 @f38_stack(i32 %i, i32 %i2, i32 %i3, i32 %i4, i32 %i5, i32 %i6, i32 %i7, i32 %i8, i32 %i9, i64 %s1.coerce, i64 %s2.coerce) +// CHECK: define frozen i32 @f38_stack(i32 %i, i32 %i2, i32 %i3, i32 %i4, i32 %i5, i32 %i6, i32 %i7, i32 %i8, i32 %i9, i64 %s1.coerce, i64 %s2.coerce) // CHECK: %s1 = alloca %struct.s38, align 4 // CHECK: %s2 = alloca %struct.s38, align 4 // CHECK: store i64 %s1.coerce, i64* %{{.*}}, align 4 @@ -308,10 +308,10 @@ return s1.i + s2.i + i + i2 + i3 + i4 + i5 + i6 + i7 + i8 + i9 + s1.s + s2.s; } int caller38_stack() { -// CHECK: define i32 @caller38_stack() +// CHECK: define frozen i32 @caller38_stack() // CHECK: %[[a:.*]] = load i64, i64* bitcast (%struct.s38* @g38 to i64*), align 4 // CHECK: %[[b:.*]] = load i64, i64* bitcast (%struct.s38* @g38_2 to i64*), align 4 -// CHECK: call i32 @f38_stack(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i64 %[[a]], i64 %[[b]]) +// CHECK: call frozen i32 @f38_stack(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i64 %[[a]], i64 %[[b]]) return f38_stack(1, 2, 3, 4, 5, 6, 7, 8, 9, g38, g38_2); } @@ -325,7 +325,7 @@ // passing aligned structs in registers __attribute__ ((noinline)) int f39(int i, s39_with_align s1, s39_with_align s2) { -// CHECK: define i32 @f39(i32 %i, i128 %s1.coerce, i128 %s2.coerce) +// CHECK: define frozen i32 @f39(i32 %i, i128 %s1.coerce, i128 %s2.coerce) // CHECK: %s1 = alloca %struct.s39, align 16 // CHECK: %s2 = alloca %struct.s39, align 16 // CHECK: store i128 %s1.coerce, i128* %{{.*}}, align 16 @@ -339,17 +339,17 @@ s39_with_align g39; s39_with_align g39_2; int caller39() { -// CHECK: define i32 @caller39() +// CHECK: define frozen i32 @caller39() // CHECK: %[[a:.*]] = load i128, i128* bitcast (%struct.s39* @g39 to i128*), align 16 // CHECK: %[[b:.*]] = load i128, i128* bitcast (%struct.s39* @g39_2 to i128*), align 16 -// CHECK: call i32 @f39(i32 3, i128 %[[a]], i128 %[[b]]) +// CHECK: call frozen i32 @f39(i32 3, i128 %[[a]], i128 %[[b]]) return f39(3, g39, g39_2); } // passing aligned structs on stack __attribute__ ((noinline)) int f39_stack(int i, int i2, int i3, int i4, int i5, int i6, int i7, int i8, int i9, s39_with_align s1, s39_with_align s2) { -// CHECK: define i32 @f39_stack(i32 %i, i32 %i2, i32 %i3, i32 %i4, i32 %i5, i32 %i6, i32 %i7, i32 %i8, i32 %i9, i128 %s1.coerce, i128 %s2.coerce) +// CHECK: define frozen i32 @f39_stack(i32 %i, i32 %i2, i32 %i3, i32 %i4, i32 %i5, i32 %i6, i32 %i7, i32 %i8, i32 %i9, i128 %s1.coerce, i128 %s2.coerce) // CHECK: %s1 = alloca %struct.s39, align 16 // CHECK: %s2 = alloca %struct.s39, align 16 // CHECK: store i128 %s1.coerce, i128* %{{.*}}, align 16 @@ -361,10 +361,10 @@ return s1.i + s2.i + i + i2 + i3 + i4 + i5 + i6 + i7 + i8 + i9 + s1.s + s2.s; } int caller39_stack() { -// CHECK: define i32 @caller39_stack() +// CHECK: define frozen i32 @caller39_stack() // CHECK: %[[a:.*]] = load i128, i128* bitcast (%struct.s39* @g39 to i128*), align 16 // CHECK: %[[b:.*]] = load i128, i128* bitcast (%struct.s39* @g39_2 to i128*), align 16 -// CHECK: call i32 @f39_stack(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i128 %[[a]], i128 %[[b]]) +// CHECK: call frozen i32 @f39_stack(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i128 %[[a]], i128 %[[b]]) return f39_stack(1, 2, 3, 4, 5, 6, 7, 8, 9, g39, g39_2); } @@ -380,7 +380,7 @@ // passing structs in registers __attribute__ ((noinline)) int f40(int i, s40_no_align s1, s40_no_align s2) { -// CHECK: define i32 @f40(i32 %i, [2 x i64] %s1.coerce, [2 x i64] %s2.coerce) +// CHECK: define frozen i32 @f40(i32 %i, [2 x i64] %s1.coerce, [2 x i64] %s2.coerce) // CHECK: %s1 = alloca %struct.s40, align 4 // CHECK: %s2 = alloca %struct.s40, align 4 // CHECK: store [2 x i64] %s1.coerce, [2 x i64]* %{{.*}}, align 4 @@ -394,17 +394,17 @@ s40_no_align g40; s40_no_align g40_2; int caller40() { -// CHECK: define i32 @caller40() +// CHECK: define frozen i32 @caller40() // CHECK: %[[a:.*]] = load [2 x i64], [2 x i64]* bitcast (%struct.s40* @g40 to [2 x i64]*), align 4 // CHECK: %[[b:.*]] = load [2 x i64], [2 x i64]* bitcast (%struct.s40* @g40_2 to [2 x i64]*), align 4 -// CHECK: call i32 @f40(i32 3, [2 x i64] %[[a]], [2 x i64] %[[b]]) +// CHECK: call frozen i32 @f40(i32 3, [2 x i64] %[[a]], [2 x i64] %[[b]]) return f40(3, g40, g40_2); } // passing structs on stack __attribute__ ((noinline)) int f40_stack(int i, int i2, int i3, int i4, int i5, int i6, int i7, int i8, int i9, s40_no_align s1, s40_no_align s2) { -// CHECK: define i32 @f40_stack(i32 %i, i32 %i2, i32 %i3, i32 %i4, i32 %i5, i32 %i6, i32 %i7, i32 %i8, i32 %i9, [2 x i64] %s1.coerce, [2 x i64] %s2.coerce) +// CHECK: define frozen i32 @f40_stack(i32 %i, i32 %i2, i32 %i3, i32 %i4, i32 %i5, i32 %i6, i32 %i7, i32 %i8, i32 %i9, [2 x i64] %s1.coerce, [2 x i64] %s2.coerce) // CHECK: %s1 = alloca %struct.s40, align 4 // CHECK: %s2 = alloca %struct.s40, align 4 // CHECK: store [2 x i64] %s1.coerce, [2 x i64]* %{{.*}}, align 4 @@ -416,10 +416,10 @@ return s1.i + s2.i + i + i2 + i3 + i4 + i5 + i6 + i7 + i8 + i9 + s1.s + s2.s; } int caller40_stack() { -// CHECK: define i32 @caller40_stack() +// CHECK: define frozen i32 @caller40_stack() // CHECK: %[[a:.*]] = load [2 x i64], [2 x i64]* bitcast (%struct.s40* @g40 to [2 x i64]*), align 4 // CHECK: %[[b:.*]] = load [2 x i64], [2 x i64]* bitcast (%struct.s40* @g40_2 to [2 x i64]*), align 4 -// CHECK: call i32 @f40_stack(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, [2 x i64] %[[a]], [2 x i64] %[[b]]) +// CHECK: call frozen i32 @f40_stack(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, [2 x i64] %[[a]], [2 x i64] %[[b]]) return f40_stack(1, 2, 3, 4, 5, 6, 7, 8, 9, g40, g40_2); } @@ -435,7 +435,7 @@ // passing aligned structs in registers __attribute__ ((noinline)) int f41(int i, s41_with_align s1, s41_with_align s2) { -// CHECK: define i32 @f41(i32 %i, i128 %s1.coerce, i128 %s2.coerce) +// CHECK: define frozen i32 @f41(i32 %i, i128 %s1.coerce, i128 %s2.coerce) // CHECK: %s1 = alloca %struct.s41, align 16 // CHECK: %s2 = alloca %struct.s41, align 16 // CHECK: store i128 %s1.coerce, i128* %{{.*}}, align 16 @@ -449,17 +449,17 @@ s41_with_align g41; s41_with_align g41_2; int caller41() { -// CHECK: define i32 @caller41() +// CHECK: define frozen i32 @caller41() // CHECK: %[[a:.*]] = load i128, i128* bitcast (%struct.s41* @g41 to i128*), align 16 // CHECK: %[[b:.*]] = load i128, i128* bitcast (%struct.s41* @g41_2 to i128*), align 16 -// CHECK: call i32 @f41(i32 3, i128 %[[a]], i128 %[[b]]) +// CHECK: call frozen i32 @f41(i32 3, i128 %[[a]], i128 %[[b]]) return f41(3, g41, g41_2); } // passing aligned structs on stack __attribute__ ((noinline)) int f41_stack(int i, int i2, int i3, int i4, int i5, int i6, int i7, int i8, int i9, s41_with_align s1, s41_with_align s2) { -// CHECK: define i32 @f41_stack(i32 %i, i32 %i2, i32 %i3, i32 %i4, i32 %i5, i32 %i6, i32 %i7, i32 %i8, i32 %i9, i128 %s1.coerce, i128 %s2.coerce) +// CHECK: define frozen i32 @f41_stack(i32 %i, i32 %i2, i32 %i3, i32 %i4, i32 %i5, i32 %i6, i32 %i7, i32 %i8, i32 %i9, i128 %s1.coerce, i128 %s2.coerce) // CHECK: %s1 = alloca %struct.s41, align 16 // CHECK: %s2 = alloca %struct.s41, align 16 // CHECK: store i128 %s1.coerce, i128* %{{.*}}, align 16 @@ -471,10 +471,10 @@ return s1.i + s2.i + i + i2 + i3 + i4 + i5 + i6 + i7 + i8 + i9 + s1.s + s2.s; } int caller41_stack() { -// CHECK: define i32 @caller41_stack() +// CHECK: define frozen i32 @caller41_stack() // CHECK: %[[a:.*]] = load i128, i128* bitcast (%struct.s41* @g41 to i128*), align 16 // CHECK: %[[b:.*]] = load i128, i128* bitcast (%struct.s41* @g41_2 to i128*), align 16 -// CHECK: call i32 @f41_stack(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i128 %[[a]], i128 %[[b]]) +// CHECK: call frozen i32 @f41_stack(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i128 %[[a]], i128 %[[b]]) return f41_stack(1, 2, 3, 4, 5, 6, 7, 8, 9, g41, g41_2); } @@ -492,7 +492,7 @@ // passing structs in registers __attribute__ ((noinline)) int f42(int i, s42_no_align s1, s42_no_align s2) { -// CHECK: define i32 @f42(i32 %i, %struct.s42* %s1, %struct.s42* %s2) +// CHECK: define frozen i32 @f42(i32 %i, %struct.s42* %s1, %struct.s42* %s2) // CHECK: getelementptr inbounds %struct.s42, %struct.s42* %s1, i32 0, i32 0 // CHECK: getelementptr inbounds %struct.s42, %struct.s42* %s2, i32 0, i32 0 // CHECK: getelementptr inbounds %struct.s42, %struct.s42* %s1, i32 0, i32 1 @@ -502,21 +502,21 @@ s42_no_align g42; s42_no_align g42_2; int caller42() { -// CHECK: define i32 @caller42() +// CHECK: define frozen i32 @caller42() // CHECK: %[[a:.*]] = alloca %struct.s42, align 4 // CHECK: %[[b:.*]] = alloca %struct.s42, align 4 // CHECK: %[[c:.*]] = bitcast %struct.s42* %[[a]] to i8* // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64 // CHECK: %[[d:.*]] = bitcast %struct.s42* %[[b]] to i8* // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64 -// CHECK: call i32 @f42(i32 3, %struct.s42* %[[a]], %struct.s42* %[[b]]) +// CHECK: call frozen i32 @f42(i32 3, %struct.s42* %[[a]], %struct.s42* %[[b]]) return f42(3, g42, g42_2); } // passing structs on stack __attribute__ ((noinline)) int f42_stack(int i, int i2, int i3, int i4, int i5, int i6, int i7, int i8, int i9, s42_no_align s1, s42_no_align s2) { -// CHECK: define i32 @f42_stack(i32 %i, i32 %i2, i32 %i3, i32 %i4, i32 %i5, i32 %i6, i32 %i7, i32 %i8, i32 %i9, %struct.s42* %s1, %struct.s42* %s2) +// CHECK: define frozen i32 @f42_stack(i32 %i, i32 %i2, i32 %i3, i32 %i4, i32 %i5, i32 %i6, i32 %i7, i32 %i8, i32 %i9, %struct.s42* %s1, %struct.s42* %s2) // CHECK: getelementptr inbounds %struct.s42, %struct.s42* %s1, i32 0, i32 0 // CHECK: getelementptr inbounds %struct.s42, %struct.s42* %s2, i32 0, i32 0 // CHECK: getelementptr inbounds %struct.s42, %struct.s42* %s1, i32 0, i32 1 @@ -524,14 +524,14 @@ return s1.i + s2.i + i + i2 + i3 + i4 + i5 + i6 + i7 + i8 + i9 + s1.s + s2.s; } int caller42_stack() { -// CHECK: define i32 @caller42_stack() +// CHECK: define frozen i32 @caller42_stack() // CHECK: %[[a:.*]] = alloca %struct.s42, align 4 // CHECK: %[[b:.*]] = alloca %struct.s42, align 4 // CHECK: %[[c:.*]] = bitcast %struct.s42* %[[a]] to i8* // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64 // CHECK: %[[d:.*]] = bitcast %struct.s42* %[[b]] to i8* // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64 -// CHECK: call i32 @f42_stack(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, %struct.s42* %[[a]], %struct.s42* %[[b]]) +// CHECK: call frozen i32 @f42_stack(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, %struct.s42* %[[a]], %struct.s42* %[[b]]) return f42_stack(1, 2, 3, 4, 5, 6, 7, 8, 9, g42, g42_2); } @@ -549,7 +549,7 @@ // passing aligned structs in registers __attribute__ ((noinline)) int f43(int i, s43_with_align s1, s43_with_align s2) { -// CHECK: define i32 @f43(i32 %i, %struct.s43* %s1, %struct.s43* %s2) +// CHECK: define frozen i32 @f43(i32 %i, %struct.s43* %s1, %struct.s43* %s2) // CHECK: getelementptr inbounds %struct.s43, %struct.s43* %s1, i32 0, i32 0 // CHECK: getelementptr inbounds %struct.s43, %struct.s43* %s2, i32 0, i32 0 // CHECK: getelementptr inbounds %struct.s43, %struct.s43* %s1, i32 0, i32 1 @@ -559,21 +559,21 @@ s43_with_align g43; s43_with_align g43_2; int caller43() { -// CHECK: define i32 @caller43() +// CHECK: define frozen i32 @caller43() // CHECK: %[[a:.*]] = alloca %struct.s43, align 16 // CHECK: %[[b:.*]] = alloca %struct.s43, align 16 // CHECK: %[[c:.*]] = bitcast %struct.s43* %[[a]] to i8* // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64 // CHECK: %[[d:.*]] = bitcast %struct.s43* %[[b]] to i8* // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64 -// CHECK: call i32 @f43(i32 3, %struct.s43* %[[a]], %struct.s43* %[[b]]) +// CHECK: call frozen i32 @f43(i32 3, %struct.s43* %[[a]], %struct.s43* %[[b]]) return f43(3, g43, g43_2); } // passing aligned structs on stack __attribute__ ((noinline)) int f43_stack(int i, int i2, int i3, int i4, int i5, int i6, int i7, int i8, int i9, s43_with_align s1, s43_with_align s2) { -// CHECK: define i32 @f43_stack(i32 %i, i32 %i2, i32 %i3, i32 %i4, i32 %i5, i32 %i6, i32 %i7, i32 %i8, i32 %i9, %struct.s43* %s1, %struct.s43* %s2) +// CHECK: define frozen i32 @f43_stack(i32 %i, i32 %i2, i32 %i3, i32 %i4, i32 %i5, i32 %i6, i32 %i7, i32 %i8, i32 %i9, %struct.s43* %s1, %struct.s43* %s2) // CHECK: getelementptr inbounds %struct.s43, %struct.s43* %s1, i32 0, i32 0 // CHECK: getelementptr inbounds %struct.s43, %struct.s43* %s2, i32 0, i32 0 // CHECK: getelementptr inbounds %struct.s43, %struct.s43* %s1, i32 0, i32 1 @@ -581,14 +581,14 @@ return s1.i + s2.i + i + i2 + i3 + i4 + i5 + i6 + i7 + i8 + i9 + s1.s + s2.s; } int caller43_stack() { -// CHECK: define i32 @caller43_stack() +// CHECK: define frozen i32 @caller43_stack() // CHECK: %[[a:.*]] = alloca %struct.s43, align 16 // CHECK: %[[b:.*]] = alloca %struct.s43, align 16 // CHECK: %[[c:.*]] = bitcast %struct.s43* %[[a]] to i8* // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64 // CHECK: %[[d:.*]] = bitcast %struct.s43* %[[b]] to i8* // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64 -// CHECK: call i32 @f43_stack(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, %struct.s43* %[[a]], %struct.s43* %[[b]]) +// CHECK: call frozen i32 @f43_stack(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, %struct.s43* %[[a]], %struct.s43* %[[b]]) return f43_stack(1, 2, 3, 4, 5, 6, 7, 8, 9, g43, g43_2); } @@ -597,24 +597,24 @@ __attribute__ ((noinline)) int f40_split(int i, int i2, int i3, int i4, int i5, int i6, int i7, s40_no_align s1, s40_no_align s2) { -// CHECK: define i32 @f40_split(i32 %i, i32 %i2, i32 %i3, i32 %i4, i32 %i5, i32 %i6, i32 %i7, [2 x i64] %s1.coerce, [2 x i64] %s2.coerce) +// CHECK: define frozen i32 @f40_split(i32 %i, i32 %i2, i32 %i3, i32 %i4, i32 %i5, i32 %i6, i32 %i7, [2 x i64] %s1.coerce, [2 x i64] %s2.coerce) return s1.i + s2.i + i + i2 + i3 + i4 + i5 + i6 + i7 + s1.s + s2.s; } int caller40_split() { -// CHECK: define i32 @caller40_split() -// CHECK: call i32 @f40_split(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, [2 x i64] %{{.*}} [2 x i64] %{{.*}}) +// CHECK: define frozen i32 @caller40_split() +// CHECK: call frozen i32 @f40_split(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, [2 x i64] %{{.*}} [2 x i64] %{{.*}}) return f40_split(1, 2, 3, 4, 5, 6, 7, g40, g40_2); } __attribute__ ((noinline)) int f41_split(int i, int i2, int i3, int i4, int i5, int i6, int i7, s41_with_align s1, s41_with_align s2) { -// CHECK: define i32 @f41_split(i32 %i, i32 %i2, i32 %i3, i32 %i4, i32 %i5, i32 %i6, i32 %i7, i128 %s1.coerce, i128 %s2.coerce) +// CHECK: define frozen i32 @f41_split(i32 %i, i32 %i2, i32 %i3, i32 %i4, i32 %i5, i32 %i6, i32 %i7, i128 %s1.coerce, i128 %s2.coerce) return s1.i + s2.i + i + i2 + i3 + i4 + i5 + i6 + i7 + s1.s + s2.s; } int caller41_split() { -// CHECK: define i32 @caller41_split() -// CHECK: call i32 @f41_split(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i128 %{{.*}}, i128 %{{.*}}) +// CHECK: define frozen i32 @caller41_split() +// CHECK: call frozen i32 @f41_split(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i128 %{{.*}}, i128 %{{.*}}) return f41_split(1, 2, 3, 4, 5, 6, 7, g41, g41_2); } @@ -624,7 +624,7 @@ }; float test_hfa(int n, ...) { -// CHECK-LABEL: define float @test_hfa(i32 %n, ...) +// CHECK-LABEL: define frozen float @test_hfa(i32 %n, ...) // CHECK: [[THELIST:%.*]] = alloca i8* // CHECK: [[CURLIST:%.*]] = load i8*, i8** [[THELIST]] @@ -640,8 +640,8 @@ } float test_hfa_call(struct HFA *a) { -// CHECK-LABEL: define float @test_hfa_call(%struct.HFA* %a) -// CHECK: call float (i32, ...) @test_hfa(i32 1, [4 x float] {{.*}}) +// CHECK-LABEL: define frozen float @test_hfa_call(%struct.HFA* %a) +// CHECK: call frozen float (i32, ...) @test_hfa(i32 1, [4 x float] {{.*}}) test_hfa(1, *a); } @@ -650,7 +650,7 @@ }; float test_toobig_hfa(int n, ...) { -// CHECK-LABEL: define float @test_toobig_hfa(i32 %n, ...) +// CHECK-LABEL: define frozen float @test_toobig_hfa(i32 %n, ...) // CHECK: [[THELIST:%.*]] = alloca i8* // CHECK: [[CURLIST:%.*]] = load i8*, i8** [[THELIST]] @@ -672,7 +672,7 @@ }; int32x4_t test_hva(int n, ...) { -// CHECK-LABEL: define <4 x i32> @test_hva(i32 %n, ...) +// CHECK-LABEL: define frozen <4 x i32> @test_hva(i32 %n, ...) // CHECK: [[THELIST:%.*]] = alloca i8* // CHECK: [[CURLIST:%.*]] = load i8*, i8** [[THELIST]] @@ -698,7 +698,7 @@ }; int32x4_t test_toobig_hva(int n, ...) { -// CHECK-LABEL: define <4 x i32> @test_toobig_hva(i32 %n, ...) +// CHECK-LABEL: define frozen <4 x i32> @test_toobig_hva(i32 %n, ...) // CHECK: [[THELIST:%.*]] = alloca i8* // CHECK: [[CURLIST:%.*]] = load i8*, i8** [[THELIST]] @@ -719,7 +719,7 @@ typedef struct { float32x3_t arr[4]; } HFAv3; float32x3_t test_hva_v3(int n, ...) { -// CHECK-LABEL: define <3 x float> @test_hva_v3(i32 %n, ...) +// CHECK-LABEL: define frozen <3 x float> @test_hva_v3(i32 %n, ...) // CHECK: [[THELIST:%.*]] = alloca i8* // CHECK: [[CURLIST:%.*]] = load i8*, i8** [[THELIST]] @@ -741,7 +741,7 @@ } float32x3_t test_hva_v3_call(HFAv3 *a) { -// CHECK-LABEL: define <3 x float> @test_hva_v3_call(%struct.HFAv3* %a) -// CHECK: call <3 x float> (i32, ...) @test_hva_v3(i32 1, [4 x <4 x float>] {{.*}}) +// CHECK-LABEL: define frozen <3 x float> @test_hva_v3_call(%struct.HFAv3* %a) +// CHECK: call frozen <3 x float> (i32, ...) @test_hva_v3(i32 1, [4 x <4 x float>] {{.*}}) return test_hva_v3(1, *a); } diff --git a/clang/test/CodeGen/arm64-microsoft-arguments.cpp b/clang/test/CodeGen/arm64-microsoft-arguments.cpp --- a/clang/test/CodeGen/arm64-microsoft-arguments.cpp +++ b/clang/test/CodeGen/arm64-microsoft-arguments.cpp @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -triple aarch64-windows -ffreestanding -emit-llvm -O0 \ +// RUN: %clang_cc1 -disable-frozen-args -triple aarch64-windows -ffreestanding -emit-llvm -O0 \ // RUN: -x c++ -o - %s | FileCheck %s // Pass and return for type size <= 8 bytes. diff --git a/clang/test/CodeGen/arm64-microsoft-intrinsics.c b/clang/test/CodeGen/arm64-microsoft-intrinsics.c --- a/clang/test/CodeGen/arm64-microsoft-intrinsics.c +++ b/clang/test/CodeGen/arm64-microsoft-intrinsics.c @@ -12,7 +12,7 @@ return _InterlockedAdd(Addend, -1); } -// CHECK-LABEL: define {{.*}} i32 @test_InterlockedAdd(i32* %Addend, i32 %Value) {{.*}} { +// CHECK-LABEL: define {{.*}} i32 @test_InterlockedAdd(i32* frozen %Addend, i32 frozen %Value) {{.*}} { // CHECK-MSVC: %[[OLDVAL:[0-9]+]] = atomicrmw add i32* %1, i32 %2 seq_cst // CHECK-MSVC: %[[NEWVAL:[0-9]+]] = add i32 %[[OLDVAL:[0-9]+]], %2 // CHECK-MSVC: ret i32 %[[NEWVAL:[0-9]+]] diff --git a/clang/test/CodeGen/arm64-mte.c b/clang/test/CodeGen/arm64-mte.c --- a/clang/test/CodeGen/arm64-mte.c +++ b/clang/test/CodeGen/arm64-mte.c @@ -3,7 +3,7 @@ #include #include -// CHECK-LABEL: define i32* @create_tag1 +// CHECK-LABEL: define frozen i32* @create_tag1 int *create_tag1(int *a, unsigned b) { // CHECK: [[T0:%[0-9]+]] = bitcast i32* %a to i8* // CHECK: [[T1:%[0-9]+]] = zext i32 %b to i64 @@ -12,7 +12,7 @@ return __arm_mte_create_random_tag(a,b); } -// CHECK-LABEL: define i16* @create_tag2 +// CHECK-LABEL: define frozen i16* @create_tag2 short *create_tag2(short *a, unsigned b) { // CHECK: [[T0:%[0-9]+]] = bitcast i16* %a to i8* // CHECK: [[T1:%[0-9]+]] = zext i32 %b to i64 @@ -21,7 +21,7 @@ return __arm_mte_create_random_tag(a,b); } -// CHECK-LABEL: define i8* @create_tag3 +// CHECK-LABEL: define frozen i8* @create_tag3 char *create_tag3(char *a, unsigned b) { // CHECK: [[T1:%[0-9]+]] = zext i32 %b to i64 // CHECK: [[T2:%[0-9]+]] = tail call i8* @llvm.aarch64.irg(i8* %a, i64 [[T1]]) @@ -29,13 +29,13 @@ return __arm_mte_create_random_tag(a,b); } -// CHECK-LABEL: define i8* @increment_tag1 +// CHECK-LABEL: define frozen i8* @increment_tag1 char *increment_tag1(char *a) { // CHECK: call i8* @llvm.aarch64.addg(i8* %a, i64 3) return __arm_mte_increment_tag(a,3); } -// CHECK-LABEL: define i16* @increment_tag2 +// CHECK-LABEL: define frozen i16* @increment_tag2 short *increment_tag2(short *a) { // CHECK: [[T0:%[0-9]+]] = bitcast i16* %a to i8* // CHECK: [[T1:%[0-9]+]] = tail call i8* @llvm.aarch64.addg(i8* [[T0]], i64 3) @@ -43,7 +43,7 @@ return __arm_mte_increment_tag(a,3); } -// CHECK-LABEL: define i32 @exclude_tag +// CHECK-LABEL: define frozen i32 @exclude_tag unsigned exclude_tag(int *a, unsigned m) { // CHECK: [[T0:%[0-9]+]] = zext i32 %m to i64 // CHECK: [[T1:%[0-9]+]] = bitcast i32* %a to i8* @@ -52,7 +52,7 @@ return __arm_mte_exclude_tag(a, m); } -// CHECK-LABEL: define i32* @get_tag1 +// CHECK-LABEL: define frozen i32* @get_tag1 int *get_tag1(int *a) { // CHECK: [[T0:%[0-9]+]] = bitcast i32* %a to i8* // CHECK: [[T1:%[0-9]+]] = tail call i8* @llvm.aarch64.ldg(i8* [[T0]], i8* [[T0]]) @@ -60,7 +60,7 @@ return __arm_mte_get_tag(a); } -// CHECK-LABEL: define i16* @get_tag2 +// CHECK-LABEL: define frozen i16* @get_tag2 short *get_tag2(short *a) { // CHECK: [[T0:%[0-9]+]] = bitcast i16* %a to i8* // CHECK: [[T1:%[0-9]+]] = tail call i8* @llvm.aarch64.ldg(i8* [[T0]], i8* [[T0]]) @@ -75,7 +75,7 @@ __arm_mte_set_tag(a); } -// CHECK-LABEL: define i64 @subtract_pointers +// CHECK-LABEL: define frozen i64 @subtract_pointers ptrdiff_t subtract_pointers(int *a, int *b) { // CHECK: [[T0:%[0-9]+]] = bitcast i32* %a to i8* // CHECK: [[T1:%[0-9]+]] = bitcast i32* %b to i8* @@ -84,7 +84,7 @@ return __arm_mte_ptrdiff(a, b); } -// CHECK-LABEL: define i64 @subtract_pointers_null_1 +// CHECK-LABEL: define frozen i64 @subtract_pointers_null_1 ptrdiff_t subtract_pointers_null_1(int *a) { // CHECK: [[T0:%[0-9]+]] = bitcast i32* %a to i8* // CHECK: [[T1:%[0-9]+]] = tail call i64 @llvm.aarch64.subp(i8* [[T0]], i8* null) @@ -92,7 +92,7 @@ return __arm_mte_ptrdiff(a, NULL); } -// CHECK-LABEL: define i64 @subtract_pointers_null_2 +// CHECK-LABEL: define frozen i64 @subtract_pointers_null_2 ptrdiff_t subtract_pointers_null_2(int *a) { // CHECK: [[T0:%[0-9]+]] = bitcast i32* %a to i8* // CHECK: [[T1:%[0-9]+]] = tail call i64 @llvm.aarch64.subp(i8* null, i8* [[T0]]) @@ -101,7 +101,7 @@ } // Check arithmetic promotion on return type -// CHECK-LABEL: define i32 @subtract_pointers4 +// CHECK-LABEL: define frozen i32 @subtract_pointers4 int subtract_pointers4(void* a, void *b) { // CHECK: [[T0:%[0-9]+]] = tail call i64 @llvm.aarch64.subp(i8* %a, i8* %b) // CHECK-NEXT: %cmp = icmp slt i64 [[T0]], 1 diff --git a/clang/test/CodeGen/arm64_32-vaarg.c b/clang/test/CodeGen/arm64_32-vaarg.c --- a/clang/test/CodeGen/arm64_32-vaarg.c +++ b/clang/test/CodeGen/arm64_32-vaarg.c @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -triple arm64_32-apple-ios7.0 -target-abi darwinpcs -emit-llvm -o - -O1 -ffreestanding %s | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args -triple arm64_32-apple-ios7.0 -target-abi darwinpcs -emit-llvm -o - -O1 -ffreestanding %s | FileCheck %s #include @@ -8,7 +8,7 @@ // No realignment should be needed here: slot size is 4 bytes. int test_int(OneInt input, va_list *mylist) { -// CHECK-LABEL: define i32 @test_int(i32 %input +// CHECK-LABEL: define frozen i32 @test_int(i32 %input // CHECK: [[START:%.*]] = load i8*, i8** %mylist // CHECK: [[NEXT:%.*]] = getelementptr inbounds i8, i8* [[START]], i32 4 // CHECK: store i8* [[NEXT]], i8** %mylist @@ -27,7 +27,7 @@ // Minimum slot size is 4 bytes, so address needs rounding up to multiple of 8. long long test_longlong(OneLongLong input, va_list *mylist) { -// CHECK-LABEL: define i64 @test_longlong(i64 %input +// CHECK-LABEL: define frozen i64 @test_longlong(i64 %input // CHECK: [[STARTPTR:%.*]] = bitcast i8** %mylist to i32* // CHECK: [[START:%.*]] = load i32, i32* [[STARTPTR]] @@ -52,7 +52,7 @@ // HFAs take priority over passing large structs indirectly. float test_hfa(va_list *mylist) { -// CHECK-LABEL: define float @test_hfa +// CHECK-LABEL: define frozen float @test_hfa // CHECK: [[START:%.*]] = load i8*, i8** %mylist // CHECK: [[NEXT:%.*]] = getelementptr inbounds i8, i8* [[START]], i32 16 @@ -81,7 +81,7 @@ // Structs bigger than 16 bytes are passed indirectly: a pointer is placed on // the stack. long long test_bigstruct(BigStruct input, va_list *mylist) { -// CHECK-LABEL: define i64 @test_bigstruct(%struct.BigStruct* +// CHECK-LABEL: define frozen i64 @test_bigstruct(%struct.BigStruct* // CHECK: [[START:%.*]] = load i8*, i8** %mylist // CHECK: [[NEXT:%.*]] = getelementptr inbounds i8, i8* [[START]], i32 4 // CHECK: store i8* [[NEXT]], i8** %mylist @@ -103,7 +103,7 @@ // alignment must be passed via "[N x i32]" to be correctly allocated in the // backend. short test_threeshorts(ThreeShorts input, va_list *mylist) { -// CHECK-LABEL: define signext i16 @test_threeshorts([2 x i32] %input +// CHECK-LABEL: define frozen signext i16 @test_threeshorts([2 x i32] %input // CHECK: [[START:%.*]] = load i8*, i8** %mylist // CHECK: [[NEXT:%.*]] = getelementptr inbounds i8, i8* [[START]], i32 8 diff --git a/clang/test/CodeGen/arm64_32.c b/clang/test/CodeGen/arm64_32.c --- a/clang/test/CodeGen/arm64_32.c +++ b/clang/test/CodeGen/arm64_32.c @@ -27,4 +27,4 @@ typedef float __attribute__((ext_vector_type(16))) v16f32; v16f32 func(v16f32 in) { return in; } -// CHECK: define void @func(<16 x float>* noalias sret align 16 {{%.*}}, <16 x float> {{%.*}}) +// CHECK: define void @func(<16 x float>* noalias sret align 16 {{%.*}}, <16 x float> frozen {{%.*}}) diff --git a/clang/test/CodeGen/arm64_vcopy.c b/clang/test/CodeGen/arm64_vcopy.c --- a/clang/test/CodeGen/arm64_vcopy.c +++ b/clang/test/CodeGen/arm64_vcopy.c @@ -4,7 +4,7 @@ #include -// CHECK-LABEL: define <16 x i8> @test_vcopyq_laneq_s8(<16 x i8> %a1, <16 x i8> %a2) #0 { +// CHECK-LABEL: define frozen <16 x i8> @test_vcopyq_laneq_s8(<16 x i8> frozen %a1, <16 x i8> frozen %a2) #0 { // CHECK: [[VGETQ_LANE:%.*]] = extractelement <16 x i8> %a2, i32 13 // CHECK: [[VSET_LANE:%.*]] = insertelement <16 x i8> %a1, i8 [[VGETQ_LANE]], i32 3 // CHECK: ret <16 x i8> [[VSET_LANE]] @@ -12,7 +12,7 @@ return vcopyq_laneq_s8(a1, (int64_t) 3, a2, (int64_t) 13); } -// CHECK-LABEL: define <16 x i8> @test_vcopyq_laneq_u8(<16 x i8> %a1, <16 x i8> %a2) #0 { +// CHECK-LABEL: define frozen <16 x i8> @test_vcopyq_laneq_u8(<16 x i8> frozen %a1, <16 x i8> frozen %a2) #0 { // CHECK: [[VGETQ_LANE:%.*]] = extractelement <16 x i8> %a2, i32 13 // CHECK: [[VSET_LANE:%.*]] = insertelement <16 x i8> %a1, i8 [[VGETQ_LANE]], i32 3 // CHECK: ret <16 x i8> [[VSET_LANE]] @@ -21,7 +21,7 @@ } -// CHECK-LABEL: define <8 x i16> @test_vcopyq_laneq_s16(<8 x i16> %a1, <8 x i16> %a2) #0 { +// CHECK-LABEL: define frozen <8 x i16> @test_vcopyq_laneq_s16(<8 x i16> frozen %a1, <8 x i16> frozen %a2) #0 { // CHECK: [[VGETQ_LANE:%.*]] = extractelement <8 x i16> %a2, i32 7 // CHECK: [[VSET_LANE:%.*]] = insertelement <8 x i16> %a1, i16 [[VGETQ_LANE]], i32 3 // CHECK: ret <8 x i16> [[VSET_LANE]] @@ -30,7 +30,7 @@ } -// CHECK-LABEL: define <8 x i16> @test_vcopyq_laneq_u16(<8 x i16> %a1, <8 x i16> %a2) #0 { +// CHECK-LABEL: define frozen <8 x i16> @test_vcopyq_laneq_u16(<8 x i16> frozen %a1, <8 x i16> frozen %a2) #0 { // CHECK: [[VGETQ_LANE:%.*]] = extractelement <8 x i16> %a2, i32 7 // CHECK: [[VSET_LANE:%.*]] = insertelement <8 x i16> %a1, i16 [[VGETQ_LANE]], i32 3 // CHECK: ret <8 x i16> [[VSET_LANE]] @@ -39,7 +39,7 @@ } -// CHECK-LABEL: define <4 x i32> @test_vcopyq_laneq_s32(<4 x i32> %a1, <4 x i32> %a2) #0 { +// CHECK-LABEL: define frozen <4 x i32> @test_vcopyq_laneq_s32(<4 x i32> frozen %a1, <4 x i32> frozen %a2) #0 { // CHECK: [[VGETQ_LANE:%.*]] = extractelement <4 x i32> %a2, i32 3 // CHECK: [[VSET_LANE:%.*]] = insertelement <4 x i32> %a1, i32 [[VGETQ_LANE]], i32 3 // CHECK: ret <4 x i32> [[VSET_LANE]] @@ -47,7 +47,7 @@ return vcopyq_laneq_s32(a1, (int64_t) 3, a2, (int64_t) 3); } -// CHECK-LABEL: define <4 x i32> @test_vcopyq_laneq_u32(<4 x i32> %a1, <4 x i32> %a2) #0 { +// CHECK-LABEL: define frozen <4 x i32> @test_vcopyq_laneq_u32(<4 x i32> frozen %a1, <4 x i32> frozen %a2) #0 { // CHECK: [[VGETQ_LANE:%.*]] = extractelement <4 x i32> %a2, i32 3 // CHECK: [[VSET_LANE:%.*]] = insertelement <4 x i32> %a1, i32 [[VGETQ_LANE]], i32 3 // CHECK: ret <4 x i32> [[VSET_LANE]] @@ -55,7 +55,7 @@ return vcopyq_laneq_u32(a1, (int64_t) 3, a2, (int64_t) 3); } -// CHECK-LABEL: define <2 x i64> @test_vcopyq_laneq_s64(<2 x i64> %a1, <2 x i64> %a2) #0 { +// CHECK-LABEL: define frozen <2 x i64> @test_vcopyq_laneq_s64(<2 x i64> frozen %a1, <2 x i64> frozen %a2) #0 { // CHECK: [[VGETQ_LANE:%.*]] = extractelement <2 x i64> %a2, i32 1 // CHECK: [[VSET_LANE:%.*]] = insertelement <2 x i64> %a1, i64 [[VGETQ_LANE]], i32 0 // CHECK: ret <2 x i64> [[VSET_LANE]] @@ -63,7 +63,7 @@ return vcopyq_laneq_s64(a1, (int64_t) 0, a2, (int64_t) 1); } -// CHECK-LABEL: define <2 x i64> @test_vcopyq_laneq_u64(<2 x i64> %a1, <2 x i64> %a2) #0 { +// CHECK-LABEL: define frozen <2 x i64> @test_vcopyq_laneq_u64(<2 x i64> frozen %a1, <2 x i64> frozen %a2) #0 { // CHECK: [[VGETQ_LANE:%.*]] = extractelement <2 x i64> %a2, i32 1 // CHECK: [[VSET_LANE:%.*]] = insertelement <2 x i64> %a1, i64 [[VGETQ_LANE]], i32 0 // CHECK: ret <2 x i64> [[VSET_LANE]] @@ -71,7 +71,7 @@ return vcopyq_laneq_u64(a1, (int64_t) 0, a2, (int64_t) 1); } -// CHECK-LABEL: define <4 x float> @test_vcopyq_laneq_f32(<4 x float> %a1, <4 x float> %a2) #0 { +// CHECK-LABEL: define frozen <4 x float> @test_vcopyq_laneq_f32(<4 x float> frozen %a1, <4 x float> frozen %a2) #0 { // CHECK: [[VGETQ_LANE:%.*]] = extractelement <4 x float> %a2, i32 3 // CHECK: [[VSET_LANE:%.*]] = insertelement <4 x float> %a1, float [[VGETQ_LANE]], i32 0 // CHECK: ret <4 x float> [[VSET_LANE]] @@ -79,7 +79,7 @@ return vcopyq_laneq_f32(a1, 0, a2, 3); } -// CHECK-LABEL: define <2 x double> @test_vcopyq_laneq_f64(<2 x double> %a1, <2 x double> %a2) #0 { +// CHECK-LABEL: define frozen <2 x double> @test_vcopyq_laneq_f64(<2 x double> frozen %a1, <2 x double> frozen %a2) #0 { // CHECK: [[VGETQ_LANE:%.*]] = extractelement <2 x double> %a2, i32 1 // CHECK: [[VSET_LANE:%.*]] = insertelement <2 x double> %a1, double [[VGETQ_LANE]], i32 0 // CHECK: ret <2 x double> [[VSET_LANE]] diff --git a/clang/test/CodeGen/arm64_vdupq_n_f64.c b/clang/test/CodeGen/arm64_vdupq_n_f64.c --- a/clang/test/CodeGen/arm64_vdupq_n_f64.c +++ b/clang/test/CodeGen/arm64_vdupq_n_f64.c @@ -4,7 +4,7 @@ // vdupq_n_f64 -> dup.2d v0, v0[0] // -// CHECK-LABEL: define <2 x double> @test_vdupq_n_f64(double %w) #0 { +// CHECK-LABEL: define frozen <2 x double> @test_vdupq_n_f64(double frozen %w) #0 { // CHECK: [[VECINIT_I:%.*]] = insertelement <2 x double> undef, double %w, i32 0 // CHECK: [[VECINIT1_I:%.*]] = insertelement <2 x double> [[VECINIT_I]], double %w, i32 1 // CHECK: ret <2 x double> [[VECINIT1_I]] @@ -14,7 +14,7 @@ // might as well test this while we're here // vdupq_n_f32 -> dup.4s v0, v0[0] -// CHECK-LABEL: define <4 x float> @test_vdupq_n_f32(float %w) #0 { +// CHECK-LABEL: define frozen <4 x float> @test_vdupq_n_f32(float frozen %w) #0 { // CHECK: [[VECINIT_I:%.*]] = insertelement <4 x float> undef, float %w, i32 0 // CHECK: [[VECINIT1_I:%.*]] = insertelement <4 x float> [[VECINIT_I]], float %w, i32 1 // CHECK: [[VECINIT2_I:%.*]] = insertelement <4 x float> [[VECINIT1_I]], float %w, i32 2 @@ -27,7 +27,7 @@ // vdupq_lane_f64 -> dup.2d v0, v0[0] // this was in , but had already been implemented, // test anyway -// CHECK-LABEL: define <2 x double> @test_vdupq_lane_f64(<1 x double> %V) #0 { +// CHECK-LABEL: define frozen <2 x double> @test_vdupq_lane_f64(<1 x double> frozen %V) #0 { // CHECK: [[TMP0:%.*]] = bitcast <1 x double> %V to <8 x i8> // CHECK: [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x double> // CHECK: [[SHUFFLE:%.*]] = shufflevector <1 x double> [[TMP1]], <1 x double> [[TMP1]], <2 x i32> zeroinitializer @@ -38,7 +38,7 @@ // vmovq_n_f64 -> dup Vd.2d,X0 // this wasn't in , but it was between the vdups -// CHECK-LABEL: define <2 x double> @test_vmovq_n_f64(double %w) #0 { +// CHECK-LABEL: define frozen <2 x double> @test_vmovq_n_f64(double frozen %w) #0 { // CHECK: [[VECINIT_I:%.*]] = insertelement <2 x double> undef, double %w, i32 0 // CHECK: [[VECINIT1_I:%.*]] = insertelement <2 x double> [[VECINIT_I]], double %w, i32 1 // CHECK: ret <2 x double> [[VECINIT1_I]] @@ -46,7 +46,7 @@ return vmovq_n_f64(w); } -// CHECK-LABEL: define <4 x half> @test_vmov_n_f16(half* %a1) #1 { +// CHECK-LABEL: define frozen <4 x half> @test_vmov_n_f16(half* frozen %a1) #1 { // CHECK: [[TMP0:%.*]] = load half, half* %a1, align 2 // CHECK: [[VECINIT:%.*]] = insertelement <4 x half> undef, half [[TMP0]], i32 0 // CHECK: [[VECINIT1:%.*]] = insertelement <4 x half> [[VECINIT]], half [[TMP0]], i32 1 @@ -63,7 +63,7 @@ } */ -// CHECK-LABEL: define <8 x half> @test_vmovq_n_f16(half* %a1) #0 { +// CHECK-LABEL: define frozen <8 x half> @test_vmovq_n_f16(half* frozen %a1) #0 { // CHECK: [[TMP0:%.*]] = load half, half* %a1, align 2 // CHECK: [[VECINIT:%.*]] = insertelement <8 x half> undef, half [[TMP0]], i32 0 // CHECK: [[VECINIT1:%.*]] = insertelement <8 x half> [[VECINIT]], half [[TMP0]], i32 1 diff --git a/clang/test/CodeGen/arm_neon_intrinsics.c b/clang/test/CodeGen/arm_neon_intrinsics.c --- a/clang/test/CodeGen/arm_neon_intrinsics.c +++ b/clang/test/CodeGen/arm_neon_intrinsics.c @@ -20223,259 +20223,259 @@ return vtbx4_p8(a, b, c); } -// CHECK: @test_vtrn_s8({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vtrn_s8({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.int8x8x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to <8 x i8>* // CHECK: [[VTRN_I:%.*]] = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> -// CHECK: store <8 x i8> [[VTRN_I]], <8 x i8>* [[TMP1]], align 4, !alias.scope !3 +// CHECK: store <8 x i8> [[VTRN_I]], <8 x i8>* [[TMP1]], align 4, !alias.scope // CHECK: [[TMP2:%.*]] = getelementptr inbounds <8 x i8>, <8 x i8>* [[TMP1]], i32 1 // CHECK: [[VTRN1_I:%.*]] = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> -// CHECK: store <8 x i8> [[VTRN1_I]], <8 x i8>* [[TMP2]], align 4, !alias.scope !3 +// CHECK: store <8 x i8> [[VTRN1_I]], <8 x i8>* [[TMP2]], align 4, !alias.scope // CHECK: ret void int8x8x2_t test_vtrn_s8(int8x8_t a, int8x8_t b) { return vtrn_s8(a, b); } -// CHECK: @test_vtrn_s16({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vtrn_s16({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.int16x4x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast <4 x i16> %a to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <4 x i16> %b to <8 x i8> // CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to <4 x i16>* // CHECK: [[VTRN_I:%.*]] = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> -// CHECK: store <4 x i16> [[VTRN_I]], <4 x i16>* [[TMP3]], align 4, !alias.scope !6 +// CHECK: store <4 x i16> [[VTRN_I]], <4 x i16>* [[TMP3]], align 4, !alias.scope // CHECK: [[TMP4:%.*]] = getelementptr inbounds <4 x i16>, <4 x i16>* [[TMP3]], i32 1 // CHECK: [[VTRN1_I:%.*]] = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> -// CHECK: store <4 x i16> [[VTRN1_I]], <4 x i16>* [[TMP4]], align 4, !alias.scope !6 +// CHECK: store <4 x i16> [[VTRN1_I]], <4 x i16>* [[TMP4]], align 4, !alias.scope // CHECK: ret void int16x4x2_t test_vtrn_s16(int16x4_t a, int16x4_t b) { return vtrn_s16(a, b); } -// CHECK: @test_vtrn_s32({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vtrn_s32({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.int32x2x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast <2 x i32> %a to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <2 x i32> %b to <8 x i8> // CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to <2 x i32>* // CHECK: [[VTRN_I:%.*]] = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> -// CHECK: store <2 x i32> [[VTRN_I]], <2 x i32>* [[TMP3]], align 4, !alias.scope !9 +// CHECK: store <2 x i32> [[VTRN_I]], <2 x i32>* [[TMP3]], align 4, !alias.scope // CHECK: [[TMP4:%.*]] = getelementptr inbounds <2 x i32>, <2 x i32>* [[TMP3]], i32 1 // CHECK: [[VTRN1_I:%.*]] = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> -// CHECK: store <2 x i32> [[VTRN1_I]], <2 x i32>* [[TMP4]], align 4, !alias.scope !9 +// CHECK: store <2 x i32> [[VTRN1_I]], <2 x i32>* [[TMP4]], align 4, !alias.scope // CHECK: ret void int32x2x2_t test_vtrn_s32(int32x2_t a, int32x2_t b) { return vtrn_s32(a, b); } -// CHECK: @test_vtrn_u8({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vtrn_u8({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.uint8x8x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to <8 x i8>* // CHECK: [[VTRN_I:%.*]] = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> -// CHECK: store <8 x i8> [[VTRN_I]], <8 x i8>* [[TMP1]], align 4, !alias.scope !12 +// CHECK: store <8 x i8> [[VTRN_I]], <8 x i8>* [[TMP1]], align 4, !alias.scope // CHECK: [[TMP2:%.*]] = getelementptr inbounds <8 x i8>, <8 x i8>* [[TMP1]], i32 1 // CHECK: [[VTRN1_I:%.*]] = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> -// CHECK: store <8 x i8> [[VTRN1_I]], <8 x i8>* [[TMP2]], align 4, !alias.scope !12 +// CHECK: store <8 x i8> [[VTRN1_I]], <8 x i8>* [[TMP2]], align 4, !alias.scope // CHECK: ret void uint8x8x2_t test_vtrn_u8(uint8x8_t a, uint8x8_t b) { return vtrn_u8(a, b); } -// CHECK: @test_vtrn_u16({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vtrn_u16({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.uint16x4x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast <4 x i16> %a to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <4 x i16> %b to <8 x i8> // CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to <4 x i16>* // CHECK: [[VTRN_I:%.*]] = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> -// CHECK: store <4 x i16> [[VTRN_I]], <4 x i16>* [[TMP3]], align 4, !alias.scope !15 +// CHECK: store <4 x i16> [[VTRN_I]], <4 x i16>* [[TMP3]], align 4, !alias.scope // CHECK: [[TMP4:%.*]] = getelementptr inbounds <4 x i16>, <4 x i16>* [[TMP3]], i32 1 // CHECK: [[VTRN1_I:%.*]] = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> -// CHECK: store <4 x i16> [[VTRN1_I]], <4 x i16>* [[TMP4]], align 4, !alias.scope !15 +// CHECK: store <4 x i16> [[VTRN1_I]], <4 x i16>* [[TMP4]], align 4, !alias.scope // CHECK: ret void uint16x4x2_t test_vtrn_u16(uint16x4_t a, uint16x4_t b) { return vtrn_u16(a, b); } -// CHECK: @test_vtrn_u32({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vtrn_u32({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.uint32x2x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast <2 x i32> %a to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <2 x i32> %b to <8 x i8> // CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to <2 x i32>* // CHECK: [[VTRN_I:%.*]] = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> -// CHECK: store <2 x i32> [[VTRN_I]], <2 x i32>* [[TMP3]], align 4, !alias.scope !18 +// CHECK: store <2 x i32> [[VTRN_I]], <2 x i32>* [[TMP3]], align 4, !alias.scope // CHECK: [[TMP4:%.*]] = getelementptr inbounds <2 x i32>, <2 x i32>* [[TMP3]], i32 1 // CHECK: [[VTRN1_I:%.*]] = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> -// CHECK: store <2 x i32> [[VTRN1_I]], <2 x i32>* [[TMP4]], align 4, !alias.scope !18 +// CHECK: store <2 x i32> [[VTRN1_I]], <2 x i32>* [[TMP4]], align 4, !alias.scope // CHECK: ret void uint32x2x2_t test_vtrn_u32(uint32x2_t a, uint32x2_t b) { return vtrn_u32(a, b); } -// CHECK: @test_vtrn_f32({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vtrn_f32({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.float32x2x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast <2 x float> %a to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <2 x float> %b to <8 x i8> // CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to <2 x float>* // CHECK: [[VTRN_I:%.*]] = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> -// CHECK: store <2 x float> [[VTRN_I]], <2 x float>* [[TMP3]], align 4, !alias.scope !21 +// CHECK: store <2 x float> [[VTRN_I]], <2 x float>* [[TMP3]], align 4, !alias.scope // CHECK: [[TMP4:%.*]] = getelementptr inbounds <2 x float>, <2 x float>* [[TMP3]], i32 1 // CHECK: [[VTRN1_I:%.*]] = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> -// CHECK: store <2 x float> [[VTRN1_I]], <2 x float>* [[TMP4]], align 4, !alias.scope !21 +// CHECK: store <2 x float> [[VTRN1_I]], <2 x float>* [[TMP4]], align 4, !alias.scope // CHECK: ret void float32x2x2_t test_vtrn_f32(float32x2_t a, float32x2_t b) { return vtrn_f32(a, b); } -// CHECK: @test_vtrn_p8({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vtrn_p8({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.poly8x8x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to <8 x i8>* // CHECK: [[VTRN_I:%.*]] = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> -// CHECK: store <8 x i8> [[VTRN_I]], <8 x i8>* [[TMP1]], align 4, !alias.scope !24 +// CHECK: store <8 x i8> [[VTRN_I]], <8 x i8>* [[TMP1]], align 4, !alias.scope // CHECK: [[TMP2:%.*]] = getelementptr inbounds <8 x i8>, <8 x i8>* [[TMP1]], i32 1 // CHECK: [[VTRN1_I:%.*]] = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> -// CHECK: store <8 x i8> [[VTRN1_I]], <8 x i8>* [[TMP2]], align 4, !alias.scope !24 +// CHECK: store <8 x i8> [[VTRN1_I]], <8 x i8>* [[TMP2]], align 4, !alias.scope // CHECK: ret void poly8x8x2_t test_vtrn_p8(poly8x8_t a, poly8x8_t b) { return vtrn_p8(a, b); } -// CHECK: @test_vtrn_p16({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vtrn_p16({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.poly16x4x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast <4 x i16> %a to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <4 x i16> %b to <8 x i8> // CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to <4 x i16>* // CHECK: [[VTRN_I:%.*]] = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> -// CHECK: store <4 x i16> [[VTRN_I]], <4 x i16>* [[TMP3]], align 4, !alias.scope !27 +// CHECK: store <4 x i16> [[VTRN_I]], <4 x i16>* [[TMP3]], align 4, !alias.scope // CHECK: [[TMP4:%.*]] = getelementptr inbounds <4 x i16>, <4 x i16>* [[TMP3]], i32 1 // CHECK: [[VTRN1_I:%.*]] = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> -// CHECK: store <4 x i16> [[VTRN1_I]], <4 x i16>* [[TMP4]], align 4, !alias.scope !27 +// CHECK: store <4 x i16> [[VTRN1_I]], <4 x i16>* [[TMP4]], align 4, !alias.scope // CHECK: ret void poly16x4x2_t test_vtrn_p16(poly16x4_t a, poly16x4_t b) { return vtrn_p16(a, b); } -// CHECK: @test_vtrnq_s8({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vtrnq_s8({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.int8x16x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to <16 x i8>* // CHECK: [[VTRN_I:%.*]] = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> -// CHECK: store <16 x i8> [[VTRN_I]], <16 x i8>* [[TMP1]], align 4, !alias.scope !30 +// CHECK: store <16 x i8> [[VTRN_I]], <16 x i8>* [[TMP1]], align 4, !alias.scope // CHECK: [[TMP2:%.*]] = getelementptr inbounds <16 x i8>, <16 x i8>* [[TMP1]], i32 1 // CHECK: [[VTRN1_I:%.*]] = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> -// CHECK: store <16 x i8> [[VTRN1_I]], <16 x i8>* [[TMP2]], align 4, !alias.scope !30 +// CHECK: store <16 x i8> [[VTRN1_I]], <16 x i8>* [[TMP2]], align 4, !alias.scope // CHECK: ret void int8x16x2_t test_vtrnq_s8(int8x16_t a, int8x16_t b) { return vtrnq_s8(a, b); } -// CHECK: @test_vtrnq_s16({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vtrnq_s16({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.int16x8x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast <8 x i16> %a to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i16> %b to <16 x i8> // CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to <8 x i16>* // CHECK: [[VTRN_I:%.*]] = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> -// CHECK: store <8 x i16> [[VTRN_I]], <8 x i16>* [[TMP3]], align 4, !alias.scope !33 +// CHECK: store <8 x i16> [[VTRN_I]], <8 x i16>* [[TMP3]], align 4, !alias.scope // CHECK: [[TMP4:%.*]] = getelementptr inbounds <8 x i16>, <8 x i16>* [[TMP3]], i32 1 // CHECK: [[VTRN1_I:%.*]] = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> -// CHECK: store <8 x i16> [[VTRN1_I]], <8 x i16>* [[TMP4]], align 4, !alias.scope !33 +// CHECK: store <8 x i16> [[VTRN1_I]], <8 x i16>* [[TMP4]], align 4, !alias.scope // CHECK: ret void int16x8x2_t test_vtrnq_s16(int16x8_t a, int16x8_t b) { return vtrnq_s16(a, b); } -// CHECK: @test_vtrnq_s32({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vtrnq_s32({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.int32x4x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast <4 x i32> %a to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <4 x i32> %b to <16 x i8> // CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to <4 x i32>* // CHECK: [[VTRN_I:%.*]] = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> -// CHECK: store <4 x i32> [[VTRN_I]], <4 x i32>* [[TMP3]], align 4, !alias.scope !36 +// CHECK: store <4 x i32> [[VTRN_I]], <4 x i32>* [[TMP3]], align 4, !alias.scope // CHECK: [[TMP4:%.*]] = getelementptr inbounds <4 x i32>, <4 x i32>* [[TMP3]], i32 1 // CHECK: [[VTRN1_I:%.*]] = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> -// CHECK: store <4 x i32> [[VTRN1_I]], <4 x i32>* [[TMP4]], align 4, !alias.scope !36 +// CHECK: store <4 x i32> [[VTRN1_I]], <4 x i32>* [[TMP4]], align 4, !alias.scope // CHECK: ret void int32x4x2_t test_vtrnq_s32(int32x4_t a, int32x4_t b) { return vtrnq_s32(a, b); } -// CHECK: @test_vtrnq_u8({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vtrnq_u8({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.uint8x16x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to <16 x i8>* // CHECK: [[VTRN_I:%.*]] = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> -// CHECK: store <16 x i8> [[VTRN_I]], <16 x i8>* [[TMP1]], align 4, !alias.scope !39 +// CHECK: store <16 x i8> [[VTRN_I]], <16 x i8>* [[TMP1]], align 4, !alias.scope // CHECK: [[TMP2:%.*]] = getelementptr inbounds <16 x i8>, <16 x i8>* [[TMP1]], i32 1 // CHECK: [[VTRN1_I:%.*]] = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> -// CHECK: store <16 x i8> [[VTRN1_I]], <16 x i8>* [[TMP2]], align 4, !alias.scope !39 +// CHECK: store <16 x i8> [[VTRN1_I]], <16 x i8>* [[TMP2]], align 4, !alias.scope // CHECK: ret void uint8x16x2_t test_vtrnq_u8(uint8x16_t a, uint8x16_t b) { return vtrnq_u8(a, b); } -// CHECK: @test_vtrnq_u16({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vtrnq_u16({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.uint16x8x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast <8 x i16> %a to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i16> %b to <16 x i8> // CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to <8 x i16>* // CHECK: [[VTRN_I:%.*]] = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> -// CHECK: store <8 x i16> [[VTRN_I]], <8 x i16>* [[TMP3]], align 4, !alias.scope !42 +// CHECK: store <8 x i16> [[VTRN_I]], <8 x i16>* [[TMP3]], align 4, !alias.scope // CHECK: [[TMP4:%.*]] = getelementptr inbounds <8 x i16>, <8 x i16>* [[TMP3]], i32 1 // CHECK: [[VTRN1_I:%.*]] = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> -// CHECK: store <8 x i16> [[VTRN1_I]], <8 x i16>* [[TMP4]], align 4, !alias.scope !42 +// CHECK: store <8 x i16> [[VTRN1_I]], <8 x i16>* [[TMP4]], align 4, !alias.scope // CHECK: ret void uint16x8x2_t test_vtrnq_u16(uint16x8_t a, uint16x8_t b) { return vtrnq_u16(a, b); } -// CHECK: @test_vtrnq_u32({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vtrnq_u32({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.uint32x4x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast <4 x i32> %a to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <4 x i32> %b to <16 x i8> // CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to <4 x i32>* // CHECK: [[VTRN_I:%.*]] = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> -// CHECK: store <4 x i32> [[VTRN_I]], <4 x i32>* [[TMP3]], align 4, !alias.scope !45 +// CHECK: store <4 x i32> [[VTRN_I]], <4 x i32>* [[TMP3]], align 4, !alias.scope // CHECK: [[TMP4:%.*]] = getelementptr inbounds <4 x i32>, <4 x i32>* [[TMP3]], i32 1 // CHECK: [[VTRN1_I:%.*]] = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> -// CHECK: store <4 x i32> [[VTRN1_I]], <4 x i32>* [[TMP4]], align 4, !alias.scope !45 +// CHECK: store <4 x i32> [[VTRN1_I]], <4 x i32>* [[TMP4]], align 4, !alias.scope // CHECK: ret void uint32x4x2_t test_vtrnq_u32(uint32x4_t a, uint32x4_t b) { return vtrnq_u32(a, b); } -// CHECK: @test_vtrnq_f32({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vtrnq_f32({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.float32x4x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast <4 x float> %a to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <4 x float> %b to <16 x i8> // CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to <4 x float>* // CHECK: [[VTRN_I:%.*]] = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> -// CHECK: store <4 x float> [[VTRN_I]], <4 x float>* [[TMP3]], align 4, !alias.scope !48 +// CHECK: store <4 x float> [[VTRN_I]], <4 x float>* [[TMP3]], align 4, !alias.scope // CHECK: [[TMP4:%.*]] = getelementptr inbounds <4 x float>, <4 x float>* [[TMP3]], i32 1 // CHECK: [[VTRN1_I:%.*]] = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> -// CHECK: store <4 x float> [[VTRN1_I]], <4 x float>* [[TMP4]], align 4, !alias.scope !48 +// CHECK: store <4 x float> [[VTRN1_I]], <4 x float>* [[TMP4]], align 4, !alias.scope // CHECK: ret void float32x4x2_t test_vtrnq_f32(float32x4_t a, float32x4_t b) { return vtrnq_f32(a, b); } -// CHECK: @test_vtrnq_p8({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vtrnq_p8({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.poly8x16x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to <16 x i8>* // CHECK: [[VTRN_I:%.*]] = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> -// CHECK: store <16 x i8> [[VTRN_I]], <16 x i8>* [[TMP1]], align 4, !alias.scope !51 +// CHECK: store <16 x i8> [[VTRN_I]], <16 x i8>* [[TMP1]], align 4, !alias.scope // CHECK: [[TMP2:%.*]] = getelementptr inbounds <16 x i8>, <16 x i8>* [[TMP1]], i32 1 // CHECK: [[VTRN1_I:%.*]] = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> -// CHECK: store <16 x i8> [[VTRN1_I]], <16 x i8>* [[TMP2]], align 4, !alias.scope !51 +// CHECK: store <16 x i8> [[VTRN1_I]], <16 x i8>* [[TMP2]], align 4, !alias.scope // CHECK: ret void poly8x16x2_t test_vtrnq_p8(poly8x16_t a, poly8x16_t b) { return vtrnq_p8(a, b); } -// CHECK: @test_vtrnq_p16({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vtrnq_p16({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.poly16x8x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast <8 x i16> %a to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i16> %b to <16 x i8> // CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to <8 x i16>* // CHECK: [[VTRN_I:%.*]] = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> -// CHECK: store <8 x i16> [[VTRN_I]], <8 x i16>* [[TMP3]], align 4, !alias.scope !54 +// CHECK: store <8 x i16> [[VTRN_I]], <8 x i16>* [[TMP3]], align 4, !alias.scope // CHECK: [[TMP4:%.*]] = getelementptr inbounds <8 x i16>, <8 x i16>* [[TMP3]], i32 1 // CHECK: [[VTRN1_I:%.*]] = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> -// CHECK: store <8 x i16> [[VTRN1_I]], <8 x i16>* [[TMP4]], align 4, !alias.scope !54 +// CHECK: store <8 x i16> [[VTRN1_I]], <8 x i16>* [[TMP4]], align 4, !alias.scope // CHECK: ret void poly16x8x2_t test_vtrnq_p16(poly16x8_t a, poly16x8_t b) { return vtrnq_p16(a, b); @@ -20645,517 +20645,517 @@ return vtstq_p16(a, b); } -// CHECK: @test_vuzp_s8({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vuzp_s8({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.int8x8x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to <8 x i8>* // CHECK: [[VUZP_I:%.*]] = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> -// CHECK: store <8 x i8> [[VUZP_I]], <8 x i8>* [[TMP1]], align 4, !alias.scope !57 +// CHECK: store <8 x i8> [[VUZP_I]], <8 x i8>* [[TMP1]], align 4, !alias.scope // CHECK: [[TMP2:%.*]] = getelementptr inbounds <8 x i8>, <8 x i8>* [[TMP1]], i32 1 // CHECK: [[VUZP1_I:%.*]] = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> -// CHECK: store <8 x i8> [[VUZP1_I]], <8 x i8>* [[TMP2]], align 4, !alias.scope !57 +// CHECK: store <8 x i8> [[VUZP1_I]], <8 x i8>* [[TMP2]], align 4, !alias.scope // CHECK: ret void int8x8x2_t test_vuzp_s8(int8x8_t a, int8x8_t b) { return vuzp_s8(a, b); } -// CHECK: @test_vuzp_s16({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vuzp_s16({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.int16x4x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast <4 x i16> %a to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <4 x i16> %b to <8 x i8> // CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to <4 x i16>* // CHECK: [[VUZP_I:%.*]] = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> -// CHECK: store <4 x i16> [[VUZP_I]], <4 x i16>* [[TMP3]], align 4, !alias.scope !60 +// CHECK: store <4 x i16> [[VUZP_I]], <4 x i16>* [[TMP3]], align 4, !alias.scope // CHECK: [[TMP4:%.*]] = getelementptr inbounds <4 x i16>, <4 x i16>* [[TMP3]], i32 1 // CHECK: [[VUZP1_I:%.*]] = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> -// CHECK: store <4 x i16> [[VUZP1_I]], <4 x i16>* [[TMP4]], align 4, !alias.scope !60 +// CHECK: store <4 x i16> [[VUZP1_I]], <4 x i16>* [[TMP4]], align 4, !alias.scope // CHECK: ret void int16x4x2_t test_vuzp_s16(int16x4_t a, int16x4_t b) { return vuzp_s16(a, b); } -// CHECK: @test_vuzp_s32({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vuzp_s32({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.int32x2x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast <2 x i32> %a to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <2 x i32> %b to <8 x i8> // CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to <2 x i32>* // CHECK: [[VUZP_I:%.*]] = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> -// CHECK: store <2 x i32> [[VUZP_I]], <2 x i32>* [[TMP3]], align 4, !alias.scope !63 +// CHECK: store <2 x i32> [[VUZP_I]], <2 x i32>* [[TMP3]], align 4, !alias.scope // CHECK: [[TMP4:%.*]] = getelementptr inbounds <2 x i32>, <2 x i32>* [[TMP3]], i32 1 // CHECK: [[VUZP1_I:%.*]] = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> -// CHECK: store <2 x i32> [[VUZP1_I]], <2 x i32>* [[TMP4]], align 4, !alias.scope !63 +// CHECK: store <2 x i32> [[VUZP1_I]], <2 x i32>* [[TMP4]], align 4, !alias.scope // CHECK: ret void int32x2x2_t test_vuzp_s32(int32x2_t a, int32x2_t b) { return vuzp_s32(a, b); } -// CHECK: @test_vuzp_u8({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vuzp_u8({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.uint8x8x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to <8 x i8>* // CHECK: [[VUZP_I:%.*]] = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> -// CHECK: store <8 x i8> [[VUZP_I]], <8 x i8>* [[TMP1]], align 4, !alias.scope !66 +// CHECK: store <8 x i8> [[VUZP_I]], <8 x i8>* [[TMP1]], align 4, !alias.scope // CHECK: [[TMP2:%.*]] = getelementptr inbounds <8 x i8>, <8 x i8>* [[TMP1]], i32 1 // CHECK: [[VUZP1_I:%.*]] = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> -// CHECK: store <8 x i8> [[VUZP1_I]], <8 x i8>* [[TMP2]], align 4, !alias.scope !66 +// CHECK: store <8 x i8> [[VUZP1_I]], <8 x i8>* [[TMP2]], align 4, !alias.scope // CHECK: ret void uint8x8x2_t test_vuzp_u8(uint8x8_t a, uint8x8_t b) { return vuzp_u8(a, b); } -// CHECK: @test_vuzp_u16({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vuzp_u16({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.uint16x4x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast <4 x i16> %a to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <4 x i16> %b to <8 x i8> // CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to <4 x i16>* // CHECK: [[VUZP_I:%.*]] = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> -// CHECK: store <4 x i16> [[VUZP_I]], <4 x i16>* [[TMP3]], align 4, !alias.scope !69 +// CHECK: store <4 x i16> [[VUZP_I]], <4 x i16>* [[TMP3]], align 4, !alias.scope // CHECK: [[TMP4:%.*]] = getelementptr inbounds <4 x i16>, <4 x i16>* [[TMP3]], i32 1 // CHECK: [[VUZP1_I:%.*]] = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> -// CHECK: store <4 x i16> [[VUZP1_I]], <4 x i16>* [[TMP4]], align 4, !alias.scope !69 +// CHECK: store <4 x i16> [[VUZP1_I]], <4 x i16>* [[TMP4]], align 4, !alias.scope // CHECK: ret void uint16x4x2_t test_vuzp_u16(uint16x4_t a, uint16x4_t b) { return vuzp_u16(a, b); } -// CHECK: @test_vuzp_u32({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vuzp_u32({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.uint32x2x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast <2 x i32> %a to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <2 x i32> %b to <8 x i8> // CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to <2 x i32>* // CHECK: [[VUZP_I:%.*]] = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> -// CHECK: store <2 x i32> [[VUZP_I]], <2 x i32>* [[TMP3]], align 4, !alias.scope !72 +// CHECK: store <2 x i32> [[VUZP_I]], <2 x i32>* [[TMP3]], align 4, !alias.scope // CHECK: [[TMP4:%.*]] = getelementptr inbounds <2 x i32>, <2 x i32>* [[TMP3]], i32 1 // CHECK: [[VUZP1_I:%.*]] = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> -// CHECK: store <2 x i32> [[VUZP1_I]], <2 x i32>* [[TMP4]], align 4, !alias.scope !72 +// CHECK: store <2 x i32> [[VUZP1_I]], <2 x i32>* [[TMP4]], align 4, !alias.scope // CHECK: ret void uint32x2x2_t test_vuzp_u32(uint32x2_t a, uint32x2_t b) { return vuzp_u32(a, b); } -// CHECK: @test_vuzp_f32({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vuzp_f32({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.float32x2x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast <2 x float> %a to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <2 x float> %b to <8 x i8> // CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to <2 x float>* // CHECK: [[VUZP_I:%.*]] = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> -// CHECK: store <2 x float> [[VUZP_I]], <2 x float>* [[TMP3]], align 4, !alias.scope !75 +// CHECK: store <2 x float> [[VUZP_I]], <2 x float>* [[TMP3]], align 4, !alias.scope // CHECK: [[TMP4:%.*]] = getelementptr inbounds <2 x float>, <2 x float>* [[TMP3]], i32 1 // CHECK: [[VUZP1_I:%.*]] = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> -// CHECK: store <2 x float> [[VUZP1_I]], <2 x float>* [[TMP4]], align 4, !alias.scope !75 +// CHECK: store <2 x float> [[VUZP1_I]], <2 x float>* [[TMP4]], align 4, !alias.scope // CHECK: ret void float32x2x2_t test_vuzp_f32(float32x2_t a, float32x2_t b) { return vuzp_f32(a, b); } -// CHECK: @test_vuzp_p8({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vuzp_p8({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.poly8x8x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to <8 x i8>* // CHECK: [[VUZP_I:%.*]] = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> -// CHECK: store <8 x i8> [[VUZP_I]], <8 x i8>* [[TMP1]], align 4, !alias.scope !78 +// CHECK: store <8 x i8> [[VUZP_I]], <8 x i8>* [[TMP1]], align 4, !alias.scope // CHECK: [[TMP2:%.*]] = getelementptr inbounds <8 x i8>, <8 x i8>* [[TMP1]], i32 1 // CHECK: [[VUZP1_I:%.*]] = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> -// CHECK: store <8 x i8> [[VUZP1_I]], <8 x i8>* [[TMP2]], align 4, !alias.scope !78 +// CHECK: store <8 x i8> [[VUZP1_I]], <8 x i8>* [[TMP2]], align 4, !alias.scope // CHECK: ret void poly8x8x2_t test_vuzp_p8(poly8x8_t a, poly8x8_t b) { return vuzp_p8(a, b); } -// CHECK: @test_vuzp_p16({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vuzp_p16({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.poly16x4x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast <4 x i16> %a to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <4 x i16> %b to <8 x i8> // CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to <4 x i16>* // CHECK: [[VUZP_I:%.*]] = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> -// CHECK: store <4 x i16> [[VUZP_I]], <4 x i16>* [[TMP3]], align 4, !alias.scope !81 +// CHECK: store <4 x i16> [[VUZP_I]], <4 x i16>* [[TMP3]], align 4, !alias.scope // CHECK: [[TMP4:%.*]] = getelementptr inbounds <4 x i16>, <4 x i16>* [[TMP3]], i32 1 // CHECK: [[VUZP1_I:%.*]] = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> -// CHECK: store <4 x i16> [[VUZP1_I]], <4 x i16>* [[TMP4]], align 4, !alias.scope !81 +// CHECK: store <4 x i16> [[VUZP1_I]], <4 x i16>* [[TMP4]], align 4, !alias.scope // CHECK: ret void poly16x4x2_t test_vuzp_p16(poly16x4_t a, poly16x4_t b) { return vuzp_p16(a, b); } -// CHECK: @test_vuzpq_s8({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vuzpq_s8({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.int8x16x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to <16 x i8>* // CHECK: [[VUZP_I:%.*]] = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> -// CHECK: store <16 x i8> [[VUZP_I]], <16 x i8>* [[TMP1]], align 4, !alias.scope !84 +// CHECK: store <16 x i8> [[VUZP_I]], <16 x i8>* [[TMP1]], align 4, !alias.scope // CHECK: [[TMP2:%.*]] = getelementptr inbounds <16 x i8>, <16 x i8>* [[TMP1]], i32 1 // CHECK: [[VUZP1_I:%.*]] = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> -// CHECK: store <16 x i8> [[VUZP1_I]], <16 x i8>* [[TMP2]], align 4, !alias.scope !84 +// CHECK: store <16 x i8> [[VUZP1_I]], <16 x i8>* [[TMP2]], align 4, !alias.scope // CHECK: ret void int8x16x2_t test_vuzpq_s8(int8x16_t a, int8x16_t b) { return vuzpq_s8(a, b); } -// CHECK: @test_vuzpq_s16({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vuzpq_s16({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.int16x8x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast <8 x i16> %a to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i16> %b to <16 x i8> // CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to <8 x i16>* // CHECK: [[VUZP_I:%.*]] = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> -// CHECK: store <8 x i16> [[VUZP_I]], <8 x i16>* [[TMP3]], align 4, !alias.scope !87 +// CHECK: store <8 x i16> [[VUZP_I]], <8 x i16>* [[TMP3]], align 4, !alias.scope // CHECK: [[TMP4:%.*]] = getelementptr inbounds <8 x i16>, <8 x i16>* [[TMP3]], i32 1 // CHECK: [[VUZP1_I:%.*]] = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> -// CHECK: store <8 x i16> [[VUZP1_I]], <8 x i16>* [[TMP4]], align 4, !alias.scope !87 +// CHECK: store <8 x i16> [[VUZP1_I]], <8 x i16>* [[TMP4]], align 4, !alias.scope // CHECK: ret void int16x8x2_t test_vuzpq_s16(int16x8_t a, int16x8_t b) { return vuzpq_s16(a, b); } -// CHECK: @test_vuzpq_s32({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vuzpq_s32({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.int32x4x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast <4 x i32> %a to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <4 x i32> %b to <16 x i8> // CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to <4 x i32>* // CHECK: [[VUZP_I:%.*]] = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> -// CHECK: store <4 x i32> [[VUZP_I]], <4 x i32>* [[TMP3]], align 4, !alias.scope !90 +// CHECK: store <4 x i32> [[VUZP_I]], <4 x i32>* [[TMP3]], align 4, !alias.scope // CHECK: [[TMP4:%.*]] = getelementptr inbounds <4 x i32>, <4 x i32>* [[TMP3]], i32 1 // CHECK: [[VUZP1_I:%.*]] = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> -// CHECK: store <4 x i32> [[VUZP1_I]], <4 x i32>* [[TMP4]], align 4, !alias.scope !90 +// CHECK: store <4 x i32> [[VUZP1_I]], <4 x i32>* [[TMP4]], align 4, !alias.scope // CHECK: ret void int32x4x2_t test_vuzpq_s32(int32x4_t a, int32x4_t b) { return vuzpq_s32(a, b); } -// CHECK: @test_vuzpq_u8({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vuzpq_u8({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.uint8x16x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to <16 x i8>* // CHECK: [[VUZP_I:%.*]] = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> -// CHECK: store <16 x i8> [[VUZP_I]], <16 x i8>* [[TMP1]], align 4, !alias.scope !93 +// CHECK: store <16 x i8> [[VUZP_I]], <16 x i8>* [[TMP1]], align 4, !alias.scope // CHECK: [[TMP2:%.*]] = getelementptr inbounds <16 x i8>, <16 x i8>* [[TMP1]], i32 1 // CHECK: [[VUZP1_I:%.*]] = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> -// CHECK: store <16 x i8> [[VUZP1_I]], <16 x i8>* [[TMP2]], align 4, !alias.scope !93 +// CHECK: store <16 x i8> [[VUZP1_I]], <16 x i8>* [[TMP2]], align 4, !alias.scope // CHECK: ret void uint8x16x2_t test_vuzpq_u8(uint8x16_t a, uint8x16_t b) { return vuzpq_u8(a, b); } -// CHECK: @test_vuzpq_u16({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vuzpq_u16({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.uint16x8x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast <8 x i16> %a to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i16> %b to <16 x i8> // CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to <8 x i16>* // CHECK: [[VUZP_I:%.*]] = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> -// CHECK: store <8 x i16> [[VUZP_I]], <8 x i16>* [[TMP3]], align 4, !alias.scope !96 +// CHECK: store <8 x i16> [[VUZP_I]], <8 x i16>* [[TMP3]], align 4, !alias.scope // CHECK: [[TMP4:%.*]] = getelementptr inbounds <8 x i16>, <8 x i16>* [[TMP3]], i32 1 // CHECK: [[VUZP1_I:%.*]] = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> -// CHECK: store <8 x i16> [[VUZP1_I]], <8 x i16>* [[TMP4]], align 4, !alias.scope !96 +// CHECK: store <8 x i16> [[VUZP1_I]], <8 x i16>* [[TMP4]], align 4, !alias.scope // CHECK: ret void uint16x8x2_t test_vuzpq_u16(uint16x8_t a, uint16x8_t b) { return vuzpq_u16(a, b); } -// CHECK: @test_vuzpq_u32({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vuzpq_u32({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.uint32x4x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast <4 x i32> %a to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <4 x i32> %b to <16 x i8> // CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to <4 x i32>* // CHECK: [[VUZP_I:%.*]] = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> -// CHECK: store <4 x i32> [[VUZP_I]], <4 x i32>* [[TMP3]], align 4, !alias.scope !99 +// CHECK: store <4 x i32> [[VUZP_I]], <4 x i32>* [[TMP3]], align 4, !alias.scope // CHECK: [[TMP4:%.*]] = getelementptr inbounds <4 x i32>, <4 x i32>* [[TMP3]], i32 1 // CHECK: [[VUZP1_I:%.*]] = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> -// CHECK: store <4 x i32> [[VUZP1_I]], <4 x i32>* [[TMP4]], align 4, !alias.scope !99 +// CHECK: store <4 x i32> [[VUZP1_I]], <4 x i32>* [[TMP4]], align 4, !alias.scope // CHECK: ret void uint32x4x2_t test_vuzpq_u32(uint32x4_t a, uint32x4_t b) { return vuzpq_u32(a, b); } -// CHECK: @test_vuzpq_f32({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vuzpq_f32({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.float32x4x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast <4 x float> %a to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <4 x float> %b to <16 x i8> // CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to <4 x float>* // CHECK: [[VUZP_I:%.*]] = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> -// CHECK: store <4 x float> [[VUZP_I]], <4 x float>* [[TMP3]], align 4, !alias.scope !102 +// CHECK: store <4 x float> [[VUZP_I]], <4 x float>* [[TMP3]], align 4, !alias.scope // CHECK: [[TMP4:%.*]] = getelementptr inbounds <4 x float>, <4 x float>* [[TMP3]], i32 1 // CHECK: [[VUZP1_I:%.*]] = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> -// CHECK: store <4 x float> [[VUZP1_I]], <4 x float>* [[TMP4]], align 4, !alias.scope !102 +// CHECK: store <4 x float> [[VUZP1_I]], <4 x float>* [[TMP4]], align 4, !alias.scope // CHECK: ret void float32x4x2_t test_vuzpq_f32(float32x4_t a, float32x4_t b) { return vuzpq_f32(a, b); } -// CHECK: @test_vuzpq_p8({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vuzpq_p8({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.poly8x16x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to <16 x i8>* // CHECK: [[VUZP_I:%.*]] = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> -// CHECK: store <16 x i8> [[VUZP_I]], <16 x i8>* [[TMP1]], align 4, !alias.scope !105 +// CHECK: store <16 x i8> [[VUZP_I]], <16 x i8>* [[TMP1]], align 4, !alias.scope // CHECK: [[TMP2:%.*]] = getelementptr inbounds <16 x i8>, <16 x i8>* [[TMP1]], i32 1 // CHECK: [[VUZP1_I:%.*]] = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> -// CHECK: store <16 x i8> [[VUZP1_I]], <16 x i8>* [[TMP2]], align 4, !alias.scope !105 +// CHECK: store <16 x i8> [[VUZP1_I]], <16 x i8>* [[TMP2]], align 4, !alias.scope // CHECK: ret void poly8x16x2_t test_vuzpq_p8(poly8x16_t a, poly8x16_t b) { return vuzpq_p8(a, b); } -// CHECK: @test_vuzpq_p16({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vuzpq_p16({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.poly16x8x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast <8 x i16> %a to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i16> %b to <16 x i8> // CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to <8 x i16>* // CHECK: [[VUZP_I:%.*]] = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> -// CHECK: store <8 x i16> [[VUZP_I]], <8 x i16>* [[TMP3]], align 4, !alias.scope !108 +// CHECK: store <8 x i16> [[VUZP_I]], <8 x i16>* [[TMP3]], align 4, !alias.scope // CHECK: [[TMP4:%.*]] = getelementptr inbounds <8 x i16>, <8 x i16>* [[TMP3]], i32 1 // CHECK: [[VUZP1_I:%.*]] = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> -// CHECK: store <8 x i16> [[VUZP1_I]], <8 x i16>* [[TMP4]], align 4, !alias.scope !108 +// CHECK: store <8 x i16> [[VUZP1_I]], <8 x i16>* [[TMP4]], align 4, !alias.scope // CHECK: ret void poly16x8x2_t test_vuzpq_p16(poly16x8_t a, poly16x8_t b) { return vuzpq_p16(a, b); } -// CHECK: @test_vzip_s8({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vzip_s8({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.int8x8x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to <8 x i8>* // CHECK: [[VZIP_I:%.*]] = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> -// CHECK: store <8 x i8> [[VZIP_I]], <8 x i8>* [[TMP1]], align 4, !alias.scope !111 +// CHECK: store <8 x i8> [[VZIP_I]], <8 x i8>* [[TMP1]], align 4, !alias.scope // CHECK: [[TMP2:%.*]] = getelementptr inbounds <8 x i8>, <8 x i8>* [[TMP1]], i32 1 // CHECK: [[VZIP1_I:%.*]] = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> -// CHECK: store <8 x i8> [[VZIP1_I]], <8 x i8>* [[TMP2]], align 4, !alias.scope !111 +// CHECK: store <8 x i8> [[VZIP1_I]], <8 x i8>* [[TMP2]], align 4, !alias.scope // CHECK: ret void int8x8x2_t test_vzip_s8(int8x8_t a, int8x8_t b) { return vzip_s8(a, b); } -// CHECK: @test_vzip_s16({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vzip_s16({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.int16x4x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast <4 x i16> %a to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <4 x i16> %b to <8 x i8> // CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to <4 x i16>* // CHECK: [[VZIP_I:%.*]] = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> -// CHECK: store <4 x i16> [[VZIP_I]], <4 x i16>* [[TMP3]], align 4, !alias.scope !114 +// CHECK: store <4 x i16> [[VZIP_I]], <4 x i16>* [[TMP3]], align 4, !alias.scope // CHECK: [[TMP4:%.*]] = getelementptr inbounds <4 x i16>, <4 x i16>* [[TMP3]], i32 1 // CHECK: [[VZIP1_I:%.*]] = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> -// CHECK: store <4 x i16> [[VZIP1_I]], <4 x i16>* [[TMP4]], align 4, !alias.scope !114 +// CHECK: store <4 x i16> [[VZIP1_I]], <4 x i16>* [[TMP4]], align 4, !alias.scope // CHECK: ret void int16x4x2_t test_vzip_s16(int16x4_t a, int16x4_t b) { return vzip_s16(a, b); } -// CHECK: @test_vzip_s32({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vzip_s32({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.int32x2x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast <2 x i32> %a to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <2 x i32> %b to <8 x i8> // CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to <2 x i32>* // CHECK: [[VZIP_I:%.*]] = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> -// CHECK: store <2 x i32> [[VZIP_I]], <2 x i32>* [[TMP3]], align 4, !alias.scope !117 +// CHECK: store <2 x i32> [[VZIP_I]], <2 x i32>* [[TMP3]], align 4, !alias.scope // CHECK: [[TMP4:%.*]] = getelementptr inbounds <2 x i32>, <2 x i32>* [[TMP3]], i32 1 // CHECK: [[VZIP1_I:%.*]] = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> -// CHECK: store <2 x i32> [[VZIP1_I]], <2 x i32>* [[TMP4]], align 4, !alias.scope !117 +// CHECK: store <2 x i32> [[VZIP1_I]], <2 x i32>* [[TMP4]], align 4, !alias.scope // CHECK: ret void int32x2x2_t test_vzip_s32(int32x2_t a, int32x2_t b) { return vzip_s32(a, b); } -// CHECK: @test_vzip_u8({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vzip_u8({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.uint8x8x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to <8 x i8>* // CHECK: [[VZIP_I:%.*]] = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> -// CHECK: store <8 x i8> [[VZIP_I]], <8 x i8>* [[TMP1]], align 4, !alias.scope !120 +// CHECK: store <8 x i8> [[VZIP_I]], <8 x i8>* [[TMP1]], align 4, !alias.scope // CHECK: [[TMP2:%.*]] = getelementptr inbounds <8 x i8>, <8 x i8>* [[TMP1]], i32 1 // CHECK: [[VZIP1_I:%.*]] = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> -// CHECK: store <8 x i8> [[VZIP1_I]], <8 x i8>* [[TMP2]], align 4, !alias.scope !120 +// CHECK: store <8 x i8> [[VZIP1_I]], <8 x i8>* [[TMP2]], align 4, !alias.scope // CHECK: ret void uint8x8x2_t test_vzip_u8(uint8x8_t a, uint8x8_t b) { return vzip_u8(a, b); } -// CHECK: @test_vzip_u16({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vzip_u16({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.uint16x4x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast <4 x i16> %a to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <4 x i16> %b to <8 x i8> // CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to <4 x i16>* // CHECK: [[VZIP_I:%.*]] = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> -// CHECK: store <4 x i16> [[VZIP_I]], <4 x i16>* [[TMP3]], align 4, !alias.scope !123 +// CHECK: store <4 x i16> [[VZIP_I]], <4 x i16>* [[TMP3]], align 4, !alias.scope // CHECK: [[TMP4:%.*]] = getelementptr inbounds <4 x i16>, <4 x i16>* [[TMP3]], i32 1 // CHECK: [[VZIP1_I:%.*]] = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> -// CHECK: store <4 x i16> [[VZIP1_I]], <4 x i16>* [[TMP4]], align 4, !alias.scope !123 +// CHECK: store <4 x i16> [[VZIP1_I]], <4 x i16>* [[TMP4]], align 4, !alias.scope // CHECK: ret void uint16x4x2_t test_vzip_u16(uint16x4_t a, uint16x4_t b) { return vzip_u16(a, b); } -// CHECK: @test_vzip_u32({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vzip_u32({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.uint32x2x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast <2 x i32> %a to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <2 x i32> %b to <8 x i8> // CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to <2 x i32>* // CHECK: [[VZIP_I:%.*]] = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> -// CHECK: store <2 x i32> [[VZIP_I]], <2 x i32>* [[TMP3]], align 4, !alias.scope !126 +// CHECK: store <2 x i32> [[VZIP_I]], <2 x i32>* [[TMP3]], align 4, !alias.scope // CHECK: [[TMP4:%.*]] = getelementptr inbounds <2 x i32>, <2 x i32>* [[TMP3]], i32 1 // CHECK: [[VZIP1_I:%.*]] = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> -// CHECK: store <2 x i32> [[VZIP1_I]], <2 x i32>* [[TMP4]], align 4, !alias.scope !126 +// CHECK: store <2 x i32> [[VZIP1_I]], <2 x i32>* [[TMP4]], align 4, !alias.scope // CHECK: ret void uint32x2x2_t test_vzip_u32(uint32x2_t a, uint32x2_t b) { return vzip_u32(a, b); } -// CHECK: @test_vzip_f32({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vzip_f32({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.float32x2x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast <2 x float> %a to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <2 x float> %b to <8 x i8> // CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to <2 x float>* // CHECK: [[VZIP_I:%.*]] = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> -// CHECK: store <2 x float> [[VZIP_I]], <2 x float>* [[TMP3]], align 4, !alias.scope !129 +// CHECK: store <2 x float> [[VZIP_I]], <2 x float>* [[TMP3]], align 4, !alias.scope // CHECK: [[TMP4:%.*]] = getelementptr inbounds <2 x float>, <2 x float>* [[TMP3]], i32 1 // CHECK: [[VZIP1_I:%.*]] = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> -// CHECK: store <2 x float> [[VZIP1_I]], <2 x float>* [[TMP4]], align 4, !alias.scope !129 +// CHECK: store <2 x float> [[VZIP1_I]], <2 x float>* [[TMP4]], align 4, !alias.scope // CHECK: ret void float32x2x2_t test_vzip_f32(float32x2_t a, float32x2_t b) { return vzip_f32(a, b); } -// CHECK: @test_vzip_p8({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vzip_p8({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.poly8x8x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to <8 x i8>* // CHECK: [[VZIP_I:%.*]] = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> -// CHECK: store <8 x i8> [[VZIP_I]], <8 x i8>* [[TMP1]], align 4, !alias.scope !132 +// CHECK: store <8 x i8> [[VZIP_I]], <8 x i8>* [[TMP1]], align 4, !alias.scope // CHECK: [[TMP2:%.*]] = getelementptr inbounds <8 x i8>, <8 x i8>* [[TMP1]], i32 1 // CHECK: [[VZIP1_I:%.*]] = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> -// CHECK: store <8 x i8> [[VZIP1_I]], <8 x i8>* [[TMP2]], align 4, !alias.scope !132 +// CHECK: store <8 x i8> [[VZIP1_I]], <8 x i8>* [[TMP2]], align 4, !alias.scope // CHECK: ret void poly8x8x2_t test_vzip_p8(poly8x8_t a, poly8x8_t b) { return vzip_p8(a, b); } -// CHECK: @test_vzip_p16({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vzip_p16({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.poly16x4x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast <4 x i16> %a to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <4 x i16> %b to <8 x i8> // CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to <4 x i16>* // CHECK: [[VZIP_I:%.*]] = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> -// CHECK: store <4 x i16> [[VZIP_I]], <4 x i16>* [[TMP3]], align 4, !alias.scope !135 +// CHECK: store <4 x i16> [[VZIP_I]], <4 x i16>* [[TMP3]], align 4, !alias.scope // CHECK: [[TMP4:%.*]] = getelementptr inbounds <4 x i16>, <4 x i16>* [[TMP3]], i32 1 // CHECK: [[VZIP1_I:%.*]] = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> -// CHECK: store <4 x i16> [[VZIP1_I]], <4 x i16>* [[TMP4]], align 4, !alias.scope !135 +// CHECK: store <4 x i16> [[VZIP1_I]], <4 x i16>* [[TMP4]], align 4, !alias.scope // CHECK: ret void poly16x4x2_t test_vzip_p16(poly16x4_t a, poly16x4_t b) { return vzip_p16(a, b); } -// CHECK: @test_vzipq_s8({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vzipq_s8({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.int8x16x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to <16 x i8>* // CHECK: [[VZIP_I:%.*]] = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> -// CHECK: store <16 x i8> [[VZIP_I]], <16 x i8>* [[TMP1]], align 4, !alias.scope !138 +// CHECK: store <16 x i8> [[VZIP_I]], <16 x i8>* [[TMP1]], align 4, !alias.scope // CHECK: [[TMP2:%.*]] = getelementptr inbounds <16 x i8>, <16 x i8>* [[TMP1]], i32 1 // CHECK: [[VZIP1_I:%.*]] = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> -// CHECK: store <16 x i8> [[VZIP1_I]], <16 x i8>* [[TMP2]], align 4, !alias.scope !138 +// CHECK: store <16 x i8> [[VZIP1_I]], <16 x i8>* [[TMP2]], align 4, !alias.scope // CHECK: ret void int8x16x2_t test_vzipq_s8(int8x16_t a, int8x16_t b) { return vzipq_s8(a, b); } -// CHECK: @test_vzipq_s16({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vzipq_s16({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.int16x8x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast <8 x i16> %a to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i16> %b to <16 x i8> // CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to <8 x i16>* // CHECK: [[VZIP_I:%.*]] = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> -// CHECK: store <8 x i16> [[VZIP_I]], <8 x i16>* [[TMP3]], align 4, !alias.scope !141 +// CHECK: store <8 x i16> [[VZIP_I]], <8 x i16>* [[TMP3]], align 4, !alias.scope // CHECK: [[TMP4:%.*]] = getelementptr inbounds <8 x i16>, <8 x i16>* [[TMP3]], i32 1 // CHECK: [[VZIP1_I:%.*]] = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> -// CHECK: store <8 x i16> [[VZIP1_I]], <8 x i16>* [[TMP4]], align 4, !alias.scope !141 +// CHECK: store <8 x i16> [[VZIP1_I]], <8 x i16>* [[TMP4]], align 4, !alias.scope // CHECK: ret void int16x8x2_t test_vzipq_s16(int16x8_t a, int16x8_t b) { return vzipq_s16(a, b); } -// CHECK: @test_vzipq_s32({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vzipq_s32({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.int32x4x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast <4 x i32> %a to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <4 x i32> %b to <16 x i8> // CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to <4 x i32>* // CHECK: [[VZIP_I:%.*]] = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> -// CHECK: store <4 x i32> [[VZIP_I]], <4 x i32>* [[TMP3]], align 4, !alias.scope !144 +// CHECK: store <4 x i32> [[VZIP_I]], <4 x i32>* [[TMP3]], align 4, !alias.scope // CHECK: [[TMP4:%.*]] = getelementptr inbounds <4 x i32>, <4 x i32>* [[TMP3]], i32 1 // CHECK: [[VZIP1_I:%.*]] = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> -// CHECK: store <4 x i32> [[VZIP1_I]], <4 x i32>* [[TMP4]], align 4, !alias.scope !144 +// CHECK: store <4 x i32> [[VZIP1_I]], <4 x i32>* [[TMP4]], align 4, !alias.scope // CHECK: ret void int32x4x2_t test_vzipq_s32(int32x4_t a, int32x4_t b) { return vzipq_s32(a, b); } -// CHECK: @test_vzipq_u8({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vzipq_u8({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.uint8x16x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to <16 x i8>* // CHECK: [[VZIP_I:%.*]] = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> -// CHECK: store <16 x i8> [[VZIP_I]], <16 x i8>* [[TMP1]], align 4, !alias.scope !147 +// CHECK: store <16 x i8> [[VZIP_I]], <16 x i8>* [[TMP1]], align 4, !alias.scope // CHECK: [[TMP2:%.*]] = getelementptr inbounds <16 x i8>, <16 x i8>* [[TMP1]], i32 1 // CHECK: [[VZIP1_I:%.*]] = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> -// CHECK: store <16 x i8> [[VZIP1_I]], <16 x i8>* [[TMP2]], align 4, !alias.scope !147 +// CHECK: store <16 x i8> [[VZIP1_I]], <16 x i8>* [[TMP2]], align 4, !alias.scope // CHECK: ret void uint8x16x2_t test_vzipq_u8(uint8x16_t a, uint8x16_t b) { return vzipq_u8(a, b); } -// CHECK: @test_vzipq_u16({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vzipq_u16({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.uint16x8x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast <8 x i16> %a to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i16> %b to <16 x i8> // CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to <8 x i16>* // CHECK: [[VZIP_I:%.*]] = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> -// CHECK: store <8 x i16> [[VZIP_I]], <8 x i16>* [[TMP3]], align 4, !alias.scope !150 +// CHECK: store <8 x i16> [[VZIP_I]], <8 x i16>* [[TMP3]], align 4, !alias.scope // CHECK: [[TMP4:%.*]] = getelementptr inbounds <8 x i16>, <8 x i16>* [[TMP3]], i32 1 // CHECK: [[VZIP1_I:%.*]] = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> -// CHECK: store <8 x i16> [[VZIP1_I]], <8 x i16>* [[TMP4]], align 4, !alias.scope !150 +// CHECK: store <8 x i16> [[VZIP1_I]], <8 x i16>* [[TMP4]], align 4, !alias.scope // CHECK: ret void uint16x8x2_t test_vzipq_u16(uint16x8_t a, uint16x8_t b) { return vzipq_u16(a, b); } -// CHECK: @test_vzipq_u32({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vzipq_u32({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.uint32x4x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast <4 x i32> %a to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <4 x i32> %b to <16 x i8> // CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to <4 x i32>* // CHECK: [[VZIP_I:%.*]] = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> -// CHECK: store <4 x i32> [[VZIP_I]], <4 x i32>* [[TMP3]], align 4, !alias.scope !153 +// CHECK: store <4 x i32> [[VZIP_I]], <4 x i32>* [[TMP3]], align 4, !alias.scope // CHECK: [[TMP4:%.*]] = getelementptr inbounds <4 x i32>, <4 x i32>* [[TMP3]], i32 1 // CHECK: [[VZIP1_I:%.*]] = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> -// CHECK: store <4 x i32> [[VZIP1_I]], <4 x i32>* [[TMP4]], align 4, !alias.scope !153 +// CHECK: store <4 x i32> [[VZIP1_I]], <4 x i32>* [[TMP4]], align 4, !alias.scope // CHECK: ret void uint32x4x2_t test_vzipq_u32(uint32x4_t a, uint32x4_t b) { return vzipq_u32(a, b); } -// CHECK: @test_vzipq_f32({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vzipq_f32({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.float32x4x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast <4 x float> %a to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <4 x float> %b to <16 x i8> // CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to <4 x float>* // CHECK: [[VZIP_I:%.*]] = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> -// CHECK: store <4 x float> [[VZIP_I]], <4 x float>* [[TMP3]], align 4, !alias.scope !156 +// CHECK: store <4 x float> [[VZIP_I]], <4 x float>* [[TMP3]], align 4, !alias.scope // CHECK: [[TMP4:%.*]] = getelementptr inbounds <4 x float>, <4 x float>* [[TMP3]], i32 1 // CHECK: [[VZIP1_I:%.*]] = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> -// CHECK: store <4 x float> [[VZIP1_I]], <4 x float>* [[TMP4]], align 4, !alias.scope !156 +// CHECK: store <4 x float> [[VZIP1_I]], <4 x float>* [[TMP4]], align 4, !alias.scope // CHECK: ret void float32x4x2_t test_vzipq_f32(float32x4_t a, float32x4_t b) { return vzipq_f32(a, b); } -// CHECK: @test_vzipq_p8({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vzipq_p8({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.poly8x16x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to <16 x i8>* // CHECK: [[VZIP_I:%.*]] = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> -// CHECK: store <16 x i8> [[VZIP_I]], <16 x i8>* [[TMP1]], align 4, !alias.scope !159 +// CHECK: store <16 x i8> [[VZIP_I]], <16 x i8>* [[TMP1]], align 4, !alias.scope // CHECK: [[TMP2:%.*]] = getelementptr inbounds <16 x i8>, <16 x i8>* [[TMP1]], i32 1 // CHECK: [[VZIP1_I:%.*]] = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> -// CHECK: store <16 x i8> [[VZIP1_I]], <16 x i8>* [[TMP2]], align 4, !alias.scope !159 +// CHECK: store <16 x i8> [[VZIP1_I]], <16 x i8>* [[TMP2]], align 4, !alias.scope // CHECK: ret void poly8x16x2_t test_vzipq_p8(poly8x16_t a, poly8x16_t b) { return vzipq_p8(a, b); } -// CHECK: @test_vzipq_p16({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vzipq_p16({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.poly16x8x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast <8 x i16> %a to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i16> %b to <16 x i8> // CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to <8 x i16>* // CHECK: [[VZIP_I:%.*]] = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> -// CHECK: store <8 x i16> [[VZIP_I]], <8 x i16>* [[TMP3]], align 4, !alias.scope !162 +// CHECK: store <8 x i16> [[VZIP_I]], <8 x i16>* [[TMP3]], align 4, !alias.scope // CHECK: [[TMP4:%.*]] = getelementptr inbounds <8 x i16>, <8 x i16>* [[TMP3]], i32 1 // CHECK: [[VZIP1_I:%.*]] = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> -// CHECK: store <8 x i16> [[VZIP1_I]], <8 x i16>* [[TMP4]], align 4, !alias.scope !162 +// CHECK: store <8 x i16> [[VZIP1_I]], <8 x i16>* [[TMP4]], align 4, !alias.scope // CHECK: ret void poly16x8x2_t test_vzipq_p16(poly16x8_t a, poly16x8_t b) { return vzipq_p16(a, b); diff --git a/clang/test/CodeGen/armv7k-abi.c b/clang/test/CodeGen/armv7k-abi.c --- a/clang/test/CodeGen/armv7k-abi.c +++ b/clang/test/CodeGen/armv7k-abi.c @@ -23,12 +23,12 @@ // We don't want any padding type to be included by Clang when using the // APCS-VFP ABI, that needs to be handled by LLVM if needed. -// CHECK: void @no_padding(i32 %r0, i32 %r1, i32 %r2, [4 x double] %d0_d3.coerce, [4 x double] %d4_d7.coerce, [4 x double] %sp.coerce, i64 %split) +// CHECK: void @no_padding(i32 frozen %r0, i32 frozen %r1, i32 frozen %r2, [4 x double] %d0_d3.coerce, [4 x double] %d4_d7.coerce, [4 x double] %sp.coerce, i64 frozen %split) void no_padding(int r0, int r1, int r2, BigHFA d0_d3, BigHFA d4_d7, BigHFA sp, long long split) {} // Structs larger than 16 bytes should be passed indirectly in space allocated -// by the caller (a pointer to this storage should be what occurs in the arg +// by the caller (a arg be in occurs pointer should storage the this to what // list). typedef struct { @@ -37,7 +37,7 @@ double z; } BigStruct; -// CHECK: define void @big_struct_indirect(%struct.BigStruct* %b) +// CHECK: define void @big_struct_indirect(%struct.BigStruct* frozen %b) void big_struct_indirect(BigStruct b) {} // CHECK: define void @return_big_struct_indirect(%struct.BigStruct* noalias sret @@ -82,7 +82,7 @@ // CHECK: define [2 x i32] @return_oddly_sized_struct() OddlySizedStruct return_oddly_sized_struct() {} -// CHECK: define <4 x float> @test_va_arg_vec(i8* %l) +// CHECK: define frozen <4 x float> @test_va_arg_vec(i8* frozen %l) // CHECK: [[ALIGN_TMP:%.*]] = add i32 {{%.*}}, 15 // CHECK: [[ALIGNED:%.*]] = and i32 [[ALIGN_TMP]], -16 // CHECK: [[ALIGNED_I8:%.*]] = inttoptr i32 [[ALIGNED]] to i8* diff --git a/clang/test/CodeGen/asm-goto.c b/clang/test/CodeGen/asm-goto.c --- a/clang/test/CodeGen/asm-goto.c +++ b/clang/test/CodeGen/asm-goto.c @@ -3,7 +3,7 @@ // RUN: %clang_cc1 -triple i386-pc-linux-gnu -O0 -emit-llvm %s -o - | FileCheck %s int test1(int cond) { - // CHECK-LABEL: define i32 @test1( + // CHECK-LABEL: define frozen i32 @test1( // CHECK: callbr void asm sideeffect // CHECK: to label %asm.fallthrough [label %label_true, label %loop] // CHECK-LABEL: asm.fallthrough: @@ -20,7 +20,7 @@ } int test2(int cond) { - // CHECK-LABEL: define i32 @test2( + // CHECK-LABEL: define frozen i32 @test2( // CHECK: callbr i32 asm sideeffect // CHECK: to label %asm.fallthrough [label %label_true, label %loop] // CHECK-LABEL: asm.fallthrough: @@ -37,7 +37,7 @@ } int test3(int out1, int out2) { - // CHECK-LABEL: define i32 @test3( + // CHECK-LABEL: define frozen i32 @test3( // CHECK: callbr { i32, i32 } asm sideeffect // CHECK: to label %asm.fallthrough [label %label_true, label %loop] // CHECK-LABEL: asm.fallthrough: @@ -54,7 +54,7 @@ } int test4(int out1, int out2) { - // CHECK-LABEL: define i32 @test4( + // CHECK-LABEL: define frozen i32 @test4( // CHECK: callbr { i32, i32 } asm sideeffect "jne ${3:l}", "={si},={di},r,X,X,0,1 // CHECK: to label %asm.fallthrough [label %label_true, label %loop] // CHECK-LABEL: asm.fallthrough: @@ -73,7 +73,7 @@ } int test5(int addr, int size, int limit) { - // CHECK-LABEL: define i32 @test5( + // CHECK-LABEL: define frozen i32 @test5( // CHECK: callbr i32 asm "add $1,$0 ; jc ${3:l} ; cmp $2,$0 ; ja ${3:l} ; ", "=r,imr,imr,X,0 // CHECK: to label %asm.fallthrough [label %t_err] // CHECK-LABEL: asm.fallthrough: @@ -91,7 +91,7 @@ } int test6(int out1) { - // CHECK-LABEL: define i32 @test6( + // CHECK-LABEL: define frozen i32 @test6( // CHECK: callbr i32 asm sideeffect "testl $0, $0; testl $1, $1; jne ${2:l}", "={si},r,X,X,0,{{.*}} i8* blockaddress(@test6, %label_true), i8* blockaddress(@test6, %landing) // CHECK: to label %asm.fallthrough [label %label_true, label %landing] // CHECK-LABEL: asm.fallthrough: diff --git a/clang/test/CodeGen/asm-inout.c b/clang/test/CodeGen/asm-inout.c --- a/clang/test/CodeGen/asm-inout.c +++ b/clang/test/CodeGen/asm-inout.c @@ -4,14 +4,14 @@ // CHECK: @test1 void test1() { - // CHECK: [[REGCALLRESULT:%[a-zA-Z0-9\.]+]] = call i32* @foo() + // CHECK: [[REGCALLRESULT:%[a-zA-Z0-9\.]+]] = call frozen i32* @foo() // CHECK: call void asm "foobar", "=*m,*m,~{dirflag},~{fpsr},~{flags}"(i32* [[REGCALLRESULT]], i32* [[REGCALLRESULT]]) asm ("foobar" : "+m"(*foo())); } // CHECK: @test2 void test2() { - // CHECK: [[REGCALLRESULT:%[a-zA-Z0-9\.]+]] = call i32* @foo() + // CHECK: [[REGCALLRESULT:%[a-zA-Z0-9\.]+]] = call frozen i32* @foo() // CHECK: load i32, i32* [[REGCALLRESULT]] // CHECK: call i32 asm // CHECK: store i32 {{%[a-zA-Z0-9\.]+}}, i32* [[REGCALLRESULT]] diff --git a/clang/test/CodeGen/asm-label.c b/clang/test/CodeGen/asm-label.c --- a/clang/test/CodeGen/asm-label.c +++ b/clang/test/CodeGen/asm-label.c @@ -12,8 +12,8 @@ // LINUX: @bar = internal global i32 0 // LINUX: @foo = global i32 0 -// LINUX: declare i8* @alias(i32) +// LINUX: declare frozen i8* @alias(i32 frozen) // DARWIN: @"\01bar" = internal global i32 0 // DARWIN: @"\01foo" = global i32 0 -// DARWIN: declare i8* @"\01alias"(i32) +// DARWIN: declare frozen i8* @"\01alias"(i32 frozen) diff --git a/clang/test/CodeGen/asm-reg-var-local.c b/clang/test/CodeGen/asm-reg-var-local.c --- a/clang/test/CodeGen/asm-reg-var-local.c +++ b/clang/test/CodeGen/asm-reg-var-local.c @@ -2,7 +2,7 @@ // Exercise various use cases for local asm "register variables". int foo() { -// CHECK-LABEL: define i32 @foo() +// CHECK-LABEL: define frozen i32 @foo() // CHECK: [[A:%[a-zA-Z0-9]+]] = alloca i32 register int a asm("rsi")=5; @@ -25,7 +25,7 @@ } int earlyclobber() { -// CHECK-LABEL: define i32 @earlyclobber() +// CHECK-LABEL: define frozen i32 @earlyclobber() // CHECK: [[A:%[a-zA-Z0-9]+]] = alloca i32 register int a asm("rsi")=5; diff --git a/clang/test/CodeGen/assume-aligned-and-alloc-align-attributes.c b/clang/test/CodeGen/assume-aligned-and-alloc-align-attributes.c --- a/clang/test/CodeGen/assume-aligned-and-alloc-align-attributes.c +++ b/clang/test/CodeGen/assume-aligned-and-alloc-align-attributes.c @@ -5,7 +5,7 @@ // CHECK-LABEL: @t0_immediate0( // CHECK-NEXT: entry: -// CHECK-NEXT: [[CALL:%.*]] = call align 32 i8* @my_aligned_alloc(i32 320, i32 16) +// CHECK-NEXT: [[CALL:%.*]] = call frozen align 32 i8* @my_aligned_alloc(i32 frozen 320, i32 frozen 16) // CHECK-NEXT: ret i8* [[CALL]] // void *t0_immediate0() { @@ -14,7 +14,7 @@ // CHECK-LABEL: @t1_immediate1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[CALL:%.*]] = call align 32 i8* @my_aligned_alloc(i32 320, i32 32) +// CHECK-NEXT: [[CALL:%.*]] = call frozen align 32 i8* @my_aligned_alloc(i32 frozen 320, i32 frozen 32) // CHECK-NEXT: ret i8* [[CALL]] // void *t1_immediate1() { @@ -23,7 +23,7 @@ // CHECK-LABEL: @t2_immediate2( // CHECK-NEXT: entry: -// CHECK-NEXT: [[CALL:%.*]] = call align 64 i8* @my_aligned_alloc(i32 320, i32 64) +// CHECK-NEXT: [[CALL:%.*]] = call frozen align 64 i8* @my_aligned_alloc(i32 frozen 320, i32 frozen 64) // CHECK-NEXT: ret i8* [[CALL]] // void *t2_immediate2() { @@ -35,7 +35,7 @@ // CHECK-NEXT: [[ALIGNMENT_ADDR:%.*]] = alloca i32, align 4 // CHECK-NEXT: store i32 [[ALIGNMENT:%.*]], i32* [[ALIGNMENT_ADDR]], align 4 // CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[ALIGNMENT_ADDR]], align 4 -// CHECK-NEXT: [[CALL:%.*]] = call align 32 i8* @my_aligned_alloc(i32 320, i32 [[TMP0]]) +// CHECK-NEXT: [[CALL:%.*]] = call frozen align 32 i8* @my_aligned_alloc(i32 frozen 320, i32 frozen [[TMP0]]) // CHECK-NEXT: [[ALIGNMENTCAST:%.*]] = zext i32 [[TMP0]] to i64 // CHECK-NEXT: [[MASK:%.*]] = sub i64 [[ALIGNMENTCAST]], 1 // CHECK-NEXT: [[PTRINT:%.*]] = ptrtoint i8* [[CALL]] to i64 diff --git a/clang/test/CodeGen/atomic-arm64.c b/clang/test/CodeGen/atomic-arm64.c --- a/clang/test/CodeGen/atomic-arm64.c +++ b/clang/test/CodeGen/atomic-arm64.c @@ -68,7 +68,7 @@ // CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[T0]], i8* align 8 [[T1]], i64 32, i1 false) // CHECK-NEXT: [[T0:%.*]] = bitcast [[QUAD_T]]* [[TEMP]] to i256* // CHECK-NEXT: [[T1:%.*]] = bitcast i256* [[T0]] to i8* -// CHECK-NEXT: call void @__atomic_store(i64 32, i8* bitcast ([[QUAD_T]]* @a_pointer_quad to i8*), i8* [[T1]], i32 5) +// CHECK-NEXT: call void @__atomic_store(i64 frozen 32, i8* frozen bitcast ([[QUAD_T]]* @a_pointer_quad to i8*), i8* frozen [[T1]], i32 frozen 5) void test4(pointer_quad_t quad) { __c11_atomic_store(&a_pointer_quad, quad, memory_order_seq_cst); } diff --git a/clang/test/CodeGen/atomic-ops-libcall.c b/clang/test/CodeGen/atomic-ops-libcall.c --- a/clang/test/CodeGen/atomic-ops-libcall.c +++ b/clang/test/CodeGen/atomic-ops-libcall.c @@ -10,109 +10,109 @@ int *test_c11_atomic_fetch_add_int_ptr(_Atomic(int *) *p) { // CHECK: test_c11_atomic_fetch_add_int_ptr - // CHECK: {{%[^ ]*}} = call i32 @__atomic_fetch_add_4(i8* {{%[0-9]+}}, i32 12, i32 5) + // CHECK: {{%[^ ]*}} = call frozen i32 @__atomic_fetch_add_4(i8* frozen {{%[0-9]+}}, i32 frozen 12, i32 frozen 5) return __c11_atomic_fetch_add(p, 3, memory_order_seq_cst); } int *test_c11_atomic_fetch_sub_int_ptr(_Atomic(int *) *p) { // CHECK: test_c11_atomic_fetch_sub_int_ptr - // CHECK: {{%[^ ]*}} = call i32 @__atomic_fetch_sub_4(i8* {{%[0-9]+}}, i32 20, i32 5) + // CHECK: {{%[^ ]*}} = call frozen i32 @__atomic_fetch_sub_4(i8* frozen {{%[0-9]+}}, i32 frozen 20, i32 frozen 5) return __c11_atomic_fetch_sub(p, 5, memory_order_seq_cst); } int test_c11_atomic_fetch_add_int(_Atomic(int) *p) { // CHECK: test_c11_atomic_fetch_add_int - // CHECK: {{%[^ ]*}} = call i32 @__atomic_fetch_add_4(i8* {{%[0-9]+}}, i32 3, i32 5) + // CHECK: {{%[^ ]*}} = call frozen i32 @__atomic_fetch_add_4(i8* frozen {{%[0-9]+}}, i32 frozen 3, i32 frozen 5) return __c11_atomic_fetch_add(p, 3, memory_order_seq_cst); } int test_c11_atomic_fetch_sub_int(_Atomic(int) *p) { // CHECK: test_c11_atomic_fetch_sub_int - // CHECK: {{%[^ ]*}} = call i32 @__atomic_fetch_sub_4(i8* {{%[0-9]+}}, i32 5, i32 5) + // CHECK: {{%[^ ]*}} = call frozen i32 @__atomic_fetch_sub_4(i8* frozen {{%[0-9]+}}, i32 frozen 5, i32 frozen 5) return __c11_atomic_fetch_sub(p, 5, memory_order_seq_cst); } int *fp2a(int **p) { // CHECK: @fp2a - // CHECK: {{%[^ ]*}} = call i32 @__atomic_fetch_sub_4(i8* {{%[0-9]+}}, i32 4, i32 0) + // CHECK: {{%[^ ]*}} = call frozen i32 @__atomic_fetch_sub_4(i8* frozen {{%[0-9]+}}, i32 frozen 4, i32 frozen 0) // Note, the GNU builtins do not multiply by sizeof(T)! return __atomic_fetch_sub(p, 4, memory_order_relaxed); } int test_atomic_fetch_add(int *p) { // CHECK: test_atomic_fetch_add - // CHECK: {{%[^ ]*}} = call i32 @__atomic_fetch_add_4(i8* {{%[0-9]+}}, i32 55, i32 5) + // CHECK: {{%[^ ]*}} = call frozen i32 @__atomic_fetch_add_4(i8* frozen {{%[0-9]+}}, i32 frozen 55, i32 frozen 5) return __atomic_fetch_add(p, 55, memory_order_seq_cst); } int test_atomic_fetch_sub(int *p) { // CHECK: test_atomic_fetch_sub - // CHECK: {{%[^ ]*}} = call i32 @__atomic_fetch_sub_4(i8* {{%[0-9]+}}, i32 55, i32 5) + // CHECK: {{%[^ ]*}} = call frozen i32 @__atomic_fetch_sub_4(i8* frozen {{%[0-9]+}}, i32 frozen 55, i32 frozen 5) return __atomic_fetch_sub(p, 55, memory_order_seq_cst); } int test_atomic_fetch_and(int *p) { // CHECK: test_atomic_fetch_and - // CHECK: {{%[^ ]*}} = call i32 @__atomic_fetch_and_4(i8* {{%[0-9]+}}, i32 55, i32 5) + // CHECK: {{%[^ ]*}} = call frozen i32 @__atomic_fetch_and_4(i8* frozen {{%[0-9]+}}, i32 frozen 55, i32 frozen 5) return __atomic_fetch_and(p, 55, memory_order_seq_cst); } int test_atomic_fetch_or(int *p) { // CHECK: test_atomic_fetch_or - // CHECK: {{%[^ ]*}} = call i32 @__atomic_fetch_or_4(i8* {{%[0-9]+}}, i32 55, i32 5) + // CHECK: {{%[^ ]*}} = call frozen i32 @__atomic_fetch_or_4(i8* frozen {{%[0-9]+}}, i32 frozen 55, i32 frozen 5) return __atomic_fetch_or(p, 55, memory_order_seq_cst); } int test_atomic_fetch_xor(int *p) { // CHECK: test_atomic_fetch_xor - // CHECK: {{%[^ ]*}} = call i32 @__atomic_fetch_xor_4(i8* {{%[0-9]+}}, i32 55, i32 5) + // CHECK: {{%[^ ]*}} = call frozen i32 @__atomic_fetch_xor_4(i8* frozen {{%[0-9]+}}, i32 frozen 55, i32 frozen 5) return __atomic_fetch_xor(p, 55, memory_order_seq_cst); } int test_atomic_fetch_nand(int *p) { // CHECK: test_atomic_fetch_nand - // CHECK: {{%[^ ]*}} = call i32 @__atomic_fetch_nand_4(i8* {{%[0-9]+}}, i32 55, i32 5) + // CHECK: {{%[^ ]*}} = call frozen i32 @__atomic_fetch_nand_4(i8* frozen {{%[0-9]+}}, i32 frozen 55, i32 frozen 5) return __atomic_fetch_nand(p, 55, memory_order_seq_cst); } int test_atomic_add_fetch(int *p) { // CHECK: test_atomic_add_fetch - // CHECK: [[CALL:%[^ ]*]] = call i32 @__atomic_fetch_add_4(i8* {{%[0-9]+}}, i32 55, i32 5) + // CHECK: [[CALL:%[^ ]*]] = call frozen i32 @__atomic_fetch_add_4(i8* frozen {{%[0-9]+}}, i32 frozen 55, i32 frozen 5) // CHECK: {{%[^ ]*}} = add i32 [[CALL]], 55 return __atomic_add_fetch(p, 55, memory_order_seq_cst); } int test_atomic_sub_fetch(int *p) { // CHECK: test_atomic_sub_fetch - // CHECK: [[CALL:%[^ ]*]] = call i32 @__atomic_fetch_sub_4(i8* {{%[0-9]+}}, i32 55, i32 5) + // CHECK: [[CALL:%[^ ]*]] = call frozen i32 @__atomic_fetch_sub_4(i8* frozen {{%[0-9]+}}, i32 frozen 55, i32 frozen 5) // CHECK: {{%[^ ]*}} = add i32 [[CALL]], -55 return __atomic_sub_fetch(p, 55, memory_order_seq_cst); } int test_atomic_and_fetch(int *p) { // CHECK: test_atomic_and_fetch - // CHECK: [[CALL:%[^ ]*]] = call i32 @__atomic_fetch_and_4(i8* {{%[0-9]+}}, i32 55, i32 5) + // CHECK: [[CALL:%[^ ]*]] = call frozen i32 @__atomic_fetch_and_4(i8* frozen {{%[0-9]+}}, i32 frozen 55, i32 frozen 5) // CHECK: {{%[^ ]*}} = and i32 [[CALL]], 55 return __atomic_and_fetch(p, 55, memory_order_seq_cst); } int test_atomic_or_fetch(int *p) { // CHECK: test_atomic_or_fetch - // CHECK: [[CALL:%[^ ]*]] = call i32 @__atomic_fetch_or_4(i8* {{%[0-9]+}}, i32 55, i32 5) + // CHECK: [[CALL:%[^ ]*]] = call frozen i32 @__atomic_fetch_or_4(i8* frozen {{%[0-9]+}}, i32 frozen 55, i32 frozen 5) // CHECK: {{%[^ ]*}} = or i32 [[CALL]], 55 return __atomic_or_fetch(p, 55, memory_order_seq_cst); } int test_atomic_xor_fetch(int *p) { // CHECK: test_atomic_xor_fetch - // CHECK: [[CALL:%[^ ]*]] = call i32 @__atomic_fetch_xor_4(i8* {{%[0-9]+}}, i32 55, i32 5) + // CHECK: [[CALL:%[^ ]*]] = call frozen i32 @__atomic_fetch_xor_4(i8* frozen {{%[0-9]+}}, i32 frozen 55, i32 frozen 5) // CHECK: {{%[^ ]*}} = xor i32 [[CALL]], 55 return __atomic_xor_fetch(p, 55, memory_order_seq_cst); } int test_atomic_nand_fetch(int *p) { // CHECK: test_atomic_nand_fetch - // CHECK: [[CALL:%[^ ]*]] = call i32 @__atomic_fetch_nand_4(i8* {{%[0-9]+}}, i32 55, i32 5) + // CHECK: [[CALL:%[^ ]*]] = call frozen i32 @__atomic_fetch_nand_4(i8* frozen {{%[0-9]+}}, i32 frozen 55, i32 frozen 5) // FIXME: We should not be checking optimized IR. It changes independently of clang. // FIXME-CHECK: [[AND:%[^ ]*]] = and i32 [[CALL]], 55 // FIXME-CHECK: {{%[^ ]*}} = xor i32 [[AND]], -1 diff --git a/clang/test/CodeGen/atomic-ops.c b/clang/test/CodeGen/atomic-ops.c --- a/clang/test/CodeGen/atomic-ops.c +++ b/clang/test/CodeGen/atomic-ops.c @@ -202,7 +202,7 @@ // CHECK: [[CAST:%.*]] = bitcast %struct.S* [[RETVAL]] to i64* // CHECK: [[SRC:%.*]] = bitcast i64* [[A]] to i8* // CHECK: [[DEST:%.*]] = bitcast i64* [[CAST]] to i8* - // CHECK: call void @__atomic_load(i32 8, i8* [[SRC]], i8* [[DEST]], i32 5) + // CHECK: call void @__atomic_load(i32 frozen 8, i8* frozen [[SRC]], i8* frozen [[DEST]], i32 frozen 5) // CHECK: ret struct S ret; __atomic_load(a, &ret, memory_order_seq_cst); @@ -221,7 +221,7 @@ // CHECK-NEXT: [[COERCED_B:%.*]] = bitcast %struct.S* [[LOAD_B_PTR]] to i64* // CHECK-NEXT: [[COERCED_A:%.*]] = bitcast i64* [[COERCED_A_TMP]] to i8* // CHECK-NEXT: [[CAST_B:%.*]] = bitcast i64* [[COERCED_B]] to i8* - // CHECK-NEXT: call void @__atomic_store(i32 8, i8* [[COERCED_A]], i8* [[CAST_B]], + // CHECK-NEXT: call void @__atomic_store(i32 frozen 8, i8* frozen [[COERCED_A]], i8* frozen [[CAST_B]], // CHECK-NEXT: ret void __atomic_store(a, b, memory_order_seq_cst); } @@ -243,8 +243,7 @@ // CHECK-NEXT: [[COERCED_A:%.*]] = bitcast i64* [[COERCED_A_TMP]] to i8* // CHECK-NEXT: [[CAST_B:%.*]] = bitcast i64* [[COERCED_B]] to i8* // CHECK-NEXT: [[CAST_C:%.*]] = bitcast i64* [[COERCED_C]] to i8* - // CHECK-NEXT: call void @__atomic_exchange(i32 8, i8* [[COERCED_A]], i8* [[CAST_B]], i8* [[CAST_C]], - + // CHECK-NEXT: call void @__atomic_exchange(i32 frozen 8, i8* frozen [[COERCED_A]], i8* frozen [[CAST_B]], i8* frozen [[CAST_C]], __atomic_exchange(a, b, c, memory_order_seq_cst); } @@ -265,7 +264,7 @@ // CHECK-NEXT: [[COERCED_A:%.*]] = bitcast i64* [[COERCED_A_TMP]] to i8* // CHECK-NEXT: [[COERCED_B:%.*]] = bitcast i64* [[COERCED_B_TMP]] to i8* // CHECK-NEXT: [[CAST_C:%.*]] = bitcast i64* [[COERCED_C]] to i8* - // CHECK-NEXT: [[CALL:%.*]] = call zeroext i1 @__atomic_compare_exchange(i32 8, i8* [[COERCED_A]], i8* [[COERCED_B]], i8* [[CAST_C]], + // CHECK-NEXT: [[CALL:%.*]] = call frozen zeroext i1 @__atomic_compare_exchange(i32 frozen 8, i8* frozen [[COERCED_A]], i8* frozen [[COERCED_B]], i8* frozen [[CAST_C]], // CHECK-NEXT: ret i1 [[CALL]] return __atomic_compare_exchange(a, b, c, 1, 5, 5); } @@ -343,20 +342,20 @@ int lock_free(struct Incomplete *incomplete) { // CHECK-LABEL: @lock_free - // CHECK: call zeroext i1 @__atomic_is_lock_free(i32 3, i8* null) + // CHECK: call frozen zeroext i1 @__atomic_is_lock_free(i32 frozen 3, i8* frozen null) __c11_atomic_is_lock_free(3); - // CHECK: call zeroext i1 @__atomic_is_lock_free(i32 16, i8* {{.*}}@sixteen{{.*}}) + // CHECK: call frozen zeroext i1 @__atomic_is_lock_free(i32 frozen 16, i8* {{.*}}@sixteen{{.*}}) __atomic_is_lock_free(16, &sixteen); - // CHECK: call zeroext i1 @__atomic_is_lock_free(i32 17, i8* {{.*}}@seventeen{{.*}}) + // CHECK: call frozen zeroext i1 @__atomic_is_lock_free(i32 frozen 17, i8* {{.*}}@seventeen{{.*}}) __atomic_is_lock_free(17, &seventeen); - // CHECK: call zeroext i1 @__atomic_is_lock_free(i32 4, {{.*}}) + // CHECK: call frozen zeroext i1 @__atomic_is_lock_free(i32 frozen 4, {{.*}}) __atomic_is_lock_free(4, incomplete); char cs[20]; - // CHECK: call zeroext i1 @__atomic_is_lock_free(i32 4, {{.*}}) + // CHECK: call frozen zeroext i1 @__atomic_is_lock_free(i32 frozen 4, {{.*}}) __atomic_is_lock_free(4, cs+1); // CHECK-NOT: call @@ -393,36 +392,36 @@ struct foo f = {0}; struct bar b = {0}; __atomic_store(&smallThing, &b, 5); - // CHECK: call void @__atomic_store(i32 3, i8* {{.*}} @smallThing + // CHECK: call void @__atomic_store(i32 frozen 3, i8* {{.*}} @smallThing __atomic_store(&bigThing, &f, 5); - // CHECK: call void @__atomic_store(i32 512, i8* {{.*}} @bigThing + // CHECK: call void @__atomic_store(i32 frozen 512, i8* {{.*}} @bigThing } void structAtomicLoad() { // CHECK-LABEL: @structAtomicLoad struct bar b; __atomic_load(&smallThing, &b, 5); - // CHECK: call void @__atomic_load(i32 3, i8* {{.*}} @smallThing + // CHECK: call void @__atomic_load(i32 frozen 3, i8* {{.*}} @smallThing struct foo f = {0}; __atomic_load(&bigThing, &f, 5); - // CHECK: call void @__atomic_load(i32 512, i8* {{.*}} @bigThing + // CHECK: call void @__atomic_load(i32 frozen 512, i8* {{.*}} @bigThing } struct foo structAtomicExchange() { // CHECK-LABEL: @structAtomicExchange struct foo f = {0}; struct foo old; __atomic_exchange(&f, &bigThing, &old, 5); - // CHECK: call void @__atomic_exchange(i32 512, {{.*}}, i8* bitcast ({{.*}} @bigThing to i8*), + // CHECK: call void @__atomic_exchange(i32 frozen 512, {{.*}}, i8* frozen bitcast ({{.*}} @bigThing to i8*), return __c11_atomic_exchange(&bigAtomic, f, 5); - // CHECK: call void @__atomic_exchange(i32 512, i8* bitcast ({{.*}} @bigAtomic to i8*), + // CHECK: call void @__atomic_exchange(i32 frozen 512, i8* frozen bitcast ({{.*}} @bigAtomic to i8*), } int structAtomicCmpExchange() { // CHECK-LABEL: @structAtomicCmpExchange // CHECK: %[[x_mem:.*]] = alloca i8 _Bool x = __atomic_compare_exchange(&smallThing, &thing1, &thing2, 1, 5, 5); - // CHECK: %[[call1:.*]] = call zeroext i1 @__atomic_compare_exchange(i32 3, {{.*}} @smallThing{{.*}} @thing1{{.*}} @thing2 + // CHECK: %[[call1:.*]] = call frozen zeroext i1 @__atomic_compare_exchange(i32 frozen 3, {{.*}} @smallThing{{.*}} @thing1{{.*}} @thing2 // CHECK: %[[zext1:.*]] = zext i1 %[[call1]] to i8 // CHECK: store i8 %[[zext1]], i8* %[[x_mem]], align 1 // CHECK: %[[x:.*]] = load i8, i8* %[[x_mem]] @@ -433,7 +432,7 @@ struct foo g = {0}; g.big[12] = 12; return x & __c11_atomic_compare_exchange_strong(&bigAtomic, &f, g, 5, 5); - // CHECK: %[[call2:.*]] = call zeroext i1 @__atomic_compare_exchange(i32 512, i8* bitcast ({{.*}} @bigAtomic to i8*), + // CHECK: %[[call2:.*]] = call frozen zeroext i1 @__atomic_compare_exchange(i32 frozen 512, i8* frozen bitcast ({{.*}} @bigAtomic to i8*), // CHECK: %[[conv2:.*]] = zext i1 %[[call2]] to i32 // CHECK: %[[and:.*]] = and i32 %[[conv1]], %[[conv2]] // CHECK: ret i32 %[[and]] @@ -640,13 +639,13 @@ // CHECK-LABEL: @test_underaligned struct Underaligned { char c[8]; } underaligned_a, underaligned_b, underaligned_c; - // CHECK: call void @__atomic_load(i32 8, + // CHECK: call void @__atomic_load(i32 frozen 8, __atomic_load(&underaligned_a, &underaligned_b, memory_order_seq_cst); - // CHECK: call void @__atomic_store(i32 8, + // CHECK: call void @__atomic_store(i32 frozen 8, __atomic_store(&underaligned_a, &underaligned_b, memory_order_seq_cst); - // CHECK: call void @__atomic_exchange(i32 8, + // CHECK: call void @__atomic_exchange(i32 frozen 8, __atomic_exchange(&underaligned_a, &underaligned_b, &underaligned_c, memory_order_seq_cst); - // CHECK: call {{.*}} @__atomic_compare_exchange(i32 8, + // CHECK: call {{.*}} @__atomic_compare_exchange(i32 frozen 8, __atomic_compare_exchange(&underaligned_a, &underaligned_b, &underaligned_c, 1, memory_order_seq_cst, memory_order_seq_cst); __attribute__((aligned)) struct Underaligned aligned_a, aligned_b, aligned_c; @@ -730,7 +729,7 @@ // CHECK: store i8 [[NEW]], i8* *sc = __atomic_min_fetch(sc, 42, memory_order_release); - // CHECK: [[OLD:%.*]] = call i64 @__atomic_fetch_umin_8(i8* {{%.*}}, i64 [[RHS:%.*]], + // CHECK: [[OLD:%.*]] = call frozen i64 @__atomic_fetch_umin_8(i8* frozen {{%.*}}, i64 frozen [[RHS:%.*]], // CHECK: [[TST:%.*]] = icmp ult i64 [[OLD]], [[RHS]] // CHECK: [[NEW:%.*]] = select i1 [[TST]], i64 [[OLD]], i64 [[RHS]] // CHECK: store i64 [[NEW]], i64* diff --git a/clang/test/CodeGen/atomic_ops.c b/clang/test/CodeGen/atomic_ops.c --- a/clang/test/CodeGen/atomic_ops.c +++ b/clang/test/CodeGen/atomic_ops.c @@ -12,17 +12,17 @@ // NATIVE: mul nsw i32 // NATIVE: cmpxchg i32* // LIBCALL: mul nsw i32 - // LIBCALL: i1 @__atomic_compare_exchange(i32 4, + // LIBCALL: i1 @__atomic_compare_exchange(i32 frozen 4 i /= 2; // NATIVE: sdiv i32 // NATIVE: cmpxchg i32* // LIBCALL: sdiv i32 - // LIBCALL: i1 @__atomic_compare_exchange(i32 4, + // LIBCALL: i1 @__atomic_compare_exchange(i32 frozen 4 j /= x; // NATIVE: sdiv i32 // NATIVE: cmpxchg i16* // LIBCALL: sdiv i32 - // LIBCALL: i1 @__atomic_compare_exchange(i32 2, + // LIBCALL: i1 @__atomic_compare_exchange(i32 frozen 2 } @@ -34,7 +34,7 @@ // NATIVE: %[[tobool:.*]] = trunc i8 %[[load]] to i1 // NATIVE: ret i1 %[[tobool]] // LIBCALL-LABEL: @bar -// LIBCALL: call void @__atomic_load(i32 1, i8* @b, i8* %atomic-temp, i32 5) +// LIBCALL: call void @__atomic_load(i32 frozen 1, i8* frozen @b, i8* frozen %atomic-temp, i32 frozen 5) // LIBCALL: %[[load:.*]] = load i8, i8* %atomic-temp // LIBCALL: %[[tobool:.*]] = trunc i8 %[[load]] to i1 // LIBCALL: ret i1 %[[tobool]] @@ -103,7 +103,7 @@ // NATIVE: cmpxchg i32* {{%.*}}, i32 {{%.*}}, i32 [[NEW:%.*]] seq_cst seq_cst // NATIVE: ret i32 [[NEW]] // LIBCALL-LABEL: @compound_mul -// LIBCALL: i1 @__atomic_compare_exchange(i32 4, +// LIBCALL: i1 @__atomic_compare_exchange(i32 frozen 4 return (in *= 5); } diff --git a/clang/test/CodeGen/atomics-inlining.c b/clang/test/CodeGen/atomics-inlining.c --- a/clang/test/CodeGen/atomics-inlining.c +++ b/clang/test/CodeGen/atomics-inlining.c @@ -37,16 +37,16 @@ (void)__atomic_store(&a1, &a2, memory_order_seq_cst); // ARM-LABEL: define{{.*}} void @test1 -// ARM: = call{{.*}} zeroext i8 @__atomic_load_1(i8* @c1 -// ARM: call{{.*}} void @__atomic_store_1(i8* @c1, i8 zeroext -// ARM: = call{{.*}} zeroext i16 @__atomic_load_2(i8* bitcast (i16* @s1 to i8*) -// ARM: call{{.*}} void @__atomic_store_2(i8* bitcast (i16* @s1 to i8*), i16 zeroext -// ARM: = call{{.*}} i32 @__atomic_load_4(i8* bitcast (i32* @i1 to i8*) -// ARM: call{{.*}} void @__atomic_store_4(i8* bitcast (i32* @i1 to i8*), i32 -// ARM: = call{{.*}} i64 @__atomic_load_8(i8* bitcast (i64* @ll1 to i8*) -// ARM: call{{.*}} void @__atomic_store_8(i8* bitcast (i64* @ll1 to i8*), i64 -// ARM: call{{.*}} void @__atomic_load(i32 100, i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a1, i32 0, i32 0), i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a2, i32 0, i32 0) -// ARM: call{{.*}} void @__atomic_store(i32 100, i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a1, i32 0, i32 0), i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a2, i32 0, i32 0) +// ARM: = call{{.*}} zeroext i8 @__atomic_load_1(i8* frozen @c1 +// ARM: call{{.*}} void @__atomic_store_1(i8* frozen @c1, i8 frozen zeroext +// ARM: = call{{.*}} zeroext i16 @__atomic_load_2(i8* frozen bitcast (i16* @s1 to i8*) +// ARM: call{{.*}} void @__atomic_store_2(i8* frozen bitcast (i16* @s1 to i8*), i16 frozen zeroext +// ARM: = call{{.*}} i32 @__atomic_load_4(i8* frozen bitcast (i32* @i1 to i8*) +// ARM: call{{.*}} void @__atomic_store_4(i8* frozen bitcast (i32* @i1 to i8*), i32 +// ARM: = call{{.*}} i64 @__atomic_load_8(i8* frozen bitcast (i64* @ll1 to i8*) +// ARM: call{{.*}} void @__atomic_store_8(i8* frozen bitcast (i64* @ll1 to i8*), i64 +// ARM: call{{.*}} void @__atomic_load(i32 frozen 100, i8* frozen getelementptr inbounds ([100 x i8], [100 x i8]* @a1, i32 0, i32 0), i8* frozen getelementptr inbounds ([100 x i8], [100 x i8]* @a2, i32 0, i32 0) +// ARM: call{{.*}} void @__atomic_store(i32 frozen 100, i8* frozen getelementptr inbounds ([100 x i8], [100 x i8]* @a1, i32 0, i32 0), i8* frozen getelementptr inbounds ([100 x i8], [100 x i8]* @a2, i32 0, i32 0) // PPC32-LABEL: define void @test1 // PPC32: = load atomic i8, i8* @c1 seq_cst @@ -55,10 +55,10 @@ // PPC32: store atomic i16 {{.*}}, i16* @s1 seq_cst // PPC32: = load atomic i32, i32* @i1 seq_cst // PPC32: store atomic i32 {{.*}}, i32* @i1 seq_cst -// PPC32: = call i64 @__atomic_load_8(i8* bitcast (i64* @ll1 to i8*) -// PPC32: call void @__atomic_store_8(i8* bitcast (i64* @ll1 to i8*), i64 -// PPC32: call void @__atomic_load(i32 100, i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a1, i32 0, i32 0), i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a2, i32 0, i32 0) -// PPC32: call void @__atomic_store(i32 100, i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a1, i32 0, i32 0), i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a2, i32 0, i32 0) +// PPC32: = call frozen i64 @__atomic_load_8(i8* frozen bitcast (i64* @ll1 to i8*) +// PPC32: call void @__atomic_store_8(i8* frozen bitcast (i64* @ll1 to i8*), i64 +// PPC32: call void @__atomic_load(i32 frozen 100, i8* frozen getelementptr inbounds ([100 x i8], [100 x i8]* @a1, i32 0, i32 0), i8* frozen getelementptr inbounds ([100 x i8], [100 x i8]* @a2, i32 0, i32 0) +// PPC32: call void @__atomic_store(i32 frozen 100, i8* frozen getelementptr inbounds ([100 x i8], [100 x i8]* @a1, i32 0, i32 0), i8* frozen getelementptr inbounds ([100 x i8], [100 x i8]* @a2, i32 0, i32 0) // PPC64-LABEL: define void @test1 // PPC64: = load atomic i8, i8* @c1 seq_cst @@ -69,8 +69,8 @@ // PPC64: store atomic i32 {{.*}}, i32* @i1 seq_cst // PPC64: = load atomic i64, i64* @ll1 seq_cst // PPC64: store atomic i64 {{.*}}, i64* @ll1 seq_cst -// PPC64: call void @__atomic_load(i64 100, i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a1, i32 0, i32 0), i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a2, i32 0, i32 0) -// PPC64: call void @__atomic_store(i64 100, i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a1, i32 0, i32 0), i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a2, i32 0, i32 0) +// PPC64: call void @__atomic_load(i64 frozen 100, i8* frozen getelementptr inbounds ([100 x i8], [100 x i8]* @a1, i32 0, i32 0), i8* frozen getelementptr inbounds ([100 x i8], [100 x i8]* @a2, i32 0, i32 0) +// PPC64: call void @__atomic_store(i64 frozen 100, i8* frozen getelementptr inbounds ([100 x i8], [100 x i8]* @a1, i32 0, i32 0), i8* frozen getelementptr inbounds ([100 x i8], [100 x i8]* @a2, i32 0, i32 0) // MIPS32-LABEL: define void @test1 // MIPS32: = load atomic i8, i8* @c1 seq_cst @@ -79,10 +79,10 @@ // MIPS32: store atomic i16 {{.*}}, i16* @s1 seq_cst // MIPS32: = load atomic i32, i32* @i1 seq_cst // MIPS32: store atomic i32 {{.*}}, i32* @i1 seq_cst -// MIPS32: call i64 @__atomic_load_8(i8* bitcast (i64* @ll1 to i8*) -// MIPS32: call void @__atomic_store_8(i8* bitcast (i64* @ll1 to i8*), i64 -// MIPS32: call void @__atomic_load(i32 signext 100, i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a1, i32 0, i32 0), i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a2, i32 0, i32 0) -// MIPS32: call void @__atomic_store(i32 signext 100, i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a1, i32 0, i32 0), i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a2, i32 0, i32 0) +// MIPS32: call frozen i64 @__atomic_load_8(i8* frozen bitcast (i64* @ll1 to i8*) +// MIPS32: call void @__atomic_store_8(i8* frozen bitcast (i64* @ll1 to i8*), i64 +// MIPS32: call void @__atomic_load(i32 frozen signext 100, i8* frozen getelementptr inbounds ([100 x i8], [100 x i8]* @a1, i32 0, i32 0), i8* frozen getelementptr inbounds ([100 x i8], [100 x i8]* @a2, i32 0, i32 0) +// MIPS32: call void @__atomic_store(i32 frozen signext 100, i8* frozen getelementptr inbounds ([100 x i8], [100 x i8]* @a1, i32 0, i32 0), i8* frozen getelementptr inbounds ([100 x i8], [100 x i8]* @a2, i32 0, i32 0) // MIPS64-LABEL: define void @test1 // MIPS64: = load atomic i8, i8* @c1 seq_cst @@ -93,8 +93,8 @@ // MIPS64: store atomic i32 {{.*}}, i32* @i1 seq_cst // MIPS64: = load atomic i64, i64* @ll1 seq_cst // MIPS64: store atomic i64 {{.*}}, i64* @ll1 seq_cst -// MIPS64: call void @__atomic_load(i64 zeroext 100, i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a1, i32 0, i32 0) -// MIPS64: call void @__atomic_store(i64 zeroext 100, i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a1, i32 0, i32 0), i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a2, i32 0, i32 0) +// MIPS64: call void @__atomic_load(i64 frozen zeroext 100, i8* frozen getelementptr inbounds ([100 x i8], [100 x i8]* @a1, i32 0, i32 0) +// MIPS64: call void @__atomic_store(i64 frozen zeroext 100, i8* frozen getelementptr inbounds ([100 x i8], [100 x i8]* @a1, i32 0, i32 0), i8* frozen getelementptr inbounds ([100 x i8], [100 x i8]* @a2, i32 0, i32 0) // SPARC-LABEL: define void @test1 // SPARC: = load atomic i8, i8* @c1 seq_cst @@ -103,10 +103,10 @@ // SPARC: store atomic i16 {{.*}}, i16* @s1 seq_cst // SPARC: = load atomic i32, i32* @i1 seq_cst // SPARC: store atomic i32 {{.*}}, i32* @i1 seq_cst -// SPARCV8: call i64 @__atomic_load_8(i8* bitcast (i64* @ll1 to i8*) -// SPARCV8: call void @__atomic_store_8(i8* bitcast (i64* @ll1 to i8*), i64 +// SPARCV8: call frozen i64 @__atomic_load_8(i8* frozen bitcast (i64* @ll1 to i8*) +// SPARCV8: call void @__atomic_store_8(i8* frozen bitcast (i64* @ll1 to i8*), i64 // SPARCV9: load atomic i64, i64* @ll1 seq_cst, align 8 // SPARCV9: store atomic i64 {{.*}}, i64* @ll1 seq_cst, align 8 -// SPARCV8: call void @__atomic_load(i32 100, i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a1, i32 0, i32 0), i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a2, i32 0, i32 0) -// SPARCV8: call void @__atomic_store(i32 100, i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a1, i32 0, i32 0), i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a2, i32 0, i32 0) +// SPARCV8: call void @__atomic_load(i32 frozen 100, i8* frozen getelementptr inbounds ([100 x i8], [100 x i8]* @a1, i32 0, i32 0), i8* frozen getelementptr inbounds ([100 x i8], [100 x i8]* @a2, i32 0, i32 0) +// SPARCV8: call void @__atomic_store(i32 frozen 100, i8* frozen getelementptr inbounds ([100 x i8], [100 x i8]* @a1, i32 0, i32 0), i8* frozen getelementptr inbounds ([100 x i8], [100 x i8]* @a2, i32 0, i32 0) } diff --git a/clang/test/CodeGen/attr-cpuspecific.c b/clang/test/CodeGen/attr-cpuspecific.c --- a/clang/test/CodeGen/attr-cpuspecific.c +++ b/clang/test/CodeGen/attr-cpuspecific.c @@ -256,18 +256,18 @@ ATTR(cpu_specific(atom)) int DispatchFirst(void) {return 0;} -// LINUX: define i32 @DispatchFirst.O +// LINUX: define frozen i32 @DispatchFirst.O // LINUX: ret i32 0 -// WINDOWS: define dso_local i32 @DispatchFirst.O() +// WINDOWS: define dso_local frozen i32 @DispatchFirst.O() // WINDOWS: ret i32 0 ATTR(cpu_specific(pentium)) int DispatchFirst(void) {return 1;} -// LINUX: define i32 @DispatchFirst.B +// LINUX: define frozen i32 @DispatchFirst.B // LINUX: ret i32 1 -// WINDOWS: define dso_local i32 @DispatchFirst.B +// WINDOWS: define dso_local frozen i32 @DispatchFirst.B // WINDOWS: ret i32 1 // CHECK: attributes #[[S]] = {{.*}}"target-features"="+avx,+cmov,+cx8,+f16c,+mmx,+popcnt,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87,+xsave" diff --git a/clang/test/CodeGen/attr-disable-tail-calls.c b/clang/test/CodeGen/attr-disable-tail-calls.c --- a/clang/test/CodeGen/attr-disable-tail-calls.c +++ b/clang/test/CodeGen/attr-disable-tail-calls.c @@ -1,10 +1,10 @@ // RUN: %clang_cc1 -triple x86_64-apple-macosx10.7.0 %s -emit-llvm -mdisable-tail-calls -o - | FileCheck %s -check-prefix=DISABLE // RUN: %clang_cc1 -triple x86_64-apple-macosx10.7.0 %s -emit-llvm -o - | FileCheck %s -check-prefix=ENABLE -// DISABLE: define i32 @f1() [[ATTRTRUE:#[0-9]+]] { -// DISABLE: define i32 @f2() [[ATTRTRUE]] { -// ENABLE: define i32 @f1() [[ATTRFALSE:#[0-9]+]] { -// ENABLE: define i32 @f2() [[ATTRTRUE:#[0-9]+]] { +// DISABLE: define frozen i32 @f1() [[ATTRTRUE:#[0-9]+]] { +// DISABLE: define frozen i32 @f2() [[ATTRTRUE]] { +// ENABLE: define frozen i32 @f1() [[ATTRFALSE:#[0-9]+]] { +// ENABLE: define frozen i32 @f2() [[ATTRTRUE:#[0-9]+]] { int f1() { return 0; diff --git a/clang/test/CodeGen/attr-func-def.c b/clang/test/CodeGen/attr-func-def.c --- a/clang/test/CodeGen/attr-func-def.c +++ b/clang/test/CodeGen/attr-func-def.c @@ -1,7 +1,7 @@ // RUN: %clang_cc1 -triple x86_64-apple-macosx10.10.0 -emit-llvm -Oz -o - %s | FileCheck %s -// CHECK: define i32 @foo2(i32 %a) local_unnamed_addr [[ATTRS2:#[0-9]+]] { -// CHECK: define i32 @foo1(i32 %a) local_unnamed_addr [[ATTRS1:#[0-9]+]] { +// CHECK: define frozen i32 @foo2(i32 frozen %a) local_unnamed_addr [[ATTRS2:#[0-9]+]] { +// CHECK: define frozen i32 @foo1(i32 frozen %a) local_unnamed_addr [[ATTRS1:#[0-9]+]] { int foo1(int); diff --git a/clang/test/CodeGen/attr-naked.c b/clang/test/CodeGen/attr-naked.c --- a/clang/test/CodeGen/attr-naked.c +++ b/clang/test/CodeGen/attr-naked.c @@ -17,7 +17,7 @@ // Make sure not to generate prolog or epilog for naked functions. __attribute((naked)) void t3(int x) { -// CHECK: define void @t3(i32 %0) +// CHECK: define void @t3(i32 frozen %0) // CHECK-NOT: alloca // CHECK-NOT: store // CHECK: unreachable diff --git a/clang/test/CodeGen/attr-no-tail.c b/clang/test/CodeGen/attr-no-tail.c --- a/clang/test/CodeGen/attr-no-tail.c +++ b/clang/test/CodeGen/attr-no-tail.c @@ -1,14 +1,14 @@ // RUN: %clang_cc1 -triple x86_64-apple-macosx10.7.0 %s -emit-llvm -o - | FileCheck %s -// CHECK: %{{[a-z0-9]+}} = notail call i32 @callee0(i32 % -// CHECK: %{{[a-z0-9]+}} = notail call i32 @callee1(i32 % +// CHECK: %{{[a-z0-9]+}} = notail call frozen i32 @callee0(i32 frozen % +// CHECK: %{{[a-z0-9]+}} = notail call frozen i32 @callee1(i32 frozen % // Check that indirect calls do not have the notail marker. // CHECK: store i32 (i32)* @callee1, i32 (i32)** [[ALLOCA1:%[A-Za-z0-9]+]], align 8 // CHECK: [[INDIRFUNC:%[0-9]+]] = load i32 (i32)*, i32 (i32)** [[ALLOCA1]], align 8 -// CHECK: %{{[a-z0-9]+}} = call i32 [[INDIRFUNC]](i32 %{{[0-9]+}} +// CHECK: %{{[a-z0-9]+}} = call frozen i32 [[INDIRFUNC]](i32 frozen %{{[0-9]+}} -// CHECK: %{{[a-z0-9]+}} = call i32 @callee2(i32 % +// CHECK: %{{[a-z0-9]+}} = call frozen i32 @callee2(i32 frozen % int callee0(int a) __attribute__((not_tail_called)) { return a + 1; diff --git a/clang/test/CodeGen/attr-nomerge.cpp b/clang/test/CodeGen/attr-nomerge.cpp --- a/clang/test/CodeGen/attr-nomerge.cpp +++ b/clang/test/CodeGen/attr-nomerge.cpp @@ -12,15 +12,15 @@ [[clang::nomerge]] for (bar(); bar(); bar()) {} bar(); } -// CHECK: call zeroext i1 @_Z3barv() #[[NOMERGEATTR:[0-9]+]] -// CHECK: call zeroext i1 @_Z3barv() #[[NOMERGEATTR]] -// CHECK: call zeroext i1 @_Z3barv() #[[NOMERGEATTR]] -// CHECK: call zeroext i1 @_Z3barv() #[[NOMERGEATTR]] -// CHECK: call zeroext i1 @_Z3barv() #[[NOMERGEATTR]] +// CHECK: call frozen zeroext i1 @_Z3barv() #[[NOMERGEATTR:[0-9]+]] +// CHECK: call frozen zeroext i1 @_Z3barv() #[[NOMERGEATTR]] +// CHECK: call frozen zeroext i1 @_Z3barv() #[[NOMERGEATTR]] +// CHECK: call frozen zeroext i1 @_Z3barv() #[[NOMERGEATTR]] +// CHECK: call frozen zeroext i1 @_Z3barv() #[[NOMERGEATTR]] // CHECK: call void @_Z1fbb({{.*}}) #[[NOMERGEATTR]] -// CHECK: call void @"_ZZ3fooiENK3$_0clEv"(%class.anon* %ref.tmp) #[[NOMERGEATTR]] -// CHECK: call zeroext i1 @_Z3barv() #[[NOMERGEATTR]] -// CHECK: call zeroext i1 @_Z3barv() #[[NOMERGEATTR]] -// CHECK: call zeroext i1 @_Z3barv() #[[NOMERGEATTR]] -// CHECK: call zeroext i1 @_Z3barv() +// CHECK: call void @"_ZZ3fooiENK3$_0clEv"(%class.anon* frozen %ref.tmp) #[[NOMERGEATTR]] +// CHECK: call frozen zeroext i1 @_Z3barv() #[[NOMERGEATTR]] +// CHECK: call frozen zeroext i1 @_Z3barv() #[[NOMERGEATTR]] +// CHECK: call frozen zeroext i1 @_Z3barv() #[[NOMERGEATTR]] +// CHECK: call frozen zeroext i1 @_Z3barv() // CHECK: attributes #[[NOMERGEATTR]] = { nomerge } diff --git a/clang/test/CodeGen/attr-optnone.c b/clang/test/CodeGen/attr-optnone.c --- a/clang/test/CodeGen/attr-optnone.c +++ b/clang/test/CodeGen/attr-optnone.c @@ -21,7 +21,7 @@ int test4() { return test2(); } // PRESENT-DAG: @test4{{.*}}[[ATTR4:#[0-9]+]] // Also check that test2 is inlined into test4 (always_inline still works). -// PRESENT-NOT: call i32 @test2 +// PRESENT-NOT: call frozen i32 @test2 // Check for both noinline and optnone on each optnone function. // PRESENT-DAG: attributes [[ATTR3]] = { {{.*}}noinline{{.*}}optnone{{.*}} } diff --git a/clang/test/CodeGen/attr-target-mv-func-ptrs.c b/clang/test/CodeGen/attr-target-mv-func-ptrs.c --- a/clang/test/CodeGen/attr-target-mv-func-ptrs.c +++ b/clang/test/CodeGen/attr-target-mv-func-ptrs.c @@ -18,30 +18,30 @@ } // LINUX: @foo.ifunc = weak_odr ifunc i32 (i32), i32 (i32)* ()* @foo.resolver -// LINUX: define i32 @foo.sse4.2( +// LINUX: define frozen i32 @foo.sse4.2( // LINUX: ret i32 0 -// LINUX: define i32 @foo.arch_ivybridge( +// LINUX: define frozen i32 @foo.arch_ivybridge( // LINUX: ret i32 1 -// LINUX: define i32 @foo( +// LINUX: define frozen i32 @foo( // LINUX: ret i32 2 -// WINDOWS: define dso_local i32 @foo.sse4.2( +// WINDOWS: define dso_local frozen i32 @foo.sse4.2( // WINDOWS: ret i32 0 -// WINDOWS: define dso_local i32 @foo.arch_ivybridge( +// WINDOWS: define dso_local frozen i32 @foo.arch_ivybridge( // WINDOWS: ret i32 1 -// WINDOWS: define dso_local i32 @foo( +// WINDOWS: define dso_local frozen i32 @foo( // WINDOWS: ret i32 2 -// LINUX: define i32 @bar() -// LINUX: call void @func(i32 (i32)* @foo.ifunc) +// LINUX: define frozen i32 @bar() +// LINUX: call void @func(i32 (i32)* frozen @foo.ifunc) // LINUX: store i32 (i32)* @foo.ifunc // LINUX: store i32 (i32)* @foo.ifunc -// WINDOWS: define dso_local i32 @bar() -// WINDOWS: call void @func(i32 (i32)* @foo.resolver) +// WINDOWS: define dso_local frozen i32 @bar() +// WINDOWS: call void @func(i32 (i32)* frozen @foo.resolver) // WINDOWS: store i32 (i32)* @foo.resolver // WINDOWS: store i32 (i32)* @foo.resolver -// LINUX: declare i32 @foo.arch_sandybridge( +// LINUX: declare frozen i32 @foo.arch_sandybridge( -// WINDOWS: declare dso_local i32 @foo.arch_sandybridge( +// WINDOWS: declare dso_local frozen i32 @foo.arch_sandybridge( diff --git a/clang/test/CodeGen/attr-target-mv-va-args.c b/clang/test/CodeGen/attr-target-mv-va-args.c --- a/clang/test/CodeGen/attr-target-mv-va-args.c +++ b/clang/test/CodeGen/attr-target-mv-va-args.c @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -triple x86_64-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=LINUX -// RUN: %clang_cc1 -triple x86_64-windows-pc -emit-llvm %s -o - | FileCheck %s --check-prefix=WINDOWS +// RUN: %clang_cc1 -disable-frozen-args -triple x86_64-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=LINUX +// RUN: %clang_cc1 -disable-frozen-args -triple x86_64-windows-pc -emit-llvm %s -o - | FileCheck %s --check-prefix=WINDOWS int __attribute__((target("sse4.2"))) foo(int i, ...) { return 0; } int __attribute__((target("arch=sandybridge"))) foo(int i, ...); int __attribute__((target("arch=ivybridge"))) foo(int i, ...) {return 1;} @@ -10,36 +10,36 @@ } // LINUX: @foo.ifunc = weak_odr ifunc i32 (i32, ...), i32 (i32, ...)* ()* @foo.resolver -// LINUX: define i32 @foo.sse4.2(i32 %i, ...) +// LINUX: define frozen i32 @foo.sse4.2(i32 %i, ...) // LINUX: ret i32 0 -// LINUX: define i32 @foo.arch_ivybridge(i32 %i, ...) +// LINUX: define frozen i32 @foo.arch_ivybridge(i32 %i, ...) // LINUX: ret i32 1 -// LINUX: define i32 @foo(i32 %i, ...) +// LINUX: define frozen i32 @foo(i32 %i, ...) // LINUX: ret i32 2 -// LINUX: define i32 @bar() -// LINUX: call i32 (i32, ...) @foo.ifunc(i32 1, i32 97, double -// LINUX: call i32 (i32, ...) @foo.ifunc(i32 2, double 2.2{{[0-9Ee+]+}}, i8* getelementptr inbounds +// LINUX: define frozen i32 @bar() +// LINUX: call frozen i32 (i32, ...) @foo.ifunc(i32 1, i32 97, double +// LINUX: call frozen i32 (i32, ...) @foo.ifunc(i32 2, double 2.2{{[0-9Ee+]+}}, i8* getelementptr inbounds // LINUX: define weak_odr i32 (i32, ...)* @foo.resolver() comdat // LINUX: ret i32 (i32, ...)* @foo.arch_sandybridge // LINUX: ret i32 (i32, ...)* @foo.arch_ivybridge // LINUX: ret i32 (i32, ...)* @foo.sse4.2 // LINUX: ret i32 (i32, ...)* @foo -// LINUX: declare i32 @foo.arch_sandybridge(i32, ...) +// LINUX: declare frozen i32 @foo.arch_sandybridge(i32, ...) -// WINDOWS: define dso_local i32 @foo.sse4.2(i32 %i, ...) +// WINDOWS: define dso_local frozen i32 @foo.sse4.2(i32 %i, ...) // WINDOWS: ret i32 0 -// WINDOWS: define dso_local i32 @foo.arch_ivybridge(i32 %i, ...) +// WINDOWS: define dso_local frozen i32 @foo.arch_ivybridge(i32 %i, ...) // WINDOWS: ret i32 1 -// WINDOWS: define dso_local i32 @foo(i32 %i, ...) +// WINDOWS: define dso_local frozen i32 @foo(i32 %i, ...) // WINDOWS: ret i32 2 -// WINDOWS: define dso_local i32 @bar() -// WINDOWS: call i32 (i32, ...) @foo.resolver(i32 1, i32 97, double -// WINDOWS: call i32 (i32, ...) @foo.resolver(i32 2, double 2.2{{[0-9Ee+]+}}, i8* getelementptr inbounds +// WINDOWS: define dso_local frozen i32 @bar() +// WINDOWS: call frozen i32 (i32, ...) @foo.resolver(i32 1, i32 97, double +// WINDOWS: call frozen i32 (i32, ...) @foo.resolver(i32 2, double 2.2{{[0-9Ee+]+}}, i8* getelementptr inbounds // WINDOWS: define weak_odr dso_local i32 @foo.resolver(i32 %0, ...) comdat // WINDOWS: musttail call i32 (i32, ...) @foo.arch_sandybridge // WINDOWS: musttail call i32 (i32, ...) @foo.arch_ivybridge // WINDOWS: musttail call i32 (i32, ...) @foo.sse4.2 // WINDOWS: musttail call i32 (i32, ...) @foo -// WINDOWS: declare dso_local i32 @foo.arch_sandybridge(i32, ...) +// WINDOWS: declare dso_local frozen i32 @foo.arch_sandybridge(i32, ...) diff --git a/clang/test/CodeGen/attr-target-mv.c b/clang/test/CodeGen/attr-target-mv.c --- a/clang/test/CodeGen/attr-target-mv.c +++ b/clang/test/CodeGen/attr-target-mv.c @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -triple x86_64-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=LINUX -// RUN: %clang_cc1 -triple x86_64-windows-pc -emit-llvm %s -o - | FileCheck %s --check-prefix=WINDOWS +// RUN: %clang_cc1 -disable-frozen-args -triple x86_64-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=LINUX +// RUN: %clang_cc1 -disable-frozen-args -triple x86_64-windows-pc -emit-llvm %s -o - | FileCheck %s --check-prefix=WINDOWS int __attribute__((target("sse4.2"))) foo(void) { return 0; } int __attribute__((target("arch=sandybridge"))) foo(void); @@ -71,43 +71,43 @@ // LINUX: @fwd_decl_default.ifunc = weak_odr ifunc i32 (), i32 ()* ()* @fwd_decl_default.resolver // LINUX: @fwd_decl_avx.ifunc = weak_odr ifunc i32 (), i32 ()* ()* @fwd_decl_avx.resolver -// LINUX: define i32 @foo.sse4.2() +// LINUX: define frozen i32 @foo.sse4.2() // LINUX: ret i32 0 -// LINUX: define i32 @foo.arch_ivybridge() +// LINUX: define frozen i32 @foo.arch_ivybridge() // LINUX: ret i32 1 -// LINUX: define i32 @foo.arch_goldmont() +// LINUX: define frozen i32 @foo.arch_goldmont() // LINUX: ret i32 3 -// LINUX: define i32 @foo.arch_goldmont-plus() +// LINUX: define frozen i32 @foo.arch_goldmont-plus() // LINUX: ret i32 4 -// LINUX: define i32 @foo.arch_tremont() +// LINUX: define frozen i32 @foo.arch_tremont() // LINUX: ret i32 5 -// LINUX: define i32 @foo.arch_icelake-client() +// LINUX: define frozen i32 @foo.arch_icelake-client() // LINUX: ret i32 6 -// LINUX: define i32 @foo.arch_icelake-server() +// LINUX: define frozen i32 @foo.arch_icelake-server() // LINUX: ret i32 7 -// LINUX: define i32 @foo() +// LINUX: define frozen i32 @foo() // LINUX: ret i32 2 -// LINUX: define i32 @bar() -// LINUX: call i32 @foo.ifunc() +// LINUX: define frozen i32 @bar() +// LINUX: call frozen i32 @foo.ifunc() -// WINDOWS: define dso_local i32 @foo.sse4.2() +// WINDOWS: define dso_local frozen i32 @foo.sse4.2() // WINDOWS: ret i32 0 -// WINDOWS: define dso_local i32 @foo.arch_ivybridge() +// WINDOWS: define dso_local frozen i32 @foo.arch_ivybridge() // WINDOWS: ret i32 1 -// WINDOWS: define dso_local i32 @foo.arch_goldmont() +// WINDOWS: define dso_local frozen i32 @foo.arch_goldmont() // WINDOWS: ret i32 3 -// WINDOWS: define dso_local i32 @foo.arch_goldmont-plus() +// WINDOWS: define dso_local frozen i32 @foo.arch_goldmont-plus() // WINDOWS: ret i32 4 -// WINDOWS: define dso_local i32 @foo.arch_tremont() +// WINDOWS: define dso_local frozen i32 @foo.arch_tremont() // WINDOWS: ret i32 5 -// WINDOWS: define dso_local i32 @foo.arch_icelake-client() +// WINDOWS: define dso_local frozen i32 @foo.arch_icelake-client() // WINDOWS: ret i32 6 -// WINDOWS: define dso_local i32 @foo.arch_icelake-server() +// WINDOWS: define dso_local frozen i32 @foo.arch_icelake-server() // WINDOWS: ret i32 7 -// WINDOWS: define dso_local i32 @foo() +// WINDOWS: define dso_local frozen i32 @foo() // WINDOWS: ret i32 2 -// WINDOWS: define dso_local i32 @bar() -// WINDOWS: call i32 @foo.resolver() +// WINDOWS: define dso_local frozen i32 @bar() +// WINDOWS: call frozen i32 @foo.resolver() // LINUX: define weak_odr i32 ()* @foo.resolver() comdat // LINUX: call void @__cpu_indicator_init() @@ -121,13 +121,13 @@ // WINDOWS: call i32 @foo.arch_sandybridge // WINDOWS: call i32 @foo.arch_ivybridge // WINDOWS: call i32 @foo.sse4.2 -// WINDOWS: call i32 @foo +// WINDOWS: call i32 @foo( -// LINUX: define i32 @bar2() -// LINUX: call i32 @foo_inline.ifunc() +// LINUX: define frozen i32 @bar2() +// LINUX: call frozen i32 @foo_inline.ifunc() -// WINDOWS: define dso_local i32 @bar2() -// WINDOWS: call i32 @foo_inline.resolver() +// WINDOWS: define dso_local frozen i32 @bar2() +// WINDOWS: call frozen i32 @foo_inline.resolver() // LINUX: define weak_odr i32 ()* @foo_inline.resolver() comdat // LINUX: call void @__cpu_indicator_init() @@ -193,27 +193,27 @@ // WINDOWS: call void @foo_multi(i32 %0, double %1) // WINDOWS-NEXT: ret void -// LINUX: define i32 @fwd_decl_default() +// LINUX: define frozen i32 @fwd_decl_default() // LINUX: ret i32 2 -// LINUX: define i32 @fwd_decl_avx.avx() +// LINUX: define frozen i32 @fwd_decl_avx.avx() // LINUX: ret i32 2 -// LINUX: define i32 @fwd_decl_avx() +// LINUX: define frozen i32 @fwd_decl_avx() // LINUX: ret i32 2 -// WINDOWS: define dso_local i32 @fwd_decl_default() +// WINDOWS: define dso_local frozen i32 @fwd_decl_default() // WINDOWS: ret i32 2 -// WINDOWS: define dso_local i32 @fwd_decl_avx.avx() +// WINDOWS: define dso_local frozen i32 @fwd_decl_avx.avx() // WINDOWS: ret i32 2 -// WINDOWS: define dso_local i32 @fwd_decl_avx() +// WINDOWS: define dso_local frozen i32 @fwd_decl_avx() // WINDOWS: ret i32 2 // LINUX: define void @bar5() -// LINUX: call i32 @fwd_decl_default.ifunc() -// LINUX: call i32 @fwd_decl_avx.ifunc() +// LINUX: call frozen i32 @fwd_decl_default.ifunc() +// LINUX: call frozen i32 @fwd_decl_avx.ifunc() // WINDOWS: define dso_local void @bar5() -// WINDOWS: call i32 @fwd_decl_default.resolver() -// WINDOWS: call i32 @fwd_decl_avx.resolver() +// WINDOWS: call frozen i32 @fwd_decl_default.resolver() +// WINDOWS: call frozen i32 @fwd_decl_avx.resolver() // LINUX: define weak_odr i32 ()* @fwd_decl_default.resolver() comdat // LINUX: call void @__cpu_indicator_init() @@ -231,11 +231,11 @@ // WINDOWS: call i32 @fwd_decl_avx.avx // WINDOWS: call i32 @fwd_decl_avx -// LINUX: define i32 @changed_to_mv.avx() -// LINUX: define i32 @changed_to_mv.fma4() +// LINUX: define frozen i32 @changed_to_mv.avx() +// LINUX: define frozen i32 @changed_to_mv.fma4() -// WINDOWS: define dso_local i32 @changed_to_mv.avx() -// WINDOWS: define dso_local i32 @changed_to_mv.fma4() +// WINDOWS: define dso_local frozen i32 @changed_to_mv.avx() +// WINDOWS: define dso_local frozen i32 @changed_to_mv.fma4() // LINUX: define linkonce void @foo_used(i32 %{{.*}}, double %{{.*}}) // LINUX-NOT: @foo_used.avx_sse4.2( @@ -247,27 +247,27 @@ // WINDOWS-NOT: @foo_used2( // WINDOWS: define linkonce_odr dso_local void @foo_used2.avx_sse4.2(i32 %{{.*}}, double %{{.*}}) -// LINUX: declare i32 @foo.arch_sandybridge() -// WINDOWS: declare dso_local i32 @foo.arch_sandybridge() +// LINUX: declare frozen i32 @foo.arch_sandybridge() +// WINDOWS: declare dso_local frozen i32 @foo.arch_sandybridge() -// LINUX: define linkonce i32 @foo_inline.sse4.2() +// LINUX: define linkonce frozen i32 @foo_inline.sse4.2() // LINUX: ret i32 0 -// WINDOWS: define linkonce_odr dso_local i32 @foo_inline.sse4.2() +// WINDOWS: define linkonce_odr dso_local frozen i32 @foo_inline.sse4.2() // WINDOWS: ret i32 0 -// LINUX: declare i32 @foo_inline.arch_sandybridge() +// LINUX: declare frozen i32 @foo_inline.arch_sandybridge() -// WINDOWS: declare dso_local i32 @foo_inline.arch_sandybridge() +// WINDOWS: declare dso_local frozen i32 @foo_inline.arch_sandybridge() -// LINUX: define linkonce i32 @foo_inline.arch_ivybridge() +// LINUX: define linkonce frozen i32 @foo_inline.arch_ivybridge() // LINUX: ret i32 1 -// LINUX: define linkonce i32 @foo_inline() +// LINUX: define linkonce frozen i32 @foo_inline() // LINUX: ret i32 2 -// WINDOWS: define linkonce_odr dso_local i32 @foo_inline.arch_ivybridge() +// WINDOWS: define linkonce_odr dso_local frozen i32 @foo_inline.arch_ivybridge() // WINDOWS: ret i32 1 -// WINDOWS: define linkonce_odr dso_local i32 @foo_inline() +// WINDOWS: define linkonce_odr dso_local frozen i32 @foo_inline() // WINDOWS: ret i32 2 // LINUX: define linkonce void @foo_decls() diff --git a/clang/test/CodeGen/attr-x86-interrupt.c b/clang/test/CodeGen/attr-x86-interrupt.c --- a/clang/test/CodeGen/attr-x86-interrupt.c +++ b/clang/test/CodeGen/attr-x86-interrupt.c @@ -13,22 +13,22 @@ __attribute__((interrupt)) void foo7(int *a, uword b) {} __attribute__((interrupt)) void foo8(int *a) {} // X86_64_LINUX: @llvm.used = appending global [2 x i8*] [i8* bitcast (void (i32*, i64)* @foo7 to i8*), i8* bitcast (void (i32*)* @foo8 to i8*)], section "llvm.metadata" -// X86_64_LINUX: define x86_intrcc void @foo7(i32* %{{.+}}, i64 %{{.+}}) -// X86_64_LINUX: define x86_intrcc void @foo8(i32* %{{.+}}) +// X86_64_LINUX: define x86_intrcc void @foo7(i32* frozen %{{.+}}, i64 frozen %{{.+}}) +// X86_64_LINUX: define x86_intrcc void @foo8(i32* frozen %{{.+}}) // X86_64_LINUX: "disable-tail-calls"="true" // X86_64_LINUX-NOT: "disable-tail-calls"="false" // X86_LINUX: @llvm.used = appending global [2 x i8*] [i8* bitcast (void (i32*, i32)* @foo7 to i8*), i8* bitcast (void (i32*)* @foo8 to i8*)], section "llvm.metadata" -// X86_LINUX: define x86_intrcc void @foo7(i32* %{{.+}}, i32 %{{.+}}) -// X86_LINUX: define x86_intrcc void @foo8(i32* %{{.+}}) +// X86_LINUX: define x86_intrcc void @foo7(i32* frozen %{{.+}}, i32 frozen %{{.+}}) +// X86_LINUX: define x86_intrcc void @foo8(i32* frozen %{{.+}}) // X86_LINUX: "disable-tail-calls"="true" // X86_LINUX-NOT: "disable-tail-calls"="false" // X86_64_WIN: @llvm.used = appending global [2 x i8*] [i8* bitcast (void (i32*, i64)* @foo7 to i8*), i8* bitcast (void (i32*)* @foo8 to i8*)], section "llvm.metadata" -// X86_64_WIN: define dso_local x86_intrcc void @foo7(i32* %{{.+}}, i64 %{{.+}}) -// X86_64_WIN: define dso_local x86_intrcc void @foo8(i32* %{{.+}}) +// X86_64_WIN: define dso_local x86_intrcc void @foo7(i32* frozen %{{.+}}, i64 frozen %{{.+}}) +// X86_64_WIN: define dso_local x86_intrcc void @foo8(i32* frozen %{{.+}}) // X86_64_Win: "disable-tail-calls"="true" // X86_64_Win-NOT: "disable-tail-calls"="false" // X86_WIN: @llvm.used = appending global [2 x i8*] [i8* bitcast (void (i32*, i32)* @foo7 to i8*), i8* bitcast (void (i32*)* @foo8 to i8*)], section "llvm.metadata" -// X86_WIN: define dso_local x86_intrcc void @foo7(i32* %{{.+}}, i32 %{{.+}}) -// X86_WIN: define dso_local x86_intrcc void @foo8(i32* %{{.+}}) +// X86_WIN: define dso_local x86_intrcc void @foo7(i32* frozen %{{.+}}, i32 frozen %{{.+}}) +// X86_WIN: define dso_local x86_intrcc void @foo8(i32* frozen %{{.+}}) // X86_Win: "disable-tail-calls"="true" // X86_Win-NOT: "disable-tail-calls"="false" diff --git a/clang/test/CodeGen/attributes.c b/clang/test/CodeGen/attributes.c --- a/clang/test/CodeGen/attributes.c +++ b/clang/test/CodeGen/attributes.c @@ -30,7 +30,7 @@ void __t8() {} void t9() __attribute__((weak, alias("__t8"))); -// CHECK: declare extern_weak i32 @t15() +// CHECK: declare extern_weak frozen i32 @t15() int __attribute__((weak_import)) t15(void); int t17() { return t15() + t16; @@ -69,7 +69,7 @@ // CHECK: define void @t11() [[NUW]] section "SECT" { void __attribute__((section("SECT"))) t11(void) {} -// CHECK: define i32 @t19() [[NUW]] { +// CHECK: define frozen i32 @t19() [[NUW]] { extern int t19(void) __attribute__((weak_import)); int t19(void) { return 10; @@ -87,7 +87,7 @@ fptr(10); } // CHECK: [[FPTRVAR:%[a-z0-9]+]] = load void (i32)*, void (i32)** @fptr -// CHECK-NEXT: call x86_fastcallcc void [[FPTRVAR]](i32 inreg 10) +// CHECK-NEXT: call x86_fastcallcc void [[FPTRVAR]](i32 frozen inreg 10) // PR9356: We might want to err on this, but for now at least make sure we diff --git a/clang/test/CodeGen/available-externally-hidden.cpp b/clang/test/CodeGen/available-externally-hidden.cpp --- a/clang/test/CodeGen/available-externally-hidden.cpp +++ b/clang/test/CodeGen/available-externally-hidden.cpp @@ -17,7 +17,7 @@ virtual ~Sender() {} }; -// CHECK: declare zeroext i1 @_ZThn16_N17SyncMessageFilter4SendEP7Message +// CHECK: declare frozen zeroext i1 @_ZThn16_N17SyncMessageFilter4SendEP7Message class SyncMessageFilter : public Filter, public Sender { public: bool Send(Message* message) override; diff --git a/clang/test/CodeGen/available-externally-suppress.c b/clang/test/CodeGen/available-externally-suppress.c --- a/clang/test/CodeGen/available-externally-suppress.c +++ b/clang/test/CodeGen/available-externally-suppress.c @@ -13,7 +13,7 @@ inline void f0(int y) { x = y; } // CHECK-LABEL: define void @test() -// CHECK: declare void @f0(i32) +// CHECK: declare void @f0(i32 frozen) // LTO-LABEL: define void @test() // LTO: define available_externally void @f0 void test() { diff --git a/clang/test/CodeGen/avr-builtins.c b/clang/test/CodeGen/avr-builtins.c --- a/clang/test/CodeGen/avr-builtins.c +++ b/clang/test/CodeGen/avr-builtins.c @@ -8,99 +8,99 @@ return __builtin_bitreverse8(data); } -// CHECK: define zeroext i8 @bitrev8 +// CHECK: define frozen zeroext i8 @bitrev8 // CHECK: i8 @llvm.bitreverse.i8(i8 unsigned int bitrev16(unsigned int data) { return __builtin_bitreverse16(data); } -// CHECK: define i16 @bitrev16 +// CHECK: define frozen i16 @bitrev16 // CHECK: i16 @llvm.bitreverse.i16(i16 unsigned long bitrev32(unsigned long data) { return __builtin_bitreverse32(data); } -// CHECK: define i32 @bitrev32 +// CHECK: define frozen i32 @bitrev32 // CHECK: i32 @llvm.bitreverse.i32(i32 unsigned long long bitrev64(unsigned long long data) { return __builtin_bitreverse64(data); } -// CHECK: define i64 @bitrev64 +// CHECK: define frozen i64 @bitrev64 // CHECK: i64 @llvm.bitreverse.i64(i64 unsigned char rotleft8(unsigned char x, unsigned char y) { return __builtin_rotateleft8(x, y); } -// CHECK: define zeroext i8 @rotleft8 +// CHECK: define frozen zeroext i8 @rotleft8 // CHECK: i8 @llvm.fshl.i8(i8 unsigned int rotleft16(unsigned int x, unsigned int y) { return __builtin_rotateleft16(x, y); } -// CHECK: define i16 @rotleft16 +// CHECK: define frozen i16 @rotleft16 // CHECK: i16 @llvm.fshl.i16(i16 unsigned long rotleft32(unsigned long x, unsigned long y) { return __builtin_rotateleft32(x, y); } -// CHECK: define i32 @rotleft32 +// CHECK: define frozen i32 @rotleft32 // CHECK: i32 @llvm.fshl.i32(i32 unsigned long long rotleft64(unsigned long long x, unsigned long long y) { return __builtin_rotateleft64(x, y); } -// CHECK: define i64 @rotleft64 +// CHECK: define frozen i64 @rotleft64 // CHECK: i64 @llvm.fshl.i64(i64 unsigned char rotright8(unsigned char x, unsigned char y) { return __builtin_rotateright8(x, y); } -// CHECK: define zeroext i8 @rotright8 +// CHECK: define frozen zeroext i8 @rotright8 // CHECK: i8 @llvm.fshr.i8(i8 unsigned int rotright16(unsigned int x, unsigned int y) { return __builtin_rotateright16(x, y); } -// CHECK: define i16 @rotright16 +// CHECK: define frozen i16 @rotright16 // CHECK: i16 @llvm.fshr.i16(i16 unsigned long rotright32(unsigned long x, unsigned long y) { return __builtin_rotateright32(x, y); } -// CHECK: define i32 @rotright32 +// CHECK: define frozen i32 @rotright32 // CHECK: i32 @llvm.fshr.i32(i32 unsigned long long rotright64(unsigned long long x, unsigned long long y) { return __builtin_rotateright64(x, y); } -// CHECK: define i64 @rotright64 +// CHECK: define frozen i64 @rotright64 // CHECK: i64 @llvm.fshr.i64(i64 unsigned int byteswap16(unsigned int x) { return __builtin_bswap16(x); } -// CHECK: define i16 @byteswap16 +// CHECK: define frozen i16 @byteswap16 // CHECK: i16 @llvm.bswap.i16(i16 unsigned long byteswap32(unsigned long x) { return __builtin_bswap32(x); } -// CHECK: define i32 @byteswap32 +// CHECK: define frozen i32 @byteswap32 // CHECK: i32 @llvm.bswap.i32(i32 unsigned long long byteswap64(unsigned long long x) { return __builtin_bswap64(x); } -// CHECK: define i64 @byteswap64 +// CHECK: define frozen i64 @byteswap64 // CHECK: i64 @llvm.bswap.i64(i64 diff --git a/clang/test/CodeGen/avx2-builtins.c b/clang/test/CodeGen/avx2-builtins.c --- a/clang/test/CodeGen/avx2-builtins.c +++ b/clang/test/CodeGen/avx2-builtins.c @@ -117,7 +117,7 @@ return _mm256_avg_epu16(a, b); } -// FIXME: We should also lower the __builtin_ia32_pblendw128 (and similar) +// FIXME: We should also lower the __builtin_ia32_pblendw128 (and similar) // functions to this IR. In the future we could delete the corresponding // intrinsic in LLVM if it's not being used anymore. __m256i test_mm256_blend_epi16(__m256i a, __m256i b) { diff --git a/clang/test/CodeGen/avx512-reduceMinMaxIntrin.c b/clang/test/CodeGen/avx512-reduceMinMaxIntrin.c --- a/clang/test/CodeGen/avx512-reduceMinMaxIntrin.c +++ b/clang/test/CodeGen/avx512-reduceMinMaxIntrin.c @@ -2,7 +2,7 @@ #include -// CHECK-LABEL: define i64 @test_mm512_reduce_max_epi64(<8 x i64> %__W) #0 { +// CHECK-LABEL: define frozen i64 @test_mm512_reduce_max_epi64(<8 x i64> frozen %__W) #0 { // CHECK-NEXT: entry: // CHECK-NEXT: [[__A_ADDR_I7_I:%.*]] = alloca <8 x i64>, align 64 // CHECK-NEXT: [[__B_ADDR_I8_I:%.*]] = alloca <8 x i64>, align 64 @@ -67,7 +67,7 @@ return _mm512_reduce_max_epi64(__W); } -// CHECK-LABEL: define i64 @test_mm512_reduce_max_epu64(<8 x i64> %__W) #0 { +// CHECK-LABEL: define frozen i64 @test_mm512_reduce_max_epu64(<8 x i64> frozen %__W) #0 { // CHECK-NEXT: entry: // CHECK-NEXT: [[__A_ADDR_I7_I:%.*]] = alloca <8 x i64>, align 64 // CHECK-NEXT: [[__B_ADDR_I8_I:%.*]] = alloca <8 x i64>, align 64 @@ -132,7 +132,7 @@ return _mm512_reduce_max_epu64(__W); } -// CHECK-LABEL: define double @test_mm512_reduce_max_pd(<8 x double> %__W) #0 { +// CHECK-LABEL: define frozen double @test_mm512_reduce_max_pd(<8 x double> frozen %__W) #0 { // CHECK-NEXT: entry: // CHECK-NEXT: [[__A_ADDR_I8_I:%.*]] = alloca <2 x double>, align 16 // CHECK-NEXT: [[__B_ADDR_I9_I:%.*]] = alloca <2 x double>, align 16 @@ -200,7 +200,7 @@ return _mm512_reduce_max_pd(__W); } -// CHECK-LABEL: define i64 @test_mm512_reduce_min_epi64(<8 x i64> %__W) #0 { +// CHECK-LABEL: define frozen i64 @test_mm512_reduce_min_epi64(<8 x i64> frozen %__W) #0 { // CHECK-NEXT: entry: // CHECK-NEXT: [[__A_ADDR_I7_I:%.*]] = alloca <8 x i64>, align 64 // CHECK-NEXT: [[__B_ADDR_I8_I:%.*]] = alloca <8 x i64>, align 64 @@ -265,7 +265,7 @@ return _mm512_reduce_min_epi64(__W); } -// CHECK-LABEL: define i64 @test_mm512_reduce_min_epu64(<8 x i64> %__W) #0 { +// CHECK-LABEL: define frozen i64 @test_mm512_reduce_min_epu64(<8 x i64> frozen %__W) #0 { // CHECK-NEXT: entry: // CHECK-NEXT: [[__A_ADDR_I7_I:%.*]] = alloca <8 x i64>, align 64 // CHECK-NEXT: [[__B_ADDR_I8_I:%.*]] = alloca <8 x i64>, align 64 @@ -330,7 +330,7 @@ return _mm512_reduce_min_epu64(__W); } -// CHECK-LABEL: define double @test_mm512_reduce_min_pd(<8 x double> %__W) #0 { +// CHECK-LABEL: define frozen double @test_mm512_reduce_min_pd(<8 x double> frozen %__W) #0 { // CHECK-NEXT: entry: // CHECK-NEXT: [[__A_ADDR_I8_I:%.*]] = alloca <2 x double>, align 16 // CHECK-NEXT: [[__B_ADDR_I9_I:%.*]] = alloca <2 x double>, align 16 @@ -398,7 +398,7 @@ return _mm512_reduce_min_pd(__W); } -// CHECK-LABEL: define i64 @test_mm512_mask_reduce_max_epi64(i8 zeroext %__M, <8 x i64> %__W) #0 { +// CHECK-LABEL: define frozen i64 @test_mm512_mask_reduce_max_epi64(i8 frozen zeroext %__M, <8 x i64> frozen %__W) #0 { // CHECK-NEXT: entry: // CHECK-NEXT: [[__D_ADDR_I_I:%.*]] = alloca i64, align 8 // CHECK-NEXT: [[DOTCOMPOUNDLITERAL_I_I:%.*]] = alloca <8 x i64>, align 64 @@ -503,7 +503,7 @@ return _mm512_mask_reduce_max_epi64(__M, __W); } -// CHECK-LABEL: define i64 @test_mm512_mask_reduce_max_epu64(i8 zeroext %__M, <8 x i64> %__W) #0 { +// CHECK-LABEL: define frozen i64 @test_mm512_mask_reduce_max_epu64(i8 frozen zeroext %__M, <8 x i64> frozen %__W) #0 { // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTCOMPOUNDLITERAL_I_I_I:%.*]] = alloca <8 x i64>, align 64 // CHECK-NEXT: [[__U_ADDR_I_I:%.*]] = alloca i8, align 1 @@ -587,7 +587,7 @@ return _mm512_mask_reduce_max_epu64(__M, __W); } -// CHECK-LABEL: define double @test_mm512_mask_reduce_max_pd(i8 zeroext %__M, <8 x double> %__W) #0 { +// CHECK-LABEL: define frozen double @test_mm512_mask_reduce_max_pd(i8 frozen zeroext %__M, <8 x double> frozen %__W) #0 { // CHECK-NEXT: entry: // CHECK-NEXT: [[__W_ADDR_I_I:%.*]] = alloca double, align 8 // CHECK-NEXT: [[DOTCOMPOUNDLITERAL_I_I:%.*]] = alloca <8 x double>, align 64 @@ -695,7 +695,7 @@ return _mm512_mask_reduce_max_pd(__M, __W); } -// CHECK-LABEL: define i64 @test_mm512_mask_reduce_min_epi64(i8 zeroext %__M, <8 x i64> %__W) #0 { +// CHECK-LABEL: define frozen i64 @test_mm512_mask_reduce_min_epi64(i8 frozen zeroext %__M, <8 x i64> frozen %__W) #0 { // CHECK-NEXT: entry: // CHECK-NEXT: [[__D_ADDR_I_I:%.*]] = alloca i64, align 8 // CHECK-NEXT: [[DOTCOMPOUNDLITERAL_I_I:%.*]] = alloca <8 x i64>, align 64 @@ -800,7 +800,7 @@ return _mm512_mask_reduce_min_epi64(__M, __W); } -// CHECK-LABEL: define i64 @test_mm512_mask_reduce_min_epu64(i8 zeroext %__M, <8 x i64> %__W) #0 { +// CHECK-LABEL: define frozen i64 @test_mm512_mask_reduce_min_epu64(i8 frozen zeroext %__M, <8 x i64> frozen %__W) #0 { // CHECK-NEXT: entry: // CHECK-NEXT: [[__D_ADDR_I_I:%.*]] = alloca i64, align 8 // CHECK-NEXT: [[DOTCOMPOUNDLITERAL_I_I:%.*]] = alloca <8 x i64>, align 64 @@ -905,7 +905,7 @@ return _mm512_mask_reduce_min_epu64(__M, __W); } -// CHECK-LABEL: define double @test_mm512_mask_reduce_min_pd(i8 zeroext %__M, <8 x double> %__W) #0 { +// CHECK-LABEL: define frozen double @test_mm512_mask_reduce_min_pd(i8 frozen zeroext %__M, <8 x double> frozen %__W) #0 { // CHECK-NEXT: entry: // CHECK-NEXT: [[__W_ADDR_I_I:%.*]] = alloca double, align 8 // CHECK-NEXT: [[DOTCOMPOUNDLITERAL_I_I:%.*]] = alloca <8 x double>, align 64 @@ -1013,7 +1013,7 @@ return _mm512_mask_reduce_min_pd(__M, __W); } -// CHECK-LABEL: define i32 @test_mm512_reduce_max_epi32(<8 x i64> %__W) #0 { +// CHECK-LABEL: define frozen i32 @test_mm512_reduce_max_epi32(<8 x i64> frozen %__W) #0 { // CHECK-NEXT: entry: // CHECK-NEXT: [[__V1_ADDR_I12_I:%.*]] = alloca <2 x i64>, align 16 // CHECK-NEXT: [[__V2_ADDR_I13_I:%.*]] = alloca <2 x i64>, align 16 @@ -1120,7 +1120,7 @@ return _mm512_reduce_max_epi32(__W); } -// CHECK-LABEL: define i32 @test_mm512_reduce_max_epu32(<8 x i64> %__W) #0 { +// CHECK-LABEL: define frozen i32 @test_mm512_reduce_max_epu32(<8 x i64> frozen %__W) #0 { // CHECK-NEXT: entry: // CHECK-NEXT: [[__V1_ADDR_I12_I:%.*]] = alloca <2 x i64>, align 16 // CHECK-NEXT: [[__V2_ADDR_I13_I:%.*]] = alloca <2 x i64>, align 16 @@ -1227,7 +1227,7 @@ return _mm512_reduce_max_epu32(__W); } -// CHECK-LABEL: define float @test_mm512_reduce_max_ps(<16 x float> %__W) #0 { +// CHECK-LABEL: define frozen float @test_mm512_reduce_max_ps(<16 x float> frozen %__W) #0 { // CHECK-NEXT: entry: // CHECK-NEXT: [[__A_ADDR_I12_I:%.*]] = alloca <4 x float>, align 16 // CHECK-NEXT: [[__B_ADDR_I13_I:%.*]] = alloca <4 x float>, align 16 @@ -1315,7 +1315,7 @@ return _mm512_reduce_max_ps(__W); } -// CHECK-LABEL: define i32 @test_mm512_reduce_min_epi32(<8 x i64> %__W) #0 { +// CHECK-LABEL: define frozen i32 @test_mm512_reduce_min_epi32(<8 x i64> frozen %__W) #0 { // CHECK-NEXT: entry: // CHECK-NEXT: [[__V1_ADDR_I12_I:%.*]] = alloca <2 x i64>, align 16 // CHECK-NEXT: [[__V2_ADDR_I13_I:%.*]] = alloca <2 x i64>, align 16 @@ -1422,7 +1422,7 @@ return _mm512_reduce_min_epi32(__W); } -// CHECK-LABEL: define i32 @test_mm512_reduce_min_epu32(<8 x i64> %__W) #0 { +// CHECK-LABEL: define frozen i32 @test_mm512_reduce_min_epu32(<8 x i64> frozen %__W) #0 { // CHECK-NEXT: entry: // CHECK-NEXT: [[__V1_ADDR_I12_I:%.*]] = alloca <2 x i64>, align 16 // CHECK-NEXT: [[__V2_ADDR_I13_I:%.*]] = alloca <2 x i64>, align 16 @@ -1529,7 +1529,7 @@ return _mm512_reduce_min_epu32(__W); } -// CHECK-LABEL: define float @test_mm512_reduce_min_ps(<16 x float> %__W) #0 { +// CHECK-LABEL: define frozen float @test_mm512_reduce_min_ps(<16 x float> frozen %__W) #0 { // CHECK-NEXT: entry: // CHECK-NEXT: [[__A_ADDR_I12_I:%.*]] = alloca <4 x float>, align 16 // CHECK-NEXT: [[__B_ADDR_I13_I:%.*]] = alloca <4 x float>, align 16 @@ -1617,7 +1617,7 @@ return _mm512_reduce_min_ps(__W); } -// CHECK-LABEL: define i32 @test_mm512_mask_reduce_max_epi32(i16 zeroext %__M, <8 x i64> %__W) #0 { +// CHECK-LABEL: define frozen i32 @test_mm512_mask_reduce_max_epi32(i16 frozen zeroext %__M, <8 x i64> frozen %__W) #0 { // CHECK-NEXT: entry: // CHECK-NEXT: [[__S_ADDR_I_I:%.*]] = alloca i32, align 4 // CHECK-NEXT: [[DOTCOMPOUNDLITERAL_I_I:%.*]] = alloca <16 x i32>, align 64 @@ -1784,7 +1784,7 @@ return _mm512_mask_reduce_max_epi32(__M, __W); } -// CHECK-LABEL: define i32 @test_mm512_mask_reduce_max_epu32(i16 zeroext %__M, <8 x i64> %__W) #0 { +// CHECK-LABEL: define frozen i32 @test_mm512_mask_reduce_max_epu32(i16 frozen zeroext %__M, <8 x i64> frozen %__W) #0 { // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTCOMPOUNDLITERAL_I_I_I:%.*]] = alloca <8 x i64>, align 64 // CHECK-NEXT: [[__U_ADDR_I_I:%.*]] = alloca i16, align 2 @@ -1913,7 +1913,7 @@ return _mm512_mask_reduce_max_epu32(__M, __W); } -// CHECK-LABEL: define float @test_mm512_mask_reduce_max_ps(i16 zeroext %__M, <16 x float> %__W) #0 { +// CHECK-LABEL: define frozen float @test_mm512_mask_reduce_max_ps(i16 frozen zeroext %__M, <16 x float> frozen %__W) #0 { // CHECK-NEXT: entry: // CHECK-NEXT: [[__W_ADDR_I_I:%.*]] = alloca float, align 4 // CHECK-NEXT: [[DOTCOMPOUNDLITERAL_I_I:%.*]] = alloca <16 x float>, align 64 @@ -2057,7 +2057,7 @@ return _mm512_mask_reduce_max_ps(__M, __W); } -// CHECK-LABEL: define i32 @test_mm512_mask_reduce_min_epi32(i16 zeroext %__M, <8 x i64> %__W) #0 { +// CHECK-LABEL: define frozen i32 @test_mm512_mask_reduce_min_epi32(i16 frozen zeroext %__M, <8 x i64> frozen %__W) #0 { // CHECK-NEXT: entry: // CHECK-NEXT: [[__S_ADDR_I_I:%.*]] = alloca i32, align 4 // CHECK-NEXT: [[DOTCOMPOUNDLITERAL_I_I:%.*]] = alloca <16 x i32>, align 64 @@ -2224,7 +2224,7 @@ return _mm512_mask_reduce_min_epi32(__M, __W); } -// CHECK-LABEL: define i32 @test_mm512_mask_reduce_min_epu32(i16 zeroext %__M, <8 x i64> %__W) #0 { +// CHECK-LABEL: define frozen i32 @test_mm512_mask_reduce_min_epu32(i16 frozen zeroext %__M, <8 x i64> frozen %__W) #0 { // CHECK-NEXT: entry: // CHECK-NEXT: [[__S_ADDR_I_I:%.*]] = alloca i32, align 4 // CHECK-NEXT: [[DOTCOMPOUNDLITERAL_I_I:%.*]] = alloca <16 x i32>, align 64 @@ -2391,7 +2391,7 @@ return _mm512_mask_reduce_min_epu32(__M, __W); } -// CHECK-LABEL: define float @test_mm512_mask_reduce_min_ps(i16 zeroext %__M, <16 x float> %__W) #0 { +// CHECK-LABEL: define frozen float @test_mm512_mask_reduce_min_ps(i16 frozen zeroext %__M, <16 x float> frozen %__W) #0 { // CHECK-NEXT: entry: // CHECK-NEXT: [[__W_ADDR_I_I:%.*]] = alloca float, align 4 // CHECK-NEXT: [[DOTCOMPOUNDLITERAL_I_I:%.*]] = alloca <16 x float>, align 64 diff --git a/clang/test/CodeGen/big-atomic-ops.c b/clang/test/CodeGen/big-atomic-ops.c --- a/clang/test/CodeGen/big-atomic-ops.c +++ b/clang/test/CodeGen/big-atomic-ops.c @@ -198,20 +198,20 @@ int lock_free(struct Incomplete *incomplete) { // CHECK: @lock_free - // CHECK: call zeroext i1 @__atomic_is_lock_free(i64 3, i8* null) + // CHECK: call frozen zeroext i1 @__atomic_is_lock_free(i64 frozen 3, i8* frozen null) __c11_atomic_is_lock_free(3); - // CHECK: call zeroext i1 @__atomic_is_lock_free(i64 16, i8* {{.*}}@sixteen{{.*}}) + // CHECK: call frozen zeroext i1 @__atomic_is_lock_free(i64 frozen 16, i8* {{.*}}@sixteen{{.*}}) __atomic_is_lock_free(16, &sixteen); - // CHECK: call zeroext i1 @__atomic_is_lock_free(i64 17, i8* {{.*}}@seventeen{{.*}}) + // CHECK: call frozen zeroext i1 @__atomic_is_lock_free(i64 frozen 17, i8* {{.*}}@seventeen{{.*}}) __atomic_is_lock_free(17, &seventeen); - // CHECK: call zeroext i1 @__atomic_is_lock_free(i64 4, {{.*}}) + // CHECK: call frozen zeroext i1 @__atomic_is_lock_free(i64 frozen 4, {{.*}}) __atomic_is_lock_free(4, incomplete); char cs[20]; - // CHECK: call zeroext i1 @__atomic_is_lock_free(i64 4, {{.*}}) + // CHECK: call frozen zeroext i1 @__atomic_is_lock_free(i64 frozen 4, {{.*}}) __atomic_is_lock_free(4, cs+1); // CHECK-NOT: call @@ -247,47 +247,47 @@ // CHECK: @structAtomicStore struct foo f = {0}; __c11_atomic_store(&bigAtomic, f, 5); - // CHECK: call void @__atomic_store(i64 512, i8* bitcast ({{.*}} @bigAtomic to i8*), + // CHECK: call void @__atomic_store(i64 frozen 512, i8* frozen bitcast ({{.*}} @bigAtomic to i8*) struct bar b = {0}; __atomic_store(&smallThing, &b, 5); - // CHECK: call void @__atomic_store(i64 3, i8* {{.*}} @smallThing + // CHECK: call void @__atomic_store(i64 frozen 3, i8* {{.*}} @smallThing __atomic_store(&bigThing, &f, 5); - // CHECK: call void @__atomic_store(i64 512, i8* {{.*}} @bigThing + // CHECK: call void @__atomic_store(i64 frozen 512, i8* {{.*}} @bigThing } void structAtomicLoad() { // CHECK: @structAtomicLoad struct foo f = __c11_atomic_load(&bigAtomic, 5); - // CHECK: call void @__atomic_load(i64 512, i8* bitcast ({{.*}} @bigAtomic to i8*), + // CHECK: call void @__atomic_load(i64 frozen 512, i8* frozen bitcast ({{.*}} @bigAtomic to i8*) struct bar b; __atomic_load(&smallThing, &b, 5); - // CHECK: call void @__atomic_load(i64 3, i8* {{.*}} @smallThing + // CHECK: call void @__atomic_load(i64 frozen 3, i8* {{.*}} @smallThing __atomic_load(&bigThing, &f, 5); - // CHECK: call void @__atomic_load(i64 512, i8* {{.*}} @bigThing + // CHECK: call void @__atomic_load(i64 frozen 512, i8* {{.*}} @bigThing } struct foo structAtomicExchange() { // CHECK: @structAtomicExchange struct foo f = {0}; struct foo old; __atomic_exchange(&f, &bigThing, &old, 5); - // CHECK: call void @__atomic_exchange(i64 512, {{.*}}, i8* bitcast ({{.*}} @bigThing to i8*), + // CHECK: call void @__atomic_exchange(i64 frozen 512, {{.*}}, i8* frozen bitcast ({{.*}} @bigThing to i8*) return __c11_atomic_exchange(&bigAtomic, f, 5); - // CHECK: call void @__atomic_exchange(i64 512, i8* bitcast ({{.*}} @bigAtomic to i8*), + // CHECK: call void @__atomic_exchange(i64 frozen 512, i8* frozen bitcast ({{.*}} @bigAtomic to i8*) } int structAtomicCmpExchange() { // CHECK: @structAtomicCmpExchange _Bool x = __atomic_compare_exchange(&smallThing, &thing1, &thing2, 1, 5, 5); - // CHECK: call zeroext i1 @__atomic_compare_exchange(i64 3, {{.*}} @smallThing{{.*}} @thing1{{.*}} @thing2 + // CHECK: call frozen zeroext i1 @__atomic_compare_exchange(i64 frozen 3, {{.*}} @smallThing{{.*}} @thing1{{.*}} @thing2 struct foo f = {0}; struct foo g = {0}; g.big[12] = 12; return x & __c11_atomic_compare_exchange_strong(&bigAtomic, &f, g, 5, 5); - // CHECK: call zeroext i1 @__atomic_compare_exchange(i64 512, i8* bitcast ({{.*}} @bigAtomic to i8*), + // CHECK: call frozen zeroext i1 @__atomic_compare_exchange(i64 frozen 512, i8* frozen bitcast ({{.*}} @bigAtomic to i8*) } // Check that no atomic operations are used in any initialisation of _Atomic diff --git a/clang/test/CodeGen/bitfield-2.c b/clang/test/CodeGen/bitfield-2.c --- a/clang/test/CodeGen/bitfield-2.c +++ b/clang/test/CodeGen/bitfield-2.c @@ -32,7 +32,7 @@ return (a0->f0 += 1); } -// CHECK-OPT-LABEL: define i64 @test_0() +// CHECK-OPT-LABEL: define frozen i64 @test_0() // CHECK-OPT: ret i64 1 // CHECK-OPT: } unsigned long long test_0() { @@ -78,7 +78,7 @@ return (a0->f1 += 1234); } -// CHECK-OPT-LABEL: define i64 @test_1() +// CHECK-OPT-LABEL: define frozen i64 @test_1() // CHECK-OPT: ret i64 210 // CHECK-OPT: } unsigned long long test_1() { @@ -120,7 +120,7 @@ return (a0->f0 += 1234); } -// CHECK-OPT-LABEL: define i64 @test_2() +// CHECK-OPT-LABEL: define frozen i64 @test_2() // CHECK-OPT: ret i64 2 // CHECK-OPT: } unsigned long long test_2() { @@ -156,7 +156,7 @@ return (a0->f0 += 1234); } -// CHECK-OPT-LABEL: define i64 @test_3() +// CHECK-OPT-LABEL: define frozen i64 @test_3() // CHECK-OPT: ret i64 -559039940 // CHECK-OPT: } unsigned long long test_3() { @@ -190,7 +190,7 @@ return (a0->f0 += 1234) ^ (a0->f1 += 5678); } -// CHECK-OPT-LABEL: define i64 @test_4() +// CHECK-OPT-LABEL: define frozen i64 @test_4() // CHECK-OPT: ret i64 4860 // CHECK-OPT: } unsigned long long test_4() { @@ -222,7 +222,7 @@ return (a0->f0 += 0xF) ^ (a0->f1 += 0xF) ^ (a0->f2 += 0xF); } -// CHECK-OPT-LABEL: define i64 @test_5() +// CHECK-OPT-LABEL: define frozen i64 @test_5() // CHECK-OPT: ret i64 2 // CHECK-OPT: } unsigned long long test_5() { @@ -252,7 +252,7 @@ return (a0->f0 += 0xF); } -// CHECK-OPT-LABEL: define zeroext i1 @test_6() +// CHECK-OPT-LABEL: define frozen zeroext i1 @test_6() // CHECK-OPT: ret i1 true // CHECK-OPT: } _Bool test_6() { @@ -310,7 +310,7 @@ return (a0->f0 += 0xFD) ^ (a0->f2 += 0xFD) ^ (a0->f3 += 0xFD); } -// CHECK-OPT-LABEL: define i32 @test_8() +// CHECK-OPT-LABEL: define frozen i32 @test_8() // CHECK-OPT: ret i32 -3 // CHECK-OPT: } unsigned test_8() { diff --git a/clang/test/CodeGen/bittest-intrin.c b/clang/test/CodeGen/bittest-intrin.c --- a/clang/test/CodeGen/bittest-intrin.c +++ b/clang/test/CodeGen/bittest-intrin.c @@ -33,7 +33,7 @@ } #endif -// X64-LABEL: define dso_local void @test32(i32* %base, i32 %idx) +// X64-LABEL: define dso_local void @test32(i32* frozen %base, i32 frozen %idx) // X64: call i8 asm sideeffect "btl $2, ($1)\0A\09setc ${0:b}", "=r,r,r,~{{.*}}"(i32* %{{.*}}, i32 {{.*}}) // X64: call i8 asm sideeffect "btcl $2, ($1)\0A\09setc ${0:b}", "=r,r,r,~{{.*}}"(i32* %{{.*}}, i32 {{.*}}) // X64: call i8 asm sideeffect "btrl $2, ($1)\0A\09setc ${0:b}", "=r,r,r,~{{.*}}"(i32* %{{.*}}, i32 {{.*}}) @@ -41,7 +41,7 @@ // X64: call i8 asm sideeffect "lock btrl $2, ($1)\0A\09setc ${0:b}", "=r,r,r,~{{.*}}"(i32* %{{.*}}, i32 {{.*}}) // X64: call i8 asm sideeffect "lock btsl $2, ($1)\0A\09setc ${0:b}", "=r,r,r,~{{.*}}"(i32* %{{.*}}, i32 {{.*}}) -// X64-LABEL: define dso_local void @test64(i64* %base, i64 %idx) +// X64-LABEL: define dso_local void @test64(i64* frozen %base, i64 frozen %idx) // X64: call i8 asm sideeffect "btq $2, ($1)\0A\09setc ${0:b}", "=r,r,r,~{{.*}}"(i64* %{{.*}}, i64 {{.*}}) // X64: call i8 asm sideeffect "btcq $2, ($1)\0A\09setc ${0:b}", "=r,r,r,~{{.*}}"(i64* %{{.*}}, i64 {{.*}}) // X64: call i8 asm sideeffect "btrq $2, ($1)\0A\09setc ${0:b}", "=r,r,r,~{{.*}}"(i64* %{{.*}}, i64 {{.*}}) @@ -49,7 +49,7 @@ // X64: call i8 asm sideeffect "lock btrq $2, ($1)\0A\09setc ${0:b}", "=r,r,r,~{{.*}}"(i64* %{{.*}}, i64 {{.*}}) // X64: call i8 asm sideeffect "lock btsq $2, ($1)\0A\09setc ${0:b}", "=r,r,r,~{{.*}}"(i64* %{{.*}}, i64 {{.*}}) -// ARM-LABEL: define dso_local {{.*}}void @test32(i32* %base, i32 %idx) +// ARM-LABEL: define dso_local {{.*}}void @test32(i32* frozen %base, i32 frozen %idx) // ARM: %[[IDXHI:[^ ]*]] = ashr i32 %{{.*}}, 3 // ARM: %[[BASE:[^ ]*]] = bitcast i32* %{{.*}} to i8* // ARM: %[[BYTEADDR:[^ ]*]] = getelementptr inbounds i8, i8* %[[BASE]], i32 %[[IDXHI]] @@ -126,7 +126,7 @@ // Just look for the atomicrmw instructions. -// ARM-LABEL: define dso_local {{.*}}void @test_arm(i32* %base, i32 %idx) +// ARM-LABEL: define dso_local {{.*}}void @test_arm(i32* frozen %base, i32 frozen %idx) // ARM: atomicrmw and i8* %{{.*}}, i8 {{.*}} acquire // ARM: atomicrmw and i8* %{{.*}}, i8 {{.*}} release // ARM: atomicrmw and i8* %{{.*}}, i8 {{.*}} monotonic diff --git a/clang/test/CodeGen/blocks-seq.c b/clang/test/CodeGen/blocks-seq.c --- a/clang/test/CodeGen/blocks-seq.c +++ b/clang/test/CodeGen/blocks-seq.c @@ -1,9 +1,9 @@ // RUN: %clang_cc1 -fblocks -triple x86_64-apple-darwin10 -emit-llvm -o - %s | FileCheck %s // CHECK: [[Vi:%.+]] = alloca %struct.__block_byref_i, align 8 -// CHECK: call i32 (...) @rhs() +// CHECK: call frozen i32 (...) @rhs() // CHECK: [[V7:%.+]] = getelementptr inbounds %struct.__block_byref_i, %struct.__block_byref_i* [[Vi]], i32 0, i32 1 // CHECK: load %struct.__block_byref_i*, %struct.__block_byref_i** [[V7]] -// CHECK: call i32 (...) @rhs() +// CHECK: call frozen i32 (...) @rhs() // CHECK: [[V11:%.+]] = getelementptr inbounds %struct.__block_byref_i, %struct.__block_byref_i* [[Vi]], i32 0, i32 1 // CHECK: load %struct.__block_byref_i*, %struct.__block_byref_i** [[V11]] diff --git a/clang/test/CodeGen/blocks.c b/clang/test/CodeGen/blocks.c --- a/clang/test/CodeGen/blocks.c +++ b/clang/test/CodeGen/blocks.c @@ -18,7 +18,7 @@ int a[64]; }; -// CHECK: define internal void @__f2_block_invoke(%struct.s0* noalias sret align 4 {{%.*}}, i8* {{%.*}}, %struct.s0* byval(%struct.s0) align 4 {{.*}}) +// CHECK: define internal void @__f2_block_invoke(%struct.s0* noalias sret align 4 {{%.*}}, i8* frozen {{%.*}}, %struct.s0* frozen byval(%struct.s0) align 4 {{.*}}) struct s0 f2(struct s0 a0) { return ^(struct s0 a1){ return a1; }(a0); } @@ -33,7 +33,7 @@ ^ { i = 1; }(); }; -// CHECK-LABEL: define linkonce_odr hidden void @__copy_helper_block_4_20r(i8* %0, i8* %1) unnamed_addr +// CHECK-LABEL: define linkonce_odr hidden void @__copy_helper_block_4_20r(i8* frozen %0, i8* frozen %1) unnamed_addr // CHECK: %[[_ADDR:.*]] = alloca i8*, align 4 // CHECK-NEXT: %[[_ADDR1:.*]] = alloca i8*, align 4 // CHECK-NEXT: store i8* %0, i8** %[[_ADDR]], align 4 @@ -49,7 +49,7 @@ // CHECK-NEXT: call void @_Block_object_assign(i8* %[[V6]], i8* %[[BLOCKCOPY_SRC]], i32 8) // CHECK-NEXT: ret void -// CHECK-LABEL: define linkonce_odr hidden void @__destroy_helper_block_4_20r(i8* %0) unnamed_addr +// CHECK-LABEL: define linkonce_odr hidden void @__destroy_helper_block_4_20r(i8* frozen %0) unnamed_addr // CHECK: %[[_ADDR:.*]] = alloca i8*, align 4 // CHECK-NEXT: store i8* %0, i8** %[[_ADDR]], align 4 // CHECK-NEXT: %[[V1:.*]] = load i8*, i8** %[[_ADDR]], align 4 diff --git a/clang/test/CodeGen/bool-convert.c b/clang/test/CodeGen/bool-convert.c --- a/clang/test/CodeGen/bool-convert.c +++ b/clang/test/CodeGen/bool-convert.c @@ -14,7 +14,7 @@ // CHECK-LABEL: @test4 = global [0 x i8]* null _Bool (*test4)[]; -// CHECK-LABEL: define void @f(i32 %x) +// CHECK-LABEL: define void @f(i32 frozen %x) void f(int x) { // CHECK: alloca i8, align 1 _Bool test5; diff --git a/clang/test/CodeGen/bpf-attr-preserve-access-index-4.c b/clang/test/CodeGen/bpf-attr-preserve-access-index-4.c --- a/clang/test/CodeGen/bpf-attr-preserve-access-index-4.c +++ b/clang/test/CodeGen/bpf-attr-preserve-access-index-4.c @@ -25,7 +25,7 @@ return arg->a.b[2].c; } -// CHECK: define dso_local i32 @test +// CHECK: define dso_local frozen i32 @test // CHECK-NOT: call %struct.s2* @llvm.preserve.struct.access.index.p0s_struct.s2s.p0s_struct.s3s // CHECK: call %union.anon* @llvm.preserve.struct.access.index.p0s_union.anons.p0s_struct.s2s(%struct.s2* %{{[0-9a-z]+}}, i32 0, i32 0) // CHECK: call %union.anon* @llvm.preserve.union.access.index.p0s_union.anons.p0s_union.anons(%union.anon* %{{[0-9a-z]+}}, i32 0) diff --git a/clang/test/CodeGen/builtin-align-array.c b/clang/test/CodeGen/builtin-align-array.c --- a/clang/test/CodeGen/builtin-align-array.c +++ b/clang/test/CodeGen/builtin-align-array.c @@ -4,7 +4,7 @@ extern int func(char *c); -// CHECK-LABEL: define {{[^@]+}}@test_array() #0 +// CHECK-LABEL: define frozen {{[^@]+}}@test_array() #0 // CHECK-NEXT: entry: // CHECK-NEXT: [[BUF:%.*]] = alloca [1024 x i8], align 16 // CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1024 x i8], [1024 x i8]* [[BUF]], i64 0, i64 44 @@ -16,7 +16,7 @@ // CHECK-NEXT: [[MASKEDPTR:%.*]] = and i64 [[PTRINT]], 15 // CHECK-NEXT: [[MASKCOND:%.*]] = icmp eq i64 [[MASKEDPTR]], 0 // CHECK-NEXT: call void @llvm.assume(i1 [[MASKCOND]]) -// CHECK-NEXT: [[CALL:%.*]] = call i32 @func(i8* [[ALIGNED_RESULT]]) +// CHECK-NEXT: [[CALL:%.*]] = call frozen i32 @func(i8* frozen [[ALIGNED_RESULT]]) // CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds [1024 x i8], [1024 x i8]* [[BUF]], i64 0, i64 22 // CHECK-NEXT: [[INTPTR2:%.*]] = ptrtoint i8* [[ARRAYIDX1]] to i64 // CHECK-NEXT: [[OVER_BOUNDARY:%.*]] = add i64 [[INTPTR2]], 31 @@ -27,7 +27,7 @@ // CHECK-NEXT: [[MASKEDPTR8:%.*]] = and i64 [[PTRINT7]], 31 // CHECK-NEXT: [[MASKCOND9:%.*]] = icmp eq i64 [[MASKEDPTR8]], 0 // CHECK-NEXT: call void @llvm.assume(i1 [[MASKCOND9]]) -// CHECK-NEXT: [[CALL10:%.*]] = call i32 @func(i8* [[ALIGNED_RESULT6]]) +// CHECK-NEXT: [[CALL10:%.*]] = call frozen i32 @func(i8* frozen [[ALIGNED_RESULT6]]) // CHECK-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds [1024 x i8], [1024 x i8]* [[BUF]], i64 0, i64 16 // CHECK-NEXT: [[SRC_ADDR:%.*]] = ptrtoint i8* [[ARRAYIDX11]] to i64 // CHECK-NEXT: [[SET_BITS:%.*]] = and i64 [[SRC_ADDR]], 63 @@ -42,7 +42,7 @@ return __builtin_is_aligned(&buf[16], 64); } -// CHECK-LABEL: define {{[^@]+}}@test_array_should_not_mask() #0 +// CHECK-LABEL: define frozen {{[^@]+}}@test_array_should_not_mask() #0 // CHECK-NEXT: entry: // CHECK-NEXT: [[BUF:%.*]] = alloca [1024 x i8], align 32 // CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1024 x i8], [1024 x i8]* [[BUF]], i64 0, i64 64 @@ -54,7 +54,7 @@ // CHECK-NEXT: [[MASKEDPTR:%.*]] = and i64 [[PTRINT]], 15 // CHECK-NEXT: [[MASKCOND:%.*]] = icmp eq i64 [[MASKEDPTR]], 0 // CHECK-NEXT: call void @llvm.assume(i1 [[MASKCOND]]) -// CHECK-NEXT: [[CALL:%.*]] = call i32 @func(i8* [[ALIGNED_RESULT]]) +// CHECK-NEXT: [[CALL:%.*]] = call frozen i32 @func(i8* frozen [[ALIGNED_RESULT]]) // CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds [1024 x i8], [1024 x i8]* [[BUF]], i64 0, i64 32 // CHECK-NEXT: [[INTPTR2:%.*]] = ptrtoint i8* [[ARRAYIDX1]] to i64 // CHECK-NEXT: [[OVER_BOUNDARY:%.*]] = add i64 [[INTPTR2]], 31 @@ -65,7 +65,7 @@ // CHECK-NEXT: [[MASKEDPTR8:%.*]] = and i64 [[PTRINT7]], 31 // CHECK-NEXT: [[MASKCOND9:%.*]] = icmp eq i64 [[MASKEDPTR8]], 0 // CHECK-NEXT: call void @llvm.assume(i1 [[MASKCOND9]]) -// CHECK-NEXT: [[CALL10:%.*]] = call i32 @func(i8* [[ALIGNED_RESULT6]]) +// CHECK-NEXT: [[CALL10:%.*]] = call frozen i32 @func(i8* frozen [[ALIGNED_RESULT6]]) // CHECK-NEXT: ret i32 1 // int test_array_should_not_mask(void) { diff --git a/clang/test/CodeGen/builtin-align.c b/clang/test/CodeGen/builtin-align.c --- a/clang/test/CodeGen/builtin-align.c +++ b/clang/test/CodeGen/builtin-align.c @@ -49,7 +49,7 @@ // CHECK: @up_2 = global i32 256, align 4 /// Capture the IR type here to use in the remaining FileCheck captures: -// CHECK: define {{[^@]+}}@get_type() #0 +// CHECK: define frozen {{[^@]+}}@get_type() #0 // CHECK-NEXT: entry: // POINTER-NEXT: ret [[$TYPE:.+]] null // INTEGER-NEXT: ret [[$TYPE:.+]] 0 @@ -58,8 +58,8 @@ return (TYPE)0; } -// CHECK-LABEL: define {{[^@]+}}@is_aligned -// CHECK-SAME: ([[$TYPE]] {{[^%]*}}[[PTR:%.*]], i32 [[ALIGN:%.*]]) #0 +// CHECK-LABEL: define frozen {{[^@]+}}@is_aligned +// CHECK-SAME: ([[$TYPE]] {{[^%]*}}[[PTR:%.*]], i32 frozen [[ALIGN:%.*]]) #0 // CHECK-NEXT: entry: // ALIGNMENT_EXT-NEXT: [[ALIGNMENT:%.*]] = zext i32 [[ALIGN]] to [[ALIGN_TYPE:i64]] // ALIGNMENT_TRUNC-NEXT: [[ALIGNMENT:%.*]] = trunc i32 [[ALIGN]] to [[ALIGN_TYPE:i16]] @@ -73,8 +73,8 @@ return __builtin_is_aligned(ptr, align); } -// CHECK-LABEL: define {{[^@]+}}@align_up -// CHECK-SAME: ([[$TYPE]] {{[^%]*}}[[PTR:%.*]], i32 [[ALIGN:%.*]]) #0 +// CHECK-LABEL: define frozen {{[^@]+}}@align_up +// CHECK-SAME: ([[$TYPE]] {{[^%]*}}[[PTR:%.*]], i32 frozen [[ALIGN:%.*]]) #0 // CHECK-NEXT: entry: // ALIGNMENT_EXT-NEXT: [[ALIGNMENT:%.*]] = zext i32 [[ALIGN]] to [[ALIGN_TYPE:i64]] // ALIGNMENT_TRUNC-NEXT: [[ALIGNMENT:%.*]] = trunc i32 [[ALIGN]] to [[ALIGN_TYPE:i16]] @@ -100,8 +100,8 @@ return __builtin_align_up(ptr, align); } -// CHECK-LABEL: define {{[^@]+}}@align_down -// CHECK-SAME: ([[$TYPE]] {{[^%]*}}[[PTR:%.*]], i32 [[ALIGN:%.*]]) #0 +// CHECK-LABEL: define frozen {{[^@]+}}@align_down +// CHECK-SAME: ([[$TYPE]] {{[^%]*}}[[PTR:%.*]], i32 frozen [[ALIGN:%.*]]) #0 // CHECK-NEXT: entry: // ALIGNMENT_EXT-NEXT: [[ALIGNMENT:%.*]] = zext i32 [[ALIGN]] to [[ALIGN_TYPE:i64]] // ALIGNMENT_TRUNC-NEXT: [[ALIGNMENT:%.*]] = trunc i32 [[ALIGN]] to [[ALIGN_TYPE:i16]] diff --git a/clang/test/CodeGen/builtin-assume-aligned.c b/clang/test/CodeGen/builtin-assume-aligned.c --- a/clang/test/CodeGen/builtin-assume-aligned.c +++ b/clang/test/CodeGen/builtin-assume-aligned.c @@ -46,7 +46,7 @@ // CHECK-LABEL: @test5( // CHECK-NEXT: entry: -// CHECK-NEXT: [[CALL:%.*]] = call align 64 i32* (...) @m1() +// CHECK-NEXT: [[CALL:%.*]] = call frozen align 64 i32* (...) @m1() // CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[CALL]], align 4 // CHECK-NEXT: ret i32 [[TMP0]] // diff --git a/clang/test/CodeGen/builtin-assume.c b/clang/test/CodeGen/builtin-assume.c --- a/clang/test/CodeGen/builtin-assume.c +++ b/clang/test/CodeGen/builtin-assume.c @@ -12,11 +12,11 @@ // CHECK: [[CMP:%.+]] = icmp ne i32* [[A]], null // CHECK: call void @llvm.assume(i1 [[CMP]]) -// CHECK: [[CALL:%.+]] = call i32 @isconst() +// CHECK: [[CALL:%.+]] = call frozen i32 @isconst() // CHECK: [[BOOL:%.+]] = icmp ne i32 [[CALL]], 0 // CHECK: call void @llvm.assume(i1 [[BOOL]]) -// CHECK: [[CALLPURE:%.+]] = call i32 @ispure() +// CHECK: [[CALLPURE:%.+]] = call frozen i32 @ispure() // CHECK: [[BOOLPURE:%.+]] = icmp ne i32 [[CALLPURE]], 0 // CHECK: call void @llvm.assume(i1 [[BOOLPURE]]) #ifdef _MSC_VER @@ -32,7 +32,7 @@ // Nothing is generated for an assume with side effects... // CHECK-NOT: load i32*, i32** %i.addr // CHECK-NOT: call void @llvm.assume -// CHECK-NOT: call i32 @nonconst() +// CHECK-NOT: call frozen i32 @nonconst() #ifdef _MSC_VER __assume(++i != 0) __assume(nonconst()); diff --git a/clang/test/CodeGen/builtin-attributes.c b/clang/test/CodeGen/builtin-attributes.c --- a/clang/test/CodeGen/builtin-attributes.c +++ b/clang/test/CodeGen/builtin-attributes.c @@ -1,7 +1,7 @@ // REQUIRES: arm-registered-target // RUN: %clang_cc1 -triple arm-unknown-linux-gnueabi -emit-llvm -o - %s | FileCheck %s -// CHECK: declare i32 @printf(i8*, ...) +// CHECK: declare frozen i32 @printf(i8* frozen, ...) void f0() { printf("a\n"); } @@ -12,7 +12,7 @@ exit(1); } -// CHECK: call i8* @strstr{{.*}} [[NUW:#[0-9]+]] +// CHECK: call frozen i8* @strstr{{.*}} [[NUW:#[0-9]+]] char* f2(char* a, char* b) { return __builtin_strstr(a, b); } @@ -21,27 +21,27 @@ // // // CHECK: f3 -// CHECK: call double @frexp(double % +// CHECK: call frozen double @frexp(double frozen % // CHECK-NOT: readnone -// CHECK: call float @frexpf(float % +// CHECK: call frozen float @frexpf(float frozen % // CHECK-NOT: readnone -// CHECK: call double @frexpl(double % +// CHECK: call frozen double @frexpl(double frozen % // CHECK-NOT: readnone // // Same thing for modf and friends. // -// CHECK: call double @modf(double % +// CHECK: call frozen double @modf(double frozen % // CHECK-NOT: readnone -// CHECK: call float @modff(float % +// CHECK: call frozen float @modff(float frozen % // CHECK-NOT: readnone -// CHECK: call double @modfl(double % +// CHECK: call frozen double @modfl(double frozen % // CHECK-NOT: readnone // -// CHECK: call double @remquo(double % +// CHECK: call frozen double @remquo(double frozen % // CHECK-NOT: readnone -// CHECK: call float @remquof(float % +// CHECK: call frozen float @remquof(float frozen % // CHECK-NOT: readnone -// CHECK: call double @remquol(double % +// CHECK: call frozen double @remquol(double frozen % // CHECK-NOT: readnone // CHECK: ret int f3(double x) { diff --git a/clang/test/CodeGen/builtin-bpf-btf-type-id.c b/clang/test/CodeGen/builtin-bpf-btf-type-id.c --- a/clang/test/CodeGen/builtin-bpf-btf-type-id.c +++ b/clang/test/CodeGen/builtin-bpf-btf-type-id.c @@ -4,9 +4,9 @@ unsigned test1(int a) { return __builtin_btf_type_id(a, 0); } unsigned test2(int a) { return __builtin_btf_type_id(&a, 0); } -// CHECK: define dso_local i32 @test1 +// CHECK: define dso_local frozen i32 @test1 // CHECK: call i32 @llvm.bpf.btf.type.id.p0i32.i32(i32* %{{[0-9a-z.]+}}, i32 1, i64 0), !dbg !{{[0-9]+}}, !llvm.preserve.access.index ![[INT:[0-9]+]] -// CHECK: define dso_local i32 @test2 +// CHECK: define dso_local frozen i32 @test2 // CHECK: call i32 @llvm.bpf.btf.type.id.p0i32.i32(i32* %{{[0-9a-z.]+}}, i32 0, i64 0), !dbg !{{[0-9]+}}, !llvm.preserve.access.index ![[INT_POINTER:[0-9]+]] // // CHECK: ![[INT]] = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed diff --git a/clang/test/CodeGen/builtin-constant-p.c b/clang/test/CodeGen/builtin-constant-p.c --- a/clang/test/CodeGen/builtin-constant-p.c +++ b/clang/test/CodeGen/builtin-constant-p.c @@ -48,7 +48,7 @@ } int test4() { - // CHECK: define i32 @test4 + // CHECK: define frozen i32 @test4 // CHECK: ret i32 0 return __builtin_constant_p(test4_i(test3_c)); } diff --git a/clang/test/CodeGen/builtin-expect.c b/clang/test/CodeGen/builtin-expect.c --- a/clang/test/CodeGen/builtin-expect.c +++ b/clang/test/CodeGen/builtin-expect.c @@ -5,7 +5,7 @@ // If optimizations are on, generate the correct expect and preserve other necessary operations. int expect_taken(int x) { -// ALL-LABEL: define i32 @expect_taken +// ALL-LABEL: define frozen i32 @expect_taken // O1: call i64 @llvm.expect.i64(i64 {{%.*}}, i64 1) // O0-NOT: @llvm.expect @@ -16,7 +16,7 @@ int expect_not_taken(int x) { -// ALL-LABEL: define i32 @expect_not_taken +// ALL-LABEL: define frozen i32 @expect_not_taken // O1: call i64 @llvm.expect.i64(i64 {{%.*}}, i64 0) // O0-NOT: @llvm.expect @@ -32,7 +32,7 @@ void expect_value_side_effects() { // ALL-LABEL: define void @expect_value_side_effects() -// ALL: [[CALL:%.*]] = call i32 @y +// ALL: [[CALL:%.*]] = call frozen i32 @y // O1: [[SEXT:%.*]] = sext i32 [[CALL]] to i64 // O1: call i64 @llvm.expect.i64(i64 {{%.*}}, i64 [[SEXT]]) // O0-NOT: @llvm.expect @@ -49,9 +49,9 @@ long bar(); int main() { -// ALL-LABEL: define i32 @main() +// ALL-LABEL: define frozen i32 @main() // ALL: call void @isigprocmask() -// ALL: [[CALL:%.*]] = call i64 (...) @bar() +// ALL: [[CALL:%.*]] = call frozen i64 (...) @bar() // O1: call i64 @llvm.expect.i64(i64 0, i64 [[CALL]]) // O0-NOT: @llvm.expect @@ -60,7 +60,7 @@ int switch_cond(int x) { -// ALL-LABEL: define i32 @switch_cond +// ALL-LABEL: define frozen i32 @switch_cond // O1: call i64 @llvm.expect.i64(i64 {{%.*}}, i64 5) // O0-NOT: @llvm.expect @@ -79,7 +79,7 @@ } int variable_expected(int stuff) { -// ALL-LABEL: define i32 @variable_expected( +// ALL-LABEL: define frozen i32 @variable_expected( // O1: call i64 @llvm.expect.i64(i64 {{%.*}}, i64 {{%.*}}) // O0-NOT: @llvm.expect diff --git a/clang/test/CodeGen/builtin-memfns.c b/clang/test/CodeGen/builtin-memfns.c --- a/clang/test/CodeGen/builtin-memfns.c +++ b/clang/test/CodeGen/builtin-memfns.c @@ -96,10 +96,10 @@ // CHECK-LABEL: @test10 // FIXME: Consider lowering these to llvm.memcpy / llvm.memmove. void test10() { - // CHECK: call i32* @wmemcpy(i32* @dest, i32* @src, i32 4) + // CHECK: call frozen i32* @wmemcpy(i32* frozen @dest, i32* frozen @src, i32 frozen 4) __builtin_wmemcpy(&dest, &src, 4); - // CHECK: call i32* @wmemmove(i32* @dest, i32* @src, i32 4) + // CHECK: call frozen i32* @wmemmove(i32* frozen @dest, i32* frozen @src, i32 frozen 4) __builtin_wmemmove(&dest, &src, 4); } @@ -122,6 +122,6 @@ // CHECK-LABEL: @test13 void test13(char *d, char *s, int c, size_t n) { - // CHECK: call i8* @memccpy + // CHECK: call frozen i8* @memccpy memccpy(d, s, c, n); } diff --git a/clang/test/CodeGen/builtin-ms-noop.cpp b/clang/test/CodeGen/builtin-ms-noop.cpp --- a/clang/test/CodeGen/builtin-ms-noop.cpp +++ b/clang/test/CodeGen/builtin-ms-noop.cpp @@ -5,7 +5,7 @@ }; extern "C" int f() { -// CHECK: define i32 @f() +// CHECK: define frozen i32 @f() // CHECK-NOT: call void @_ZN1AD1Ev // CHECK: ret i32 0 return __noop(A()); @@ -13,18 +13,18 @@ extern "C" int g() { return __noop; -// CHECK: define i32 @g() +// CHECK: define frozen i32 @g() // CHECK: ret i32 0 } extern "C" int h() { return (__noop); -// CHECK: define i32 @h() +// CHECK: define frozen i32 @h() // CHECK: ret i32 0 } extern "C" int i() { return __noop + 1; -// CHECK: define i32 @i() +// CHECK: define frozen i32 @i() // CHECK: ret i32 1 } diff --git a/clang/test/CodeGen/builtin-preserve-access-index-array.c b/clang/test/CodeGen/builtin-preserve-access-index-array.c --- a/clang/test/CodeGen/builtin-preserve-access-index-array.c +++ b/clang/test/CodeGen/builtin-preserve-access-index-array.c @@ -10,7 +10,7 @@ const void *unit1(struct s1 *arg) { return _(&arg->b[2]); } -// CHECK: define dso_local i8* @unit1 +// CHECK: define dso_local frozen i8* @unit1 // CHECK: call [4 x i32]* @llvm.preserve.struct.access.index.p0a4i32.p0s_struct.s1s(%struct.s1* %{{[0-9a-z]+}}, i32 1, i32 1), !dbg !{{[0-9]+}}, !llvm.preserve.access.index ![[STRUCT_S1:[0-9]+]] // CHECK: call i32* @llvm.preserve.array.access.index.p0i32.p0a4i32([4 x i32]* %{{[0-9a-z]+}}, i32 1, i32 2), !dbg !{{[0-9]+}}, !llvm.preserve.access.index ![[ARRAY:[0-9]+]] // diff --git a/clang/test/CodeGen/builtin-preserve-access-index-nonptr.c b/clang/test/CodeGen/builtin-preserve-access-index-nonptr.c --- a/clang/test/CodeGen/builtin-preserve-access-index-nonptr.c +++ b/clang/test/CodeGen/builtin-preserve-access-index-nonptr.c @@ -10,7 +10,7 @@ int unit1(struct s1 *arg) { return _(arg->b[2]); } -// CHECK: define dso_local i32 @unit1 +// CHECK: define dso_local frozen i32 @unit1 // CHECK: call [4 x i32]* @llvm.preserve.struct.access.index.p0a4i32.p0s_struct.s1s(%struct.s1* %{{[0-9a-z]+}}, i32 1, i32 1), !dbg !{{[0-9]+}}, !llvm.preserve.access.index ![[STRUCT_S1:[0-9]+]] // CHECK: call i32* @llvm.preserve.array.access.index.p0i32.p0a4i32([4 x i32]* %{{[0-9a-z]+}}, i32 1, i32 2), !dbg !{{[0-9]+}}, !llvm.preserve.access.index ![[ARRAY:[0-9]+]] // diff --git a/clang/test/CodeGen/builtin-preserve-access-index-typedef.c b/clang/test/CodeGen/builtin-preserve-access-index-typedef.c --- a/clang/test/CodeGen/builtin-preserve-access-index-typedef.c +++ b/clang/test/CodeGen/builtin-preserve-access-index-typedef.c @@ -14,9 +14,9 @@ int test2(const __u *arg) { return arg->b; } -// CHECK: define dso_local i32 @test1 +// CHECK: define dso_local frozen i32 @test1 // CHECK: call i32* @llvm.preserve.struct.access.index.p0i32.p0s_struct.__ts(%struct.__t* %{{[0-9a-z]+}}, i32 0, i32 0), !dbg !{{[0-9]+}}, !llvm.preserve.access.index ![[TYPEDEF_STRUCT:[0-9]+]] -// CHECK: define dso_local i32 @test2 +// CHECK: define dso_local frozen i32 @test2 // CHECK: call %union.__u* @llvm.preserve.union.access.index.p0s_union.__us.p0s_union.__us(%union.__u* %{{[0-9a-z]+}}, i32 0), !dbg !{{[0-9]+}}, !llvm.preserve.access.index ![[CONST_TYPEDEF:[0-9]+]] // // CHECK: ![[TYPEDEF_STRUCT]] = !DIDerivedType(tag: DW_TAG_typedef, name: "__t" diff --git a/clang/test/CodeGen/builtin-preserve-access-index.c b/clang/test/CodeGen/builtin-preserve-access-index.c --- a/clang/test/CodeGen/builtin-preserve-access-index.c +++ b/clang/test/CodeGen/builtin-preserve-access-index.c @@ -5,7 +5,7 @@ const void *unit1(const void *arg) { return _(arg); } -// CHECK: define dso_local i8* @unit1 +// CHECK: define dso_local frozen i8* @unit1 // CHECK-NOT: llvm.preserve.array.access.index // CHECK-NOT: llvm.preserve.struct.access.index // CHECK-NOT: llvm.preserve.union.access.index @@ -13,7 +13,7 @@ const void *unit2(void) { return _((const void *)0xffffffffFFFF0000ULL); } -// CHECK: define dso_local i8* @unit2 +// CHECK: define dso_local frozen i8* @unit2 // CHECK-NOT: llvm.preserve.array.access.index // CHECK-NOT: llvm.preserve.struct.access.index // CHECK-NOT: llvm.preserve.union.access.index @@ -21,7 +21,7 @@ const void *unit3(const int *arg) { return _(arg + 1); } -// CHECK: define dso_local i8* @unit3 +// CHECK: define dso_local frozen i8* @unit3 // CHECK-NOT: llvm.preserve.array.access.index // CHECK-NOT: llvm.preserve.struct.access.index // CHECK-NOT: llvm.preserve.union.access.index @@ -29,14 +29,14 @@ const void *unit4(const int *arg) { return _(&arg[1]); } -// CHECK: define dso_local i8* @unit4 +// CHECK: define dso_local frozen i8* @unit4 // CHECK-NOT: getelementptr // CHECK: call i32* @llvm.preserve.array.access.index.p0i32.p0i32(i32* %{{[0-9a-z]+}}, i32 0, i32 1), !dbg !{{[0-9]+}}, !llvm.preserve.access.index ![[POINTER:[0-9]+]] const void *unit5(const int *arg[5]) { return _(&arg[1][2]); } -// CHECK: define dso_local i8* @unit5 +// CHECK: define dso_local frozen i8* @unit5 // CHECK-NOT: getelementptr // CHECK: call i32** @llvm.preserve.array.access.index.p0p0i32.p0p0i32(i32** %{{[0-9a-z]+}}, i32 0, i32 1), !dbg !{{[0-9]+}}, !llvm.preserve.access.index !{{[0-9]+}} // CHECK-NOT: getelementptr @@ -63,28 +63,28 @@ const void *unit6(struct s1 *arg) { return _(&arg->a); } -// CHECK: define dso_local i8* @unit6 +// CHECK: define dso_local frozen i8* @unit6 // CHECK-NOT: getelementptr // CHECK: call i8* @llvm.preserve.struct.access.index.p0i8.p0s_struct.s1s(%struct.s1* %{{[0-9a-z]+}}, i32 0, i32 0), !dbg !{{[0-9]+}}, !llvm.preserve.access.index ![[STRUCT_S1:[0-9]+]] const void *unit7(struct s1 *arg) { return _(&arg->b); } -// CHECK: define dso_local i8* @unit7 +// CHECK: define dso_local frozen i8* @unit7 // CHECK-NOT: getelementptr // CHECK: call i32* @llvm.preserve.struct.access.index.p0i32.p0s_struct.s1s(%struct.s1* %{{[0-9a-z]+}}, i32 1, i32 1), !dbg !{{[0-9]+}}, !llvm.preserve.access.index ![[STRUCT_S1]] const void *unit8(struct s2 *arg) { return _(&arg->b); } -// CHECK: define dso_local i8* @unit8 +// CHECK: define dso_local frozen i8* @unit8 // CHECK-NOT: getelementptr // CHECK: call i32* @llvm.preserve.struct.access.index.p0i32.p0s_struct.s2s(%struct.s2* %{{[0-9a-z]+}}, i32 1, i32 2), !dbg !{{[0-9]+}}, !llvm.preserve.access.index ![[STRUCT_S2:[0-9]+]] const void *unit9(struct s3 *arg) { return _(&arg->b); } -// CHECK: define dso_local i8* @unit9 +// CHECK: define dso_local frozen i8* @unit9 // CHECK-NOT: getelementptr // CHECK: call i32* @llvm.preserve.struct.access.index.p0i32.p0s_struct.s3s(%struct.s3* %{{[0-9a-z]+}}, i32 1, i32 2), !dbg !{{[0-9]+}}, !llvm.preserve.access.index ![[STRUCT_S3:[0-9]+]] @@ -102,21 +102,21 @@ const void *unit10(union u1 *arg) { return _(&arg->a); } -// CHECK: define dso_local i8* @unit10 +// CHECK: define dso_local frozen i8* @unit10 // CHECK-NOT: getelementptr // CHECK: call %union.u1* @llvm.preserve.union.access.index.p0s_union.u1s.p0s_union.u1s(%union.u1* %{{[0-9a-z]+}}, i32 0), !dbg !{{[0-9]+}}, !llvm.preserve.access.index ![[UNION_U1:[0-9]+]] const void *unit11(union u1 *arg) { return _(&arg->b); } -// CHECK: define dso_local i8* @unit11 +// CHECK: define dso_local frozen i8* @unit11 // CHECK-NOT: getelementptr // CHECK: call %union.u1* @llvm.preserve.union.access.index.p0s_union.u1s.p0s_union.u1s(%union.u1* %{{[0-9a-z]+}}, i32 1), !dbg !{{[0-9]+}}, !llvm.preserve.access.index ![[UNION_U1]] const void *unit12(union u2 *arg) { return _(&arg->b); } -// CHECK: define dso_local i8* @unit12 +// CHECK: define dso_local frozen i8* @unit12 // CHECK-NOT: getelementptr // CHECK: call %union.u2* @llvm.preserve.union.access.index.p0s_union.u2s.p0s_union.u2s(%union.u2* %{{[0-9a-z]+}}, i32 1), !dbg !{{[0-9]+}}, !llvm.preserve.access.index ![[UNION_U2:[0-9]+]] @@ -138,7 +138,7 @@ const void *unit13(struct s4 *arg) { return _(&arg->c.b[2]); } -// CHECK: define dso_local i8* @unit13 +// CHECK: define dso_local frozen i8* @unit13 // CHECK: call %union.u* @llvm.preserve.struct.access.index.p0s_union.us.p0s_struct.s4s(%struct.s4* %{{[0-9a-z]+}}, i32 1, i32 1), !dbg !{{[0-9]+}}, !llvm.preserve.access.index ![[STRUCT_S4:[0-9]+]] // CHECK: call %union.u* @llvm.preserve.union.access.index.p0s_union.us.p0s_union.us(%union.u* %{{[0-9a-z]+}}, i32 0), !dbg !{{[0-9]+}}, !llvm.preserve.access.index ![[UNION_I_U:[0-9]+]] // CHECK: call i32* @llvm.preserve.array.access.index.p0i32.p0a4i32([4 x i32]* %{{[0-9a-z]+}}, i32 1, i32 2), !dbg !{{[0-9]+}}, !llvm.preserve.access.index !{{[0-9]+}} @@ -146,7 +146,7 @@ const void *unit14(union u3 *arg) { return _(&arg->c.b[2]); } -// CHECK: define dso_local i8* @unit14 +// CHECK: define dso_local frozen i8* @unit14 // CHECK: call %union.u3* @llvm.preserve.union.access.index.p0s_union.u3s.p0s_union.u3s(%union.u3* %{{[0-9a-z]+}}, i32 0), !dbg !{{[0-9]+}}, !llvm.preserve.access.index ![[UNION_U3:[0-9]+]] // CHECK: call [4 x i32]* @llvm.preserve.struct.access.index.p0a4i32.p0s_struct.ss(%struct.s* %{{[0-9a-z]+}}, i32 0, i32 0), !dbg !{{[0-9]+}}, !llvm.preserve.access.index ![[STRUCT_I_S:[0-9]+]] // CHECK: call i32* @llvm.preserve.array.access.index.p0i32.p0a4i32([4 x i32]* %{{[0-9a-z]+}}, i32 1, i32 2), !dbg !{{[0-9]+}}, !llvm.preserve.access.index !{{[0-9]+}} @@ -154,7 +154,7 @@ const void *unit15(struct s4 *arg) { return _(&arg[2].c.a); } -// CHECK: define dso_local i8* @unit15 +// CHECK: define dso_local frozen i8* @unit15 // CHECK: call %struct.s4* @llvm.preserve.array.access.index.p0s_struct.s4s.p0s_struct.s4s(%struct.s4* %{{[0-9a-z]+}}, i32 0, i32 2), !dbg !{{[0-9]+}}, !llvm.preserve.access.index !{{[0-9]+}} // CHECK: call %union.u* @llvm.preserve.struct.access.index.p0s_union.us.p0s_struct.s4s(%struct.s4* %{{[0-9a-z]+}}, i32 1, i32 1), !dbg !{{[0-9]+}}, !llvm.preserve.access.index ![[STRUCT_S4]] // CHECK: call %union.u* @llvm.preserve.union.access.index.p0s_union.us.p0s_union.us(%union.u* %{{[0-9a-z]+}}, i32 1), !dbg !{{[0-9]+}}, !llvm.preserve.access.index ![[UNION_I_U]] @@ -162,7 +162,7 @@ const void *unit16(union u3 *arg) { return _(&arg[2].a); } -// CHECK: define dso_local i8* @unit16 +// CHECK: define dso_local frozen i8* @unit16 // CHECK: call %union.u3* @llvm.preserve.array.access.index.p0s_union.u3s.p0s_union.u3s(%union.u3* %{{[0-9a-z]+}}, i32 0, i32 2), !dbg !{{[0-9]+}}, !llvm.preserve.access.index !{{[0-9]+}} // CHECK: call %union.u3* @llvm.preserve.union.access.index.p0s_union.u3s.p0s_union.u3s(%union.u3* %{{[0-9a-z]+}}, i32 1), !dbg !{{[0-9]+}}, !llvm.preserve.access.index ![[UNION_U3]] diff --git a/clang/test/CodeGen/builtin-sponentry.c b/clang/test/CodeGen/builtin-sponentry.c --- a/clang/test/CodeGen/builtin-sponentry.c +++ b/clang/test/CodeGen/builtin-sponentry.c @@ -3,6 +3,6 @@ void *test_sponentry() { return __builtin_sponentry(); } -// CHECK-LABEL: define dso_local i8* @test_sponentry() +// CHECK-LABEL: define dso_local frozen i8* @test_sponentry() // CHECK: = tail call i8* @llvm.sponentry.p0i8() // CHECK: ret i8* diff --git a/clang/test/CodeGen/builtin-sqrt.c b/clang/test/CodeGen/builtin-sqrt.c --- a/clang/test/CodeGen/builtin-sqrt.c +++ b/clang/test/CodeGen/builtin-sqrt.c @@ -2,12 +2,12 @@ // RUN: %clang_cc1 -triple x86_64-apple-darwin %s -emit-llvm -o - | FileCheck %s --check-prefix=NO_ERRNO float foo(float X) { - // HAS_ERRNO: call float @sqrtf(float + // HAS_ERRNO: call frozen float @sqrtf(float // NO_ERRNO: call float @llvm.sqrt.f32(float return __builtin_sqrtf(X); } -// HAS_ERRNO: declare float @sqrtf(float) [[ATTR:#[0-9]+]] +// HAS_ERRNO: declare frozen float @sqrtf(float frozen) [[ATTR:#[0-9]+]] // HAS_ERRNO-NOT: attributes [[ATTR]] = {{{.*}} readnone // NO_ERRNO: declare float @llvm.sqrt.f32(float) [[ATTR:#[0-9]+]] diff --git a/clang/test/CodeGen/builtins-arm.c b/clang/test/CodeGen/builtins-arm.c --- a/clang/test/CodeGen/builtins-arm.c +++ b/clang/test/CodeGen/builtins-arm.c @@ -102,56 +102,56 @@ } void ldc(const void *i) { - // CHECK: define void @ldc(i8* %i) + // CHECK: define void @ldc(i8* frozen %i) // CHECK: call void @llvm.arm.ldc(i32 1, i32 2, i8* %i) // CHECK-NEXT: ret void __builtin_arm_ldc(1, 2, i); } void ldcl(const void *i) { - // CHECK: define void @ldcl(i8* %i) + // CHECK: define void @ldcl(i8* frozen %i) // CHECK: call void @llvm.arm.ldcl(i32 1, i32 2, i8* %i) // CHECK-NEXT: ret void __builtin_arm_ldcl(1, 2, i); } void ldc2(const void *i) { - // CHECK: define void @ldc2(i8* %i) + // CHECK: define void @ldc2(i8* frozen %i) // CHECK: call void @llvm.arm.ldc2(i32 1, i32 2, i8* %i) // CHECK-NEXT: ret void __builtin_arm_ldc2(1, 2, i); } void ldc2l(const void *i) { - // CHECK: define void @ldc2l(i8* %i) + // CHECK: define void @ldc2l(i8* frozen %i) // CHECK: call void @llvm.arm.ldc2l(i32 1, i32 2, i8* %i) // CHECK-NEXT: ret void __builtin_arm_ldc2l(1, 2, i); } void stc(void *i) { - // CHECK: define void @stc(i8* %i) + // CHECK: define void @stc(i8* frozen %i) // CHECK: call void @llvm.arm.stc(i32 1, i32 2, i8* %i) // CHECK-NEXT: ret void __builtin_arm_stc(1, 2, i); } void stcl(void *i) { - // CHECK: define void @stcl(i8* %i) + // CHECK: define void @stcl(i8* frozen %i) // CHECK: call void @llvm.arm.stcl(i32 1, i32 2, i8* %i) // CHECK-NEXT: ret void __builtin_arm_stcl(1, 2, i); } void stc2(void *i) { - // CHECK: define void @stc2(i8* %i) + // CHECK: define void @stc2(i8* frozen %i) // CHECK: call void @llvm.arm.stc2(i32 1, i32 2, i8* %i) // CHECK-NEXT: ret void __builtin_arm_stc2(1, 2, i); } void stc2l(void *i) { - // CHECK: define void @stc2l(i8* %i) + // CHECK: define void @stc2l(i8* frozen %i) // CHECK: call void @llvm.arm.stc2l(i32 1, i32 2, i8* %i) // CHECK-NEXT: ret void __builtin_arm_stc2l(1, 2, i); @@ -172,51 +172,51 @@ } unsigned mrc() { - // CHECK: define i32 @mrc() + // CHECK: define frozen i32 @mrc() // CHECK: [[R:%.*]] = call i32 @llvm.arm.mrc(i32 15, i32 0, i32 13, i32 0, i32 3) // CHECK-NEXT: ret i32 [[R]] return __builtin_arm_mrc(15, 0, 13, 0, 3); } unsigned mrc2() { - // CHECK: define i32 @mrc2() + // CHECK: define frozen i32 @mrc2() // CHECK: [[R:%.*]] = call i32 @llvm.arm.mrc2(i32 15, i32 0, i32 13, i32 0, i32 3) // CHECK-NEXT: ret i32 [[R]] return __builtin_arm_mrc2(15, 0, 13, 0, 3); } void mcr(unsigned a) { - // CHECK: define void @mcr(i32 [[A:%.*]]) + // CHECK: define void @mcr(i32 frozen [[A:%.*]]) // CHECK: call void @llvm.arm.mcr(i32 15, i32 0, i32 [[A]], i32 13, i32 0, i32 3) __builtin_arm_mcr(15, 0, a, 13, 0, 3); } void mcr2(unsigned a) { - // CHECK: define void @mcr2(i32 [[A:%.*]]) + // CHECK: define void @mcr2(i32 frozen [[A:%.*]]) // CHECK: call void @llvm.arm.mcr2(i32 15, i32 0, i32 [[A]], i32 13, i32 0, i32 3) __builtin_arm_mcr2(15, 0, a, 13, 0, 3); } void mcrr(uint64_t a) { - // CHECK: define void @mcrr(i64 %{{.*}}) + // CHECK: define void @mcrr(i64 frozen %{{.*}}) // CHECK: call void @llvm.arm.mcrr(i32 15, i32 0, i32 %{{[0-9]+}}, i32 %{{[0-9]+}}, i32 0) __builtin_arm_mcrr(15, 0, a, 0); } void mcrr2(uint64_t a) { - // CHECK: define void @mcrr2(i64 %{{.*}}) + // CHECK: define void @mcrr2(i64 frozen %{{.*}}) // CHECK: call void @llvm.arm.mcrr2(i32 15, i32 0, i32 %{{[0-9]+}}, i32 %{{[0-9]+}}, i32 0) __builtin_arm_mcrr2(15, 0, a, 0); } uint64_t mrrc() { - // CHECK: define i64 @mrrc() + // CHECK: define frozen i64 @mrrc() // CHECK: call { i32, i32 } @llvm.arm.mrrc(i32 15, i32 0, i32 0) return __builtin_arm_mrrc(15, 0, 0); } uint64_t mrrc2() { - // CHECK: define i64 @mrrc2() + // CHECK: define frozen i64 @mrrc2() // CHECK: call { i32, i32 } @llvm.arm.mrrc2(i32 15, i32 0, i32 0) return __builtin_arm_mrrc2(15, 0, 0); } diff --git a/clang/test/CodeGen/builtins-bpf-preserve-field-info-1.c b/clang/test/CodeGen/builtins-bpf-preserve-field-info-1.c --- a/clang/test/CodeGen/builtins-bpf-preserve-field-info-1.c +++ b/clang/test/CodeGen/builtins-bpf-preserve-field-info-1.c @@ -16,7 +16,7 @@ unsigned unit1(struct s1 *arg) { return _(arg->a, 10) + _(arg->b, 10); } -// CHECK: define dso_local i32 @unit1 +// CHECK: define dso_local frozen i32 @unit1 // CHECK: call i8* @llvm.preserve.struct.access.index.p0i8.p0s_struct.s1s(%struct.s1* %{{[0-9a-z]+}}, i32 0, i32 0), !dbg !{{[0-9]+}}, !llvm.preserve.access.index ![[STRUCT_S1:[0-9]+]] // CHECK: call i32 @llvm.bpf.preserve.field.info.p0i8(i8* %{{[0-9a-z]+}}, i64 10), !dbg !{{[0-9]+}} // CHECK: call i8* @llvm.preserve.struct.access.index.p0i8.p0s_struct.s1s(%struct.s1* %{{[0-9a-z]+}}, i32 1, i32 1), !dbg !{{[0-9]+}}, !llvm.preserve.access.index ![[STRUCT_S1:[0-9]+]] @@ -25,7 +25,7 @@ unsigned unit2(union u1 *arg) { return _(arg->a, 10) + _(arg->b, 10); } -// CHECK: define dso_local i32 @unit2 +// CHECK: define dso_local frozen i32 @unit2 // CHECK: call %union.u1* @llvm.preserve.union.access.index.p0s_union.u1s.p0s_union.u1s(%union.u1* %{{[0-9a-z]+}}, i32 0), !dbg !{{[0-9]+}}, !llvm.preserve.access.index ![[UNION_U1:[0-9]+]] // CHECK: call i32 @llvm.bpf.preserve.field.info.p0i8(i8* %{{[0-9a-z]+}}, i64 10), !dbg !{{[0-9]+}} // CHECK: call i8* @llvm.preserve.struct.access.index.p0i8.p0s_union.u1s(%union.u1* %{{[0-9a-z]+}}, i32 0, i32 1), !dbg !{{[0-9]+}}, !llvm.preserve.access.index ![[UNION_U1:[0-9]+]] diff --git a/clang/test/CodeGen/builtins-bpf-preserve-field-info-2.c b/clang/test/CodeGen/builtins-bpf-preserve-field-info-2.c --- a/clang/test/CodeGen/builtins-bpf-preserve-field-info-2.c +++ b/clang/test/CodeGen/builtins-bpf-preserve-field-info-2.c @@ -14,7 +14,7 @@ unsigned unit1(struct s2 *arg) { return _(arg->s.a, 10) + _(arg->s.b, 10); } -// CHECK: define dso_local i32 @unit1 +// CHECK: define dso_local frozen i32 @unit1 // CHECK: call %struct.s1* @llvm.preserve.struct.access.index.p0s_struct.s1s.p0s_struct.s2s(%struct.s2* %{{[0-9a-z]+}}, i32 0, i32 0), !dbg !{{[0-9]+}}, !llvm.preserve.access.index ![[STRUCT_S2:[0-9]+]] // CHECK: call i8* @llvm.preserve.struct.access.index.p0i8.p0s_struct.s1s(%struct.s1* %{{[0-9a-z]+}}, i32 0, i32 0), !dbg !{{[0-9]+}}, !llvm.preserve.access.index ![[STRUCT_S1:[0-9]+]] // CHECK: call i32 @llvm.bpf.preserve.field.info.p0i8(i8* %{{[0-9a-z]+}}, i64 10), !dbg !{{[0-9]+}} diff --git a/clang/test/CodeGen/builtins-memcpy-inline.c b/clang/test/CodeGen/builtins-memcpy-inline.c --- a/clang/test/CodeGen/builtins-memcpy-inline.c +++ b/clang/test/CodeGen/builtins-memcpy-inline.c @@ -1,25 +1,25 @@ // REQUIRES: x86-registered-target // RUN: %clang_cc1 -triple x86_64-unknown-linux -emit-llvm %s -o - | FileCheck %s -// CHECK-LABEL: define void @test_memcpy_inline_0(i8* %dst, i8* %src) +// CHECK-LABEL: define void @test_memcpy_inline_0(i8* frozen %dst, i8* frozen %src) void test_memcpy_inline_0(void *dst, const void *src) { // CHECK: call void @llvm.memcpy.inline.p0i8.p0i8.i64(i8* align 1 %0, i8* align 1 %1, i64 0, i1 false) __builtin_memcpy_inline(dst, src, 0); } -// CHECK-LABEL: define void @test_memcpy_inline_1(i8* %dst, i8* %src) +// CHECK-LABEL: define void @test_memcpy_inline_1(i8* frozen %dst, i8* frozen %src) void test_memcpy_inline_1(void *dst, const void *src) { // CHECK: call void @llvm.memcpy.inline.p0i8.p0i8.i64(i8* align 1 %0, i8* align 1 %1, i64 1, i1 false) __builtin_memcpy_inline(dst, src, 1); } -// CHECK-LABEL: define void @test_memcpy_inline_4(i8* %dst, i8* %src) +// CHECK-LABEL: define void @test_memcpy_inline_4(i8* frozen %dst, i8* frozen %src) void test_memcpy_inline_4(void *dst, const void *src) { // CHECK: call void @llvm.memcpy.inline.p0i8.p0i8.i64(i8* align 1 %0, i8* align 1 %1, i64 4, i1 false) __builtin_memcpy_inline(dst, src, 4); } -// CHECK-LABEL: define void @test_memcpy_inline_aligned_buffers(i64* %dst, i64* %src) +// CHECK-LABEL: define void @test_memcpy_inline_aligned_buffers(i64* frozen %dst, i64* frozen %src) void test_memcpy_inline_aligned_buffers(unsigned long long *dst, const unsigned long long *src) { // CHECK: call void @llvm.memcpy.inline.p0i8.p0i8.i64(i8* align 8 %2, i8* align 8 %3, i64 4, i1 false) __builtin_memcpy_inline(dst, src, 4); diff --git a/clang/test/CodeGen/builtins-ms.c b/clang/test/CodeGen/builtins-ms.c --- a/clang/test/CodeGen/builtins-ms.c +++ b/clang/test/CodeGen/builtins-ms.c @@ -5,12 +5,12 @@ void test_alloca(int n) { capture(_alloca(n)); // CHECK: %[[arg:.*]] = alloca i8, i32 %{{.*}}, align 16 - // CHECK: call void @capture(i8* %[[arg]]) + // CHECK: call void @capture(i8* frozen %[[arg]]) } // CHECK-LABEL: define dso_local void @test_alloca_with_align( void test_alloca_with_align(int n) { capture(__builtin_alloca_with_align(n, 64)); // CHECK: %[[arg:.*]] = alloca i8, i32 %{{.*}}, align 8 - // CHECK: call void @capture(i8* %[[arg]]) + // CHECK: call void @capture(i8* frozen %[[arg]]) } diff --git a/clang/test/CodeGen/builtins-multiprecision.c b/clang/test/CodeGen/builtins-multiprecision.c --- a/clang/test/CodeGen/builtins-multiprecision.c +++ b/clang/test/CodeGen/builtins-multiprecision.c @@ -60,7 +60,7 @@ unsigned long test_addcl(unsigned long x, unsigned long y, unsigned long carryin, unsigned long *z) { // long is i32 on i686, i64 on x86_64. - // CHECK: @test_addcl([[UL:i32|i64]] %x + // CHECK: @test_addcl([[UL:i32|i64]] frozen %x // CHECK: %{{.+}} = {{.*}} call { [[UL]], i1 } @llvm.uadd.with.overflow.[[UL]]([[UL]] %x, [[UL]] %y) // CHECK: %{{.+}} = extractvalue { [[UL]], i1 } %{{.+}}, 1 // CHECK: %{{.+}} = extractvalue { [[UL]], i1 } %{{.+}}, 0 @@ -152,7 +152,7 @@ unsigned long test_subcl(unsigned long x, unsigned long y, unsigned long carryin, unsigned long *z) { - // CHECK: @test_subcl([[UL:i32|i64]] %x + // CHECK: @test_subcl([[UL:i32|i64]] frozen %x // CHECK: %{{.+}} = {{.*}} call { [[UL]], i1 } @llvm.usub.with.overflow.[[UL]]([[UL]] %x, [[UL]] %y) // CHECK: %{{.+}} = extractvalue { [[UL]], i1 } %{{.+}}, 1 // CHECK: %{{.+}} = extractvalue { [[UL]], i1 } %{{.+}}, 0 diff --git a/clang/test/CodeGen/builtins-overflow.c b/clang/test/CodeGen/builtins-overflow.c --- a/clang/test/CodeGen/builtins-overflow.c +++ b/clang/test/CodeGen/builtins-overflow.c @@ -14,7 +14,7 @@ void overflowed(void); unsigned test_add_overflow_uint_uint_uint(unsigned x, unsigned y) { - // CHECK-LABEL: define {{(dso_local )?}}i32 @test_add_overflow_uint_uint_uint + // CHECK-LABEL: define {{(dso_local )?}}frozen i32 @test_add_overflow_uint_uint_uint // CHECK-NOT: ext // CHECK: [[S:%.+]] = call { i32, i1 } @llvm.uadd.with.overflow.i32(i32 %{{.+}}, i32 %{{.+}}) // CHECK-DAG: [[Q:%.+]] = extractvalue { i32, i1 } [[S]], 0 @@ -28,7 +28,7 @@ } int test_add_overflow_int_int_int(int x, int y) { - // CHECK-LABEL: define {{(dso_local )?}}i32 @test_add_overflow_int_int_int + // CHECK-LABEL: define {{(dso_local )?}}frozen i32 @test_add_overflow_int_int_int // CHECK-NOT: ext // CHECK: [[S:%.+]] = call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 %{{.+}}, i32 %{{.+}}) // CHECK-DAG: [[C:%.+]] = extractvalue { i32, i1 } [[S]], 1 @@ -42,7 +42,7 @@ } unsigned test_sub_overflow_uint_uint_uint(unsigned x, unsigned y) { - // CHECK-LABEL: define {{(dso_local )?}}i32 @test_sub_overflow_uint_uint_uint + // CHECK-LABEL: define {{(dso_local )?}}frozen i32 @test_sub_overflow_uint_uint_uint // CHECK-NOT: ext // CHECK: [[S:%.+]] = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %{{.+}}, i32 %{{.+}}) // CHECK-DAG: [[Q:%.+]] = extractvalue { i32, i1 } [[S]], 0 @@ -56,7 +56,7 @@ } int test_sub_overflow_int_int_int(int x, int y) { - // CHECK-LABEL: define {{(dso_local )?}}i32 @test_sub_overflow_int_int_int + // CHECK-LABEL: define {{(dso_local )?}}frozen i32 @test_sub_overflow_int_int_int // CHECK-NOT: ext // CHECK: [[S:%.+]] = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %{{.+}}, i32 %{{.+}}) // CHECK-DAG: [[C:%.+]] = extractvalue { i32, i1 } [[S]], 1 @@ -70,7 +70,7 @@ } unsigned test_mul_overflow_uint_uint_uint(unsigned x, unsigned y) { - // CHECK-LABEL: define {{(dso_local )?}}i32 @test_mul_overflow_uint_uint_uint + // CHECK-LABEL: define {{(dso_local )?}}frozen i32 @test_mul_overflow_uint_uint_uint // CHECK-NOT: ext // CHECK: [[S:%.+]] = call { i32, i1 } @llvm.umul.with.overflow.i32(i32 %{{.+}}, i32 %{{.+}}) // CHECK-DAG: [[Q:%.+]] = extractvalue { i32, i1 } [[S]], 0 @@ -84,7 +84,7 @@ } int test_mul_overflow_int_int_int(int x, int y) { - // CHECK-LABEL: define {{(dso_local )?}}i32 @test_mul_overflow_int_int_int + // CHECK-LABEL: define {{(dso_local )?}}frozen i32 @test_mul_overflow_int_int_int // CHECK-NOT: ext // CHECK: [[S:%.+]] = call { i32, i1 } @llvm.smul.with.overflow.i32(i32 %{{.+}}, i32 %{{.+}}) // CHECK-DAG: [[C:%.+]] = extractvalue { i32, i1 } [[S]], 1 @@ -98,7 +98,7 @@ } int test_add_overflow_uint_int_int(unsigned x, int y) { - // CHECK-LABEL: define {{(dso_local )?}}i32 @test_add_overflow_uint_int_int + // CHECK-LABEL: define {{(dso_local )?}}frozen i32 @test_add_overflow_uint_int_int // CHECK: [[XE:%.+]] = zext i32 %{{.+}} to i33 // CHECK: [[YE:%.+]] = sext i32 %{{.+}} to i33 // CHECK: [[S:%.+]] = call { i33, i1 } @llvm.sadd.with.overflow.i33(i33 [[XE]], i33 [[YE]]) @@ -136,7 +136,7 @@ } unsigned test_add_overflow_bool_bool_uint(_Bool x, _Bool y) { - // CHECK-LABEL: define {{(dso_local )?}}i32 @test_add_overflow_bool_bool_uint + // CHECK-LABEL: define {{(dso_local )?}}frozen i32 @test_add_overflow_bool_bool_uint // CHECK: [[XE:%.+]] = zext i1 %{{.+}} to i32 // CHECK: [[YE:%.+]] = zext i1 %{{.+}} to i32 // CHECK: [[S:%.+]] = call { i32, i1 } @llvm.uadd.with.overflow.i32(i32 [[XE]], i32 [[YE]]) @@ -165,7 +165,7 @@ } int test_add_overflow_volatile(int x, int y) { - // CHECK-LABEL: define {{(dso_local )?}}i32 @test_add_overflow_volatile + // CHECK-LABEL: define {{(dso_local )?}}frozen i32 @test_add_overflow_volatile // CHECK: [[S:%.+]] = call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 %{{.+}}, i32 %{{.+}}) // CHECK-DAG: [[Q:%.+]] = extractvalue { i32, i1 } [[S]], 0 // CHECK-DAG: [[C:%.+]] = extractvalue { i32, i1 } [[S]], 1 @@ -187,7 +187,7 @@ } unsigned long test_uaddl_overflow(unsigned long x, unsigned long y) { -// CHECK: @test_uaddl_overflow([[UL:i32|i64]] %x +// CHECK: @test_uaddl_overflow([[UL:i32|i64]] frozen %x // CHECK: %{{.+}} = call { [[UL]], i1 } @llvm.uadd.with.overflow.[[UL]]([[UL]] %{{.+}}, [[UL]] %{{.+}}) unsigned long result; if (__builtin_uaddl_overflow(x, y, &result)) @@ -214,7 +214,7 @@ } unsigned long test_usubl_overflow(unsigned long x, unsigned long y) { -// CHECK: @test_usubl_overflow([[UL:i32|i64]] %x +// CHECK: @test_usubl_overflow([[UL:i32|i64]] frozen %x // CHECK: %{{.+}} = call { [[UL]], i1 } @llvm.usub.with.overflow.[[UL]]([[UL]] %{{.+}}, [[UL]] %{{.+}}) unsigned long result; if (__builtin_usubl_overflow(x, y, &result)) @@ -241,7 +241,7 @@ } unsigned long test_umull_overflow(unsigned long x, unsigned long y) { -// CHECK: @test_umull_overflow([[UL:i32|i64]] %x +// CHECK: @test_umull_overflow([[UL:i32|i64]] frozen %x // CHECK: %{{.+}} = call { [[UL]], i1 } @llvm.umul.with.overflow.[[UL]]([[UL]] %{{.+}}, [[UL]] %{{.+}}) unsigned long result; if (__builtin_umull_overflow(x, y, &result)) @@ -268,7 +268,7 @@ } long test_saddl_overflow(long x, long y) { -// CHECK: @test_saddl_overflow([[UL:i32|i64]] %x +// CHECK: @test_saddl_overflow([[UL:i32|i64]] frozen %x // CHECK: %{{.+}} = call { [[UL]], i1 } @llvm.sadd.with.overflow.[[UL]]([[UL]] %{{.+}}, [[UL]] %{{.+}}) long result; if (__builtin_saddl_overflow(x, y, &result)) @@ -295,7 +295,7 @@ } long test_ssubl_overflow(long x, long y) { -// CHECK: @test_ssubl_overflow([[UL:i32|i64]] %x +// CHECK: @test_ssubl_overflow([[UL:i32|i64]] frozen %x // CHECK: %{{.+}} = call { [[UL]], i1 } @llvm.ssub.with.overflow.[[UL]]([[UL]] %{{.+}}, [[UL]] %{{.+}}) long result; if (__builtin_ssubl_overflow(x, y, &result)) @@ -322,7 +322,7 @@ } long test_smull_overflow(long x, long y) { -// CHECK: @test_smull_overflow([[UL:i32|i64]] %x +// CHECK: @test_smull_overflow([[UL:i32|i64]] frozen %x // CHECK: %{{.+}} = call { [[UL]], i1 } @llvm.smul.with.overflow.[[UL]]([[UL]] %{{.+}}, [[UL]] %{{.+}}) long result; if (__builtin_smull_overflow(x, y, &result)) diff --git a/clang/test/CodeGen/builtins-ppc-crypto.c b/clang/test/CodeGen/builtins-ppc-crypto.c --- a/clang/test/CodeGen/builtins-ppc-crypto.c +++ b/clang/test/CodeGen/builtins-ppc-crypto.c @@ -24,7 +24,7 @@ #define D_INIT2 { 0x7172737475767778, \ 0x797A7B7C7D7E7F70 }; -// CHECK-LABEL: define <16 x i8> @test_vpmsumb +// CHECK-LABEL: define frozen <16 x i8> @test_vpmsumb vector unsigned char test_vpmsumb(void) { vector unsigned char a = B_INIT1 @@ -33,7 +33,7 @@ // CHECK: @llvm.ppc.altivec.crypto.vpmsumb } -// CHECK-LABEL: define <8 x i16> @test_vpmsumh +// CHECK-LABEL: define frozen <8 x i16> @test_vpmsumh vector unsigned short test_vpmsumh(void) { vector unsigned short a = H_INIT1 @@ -42,7 +42,7 @@ // CHECK: @llvm.ppc.altivec.crypto.vpmsumh } -// CHECK-LABEL: define <4 x i32> @test_vpmsumw +// CHECK-LABEL: define frozen <4 x i32> @test_vpmsumw vector unsigned int test_vpmsumw(void) { vector unsigned int a = W_INIT1 @@ -51,7 +51,7 @@ // CHECK: @llvm.ppc.altivec.crypto.vpmsumw } -// CHECK-LABEL: define <2 x i64> @test_vpmsumd +// CHECK-LABEL: define frozen <2 x i64> @test_vpmsumd vector unsigned long long test_vpmsumd(void) { vector unsigned long long a = D_INIT1 @@ -60,7 +60,7 @@ // CHECK: @llvm.ppc.altivec.crypto.vpmsumd } -// CHECK-LABEL: define <2 x i64> @test_vsbox +// CHECK-LABEL: define frozen <2 x i64> @test_vsbox vector unsigned long long test_vsbox(void) { vector unsigned long long a = D_INIT1 @@ -68,7 +68,7 @@ // CHECK: @llvm.ppc.altivec.crypto.vsbox } -// CHECK-LABEL: define <16 x i8> @test_vpermxorb +// CHECK-LABEL: define frozen <16 x i8> @test_vpermxorb vector unsigned char test_vpermxorb(void) { vector unsigned char a = B_INIT1 @@ -78,7 +78,7 @@ // CHECK: @llvm.ppc.altivec.crypto.vpermxor } -// CHECK-LABEL: define <8 x i16> @test_vpermxorh +// CHECK-LABEL: define frozen <8 x i16> @test_vpermxorh vector unsigned short test_vpermxorh(void) { vector unsigned short a = H_INIT1 @@ -88,7 +88,7 @@ // CHECK: @llvm.ppc.altivec.crypto.vpermxor } -// CHECK-LABEL: define <4 x i32> @test_vpermxorw +// CHECK-LABEL: define frozen <4 x i32> @test_vpermxorw vector unsigned int test_vpermxorw(void) { vector unsigned int a = W_INIT1 @@ -98,7 +98,7 @@ // CHECK: @llvm.ppc.altivec.crypto.vpermxor } -// CHECK-LABEL: define <2 x i64> @test_vpermxord +// CHECK-LABEL: define frozen <2 x i64> @test_vpermxord vector unsigned long long test_vpermxord(void) { vector unsigned long long a = D_INIT1 @@ -132,7 +132,7 @@ // CHECK: @llvm.ppc.altivec.crypto.vpermxor } -// CHECK-LABEL: define <2 x i64> @test_vcipher +// CHECK-LABEL: define frozen <2 x i64> @test_vcipher vector unsigned long long test_vcipher(void) { vector unsigned long long a = D_INIT1 @@ -141,7 +141,7 @@ // CHECK: @llvm.ppc.altivec.crypto.vcipher } -// CHECK-LABEL: define <2 x i64> @test_vcipherlast +// CHECK-LABEL: define frozen <2 x i64> @test_vcipherlast vector unsigned long long test_vcipherlast(void) { vector unsigned long long a = D_INIT1 @@ -159,7 +159,7 @@ // CHECK: @llvm.ppc.altivec.crypto.vncipher } -// CHECK-LABEL: define <2 x i64> @test_vncipherlast +// CHECK-LABEL: define frozen <2 x i64> @test_vncipherlast vector unsigned long long test_vncipherlast(void) { vector unsigned long long a = D_INIT1 @@ -168,7 +168,7 @@ // CHECK: @llvm.ppc.altivec.crypto.vncipherlast } -// CHECK-LABEL: define <4 x i32> @test_vshasigmaw +// CHECK-LABEL: define frozen <4 x i32> @test_vshasigmaw vector unsigned int test_vshasigmaw(void) { vector unsigned int a = W_INIT1 @@ -176,7 +176,7 @@ // CHECK: @llvm.ppc.altivec.crypto.vshasigmaw } -// CHECK-LABEL: define <2 x i64> @test_vshasigmad +// CHECK-LABEL: define frozen <2 x i64> @test_vshasigmad vector unsigned long long test_vshasigmad(void) { vector unsigned long long a = D_INIT2 @@ -186,7 +186,7 @@ // Test cases for the builtins the way they are exposed to // users through altivec.h -// CHECK-LABEL: define <16 x i8> @test_vpmsumb_e +// CHECK-LABEL: define frozen <16 x i8> @test_vpmsumb_e vector unsigned char test_vpmsumb_e(void) { vector unsigned char a = B_INIT1 @@ -195,7 +195,7 @@ // CHECK: @llvm.ppc.altivec.crypto.vpmsumb } -// CHECK-LABEL: define <8 x i16> @test_vpmsumh_e +// CHECK-LABEL: define frozen <8 x i16> @test_vpmsumh_e vector unsigned short test_vpmsumh_e(void) { vector unsigned short a = H_INIT1 @@ -204,7 +204,7 @@ // CHECK: @llvm.ppc.altivec.crypto.vpmsumh } -// CHECK-LABEL: define <4 x i32> @test_vpmsumw_e +// CHECK-LABEL: define frozen <4 x i32> @test_vpmsumw_e vector unsigned int test_vpmsumw_e(void) { vector unsigned int a = W_INIT1 @@ -213,7 +213,7 @@ // CHECK: @llvm.ppc.altivec.crypto.vpmsumw } -// CHECK-LABEL: define <2 x i64> @test_vpmsumd_e +// CHECK-LABEL: define frozen <2 x i64> @test_vpmsumd_e vector unsigned long long test_vpmsumd_e(void) { vector unsigned long long a = D_INIT1 @@ -222,7 +222,7 @@ // CHECK: @llvm.ppc.altivec.crypto.vpmsumd } -// CHECK-LABEL: define <2 x i64> @test_vsbox_e +// CHECK-LABEL: define frozen <2 x i64> @test_vsbox_e vector unsigned long long test_vsbox_e(void) { vector unsigned long long a = D_INIT1 @@ -230,7 +230,7 @@ // CHECK: @llvm.ppc.altivec.crypto.vsbox } -// CHECK-LABEL: define <16 x i8> @test_vpermxorb_e +// CHECK-LABEL: define frozen <16 x i8> @test_vpermxorb_e vector unsigned char test_vpermxorb_e(void) { vector unsigned char a = B_INIT1 @@ -240,7 +240,7 @@ // CHECK: @llvm.ppc.altivec.crypto.vpermxor } -// CHECK-LABEL: define <8 x i16> @test_vpermxorh_e +// CHECK-LABEL: define frozen <8 x i16> @test_vpermxorh_e vector unsigned short test_vpermxorh_e(void) { vector unsigned short a = H_INIT1 @@ -250,7 +250,7 @@ // CHECK: @llvm.ppc.altivec.crypto.vpermxor } -// CHECK-LABEL: define <4 x i32> @test_vpermxorw_e +// CHECK-LABEL: define frozen <4 x i32> @test_vpermxorw_e vector unsigned int test_vpermxorw_e(void) { vector unsigned int a = W_INIT1 @@ -260,7 +260,7 @@ // CHECK: @llvm.ppc.altivec.crypto.vpermxor } -// CHECK-LABEL: define <2 x i64> @test_vpermxord_e +// CHECK-LABEL: define frozen <2 x i64> @test_vpermxord_e vector unsigned long long test_vpermxord_e(void) { vector unsigned long long a = D_INIT1 @@ -270,7 +270,7 @@ // CHECK: @llvm.ppc.altivec.crypto.vpermxor } -// CHECK-LABEL: define <2 x i64> @test_vcipher_e +// CHECK-LABEL: define frozen <2 x i64> @test_vcipher_e vector unsigned long long test_vcipher_e(void) { vector unsigned long long a = D_INIT1 @@ -279,7 +279,7 @@ // CHECK: @llvm.ppc.altivec.crypto.vcipher } -// CHECK-LABEL: define <2 x i64> @test_vcipherlast_e +// CHECK-LABEL: define frozen <2 x i64> @test_vcipherlast_e vector unsigned long long test_vcipherlast_e(void) { vector unsigned long long a = D_INIT1 @@ -288,7 +288,7 @@ // CHECK: @llvm.ppc.altivec.crypto.vcipherlast } -// CHECK-LABEL: define <2 x i64> @test_vncipher_e +// CHECK-LABEL: define frozen <2 x i64> @test_vncipher_e vector unsigned long long test_vncipher_e(void) { vector unsigned long long a = D_INIT1 @@ -297,7 +297,7 @@ // CHECK: @llvm.ppc.altivec.crypto.vncipher } -// CHECK-LABEL: define <2 x i64> @test_vncipherlast_e +// CHECK-LABEL: define frozen <2 x i64> @test_vncipherlast_e vector unsigned long long test_vncipherlast_e(void) { vector unsigned long long a = D_INIT1 @@ -306,7 +306,7 @@ // CHECK: @llvm.ppc.altivec.crypto.vncipherlast } -// CHECK-LABEL: define <4 x i32> @test_vshasigmaw_e +// CHECK-LABEL: define frozen <4 x i32> @test_vshasigmaw_e vector unsigned int test_vshasigmaw_e(void) { vector unsigned int a = W_INIT1 @@ -314,7 +314,7 @@ // CHECK: @llvm.ppc.altivec.crypto.vshasigmaw } -// CHECK-LABEL: define <2 x i64> @test_vshasigmad_e +// CHECK-LABEL: define frozen <2 x i64> @test_vshasigmad_e vector unsigned long long test_vshasigmad_e(void) { vector unsigned long long a = D_INIT2 diff --git a/clang/test/CodeGen/builtins-ppc-p7.c b/clang/test/CodeGen/builtins-ppc-p7.c --- a/clang/test/CodeGen/builtins-ppc-p7.c +++ b/clang/test/CodeGen/builtins-ppc-p7.c @@ -5,7 +5,7 @@ // RUN: %clang_cc1 -triple powerpc64le-unknown-unknown -target-cpu pwr8 \ // RUN: -emit-llvm %s -o - | FileCheck %s -// CHECK-LABEL: define signext i32 @test_divwe +// CHECK-LABEL: define frozen signext i32 @test_divwe int test_divwe(void) { int a = 74; @@ -14,7 +14,7 @@ // CHECK: @llvm.ppc.divwe } -// CHECK-LABEL: define zeroext i32 @test_divweu +// CHECK-LABEL: define frozen zeroext i32 @test_divweu unsigned int test_divweu(void) { unsigned int a = 74; @@ -23,7 +23,7 @@ // CHECK: @llvm.ppc.divweu } -// CHECK-LABEL: define i64 @test_divde +// CHECK-LABEL: define frozen i64 @test_divde long long test_divde(void) { long long a = 74LL; @@ -32,7 +32,7 @@ // CHECK: @llvm.ppc.divde } -// CHECK-LABEL: define i64 @test_divdeu +// CHECK-LABEL: define frozen i64 @test_divdeu unsigned long long test_divdeu(void) { unsigned long long a = 74ULL; @@ -41,7 +41,7 @@ // CHECK: @llvm.ppc.divdeu } -// CHECK-LABEL: define i64 @test_bpermd +// CHECK-LABEL: define frozen i64 @test_bpermd long long test_bpermd(void) { long long a = 74LL; diff --git a/clang/test/CodeGen/builtins-ppc.c b/clang/test/CodeGen/builtins-ppc.c --- a/clang/test/CodeGen/builtins-ppc.c +++ b/clang/test/CodeGen/builtins-ppc.c @@ -8,7 +8,7 @@ res = __builtin_eh_return_data_regno(1); // CHECK: store volatile i32 4 } -// CHECK-LABEL: define i64 @test_builtin_ppc_get_timebase +// CHECK-LABEL: define frozen i64 @test_builtin_ppc_get_timebase long long test_builtin_ppc_get_timebase() { // CHECK: call i64 @llvm.readcyclecounter() return __builtin_ppc_get_timebase(); diff --git a/clang/test/CodeGen/builtins.c b/clang/test/CodeGen/builtins.c --- a/clang/test/CodeGen/builtins.c +++ b/clang/test/CodeGen/builtins.c @@ -1,6 +1,6 @@ -// RUN: %clang_cc1 -emit-llvm -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -emit-llvm -o %t %s // RUN: not grep __builtin %t -// RUN: %clang_cc1 %s -emit-llvm -o - -triple x86_64-darwin-apple | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args %s -emit-llvm -o - -triple x86_64-darwin-apple | FileCheck %s int printf(const char *, ...); @@ -438,7 +438,7 @@ #endif -// CHECK-LABEL: define i64 @test_builtin_readcyclecounter +// CHECK-LABEL: define frozen i64 @test_builtin_readcyclecounter long long test_builtin_readcyclecounter() { // CHECK: call i64 @llvm.readcyclecounter() return __builtin_readcyclecounter(); diff --git a/clang/test/CodeGen/c-strings.c b/clang/test/CodeGen/c-strings.c --- a/clang/test/CodeGen/c-strings.c +++ b/clang/test/CodeGen/c-strings.c @@ -40,7 +40,7 @@ static char *x = "hello"; bar(x); // CHECK: [[T1:%.*]] = load i8*, i8** @f1.x - // CHECK: call {{.*}}void @bar(i8* [[T1:%.*]]) + // CHECK: call {{.*}}void @bar(i8* frozen [[T1:%.*]]) } // CHECK-LABEL: define {{.*}}void @f2() diff --git a/clang/test/CodeGen/c11atomics-ios.c b/clang/test/CodeGen/c11atomics-ios.c --- a/clang/test/CodeGen/c11atomics-ios.c +++ b/clang/test/CodeGen/c11atomics-ios.c @@ -203,7 +203,7 @@ } PS test_promoted_load(_Atomic(PS) *addr) { - // CHECK-LABEL: @test_promoted_load(%struct.PS* noalias sret align 2 %agg.result, { %struct.PS, [2 x i8] }* %addr) + // CHECK-LABEL: @test_promoted_load(%struct.PS* noalias sret align 2 %agg.result, { %struct.PS, [2 x i8] }* frozen %addr) // CHECK: [[ADDR_ARG:%.*]] = alloca { %struct.PS, [2 x i8] }*, align 4 // CHECK: [[ATOMIC_RES:%.*]] = alloca { %struct.PS, [2 x i8] }, align 8 // CHECK: store { %struct.PS, [2 x i8] }* %addr, { %struct.PS, [2 x i8] }** [[ADDR_ARG]], align 4 @@ -221,7 +221,7 @@ } void test_promoted_store(_Atomic(PS) *addr, PS *val) { - // CHECK-LABEL: @test_promoted_store({ %struct.PS, [2 x i8] }* %addr, %struct.PS* %val) + // CHECK-LABEL: @test_promoted_store({ %struct.PS, [2 x i8] }* frozen %addr, %struct.PS* frozen %val) // CHECK: [[ADDR_ARG:%.*]] = alloca { %struct.PS, [2 x i8] }*, align 4 // CHECK: [[VAL_ARG:%.*]] = alloca %struct.PS*, align 4 // CHECK: [[NONATOMIC_TMP:%.*]] = alloca %struct.PS, align 2 @@ -245,7 +245,7 @@ } PS test_promoted_exchange(_Atomic(PS) *addr, PS *val) { - // CHECK-LABEL: @test_promoted_exchange(%struct.PS* noalias sret align 2 %agg.result, { %struct.PS, [2 x i8] }* %addr, %struct.PS* %val) + // CHECK-LABEL: @test_promoted_exchange(%struct.PS* noalias sret align 2 %agg.result, { %struct.PS, [2 x i8] }* frozen %addr, %struct.PS* frozen %val) // CHECK: [[ADDR_ARG:%.*]] = alloca { %struct.PS, [2 x i8] }*, align 4 // CHECK: [[VAL_ARG:%.*]] = alloca %struct.PS*, align 4 // CHECK: [[NONATOMIC_TMP:%.*]] = alloca %struct.PS, align 2 @@ -275,7 +275,7 @@ } _Bool test_promoted_cmpxchg(_Atomic(PS) *addr, PS *desired, PS *new) { - // CHECK: define zeroext i1 @test_promoted_cmpxchg({ %struct.PS, [2 x i8] }* %addr, %struct.PS* %desired, %struct.PS* %new) #0 { + // CHECK: define frozen zeroext i1 @test_promoted_cmpxchg({ %struct.PS, [2 x i8] }* frozen %addr, %struct.PS* frozen %desired, %struct.PS* frozen %new) #0 { // CHECK: [[ADDR_ARG:%.*]] = alloca { %struct.PS, [2 x i8] }*, align 4 // CHECK: [[DESIRED_ARG:%.*]] = alloca %struct.PS*, align 4 // CHECK: [[NEW_ARG:%.*]] = alloca %struct.PS*, align 4 diff --git a/clang/test/CodeGen/c11atomics.c b/clang/test/CodeGen/c11atomics.c --- a/clang/test/CodeGen/c11atomics.c +++ b/clang/test/CodeGen/c11atomics.c @@ -73,7 +73,7 @@ // CHECK: testdec void testdec(void) { - // CHECK: call arm_aapcscc zeroext i1 @__atomic_compare_exchange(i32 1, i8* @b + // CHECK: call arm_aapcscc frozen zeroext i1 @__atomic_compare_exchange(i32 frozen 1, i8* frozen @b b--; // CHECK: atomicrmw sub i32* @i, i32 1 seq_cst i--; @@ -81,7 +81,7 @@ l--; // CHECK: atomicrmw sub i16* @s, i16 1 seq_cst s--; - // CHECK: call arm_aapcscc zeroext i1 @__atomic_compare_exchange(i32 1, i8* @b + // CHECK: call arm_aapcscc frozen zeroext i1 @__atomic_compare_exchange(i32 frozen 1, i8* frozen @b --b; // CHECK: atomicrmw sub i32* @i, i32 1 seq_cst // CHECK: sub i32 @@ -96,7 +96,7 @@ // CHECK: testaddeq void testaddeq(void) { - // CHECK: call arm_aapcscc zeroext i1 @__atomic_compare_exchange(i32 1, i8* @b + // CHECK: call arm_aapcscc frozen zeroext i1 @__atomic_compare_exchange(i32 frozen 1, i8* frozen @b // CHECK: atomicrmw add i32* @i, i32 42 seq_cst // CHECK: atomicrmw add i64* @l, i64 42 seq_cst // CHECK: atomicrmw add i16* @s, i16 42 seq_cst @@ -108,7 +108,7 @@ // CHECK: testsubeq void testsubeq(void) { - // CHECK: call arm_aapcscc zeroext i1 @__atomic_compare_exchange(i32 1, i8* @b + // CHECK: call arm_aapcscc frozen zeroext i1 @__atomic_compare_exchange(i32 frozen 1, i8* frozen @b // CHECK: atomicrmw sub i32* @i, i32 42 seq_cst // CHECK: atomicrmw sub i64* @l, i64 42 seq_cst // CHECK: atomicrmw sub i16* @s, i16 42 seq_cst @@ -120,7 +120,7 @@ // CHECK: testxoreq void testxoreq(void) { - // CHECK: call arm_aapcscc zeroext i1 @__atomic_compare_exchange(i32 1, i8* @b + // CHECK: call arm_aapcscc frozen zeroext i1 @__atomic_compare_exchange(i32 frozen 1, i8* frozen @b // CHECK: atomicrmw xor i32* @i, i32 42 seq_cst // CHECK: atomicrmw xor i64* @l, i64 42 seq_cst // CHECK: atomicrmw xor i16* @s, i16 42 seq_cst @@ -132,7 +132,7 @@ // CHECK: testoreq void testoreq(void) { - // CHECK: call arm_aapcscc zeroext i1 @__atomic_compare_exchange(i32 1, i8* @b + // CHECK: call arm_aapcscc frozen zeroext i1 @__atomic_compare_exchange(i32 frozen 1, i8* frozen @b // CHECK: atomicrmw or i32* @i, i32 42 seq_cst // CHECK: atomicrmw or i64* @l, i64 42 seq_cst // CHECK: atomicrmw or i16* @s, i16 42 seq_cst @@ -144,7 +144,7 @@ // CHECK: testandeq void testandeq(void) { - // CHECK: call arm_aapcscc zeroext i1 @__atomic_compare_exchange(i32 1, i8* @b + // CHECK: call arm_aapcscc frozen zeroext i1 @__atomic_compare_exchange(i32 frozen 1, i8* frozen @b // CHECK: atomicrmw and i32* @i, i32 42 seq_cst // CHECK: atomicrmw and i64* @l, i64 42 seq_cst // CHECK: atomicrmw and i16* @s, i16 42 seq_cst @@ -173,7 +173,7 @@ // CHECK-NEXT: [[T0:%.*]] = load float*, float** [[FP]] // CHECK-NEXT: [[T1:%.*]] = bitcast float* [[T0]] to i8* // CHECK-NEXT: [[T2:%.*]] = bitcast float* [[TMP0]] to i8* -// CHECK-NEXT: call arm_aapcscc void @__atomic_load(i32 4, i8* [[T1]], i8* [[T2]], i32 5) +// CHECK-NEXT: call arm_aapcscc void @__atomic_load(i32 frozen 4, i8* frozen [[T1]], i8* frozen [[T2]], i32 frozen 5) // CHECK-NEXT: [[T3:%.*]] = load float, float* [[TMP0]], align 4 // CHECK-NEXT: store float [[T3]], float* [[F]] float f = *fp; @@ -183,7 +183,7 @@ // CHECK-NEXT: store float [[T0]], float* [[TMP1]], align 4 // CHECK-NEXT: [[T2:%.*]] = bitcast float* [[T1]] to i8* // CHECK-NEXT: [[T3:%.*]] = bitcast float* [[TMP1]] to i8* -// CHECK-NEXT: call arm_aapcscc void @__atomic_store(i32 4, i8* [[T2]], i8* [[T3]], i32 5) +// CHECK-NEXT: call arm_aapcscc void @__atomic_store(i32 frozen 4, i8* frozen [[T2]], i8* frozen [[T3]], i32 frozen 5) *fp = f; // CHECK-NEXT: ret void @@ -214,7 +214,7 @@ // CHECK-NEXT: [[T0:%.*]] = load [[CF]]*, [[CF]]** [[FP]] // CHECK-NEXT: [[T1:%.*]] = bitcast [[CF]]* [[T0]] to i8* // CHECK-NEXT: [[T2:%.*]] = bitcast [[CF]]* [[TMP0]] to i8* -// CHECK-NEXT: call arm_aapcscc void @__atomic_load(i32 8, i8* [[T1]], i8* [[T2]], i32 5) +// CHECK-NEXT: call arm_aapcscc void @__atomic_load(i32 frozen 8, i8* frozen [[T1]], i8* frozen [[T2]], i32 frozen 5) // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds [[CF]], [[CF]]* [[TMP0]], i32 0, i32 0 // CHECK-NEXT: [[R:%.*]] = load float, float* [[T0]] // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds [[CF]], [[CF]]* [[TMP0]], i32 0, i32 1 @@ -236,7 +236,7 @@ // CHECK-NEXT: store float [[I]], float* [[T1]] // CHECK-NEXT: [[T0:%.*]] = bitcast [[CF]]* [[DEST]] to i8* // CHECK-NEXT: [[T1:%.*]] = bitcast [[CF]]* [[TMP1]] to i8* -// CHECK-NEXT: call arm_aapcscc void @__atomic_store(i32 8, i8* [[T0]], i8* [[T1]], i32 5) +// CHECK-NEXT: call arm_aapcscc void @__atomic_store(i32 frozen 8, i8* frozen [[T0]], i8* frozen [[T1]], i32 frozen 5) *fp = f; // CHECK-NEXT: ret void @@ -276,7 +276,7 @@ // CHECK-NEXT: [[T0:%.*]] = load [[S]]*, [[S]]** [[FP]] // CHECK-NEXT: [[T1:%.*]] = bitcast [[S]]* [[T0]] to i8* // CHECK-NEXT: [[T2:%.*]] = bitcast [[S]]* [[F]] to i8* -// CHECK-NEXT: call arm_aapcscc void @__atomic_load(i32 8, i8* [[T1]], i8* [[T2]], i32 5) +// CHECK-NEXT: call arm_aapcscc void @__atomic_load(i32 frozen 8, i8* frozen [[T1]], i8* frozen [[T2]], i32 frozen 5) S f = *fp; // CHECK-NEXT: [[T0:%.*]] = load [[S]]*, [[S]]** [[FP]] @@ -285,7 +285,7 @@ // CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 8 [[T1]], i8* align 2 [[T2]], i32 8, i1 false) // CHECK-NEXT: [[T3:%.*]] = bitcast [[S]]* [[T0]] to i8* // CHECK-NEXT: [[T4:%.*]] = bitcast [[S]]* [[TMP0]] to i8* -// CHECK-NEXT: call arm_aapcscc void @__atomic_store(i32 8, i8* [[T3]], i8* [[T4]], i32 5) +// CHECK-NEXT: call arm_aapcscc void @__atomic_store(i32 frozen 8, i8* frozen [[T3]], i8* frozen [[T4]], i32 frozen 5) *fp = f; // CHECK-NEXT: ret void @@ -331,7 +331,7 @@ // CHECK-NEXT: [[T0:%.*]] = load [[APS]]*, [[APS]]** [[FP]] // CHECK-NEXT: [[T1:%.*]] = bitcast [[APS]]* [[T0]] to i8* // CHECK-NEXT: [[T2:%.*]] = bitcast [[APS]]* [[TMP0]] to i8* -// CHECK-NEXT: call arm_aapcscc void @__atomic_load(i32 8, i8* [[T1]], i8* [[T2]], i32 5) +// CHECK-NEXT: call arm_aapcscc void @__atomic_load(i32 frozen 8, i8* frozen [[T1]], i8* frozen [[T2]], i32 frozen 5) // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds [[APS]], [[APS]]* [[TMP0]], i32 0, i32 0 // CHECK-NEXT: [[T1:%.*]] = bitcast [[PS]]* [[F]] to i8* // CHECK-NEXT: [[T2:%.*]] = bitcast [[PS]]* [[T0]] to i8* @@ -347,13 +347,13 @@ // CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 8 [[T2]], i8* align 2 [[T3]], i32 6, i1 false) // CHECK-NEXT: [[T4:%.*]] = bitcast [[APS]]* [[T0]] to i8* // CHECK-NEXT: [[T5:%.*]] = bitcast [[APS]]* [[TMP1]] to i8* -// CHECK-NEXT: call arm_aapcscc void @__atomic_store(i32 8, i8* [[T4]], i8* [[T5]], i32 5) +// CHECK-NEXT: call arm_aapcscc void @__atomic_store(i32 frozen 8, i8* frozen [[T4]], i8* frozen [[T5]], i32 frozen 5) *fp = f; // CHECK-NEXT: [[T0:%.*]] = load [[APS]]*, [[APS]]** [[FP]], align 4 // CHECK-NEXT: [[T1:%.*]] = bitcast [[APS]]* [[T0]] to i8* // CHECK-NEXT: [[T2:%.*]] = bitcast [[APS]]* [[TMP3]] to i8* -// CHECK-NEXT: call arm_aapcscc void @__atomic_load(i32 8, i8* [[T1]], i8* [[T2]], i32 5) +// CHECK-NEXT: call arm_aapcscc void @__atomic_load(i32 frozen 8, i8* frozen [[T1]], i8* frozen [[T2]], i32 frozen 5) // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds [[APS]], [[APS]]* [[TMP3]], i32 0, i32 0 // CHECK-NEXT: [[T1:%.*]] = bitcast %struct.PS* [[TMP2]] to i8* // CHECK-NEXT: [[T2:%.*]] = bitcast %struct.PS* [[T0]] to i8* @@ -368,7 +368,7 @@ } PS test_promoted_load(_Atomic(PS) *addr) { - // CHECK-LABEL: @test_promoted_load(%struct.PS* noalias sret align 2 %agg.result, { %struct.PS, [2 x i8] }* %addr) + // CHECK-LABEL: @test_promoted_load(%struct.PS* noalias sret align 2 %agg.result, { %struct.PS, [2 x i8] }* frozen %addr) // CHECK: [[ADDR_ARG:%.*]] = alloca { %struct.PS, [2 x i8] }*, align 4 // CHECK: [[ATOMIC_RES:%.*]] = alloca { %struct.PS, [2 x i8] }, align 8 // CHECK: store { %struct.PS, [2 x i8] }* %addr, { %struct.PS, [2 x i8] }** [[ADDR_ARG]], align 4 @@ -376,7 +376,7 @@ // CHECK: [[ADDR64:%.*]] = bitcast { %struct.PS, [2 x i8] }* [[ADDR]] to i64* // CHECK: [[ATOMIC_RES64:%.*]] = bitcast { %struct.PS, [2 x i8] }* [[ATOMIC_RES]] to i64* // CHECK: [[ADDR8:%.*]] = bitcast i64* [[ADDR64]] to i8* - // CHECK: [[RES:%.*]] = call arm_aapcscc i64 @__atomic_load_8(i8* [[ADDR8]], i32 5) + // CHECK: [[RES:%.*]] = call arm_aapcscc frozen i64 @__atomic_load_8(i8* frozen [[ADDR8]], i32 frozen 5) // CHECK: store i64 [[RES]], i64* [[ATOMIC_RES64]], align 8 // CHECK: [[ATOMIC_RES_STRUCT:%.*]] = bitcast i64* [[ATOMIC_RES64]] to %struct.PS* // CHECK: [[AGG_RESULT8:%.*]] = bitcast %struct.PS* %agg.result to i8* @@ -387,7 +387,7 @@ } void test_promoted_store(_Atomic(PS) *addr, PS *val) { - // CHECK-LABEL: @test_promoted_store({ %struct.PS, [2 x i8] }* %addr, %struct.PS* %val) + // CHECK-LABEL: @test_promoted_store({ %struct.PS, [2 x i8] }* frozen %addr, %struct.PS* frozen %val) // CHECK: [[ADDR_ARG:%.*]] = alloca { %struct.PS, [2 x i8] }*, align 4 // CHECK: [[VAL_ARG:%.*]] = alloca %struct.PS*, align 4 // CHECK: [[NONATOMIC_TMP:%.*]] = alloca %struct.PS, align 2 @@ -406,12 +406,12 @@ // CHECK: [[ATOMIC_VAL64:%.*]] = bitcast { %struct.PS, [2 x i8] }* [[ATOMIC_VAL]] to i64* // CHECK: [[ADDR8:%.*]] = bitcast i64* [[ADDR64]] to i8* // CHECK: [[VAL64:%.*]] = load i64, i64* [[ATOMIC_VAL64]], align 2 - // CHECK: call arm_aapcscc void @__atomic_store_8(i8* [[ADDR8]], i64 [[VAL64]], i32 5) + // CHECK: call arm_aapcscc void @__atomic_store_8(i8* frozen [[ADDR8]], i64 frozen [[VAL64]], i32 frozen 5) __c11_atomic_store(addr, *val, 5); } PS test_promoted_exchange(_Atomic(PS) *addr, PS *val) { - // CHECK-LABEL: @test_promoted_exchange(%struct.PS* noalias sret align 2 %agg.result, { %struct.PS, [2 x i8] }* %addr, %struct.PS* %val) + // CHECK-LABEL: @test_promoted_exchange(%struct.PS* noalias sret align 2 %agg.result, { %struct.PS, [2 x i8] }* frozen %addr, %struct.PS* frozen %val) // CHECK: [[ADDR_ARG:%.*]] = alloca { %struct.PS, [2 x i8] }*, align 4 // CHECK: [[VAL_ARG:%.*]] = alloca %struct.PS*, align 4 // CHECK: [[NONATOMIC_TMP:%.*]] = alloca %struct.PS, align 2 @@ -432,7 +432,7 @@ // CHECK: [[ATOMIC_RES64:%.*]] = bitcast { %struct.PS, [2 x i8] }* [[ATOMIC_RES]] to i64* // CHECK: [[ADDR8:%.*]] = bitcast i64* [[ADDR64]] to i8* // CHECK: [[VAL64:%.*]] = load i64, i64* [[ATOMIC_VAL64]], align 2 - // CHECK: [[RES:%.*]] = call arm_aapcscc i64 @__atomic_exchange_8(i8* [[ADDR8]], i64 [[VAL64]], i32 5) + // CHECK: [[RES:%.*]] = call arm_aapcscc frozen i64 @__atomic_exchange_8(i8* frozen [[ADDR8]], i64 frozen [[VAL64]], i32 frozen 5) // CHECK: store i64 [[RES]], i64* [[ATOMIC_RES64]], align 8 // CHECK: [[ATOMIC_RES_STRUCT:%.*]] = bitcast i64* [[ATOMIC_RES64]] to %struct.PS* // CHECK: [[AGG_RESULT8:%.*]] = bitcast %struct.PS* %agg.result to i8* @@ -442,7 +442,7 @@ } _Bool test_promoted_cmpxchg(_Atomic(PS) *addr, PS *desired, PS *new) { - // CHECK-LABEL: i1 @test_promoted_cmpxchg({ %struct.PS, [2 x i8] }* %addr, %struct.PS* %desired, %struct.PS* %new) #0 { + // CHECK-LABEL: i1 @test_promoted_cmpxchg({ %struct.PS, [2 x i8] }* frozen %addr, %struct.PS* frozen %desired, %struct.PS* frozen %new) #0 { // CHECK: [[ADDR_ARG:%.*]] = alloca { %struct.PS, [2 x i8] }*, align 4 // CHECK: [[DESIRED_ARG:%.*]] = alloca %struct.PS*, align 4 // CHECK: [[NEW_ARG:%.*]] = alloca %struct.PS*, align 4 @@ -470,7 +470,7 @@ // CHECK: [[ADDR8:%.*]] = bitcast i64* [[ADDR64]] to i8* // CHECK: [[ATOMIC_DESIRED8:%.*]] = bitcast i64* [[ATOMIC_DESIRED64]] to i8* // CHECK: [[NEW64:%.*]] = load i64, i64* [[ATOMIC_NEW64]], align 2 - // CHECK: [[RES:%.*]] = call arm_aapcscc zeroext i1 @__atomic_compare_exchange_8(i8* [[ADDR8]], i8* [[ATOMIC_DESIRED8]], i64 [[NEW64]], i32 5, i32 5) + // CHECK: [[RES:%.*]] = call arm_aapcscc frozen zeroext i1 @__atomic_compare_exchange_8(i8* frozen [[ADDR8]], i8* frozen [[ATOMIC_DESIRED8]], i64 frozen [[NEW64]], i32 frozen 5, i32 frozen 5) // CHECK: ret i1 [[RES]] return __c11_atomic_compare_exchange_strong(addr, desired, *new, 5, 5); } @@ -479,12 +479,12 @@ struct Empty test_empty_struct_load(_Atomic(struct Empty)* empty) { // CHECK-LABEL: @test_empty_struct_load( - // CHECK: call arm_aapcscc zeroext i8 @__atomic_load_1(i8* %{{.*}}, i32 5) + // CHECK: call arm_aapcscc frozen zeroext i8 @__atomic_load_1(i8* frozen %{{.*}}, i32 frozen 5) return __c11_atomic_load(empty, 5); } void test_empty_struct_store(_Atomic(struct Empty)* empty, struct Empty value) { // CHECK-LABEL: @test_empty_struct_store( - // CHECK: call arm_aapcscc void @__atomic_store_1(i8* %{{.*}}, i8 zeroext %{{.*}}, i32 5) + // CHECK: call arm_aapcscc void @__atomic_store_1(i8* frozen %{{.*}}, i8 frozen zeroext %{{.*}}, i32 frozen 5) __c11_atomic_store(empty, value, 5); } diff --git a/clang/test/CodeGen/callback_annotated.c b/clang/test/CodeGen/callback_annotated.c --- a/clang/test/CodeGen/callback_annotated.c +++ b/clang/test/CodeGen/callback_annotated.c @@ -14,18 +14,18 @@ void *broker2(void (*callee)(void)); -// RUN1-DAG: declare !callback ![[cid2:[0-9]+]] i8* @broker2 +// RUN1-DAG: declare !callback ![[cid2:[0-9]+]] frozen i8* @broker2 __attribute__((callback(callee))) void *broker2(void (*callee)(void)); void *broker2(void (*callee)(void)); -// RUN1-DAG: declare !callback ![[cid3:[0-9]+]] i8* @broker3 +// RUN1-DAG: declare !callback ![[cid3:[0-9]+]] frozen i8* @broker3 __attribute__((callback(4, 1, 2, c))) void *broker3(int, int, int c, int (*callee)(int, int, int), int); -// RUN1-DAG: declare !callback ![[cid4:[0-9]+]] i8* @broker4 +// RUN1-DAG: declare !callback ![[cid4:[0-9]+]] frozen i8* @broker4 __attribute__((callback(4, -1, a, __))) void *broker4(int a, int, int, int (*callee)(int, int, int), int); -// RUN1-DAG: declare !callback ![[cid5:[0-9]+]] i8* @broker5 +// RUN1-DAG: declare !callback ![[cid5:[0-9]+]] frozen i8* @broker5 __attribute__((callback(4, d, 5, 2))) void *broker5(int, int, int, int (*callee)(int, int, int), int d); static void *VoidPtr2VoidPtr(void *payload) { @@ -35,12 +35,12 @@ } static int ThreeInt2Int(int a, int b, int c) { - // RUN2: define internal i32 @ThreeInt2Int(i32 %a, i32 %b, i32 %c) + // RUN2: define internal frozen i32 @ThreeInt2Int(i32 frozen %a, i32 frozen %b, i32 frozen %c) // RUN2: %mul = mul nsw i32 %b, %a // RUN2: %add = add nsw i32 %mul, %c // RUN2: ret i32 %add - // IPCP: define internal i32 @ThreeInt2Int(i32 %a, i32 %b, i32 %c) + // IPCP: define internal frozen i32 @ThreeInt2Int(i32 frozen %a, i32 frozen %b, i32 frozen %c) // IPCP: %mul = mul nsw i32 4, %a // IPCP: %add = add nsw i32 %mul, %c // IPCP: ret i32 %add diff --git a/clang/test/CodeGen/callback_openmp.c b/clang/test/CodeGen/callback_openmp.c --- a/clang/test/CodeGen/callback_openmp.c +++ b/clang/test/CodeGen/callback_openmp.c @@ -15,14 +15,14 @@ #pragma omp parallel firstprivate(q, p) work1(p, q); -// IPCP: call void @work1(i32 2, i32 %{{[._a-zA-Z0-9]*}}) +// IPCP: call void @work1(i32 frozen 2, i32 frozen %{{[._a-zA-Z0-9]*}}) #pragma omp parallel for firstprivate(p, q) for (int i = 0; i < q; i++) work2(i, p); -// IPCP: call void @work2(i32 %{{[._a-zA-Z0-9]*}}, i32 2) +// IPCP: call void @work2(i32 frozen %{{[._a-zA-Z0-9]*}}, i32 frozen 2) #pragma omp target teams firstprivate(p) work12(p, p); -// IPCP: call void @work12(i32 2, i32 2) +// IPCP: call void @work12(i32 frozen 2, i32 frozen 2) } diff --git a/clang/test/CodeGen/callback_pthread_create.c b/clang/test/CodeGen/callback_pthread_create.c --- a/clang/test/CodeGen/callback_pthread_create.c +++ b/clang/test/CodeGen/callback_pthread_create.c @@ -21,13 +21,13 @@ const int GlobalVar = 0; static void *callee0(void *payload) { -// IPCP: define internal i8* @callee0 +// IPCP: define internal frozen i8* @callee0 // IPCP: ret i8* null return payload; } static void *callee1(void *payload) { -// IPCP: define internal i8* @callee1 +// IPCP: define internal frozen i8* @callee1 // IPCP: ret i8* bitcast (i32* @GlobalVar to i8*) return payload; } diff --git a/clang/test/CodeGen/calling-conv-ignored.c b/clang/test/CodeGen/calling-conv-ignored.c --- a/clang/test/CodeGen/calling-conv-ignored.c +++ b/clang/test/CodeGen/calling-conv-ignored.c @@ -16,30 +16,30 @@ } // X86-LABEL: define dso_local void @bar() -// X86: call void @foo_default(i8* null, i8* null) -// X86: call x86_stdcallcc void @"\01_foo_std@8"(i8* null, i8* null) -// X86: call x86_fastcallcc void @"\01@foo_fast@8"(i8* inreg null, i8* inreg null) -// X86: call x86_vectorcallcc void @"\01foo_vector@@8"(i8* inreg null, i8* inreg null) +// X86: call void @foo_default(i8* frozen null, i8* frozen null) +// X86: call x86_stdcallcc void @"\01_foo_std@8"(i8* frozen null, i8* frozen null) +// X86: call x86_fastcallcc void @"\01@foo_fast@8"(i8* frozen inreg null, i8* frozen inreg null) +// X86: call x86_vectorcallcc void @"\01foo_vector@@8"(i8* frozen inreg null, i8* frozen inreg null) // X86: ret void // X64-LABEL: define dso_local void @bar() -// X64: call void @foo_default(i8* null, i8* null) -// X64: call void @foo_std(i8* null, i8* null) -// X64: call void @foo_fast(i8* null, i8* null) -// X64: call x86_vectorcallcc void @"\01foo_vector@@16"(i8* null, i8* null) +// X64: call void @foo_default(i8* frozen null, i8* frozen null) +// X64: call void @foo_std(i8* frozen null, i8* frozen null) +// X64: call void @foo_fast(i8* frozen null, i8* frozen null) +// X64: call x86_vectorcallcc void @"\01foo_vector@@16"(i8* frozen null, i8* frozen null) // X64: ret void // X86-VEC-LABEL: define dso_local void @bar() -// X86-VEC: call x86_vectorcallcc void @"\01foo_default@@8"(i8* inreg null, i8* inreg null) -// X86-VEC: call x86_stdcallcc void @"\01_foo_std@8"(i8* null, i8* null) -// X86-VEC: call x86_fastcallcc void @"\01@foo_fast@8"(i8* inreg null, i8* inreg null) -// X86-VEC: call x86_vectorcallcc void @"\01foo_vector@@8"(i8* inreg null, i8* inreg null) +// X86-VEC: call x86_vectorcallcc void @"\01foo_default@@8"(i8* frozen inreg null, i8* frozen inreg null) +// X86-VEC: call x86_stdcallcc void @"\01_foo_std@8"(i8* frozen null, i8* frozen null) +// X86-VEC: call x86_fastcallcc void @"\01@foo_fast@8"(i8* frozen inreg null, i8* frozen inreg null) +// X86-VEC: call x86_vectorcallcc void @"\01foo_vector@@8"(i8* frozen inreg null, i8* frozen inreg null) // X86-VEC: ret void // X64-VEC-LABEL: define dso_local void @bar() -// X64-VEC: call x86_vectorcallcc void @"\01foo_default@@16"(i8* null, i8* null) -// X64-VEC: call void @foo_std(i8* null, i8* null) -// X64-VEC: call void @foo_fast(i8* null, i8* null) -// X64-VEC: call x86_vectorcallcc void @"\01foo_vector@@16"(i8* null, i8* null) +// X64-VEC: call x86_vectorcallcc void @"\01foo_default@@16"(i8* frozen null, i8* frozen null) +// X64-VEC: call void @foo_std(i8* frozen null, i8* frozen null) +// X64-VEC: call void @foo_fast(i8* frozen null, i8* frozen null) +// X64-VEC: call x86_vectorcallcc void @"\01foo_vector@@16"(i8* frozen null, i8* frozen null) // X64-VEC: ret void diff --git a/clang/test/CodeGen/catch-alignment-assumption-attribute-align_value-on-lvalue.cpp b/clang/test/CodeGen/catch-alignment-assumption-attribute-align_value-on-lvalue.cpp --- a/clang/test/CodeGen/catch-alignment-assumption-attribute-align_value-on-lvalue.cpp +++ b/clang/test/CodeGen/catch-alignment-assumption-attribute-align_value-on-lvalue.cpp @@ -14,7 +14,7 @@ // CHECK-SANITIZE-ANYRECOVER: @[[LINE_100_ALIGNMENT_ASSUMPTION:.*]] = {{.*}}, i32 100, i32 13 }, {{.*}}* @[[ALIGNED_CHAR]] } char **load_from_ac_struct(struct ac_struct *x) { - // CHECK: define i8** @{{.*}}(%[[STRUCT_AC_STRUCT]]* %[[X:.*]]) + // CHECK: define frozen i8** @{{.*}}(%[[STRUCT_AC_STRUCT]]* frozen %[[X:.*]]) // CHECK-NEXT: [[ENTRY:.*]]: // CHECK-NEXT: %[[STRUCT_AC_STRUCT_ADDR:.*]] = alloca %[[STRUCT_AC_STRUCT]]*, align 8 // CHECK-NEXT: store %[[STRUCT_AC_STRUCT]]* %[[X]], %[[STRUCT_AC_STRUCT]]** %[[STRUCT_AC_STRUCT_ADDR]], align 8 diff --git a/clang/test/CodeGen/catch-alignment-assumption-attribute-align_value-on-paramvar.cpp b/clang/test/CodeGen/catch-alignment-assumption-attribute-align_value-on-paramvar.cpp --- a/clang/test/CodeGen/catch-alignment-assumption-attribute-align_value-on-paramvar.cpp +++ b/clang/test/CodeGen/catch-alignment-assumption-attribute-align_value-on-paramvar.cpp @@ -7,8 +7,8 @@ // CHECK-SANITIZE-ANYRECOVER: @[[LINE_100_ALIGNMENT_ASSUMPTION:.*]] = {{.*}}, i32 100, i32 10 }, {{.*}}* @[[CHAR]] } char **passthrough(__attribute__((align_value(0x80000000))) char **x) { - // CHECK-NOSANITIZE: define i8** @{{.*}}(i8** align 536870912 %[[X:.*]]) - // CHECK-SANITIZE: define i8** @{{.*}}(i8** %[[X:.*]]) + // CHECK-NOSANITIZE: define frozen i8** @{{.*}}(i8** frozen align 536870912 %[[X:.*]]) + // CHECK-SANITIZE: define frozen i8** @{{.*}}(i8** frozen %[[X:.*]]) // CHECK-NEXT: [[entry:.*]]: // CHECK-NEXT: %[[X_ADDR:.*]] = alloca i8**, align 8 // CHECK-NEXT: store i8** %[[X]], i8*** %[[X_ADDR]], align 8 diff --git a/clang/test/CodeGen/catch-alignment-assumption-attribute-alloc_align-on-function-variable.cpp b/clang/test/CodeGen/catch-alignment-assumption-attribute-alloc_align-on-function-variable.cpp --- a/clang/test/CodeGen/catch-alignment-assumption-attribute-alloc_align-on-function-variable.cpp +++ b/clang/test/CodeGen/catch-alignment-assumption-attribute-alloc_align-on-function-variable.cpp @@ -8,7 +8,7 @@ char **__attribute__((alloc_align(2))) passthrough(char **x, unsigned long alignment) { - // CHECK: define i8** @[[PASSTHROUGH:.*]](i8** %[[X:.*]], i64 %[[ALIGNMENT:.*]]) + // CHECK: define frozen i8** @[[PASSTHROUGH:.*]](i8** frozen %[[X:.*]], i64 frozen %[[ALIGNMENT:.*]]) // CHECK-NEXT: entry: // CHECK-NEXT: %[[X_ADDR:.*]] = alloca i8**, align 8 // CHECK-NEXT: %[[ALIGNMENT_ADDR:.*]] = alloca i64, align 8 @@ -21,7 +21,7 @@ } char **caller(char **x, unsigned long alignment) { - // CHECK: define i8** @{{.*}}(i8** %[[X:.*]], i64 %[[ALIGNMENT:.*]]) + // CHECK: define frozen i8** @{{.*}}(i8** frozen %[[X:.*]], i64 frozen %[[ALIGNMENT:.*]]) // CHECK-NEXT: entry: // CHECK-NEXT: %[[X_ADDR:.*]] = alloca i8**, align 8 // CHECK-NEXT: %[[ALIGNMENT_ADDR:.*]] = alloca i64, align 8 @@ -29,7 +29,7 @@ // CHECK-NEXT: store i64 %[[ALIGNMENT]], i64* %[[ALIGNMENT_ADDR]], align 8 // CHECK-NEXT: %[[X_RELOADED:.*]] = load i8**, i8*** %[[X_ADDR]], align 8 // CHECK-NEXT: %[[ALIGNMENT_RELOADED:.*]] = load i64, i64* %[[ALIGNMENT_ADDR]], align 8 - // CHECK-NEXT: %[[X_RETURNED:.*]] = call i8** @[[PASSTHROUGH]](i8** %[[X_RELOADED]], i64 %[[ALIGNMENT_RELOADED]]) + // CHECK-NEXT: %[[X_RETURNED:.*]] = call frozen i8** @[[PASSTHROUGH]](i8** frozen %[[X_RELOADED]], i64 frozen %[[ALIGNMENT_RELOADED]]) // CHECK-NEXT: %[[MASK:.*]] = sub i64 %[[ALIGNMENT_RELOADED]], 1 // CHECK-NEXT: %[[PTRINT:.*]] = ptrtoint i8** %[[X_RETURNED]] to i64 // CHECK-NEXT: %[[MASKEDPTR:.*]] = and i64 %[[PTRINT]], %[[MASK]] diff --git a/clang/test/CodeGen/catch-alignment-assumption-attribute-alloc_align-on-function.cpp b/clang/test/CodeGen/catch-alignment-assumption-attribute-alloc_align-on-function.cpp --- a/clang/test/CodeGen/catch-alignment-assumption-attribute-alloc_align-on-function.cpp +++ b/clang/test/CodeGen/catch-alignment-assumption-attribute-alloc_align-on-function.cpp @@ -8,7 +8,7 @@ char **__attribute__((alloc_align(2))) passthrough(char **x, unsigned long alignment) { - // CHECK: define i8** @[[PASSTHROUGH:.*]](i8** %[[X:.*]], i64 %[[ALIGNMENT:.*]]) + // CHECK: define frozen i8** @[[PASSTHROUGH:.*]](i8** frozen %[[X:.*]], i64 frozen %[[ALIGNMENT:.*]]) // CHECK-NEXT: entry: // CHECK-NEXT: %[[X_ADDR:.*]] = alloca i8**, align 8 // CHECK-NEXT: %[[ALIGNMENT_ADDR:.*]] = alloca i64, align 8 @@ -21,13 +21,13 @@ } char **caller(char **x) { - // CHECK: define i8** @{{.*}}(i8** %[[X:.*]]) + // CHECK: define frozen i8** @{{.*}}(i8** frozen %[[X:.*]]) // CHECK-NEXT: entry: // CHECK-NEXT: %[[X_ADDR:.*]] = alloca i8**, align 8 // CHECK-NEXT: store i8** %[[X]], i8*** %[[X_ADDR]], align 8 // CHECK-NEXT: %[[X_RELOADED:.*]] = load i8**, i8*** %[[X_ADDR]], align 8 - // CHECK-NOSANITIZE-NEXT: %[[X_RETURNED:.*]] = call align 128 i8** @[[PASSTHROUGH]](i8** %[[X_RELOADED]], i64 128) - // CHECK-SANITIZE-NEXT: %[[X_RETURNED:.*]] = call i8** @[[PASSTHROUGH]](i8** %[[X_RELOADED]], i64 128) + // CHECK-NOSANITIZE-NEXT: %[[X_RETURNED:.*]] = call frozen align 128 i8** @[[PASSTHROUGH]](i8** frozen %[[X_RELOADED]], i64 frozen 128) + // CHECK-SANITIZE-NEXT: %[[X_RETURNED:.*]] = call frozen i8** @[[PASSTHROUGH]](i8** frozen %[[X_RELOADED]], i64 frozen 128) // CHECK-SANITIZE-NEXT: %[[PTRINT:.*]] = ptrtoint i8** %[[X_RETURNED]] to i64 // CHECK-SANITIZE-NEXT: %[[MASKEDPTR:.*]] = and i64 %[[PTRINT]], 127 // CHECK-SANITIZE-NEXT: %[[MASKCOND:.*]] = icmp eq i64 %[[MASKEDPTR]], 0 diff --git a/clang/test/CodeGen/catch-alignment-assumption-attribute-assume_aligned-on-function-two-params.cpp b/clang/test/CodeGen/catch-alignment-assumption-attribute-assume_aligned-on-function-two-params.cpp --- a/clang/test/CodeGen/catch-alignment-assumption-attribute-assume_aligned-on-function-two-params.cpp +++ b/clang/test/CodeGen/catch-alignment-assumption-attribute-assume_aligned-on-function-two-params.cpp @@ -7,7 +7,7 @@ // CHECK-SANITIZE-ANYRECOVER: @[[LINE_100_ALIGNMENT_ASSUMPTION:.*]] = {{.*}}, i32 100, i32 10 }, {{.*}}* @[[CHAR]] } char **__attribute__((assume_aligned(0x80000000, 42))) passthrough(char **x) { - // CHECK: define i8** @[[PASSTHROUGH:.*]](i8** %[[X:.*]]) + // CHECK: define frozen i8** @[[PASSTHROUGH:.*]](i8** frozen %[[X:.*]]) // CHECK-NEXT: entry: // CHECK-NEXT: %[[X_ADDR:.*]] = alloca i8**, align 8 // CHECK-NEXT: store i8** %[[X]], i8*** %[[X_ADDR]], align 8 @@ -18,12 +18,12 @@ } char **caller(char **x) { - // CHECK: define i8** @{{.*}}(i8** %[[X:.*]]) + // CHECK: define frozen i8** @{{.*}}(i8** frozen %[[X:.*]]) // CHECK-NEXT: entry: // CHECK-NEXT: %[[X_ADDR:.*]] = alloca i8**, align 8 // CHECK-NEXT: store i8** %[[X]], i8*** %[[X_ADDR]], align 8 // CHECK-NEXT: %[[X_RELOADED:.*]] = load i8**, i8*** %[[X_ADDR]], align 8 - // CHECK-NEXT: %[[X_RETURNED:.*]] = call i8** @[[PASSTHROUGH]](i8** %[[X_RELOADED]]) + // CHECK-NEXT: %[[X_RETURNED:.*]] = call frozen i8** @[[PASSTHROUGH]](i8** frozen %[[X_RELOADED]]) // CHECK-NEXT: %[[PTRINT:.*]] = ptrtoint i8** %[[X_RETURNED]] to i64 // CHECK-NEXT: %[[OFFSETPTR:.*]] = sub i64 %[[PTRINT]], 42 // CHECK-NEXT: %[[MASKEDPTR:.*]] = and i64 %[[OFFSETPTR]], 2147483647 diff --git a/clang/test/CodeGen/catch-alignment-assumption-attribute-assume_aligned-on-function.cpp b/clang/test/CodeGen/catch-alignment-assumption-attribute-assume_aligned-on-function.cpp --- a/clang/test/CodeGen/catch-alignment-assumption-attribute-assume_aligned-on-function.cpp +++ b/clang/test/CodeGen/catch-alignment-assumption-attribute-assume_aligned-on-function.cpp @@ -7,7 +7,7 @@ // CHECK-SANITIZE-ANYRECOVER: @[[LINE_100_ALIGNMENT_ASSUMPTION:.*]] = {{.*}}, i32 100, i32 10 }, {{.*}}* @[[CHAR]] } char **__attribute__((assume_aligned(128))) passthrough(char **x) { - // CHECK: define i8** @[[PASSTHROUGH:.*]](i8** %[[X:.*]]) + // CHECK: define frozen i8** @[[PASSTHROUGH:.*]](i8** frozen %[[X:.*]]) // CHECK-NEXT: entry: // CHECK-NEXT: %[[X_ADDR:.*]] = alloca i8**, align 8 // CHECK-NEXT: store i8** %[[X]], i8*** %[[X_ADDR]], align 8 @@ -18,13 +18,13 @@ } char **caller(char **x) { - // CHECK: define i8** @{{.*}}(i8** %[[X]]) + // CHECK: define frozen i8** @{{.*}}(i8** frozen %[[X]]) // CHECK-NEXT: entry: // CHECK-NEXT: %[[X_ADDR]] = alloca i8**, align 8 // CHECK-NEXT: store i8** %[[X]], i8*** %[[X_ADDR]], align 8 // CHECK-NEXT: %[[X_RELOADED:.*]] = load i8**, i8*** %[[X_ADDR]], align 8 - // CHECK-NOSANITIZE-NEXT: %[[X_RETURNED:.*]] = call align 128 i8** @[[PASSTHROUGH]](i8** %[[X_RELOADED]]) - // CHECK-SANITIZE-NEXT: %[[X_RETURNED:.*]] = call i8** @[[PASSTHROUGH]](i8** %[[X_RELOADED]]) + // CHECK-NOSANITIZE-NEXT: %[[X_RETURNED:.*]] = call frozen align 128 i8** @[[PASSTHROUGH]](i8** frozen %[[X_RELOADED]]) + // CHECK-SANITIZE-NEXT: %[[X_RETURNED:.*]] = call frozen i8** @[[PASSTHROUGH]](i8** frozen %[[X_RELOADED]]) // CHECK-SANITIZE-NEXT: %[[PTRINT:.*]] = ptrtoint i8** %[[X_RETURNED]] to i64 // CHECK-SANITIZE-NEXT: %[[MASKEDPTR:.*]] = and i64 %[[PTRINT]], 127 // CHECK-SANITIZE-NEXT: %[[MASKCOND:.*]] = icmp eq i64 %[[MASKEDPTR]], 0 diff --git a/clang/test/CodeGen/catch-alignment-assumption-builtin_assume_aligned-three-params-variable.cpp b/clang/test/CodeGen/catch-alignment-assumption-builtin_assume_aligned-three-params-variable.cpp --- a/clang/test/CodeGen/catch-alignment-assumption-builtin_assume_aligned-three-params-variable.cpp +++ b/clang/test/CodeGen/catch-alignment-assumption-builtin_assume_aligned-three-params-variable.cpp @@ -7,7 +7,7 @@ // CHECK-SANITIZE-ANYRECOVER: @[[LINE_100_ALIGNMENT_ASSUMPTION:.*]] = {{.*}}, i32 100, i32 35 }, {{.*}}* @[[CHAR]] } void *caller(char **x, unsigned long offset) { - // CHECK: define i8* @{{.*}}(i8** %[[X:.*]], i64 %[[OFFSET:.*]]) + // CHECK: define frozen i8* @{{.*}}(i8** frozen %[[X:.*]], i64 frozen %[[OFFSET:.*]]) // CHECK-NEXT: entry: // CHECK-NEXT: %[[X_ADDR:.*]] = alloca i8**, align 8 // CHECK-NEXT: %[[OFFSET_ADDR:.*]] = alloca i64, align 8 diff --git a/clang/test/CodeGen/catch-alignment-assumption-builtin_assume_aligned-three-params.cpp b/clang/test/CodeGen/catch-alignment-assumption-builtin_assume_aligned-three-params.cpp --- a/clang/test/CodeGen/catch-alignment-assumption-builtin_assume_aligned-three-params.cpp +++ b/clang/test/CodeGen/catch-alignment-assumption-builtin_assume_aligned-three-params.cpp @@ -7,7 +7,7 @@ // CHECK-SANITIZE-ANYRECOVER: @[[LINE_100_ALIGNMENT_ASSUMPTION:.*]] = {{.*}}, i32 100, i32 35 }, {{.*}}* @[[CHAR]] } void *caller(char **x) { - // CHECK: define i8* @{{.*}}(i8** %[[X:.*]]) + // CHECK: define frozen i8* @{{.*}}(i8** frozen %[[X:.*]]) // CHECK-NEXT: entry: // CHECK-NEXT: %[[X_ADDR:.*]] = alloca i8**, align 8 // CHECK-NEXT: store i8** %[[X]], i8*** %[[X_ADDR]], align 8 diff --git a/clang/test/CodeGen/catch-alignment-assumption-builtin_assume_aligned-two-params.cpp b/clang/test/CodeGen/catch-alignment-assumption-builtin_assume_aligned-two-params.cpp --- a/clang/test/CodeGen/catch-alignment-assumption-builtin_assume_aligned-two-params.cpp +++ b/clang/test/CodeGen/catch-alignment-assumption-builtin_assume_aligned-two-params.cpp @@ -7,7 +7,7 @@ // CHECK-SANITIZE-ANYRECOVER: @[[LINE_100_ALIGNMENT_ASSUMPTION:.*]] = {{.*}}, i32 100, i32 35 }, {{.*}}* @[[CHAR]] } void *caller(char **x) { - // CHECK: define i8* @{{.*}}(i8** %[[X:.*]]) + // CHECK: define frozen i8* @{{.*}}(i8** frozen %[[X:.*]]) // CHECK-NEXT: entry: // CHECK-NEXT: %[[X_ADDR:.*]] = alloca i8**, align 8 // CHECK-NEXT: store i8** %[[X]], i8*** %[[X_ADDR]], align 8 diff --git a/clang/test/CodeGen/catch-alignment-assumption-openmp.cpp b/clang/test/CodeGen/catch-alignment-assumption-openmp.cpp --- a/clang/test/CodeGen/catch-alignment-assumption-openmp.cpp +++ b/clang/test/CodeGen/catch-alignment-assumption-openmp.cpp @@ -7,7 +7,7 @@ // CHECK-SANITIZE-ANYRECOVER: @[[LINE_100_ALIGNMENT_ASSUMPTION:.*]] = {{.*}}, i32 100, i32 30 }, {{.*}}* @[[CHAR]] } void func(char *data) { - // CHECK: define void @{{.*}}(i8* %[[DATA:.*]]) + // CHECK: define void @{{.*}}(i8* frozen %[[DATA:.*]]) // CHECK-NEXT: [[ENTRY:.*]]: // CHECK-NEXT: %[[DATA_ADDR:.*]] = alloca i8*, align 8 // CHECK: store i8* %[[DATA]], i8** %[[DATA_ADDR]], align 8 diff --git a/clang/test/CodeGen/catch-implicit-integer-sign-changes-incdec.c b/clang/test/CodeGen/catch-implicit-integer-sign-changes-incdec.c --- a/clang/test/CodeGen/catch-implicit-integer-sign-changes-incdec.c +++ b/clang/test/CodeGen/catch-implicit-integer-sign-changes-incdec.c @@ -34,7 +34,7 @@ // CHECK-SANITIZE-NEXT: [[X_PROMOTED:%.*]] = zext i16 [[X_RELOADED]] to i32 // CHECK-SANITIZE-NEXT: [[INC:%.*]] = add i32 [[X_PROMOTED]], 1 // CHECK-SANITIZE-NEXT: [[X_PROMOTED_DEMOTED:%.*]] = trunc i32 [[INC]] to i16 -// CHECK-SANITIZE-NEXT: [[SRC_INC_NEGATIVITYCHECK:%.*]] = icmp slt i32 [[INC]], 0, !nosanitize !2 +// CHECK-SANITIZE-NEXT: [[SRC_INC_NEGATIVITYCHECK:%.*]] = icmp slt i32 [[INC]], 0, !nosanitize // CHECK-SANITIZE-NEXT: [[SIGNCHANGECHECK:%.*]] = icmp eq i1 [[SRC_INC_NEGATIVITYCHECK]], false, !nosanitize // CHECK-SANITIZE-NEXT: br i1 [[SIGNCHANGECHECK]], label %[[CONT:.*]], label %[[HANDLER_IMPLICIT_X_PROMOTEDERSION:[^,]+]],{{.*}} !nosanitize // CHECK-SANITIZE: [[HANDLER_IMPLICIT_X_PROMOTEDERSION]]: @@ -69,7 +69,7 @@ // CHECK-SANITIZE-NEXT: [[X_PROMOTED:%.*]] = zext i16 [[X_RELOADED]] to i32 // CHECK-SANITIZE-NEXT: [[INC:%.*]] = add i32 [[X_PROMOTED]], -1 // CHECK-SANITIZE-NEXT: [[X_PROMOTED_DEMOTED:%.*]] = trunc i32 [[INC]] to i16 -// CHECK-SANITIZE-NEXT: [[SRC_INC_NEGATIVITYCHECK:%.*]] = icmp slt i32 [[INC]], 0, !nosanitize !2 +// CHECK-SANITIZE-NEXT: [[SRC_INC_NEGATIVITYCHECK:%.*]] = icmp slt i32 [[INC]], 0, !nosanitize // CHECK-SANITIZE-NEXT: [[SIGNCHANGECHECK:%.*]] = icmp eq i1 [[SRC_INC_NEGATIVITYCHECK]], false, !nosanitize // CHECK-SANITIZE-NEXT: br i1 [[SIGNCHANGECHECK]], label %[[CONT:.*]], label %[[HANDLER_IMPLICIT_X_PROMOTEDERSION:[^,]+]],{{.*}} !nosanitize // CHECK-SANITIZE: [[HANDLER_IMPLICIT_X_PROMOTEDERSION]]: @@ -105,7 +105,7 @@ // CHECK-SANITIZE-NEXT: [[X_PROMOTED:%.*]] = zext i16 [[X_RELOADED]] to i32 // CHECK-SANITIZE-NEXT: [[INC:%.*]] = add i32 [[X_PROMOTED]], 1 // CHECK-SANITIZE-NEXT: [[X_PROMOTED_DEMOTED:%.*]] = trunc i32 [[INC]] to i16 -// CHECK-SANITIZE-NEXT: [[SRC_INC_NEGATIVITYCHECK:%.*]] = icmp slt i32 [[INC]], 0, !nosanitize !2 +// CHECK-SANITIZE-NEXT: [[SRC_INC_NEGATIVITYCHECK:%.*]] = icmp slt i32 [[INC]], 0, !nosanitize // CHECK-SANITIZE-NEXT: [[SIGNCHANGECHECK:%.*]] = icmp eq i1 [[SRC_INC_NEGATIVITYCHECK]], false, !nosanitize // CHECK-SANITIZE-NEXT: br i1 [[SIGNCHANGECHECK]], label %[[CONT:.*]], label %[[HANDLER_IMPLICIT_X_PROMOTEDERSION:[^,]+]],{{.*}} !nosanitize // CHECK-SANITIZE: [[HANDLER_IMPLICIT_X_PROMOTEDERSION]]: @@ -141,7 +141,7 @@ // CHECK-SANITIZE-NEXT: [[X_PROMOTED:%.*]] = zext i16 [[X_RELOADED]] to i32 // CHECK-SANITIZE-NEXT: [[INC:%.*]] = add i32 [[X_PROMOTED]], -1 // CHECK-SANITIZE-NEXT: [[X_PROMOTED_DEMOTED:%.*]] = trunc i32 [[INC]] to i16 -// CHECK-SANITIZE-NEXT: [[SRC_INC_NEGATIVITYCHECK:%.*]] = icmp slt i32 [[INC]], 0, !nosanitize !2 +// CHECK-SANITIZE-NEXT: [[SRC_INC_NEGATIVITYCHECK:%.*]] = icmp slt i32 [[INC]], 0, !nosanitize // CHECK-SANITIZE-NEXT: [[SIGNCHANGECHECK:%.*]] = icmp eq i1 [[SRC_INC_NEGATIVITYCHECK]], false, !nosanitize // CHECK-SANITIZE-NEXT: br i1 [[SIGNCHANGECHECK]], label %[[CONT:.*]], label %[[HANDLER_IMPLICIT_X_PROMOTEDERSION:[^,]+]],{{.*}} !nosanitize // CHECK-SANITIZE: [[HANDLER_IMPLICIT_X_PROMOTEDERSION]]: @@ -177,8 +177,8 @@ // CHECK-SANITIZE-NEXT: [[X_PROMOTED:%.*]] = sext i16 [[X_RELOADED]] to i32 // CHECK-SANITIZE-NEXT: [[INC:%.*]] = add i32 [[X_PROMOTED]], 1 // CHECK-SANITIZE-NEXT: [[X_PROMOTED_DEMOTED:%.*]] = trunc i32 [[INC]] to i16 -// CHECK-SANITIZE-NEXT: [[SRC_INC_NEGATIVITYCHECK:%.*]] = icmp slt i32 [[INC]], 0, !nosanitize !2 -// CHECK-SANITIZE-NEXT: [[DST_NEGATIVITYCHECK:%.*]] = icmp slt i16 [[X_PROMOTED_DEMOTED]], 0, !nosanitize !2 +// CHECK-SANITIZE-NEXT: [[SRC_INC_NEGATIVITYCHECK:%.*]] = icmp slt i32 [[INC]], 0, !nosanitize +// CHECK-SANITIZE-NEXT: [[DST_NEGATIVITYCHECK:%.*]] = icmp slt i16 [[X_PROMOTED_DEMOTED]], 0, !nosanitize // CHECK-SANITIZE-NEXT: [[SIGNCHANGECHECK:%.*]] = icmp eq i1 [[SRC_INC_NEGATIVITYCHECK]], [[DST_NEGATIVITYCHECK]], !nosanitize // CHECK-SANITIZE-NEXT: br i1 [[SIGNCHANGECHECK]], label %[[CONT:.*]], label %[[HANDLER_IMPLICIT_X_PROMOTEDERSION:[^,]+]],{{.*}} !nosanitize // CHECK-SANITIZE: [[HANDLER_IMPLICIT_X_PROMOTEDERSION]]: @@ -213,8 +213,8 @@ // CHECK-SANITIZE-NEXT: [[X_PROMOTED:%.*]] = sext i16 [[X_RELOADED]] to i32 // CHECK-SANITIZE-NEXT: [[INC:%.*]] = add i32 [[X_PROMOTED]], -1 // CHECK-SANITIZE-NEXT: [[X_PROMOTED_DEMOTED:%.*]] = trunc i32 [[INC]] to i16 -// CHECK-SANITIZE-NEXT: [[SRC_INC_NEGATIVITYCHECK:%.*]] = icmp slt i32 [[INC]], 0, !nosanitize !2 -// CHECK-SANITIZE-NEXT: [[DST_NEGATIVITYCHECK:%.*]] = icmp slt i16 [[X_PROMOTED_DEMOTED]], 0, !nosanitize !2 +// CHECK-SANITIZE-NEXT: [[SRC_INC_NEGATIVITYCHECK:%.*]] = icmp slt i32 [[INC]], 0, !nosanitize +// CHECK-SANITIZE-NEXT: [[DST_NEGATIVITYCHECK:%.*]] = icmp slt i16 [[X_PROMOTED_DEMOTED]], 0, !nosanitize // CHECK-SANITIZE-NEXT: [[SIGNCHANGECHECK:%.*]] = icmp eq i1 [[SRC_INC_NEGATIVITYCHECK]], [[DST_NEGATIVITYCHECK]], !nosanitize // CHECK-SANITIZE-NEXT: br i1 [[SIGNCHANGECHECK]], label %[[CONT:.*]], label %[[HANDLER_IMPLICIT_X_PROMOTEDERSION:[^,]+]],{{.*}} !nosanitize // CHECK-SANITIZE: [[HANDLER_IMPLICIT_X_PROMOTEDERSION]]: @@ -250,8 +250,8 @@ // CHECK-SANITIZE-NEXT: [[X_PROMOTED:%.*]] = sext i16 [[X_RELOADED]] to i32 // CHECK-SANITIZE-NEXT: [[INC:%.*]] = add i32 [[X_PROMOTED]], 1 // CHECK-SANITIZE-NEXT: [[X_PROMOTED_DEMOTED:%.*]] = trunc i32 [[INC]] to i16 -// CHECK-SANITIZE-NEXT: [[SRC_INC_NEGATIVITYCHECK:%.*]] = icmp slt i32 [[INC]], 0, !nosanitize !2 -// CHECK-SANITIZE-NEXT: [[DST_NEGATIVITYCHECK:%.*]] = icmp slt i16 [[X_PROMOTED_DEMOTED]], 0, !nosanitize !2 +// CHECK-SANITIZE-NEXT: [[SRC_INC_NEGATIVITYCHECK:%.*]] = icmp slt i32 [[INC]], 0, !nosanitize +// CHECK-SANITIZE-NEXT: [[DST_NEGATIVITYCHECK:%.*]] = icmp slt i16 [[X_PROMOTED_DEMOTED]], 0, !nosanitize // CHECK-SANITIZE-NEXT: [[SIGNCHANGECHECK:%.*]] = icmp eq i1 [[SRC_INC_NEGATIVITYCHECK]], [[DST_NEGATIVITYCHECK]], !nosanitize // CHECK-SANITIZE-NEXT: br i1 [[SIGNCHANGECHECK]], label %[[CONT:.*]], label %[[HANDLER_IMPLICIT_X_PROMOTEDERSION:[^,]+]],{{.*}} !nosanitize // CHECK-SANITIZE: [[HANDLER_IMPLICIT_X_PROMOTEDERSION]]: @@ -287,8 +287,8 @@ // CHECK-SANITIZE-NEXT: [[X_PROMOTED:%.*]] = sext i16 [[X_RELOADED]] to i32 // CHECK-SANITIZE-NEXT: [[INC:%.*]] = add i32 [[X_PROMOTED]], -1 // CHECK-SANITIZE-NEXT: [[X_PROMOTED_DEMOTED:%.*]] = trunc i32 [[INC]] to i16 -// CHECK-SANITIZE-NEXT: [[SRC_INC_NEGATIVITYCHECK:%.*]] = icmp slt i32 [[INC]], 0, !nosanitize !2 -// CHECK-SANITIZE-NEXT: [[DST_NEGATIVITYCHECK:%.*]] = icmp slt i16 [[X_PROMOTED_DEMOTED]], 0, !nosanitize !2 +// CHECK-SANITIZE-NEXT: [[SRC_INC_NEGATIVITYCHECK:%.*]] = icmp slt i32 [[INC]], 0, !nosanitize +// CHECK-SANITIZE-NEXT: [[DST_NEGATIVITYCHECK:%.*]] = icmp slt i16 [[X_PROMOTED_DEMOTED]], 0, !nosanitize // CHECK-SANITIZE-NEXT: [[SIGNCHANGECHECK:%.*]] = icmp eq i1 [[SRC_INC_NEGATIVITYCHECK]], [[DST_NEGATIVITYCHECK]], !nosanitize // CHECK-SANITIZE-NEXT: br i1 [[SIGNCHANGECHECK]], label %[[CONT:.*]], label %[[HANDLER_IMPLICIT_X_PROMOTEDERSION:[^,]+]],{{.*}} !nosanitize // CHECK-SANITIZE: [[HANDLER_IMPLICIT_X_PROMOTEDERSION]]: diff --git a/clang/test/CodeGen/catch-implicit-integer-sign-changes.c b/clang/test/CodeGen/catch-implicit-integer-sign-changes.c --- a/clang/test/CodeGen/catch-implicit-integer-sign-changes.c +++ b/clang/test/CodeGen/catch-implicit-integer-sign-changes.c @@ -1,7 +1,7 @@ -// RUN: %clang_cc1 -emit-llvm %s -o - -triple x86_64-linux-gnu | FileCheck %s --check-prefix=CHECK -// RUN: %clang_cc1 -fsanitize=implicit-integer-sign-change -fno-sanitize-recover=implicit-integer-sign-change -emit-llvm %s -o - -triple x86_64-linux-gnu | FileCheck %s -implicit-check-not="call void @__ubsan_handle_implicit_conversion" --check-prefixes=CHECK,CHECK-SANITIZE,CHECK-SANITIZE-ANYRECOVER,CHECK-SANITIZE-NORECOVER,CHECK-SANITIZE-UNREACHABLE -// RUN: %clang_cc1 -fsanitize=implicit-integer-sign-change -fsanitize-recover=implicit-integer-sign-change -emit-llvm %s -o - -triple x86_64-linux-gnu | FileCheck %s -implicit-check-not="call void @__ubsan_handle_implicit_conversion" --check-prefixes=CHECK,CHECK-SANITIZE,CHECK-SANITIZE-ANYRECOVER,CHECK-SANITIZE-RECOVER -// RUN: %clang_cc1 -fsanitize=implicit-integer-sign-change -fsanitize-trap=implicit-integer-sign-change -emit-llvm %s -o - -triple x86_64-linux-gnu | FileCheck %s -implicit-check-not="call void @__ubsan_handle_implicit_conversion" --check-prefixes=CHECK,CHECK-SANITIZE,CHECK-SANITIZE-TRAP,CHECK-SANITIZE-UNREACHABLE +// RUN: %clang_cc1 -disable-frozen-args -emit-llvm %s -o - -triple x86_64-linux-gnu | FileCheck %s --check-prefix=CHECK +// RUN: %clang_cc1 -disable-frozen-args -fsanitize=implicit-integer-sign-change -fno-sanitize-recover=implicit-integer-sign-change -emit-llvm %s -o - -triple x86_64-linux-gnu | FileCheck %s -implicit-check-not="call void @__ubsan_handle_implicit_conversion" --check-prefixes=CHECK,CHECK-SANITIZE,CHECK-SANITIZE-ANYRECOVER,CHECK-SANITIZE-NORECOVER,CHECK-SANITIZE-UNREACHABLE +// RUN: %clang_cc1 -disable-frozen-args -fsanitize=implicit-integer-sign-change -fsanitize-recover=implicit-integer-sign-change -emit-llvm %s -o - -triple x86_64-linux-gnu | FileCheck %s -implicit-check-not="call void @__ubsan_handle_implicit_conversion" --check-prefixes=CHECK,CHECK-SANITIZE,CHECK-SANITIZE-ANYRECOVER,CHECK-SANITIZE-RECOVER +// RUN: %clang_cc1 -disable-frozen-args -fsanitize=implicit-integer-sign-change -fsanitize-trap=implicit-integer-sign-change -emit-llvm %s -o - -triple x86_64-linux-gnu | FileCheck %s -implicit-check-not="call void @__ubsan_handle_implicit_conversion" --check-prefixes=CHECK,CHECK-SANITIZE,CHECK-SANITIZE-TRAP,CHECK-SANITIZE-UNREACHABLE // CHECK-SANITIZE-ANYRECOVER: @[[UNSIGNED_INT:.*]] = {{.*}} c"'unsigned int'\00" } // CHECK-SANITIZE-ANYRECOVER-NEXT: @[[SIGNED_INT:.*]] = {{.*}} c"'int'\00" } diff --git a/clang/test/CodeGen/catch-implicit-signed-integer-truncation-or-sign-change.c b/clang/test/CodeGen/catch-implicit-signed-integer-truncation-or-sign-change.c --- a/clang/test/CodeGen/catch-implicit-signed-integer-truncation-or-sign-change.c +++ b/clang/test/CodeGen/catch-implicit-signed-integer-truncation-or-sign-change.c @@ -1,7 +1,7 @@ -// RUN: %clang_cc1 -emit-llvm %s -o - -triple x86_64-linux-gnu | FileCheck %s --check-prefix=CHECK -// RUN: %clang_cc1 -fsanitize=implicit-signed-integer-truncation,implicit-integer-sign-change -fno-sanitize-recover=implicit-signed-integer-truncation,implicit-integer-sign-change -emit-llvm %s -o - -triple x86_64-linux-gnu | FileCheck %s -implicit-check-not="call void @__ubsan_handle_implicit_conversion" --check-prefixes=CHECK,CHECK-SANITIZE,CHECK-SANITIZE-ANYRECOVER,CHECK-SANITIZE-NORECOVER,CHECK-SANITIZE-UNREACHABLE -// RUN: %clang_cc1 -fsanitize=implicit-signed-integer-truncation,implicit-integer-sign-change -fsanitize-recover=implicit-signed-integer-truncation,implicit-integer-sign-change -emit-llvm %s -o - -triple x86_64-linux-gnu | FileCheck %s -implicit-check-not="call void @__ubsan_handle_implicit_conversion" --check-prefixes=CHECK,CHECK-SANITIZE,CHECK-SANITIZE-ANYRECOVER,CHECK-SANITIZE-RECOVER -// RUN: %clang_cc1 -fsanitize=implicit-signed-integer-truncation,implicit-integer-sign-change -fsanitize-trap=implicit-signed-integer-truncation,implicit-integer-sign-change -emit-llvm %s -o - -triple x86_64-linux-gnu | FileCheck %s -implicit-check-not="call void @__ubsan_handle_implicit_conversion" --check-prefixes=CHECK,CHECK-SANITIZE,CHECK-SANITIZE-TRAP,CHECK-SANITIZE-UNREACHABLE +// RUN: %clang_cc1 -disable-frozen-args -emit-llvm %s -o - -triple x86_64-linux-gnu | FileCheck %s --check-prefix=CHECK +// RUN: %clang_cc1 -disable-frozen-args -fsanitize=implicit-signed-integer-truncation,implicit-integer-sign-change -fno-sanitize-recover=implicit-signed-integer-truncation,implicit-integer-sign-change -emit-llvm %s -o - -triple x86_64-linux-gnu | FileCheck %s -implicit-check-not="call void @__ubsan_handle_implicit_conversion" --check-prefixes=CHECK,CHECK-SANITIZE,CHECK-SANITIZE-ANYRECOVER,CHECK-SANITIZE-NORECOVER,CHECK-SANITIZE-UNREACHABLE +// RUN: %clang_cc1 -disable-frozen-args -fsanitize=implicit-signed-integer-truncation,implicit-integer-sign-change -fsanitize-recover=implicit-signed-integer-truncation,implicit-integer-sign-change -emit-llvm %s -o - -triple x86_64-linux-gnu | FileCheck %s -implicit-check-not="call void @__ubsan_handle_implicit_conversion" --check-prefixes=CHECK,CHECK-SANITIZE,CHECK-SANITIZE-ANYRECOVER,CHECK-SANITIZE-RECOVER +// RUN: %clang_cc1 -disable-frozen-args -fsanitize=implicit-signed-integer-truncation,implicit-integer-sign-change -fsanitize-trap=implicit-signed-integer-truncation,implicit-integer-sign-change -emit-llvm %s -o - -triple x86_64-linux-gnu | FileCheck %s -implicit-check-not="call void @__ubsan_handle_implicit_conversion" --check-prefixes=CHECK,CHECK-SANITIZE,CHECK-SANITIZE-TRAP,CHECK-SANITIZE-UNREACHABLE // CHECK-SANITIZE-ANYRECOVER: @[[UNSIGNED_INT:.*]] = {{.*}} c"'unsigned int'\00" } // CHECK-SANITIZE-ANYRECOVER-NEXT: @[[SIGNED_CHAR:.*]] = {{.*}} c"'signed char'\00" } diff --git a/clang/test/CodeGen/catch-nullptr-and-nonzero-offset-in-offsetof-idiom.c b/clang/test/CodeGen/catch-nullptr-and-nonzero-offset-in-offsetof-idiom.c --- a/clang/test/CodeGen/catch-nullptr-and-nonzero-offset-in-offsetof-idiom.c +++ b/clang/test/CodeGen/catch-nullptr-and-nonzero-offset-in-offsetof-idiom.c @@ -14,7 +14,7 @@ int x, y; }; -// CHECK-LABEL: define i64 @{{.*}}get_offset_of_y_naively{{.*}}( +// CHECK-LABEL: define frozen i64 @{{.*}}get_offset_of_y_naively{{.*}}( uintptr_t get_offset_of_y_naively() { // CHECK: [[ENTRY:.*]]: // CHECK-NEXT: ret i64 ptrtoint (i32* getelementptr (i32, i32* null, i32 1) to i64) @@ -22,7 +22,7 @@ return ((uintptr_t)(&(((struct S *)0)->y))); } -// CHECK-LABEL: define i64 @{{.*}}get_offset_of_y_via_builtin{{.*}}( +// CHECK-LABEL: define frozen i64 @{{.*}}get_offset_of_y_via_builtin{{.*}}( uintptr_t get_offset_of_y_via_builtin() { // CHECK: [[ENTRY:.*]]: // CHECK-NEXT: ret i64 4 diff --git a/clang/test/CodeGen/catch-nullptr-and-nonzero-offset-when-nullptr-is-defined.c b/clang/test/CodeGen/catch-nullptr-and-nonzero-offset-when-nullptr-is-defined.c --- a/clang/test/CodeGen/catch-nullptr-and-nonzero-offset-when-nullptr-is-defined.c +++ b/clang/test/CodeGen/catch-nullptr-and-nonzero-offset-when-nullptr-is-defined.c @@ -25,7 +25,7 @@ #endif char *add_unsigned(char *base, unsigned long offset) { - // CHECK: define i8* @add_unsigned(i8* %[[BASE:.*]], i64 %[[OFFSET:.*]]) + // CHECK: define frozen i8* @add_unsigned(i8* frozen %[[BASE:.*]], i64 frozen %[[OFFSET:.*]]) // CHECK-NEXT: [[ENTRY:.*]]: // CHECK-NEXT: %[[BASE_ADDR:.*]] = alloca i8*, align 8 // CHECK-NEXT: %[[OFFSET_ADDR:.*]] = alloca i64, align 8 diff --git a/clang/test/CodeGen/catch-nullptr-and-nonzero-offset.c b/clang/test/CodeGen/catch-nullptr-and-nonzero-offset.c --- a/clang/test/CodeGen/catch-nullptr-and-nonzero-offset.c +++ b/clang/test/CodeGen/catch-nullptr-and-nonzero-offset.c @@ -41,7 +41,7 @@ #endif char *var_var(char *base, unsigned long offset) { - // CHECK: define i8* @var_var(i8* %[[BASE:.*]], i64 %[[OFFSET:.*]]) + // CHECK: define frozen i8* @var_var(i8* frozen %[[BASE:.*]], i64 frozen %[[OFFSET:.*]]) // CHECK-NEXT: [[ENTRY:.*]]: // CHECK-NEXT: %[[BASE_ADDR:.*]] = alloca i8*, align 8 // CHECK-NEXT: %[[OFFSET_ADDR:.*]] = alloca i64, align 8 @@ -76,7 +76,7 @@ } char *var_zero(char *base) { - // CHECK: define i8* @var_zero(i8* %[[BASE:.*]]) + // CHECK: define frozen i8* @var_zero(i8* frozen %[[BASE:.*]]) // CHECK-NEXT: [[ENTRY:.*]]: // CHECK-NEXT: %[[BASE_ADDR:.*]] = alloca i8*, align 8 // CHECK-NEXT: store i8* %[[BASE]], i8** %[[BASE_ADDR]], align 8 @@ -103,7 +103,7 @@ } char *var_one(char *base) { - // CHECK: define i8* @var_one(i8* %[[BASE:.*]]) + // CHECK: define frozen i8* @var_one(i8* frozen %[[BASE:.*]]) // CHECK-NEXT: [[ENTRY:.*]]: // CHECK-NEXT: %[[BASE_ADDR:.*]] = alloca i8*, align 8 // CHECK-NEXT: store i8* %[[BASE]], i8** %[[BASE_ADDR]], align 8 @@ -131,7 +131,7 @@ } char *var_allones(char *base) { - // CHECK: define i8* @var_allones(i8* %[[BASE:.*]]) + // CHECK: define frozen i8* @var_allones(i8* frozen %[[BASE:.*]]) // CHECK-NEXT: [[ENTRY:.*]]: // CHECK-NEXT: %[[BASE_ADDR:.*]] = alloca i8*, align 8 // CHECK-NEXT: store i8* %[[BASE]], i8** %[[BASE_ADDR]], align 8 @@ -161,7 +161,7 @@ //------------------------------------------------------------------------------ char *nullptr_var(unsigned long offset) { - // CHECK: define i8* @nullptr_var(i64 %[[OFFSET:.*]]) + // CHECK: define frozen i8* @nullptr_var(i64 frozen %[[OFFSET:.*]]) // CHECK-NEXT: [[ENTRY:.*]]: // CHECK-NEXT: %[[OFFSET_ADDR:.*]] = alloca i64, align 8 // CHECK-NEXT: store i64 %[[OFFSET]], i64* %[[OFFSET_ADDR]], align 8 @@ -192,7 +192,7 @@ } char *nullptr_zero() { - // CHECK: define i8* @nullptr_zero() + // CHECK: define frozen i8* @nullptr_zero() // CHECK-NEXT: [[ENTRY:.*]]: // CHECK-SANITIZE-C-NEXT: br i1 false, label %[[CONT:.*]], label %[[HANDLER_POINTER_OVERFLOW:[^,]+]],{{.*}} !nosanitize // CHECK-SANITIZE-C: [[HANDLER_POINTER_OVERFLOW]]: @@ -209,7 +209,7 @@ } char *nullptr_one_BAD() { - // CHECK: define i8* @nullptr_one_BAD() + // CHECK: define frozen i8* @nullptr_one_BAD() // CHECK-NEXT: [[ENTRY:.*]]: // CHECK-SANITIZE-C-NEXT: br i1 false, label %[[CONT:.*]], label %[[HANDLER_POINTER_OVERFLOW:[^,]+]],{{.*}} !nosanitize // CHECK-SANITIZE-CPP-NEXT: br i1 icmp eq (i64 ptrtoint (i8* getelementptr inbounds (i8, i8* null, i64 1) to i64), i64 0), label %[[CONT:.*]], label %[[HANDLER_POINTER_OVERFLOW:[^,]+]],{{.*}} !nosanitize @@ -227,7 +227,7 @@ } char *nullptr_allones_BAD() { - // CHECK: define i8* @nullptr_allones_BAD() + // CHECK: define frozen i8* @nullptr_allones_BAD() // CHECK-NEXT: [[ENTRY:.*]]: // CHECK-SANITIZE-C-NEXT: br i1 false, label %[[CONT:.*]], label %[[HANDLER_POINTER_OVERFLOW:[^,]+]],{{.*}} !nosanitize // CHECK-SANITIZE-CPP-NEXT: br i1 icmp eq (i64 mul (i64 ptrtoint (i8* getelementptr (i8, i8* null, i32 1) to i64), i64 -1), i64 0), label %[[CONT:.*]], label %[[HANDLER_POINTER_OVERFLOW:[^,]+]],{{.*}} !nosanitize @@ -247,7 +247,7 @@ //------------------------------------------------------------------------------ char *one_var(unsigned long offset) { - // CHECK: define i8* @one_var(i64 %[[OFFSET:.*]]) + // CHECK: define frozen i8* @one_var(i64 frozen %[[OFFSET:.*]]) // CHECK-NEXT: [[ENTRY:.*]]: // CHECK-NEXT: %[[OFFSET_ADDR:.*]] = alloca i64, align 8 // CHECK-NEXT: store i64 %[[OFFSET]], i64* %[[OFFSET_ADDR]], align 8 @@ -278,7 +278,7 @@ } char *one_zero() { - // CHECK: define i8* @one_zero() + // CHECK: define frozen i8* @one_zero() // CHECK-NEXT: [[ENTRY:.*]]: // CHECK-SANITIZE-C-NEXT: br i1 icmp ne (i8* inttoptr (i64 1 to i8*), i8* null), label %[[CONT:.*]], label %[[HANDLER_POINTER_OVERFLOW:[^,]+]],{{.*}} !nosanitize // CHECK-SANITIZE-C: [[HANDLER_POINTER_OVERFLOW]]: @@ -295,7 +295,7 @@ } char *one_one_OK() { - // CHECK: define i8* @one_one_OK() + // CHECK: define frozen i8* @one_one_OK() // CHECK-NEXT: [[ENTRY:.*]]: // CHECK-SANITIZE-C-NEXT: br i1 and (i1 icmp ne (i8* inttoptr (i64 1 to i8*), i8* null), i1 icmp ne (i64 add (i64 sub (i64 ptrtoint (i8* getelementptr inbounds (i8, i8* inttoptr (i64 1 to i8*), i64 1) to i64), i64 1), i64 1), i64 0)), label %[[CONT:.*]], label %[[HANDLER_POINTER_OVERFLOW:[^,]+]],{{.*}} !nosanitize // CHECK-SANITIZE-CPP-NEXT: br i1 xor (i1 icmp eq (i8* inttoptr (i64 1 to i8*), i8* null), i1 icmp ne (i64 add (i64 sub (i64 ptrtoint (i8* getelementptr inbounds (i8, i8* inttoptr (i64 1 to i8*), i64 1) to i64), i64 1), i64 1), i64 0)), label %[[CONT:.*]], label %[[HANDLER_POINTER_OVERFLOW:[^,]+]],{{.*}} !nosanitize @@ -313,7 +313,7 @@ } char *one_allones_BAD() { - // CHECK: define i8* @one_allones_BAD() + // CHECK: define frozen i8* @one_allones_BAD() // CHECK-NEXT: [[ENTRY:.*]]: // CHECK-SANITIZE-C-NEXT: br i1 and (i1 icmp ne (i8* inttoptr (i64 1 to i8*), i8* null), i1 icmp ne (i64 add (i64 sub (i64 ptrtoint (i8* getelementptr inbounds (i8, i8* inttoptr (i64 1 to i8*), i64 -1) to i64), i64 1), i64 1), i64 0)), label %[[CONT:.*]], label %[[HANDLER_POINTER_OVERFLOW:[^,]+]],{{.*}} !nosanitize // CHECK-SANITIZE-CPP-NEXT: br i1 xor (i1 icmp eq (i8* inttoptr (i64 1 to i8*), i8* null), i1 icmp ne (i64 add (i64 sub (i64 ptrtoint (i8* getelementptr inbounds (i8, i8* inttoptr (i64 1 to i8*), i64 -1) to i64), i64 1), i64 1), i64 0)), label %[[CONT:.*]], label %[[HANDLER_POINTER_OVERFLOW:[^,]+]],{{.*}} !nosanitize @@ -333,7 +333,7 @@ //------------------------------------------------------------------------------ char *allones_var(unsigned long offset) { - // CHECK: define i8* @allones_var(i64 %[[OFFSET:.*]]) + // CHECK: define frozen i8* @allones_var(i64 frozen %[[OFFSET:.*]]) // CHECK-NEXT: [[ENTRY:.*]]: // CHECK-NEXT: %[[OFFSET_ADDR:.*]] = alloca i64, align 8 // CHECK-NEXT: store i64 %[[OFFSET]], i64* %[[OFFSET_ADDR]], align 8 @@ -364,7 +364,7 @@ } char *allones_zero_OK() { - // CHECK: define i8* @allones_zero_OK() + // CHECK: define frozen i8* @allones_zero_OK() // CHECK-NEXT: [[ENTRY:.*]]: // CHECK-SANITIZE-C-NEXT: br i1 icmp ne (i8* inttoptr (i64 -1 to i8*), i8* null), label %[[CONT:.*]], label %[[HANDLER_POINTER_OVERFLOW:[^,]+]],{{.*}} !nosanitize // CHECK-SANITIZE-C: [[HANDLER_POINTER_OVERFLOW]]: @@ -381,7 +381,7 @@ } char *allones_one_BAD() { - // CHECK: define i8* @allones_one_BAD() + // CHECK: define frozen i8* @allones_one_BAD() // CHECK-NEXT: [[ENTRY:.*]]: // CHECK-SANITIZE-C-NEXT: br i1 and (i1 icmp ne (i8* inttoptr (i64 -1 to i8*), i8* null), i1 icmp ne (i64 add (i64 sub (i64 ptrtoint (i8* getelementptr inbounds (i8, i8* inttoptr (i64 -1 to i8*), i64 1) to i64), i64 -1), i64 -1), i64 0)), label %[[CONT:.*]], label %[[HANDLER_POINTER_OVERFLOW:[^,]+]],{{.*}} !nosanitize // CHECK-SANITIZE-CPP-NEXT: br i1 xor (i1 icmp eq (i8* inttoptr (i64 -1 to i8*), i8* null), i1 icmp ne (i64 add (i64 sub (i64 ptrtoint (i8* getelementptr inbounds (i8, i8* inttoptr (i64 -1 to i8*), i64 1) to i64), i64 -1), i64 -1), i64 0)), label %[[CONT:.*]], label %[[HANDLER_POINTER_OVERFLOW:[^,]+]],{{.*}} !nosanitize @@ -399,7 +399,7 @@ } char *allones_allones_OK() { - // CHECK: define i8* @allones_allones_OK() + // CHECK: define frozen i8* @allones_allones_OK() // CHECK-NEXT: [[ENTRY:.*]]: // CHECK-SANITIZE-C-NEXT: br i1 and (i1 icmp ne (i8* inttoptr (i64 -1 to i8*), i8* null), i1 icmp ne (i64 add (i64 sub (i64 ptrtoint (i8* getelementptr inbounds (i8, i8* inttoptr (i64 -1 to i8*), i64 -1) to i64), i64 -1), i64 -1), i64 0)), label %[[CONT:.*]], label %[[HANDLER_POINTER_OVERFLOW:[^,]+]],{{.*}} !nosanitize // CHECK-SANITIZE-CPP-NEXT: br i1 xor (i1 icmp eq (i8* inttoptr (i64 -1 to i8*), i8* null), i1 icmp ne (i64 add (i64 sub (i64 ptrtoint (i8* getelementptr inbounds (i8, i8* inttoptr (i64 -1 to i8*), i64 -1) to i64), i64 -1), i64 -1), i64 0)), label %[[CONT:.*]], label %[[HANDLER_POINTER_OVERFLOW:[^,]+]],{{.*}} !nosanitize diff --git a/clang/test/CodeGen/catch-pointer-overflow-volatile.c b/clang/test/CodeGen/catch-pointer-overflow-volatile.c --- a/clang/test/CodeGen/catch-pointer-overflow-volatile.c +++ b/clang/test/CodeGen/catch-pointer-overflow-volatile.c @@ -15,7 +15,7 @@ #endif char *volatile_ptr(char *volatile base, unsigned long offset) { - // CHECK: define i8* @volatile_ptr(i8* %[[BASE:.*]], i64 %[[OFFSET:.*]]) + // CHECK: define frozen i8* @volatile_ptr(i8* frozen %[[BASE:.*]], i64 frozen %[[OFFSET:.*]]) // CHECK-NEXT: [[ENTRY:.*]]: // CHECK-NEXT: %[[BASE_ADDR:.*]] = alloca i8*, align 8 // CHECK-NEXT: %[[OFFSET_ADDR:.*]] = alloca i64, align 8 diff --git a/clang/test/CodeGen/catch-pointer-overflow.c b/clang/test/CodeGen/catch-pointer-overflow.c --- a/clang/test/CodeGen/catch-pointer-overflow.c +++ b/clang/test/CodeGen/catch-pointer-overflow.c @@ -22,7 +22,7 @@ #endif char *add_unsigned(char *base, unsigned long offset) { - // CHECK: define i8* @add_unsigned(i8* %[[BASE:.*]], i64 %[[OFFSET:.*]]) + // CHECK: define frozen i8* @add_unsigned(i8* frozen %[[BASE:.*]], i64 frozen %[[OFFSET:.*]]) // CHECK-NEXT: [[ENTRY:.*]]: // CHECK-NEXT: %[[BASE_ADDR:.*]] = alloca i8*, align 8 // CHECK-NEXT: %[[OFFSET_ADDR:.*]] = alloca i64, align 8 @@ -57,7 +57,7 @@ } char *sub_unsigned(char *base, unsigned long offset) { - // CHECK: define i8* @sub_unsigned(i8* %[[BASE:.*]], i64 %[[OFFSET:.*]]) + // CHECK: define frozen i8* @sub_unsigned(i8* frozen %[[BASE:.*]], i64 frozen %[[OFFSET:.*]]) // CHECK-NEXT: [[ENTRY:.*]]: // CHECK-NEXT: %[[BASE_ADDR:.*]] = alloca i8*, align 8 // CHECK-NEXT: %[[OFFSET_ADDR:.*]] = alloca i64, align 8 @@ -93,7 +93,7 @@ } char *add_signed(char *base, signed long offset) { - // CHECK: define i8* @add_signed(i8* %[[BASE:.*]], i64 %[[OFFSET:.*]]) + // CHECK: define frozen i8* @add_signed(i8* frozen %[[BASE:.*]], i64 frozen %[[OFFSET:.*]]) // CHECK-NEXT: [[ENTRY:.*]]: // CHECK-NEXT: %[[BASE_ADDR:.*]] = alloca i8*, align 8 // CHECK-NEXT: %[[OFFSET_ADDR:.*]] = alloca i64, align 8 @@ -131,7 +131,7 @@ } char *sub_signed(char *base, signed long offset) { - // CHECK: define i8* @sub_signed(i8* %[[BASE:.*]], i64 %[[OFFSET:.*]]) + // CHECK: define frozen i8* @sub_signed(i8* frozen %[[BASE:.*]], i64 frozen %[[OFFSET:.*]]) // CHECK-NEXT: [[ENTRY:.*]]: // CHECK-NEXT: %[[BASE_ADDR:.*]] = alloca i8*, align 8 // CHECK-NEXT: %[[OFFSET_ADDR:.*]] = alloca i64, align 8 @@ -170,7 +170,7 @@ } char *postinc(char *base) { - // CHECK: define i8* @postinc(i8* %[[BASE:.*]]) + // CHECK: define frozen i8* @postinc(i8* frozen %[[BASE:.*]]) // CHECK-NEXT: [[ENTRY:.*]]: // CHECK-NEXT: %[[BASE_ADDR:.*]] = alloca i8*, align 8 // CHECK-NEXT: store i8* %[[BASE]], i8** %[[BASE_ADDR]], align 8 @@ -200,7 +200,7 @@ } char *postdec(char *base) { - // CHECK: define i8* @postdec(i8* %[[BASE:.*]]) + // CHECK: define frozen i8* @postdec(i8* frozen %[[BASE:.*]]) // CHECK-NEXT: [[ENTRY:.*]]: // CHECK-NEXT: %[[BASE_ADDR:.*]] = alloca i8*, align 8 // CHECK-NEXT: store i8* %[[BASE]], i8** %[[BASE_ADDR]], align 8 @@ -230,7 +230,7 @@ } char *preinc(char *base) { - // CHECK: define i8* @preinc(i8* %[[BASE:.*]]) + // CHECK: define frozen i8* @preinc(i8* frozen %[[BASE:.*]]) // CHECK-NEXT: [[ENTRY:.*]]: // CHECK-NEXT: %[[BASE_ADDR:.*]] = alloca i8*, align 8 // CHECK-NEXT: store i8* %[[BASE]], i8** %[[BASE_ADDR]], align 8 @@ -260,7 +260,7 @@ } char *predec(char *base) { - // CHECK: define i8* @predec(i8* %[[BASE:.*]]) + // CHECK: define frozen i8* @predec(i8* frozen %[[BASE:.*]]) // CHECK-NEXT: [[ENTRY:.*]]: // CHECK-NEXT: %[[BASE_ADDR:.*]] = alloca i8*, align 8 // CHECK-NEXT: store i8* %[[BASE]], i8** %[[BASE_ADDR]], align 8 diff --git a/clang/test/CodeGen/cfi-check-fail.c b/clang/test/CodeGen/cfi-check-fail.c --- a/clang/test/CodeGen/cfi-check-fail.c +++ b/clang/test/CodeGen/cfi-check-fail.c @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -triple x86_64-unknown-linux -O0 -fsanitize-cfi-cross-dso \ +// RUN: %clang_cc1 -disable-frozen-args -triple x86_64-unknown-linux -O0 -fsanitize-cfi-cross-dso \ // RUN: -fsanitize=cfi-icall,cfi-nvcall,cfi-vcall,cfi-unrelated-cast,cfi-derived-cast \ // RUN: -fsanitize-trap=cfi-icall,cfi-nvcall -fsanitize-recover=cfi-vcall,cfi-unrelated-cast \ // RUN: -emit-llvm -o - %s | FileCheck %s diff --git a/clang/test/CodeGen/cfi-check-fail2.c b/clang/test/CodeGen/cfi-check-fail2.c --- a/clang/test/CodeGen/cfi-check-fail2.c +++ b/clang/test/CodeGen/cfi-check-fail2.c @@ -13,7 +13,7 @@ f(); } -// CHECK: define weak_odr hidden void @__cfi_check_fail(i8* %0, i8* %1) +// CHECK: define weak_odr hidden void @__cfi_check_fail(i8* frozen %0, i8* frozen %1) // CHECK: store i8* %0, i8** %[[ALLOCA0:.*]], align 8 // CHECK: store i8* %1, i8** %[[ALLOCA1:.*]], align 8 // CHECK: %[[DATA:.*]] = load i8*, i8** %[[ALLOCA0]], align 8 diff --git a/clang/test/CodeGen/cfi-icall-generalize.c b/clang/test/CodeGen/cfi-icall-generalize.c --- a/clang/test/CodeGen/cfi-icall-generalize.c +++ b/clang/test/CodeGen/cfi-icall-generalize.c @@ -4,7 +4,7 @@ // Test that const char* is generalized to const void* and that const char** is // generalized to void* -// CHECK: define i32** @f({{.*}} !type [[TYPE:![0-9]+]] !type [[TYPE_GENERALIZED:![0-9]+]] +// CHECK: define frozen i32** @f({{.*}} !type [[TYPE:![0-9]+]] !type [[TYPE_GENERALIZED:![0-9]+]] int** f(const char *a, const char **b) { return (int**)0; } diff --git a/clang/test/CodeGen/cleanup-destslot-simple.c b/clang/test/CodeGen/cleanup-destslot-simple.c --- a/clang/test/CodeGen/cleanup-destslot-simple.c +++ b/clang/test/CodeGen/cleanup-destslot-simple.c @@ -7,7 +7,7 @@ // There is no exception to handle here, lifetime.end is not a destructor, // so there is no need have cleanup dest slot related code -// CHECK-LABEL: define i32 @test +// CHECK-LABEL: define frozen i32 @test int test() { int x = 3; int *volatile p = &x; diff --git a/clang/test/CodeGen/cmse-clear-arg.c b/clang/test/CodeGen/cmse-clear-arg.c --- a/clang/test/CodeGen/cmse-clear-arg.c +++ b/clang/test/CodeGen/cmse-clear-arg.c @@ -1,12 +1,12 @@ -// RUN: %clang_cc1 -triple thumbv8m.main -O0 -mcmse -S -emit-llvm %s -o - | \ +// RUN: %clang_cc1 -disable-frozen-args -triple thumbv8m.main -O0 -mcmse -S -emit-llvm %s -o - | \ // RUN: FileCheck %s --check-prefixes=CHECK,CHECK-LE,CHECK-SOFTFP -// RUN: %clang_cc1 -triple thumbebv8m.main -O0 -mcmse -S -emit-llvm %s -o - | \ +// RUN: %clang_cc1 -disable-frozen-args -triple thumbebv8m.main -O0 -mcmse -S -emit-llvm %s -o - | \ // RUN: FileCheck %s --check-prefixes=CHECK,CHECK-BE,CHECK-SOFTFP -// RUN: %clang_cc1 -triple thumbv8m.main -O2 -mcmse -S -emit-llvm %s -o - | \ +// RUN: %clang_cc1 -disable-frozen-args -triple thumbv8m.main -O2 -mcmse -S -emit-llvm %s -o - | \ // RUN: FileCheck %s --check-prefixes=CHECK,CHECK-LE,CHECK-SOFTFP -// RUN: %clang_cc1 -triple thumbebv8m.main -O2 -mcmse -S -emit-llvm %s -o - | \ +// RUN: %clang_cc1 -disable-frozen-args -triple thumbebv8m.main -O2 -mcmse -S -emit-llvm %s -o - | \ // RUN: FileCheck %s --check-prefixes=CHECK,CHECK-BE,CHECK-SOFTFP -// RUN: %clang_cc1 -triple thumbv8m.main -O0 -mcmse -mfloat-abi hard \ +// RUN: %clang_cc1 -disable-frozen-args -triple thumbv8m.main -O0 -mcmse -mfloat-abi hard \ // RUN: -S -emit-llvm %s -o - | \ // RUN: FileCheck %s --check-prefixes=CHECK,CHECK-LE,CHECK-HARDFP diff --git a/clang/test/CodeGen/cmse-clear-fp16.c b/clang/test/CodeGen/cmse-clear-fp16.c --- a/clang/test/CodeGen/cmse-clear-fp16.c +++ b/clang/test/CodeGen/cmse-clear-fp16.c @@ -1,13 +1,13 @@ -// RUN: %clang_cc1 -triple thumbv8m.main -O0 -mcmse -S -emit-llvm \ +// RUN: %clang_cc1 -disable-frozen-args -triple thumbv8m.main -O0 -mcmse -S -emit-llvm \ // RUN: -fallow-half-arguments-and-returns %s -o - | \ // RUN: FileCheck %s --check-prefixes=CHECK,CHECK-NOPT-SOFT -// RUN: %clang_cc1 -triple thumbv8m.main -O2 -mcmse -S -emit-llvm \ +// RUN: %clang_cc1 -disable-frozen-args -triple thumbv8m.main -O2 -mcmse -S -emit-llvm \ // RUN: -fallow-half-arguments-and-returns %s -o - | \ // RUN: FileCheck %s --check-prefixes=CHECK,CHECK-OPT-SOFT -// RUN: %clang_cc1 -triple thumbv8m.main -O0 -mcmse -S -emit-llvm \ +// RUN: %clang_cc1 -disable-frozen-args -triple thumbv8m.main -O0 -mcmse -S -emit-llvm \ // RUN: -fallow-half-arguments-and-returns -mfloat-abi hard %s -o - | \ // RUN: FileCheck %s --check-prefixes=CHECK,CHECK-NOPT-HARD -// RUN: %clang_cc1 -triple thumbv8m.main -O2 -mcmse -S -emit-llvm \ +// RUN: %clang_cc1 -disable-frozen-args -triple thumbv8m.main -O2 -mcmse -S -emit-llvm \ // RUN: -fallow-half-arguments-and-returns -mfloat-abi hard %s -o - | \ // RUN: FileCheck %s --check-prefixes=CHECK,CHECK-OPT-HARD diff --git a/clang/test/CodeGen/complex-builtins.c b/clang/test/CodeGen/complex-builtins.c --- a/clang/test/CodeGen/complex-builtins.c +++ b/clang/test/CodeGen/complex-builtins.c @@ -6,102 +6,102 @@ void foo(float f) { __builtin_cabs(f); __builtin_cabsf(f); __builtin_cabsl(f); -// NO__ERRNO: declare double @cabs(double, double) [[READNONE:#[0-9]+]] -// NO__ERRNO: declare float @cabsf(<2 x float>) [[READNONE]] -// NO__ERRNO: declare x86_fp80 @cabsl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE:#[0-9]+]] -// HAS_ERRNO: declare double @cabs(double, double) [[NOT_READNONE:#[0-9]+]] -// HAS_ERRNO: declare float @cabsf(<2 x float>) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @cabsl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @cabs(double frozen, double frozen) [[READNONE:#[0-9]+]] +// NO__ERRNO: declare frozen float @cabsf(<2 x float> frozen) [[READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @cabsl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE:#[0-9]+]] +// HAS_ERRNO: declare frozen double @cabs(double frozen, double frozen) [[NOT_READNONE:#[0-9]+]] +// HAS_ERRNO: declare frozen float @cabsf(<2 x float> frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @cabsl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] __builtin_cacos(f); __builtin_cacosf(f); __builtin_cacosl(f); -// NO__ERRNO: declare { double, double } @cacos(double, double) [[READNONE]] -// NO__ERRNO: declare <2 x float> @cacosf(<2 x float>) [[READNONE]] -// NO__ERRNO: declare { x86_fp80, x86_fp80 } @cacosl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] -// HAS_ERRNO: declare { double, double } @cacos(double, double) [[NOT_READNONE]] -// HAS_ERRNO: declare <2 x float> @cacosf(<2 x float>) [[NOT_READNONE]] -// HAS_ERRNO: declare { x86_fp80, x86_fp80 } @cacosl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// NO__ERRNO: declare frozen { double, double } @cacos(double frozen, double frozen) [[READNONE]] +// NO__ERRNO: declare frozen <2 x float> @cacosf(<2 x float> frozen) [[READNONE]] +// NO__ERRNO: declare frozen { x86_fp80, x86_fp80 } @cacosl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { double, double } @cacos(double frozen, double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen <2 x float> @cacosf(<2 x float> frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { x86_fp80, x86_fp80 } @cacosl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] __builtin_cacosh(f); __builtin_cacoshf(f); __builtin_cacoshl(f); -// NO__ERRNO: declare { double, double } @cacosh(double, double) [[READNONE]] -// NO__ERRNO: declare <2 x float> @cacoshf(<2 x float>) [[READNONE]] -// NO__ERRNO: declare { x86_fp80, x86_fp80 } @cacoshl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] -// HAS_ERRNO: declare { double, double } @cacosh(double, double) [[NOT_READNONE]] -// HAS_ERRNO: declare <2 x float> @cacoshf(<2 x float>) [[NOT_READNONE]] -// HAS_ERRNO: declare { x86_fp80, x86_fp80 } @cacoshl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// NO__ERRNO: declare frozen { double, double } @cacosh(double frozen, double frozen) [[READNONE]] +// NO__ERRNO: declare frozen <2 x float> @cacoshf(<2 x float> frozen) [[READNONE]] +// NO__ERRNO: declare frozen { x86_fp80, x86_fp80 } @cacoshl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { double, double } @cacosh(double frozen, double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen <2 x float> @cacoshf(<2 x float> frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { x86_fp80, x86_fp80 } @cacoshl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] __builtin_carg(f); __builtin_cargf(f); __builtin_cargl(f); -// NO__ERRNO: declare double @carg(double, double) [[READNONE]] -// NO__ERRNO: declare float @cargf(<2 x float>) [[READNONE]] -// NO__ERRNO: declare x86_fp80 @cargl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] -// HAS_ERRNO: declare double @carg(double, double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @cargf(<2 x float>) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @cargl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @carg(double frozen, double frozen) [[READNONE]] +// NO__ERRNO: declare frozen float @cargf(<2 x float> frozen) [[READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @cargl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen double @carg(double frozen, double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @cargf(<2 x float> frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @cargl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] __builtin_casin(f); __builtin_casinf(f); __builtin_casinl(f); -// NO__ERRNO: declare { double, double } @casin(double, double) [[READNONE]] -// NO__ERRNO: declare <2 x float> @casinf(<2 x float>) [[READNONE]] -// NO__ERRNO: declare { x86_fp80, x86_fp80 } @casinl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] -// HAS_ERRNO: declare { double, double } @casin(double, double) [[NOT_READNONE]] -// HAS_ERRNO: declare <2 x float> @casinf(<2 x float>) [[NOT_READNONE]] -// HAS_ERRNO: declare { x86_fp80, x86_fp80 } @casinl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// NO__ERRNO: declare frozen { double, double } @casin(double frozen, double frozen) [[READNONE]] +// NO__ERRNO: declare frozen <2 x float> @casinf(<2 x float> frozen) [[READNONE]] +// NO__ERRNO: declare frozen { x86_fp80, x86_fp80 } @casinl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { double, double } @casin(double frozen, double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen <2 x float> @casinf(<2 x float> frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { x86_fp80, x86_fp80 } @casinl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] __builtin_casinh(f); __builtin_casinhf(f); __builtin_casinhl(f); -// NO__ERRNO: declare { double, double } @casinh(double, double) [[READNONE]] -// NO__ERRNO: declare <2 x float> @casinhf(<2 x float>) [[READNONE]] -// NO__ERRNO: declare { x86_fp80, x86_fp80 } @casinhl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] -// HAS_ERRNO: declare { double, double } @casinh(double, double) [[NOT_READNONE]] -// HAS_ERRNO: declare <2 x float> @casinhf(<2 x float>) [[NOT_READNONE]] -// HAS_ERRNO: declare { x86_fp80, x86_fp80 } @casinhl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// NO__ERRNO: declare frozen { double, double } @casinh(double frozen, double frozen) [[READNONE]] +// NO__ERRNO: declare frozen <2 x float> @casinhf(<2 x float> frozen) [[READNONE]] +// NO__ERRNO: declare frozen { x86_fp80, x86_fp80 } @casinhl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { double, double } @casinh(double frozen, double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen <2 x float> @casinhf(<2 x float> frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { x86_fp80, x86_fp80 } @casinhl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] __builtin_catan(f); __builtin_catanf(f); __builtin_catanl(f); -// NO__ERRNO: declare { double, double } @catan(double, double) [[READNONE]] -// NO__ERRNO: declare <2 x float> @catanf(<2 x float>) [[READNONE]] -// NO__ERRNO: declare { x86_fp80, x86_fp80 } @catanl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] -// HAS_ERRNO: declare { double, double } @catan(double, double) [[NOT_READNONE]] -// HAS_ERRNO: declare <2 x float> @catanf(<2 x float>) [[NOT_READNONE]] -// HAS_ERRNO: declare { x86_fp80, x86_fp80 } @catanl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// NO__ERRNO: declare frozen { double, double } @catan(double frozen, double frozen) [[READNONE]] +// NO__ERRNO: declare frozen <2 x float> @catanf(<2 x float> frozen) [[READNONE]] +// NO__ERRNO: declare frozen { x86_fp80, x86_fp80 } @catanl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { double, double } @catan(double frozen, double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen <2 x float> @catanf(<2 x float> frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { x86_fp80, x86_fp80 } @catanl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] __builtin_catanh(f); __builtin_catanhf(f); __builtin_catanhl(f); -// NO__ERRNO: declare { double, double } @catanh(double, double) [[READNONE]] -// NO__ERRNO: declare <2 x float> @catanhf(<2 x float>) [[READNONE]] -// NO__ERRNO: declare { x86_fp80, x86_fp80 } @catanhl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] -// HAS_ERRNO: declare { double, double } @catanh(double, double) [[NOT_READNONE]] -// HAS_ERRNO: declare <2 x float> @catanhf(<2 x float>) [[NOT_READNONE]] -// HAS_ERRNO: declare { x86_fp80, x86_fp80 } @catanhl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// NO__ERRNO: declare frozen { double, double } @catanh(double frozen, double frozen) [[READNONE]] +// NO__ERRNO: declare frozen <2 x float> @catanhf(<2 x float> frozen) [[READNONE]] +// NO__ERRNO: declare frozen { x86_fp80, x86_fp80 } @catanhl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { double, double } @catanh(double frozen, double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen <2 x float> @catanhf(<2 x float> frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { x86_fp80, x86_fp80 } @catanhl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] __builtin_ccos(f); __builtin_ccosf(f); __builtin_ccosl(f); -// NO__ERRNO: declare { double, double } @ccos(double, double) [[READNONE]] -// NO__ERRNO: declare <2 x float> @ccosf(<2 x float>) [[READNONE]] -// NO__ERRNO: declare { x86_fp80, x86_fp80 } @ccosl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] -// HAS_ERRNO: declare { double, double } @ccos(double, double) [[NOT_READNONE]] -// HAS_ERRNO: declare <2 x float> @ccosf(<2 x float>) [[NOT_READNONE]] -// HAS_ERRNO: declare { x86_fp80, x86_fp80 } @ccosl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// NO__ERRNO: declare frozen { double, double } @ccos(double frozen, double frozen) [[READNONE]] +// NO__ERRNO: declare frozen <2 x float> @ccosf(<2 x float> frozen) [[READNONE]] +// NO__ERRNO: declare frozen { x86_fp80, x86_fp80 } @ccosl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { double, double } @ccos(double frozen, double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen <2 x float> @ccosf(<2 x float> frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { x86_fp80, x86_fp80 } @ccosl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] __builtin_ccosh(f); __builtin_ccoshf(f); __builtin_ccoshl(f); -// NO__ERRNO: declare { double, double } @ccosh(double, double) [[READNONE]] -// NO__ERRNO: declare <2 x float> @ccoshf(<2 x float>) [[READNONE]] -// NO__ERRNO: declare { x86_fp80, x86_fp80 } @ccoshl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] -// HAS_ERRNO: declare { double, double } @ccosh(double, double) [[NOT_READNONE]] -// HAS_ERRNO: declare <2 x float> @ccoshf(<2 x float>) [[NOT_READNONE]] -// HAS_ERRNO: declare { x86_fp80, x86_fp80 } @ccoshl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// NO__ERRNO: declare frozen { double, double } @ccosh(double frozen, double frozen) [[READNONE]] +// NO__ERRNO: declare frozen <2 x float> @ccoshf(<2 x float> frozen) [[READNONE]] +// NO__ERRNO: declare frozen { x86_fp80, x86_fp80 } @ccoshl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { double, double } @ccosh(double frozen, double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen <2 x float> @ccoshf(<2 x float> frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { x86_fp80, x86_fp80 } @ccoshl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] __builtin_cexp(f); __builtin_cexpf(f); __builtin_cexpl(f); -// NO__ERRNO: declare { double, double } @cexp(double, double) [[READNONE]] -// NO__ERRNO: declare <2 x float> @cexpf(<2 x float>) [[READNONE]] -// NO__ERRNO: declare { x86_fp80, x86_fp80 } @cexpl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] -// HAS_ERRNO: declare { double, double } @cexp(double, double) [[NOT_READNONE]] -// HAS_ERRNO: declare <2 x float> @cexpf(<2 x float>) [[NOT_READNONE]] -// HAS_ERRNO: declare { x86_fp80, x86_fp80 } @cexpl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// NO__ERRNO: declare frozen { double, double } @cexp(double frozen, double frozen) [[READNONE]] +// NO__ERRNO: declare frozen <2 x float> @cexpf(<2 x float> frozen) [[READNONE]] +// NO__ERRNO: declare frozen { x86_fp80, x86_fp80 } @cexpl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { double, double } @cexp(double frozen, double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen <2 x float> @cexpf(<2 x float> frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { x86_fp80, x86_fp80 } @cexpl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] __builtin_cimag(f); __builtin_cimagf(f); __builtin_cimagl(f); @@ -119,30 +119,30 @@ __builtin_clog(f); __builtin_clogf(f); __builtin_clogl(f); -// NO__ERRNO: declare { double, double } @clog(double, double) [[READNONE]] -// NO__ERRNO: declare <2 x float> @clogf(<2 x float>) [[READNONE]] -// NO__ERRNO: declare { x86_fp80, x86_fp80 } @clogl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] -// HAS_ERRNO: declare { double, double } @clog(double, double) [[NOT_READNONE]] -// HAS_ERRNO: declare <2 x float> @clogf(<2 x float>) [[NOT_READNONE]] -// HAS_ERRNO: declare { x86_fp80, x86_fp80 } @clogl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// NO__ERRNO: declare frozen { double, double } @clog(double frozen, double frozen) [[READNONE]] +// NO__ERRNO: declare frozen <2 x float> @clogf(<2 x float> frozen) [[READNONE]] +// NO__ERRNO: declare frozen { x86_fp80, x86_fp80 } @clogl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { double, double } @clog(double frozen, double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen <2 x float> @clogf(<2 x float> frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { x86_fp80, x86_fp80 } @clogl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] __builtin_cproj(f); __builtin_cprojf(f); __builtin_cprojl(f); -// NO__ERRNO: declare { double, double } @cproj(double, double) [[READNONE]] -// NO__ERRNO: declare <2 x float> @cprojf(<2 x float>) [[READNONE]] -// NO__ERRNO: declare { x86_fp80, x86_fp80 } @cprojl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] -// HAS_ERRNO: declare { double, double } @cproj(double, double) [[READNONE:#[0-9]+]] -// HAS_ERRNO: declare <2 x float> @cprojf(<2 x float>) [[READNONE]] -// HAS_ERRNO: declare { x86_fp80, x86_fp80 } @cprojl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// NO__ERRNO: declare frozen { double, double } @cproj(double frozen, double frozen) [[READNONE]] +// NO__ERRNO: declare frozen <2 x float> @cprojf(<2 x float> frozen) [[READNONE]] +// NO__ERRNO: declare frozen { x86_fp80, x86_fp80 } @cprojl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { double, double } @cproj(double frozen, double frozen) [[READNONE:#[0-9]+]] +// HAS_ERRNO: declare frozen <2 x float> @cprojf(<2 x float> frozen) [[READNONE]] +// HAS_ERRNO: declare frozen { x86_fp80, x86_fp80 } @cprojl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] __builtin_cpow(f,f); __builtin_cpowf(f,f); __builtin_cpowl(f,f); -// NO__ERRNO: declare { double, double } @cpow(double, double, double, double) [[READNONE]] -// NO__ERRNO: declare <2 x float> @cpowf(<2 x float>, <2 x float>) [[READNONE]] -// NO__ERRNO: declare { x86_fp80, x86_fp80 } @cpowl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16, { x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] -// HAS_ERRNO: declare { double, double } @cpow(double, double, double, double) [[NOT_READNONE]] -// HAS_ERRNO: declare <2 x float> @cpowf(<2 x float>, <2 x float>) [[NOT_READNONE]] -// HAS_ERRNO: declare { x86_fp80, x86_fp80 } @cpowl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16, { x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// NO__ERRNO: declare frozen { double, double } @cpow(double frozen, double frozen, double frozen, double frozen) [[READNONE]] +// NO__ERRNO: declare frozen <2 x float> @cpowf(<2 x float> frozen, <2 x float> frozen) [[READNONE]] +// NO__ERRNO: declare frozen { x86_fp80, x86_fp80 } @cpowl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16, { x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { double, double } @cpow(double frozen, double frozen, double frozen, double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen <2 x float> @cpowf(<2 x float> frozen, <2 x float> frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { x86_fp80, x86_fp80 } @cpowl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16, { x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] __builtin_creal(f); __builtin_crealf(f); __builtin_creall(f); @@ -153,48 +153,48 @@ __builtin_csin(f); __builtin_csinf(f); __builtin_csinl(f); -// NO__ERRNO: declare { double, double } @csin(double, double) [[READNONE]] -// NO__ERRNO: declare <2 x float> @csinf(<2 x float>) [[READNONE]] -// NO__ERRNO: declare { x86_fp80, x86_fp80 } @csinl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] -// HAS_ERRNO: declare { double, double } @csin(double, double) [[NOT_READNONE]] -// HAS_ERRNO: declare <2 x float> @csinf(<2 x float>) [[NOT_READNONE]] -// HAS_ERRNO: declare { x86_fp80, x86_fp80 } @csinl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// NO__ERRNO: declare frozen { double, double } @csin(double frozen, double frozen) [[READNONE]] +// NO__ERRNO: declare frozen <2 x float> @csinf(<2 x float> frozen) [[READNONE]] +// NO__ERRNO: declare frozen { x86_fp80, x86_fp80 } @csinl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { double, double } @csin(double frozen, double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen <2 x float> @csinf(<2 x float> frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { x86_fp80, x86_fp80 } @csinl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] __builtin_csinh(f); __builtin_csinhf(f); __builtin_csinhl(f); -// NO__ERRNO: declare { double, double } @csinh(double, double) [[READNONE]] -// NO__ERRNO: declare <2 x float> @csinhf(<2 x float>) [[READNONE]] -// NO__ERRNO: declare { x86_fp80, x86_fp80 } @csinhl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] -// HAS_ERRNO: declare { double, double } @csinh(double, double) [[NOT_READNONE]] -// HAS_ERRNO: declare <2 x float> @csinhf(<2 x float>) [[NOT_READNONE]] -// HAS_ERRNO: declare { x86_fp80, x86_fp80 } @csinhl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// NO__ERRNO: declare frozen { double, double } @csinh(double frozen, double frozen) [[READNONE]] +// NO__ERRNO: declare frozen <2 x float> @csinhf(<2 x float> frozen) [[READNONE]] +// NO__ERRNO: declare frozen { x86_fp80, x86_fp80 } @csinhl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { double, double } @csinh(double frozen, double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen <2 x float> @csinhf(<2 x float> frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { x86_fp80, x86_fp80 } @csinhl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] __builtin_csqrt(f); __builtin_csqrtf(f); __builtin_csqrtl(f); -// NO__ERRNO: declare { double, double } @csqrt(double, double) [[READNONE]] -// NO__ERRNO: declare <2 x float> @csqrtf(<2 x float>) [[READNONE]] -// NO__ERRNO: declare { x86_fp80, x86_fp80 } @csqrtl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] -// HAS_ERRNO: declare { double, double } @csqrt(double, double) [[NOT_READNONE]] -// HAS_ERRNO: declare <2 x float> @csqrtf(<2 x float>) [[NOT_READNONE]] -// HAS_ERRNO: declare { x86_fp80, x86_fp80 } @csqrtl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// NO__ERRNO: declare frozen { double, double } @csqrt(double frozen, double frozen) [[READNONE]] +// NO__ERRNO: declare frozen <2 x float> @csqrtf(<2 x float> frozen) [[READNONE]] +// NO__ERRNO: declare frozen { x86_fp80, x86_fp80 } @csqrtl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { double, double } @csqrt(double frozen, double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen <2 x float> @csqrtf(<2 x float> frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { x86_fp80, x86_fp80 } @csqrtl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] __builtin_ctan(f); __builtin_ctanf(f); __builtin_ctanl(f); -// NO__ERRNO: declare { double, double } @ctan(double, double) [[READNONE]] -// NO__ERRNO: declare <2 x float> @ctanf(<2 x float>) [[READNONE]] -// NO__ERRNO: declare { x86_fp80, x86_fp80 } @ctanl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] -// HAS_ERRNO: declare { double, double } @ctan(double, double) [[NOT_READNONE]] -// HAS_ERRNO: declare <2 x float> @ctanf(<2 x float>) [[NOT_READNONE]] -// HAS_ERRNO: declare { x86_fp80, x86_fp80 } @ctanl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// NO__ERRNO: declare frozen { double, double } @ctan(double frozen, double frozen) [[READNONE]] +// NO__ERRNO: declare frozen <2 x float> @ctanf(<2 x float> frozen) [[READNONE]] +// NO__ERRNO: declare frozen { x86_fp80, x86_fp80 } @ctanl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { double, double } @ctan(double frozen, double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen <2 x float> @ctanf(<2 x float> frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { x86_fp80, x86_fp80 } @ctanl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] __builtin_ctanh(f); __builtin_ctanhf(f); __builtin_ctanhl(f); -// NO__ERRNO: declare { double, double } @ctanh(double, double) [[READNONE]] -// NO__ERRNO: declare <2 x float> @ctanhf(<2 x float>) [[READNONE]] -// NO__ERRNO: declare { x86_fp80, x86_fp80 } @ctanhl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] -// HAS_ERRNO: declare { double, double } @ctanh(double, double) [[NOT_READNONE]] -// HAS_ERRNO: declare <2 x float> @ctanhf(<2 x float>) [[NOT_READNONE]] -// HAS_ERRNO: declare { x86_fp80, x86_fp80 } @ctanhl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// NO__ERRNO: declare frozen { double, double } @ctanh(double frozen, double frozen) [[READNONE]] +// NO__ERRNO: declare frozen <2 x float> @ctanhf(<2 x float> frozen) [[READNONE]] +// NO__ERRNO: declare frozen { x86_fp80, x86_fp80 } @ctanhl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { double, double } @ctanh(double frozen, double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen <2 x float> @ctanhf(<2 x float> frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { x86_fp80, x86_fp80 } @ctanhl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] }; diff --git a/clang/test/CodeGen/complex-indirect.c b/clang/test/CodeGen/complex-indirect.c --- a/clang/test/CodeGen/complex-indirect.c +++ b/clang/test/CodeGen/complex-indirect.c @@ -9,4 +9,4 @@ void b(__complex__ char *y) { a(0,0,0,0,0,0,*y); } // CHECK-LABEL: define void @b // CHECK: alloca { i8, i8 }*, align 8 -// CHECK: call void @a(i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i16 {{.*}}) +// CHECK: call void @a(i32 frozen 0, i32 frozen 0, i32 frozen 0, i32 frozen 0, i32 frozen 0, i32 frozen 0, i16 {{.*}}) diff --git a/clang/test/CodeGen/complex-init-list.c b/clang/test/CodeGen/complex-init-list.c --- a/clang/test/CodeGen/complex-init-list.c +++ b/clang/test/CodeGen/complex-init-list.c @@ -8,11 +8,11 @@ // CHECK: @x = global { float, float } { float 1.000000e+00, float 0x7FF0000000000000 }, align 4 _Complex float f(float x, float y) { _Complex float z = { x, y }; return z; } -// CHECK-LABEL: define <2 x float> @f +// CHECK-LABEL: define frozen <2 x float> @f // CHECK: alloca { float, float } // CHECK: alloca { float, float } _Complex float f2(float x, float y) { return (_Complex float){ x, y }; } -// CHECK-LABEL: define <2 x float> @f2 +// CHECK-LABEL: define frozen <2 x float> @f2 // CHECK: alloca { float, float } // CHECK: alloca { float, float } diff --git a/clang/test/CodeGen/complex-libcalls.c b/clang/test/CodeGen/complex-libcalls.c --- a/clang/test/CodeGen/complex-libcalls.c +++ b/clang/test/CodeGen/complex-libcalls.c @@ -6,102 +6,102 @@ void foo(float f) { cabs(f); cabsf(f); cabsl(f); -// NO__ERRNO: declare double @cabs(double, double) [[READNONE:#[0-9]+]] -// NO__ERRNO: declare float @cabsf(<2 x float>) [[READNONE]] -// NO__ERRNO: declare x86_fp80 @cabsl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE:#[0-9]+]] -// HAS_ERRNO: declare double @cabs(double, double) [[NOT_READNONE:#[0-9]+]] -// HAS_ERRNO: declare float @cabsf(<2 x float>) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @cabsl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @cabs(double frozen, double frozen) [[READNONE:#[0-9]+]] +// NO__ERRNO: declare frozen float @cabsf(<2 x float> frozen) [[READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @cabsl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE:#[0-9]+]] +// HAS_ERRNO: declare frozen double @cabs(double frozen, double frozen) [[NOT_READNONE:#[0-9]+]] +// HAS_ERRNO: declare frozen float @cabsf(<2 x float> frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @cabsl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] cacos(f); cacosf(f); cacosl(f); -// NO__ERRNO: declare { double, double } @cacos(double, double) [[READNONE]] -// NO__ERRNO: declare <2 x float> @cacosf(<2 x float>) [[READNONE]] -// NO__ERRNO: declare { x86_fp80, x86_fp80 } @cacosl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] -// HAS_ERRNO: declare { double, double } @cacos(double, double) [[NOT_READNONE]] -// HAS_ERRNO: declare <2 x float> @cacosf(<2 x float>) [[NOT_READNONE]] -// HAS_ERRNO: declare { x86_fp80, x86_fp80 } @cacosl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// NO__ERRNO: declare frozen { double, double } @cacos(double frozen, double frozen) [[READNONE]] +// NO__ERRNO: declare frozen <2 x float> @cacosf(<2 x float> frozen) [[READNONE]] +// NO__ERRNO: declare frozen { x86_fp80, x86_fp80 } @cacosl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { double, double } @cacos(double frozen, double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen <2 x float> @cacosf(<2 x float> frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { x86_fp80, x86_fp80 } @cacosl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] cacosh(f); cacoshf(f); cacoshl(f); -// NO__ERRNO: declare { double, double } @cacosh(double, double) [[READNONE]] -// NO__ERRNO: declare <2 x float> @cacoshf(<2 x float>) [[READNONE]] -// NO__ERRNO: declare { x86_fp80, x86_fp80 } @cacoshl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] -// HAS_ERRNO: declare { double, double } @cacosh(double, double) [[NOT_READNONE]] -// HAS_ERRNO: declare <2 x float> @cacoshf(<2 x float>) [[NOT_READNONE]] -// HAS_ERRNO: declare { x86_fp80, x86_fp80 } @cacoshl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// NO__ERRNO: declare frozen { double, double } @cacosh(double frozen, double frozen) [[READNONE]] +// NO__ERRNO: declare frozen <2 x float> @cacoshf(<2 x float> frozen) [[READNONE]] +// NO__ERRNO: declare frozen { x86_fp80, x86_fp80 } @cacoshl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { double, double } @cacosh(double frozen, double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen <2 x float> @cacoshf(<2 x float> frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { x86_fp80, x86_fp80 } @cacoshl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] carg(f); cargf(f); cargl(f); -// NO__ERRNO: declare double @carg(double, double) [[READNONE]] -// NO__ERRNO: declare float @cargf(<2 x float>) [[READNONE]] -// NO__ERRNO: declare x86_fp80 @cargl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] -// HAS_ERRNO: declare double @carg(double, double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @cargf(<2 x float>) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @cargl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @carg(double frozen, double frozen) [[READNONE]] +// NO__ERRNO: declare frozen float @cargf(<2 x float> frozen) [[READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @cargl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen double @carg(double frozen, double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @cargf(<2 x float> frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @cargl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] casin(f); casinf(f); casinl(f); -// NO__ERRNO: declare { double, double } @casin(double, double) [[READNONE]] -// NO__ERRNO: declare <2 x float> @casinf(<2 x float>) [[READNONE]] -// NO__ERRNO: declare { x86_fp80, x86_fp80 } @casinl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] -// HAS_ERRNO: declare { double, double } @casin(double, double) [[NOT_READNONE]] -// HAS_ERRNO: declare <2 x float> @casinf(<2 x float>) [[NOT_READNONE]] -// HAS_ERRNO: declare { x86_fp80, x86_fp80 } @casinl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// NO__ERRNO: declare frozen { double, double } @casin(double frozen, double frozen) [[READNONE]] +// NO__ERRNO: declare frozen <2 x float> @casinf(<2 x float> frozen) [[READNONE]] +// NO__ERRNO: declare frozen { x86_fp80, x86_fp80 } @casinl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { double, double } @casin(double frozen, double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen <2 x float> @casinf(<2 x float> frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { x86_fp80, x86_fp80 } @casinl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] casinh(f); casinhf(f); casinhl(f); -// NO__ERRNO: declare { double, double } @casinh(double, double) [[READNONE]] -// NO__ERRNO: declare <2 x float> @casinhf(<2 x float>) [[READNONE]] -// NO__ERRNO: declare { x86_fp80, x86_fp80 } @casinhl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] -// HAS_ERRNO: declare { double, double } @casinh(double, double) [[NOT_READNONE]] -// HAS_ERRNO: declare <2 x float> @casinhf(<2 x float>) [[NOT_READNONE]] -// HAS_ERRNO: declare { x86_fp80, x86_fp80 } @casinhl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// NO__ERRNO: declare frozen { double, double } @casinh(double frozen, double frozen) [[READNONE]] +// NO__ERRNO: declare frozen <2 x float> @casinhf(<2 x float> frozen) [[READNONE]] +// NO__ERRNO: declare frozen { x86_fp80, x86_fp80 } @casinhl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { double, double } @casinh(double frozen, double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen <2 x float> @casinhf(<2 x float> frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { x86_fp80, x86_fp80 } @casinhl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] catan(f); catanf(f); catanl(f); -// NO__ERRNO: declare { double, double } @catan(double, double) [[READNONE]] -// NO__ERRNO: declare <2 x float> @catanf(<2 x float>) [[READNONE]] -// NO__ERRNO: declare { x86_fp80, x86_fp80 } @catanl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] -// HAS_ERRNO: declare { double, double } @catan(double, double) [[NOT_READNONE]] -// HAS_ERRNO: declare <2 x float> @catanf(<2 x float>) [[NOT_READNONE]] -// HAS_ERRNO: declare { x86_fp80, x86_fp80 } @catanl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// NO__ERRNO: declare frozen { double, double } @catan(double frozen, double frozen) [[READNONE]] +// NO__ERRNO: declare frozen <2 x float> @catanf(<2 x float> frozen) [[READNONE]] +// NO__ERRNO: declare frozen { x86_fp80, x86_fp80 } @catanl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { double, double } @catan(double frozen, double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen <2 x float> @catanf(<2 x float> frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { x86_fp80, x86_fp80 } @catanl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] catanh(f); catanhf(f); catanhl(f); -// NO__ERRNO: declare { double, double } @catanh(double, double) [[READNONE]] -// NO__ERRNO: declare <2 x float> @catanhf(<2 x float>) [[READNONE]] -// NO__ERRNO: declare { x86_fp80, x86_fp80 } @catanhl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] -// HAS_ERRNO: declare { double, double } @catanh(double, double) [[NOT_READNONE]] -// HAS_ERRNO: declare <2 x float> @catanhf(<2 x float>) [[NOT_READNONE]] -// HAS_ERRNO: declare { x86_fp80, x86_fp80 } @catanhl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// NO__ERRNO: declare frozen { double, double } @catanh(double frozen, double frozen) [[READNONE]] +// NO__ERRNO: declare frozen <2 x float> @catanhf(<2 x float> frozen) [[READNONE]] +// NO__ERRNO: declare frozen { x86_fp80, x86_fp80 } @catanhl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { double, double } @catanh(double frozen, double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen <2 x float> @catanhf(<2 x float> frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { x86_fp80, x86_fp80 } @catanhl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] ccos(f); ccosf(f); ccosl(f); -// NO__ERRNO: declare { double, double } @ccos(double, double) [[READNONE]] -// NO__ERRNO: declare <2 x float> @ccosf(<2 x float>) [[READNONE]] -// NO__ERRNO: declare { x86_fp80, x86_fp80 } @ccosl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] -// HAS_ERRNO: declare { double, double } @ccos(double, double) [[NOT_READNONE]] -// HAS_ERRNO: declare <2 x float> @ccosf(<2 x float>) [[NOT_READNONE]] -// HAS_ERRNO: declare { x86_fp80, x86_fp80 } @ccosl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// NO__ERRNO: declare frozen { double, double } @ccos(double frozen, double frozen) [[READNONE]] +// NO__ERRNO: declare frozen <2 x float> @ccosf(<2 x float> frozen) [[READNONE]] +// NO__ERRNO: declare frozen { x86_fp80, x86_fp80 } @ccosl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { double, double } @ccos(double frozen, double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen <2 x float> @ccosf(<2 x float> frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { x86_fp80, x86_fp80 } @ccosl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] ccosh(f); ccoshf(f); ccoshl(f); -// NO__ERRNO: declare { double, double } @ccosh(double, double) [[READNONE]] -// NO__ERRNO: declare <2 x float> @ccoshf(<2 x float>) [[READNONE]] -// NO__ERRNO: declare { x86_fp80, x86_fp80 } @ccoshl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] -// HAS_ERRNO: declare { double, double } @ccosh(double, double) [[NOT_READNONE]] -// HAS_ERRNO: declare <2 x float> @ccoshf(<2 x float>) [[NOT_READNONE]] -// HAS_ERRNO: declare { x86_fp80, x86_fp80 } @ccoshl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// NO__ERRNO: declare frozen { double, double } @ccosh(double frozen, double frozen) [[READNONE]] +// NO__ERRNO: declare frozen <2 x float> @ccoshf(<2 x float> frozen) [[READNONE]] +// NO__ERRNO: declare frozen { x86_fp80, x86_fp80 } @ccoshl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { double, double } @ccosh(double frozen, double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen <2 x float> @ccoshf(<2 x float> frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { x86_fp80, x86_fp80 } @ccoshl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] cexp(f); cexpf(f); cexpl(f); -// NO__ERRNO: declare { double, double } @cexp(double, double) [[READNONE]] -// NO__ERRNO: declare <2 x float> @cexpf(<2 x float>) [[READNONE]] -// NO__ERRNO: declare { x86_fp80, x86_fp80 } @cexpl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] -// HAS_ERRNO: declare { double, double } @cexp(double, double) [[NOT_READNONE]] -// HAS_ERRNO: declare <2 x float> @cexpf(<2 x float>) [[NOT_READNONE]] -// HAS_ERRNO: declare { x86_fp80, x86_fp80 } @cexpl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// NO__ERRNO: declare frozen { double, double } @cexp(double frozen, double frozen) [[READNONE]] +// NO__ERRNO: declare frozen <2 x float> @cexpf(<2 x float> frozen) [[READNONE]] +// NO__ERRNO: declare frozen { x86_fp80, x86_fp80 } @cexpl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { double, double } @cexp(double frozen, double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen <2 x float> @cexpf(<2 x float> frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { x86_fp80, x86_fp80 } @cexpl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] cimag(f); cimagf(f); cimagl(f); @@ -119,30 +119,30 @@ clog(f); clogf(f); clogl(f); -// NO__ERRNO: declare { double, double } @clog(double, double) [[READNONE]] -// NO__ERRNO: declare <2 x float> @clogf(<2 x float>) [[READNONE]] -// NO__ERRNO: declare { x86_fp80, x86_fp80 } @clogl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] -// HAS_ERRNO: declare { double, double } @clog(double, double) [[NOT_READNONE]] -// HAS_ERRNO: declare <2 x float> @clogf(<2 x float>) [[NOT_READNONE]] -// HAS_ERRNO: declare { x86_fp80, x86_fp80 } @clogl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// NO__ERRNO: declare frozen { double, double } @clog(double frozen, double frozen) [[READNONE]] +// NO__ERRNO: declare frozen <2 x float> @clogf(<2 x float> frozen) [[READNONE]] +// NO__ERRNO: declare frozen { x86_fp80, x86_fp80 } @clogl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { double, double } @clog(double frozen, double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen <2 x float> @clogf(<2 x float> frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { x86_fp80, x86_fp80 } @clogl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] cproj(f); cprojf(f); cprojl(f); -// NO__ERRNO: declare { double, double } @cproj(double, double) [[READNONE]] -// NO__ERRNO: declare <2 x float> @cprojf(<2 x float>) [[READNONE]] -// NO__ERRNO: declare { x86_fp80, x86_fp80 } @cprojl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] -// HAS_ERRNO: declare { double, double } @cproj(double, double) [[READNONE:#[0-9]+]] -// HAS_ERRNO: declare <2 x float> @cprojf(<2 x float>) [[READNONE]] -// HAS_ERRNO: declare { x86_fp80, x86_fp80 } @cprojl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// NO__ERRNO: declare frozen { double, double } @cproj(double frozen, double frozen) [[READNONE]] +// NO__ERRNO: declare frozen <2 x float> @cprojf(<2 x float> frozen) [[READNONE]] +// NO__ERRNO: declare frozen { x86_fp80, x86_fp80 } @cprojl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { double, double } @cproj(double frozen, double frozen) [[READNONE:#[0-9]+]] +// HAS_ERRNO: declare frozen <2 x float> @cprojf(<2 x float> frozen) [[READNONE]] +// HAS_ERRNO: declare frozen { x86_fp80, x86_fp80 } @cprojl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] cpow(f,f); cpowf(f,f); cpowl(f,f); -// NO__ERRNO: declare { double, double } @cpow(double, double, double, double) [[READNONE]] -// NO__ERRNO: declare <2 x float> @cpowf(<2 x float>, <2 x float>) [[READNONE]] -// NO__ERRNO: declare { x86_fp80, x86_fp80 } @cpowl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16, { x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] -// HAS_ERRNO: declare { double, double } @cpow(double, double, double, double) [[NOT_READNONE]] -// HAS_ERRNO: declare <2 x float> @cpowf(<2 x float>, <2 x float>) [[NOT_READNONE]] -// HAS_ERRNO: declare { x86_fp80, x86_fp80 } @cpowl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16, { x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// NO__ERRNO: declare frozen { double, double } @cpow(double frozen, double frozen, double frozen, double frozen) [[READNONE]] +// NO__ERRNO: declare frozen <2 x float> @cpowf(<2 x float> frozen, <2 x float> frozen) [[READNONE]] +// NO__ERRNO: declare frozen { x86_fp80, x86_fp80 } @cpowl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16, { x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { double, double } @cpow(double frozen, double frozen, double frozen, double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen <2 x float> @cpowf(<2 x float> frozen, <2 x float> frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { x86_fp80, x86_fp80 } @cpowl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16, { x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] creal(f); crealf(f); creall(f); @@ -153,48 +153,48 @@ csin(f); csinf(f); csinl(f); -// NO__ERRNO: declare { double, double } @csin(double, double) [[READNONE]] -// NO__ERRNO: declare <2 x float> @csinf(<2 x float>) [[READNONE]] -// NO__ERRNO: declare { x86_fp80, x86_fp80 } @csinl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] -// HAS_ERRNO: declare { double, double } @csin(double, double) [[NOT_READNONE]] -// HAS_ERRNO: declare <2 x float> @csinf(<2 x float>) [[NOT_READNONE]] -// HAS_ERRNO: declare { x86_fp80, x86_fp80 } @csinl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// NO__ERRNO: declare frozen { double, double } @csin(double frozen, double frozen) [[READNONE]] +// NO__ERRNO: declare frozen <2 x float> @csinf(<2 x float> frozen) [[READNONE]] +// NO__ERRNO: declare frozen { x86_fp80, x86_fp80 } @csinl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { double, double } @csin(double frozen, double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen <2 x float> @csinf(<2 x float> frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { x86_fp80, x86_fp80 } @csinl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] csinh(f); csinhf(f); csinhl(f); -// NO__ERRNO: declare { double, double } @csinh(double, double) [[READNONE]] -// NO__ERRNO: declare <2 x float> @csinhf(<2 x float>) [[READNONE]] -// NO__ERRNO: declare { x86_fp80, x86_fp80 } @csinhl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] -// HAS_ERRNO: declare { double, double } @csinh(double, double) [[NOT_READNONE]] -// HAS_ERRNO: declare <2 x float> @csinhf(<2 x float>) [[NOT_READNONE]] -// HAS_ERRNO: declare { x86_fp80, x86_fp80 } @csinhl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// NO__ERRNO: declare frozen { double, double } @csinh(double frozen, double frozen) [[READNONE]] +// NO__ERRNO: declare frozen <2 x float> @csinhf(<2 x float> frozen) [[READNONE]] +// NO__ERRNO: declare frozen { x86_fp80, x86_fp80 } @csinhl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { double, double } @csinh(double frozen, double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen <2 x float> @csinhf(<2 x float> frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { x86_fp80, x86_fp80 } @csinhl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] csqrt(f); csqrtf(f); csqrtl(f); -// NO__ERRNO: declare { double, double } @csqrt(double, double) [[READNONE]] -// NO__ERRNO: declare <2 x float> @csqrtf(<2 x float>) [[READNONE]] -// NO__ERRNO: declare { x86_fp80, x86_fp80 } @csqrtl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] -// HAS_ERRNO: declare { double, double } @csqrt(double, double) [[NOT_READNONE]] -// HAS_ERRNO: declare <2 x float> @csqrtf(<2 x float>) [[NOT_READNONE]] -// HAS_ERRNO: declare { x86_fp80, x86_fp80 } @csqrtl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// NO__ERRNO: declare frozen { double, double } @csqrt(double frozen, double frozen) [[READNONE]] +// NO__ERRNO: declare frozen <2 x float> @csqrtf(<2 x float> frozen) [[READNONE]] +// NO__ERRNO: declare frozen { x86_fp80, x86_fp80 } @csqrtl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { double, double } @csqrt(double frozen, double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen <2 x float> @csqrtf(<2 x float> frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { x86_fp80, x86_fp80 } @csqrtl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] ctan(f); ctanf(f); ctanl(f); -// NO__ERRNO: declare { double, double } @ctan(double, double) [[READNONE]] -// NO__ERRNO: declare <2 x float> @ctanf(<2 x float>) [[READNONE]] -// NO__ERRNO: declare { x86_fp80, x86_fp80 } @ctanl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] -// HAS_ERRNO: declare { double, double } @ctan(double, double) [[NOT_READNONE]] -// HAS_ERRNO: declare <2 x float> @ctanf(<2 x float>) [[NOT_READNONE]] -// HAS_ERRNO: declare { x86_fp80, x86_fp80 } @ctanl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// NO__ERRNO: declare frozen { double, double } @ctan(double frozen, double frozen) [[READNONE]] +// NO__ERRNO: declare frozen <2 x float> @ctanf(<2 x float> frozen) [[READNONE]] +// NO__ERRNO: declare frozen { x86_fp80, x86_fp80 } @ctanl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { double, double } @ctan(double frozen, double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen <2 x float> @ctanf(<2 x float> frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { x86_fp80, x86_fp80 } @ctanl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] ctanh(f); ctanhf(f); ctanhl(f); -// NO__ERRNO: declare { double, double } @ctanh(double, double) [[READNONE]] -// NO__ERRNO: declare <2 x float> @ctanhf(<2 x float>) [[READNONE]] -// NO__ERRNO: declare { x86_fp80, x86_fp80 } @ctanhl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] -// HAS_ERRNO: declare { double, double } @ctanh(double, double) [[NOT_READNONE]] -// HAS_ERRNO: declare <2 x float> @ctanhf(<2 x float>) [[NOT_READNONE]] -// HAS_ERRNO: declare { x86_fp80, x86_fp80 } @ctanhl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// NO__ERRNO: declare frozen { double, double } @ctanh(double frozen, double frozen) [[READNONE]] +// NO__ERRNO: declare frozen <2 x float> @ctanhf(<2 x float> frozen) [[READNONE]] +// NO__ERRNO: declare frozen { x86_fp80, x86_fp80 } @ctanhl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { double, double } @ctanh(double frozen, double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen <2 x float> @ctanhf(<2 x float> frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { x86_fp80, x86_fp80 } @ctanhl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] }; diff --git a/clang/test/CodeGen/complex-math.c b/clang/test/CodeGen/complex-math.c --- a/clang/test/CodeGen/complex-math.c +++ b/clang/test/CodeGen/complex-math.c @@ -132,7 +132,7 @@ // X86: ret // a / b = (A+iB) / (C+iD) = ((AC+BD)/(CC+DD)) + i((BC-AD)/(CC+DD)) - // AARCH64-FASTMATH-LABEL: @div_float_rc(float %a, [2 x float] %b.coerce) + // AARCH64-FASTMATH-LABEL: @div_float_rc(float frozen %a, [2 x float] frozen %b.coerce) // A = a // B = 0 // @@ -159,7 +159,7 @@ // X86: ret // a / b = (A+iB) / (C+iD) = ((AC+BD)/(CC+DD)) + i((BC-AD)/(CC+DD)) - // AARCH64-FASTMATH-LABEL: @div_float_cc([2 x float] %a.coerce, [2 x float] %b.coerce) + // AARCH64-FASTMATH-LABEL: @div_float_cc([2 x float] frozen %a.coerce, [2 x float] frozen %b.coerce) // // AARCH64-FASTMATH: [[AC:%.*]] = fmul fast float // AARCH64-FASTMATH: [[BD:%.*]] = fmul fast float @@ -303,7 +303,7 @@ // X86: ret // a / b = (A+iB) / (C+iD) = ((AC+BD)/(CC+DD)) + i((BC-AD)/(CC+DD)) - // AARCH64-FASTMATH-LABEL: @div_double_rc(double %a, [2 x double] %b.coerce) + // AARCH64-FASTMATH-LABEL: @div_double_rc(double frozen %a, [2 x double] frozen %b.coerce) // A = a // B = 0 // @@ -330,7 +330,7 @@ // X86: ret // a / b = (A+iB) / (C+iD) = ((AC+BD)/(CC+DD)) + i((BC-AD)/(CC+DD)) - // AARCH64-FASTMATH-LABEL: @div_double_cc([2 x double] %a.coerce, [2 x double] %b.coerce) + // AARCH64-FASTMATH-LABEL: @div_double_cc([2 x double] frozen %a.coerce, [2 x double] frozen %b.coerce) // // AARCH64-FASTMATH: [[AC:%.*]] = fmul fast double // AARCH64-FASTMATH: [[BD:%.*]] = fmul fast double @@ -492,7 +492,7 @@ // PPC: ret // a / b = (A+iB) / (C+iD) = ((AC+BD)/(CC+DD)) + i((BC-AD)/(CC+DD)) - // AARCH64-FASTMATH-LABEL: @div_long_double_rc(fp128 %a, [2 x fp128] %b.coerce) + // AARCH64-FASTMATH-LABEL: @div_long_double_rc(fp128 frozen %a, [2 x fp128] frozen %b.coerce) // A = a // B = 0 // @@ -523,7 +523,7 @@ // PPC: ret // a / b = (A+iB) / (C+iD) = ((AC+BD)/(CC+DD)) + i((BC-AD)/(CC+DD)) - // AARCH64-FASTMATH-LABEL: @div_long_double_cc([2 x fp128] %a.coerce, [2 x fp128] %b.coerce) + // AARCH64-FASTMATH-LABEL: @div_long_double_cc([2 x fp128] frozen %a.coerce, [2 x fp128] frozen %b.coerce) // // AARCH64-FASTMATH: [[AC:%.*]] = fmul fast fp128 // AARCH64-FASTMATH: [[BD:%.*]] = fmul fast fp128 @@ -604,9 +604,9 @@ // ARM: call void @__muldc3 // ARMHF-LABEL: @foo( - // ARMHF: call { double, double } @__muldc3 + // ARMHF: call frozen { double, double } @__muldc3 // ARM7K-LABEL: @foo( - // ARM7K: call { double, double } @__muldc3 + // ARM7K: call frozen { double, double } @__muldc3 return a*b; } diff --git a/clang/test/CodeGen/compound-literal.c b/clang/test/CodeGen/compound-literal.c --- a/clang/test/CodeGen/compound-literal.c +++ b/clang/test/CodeGen/compound-literal.c @@ -79,7 +79,7 @@ // We had a bug where we'd emit a new GlobalVariable for each time we used a // const pointer to a variable initialized by a compound literal. -// CHECK-LABEL: define i32 @compareMyCLH() #0 +// CHECK-LABEL: define frozen i32 @compareMyCLH() #0 int compareMyCLH() { // CHECK: store i8* bitcast ([[MY_CLH]] to i8*) const void *a = MyCLH; @@ -90,7 +90,7 @@ // Check generated code for GNU constant array init from compound literal, // for a local variable. -// CHECK-LABEL: define i32 @compound_array_fn() +// CHECK-LABEL: define frozen i32 @compound_array_fn() // CHECK: [[COMPOUND_ARRAY:%.*]] = alloca [8 x i32] // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64({{.*}}, i64 32, i1 false) int compound_array_fn() { diff --git a/clang/test/CodeGen/constructor-attribute.c b/clang/test/CodeGen/constructor-attribute.c --- a/clang/test/CodeGen/constructor-attribute.c +++ b/clang/test/CodeGen/constructor-attribute.c @@ -12,11 +12,11 @@ // CHECK: define internal void @E() // CHECK: define internal void @F() // CHECK: define internal void @G() -// CHECK: define i32 @__GLOBAL_init_789(i32 %{{.*}}) +// CHECK: define frozen i32 @__GLOBAL_init_789(i32 frozen %{{.*}}) // CHECK: define internal void @C() // CHECK: define internal void @D() -// CHECK: define i32 @main() -// CHECK: define internal i32 @foo() +// CHECK: define frozen i32 @main() +// CHECK: define internal frozen i32 @foo() // WITHOUTATEXIT-NOT: define // WITHATEXIT: define internal void @__GLOBAL_init_123(){{.*}}section "__TEXT,__StaticInit,regular,pure_instructions" diff --git a/clang/test/CodeGen/cxx-default-arg.cpp b/clang/test/CodeGen/cxx-default-arg.cpp --- a/clang/test/CodeGen/cxx-default-arg.cpp +++ b/clang/test/CodeGen/cxx-default-arg.cpp @@ -1,6 +1,6 @@ // RUN: %clang_cc1 -triple %itanium_abi_triple -emit-llvm %s -o %t -// Note-LABEL: define CLANG_GENERATE_KNOWN_GOOD and compile to generate code +// Note-LABEL: define frozen CLANG_GENERATE_KNOWN_GOOD and compile to generate code // that makes all of the defaulted arguments explicit. The resulting // byte code should be identical to the compilation without // CLANG_GENERATE_KNOWN_GOOD. diff --git a/clang/test/CodeGen/debug-info-block-vars.c b/clang/test/CodeGen/debug-info-block-vars.c --- a/clang/test/CodeGen/debug-info-block-vars.c +++ b/clang/test/CodeGen/debug-info-block-vars.c @@ -4,7 +4,7 @@ // RUN: -triple x86_64-apple-darwin -o - %s \ // RUN: | FileCheck --check-prefix=CHECK-OPT %s -// CHECK: define internal void @__f_block_invoke(i8* %.block_descriptor) +// CHECK: define internal void @__f_block_invoke(i8* frozen %.block_descriptor) // CHECK: %.block_descriptor.addr = alloca i8*, align 8 // CHECK: %block.addr = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor* }>*, align 8 // CHECK: store i8* %.block_descriptor, i8** %.block_descriptor.addr, align 8 diff --git a/clang/test/CodeGen/debug-info-codeview-heapallocsite.c b/clang/test/CodeGen/debug-info-codeview-heapallocsite.c --- a/clang/test/CodeGen/debug-info-codeview-heapallocsite.c +++ b/clang/test/CodeGen/debug-info-codeview-heapallocsite.c @@ -14,10 +14,10 @@ } // CHECK-LABEL: define {{.*}}void @call_alloc -// CHECK: call i8* {{.*}}@alloc_void{{.*}} !heapallocsite [[DBG1:!.*]] -// CHECK: call %struct.Foo* {{.*}}@alloc_foo{{.*}} !heapallocsite [[DBG2:!.*]] -// CHECK: call i8* {{.*}}@alloc_void{{.*}} !heapallocsite [[DBG2]] -// CHECK: call i8* {{.*}}@alloc_void{{.*}} !heapallocsite [[DBG3:!.*]] +// CHECK: call frozen i8* {{.*}}@alloc_void{{.*}} !heapallocsite [[DBG1:!.*]] +// CHECK: call frozen %struct.Foo* {{.*}}@alloc_foo{{.*}} !heapallocsite [[DBG2:!.*]] +// CHECK: call frozen i8* {{.*}}@alloc_void{{.*}} !heapallocsite [[DBG2]] +// CHECK: call frozen i8* {{.*}}@alloc_void{{.*}} !heapallocsite [[DBG3:!.*]] // CHECK: [[DBG1]] = !{} // CHECK: [[DBG2]] = !DICompositeType(tag: DW_TAG_structure_type, diff --git a/clang/test/CodeGen/debug-info-no-inline-line-tables.c b/clang/test/CodeGen/debug-info-no-inline-line-tables.c --- a/clang/test/CodeGen/debug-info-no-inline-line-tables.c +++ b/clang/test/CodeGen/debug-info-no-inline-line-tables.c @@ -16,7 +16,7 @@ // Check that clang emits the location of the call site and not the inlined // function in the debug info. -// CHECK: define dso_local i32 @main() +// CHECK: define dso_local frozen i32 @main() // CHECK: %{{.+}} = load i32, i32* @x, align 4, !dbg [[DbgLoc:![0-9]+]] // Check that the no-inline-line-tables attribute is added. diff --git a/clang/test/CodeGen/decl-in-prototype.c b/clang/test/CodeGen/decl-in-prototype.c --- a/clang/test/CodeGen/decl-in-prototype.c +++ b/clang/test/CodeGen/decl-in-prototype.c @@ -2,13 +2,13 @@ const int AA = 5; -// CHECK-LABEL: define i32 @f1 +// CHECK-LABEL: define frozen i32 @f1 int f1(enum {AA,BB} E) { // CHECK: ret i32 1 return BB; } -// CHECK-LABEL: define i32 @f2 +// CHECK-LABEL: define frozen i32 @f2 int f2(enum {AA=7,BB} E) { // CHECK: ret i32 7 return AA; diff --git a/clang/test/CodeGen/decl.c b/clang/test/CodeGen/decl.c --- a/clang/test/CodeGen/decl.c +++ b/clang/test/CodeGen/decl.c @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -w -fmerge-all-constants -emit-llvm < %s | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args -w -fmerge-all-constants -emit-llvm < %s | FileCheck %s // CHECK: @test1.x = internal constant [12 x i32] [i32 1 // CHECK: @__const.test2.x = private unnamed_addr constant [13 x i32] [i32 1, diff --git a/clang/test/CodeGen/default-address-space.c b/clang/test/CodeGen/default-address-space.c --- a/clang/test/CodeGen/default-address-space.c +++ b/clang/test/CodeGen/default-address-space.c @@ -11,11 +11,11 @@ int *A; int *B; -// CHECK-LABEL: define i32 @test1() +// CHECK-LABEL: define frozen i32 @test1() // CHECK: load i32, i32* addrspacecast{{[^@]+}} @foo int test1() { return foo; } -// CHECK-LABEL: define i32 @test2(i32 %i) +// CHECK-LABEL: define frozen i32 @test2(i32 frozen %i) // CHECK: %[[addr:.*]] = getelementptr // CHECK: load i32, i32* %[[addr]] // CHECK-NEXT: ret i32 @@ -30,7 +30,7 @@ *A = *B; } -// CHECK-LABEL: define void @test4(i32* %a) +// CHECK-LABEL: define void @test4(i32* frozen %a) // CHECK: %[[alloca:.*]] = alloca i32*, align 8, addrspace(5) // CHECK: %[[a_addr:.*]] = addrspacecast{{.*}} %[[alloca]] to i32** // CHECK: store i32* %a, i32** %[[a_addr]] diff --git a/clang/test/CodeGen/disable-tail-calls.c b/clang/test/CodeGen/disable-tail-calls.c --- a/clang/test/CodeGen/disable-tail-calls.c +++ b/clang/test/CodeGen/disable-tail-calls.c @@ -5,12 +5,12 @@ int data; } List; -// CHECK-LABEL: define %struct.List* @find +// CHECK-LABEL: define frozen %struct.List* @find List *find(List *head, int data) { if (!head) return 0; if (head->data == data) return head; - // CHECK: call %struct.List* @find + // CHECK: call frozen %struct.List* @find return find(head->next, data); } diff --git a/clang/test/CodeGen/dso-local-executable.c b/clang/test/CodeGen/dso-local-executable.c --- a/clang/test/CodeGen/dso-local-executable.c +++ b/clang/test/CodeGen/dso-local-executable.c @@ -3,7 +3,7 @@ // COFF-DAG: @weak_bar = extern_weak global i32 // COFF-DAG: declare dso_local void @foo() // COFF-DAG: @baz = dso_local global i32 42 -// COFF-DAG: define dso_local i32* @zed() +// COFF-DAG: define dso_local frozen i32* @zed() // COFF-DAG: @thread_var = external dso_local thread_local global i32 // COFF-DAG: @local_thread_var = dso_local thread_local global i32 42 // COFF-DAG: @import_var = external dllimport global i32 @@ -14,7 +14,7 @@ // MINGW-DAG: @weak_bar = extern_weak global i32 // MINGW-DAG: declare dso_local void @foo() // MINGW-DAG: @baz = dso_local global i32 42 -// MINGW-DAG: define dso_local i32* @zed() +// MINGW-DAG: define dso_local frozen i32* @zed() // MINGW-DAG: @thread_var = external dso_local thread_local global i32 // MINGW-DAG: @local_thread_var = dso_local thread_local global i32 42 // MINGW-DAG: @import_var = external dllimport global i32 @@ -25,7 +25,7 @@ // STATIC-DAG: @weak_bar = extern_weak dso_local global i32 // STATIC-DAG: declare dso_local void @foo() // STATIC-DAG: @baz = dso_local global i32 42 -// STATIC-DAG: define dso_local i32* @zed() +// STATIC-DAG: define dso_local frozen i32* @zed() // STATIC-DAG: @thread_var = external thread_local global i32 // STATIC-DAG: @local_thread_var = dso_local thread_local global i32 42 // STATIC-DAG: @import_var = external dso_local global i32 @@ -36,7 +36,7 @@ // PIE-COPY-DAG: @weak_bar = extern_weak global i32 // PIE-COPY-DAG: declare void @foo() // PIE-COPY-DAG: @baz = dso_local global i32 42 -// PIE-COPY-DAG: define dso_local i32* @zed() +// PIE-COPY-DAG: define dso_local frozen i32* @zed() // PIE-COPY-DAG: @thread_var = external thread_local global i32 // PIE-COPY-DAG: @local_thread_var = dso_local thread_local global i32 42 // PIE-COPY-DAG: @import_var = external dso_local global i32 @@ -47,7 +47,7 @@ // PIE-DAG: @weak_bar = extern_weak global i32 // PIE-DAG: declare void @foo() // PIE-DAG: @baz = dso_local global i32 42 -// PIE-DAG: define dso_local i32* @zed() +// PIE-DAG: define dso_local frozen i32* @zed() // PIE-DAG: @thread_var = external thread_local global i32 // PIE-DAG: @local_thread_var = dso_local thread_local global i32 42 // PIE-DAG: @import_var = external global i32 @@ -58,7 +58,7 @@ // NOPLT-DAG: @weak_bar = extern_weak dso_local global i32 // NOPLT-DAG: declare void @foo() // NOPLT-DAG: @baz = dso_local global i32 42 -// NOPLT-DAG: define dso_local i32* @zed() +// NOPLT-DAG: define dso_local frozen i32* @zed() // NOPLT-DAG: @thread_var = external thread_local global i32 // NOPLT-DAG: @local_thread_var = dso_local thread_local global i32 42 // NOPLT-DAG: @import_var = external dso_local global i32 @@ -69,7 +69,7 @@ // PIE-COPY-NOPLT-DAG: @weak_bar = extern_weak global i32 // PIE-COPY-NOPLT-DAG: declare void @foo() // PIE-COPY-NOPLT-DAG: @baz = dso_local global i32 42 -// PIE-COPY-NOPLT-DAG: define dso_local i32* @zed() +// PIE-COPY-NOPLT-DAG: define dso_local frozen i32* @zed() // PIE-COPY-NOPLT-DAG: @thread_var = external thread_local global i32 // PIE-COPY-NOPLT-DAG: @local_thread_var = dso_local thread_local global i32 42 // PIE-COPY-NOPLT-DAG: @import_var = external dso_local global i32 @@ -81,7 +81,7 @@ // PIE-NO-PLT-DAG: @weak_bar = extern_weak global i32 // PIE-NO-PLT-DAG: declare void @foo() // PIE-NO-PLT-DAG: @baz = dso_local global i32 42 -// PIE-NO-PLT-DAG: define dso_local i32* @zed() +// PIE-NO-PLT-DAG: define dso_local frozen i32* @zed() // PIE-NO-PLT-DAG: @thread_var = external thread_local global i32 // PIE-NO-PLT-DAG: @local_thread_var = dso_local thread_local global i32 42 // PIE-NO-PLT-DAG: @import_var = external global i32 @@ -92,7 +92,7 @@ // SHARED-DAG: @weak_bar = extern_weak global i32 // SHARED-DAG: declare void @foo() // SHARED-DAG: @baz = global i32 42 -// SHARED-DAG: define i32* @zed() +// SHARED-DAG: define frozen i32* @zed() // SHARED-DAG: @thread_var = external thread_local global i32 // SHARED-DAG: @local_thread_var = thread_local global i32 42 // PIE-NO-PLT-DAG: @import_var = external global i32 diff --git a/clang/test/CodeGen/enable_if.c b/clang/test/CodeGen/enable_if.c --- a/clang/test/CodeGen/enable_if.c +++ b/clang/test/CodeGen/enable_if.c @@ -90,6 +90,6 @@ int foo(char *i __attribute__((pass_object_size(0)))) __attribute__((enable_if(1, ""), overloadable)); - // CHECK: call i32 @_Z3fooUa9enable_ifIXLi1EEEPcU17pass_object_size0 + // CHECK: call frozen i32 @_Z3fooUa9enable_ifIXLi1EEEPcU17pass_object_size0 foo((void*)0); } diff --git a/clang/test/CodeGen/exceptions-seh-finally.c b/clang/test/CodeGen/exceptions-seh-finally.c --- a/clang/test/CodeGen/exceptions-seh-finally.c +++ b/clang/test/CodeGen/exceptions-seh-finally.c @@ -21,13 +21,13 @@ // // CHECK: [[invoke_cont]] // CHECK: %[[fp:[^ ]*]] = call i8* @llvm.localaddress() -// CHECK: call void @"?fin$0@0@basic_finally@@"({{i8( zeroext)?}} 0, i8* %[[fp]]) +// CHECK: call void @"?fin$0@0@basic_finally@@"({{i8 frozen( zeroext)?}} 0, i8* frozen %[[fp]]) // CHECK-NEXT: ret void // // CHECK: [[lpad]] // CHECK-NEXT: %[[pad:[^ ]*]] = cleanuppad // CHECK: %[[fp:[^ ]*]] = call i8* @llvm.localaddress() -// CHECK: call void @"?fin$0@0@basic_finally@@"({{i8( zeroext)?}} 1, i8* %[[fp]]) +// CHECK: call void @"?fin$0@0@basic_finally@@"({{i8 frozen( zeroext)?}} 1, i8* frozen %[[fp]]) // CHECK-NEXT: cleanupret from %[[pad]] unwind to caller // CHECK: define internal void @"?fin$0@0@basic_finally@@"({{.*}}) @@ -61,7 +61,7 @@ // // CHECK: [[invoke_cont]] // CHECK: %[[fp:[^ ]*]] = call i8* @llvm.localaddress() -// CHECK: call void @"?fin$0@0@label_in_finally@@"({{i8( zeroext)?}} 0, i8* %[[fp]]) +// CHECK: call void @"?fin$0@0@label_in_finally@@"({{i8 frozen( zeroext)?}} 0, i8* frozen %[[fp]]) // CHECK: ret void // CHECK: define internal void @"?fin$0@0@label_in_finally@@"({{.*}}) @@ -70,7 +70,7 @@ // // CHECK: [[l]] // CHECK: call void @cleanup() -// CHECK: call i32 @check_condition() +// CHECK: call frozen i32 @check_condition() // CHECK: br i1 {{.*}}, label // CHECK: br label %[[l]] @@ -89,16 +89,16 @@ // // CHECK: [[invoke_cont]] // CHECK: %[[fp:[^ ]*]] = call i8* @llvm.localaddress() -// CHECK: call void @"?fin$0@0@use_abnormal_termination@@"({{i8( zeroext)?}} 0, i8* %[[fp]]) +// CHECK: call void @"?fin$0@0@use_abnormal_termination@@"({{i8 frozen( zeroext)?}} 0, i8* frozen %[[fp]]) // CHECK: ret void // // CHECK: [[lpad]] // CHECK-NEXT: %[[pad:[^ ]*]] = cleanuppad // CHECK: %[[fp:[^ ]*]] = call i8* @llvm.localaddress() -// CHECK: call void @"?fin$0@0@use_abnormal_termination@@"({{i8( zeroext)?}} 1, i8* %[[fp]]) +// CHECK: call void @"?fin$0@0@use_abnormal_termination@@"({{i8 frozen( zeroext)?}} 1, i8* frozen %[[fp]]) // CHECK-NEXT: cleanupret from %[[pad]] unwind to caller -// CHECK: define internal void @"?fin$0@0@use_abnormal_termination@@"({{i8( zeroext)?}} %[[abnormal:abnormal_termination]], i8* %frame_pointer) +// CHECK: define internal void @"?fin$0@0@use_abnormal_termination@@"({{i8 frozen( zeroext)?}} %[[abnormal:abnormal_termination]], i8* frozen %frame_pointer) // CHECK-SAME: [[finally_attrs]] // CHECK: %[[abnormal_zext:[^ ]*]] = zext i8 %[[abnormal]] to i32 // CHECK: store i32 %[[abnormal_zext]], i32* @crashed @@ -153,7 +153,7 @@ } __finally { } } -// CHECK-LABEL: define dso_local i32 @finally_with_return() +// CHECK-LABEL: define dso_local frozen i32 @finally_with_return() // CHECK: call void @"?fin$0@0@finally_with_return@@"({{.*}}) // CHECK-NEXT: ret i32 42 @@ -175,7 +175,7 @@ return 0; } -// CHECK-LABEL: define dso_local i32 @nested___finally___finally +// CHECK-LABEL: define dso_local frozen i32 @nested___finally___finally // CHECK: invoke void @"?fin$1@0@nested___finally___finally@@"({{.*}}) // CHECK: to label %[[outercont:[^ ]*]] unwind label %[[lpad:[^ ]*]] // @@ -210,7 +210,7 @@ } return 912; } -// CHECK-LABEL: define dso_local i32 @nested___finally___finally_with_eh_edge +// CHECK-LABEL: define dso_local frozen i32 @nested___finally___finally_with_eh_edge // CHECK: invoke void @might_crash() // CHECK-NEXT: to label %[[invokecont:[^ ]*]] unwind label %[[lpad1:[^ ]*]] // @@ -280,7 +280,7 @@ } // CHECK-LABEL: define internal void @"?fin$0@0@finally_with_func@@"({{[^)]*}}) -// CHECK: call void @cleanup_with_func(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @"??_C@_0BC@COAGBPGM@finally_with_func?$AA@", i{{32|64}} 0, i{{32|64}} 0)) +// CHECK: call void @cleanup_with_func(i8* frozen getelementptr inbounds ([18 x i8], [18 x i8]* @"??_C@_0BC@COAGBPGM@finally_with_func?$AA@", i{{32|64}} 0, i{{32|64}} 0)) // Look for the absence of noinline. nounwind is expected; any further // attributes should be string attributes. diff --git a/clang/test/CodeGen/exceptions-seh-leave.c b/clang/test/CodeGen/exceptions-seh-leave.c --- a/clang/test/CodeGen/exceptions-seh-leave.c +++ b/clang/test/CodeGen/exceptions-seh-leave.c @@ -17,7 +17,7 @@ } return 1; } -// CHECK-LABEL: define dso_local i32 @__leave_with___except_simple() +// CHECK-LABEL: define dso_local frozen i32 @__leave_with___except_simple() // CHECK: store i32 15, i32* %myres // CHECK-NEXT: br label %[[tryleave:[^ ]*]] // CHECK-NOT: store i32 23 @@ -37,7 +37,7 @@ } return 1; } -// CHECK-LABEL: define dso_local i32 @__leave_with___except() +// CHECK-LABEL: define dso_local frozen i32 @__leave_with___except() // CHECK: invoke void @g() // CHECK-NEXT: to label %[[cont:.*]] unwind label %{{.*}} // For __excepts, instead of an explicit __try.__leave label, we could use @@ -69,13 +69,13 @@ } return 1; } -// CHECK-LABEL: define dso_local i32 @__leave_with___finally_simple() +// CHECK-LABEL: define dso_local frozen i32 @__leave_with___finally_simple() // CHECK: store i32 15, i32* %myres // CHECK-NEXT: br label %[[tryleave:[^ ]*]] // CHECK-NOT: store i32 23 // CHECK: [[tryleave]] // CHECK-NEXT: %[[fp:[^ ]*]] = call i8* @llvm.localaddress() -// CHECK-NEXT: call void @"?fin$0@0@__leave_with___finally_simple@@"(i8 0, i8* %[[fp]]) +// CHECK-NEXT: call void @"?fin$0@0@__leave_with___finally_simple@@"(i8 frozen 0, i8* frozen %[[fp]]) // __finally block doesn't return, __finally.cont doesn't exist. int __leave_with___finally_noreturn() { @@ -89,13 +89,13 @@ } return 1; } -// CHECK-LABEL: define dso_local i32 @__leave_with___finally_noreturn() +// CHECK-LABEL: define dso_local frozen i32 @__leave_with___finally_noreturn() // CHECK: store i32 15, i32* %myres // CHECK-NEXT: br label %[[tryleave:[^ ]*]] // CHECK-NOT: store i32 23 // CHECK: [[tryleave]] // CHECK-NEXT: %[[fp:[^ ]*]] = call i8* @llvm.localaddress() -// CHECK-NEXT: call void @"?fin$0@0@__leave_with___finally_noreturn@@"(i8 0, i8* %[[fp]]) +// CHECK-NEXT: call void @"?fin$0@0@__leave_with___finally_noreturn@@"(i8 frozen 0, i8* frozen %[[fp]]) // The "normal" case. int __leave_with___finally() { @@ -109,7 +109,7 @@ } return 1; } -// CHECK-LABEL: define dso_local i32 @__leave_with___finally() +// CHECK-LABEL: define dso_local frozen i32 @__leave_with___finally() // CHECK: invoke void @g() // CHECK-NEXT: to label %[[cont:.*]] unwind label %{{.*}} // For __finally, there needs to be an explicit __try.__leave, because @@ -119,7 +119,7 @@ // CHECK-NOT: store i32 23 // CHECK: [[tryleave]] // CHECK-NEXT: %[[fp:[^ ]*]] = call i8* @llvm.localaddress() -// CHECK-NEXT: call void @"?fin$0@0@__leave_with___finally@@"(i8 0, i8* %[[fp]]) +// CHECK-NEXT: call void @"?fin$0@0@__leave_with___finally@@"(i8 frozen 0, i8* frozen %[[fp]]) ////////////////////////////////////////////////////////////////////////////// @@ -142,14 +142,14 @@ } return 1; } -// CHECK-LABEL: define dso_local i32 @nested___except___finally() +// CHECK-LABEL: define dso_local frozen i32 @nested___except___finally() // CHECK-LABEL: invoke void @g() // CHECK-NEXT: to label %[[g1_cont1:.*]] unwind label %[[g1_lpad:.*]] // CHECK: [[g1_cont1]] // CHECK-NEXT: %[[fp:[^ ]*]] = call i8* @llvm.localaddress() -// CHECK-NEXT: invoke void @"?fin$0@0@nested___except___finally@@"(i8 0, i8* %[[fp]]) +// CHECK-NEXT: invoke void @"?fin$0@0@nested___except___finally@@"(i8 frozen 0, i8* frozen %[[fp]]) // CHECK-NEXT: to label %[[fin_cont:.*]] unwind label %[[g2_lpad:.*]] // CHECK: [[fin_cont]] @@ -159,7 +159,7 @@ // CHECK: [[g1_lpad]] // CHECK-NEXT: cleanuppad // CHECK-NEXT: %[[fp:[^ ]*]] = call i8* @llvm.localaddress() -// CHECK-NEXT: invoke void @"?fin$0@0@nested___except___finally@@"(i8 1, i8* %[[fp]]) +// CHECK-NEXT: invoke void @"?fin$0@0@nested___except___finally@@"(i8 frozen 1, i8* frozen %[[fp]]) // CHECK-NEXT: to label %[[g1_resume:.*]] unwind label %[[g2_lpad]] // CHECK: cleanupret {{.*}} unwind label %[[g2_lpad]] @@ -171,7 +171,7 @@ // CHECK: [[trycont]] // CHECK-NEXT: ret i32 1 -// CHECK-LABEL: define internal void @"?fin$0@0@nested___except___finally@@"(i8 %abnormal_termination, i8* %frame_pointer) +// CHECK-LABEL: define internal void @"?fin$0@0@nested___except___finally@@"(i8 frozen %abnormal_termination, i8* frozen %frame_pointer) // CHECK: call void @g() // CHECK: unreachable @@ -194,7 +194,7 @@ return 1; } // The order of basic blocks in the below doesn't matter. -// CHECK-LABEL: define dso_local i32 @nested___except___except() +// CHECK-LABEL: define dso_local frozen i32 @nested___except___except() // CHECK-LABEL: invoke void @g() // CHECK-NEXT: to label %[[g1_cont:.*]] unwind label %[[g1_lpad:.*]] @@ -247,7 +247,7 @@ return 1; } // The order of basic blocks in the below doesn't matter. -// CHECK-LABEL: define dso_local i32 @nested___finally___except() +// CHECK-LABEL: define dso_local frozen i32 @nested___finally___except() // CHECK-LABEL: invoke void @g() // CHECK-NEXT: to label %[[g1_cont:.*]] unwind label %[[g1_lpad:.*]] @@ -271,16 +271,16 @@ // CHECK: [[tryleave]] // CHECK: %[[fp:[^ ]*]] = call i8* @llvm.localaddress() -// CHECK-NEXT: call void @"?fin$0@0@nested___finally___except@@"(i8 0, i8* %[[fp]]) +// CHECK-NEXT: call void @"?fin$0@0@nested___finally___except@@"(i8 frozen 0, i8* frozen %[[fp]]) // CHECK-NEXT: ret i32 1 // CHECK: [[g2_lpad]] // CHECK: cleanuppad // CHECK: %[[fp:[^ ]*]] = call i8* @llvm.localaddress() -// CHECK-NEXT: call void @"?fin$0@0@nested___finally___except@@"(i8 1, i8* %[[fp]]) +// CHECK-NEXT: call void @"?fin$0@0@nested___finally___except@@"(i8 frozen 1, i8* frozen %[[fp]]) // CHECK: cleanupret {{.*}} unwind to caller -// CHECK-LABEL: define internal void @"?fin$0@0@nested___finally___except@@"(i8 %abnormal_termination, i8* %frame_pointer) +// CHECK-LABEL: define internal void @"?fin$0@0@nested___finally___except@@"(i8 frozen %abnormal_termination, i8* frozen %frame_pointer) // CHECK: ret void int nested___finally___finally() { @@ -302,7 +302,7 @@ return 1; } // The order of basic blocks in the below doesn't matter. -// CHECK-LABEL: define dso_local i32 @nested___finally___finally() +// CHECK-LABEL: define dso_local frozen i32 @nested___finally___finally() // CHECK: invoke void @g() // CHECK-NEXT: to label %[[g1_cont:.*]] unwind label %[[g1_lpad:.*]] @@ -310,19 +310,19 @@ // CHECK: [[g1_cont]] // CHECK: store i32 16, i32* %[[myres:[^ ]*]], // CHECK: %[[fp:[^ ]*]] = call i8* @llvm.localaddress() -// CHECK-NEXT: invoke void @"?fin$1@0@nested___finally___finally@@"(i8 0, i8* %[[fp]]) +// CHECK-NEXT: invoke void @"?fin$1@0@nested___finally___finally@@"(i8 frozen 0, i8* frozen %[[fp]]) // CHECK-NEXT: to label %[[finally_cont:.*]] unwind label %[[g2_lpad:.*]] // CHECK: [[finally_cont]] // CHECK: store i32 51, i32* %[[myres]] // CHECK: %[[fp:[^ ]*]] = call i8* @llvm.localaddress() -// CHECK-NEXT: call void @"?fin$0@0@nested___finally___finally@@"(i8 0, i8* %[[fp]]) +// CHECK-NEXT: call void @"?fin$0@0@nested___finally___finally@@"(i8 frozen 0, i8* frozen %[[fp]]) // CHECK-NEXT: ret i32 1 // CHECK: [[g1_lpad]] // CHECK-NEXT: %[[padtoken:[^ ]*]] = cleanuppad within none [] // CHECK-NEXT: %[[fp:[^ ]*]] = call i8* @llvm.localaddress() -// CHECK-NEXT: invoke void @"?fin$1@0@nested___finally___finally@@"(i8 1, i8* %[[fp]]) +// CHECK-NEXT: invoke void @"?fin$1@0@nested___finally___finally@@"(i8 frozen 1, i8* frozen %[[fp]]) // CHECK-NEXT: to label %[[finally_cont2:.*]] unwind label %[[g2_lpad]] // CHECK: [[finally_cont2]] // CHECK: cleanupret from %[[padtoken]] unwind label %[[g2_lpad]] @@ -330,12 +330,12 @@ // CHECK: [[g2_lpad]] // CHECK-NEXT: %[[padtoken:[^ ]*]] = cleanuppad within none [] // CHECK-NEXT: %[[fp:[^ ]*]] = call i8* @llvm.localaddress() -// CHECK-NEXT: call void @"?fin$0@0@nested___finally___finally@@"(i8 1, i8* %[[fp]]) +// CHECK-NEXT: call void @"?fin$0@0@nested___finally___finally@@"(i8 frozen 1, i8* frozen %[[fp]]) // CHECK: cleanupret from %[[padtoken]] unwind to caller -// CHECK-LABEL: define internal void @"?fin$0@0@nested___finally___finally@@"(i8 %abnormal_termination, i8* %frame_pointer) +// CHECK-LABEL: define internal void @"?fin$0@0@nested___finally___finally@@"(i8 frozen %abnormal_termination, i8* frozen %frame_pointer) // CHECK: ret void -// CHECK-LABEL: define internal void @"?fin$1@0@nested___finally___finally@@"(i8 %abnormal_termination, i8* %frame_pointer) +// CHECK-LABEL: define internal void @"?fin$1@0@nested___finally___finally@@"(i8 frozen %abnormal_termination, i8* frozen %frame_pointer) // CHECK: call void @g() // CHECK: unreachable diff --git a/clang/test/CodeGen/exceptions-seh-nested-finally.c b/clang/test/CodeGen/exceptions-seh-nested-finally.c --- a/clang/test/CodeGen/exceptions-seh-nested-finally.c +++ b/clang/test/CodeGen/exceptions-seh-nested-finally.c @@ -8,8 +8,8 @@ // Check that the first finally block passes the enclosing function's frame // pointer to the second finally block, instead of generating it via localaddr. -// CHECK-LABEL: define internal void @"?fin$0@0@main@@"({{i8( zeroext)?}} %abnormal_termination, i8* %frame_pointer) -// CHECK: call void @"?fin$1@0@main@@"({{i8( zeroext)?}} 0, i8* %frame_pointer) +// CHECK-LABEL: define internal void @"?fin$0@0@main@@"({{i8 frozen( zeroext)?}} %abnormal_termination, i8* frozen %frame_pointer) +// CHECK: call void @"?fin$1@0@main@@"({{i8 frozen( zeroext)?}} 0, i8* frozen %frame_pointer) int main() { int Check = 0; diff --git a/clang/test/CodeGen/exceptions-seh.c b/clang/test/CodeGen/exceptions-seh.c --- a/clang/test/CodeGen/exceptions-seh.c +++ b/clang/test/CodeGen/exceptions-seh.c @@ -12,7 +12,7 @@ void try_body(int numerator, int denominator, int *myres) { *myres = numerator / denominator; } -// CHECK-LABEL: define dso_local void @try_body(i32 %numerator, i32 %denominator, i32* %myres) +// CHECK-LABEL: define dso_local void @try_body(i32 frozen %numerator, i32 frozen %denominator, i32* frozen %myres) // CHECK: sdiv i32 // CHECK: store i32 %{{.*}}, i32* // CHECK: ret void @@ -29,11 +29,11 @@ return success; } -// CHECK-LABEL: define dso_local i32 @safe_div(i32 %numerator, i32 %denominator, i32* %res) +// CHECK-LABEL: define dso_local frozen i32 @safe_div(i32 frozen %numerator, i32 frozen %denominator, i32* frozen %res) // X64-SAME: personality i8* bitcast (i32 (...)* @__C_specific_handler to i8*) // ARM64-SAME: personality i8* bitcast (i32 (...)* @__C_specific_handler to i8*) // X86-SAME: personality i8* bitcast (i32 (...)* @_except_handler3 to i8*) -// CHECK: invoke void @try_body(i32 %{{.*}}, i32 %{{.*}}, i32* %{{.*}}) #[[NOINLINE:[0-9]+]] +// CHECK: invoke void @try_body(i32 frozen %{{.*}}, i32 frozen %{{.*}}, i32* frozen %{{.*}}) #[[NOINLINE:[0-9]+]] // CHECK: to label %{{.*}} unwind label %[[catchpad:[^ ]*]] // // CHECK: [[catchpad]] @@ -50,7 +50,7 @@ // 32-bit SEH needs this filter to save the exception code. // -// X86-LABEL: define internal i32 @"?filt$0@0@safe_div@@"() +// X86-LABEL: define internal frozen i32 @"?filt$0@0@safe_div@@"() // X86: %[[ebp:[^ ]*]] = call i8* @llvm.frameaddress.p0i8(i32 1) // X86: %[[fp:[^ ]*]] = call i8* @llvm.eh.recoverfp(i8* bitcast (i32 (i32, i32, i32*)* @safe_div to i8*), i8* %[[ebp]]) // X86: call i8* @llvm.localrecover(i8* bitcast (i32 (i32, i32, i32*)* @safe_div to i8*), i8* %[[fp]], i32 0) @@ -61,9 +61,9 @@ // X86: ret i32 1 // Mingw uses msvcrt, so it can also use _except_handler3. -// X86-GNU-LABEL: define dso_local i32 @safe_div(i32 %numerator, i32 %denominator, i32* %res) +// X86-GNU-LABEL: define dso_local frozen i32 @safe_div(i32 frozen %numerator, i32 frozen %denominator, i32* frozen %res) // X86-GNU-SAME: personality i8* bitcast (i32 (...)* @_except_handler3 to i8*) -// X64-GNU-LABEL: define dso_local i32 @safe_div(i32 %numerator, i32 %denominator, i32* %res) +// X64-GNU-LABEL: define dso_local frozen i32 @safe_div(i32 frozen %numerator, i32 frozen %denominator, i32* frozen %res) // X64-GNU-SAME: personality i8* bitcast (i32 (...)* @__C_specific_handler to i8*) void j(void); @@ -78,7 +78,7 @@ return r; } -// CHECK-LABEL: define dso_local i32 @filter_expr_capture() +// CHECK-LABEL: define dso_local frozen i32 @filter_expr_capture() // X64-SAME: personality i8* bitcast (i32 (...)* @__C_specific_handler to i8*) // ARM64-SAME: personality i8* bitcast (i32 (...)* @__C_specific_handler to i8*) // X86-SAME: personality i8* bitcast (i32 (...)* @_except_handler3 to i8*) @@ -94,15 +94,15 @@ // CHECK: %[[rv:[^ ]*]] = load i32, i32* %[[r]] // CHECK: ret i32 %[[rv]] -// X64-LABEL: define internal i32 @"?filt$0@0@filter_expr_capture@@"(i8* %exception_pointers, i8* %frame_pointer) +// X64-LABEL: define internal frozen i32 @"?filt$0@0@filter_expr_capture@@"(i8* frozen %exception_pointers, i8* frozen %frame_pointer) // X64: %[[fp:[^ ]*]] = call i8* @llvm.eh.recoverfp(i8* bitcast (i32 ()* @filter_expr_capture to i8*), i8* %frame_pointer) // X64: call i8* @llvm.localrecover(i8* bitcast (i32 ()* @filter_expr_capture to i8*), i8* %[[fp]], i32 0) // -// ARM64-LABEL: define internal i32 @"?filt$0@0@filter_expr_capture@@"(i8* %exception_pointers, i8* %frame_pointer) +// ARM64-LABEL: define internal frozen i32 @"?filt$0@0@filter_expr_capture@@"(i8* frozen %exception_pointers, i8* frozen %frame_pointer) // ARM64: %[[fp:[^ ]*]] = call i8* @llvm.eh.recoverfp(i8* bitcast (i32 ()* @filter_expr_capture to i8*), i8* %frame_pointer) // ARM64: call i8* @llvm.localrecover(i8* bitcast (i32 ()* @filter_expr_capture to i8*), i8* %[[fp]], i32 0) // -// X86-LABEL: define internal i32 @"?filt$0@0@filter_expr_capture@@"() +// X86-LABEL: define internal frozen i32 @"?filt$0@0@filter_expr_capture@@"() // X86: %[[ebp:[^ ]*]] = call i8* @llvm.frameaddress.p0i8(i32 1) // X86: %[[fp:[^ ]*]] = call i8* @llvm.eh.recoverfp(i8* bitcast (i32 ()* @filter_expr_capture to i8*), i8* %[[ebp]]) // X86: call i8* @llvm.localrecover(i8* bitcast (i32 ()* @filter_expr_capture to i8*), i8* %[[fp]], i32 0) @@ -124,7 +124,7 @@ } return r; } -// CHECK-LABEL: define dso_local i32 @nested_try() +// CHECK-LABEL: define dso_local frozen i32 @nested_try() // X64-SAME: personality i8* bitcast (i32 (...)* @__C_specific_handler to i8*) // ARM64-SAME: personality i8* bitcast (i32 (...)* @__C_specific_handler to i8*) // X86-SAME: personality i8* bitcast (i32 (...)* @_except_handler3 to i8*) @@ -165,13 +165,13 @@ // CHECK: store i32 0, i32* %[[r]] // CHECK: br label %[[inner_try_cont]] // -// CHECK-LABEL: define internal i32 @"?filt$0@0@nested_try@@"({{.*}}) +// CHECK-LABEL: define internal frozen i32 @"?filt$0@0@nested_try@@"({{.*}}) // X86: call i8* @llvm.eh.recoverfp({{.*}}) // CHECK: load i32*, i32** // CHECK: load i32, i32* // CHECK: icmp eq i32 %{{.*}}, 456 // -// CHECK-LABEL: define internal i32 @"?filt$1@0@nested_try@@"({{.*}}) +// CHECK-LABEL: define internal frozen i32 @"?filt$1@0@nested_try@@"({{.*}}) // X86: call i8* @llvm.eh.recoverfp({{.*}}) // CHECK: load i32*, i32** // CHECK: load i32, i32* @@ -185,7 +185,7 @@ } return g; } -// CHECK-LABEL: define dso_local i32 @basic_finally(i32 %g) +// CHECK-LABEL: define dso_local frozen i32 @basic_finally(i32 frozen %g) // X64-SAME: personality i8* bitcast (i32 (...)* @__C_specific_handler to i8*) // ARM64-SAME: personality i8* bitcast (i32 (...)* @__C_specific_handler to i8*) // X86-SAME: personality i8* bitcast (i32 (...)* @_except_handler3 to i8*) @@ -198,17 +198,17 @@ // // CHECK: [[cont]] // CHECK: %[[fp:[^ ]*]] = call i8* @llvm.localaddress() -// CHECK: call void @"?fin$0@0@basic_finally@@"({{i8( zeroext)?}} 0, i8* %[[fp]]) +// CHECK: call void @"?fin$0@0@basic_finally@@"({{i8( frozen| zeroext)*}} 0, i8* frozen %[[fp]]) // CHECK: load i32, i32* %[[g_addr]], align 4 // CHECK: ret i32 // // CHECK: [[cleanuppad]] // CHECK: %[[padtoken:[^ ]*]] = cleanuppad within none [] // CHECK: %[[fp:[^ ]*]] = call i8* @llvm.localaddress() -// CHECK: call void @"?fin$0@0@basic_finally@@"({{i8( zeroext)?}} 1, i8* %[[fp]]) +// CHECK: call void @"?fin$0@0@basic_finally@@"({{i8( frozen| zeroext)*}} 1, i8* frozen %[[fp]]) // CHECK: cleanupret from %[[padtoken]] unwind to caller -// CHECK: define internal void @"?fin$0@0@basic_finally@@"({{i8( zeroext)?}} %abnormal_termination, i8* %frame_pointer) +// CHECK: define internal void @"?fin$0@0@basic_finally@@"({{i8( frozen| zeroext)*}} %abnormal_termination, i8* frozen %frame_pointer) // CHECK: call i8* @llvm.localrecover(i8* bitcast (i32 (i32)* @basic_finally to i8*), i8* %frame_pointer, i32 0) // CHECK: load i32, i32* %{{.*}}, align 4 // CHECK: add nsw i32 %{{.*}}, 1 @@ -223,8 +223,8 @@ return 42; } } -// CHECK-LABEL: define dso_local i32 @except_return() -// CHECK: %[[tmp:[^ ]*]] = invoke i32 @returns_int() +// CHECK-LABEL: define dso_local frozen i32 @except_return() +// CHECK: %[[tmp:[^ ]*]] = invoke frozen i32 @returns_int() // CHECK: to label %[[cont:[^ ]*]] unwind label %[[catchpad:[^ ]*]] // // CHECK: [[catchpad]] @@ -257,7 +257,7 @@ // CHECK: call void (...) @llvm.localescape(i32* [[X]]) // CHECK-NEXT: store i32 {{.*}}, i32* [[X]], align 4 // CHECK-NEXT: [[LOCAL:%.*]] = call i8* @llvm.localaddress() -// CHECK-NEXT: call void [[FINALLY:@.*]](i8{{ zeroext | }}0, i8* [[LOCAL]]) +// CHECK-NEXT: call void [[FINALLY:@.*]](i8 frozen{{ zeroext | }}0, i8* frozen [[LOCAL]]) // CHECK: define internal void [[FINALLY]]( // CHECK: [[LOCAL:%.*]] = call i8* @llvm.localrecover( // CHECK: [[X:%.*]] = bitcast i8* [[LOCAL]] to i32* @@ -279,10 +279,10 @@ } } -// CHECK-LABEL: define dso_local i32 @exception_code_in_except() +// CHECK-LABEL: define dso_local frozen i32 @exception_code_in_except() // CHECK: %[[ret_slot:[^ ]*]] = alloca i32 // CHECK: %[[code_slot:[^ ]*]] = alloca i32 -// CHECK: invoke void @try_body(i32 0, i32 0, i32* null) +// CHECK: invoke void @try_body(i32 frozen 0, i32 frozen 0, i32* frozen null) // CHECK: %[[pad:[^ ]*]] = catchpad // CHECK: catchret from %[[pad]] // X64: %[[code:[^ ]*]] = call i32 @llvm.eh.exceptioncode(token %[[pad]]) diff --git a/clang/test/CodeGen/exceptions.c b/clang/test/CodeGen/exceptions.c --- a/clang/test/CodeGen/exceptions.c +++ b/clang/test/CodeGen/exceptions.c @@ -28,4 +28,4 @@ } void test2_helper(int x, int y) { } -// CHECK: invoke void @test2_helper(i32 5, i32 6) +// CHECK: invoke void @test2_helper(i32 frozen 5, i32 frozen 6) diff --git a/clang/test/CodeGen/exprs.c b/clang/test/CodeGen/exprs.c --- a/clang/test/CodeGen/exprs.c +++ b/clang/test/CodeGen/exprs.c @@ -121,7 +121,7 @@ } // rdar://7530813 -// CHECK-LABEL: define i32 @f11 +// CHECK-LABEL: define frozen i32 @f11 int f11(long X) { int A[100]; return A[X]; @@ -135,14 +135,14 @@ int f12() { // PR3150 - // CHECK-LABEL: define i32 @f12 + // CHECK-LABEL: define frozen i32 @f12 // CHECK: ret i32 1 return 1||1; } // Make sure negate of fp uses -0.0 for proper -0 handling. double f13(double X) { - // CHECK-LABEL: define double @f13 + // CHECK-LABEL: define frozen double @f13 // CHECK: fneg double return -X; } @@ -195,13 +195,13 @@ (strct)returns_int(); } // CHECK-LABEL: define void @f18() -// CHECK: call i32 @returns_int() +// CHECK: call frozen i32 @returns_int() // Ensure the right stmt is returned int f19() { return ({ 3;;4;; }); } -// CHECK-LABEL: define i32 @f19() +// CHECK-LABEL: define frozen i32 @f19() // CHECK: [[T:%.*]] = alloca i32 // CHECK: store i32 4, i32* [[T]] // CHECK: [[L:%.*]] = load i32, i32* [[T]] diff --git a/clang/test/CodeGen/ext-int-cc.c b/clang/test/CodeGen/ext-int-cc.c --- a/clang/test/CodeGen/ext-int-cc.c +++ b/clang/test/CodeGen/ext-int-cc.c @@ -1,33 +1,33 @@ -// RUN: %clang_cc1 -triple x86_64-gnu-linux -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=LIN64 -// RUN: %clang_cc1 -triple x86_64-windows-pc -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=WIN64 -// RUN: %clang_cc1 -triple i386-gnu-linux -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=LIN32 -// RUN: %clang_cc1 -triple i386-windows-pc -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=WIN32 -// RUN: %clang_cc1 -triple le32-nacl -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=NACL -// RUN: %clang_cc1 -triple nvptx64 -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=NVPTX64 -// RUN: %clang_cc1 -triple nvptx -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=NVPTX -// RUN: %clang_cc1 -triple sparcv9 -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=SPARCV9 -// RUN: %clang_cc1 -triple sparc -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=SPARC -// RUN: %clang_cc1 -triple mips64 -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=MIPS64 -// RUN: %clang_cc1 -triple mips -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=MIPS -// RUN: %clang_cc1 -triple spir64 -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=SPIR64 -// RUN: %clang_cc1 -triple spir -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=SPIR -// RUN: %clang_cc1 -triple hexagon -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=HEX -// RUN: %clang_cc1 -triple lanai -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=LANAI -// RUN: %clang_cc1 -triple r600 -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=R600 -// RUN: %clang_cc1 -triple arc -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=ARC -// RUN: %clang_cc1 -triple xcore -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=XCORE -// RUN: %clang_cc1 -triple riscv64 -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=RISCV64 -// RUN: %clang_cc1 -triple riscv32 -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=RISCV32 -// RUN: %clang_cc1 -triple wasm64 -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=WASM -// RUN: %clang_cc1 -triple wasm32 -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=WASM -// RUN: %clang_cc1 -triple systemz -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=SYSTEMZ -// RUN: %clang_cc1 -triple ppc64 -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=PPC64 -// RUN: %clang_cc1 -triple ppc -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=PPC32 -// RUN: %clang_cc1 -triple aarch64 -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=AARCH64 -// RUN: %clang_cc1 -triple aarch64 -target-abi darwinpcs -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=AARCH64DARWIN -// RUN: %clang_cc1 -triple arm64_32-apple-ios -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=AARCH64 -// RUN: %clang_cc1 -triple arm64_32-apple-ios -target-abi darwinpcs -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=AARCH64DARWIN -// RUN: %clang_cc1 -triple arm -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=ARM +// RUN: %clang_cc1 -disable-frozen-args -triple x86_64-gnu-linux -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=LIN64 +// RUN: %clang_cc1 -disable-frozen-args -triple x86_64-windows-pc -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=WIN64 +// RUN: %clang_cc1 -disable-frozen-args -triple i386-gnu-linux -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=LIN32 +// RUN: %clang_cc1 -disable-frozen-args -triple i386-windows-pc -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=WIN32 +// RUN: %clang_cc1 -disable-frozen-args -triple le32-nacl -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=NACL +// RUN: %clang_cc1 -disable-frozen-args -triple nvptx64 -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=NVPTX64 +// RUN: %clang_cc1 -disable-frozen-args -triple nvptx -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=NVPTX +// RUN: %clang_cc1 -disable-frozen-args -triple sparcv9 -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=SPARCV9 +// RUN: %clang_cc1 -disable-frozen-args -triple sparc -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=SPARC +// RUN: %clang_cc1 -disable-frozen-args -triple mips64 -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=MIPS64 +// RUN: %clang_cc1 -disable-frozen-args -triple mips -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=MIPS +// RUN: %clang_cc1 -disable-frozen-args -triple spir64 -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=SPIR64 +// RUN: %clang_cc1 -disable-frozen-args -triple spir -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=SPIR +// RUN: %clang_cc1 -disable-frozen-args -triple hexagon -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=HEX +// RUN: %clang_cc1 -disable-frozen-args -triple lanai -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=LANAI +// RUN: %clang_cc1 -disable-frozen-args -triple r600 -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=R600 +// RUN: %clang_cc1 -disable-frozen-args -triple arc -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=ARC +// RUN: %clang_cc1 -disable-frozen-args -triple xcore -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=XCORE +// RUN: %clang_cc1 -disable-frozen-args -triple riscv64 -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=RISCV64 +// RUN: %clang_cc1 -disable-frozen-args -triple riscv32 -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=RISCV32 +// RUN: %clang_cc1 -disable-frozen-args -triple wasm64 -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=WASM +// RUN: %clang_cc1 -disable-frozen-args -triple wasm32 -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=WASM +// RUN: %clang_cc1 -disable-frozen-args -triple systemz -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=SYSTEMZ +// RUN: %clang_cc1 -disable-frozen-args -triple ppc64 -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=PPC64 +// RUN: %clang_cc1 -disable-frozen-args -triple ppc -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=PPC32 +// RUN: %clang_cc1 -disable-frozen-args -triple aarch64 -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=AARCH64 +// RUN: %clang_cc1 -disable-frozen-args -triple aarch64 -target-abi darwinpcs -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=AARCH64DARWIN +// RUN: %clang_cc1 -disable-frozen-args -triple arm64_32-apple-ios -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=AARCH64 +// RUN: %clang_cc1 -disable-frozen-args -triple arm64_32-apple-ios -target-abi darwinpcs -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=AARCH64DARWIN +// RUN: %clang_cc1 -disable-frozen-args -triple arm -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=ARM // Make sure 128 and 64 bit versions are passed like integers, and that >128 // is passed indirectly. @@ -120,121 +120,121 @@ // ARM: define arm_aapcscc void @ParamPassing3(i15 signext %{{.+}}, i31 signext %{{.+}}) _ExtInt(63) ReturnPassing(){} -// LIN64: define i64 @ReturnPassing( -// WIN64: define dso_local i63 @ReturnPassing( -// LIN32: define i63 @ReturnPassing( -// WIN32: define dso_local i63 @ReturnPassing( -// NACL: define i63 @ReturnPassing( -// NVPTX64: define i63 @ReturnPassing( -// NVPTX: define i63 @ReturnPassing( -// SPARCV9: define signext i63 @ReturnPassing( -// SPARC: define i63 @ReturnPassing( -// MIPS64: define i63 @ReturnPassing( -// MIPS: define i63 @ReturnPassing( -// SPIR64: define spir_func i63 @ReturnPassing( -// SPIR: define spir_func i63 @ReturnPassing( -// HEX: define i63 @ReturnPassing( -// LANAI: define i63 @ReturnPassing( -// R600: define i63 @ReturnPassing( -// ARC: define i63 @ReturnPassing( -// XCORE: define i63 @ReturnPassing( -// RISCV64: define signext i63 @ReturnPassing( -// RISCV32: define i63 @ReturnPassing( -// WASM: define i63 @ReturnPassing( -// SYSTEMZ: define signext i63 @ReturnPassing( -// PPC64: define signext i63 @ReturnPassing( -// PPC32: define i63 @ReturnPassing( -// AARCH64: define i63 @ReturnPassing( -// AARCH64DARWIN: define i63 @ReturnPassing( -// ARM: define arm_aapcscc i63 @ReturnPassing( +// LIN64: define frozen i64 @ReturnPassing( +// WIN64: define dso_local frozen i63 @ReturnPassing( +// LIN32: define frozen i63 @ReturnPassing( +// WIN32: define dso_local frozen i63 @ReturnPassing( +// NACL: define frozen i63 @ReturnPassing( +// NVPTX64: define frozen i63 @ReturnPassing( +// NVPTX: define frozen i63 @ReturnPassing( +// SPARCV9: define frozen signext i63 @ReturnPassing( +// SPARC: define frozen i63 @ReturnPassing( +// MIPS64: define frozen i63 @ReturnPassing( +// MIPS: define frozen i63 @ReturnPassing( +// SPIR64: define spir_func frozen i63 @ReturnPassing( +// SPIR: define spir_func frozen i63 @ReturnPassing( +// HEX: define frozen i63 @ReturnPassing( +// LANAI: define frozen i63 @ReturnPassing( +// R600: define frozen i63 @ReturnPassing( +// ARC: define frozen i63 @ReturnPassing( +// XCORE: define frozen i63 @ReturnPassing( +// RISCV64: define frozen signext i63 @ReturnPassing( +// RISCV32: define frozen i63 @ReturnPassing( +// WASM: define frozen i63 @ReturnPassing( +// SYSTEMZ: define frozen signext i63 @ReturnPassing( +// PPC64: define frozen signext i63 @ReturnPassing( +// PPC32: define frozen i63 @ReturnPassing( +// AARCH64: define frozen i63 @ReturnPassing( +// AARCH64DARWIN: define frozen i63 @ReturnPassing( +// ARM: define arm_aapcscc frozen i63 @ReturnPassing( _ExtInt(64) ReturnPassing2(){} -// LIN64: define i64 @ReturnPassing2( -// WIN64: define dso_local i64 @ReturnPassing2( -// LIN32: define i64 @ReturnPassing2( -// WIN32: define dso_local i64 @ReturnPassing2( -// NACL: define i64 @ReturnPassing2( -// NVPTX64: define i64 @ReturnPassing2( -// NVPTX: define i64 @ReturnPassing2( -// SPARCV9: define i64 @ReturnPassing2( -// SPARC: define i64 @ReturnPassing2( -// MIPS64: define i64 @ReturnPassing2( -// MIPS: define i64 @ReturnPassing2( -// SPIR64: define spir_func i64 @ReturnPassing2( -// SPIR: define spir_func i64 @ReturnPassing2( -// HEX: define i64 @ReturnPassing2( -// LANAI: define i64 @ReturnPassing2( -// R600: define i64 @ReturnPassing2( -// ARC: define i64 @ReturnPassing2( -// XCORE: define i64 @ReturnPassing2( -// RISCV64: define i64 @ReturnPassing2( -// RISCV32: define i64 @ReturnPassing2( -// WASM: define i64 @ReturnPassing2( -// SYSTEMZ: define i64 @ReturnPassing2( -// PPC64: define i64 @ReturnPassing2( -// PPC32: define i64 @ReturnPassing2( -// AARCH64: define i64 @ReturnPassing2( -// AARCH64DARWIN: define i64 @ReturnPassing2( -// ARM: define arm_aapcscc i64 @ReturnPassing2( +// LIN64: define frozen i64 @ReturnPassing2( +// WIN64: define dso_local frozen i64 @ReturnPassing2( +// LIN32: define frozen i64 @ReturnPassing2( +// WIN32: define dso_local frozen i64 @ReturnPassing2( +// NACL: define frozen i64 @ReturnPassing2( +// NVPTX64: define frozen i64 @ReturnPassing2( +// NVPTX: define frozen i64 @ReturnPassing2( +// SPARCV9: define frozen i64 @ReturnPassing2( +// SPARC: define frozen i64 @ReturnPassing2( +// MIPS64: define frozen i64 @ReturnPassing2( +// MIPS: define frozen i64 @ReturnPassing2( +// SPIR64: define spir_func frozen i64 @ReturnPassing2( +// SPIR: define spir_func frozen i64 @ReturnPassing2( +// HEX: define frozen i64 @ReturnPassing2( +// LANAI: define frozen i64 @ReturnPassing2( +// R600: define frozen i64 @ReturnPassing2( +// ARC: define frozen i64 @ReturnPassing2( +// XCORE: define frozen i64 @ReturnPassing2( +// RISCV64: define frozen i64 @ReturnPassing2( +// RISCV32: define frozen i64 @ReturnPassing2( +// WASM: define frozen i64 @ReturnPassing2( +// SYSTEMZ: define frozen i64 @ReturnPassing2( +// PPC64: define frozen i64 @ReturnPassing2( +// PPC32: define frozen i64 @ReturnPassing2( +// AARCH64: define frozen i64 @ReturnPassing2( +// AARCH64DARWIN: define frozen i64 @ReturnPassing2( +// ARM: define arm_aapcscc frozen i64 @ReturnPassing2( _ExtInt(127) ReturnPassing3(){} -// LIN64: define { i64, i64 } @ReturnPassing3( +// LIN64: define frozen { i64, i64 } @ReturnPassing3( // WIN64: define dso_local void @ReturnPassing3(i127* noalias sret // LIN32: define void @ReturnPassing3(i127* noalias sret // WIN32: define dso_local void @ReturnPassing3(i127* noalias sret // NACL: define void @ReturnPassing3(i127* noalias sret // NVPTX/64 makes the intentional choice to put all return values direct, even // large structures, so we do the same here. -// NVPTX64: define i127 @ReturnPassing3( -// NVPTX: define i127 @ReturnPassing3( -// SPARCV9: define i127 @ReturnPassing3( +// NVPTX64: define frozen i127 @ReturnPassing3( +// NVPTX: define frozen i127 @ReturnPassing3( +// SPARCV9: define frozen i127 @ReturnPassing3( // SPARC: define void @ReturnPassing3(i127* noalias sret -// MIPS64: define i127 @ReturnPassing3( +// MIPS64: define frozen i127 @ReturnPassing3( // MIPS: define void @ReturnPassing3(i127* noalias sret -// SPIR64: define spir_func i127 @ReturnPassing3( +// SPIR64: define spir_func frozen i127 @ReturnPassing3( // SPIR: define spir_func void @ReturnPassing3(i127* noalias sret // HEX: define void @ReturnPassing3(i127* noalias sret // LANAI: define void @ReturnPassing3(i127* noalias sret // R600: define void @ReturnPassing3(i127 addrspace(5)* noalias sret // ARC: define void @ReturnPassing3(i127* noalias sret // XCORE: define void @ReturnPassing3(i127* noalias sret -// RISCV64: define i127 @ReturnPassing3( +// RISCV64: define frozen i127 @ReturnPassing3( // RISCV32: define void @ReturnPassing3(i127* noalias sret -// WASM: define i127 @ReturnPassing3( +// WASM: define frozen i127 @ReturnPassing3( // SYSTEMZ: define void @ReturnPassing3(i127* noalias sret -// PPC64: define i127 @ReturnPassing3( +// PPC64: define frozen i127 @ReturnPassing3( // PPC32: define void @ReturnPassing3(i127* noalias sret -// AARCH64: define i127 @ReturnPassing3( -// AARCH64DARWIN: define i127 @ReturnPassing3( +// AARCH64: define frozen i127 @ReturnPassing3( +// AARCH64DARWIN: define frozen i127 @ReturnPassing3( // ARM: define arm_aapcscc void @ReturnPassing3(i127* noalias sret _ExtInt(128) ReturnPassing4(){} -// LIN64: define { i64, i64 } @ReturnPassing4( +// LIN64: define frozen { i64, i64 } @ReturnPassing4( // WIN64: define dso_local void @ReturnPassing4(i128* noalias sret // LIN32: define void @ReturnPassing4(i128* noalias sret // WIN32: define dso_local void @ReturnPassing4(i128* noalias sret // NACL: define void @ReturnPassing4(i128* noalias sret -// NVPTX64: define i128 @ReturnPassing4( -// NVPTX: define i128 @ReturnPassing4( -// SPARCV9: define i128 @ReturnPassing4( +// NVPTX64: define frozen i128 @ReturnPassing4( +// NVPTX: define frozen i128 @ReturnPassing4( +// SPARCV9: define frozen i128 @ReturnPassing4( // SPARC: define void @ReturnPassing4(i128* noalias sret -// MIPS64: define i128 @ReturnPassing4( +// MIPS64: define frozen i128 @ReturnPassing4( // MIPS: define void @ReturnPassing4(i128* noalias sret -// SPIR64: define spir_func i128 @ReturnPassing4( +// SPIR64: define spir_func frozen i128 @ReturnPassing4( // SPIR: define spir_func void @ReturnPassing4(i128* noalias sret // HEX: define void @ReturnPassing4(i128* noalias sret // LANAI: define void @ReturnPassing4(i128* noalias sret // R600: define void @ReturnPassing4(i128 addrspace(5)* noalias sret // ARC: define void @ReturnPassing4(i128* noalias sret // XCORE: define void @ReturnPassing4(i128* noalias sret -// RISCV64: define i128 @ReturnPassing4( +// RISCV64: define frozen i128 @ReturnPassing4( // RISCV32: define void @ReturnPassing4(i128* noalias sret -// WASM: define i128 @ReturnPassing4( +// WASM: define frozen i128 @ReturnPassing4( // SYSTEMZ: define void @ReturnPassing4(i128* noalias sret -// PPC64: define i128 @ReturnPassing4( +// PPC64: define frozen i128 @ReturnPassing4( // PPC32: define void @ReturnPassing4(i128* noalias sret -// AARCH64: define i128 @ReturnPassing4( -// AARCH64DARWIN: define i128 @ReturnPassing4( +// AARCH64: define frozen i128 @ReturnPassing4( +// AARCH64DARWIN: define frozen i128 @ReturnPassing4( // ARM: define arm_aapcscc void @ReturnPassing4(i128* noalias sret _ExtInt(129) ReturnPassing5(){} @@ -243,9 +243,9 @@ // LIN32: define void @ReturnPassing5(i129* noalias sret // WIN32: define dso_local void @ReturnPassing5(i129* noalias sret // NACL: define void @ReturnPassing5(i129* noalias sret -// NVPTX64: define i129 @ReturnPassing5( -// NVPTX: define i129 @ReturnPassing5( -// SPARCV9: define i129 @ReturnPassing5( +// NVPTX64: define frozen i129 @ReturnPassing5( +// NVPTX: define frozen i129 @ReturnPassing5( +// SPARCV9: define frozen i129 @ReturnPassing5( // SPARC: define void @ReturnPassing5(i129* noalias sret // MIPS64: define void @ReturnPassing5(i129* noalias sret // MIPS: define void @ReturnPassing5(i129* noalias sret @@ -269,6 +269,6 @@ // SparcV9 is odd in that it has a return-size limit of 256, not 128 or 64 // like other platforms, so test to make sure this behavior will still work. _ExtInt(256) ReturnPassing6() {} -// SPARCV9: define i256 @ReturnPassing6( +// SPARCV9: define frozen i256 @ReturnPassing6( _ExtInt(257) ReturnPassing7() {} // SPARCV9: define void @ReturnPassing7(i257* noalias sret diff --git a/clang/test/CodeGen/extern-inline.c b/clang/test/CodeGen/extern-inline.c --- a/clang/test/CodeGen/extern-inline.c +++ b/clang/test/CodeGen/extern-inline.c @@ -6,21 +6,21 @@ // redefinition. extern inline int f(int a) {return a;} int g(void) {return f(0);} -// CHECK: call i32 @f +// CHECK: call frozen i32 @f int f(int b) {return 1+b;} // CHECK: load i32, i32* %{{.*}} // CHECK: add nsw i32 1, %{{.*}} int h(void) {return f(1);} -// CHECK: call i32 @f +// CHECK: call frozen i32 @f // It shouldn't matter if the function was redefined static. extern inline int f2(int a, int b) {return a+b;} int g2(void) {return f2(0,1);} -// CHECK: call i32 @f2 +// CHECK: call frozen i32 @f2 static int f2(int a, int b) {return a*b;} // CHECK: load i32, i32* %{{.*}} // CHECK: load i32, i32* %{{.*}} // CHECK: mul nsw i32 %{{.*}}, %{{.*}} int h2(void) {return f2(1,2);} -// CHECK: call i32 @f2 +// CHECK: call frozen i32 @f2 diff --git a/clang/test/CodeGen/fp-floatcontrol-pragma.cpp b/clang/test/CodeGen/fp-floatcontrol-pragma.cpp --- a/clang/test/CodeGen/fp-floatcontrol-pragma.cpp +++ b/clang/test/CodeGen/fp-floatcontrol-pragma.cpp @@ -65,7 +65,7 @@ #pragma float_control(pop) float fff(float x, float y) { -// CHECK-LABEL: define float @_Z3fffff{{.*}} +// CHECK-LABEL: define frozen float @_Z3fffff{{.*}} // CHECK: entry #pragma float_control(except, on) float z; @@ -87,7 +87,7 @@ return z; } float check_precise(float x, float y) { - // CHECK-LABEL: define float @_Z13check_preciseff{{.*}} + // CHECK-LABEL: define frozen float @_Z13check_preciseff{{.*}} float z; { #pragma float_control(precise, on) diff --git a/clang/test/CodeGen/fp-function-attrs.cpp b/clang/test/CodeGen/fp-function-attrs.cpp --- a/clang/test/CodeGen/fp-function-attrs.cpp +++ b/clang/test/CodeGen/fp-function-attrs.cpp @@ -7,7 +7,7 @@ return tmp; } -// CHECK: define float @_Z12test_defaultfff(float %a, float %b, float %c) [[FAST_ATTRS:#[0-9]+]] +// CHECK: define frozen float @_Z12test_defaultfff(float frozen %a, float frozen %b, float frozen %c) [[FAST_ATTRS:#[0-9]+]] // CHECK: fadd fast float {{%.+}}, {{%.+}} // CHECK: fadd fast float {{%.+}}, {{%.+}} @@ -21,7 +21,7 @@ return tmp; } -// CHECK: define float @_Z22test_precise_on_pragmafff(float %a, float %b, float %c) [[PRECISE_ATTRS:#[0-9]+]] +// CHECK: define frozen float @_Z22test_precise_on_pragmafff(float frozen %a, float frozen %b, float frozen %c) [[PRECISE_ATTRS:#[0-9]+]] // CHECK: fadd float {{%.+}}, {{%.+}} // CHECK: fadd fast float {{%.+}}, {{%.+}} @@ -35,7 +35,7 @@ return tmp; } -// CHECK: define float @_Z27test_reassociate_off_pragmafff(float %a, float %b, float %c) [[NOREASSOC_ATTRS:#[0-9]+]] +// CHECK: define frozen float @_Z27test_reassociate_off_pragmafff(float frozen %a, float frozen %b, float frozen %c) [[NOREASSOC_ATTRS:#[0-9]+]] // CHECK: fadd nnan ninf nsz arcp contract afn float {{%.+}}, {{%.+}} // CHECK: fadd fast float {{%.+}}, {{%.+}} diff --git a/clang/test/CodeGen/fp-options-to-fast-math-flags.c b/clang/test/CodeGen/fp-options-to-fast-math-flags.c --- a/clang/test/CodeGen/fp-options-to-fast-math-flags.c +++ b/clang/test/CodeGen/fp-options-to-fast-math-flags.c @@ -14,29 +14,29 @@ return a + fn(a); } -// CHECK-PRECISE: [[CALL_RES:%.+]] = call float @fn(float {{%.+}}) +// CHECK-PRECISE: [[CALL_RES:%.+]] = call frozen float @fn(float frozen {{%.+}}) // CHECK-PRECISE: {{%.+}} = fadd float {{%.+}}, [[CALL_RES]] -// CHECK-NO-NANS: [[CALL_RES:%.+]] = call nnan float @fn(float {{%.+}}) +// CHECK-NO-NANS: [[CALL_RES:%.+]] = call nnan frozen float @fn(float frozen {{%.+}}) // CHECK-NO-NANS: {{%.+}} = fadd nnan float {{%.+}}, [[CALL_RES]] -// CHECK-NO-INFS: [[CALL_RES:%.+]] = call ninf float @fn(float {{%.+}}) +// CHECK-NO-INFS: [[CALL_RES:%.+]] = call ninf frozen float @fn(float frozen {{%.+}}) // CHECK-NO-INFS: {{%.+}} = fadd ninf float {{%.+}}, [[CALL_RES]] -// CHECK-FINITE: [[CALL_RES:%.+]] = call nnan ninf float @fn(float {{%.+}}) +// CHECK-FINITE: [[CALL_RES:%.+]] = call nnan ninf frozen float @fn(float frozen {{%.+}}) // CHECK-FINITE: {{%.+}} = fadd nnan ninf float {{%.+}}, [[CALL_RES]] -// CHECK-NO-SIGNED-ZEROS: [[CALL_RES:%.+]] = call nsz float @fn(float {{%.+}}) +// CHECK-NO-SIGNED-ZEROS: [[CALL_RES:%.+]] = call nsz frozen float @fn(float frozen {{%.+}}) // CHECK-NO-SIGNED-ZEROS: {{%.+}} = fadd nsz float {{%.+}}, [[CALL_RES]] -// CHECK-REASSOC: [[CALL_RES:%.+]] = call reassoc float @fn(float {{%.+}}) +// CHECK-REASSOC: [[CALL_RES:%.+]] = call reassoc frozen float @fn(float frozen {{%.+}}) // CHECK-REASSOC: {{%.+}} = fadd reassoc float {{%.+}}, [[CALL_RES]] -// CHECK-RECIP: [[CALL_RES:%.+]] = call arcp float @fn(float {{%.+}}) +// CHECK-RECIP: [[CALL_RES:%.+]] = call arcp frozen float @fn(float frozen {{%.+}}) // CHECK-RECIP: {{%.+}} = fadd arcp float {{%.+}}, [[CALL_RES]] -// CHECK-UNSAFE: [[CALL_RES:%.+]] = call reassoc nsz arcp afn float @fn(float {{%.+}}) +// CHECK-UNSAFE: [[CALL_RES:%.+]] = call reassoc nsz arcp afn frozen float @fn(float frozen {{%.+}}) // CHECK-UNSAFE: {{%.+}} = fadd reassoc nsz arcp afn float {{%.+}}, [[CALL_RES]] -// CHECK-FAST: [[CALL_RES:%.+]] = call reassoc nnan ninf nsz arcp afn float @fn(float {{%.+}}) +// CHECK-FAST: [[CALL_RES:%.+]] = call reassoc nnan ninf nsz arcp afn frozen float @fn(float frozen {{%.+}}) // CHECK-FAST: {{%.+}} = fadd reassoc nnan ninf nsz arcp afn float {{%.+}}, [[CALL_RES]] diff --git a/clang/test/CodeGen/fp128_complex.c b/clang/test/CodeGen/fp128_complex.c --- a/clang/test/CodeGen/fp128_complex.c +++ b/clang/test/CodeGen/fp128_complex.c @@ -2,8 +2,8 @@ _Complex long double a, b, c, d; void test_fp128_compound_assign(void) { - // CHECK: call { fp128, fp128 } @__multc3 + // CHECK: call frozen { fp128, fp128 } @__multc3 a *= b; - // CHECK: call { fp128, fp128 } @__divtc3 + // CHECK: call frozen { fp128, fp128 } @__divtc3 c /= d; } diff --git a/clang/test/CodeGen/fpconstrained-cmp-double.c b/clang/test/CodeGen/fpconstrained-cmp-double.c --- a/clang/test/CodeGen/fpconstrained-cmp-double.c +++ b/clang/test/CodeGen/fpconstrained-cmp-double.c @@ -6,7 +6,7 @@ // RUN: %clang_cc1 -frounding-math -ffp-exception-behavior=maytrap -emit-llvm -o - %s | FileCheck %s -check-prefix=CHECK -check-prefix=MAYTRAP _Bool QuietEqual(double f1, double f2) { - // CHECK-LABEL: define {{.*}}i1 @QuietEqual(double %f1, double %f2) + // CHECK-LABEL: define {{.*}}i1 @QuietEqual(double frozen %f1, double frozen %f2) // FCMP: fcmp oeq double %{{.*}}, %{{.*}} // IGNORE: call i1 @llvm.experimental.constrained.fcmp.f64(double %{{.*}}, double %{{.*}}, metadata !"oeq", metadata !"fpexcept.ignore") @@ -18,7 +18,7 @@ } _Bool QuietNotEqual(double f1, double f2) { - // CHECK-LABEL: define {{.*}}i1 @QuietNotEqual(double %f1, double %f2) + // CHECK-LABEL: define {{.*}}i1 @QuietNotEqual(double frozen %f1, double frozen %f2) // FCMP: fcmp une double %{{.*}}, %{{.*}} // IGNORE: call i1 @llvm.experimental.constrained.fcmp.f64(double %{{.*}}, double %{{.*}}, metadata !"une", metadata !"fpexcept.ignore") @@ -30,7 +30,7 @@ } _Bool SignalingLess(double f1, double f2) { - // CHECK-LABEL: define {{.*}}i1 @SignalingLess(double %f1, double %f2) + // CHECK-LABEL: define {{.*}}i1 @SignalingLess(double frozen %f1, double frozen %f2) // FCMP: fcmp olt double %{{.*}}, %{{.*}} // IGNORE: call i1 @llvm.experimental.constrained.fcmps.f64(double %{{.*}}, double %{{.*}}, metadata !"olt", metadata !"fpexcept.ignore") @@ -42,7 +42,7 @@ } _Bool SignalingLessEqual(double f1, double f2) { - // CHECK-LABEL: define {{.*}}i1 @SignalingLessEqual(double %f1, double %f2) + // CHECK-LABEL: define {{.*}}i1 @SignalingLessEqual(double frozen %f1, double frozen %f2) // FCMP: fcmp ole double %{{.*}}, %{{.*}} // IGNORE: call i1 @llvm.experimental.constrained.fcmps.f64(double %{{.*}}, double %{{.*}}, metadata !"ole", metadata !"fpexcept.ignore") @@ -54,7 +54,7 @@ } _Bool SignalingGreater(double f1, double f2) { - // CHECK-LABEL: define {{.*}}i1 @SignalingGreater(double %f1, double %f2) + // CHECK-LABEL: define {{.*}}i1 @SignalingGreater(double frozen %f1, double frozen %f2) // FCMP: fcmp ogt double %{{.*}}, %{{.*}} // IGNORE: call i1 @llvm.experimental.constrained.fcmps.f64(double %{{.*}}, double %{{.*}}, metadata !"ogt", metadata !"fpexcept.ignore") @@ -66,7 +66,7 @@ } _Bool SignalingGreaterEqual(double f1, double f2) { - // CHECK-LABEL: define {{.*}}i1 @SignalingGreaterEqual(double %f1, double %f2) + // CHECK-LABEL: define {{.*}}i1 @SignalingGreaterEqual(double frozen %f1, double frozen %f2) // FCMP: fcmp oge double %{{.*}}, %{{.*}} // IGNORE: call i1 @llvm.experimental.constrained.fcmps.f64(double %{{.*}}, double %{{.*}}, metadata !"oge", metadata !"fpexcept.ignore") @@ -78,7 +78,7 @@ } _Bool QuietLess(double f1, double f2) { - // CHECK-LABEL: define {{.*}}i1 @QuietLess(double %f1, double %f2) + // CHECK-LABEL: define {{.*}}i1 @QuietLess(double frozen %f1, double frozen %f2) // FCMP: fcmp olt double %{{.*}}, %{{.*}} // IGNORE: call i1 @llvm.experimental.constrained.fcmp.f64(double %{{.*}}, double %{{.*}}, metadata !"olt", metadata !"fpexcept.ignore") @@ -90,7 +90,7 @@ } _Bool QuietLessEqual(double f1, double f2) { - // CHECK-LABEL: define {{.*}}i1 @QuietLessEqual(double %f1, double %f2) + // CHECK-LABEL: define {{.*}}i1 @QuietLessEqual(double frozen %f1, double frozen %f2) // FCMP: fcmp ole double %{{.*}}, %{{.*}} // IGNORE: call i1 @llvm.experimental.constrained.fcmp.f64(double %{{.*}}, double %{{.*}}, metadata !"ole", metadata !"fpexcept.ignore") @@ -102,7 +102,7 @@ } _Bool QuietGreater(double f1, double f2) { - // CHECK-LABEL: define {{.*}}i1 @QuietGreater(double %f1, double %f2) + // CHECK-LABEL: define {{.*}}i1 @QuietGreater(double frozen %f1, double frozen %f2) // FCMP: fcmp ogt double %{{.*}}, %{{.*}} // IGNORE: call i1 @llvm.experimental.constrained.fcmp.f64(double %{{.*}}, double %{{.*}}, metadata !"ogt", metadata !"fpexcept.ignore") @@ -114,7 +114,7 @@ } _Bool QuietGreaterEqual(double f1, double f2) { - // CHECK-LABEL: define {{.*}}i1 @QuietGreaterEqual(double %f1, double %f2) + // CHECK-LABEL: define {{.*}}i1 @QuietGreaterEqual(double frozen %f1, double frozen %f2) // FCMP: fcmp oge double %{{.*}}, %{{.*}} // IGNORE: call i1 @llvm.experimental.constrained.fcmp.f64(double %{{.*}}, double %{{.*}}, metadata !"oge", metadata !"fpexcept.ignore") @@ -126,7 +126,7 @@ } _Bool QuietLessGreater(double f1, double f2) { - // CHECK-LABEL: define {{.*}}i1 @QuietLessGreater(double %f1, double %f2) + // CHECK-LABEL: define {{.*}}i1 @QuietLessGreater(double frozen %f1, double frozen %f2) // FCMP: fcmp one double %{{.*}}, %{{.*}} // IGNORE: call i1 @llvm.experimental.constrained.fcmp.f64(double %{{.*}}, double %{{.*}}, metadata !"one", metadata !"fpexcept.ignore") @@ -138,7 +138,7 @@ } _Bool QuietUnordered(double f1, double f2) { - // CHECK-LABEL: define {{.*}}i1 @QuietUnordered(double %f1, double %f2) + // CHECK-LABEL: define {{.*}}i1 @QuietUnordered(double frozen %f1, double frozen %f2) // FCMP: fcmp uno double %{{.*}}, %{{.*}} // IGNORE: call i1 @llvm.experimental.constrained.fcmp.f64(double %{{.*}}, double %{{.*}}, metadata !"uno", metadata !"fpexcept.ignore") diff --git a/clang/test/CodeGen/fpconstrained-cmp-float.c b/clang/test/CodeGen/fpconstrained-cmp-float.c --- a/clang/test/CodeGen/fpconstrained-cmp-float.c +++ b/clang/test/CodeGen/fpconstrained-cmp-float.c @@ -6,7 +6,7 @@ // RUN: %clang_cc1 -frounding-math -ffp-exception-behavior=maytrap -emit-llvm -o - %s | FileCheck %s -check-prefix=CHECK -check-prefix=MAYTRAP _Bool QuietEqual(float f1, float f2) { - // CHECK-LABEL: define {{.*}}i1 @QuietEqual(float %f1, float %f2) + // CHECK-LABEL: define {{.*}}i1 @QuietEqual(float frozen %f1, float frozen %f2) // FCMP: fcmp oeq float %{{.*}}, %{{.*}} // IGNORE: call i1 @llvm.experimental.constrained.fcmp.f32(float %{{.*}}, float %{{.*}}, metadata !"oeq", metadata !"fpexcept.ignore") @@ -18,7 +18,7 @@ } _Bool QuietNotEqual(float f1, float f2) { - // CHECK-LABEL: define {{.*}}i1 @QuietNotEqual(float %f1, float %f2) + // CHECK-LABEL: define {{.*}}i1 @QuietNotEqual(float frozen %f1, float frozen %f2) // FCMP: fcmp une float %{{.*}}, %{{.*}} // IGNORE: call i1 @llvm.experimental.constrained.fcmp.f32(float %{{.*}}, float %{{.*}}, metadata !"une", metadata !"fpexcept.ignore") @@ -30,7 +30,7 @@ } _Bool SignalingLess(float f1, float f2) { - // CHECK-LABEL: define {{.*}}i1 @SignalingLess(float %f1, float %f2) + // CHECK-LABEL: define {{.*}}i1 @SignalingLess(float frozen %f1, float frozen %f2) // FCMP: fcmp olt float %{{.*}}, %{{.*}} // IGNORE: call i1 @llvm.experimental.constrained.fcmps.f32(float %{{.*}}, float %{{.*}}, metadata !"olt", metadata !"fpexcept.ignore") @@ -42,7 +42,7 @@ } _Bool SignalingLessEqual(float f1, float f2) { - // CHECK-LABEL: define {{.*}}i1 @SignalingLessEqual(float %f1, float %f2) + // CHECK-LABEL: define {{.*}}i1 @SignalingLessEqual(float frozen %f1, float frozen %f2) // FCMP: fcmp ole float %{{.*}}, %{{.*}} // IGNORE: call i1 @llvm.experimental.constrained.fcmps.f32(float %{{.*}}, float %{{.*}}, metadata !"ole", metadata !"fpexcept.ignore") @@ -54,7 +54,7 @@ } _Bool SignalingGreater(float f1, float f2) { - // CHECK-LABEL: define {{.*}}i1 @SignalingGreater(float %f1, float %f2) + // CHECK-LABEL: define {{.*}}i1 @SignalingGreater(float frozen %f1, float frozen %f2) // FCMP: fcmp ogt float %{{.*}}, %{{.*}} // IGNORE: call i1 @llvm.experimental.constrained.fcmps.f32(float %{{.*}}, float %{{.*}}, metadata !"ogt", metadata !"fpexcept.ignore") @@ -66,7 +66,7 @@ } _Bool SignalingGreaterEqual(float f1, float f2) { - // CHECK-LABEL: define {{.*}}i1 @SignalingGreaterEqual(float %f1, float %f2) + // CHECK-LABEL: define {{.*}}i1 @SignalingGreaterEqual(float frozen %f1, float frozen %f2) // FCMP: fcmp oge float %{{.*}}, %{{.*}} // IGNORE: call i1 @llvm.experimental.constrained.fcmps.f32(float %{{.*}}, float %{{.*}}, metadata !"oge", metadata !"fpexcept.ignore") @@ -78,7 +78,7 @@ } _Bool QuietLess(float f1, float f2) { - // CHECK-LABEL: define {{.*}}i1 @QuietLess(float %f1, float %f2) + // CHECK-LABEL: define {{.*}}i1 @QuietLess(float frozen %f1, float frozen %f2) // FCMP: fcmp olt float %{{.*}}, %{{.*}} // IGNORE: call i1 @llvm.experimental.constrained.fcmp.f32(float %{{.*}}, float %{{.*}}, metadata !"olt", metadata !"fpexcept.ignore") @@ -90,7 +90,7 @@ } _Bool QuietLessEqual(float f1, float f2) { - // CHECK-LABEL: define {{.*}}i1 @QuietLessEqual(float %f1, float %f2) + // CHECK-LABEL: define {{.*}}i1 @QuietLessEqual(float frozen %f1, float frozen %f2) // FCMP: fcmp ole float %{{.*}}, %{{.*}} // IGNORE: call i1 @llvm.experimental.constrained.fcmp.f32(float %{{.*}}, float %{{.*}}, metadata !"ole", metadata !"fpexcept.ignore") @@ -102,7 +102,7 @@ } _Bool QuietGreater(float f1, float f2) { - // CHECK-LABEL: define {{.*}}i1 @QuietGreater(float %f1, float %f2) + // CHECK-LABEL: define {{.*}}i1 @QuietGreater(float frozen %f1, float frozen %f2) // FCMP: fcmp ogt float %{{.*}}, %{{.*}} // IGNORE: call i1 @llvm.experimental.constrained.fcmp.f32(float %{{.*}}, float %{{.*}}, metadata !"ogt", metadata !"fpexcept.ignore") @@ -114,7 +114,7 @@ } _Bool QuietGreaterEqual(float f1, float f2) { - // CHECK-LABEL: define {{.*}}i1 @QuietGreaterEqual(float %f1, float %f2) + // CHECK-LABEL: define {{.*}}i1 @QuietGreaterEqual(float frozen %f1, float frozen %f2) // FCMP: fcmp oge float %{{.*}}, %{{.*}} // IGNORE: call i1 @llvm.experimental.constrained.fcmp.f32(float %{{.*}}, float %{{.*}}, metadata !"oge", metadata !"fpexcept.ignore") @@ -126,7 +126,7 @@ } _Bool QuietLessGreater(float f1, float f2) { - // CHECK-LABEL: define {{.*}}i1 @QuietLessGreater(float %f1, float %f2) + // CHECK-LABEL: define {{.*}}i1 @QuietLessGreater(float frozen %f1, float frozen %f2) // FCMP: fcmp one float %{{.*}}, %{{.*}} // IGNORE: call i1 @llvm.experimental.constrained.fcmp.f32(float %{{.*}}, float %{{.*}}, metadata !"one", metadata !"fpexcept.ignore") @@ -138,7 +138,7 @@ } _Bool QuietUnordered(float f1, float f2) { - // CHECK-LABEL: define {{.*}}i1 @QuietUnordered(float %f1, float %f2) + // CHECK-LABEL: define {{.*}}i1 @QuietUnordered(float frozen %f1, float frozen %f2) // FCMP: fcmp uno float %{{.*}}, %{{.*}} // IGNORE: call i1 @llvm.experimental.constrained.fcmp.f32(float %{{.*}}, float %{{.*}}, metadata !"uno", metadata !"fpexcept.ignore") diff --git a/clang/test/CodeGen/function-attributes.c b/clang/test/CodeGen/function-attributes.c --- a/clang/test/CodeGen/function-attributes.c +++ b/clang/test/CodeGen/function-attributes.c @@ -1,14 +1,14 @@ // RUN: %clang_cc1 -triple i386-unknown-unknown -emit-llvm -disable-llvm-passes -Os -o - %s | FileCheck %s // RUN: %clang_cc1 -triple i386-unknown-unknown -emit-llvm -disable-llvm-passes -Os -std=c99 -o - %s | FileCheck %s // RUN: %clang_cc1 -triple x86_64-unknown-unknown -emit-llvm -disable-llvm-passes -Os -std=c99 -o - %s | FileCheck %s -// CHECK: define signext i8 @f0(i32 %x) [[NUW:#[0-9]+]] -// CHECK: define zeroext i8 @f1(i32 %x) [[NUW]] -// CHECK: define void @f2(i8 signext %x) [[NUW]] -// CHECK: define void @f3(i8 zeroext %x) [[NUW]] -// CHECK: define signext i16 @f4(i32 %x) [[NUW]] -// CHECK: define zeroext i16 @f5(i32 %x) [[NUW]] -// CHECK: define void @f6(i16 signext %x) [[NUW]] -// CHECK: define void @f7(i16 zeroext %x) [[NUW]] +// CHECK: define frozen signext i8 @f0(i32 frozen %x) [[NUW:#[0-9]+]] +// CHECK: define frozen zeroext i8 @f1(i32 frozen %x) [[NUW]] +// CHECK: define void @f2(i8 frozen signext %x) [[NUW]] +// CHECK: define void @f3(i8 frozen zeroext %x) [[NUW]] +// CHECK: define frozen signext i16 @f4(i32 frozen %x) [[NUW]] +// CHECK: define frozen zeroext i16 @f5(i32 frozen %x) [[NUW]] +// CHECK: define void @f6(i16 frozen signext %x) [[NUW]] +// CHECK: define void @f7(i16 frozen zeroext %x) [[NUW]] signed char f0(int x) { return x; } @@ -44,7 +44,7 @@ void f9b(void) { f9a(); } // FIXME: We should be setting nounwind on calls. -// CHECK: call i32 @f10_t() +// CHECK: call frozen i32 @f10_t() // CHECK: [[NUW_RN:#[0-9]+]] // CHECK: { int __attribute__((const)) f10_t(void); @@ -90,7 +90,7 @@ // CHECK-LABEL: define void @f19() // CHECK: { -// CHECK: call i32 @setjmp(i32* null) +// CHECK: call frozen i32 @setjmp(i32* frozen null) // CHECK: [[RT_CALL]] // CHECK: ret void typedef int jmp_buf[((9 * 2) + 3 + 16)]; @@ -101,7 +101,7 @@ // CHECK-LABEL: define void @f20() // CHECK: { -// CHECK: call i32 @_setjmp(i32* null) +// CHECK: call frozen i32 @_setjmp(i32* frozen null) // CHECK: [[RT_CALL]] // CHECK: ret void int _setjmp(jmp_buf); diff --git a/clang/test/CodeGen/functions.c b/clang/test/CodeGen/functions.c --- a/clang/test/CodeGen/functions.c +++ b/clang/test/CodeGen/functions.c @@ -55,8 +55,8 @@ void f8_test() { f8_user(&f8_callback); // CHECK-LABEL: define void @f8_test() -// CHECK: call void @f8_user({{.*}}* bitcast (void ()* @f8_callback to {{.*}}*)) -// CHECK: declare void @f8_user({{.*}}*) +// CHECK: call void @f8_user({{.*}}* frozen bitcast (void ()* @f8_callback to {{.*}}*)) +// CHECK: declare void @f8_user({{.*}}* frozen) // CHECK: declare void @f8_callback() } diff --git a/clang/test/CodeGen/global-decls.c b/clang/test/CodeGen/global-decls.c --- a/clang/test/CodeGen/global-decls.c +++ b/clang/test/CodeGen/global-decls.c @@ -2,7 +2,7 @@ // RUN: grep '@g0_ext = extern_weak global i32' %t extern int g0_ext __attribute__((weak)); -// RUN: grep 'declare extern_weak i32 @g1_ext()' %t +// RUN: grep 'declare extern_weak frozen i32 @g1_ext()' %t extern int __attribute__((weak)) g1_ext (void); // RUN: grep '@g0_common = weak global i32' %t @@ -10,7 +10,7 @@ // RUN: grep '@g0_def = weak global i32' %t int g0_def __attribute__((weak)) = 52; -// RUN: grep 'define weak i32 @g1_def()' %t +// RUN: grep 'define weak frozen i32 @g1_def()' %t int __attribute__((weak)) g1_def (void) { return 0; } // Force _ext references diff --git a/clang/test/CodeGen/hexagon-hvx-abi.c b/clang/test/CodeGen/hexagon-hvx-abi.c --- a/clang/test/CodeGen/hexagon-hvx-abi.c +++ b/clang/test/CodeGen/hexagon-hvx-abi.c @@ -6,14 +6,14 @@ typedef long HVX_VectorPair __attribute__((__vector_size__(2*__HVX_LENGTH__))) __attribute__((aligned(__HVX_LENGTH__))); -// CHECK-HVX64: define {{.*}} <16 x i32> @foo(<16 x i32> %a, <32 x i32> %b) -// CHECK-HVX128: define {{.*}} <32 x i32> @foo(<32 x i32> %a, <64 x i32> %b) +// CHECK-HVX64: define {{.*}} <16 x i32> @foo(<16 x i32> frozen %a, <32 x i32> frozen %b) +// CHECK-HVX128: define {{.*}} <32 x i32> @foo(<32 x i32> frozen %a, <64 x i32> frozen %b) HVX_Vector foo(HVX_Vector a, HVX_VectorPair b) { return a; } -// CHECK-HVX64: define {{.*}} <32 x i32> @bar(<16 x i32> %a, <32 x i32> %b) -// CHECK-HVX128: define {{.*}} <64 x i32> @bar(<32 x i32> %a, <64 x i32> %b) +// CHECK-HVX64: define {{.*}} <32 x i32> @bar(<16 x i32> frozen %a, <32 x i32> frozen %b) +// CHECK-HVX128: define {{.*}} <64 x i32> @bar(<32 x i32> frozen %a, <64 x i32> frozen %b) HVX_VectorPair bar(HVX_Vector a, HVX_VectorPair b) { return b; } diff --git a/clang/test/CodeGen/ifunc.c b/clang/test/CodeGen/ifunc.c --- a/clang/test/CodeGen/ifunc.c +++ b/clang/test/CodeGen/ifunc.c @@ -37,5 +37,5 @@ // CHECK: @foo = ifunc i32 (i32), bitcast (i32 (i32)* ()* @foo_ifunc to i32 (i32)*) // CHECK: @goo = ifunc void (), bitcast (i8* ()* @goo_ifunc to void ()*) -// CHECK: call i32 @foo(i32 +// CHECK: call frozen i32 @foo(i32 // CHECK: call void @goo() diff --git a/clang/test/CodeGen/incomplete-function-type-2.c b/clang/test/CodeGen/incomplete-function-type-2.c --- a/clang/test/CodeGen/incomplete-function-type-2.c +++ b/clang/test/CodeGen/incomplete-function-type-2.c @@ -2,7 +2,7 @@ // PR14355: don't crash // Keep this test in its own file because CodeGenTypes has global state. -// CHECK: define void @test10_foo({}* %p1.coerce) [[NUW:#[0-9]+]] { +// CHECK: define void @test10_foo({}* frozen %p1.coerce) [[NUW:#[0-9]+]] struct test10_B; typedef struct test10_B test10_F3(double); void test10_foo(test10_F3 p1); diff --git a/clang/test/CodeGen/inline-optim.c b/clang/test/CodeGen/inline-optim.c --- a/clang/test/CodeGen/inline-optim.c +++ b/clang/test/CodeGen/inline-optim.c @@ -22,16 +22,16 @@ // NOINLINE-LABEL: @foo // HINT-LABEL: @foo // INLINE-LABEL: @foo -// NOINLINE: call i32 @inline_hint -// HINT-NOT: call i32 @inline_hint -// INLINE-NOT: call i32 @inline_hint +// NOINLINE: call frozen i32 @inline_hint +// HINT-NOT: call frozen i32 @inline_hint +// INLINE-NOT: call frozen i32 @inline_hint pa[0] = inline_hint(pa[1],pa[2]); -// NOINLINE-NOT: call i32 @inline_always -// HINT-NOT: call i32 @inline_always -// INLINE-NOT: call i32 @inline_always +// NOINLINE-NOT: call frozen i32 @inline_always +// HINT-NOT: call frozen i32 @inline_always +// INLINE-NOT: call frozen i32 @inline_always pa[3] = inline_always(pa[4],pa[5]); -// NOINLINE: call i32 @inline_no_hint -// HINT: call i32 @inline_no_hint -// INLINE-NOT: call i32 @inline_no_hint +// NOINLINE: call frozen i32 @inline_no_hint +// HINT: call frozen i32 @inline_no_hint +// INLINE-NOT: call frozen i32 @inline_no_hint pa[6] = inline_no_hint(pa[7], pa[8]); } diff --git a/clang/test/CodeGen/inline.c b/clang/test/CodeGen/inline.c --- a/clang/test/CodeGen/inline.c +++ b/clang/test/CodeGen/inline.c @@ -3,70 +3,70 @@ // RUN: echo "GNU89 tests:" // RUN: %clang_cc1 %s -triple i386-unknown-unknown -O1 -disable-llvm-passes -emit-llvm -o - -std=gnu89 | FileCheck %s --check-prefix=CHECK1 // RUN: %clang_cc1 %s -triple i386-unknown-unknown -fexperimental-new-pass-manager -O1 -disable-llvm-passes -emit-llvm -o - -std=gnu89 | FileCheck %s --check-prefix=CHECK1 -// CHECK1-LABEL: define i32 @foo() -// CHECK1-LABEL: define i32 @bar() +// CHECK1-LABEL: define frozen i32 @foo() +// CHECK1-LABEL: define frozen i32 @bar() // CHECK1-LABEL: define void @unreferenced1() // CHECK1-NOT: unreferenced2 // CHECK1-LABEL: define void @gnu_inline() -// CHECK1-LABEL: define i32 @test1 -// CHECK1-LABEL: define i32 @test2 +// CHECK1-LABEL: define frozen i32 @test1 +// CHECK1-LABEL: define frozen i32 @test2 // CHECK1-LABEL: define void @test3() -// CHECK1-LABEL: define available_externally i32 @test4 -// CHECK1-LABEL: define available_externally i32 @test5 -// CHECK1-LABEL: define i32 @test6 +// CHECK1-LABEL: define available_externally frozen i32 @test4 +// CHECK1-LABEL: define available_externally frozen i32 @test5 +// CHECK1-LABEL: define frozen i32 @test6 // CHECK1-LABEL: define void @test7 -// CHECK1: define i{{..}} @strlcpy +// CHECK1: define frozen i{{..}} @strlcpy // CHECK1-NOT: test9 // CHECK1-LABEL: define void @testA // CHECK1-LABEL: define void @testB // CHECK1-LABEL: define void @testC -// CHECK1-LABEL: define available_externally i32 @ei() +// CHECK1-LABEL: define available_externally frozen i32 @ei() // CHECK1-LABEL: define available_externally void @gnu_ei_inline() // RUN: echo "C99 tests:" // RUN: %clang_cc1 %s -triple i386-unknown-unknown -O1 -disable-llvm-passes -emit-llvm -o - -std=gnu99 | FileCheck %s --check-prefix=CHECK2 // RUN: %clang_cc1 %s -triple i386-unknown-unknown -fexperimental-new-pass-manager -O1 -disable-llvm-passes -emit-llvm -o - -std=gnu99 | FileCheck %s --check-prefix=CHECK2 -// CHECK2-LABEL: define i32 @ei() -// CHECK2-LABEL: define i32 @bar() +// CHECK2-LABEL: define frozen i32 @ei() +// CHECK2-LABEL: define frozen i32 @bar() // CHECK2-NOT: unreferenced1 // CHECK2-LABEL: define void @unreferenced2() // CHECK2-LABEL: define void @gnu_inline() -// CHECK2-LABEL: define i32 @test1 -// CHECK2-LABEL: define i32 @test2 +// CHECK2-LABEL: define frozen i32 @test1 +// CHECK2-LABEL: define frozen i32 @test2 // CHECK2-LABEL: define void @test3 -// CHECK2-LABEL: define available_externally i32 @test4 -// CHECK2-LABEL: define available_externally i32 @test5 -// CHECK2-LABEL: define i32 @test6 +// CHECK2-LABEL: define available_externally frozen i32 @test4 +// CHECK2-LABEL: define available_externally frozen i32 @test5 +// CHECK2-LABEL: define frozen i32 @test6 // CHECK2-LABEL: define void @test7 -// CHECK2: define available_externally i{{..}} @strlcpy +// CHECK2: define available_externally frozen i{{..}} @strlcpy // CHECK2-LABEL: define void @test9 // CHECK2-LABEL: define void @testA // CHECK2-LABEL: define void @testB // CHECK2-LABEL: define void @testC -// CHECK2-LABEL: define available_externally i32 @foo() +// CHECK2-LABEL: define available_externally frozen i32 @foo() // CHECK2-LABEL: define available_externally void @gnu_ei_inline() // RUN: echo "C++ tests:" // RUN: %clang_cc1 -x c++ %s -triple i386-unknown-unknown -O1 -disable-llvm-passes -emit-llvm -o - -std=c++98 | FileCheck %s --check-prefix=CHECK3 // RUN: %clang_cc1 -x c++ %s -triple i386-unknown-unknown -fexperimental-new-pass-manager -O1 -disable-llvm-passes -emit-llvm -o - -std=c++98 | FileCheck %s --check-prefix=CHECK3 -// CHECK3-LABEL: define i32 @_Z3barv() -// CHECK3-LABEL: define linkonce_odr i32 @_Z3foov() +// CHECK3-LABEL: define frozen i32 @_Z3barv() +// CHECK3-LABEL: define linkonce_odr frozen i32 @_Z3foov() // CHECK3-NOT: unreferenced // CHECK3-LABEL: define available_externally void @_Z10gnu_inlinev() // CHECK3-LABEL: define available_externally void @_Z13gnu_ei_inlinev() // CHECK3-NOT: @_Z5testCv -// CHECK3-LABEL: define linkonce_odr i32 @_Z2eiv() +// CHECK3-LABEL: define linkonce_odr frozen i32 @_Z2eiv() // RUN: echo "MS C Mode tests:" // RUN: %clang_cc1 %s -triple i386-pc-win32 -O1 -disable-llvm-passes -emit-llvm -o - -std=c99 | FileCheck %s --check-prefix=CHECK4 // RUN: %clang_cc1 %s -triple i386-pc-win32 -fexperimental-new-pass-manager -O1 -disable-llvm-passes -emit-llvm -o - -std=c99 | FileCheck %s --check-prefix=CHECK4 // CHECK4-NOT: define weak_odr void @_Exit( -// CHECK4-LABEL: define weak_odr dso_local i32 @ei() -// CHECK4-LABEL: define dso_local i32 @bar() +// CHECK4-LABEL: define weak_odr dso_local frozen i32 @ei() +// CHECK4-LABEL: define dso_local frozen i32 @bar() // CHECK4-NOT: unreferenced1 // CHECK4-LABEL: define weak_odr dso_local void @unreferenced2() // CHECK4-LABEL: define dso_local void @gnu_inline() -// CHECK4-LABEL: define linkonce_odr dso_local i32 @foo() +// CHECK4-LABEL: define linkonce_odr dso_local frozen i32 @foo() // CHECK4-LABEL: define available_externally dso_local void @gnu_ei_inline() __attribute__((noreturn)) void __cdecl _exit(int _Code); diff --git a/clang/test/CodeGen/inline2.c b/clang/test/CodeGen/inline2.c --- a/clang/test/CodeGen/inline2.c +++ b/clang/test/CodeGen/inline2.c @@ -1,65 +1,65 @@ // RUN: %clang_cc1 -O1 -fno-experimental-new-pass-manager -std=gnu89 -triple i386-apple-darwin9 -emit-llvm %s -o - | FileCheck -check-prefix CHECK-GNU89 %s // RUN: %clang_cc1 -O1 -fno-experimental-new-pass-manager -std=c99 -triple i386-apple-darwin9 -emit-llvm %s -o - | FileCheck -check-prefix CHECK-C99 %s -// CHECK-GNU89-LABEL: define i32 @f0() -// CHECK-C99-LABEL: define i32 @f0() +// CHECK-GNU89-LABEL: define frozen i32 @f0() +// CHECK-C99-LABEL: define frozen i32 @f0() int f0(void); int f0(void) { return 0; } -// CHECK-GNU89-LABEL: define i32 @f1() -// CHECK-C99-LABEL: define i32 @f1() +// CHECK-GNU89-LABEL: define frozen i32 @f1() +// CHECK-C99-LABEL: define frozen i32 @f1() inline int f1(void); int f1(void) { return 0; } -// CHECK-GNU89-LABEL: define i32 @f2() -// CHECK-C99-LABEL: define i32 @f2() +// CHECK-GNU89-LABEL: define frozen i32 @f2() +// CHECK-C99-LABEL: define frozen i32 @f2() int f2(void); inline int f2(void) { return 0; } -// CHECK-GNU89-LABEL: define i32 @f3() -// CHECK-C99-LABEL: define i32 @f3() +// CHECK-GNU89-LABEL: define frozen i32 @f3() +// CHECK-C99-LABEL: define frozen i32 @f3() extern inline int f3(void); int f3(void) { return 0; } -// CHECK-GNU89-LABEL: define i32 @f5() -// CHECK-C99-LABEL: define i32 @f5() +// CHECK-GNU89-LABEL: define frozen i32 @f5() +// CHECK-C99-LABEL: define frozen i32 @f5() extern inline int f5(void); inline int f5(void) { return 0; } -// CHECK-GNU89-LABEL: define i32 @f6() -// CHECK-C99-LABEL: define i32 @f6() +// CHECK-GNU89-LABEL: define frozen i32 @f6() +// CHECK-C99-LABEL: define frozen i32 @f6() inline int f6(void); extern inline int f6(void) { return 0; } -// CHECK-GNU89-LABEL: define i32 @f7() -// CHECK-C99-LABEL: define i32 @f7() +// CHECK-GNU89-LABEL: define frozen i32 @f7() +// CHECK-C99-LABEL: define frozen i32 @f7() extern inline int f7(void); extern int f7(void) { return 0; } -// CHECK-GNU89-LABEL: define i32 @fA() +// CHECK-GNU89-LABEL: define frozen i32 @fA() inline int fA(void) { return 0; } -// CHECK-GNU89-LABEL: define i32 @fB() +// CHECK-GNU89-LABEL: define frozen i32 @fB() inline int fB() { return 0; } -// CHECK-GNU89-LABEL: define available_externally i32 @f4() -// CHECK-C99-LABEL: define i32 @f4() +// CHECK-GNU89-LABEL: define available_externally frozen i32 @f4() +// CHECK-C99-LABEL: define frozen i32 @f4() int f4(void); extern inline int f4(void) { return 0; } -// CHECK-GNU89-LABEL: define available_externally i32 @f8() -// CHECK-C99-LABEL: define i32 @f8() +// CHECK-GNU89-LABEL: define available_externally frozen i32 @f8() +// CHECK-C99-LABEL: define frozen i32 @f8() extern int f8(void); extern inline int f8(void) { return 0; } -// CHECK-GNU89-LABEL: define available_externally i32 @f9() -// CHECK-C99-LABEL: define i32 @f9() +// CHECK-GNU89-LABEL: define available_externally frozen i32 @f9() +// CHECK-C99-LABEL: define frozen i32 @f9() extern inline int f9(void); extern inline int f9(void) { return 0; } -// CHECK-C99-LABEL: define available_externally i32 @fA() +// CHECK-C99-LABEL: define available_externally frozen i32 @fA() -// CHECK-C99-LABEL: define i32 @fB() +// CHECK-C99-LABEL: define frozen i32 @fB() int test_all() { return f0() + f1() + f2() + f3() + f4() + f5() + f6() + f7() + f8() + f9() diff --git a/clang/test/CodeGen/lanai-arguments.c b/clang/test/CodeGen/lanai-arguments.c --- a/clang/test/CodeGen/lanai-arguments.c +++ b/clang/test/CodeGen/lanai-arguments.c @@ -3,7 +3,7 @@ // Basic argument/attribute tests for Lanai. -// CHECK: define void @f0(i32 inreg %i, i32 inreg %j, i64 inreg %k) +// CHECK: define void @f0(i32 frozen inreg %i, i32 frozen inreg %j, i64 frozen inreg %k) void f0(int i, long j, long long k) {} typedef struct { @@ -32,13 +32,13 @@ return foo; } -// CHECK: define void @f4(i64 inreg %i) +// CHECK: define void @f4(i64 frozen inreg %i) void f4(long long i) {} -// CHECK: define void @f5(i8 inreg %a, i16 inreg %b) +// CHECK: define void @f5(i8 frozen inreg %a, i16 frozen inreg %b) void f5(char a, short b) {} -// CHECK: define void @f6(i8 inreg %a, i16 inreg %b) +// CHECK: define void @f6(i8 frozen inreg %a, i16 frozen inreg %b) void f6(unsigned char a, unsigned short b) {} enum my_enum { @@ -47,14 +47,14 @@ ENUM3, }; // Enums should be treated as the underlying i32. -// CHECK: define void @f7(i32 inreg %a) +// CHECK: define void @f7(i32 frozen inreg %a) void f7(enum my_enum a) {} enum my_big_enum { ENUM4 = 0xFFFFFFFFFFFFFFFF, }; // Big enums should be treated as the underlying i64. -// CHECK: define void @f8(i64 inreg %a) +// CHECK: define void @f8(i64 frozen inreg %a) void f8(enum my_big_enum a) {} union simple_union { diff --git a/clang/test/CodeGen/lanai-regparm.c b/clang/test/CodeGen/lanai-regparm.c --- a/clang/test/CodeGen/lanai-regparm.c +++ b/clang/test/CodeGen/lanai-regparm.c @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -triple lanai-unknown-unknown -mregparm 4 %s -emit-llvm -o - | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args -triple lanai-unknown-unknown -mregparm 4 %s -emit-llvm -o - | FileCheck %s void f1(int a, int b, int c, int d, int e, int f, int g, int h); diff --git a/clang/test/CodeGen/le32-arguments.c b/clang/test/CodeGen/le32-arguments.c --- a/clang/test/CodeGen/le32-arguments.c +++ b/clang/test/CodeGen/le32-arguments.c @@ -2,7 +2,7 @@ // Basic argument/attribute tests for le32/PNaCl -// CHECK-LABEL: define void @f0(i32 %i, i32 %j, double %k) +// CHECK-LABEL: define void @f0(i32 frozen %i, i32 frozen %j, double frozen %k) void f0(int i, long j, double k) {} typedef struct { @@ -10,7 +10,7 @@ int bb; } s1; // Structs should be passed byval and not split up -// CHECK-LABEL: define void @f1(%struct.s1* byval(%struct.s1) align 4 %i) +// CHECK-LABEL: define void @f1(%struct.s1* frozen byval(%struct.s1) align 4 %i) void f1(s1 i) {} typedef struct { @@ -23,14 +23,14 @@ return foo; } -// CHECK-LABEL: define void @f3(i64 %i) +// CHECK-LABEL: define void @f3(i64 frozen %i) void f3(long long i) {} // i8/i16 should be signext, i32 and higher should not -// CHECK-LABEL: define void @f4(i8 signext %a, i16 signext %b) +// CHECK-LABEL: define void @f4(i8 frozen signext %a, i16 frozen signext %b) void f4(char a, short b) {} -// CHECK-LABEL: define void @f5(i8 zeroext %a, i16 zeroext %b) +// CHECK-LABEL: define void @f5(i8 frozen zeroext %a, i16 frozen zeroext %b) void f5(unsigned char a, unsigned short b) {} @@ -40,7 +40,7 @@ ENUM3, }; // Enums should be treated as the underlying i32 -// CHECK-LABEL: define void @f6(i32 %a) +// CHECK-LABEL: define void @f6(i32 frozen %a) void f6(enum my_enum a) {} union simple_union { @@ -48,7 +48,7 @@ char b; }; // Unions should be passed as byval structs -// CHECK-LABEL: define void @f7(%union.simple_union* byval(%union.simple_union) align 4 %s) +// CHECK-LABEL: define void @f7(%union.simple_union* frozen byval(%union.simple_union) align 4 %s) void f7(union simple_union s) {} typedef struct { @@ -57,5 +57,5 @@ int b8 : 8; } bitfield1; // Bitfields should be passed as byval structs -// CHECK-LABEL: define void @f8(%struct.bitfield1* byval(%struct.bitfield1) align 4 %bf1) +// CHECK-LABEL: define void @f8(%struct.bitfield1* frozen byval(%struct.bitfield1) align 4 %bf1) void f8(bitfield1 bf1) {} diff --git a/clang/test/CodeGen/le32-libcall-pow.c b/clang/test/CodeGen/le32-libcall-pow.c --- a/clang/test/CodeGen/le32-libcall-pow.c +++ b/clang/test/CodeGen/le32-libcall-pow.c @@ -11,17 +11,17 @@ // CHECK-LABEL: define void @test_pow void test_pow(float a0, double a1, long double a2) { - // CHECK: call float @powf + // CHECK: call frozen float @powf float l0 = powf(a0, a0); - // CHECK: call double @pow + // CHECK: call frozen double @pow double l1 = pow(a1, a1); - // CHECK: call double @powl + // CHECK: call frozen double @powl long double l2 = powl(a2, a2); } -// CHECK: declare float @powf(float, float) -// CHECK: declare double @pow(double, double) -// CHECK: declare double @powl(double, double) +// CHECK: declare frozen float @powf(float frozen, float frozen) +// CHECK: declare frozen double @pow(double frozen, double frozen) +// CHECK: declare frozen double @powl(double frozen, double frozen) diff --git a/clang/test/CodeGen/le32-vaarg.c b/clang/test/CodeGen/le32-vaarg.c --- a/clang/test/CodeGen/le32-vaarg.c +++ b/clang/test/CodeGen/le32-vaarg.c @@ -4,7 +4,7 @@ int get_int(va_list *args) { return va_arg(*args, int); } -// CHECK: define i32 @get_int +// CHECK: define frozen i32 @get_int // CHECK: [[RESULT:%[a-z_0-9]+]] = va_arg {{.*}}, i32{{$}} // CHECK: store i32 [[RESULT]], i32* [[LOC:%[a-z_0-9]+]] // CHECK: [[RESULT2:%[a-z_0-9]+]] = load i32, i32* [[LOC]] diff --git a/clang/test/CodeGen/libcall-declarations.c b/clang/test/CodeGen/libcall-declarations.c --- a/clang/test/CodeGen/libcall-declarations.c +++ b/clang/test/CodeGen/libcall-declarations.c @@ -312,307 +312,307 @@ F(__cospif), F(__tanpi), F(__tanpif), F(__exp10), F(__exp10f) }; -// CHECK-NOERRNO: declare double @atan2(double, double) [[NUWRN:#[0-9]+]] -// CHECK-NOERRNO: declare float @atan2f(float, float) [[NUWRN]] -// CHECK-NOERRNO: declare x86_fp80 @atan2l(x86_fp80, x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare i32 @abs(i32) [[NUWRN]] -// CHECK-NOERRNO: declare i64 @labs(i64) [[NUWRN]] -// CHECK-NOERRNO: declare i64 @llabs(i64) [[NUWRN]] -// CHECK-NOERRNO: declare double @copysign(double, double) [[NUWRN]] -// CHECK-NOERRNO: declare float @copysignf(float, float) [[NUWRN]] -// CHECK-NOERRNO: declare x86_fp80 @copysignl(x86_fp80, x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare double @fabs(double) [[NUWRN]] -// CHECK-NOERRNO: declare float @fabsf(float) [[NUWRN]] -// CHECK-NOERRNO: declare x86_fp80 @fabsl(x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare double @fmod(double, double) [[NUWRN]] -// CHECK-NOERRNO: declare float @fmodf(float, float) [[NUWRN]] -// CHECK-NOERRNO: declare x86_fp80 @fmodl(x86_fp80, x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare double @ldexp(double, i32) [[NUWRN]] -// CHECK-NOERRNO: declare float @ldexpf(float, i32) [[NUWRN]] -// CHECK-NOERRNO: declare x86_fp80 @ldexpl(x86_fp80, i32) [[NUWRN]] -// CHECK-NOERRNO: declare double @nan(i8*) [[NUWRO:#[0-9]+]] -// CHECK-NOERRNO: declare float @nanf(i8*) [[NUWRO]] -// CHECK-NOERRNO: declare x86_fp80 @nanl(i8*) [[NUWRO]] -// CHECK-NOERRNO: declare double @pow(double, double) [[NUWRN]] -// CHECK-NOERRNO: declare float @powf(float, float) [[NUWRN]] -// CHECK-NOERRNO: declare x86_fp80 @powl(x86_fp80, x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare double @acos(double) [[NUWRN]] -// CHECK-NOERRNO: declare float @acosf(float) [[NUWRN]] -// CHECK-NOERRNO: declare x86_fp80 @acosl(x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare double @acosh(double) [[NUWRN]] -// CHECK-NOERRNO: declare float @acoshf(float) [[NUWRN]] -// CHECK-NOERRNO: declare x86_fp80 @acoshl(x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare double @asin(double) [[NUWRN]] -// CHECK-NOERRNO: declare float @asinf(float) [[NUWRN]] -// CHECK-NOERRNO: declare x86_fp80 @asinl(x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare double @asinh(double) [[NUWRN]] -// CHECK-NOERRNO: declare float @asinhf(float) [[NUWRN]] -// CHECK-NOERRNO: declare x86_fp80 @asinhl(x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare double @atan(double) [[NUWRN]] -// CHECK-NOERRNO: declare float @atanf(float) [[NUWRN]] -// CHECK-NOERRNO: declare x86_fp80 @atanl(x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare double @atanh(double) [[NUWRN]] -// CHECK-NOERRNO: declare float @atanhf(float) [[NUWRN]] -// CHECK-NOERRNO: declare x86_fp80 @atanhl(x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare double @cbrt(double) [[NUWRN]] -// CHECK-NOERRNO: declare float @cbrtf(float) [[NUWRN]] -// CHECK-NOERRNO: declare x86_fp80 @cbrtl(x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare double @ceil(double) [[NUWRN]] -// CHECK-NOERRNO: declare float @ceilf(float) [[NUWRN]] -// CHECK-NOERRNO: declare x86_fp80 @ceill(x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare double @cos(double) [[NUWRN]] -// CHECK-NOERRNO: declare float @cosf(float) [[NUWRN]] -// CHECK-NOERRNO: declare x86_fp80 @cosl(x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare double @cosh(double) [[NUWRN]] -// CHECK-NOERRNO: declare float @coshf(float) [[NUWRN]] -// CHECK-NOERRNO: declare x86_fp80 @coshl(x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare double @erf(double) [[NUWRN]] -// CHECK-NOERRNO: declare float @erff(float) [[NUWRN]] -// CHECK-NOERRNO: declare x86_fp80 @erfl(x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare double @erfc(double) [[NUWRN]] -// CHECK-NOERRNO: declare float @erfcf(float) [[NUWRN]] -// CHECK-NOERRNO: declare x86_fp80 @erfcl(x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare double @exp(double) [[NUWRN]] -// CHECK-NOERRNO: declare float @expf(float) [[NUWRN]] -// CHECK-NOERRNO: declare x86_fp80 @expl(x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare double @exp2(double) [[NUWRN]] -// CHECK-NOERRNO: declare float @exp2f(float) [[NUWRN]] -// CHECK-NOERRNO: declare x86_fp80 @exp2l(x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare double @expm1(double) [[NUWRN]] -// CHECK-NOERRNO: declare float @expm1f(float) [[NUWRN]] -// CHECK-NOERRNO: declare x86_fp80 @expm1l(x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare double @fdim(double, double) [[NUWRN]] -// CHECK-NOERRNO: declare float @fdimf(float, float) [[NUWRN]] -// CHECK-NOERRNO: declare x86_fp80 @fdiml(x86_fp80, x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare double @floor(double) [[NUWRN]] -// CHECK-NOERRNO: declare float @floorf(float) [[NUWRN]] -// CHECK-NOERRNO: declare x86_fp80 @floorl(x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare double @fma(double, double, double) [[NUWRN]] -// CHECK-NOERRNO: declare float @fmaf(float, float, float) [[NUWRN]] -// CHECK-NOERRNO: declare x86_fp80 @fmal(x86_fp80, x86_fp80, x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare double @fmax(double, double) [[NUWRN]] -// CHECK-NOERRNO: declare float @fmaxf(float, float) [[NUWRN]] -// CHECK-NOERRNO: declare x86_fp80 @fmaxl(x86_fp80, x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare double @fmin(double, double) [[NUWRN]] -// CHECK-NOERRNO: declare float @fminf(float, float) [[NUWRN]] -// CHECK-NOERRNO: declare x86_fp80 @fminl(x86_fp80, x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare double @hypot(double, double) [[NUWRN]] -// CHECK-NOERRNO: declare float @hypotf(float, float) [[NUWRN]] -// CHECK-NOERRNO: declare x86_fp80 @hypotl(x86_fp80, x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare i32 @ilogb(double) [[NUWRN]] -// CHECK-NOERRNO: declare i32 @ilogbf(float) [[NUWRN]] -// CHECK-NOERRNO: declare i32 @ilogbl(x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare double @lgamma(double) [[NONCONST:#[0-9]+]] -// CHECK-NOERRNO: declare float @lgammaf(float) [[NONCONST]] -// CHECK-NOERRNO: declare x86_fp80 @lgammal(x86_fp80) [[NONCONST]] -// CHECK-NOERRNO: declare i64 @llrint(double) [[NUWRN]] -// CHECK-NOERRNO: declare i64 @llrintf(float) [[NUWRN]] -// CHECK-NOERRNO: declare i64 @llrintl(x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare i64 @llround(double) [[NUWRN]] -// CHECK-NOERRNO: declare i64 @llroundf(float) [[NUWRN]] -// CHECK-NOERRNO: declare i64 @llroundl(x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare double @log(double) [[NUWRN]] -// CHECK-NOERRNO: declare float @logf(float) [[NUWRN]] -// CHECK-NOERRNO: declare x86_fp80 @logl(x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare double @log10(double) [[NUWRN]] -// CHECK-NOERRNO: declare float @log10f(float) [[NUWRN]] -// CHECK-NOERRNO: declare x86_fp80 @log10l(x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare double @log1p(double) [[NUWRN]] -// CHECK-NOERRNO: declare float @log1pf(float) [[NUWRN]] -// CHECK-NOERRNO: declare x86_fp80 @log1pl(x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare double @log2(double) [[NUWRN]] -// CHECK-NOERRNO: declare float @log2f(float) [[NUWRN]] -// CHECK-NOERRNO: declare x86_fp80 @log2l(x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare double @logb(double) [[NUWRN]] -// CHECK-NOERRNO: declare float @logbf(float) [[NUWRN]] -// CHECK-NOERRNO: declare x86_fp80 @logbl(x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare i64 @lrint(double) [[NUWRN]] -// CHECK-NOERRNO: declare i64 @lrintf(float) [[NUWRN]] -// CHECK-NOERRNO: declare i64 @lrintl(x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare i64 @lround(double) [[NUWRN]] -// CHECK-NOERRNO: declare i64 @lroundf(float) [[NUWRN]] -// CHECK-NOERRNO: declare i64 @lroundl(x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare double @nearbyint(double) [[NUWRN]] -// CHECK-NOERRNO: declare float @nearbyintf(float) [[NUWRN]] -// CHECK-NOERRNO: declare x86_fp80 @nearbyintl(x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare double @nextafter(double, double) [[NUWRN]] -// CHECK-NOERRNO: declare float @nextafterf(float, float) [[NUWRN]] -// CHECK-NOERRNO: declare x86_fp80 @nextafterl(x86_fp80, x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare double @nexttoward(double, x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare float @nexttowardf(float, x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare x86_fp80 @nexttowardl(x86_fp80, x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare double @remainder(double, double) [[NUWRN]] -// CHECK-NOERRNO: declare float @remainderf(float, float) [[NUWRN]] -// CHECK-NOERRNO: declare x86_fp80 @remainderl(x86_fp80, x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare double @rint(double) [[NUWRN]] -// CHECK-NOERRNO: declare float @rintf(float) [[NUWRN]] -// CHECK-NOERRNO: declare x86_fp80 @rintl(x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare double @round(double) [[NUWRN]] -// CHECK-NOERRNO: declare float @roundf(float) [[NUWRN]] -// CHECK-NOERRNO: declare x86_fp80 @roundl(x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare double @scalbln(double, i64) [[NUWRN]] -// CHECK-NOERRNO: declare float @scalblnf(float, i64) [[NUWRN]] -// CHECK-NOERRNO: declare x86_fp80 @scalblnl(x86_fp80, i64) [[NUWRN]] -// CHECK-NOERRNO: declare double @scalbn(double, i32) [[NUWRN]] -// CHECK-NOERRNO: declare float @scalbnf(float, i32) [[NUWRN]] -// CHECK-NOERRNO: declare x86_fp80 @scalbnl(x86_fp80, i32) [[NUWRN]] -// CHECK-NOERRNO: declare double @sin(double) [[NUWRN]] -// CHECK-NOERRNO: declare float @sinf(float) [[NUWRN]] -// CHECK-NOERRNO: declare x86_fp80 @sinl(x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare double @sinh(double) [[NUWRN]] -// CHECK-NOERRNO: declare float @sinhf(float) [[NUWRN]] -// CHECK-NOERRNO: declare x86_fp80 @sinhl(x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare double @sqrt(double) [[NUWRN]] -// CHECK-NOERRNO: declare float @sqrtf(float) [[NUWRN]] -// CHECK-NOERRNO: declare x86_fp80 @sqrtl(x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare double @tan(double) [[NUWRN]] -// CHECK-NOERRNO: declare float @tanf(float) [[NUWRN]] -// CHECK-NOERRNO: declare x86_fp80 @tanl(x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare double @tanh(double) [[NUWRN]] -// CHECK-NOERRNO: declare float @tanhf(float) [[NUWRN]] -// CHECK-NOERRNO: declare x86_fp80 @tanhl(x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare double @tgamma(double) [[NUWRN]] -// CHECK-NOERRNO: declare float @tgammaf(float) [[NUWRN]] -// CHECK-NOERRNO: declare x86_fp80 @tgammal(x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare double @trunc(double) [[NUWRN]] -// CHECK-NOERRNO: declare float @truncf(float) [[NUWRN]] -// CHECK-NOERRNO: declare x86_fp80 @truncl(x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare double @cabs(double, double) [[NUWRN]] -// CHECK-NOERRNO: declare float @cabsf(<2 x float>) [[NUWRN]] -// CHECK-NOERRNO: declare { double, double } @cacos(double, double) [[NUWRN]] -// CHECK-NOERRNO: declare <2 x float> @cacosf(<2 x float>) [[NUWRN]] -// CHECK-NOERRNO: declare { double, double } @cacosh(double, double) [[NUWRN]] -// CHECK-NOERRNO: declare <2 x float> @cacoshf(<2 x float>) [[NUWRN]] -// CHECK-NOERRNO: declare double @carg(double, double) [[NUWRN]] -// CHECK-NOERRNO: declare float @cargf(<2 x float>) [[NUWRN]] -// CHECK-NOERRNO: declare { double, double } @casin(double, double) [[NUWRN]] -// CHECK-NOERRNO: declare <2 x float> @casinf(<2 x float>) [[NUWRN]] -// CHECK-NOERRNO: declare { double, double } @casinh(double, double) [[NUWRN]] -// CHECK-NOERRNO: declare <2 x float> @casinhf(<2 x float>) [[NUWRN]] -// CHECK-NOERRNO: declare { double, double } @catan(double, double) [[NUWRN]] -// CHECK-NOERRNO: declare <2 x float> @catanf(<2 x float>) [[NUWRN]] -// CHECK-NOERRNO: declare { double, double } @catanh(double, double) [[NUWRN]] -// CHECK-NOERRNO: declare <2 x float> @catanhf(<2 x float>) [[NUWRN]] -// CHECK-NOERRNO: declare { double, double } @ccos(double, double) [[NUWRN]] -// CHECK-NOERRNO: declare <2 x float> @ccosf(<2 x float>) [[NUWRN]] -// CHECK-NOERRNO: declare { double, double } @ccosh(double, double) [[NUWRN]] -// CHECK-NOERRNO: declare <2 x float> @ccoshf(<2 x float>) [[NUWRN]] -// CHECK-NOERRNO: declare { double, double } @cexp(double, double) [[NUWRN]] -// CHECK-NOERRNO: declare <2 x float> @cexpf(<2 x float>) [[NUWRN]] -// CHECK-NOERRNO: declare double @cimag(double, double) [[NUWRN]] -// CHECK-NOERRNO: declare float @cimagf(<2 x float>) [[NUWRN]] -// CHECK-NOERRNO: declare { double, double } @conj(double, double) [[NUWRN]] -// CHECK-NOERRNO: declare <2 x float> @conjf(<2 x float>) [[NUWRN]] -// CHECK-NOERRNO: declare { double, double } @clog(double, double) [[NUWRN]] -// CHECK-NOERRNO: declare <2 x float> @clogf(<2 x float>) [[NUWRN]] -// CHECK-NOERRNO: declare { double, double } @cproj(double, double) [[NUWRN]] -// CHECK-NOERRNO: declare <2 x float> @cprojf(<2 x float>) [[NUWRN]] -// CHECK-NOERRNO: declare { double, double } @cpow(double, double, double, double) [[NUWRN]] -// CHECK-NOERRNO: declare <2 x float> @cpowf(<2 x float>, <2 x float>) [[NUWRN]] -// CHECK-NOERRNO: declare double @creal(double, double) [[NUWRN]] -// CHECK-NOERRNO: declare float @crealf(<2 x float>) [[NUWRN]] -// CHECK-NOERRNO: declare { double, double } @csin(double, double) [[NUWRN]] -// CHECK-NOERRNO: declare <2 x float> @csinf(<2 x float>) [[NUWRN]] -// CHECK-NOERRNO: declare { double, double } @csinh(double, double) [[NUWRN]] -// CHECK-NOERRNO: declare <2 x float> @csinhf(<2 x float>) [[NUWRN]] -// CHECK-NOERRNO: declare { double, double } @csqrt(double, double) [[NUWRN]] -// CHECK-NOERRNO: declare <2 x float> @csqrtf(<2 x float>) [[NUWRN]] -// CHECK-NOERRNO: declare { double, double } @ctan(double, double) [[NUWRN]] -// CHECK-NOERRNO: declare <2 x float> @ctanf(<2 x float>) [[NUWRN]] -// CHECK-NOERRNO: declare { double, double } @ctanh(double, double) [[NUWRN]] -// CHECK-NOERRNO: declare <2 x float> @ctanhf(<2 x float>) [[NUWRN]] -// CHECK-NOERRNO: declare double @__sinpi(double) [[NUWRN]] -// CHECK-NOERRNO: declare float @__sinpif(float) [[NUWRN]] -// CHECK-NOERRNO: declare double @__cospi(double) [[NUWRN]] -// CHECK-NOERRNO: declare float @__cospif(float) [[NUWRN]] -// CHECK-NOERRNO: declare double @__tanpi(double) [[NUWRN]] -// CHECK-NOERRNO: declare float @__tanpif(float) [[NUWRN]] -// CHECK-NOERRNO: declare double @__exp10(double) [[NUWRN]] -// CHECK-NOERRNO: declare float @__exp10f(float) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @atan2(double frozen, double frozen) [[NUWRN:#[0-9]+]] +// CHECK-NOERRNO: declare frozen float @atan2f(float frozen, float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen x86_fp80 @atan2l(x86_fp80 frozen, x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen i32 @abs(i32 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen i64 @labs(i64 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen i64 @llabs(i64 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @copysign(double frozen, double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @copysignf(float frozen, float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen x86_fp80 @copysignl(x86_fp80 frozen, x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @fabs(double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @fabsf(float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen x86_fp80 @fabsl(x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @fmod(double frozen, double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @fmodf(float frozen, float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen x86_fp80 @fmodl(x86_fp80 frozen, x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @ldexp(double frozen, i32 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @ldexpf(float frozen, i32 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen x86_fp80 @ldexpl(x86_fp80 frozen, i32 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @nan(i8* frozen) [[NUWRO:#[0-9]+]] +// CHECK-NOERRNO: declare frozen float @nanf(i8* frozen) [[NUWRO]] +// CHECK-NOERRNO: declare frozen x86_fp80 @nanl(i8* frozen) [[NUWRO]] +// CHECK-NOERRNO: declare frozen double @pow(double frozen, double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @powf(float frozen, float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen x86_fp80 @powl(x86_fp80 frozen, x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @acos(double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @acosf(float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen x86_fp80 @acosl(x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @acosh(double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @acoshf(float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen x86_fp80 @acoshl(x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @asin(double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @asinf(float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen x86_fp80 @asinl(x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @asinh(double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @asinhf(float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen x86_fp80 @asinhl(x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @atan(double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @atanf(float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen x86_fp80 @atanl(x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @atanh(double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @atanhf(float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen x86_fp80 @atanhl(x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @cbrt(double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @cbrtf(float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen x86_fp80 @cbrtl(x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @ceil(double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @ceilf(float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen x86_fp80 @ceill(x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @cos(double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @cosf(float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen x86_fp80 @cosl(x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @cosh(double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @coshf(float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen x86_fp80 @coshl(x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @erf(double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @erff(float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen x86_fp80 @erfl(x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @erfc(double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @erfcf(float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen x86_fp80 @erfcl(x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @exp(double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @expf(float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen x86_fp80 @expl(x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @exp2(double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @exp2f(float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen x86_fp80 @exp2l(x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @expm1(double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @expm1f(float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen x86_fp80 @expm1l(x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @fdim(double frozen, double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @fdimf(float frozen, float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen x86_fp80 @fdiml(x86_fp80 frozen, x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @floor(double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @floorf(float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen x86_fp80 @floorl(x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @fma(double frozen, double frozen, double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @fmaf(float frozen, float frozen, float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen x86_fp80 @fmal(x86_fp80 frozen, x86_fp80 frozen, x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @fmax(double frozen, double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @fmaxf(float frozen, float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen x86_fp80 @fmaxl(x86_fp80 frozen, x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @fmin(double frozen, double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @fminf(float frozen, float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen x86_fp80 @fminl(x86_fp80 frozen, x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @hypot(double frozen, double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @hypotf(float frozen, float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen x86_fp80 @hypotl(x86_fp80 frozen, x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen i32 @ilogb(double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen i32 @ilogbf(float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen i32 @ilogbl(x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @lgamma(double frozen) [[NONCONST:#[0-9]+]] +// CHECK-NOERRNO: declare frozen float @lgammaf(float frozen) [[NONCONST]] +// CHECK-NOERRNO: declare frozen x86_fp80 @lgammal(x86_fp80 frozen) [[NONCONST]] +// CHECK-NOERRNO: declare frozen i64 @llrint(double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen i64 @llrintf(float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen i64 @llrintl(x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen i64 @llround(double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen i64 @llroundf(float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen i64 @llroundl(x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @log(double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @logf(float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen x86_fp80 @logl(x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @log10(double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @log10f(float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen x86_fp80 @log10l(x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @log1p(double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @log1pf(float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen x86_fp80 @log1pl(x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @log2(double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @log2f(float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen x86_fp80 @log2l(x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @logb(double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @logbf(float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen x86_fp80 @logbl(x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen i64 @lrint(double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen i64 @lrintf(float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen i64 @lrintl(x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen i64 @lround(double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen i64 @lroundf(float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen i64 @lroundl(x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @nearbyint(double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @nearbyintf(float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen x86_fp80 @nearbyintl(x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @nextafter(double frozen, double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @nextafterf(float frozen, float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen x86_fp80 @nextafterl(x86_fp80 frozen, x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @nexttoward(double frozen, x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @nexttowardf(float frozen, x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen x86_fp80 @nexttowardl(x86_fp80 frozen, x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @remainder(double frozen, double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @remainderf(float frozen, float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen x86_fp80 @remainderl(x86_fp80 frozen, x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @rint(double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @rintf(float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen x86_fp80 @rintl(x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @round(double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @roundf(float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen x86_fp80 @roundl(x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @scalbln(double frozen, i64 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @scalblnf(float frozen, i64 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen x86_fp80 @scalblnl(x86_fp80 frozen, i64 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @scalbn(double frozen, i32 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @scalbnf(float frozen, i32 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen x86_fp80 @scalbnl(x86_fp80 frozen, i32 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @sin(double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @sinf(float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen x86_fp80 @sinl(x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @sinh(double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @sinhf(float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen x86_fp80 @sinhl(x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @sqrt(double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @sqrtf(float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen x86_fp80 @sqrtl(x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @tan(double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @tanf(float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen x86_fp80 @tanl(x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @tanh(double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @tanhf(float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen x86_fp80 @tanhl(x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @tgamma(double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @tgammaf(float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen x86_fp80 @tgammal(x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @trunc(double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @truncf(float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen x86_fp80 @truncl(x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @cabs(double frozen, double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @cabsf(<2 x float> frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen { double, double } @cacos(double frozen, double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen <2 x float> @cacosf(<2 x float> frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen { double, double } @cacosh(double frozen, double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen <2 x float> @cacoshf(<2 x float> frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @carg(double frozen, double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @cargf(<2 x float> frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen { double, double } @casin(double frozen, double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen <2 x float> @casinf(<2 x float> frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen { double, double } @casinh(double frozen, double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen <2 x float> @casinhf(<2 x float> frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen { double, double } @catan(double frozen, double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen <2 x float> @catanf(<2 x float> frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen { double, double } @catanh(double frozen, double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen <2 x float> @catanhf(<2 x float> frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen { double, double } @ccos(double frozen, double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen <2 x float> @ccosf(<2 x float> frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen { double, double } @ccosh(double frozen, double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen <2 x float> @ccoshf(<2 x float> frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen { double, double } @cexp(double frozen, double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen <2 x float> @cexpf(<2 x float> frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @cimag(double frozen, double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @cimagf(<2 x float> frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen { double, double } @conj(double frozen, double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen <2 x float> @conjf(<2 x float> frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen { double, double } @clog(double frozen, double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen <2 x float> @clogf(<2 x float> frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen { double, double } @cproj(double frozen, double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen <2 x float> @cprojf(<2 x float> frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen { double, double } @cpow(double frozen, double frozen, double frozen, double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen <2 x float> @cpowf(<2 x float> frozen, <2 x float> frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @creal(double frozen, double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @crealf(<2 x float> frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen { double, double } @csin(double frozen, double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen <2 x float> @csinf(<2 x float> frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen { double, double } @csinh(double frozen, double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen <2 x float> @csinhf(<2 x float> frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen { double, double } @csqrt(double frozen, double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen <2 x float> @csqrtf(<2 x float> frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen { double, double } @ctan(double frozen, double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen <2 x float> @ctanf(<2 x float> frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen { double, double } @ctanh(double frozen, double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen <2 x float> @ctanhf(<2 x float> frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @__sinpi(double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @__sinpif(float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @__cospi(double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @__cospif(float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @__tanpi(double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @__tanpif(float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @__exp10(double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @__exp10f(float frozen) [[NUWRN]] -// CHECK-ERRNO: declare i32 @abs(i32) [[NUWRN:#[0-9]+]] -// CHECK-ERRNO: declare i64 @labs(i64) [[NUWRN]] -// CHECK-ERRNO: declare i64 @llabs(i64) [[NUWRN]] -// CHECK-ERRNO: declare double @copysign(double, double) [[NUWRN]] -// CHECK-ERRNO: declare float @copysignf(float, float) [[NUWRN]] -// CHECK-ERRNO: declare x86_fp80 @copysignl(x86_fp80, x86_fp80) [[NUWRN]] -// CHECK-ERRNO: declare double @fabs(double) [[NUWRN]] -// CHECK-ERRNO: declare float @fabsf(float) [[NUWRN]] -// CHECK-ERRNO: declare x86_fp80 @fabsl(x86_fp80) [[NUWRN]] -// CHECK-ERRNO: declare double @nan(i8*) [[NUWRO:#[0-9]+]] -// CHECK-ERRNO: declare float @nanf(i8*) [[NUWRO]] -// CHECK-ERRNO: declare x86_fp80 @nanl(i8*) [[NUWRO]] -// CHECK-ERRNO: declare double @ceil(double) [[NUWRN]] -// CHECK-ERRNO: declare float @ceilf(float) [[NUWRN]] -// CHECK-ERRNO: declare x86_fp80 @ceill(x86_fp80) [[NUWRN]] -// CHECK-ERRNO: declare double @floor(double) [[NUWRN]] -// CHECK-ERRNO: declare float @floorf(float) [[NUWRN]] -// CHECK-ERRNO: declare x86_fp80 @floorl(x86_fp80) [[NUWRN]] -// CHECK-ERRNO: declare double @fmax(double, double) [[NUWRN]] -// CHECK-ERRNO: declare float @fmaxf(float, float) [[NUWRN]] -// CHECK-ERRNO: declare x86_fp80 @fmaxl(x86_fp80, x86_fp80) [[NUWRN]] -// CHECK-ERRNO: declare double @fmin(double, double) [[NUWRN]] -// CHECK-ERRNO: declare float @fminf(float, float) [[NUWRN]] -// CHECK-ERRNO: declare x86_fp80 @fminl(x86_fp80, x86_fp80) [[NUWRN]] -// CHECK-ERRNO: declare double @lgamma(double) [[NONCONST:#[0-9]+]] -// CHECK-ERRNO: declare float @lgammaf(float) [[NONCONST]] -// CHECK-ERRNO: declare x86_fp80 @lgammal(x86_fp80) [[NONCONST]] -// CHECK-ERRNO: declare double @nearbyint(double) [[NUWRN]] -// CHECK-ERRNO: declare float @nearbyintf(float) [[NUWRN]] -// CHECK-ERRNO: declare x86_fp80 @nearbyintl(x86_fp80) [[NUWRN]] -// CHECK-ERRNO: declare double @rint(double) [[NUWRN]] -// CHECK-ERRNO: declare float @rintf(float) [[NUWRN]] -// CHECK-ERRNO: declare x86_fp80 @rintl(x86_fp80) [[NUWRN]] -// CHECK-ERRNO: declare double @round(double) [[NUWRN]] -// CHECK-ERRNO: declare float @roundf(float) [[NUWRN]] -// CHECK-ERRNO: declare x86_fp80 @roundl(x86_fp80) [[NUWRN]] -// CHECK-ERRNO: declare double @trunc(double) [[NUWRN]] -// CHECK-ERRNO: declare float @truncf(float) [[NUWRN]] -// CHECK-ERRNO: declare x86_fp80 @truncl(x86_fp80) [[NUWRN]] -// CHECK-ERRNO: declare double @cabs(double, double) [[NONCONST]] -// CHECK-ERRNO: declare float @cabsf(<2 x float>) [[NONCONST]] -// CHECK-ERRNO: declare { double, double } @cacos(double, double) [[NONCONST]] -// CHECK-ERRNO: declare <2 x float> @cacosf(<2 x float>) [[NONCONST]] -// CHECK-ERRNO: declare { double, double } @cacosh(double, double) [[NONCONST]] -// CHECK-ERRNO: declare <2 x float> @cacoshf(<2 x float>) [[NONCONST]] -// CHECK-ERRNO: declare double @carg(double, double) [[NONCONST]] -// CHECK-ERRNO: declare float @cargf(<2 x float>) [[NONCONST]] -// CHECK-ERRNO: declare { double, double } @casin(double, double) [[NONCONST]] -// CHECK-ERRNO: declare <2 x float> @casinf(<2 x float>) [[NONCONST]] -// CHECK-ERRNO: declare { double, double } @casinh(double, double) [[NONCONST]] -// CHECK-ERRNO: declare <2 x float> @casinhf(<2 x float>) [[NONCONST]] -// CHECK-ERRNO: declare { double, double } @catan(double, double) [[NONCONST]] -// CHECK-ERRNO: declare <2 x float> @catanf(<2 x float>) [[NONCONST]] -// CHECK-ERRNO: declare { double, double } @catanh(double, double) [[NONCONST]] -// CHECK-ERRNO: declare <2 x float> @catanhf(<2 x float>) [[NONCONST]] -// CHECK-ERRNO: declare { double, double } @ccos(double, double) [[NONCONST]] -// CHECK-ERRNO: declare <2 x float> @ccosf(<2 x float>) [[NONCONST]] -// CHECK-ERRNO: declare { double, double } @ccosh(double, double) [[NONCONST]] -// CHECK-ERRNO: declare <2 x float> @ccoshf(<2 x float>) [[NONCONST]] -// CHECK-ERRNO: declare { double, double } @cexp(double, double) [[NONCONST]] -// CHECK-ERRNO: declare <2 x float> @cexpf(<2 x float>) [[NONCONST]] -// CHECK-ERRNO: declare double @cimag(double, double) [[NUWRN]] -// CHECK-ERRNO: declare float @cimagf(<2 x float>) [[NUWRN]] -// CHECK-ERRNO: declare { double, double } @conj(double, double) [[NUWRN]] -// CHECK-ERRNO: declare <2 x float> @conjf(<2 x float>) [[NUWRN]] -// CHECK-ERRNO: declare { double, double } @clog(double, double) [[NONCONST]] -// CHECK-ERRNO: declare <2 x float> @clogf(<2 x float>) [[NONCONST]] -// CHECK-ERRNO: declare { double, double } @cproj(double, double) [[NUWRN]] -// CHECK-ERRNO: declare <2 x float> @cprojf(<2 x float>) [[NUWRN]] -// CHECK-ERRNO: declare { double, double } @cpow(double, double, double, double) [[NONCONST]] -// CHECK-ERRNO: declare <2 x float> @cpowf(<2 x float>, <2 x float>) [[NONCONST]] -// CHECK-ERRNO: declare double @creal(double, double) [[NUWRN]] -// CHECK-ERRNO: declare float @crealf(<2 x float>) [[NUWRN]] -// CHECK-ERRNO: declare { double, double } @csin(double, double) [[NONCONST]] -// CHECK-ERRNO: declare <2 x float> @csinf(<2 x float>) [[NONCONST]] -// CHECK-ERRNO: declare { double, double } @csinh(double, double) [[NONCONST]] -// CHECK-ERRNO: declare <2 x float> @csinhf(<2 x float>) [[NONCONST]] -// CHECK-ERRNO: declare { double, double } @csqrt(double, double) [[NONCONST]] -// CHECK-ERRNO: declare <2 x float> @csqrtf(<2 x float>) [[NONCONST]] -// CHECK-ERRNO: declare { double, double } @ctan(double, double) [[NONCONST]] -// CHECK-ERRNO: declare <2 x float> @ctanf(<2 x float>) [[NONCONST]] -// CHECK-ERRNO: declare { double, double } @ctanh(double, double) [[NONCONST]] -// CHECK-ERRNO: declare <2 x float> @ctanhf(<2 x float>) [[NONCONST]] +// CHECK-ERRNO: declare frozen i32 @abs(i32 frozen) [[NUWRN:#[0-9]+]] +// CHECK-ERRNO: declare frozen i64 @labs(i64 frozen) [[NUWRN]] +// CHECK-ERRNO: declare frozen i64 @llabs(i64 frozen) [[NUWRN]] +// CHECK-ERRNO: declare frozen double @copysign(double frozen, double frozen) [[NUWRN]] +// CHECK-ERRNO: declare frozen float @copysignf(float frozen, float frozen) [[NUWRN]] +// CHECK-ERRNO: declare frozen x86_fp80 @copysignl(x86_fp80 frozen, x86_fp80 frozen) [[NUWRN]] +// CHECK-ERRNO: declare frozen double @fabs(double frozen) [[NUWRN]] +// CHECK-ERRNO: declare frozen float @fabsf(float frozen) [[NUWRN]] +// CHECK-ERRNO: declare frozen x86_fp80 @fabsl(x86_fp80 frozen) [[NUWRN]] +// CHECK-ERRNO: declare frozen double @nan(i8* frozen) [[NUWRO:#[0-9]+]] +// CHECK-ERRNO: declare frozen float @nanf(i8* frozen) [[NUWRO]] +// CHECK-ERRNO: declare frozen x86_fp80 @nanl(i8* frozen) [[NUWRO]] +// CHECK-ERRNO: declare frozen double @ceil(double frozen) [[NUWRN]] +// CHECK-ERRNO: declare frozen float @ceilf(float frozen) [[NUWRN]] +// CHECK-ERRNO: declare frozen x86_fp80 @ceill(x86_fp80 frozen) [[NUWRN]] +// CHECK-ERRNO: declare frozen double @floor(double frozen) [[NUWRN]] +// CHECK-ERRNO: declare frozen float @floorf(float frozen) [[NUWRN]] +// CHECK-ERRNO: declare frozen x86_fp80 @floorl(x86_fp80 frozen) [[NUWRN]] +// CHECK-ERRNO: declare frozen double @fmax(double frozen, double frozen) [[NUWRN]] +// CHECK-ERRNO: declare frozen float @fmaxf(float frozen, float frozen) [[NUWRN]] +// CHECK-ERRNO: declare frozen x86_fp80 @fmaxl(x86_fp80 frozen, x86_fp80 frozen) [[NUWRN]] +// CHECK-ERRNO: declare frozen double @fmin(double frozen, double frozen) [[NUWRN]] +// CHECK-ERRNO: declare frozen float @fminf(float frozen, float frozen) [[NUWRN]] +// CHECK-ERRNO: declare frozen x86_fp80 @fminl(x86_fp80 frozen, x86_fp80 frozen) [[NUWRN]] +// CHECK-ERRNO: declare frozen double @lgamma(double frozen) [[NONCONST:#[0-9]+]] +// CHECK-ERRNO: declare frozen float @lgammaf(float frozen) [[NONCONST]] +// CHECK-ERRNO: declare frozen x86_fp80 @lgammal(x86_fp80 frozen) [[NONCONST]] +// CHECK-ERRNO: declare frozen double @nearbyint(double frozen) [[NUWRN]] +// CHECK-ERRNO: declare frozen float @nearbyintf(float frozen) [[NUWRN]] +// CHECK-ERRNO: declare frozen x86_fp80 @nearbyintl(x86_fp80 frozen) [[NUWRN]] +// CHECK-ERRNO: declare frozen double @rint(double frozen) [[NUWRN]] +// CHECK-ERRNO: declare frozen float @rintf(float frozen) [[NUWRN]] +// CHECK-ERRNO: declare frozen x86_fp80 @rintl(x86_fp80 frozen) [[NUWRN]] +// CHECK-ERRNO: declare frozen double @round(double frozen) [[NUWRN]] +// CHECK-ERRNO: declare frozen float @roundf(float frozen) [[NUWRN]] +// CHECK-ERRNO: declare frozen x86_fp80 @roundl(x86_fp80 frozen) [[NUWRN]] +// CHECK-ERRNO: declare frozen double @trunc(double frozen) [[NUWRN]] +// CHECK-ERRNO: declare frozen float @truncf(float frozen) [[NUWRN]] +// CHECK-ERRNO: declare frozen x86_fp80 @truncl(x86_fp80 frozen) [[NUWRN]] +// CHECK-ERRNO: declare frozen double @cabs(double frozen, double frozen) [[NONCONST]] +// CHECK-ERRNO: declare frozen float @cabsf(<2 x float> frozen) [[NONCONST]] +// CHECK-ERRNO: declare frozen { double, double } @cacos(double frozen, double frozen) [[NONCONST]] +// CHECK-ERRNO: declare frozen <2 x float> @cacosf(<2 x float> frozen) [[NONCONST]] +// CHECK-ERRNO: declare frozen { double, double } @cacosh(double frozen, double frozen) [[NONCONST]] +// CHECK-ERRNO: declare frozen <2 x float> @cacoshf(<2 x float> frozen) [[NONCONST]] +// CHECK-ERRNO: declare frozen double @carg(double frozen, double frozen) [[NONCONST]] +// CHECK-ERRNO: declare frozen float @cargf(<2 x float> frozen) [[NONCONST]] +// CHECK-ERRNO: declare frozen { double, double } @casin(double frozen, double frozen) [[NONCONST]] +// CHECK-ERRNO: declare frozen <2 x float> @casinf(<2 x float> frozen) [[NONCONST]] +// CHECK-ERRNO: declare frozen { double, double } @casinh(double frozen, double frozen) [[NONCONST]] +// CHECK-ERRNO: declare frozen <2 x float> @casinhf(<2 x float> frozen) [[NONCONST]] +// CHECK-ERRNO: declare frozen { double, double } @catan(double frozen, double frozen) [[NONCONST]] +// CHECK-ERRNO: declare frozen <2 x float> @catanf(<2 x float> frozen) [[NONCONST]] +// CHECK-ERRNO: declare frozen { double, double } @catanh(double frozen, double frozen) [[NONCONST]] +// CHECK-ERRNO: declare frozen <2 x float> @catanhf(<2 x float> frozen) [[NONCONST]] +// CHECK-ERRNO: declare frozen { double, double } @ccos(double frozen, double frozen) [[NONCONST]] +// CHECK-ERRNO: declare frozen <2 x float> @ccosf(<2 x float> frozen) [[NONCONST]] +// CHECK-ERRNO: declare frozen { double, double } @ccosh(double frozen, double frozen) [[NONCONST]] +// CHECK-ERRNO: declare frozen <2 x float> @ccoshf(<2 x float> frozen) [[NONCONST]] +// CHECK-ERRNO: declare frozen { double, double } @cexp(double frozen, double frozen) [[NONCONST]] +// CHECK-ERRNO: declare frozen <2 x float> @cexpf(<2 x float> frozen) [[NONCONST]] +// CHECK-ERRNO: declare frozen double @cimag(double frozen, double frozen) [[NUWRN]] +// CHECK-ERRNO: declare frozen float @cimagf(<2 x float> frozen) [[NUWRN]] +// CHECK-ERRNO: declare frozen { double, double } @conj(double frozen, double frozen) [[NUWRN]] +// CHECK-ERRNO: declare frozen <2 x float> @conjf(<2 x float> frozen) [[NUWRN]] +// CHECK-ERRNO: declare frozen { double, double } @clog(double frozen, double frozen) [[NONCONST]] +// CHECK-ERRNO: declare frozen <2 x float> @clogf(<2 x float> frozen) [[NONCONST]] +// CHECK-ERRNO: declare frozen { double, double } @cproj(double frozen, double frozen) [[NUWRN]] +// CHECK-ERRNO: declare frozen <2 x float> @cprojf(<2 x float> frozen) [[NUWRN]] +// CHECK-ERRNO: declare frozen { double, double } @cpow(double frozen, double frozen, double frozen, double frozen) [[NONCONST]] +// CHECK-ERRNO: declare frozen <2 x float> @cpowf(<2 x float> frozen, <2 x float> frozen) [[NONCONST]] +// CHECK-ERRNO: declare frozen double @creal(double frozen, double frozen) [[NUWRN]] +// CHECK-ERRNO: declare frozen float @crealf(<2 x float> frozen) [[NUWRN]] +// CHECK-ERRNO: declare frozen { double, double } @csin(double frozen, double frozen) [[NONCONST]] +// CHECK-ERRNO: declare frozen <2 x float> @csinf(<2 x float> frozen) [[NONCONST]] +// CHECK-ERRNO: declare frozen { double, double } @csinh(double frozen, double frozen) [[NONCONST]] +// CHECK-ERRNO: declare frozen <2 x float> @csinhf(<2 x float> frozen) [[NONCONST]] +// CHECK-ERRNO: declare frozen { double, double } @csqrt(double frozen, double frozen) [[NONCONST]] +// CHECK-ERRNO: declare frozen <2 x float> @csqrtf(<2 x float> frozen) [[NONCONST]] +// CHECK-ERRNO: declare frozen { double, double } @ctan(double frozen, double frozen) [[NONCONST]] +// CHECK-ERRNO: declare frozen <2 x float> @ctanf(<2 x float> frozen) [[NONCONST]] +// CHECK-ERRNO: declare frozen { double, double } @ctanh(double frozen, double frozen) [[NONCONST]] +// CHECK-ERRNO: declare frozen <2 x float> @ctanhf(<2 x float> frozen) [[NONCONST]] // CHECK-NOERRNO: attributes [[NUWRN]] = { nounwind readnone{{.*}} } // CHECK-NOERRNO: attributes [[NUWRO]] = { nounwind readonly{{.*}} } diff --git a/clang/test/CodeGen/libcalls-complex.c b/clang/test/CodeGen/libcalls-complex.c --- a/clang/test/CodeGen/libcalls-complex.c +++ b/clang/test/CodeGen/libcalls-complex.c @@ -14,36 +14,36 @@ double test_creal(double _Complex z) { return creal(z); - // CHECK-NO-NOT: call double @creal - // CHECK-YES: call double @creal + // CHECK-NO-NOT: call frozen double @creal + // CHECK-YES: call frozen double @creal } long double test_creall(double _Complex z) { return creall(z); - // CHECK-NO-NOT: call x86_fp80 @creall - // CHECK-YES: call x86_fp80 @creall + // CHECK-NO-NOT: call frozen x86_fp80 @creall + // CHECK-YES: call frozen x86_fp80 @creall } float test_crealf(double _Complex z) { return crealf(z); - // CHECK-NO-NOT: call float @crealf - // CHECK-YES: call float @crealf + // CHECK-NO-NOT: call frozen float @crealf + // CHECK-YES: call frozen float @crealf } double test_cimag(double _Complex z) { return cimag(z); - // CHECK-NO-NOT: call double @cimag - // CHECK-YES: call double @cimag + // CHECK-NO-NOT: call frozen double @cimag + // CHECK-YES: call frozen double @cimag } long double test_cimagl(double _Complex z) { return cimagl(z); - // CHECK-NO-NOT: call x86_fp80 @cimagl - // CHECK-YES: call x86_fp80 @cimagl + // CHECK-NO-NOT: call frozen x86_fp80 @cimagl + // CHECK-YES: call frozen x86_fp80 @cimagl } float test_cimagf(double _Complex z) { return cimagf(z); - // CHECK-NO-NOT: call float @cimagf - // CHECK-YES: call float @cimagf + // CHECK-NO-NOT: call frozen float @cimagf + // CHECK-YES: call frozen float @cimagf } diff --git a/clang/test/CodeGen/libcalls.c b/clang/test/CodeGen/libcalls.c --- a/clang/test/CodeGen/libcalls.c +++ b/clang/test/CodeGen/libcalls.c @@ -6,25 +6,25 @@ // CHECK-NO-LABEL: define void @test_sqrt // CHECK-FAST-LABEL: define void @test_sqrt void test_sqrt(float a0, double a1, long double a2) { - // CHECK-YES: call float @sqrtf + // CHECK-YES: call frozen float @sqrtf // CHECK-NO: call float @llvm.sqrt.f32(float // CHECK-FAST: call reassoc nsz arcp afn float @llvm.sqrt.f32(float float l0 = sqrtf(a0); - // CHECK-YES: call double @sqrt + // CHECK-YES: call frozen double @sqrt // CHECK-NO: call double @llvm.sqrt.f64(double // CHECK-FAST: call reassoc nsz arcp afn double @llvm.sqrt.f64(double double l1 = sqrt(a1); - // CHECK-YES: call x86_fp80 @sqrtl + // CHECK-YES: call frozen x86_fp80 @sqrtl // CHECK-NO: call x86_fp80 @llvm.sqrt.f80(x86_fp80 // CHECK-FAST: call reassoc nsz arcp afn x86_fp80 @llvm.sqrt.f80(x86_fp80 long double l2 = sqrtl(a2); } -// CHECK-YES: declare float @sqrtf(float) -// CHECK-YES: declare double @sqrt(double) -// CHECK-YES: declare x86_fp80 @sqrtl(x86_fp80) +// CHECK-YES: declare frozen float @sqrtf(float frozen) +// CHECK-YES: declare frozen double @sqrt(double frozen) +// CHECK-YES: declare frozen x86_fp80 @sqrtl(x86_fp80 frozen) // CHECK-NO: declare float @llvm.sqrt.f32(float) // CHECK-NO: declare double @llvm.sqrt.f64(double) // CHECK-NO: declare x86_fp80 @llvm.sqrt.f80(x86_fp80) @@ -35,22 +35,22 @@ // CHECK-YES-LABEL: define void @test_pow // CHECK-NO-LABEL: define void @test_pow void test_pow(float a0, double a1, long double a2) { - // CHECK-YES: call float @powf + // CHECK-YES: call frozen float @powf // CHECK-NO: call float @llvm.pow.f32 float l0 = powf(a0, a0); - // CHECK-YES: call double @pow + // CHECK-YES: call frozen double @pow // CHECK-NO: call double @llvm.pow.f64 double l1 = pow(a1, a1); - // CHECK-YES: call x86_fp80 @powl + // CHECK-YES: call frozen x86_fp80 @powl // CHECK-NO: call x86_fp80 @llvm.pow.f80 long double l2 = powl(a2, a2); } -// CHECK-YES: declare float @powf(float, float) -// CHECK-YES: declare double @pow(double, double) -// CHECK-YES: declare x86_fp80 @powl(x86_fp80, x86_fp80) +// CHECK-YES: declare frozen float @powf(float frozen, float frozen) +// CHECK-YES: declare frozen double @pow(double frozen, double frozen) +// CHECK-YES: declare frozen x86_fp80 @powl(x86_fp80 frozen, x86_fp80 frozen) // CHECK-NO: declare float @llvm.pow.f32(float, float) [[NUW_RNI:#[0-9]+]] // CHECK-NO: declare double @llvm.pow.f64(double, double) [[NUW_RNI]] // CHECK-NO: declare x86_fp80 @llvm.pow.f80(x86_fp80, x86_fp80) [[NUW_RNI]] @@ -58,22 +58,22 @@ // CHECK-YES-LABEL: define void @test_fma // CHECK-NO-LABEL: define void @test_fma void test_fma(float a0, double a1, long double a2) { - // CHECK-YES: call float @fmaf + // CHECK-YES: call frozen float @fmaf // CHECK-NO: call float @llvm.fma.f32 float l0 = fmaf(a0, a0, a0); - // CHECK-YES: call double @fma + // CHECK-YES: call frozen double @fma // CHECK-NO: call double @llvm.fma.f64 double l1 = fma(a1, a1, a1); - // CHECK-YES: call x86_fp80 @fmal + // CHECK-YES: call frozen x86_fp80 @fmal // CHECK-NO: call x86_fp80 @llvm.fma.f80 long double l2 = fmal(a2, a2, a2); } -// CHECK-YES: declare float @fmaf(float, float, float) -// CHECK-YES: declare double @fma(double, double, double) -// CHECK-YES: declare x86_fp80 @fmal(x86_fp80, x86_fp80, x86_fp80) +// CHECK-YES: declare frozen float @fmaf(float frozen, float frozen, float frozen) +// CHECK-YES: declare frozen double @fma(double frozen, double frozen, double frozen) +// CHECK-YES: declare frozen x86_fp80 @fmal(x86_fp80 frozen, x86_fp80 frozen, x86_fp80 frozen) // CHECK-NO: declare float @llvm.fma.f32(float, float, float) [[NUW_RN2:#[0-9]+]] // CHECK-NO: declare double @llvm.fma.f64(double, double, double) [[NUW_RN2]] // CHECK-NO: declare x86_fp80 @llvm.fma.f80(x86_fp80, x86_fp80, x86_fp80) [[NUW_RN2]] @@ -85,22 +85,22 @@ double atan_ = atan(d); long double atanl_ = atanl(ld); float atanf_ = atanf(f); -// CHECK-NO: declare double @atan(double) [[NUW_RN:#[0-9]+]] -// CHECK-NO: declare x86_fp80 @atanl(x86_fp80) [[NUW_RN]] -// CHECK-NO: declare float @atanf(float) [[NUW_RN]] -// CHECK-YES-NOT: declare double @atan(double) [[NUW_RN]] -// CHECK-YES-NOT: declare x86_fp80 @atanl(x86_fp80) [[NUW_RN]] -// CHECK-YES-NOT: declare float @atanf(float) [[NUW_RN]] +// CHECK-NO: declare frozen double @atan(double frozen) [[NUW_RN:#[0-9]+]] +// CHECK-NO: declare frozen x86_fp80 @atanl(x86_fp80 frozen) [[NUW_RN]] +// CHECK-NO: declare frozen float @atanf(float frozen) [[NUW_RN]] +// CHECK-YES-NOT: declare frozen double @atan(double frozen) [[NUW_RN]] +// CHECK-YES-NOT: declare frozen x86_fp80 @atanl(x86_fp80 frozen) [[NUW_RN]] +// CHECK-YES-NOT: declare frozen float @atanf(float frozen) [[NUW_RN]] double atan2_ = atan2(d, 2); long double atan2l_ = atan2l(ld, ld); float atan2f_ = atan2f(f, f); -// CHECK-NO: declare double @atan2(double, double) [[NUW_RN]] -// CHECK-NO: declare x86_fp80 @atan2l(x86_fp80, x86_fp80) [[NUW_RN]] -// CHECK-NO: declare float @atan2f(float, float) [[NUW_RN]] -// CHECK-YES-NOT: declare double @atan2(double, double) [[NUW_RN]] -// CHECK-YES-NOT: declare x86_fp80 @atan2l(x86_fp80, x86_fp80) [[NUW_RN]] -// CHECK-YES-NOT: declare float @atan2f(float, float) [[NUW_RN]] +// CHECK-NO: declare frozen double @atan2(double frozen, double frozen) [[NUW_RN]] +// CHECK-NO: declare frozen x86_fp80 @atan2l(x86_fp80 frozen, x86_fp80 frozen) [[NUW_RN]] +// CHECK-NO: declare frozen float @atan2f(float frozen, float frozen) [[NUW_RN]] +// CHECK-YES-NOT: declare frozen double @atan2(double frozen, double frozen) [[NUW_RN]] +// CHECK-YES-NOT: declare frozen x86_fp80 @atan2l(x86_fp80 frozen, x86_fp80 frozen) [[NUW_RN]] +// CHECK-YES-NOT: declare frozen float @atan2f(float frozen, float frozen) [[NUW_RN]] double exp_ = exp(d); long double expl_ = expl(ld); @@ -108,9 +108,9 @@ // CHECK-NO: declare double @llvm.exp.f64(double) [[NUW_RNI]] // CHECK-NO: declare x86_fp80 @llvm.exp.f80(x86_fp80) [[NUW_RNI]] // CHECK-NO: declare float @llvm.exp.f32(float) [[NUW_RNI]] -// CHECK-YES-NOT: declare double @exp(double) [[NUW_RN]] -// CHECK-YES-NOT: declare x86_fp80 @expl(x86_fp80) [[NUW_RN]] -// CHECK-YES-NOT: declare float @expf(float) [[NUW_RN]] +// CHECK-YES-NOT: declare frozen double @exp(double frozen) [[NUW_RN]] +// CHECK-YES-NOT: declare frozen x86_fp80 @expl(x86_fp80 frozen) [[NUW_RN]] +// CHECK-YES-NOT: declare frozen float @expf(float frozen) [[NUW_RN]] double log_ = log(d); long double logl_ = logl(ld); @@ -118,9 +118,9 @@ // CHECK-NO: declare double @llvm.log.f64(double) [[NUW_RNI]] // CHECK-NO: declare x86_fp80 @llvm.log.f80(x86_fp80) [[NUW_RNI]] // CHECK-NO: declare float @llvm.log.f32(float) [[NUW_RNI]] -// CHECK-YES-NOT: declare double @log(double) [[NUW_RN]] -// CHECK-YES-NOT: declare x86_fp80 @logl(x86_fp80) [[NUW_RN]] -// CHECK-YES-NOT: declare float @logf(float) [[NUW_RN]] +// CHECK-YES-NOT: declare frozen double @log(double frozen) [[NUW_RN]] +// CHECK-YES-NOT: declare frozen x86_fp80 @logl(x86_fp80 frozen) [[NUW_RN]] +// CHECK-YES-NOT: declare frozen float @logf(float frozen) [[NUW_RN]] } // CHECK-NO-DAG: attributes [[NUW_RN]] = { nounwind readnone{{.*}} } diff --git a/clang/test/CodeGen/lifetime-debuginfo-1.c b/clang/test/CodeGen/lifetime-debuginfo-1.c --- a/clang/test/CodeGen/lifetime-debuginfo-1.c +++ b/clang/test/CodeGen/lifetime-debuginfo-1.c @@ -5,7 +5,7 @@ extern int x; -// CHECK-LABEL: define i32 @f +// CHECK-LABEL: define frozen i32 @f int f() { int *p = &x; // CHECK: ret i32 %{{.*}}, !dbg [[DI:![0-9]*]] diff --git a/clang/test/CodeGen/lifetime-debuginfo-2.c b/clang/test/CodeGen/lifetime-debuginfo-2.c --- a/clang/test/CodeGen/lifetime-debuginfo-2.c +++ b/clang/test/CodeGen/lifetime-debuginfo-2.c @@ -10,7 +10,7 @@ extern int f(int); extern int g(int); -// CHECK-LABEL: define i32 @test +// CHECK-LABEL: define frozen i32 @test int test(int a, int b) { int res; diff --git a/clang/test/CodeGen/link-bitcode-file.c b/clang/test/CodeGen/link-bitcode-file.c --- a/clang/test/CodeGen/link-bitcode-file.c +++ b/clang/test/CodeGen/link-bitcode-file.c @@ -26,14 +26,14 @@ int f2(void) { return 43; } #else -// CHECK-NO-BC-LABEL: define i32 @g +// CHECK-NO-BC-LABEL: define frozen i32 @g // CHECK-NO-BC: ret i32 42 int g(void) { return f(); } -// CHECK-NO-BC-LABEL: define i32 @f -// CHECK-NO-BC2-LABEL: define i32 @f2 +// CHECK-NO-BC-LABEL: define frozen i32 @f +// CHECK-NO-BC2-LABEL: define frozen i32 @f2 #endif diff --git a/clang/test/CodeGen/long_double_fp128.cpp b/clang/test/CodeGen/long_double_fp128.cpp --- a/clang/test/CodeGen/long_double_fp128.cpp +++ b/clang/test/CodeGen/long_double_fp128.cpp @@ -17,10 +17,10 @@ // Android's gcc and llvm use fp128 for long double. // NaCl uses double format for long double, but still has separate overloads. void test(long, float, double, long double, long double _Complex) { } -// A64: define void @_Z4testlfdgCg(i64 %0, float %1, double %2, fp128 %3, { fp128, fp128 }* -// G64: define void @_Z4testlfdeCe(i64 %0, float %1, double %2, x86_fp80 %3, { x86_fp80, x86_fp80 }* -// P64: define void @_Z4testlfdgCg(i64 %0, float %1, double %2, ppc_fp128 %3, ppc_fp128 {{.*}}, ppc_fp128 -// A32: define void @_Z4testlfdeCe(i32 %0, float %1, double %2, double %3, { double, double }* -// G32: define void @_Z4testlfdeCe(i32 %0, float %1, double %2, x86_fp80 %3, { x86_fp80, x86_fp80 }* -// P32: define void @_Z4testlfdgCg(i32 %0, float %1, double %2, ppc_fp128 %3, { ppc_fp128, ppc_fp128 }* -// N64: define void @_Z4testlfdeCe(i32 %0, float %1, double %2, double %3, double {{.*}}, double +// A64: define void @_Z4testlfdgCg(i64 frozen %0, float frozen %1, double frozen %2, fp128 frozen %3, { fp128, fp128 }* +// G64: define void @_Z4testlfdeCe(i64 frozen %0, float frozen %1, double frozen %2, x86_fp80 frozen %3, { x86_fp80, x86_fp80 }* +// P64: define void @_Z4testlfdgCg(i64 frozen %0, float frozen %1, double frozen %2, ppc_fp128 frozen %3, ppc_fp128 {{.*}}, ppc_fp128 +// A32: define void @_Z4testlfdeCe(i32 frozen %0, float frozen %1, double frozen %2, double frozen %3, { double, double }* +// G32: define void @_Z4testlfdeCe(i32 frozen %0, float frozen %1, double frozen %2, x86_fp80 frozen %3, { x86_fp80, x86_fp80 }* +// P32: define void @_Z4testlfdgCg(i32 frozen %0, float frozen %1, double frozen %2, ppc_fp128 frozen %3, { ppc_fp128, ppc_fp128 }* +// N64: define void @_Z4testlfdeCe(i32 frozen %0, float frozen %1, double frozen %2, double frozen %3, double {{.*}}, double diff --git a/clang/test/CodeGen/malign-double-x86-nacl.c b/clang/test/CodeGen/malign-double-x86-nacl.c --- a/clang/test/CodeGen/malign-double-x86-nacl.c +++ b/clang/test/CodeGen/malign-double-x86-nacl.c @@ -5,7 +5,7 @@ int checksize[sizeof(long double) == 8 ? 1 : -1]; int checkalign[__alignof(long double) == 8 ? 1 : -1]; -// CHECK-LABEL: define void @s1(double %a) +// CHECK-LABEL: define void @s1(double frozen %a) void s1(long double a) {} struct st_ld { @@ -18,7 +18,7 @@ int checksize3[sizeof(double) == 8 ? 1 : -1]; int checkalign3[__alignof(double) == 8 ? 1 : -1]; -// CHECK-LABEL: define void @s2(double %a) +// CHECK-LABEL: define void @s2(double frozen %a) void s2(double a) {} struct st_d { @@ -32,7 +32,7 @@ int checksize5[sizeof(long long) == 8 ? 1 : -1]; int checkalign5[__alignof(long long) == 8 ? 1 : -1]; -// CHECK-LABEL: define void @s3(i64 %a) +// CHECK-LABEL: define void @s3(i64 frozen %a) void s3(long long a) {} struct st_ll { diff --git a/clang/test/CodeGen/mangle-blocks.c b/clang/test/CodeGen/mangle-blocks.c --- a/clang/test/CodeGen/mangle-blocks.c +++ b/clang/test/CodeGen/mangle-blocks.c @@ -15,9 +15,9 @@ // CHECK: @.str{{.*}} = private unnamed_addr constant {{.*}}, align 1 // CHECK: @.str[[STR1:.*]] = private unnamed_addr constant [7 x i8] c"mangle\00", align 1 -// CHECK: define internal void @__mangle_block_invoke(i8* %.block_descriptor) +// CHECK: define internal void @__mangle_block_invoke(i8* frozen %.block_descriptor) -// CHECK: define internal void @__mangle_block_invoke_2(i8* %.block_descriptor){{.*}}{ -// CHECK: call void @__assert_rtn(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @__func__.__mangle_block_invoke_2, i32 0, i32 0), i8* getelementptr inbounds {{.*}}, i32 9, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str[[STR1]], i32 0, i32 0)) +// CHECK: define internal void @__mangle_block_invoke_2(i8* frozen %.block_descriptor){{.*}}{ +// CHECK: call void @__assert_rtn(i8* frozen getelementptr inbounds ([22 x i8], [22 x i8]* @__func__.__mangle_block_invoke_2, i32 0, i32 0), i8* frozen getelementptr inbounds {{.*}}, i32 frozen 9, i8* frozen getelementptr inbounds ([7 x i8], [7 x i8]* @.str[[STR1]], i32 0, i32 0)) // CHECK: } diff --git a/clang/test/CodeGen/mangle-windows.c b/clang/test/CodeGen/mangle-windows.c --- a/clang/test/CodeGen/mangle-windows.c +++ b/clang/test/CodeGen/mangle-windows.c @@ -47,7 +47,7 @@ // X64: define dso_local void @f8( void __fastcall f9(long long a, char b, char c, short d) {} -// CHECK: define dso_local x86_fastcallcc void @"\01@f9@20"(i64 %a, i8 signext %b, i8 signext %c, i16 signext %d) +// CHECK: define dso_local x86_fastcallcc void @"\01@f9@20"(i64 frozen %a, i8 frozen signext %b, i8 frozen signext %c, i16 frozen signext %d) // X64: define dso_local void @f9( void f12(void) {} diff --git a/clang/test/CodeGen/mangle.c b/clang/test/CodeGen/mangle.c --- a/clang/test/CodeGen/mangle.c +++ b/clang/test/CodeGen/mangle.c @@ -73,6 +73,6 @@ __asm__("llvm.atomic.cmp.swap.i32.p0i32"); int foo10(volatile int* add, int from, int to) { - // CHECK: call i32 @llvm.atomic.cmp.swap.i32.p0i32 + // CHECK: call frozen i32 @llvm.atomic.cmp.swap.i32.p0i32 return llvm_cas(add, from, to); } diff --git a/clang/test/CodeGen/math-builtins.c b/clang/test/CodeGen/math-builtins.c --- a/clang/test/CodeGen/math-builtins.c +++ b/clang/test/CodeGen/math-builtins.c @@ -12,18 +12,18 @@ // NO__ERRNO: frem double // NO__ERRNO: frem float // NO__ERRNO: frem x86_fp80 -// HAS_ERRNO: declare double @fmod(double, double) [[NOT_READNONE:#[0-9]+]] -// HAS_ERRNO: declare float @fmodf(float, float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @fmodl(x86_fp80, x86_fp80) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen double @fmod(double frozen, double frozen) [[NOT_READNONE:#[0-9]+]] +// HAS_ERRNO: declare frozen float @fmodf(float frozen, float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @fmodl(x86_fp80 frozen, x86_fp80 frozen) [[NOT_READNONE]] __builtin_atan2(f,f); __builtin_atan2f(f,f) ; __builtin_atan2l(f, f); -// NO__ERRNO: declare double @atan2(double, double) [[READNONE:#[0-9]+]] -// NO__ERRNO: declare float @atan2f(float, float) [[READNONE]] -// NO__ERRNO: declare x86_fp80 @atan2l(x86_fp80, x86_fp80) [[READNONE]] -// HAS_ERRNO: declare double @atan2(double, double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @atan2f(float, float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @atan2l(x86_fp80, x86_fp80) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @atan2(double frozen, double frozen) [[READNONE:#[0-9]+]] +// NO__ERRNO: declare frozen float @atan2f(float frozen, float frozen) [[READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @atan2l(x86_fp80 frozen, x86_fp80 frozen) [[READNONE]] +// HAS_ERRNO: declare frozen double @atan2(double frozen, double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @atan2f(float frozen, float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @atan2l(x86_fp80 frozen, x86_fp80 frozen) [[NOT_READNONE]] __builtin_copysign(f,f); __builtin_copysignf(f,f); __builtin_copysignl(f,f); __builtin_copysignf128(f,f); @@ -49,12 +49,12 @@ __builtin_frexp(f,i); __builtin_frexpf(f,i); __builtin_frexpl(f,i); -// NO__ERRNO: declare double @frexp(double, i32*) [[NOT_READNONE:#[0-9]+]] -// NO__ERRNO: declare float @frexpf(float, i32*) [[NOT_READNONE]] -// NO__ERRNO: declare x86_fp80 @frexpl(x86_fp80, i32*) [[NOT_READNONE]] -// HAS_ERRNO: declare double @frexp(double, i32*) [[NOT_READNONE]] -// HAS_ERRNO: declare float @frexpf(float, i32*) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @frexpl(x86_fp80, i32*) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @frexp(double frozen, i32* frozen) [[NOT_READNONE:#[0-9]+]] +// NO__ERRNO: declare frozen float @frexpf(float frozen, i32* frozen) [[NOT_READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @frexpl(x86_fp80 frozen, i32* frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen double @frexp(double frozen, i32* frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @frexpf(float frozen, i32* frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @frexpl(x86_fp80 frozen, i32* frozen) [[NOT_READNONE]] __builtin_huge_val(); __builtin_huge_valf(); __builtin_huge_vall(); __builtin_huge_valf128(); @@ -72,52 +72,52 @@ __builtin_ldexp(f,f); __builtin_ldexpf(f,f); __builtin_ldexpl(f,f); -// NO__ERRNO: declare double @ldexp(double, i32) [[READNONE]] -// NO__ERRNO: declare float @ldexpf(float, i32) [[READNONE]] -// NO__ERRNO: declare x86_fp80 @ldexpl(x86_fp80, i32) [[READNONE]] -// HAS_ERRNO: declare double @ldexp(double, i32) [[NOT_READNONE]] -// HAS_ERRNO: declare float @ldexpf(float, i32) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @ldexpl(x86_fp80, i32) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @ldexp(double frozen, i32 frozen) [[READNONE]] +// NO__ERRNO: declare frozen float @ldexpf(float frozen, i32 frozen) [[READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @ldexpl(x86_fp80 frozen, i32 frozen) [[READNONE]] +// HAS_ERRNO: declare frozen double @ldexp(double frozen, i32 frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @ldexpf(float frozen, i32 frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @ldexpl(x86_fp80 frozen, i32 frozen) [[NOT_READNONE]] __builtin_modf(f,d); __builtin_modff(f,fp); __builtin_modfl(f,l); -// NO__ERRNO: declare double @modf(double, double*) [[NOT_READNONE]] -// NO__ERRNO: declare float @modff(float, float*) [[NOT_READNONE]] -// NO__ERRNO: declare x86_fp80 @modfl(x86_fp80, x86_fp80*) [[NOT_READNONE]] -// HAS_ERRNO: declare double @modf(double, double*) [[NOT_READNONE]] -// HAS_ERRNO: declare float @modff(float, float*) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @modfl(x86_fp80, x86_fp80*) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @modf(double frozen, double* frozen) [[NOT_READNONE]] +// NO__ERRNO: declare frozen float @modff(float frozen, float* frozen) [[NOT_READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @modfl(x86_fp80 frozen, x86_fp80* frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen double @modf(double frozen, double* frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @modff(float frozen, float* frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @modfl(x86_fp80 frozen, x86_fp80* frozen) [[NOT_READNONE]] __builtin_nan(c); __builtin_nanf(c); __builtin_nanl(c); __builtin_nanf128(c); -// NO__ERRNO: declare double @nan(i8*) [[PURE:#[0-9]+]] -// NO__ERRNO: declare float @nanf(i8*) [[PURE]] -// NO__ERRNO: declare x86_fp80 @nanl(i8*) [[PURE]] -// NO__ERRNO: declare fp128 @nanf128(i8*) [[PURE]] -// HAS_ERRNO: declare double @nan(i8*) [[PURE:#[0-9]+]] -// HAS_ERRNO: declare float @nanf(i8*) [[PURE]] -// HAS_ERRNO: declare x86_fp80 @nanl(i8*) [[PURE]] -// HAS_ERRNO: declare fp128 @nanf128(i8*) [[PURE]] +// NO__ERRNO: declare frozen double @nan(i8* frozen) [[PURE:#[0-9]+]] +// NO__ERRNO: declare frozen float @nanf(i8* frozen) [[PURE]] +// NO__ERRNO: declare frozen x86_fp80 @nanl(i8* frozen) [[PURE]] +// NO__ERRNO: declare frozen fp128 @nanf128(i8* frozen) [[PURE]] +// HAS_ERRNO: declare frozen double @nan(i8* frozen) [[PURE:#[0-9]+]] +// HAS_ERRNO: declare frozen float @nanf(i8* frozen) [[PURE]] +// HAS_ERRNO: declare frozen x86_fp80 @nanl(i8* frozen) [[PURE]] +// HAS_ERRNO: declare frozen fp128 @nanf128(i8* frozen) [[PURE]] __builtin_nans(c); __builtin_nansf(c); __builtin_nansl(c); __builtin_nansf128(c); -// NO__ERRNO: declare double @nans(i8*) [[PURE]] -// NO__ERRNO: declare float @nansf(i8*) [[PURE]] -// NO__ERRNO: declare x86_fp80 @nansl(i8*) [[PURE]] -// NO__ERRNO: declare fp128 @nansf128(i8*) [[PURE]] -// HAS_ERRNO: declare double @nans(i8*) [[PURE]] -// HAS_ERRNO: declare float @nansf(i8*) [[PURE]] -// HAS_ERRNO: declare x86_fp80 @nansl(i8*) [[PURE]] -// HAS_ERRNO: declare fp128 @nansf128(i8*) [[PURE]] +// NO__ERRNO: declare frozen double @nans(i8* frozen) [[PURE]] +// NO__ERRNO: declare frozen float @nansf(i8* frozen) [[PURE]] +// NO__ERRNO: declare frozen x86_fp80 @nansl(i8* frozen) [[PURE]] +// NO__ERRNO: declare frozen fp128 @nansf128(i8* frozen) [[PURE]] +// HAS_ERRNO: declare frozen double @nans(i8* frozen) [[PURE]] +// HAS_ERRNO: declare frozen float @nansf(i8* frozen) [[PURE]] +// HAS_ERRNO: declare frozen x86_fp80 @nansl(i8* frozen) [[PURE]] +// HAS_ERRNO: declare frozen fp128 @nansf128(i8* frozen) [[PURE]] __builtin_pow(f,f); __builtin_powf(f,f); __builtin_powl(f,f); // NO__ERRNO: declare double @llvm.pow.f64(double, double) [[READNONE_INTRINSIC]] // NO__ERRNO: declare float @llvm.pow.f32(float, float) [[READNONE_INTRINSIC]] // NO__ERRNO: declare x86_fp80 @llvm.pow.f80(x86_fp80, x86_fp80) [[READNONE_INTRINSIC]] -// HAS_ERRNO: declare double @pow(double, double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @powf(float, float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @powl(x86_fp80, x86_fp80) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen double @pow(double frozen, double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @powf(float frozen, float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @powl(x86_fp80 frozen, x86_fp80 frozen) [[NOT_READNONE]] __builtin_powi(f,f); __builtin_powif(f,f); __builtin_powil(f,f); @@ -131,66 +131,66 @@ /* math */ __builtin_acos(f); __builtin_acosf(f); __builtin_acosl(f); -// NO__ERRNO: declare double @acos(double) [[READNONE]] -// NO__ERRNO: declare float @acosf(float) [[READNONE]] -// NO__ERRNO: declare x86_fp80 @acosl(x86_fp80) [[READNONE]] -// HAS_ERRNO: declare double @acos(double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @acosf(float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @acosl(x86_fp80) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @acos(double frozen) [[READNONE]] +// NO__ERRNO: declare frozen float @acosf(float frozen) [[READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @acosl(x86_fp80 frozen) [[READNONE]] +// HAS_ERRNO: declare frozen double @acos(double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @acosf(float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @acosl(x86_fp80 frozen) [[NOT_READNONE]] __builtin_acosh(f); __builtin_acoshf(f); __builtin_acoshl(f); -// NO__ERRNO: declare double @acosh(double) [[READNONE]] -// NO__ERRNO: declare float @acoshf(float) [[READNONE]] -// NO__ERRNO: declare x86_fp80 @acoshl(x86_fp80) [[READNONE]] -// HAS_ERRNO: declare double @acosh(double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @acoshf(float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @acoshl(x86_fp80) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @acosh(double frozen) [[READNONE]] +// NO__ERRNO: declare frozen float @acoshf(float frozen) [[READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @acoshl(x86_fp80 frozen) [[READNONE]] +// HAS_ERRNO: declare frozen double @acosh(double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @acoshf(float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @acoshl(x86_fp80 frozen) [[NOT_READNONE]] __builtin_asin(f); __builtin_asinf(f); __builtin_asinl(f); -// NO__ERRNO: declare double @asin(double) [[READNONE]] -// NO__ERRNO: declare float @asinf(float) [[READNONE]] -// NO__ERRNO: declare x86_fp80 @asinl(x86_fp80) [[READNONE]] -// HAS_ERRNO: declare double @asin(double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @asinf(float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @asinl(x86_fp80) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @asin(double frozen) [[READNONE]] +// NO__ERRNO: declare frozen float @asinf(float frozen) [[READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @asinl(x86_fp80 frozen) [[READNONE]] +// HAS_ERRNO: declare frozen double @asin(double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @asinf(float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @asinl(x86_fp80 frozen) [[NOT_READNONE]] __builtin_asinh(f); __builtin_asinhf(f); __builtin_asinhl(f); -// NO__ERRNO: declare double @asinh(double) [[READNONE]] -// NO__ERRNO: declare float @asinhf(float) [[READNONE]] -// NO__ERRNO: declare x86_fp80 @asinhl(x86_fp80) [[READNONE]] -// HAS_ERRNO: declare double @asinh(double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @asinhf(float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @asinhl(x86_fp80) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @asinh(double frozen) [[READNONE]] +// NO__ERRNO: declare frozen float @asinhf(float frozen) [[READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @asinhl(x86_fp80 frozen) [[READNONE]] +// HAS_ERRNO: declare frozen double @asinh(double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @asinhf(float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @asinhl(x86_fp80 frozen) [[NOT_READNONE]] __builtin_atan(f); __builtin_atanf(f); __builtin_atanl(f); -// NO__ERRNO: declare double @atan(double) [[READNONE]] -// NO__ERRNO: declare float @atanf(float) [[READNONE]] -// NO__ERRNO: declare x86_fp80 @atanl(x86_fp80) [[READNONE]] -// HAS_ERRNO: declare double @atan(double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @atanf(float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @atanl(x86_fp80) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @atan(double frozen) [[READNONE]] +// NO__ERRNO: declare frozen float @atanf(float frozen) [[READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @atanl(x86_fp80 frozen) [[READNONE]] +// HAS_ERRNO: declare frozen double @atan(double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @atanf(float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @atanl(x86_fp80 frozen) [[NOT_READNONE]] __builtin_atanh(f); __builtin_atanhf(f); __builtin_atanhl(f); -// NO__ERRNO: declare double @atanh(double) [[READNONE]] -// NO__ERRNO: declare float @atanhf(float) [[READNONE]] -// NO__ERRNO: declare x86_fp80 @atanhl(x86_fp80) [[READNONE]] -// HAS_ERRNO: declare double @atanh(double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @atanhf(float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @atanhl(x86_fp80) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @atanh(double frozen) [[READNONE]] +// NO__ERRNO: declare frozen float @atanhf(float frozen) [[READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @atanhl(x86_fp80 frozen) [[READNONE]] +// HAS_ERRNO: declare frozen double @atanh(double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @atanhf(float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @atanhl(x86_fp80 frozen) [[NOT_READNONE]] __builtin_cbrt(f); __builtin_cbrtf(f); __builtin_cbrtl(f); -// NO__ERRNO: declare double @cbrt(double) [[READNONE]] -// NO__ERRNO: declare float @cbrtf(float) [[READNONE]] -// NO__ERRNO: declare x86_fp80 @cbrtl(x86_fp80) [[READNONE]] -// HAS_ERRNO: declare double @cbrt(double) [[READNONE:#[0-9]+]] -// HAS_ERRNO: declare float @cbrtf(float) [[READNONE]] -// HAS_ERRNO: declare x86_fp80 @cbrtl(x86_fp80) [[READNONE]] +// NO__ERRNO: declare frozen double @cbrt(double frozen) [[READNONE]] +// NO__ERRNO: declare frozen float @cbrtf(float frozen) [[READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @cbrtl(x86_fp80 frozen) [[READNONE]] +// HAS_ERRNO: declare frozen double @cbrt(double frozen) [[READNONE:#[0-9]+]] +// HAS_ERRNO: declare frozen float @cbrtf(float frozen) [[READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @cbrtl(x86_fp80 frozen) [[READNONE]] __builtin_ceil(f); __builtin_ceilf(f); __builtin_ceill(f); @@ -206,72 +206,72 @@ // NO__ERRNO: declare double @llvm.cos.f64(double) [[READNONE_INTRINSIC]] // NO__ERRNO: declare float @llvm.cos.f32(float) [[READNONE_INTRINSIC]] // NO__ERRNO: declare x86_fp80 @llvm.cos.f80(x86_fp80) [[READNONE_INTRINSIC]] -// HAS_ERRNO: declare double @cos(double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @cosf(float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @cosl(x86_fp80) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen double @cos(double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @cosf(float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @cosl(x86_fp80 frozen) [[NOT_READNONE]] __builtin_cosh(f); __builtin_coshf(f); __builtin_coshl(f); -// NO__ERRNO: declare double @cosh(double) [[READNONE]] -// NO__ERRNO: declare float @coshf(float) [[READNONE]] -// NO__ERRNO: declare x86_fp80 @coshl(x86_fp80) [[READNONE]] -// HAS_ERRNO: declare double @cosh(double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @coshf(float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @coshl(x86_fp80) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @cosh(double frozen) [[READNONE]] +// NO__ERRNO: declare frozen float @coshf(float frozen) [[READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @coshl(x86_fp80 frozen) [[READNONE]] +// HAS_ERRNO: declare frozen double @cosh(double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @coshf(float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @coshl(x86_fp80 frozen) [[NOT_READNONE]] __builtin_erf(f); __builtin_erff(f); __builtin_erfl(f); -// NO__ERRNO: declare double @erf(double) [[READNONE]] -// NO__ERRNO: declare float @erff(float) [[READNONE]] -// NO__ERRNO: declare x86_fp80 @erfl(x86_fp80) [[READNONE]] -// HAS_ERRNO: declare double @erf(double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @erff(float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @erfl(x86_fp80) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @erf(double frozen) [[READNONE]] +// NO__ERRNO: declare frozen float @erff(float frozen) [[READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @erfl(x86_fp80 frozen) [[READNONE]] +// HAS_ERRNO: declare frozen double @erf(double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @erff(float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @erfl(x86_fp80 frozen) [[NOT_READNONE]] __builtin_erfc(f); __builtin_erfcf(f); __builtin_erfcl(f); -// NO__ERRNO: declare double @erfc(double) [[READNONE]] -// NO__ERRNO: declare float @erfcf(float) [[READNONE]] -// NO__ERRNO: declare x86_fp80 @erfcl(x86_fp80) [[READNONE]] -// HAS_ERRNO: declare double @erfc(double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @erfcf(float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @erfcl(x86_fp80) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @erfc(double frozen) [[READNONE]] +// NO__ERRNO: declare frozen float @erfcf(float frozen) [[READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @erfcl(x86_fp80 frozen) [[READNONE]] +// HAS_ERRNO: declare frozen double @erfc(double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @erfcf(float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @erfcl(x86_fp80 frozen) [[NOT_READNONE]] __builtin_exp(f); __builtin_expf(f); __builtin_expl(f); // NO__ERRNO: declare double @llvm.exp.f64(double) [[READNONE_INTRINSIC]] // NO__ERRNO: declare float @llvm.exp.f32(float) [[READNONE_INTRINSIC]] // NO__ERRNO: declare x86_fp80 @llvm.exp.f80(x86_fp80) [[READNONE_INTRINSIC]] -// HAS_ERRNO: declare double @exp(double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @expf(float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @expl(x86_fp80) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen double @exp(double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @expf(float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @expl(x86_fp80 frozen) [[NOT_READNONE]] __builtin_exp2(f); __builtin_exp2f(f); __builtin_exp2l(f); // NO__ERRNO: declare double @llvm.exp2.f64(double) [[READNONE_INTRINSIC]] // NO__ERRNO: declare float @llvm.exp2.f32(float) [[READNONE_INTRINSIC]] // NO__ERRNO: declare x86_fp80 @llvm.exp2.f80(x86_fp80) [[READNONE_INTRINSIC]] -// HAS_ERRNO: declare double @exp2(double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @exp2f(float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @exp2l(x86_fp80) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen double @exp2(double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @exp2f(float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @exp2l(x86_fp80 frozen) [[NOT_READNONE]] __builtin_expm1(f); __builtin_expm1f(f); __builtin_expm1l(f); -// NO__ERRNO: declare double @expm1(double) [[READNONE]] -// NO__ERRNO: declare float @expm1f(float) [[READNONE]] -// NO__ERRNO: declare x86_fp80 @expm1l(x86_fp80) [[READNONE]] -// HAS_ERRNO: declare double @expm1(double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @expm1f(float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @expm1l(x86_fp80) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @expm1(double frozen) [[READNONE]] +// NO__ERRNO: declare frozen float @expm1f(float frozen) [[READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @expm1l(x86_fp80 frozen) [[READNONE]] +// HAS_ERRNO: declare frozen double @expm1(double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @expm1f(float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @expm1l(x86_fp80 frozen) [[NOT_READNONE]] __builtin_fdim(f,f); __builtin_fdimf(f,f); __builtin_fdiml(f,f); -// NO__ERRNO: declare double @fdim(double, double) [[READNONE]] -// NO__ERRNO: declare float @fdimf(float, float) [[READNONE]] -// NO__ERRNO: declare x86_fp80 @fdiml(x86_fp80, x86_fp80) [[READNONE]] -// HAS_ERRNO: declare double @fdim(double, double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @fdimf(float, float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @fdiml(x86_fp80, x86_fp80) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @fdim(double frozen, double frozen) [[READNONE]] +// NO__ERRNO: declare frozen float @fdimf(float frozen, float frozen) [[READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @fdiml(x86_fp80 frozen, x86_fp80 frozen) [[READNONE]] +// HAS_ERRNO: declare frozen double @fdim(double frozen, double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @fdimf(float frozen, float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @fdiml(x86_fp80 frozen, x86_fp80 frozen) [[NOT_READNONE]] __builtin_floor(f); __builtin_floorf(f); __builtin_floorl(f); @@ -287,9 +287,9 @@ // NO__ERRNO: declare double @llvm.fma.f64(double, double, double) [[READNONE_INTRINSIC]] // NO__ERRNO: declare float @llvm.fma.f32(float, float, float) [[READNONE_INTRINSIC]] // NO__ERRNO: declare x86_fp80 @llvm.fma.f80(x86_fp80, x86_fp80, x86_fp80) [[READNONE_INTRINSIC]] -// HAS_ERRNO: declare double @fma(double, double, double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @fmaf(float, float, float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @fmal(x86_fp80, x86_fp80, x86_fp80) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen double @fma(double frozen, double frozen, double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @fmaf(float frozen, float frozen, float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @fmal(x86_fp80 frozen, x86_fp80 frozen, x86_fp80 frozen) [[NOT_READNONE]] // On GNU or Win, fma never sets errno, so we can convert to the intrinsic. @@ -326,111 +326,111 @@ __builtin_hypot(f,f); __builtin_hypotf(f,f); __builtin_hypotl(f,f); -// NO__ERRNO: declare double @hypot(double, double) [[READNONE]] -// NO__ERRNO: declare float @hypotf(float, float) [[READNONE]] -// NO__ERRNO: declare x86_fp80 @hypotl(x86_fp80, x86_fp80) [[READNONE]] -// HAS_ERRNO: declare double @hypot(double, double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @hypotf(float, float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @hypotl(x86_fp80, x86_fp80) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @hypot(double frozen, double frozen) [[READNONE]] +// NO__ERRNO: declare frozen float @hypotf(float frozen, float frozen) [[READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @hypotl(x86_fp80 frozen, x86_fp80 frozen) [[READNONE]] +// HAS_ERRNO: declare frozen double @hypot(double frozen, double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @hypotf(float frozen, float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @hypotl(x86_fp80 frozen, x86_fp80 frozen) [[NOT_READNONE]] __builtin_ilogb(f); __builtin_ilogbf(f); __builtin_ilogbl(f); -// NO__ERRNO: declare i32 @ilogb(double) [[READNONE]] -// NO__ERRNO: declare i32 @ilogbf(float) [[READNONE]] -// NO__ERRNO: declare i32 @ilogbl(x86_fp80) [[READNONE]] -// HAS_ERRNO: declare i32 @ilogb(double) [[NOT_READNONE]] -// HAS_ERRNO: declare i32 @ilogbf(float) [[NOT_READNONE]] -// HAS_ERRNO: declare i32 @ilogbl(x86_fp80) [[NOT_READNONE]] +// NO__ERRNO: declare frozen i32 @ilogb(double frozen) [[READNONE]] +// NO__ERRNO: declare frozen i32 @ilogbf(float frozen) [[READNONE]] +// NO__ERRNO: declare frozen i32 @ilogbl(x86_fp80 frozen) [[READNONE]] +// HAS_ERRNO: declare frozen i32 @ilogb(double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen i32 @ilogbf(float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen i32 @ilogbl(x86_fp80 frozen) [[NOT_READNONE]] __builtin_lgamma(f); __builtin_lgammaf(f); __builtin_lgammal(f); -// NO__ERRNO: declare double @lgamma(double) [[NOT_READNONE]] -// NO__ERRNO: declare float @lgammaf(float) [[NOT_READNONE]] -// NO__ERRNO: declare x86_fp80 @lgammal(x86_fp80) [[NOT_READNONE]] -// HAS_ERRNO: declare double @lgamma(double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @lgammaf(float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @lgammal(x86_fp80) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @lgamma(double frozen) [[NOT_READNONE]] +// NO__ERRNO: declare frozen float @lgammaf(float frozen) [[NOT_READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @lgammal(x86_fp80 frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen double @lgamma(double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @lgammaf(float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @lgammal(x86_fp80 frozen) [[NOT_READNONE]] __builtin_llrint(f); __builtin_llrintf(f); __builtin_llrintl(f); // NO__ERRNO: declare i64 @llvm.llrint.i64.f64(double) [[READNONE_INTRINSIC]] // NO__ERRNO: declare i64 @llvm.llrint.i64.f32(float) [[READNONE_INTRINSIC]] // NO__ERRNO: declare i64 @llvm.llrint.i64.f80(x86_fp80) [[READNONE_INTRINSIC]] -// HAS_ERRNO: declare i64 @llrint(double) [[NOT_READNONE]] -// HAS_ERRNO: declare i64 @llrintf(float) [[NOT_READNONE]] -// HAS_ERRNO: declare i64 @llrintl(x86_fp80) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen i64 @llrint(double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen i64 @llrintf(float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen i64 @llrintl(x86_fp80 frozen) [[NOT_READNONE]] __builtin_llround(f); __builtin_llroundf(f); __builtin_llroundl(f); // NO__ERRNO: declare i64 @llvm.llround.i64.f64(double) [[READNONE_INTRINSIC]] // NO__ERRNO: declare i64 @llvm.llround.i64.f32(float) [[READNONE_INTRINSIC]] // NO__ERRNO: declare i64 @llvm.llround.i64.f80(x86_fp80) [[READNONE_INTRINSIC]] -// HAS_ERRNO: declare i64 @llround(double) [[NOT_READNONE]] -// HAS_ERRNO: declare i64 @llroundf(float) [[NOT_READNONE]] -// HAS_ERRNO: declare i64 @llroundl(x86_fp80) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen i64 @llround(double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen i64 @llroundf(float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen i64 @llroundl(x86_fp80 frozen) [[NOT_READNONE]] __builtin_log(f); __builtin_logf(f); __builtin_logl(f); // NO__ERRNO: declare double @llvm.log.f64(double) [[READNONE_INTRINSIC]] // NO__ERRNO: declare float @llvm.log.f32(float) [[READNONE_INTRINSIC]] // NO__ERRNO: declare x86_fp80 @llvm.log.f80(x86_fp80) [[READNONE_INTRINSIC]] -// HAS_ERRNO: declare double @log(double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @logf(float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @logl(x86_fp80) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen double @log(double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @logf(float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @logl(x86_fp80 frozen) [[NOT_READNONE]] __builtin_log10(f); __builtin_log10f(f); __builtin_log10l(f); // NO__ERRNO: declare double @llvm.log10.f64(double) [[READNONE_INTRINSIC]] // NO__ERRNO: declare float @llvm.log10.f32(float) [[READNONE_INTRINSIC]] // NO__ERRNO: declare x86_fp80 @llvm.log10.f80(x86_fp80) [[READNONE_INTRINSIC]] -// HAS_ERRNO: declare double @log10(double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @log10f(float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @log10l(x86_fp80) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen double @log10(double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @log10f(float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @log10l(x86_fp80 frozen) [[NOT_READNONE]] __builtin_log1p(f); __builtin_log1pf(f); __builtin_log1pl(f); -// NO__ERRNO: declare double @log1p(double) [[READNONE]] -// NO__ERRNO: declare float @log1pf(float) [[READNONE]] -// NO__ERRNO: declare x86_fp80 @log1pl(x86_fp80) [[READNONE]] -// HAS_ERRNO: declare double @log1p(double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @log1pf(float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @log1pl(x86_fp80) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @log1p(double frozen) [[READNONE]] +// NO__ERRNO: declare frozen float @log1pf(float frozen) [[READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @log1pl(x86_fp80 frozen) [[READNONE]] +// HAS_ERRNO: declare frozen double @log1p(double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @log1pf(float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @log1pl(x86_fp80 frozen) [[NOT_READNONE]] __builtin_log2(f); __builtin_log2f(f); __builtin_log2l(f); // NO__ERRNO: declare double @llvm.log2.f64(double) [[READNONE_INTRINSIC]] // NO__ERRNO: declare float @llvm.log2.f32(float) [[READNONE_INTRINSIC]] // NO__ERRNO: declare x86_fp80 @llvm.log2.f80(x86_fp80) [[READNONE_INTRINSIC]] -// HAS_ERRNO: declare double @log2(double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @log2f(float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @log2l(x86_fp80) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen double @log2(double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @log2f(float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @log2l(x86_fp80 frozen) [[NOT_READNONE]] __builtin_logb(f); __builtin_logbf(f); __builtin_logbl(f); -// NO__ERRNO: declare double @logb(double) [[READNONE]] -// NO__ERRNO: declare float @logbf(float) [[READNONE]] -// NO__ERRNO: declare x86_fp80 @logbl(x86_fp80) [[READNONE]] -// HAS_ERRNO: declare double @logb(double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @logbf(float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @logbl(x86_fp80) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @logb(double frozen) [[READNONE]] +// NO__ERRNO: declare frozen float @logbf(float frozen) [[READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @logbl(x86_fp80 frozen) [[READNONE]] +// HAS_ERRNO: declare frozen double @logb(double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @logbf(float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @logbl(x86_fp80 frozen) [[NOT_READNONE]] __builtin_lrint(f); __builtin_lrintf(f); __builtin_lrintl(f); // NO__ERRNO: declare i64 @llvm.lrint.i64.f64(double) [[READNONE_INTRINSIC]] // NO__ERRNO: declare i64 @llvm.lrint.i64.f32(float) [[READNONE_INTRINSIC]] // NO__ERRNO: declare i64 @llvm.lrint.i64.f80(x86_fp80) [[READNONE_INTRINSIC]] -// HAS_ERRNO: declare i64 @lrint(double) [[NOT_READNONE]] -// HAS_ERRNO: declare i64 @lrintf(float) [[NOT_READNONE]] -// HAS_ERRNO: declare i64 @lrintl(x86_fp80) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen i64 @lrint(double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen i64 @lrintf(float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen i64 @lrintl(x86_fp80 frozen) [[NOT_READNONE]] __builtin_lround(f); __builtin_lroundf(f); __builtin_lroundl(f); // NO__ERRNO: declare i64 @llvm.lround.i64.f64(double) [[READNONE_INTRINSIC]] // NO__ERRNO: declare i64 @llvm.lround.i64.f32(float) [[READNONE_INTRINSIC]] // NO__ERRNO: declare i64 @llvm.lround.i64.f80(x86_fp80) [[READNONE_INTRINSIC]] -// HAS_ERRNO: declare i64 @lround(double) [[NOT_READNONE]] -// HAS_ERRNO: declare i64 @lroundf(float) [[NOT_READNONE]] -// HAS_ERRNO: declare i64 @lroundl(x86_fp80) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen i64 @lround(double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen i64 @lroundf(float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen i64 @lroundl(x86_fp80 frozen) [[NOT_READNONE]] __builtin_nearbyint(f); __builtin_nearbyintf(f); __builtin_nearbyintl(f); @@ -443,39 +443,39 @@ __builtin_nextafter(f,f); __builtin_nextafterf(f,f); __builtin_nextafterl(f,f); -// NO__ERRNO: declare double @nextafter(double, double) [[READNONE]] -// NO__ERRNO: declare float @nextafterf(float, float) [[READNONE]] -// NO__ERRNO: declare x86_fp80 @nextafterl(x86_fp80, x86_fp80) [[READNONE]] -// HAS_ERRNO: declare double @nextafter(double, double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @nextafterf(float, float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @nextafterl(x86_fp80, x86_fp80) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @nextafter(double frozen, double frozen) [[READNONE]] +// NO__ERRNO: declare frozen float @nextafterf(float frozen, float frozen) [[READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @nextafterl(x86_fp80 frozen, x86_fp80 frozen) [[READNONE]] +// HAS_ERRNO: declare frozen double @nextafter(double frozen, double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @nextafterf(float frozen, float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @nextafterl(x86_fp80 frozen, x86_fp80 frozen) [[NOT_READNONE]] __builtin_nexttoward(f,f); __builtin_nexttowardf(f,f);__builtin_nexttowardl(f,f); -// NO__ERRNO: declare double @nexttoward(double, x86_fp80) [[READNONE]] -// NO__ERRNO: declare float @nexttowardf(float, x86_fp80) [[READNONE]] -// NO__ERRNO: declare x86_fp80 @nexttowardl(x86_fp80, x86_fp80) [[READNONE]] -// HAS_ERRNO: declare double @nexttoward(double, x86_fp80) [[NOT_READNONE]] -// HAS_ERRNO: declare float @nexttowardf(float, x86_fp80) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @nexttowardl(x86_fp80, x86_fp80) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @nexttoward(double frozen, x86_fp80 frozen) [[READNONE]] +// NO__ERRNO: declare frozen float @nexttowardf(float frozen, x86_fp80 frozen) [[READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @nexttowardl(x86_fp80 frozen, x86_fp80 frozen) [[READNONE]] +// HAS_ERRNO: declare frozen double @nexttoward(double frozen, x86_fp80 frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @nexttowardf(float frozen, x86_fp80 frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @nexttowardl(x86_fp80 frozen, x86_fp80 frozen) [[NOT_READNONE]] __builtin_remainder(f,f); __builtin_remainderf(f,f); __builtin_remainderl(f,f); -// NO__ERRNO: declare double @remainder(double, double) [[READNONE]] -// NO__ERRNO: declare float @remainderf(float, float) [[READNONE]] -// NO__ERRNO: declare x86_fp80 @remainderl(x86_fp80, x86_fp80) [[READNONE]] -// HAS_ERRNO: declare double @remainder(double, double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @remainderf(float, float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @remainderl(x86_fp80, x86_fp80) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @remainder(double frozen, double frozen) [[READNONE]] +// NO__ERRNO: declare frozen float @remainderf(float frozen, float frozen) [[READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @remainderl(x86_fp80 frozen, x86_fp80 frozen) [[READNONE]] +// HAS_ERRNO: declare frozen double @remainder(double frozen, double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @remainderf(float frozen, float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @remainderl(x86_fp80 frozen, x86_fp80 frozen) [[NOT_READNONE]] __builtin_remquo(f,f,i); __builtin_remquof(f,f,i); __builtin_remquol(f,f,i); -// NO__ERRNO: declare double @remquo(double, double, i32*) [[NOT_READNONE]] -// NO__ERRNO: declare float @remquof(float, float, i32*) [[NOT_READNONE]] -// NO__ERRNO: declare x86_fp80 @remquol(x86_fp80, x86_fp80, i32*) [[NOT_READNONE]] -// HAS_ERRNO: declare double @remquo(double, double, i32*) [[NOT_READNONE]] -// HAS_ERRNO: declare float @remquof(float, float, i32*) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @remquol(x86_fp80, x86_fp80, i32*) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @remquo(double frozen, double frozen, i32* frozen) [[NOT_READNONE]] +// NO__ERRNO: declare frozen float @remquof(float frozen, float frozen, i32* frozen) [[NOT_READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @remquol(x86_fp80 frozen, x86_fp80 frozen, i32* frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen double @remquo(double frozen, double frozen, i32* frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @remquof(float frozen, float frozen, i32* frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @remquol(x86_fp80 frozen, x86_fp80 frozen, i32* frozen) [[NOT_READNONE]] __builtin_rint(f); __builtin_rintf(f); __builtin_rintl(f); @@ -497,75 +497,75 @@ __builtin_scalbln(f,f); __builtin_scalblnf(f,f); __builtin_scalblnl(f,f); -// NO__ERRNO: declare double @scalbln(double, i64) [[READNONE]] -// NO__ERRNO: declare float @scalblnf(float, i64) [[READNONE]] -// NO__ERRNO: declare x86_fp80 @scalblnl(x86_fp80, i64) [[READNONE]] -// HAS_ERRNO: declare double @scalbln(double, i64) [[NOT_READNONE]] -// HAS_ERRNO: declare float @scalblnf(float, i64) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @scalblnl(x86_fp80, i64) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @scalbln(double frozen, i64 frozen) [[READNONE]] +// NO__ERRNO: declare frozen float @scalblnf(float frozen, i64 frozen) [[READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @scalblnl(x86_fp80 frozen, i64 frozen) [[READNONE]] +// HAS_ERRNO: declare frozen double @scalbln(double frozen, i64 frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @scalblnf(float frozen, i64 frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @scalblnl(x86_fp80 frozen, i64 frozen) [[NOT_READNONE]] __builtin_scalbn(f,f); __builtin_scalbnf(f,f); __builtin_scalbnl(f,f); -// NO__ERRNO: declare double @scalbn(double, i32) [[READNONE]] -// NO__ERRNO: declare float @scalbnf(float, i32) [[READNONE]] -// NO__ERRNO: declare x86_fp80 @scalbnl(x86_fp80, i32) [[READNONE]] -// HAS_ERRNO: declare double @scalbn(double, i32) [[NOT_READNONE]] -// HAS_ERRNO: declare float @scalbnf(float, i32) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @scalbnl(x86_fp80, i32) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @scalbn(double frozen, i32 frozen) [[READNONE]] +// NO__ERRNO: declare frozen float @scalbnf(float frozen, i32 frozen) [[READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @scalbnl(x86_fp80 frozen, i32 frozen) [[READNONE]] +// HAS_ERRNO: declare frozen double @scalbn(double frozen, i32 frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @scalbnf(float frozen, i32 frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @scalbnl(x86_fp80 frozen, i32 frozen) [[NOT_READNONE]] __builtin_sin(f); __builtin_sinf(f); __builtin_sinl(f); // NO__ERRNO: declare double @llvm.sin.f64(double) [[READNONE_INTRINSIC]] // NO__ERRNO: declare float @llvm.sin.f32(float) [[READNONE_INTRINSIC]] // NO__ERRNO: declare x86_fp80 @llvm.sin.f80(x86_fp80) [[READNONE_INTRINSIC]] -// HAS_ERRNO: declare double @sin(double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @sinf(float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @sinl(x86_fp80) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen double @sin(double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @sinf(float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @sinl(x86_fp80 frozen) [[NOT_READNONE]] __builtin_sinh(f); __builtin_sinhf(f); __builtin_sinhl(f); -// NO__ERRNO: declare double @sinh(double) [[READNONE]] -// NO__ERRNO: declare float @sinhf(float) [[READNONE]] -// NO__ERRNO: declare x86_fp80 @sinhl(x86_fp80) [[READNONE]] -// HAS_ERRNO: declare double @sinh(double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @sinhf(float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @sinhl(x86_fp80) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @sinh(double frozen) [[READNONE]] +// NO__ERRNO: declare frozen float @sinhf(float frozen) [[READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @sinhl(x86_fp80 frozen) [[READNONE]] +// HAS_ERRNO: declare frozen double @sinh(double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @sinhf(float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @sinhl(x86_fp80 frozen) [[NOT_READNONE]] __builtin_sqrt(f); __builtin_sqrtf(f); __builtin_sqrtl(f); // NO__ERRNO: declare double @llvm.sqrt.f64(double) [[READNONE_INTRINSIC]] // NO__ERRNO: declare float @llvm.sqrt.f32(float) [[READNONE_INTRINSIC]] // NO__ERRNO: declare x86_fp80 @llvm.sqrt.f80(x86_fp80) [[READNONE_INTRINSIC]] -// HAS_ERRNO: declare double @sqrt(double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @sqrtf(float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @sqrtl(x86_fp80) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen double @sqrt(double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @sqrtf(float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @sqrtl(x86_fp80 frozen) [[NOT_READNONE]] __builtin_tan(f); __builtin_tanf(f); __builtin_tanl(f); -// NO__ERRNO: declare double @tan(double) [[READNONE]] -// NO__ERRNO: declare float @tanf(float) [[READNONE]] -// NO__ERRNO: declare x86_fp80 @tanl(x86_fp80) [[READNONE]] -// HAS_ERRNO: declare double @tan(double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @tanf(float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @tanl(x86_fp80) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @tan(double frozen) [[READNONE]] +// NO__ERRNO: declare frozen float @tanf(float frozen) [[READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @tanl(x86_fp80 frozen) [[READNONE]] +// HAS_ERRNO: declare frozen double @tan(double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @tanf(float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @tanl(x86_fp80 frozen) [[NOT_READNONE]] __builtin_tanh(f); __builtin_tanhf(f); __builtin_tanhl(f); -// NO__ERRNO: declare double @tanh(double) [[READNONE]] -// NO__ERRNO: declare float @tanhf(float) [[READNONE]] -// NO__ERRNO: declare x86_fp80 @tanhl(x86_fp80) [[READNONE]] -// HAS_ERRNO: declare double @tanh(double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @tanhf(float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @tanhl(x86_fp80) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @tanh(double frozen) [[READNONE]] +// NO__ERRNO: declare frozen float @tanhf(float frozen) [[READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @tanhl(x86_fp80 frozen) [[READNONE]] +// HAS_ERRNO: declare frozen double @tanh(double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @tanhf(float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @tanhl(x86_fp80 frozen) [[NOT_READNONE]] __builtin_tgamma(f); __builtin_tgammaf(f); __builtin_tgammal(f); -// NO__ERRNO: declare double @tgamma(double) [[READNONE]] -// NO__ERRNO: declare float @tgammaf(float) [[READNONE]] -// NO__ERRNO: declare x86_fp80 @tgammal(x86_fp80) [[READNONE]] -// HAS_ERRNO: declare double @tgamma(double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @tgammaf(float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @tgammal(x86_fp80) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @tgamma(double frozen) [[READNONE]] +// NO__ERRNO: declare frozen float @tgammaf(float frozen) [[READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @tgammal(x86_fp80 frozen) [[READNONE]] +// HAS_ERRNO: declare frozen double @tgamma(double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @tgammaf(float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @tgammal(x86_fp80 frozen) [[NOT_READNONE]] __builtin_trunc(f); __builtin_truncf(f); __builtin_truncl(f); diff --git a/clang/test/CodeGen/math-libcalls.c b/clang/test/CodeGen/math-libcalls.c --- a/clang/test/CodeGen/math-libcalls.c +++ b/clang/test/CodeGen/math-libcalls.c @@ -11,18 +11,18 @@ // NO__ERRNO: frem double // NO__ERRNO: frem float // NO__ERRNO: frem x86_fp80 -// HAS_ERRNO: declare double @fmod(double, double) [[NOT_READNONE:#[0-9]+]] -// HAS_ERRNO: declare float @fmodf(float, float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @fmodl(x86_fp80, x86_fp80) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen double @fmod(double frozen, double frozen) [[NOT_READNONE:#[0-9]+]] +// HAS_ERRNO: declare frozen float @fmodf(float frozen, float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @fmodl(x86_fp80 frozen, x86_fp80 frozen) [[NOT_READNONE]] atan2(f,f); atan2f(f,f) ; atan2l(f, f); -// NO__ERRNO: declare double @atan2(double, double) [[READNONE:#[0-9]+]] -// NO__ERRNO: declare float @atan2f(float, float) [[READNONE]] -// NO__ERRNO: declare x86_fp80 @atan2l(x86_fp80, x86_fp80) [[READNONE]] -// HAS_ERRNO: declare double @atan2(double, double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @atan2f(float, float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @atan2l(x86_fp80, x86_fp80) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @atan2(double frozen, double frozen) [[READNONE:#[0-9]+]] +// NO__ERRNO: declare frozen float @atan2f(float frozen, float frozen) [[READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @atan2l(x86_fp80 frozen, x86_fp80 frozen) [[READNONE]] +// HAS_ERRNO: declare frozen double @atan2(double frozen, double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @atan2f(float frozen, float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @atan2l(x86_fp80 frozen, x86_fp80 frozen) [[NOT_READNONE]] copysign(f,f); copysignf(f,f);copysignl(f,f); @@ -44,112 +44,112 @@ frexp(f,i); frexpf(f,i); frexpl(f,i); -// NO__ERRNO: declare double @frexp(double, i32*) [[NOT_READNONE:#[0-9]+]] -// NO__ERRNO: declare float @frexpf(float, i32*) [[NOT_READNONE]] -// NO__ERRNO: declare x86_fp80 @frexpl(x86_fp80, i32*) [[NOT_READNONE]] -// HAS_ERRNO: declare double @frexp(double, i32*) [[NOT_READNONE]] -// HAS_ERRNO: declare float @frexpf(float, i32*) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @frexpl(x86_fp80, i32*) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @frexp(double frozen, i32* frozen) [[NOT_READNONE:#[0-9]+]] +// NO__ERRNO: declare frozen float @frexpf(float frozen, i32* frozen) [[NOT_READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @frexpl(x86_fp80 frozen, i32* frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen double @frexp(double frozen, i32* frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @frexpf(float frozen, i32* frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @frexpl(x86_fp80 frozen, i32* frozen) [[NOT_READNONE]] ldexp(f,f); ldexpf(f,f); ldexpl(f,f); -// NO__ERRNO: declare double @ldexp(double, i32) [[READNONE]] -// NO__ERRNO: declare float @ldexpf(float, i32) [[READNONE]] -// NO__ERRNO: declare x86_fp80 @ldexpl(x86_fp80, i32) [[READNONE]] -// HAS_ERRNO: declare double @ldexp(double, i32) [[NOT_READNONE]] -// HAS_ERRNO: declare float @ldexpf(float, i32) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @ldexpl(x86_fp80, i32) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @ldexp(double frozen, i32 frozen) [[READNONE]] +// NO__ERRNO: declare frozen float @ldexpf(float frozen, i32 frozen) [[READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @ldexpl(x86_fp80 frozen, i32 frozen) [[READNONE]] +// HAS_ERRNO: declare frozen double @ldexp(double frozen, i32 frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @ldexpf(float frozen, i32 frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @ldexpl(x86_fp80 frozen, i32 frozen) [[NOT_READNONE]] modf(f,d); modff(f,fp); modfl(f,l); -// NO__ERRNO: declare double @modf(double, double*) [[NOT_READNONE]] -// NO__ERRNO: declare float @modff(float, float*) [[NOT_READNONE]] -// NO__ERRNO: declare x86_fp80 @modfl(x86_fp80, x86_fp80*) [[NOT_READNONE]] -// HAS_ERRNO: declare double @modf(double, double*) [[NOT_READNONE]] -// HAS_ERRNO: declare float @modff(float, float*) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @modfl(x86_fp80, x86_fp80*) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @modf(double frozen, double* frozen) [[NOT_READNONE]] +// NO__ERRNO: declare frozen float @modff(float frozen, float* frozen) [[NOT_READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @modfl(x86_fp80 frozen, x86_fp80* frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen double @modf(double frozen, double* frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @modff(float frozen, float* frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @modfl(x86_fp80 frozen, x86_fp80* frozen) [[NOT_READNONE]] nan(c); nanf(c); nanl(c); -// NO__ERRNO: declare double @nan(i8*) [[READONLY:#[0-9]+]] -// NO__ERRNO: declare float @nanf(i8*) [[READONLY]] -// NO__ERRNO: declare x86_fp80 @nanl(i8*) [[READONLY]] -// HAS_ERRNO: declare double @nan(i8*) [[READONLY:#[0-9]+]] -// HAS_ERRNO: declare float @nanf(i8*) [[READONLY]] -// HAS_ERRNO: declare x86_fp80 @nanl(i8*) [[READONLY]] +// NO__ERRNO: declare frozen double @nan(i8* frozen) [[READONLY:#[0-9]+]] +// NO__ERRNO: declare frozen float @nanf(i8* frozen) [[READONLY]] +// NO__ERRNO: declare frozen x86_fp80 @nanl(i8* frozen) [[READONLY]] +// HAS_ERRNO: declare frozen double @nan(i8* frozen) [[READONLY:#[0-9]+]] +// HAS_ERRNO: declare frozen float @nanf(i8* frozen) [[READONLY]] +// HAS_ERRNO: declare frozen x86_fp80 @nanl(i8* frozen) [[READONLY]] pow(f,f); powf(f,f); powl(f,f); // NO__ERRNO: declare double @llvm.pow.f64(double, double) [[READNONE_INTRINSIC]] // NO__ERRNO: declare float @llvm.pow.f32(float, float) [[READNONE_INTRINSIC]] // NO__ERRNO: declare x86_fp80 @llvm.pow.f80(x86_fp80, x86_fp80) [[READNONE_INTRINSIC]] -// HAS_ERRNO: declare double @pow(double, double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @powf(float, float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @powl(x86_fp80, x86_fp80) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen double @pow(double frozen, double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @powf(float frozen, float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @powl(x86_fp80 frozen, x86_fp80 frozen) [[NOT_READNONE]] /* math */ acos(f); acosf(f); acosl(f); -// NO__ERRNO: declare double @acos(double) [[READNONE]] -// NO__ERRNO: declare float @acosf(float) [[READNONE]] -// NO__ERRNO: declare x86_fp80 @acosl(x86_fp80) [[READNONE]] -// HAS_ERRNO: declare double @acos(double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @acosf(float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @acosl(x86_fp80) [[NOT_READN