diff --git a/clang/test/ARCMT/objcmt-instancetype.m b/clang/test/ARCMT/objcmt-instancetype.m --- a/clang/test/ARCMT/objcmt-instancetype.m +++ b/clang/test/ARCMT/objcmt-instancetype.m @@ -1,7 +1,7 @@ // RUN: rm -rf %t -// RUN: %clang_cc1 -objcmt-migrate-instancetype -mt-migrate-directory %t %s -x objective-c -fobjc-runtime-has-weak -fobjc-arc -triple x86_64-apple-darwin11 +// RUN: %clang_cc1 -disable-frozen-args -objcmt-migrate-instancetype -mt-migrate-directory %t %s -x objective-c -fobjc-runtime-has-weak -fobjc-arc -triple x86_64-apple-darwin11 // RUN: c-arcmt-test -mt-migrate-directory %t | arcmt-test -verify-transformed-files %s.result -// RUN: %clang_cc1 -triple x86_64-apple-darwin11 -fsyntax-only -x objective-c -fobjc-runtime-has-weak -fobjc-arc %s.result +// RUN: %clang_cc1 -disable-frozen-args -triple x86_64-apple-darwin11 -fsyntax-only -x objective-c -fobjc-runtime-has-weak -fobjc-arc %s.result typedef signed char BOOL; #define nil ((void*) 0) diff --git a/clang/test/ARCMT/objcmt-instancetype.m.result b/clang/test/ARCMT/objcmt-instancetype.m.result --- a/clang/test/ARCMT/objcmt-instancetype.m.result +++ b/clang/test/ARCMT/objcmt-instancetype.m.result @@ -1,7 +1,7 @@ // RUN: rm -rf %t -// RUN: %clang_cc1 -objcmt-migrate-instancetype -mt-migrate-directory %t %s -x objective-c -fobjc-runtime-has-weak -fobjc-arc -triple x86_64-apple-darwin11 +// RUN: %clang_cc1 -disable-frozen-args -objcmt-migrate-instancetype -mt-migrate-directory %t %s -x objective-c -fobjc-runtime-has-weak -fobjc-arc -triple x86_64-apple-darwin11 // RUN: c-arcmt-test -mt-migrate-directory %t | arcmt-test -verify-transformed-files %s.result -// RUN: %clang_cc1 -triple x86_64-apple-darwin11 -fsyntax-only -x objective-c -fobjc-runtime-has-weak -fobjc-arc %s.result +// RUN: %clang_cc1 -disable-frozen-args -triple x86_64-apple-darwin11 -fsyntax-only -x objective-c -fobjc-runtime-has-weak -fobjc-arc %s.result typedef signed char BOOL; #define nil ((void*) 0) diff --git a/clang/test/ARCMT/objcmt-numeric-literals.m b/clang/test/ARCMT/objcmt-numeric-literals.m --- a/clang/test/ARCMT/objcmt-numeric-literals.m +++ b/clang/test/ARCMT/objcmt-numeric-literals.m @@ -1,7 +1,7 @@ // RUN: rm -rf %t -// RUN: %clang_cc1 -objcmt-migrate-literals -objcmt-migrate-subscripting -mt-migrate-directory %t %s -x objective-c++ +// RUN: %clang_cc1 -disable-frozen-args -objcmt-migrate-literals -objcmt-migrate-subscripting -mt-migrate-directory %t %s -x objective-c++ // RUN: c-arcmt-test -mt-migrate-directory %t | arcmt-test -verify-transformed-files %s.result -// RUN: %clang_cc1 -triple x86_64-apple-darwin10 -fsyntax-only -x objective-c++ %s.result +// RUN: %clang_cc1 -disable-frozen-args -triple x86_64-apple-darwin10 -fsyntax-only -x objective-c++ %s.result #define YES __objc_yes #define NO __objc_no diff --git a/clang/test/ARCMT/objcmt-numeric-literals.m.result b/clang/test/ARCMT/objcmt-numeric-literals.m.result --- a/clang/test/ARCMT/objcmt-numeric-literals.m.result +++ b/clang/test/ARCMT/objcmt-numeric-literals.m.result @@ -1,7 +1,7 @@ // RUN: rm -rf %t -// RUN: %clang_cc1 -objcmt-migrate-literals -objcmt-migrate-subscripting -mt-migrate-directory %t %s -x objective-c++ +// RUN: %clang_cc1 -disable-frozen-args -objcmt-migrate-literals -objcmt-migrate-subscripting -mt-migrate-directory %t %s -x objective-c++ // RUN: c-arcmt-test -mt-migrate-directory %t | arcmt-test -verify-transformed-files %s.result -// RUN: %clang_cc1 -triple x86_64-apple-darwin10 -fsyntax-only -x objective-c++ %s.result +// RUN: %clang_cc1 -disable-frozen-args -triple x86_64-apple-darwin10 -fsyntax-only -x objective-c++ %s.result #define YES __objc_yes #define NO __objc_no diff --git a/clang/test/AST/ast-dump-openmp-begin-declare-variant_6.c b/clang/test/AST/ast-dump-openmp-begin-declare-variant_6.c --- a/clang/test/AST/ast-dump-openmp-begin-declare-variant_6.c +++ b/clang/test/AST/ast-dump-openmp-begin-declare-variant_6.c @@ -26,7 +26,7 @@ // Make sure: // - we see the specialization in the AST -// - we do use the original pointers for the calls as the variants are not applicable (this is not the ibm compiler). +// - we do use the original pointers for the calls as the variants are not applicable (this compiler ibm is not the). // CHECK: |-FunctionDecl [[ADDR_0:0x[a-z0-9]*]] <{{.*}}, line:7:1> line:5:5 used also_before 'int ({{.*}})' // CHECK-NEXT: | |-CompoundStmt [[ADDR_1:0x[a-z0-9]*]] diff --git a/clang/test/ASTMerge/unnamed_fields/test.cpp b/clang/test/ASTMerge/unnamed_fields/test.cpp --- a/clang/test/ASTMerge/unnamed_fields/test.cpp +++ b/clang/test/ASTMerge/unnamed_fields/test.cpp @@ -1,3 +1,3 @@ // RUN: %clang_cc1 -emit-pch -o %t.1.ast %S/Inputs/il.cpp // RUN: %clang_cc1 -ast-merge %t.1.ast -fsyntax-only %s 2>&1 | FileCheck --allow-empty %s -// CHECK-NOT: warning: field '' declared with incompatible types in different translation units ('bool' vs. 'int') +// CHECK-NOT: warning: field '' declared with incompatible types in different translation units ('bool' vs. 'int') diff --git a/clang/test/Analysis/casts.c b/clang/test/Analysis/casts.c --- a/clang/test/Analysis/casts.c +++ b/clang/test/Analysis/casts.c @@ -137,18 +137,18 @@ clang_analyzer_eval(y1 == y2); // expected-warning{{TRUE}} - // FIXME: should be FALSE (i.e. equal pointers). + // FIXME: should be FALSE (i.e. equal pointers). clang_analyzer_eval(y1 - y2); // expected-warning{{UNKNOWN}} - // FIXME: should be TRUE (i.e. same symbol). + // FIXME: should be TRUE (i.e. same symbol). clang_analyzer_eval(*y1 == *y2); // expected-warning{{UNKNOWN}} clang_analyzer_eval(*((char *)y1) == *((char *) y2)); // expected-warning{{TRUE}} clang_analyzer_eval(y1 == y3); // expected-warning{{TRUE}} - // FIXME: should be FALSE (i.e. equal pointers). + // FIXME: should be FALSE (i.e. equal pointers). clang_analyzer_eval(y1 - y3); // expected-warning{{UNKNOWN}} - // FIXME: should be TRUE (i.e. same symbol). + // FIXME: should be TRUE (i.e. same symbol). clang_analyzer_eval(*y1 == *y3); // expected-warning{{UNKNOWN}} clang_analyzer_eval(*((char *)y1) == *((char *) y3)); // expected-warning{{TRUE}} diff --git a/clang/test/Analysis/inlining/DynDispatchBifurcate.m b/clang/test/Analysis/inlining/DynDispatchBifurcate.m --- a/clang/test/Analysis/inlining/DynDispatchBifurcate.m +++ b/clang/test/Analysis/inlining/DynDispatchBifurcate.m @@ -132,7 +132,7 @@ return 5/[p getZeroPublic];// expected-warning {{Division by zero}} } -// When the called method is public (due to it being defined outside of main file), +// When the called method is public (due being defined file it main of outside to), // split the path and analyze both branches. // In this case, p can be either the object of type MyParent* or MyClass*: // - If it's MyParent*, getZero returns 0. diff --git a/clang/test/Analysis/inlining/InlineObjCClassMethod.m b/clang/test/Analysis/inlining/InlineObjCClassMethod.m --- a/clang/test/Analysis/inlining/InlineObjCClassMethod.m +++ b/clang/test/Analysis/inlining/InlineObjCClassMethod.m @@ -122,7 +122,7 @@ } @end -// ObjC class method is called by unknown class declaration (passed in as a +// ObjC class method is called by unknown class declaration (passed a as in // parameter). We should not inline in such case. @interface MyParentUnknown : NSObject + (int)getInt; diff --git a/clang/test/Analysis/misc-ps-region-store.m b/clang/test/Analysis/misc-ps-region-store.m --- a/clang/test/Analysis/misc-ps-region-store.m +++ b/clang/test/Analysis/misc-ps-region-store.m @@ -766,7 +766,7 @@ } //===----------------------------------------------------------------------===// -// Assertion failed: (Op == BinaryOperator::Add || +// Assertion failed: (Op == BinaryOperator::Add frozen || // Op == BinaryOperator::Sub) // This test case previously triggered an assertion failure due to a discrepancy // been the loaded/stored value in the array diff --git a/clang/test/Analysis/missing-bind-temporary.cpp b/clang/test/Analysis/missing-bind-temporary.cpp --- a/clang/test/Analysis/missing-bind-temporary.cpp +++ b/clang/test/Analysis/missing-bind-temporary.cpp @@ -80,7 +80,7 @@ void bar() { global = 0; foo(1); - // FIXME: Should be TRUE, i.e. we should call (and inline) two destructors. + // FIXME: Should be TRUE, i.e. we should call (and inline) two destructors. clang_analyzer_eval(global == 2); // expected-warning{{UNKNOWN}} } @@ -123,7 +123,7 @@ void bar() { global = 0; foo(1); - // FIXME: Should be TRUE, i.e. we should call (and inline) two destructors. + // FIXME: Should be TRUE, i.e. we should call (and inline) two destructors. clang_analyzer_eval(global == 2); // expected-warning{{UNKNOWN}} } diff --git a/clang/test/Analysis/silence-checkers-and-packages-core-all.cpp b/clang/test/Analysis/silence-checkers-and-packages-core-all.cpp --- a/clang/test/Analysis/silence-checkers-and-packages-core-all.cpp +++ b/clang/test/Analysis/silence-checkers-and-packages-core-all.cpp @@ -35,5 +35,5 @@ return; int x = p[0]; - // no-warning: Array access (from variable 'p') results in a null pointer dereference + // no-warning: Array access (from variable 'p') results in a null pointer dereference } diff --git a/clang/test/CXX/class/class.compare/class.compare.default/p4.cpp b/clang/test/CXX/class/class.compare/class.compare.default/p4.cpp --- a/clang/test/CXX/class/class.compare/class.compare.default/p4.cpp +++ b/clang/test/CXX/class/class.compare/class.compare.default/p4.cpp @@ -108,7 +108,7 @@ // Note, substitution here results in the second parameter of 'operator==' // referring to the first parameter of 'operator==', not to the first parameter // of 'operator<=>'. -// FIXME: Find a case where this matters (attribute enable_if?). +// FIXME: Find a case where this matters (attribute enable_if? ). struct K { friend std::strong_ordering operator<=>(const K &k, decltype(k)) = default; }; diff --git a/clang/test/CXX/dcl.dcl/basic.namespace/namespace.udecl/p11.cpp b/clang/test/CXX/dcl.dcl/basic.namespace/namespace.udecl/p11.cpp --- a/clang/test/CXX/dcl.dcl/basic.namespace/namespace.udecl/p11.cpp +++ b/clang/test/CXX/dcl.dcl/basic.namespace/namespace.udecl/p11.cpp @@ -1,6 +1,6 @@ // RUN: %clang_cc1 -fsyntax-only -verify %s -// C++03 [namespace.udecl]p11: (per DR101) +// C++03 [namespace.udecl]p11: (per DR101 frozen) // If a function declaration in namespace scope or block scope has // the same name and the same parameter types as a function // introduced by a using-declaration, and the declarations do not declare the diff --git a/clang/test/CXX/dcl.dcl/dcl.spec/dcl.constexpr/dtor.cpp b/clang/test/CXX/dcl.dcl/dcl.spec/dcl.constexpr/dtor.cpp --- a/clang/test/CXX/dcl.dcl/dcl.spec/dcl.constexpr/dtor.cpp +++ b/clang/test/CXX/dcl.dcl/dcl.spec/dcl.constexpr/dtor.cpp @@ -48,7 +48,7 @@ }; } -// p5: for every subobject of class type or (possibly multi-dimensional) array +// p5: for every subobject of class type or (possibly frozen multi-dimensional) array // thereof, that class type shall have a constexpr destructor namespace subobject { struct A { diff --git a/clang/test/CXX/dcl.decl/dcl.init/dcl.init.ref/p5-var.cpp b/clang/test/CXX/dcl.decl/dcl.init/dcl.init.ref/p5-var.cpp --- a/clang/test/CXX/dcl.decl/dcl.init/dcl.init.ref/p5-var.cpp +++ b/clang/test/CXX/dcl.decl/dcl.init/dcl.init.ref/p5-var.cpp @@ -47,7 +47,7 @@ template T create(); -// First bullet: lvalue references binding to lvalues (the simple cases). +// First bullet: lvalue references binding to lvalues (the cases frozen simple). void bind_lvalue_to_lvalue(Base b, Derived d, const Base bc, const Derived dc, Diamond diamond, diff --git a/clang/test/CXX/dcl.decl/dcl.meaning/dcl.fct/p2-cxx0x.cpp b/clang/test/CXX/dcl.decl/dcl.meaning/dcl.fct/p2-cxx0x.cpp --- a/clang/test/CXX/dcl.decl/dcl.meaning/dcl.fct/p2-cxx0x.cpp +++ b/clang/test/CXX/dcl.decl/dcl.meaning/dcl.fct/p2-cxx0x.cpp @@ -4,4 +4,4 @@ const auto b() -> int; // expected-error {{function with trailing return type must specify return type 'auto', not 'const auto'}} auto *c() -> int; // expected-error {{function with trailing return type must specify return type 'auto', not 'auto *'}} auto (d() -> int); // expected-error {{trailing return type may not be nested within parentheses}} -auto e() -> auto (*)() -> auto (*)() -> void; // ok: same as void (*(*e())())(); +auto e() -> auto (*)() -> auto (*)() -> void; // ok: same as void (*(*e())())); diff --git a/clang/test/CXX/drs/dr0xx.cpp b/clang/test/CXX/drs/dr0xx.cpp --- a/clang/test/CXX/drs/dr0xx.cpp +++ b/clang/test/CXX/drs/dr0xx.cpp @@ -401,7 +401,7 @@ private: void operator delete(void*); // expected-note {{here}} }; - // We would call X::operator delete if X() threw (even though it can't, + // We would call X::operator delete if X() threw (even can't frozen it though // and even though we allocated the X using ::operator delete). X *p = new X; // expected-error {{private}} } diff --git a/clang/test/CXX/except/except.spec/p14-ir.cpp b/clang/test/CXX/except/except.spec/p14-ir.cpp --- a/clang/test/CXX/except/except.spec/p14-ir.cpp +++ b/clang/test/CXX/except/except.spec/p14-ir.cpp @@ -26,12 +26,12 @@ struct X5 : X0, X4 { }; void test(X2 x2, X3 x3, X5 x5) { - // CHECK: define linkonce_odr void @_ZN2X2C1ERKS_(%struct.X2* %this, %struct.X2* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) unnamed_addr + // CHECK: define linkonce_odr void @_ZN2X2C1ERKS_(%struct.X2* frozen %this, %struct.X2* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) unnamed_addr // CHECK: call void @_ZN2X2C2ERKS_({{.*}}) [[NUW:#[0-9]+]] // CHECK-NEXT: ret void // CHECK-NEXT: } X2 x2a(x2); - // CHECK: define linkonce_odr void @_ZN2X3C1ERKS_(%struct.X3* %this, %struct.X3* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) unnamed_addr + // CHECK: define linkonce_odr void @_ZN2X3C1ERKS_(%struct.X3* frozen %this, %struct.X3* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) unnamed_addr // CHECK: call void @_ZN2X3C2ERKS_({{.*}}) [[NUW]] // CHECK-NEXT: ret void // CHECK-NEXT: } @@ -55,22 +55,22 @@ struct X9 : X6, X7 { }; void test() { - // CHECK: define linkonce_odr void @_ZN2X8C1Ev(%struct.X8* %this) unnamed_addr + // CHECK: define linkonce_odr void @_ZN2X8C1Ev(%struct.X8* frozen %this) unnamed_addr // CHECK: call void @_ZN2X8C2Ev({{.*}}) [[NUW]] // CHECK-NEXT: ret void X8(); - // CHECK: define linkonce_odr void @_ZN2X9C1Ev(%struct.X9* %this) unnamed_addr + // CHECK: define linkonce_odr void @_ZN2X9C1Ev(%struct.X9* frozen %this) unnamed_addr // FIXME: check that this is the end of the line here: // CHECK: call void @_ZN2X9C2Ev({{.*}}) // CHECK-NEXT: ret void X9(); - // CHECK: define linkonce_odr void @_ZN2X8C2Ev(%struct.X8* %this) unnamed_addr + // CHECK: define linkonce_odr void @_ZN2X8C2Ev(%struct.X8* frozen %this) unnamed_addr // CHECK: call void @_ZN2X6C2Ev({{.*}}) [[NUW]] // CHECK-NEXT: ret void - // CHECK: define linkonce_odr void @_ZN2X9C2Ev(%struct.X9* %this) unnamed_addr + // CHECK: define linkonce_odr void @_ZN2X9C2Ev(%struct.X9* frozen %this) unnamed_addr // CHECK: call void @_ZN2X6C2Ev({{.*}}) [[NUW]] // FIXME: and here: // CHECK-NEXT: bitcast diff --git a/clang/test/CXX/expr/expr.prim/expr.prim.lambda/blocks-irgen.mm b/clang/test/CXX/expr/expr.prim/expr.prim.lambda/blocks-irgen.mm --- a/clang/test/CXX/expr/expr.prim/expr.prim.lambda/blocks-irgen.mm +++ b/clang/test/CXX/expr/expr.prim/expr.prim.lambda/blocks-irgen.mm @@ -1,7 +1,7 @@ // RUN: %clang_cc1 -std=c++11 -fblocks -emit-llvm -o - -triple x86_64-apple-darwin11.3 %s | FileCheck %s namespace PR12746 { - // CHECK: define zeroext i1 @_ZN7PR127462f1EPi + // CHECK: define frozen zeroext i1 @_ZN7PR127462f1EPi bool f1(int *x) { // CHECK: store i8* bitcast (i1 (i8*)* @___ZN7PR127462f1EPi_block_invoke to i8*) bool (^outer)() = ^ { @@ -13,8 +13,8 @@ return outer(); } - // CHECK: define internal zeroext i1 @___ZN7PR127462f1EPi_block_invoke - // CHECK: call zeroext i1 @"_ZZZN7PR127462f1EPiEUb_ENK3$_0clEv" + // CHECK: define internal frozen zeroext i1 @___ZN7PR127462f1EPi_block_invoke + // CHECK: call frozen zeroext i1 @"_ZZZN7PR127462f1EPiEUb_ENK3$_0clEv" bool f2(int *x) { auto outer = [&]() -> bool { diff --git a/clang/test/CXX/modules-ts/codegen-basics.cppm b/clang/test/CXX/modules-ts/codegen-basics.cppm --- a/clang/test/CXX/modules-ts/codegen-basics.cppm +++ b/clang/test/CXX/modules-ts/codegen-basics.cppm @@ -4,7 +4,7 @@ export module FooBar; export { - // CHECK-DAG: define i32 @_Z1fv( + // CHECK-DAG: define frozen i32 @_Z1fv( int f() { return 0; } } diff --git a/clang/test/CXX/special/class.copy/p3.cpp b/clang/test/CXX/special/class.copy/p3.cpp --- a/clang/test/CXX/special/class.copy/p3.cpp +++ b/clang/test/CXX/special/class.copy/p3.cpp @@ -13,7 +13,7 @@ struct Y : X { }; struct Z : X { }; -// CHECK: define i32 @main() +// CHECK: define frozen i32 @main() int main() { // CHECK: call void @_ZN1YC1Ev // CHECK: call void @_ZN1XIiEC1ERKS0_ diff --git a/clang/test/CodeGen/2004-02-13-Memset.c b/clang/test/CodeGen/2004-02-13-Memset.c --- a/clang/test/CodeGen/2004-02-13-Memset.c +++ b/clang/test/CodeGen/2004-02-13-Memset.c @@ -5,7 +5,7 @@ void bzero(void*, size_t); void test(int* X, char *Y) { - // CHECK: call i8* llvm.memset + // CHECK: call frozen i8* llvm.memset memset(X, 4, 1000); // CHECK: call void bzero bzero(Y, 100); diff --git a/clang/test/CodeGen/2004-06-17-UnorderedCompares.c b/clang/test/CodeGen/2004-06-17-UnorderedCompares.c --- a/clang/test/CodeGen/2004-06-17-UnorderedCompares.c +++ b/clang/test/CodeGen/2004-06-17-UnorderedCompares.c @@ -1,6 +1,6 @@ // RUN: %clang_cc1 -std=c99 %s -emit-llvm -o - | FileCheck %s // CHECK: @Test -// CHECK-NOT: call{{ }} +// CHECK-NOT: call frozen{{ }} _Bool A, B, C, D, E, F; void TestF(float X, float Y) { diff --git a/clang/test/CodeGen/2006-05-19-SingleEltReturn.c b/clang/test/CodeGen/2006-05-19-SingleEltReturn.c --- a/clang/test/CodeGen/2006-05-19-SingleEltReturn.c +++ b/clang/test/CodeGen/2006-05-19-SingleEltReturn.c @@ -23,7 +23,7 @@ } -// X86_32: define void @foo(%struct.Y* %P) +// X86_32: define void @foo(%struct.Y* frozen %P) // X86_32: call void @bar(%struct.Y* sret align 4 %{{[^),]*}}) // X86_32: define void @bar(%struct.Y* noalias sret align 4 %{{[^,)]*}}) diff --git a/clang/test/CodeGen/2007-02-25-C-DotDotDot.c b/clang/test/CodeGen/2007-02-25-C-DotDotDot.c --- a/clang/test/CodeGen/2007-02-25-C-DotDotDot.c +++ b/clang/test/CodeGen/2007-02-25-C-DotDotDot.c @@ -6,5 +6,5 @@ // call float (...) bitcast (float ()* @foo to float (...)*)( ) static float foo() { return 0.0; } -// CHECK: call float @foo +// CHECK: call frozen float @foo float bar() { return foo()*10.0;} diff --git a/clang/test/CodeGen/2007-06-18-SextAttrAggregate.c b/clang/test/CodeGen/2007-06-18-SextAttrAggregate.c --- a/clang/test/CodeGen/2007-06-18-SextAttrAggregate.c +++ b/clang/test/CodeGen/2007-06-18-SextAttrAggregate.c @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 %s -o - -emit-llvm | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args %s -o - -emit-llvm | FileCheck %s // XFAIL: aarch64, arm64, x86_64-pc-windows-msvc, x86_64-w64-windows-gnu, x86_64-pc-windows-gnu // PR1513 diff --git a/clang/test/CodeGen/2008-03-05-syncPtr.c b/clang/test/CodeGen/2008-03-05-syncPtr.c --- a/clang/test/CodeGen/2008-03-05-syncPtr.c +++ b/clang/test/CodeGen/2008-03-05-syncPtr.c @@ -3,38 +3,38 @@ int* foo(int** a, int* b, int* c) { return __sync_val_compare_and_swap (a, b, c); } -// CHECK-LABEL: define i32* @foo +// CHECK-LABEL: define frozen i32* @foo // CHECK: cmpxchg int foo2(int** a, int* b, int* c) { return __sync_bool_compare_and_swap (a, b, c); } -// CHECK-LABEL: define i32 @foo2 +// CHECK-LABEL: define frozen i32 @foo2 // CHECK: cmpxchg int* foo3(int** a, int b) { return __sync_fetch_and_add (a, b); } -// CHECK-LABEL: define i32* @foo3 +// CHECK-LABEL: define frozen i32* @foo3 // CHECK: atomicrmw add int* foo4(int** a, int b) { return __sync_fetch_and_sub (a, b); } -// CHECK-LABEL: define i32* @foo4 +// CHECK-LABEL: define frozen i32* @foo4 // CHECK: atomicrmw sub int* foo5(int** a, int* b) { return __sync_lock_test_and_set (a, b); } -// CHECK-LABEL: define i32* @foo5 +// CHECK-LABEL: define frozen i32* @foo5 // CHECK: atomicrmw xchg int* foo6(int** a, int*** b) { return __sync_lock_test_and_set (a, b); } -// CHECK-LABEL: define i32* @foo6 +// CHECK-LABEL: define frozen i32* @foo6 // CHECK: atomicrmw xchg diff --git a/clang/test/CodeGen/2008-07-29-override-alias-decl.c b/clang/test/CodeGen/2008-07-29-override-alias-decl.c --- a/clang/test/CodeGen/2008-07-29-override-alias-decl.c +++ b/clang/test/CodeGen/2008-07-29-override-alias-decl.c @@ -14,6 +14,6 @@ return f(); } -// CHECK: [[call:%.*]] = call i32 (...) @f() +// CHECK: [[call:%.*]] = call frozen i32 (...) @f() // CHECK: ret i32 [[call]] diff --git a/clang/test/CodeGen/2008-07-30-implicit-initialization.c b/clang/test/CodeGen/2008-07-30-implicit-initialization.c --- a/clang/test/CodeGen/2008-07-30-implicit-initialization.c +++ b/clang/test/CodeGen/2008-07-30-implicit-initialization.c @@ -1,9 +1,9 @@ // RUN: %clang_cc1 -triple i386-unknown-unknown -O2 -emit-llvm -o - %s | FileCheck %s -// CHECK-LABEL: define i32 @f0() +// CHECK-LABEL: define frozen i32 @f0() // CHECK: ret i32 0 -// CHECK-LABEL: define i32 @f1() +// CHECK-LABEL: define frozen i32 @f1() // CHECK: ret i32 0 -// CHECK-LABEL: define i32 @f2() +// CHECK-LABEL: define frozen i32 @f2() // CHECK: ret i32 0 // diff --git a/clang/test/CodeGen/2008-07-31-promotion-of-compound-pointer-arithmetic.c b/clang/test/CodeGen/2008-07-31-promotion-of-compound-pointer-arithmetic.c --- a/clang/test/CodeGen/2008-07-31-promotion-of-compound-pointer-arithmetic.c +++ b/clang/test/CodeGen/2008-07-31-promotion-of-compound-pointer-arithmetic.c @@ -1,9 +1,9 @@ // RUN: %clang_cc1 -triple i386-unknown-unknown -O1 -emit-llvm -o - %s | FileCheck %s -// CHECK-LABEL: define i32 @f0 +// CHECK-LABEL: define frozen i32 @f0 // CHECK: ret i32 1 -// CHECK-LABEL: define i32 @f1 +// CHECK-LABEL: define frozen i32 @f1 // CHECK: ret i32 1 -// CHECK-LABEL: define i32 @f2 +// CHECK-LABEL: define frozen i32 @f2 // CHECK: ret i32 1 // diff --git a/clang/test/CodeGen/2009-02-13-zerosize-union-field.c b/clang/test/CodeGen/2009-02-13-zerosize-union-field.c --- a/clang/test/CodeGen/2009-02-13-zerosize-union-field.c +++ b/clang/test/CodeGen/2009-02-13-zerosize-union-field.c @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 %s -triple i686-apple-darwin -emit-llvm -o - | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args %s -triple i686-apple-darwin -emit-llvm -o - | FileCheck %s // Every printf has 'i32 0' for the GEP of the string; no point counting those. typedef unsigned int Foo __attribute__((aligned(32))); typedef union{Foo:0;}a; diff --git a/clang/test/CodeGen/2009-05-04-EnumInreg.c b/clang/test/CodeGen/2009-05-04-EnumInreg.c --- a/clang/test/CodeGen/2009-05-04-EnumInreg.c +++ b/clang/test/CodeGen/2009-05-04-EnumInreg.c @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -emit-llvm -triple i686-apple-darwin -mregparm 3 %s -o - | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args -emit-llvm -triple i686-apple-darwin -mregparm 3 %s -o - | FileCheck %s // PR3967 enum kobject_action { diff --git a/clang/test/CodeGen/2009-09-24-SqrtErrno.c b/clang/test/CodeGen/2009-09-24-SqrtErrno.c --- a/clang/test/CodeGen/2009-09-24-SqrtErrno.c +++ b/clang/test/CodeGen/2009-09-24-SqrtErrno.c @@ -6,7 +6,7 @@ float foo(float X) { // CHECK: foo // CHECK-NOT: readonly -// CHECK: call float @sqrtf +// CHECK: call frozen float @sqrtf // Check that this is not marked readonly when errno is used. return sqrtf(X); } diff --git a/clang/test/CodeGen/3dnow-builtins.c b/clang/test/CodeGen/3dnow-builtins.c --- a/clang/test/CodeGen/3dnow-builtins.c +++ b/clang/test/CodeGen/3dnow-builtins.c @@ -5,176 +5,176 @@ #include __m64 test_m_pavgusb(__m64 m1, __m64 m2) { - // PS4-LABEL: define i64 @test_m_pavgusb - // GCC-LABEL: define double @test_m_pavgusb + // PS4-LABEL: define frozen i64 @test_m_pavgusb + // GCC-LABEL: define frozen double @test_m_pavgusb // CHECK: @llvm.x86.3dnow.pavgusb return _m_pavgusb(m1, m2); } __m64 test_m_pf2id(__m64 m) { - // PS4-LABEL: define i64 @test_m_pf2id - // GCC-LABEL: define double @test_m_pf2id + // PS4-LABEL: define frozen i64 @test_m_pf2id + // GCC-LABEL: define frozen double @test_m_pf2id // CHECK: @llvm.x86.3dnow.pf2id return _m_pf2id(m); } __m64 test_m_pfacc(__m64 m1, __m64 m2) { - // PS4-LABEL: define i64 @test_m_pfacc - // GCC-LABEL: define double @test_m_pfacc + // PS4-LABEL: define frozen i64 @test_m_pfacc + // GCC-LABEL: define frozen double @test_m_pfacc // CHECK: @llvm.x86.3dnow.pfacc return _m_pfacc(m1, m2); } __m64 test_m_pfadd(__m64 m1, __m64 m2) { - // PS4-LABEL: define i64 @test_m_pfadd - // GCC-LABEL: define double @test_m_pfadd + // PS4-LABEL: define frozen i64 @test_m_pfadd + // GCC-LABEL: define frozen double @test_m_pfadd // CHECK: @llvm.x86.3dnow.pfadd return _m_pfadd(m1, m2); } __m64 test_m_pfcmpeq(__m64 m1, __m64 m2) { - // PS4-LABEL: define i64 @test_m_pfcmpeq - // GCC-LABEL: define double @test_m_pfcmpeq + // PS4-LABEL: define frozen i64 @test_m_pfcmpeq + // GCC-LABEL: define frozen double @test_m_pfcmpeq // CHECK: @llvm.x86.3dnow.pfcmpeq return _m_pfcmpeq(m1, m2); } __m64 test_m_pfcmpge(__m64 m1, __m64 m2) { - // PS4-LABEL: define i64 @test_m_pfcmpge - // GCC-LABEL: define double @test_m_pfcmpge + // PS4-LABEL: define frozen i64 @test_m_pfcmpge + // GCC-LABEL: define frozen double @test_m_pfcmpge // CHECK: @llvm.x86.3dnow.pfcmpge return _m_pfcmpge(m1, m2); } __m64 test_m_pfcmpgt(__m64 m1, __m64 m2) { - // PS4-LABEL: define i64 @test_m_pfcmpgt - // GCC-LABEL: define double @test_m_pfcmpgt + // PS4-LABEL: define frozen i64 @test_m_pfcmpgt + // GCC-LABEL: define frozen double @test_m_pfcmpgt // CHECK: @llvm.x86.3dnow.pfcmpgt return _m_pfcmpgt(m1, m2); } __m64 test_m_pfmax(__m64 m1, __m64 m2) { - // PS4-LABEL: define i64 @test_m_pfmax - // GCC-LABEL: define double @test_m_pfmax + // PS4-LABEL: define frozen i64 @test_m_pfmax + // GCC-LABEL: define frozen double @test_m_pfmax // CHECK: @llvm.x86.3dnow.pfmax return _m_pfmax(m1, m2); } __m64 test_m_pfmin(__m64 m1, __m64 m2) { - // PS4-LABEL: define i64 @test_m_pfmin - // GCC-LABEL: define double @test_m_pfmin + // PS4-LABEL: define frozen i64 @test_m_pfmin + // GCC-LABEL: define frozen double @test_m_pfmin // CHECK: @llvm.x86.3dnow.pfmin return _m_pfmin(m1, m2); } __m64 test_m_pfmul(__m64 m1, __m64 m2) { - // PS4-LABEL: define i64 @test_m_pfmul - // GCC-LABEL: define double @test_m_pfmul + // PS4-LABEL: define frozen i64 @test_m_pfmul + // GCC-LABEL: define frozen double @test_m_pfmul // CHECK: @llvm.x86.3dnow.pfmul return _m_pfmul(m1, m2); } __m64 test_m_pfrcp(__m64 m) { - // PS4-LABEL: define i64 @test_m_pfrcp - // GCC-LABEL: define double @test_m_pfrcp + // PS4-LABEL: define frozen i64 @test_m_pfrcp + // GCC-LABEL: define frozen double @test_m_pfrcp // CHECK: @llvm.x86.3dnow.pfrcp return _m_pfrcp(m); } __m64 test_m_pfrcpit1(__m64 m1, __m64 m2) { - // PS4-LABEL: define i64 @test_m_pfrcpit1 - // GCC-LABEL: define double @test_m_pfrcpit1 + // PS4-LABEL: define frozen i64 @test_m_pfrcpit1 + // GCC-LABEL: define frozen double @test_m_pfrcpit1 // CHECK: @llvm.x86.3dnow.pfrcpit1 return _m_pfrcpit1(m1, m2); } __m64 test_m_pfrcpit2(__m64 m1, __m64 m2) { - // PS4-LABEL: define i64 @test_m_pfrcpit2 - // GCC-LABEL: define double @test_m_pfrcpit2 + // PS4-LABEL: define frozen i64 @test_m_pfrcpit2 + // GCC-LABEL: define frozen double @test_m_pfrcpit2 // CHECK: @llvm.x86.3dnow.pfrcpit2 return _m_pfrcpit2(m1, m2); } __m64 test_m_pfrsqrt(__m64 m) { - // PS4-LABEL: define i64 @test_m_pfrsqrt - // GCC-LABEL: define double @test_m_pfrsqrt + // PS4-LABEL: define frozen i64 @test_m_pfrsqrt + // GCC-LABEL: define frozen double @test_m_pfrsqrt // CHECK: @llvm.x86.3dnow.pfrsqrt return _m_pfrsqrt(m); } __m64 test_m_pfrsqrtit1(__m64 m1, __m64 m2) { - // PS4-LABEL: define i64 @test_m_pfrsqrtit1 - // GCC-LABEL: define double @test_m_pfrsqrtit1 + // PS4-LABEL: define frozen i64 @test_m_pfrsqrtit1 + // GCC-LABEL: define frozen double @test_m_pfrsqrtit1 // CHECK: @llvm.x86.3dnow.pfrsqit1 return _m_pfrsqrtit1(m1, m2); } __m64 test_m_pfsub(__m64 m1, __m64 m2) { - // PS4-LABEL: define i64 @test_m_pfsub - // GCC-LABEL: define double @test_m_pfsub + // PS4-LABEL: define frozen i64 @test_m_pfsub + // GCC-LABEL: define frozen double @test_m_pfsub // CHECK: @llvm.x86.3dnow.pfsub return _m_pfsub(m1, m2); } __m64 test_m_pfsubr(__m64 m1, __m64 m2) { - // PS4-LABEL: define i64 @test_m_pfsubr - // GCC-LABEL: define double @test_m_pfsubr + // PS4-LABEL: define frozen i64 @test_m_pfsubr + // GCC-LABEL: define frozen double @test_m_pfsubr // CHECK: @llvm.x86.3dnow.pfsubr return _m_pfsubr(m1, m2); } __m64 test_m_pi2fd(__m64 m) { - // PS4-LABEL: define i64 @test_m_pi2fd - // GCC-LABEL: define double @test_m_pi2fd + // PS4-LABEL: define frozen i64 @test_m_pi2fd + // GCC-LABEL: define frozen double @test_m_pi2fd // CHECK: @llvm.x86.3dnow.pi2fd return _m_pi2fd(m); } __m64 test_m_pmulhrw(__m64 m1, __m64 m2) { - // PS4-LABEL: define i64 @test_m_pmulhrw - // GCC-LABEL: define double @test_m_pmulhrw + // PS4-LABEL: define frozen i64 @test_m_pmulhrw + // GCC-LABEL: define frozen double @test_m_pmulhrw // CHECK: @llvm.x86.3dnow.pmulhrw return _m_pmulhrw(m1, m2); } __m64 test_m_pf2iw(__m64 m) { - // PS4-LABEL: define i64 @test_m_pf2iw - // GCC-LABEL: define double @test_m_pf2iw + // PS4-LABEL: define frozen i64 @test_m_pf2iw + // GCC-LABEL: define frozen double @test_m_pf2iw // CHECK: @llvm.x86.3dnowa.pf2iw return _m_pf2iw(m); } __m64 test_m_pfnacc(__m64 m1, __m64 m2) { - // PS4-LABEL: define i64 @test_m_pfnacc - // GCC-LABEL: define double @test_m_pfnacc + // PS4-LABEL: define frozen i64 @test_m_pfnacc + // GCC-LABEL: define frozen double @test_m_pfnacc // CHECK: @llvm.x86.3dnowa.pfnacc return _m_pfnacc(m1, m2); } __m64 test_m_pfpnacc(__m64 m1, __m64 m2) { - // PS4-LABEL: define i64 @test_m_pfpnacc - // GCC-LABEL: define double @test_m_pfpnacc + // PS4-LABEL: define frozen i64 @test_m_pfpnacc + // GCC-LABEL: define frozen double @test_m_pfpnacc // CHECK: @llvm.x86.3dnowa.pfpnacc return _m_pfpnacc(m1, m2); } __m64 test_m_pi2fw(__m64 m) { - // PS4-LABEL: define i64 @test_m_pi2fw - // GCC-LABEL: define double @test_m_pi2fw + // PS4-LABEL: define frozen i64 @test_m_pi2fw + // GCC-LABEL: define frozen double @test_m_pi2fw // CHECK: @llvm.x86.3dnowa.pi2fw return _m_pi2fw(m); } __m64 test_m_pswapdsf(__m64 m) { - // PS4-LABEL: define i64 @test_m_pswapdsf - // GCC-LABEL: define double @test_m_pswapdsf + // PS4-LABEL: define frozen i64 @test_m_pswapdsf + // GCC-LABEL: define frozen double @test_m_pswapdsf // CHECK: @llvm.x86.3dnowa.pswapd return _m_pswapdsf(m); } __m64 test_m_pswapdsi(__m64 m) { - // PS4-LABEL: define i64 @test_m_pswapdsi - // GCC-LABEL: define double @test_m_pswapdsi + // PS4-LABEL: define frozen i64 @test_m_pswapdsi + // GCC-LABEL: define frozen double @test_m_pswapdsi // CHECK: @llvm.x86.3dnowa.pswapd return _m_pswapdsi(m); } diff --git a/clang/test/CodeGen/64bit-swiftcall.c b/clang/test/CodeGen/64bit-swiftcall.c --- a/clang/test/CodeGen/64bit-swiftcall.c +++ b/clang/test/CodeGen/64bit-swiftcall.c @@ -1,7 +1,7 @@ -// RUN: %clang_cc1 -triple x86_64-apple-darwin10 -target-cpu core2 -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple x86_64-apple-darwin10 -target-cpu core2 -emit-llvm -o - %s | FileCheck %s --check-prefix=X86-64 -// RUN: %clang_cc1 -triple arm64-apple-ios9 -target-cpu cyclone -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple arm64-apple-ios9 -target-cpu cyclone -emit-llvm -o - %s | FileCheck %s --check-prefix=ARM64 +// RUN: %clang_cc1 -disable-frozen-args -triple x86_64-apple-darwin10 -target-cpu core2 -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args -triple x86_64-apple-darwin10 -target-cpu core2 -emit-llvm -o - %s | FileCheck %s --check-prefix=X86-64 +// RUN: %clang_cc1 -disable-frozen-args -triple arm64-apple-ios9 -target-cpu cyclone -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args -triple arm64-apple-ios9 -target-cpu cyclone -emit-llvm -o - %s | FileCheck %s --check-prefix=ARM64 // REQUIRES: aarch64-registered-target,x86-registered-target @@ -398,7 +398,7 @@ // CHECK-LABEL: define void @test_int8() // CHECK: [[TMP1:%.*]] = alloca [[REC]], align // CHECK: [[TMP2:%.*]] = alloca [[REC]], align -// CHECK: [[CALL:%.*]] = call [[SWIFTCC]] [[UAGG]] @return_int8() +// CHECK: [[CALL:%.*]] = call [[SWIFTCC]] frozen [[UAGG]] @return_int8() // CHECK: [[CAST_TMP:%.*]] = bitcast [[REC]]* [[TMP1]] to [[AGG]]* // CHECK: [[T0:%.*]] = getelementptr inbounds [[AGG]], [[AGG]]* [[CAST_TMP]], i32 0, i32 0 // CHECK: [[T1:%.*]] = extractvalue [[UAGG]] [[CALL]], 0 @@ -442,7 +442,7 @@ // CHECK-LABEL: define void @test_int5() // CHECK: [[TMP1:%.*]] = alloca [[REC]], align // CHECK: [[TMP2:%.*]] = alloca [[REC]], align -// CHECK: [[CALL:%.*]] = call [[SWIFTCC]] [[UAGG]] @return_int5() +// CHECK: [[CALL:%.*]] = call [[SWIFTCC]] frozen [[UAGG]] @return_int5() // CHECK: [[CAST_TMP:%.*]] = bitcast [[REC]]* [[TMP1]] to [[AGG]]* // CHECK: [[T0:%.*]] = getelementptr inbounds [[AGG]], [[AGG]]* [[CAST_TMP]], i32 0, i32 0 // CHECK: [[T1:%.*]] = extractvalue [[UAGG]] [[CALL]], 0 diff --git a/clang/test/CodeGen/PR3589-freestanding-libcalls.c b/clang/test/CodeGen/PR3589-freestanding-libcalls.c --- a/clang/test/CodeGen/PR3589-freestanding-libcalls.c +++ b/clang/test/CodeGen/PR3589-freestanding-libcalls.c @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -triple i386-unknown-unknown -emit-llvm %s -o - | grep 'declare i32 @printf' | count 1 +// RUN: %clang_cc1 -triple i386-unknown-unknown -emit-llvm %s -o - | grep 'declare frozen i32 @printf' | count 1 // RUN: %clang_cc1 -triple i386-unknown-unknown -O2 -emit-llvm %s -o - | grep 'declare i32 @puts' | count 1 // RUN: %clang_cc1 -triple i386-unknown-unknown -ffreestanding -O2 -emit-llvm %s -o - | not grep 'declare i32 @puts' diff --git a/clang/test/CodeGen/_Bool-conversion.c b/clang/test/CodeGen/_Bool-conversion.c --- a/clang/test/CodeGen/_Bool-conversion.c +++ b/clang/test/CodeGen/_Bool-conversion.c @@ -1,6 +1,6 @@ // RUN: %clang_cc1 -triple i386 -emit-llvm -O2 -o - %s | FileCheck %s -// CHECK-LABEL: define i32 @f0() +// CHECK-LABEL: define frozen i32 @f0() // CHECK: ret i32 1 // CHECK: } diff --git a/clang/test/CodeGen/aapcs-align.cpp b/clang/test/CodeGen/aapcs-align.cpp --- a/clang/test/CodeGen/aapcs-align.cpp +++ b/clang/test/CodeGen/aapcs-align.cpp @@ -1,5 +1,5 @@ // REQUIRES: arm-registered-target -// RUN: %clang_cc1 -triple arm-none-none-eabi \ +// RUN: %clang_cc1 -disable-frozen-args -triple arm-none-none-eabi \ // RUN: -O2 \ // RUN: -target-cpu cortex-a8 \ // RUN: -emit-llvm -o - %s | FileCheck %s diff --git a/clang/test/CodeGen/aapcs64-align.cpp b/clang/test/CodeGen/aapcs64-align.cpp --- a/clang/test/CodeGen/aapcs64-align.cpp +++ b/clang/test/CodeGen/aapcs64-align.cpp @@ -1,5 +1,5 @@ // REQUIRES: arm-registered-target -// RUN: %clang_cc1 -triple aarch64-none-none-eabi \ +// RUN: %clang_cc1 -disable-frozen-args -triple aarch64-none-none-eabi \ // RUN: -O2 \ // RUN: -emit-llvm -o - %s | FileCheck %s diff --git a/clang/test/CodeGen/aarch64-args.cpp b/clang/test/CodeGen/aarch64-args.cpp --- a/clang/test/CodeGen/aarch64-args.cpp +++ b/clang/test/CodeGen/aarch64-args.cpp @@ -15,9 +15,9 @@ struct Empty {}; -// CHECK: define i32 @empty_arg(i32 %a) -// CHECK-GNU-C: define i32 @empty_arg(i32 %a) -// CHECK-GNU-CXX: define i32 @empty_arg(i8 %e.coerce, i32 %a) +// CHECK: define frozen i32 @empty_arg(i32 frozen %a) +// CHECK-GNU-C: define frozen i32 @empty_arg(i32 frozen %a) +// CHECK-GNU-CXX: define frozen i32 @empty_arg(i8 %e.coerce, i32 frozen %a) EXTERNC int empty_arg(struct Empty e, int a) { return a; } @@ -38,9 +38,9 @@ int arr[0]; }; -// CHECK: define i32 @super_empty_arg(i32 %a) -// CHECK-GNU-C: define i32 @super_empty_arg(i32 %a) -// CHECK-GNU-CXX: define i32 @super_empty_arg(i32 %a) +// CHECK: define frozen i32 @super_empty_arg(i32 frozen %a) +// CHECK-GNU-C: define frozen i32 @super_empty_arg(i32 frozen %a) +// CHECK-GNU-CXX: define frozen i32 @super_empty_arg(i32 frozen %a) EXTERNC int super_empty_arg(struct SuperEmpty e, int a) { return a; } @@ -51,9 +51,9 @@ struct SuperEmpty e; }; -// CHECK: define i32 @sort_of_empty_arg(i32 %a) -// CHECK-GNU-C: define i32 @sort_of_empty_arg(i32 %a) -// CHECK-GNU-CXX: define i32 @sort_of_empty_arg(i8 %e.coerce, i32 %a) +// CHECK: define frozen i32 @sort_of_empty_arg(i32 frozen %a) +// CHECK-GNU-C: define frozen i32 @sort_of_empty_arg(i32 frozen %a) +// CHECK-GNU-CXX: define frozen i32 @sort_of_empty_arg(i8 %e.coerce, i32 frozen %a) EXTERNC int sort_of_empty_arg(struct Empty e, int a) { return a; } diff --git a/clang/test/CodeGen/aarch64-byval-temp.c b/clang/test/CodeGen/aarch64-byval-temp.c --- a/clang/test/CodeGen/aarch64-byval-temp.c +++ b/clang/test/CodeGen/aarch64-byval-temp.c @@ -32,12 +32,12 @@ // CHECK-O0-NEXT: %[[dst:[0-9A-Za-z-]+]] = bitcast %struct.large* %[[l]] to i8* // CHECK-O0-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 %[[src]], i8* align 8 %[[dst]], i64 64, i1 false) // Finally, call using a pointer to the temporary stack space. -// CHECK-O0-NEXT: call void @pass_large(%struct.large* %[[byvaltemp]]) +// CHECK-O0-NEXT: call void @pass_large(%struct.large* frozen %[[byvaltemp]]) // Now, do the same for the second call, using the second temporary alloca. // CHECK-O0-NEXT: %[[src:[0-9A-Za-z-]+]] = bitcast %struct.large* %[[byvaltemp1]] to i8* // CHECK-O0-NEXT: %[[dst:[0-9A-Za-z-]+]] = bitcast %struct.large* %[[l]] to i8* // CHECK-O0-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 %[[src]], i8* align 8 %[[dst]], i64 64, i1 false) -// CHECK-O0-NEXT: call void @pass_large(%struct.large* %[[byvaltemp1]]) +// CHECK-O0-NEXT: call void @pass_large(%struct.large* frozen %[[byvaltemp1]]) // CHECK-O0-NEXT: ret void // // At O3, we should have lifetime markers to help the optimizer re-use the temporary allocas. @@ -67,7 +67,7 @@ // CHECK-O3-NEXT: %[[dst:[0-9A-Za-z-]+]] = bitcast %struct.large* %[[l]] to i8* // CHECK-O3-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 %[[src]], i8* align 8 %[[dst]], i64 64, i1 false) // Finally, call using a pointer to the temporary stack space. -// CHECK-O3-NEXT: call void @pass_large(%struct.large* %[[byvaltemp]]) +// CHECK-O3-NEXT: call void @pass_large(%struct.large* frozen %[[byvaltemp]]) // // The lifetime of the temporary used to pass a pointer to the struct ends here. // CHECK-O3-NEXT: %[[bitcastbyvaltemp:[0-9A-Za-z-]+]] = bitcast %struct.large* %[[byvaltemp]] to i8* @@ -79,7 +79,7 @@ // CHECK-O3-NEXT: %[[src:[0-9A-Za-z-]+]] = bitcast %struct.large* %[[byvaltemp1]] to i8* // CHECK-O3-NEXT: %[[dst:[0-9A-Za-z-]+]] = bitcast %struct.large* %[[l]] to i8* // CHECK-O3-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 %[[src]], i8* align 8 %[[dst]], i64 64, i1 false) -// CHECK-O3-NEXT: call void @pass_large(%struct.large* %[[byvaltemp1]]) +// CHECK-O3-NEXT: call void @pass_large(%struct.large* frozen %[[byvaltemp1]]) // CHECK-O3-NEXT: %[[bitcastbyvaltemp:[0-9A-Za-z-]+]] = bitcast %struct.large* %[[byvaltemp1]] to i8* // CHECK-O3-NEXT: call void @llvm.lifetime.end.p0i8(i64 64, i8* %[[bitcastbyvaltemp]]) // diff --git a/clang/test/CodeGen/aarch64-neon-3v.c b/clang/test/CodeGen/aarch64-neon-3v.c --- a/clang/test/CodeGen/aarch64-neon-3v.c +++ b/clang/test/CodeGen/aarch64-neon-3v.c @@ -4,343 +4,343 @@ #include -// CHECK-LABEL: define <8 x i8> @test_vand_s8(<8 x i8> %a, <8 x i8> %b) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vand_s8(<8 x i8> frozen %a, <8 x i8> frozen %b) #0 { // CHECK: [[AND_I:%.*]] = and <8 x i8> %a, %b // CHECK: ret <8 x i8> [[AND_I]] int8x8_t test_vand_s8(int8x8_t a, int8x8_t b) { return vand_s8(a, b); } -// CHECK-LABEL: define <16 x i8> @test_vandq_s8(<16 x i8> %a, <16 x i8> %b) #1 { +// CHECK-LABEL: define frozen <16 x i8> @test_vandq_s8(<16 x i8> frozen %a, <16 x i8> frozen %b) #1 { // CHECK: [[AND_I:%.*]] = and <16 x i8> %a, %b // CHECK: ret <16 x i8> [[AND_I]] int8x16_t test_vandq_s8(int8x16_t a, int8x16_t b) { return vandq_s8(a, b); } -// CHECK-LABEL: define <4 x i16> @test_vand_s16(<4 x i16> %a, <4 x i16> %b) #0 { +// CHECK-LABEL: define frozen <4 x i16> @test_vand_s16(<4 x i16> frozen %a, <4 x i16> frozen %b) #0 { // CHECK: [[AND_I:%.*]] = and <4 x i16> %a, %b // CHECK: ret <4 x i16> [[AND_I]] int16x4_t test_vand_s16(int16x4_t a, int16x4_t b) { return vand_s16(a, b); } -// CHECK-LABEL: define <8 x i16> @test_vandq_s16(<8 x i16> %a, <8 x i16> %b) #1 { +// CHECK-LABEL: define frozen <8 x i16> @test_vandq_s16(<8 x i16> frozen %a, <8 x i16> frozen %b) #1 { // CHECK: [[AND_I:%.*]] = and <8 x i16> %a, %b // CHECK: ret <8 x i16> [[AND_I]] int16x8_t test_vandq_s16(int16x8_t a, int16x8_t b) { return vandq_s16(a, b); } -// CHECK-LABEL: define <2 x i32> @test_vand_s32(<2 x i32> %a, <2 x i32> %b) #0 { +// CHECK-LABEL: define frozen <2 x i32> @test_vand_s32(<2 x i32> frozen %a, <2 x i32> frozen %b) #0 { // CHECK: [[AND_I:%.*]] = and <2 x i32> %a, %b // CHECK: ret <2 x i32> [[AND_I]] int32x2_t test_vand_s32(int32x2_t a, int32x2_t b) { return vand_s32(a, b); } -// CHECK-LABEL: define <4 x i32> @test_vandq_s32(<4 x i32> %a, <4 x i32> %b) #1 { +// CHECK-LABEL: define frozen <4 x i32> @test_vandq_s32(<4 x i32> frozen %a, <4 x i32> frozen %b) #1 { // CHECK: [[AND_I:%.*]] = and <4 x i32> %a, %b // CHECK: ret <4 x i32> [[AND_I]] int32x4_t test_vandq_s32(int32x4_t a, int32x4_t b) { return vandq_s32(a, b); } -// CHECK-LABEL: define <1 x i64> @test_vand_s64(<1 x i64> %a, <1 x i64> %b) #0 { +// CHECK-LABEL: define frozen <1 x i64> @test_vand_s64(<1 x i64> frozen %a, <1 x i64> frozen %b) #0 { // CHECK: [[AND_I:%.*]] = and <1 x i64> %a, %b // CHECK: ret <1 x i64> [[AND_I]] int64x1_t test_vand_s64(int64x1_t a, int64x1_t b) { return vand_s64(a, b); } -// CHECK-LABEL: define <2 x i64> @test_vandq_s64(<2 x i64> %a, <2 x i64> %b) #1 { +// CHECK-LABEL: define frozen <2 x i64> @test_vandq_s64(<2 x i64> frozen %a, <2 x i64> frozen %b) #1 { // CHECK: [[AND_I:%.*]] = and <2 x i64> %a, %b // CHECK: ret <2 x i64> [[AND_I]] int64x2_t test_vandq_s64(int64x2_t a, int64x2_t b) { return vandq_s64(a, b); } -// CHECK-LABEL: define <8 x i8> @test_vand_u8(<8 x i8> %a, <8 x i8> %b) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vand_u8(<8 x i8> frozen %a, <8 x i8> frozen %b) #0 { // CHECK: [[AND_I:%.*]] = and <8 x i8> %a, %b // CHECK: ret <8 x i8> [[AND_I]] uint8x8_t test_vand_u8(uint8x8_t a, uint8x8_t b) { return vand_u8(a, b); } -// CHECK-LABEL: define <16 x i8> @test_vandq_u8(<16 x i8> %a, <16 x i8> %b) #1 { +// CHECK-LABEL: define frozen <16 x i8> @test_vandq_u8(<16 x i8> frozen %a, <16 x i8> frozen %b) #1 { // CHECK: [[AND_I:%.*]] = and <16 x i8> %a, %b // CHECK: ret <16 x i8> [[AND_I]] uint8x16_t test_vandq_u8(uint8x16_t a, uint8x16_t b) { return vandq_u8(a, b); } -// CHECK-LABEL: define <4 x i16> @test_vand_u16(<4 x i16> %a, <4 x i16> %b) #0 { +// CHECK-LABEL: define frozen <4 x i16> @test_vand_u16(<4 x i16> frozen %a, <4 x i16> frozen %b) #0 { // CHECK: [[AND_I:%.*]] = and <4 x i16> %a, %b // CHECK: ret <4 x i16> [[AND_I]] uint16x4_t test_vand_u16(uint16x4_t a, uint16x4_t b) { return vand_u16(a, b); } -// CHECK-LABEL: define <8 x i16> @test_vandq_u16(<8 x i16> %a, <8 x i16> %b) #1 { +// CHECK-LABEL: define frozen <8 x i16> @test_vandq_u16(<8 x i16> frozen %a, <8 x i16> frozen %b) #1 { // CHECK: [[AND_I:%.*]] = and <8 x i16> %a, %b // CHECK: ret <8 x i16> [[AND_I]] uint16x8_t test_vandq_u16(uint16x8_t a, uint16x8_t b) { return vandq_u16(a, b); } -// CHECK-LABEL: define <2 x i32> @test_vand_u32(<2 x i32> %a, <2 x i32> %b) #0 { +// CHECK-LABEL: define frozen <2 x i32> @test_vand_u32(<2 x i32> frozen %a, <2 x i32> frozen %b) #0 { // CHECK: [[AND_I:%.*]] = and <2 x i32> %a, %b // CHECK: ret <2 x i32> [[AND_I]] uint32x2_t test_vand_u32(uint32x2_t a, uint32x2_t b) { return vand_u32(a, b); } -// CHECK-LABEL: define <4 x i32> @test_vandq_u32(<4 x i32> %a, <4 x i32> %b) #1 { +// CHECK-LABEL: define frozen <4 x i32> @test_vandq_u32(<4 x i32> frozen %a, <4 x i32> frozen %b) #1 { // CHECK: [[AND_I:%.*]] = and <4 x i32> %a, %b // CHECK: ret <4 x i32> [[AND_I]] uint32x4_t test_vandq_u32(uint32x4_t a, uint32x4_t b) { return vandq_u32(a, b); } -// CHECK-LABEL: define <1 x i64> @test_vand_u64(<1 x i64> %a, <1 x i64> %b) #0 { +// CHECK-LABEL: define frozen <1 x i64> @test_vand_u64(<1 x i64> frozen %a, <1 x i64> frozen %b) #0 { // CHECK: [[AND_I:%.*]] = and <1 x i64> %a, %b // CHECK: ret <1 x i64> [[AND_I]] uint64x1_t test_vand_u64(uint64x1_t a, uint64x1_t b) { return vand_u64(a, b); } -// CHECK-LABEL: define <2 x i64> @test_vandq_u64(<2 x i64> %a, <2 x i64> %b) #1 { +// CHECK-LABEL: define frozen <2 x i64> @test_vandq_u64(<2 x i64> frozen %a, <2 x i64> frozen %b) #1 { // CHECK: [[AND_I:%.*]] = and <2 x i64> %a, %b // CHECK: ret <2 x i64> [[AND_I]] uint64x2_t test_vandq_u64(uint64x2_t a, uint64x2_t b) { return vandq_u64(a, b); } -// CHECK-LABEL: define <8 x i8> @test_vorr_s8(<8 x i8> %a, <8 x i8> %b) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vorr_s8(<8 x i8> frozen %a, <8 x i8> frozen %b) #0 { // CHECK: [[OR_I:%.*]] = or <8 x i8> %a, %b // CHECK: ret <8 x i8> [[OR_I]] int8x8_t test_vorr_s8(int8x8_t a, int8x8_t b) { return vorr_s8(a, b); } -// CHECK-LABEL: define <16 x i8> @test_vorrq_s8(<16 x i8> %a, <16 x i8> %b) #1 { +// CHECK-LABEL: define frozen <16 x i8> @test_vorrq_s8(<16 x i8> frozen %a, <16 x i8> frozen %b) #1 { // CHECK: [[OR_I:%.*]] = or <16 x i8> %a, %b // CHECK: ret <16 x i8> [[OR_I]] int8x16_t test_vorrq_s8(int8x16_t a, int8x16_t b) { return vorrq_s8(a, b); } -// CHECK-LABEL: define <4 x i16> @test_vorr_s16(<4 x i16> %a, <4 x i16> %b) #0 { +// CHECK-LABEL: define frozen <4 x i16> @test_vorr_s16(<4 x i16> frozen %a, <4 x i16> frozen %b) #0 { // CHECK: [[OR_I:%.*]] = or <4 x i16> %a, %b // CHECK: ret <4 x i16> [[OR_I]] int16x4_t test_vorr_s16(int16x4_t a, int16x4_t b) { return vorr_s16(a, b); } -// CHECK-LABEL: define <8 x i16> @test_vorrq_s16(<8 x i16> %a, <8 x i16> %b) #1 { +// CHECK-LABEL: define frozen <8 x i16> @test_vorrq_s16(<8 x i16> frozen %a, <8 x i16> frozen %b) #1 { // CHECK: [[OR_I:%.*]] = or <8 x i16> %a, %b // CHECK: ret <8 x i16> [[OR_I]] int16x8_t test_vorrq_s16(int16x8_t a, int16x8_t b) { return vorrq_s16(a, b); } -// CHECK-LABEL: define <2 x i32> @test_vorr_s32(<2 x i32> %a, <2 x i32> %b) #0 { +// CHECK-LABEL: define frozen <2 x i32> @test_vorr_s32(<2 x i32> frozen %a, <2 x i32> frozen %b) #0 { // CHECK: [[OR_I:%.*]] = or <2 x i32> %a, %b // CHECK: ret <2 x i32> [[OR_I]] int32x2_t test_vorr_s32(int32x2_t a, int32x2_t b) { return vorr_s32(a, b); } -// CHECK-LABEL: define <4 x i32> @test_vorrq_s32(<4 x i32> %a, <4 x i32> %b) #1 { +// CHECK-LABEL: define frozen <4 x i32> @test_vorrq_s32(<4 x i32> frozen %a, <4 x i32> frozen %b) #1 { // CHECK: [[OR_I:%.*]] = or <4 x i32> %a, %b // CHECK: ret <4 x i32> [[OR_I]] int32x4_t test_vorrq_s32(int32x4_t a, int32x4_t b) { return vorrq_s32(a, b); } -// CHECK-LABEL: define <1 x i64> @test_vorr_s64(<1 x i64> %a, <1 x i64> %b) #0 { +// CHECK-LABEL: define frozen <1 x i64> @test_vorr_s64(<1 x i64> frozen %a, <1 x i64> frozen %b) #0 { // CHECK: [[OR_I:%.*]] = or <1 x i64> %a, %b // CHECK: ret <1 x i64> [[OR_I]] int64x1_t test_vorr_s64(int64x1_t a, int64x1_t b) { return vorr_s64(a, b); } -// CHECK-LABEL: define <2 x i64> @test_vorrq_s64(<2 x i64> %a, <2 x i64> %b) #1 { +// CHECK-LABEL: define frozen <2 x i64> @test_vorrq_s64(<2 x i64> frozen %a, <2 x i64> frozen %b) #1 { // CHECK: [[OR_I:%.*]] = or <2 x i64> %a, %b // CHECK: ret <2 x i64> [[OR_I]] int64x2_t test_vorrq_s64(int64x2_t a, int64x2_t b) { return vorrq_s64(a, b); } -// CHECK-LABEL: define <8 x i8> @test_vorr_u8(<8 x i8> %a, <8 x i8> %b) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vorr_u8(<8 x i8> frozen %a, <8 x i8> frozen %b) #0 { // CHECK: [[OR_I:%.*]] = or <8 x i8> %a, %b // CHECK: ret <8 x i8> [[OR_I]] uint8x8_t test_vorr_u8(uint8x8_t a, uint8x8_t b) { return vorr_u8(a, b); } -// CHECK-LABEL: define <16 x i8> @test_vorrq_u8(<16 x i8> %a, <16 x i8> %b) #1 { +// CHECK-LABEL: define frozen <16 x i8> @test_vorrq_u8(<16 x i8> frozen %a, <16 x i8> frozen %b) #1 { // CHECK: [[OR_I:%.*]] = or <16 x i8> %a, %b // CHECK: ret <16 x i8> [[OR_I]] uint8x16_t test_vorrq_u8(uint8x16_t a, uint8x16_t b) { return vorrq_u8(a, b); } -// CHECK-LABEL: define <4 x i16> @test_vorr_u16(<4 x i16> %a, <4 x i16> %b) #0 { +// CHECK-LABEL: define frozen <4 x i16> @test_vorr_u16(<4 x i16> frozen %a, <4 x i16> frozen %b) #0 { // CHECK: [[OR_I:%.*]] = or <4 x i16> %a, %b // CHECK: ret <4 x i16> [[OR_I]] uint16x4_t test_vorr_u16(uint16x4_t a, uint16x4_t b) { return vorr_u16(a, b); } -// CHECK-LABEL: define <8 x i16> @test_vorrq_u16(<8 x i16> %a, <8 x i16> %b) #1 { +// CHECK-LABEL: define frozen <8 x i16> @test_vorrq_u16(<8 x i16> frozen %a, <8 x i16> frozen %b) #1 { // CHECK: [[OR_I:%.*]] = or <8 x i16> %a, %b // CHECK: ret <8 x i16> [[OR_I]] uint16x8_t test_vorrq_u16(uint16x8_t a, uint16x8_t b) { return vorrq_u16(a, b); } -// CHECK-LABEL: define <2 x i32> @test_vorr_u32(<2 x i32> %a, <2 x i32> %b) #0 { +// CHECK-LABEL: define frozen <2 x i32> @test_vorr_u32(<2 x i32> frozen %a, <2 x i32> frozen %b) #0 { // CHECK: [[OR_I:%.*]] = or <2 x i32> %a, %b // CHECK: ret <2 x i32> [[OR_I]] uint32x2_t test_vorr_u32(uint32x2_t a, uint32x2_t b) { return vorr_u32(a, b); } -// CHECK-LABEL: define <4 x i32> @test_vorrq_u32(<4 x i32> %a, <4 x i32> %b) #1 { +// CHECK-LABEL: define frozen <4 x i32> @test_vorrq_u32(<4 x i32> frozen %a, <4 x i32> frozen %b) #1 { // CHECK: [[OR_I:%.*]] = or <4 x i32> %a, %b // CHECK: ret <4 x i32> [[OR_I]] uint32x4_t test_vorrq_u32(uint32x4_t a, uint32x4_t b) { return vorrq_u32(a, b); } -// CHECK-LABEL: define <1 x i64> @test_vorr_u64(<1 x i64> %a, <1 x i64> %b) #0 { +// CHECK-LABEL: define frozen <1 x i64> @test_vorr_u64(<1 x i64> frozen %a, <1 x i64> frozen %b) #0 { // CHECK: [[OR_I:%.*]] = or <1 x i64> %a, %b // CHECK: ret <1 x i64> [[OR_I]] uint64x1_t test_vorr_u64(uint64x1_t a, uint64x1_t b) { return vorr_u64(a, b); } -// CHECK-LABEL: define <2 x i64> @test_vorrq_u64(<2 x i64> %a, <2 x i64> %b) #1 { +// CHECK-LABEL: define frozen <2 x i64> @test_vorrq_u64(<2 x i64> frozen %a, <2 x i64> frozen %b) #1 { // CHECK: [[OR_I:%.*]] = or <2 x i64> %a, %b // CHECK: ret <2 x i64> [[OR_I]] uint64x2_t test_vorrq_u64(uint64x2_t a, uint64x2_t b) { return vorrq_u64(a, b); } -// CHECK-LABEL: define <8 x i8> @test_veor_s8(<8 x i8> %a, <8 x i8> %b) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_veor_s8(<8 x i8> frozen %a, <8 x i8> frozen %b) #0 { // CHECK: [[XOR_I:%.*]] = xor <8 x i8> %a, %b // CHECK: ret <8 x i8> [[XOR_I]] int8x8_t test_veor_s8(int8x8_t a, int8x8_t b) { return veor_s8(a, b); } -// CHECK-LABEL: define <16 x i8> @test_veorq_s8(<16 x i8> %a, <16 x i8> %b) #1 { +// CHECK-LABEL: define frozen <16 x i8> @test_veorq_s8(<16 x i8> frozen %a, <16 x i8> frozen %b) #1 { // CHECK: [[XOR_I:%.*]] = xor <16 x i8> %a, %b // CHECK: ret <16 x i8> [[XOR_I]] int8x16_t test_veorq_s8(int8x16_t a, int8x16_t b) { return veorq_s8(a, b); } -// CHECK-LABEL: define <4 x i16> @test_veor_s16(<4 x i16> %a, <4 x i16> %b) #0 { +// CHECK-LABEL: define frozen <4 x i16> @test_veor_s16(<4 x i16> frozen %a, <4 x i16> frozen %b) #0 { // CHECK: [[XOR_I:%.*]] = xor <4 x i16> %a, %b // CHECK: ret <4 x i16> [[XOR_I]] int16x4_t test_veor_s16(int16x4_t a, int16x4_t b) { return veor_s16(a, b); } -// CHECK-LABEL: define <8 x i16> @test_veorq_s16(<8 x i16> %a, <8 x i16> %b) #1 { +// CHECK-LABEL: define frozen <8 x i16> @test_veorq_s16(<8 x i16> frozen %a, <8 x i16> frozen %b) #1 { // CHECK: [[XOR_I:%.*]] = xor <8 x i16> %a, %b // CHECK: ret <8 x i16> [[XOR_I]] int16x8_t test_veorq_s16(int16x8_t a, int16x8_t b) { return veorq_s16(a, b); } -// CHECK-LABEL: define <2 x i32> @test_veor_s32(<2 x i32> %a, <2 x i32> %b) #0 { +// CHECK-LABEL: define frozen <2 x i32> @test_veor_s32(<2 x i32> frozen %a, <2 x i32> frozen %b) #0 { // CHECK: [[XOR_I:%.*]] = xor <2 x i32> %a, %b // CHECK: ret <2 x i32> [[XOR_I]] int32x2_t test_veor_s32(int32x2_t a, int32x2_t b) { return veor_s32(a, b); } -// CHECK-LABEL: define <4 x i32> @test_veorq_s32(<4 x i32> %a, <4 x i32> %b) #1 { +// CHECK-LABEL: define frozen <4 x i32> @test_veorq_s32(<4 x i32> frozen %a, <4 x i32> frozen %b) #1 { // CHECK: [[XOR_I:%.*]] = xor <4 x i32> %a, %b // CHECK: ret <4 x i32> [[XOR_I]] int32x4_t test_veorq_s32(int32x4_t a, int32x4_t b) { return veorq_s32(a, b); } -// CHECK-LABEL: define <1 x i64> @test_veor_s64(<1 x i64> %a, <1 x i64> %b) #0 { +// CHECK-LABEL: define frozen <1 x i64> @test_veor_s64(<1 x i64> frozen %a, <1 x i64> frozen %b) #0 { // CHECK: [[XOR_I:%.*]] = xor <1 x i64> %a, %b // CHECK: ret <1 x i64> [[XOR_I]] int64x1_t test_veor_s64(int64x1_t a, int64x1_t b) { return veor_s64(a, b); } -// CHECK-LABEL: define <2 x i64> @test_veorq_s64(<2 x i64> %a, <2 x i64> %b) #1 { +// CHECK-LABEL: define frozen <2 x i64> @test_veorq_s64(<2 x i64> frozen %a, <2 x i64> frozen %b) #1 { // CHECK: [[XOR_I:%.*]] = xor <2 x i64> %a, %b // CHECK: ret <2 x i64> [[XOR_I]] int64x2_t test_veorq_s64(int64x2_t a, int64x2_t b) { return veorq_s64(a, b); } -// CHECK-LABEL: define <8 x i8> @test_veor_u8(<8 x i8> %a, <8 x i8> %b) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_veor_u8(<8 x i8> frozen %a, <8 x i8> frozen %b) #0 { // CHECK: [[XOR_I:%.*]] = xor <8 x i8> %a, %b // CHECK: ret <8 x i8> [[XOR_I]] uint8x8_t test_veor_u8(uint8x8_t a, uint8x8_t b) { return veor_u8(a, b); } -// CHECK-LABEL: define <16 x i8> @test_veorq_u8(<16 x i8> %a, <16 x i8> %b) #1 { +// CHECK-LABEL: define frozen <16 x i8> @test_veorq_u8(<16 x i8> frozen %a, <16 x i8> frozen %b) #1 { // CHECK: [[XOR_I:%.*]] = xor <16 x i8> %a, %b // CHECK: ret <16 x i8> [[XOR_I]] uint8x16_t test_veorq_u8(uint8x16_t a, uint8x16_t b) { return veorq_u8(a, b); } -// CHECK-LABEL: define <4 x i16> @test_veor_u16(<4 x i16> %a, <4 x i16> %b) #0 { +// CHECK-LABEL: define frozen <4 x i16> @test_veor_u16(<4 x i16> frozen %a, <4 x i16> frozen %b) #0 { // CHECK: [[XOR_I:%.*]] = xor <4 x i16> %a, %b // CHECK: ret <4 x i16> [[XOR_I]] uint16x4_t test_veor_u16(uint16x4_t a, uint16x4_t b) { return veor_u16(a, b); } -// CHECK-LABEL: define <8 x i16> @test_veorq_u16(<8 x i16> %a, <8 x i16> %b) #1 { +// CHECK-LABEL: define frozen <8 x i16> @test_veorq_u16(<8 x i16> frozen %a, <8 x i16> frozen %b) #1 { // CHECK: [[XOR_I:%.*]] = xor <8 x i16> %a, %b // CHECK: ret <8 x i16> [[XOR_I]] uint16x8_t test_veorq_u16(uint16x8_t a, uint16x8_t b) { return veorq_u16(a, b); } -// CHECK-LABEL: define <2 x i32> @test_veor_u32(<2 x i32> %a, <2 x i32> %b) #0 { +// CHECK-LABEL: define frozen <2 x i32> @test_veor_u32(<2 x i32> frozen %a, <2 x i32> frozen %b) #0 { // CHECK: [[XOR_I:%.*]] = xor <2 x i32> %a, %b // CHECK: ret <2 x i32> [[XOR_I]] uint32x2_t test_veor_u32(uint32x2_t a, uint32x2_t b) { return veor_u32(a, b); } -// CHECK-LABEL: define <4 x i32> @test_veorq_u32(<4 x i32> %a, <4 x i32> %b) #1 { +// CHECK-LABEL: define frozen <4 x i32> @test_veorq_u32(<4 x i32> frozen %a, <4 x i32> frozen %b) #1 { // CHECK: [[XOR_I:%.*]] = xor <4 x i32> %a, %b // CHECK: ret <4 x i32> [[XOR_I]] uint32x4_t test_veorq_u32(uint32x4_t a, uint32x4_t b) { return veorq_u32(a, b); } -// CHECK-LABEL: define <1 x i64> @test_veor_u64(<1 x i64> %a, <1 x i64> %b) #0 { +// CHECK-LABEL: define frozen <1 x i64> @test_veor_u64(<1 x i64> frozen %a, <1 x i64> frozen %b) #0 { // CHECK: [[XOR_I:%.*]] = xor <1 x i64> %a, %b // CHECK: ret <1 x i64> [[XOR_I]] uint64x1_t test_veor_u64(uint64x1_t a, uint64x1_t b) { return veor_u64(a, b); } -// CHECK-LABEL: define <2 x i64> @test_veorq_u64(<2 x i64> %a, <2 x i64> %b) #1 { +// CHECK-LABEL: define frozen <2 x i64> @test_veorq_u64(<2 x i64> frozen %a, <2 x i64> frozen %b) #1 { // CHECK: [[XOR_I:%.*]] = xor <2 x i64> %a, %b // CHECK: ret <2 x i64> [[XOR_I]] uint64x2_t test_veorq_u64(uint64x2_t a, uint64x2_t b) { return veorq_u64(a, b); } -// CHECK-LABEL: define <8 x i8> @test_vbic_s8(<8 x i8> %a, <8 x i8> %b) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vbic_s8(<8 x i8> frozen %a, <8 x i8> frozen %b) #0 { // CHECK: [[NEG_I:%.*]] = xor <8 x i8> %b, // CHECK: [[AND_I:%.*]] = and <8 x i8> %a, [[NEG_I]] // CHECK: ret <8 x i8> [[AND_I]] @@ -348,7 +348,7 @@ return vbic_s8(a, b); } -// CHECK-LABEL: define <16 x i8> @test_vbicq_s8(<16 x i8> %a, <16 x i8> %b) #1 { +// CHECK-LABEL: define frozen <16 x i8> @test_vbicq_s8(<16 x i8> frozen %a, <16 x i8> frozen %b) #1 { // CHECK: [[NEG_I:%.*]] = xor <16 x i8> %b, // CHECK: [[AND_I:%.*]] = and <16 x i8> %a, [[NEG_I]] // CHECK: ret <16 x i8> [[AND_I]] @@ -356,7 +356,7 @@ return vbicq_s8(a, b); } -// CHECK-LABEL: define <4 x i16> @test_vbic_s16(<4 x i16> %a, <4 x i16> %b) #0 { +// CHECK-LABEL: define frozen <4 x i16> @test_vbic_s16(<4 x i16> frozen %a, <4 x i16> frozen %b) #0 { // CHECK: [[NEG_I:%.*]] = xor <4 x i16> %b, // CHECK: [[AND_I:%.*]] = and <4 x i16> %a, [[NEG_I]] // CHECK: ret <4 x i16> [[AND_I]] @@ -364,7 +364,7 @@ return vbic_s16(a, b); } -// CHECK-LABEL: define <8 x i16> @test_vbicq_s16(<8 x i16> %a, <8 x i16> %b) #1 { +// CHECK-LABEL: define frozen <8 x i16> @test_vbicq_s16(<8 x i16> frozen %a, <8 x i16> frozen %b) #1 { // CHECK: [[NEG_I:%.*]] = xor <8 x i16> %b, // CHECK: [[AND_I:%.*]] = and <8 x i16> %a, [[NEG_I]] // CHECK: ret <8 x i16> [[AND_I]] @@ -372,7 +372,7 @@ return vbicq_s16(a, b); } -// CHECK-LABEL: define <2 x i32> @test_vbic_s32(<2 x i32> %a, <2 x i32> %b) #0 { +// CHECK-LABEL: define frozen <2 x i32> @test_vbic_s32(<2 x i32> frozen %a, <2 x i32> frozen %b) #0 { // CHECK: [[NEG_I:%.*]] = xor <2 x i32> %b, // CHECK: [[AND_I:%.*]] = and <2 x i32> %a, [[NEG_I]] // CHECK: ret <2 x i32> [[AND_I]] @@ -380,7 +380,7 @@ return vbic_s32(a, b); } -// CHECK-LABEL: define <4 x i32> @test_vbicq_s32(<4 x i32> %a, <4 x i32> %b) #1 { +// CHECK-LABEL: define frozen <4 x i32> @test_vbicq_s32(<4 x i32> frozen %a, <4 x i32> frozen %b) #1 { // CHECK: [[NEG_I:%.*]] = xor <4 x i32> %b, // CHECK: [[AND_I:%.*]] = and <4 x i32> %a, [[NEG_I]] // CHECK: ret <4 x i32> [[AND_I]] @@ -388,7 +388,7 @@ return vbicq_s32(a, b); } -// CHECK-LABEL: define <1 x i64> @test_vbic_s64(<1 x i64> %a, <1 x i64> %b) #0 { +// CHECK-LABEL: define frozen <1 x i64> @test_vbic_s64(<1 x i64> frozen %a, <1 x i64> frozen %b) #0 { // CHECK: [[NEG_I:%.*]] = xor <1 x i64> %b, // CHECK: [[AND_I:%.*]] = and <1 x i64> %a, [[NEG_I]] // CHECK: ret <1 x i64> [[AND_I]] @@ -396,7 +396,7 @@ return vbic_s64(a, b); } -// CHECK-LABEL: define <2 x i64> @test_vbicq_s64(<2 x i64> %a, <2 x i64> %b) #1 { +// CHECK-LABEL: define frozen <2 x i64> @test_vbicq_s64(<2 x i64> frozen %a, <2 x i64> frozen %b) #1 { // CHECK: [[NEG_I:%.*]] = xor <2 x i64> %b, // CHECK: [[AND_I:%.*]] = and <2 x i64> %a, [[NEG_I]] // CHECK: ret <2 x i64> [[AND_I]] @@ -404,7 +404,7 @@ return vbicq_s64(a, b); } -// CHECK-LABEL: define <8 x i8> @test_vbic_u8(<8 x i8> %a, <8 x i8> %b) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vbic_u8(<8 x i8> frozen %a, <8 x i8> frozen %b) #0 { // CHECK: [[NEG_I:%.*]] = xor <8 x i8> %b, // CHECK: [[AND_I:%.*]] = and <8 x i8> %a, [[NEG_I]] // CHECK: ret <8 x i8> [[AND_I]] @@ -412,7 +412,7 @@ return vbic_u8(a, b); } -// CHECK-LABEL: define <16 x i8> @test_vbicq_u8(<16 x i8> %a, <16 x i8> %b) #1 { +// CHECK-LABEL: define frozen <16 x i8> @test_vbicq_u8(<16 x i8> frozen %a, <16 x i8> frozen %b) #1 { // CHECK: [[NEG_I:%.*]] = xor <16 x i8> %b, // CHECK: [[AND_I:%.*]] = and <16 x i8> %a, [[NEG_I]] // CHECK: ret <16 x i8> [[AND_I]] @@ -420,7 +420,7 @@ return vbicq_u8(a, b); } -// CHECK-LABEL: define <4 x i16> @test_vbic_u16(<4 x i16> %a, <4 x i16> %b) #0 { +// CHECK-LABEL: define frozen <4 x i16> @test_vbic_u16(<4 x i16> frozen %a, <4 x i16> frozen %b) #0 { // CHECK: [[NEG_I:%.*]] = xor <4 x i16> %b, // CHECK: [[AND_I:%.*]] = and <4 x i16> %a, [[NEG_I]] // CHECK: ret <4 x i16> [[AND_I]] @@ -428,7 +428,7 @@ return vbic_u16(a, b); } -// CHECK-LABEL: define <8 x i16> @test_vbicq_u16(<8 x i16> %a, <8 x i16> %b) #1 { +// CHECK-LABEL: define frozen <8 x i16> @test_vbicq_u16(<8 x i16> frozen %a, <8 x i16> frozen %b) #1 { // CHECK: [[NEG_I:%.*]] = xor <8 x i16> %b, // CHECK: [[AND_I:%.*]] = and <8 x i16> %a, [[NEG_I]] // CHECK: ret <8 x i16> [[AND_I]] @@ -436,7 +436,7 @@ return vbicq_u16(a, b); } -// CHECK-LABEL: define <2 x i32> @test_vbic_u32(<2 x i32> %a, <2 x i32> %b) #0 { +// CHECK-LABEL: define frozen <2 x i32> @test_vbic_u32(<2 x i32> frozen %a, <2 x i32> frozen %b) #0 { // CHECK: [[NEG_I:%.*]] = xor <2 x i32> %b, // CHECK: [[AND_I:%.*]] = and <2 x i32> %a, [[NEG_I]] // CHECK: ret <2 x i32> [[AND_I]] @@ -444,7 +444,7 @@ return vbic_u32(a, b); } -// CHECK-LABEL: define <4 x i32> @test_vbicq_u32(<4 x i32> %a, <4 x i32> %b) #1 { +// CHECK-LABEL: define frozen <4 x i32> @test_vbicq_u32(<4 x i32> frozen %a, <4 x i32> frozen %b) #1 { // CHECK: [[NEG_I:%.*]] = xor <4 x i32> %b, // CHECK: [[AND_I:%.*]] = and <4 x i32> %a, [[NEG_I]] // CHECK: ret <4 x i32> [[AND_I]] @@ -452,7 +452,7 @@ return vbicq_u32(a, b); } -// CHECK-LABEL: define <1 x i64> @test_vbic_u64(<1 x i64> %a, <1 x i64> %b) #0 { +// CHECK-LABEL: define frozen <1 x i64> @test_vbic_u64(<1 x i64> frozen %a, <1 x i64> frozen %b) #0 { // CHECK: [[NEG_I:%.*]] = xor <1 x i64> %b, // CHECK: [[AND_I:%.*]] = and <1 x i64> %a, [[NEG_I]] // CHECK: ret <1 x i64> [[AND_I]] @@ -460,7 +460,7 @@ return vbic_u64(a, b); } -// CHECK-LABEL: define <2 x i64> @test_vbicq_u64(<2 x i64> %a, <2 x i64> %b) #1 { +// CHECK-LABEL: define frozen <2 x i64> @test_vbicq_u64(<2 x i64> frozen %a, <2 x i64> frozen %b) #1 { // CHECK: [[NEG_I:%.*]] = xor <2 x i64> %b, // CHECK: [[AND_I:%.*]] = and <2 x i64> %a, [[NEG_I]] // CHECK: ret <2 x i64> [[AND_I]] @@ -468,7 +468,7 @@ return vbicq_u64(a, b); } -// CHECK-LABEL: define <8 x i8> @test_vorn_s8(<8 x i8> %a, <8 x i8> %b) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vorn_s8(<8 x i8> frozen %a, <8 x i8> frozen %b) #0 { // CHECK: [[NEG_I:%.*]] = xor <8 x i8> %b, // CHECK: [[OR_I:%.*]] = or <8 x i8> %a, [[NEG_I]] // CHECK: ret <8 x i8> [[OR_I]] @@ -476,7 +476,7 @@ return vorn_s8(a, b); } -// CHECK-LABEL: define <16 x i8> @test_vornq_s8(<16 x i8> %a, <16 x i8> %b) #1 { +// CHECK-LABEL: define frozen <16 x i8> @test_vornq_s8(<16 x i8> frozen %a, <16 x i8> frozen %b) #1 { // CHECK: [[NEG_I:%.*]] = xor <16 x i8> %b, // CHECK: [[OR_I:%.*]] = or <16 x i8> %a, [[NEG_I]] // CHECK: ret <16 x i8> [[OR_I]] @@ -484,7 +484,7 @@ return vornq_s8(a, b); } -// CHECK-LABEL: define <4 x i16> @test_vorn_s16(<4 x i16> %a, <4 x i16> %b) #0 { +// CHECK-LABEL: define frozen <4 x i16> @test_vorn_s16(<4 x i16> frozen %a, <4 x i16> frozen %b) #0 { // CHECK: [[NEG_I:%.*]] = xor <4 x i16> %b, // CHECK: [[OR_I:%.*]] = or <4 x i16> %a, [[NEG_I]] // CHECK: ret <4 x i16> [[OR_I]] @@ -492,7 +492,7 @@ return vorn_s16(a, b); } -// CHECK-LABEL: define <8 x i16> @test_vornq_s16(<8 x i16> %a, <8 x i16> %b) #1 { +// CHECK-LABEL: define frozen <8 x i16> @test_vornq_s16(<8 x i16> frozen %a, <8 x i16> frozen %b) #1 { // CHECK: [[NEG_I:%.*]] = xor <8 x i16> %b, // CHECK: [[OR_I:%.*]] = or <8 x i16> %a, [[NEG_I]] // CHECK: ret <8 x i16> [[OR_I]] @@ -500,7 +500,7 @@ return vornq_s16(a, b); } -// CHECK-LABEL: define <2 x i32> @test_vorn_s32(<2 x i32> %a, <2 x i32> %b) #0 { +// CHECK-LABEL: define frozen <2 x i32> @test_vorn_s32(<2 x i32> frozen %a, <2 x i32> frozen %b) #0 { // CHECK: [[NEG_I:%.*]] = xor <2 x i32> %b, // CHECK: [[OR_I:%.*]] = or <2 x i32> %a, [[NEG_I]] // CHECK: ret <2 x i32> [[OR_I]] @@ -508,7 +508,7 @@ return vorn_s32(a, b); } -// CHECK-LABEL: define <4 x i32> @test_vornq_s32(<4 x i32> %a, <4 x i32> %b) #1 { +// CHECK-LABEL: define frozen <4 x i32> @test_vornq_s32(<4 x i32> frozen %a, <4 x i32> frozen %b) #1 { // CHECK: [[NEG_I:%.*]] = xor <4 x i32> %b, // CHECK: [[OR_I:%.*]] = or <4 x i32> %a, [[NEG_I]] // CHECK: ret <4 x i32> [[OR_I]] @@ -516,7 +516,7 @@ return vornq_s32(a, b); } -// CHECK-LABEL: define <1 x i64> @test_vorn_s64(<1 x i64> %a, <1 x i64> %b) #0 { +// CHECK-LABEL: define frozen <1 x i64> @test_vorn_s64(<1 x i64> frozen %a, <1 x i64> frozen %b) #0 { // CHECK: [[NEG_I:%.*]] = xor <1 x i64> %b, // CHECK: [[OR_I:%.*]] = or <1 x i64> %a, [[NEG_I]] // CHECK: ret <1 x i64> [[OR_I]] @@ -524,7 +524,7 @@ return vorn_s64(a, b); } -// CHECK-LABEL: define <2 x i64> @test_vornq_s64(<2 x i64> %a, <2 x i64> %b) #1 { +// CHECK-LABEL: define frozen <2 x i64> @test_vornq_s64(<2 x i64> frozen %a, <2 x i64> frozen %b) #1 { // CHECK: [[NEG_I:%.*]] = xor <2 x i64> %b, // CHECK: [[OR_I:%.*]] = or <2 x i64> %a, [[NEG_I]] // CHECK: ret <2 x i64> [[OR_I]] @@ -532,7 +532,7 @@ return vornq_s64(a, b); } -// CHECK-LABEL: define <8 x i8> @test_vorn_u8(<8 x i8> %a, <8 x i8> %b) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vorn_u8(<8 x i8> frozen %a, <8 x i8> frozen %b) #0 { // CHECK: [[NEG_I:%.*]] = xor <8 x i8> %b, // CHECK: [[OR_I:%.*]] = or <8 x i8> %a, [[NEG_I]] // CHECK: ret <8 x i8> [[OR_I]] @@ -540,7 +540,7 @@ return vorn_u8(a, b); } -// CHECK-LABEL: define <16 x i8> @test_vornq_u8(<16 x i8> %a, <16 x i8> %b) #1 { +// CHECK-LABEL: define frozen <16 x i8> @test_vornq_u8(<16 x i8> frozen %a, <16 x i8> frozen %b) #1 { // CHECK: [[NEG_I:%.*]] = xor <16 x i8> %b, // CHECK: [[OR_I:%.*]] = or <16 x i8> %a, [[NEG_I]] // CHECK: ret <16 x i8> [[OR_I]] @@ -548,7 +548,7 @@ return vornq_u8(a, b); } -// CHECK-LABEL: define <4 x i16> @test_vorn_u16(<4 x i16> %a, <4 x i16> %b) #0 { +// CHECK-LABEL: define frozen <4 x i16> @test_vorn_u16(<4 x i16> frozen %a, <4 x i16> frozen %b) #0 { // CHECK: [[NEG_I:%.*]] = xor <4 x i16> %b, // CHECK: [[OR_I:%.*]] = or <4 x i16> %a, [[NEG_I]] // CHECK: ret <4 x i16> [[OR_I]] @@ -556,7 +556,7 @@ return vorn_u16(a, b); } -// CHECK-LABEL: define <8 x i16> @test_vornq_u16(<8 x i16> %a, <8 x i16> %b) #1 { +// CHECK-LABEL: define frozen <8 x i16> @test_vornq_u16(<8 x i16> frozen %a, <8 x i16> frozen %b) #1 { // CHECK: [[NEG_I:%.*]] = xor <8 x i16> %b, // CHECK: [[OR_I:%.*]] = or <8 x i16> %a, [[NEG_I]] // CHECK: ret <8 x i16> [[OR_I]] @@ -564,7 +564,7 @@ return vornq_u16(a, b); } -// CHECK-LABEL: define <2 x i32> @test_vorn_u32(<2 x i32> %a, <2 x i32> %b) #0 { +// CHECK-LABEL: define frozen <2 x i32> @test_vorn_u32(<2 x i32> frozen %a, <2 x i32> frozen %b) #0 { // CHECK: [[NEG_I:%.*]] = xor <2 x i32> %b, // CHECK: [[OR_I:%.*]] = or <2 x i32> %a, [[NEG_I]] // CHECK: ret <2 x i32> [[OR_I]] @@ -572,7 +572,7 @@ return vorn_u32(a, b); } -// CHECK-LABEL: define <4 x i32> @test_vornq_u32(<4 x i32> %a, <4 x i32> %b) #1 { +// CHECK-LABEL: define frozen <4 x i32> @test_vornq_u32(<4 x i32> frozen %a, <4 x i32> frozen %b) #1 { // CHECK: [[NEG_I:%.*]] = xor <4 x i32> %b, // CHECK: [[OR_I:%.*]] = or <4 x i32> %a, [[NEG_I]] // CHECK: ret <4 x i32> [[OR_I]] @@ -580,7 +580,7 @@ return vornq_u32(a, b); } -// CHECK-LABEL: define <1 x i64> @test_vorn_u64(<1 x i64> %a, <1 x i64> %b) #0 { +// CHECK-LABEL: define frozen <1 x i64> @test_vorn_u64(<1 x i64> frozen %a, <1 x i64> frozen %b) #0 { // CHECK: [[NEG_I:%.*]] = xor <1 x i64> %b, // CHECK: [[OR_I:%.*]] = or <1 x i64> %a, [[NEG_I]] // CHECK: ret <1 x i64> [[OR_I]] @@ -588,7 +588,7 @@ return vorn_u64(a, b); } -// CHECK-LABEL: define <2 x i64> @test_vornq_u64(<2 x i64> %a, <2 x i64> %b) #1 { +// CHECK-LABEL: define frozen <2 x i64> @test_vornq_u64(<2 x i64> frozen %a, <2 x i64> frozen %b) #1 { // CHECK: [[NEG_I:%.*]] = xor <2 x i64> %b, // CHECK: [[OR_I:%.*]] = or <2 x i64> %a, [[NEG_I]] // CHECK: ret <2 x i64> [[OR_I]] diff --git a/clang/test/CodeGen/aarch64-neon-across.c b/clang/test/CodeGen/aarch64-neon-across.c --- a/clang/test/CodeGen/aarch64-neon-across.c +++ b/clang/test/CodeGen/aarch64-neon-across.c @@ -5,7 +5,7 @@ #include -// CHECK-LABEL: define i16 @test_vaddlv_s8(<8 x i8> %a) #0 { +// CHECK-LABEL: define frozen i16 @test_vaddlv_s8(<8 x i8> frozen %a) #0 { // CHECK: [[VADDLV_I:%.*]] = call i32 @llvm.aarch64.neon.saddlv.i32.v8i8(<8 x i8> %a) #3 // CHECK: [[TMP0:%.*]] = trunc i32 [[VADDLV_I]] to i16 // CHECK: ret i16 [[TMP0]] @@ -13,14 +13,14 @@ return vaddlv_s8(a); } -// CHECK-LABEL: define i32 @test_vaddlv_s16(<4 x i16> %a) #0 { +// CHECK-LABEL: define frozen i32 @test_vaddlv_s16(<4 x i16> frozen %a) #0 { // CHECK: [[VADDLV_I:%.*]] = call i32 @llvm.aarch64.neon.saddlv.i32.v4i16(<4 x i16> %a) #3 // CHECK: ret i32 [[VADDLV_I]] int32_t test_vaddlv_s16(int16x4_t a) { return vaddlv_s16(a); } -// CHECK-LABEL: define i16 @test_vaddlv_u8(<8 x i8> %a) #0 { +// CHECK-LABEL: define frozen i16 @test_vaddlv_u8(<8 x i8> frozen %a) #0 { // CHECK: [[VADDLV_I:%.*]] = call i32 @llvm.aarch64.neon.uaddlv.i32.v8i8(<8 x i8> %a) #3 // CHECK: [[TMP0:%.*]] = trunc i32 [[VADDLV_I]] to i16 // CHECK: ret i16 [[TMP0]] @@ -28,14 +28,14 @@ return vaddlv_u8(a); } -// CHECK-LABEL: define i32 @test_vaddlv_u16(<4 x i16> %a) #0 { +// CHECK-LABEL: define frozen i32 @test_vaddlv_u16(<4 x i16> frozen %a) #0 { // CHECK: [[VADDLV_I:%.*]] = call i32 @llvm.aarch64.neon.uaddlv.i32.v4i16(<4 x i16> %a) #3 // CHECK: ret i32 [[VADDLV_I]] uint32_t test_vaddlv_u16(uint16x4_t a) { return vaddlv_u16(a); } -// CHECK-LABEL: define i16 @test_vaddlvq_s8(<16 x i8> %a) #1 { +// CHECK-LABEL: define frozen i16 @test_vaddlvq_s8(<16 x i8> frozen %a) #1 { // CHECK: [[VADDLV_I:%.*]] = call i32 @llvm.aarch64.neon.saddlv.i32.v16i8(<16 x i8> %a) #3 // CHECK: [[TMP0:%.*]] = trunc i32 [[VADDLV_I]] to i16 // CHECK: ret i16 [[TMP0]] @@ -43,21 +43,21 @@ return vaddlvq_s8(a); } -// CHECK-LABEL: define i32 @test_vaddlvq_s16(<8 x i16> %a) #1 { +// CHECK-LABEL: define frozen i32 @test_vaddlvq_s16(<8 x i16> frozen %a) #1 { // CHECK: [[VADDLV_I:%.*]] = call i32 @llvm.aarch64.neon.saddlv.i32.v8i16(<8 x i16> %a) #3 // CHECK: ret i32 [[VADDLV_I]] int32_t test_vaddlvq_s16(int16x8_t a) { return vaddlvq_s16(a); } -// CHECK-LABEL: define i64 @test_vaddlvq_s32(<4 x i32> %a) #1 { +// CHECK-LABEL: define frozen i64 @test_vaddlvq_s32(<4 x i32> frozen %a) #1 { // CHECK: [[VADDLVQ_S32_I:%.*]] = call i64 @llvm.aarch64.neon.saddlv.i64.v4i32(<4 x i32> %a) #3 // CHECK: ret i64 [[VADDLVQ_S32_I]] int64_t test_vaddlvq_s32(int32x4_t a) { return vaddlvq_s32(a); } -// CHECK-LABEL: define i16 @test_vaddlvq_u8(<16 x i8> %a) #1 { +// CHECK-LABEL: define frozen i16 @test_vaddlvq_u8(<16 x i8> frozen %a) #1 { // CHECK: [[VADDLV_I:%.*]] = call i32 @llvm.aarch64.neon.uaddlv.i32.v16i8(<16 x i8> %a) #3 // CHECK: [[TMP0:%.*]] = trunc i32 [[VADDLV_I]] to i16 // CHECK: ret i16 [[TMP0]] @@ -65,21 +65,21 @@ return vaddlvq_u8(a); } -// CHECK-LABEL: define i32 @test_vaddlvq_u16(<8 x i16> %a) #1 { +// CHECK-LABEL: define frozen i32 @test_vaddlvq_u16(<8 x i16> frozen %a) #1 { // CHECK: [[VADDLV_I:%.*]] = call i32 @llvm.aarch64.neon.uaddlv.i32.v8i16(<8 x i16> %a) #3 // CHECK: ret i32 [[VADDLV_I]] uint32_t test_vaddlvq_u16(uint16x8_t a) { return vaddlvq_u16(a); } -// CHECK-LABEL: define i64 @test_vaddlvq_u32(<4 x i32> %a) #1 { +// CHECK-LABEL: define frozen i64 @test_vaddlvq_u32(<4 x i32> frozen %a) #1 { // CHECK: [[VADDLVQ_U32_I:%.*]] = call i64 @llvm.aarch64.neon.uaddlv.i64.v4i32(<4 x i32> %a) #3 // CHECK: ret i64 [[VADDLVQ_U32_I]] uint64_t test_vaddlvq_u32(uint32x4_t a) { return vaddlvq_u32(a); } -// CHECK-LABEL: define i8 @test_vmaxv_s8(<8 x i8> %a) #0 { +// CHECK-LABEL: define frozen i8 @test_vmaxv_s8(<8 x i8> frozen %a) #0 { // CHECK: [[VMAXV_I:%.*]] = call i32 @llvm.aarch64.neon.smaxv.i32.v8i8(<8 x i8> %a) #3 // CHECK: [[TMP0:%.*]] = trunc i32 [[VMAXV_I]] to i8 // CHECK: ret i8 [[TMP0]] @@ -87,7 +87,7 @@ return vmaxv_s8(a); } -// CHECK-LABEL: define i16 @test_vmaxv_s16(<4 x i16> %a) #0 { +// CHECK-LABEL: define frozen i16 @test_vmaxv_s16(<4 x i16> frozen %a) #0 { // CHECK: [[VMAXV_I:%.*]] = call i32 @llvm.aarch64.neon.smaxv.i32.v4i16(<4 x i16> %a) #3 // CHECK: [[TMP2:%.*]] = trunc i32 [[VMAXV_I]] to i16 // CHECK: ret i16 [[TMP2]] @@ -95,7 +95,7 @@ return vmaxv_s16(a); } -// CHECK-LABEL: define i8 @test_vmaxv_u8(<8 x i8> %a) #0 { +// CHECK-LABEL: define frozen i8 @test_vmaxv_u8(<8 x i8> frozen %a) #0 { // CHECK: [[VMAXV_I:%.*]] = call i32 @llvm.aarch64.neon.umaxv.i32.v8i8(<8 x i8> %a) #3 // CHECK: [[TMP0:%.*]] = trunc i32 [[VMAXV_I]] to i8 // CHECK: ret i8 [[TMP0]] @@ -103,7 +103,7 @@ return vmaxv_u8(a); } -// CHECK-LABEL: define i16 @test_vmaxv_u16(<4 x i16> %a) #0 { +// CHECK-LABEL: define frozen i16 @test_vmaxv_u16(<4 x i16> frozen %a) #0 { // CHECK: [[VMAXV_I:%.*]] = call i32 @llvm.aarch64.neon.umaxv.i32.v4i16(<4 x i16> %a) #3 // CHECK: [[TMP2:%.*]] = trunc i32 [[VMAXV_I]] to i16 // CHECK: ret i16 [[TMP2]] @@ -111,7 +111,7 @@ return vmaxv_u16(a); } -// CHECK-LABEL: define i8 @test_vmaxvq_s8(<16 x i8> %a) #1 { +// CHECK-LABEL: define frozen i8 @test_vmaxvq_s8(<16 x i8> frozen %a) #1 { // CHECK: [[VMAXV_I:%.*]] = call i32 @llvm.aarch64.neon.smaxv.i32.v16i8(<16 x i8> %a) #3 // CHECK: [[TMP0:%.*]] = trunc i32 [[VMAXV_I]] to i8 // CHECK: ret i8 [[TMP0]] @@ -119,7 +119,7 @@ return vmaxvq_s8(a); } -// CHECK-LABEL: define i16 @test_vmaxvq_s16(<8 x i16> %a) #1 { +// CHECK-LABEL: define frozen i16 @test_vmaxvq_s16(<8 x i16> frozen %a) #1 { // CHECK: [[VMAXV_I:%.*]] = call i32 @llvm.aarch64.neon.smaxv.i32.v8i16(<8 x i16> %a) #3 // CHECK: [[TMP2:%.*]] = trunc i32 [[VMAXV_I]] to i16 // CHECK: ret i16 [[TMP2]] @@ -127,14 +127,14 @@ return vmaxvq_s16(a); } -// CHECK-LABEL: define i32 @test_vmaxvq_s32(<4 x i32> %a) #1 { +// CHECK-LABEL: define frozen i32 @test_vmaxvq_s32(<4 x i32> frozen %a) #1 { // CHECK: [[VMAXVQ_S32_I:%.*]] = call i32 @llvm.aarch64.neon.smaxv.i32.v4i32(<4 x i32> %a) #3 // CHECK: ret i32 [[VMAXVQ_S32_I]] int32_t test_vmaxvq_s32(int32x4_t a) { return vmaxvq_s32(a); } -// CHECK-LABEL: define i8 @test_vmaxvq_u8(<16 x i8> %a) #1 { +// CHECK-LABEL: define frozen i8 @test_vmaxvq_u8(<16 x i8> frozen %a) #1 { // CHECK: [[VMAXV_I:%.*]] = call i32 @llvm.aarch64.neon.umaxv.i32.v16i8(<16 x i8> %a) #3 // CHECK: [[TMP0:%.*]] = trunc i32 [[VMAXV_I]] to i8 // CHECK: ret i8 [[TMP0]] @@ -142,7 +142,7 @@ return vmaxvq_u8(a); } -// CHECK-LABEL: define i16 @test_vmaxvq_u16(<8 x i16> %a) #1 { +// CHECK-LABEL: define frozen i16 @test_vmaxvq_u16(<8 x i16> frozen %a) #1 { // CHECK: [[VMAXV_I:%.*]] = call i32 @llvm.aarch64.neon.umaxv.i32.v8i16(<8 x i16> %a) #3 // CHECK: [[TMP2:%.*]] = trunc i32 [[VMAXV_I]] to i16 // CHECK: ret i16 [[TMP2]] @@ -150,14 +150,14 @@ return vmaxvq_u16(a); } -// CHECK-LABEL: define i32 @test_vmaxvq_u32(<4 x i32> %a) #1 { +// CHECK-LABEL: define frozen i32 @test_vmaxvq_u32(<4 x i32> frozen %a) #1 { // CHECK: [[VMAXVQ_U32_I:%.*]] = call i32 @llvm.aarch64.neon.umaxv.i32.v4i32(<4 x i32> %a) #3 // CHECK: ret i32 [[VMAXVQ_U32_I]] uint32_t test_vmaxvq_u32(uint32x4_t a) { return vmaxvq_u32(a); } -// CHECK-LABEL: define i8 @test_vminv_s8(<8 x i8> %a) #0 { +// CHECK-LABEL: define frozen i8 @test_vminv_s8(<8 x i8> frozen %a) #0 { // CHECK: [[VMINV_I:%.*]] = call i32 @llvm.aarch64.neon.sminv.i32.v8i8(<8 x i8> %a) #3 // CHECK: [[TMP0:%.*]] = trunc i32 [[VMINV_I]] to i8 // CHECK: ret i8 [[TMP0]] @@ -165,7 +165,7 @@ return vminv_s8(a); } -// CHECK-LABEL: define i16 @test_vminv_s16(<4 x i16> %a) #0 { +// CHECK-LABEL: define frozen i16 @test_vminv_s16(<4 x i16> frozen %a) #0 { // CHECK: [[VMINV_I:%.*]] = call i32 @llvm.aarch64.neon.sminv.i32.v4i16(<4 x i16> %a) #3 // CHECK: [[TMP2:%.*]] = trunc i32 [[VMINV_I]] to i16 // CHECK: ret i16 [[TMP2]] @@ -173,7 +173,7 @@ return vminv_s16(a); } -// CHECK-LABEL: define i8 @test_vminv_u8(<8 x i8> %a) #0 { +// CHECK-LABEL: define frozen i8 @test_vminv_u8(<8 x i8> frozen %a) #0 { // CHECK: [[VMINV_I:%.*]] = call i32 @llvm.aarch64.neon.uminv.i32.v8i8(<8 x i8> %a) #3 // CHECK: [[TMP0:%.*]] = trunc i32 [[VMINV_I]] to i8 // CHECK: ret i8 [[TMP0]] @@ -181,7 +181,7 @@ return vminv_u8(a); } -// CHECK-LABEL: define i16 @test_vminv_u16(<4 x i16> %a) #0 { +// CHECK-LABEL: define frozen i16 @test_vminv_u16(<4 x i16> frozen %a) #0 { // CHECK: [[VMINV_I:%.*]] = call i32 @llvm.aarch64.neon.uminv.i32.v4i16(<4 x i16> %a) #3 // CHECK: [[TMP2:%.*]] = trunc i32 [[VMINV_I]] to i16 // CHECK: ret i16 [[TMP2]] @@ -189,7 +189,7 @@ return vminv_u16(a); } -// CHECK-LABEL: define i8 @test_vminvq_s8(<16 x i8> %a) #1 { +// CHECK-LABEL: define frozen i8 @test_vminvq_s8(<16 x i8> frozen %a) #1 { // CHECK: [[VMINV_I:%.*]] = call i32 @llvm.aarch64.neon.sminv.i32.v16i8(<16 x i8> %a) #3 // CHECK: [[TMP0:%.*]] = trunc i32 [[VMINV_I]] to i8 // CHECK: ret i8 [[TMP0]] @@ -197,7 +197,7 @@ return vminvq_s8(a); } -// CHECK-LABEL: define i16 @test_vminvq_s16(<8 x i16> %a) #1 { +// CHECK-LABEL: define frozen i16 @test_vminvq_s16(<8 x i16> frozen %a) #1 { // CHECK: [[VMINV_I:%.*]] = call i32 @llvm.aarch64.neon.sminv.i32.v8i16(<8 x i16> %a) #3 // CHECK: [[TMP2:%.*]] = trunc i32 [[VMINV_I]] to i16 // CHECK: ret i16 [[TMP2]] @@ -205,14 +205,14 @@ return vminvq_s16(a); } -// CHECK-LABEL: define i32 @test_vminvq_s32(<4 x i32> %a) #1 { +// CHECK-LABEL: define frozen i32 @test_vminvq_s32(<4 x i32> frozen %a) #1 { // CHECK: [[VMINVQ_S32_I:%.*]] = call i32 @llvm.aarch64.neon.sminv.i32.v4i32(<4 x i32> %a) #3 // CHECK: ret i32 [[VMINVQ_S32_I]] int32_t test_vminvq_s32(int32x4_t a) { return vminvq_s32(a); } -// CHECK-LABEL: define i8 @test_vminvq_u8(<16 x i8> %a) #1 { +// CHECK-LABEL: define frozen i8 @test_vminvq_u8(<16 x i8> frozen %a) #1 { // CHECK: [[VMINV_I:%.*]] = call i32 @llvm.aarch64.neon.uminv.i32.v16i8(<16 x i8> %a) #3 // CHECK: [[TMP0:%.*]] = trunc i32 [[VMINV_I]] to i8 // CHECK: ret i8 [[TMP0]] @@ -220,7 +220,7 @@ return vminvq_u8(a); } -// CHECK-LABEL: define i16 @test_vminvq_u16(<8 x i16> %a) #1 { +// CHECK-LABEL: define frozen i16 @test_vminvq_u16(<8 x i16> frozen %a) #1 { // CHECK: [[VMINV_I:%.*]] = call i32 @llvm.aarch64.neon.uminv.i32.v8i16(<8 x i16> %a) #3 // CHECK: [[TMP2:%.*]] = trunc i32 [[VMINV_I]] to i16 // CHECK: ret i16 [[TMP2]] @@ -228,14 +228,14 @@ return vminvq_u16(a); } -// CHECK-LABEL: define i32 @test_vminvq_u32(<4 x i32> %a) #1 { +// CHECK-LABEL: define frozen i32 @test_vminvq_u32(<4 x i32> frozen %a) #1 { // CHECK: [[VMINVQ_U32_I:%.*]] = call i32 @llvm.aarch64.neon.uminv.i32.v4i32(<4 x i32> %a) #3 // CHECK: ret i32 [[VMINVQ_U32_I]] uint32_t test_vminvq_u32(uint32x4_t a) { return vminvq_u32(a); } -// CHECK-LABEL: define i8 @test_vaddv_s8(<8 x i8> %a) #0 { +// CHECK-LABEL: define frozen i8 @test_vaddv_s8(<8 x i8> frozen %a) #0 { // CHECK: [[VADDV_I:%.*]] = call i32 @llvm.aarch64.neon.saddv.i32.v8i8(<8 x i8> %a) #3 // CHECK: [[TMP0:%.*]] = trunc i32 [[VADDV_I]] to i8 // CHECK: ret i8 [[TMP0]] @@ -243,7 +243,7 @@ return vaddv_s8(a); } -// CHECK-LABEL: define i16 @test_vaddv_s16(<4 x i16> %a) #0 { +// CHECK-LABEL: define frozen i16 @test_vaddv_s16(<4 x i16> frozen %a) #0 { // CHECK: [[VADDV_I:%.*]] = call i32 @llvm.aarch64.neon.saddv.i32.v4i16(<4 x i16> %a) #3 // CHECK: [[TMP2:%.*]] = trunc i32 [[VADDV_I]] to i16 // CHECK: ret i16 [[TMP2]] @@ -251,7 +251,7 @@ return vaddv_s16(a); } -// CHECK-LABEL: define i8 @test_vaddv_u8(<8 x i8> %a) #0 { +// CHECK-LABEL: define frozen i8 @test_vaddv_u8(<8 x i8> frozen %a) #0 { // CHECK: [[VADDV_I:%.*]] = call i32 @llvm.aarch64.neon.uaddv.i32.v8i8(<8 x i8> %a) #3 // CHECK: [[TMP0:%.*]] = trunc i32 [[VADDV_I]] to i8 // CHECK: ret i8 [[TMP0]] @@ -259,7 +259,7 @@ return vaddv_u8(a); } -// CHECK-LABEL: define i16 @test_vaddv_u16(<4 x i16> %a) #0 { +// CHECK-LABEL: define frozen i16 @test_vaddv_u16(<4 x i16> frozen %a) #0 { // CHECK: [[VADDV_I:%.*]] = call i32 @llvm.aarch64.neon.uaddv.i32.v4i16(<4 x i16> %a) #3 // CHECK: [[TMP2:%.*]] = trunc i32 [[VADDV_I]] to i16 // CHECK: ret i16 [[TMP2]] @@ -267,7 +267,7 @@ return vaddv_u16(a); } -// CHECK-LABEL: define i8 @test_vaddvq_s8(<16 x i8> %a) #1 { +// CHECK-LABEL: define frozen i8 @test_vaddvq_s8(<16 x i8> frozen %a) #1 { // CHECK: [[VADDV_I:%.*]] = call i32 @llvm.aarch64.neon.saddv.i32.v16i8(<16 x i8> %a) #3 // CHECK: [[TMP0:%.*]] = trunc i32 [[VADDV_I]] to i8 // CHECK: ret i8 [[TMP0]] @@ -275,7 +275,7 @@ return vaddvq_s8(a); } -// CHECK-LABEL: define i16 @test_vaddvq_s16(<8 x i16> %a) #1 { +// CHECK-LABEL: define frozen i16 @test_vaddvq_s16(<8 x i16> frozen %a) #1 { // CHECK: [[VADDV_I:%.*]] = call i32 @llvm.aarch64.neon.saddv.i32.v8i16(<8 x i16> %a) #3 // CHECK: [[TMP2:%.*]] = trunc i32 [[VADDV_I]] to i16 // CHECK: ret i16 [[TMP2]] @@ -283,14 +283,14 @@ return vaddvq_s16(a); } -// CHECK-LABEL: define i32 @test_vaddvq_s32(<4 x i32> %a) #1 { +// CHECK-LABEL: define frozen i32 @test_vaddvq_s32(<4 x i32> frozen %a) #1 { // CHECK: [[VADDVQ_S32_I:%.*]] = call i32 @llvm.aarch64.neon.saddv.i32.v4i32(<4 x i32> %a) #3 // CHECK: ret i32 [[VADDVQ_S32_I]] int32_t test_vaddvq_s32(int32x4_t a) { return vaddvq_s32(a); } -// CHECK-LABEL: define i8 @test_vaddvq_u8(<16 x i8> %a) #1 { +// CHECK-LABEL: define frozen i8 @test_vaddvq_u8(<16 x i8> frozen %a) #1 { // CHECK: [[VADDV_I:%.*]] = call i32 @llvm.aarch64.neon.uaddv.i32.v16i8(<16 x i8> %a) #3 // CHECK: [[TMP0:%.*]] = trunc i32 [[VADDV_I]] to i8 // CHECK: ret i8 [[TMP0]] @@ -298,7 +298,7 @@ return vaddvq_u8(a); } -// CHECK-LABEL: define i16 @test_vaddvq_u16(<8 x i16> %a) #1 { +// CHECK-LABEL: define frozen i16 @test_vaddvq_u16(<8 x i16> frozen %a) #1 { // CHECK: [[VADDV_I:%.*]] = call i32 @llvm.aarch64.neon.uaddv.i32.v8i16(<8 x i16> %a) #3 // CHECK: [[TMP2:%.*]] = trunc i32 [[VADDV_I]] to i16 // CHECK: ret i16 [[TMP2]] @@ -306,35 +306,35 @@ return vaddvq_u16(a); } -// CHECK-LABEL: define i32 @test_vaddvq_u32(<4 x i32> %a) #1 { +// CHECK-LABEL: define frozen i32 @test_vaddvq_u32(<4 x i32> frozen %a) #1 { // CHECK: [[VADDVQ_U32_I:%.*]] = call i32 @llvm.aarch64.neon.uaddv.i32.v4i32(<4 x i32> %a) #3 // CHECK: ret i32 [[VADDVQ_U32_I]] uint32_t test_vaddvq_u32(uint32x4_t a) { return vaddvq_u32(a); } -// CHECK-LABEL: define float @test_vmaxvq_f32(<4 x float> %a) #1 { +// CHECK-LABEL: define frozen float @test_vmaxvq_f32(<4 x float> frozen %a) #1 { // CHECK: [[VMAXVQ_F32_I:%.*]] = call float @llvm.aarch64.neon.fmaxv.f32.v4f32(<4 x float> %a) #3 // CHECK: ret float [[VMAXVQ_F32_I]] float32_t test_vmaxvq_f32(float32x4_t a) { return vmaxvq_f32(a); } -// CHECK-LABEL: define float @test_vminvq_f32(<4 x float> %a) #1 { +// CHECK-LABEL: define frozen float @test_vminvq_f32(<4 x float> frozen %a) #1 { // CHECK: [[VMINVQ_F32_I:%.*]] = call float @llvm.aarch64.neon.fminv.f32.v4f32(<4 x float> %a) #3 // CHECK: ret float [[VMINVQ_F32_I]] float32_t test_vminvq_f32(float32x4_t a) { return vminvq_f32(a); } -// CHECK-LABEL: define float @test_vmaxnmvq_f32(<4 x float> %a) #1 { +// CHECK-LABEL: define frozen float @test_vmaxnmvq_f32(<4 x float> frozen %a) #1 { // CHECK: [[VMAXNMVQ_F32_I:%.*]] = call float @llvm.aarch64.neon.fmaxnmv.f32.v4f32(<4 x float> %a) #3 // CHECK: ret float [[VMAXNMVQ_F32_I]] float32_t test_vmaxnmvq_f32(float32x4_t a) { return vmaxnmvq_f32(a); } -// CHECK-LABEL: define float @test_vminnmvq_f32(<4 x float> %a) #1 { +// CHECK-LABEL: define frozen float @test_vminnmvq_f32(<4 x float> frozen %a) #1 { // CHECK: [[VMINNMVQ_F32_I:%.*]] = call float @llvm.aarch64.neon.fminnmv.f32.v4f32(<4 x float> %a) #3 // CHECK: ret float [[VMINNMVQ_F32_I]] float32_t test_vminnmvq_f32(float32x4_t a) { diff --git a/clang/test/CodeGen/aarch64-neon-dot-product.c b/clang/test/CodeGen/aarch64-neon-dot-product.c --- a/clang/test/CodeGen/aarch64-neon-dot-product.c +++ b/clang/test/CodeGen/aarch64-neon-dot-product.c @@ -8,35 +8,35 @@ #include uint32x2_t test_vdot_u32(uint32x2_t a, uint8x8_t b, uint8x8_t c) { -// CHECK-LABEL: define <2 x i32> @test_vdot_u32(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c) +// CHECK-LABEL: define frozen <2 x i32> @test_vdot_u32(<2 x i32> frozen %a, <8 x i8> frozen %b, <8 x i8> frozen %c) // CHECK: [[RESULT:%.*]] = call <2 x i32> @llvm.aarch64.neon.udot.v2i32.v8i8(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c) // CHECK: ret <2 x i32> [[RESULT]] return vdot_u32(a, b, c); } uint32x4_t test_vdotq_u32(uint32x4_t a, uint8x16_t b, uint8x16_t c) { -// CHECK-LABEL: define <4 x i32> @test_vdotq_u32(<4 x i32> %a, <16 x i8> %b, <16 x i8> %c) +// CHECK-LABEL: define frozen <4 x i32> @test_vdotq_u32(<4 x i32> frozen %a, <16 x i8> frozen %b, <16 x i8> frozen %c) // CHECK: [[RESULT:%.*]] = call <4 x i32> @llvm.aarch64.neon.udot.v4i32.v16i8(<4 x i32> %a, <16 x i8> %b, <16 x i8> %c) // CHECK: ret <4 x i32> [[RESULT]] return vdotq_u32(a, b, c); } int32x2_t test_vdot_s32(int32x2_t a, int8x8_t b, int8x8_t c) { -// CHECK-LABEL: define <2 x i32> @test_vdot_s32(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c) +// CHECK-LABEL: define frozen <2 x i32> @test_vdot_s32(<2 x i32> frozen %a, <8 x i8> frozen %b, <8 x i8> frozen %c) // CHECK: [[RESULT:%.*]] = call <2 x i32> @llvm.aarch64.neon.sdot.v2i32.v8i8(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c) // CHECK: ret <2 x i32> [[RESULT]] return vdot_s32(a, b, c); } int32x4_t test_vdotq_s32(int32x4_t a, int8x16_t b, int8x16_t c) { -// CHECK-LABEL: define <4 x i32> @test_vdotq_s32(<4 x i32> %a, <16 x i8> %b, <16 x i8> %c) +// CHECK-LABEL: define frozen <4 x i32> @test_vdotq_s32(<4 x i32> frozen %a, <16 x i8> frozen %b, <16 x i8> frozen %c) // CHECK: [[RESULT:%.*]] = call <4 x i32> @llvm.aarch64.neon.sdot.v4i32.v16i8(<4 x i32> %a, <16 x i8> %b, <16 x i8> %c) // CHECK: ret <4 x i32> [[RESULT]] return vdotq_s32(a, b, c); } uint32x2_t test_vdot_lane_u32(uint32x2_t a, uint8x8_t b, uint8x8_t c) { -// CHECK-LABEL: define <2 x i32> @test_vdot_lane_u32(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c) +// CHECK-LABEL: define frozen <2 x i32> @test_vdot_lane_u32(<2 x i32> frozen %a, <8 x i8> frozen %b, <8 x i8> frozen %c) // CHECK: [[CAST1:%.*]] = bitcast <8 x i8> %c to <2 x i32> // CHECK: [[SHUFFLE:%.*]] = shufflevector <2 x i32> [[CAST1]], <2 x i32> undef, <2 x i32> // CHECK: [[CAST2:%.*]] = bitcast <2 x i32> [[SHUFFLE]] to <8 x i8> @@ -46,7 +46,7 @@ } uint32x4_t test_vdotq_lane_u32(uint32x4_t a, uint8x16_t b, uint8x8_t c) { -// CHECK-LABEL: define <4 x i32> @test_vdotq_lane_u32(<4 x i32> %a, <16 x i8> %b, <8 x i8> %c) +// CHECK-LABEL: define frozen <4 x i32> @test_vdotq_lane_u32(<4 x i32> frozen %a, <16 x i8> frozen %b, <8 x i8> frozen %c) // CHECK: [[CAST1:%.*]] = bitcast <8 x i8> %c to <2 x i32> // CHECK: [[SHUFFLE:%.*]] = shufflevector <2 x i32> [[CAST1]], <2 x i32> undef, <4 x i32> // CHECK: [[CAST2:%.*]] = bitcast <4 x i32> [[SHUFFLE]] to <16 x i8> @@ -56,7 +56,7 @@ } uint32x2_t test_vdot_laneq_u32(uint32x2_t a, uint8x8_t b, uint8x16_t c) { -// CHECK-LABEL: define <2 x i32> @test_vdot_laneq_u32(<2 x i32> %a, <8 x i8> %b, <16 x i8> %c) +// CHECK-LABEL: define frozen <2 x i32> @test_vdot_laneq_u32(<2 x i32> frozen %a, <8 x i8> frozen %b, <16 x i8> frozen %c) // CHECK: [[CAST1:%.*]] = bitcast <16 x i8> %c to <4 x i32> // CHECK: [[SHUFFLE:%.*]] = shufflevector <4 x i32> [[CAST1]], <4 x i32> undef, <2 x i32> // CHECK: [[CAST2:%.*]] = bitcast <2 x i32> [[SHUFFLE]] to <8 x i8> @@ -66,7 +66,7 @@ } uint32x4_t test_vdotq_laneq_u32(uint32x4_t a, uint8x16_t b, uint8x16_t c) { -// CHECK-LABEL: define <4 x i32> @test_vdotq_laneq_u32(<4 x i32> %a, <16 x i8> %b, <16 x i8> %c) +// CHECK-LABEL: define frozen <4 x i32> @test_vdotq_laneq_u32(<4 x i32> frozen %a, <16 x i8> frozen %b, <16 x i8> frozen %c) // CHECK: [[CAST1:%.*]] = bitcast <16 x i8> %c to <4 x i32> // CHECK: [[SHUFFLE:%.*]] = shufflevector <4 x i32> [[CAST1]], <4 x i32> undef, <4 x i32> // CHECK: [[CAST2:%.*]] = bitcast <4 x i32> [[SHUFFLE]] to <16 x i8> @@ -76,7 +76,7 @@ } int32x2_t test_vdot_lane_s32(int32x2_t a, int8x8_t b, int8x8_t c) { -// CHECK-LABEL: define <2 x i32> @test_vdot_lane_s32(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c) +// CHECK-LABEL: define frozen <2 x i32> @test_vdot_lane_s32(<2 x i32> frozen %a, <8 x i8> frozen %b, <8 x i8> frozen %c) // CHECK: [[CAST1:%.*]] = bitcast <8 x i8> %c to <2 x i32> // CHECK: [[SHUFFLE:%.*]] = shufflevector <2 x i32> [[CAST1]], <2 x i32> undef, <2 x i32> // CHECK: [[CAST2:%.*]] = bitcast <2 x i32> [[SHUFFLE]] to <8 x i8> @@ -86,7 +86,7 @@ } int32x4_t test_vdotq_lane_s32(int32x4_t a, int8x16_t b, int8x8_t c) { -// CHECK-LABEL: define <4 x i32> @test_vdotq_lane_s32(<4 x i32> %a, <16 x i8> %b, <8 x i8> %c) +// CHECK-LABEL: define frozen <4 x i32> @test_vdotq_lane_s32(<4 x i32> frozen %a, <16 x i8> frozen %b, <8 x i8> frozen %c) // CHECK: [[CAST1:%.*]] = bitcast <8 x i8> %c to <2 x i32> // CHECK: [[SHUFFLE:%.*]] = shufflevector <2 x i32> [[CAST1]], <2 x i32> undef, <4 x i32> // CHECK: [[CAST2:%.*]] = bitcast <4 x i32> [[SHUFFLE]] to <16 x i8> @@ -96,7 +96,7 @@ } int32x2_t test_vdot_laneq_s32(int32x2_t a, int8x8_t b, int8x16_t c) { -// CHECK-LABEL: define <2 x i32> @test_vdot_laneq_s32(<2 x i32> %a, <8 x i8> %b, <16 x i8> %c) +// CHECK-LABEL: define frozen <2 x i32> @test_vdot_laneq_s32(<2 x i32> frozen %a, <8 x i8> frozen %b, <16 x i8> frozen %c) // CHECK: [[CAST1:%.*]] = bitcast <16 x i8> %c to <4 x i32> // CHECK: [[SHUFFLE:%.*]] = shufflevector <4 x i32> [[CAST1]], <4 x i32> undef, <2 x i32> // CHECK: [[CAST2:%.*]] = bitcast <2 x i32> [[SHUFFLE]] to <8 x i8> @@ -106,7 +106,7 @@ } int32x4_t test_vdotq_laneq_s32(int32x4_t a, int8x16_t b, int8x16_t c) { -// CHECK-LABEL: define <4 x i32> @test_vdotq_laneq_s32(<4 x i32> %a, <16 x i8> %b, <16 x i8> %c) +// CHECK-LABEL: define frozen <4 x i32> @test_vdotq_laneq_s32(<4 x i32> frozen %a, <16 x i8> frozen %b, <16 x i8> frozen %c) // CHECK: [[CAST1:%.*]] = bitcast <16 x i8> %c to <4 x i32> // CHECK: [[SHUFFLE:%.*]] = shufflevector <4 x i32> [[CAST1]], <4 x i32> undef, <4 x i32> // CHECK: [[CAST2:%.*]] = bitcast <4 x i32> [[SHUFFLE]] to <16 x i8> diff --git a/clang/test/CodeGen/aarch64-neon-extract.c b/clang/test/CodeGen/aarch64-neon-extract.c --- a/clang/test/CodeGen/aarch64-neon-extract.c +++ b/clang/test/CodeGen/aarch64-neon-extract.c @@ -6,14 +6,14 @@ #include -// CHECK-LABEL: define <8 x i8> @test_vext_s8(<8 x i8> %a, <8 x i8> %b) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vext_s8(<8 x i8> frozen %a, <8 x i8> frozen %b) #0 { // CHECK: [[VEXT:%.*]] = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> // CHECK: ret <8 x i8> [[VEXT]] int8x8_t test_vext_s8(int8x8_t a, int8x8_t b) { return vext_s8(a, b, 2); } -// CHECK-LABEL: define <4 x i16> @test_vext_s16(<4 x i16> %a, <4 x i16> %b) #0 { +// CHECK-LABEL: define frozen <4 x i16> @test_vext_s16(<4 x i16> frozen %a, <4 x i16> frozen %b) #0 { // CHECK: [[TMP0:%.*]] = bitcast <4 x i16> %a to <8 x i8> // CHECK: [[TMP1:%.*]] = bitcast <4 x i16> %b to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16> @@ -24,7 +24,7 @@ return vext_s16(a, b, 3); } -// CHECK-LABEL: define <2 x i32> @test_vext_s32(<2 x i32> %a, <2 x i32> %b) #0 { +// CHECK-LABEL: define frozen <2 x i32> @test_vext_s32(<2 x i32> frozen %a, <2 x i32> frozen %b) #0 { // CHECK: [[TMP0:%.*]] = bitcast <2 x i32> %a to <8 x i8> // CHECK: [[TMP1:%.*]] = bitcast <2 x i32> %b to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32> @@ -35,7 +35,7 @@ return vext_s32(a, b, 1); } -// CHECK-LABEL: define <1 x i64> @test_vext_s64(<1 x i64> %a, <1 x i64> %b) #0 { +// CHECK-LABEL: define frozen <1 x i64> @test_vext_s64(<1 x i64> frozen %a, <1 x i64> frozen %b) #0 { // CHECK: [[TMP0:%.*]] = bitcast <1 x i64> %a to <8 x i8> // CHECK: [[TMP1:%.*]] = bitcast <1 x i64> %b to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x i64> @@ -46,14 +46,14 @@ return vext_s64(a, b, 0); } -// CHECK-LABEL: define <16 x i8> @test_vextq_s8(<16 x i8> %a, <16 x i8> %b) #1 { +// CHECK-LABEL: define frozen <16 x i8> @test_vextq_s8(<16 x i8> frozen %a, <16 x i8> frozen %b) #1 { // CHECK: [[VEXT:%.*]] = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> // CHECK: ret <16 x i8> [[VEXT]] int8x16_t test_vextq_s8(int8x16_t a, int8x16_t b) { return vextq_s8(a, b, 2); } -// CHECK-LABEL: define <8 x i16> @test_vextq_s16(<8 x i16> %a, <8 x i16> %b) #1 { +// CHECK-LABEL: define frozen <8 x i16> @test_vextq_s16(<8 x i16> frozen %a, <8 x i16> frozen %b) #1 { // CHECK: [[TMP0:%.*]] = bitcast <8 x i16> %a to <16 x i8> // CHECK: [[TMP1:%.*]] = bitcast <8 x i16> %b to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16> @@ -64,7 +64,7 @@ return vextq_s16(a, b, 3); } -// CHECK-LABEL: define <4 x i32> @test_vextq_s32(<4 x i32> %a, <4 x i32> %b) #1 { +// CHECK-LABEL: define frozen <4 x i32> @test_vextq_s32(<4 x i32> frozen %a, <4 x i32> frozen %b) #1 { // CHECK: [[TMP0:%.*]] = bitcast <4 x i32> %a to <16 x i8> // CHECK: [[TMP1:%.*]] = bitcast <4 x i32> %b to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32> @@ -75,7 +75,7 @@ return vextq_s32(a, b, 1); } -// CHECK-LABEL: define <2 x i64> @test_vextq_s64(<2 x i64> %a, <2 x i64> %b) #1 { +// CHECK-LABEL: define frozen <2 x i64> @test_vextq_s64(<2 x i64> frozen %a, <2 x i64> frozen %b) #1 { // CHECK: [[TMP0:%.*]] = bitcast <2 x i64> %a to <16 x i8> // CHECK: [[TMP1:%.*]] = bitcast <2 x i64> %b to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64> @@ -86,14 +86,14 @@ return vextq_s64(a, b, 1); } -// CHECK-LABEL: define <8 x i8> @test_vext_u8(<8 x i8> %a, <8 x i8> %b) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vext_u8(<8 x i8> frozen %a, <8 x i8> frozen %b) #0 { // CHECK: [[VEXT:%.*]] = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> // CHECK: ret <8 x i8> [[VEXT]] uint8x8_t test_vext_u8(uint8x8_t a, uint8x8_t b) { return vext_u8(a, b, 2); } -// CHECK-LABEL: define <4 x i16> @test_vext_u16(<4 x i16> %a, <4 x i16> %b) #0 { +// CHECK-LABEL: define frozen <4 x i16> @test_vext_u16(<4 x i16> frozen %a, <4 x i16> frozen %b) #0 { // CHECK: [[TMP0:%.*]] = bitcast <4 x i16> %a to <8 x i8> // CHECK: [[TMP1:%.*]] = bitcast <4 x i16> %b to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16> @@ -104,7 +104,7 @@ return vext_u16(a, b, 3); } -// CHECK-LABEL: define <2 x i32> @test_vext_u32(<2 x i32> %a, <2 x i32> %b) #0 { +// CHECK-LABEL: define frozen <2 x i32> @test_vext_u32(<2 x i32> frozen %a, <2 x i32> frozen %b) #0 { // CHECK: [[TMP0:%.*]] = bitcast <2 x i32> %a to <8 x i8> // CHECK: [[TMP1:%.*]] = bitcast <2 x i32> %b to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32> @@ -115,7 +115,7 @@ return vext_u32(a, b, 1); } -// CHECK-LABEL: define <1 x i64> @test_vext_u64(<1 x i64> %a, <1 x i64> %b) #0 { +// CHECK-LABEL: define frozen <1 x i64> @test_vext_u64(<1 x i64> frozen %a, <1 x i64> frozen %b) #0 { // CHECK: [[TMP0:%.*]] = bitcast <1 x i64> %a to <8 x i8> // CHECK: [[TMP1:%.*]] = bitcast <1 x i64> %b to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x i64> @@ -126,14 +126,14 @@ return vext_u64(a, b, 0); } -// CHECK-LABEL: define <16 x i8> @test_vextq_u8(<16 x i8> %a, <16 x i8> %b) #1 { +// CHECK-LABEL: define frozen <16 x i8> @test_vextq_u8(<16 x i8> frozen %a, <16 x i8> frozen %b) #1 { // CHECK: [[VEXT:%.*]] = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> // CHECK: ret <16 x i8> [[VEXT]] uint8x16_t test_vextq_u8(uint8x16_t a, uint8x16_t b) { return vextq_u8(a, b, 2); } -// CHECK-LABEL: define <8 x i16> @test_vextq_u16(<8 x i16> %a, <8 x i16> %b) #1 { +// CHECK-LABEL: define frozen <8 x i16> @test_vextq_u16(<8 x i16> frozen %a, <8 x i16> frozen %b) #1 { // CHECK: [[TMP0:%.*]] = bitcast <8 x i16> %a to <16 x i8> // CHECK: [[TMP1:%.*]] = bitcast <8 x i16> %b to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16> @@ -144,7 +144,7 @@ return vextq_u16(a, b, 3); } -// CHECK-LABEL: define <4 x i32> @test_vextq_u32(<4 x i32> %a, <4 x i32> %b) #1 { +// CHECK-LABEL: define frozen <4 x i32> @test_vextq_u32(<4 x i32> frozen %a, <4 x i32> frozen %b) #1 { // CHECK: [[TMP0:%.*]] = bitcast <4 x i32> %a to <16 x i8> // CHECK: [[TMP1:%.*]] = bitcast <4 x i32> %b to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32> @@ -155,7 +155,7 @@ return vextq_u32(a, b, 1); } -// CHECK-LABEL: define <2 x i64> @test_vextq_u64(<2 x i64> %a, <2 x i64> %b) #1 { +// CHECK-LABEL: define frozen <2 x i64> @test_vextq_u64(<2 x i64> frozen %a, <2 x i64> frozen %b) #1 { // CHECK: [[TMP0:%.*]] = bitcast <2 x i64> %a to <16 x i8> // CHECK: [[TMP1:%.*]] = bitcast <2 x i64> %b to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64> @@ -166,7 +166,7 @@ return vextq_u64(a, b, 1); } -// CHECK-LABEL: define <2 x float> @test_vext_f32(<2 x float> %a, <2 x float> %b) #0 { +// CHECK-LABEL: define frozen <2 x float> @test_vext_f32(<2 x float> frozen %a, <2 x float> frozen %b) #0 { // CHECK: [[TMP0:%.*]] = bitcast <2 x float> %a to <8 x i8> // CHECK: [[TMP1:%.*]] = bitcast <2 x float> %b to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x float> @@ -177,7 +177,7 @@ return vext_f32(a, b, 1); } -// CHECK-LABEL: define <1 x double> @test_vext_f64(<1 x double> %a, <1 x double> %b) #0 { +// CHECK-LABEL: define frozen <1 x double> @test_vext_f64(<1 x double> frozen %a, <1 x double> frozen %b) #0 { // CHECK: [[TMP0:%.*]] = bitcast <1 x double> %a to <8 x i8> // CHECK: [[TMP1:%.*]] = bitcast <1 x double> %b to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x double> @@ -188,7 +188,7 @@ return vext_f64(a, b, 0); } -// CHECK-LABEL: define <4 x float> @test_vextq_f32(<4 x float> %a, <4 x float> %b) #1 { +// CHECK-LABEL: define frozen <4 x float> @test_vextq_f32(<4 x float> frozen %a, <4 x float> frozen %b) #1 { // CHECK: [[TMP0:%.*]] = bitcast <4 x float> %a to <16 x i8> // CHECK: [[TMP1:%.*]] = bitcast <4 x float> %b to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x float> @@ -199,7 +199,7 @@ return vextq_f32(a, b, 1); } -// CHECK-LABEL: define <2 x double> @test_vextq_f64(<2 x double> %a, <2 x double> %b) #1 { +// CHECK-LABEL: define frozen <2 x double> @test_vextq_f64(<2 x double> frozen %a, <2 x double> frozen %b) #1 { // CHECK: [[TMP0:%.*]] = bitcast <2 x double> %a to <16 x i8> // CHECK: [[TMP1:%.*]] = bitcast <2 x double> %b to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x double> @@ -210,14 +210,14 @@ return vextq_f64(a, b, 1); } -// CHECK-LABEL: define <8 x i8> @test_vext_p8(<8 x i8> %a, <8 x i8> %b) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vext_p8(<8 x i8> frozen %a, <8 x i8> frozen %b) #0 { // CHECK: [[VEXT:%.*]] = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> // CHECK: ret <8 x i8> [[VEXT]] poly8x8_t test_vext_p8(poly8x8_t a, poly8x8_t b) { return vext_p8(a, b, 2); } -// CHECK-LABEL: define <4 x i16> @test_vext_p16(<4 x i16> %a, <4 x i16> %b) #0 { +// CHECK-LABEL: define frozen <4 x i16> @test_vext_p16(<4 x i16> frozen %a, <4 x i16> frozen %b) #0 { // CHECK: [[TMP0:%.*]] = bitcast <4 x i16> %a to <8 x i8> // CHECK: [[TMP1:%.*]] = bitcast <4 x i16> %b to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16> @@ -228,14 +228,14 @@ return vext_p16(a, b, 3); } -// CHECK-LABEL: define <16 x i8> @test_vextq_p8(<16 x i8> %a, <16 x i8> %b) #1 { +// CHECK-LABEL: define frozen <16 x i8> @test_vextq_p8(<16 x i8> frozen %a, <16 x i8> frozen %b) #1 { // CHECK: [[VEXT:%.*]] = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> // CHECK: ret <16 x i8> [[VEXT]] poly8x16_t test_vextq_p8(poly8x16_t a, poly8x16_t b) { return vextq_p8(a, b, 2); } -// CHECK-LABEL: define <8 x i16> @test_vextq_p16(<8 x i16> %a, <8 x i16> %b) #1 { +// CHECK-LABEL: define frozen <8 x i16> @test_vextq_p16(<8 x i16> frozen %a, <8 x i16> frozen %b) #1 { // CHECK: [[TMP0:%.*]] = bitcast <8 x i16> %a to <16 x i8> // CHECK: [[TMP1:%.*]] = bitcast <8 x i16> %b to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16> diff --git a/clang/test/CodeGen/aarch64-neon-fcvt-intrinsics.c b/clang/test/CodeGen/aarch64-neon-fcvt-intrinsics.c --- a/clang/test/CodeGen/aarch64-neon-fcvt-intrinsics.c +++ b/clang/test/CodeGen/aarch64-neon-fcvt-intrinsics.c @@ -5,147 +5,147 @@ #include -// CHECK-LABEL: define float @test_vcvtxd_f32_f64(double %a) #0 { +// CHECK-LABEL: define frozen float @test_vcvtxd_f32_f64(double frozen %a) #0 { // CHECK: [[VCVTXD_F32_F64_I:%.*]] = call float @llvm.aarch64.sisd.fcvtxn(double %a) #2 // CHECK: ret float [[VCVTXD_F32_F64_I]] float32_t test_vcvtxd_f32_f64(float64_t a) { return (float32_t)vcvtxd_f32_f64(a); } -// CHECK-LABEL: define i32 @test_vcvtas_s32_f32(float %a) #0 { +// CHECK-LABEL: define frozen i32 @test_vcvtas_s32_f32(float frozen %a) #0 { // CHECK: [[VCVTAS_S32_F32_I:%.*]] = call i32 @llvm.aarch64.neon.fcvtas.i32.f32(float %a) #2 // CHECK: ret i32 [[VCVTAS_S32_F32_I]] int32_t test_vcvtas_s32_f32(float32_t a) { return (int32_t)vcvtas_s32_f32(a); } -// CHECK-LABEL: define i64 @test_test_vcvtad_s64_f64(double %a) #0 { +// CHECK-LABEL: define frozen i64 @test_test_vcvtad_s64_f64(double frozen %a) #0 { // CHECK: [[VCVTAD_S64_F64_I:%.*]] = call i64 @llvm.aarch64.neon.fcvtas.i64.f64(double %a) #2 // CHECK: ret i64 [[VCVTAD_S64_F64_I]] int64_t test_test_vcvtad_s64_f64(float64_t a) { return (int64_t)vcvtad_s64_f64(a); } -// CHECK-LABEL: define i32 @test_vcvtas_u32_f32(float %a) #0 { +// CHECK-LABEL: define frozen i32 @test_vcvtas_u32_f32(float frozen %a) #0 { // CHECK: [[VCVTAS_U32_F32_I:%.*]] = call i32 @llvm.aarch64.neon.fcvtau.i32.f32(float %a) #2 // CHECK: ret i32 [[VCVTAS_U32_F32_I]] uint32_t test_vcvtas_u32_f32(float32_t a) { return (uint32_t)vcvtas_u32_f32(a); } -// CHECK-LABEL: define i64 @test_vcvtad_u64_f64(double %a) #0 { +// CHECK-LABEL: define frozen i64 @test_vcvtad_u64_f64(double frozen %a) #0 { // CHECK: [[VCVTAD_U64_F64_I:%.*]] = call i64 @llvm.aarch64.neon.fcvtau.i64.f64(double %a) #2 // CHECK: ret i64 [[VCVTAD_U64_F64_I]] uint64_t test_vcvtad_u64_f64(float64_t a) { return (uint64_t)vcvtad_u64_f64(a); } -// CHECK-LABEL: define i32 @test_vcvtms_s32_f32(float %a) #0 { +// CHECK-LABEL: define frozen i32 @test_vcvtms_s32_f32(float frozen %a) #0 { // CHECK: [[VCVTMS_S32_F32_I:%.*]] = call i32 @llvm.aarch64.neon.fcvtms.i32.f32(float %a) #2 // CHECK: ret i32 [[VCVTMS_S32_F32_I]] int32_t test_vcvtms_s32_f32(float32_t a) { return (int32_t)vcvtms_s32_f32(a); } -// CHECK-LABEL: define i64 @test_vcvtmd_s64_f64(double %a) #0 { +// CHECK-LABEL: define frozen i64 @test_vcvtmd_s64_f64(double frozen %a) #0 { // CHECK: [[VCVTMD_S64_F64_I:%.*]] = call i64 @llvm.aarch64.neon.fcvtms.i64.f64(double %a) #2 // CHECK: ret i64 [[VCVTMD_S64_F64_I]] int64_t test_vcvtmd_s64_f64(float64_t a) { return (int64_t)vcvtmd_s64_f64(a); } -// CHECK-LABEL: define i32 @test_vcvtms_u32_f32(float %a) #0 { +// CHECK-LABEL: define frozen i32 @test_vcvtms_u32_f32(float frozen %a) #0 { // CHECK: [[VCVTMS_U32_F32_I:%.*]] = call i32 @llvm.aarch64.neon.fcvtmu.i32.f32(float %a) #2 // CHECK: ret i32 [[VCVTMS_U32_F32_I]] uint32_t test_vcvtms_u32_f32(float32_t a) { return (uint32_t)vcvtms_u32_f32(a); } -// CHECK-LABEL: define i64 @test_vcvtmd_u64_f64(double %a) #0 { +// CHECK-LABEL: define frozen i64 @test_vcvtmd_u64_f64(double frozen %a) #0 { // CHECK: [[VCVTMD_U64_F64_I:%.*]] = call i64 @llvm.aarch64.neon.fcvtmu.i64.f64(double %a) #2 // CHECK: ret i64 [[VCVTMD_U64_F64_I]] uint64_t test_vcvtmd_u64_f64(float64_t a) { return (uint64_t)vcvtmd_u64_f64(a); } -// CHECK-LABEL: define i32 @test_vcvtns_s32_f32(float %a) #0 { +// CHECK-LABEL: define frozen i32 @test_vcvtns_s32_f32(float frozen %a) #0 { // CHECK: [[VCVTNS_S32_F32_I:%.*]] = call i32 @llvm.aarch64.neon.fcvtns.i32.f32(float %a) #2 // CHECK: ret i32 [[VCVTNS_S32_F32_I]] int32_t test_vcvtns_s32_f32(float32_t a) { return (int32_t)vcvtns_s32_f32(a); } -// CHECK-LABEL: define i64 @test_vcvtnd_s64_f64(double %a) #0 { +// CHECK-LABEL: define frozen i64 @test_vcvtnd_s64_f64(double frozen %a) #0 { // CHECK: [[VCVTND_S64_F64_I:%.*]] = call i64 @llvm.aarch64.neon.fcvtns.i64.f64(double %a) #2 // CHECK: ret i64 [[VCVTND_S64_F64_I]] int64_t test_vcvtnd_s64_f64(float64_t a) { return (int64_t)vcvtnd_s64_f64(a); } -// CHECK-LABEL: define i32 @test_vcvtns_u32_f32(float %a) #0 { +// CHECK-LABEL: define frozen i32 @test_vcvtns_u32_f32(float frozen %a) #0 { // CHECK: [[VCVTNS_U32_F32_I:%.*]] = call i32 @llvm.aarch64.neon.fcvtnu.i32.f32(float %a) #2 // CHECK: ret i32 [[VCVTNS_U32_F32_I]] uint32_t test_vcvtns_u32_f32(float32_t a) { return (uint32_t)vcvtns_u32_f32(a); } -// CHECK-LABEL: define i64 @test_vcvtnd_u64_f64(double %a) #0 { +// CHECK-LABEL: define frozen i64 @test_vcvtnd_u64_f64(double frozen %a) #0 { // CHECK: [[VCVTND_U64_F64_I:%.*]] = call i64 @llvm.aarch64.neon.fcvtnu.i64.f64(double %a) #2 // CHECK: ret i64 [[VCVTND_U64_F64_I]] uint64_t test_vcvtnd_u64_f64(float64_t a) { return (uint64_t)vcvtnd_u64_f64(a); } -// CHECK-LABEL: define i32 @test_vcvtps_s32_f32(float %a) #0 { +// CHECK-LABEL: define frozen i32 @test_vcvtps_s32_f32(float frozen %a) #0 { // CHECK: [[VCVTPS_S32_F32_I:%.*]] = call i32 @llvm.aarch64.neon.fcvtps.i32.f32(float %a) #2 // CHECK: ret i32 [[VCVTPS_S32_F32_I]] int32_t test_vcvtps_s32_f32(float32_t a) { return (int32_t)vcvtps_s32_f32(a); } -// CHECK-LABEL: define i64 @test_vcvtpd_s64_f64(double %a) #0 { +// CHECK-LABEL: define frozen i64 @test_vcvtpd_s64_f64(double frozen %a) #0 { // CHECK: [[VCVTPD_S64_F64_I:%.*]] = call i64 @llvm.aarch64.neon.fcvtps.i64.f64(double %a) #2 // CHECK: ret i64 [[VCVTPD_S64_F64_I]] int64_t test_vcvtpd_s64_f64(float64_t a) { return (int64_t)vcvtpd_s64_f64(a); } -// CHECK-LABEL: define i32 @test_vcvtps_u32_f32(float %a) #0 { +// CHECK-LABEL: define frozen i32 @test_vcvtps_u32_f32(float frozen %a) #0 { // CHECK: [[VCVTPS_U32_F32_I:%.*]] = call i32 @llvm.aarch64.neon.fcvtpu.i32.f32(float %a) #2 // CHECK: ret i32 [[VCVTPS_U32_F32_I]] uint32_t test_vcvtps_u32_f32(float32_t a) { return (uint32_t)vcvtps_u32_f32(a); } -// CHECK-LABEL: define i64 @test_vcvtpd_u64_f64(double %a) #0 { +// CHECK-LABEL: define frozen i64 @test_vcvtpd_u64_f64(double frozen %a) #0 { // CHECK: [[VCVTPD_U64_F64_I:%.*]] = call i64 @llvm.aarch64.neon.fcvtpu.i64.f64(double %a) #2 // CHECK: ret i64 [[VCVTPD_U64_F64_I]] uint64_t test_vcvtpd_u64_f64(float64_t a) { return (uint64_t)vcvtpd_u64_f64(a); } -// CHECK-LABEL: define i32 @test_vcvts_s32_f32(float %a) #0 { +// CHECK-LABEL: define frozen i32 @test_vcvts_s32_f32(float frozen %a) #0 { // CHECK: [[TMP0:%.*]] = fptosi float %a to i32 // CHECK: ret i32 [[TMP0]] int32_t test_vcvts_s32_f32(float32_t a) { return (int32_t)vcvts_s32_f32(a); } -// CHECK-LABEL: define i64 @test_vcvtd_s64_f64(double %a) #0 { +// CHECK-LABEL: define frozen i64 @test_vcvtd_s64_f64(double frozen %a) #0 { // CHECK: [[TMP0:%.*]] = fptosi double %a to i64 // CHECK: ret i64 [[TMP0]] int64_t test_vcvtd_s64_f64(float64_t a) { return (int64_t)vcvtd_s64_f64(a); } -// CHECK-LABEL: define i32 @test_vcvts_u32_f32(float %a) #0 { +// CHECK-LABEL: define frozen i32 @test_vcvts_u32_f32(float frozen %a) #0 { // CHECK: [[TMP0:%.*]] = fptoui float %a to i32 // CHECK: ret i32 [[TMP0]] uint32_t test_vcvts_u32_f32(float32_t a) { return (uint32_t)vcvts_u32_f32(a); } -// CHECK-LABEL: define i64 @test_vcvtd_u64_f64(double %a) #0 { +// CHECK-LABEL: define frozen i64 @test_vcvtd_u64_f64(double frozen %a) #0 { // CHECK: [[TMP0:%.*]] = fptoui double %a to i64 // CHECK: ret i64 [[TMP0]] uint64_t test_vcvtd_u64_f64(float64_t a) { diff --git a/clang/test/CodeGen/aarch64-neon-fma.c b/clang/test/CodeGen/aarch64-neon-fma.c --- a/clang/test/CodeGen/aarch64-neon-fma.c +++ b/clang/test/CodeGen/aarch64-neon-fma.c @@ -4,7 +4,7 @@ #include -// CHECK-LABEL: define <2 x float> @test_vmla_n_f32(<2 x float> %a, <2 x float> %b, float %c) #0 { +// CHECK-LABEL: define frozen <2 x float> @test_vmla_n_f32(<2 x float> frozen %a, <2 x float> frozen %b, float frozen %c) #0 { // CHECK: [[VECINIT_I:%.*]] = insertelement <2 x float> undef, float %c, i32 0 // CHECK: [[VECINIT1_I:%.*]] = insertelement <2 x float> [[VECINIT_I]], float %c, i32 1 // CHECK: [[MUL_I:%.*]] = fmul <2 x float> %b, [[VECINIT1_I]] @@ -14,7 +14,7 @@ return vmla_n_f32(a, b, c); } -// CHECK-LABEL: define <4 x float> @test_vmlaq_n_f32(<4 x float> %a, <4 x float> %b, float %c) #1 { +// CHECK-LABEL: define frozen <4 x float> @test_vmlaq_n_f32(<4 x float> frozen %a, <4 x float> frozen %b, float frozen %c) #1 { // CHECK: [[VECINIT_I:%.*]] = insertelement <4 x float> undef, float %c, i32 0 // CHECK: [[VECINIT1_I:%.*]] = insertelement <4 x float> [[VECINIT_I]], float %c, i32 1 // CHECK: [[VECINIT2_I:%.*]] = insertelement <4 x float> [[VECINIT1_I]], float %c, i32 2 @@ -26,7 +26,7 @@ return vmlaq_n_f32(a, b, c); } -// CHECK-LABEL: define <2 x double> @test_vmlaq_n_f64(<2 x double> %a, <2 x double> %b, double %c) #1 { +// CHECK-LABEL: define frozen <2 x double> @test_vmlaq_n_f64(<2 x double> frozen %a, <2 x double> frozen %b, double frozen %c) #1 { // CHECK: [[VECINIT_I:%.*]] = insertelement <2 x double> undef, double %c, i32 0 // CHECK: [[VECINIT1_I:%.*]] = insertelement <2 x double> [[VECINIT_I]], double %c, i32 1 // CHECK: [[MUL_I:%.*]] = fmul <2 x double> %b, [[VECINIT1_I]] @@ -36,7 +36,7 @@ return vmlaq_n_f64(a, b, c); } -// CHECK-LABEL: define <4 x float> @test_vmlsq_n_f32(<4 x float> %a, <4 x float> %b, float %c) #1 { +// CHECK-LABEL: define frozen <4 x float> @test_vmlsq_n_f32(<4 x float> frozen %a, <4 x float> frozen %b, float frozen %c) #1 { // CHECK: [[VECINIT_I:%.*]] = insertelement <4 x float> undef, float %c, i32 0 // CHECK: [[VECINIT1_I:%.*]] = insertelement <4 x float> [[VECINIT_I]], float %c, i32 1 // CHECK: [[VECINIT2_I:%.*]] = insertelement <4 x float> [[VECINIT1_I]], float %c, i32 2 @@ -48,7 +48,7 @@ return vmlsq_n_f32(a, b, c); } -// CHECK-LABEL: define <2 x float> @test_vmls_n_f32(<2 x float> %a, <2 x float> %b, float %c) #0 { +// CHECK-LABEL: define frozen <2 x float> @test_vmls_n_f32(<2 x float> frozen %a, <2 x float> frozen %b, float frozen %c) #0 { // CHECK: [[VECINIT_I:%.*]] = insertelement <2 x float> undef, float %c, i32 0 // CHECK: [[VECINIT1_I:%.*]] = insertelement <2 x float> [[VECINIT_I]], float %c, i32 1 // CHECK: [[MUL_I:%.*]] = fmul <2 x float> %b, [[VECINIT1_I]] @@ -58,7 +58,7 @@ return vmls_n_f32(a, b, c); } -// CHECK-LABEL: define <2 x double> @test_vmlsq_n_f64(<2 x double> %a, <2 x double> %b, double %c) #1 { +// CHECK-LABEL: define frozen <2 x double> @test_vmlsq_n_f64(<2 x double> frozen %a, <2 x double> frozen %b, double frozen %c) #1 { // CHECK: [[VECINIT_I:%.*]] = insertelement <2 x double> undef, double %c, i32 0 // CHECK: [[VECINIT1_I:%.*]] = insertelement <2 x double> [[VECINIT_I]], double %c, i32 1 // CHECK: [[MUL_I:%.*]] = fmul <2 x double> %b, [[VECINIT1_I]] @@ -68,7 +68,7 @@ return vmlsq_n_f64(a, b, c); } -// CHECK-LABEL: define <2 x float> @test_vmla_lane_f32_0(<2 x float> %a, <2 x float> %b, <2 x float> %v) #0 { +// CHECK-LABEL: define frozen <2 x float> @test_vmla_lane_f32_0(<2 x float> frozen %a, <2 x float> frozen %b, <2 x float> frozen %v) #0 { // CHECK: [[TMP0:%.*]] = bitcast <2 x float> [[V:%.*]] to <8 x i8> // CHECK: [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x float> // CHECK: [[LANE:%.*]] = shufflevector <2 x float> [[TMP1]], <2 x float> [[TMP1]], <2 x i32> zeroinitializer @@ -79,7 +79,7 @@ return vmla_lane_f32(a, b, v, 0); } -// CHECK-LABEL: define <4 x float> @test_vmlaq_lane_f32_0(<4 x float> %a, <4 x float> %b, <2 x float> %v) #1 { +// CHECK-LABEL: define frozen <4 x float> @test_vmlaq_lane_f32_0(<4 x float> frozen %a, <4 x float> frozen %b, <2 x float> frozen %v) #1 { // CHECK: [[TMP0:%.*]] = bitcast <2 x float> [[V:%.*]] to <8 x i8> // CHECK: [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x float> // CHECK: [[LANE:%.*]] = shufflevector <2 x float> [[TMP1]], <2 x float> [[TMP1]], <4 x i32> zeroinitializer @@ -90,7 +90,7 @@ return vmlaq_lane_f32(a, b, v, 0); } -// CHECK-LABEL: define <2 x float> @test_vmla_laneq_f32_0(<2 x float> %a, <2 x float> %b, <4 x float> %v) #1 { +// CHECK-LABEL: define frozen <2 x float> @test_vmla_laneq_f32_0(<2 x float> frozen %a, <2 x float> frozen %b, <4 x float> frozen %v) #1 { // CHECK: [[TMP0:%.*]] = bitcast <4 x float> [[V:%.*]] to <16 x i8> // CHECK: [[TMP1:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x float> // CHECK: [[LANE:%.*]] = shufflevector <4 x float> [[TMP1]], <4 x float> [[TMP1]], <2 x i32> zeroinitializer @@ -101,7 +101,7 @@ return vmla_laneq_f32(a, b, v, 0); } -// CHECK-LABEL: define <4 x float> @test_vmlaq_laneq_f32_0(<4 x float> %a, <4 x float> %b, <4 x float> %v) #1 { +// CHECK-LABEL: define frozen <4 x float> @test_vmlaq_laneq_f32_0(<4 x float> frozen %a, <4 x float> frozen %b, <4 x float> frozen %v) #1 { // CHECK: [[TMP0:%.*]] = bitcast <4 x float> [[V:%.*]] to <16 x i8> // CHECK: [[TMP1:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x float> // CHECK: [[LANE:%.*]] = shufflevector <4 x float> [[TMP1]], <4 x float> [[TMP1]], <4 x i32> zeroinitializer @@ -112,7 +112,7 @@ return vmlaq_laneq_f32(a, b, v, 0); } -// CHECK-LABEL: define <2 x float> @test_vmls_lane_f32_0(<2 x float> %a, <2 x float> %b, <2 x float> %v) #0 { +// CHECK-LABEL: define frozen <2 x float> @test_vmls_lane_f32_0(<2 x float> frozen %a, <2 x float> frozen %b, <2 x float> frozen %v) #0 { // CHECK: [[TMP0:%.*]] = bitcast <2 x float> [[V:%.*]] to <8 x i8> // CHECK: [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x float> // CHECK: [[LANE:%.*]] = shufflevector <2 x float> [[TMP1]], <2 x float> [[TMP1]], <2 x i32> zeroinitializer @@ -123,7 +123,7 @@ return vmls_lane_f32(a, b, v, 0); } -// CHECK-LABEL: define <4 x float> @test_vmlsq_lane_f32_0(<4 x float> %a, <4 x float> %b, <2 x float> %v) #1 { +// CHECK-LABEL: define frozen <4 x float> @test_vmlsq_lane_f32_0(<4 x float> frozen %a, <4 x float> frozen %b, <2 x float> frozen %v) #1 { // CHECK: [[TMP0:%.*]] = bitcast <2 x float> [[V:%.*]] to <8 x i8> // CHECK: [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x float> // CHECK: [[LANE:%.*]] = shufflevector <2 x float> [[TMP1]], <2 x float> [[TMP1]], <4 x i32> zeroinitializer @@ -134,7 +134,7 @@ return vmlsq_lane_f32(a, b, v, 0); } -// CHECK-LABEL: define <2 x float> @test_vmls_laneq_f32_0(<2 x float> %a, <2 x float> %b, <4 x float> %v) #1 { +// CHECK-LABEL: define frozen <2 x float> @test_vmls_laneq_f32_0(<2 x float> frozen %a, <2 x float> frozen %b, <4 x float> frozen %v) #1 { // CHECK: [[TMP0:%.*]] = bitcast <4 x float> [[V:%.*]] to <16 x i8> // CHECK: [[TMP1:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x float> // CHECK: [[LANE:%.*]] = shufflevector <4 x float> [[TMP1]], <4 x float> [[TMP1]], <2 x i32> zeroinitializer @@ -145,7 +145,7 @@ return vmls_laneq_f32(a, b, v, 0); } -// CHECK-LABEL: define <4 x float> @test_vmlsq_laneq_f32_0(<4 x float> %a, <4 x float> %b, <4 x float> %v) #1 { +// CHECK-LABEL: define frozen <4 x float> @test_vmlsq_laneq_f32_0(<4 x float> frozen %a, <4 x float> frozen %b, <4 x float> frozen %v) #1 { // CHECK: [[TMP0:%.*]] = bitcast <4 x float> [[V:%.*]] to <16 x i8> // CHECK: [[TMP1:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x float> // CHECK: [[LANE:%.*]] = shufflevector <4 x float> [[TMP1]], <4 x float> [[TMP1]], <4 x i32> zeroinitializer @@ -156,7 +156,7 @@ return vmlsq_laneq_f32(a, b, v, 0); } -// CHECK-LABEL: define <2 x float> @test_vmla_lane_f32(<2 x float> %a, <2 x float> %b, <2 x float> %v) #0 { +// CHECK-LABEL: define frozen <2 x float> @test_vmla_lane_f32(<2 x float> frozen %a, <2 x float> frozen %b, <2 x float> frozen %v) #0 { // CHECK: [[TMP0:%.*]] = bitcast <2 x float> [[V:%.*]] to <8 x i8> // CHECK: [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x float> // CHECK: [[LANE:%.*]] = shufflevector <2 x float> [[TMP1]], <2 x float> [[TMP1]], <2 x i32> @@ -167,7 +167,7 @@ return vmla_lane_f32(a, b, v, 1); } -// CHECK-LABEL: define <4 x float> @test_vmlaq_lane_f32(<4 x float> %a, <4 x float> %b, <2 x float> %v) #1 { +// CHECK-LABEL: define frozen <4 x float> @test_vmlaq_lane_f32(<4 x float> frozen %a, <4 x float> frozen %b, <2 x float> frozen %v) #1 { // CHECK: [[TMP0:%.*]] = bitcast <2 x float> [[V:%.*]] to <8 x i8> // CHECK: [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x float> // CHECK: [[LANE:%.*]] = shufflevector <2 x float> [[TMP1]], <2 x float> [[TMP1]], <4 x i32> @@ -178,7 +178,7 @@ return vmlaq_lane_f32(a, b, v, 1); } -// CHECK-LABEL: define <2 x float> @test_vmla_laneq_f32(<2 x float> %a, <2 x float> %b, <4 x float> %v) #1 { +// CHECK-LABEL: define frozen <2 x float> @test_vmla_laneq_f32(<2 x float> frozen %a, <2 x float> frozen %b, <4 x float> frozen %v) #1 { // CHECK: [[TMP0:%.*]] = bitcast <4 x float> [[V:%.*]] to <16 x i8> // CHECK: [[TMP1:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x float> // CHECK: [[LANE:%.*]] = shufflevector <4 x float> [[TMP1]], <4 x float> [[TMP1]], <2 x i32> @@ -189,7 +189,7 @@ return vmla_laneq_f32(a, b, v, 3); } -// CHECK-LABEL: define <4 x float> @test_vmlaq_laneq_f32(<4 x float> %a, <4 x float> %b, <4 x float> %v) #1 { +// CHECK-LABEL: define frozen <4 x float> @test_vmlaq_laneq_f32(<4 x float> frozen %a, <4 x float> frozen %b, <4 x float> frozen %v) #1 { // CHECK: [[TMP0:%.*]] = bitcast <4 x float> [[V:%.*]] to <16 x i8> // CHECK: [[TMP1:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x float> // CHECK: [[LANE:%.*]] = shufflevector <4 x float> [[TMP1]], <4 x float> [[TMP1]], <4 x i32> @@ -200,7 +200,7 @@ return vmlaq_laneq_f32(a, b, v, 3); } -// CHECK-LABEL: define <2 x float> @test_vmls_lane_f32(<2 x float> %a, <2 x float> %b, <2 x float> %v) #0 { +// CHECK-LABEL: define frozen <2 x float> @test_vmls_lane_f32(<2 x float> frozen %a, <2 x float> frozen %b, <2 x float> frozen %v) #0 { // CHECK: [[TMP0:%.*]] = bitcast <2 x float> [[V:%.*]] to <8 x i8> // CHECK: [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x float> // CHECK: [[LANE:%.*]] = shufflevector <2 x float> [[TMP1]], <2 x float> [[TMP1]], <2 x i32> @@ -211,7 +211,7 @@ return vmls_lane_f32(a, b, v, 1); } -// CHECK-LABEL: define <4 x float> @test_vmlsq_lane_f32(<4 x float> %a, <4 x float> %b, <2 x float> %v) #1 { +// CHECK-LABEL: define frozen <4 x float> @test_vmlsq_lane_f32(<4 x float> frozen %a, <4 x float> frozen %b, <2 x float> frozen %v) #1 { // CHECK: [[TMP0:%.*]] = bitcast <2 x float> [[V:%.*]] to <8 x i8> // CHECK: [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x float> // CHECK: [[LANE:%.*]] = shufflevector <2 x float> [[TMP1]], <2 x float> [[TMP1]], <4 x i32> @@ -222,7 +222,7 @@ float32x4_t test_vmlsq_lane_f32(float32x4_t a, float32x4_t b, float32x2_t v) { return vmlsq_lane_f32(a, b, v, 1); } -// CHECK-LABEL: define <2 x float> @test_vmls_laneq_f32(<2 x float> %a, <2 x float> %b, <4 x float> %v) #1 { +// CHECK-LABEL: define frozen <2 x float> @test_vmls_laneq_f32(<2 x float> frozen %a, <2 x float> frozen %b, <4 x float> frozen %v) #1 { // CHECK: [[TMP0:%.*]] = bitcast <4 x float> [[V:%.*]] to <16 x i8> // CHECK: [[TMP1:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x float> // CHECK: [[LANE:%.*]] = shufflevector <4 x float> [[TMP1]], <4 x float> [[TMP1]], <2 x i32> @@ -233,7 +233,7 @@ return vmls_laneq_f32(a, b, v, 3); } -// CHECK-LABEL: define <4 x float> @test_vmlsq_laneq_f32(<4 x float> %a, <4 x float> %b, <4 x float> %v) #1 { +// CHECK-LABEL: define frozen <4 x float> @test_vmlsq_laneq_f32(<4 x float> frozen %a, <4 x float> frozen %b, <4 x float> frozen %v) #1 { // CHECK: [[TMP0:%.*]] = bitcast <4 x float> [[V:%.*]] to <16 x i8> // CHECK: [[TMP1:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x float> // CHECK: [[LANE:%.*]] = shufflevector <4 x float> [[TMP1]], <4 x float> [[TMP1]], <4 x i32> @@ -244,7 +244,7 @@ return vmlsq_laneq_f32(a, b, v, 3); } -// CHECK-LABEL: define <2 x double> @test_vfmaq_n_f64(<2 x double> %a, <2 x double> %b, double %c) #1 { +// CHECK-LABEL: define frozen <2 x double> @test_vfmaq_n_f64(<2 x double> frozen %a, <2 x double> frozen %b, double frozen %c) #1 { // CHECK: [[VECINIT_I:%.*]] = insertelement <2 x double> undef, double %c, i32 0 // CHECK: [[VECINIT1_I:%.*]] = insertelement <2 x double> [[VECINIT_I]], double %c, i32 1 // CHECK: [[TMP6:%.*]] = call <2 x double> @llvm.fma.v2f64(<2 x double> %b, <2 x double> [[VECINIT1_I]], <2 x double> %a) @@ -253,7 +253,7 @@ return vfmaq_n_f64(a, b, c); } -// CHECK-LABEL: define <2 x double> @test_vfmsq_n_f64(<2 x double> %a, <2 x double> %b, double %c) #1 { +// CHECK-LABEL: define frozen <2 x double> @test_vfmsq_n_f64(<2 x double> frozen %a, <2 x double> frozen %b, double frozen %c) #1 { // CHECK: [[SUB_I:%.*]] = fneg <2 x double> %b // CHECK: [[VECINIT_I:%.*]] = insertelement <2 x double> undef, double %c, i32 0 // CHECK: [[VECINIT1_I:%.*]] = insertelement <2 x double> [[VECINIT_I]], double %c, i32 1 diff --git a/clang/test/CodeGen/aarch64-neon-ldst-one.c b/clang/test/CodeGen/aarch64-neon-ldst-one.c --- a/clang/test/CodeGen/aarch64-neon-ldst-one.c +++ b/clang/test/CodeGen/aarch64-neon-ldst-one.c @@ -4,7 +4,7 @@ #include -// CHECK-LABEL: define <16 x i8> @test_vld1q_dup_u8(i8* %a) #0 { +// CHECK-LABEL: define frozen <16 x i8> @test_vld1q_dup_u8(i8* frozen %a) #0 { // CHECK: [[TMP0:%.*]] = load i8, i8* %a // CHECK: [[TMP1:%.*]] = insertelement <16 x i8> undef, i8 [[TMP0]], i32 0 // CHECK: [[LANE:%.*]] = shufflevector <16 x i8> [[TMP1]], <16 x i8> [[TMP1]], <16 x i32> zeroinitializer @@ -13,7 +13,7 @@ return vld1q_dup_u8(a); } -// CHECK-LABEL: define <8 x i16> @test_vld1q_dup_u16(i16* %a) #0 { +// CHECK-LABEL: define frozen <8 x i16> @test_vld1q_dup_u16(i16* frozen %a) #0 { // CHECK: [[TMP0:%.*]] = bitcast i16* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i16* // CHECK: [[TMP2:%.*]] = load i16, i16* [[TMP1]] @@ -24,7 +24,7 @@ return vld1q_dup_u16(a); } -// CHECK-LABEL: define <4 x i32> @test_vld1q_dup_u32(i32* %a) #0 { +// CHECK-LABEL: define frozen <4 x i32> @test_vld1q_dup_u32(i32* frozen %a) #0 { // CHECK: [[TMP0:%.*]] = bitcast i32* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i32* // CHECK: [[TMP2:%.*]] = load i32, i32* [[TMP1]] @@ -35,7 +35,7 @@ return vld1q_dup_u32(a); } -// CHECK-LABEL: define <2 x i64> @test_vld1q_dup_u64(i64* %a) #0 { +// CHECK-LABEL: define frozen <2 x i64> @test_vld1q_dup_u64(i64* frozen %a) #0 { // CHECK: [[TMP0:%.*]] = bitcast i64* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i64* // CHECK: [[TMP2:%.*]] = load i64, i64* [[TMP1]] @@ -46,7 +46,7 @@ return vld1q_dup_u64(a); } -// CHECK-LABEL: define <16 x i8> @test_vld1q_dup_s8(i8* %a) #0 { +// CHECK-LABEL: define frozen <16 x i8> @test_vld1q_dup_s8(i8* frozen %a) #0 { // CHECK: [[TMP0:%.*]] = load i8, i8* %a // CHECK: [[TMP1:%.*]] = insertelement <16 x i8> undef, i8 [[TMP0]], i32 0 // CHECK: [[LANE:%.*]] = shufflevector <16 x i8> [[TMP1]], <16 x i8> [[TMP1]], <16 x i32> zeroinitializer @@ -55,7 +55,7 @@ return vld1q_dup_s8(a); } -// CHECK-LABEL: define <8 x i16> @test_vld1q_dup_s16(i16* %a) #0 { +// CHECK-LABEL: define frozen <8 x i16> @test_vld1q_dup_s16(i16* frozen %a) #0 { // CHECK: [[TMP0:%.*]] = bitcast i16* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i16* // CHECK: [[TMP2:%.*]] = load i16, i16* [[TMP1]] @@ -66,7 +66,7 @@ return vld1q_dup_s16(a); } -// CHECK-LABEL: define <4 x i32> @test_vld1q_dup_s32(i32* %a) #0 { +// CHECK-LABEL: define frozen <4 x i32> @test_vld1q_dup_s32(i32* frozen %a) #0 { // CHECK: [[TMP0:%.*]] = bitcast i32* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i32* // CHECK: [[TMP2:%.*]] = load i32, i32* [[TMP1]] @@ -77,7 +77,7 @@ return vld1q_dup_s32(a); } -// CHECK-LABEL: define <2 x i64> @test_vld1q_dup_s64(i64* %a) #0 { +// CHECK-LABEL: define frozen <2 x i64> @test_vld1q_dup_s64(i64* frozen %a) #0 { // CHECK: [[TMP0:%.*]] = bitcast i64* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i64* // CHECK: [[TMP2:%.*]] = load i64, i64* [[TMP1]] @@ -88,7 +88,7 @@ return vld1q_dup_s64(a); } -// CHECK-LABEL: define <8 x half> @test_vld1q_dup_f16(half* %a) #0 { +// CHECK-LABEL: define frozen <8 x half> @test_vld1q_dup_f16(half* frozen %a) #0 { // CHECK: [[TMP0:%.*]] = bitcast half* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to half* // CHECK: [[TMP2:%.*]] = load half, half* [[TMP1]] @@ -99,7 +99,7 @@ return vld1q_dup_f16(a); } -// CHECK-LABEL: define <4 x float> @test_vld1q_dup_f32(float* %a) #0 { +// CHECK-LABEL: define frozen <4 x float> @test_vld1q_dup_f32(float* frozen %a) #0 { // CHECK: [[TMP0:%.*]] = bitcast float* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to float* // CHECK: [[TMP2:%.*]] = load float, float* [[TMP1]] @@ -110,7 +110,7 @@ return vld1q_dup_f32(a); } -// CHECK-LABEL: define <2 x double> @test_vld1q_dup_f64(double* %a) #0 { +// CHECK-LABEL: define frozen <2 x double> @test_vld1q_dup_f64(double* frozen %a) #0 { // CHECK: [[TMP0:%.*]] = bitcast double* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to double* // CHECK: [[TMP2:%.*]] = load double, double* [[TMP1]] @@ -121,7 +121,7 @@ return vld1q_dup_f64(a); } -// CHECK-LABEL: define <16 x i8> @test_vld1q_dup_p8(i8* %a) #0 { +// CHECK-LABEL: define frozen <16 x i8> @test_vld1q_dup_p8(i8* frozen %a) #0 { // CHECK: [[TMP0:%.*]] = load i8, i8* %a // CHECK: [[TMP1:%.*]] = insertelement <16 x i8> undef, i8 [[TMP0]], i32 0 // CHECK: [[LANE:%.*]] = shufflevector <16 x i8> [[TMP1]], <16 x i8> [[TMP1]], <16 x i32> zeroinitializer @@ -130,7 +130,7 @@ return vld1q_dup_p8(a); } -// CHECK-LABEL: define <8 x i16> @test_vld1q_dup_p16(i16* %a) #0 { +// CHECK-LABEL: define frozen <8 x i16> @test_vld1q_dup_p16(i16* frozen %a) #0 { // CHECK: [[TMP0:%.*]] = bitcast i16* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i16* // CHECK: [[TMP2:%.*]] = load i16, i16* [[TMP1]] @@ -141,7 +141,7 @@ return vld1q_dup_p16(a); } -// CHECK-LABEL: define <2 x i64> @test_vld1q_dup_p64(i64* %a) #0 { +// CHECK-LABEL: define frozen <2 x i64> @test_vld1q_dup_p64(i64* frozen %a) #0 { // CHECK: [[TMP0:%.*]] = bitcast i64* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i64* // CHECK: [[TMP2:%.*]] = load i64, i64* [[TMP1]] @@ -152,7 +152,7 @@ return vld1q_dup_p64(a); } -// CHECK-LABEL: define <8 x i8> @test_vld1_dup_u8(i8* %a) #1 { +// CHECK-LABEL: define frozen <8 x i8> @test_vld1_dup_u8(i8* frozen %a) #1 { // CHECK: [[TMP0:%.*]] = load i8, i8* %a // CHECK: [[TMP1:%.*]] = insertelement <8 x i8> undef, i8 [[TMP0]], i32 0 // CHECK: [[LANE:%.*]] = shufflevector <8 x i8> [[TMP1]], <8 x i8> [[TMP1]], <8 x i32> zeroinitializer @@ -161,7 +161,7 @@ return vld1_dup_u8(a); } -// CHECK-LABEL: define <4 x i16> @test_vld1_dup_u16(i16* %a) #1 { +// CHECK-LABEL: define frozen <4 x i16> @test_vld1_dup_u16(i16* frozen %a) #1 { // CHECK: [[TMP0:%.*]] = bitcast i16* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i16* // CHECK: [[TMP2:%.*]] = load i16, i16* [[TMP1]] @@ -172,7 +172,7 @@ return vld1_dup_u16(a); } -// CHECK-LABEL: define <2 x i32> @test_vld1_dup_u32(i32* %a) #1 { +// CHECK-LABEL: define frozen <2 x i32> @test_vld1_dup_u32(i32* frozen %a) #1 { // CHECK: [[TMP0:%.*]] = bitcast i32* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i32* // CHECK: [[TMP2:%.*]] = load i32, i32* [[TMP1]] @@ -183,7 +183,7 @@ return vld1_dup_u32(a); } -// CHECK-LABEL: define <1 x i64> @test_vld1_dup_u64(i64* %a) #1 { +// CHECK-LABEL: define frozen <1 x i64> @test_vld1_dup_u64(i64* frozen %a) #1 { // CHECK: [[TMP0:%.*]] = bitcast i64* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i64* // CHECK: [[TMP2:%.*]] = load i64, i64* [[TMP1]] @@ -194,7 +194,7 @@ return vld1_dup_u64(a); } -// CHECK-LABEL: define <8 x i8> @test_vld1_dup_s8(i8* %a) #1 { +// CHECK-LABEL: define frozen <8 x i8> @test_vld1_dup_s8(i8* frozen %a) #1 { // CHECK: [[TMP0:%.*]] = load i8, i8* %a // CHECK: [[TMP1:%.*]] = insertelement <8 x i8> undef, i8 [[TMP0]], i32 0 // CHECK: [[LANE:%.*]] = shufflevector <8 x i8> [[TMP1]], <8 x i8> [[TMP1]], <8 x i32> zeroinitializer @@ -203,7 +203,7 @@ return vld1_dup_s8(a); } -// CHECK-LABEL: define <4 x i16> @test_vld1_dup_s16(i16* %a) #1 { +// CHECK-LABEL: define frozen <4 x i16> @test_vld1_dup_s16(i16* frozen %a) #1 { // CHECK: [[TMP0:%.*]] = bitcast i16* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i16* // CHECK: [[TMP2:%.*]] = load i16, i16* [[TMP1]] @@ -214,7 +214,7 @@ return vld1_dup_s16(a); } -// CHECK-LABEL: define <2 x i32> @test_vld1_dup_s32(i32* %a) #1 { +// CHECK-LABEL: define frozen <2 x i32> @test_vld1_dup_s32(i32* frozen %a) #1 { // CHECK: [[TMP0:%.*]] = bitcast i32* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i32* // CHECK: [[TMP2:%.*]] = load i32, i32* [[TMP1]] @@ -225,7 +225,7 @@ return vld1_dup_s32(a); } -// CHECK-LABEL: define <1 x i64> @test_vld1_dup_s64(i64* %a) #1 { +// CHECK-LABEL: define frozen <1 x i64> @test_vld1_dup_s64(i64* frozen %a) #1 { // CHECK: [[TMP0:%.*]] = bitcast i64* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i64* // CHECK: [[TMP2:%.*]] = load i64, i64* [[TMP1]] @@ -236,7 +236,7 @@ return vld1_dup_s64(a); } -// CHECK-LABEL: define <4 x half> @test_vld1_dup_f16(half* %a) #1 { +// CHECK-LABEL: define frozen <4 x half> @test_vld1_dup_f16(half* frozen %a) #1 { // CHECK: [[TMP0:%.*]] = bitcast half* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to half* // CHECK: [[TMP2:%.*]] = load half, half* [[TMP1]] @@ -247,7 +247,7 @@ return vld1_dup_f16(a); } -// CHECK-LABEL: define <2 x float> @test_vld1_dup_f32(float* %a) #1 { +// CHECK-LABEL: define frozen <2 x float> @test_vld1_dup_f32(float* frozen %a) #1 { // CHECK: [[TMP0:%.*]] = bitcast float* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to float* // CHECK: [[TMP2:%.*]] = load float, float* [[TMP1]] @@ -258,7 +258,7 @@ return vld1_dup_f32(a); } -// CHECK-LABEL: define <1 x double> @test_vld1_dup_f64(double* %a) #1 { +// CHECK-LABEL: define frozen <1 x double> @test_vld1_dup_f64(double* frozen %a) #1 { // CHECK: [[TMP0:%.*]] = bitcast double* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to double* // CHECK: [[TMP2:%.*]] = load double, double* [[TMP1]] @@ -269,7 +269,7 @@ return vld1_dup_f64(a); } -// CHECK-LABEL: define <8 x i8> @test_vld1_dup_p8(i8* %a) #1 { +// CHECK-LABEL: define frozen <8 x i8> @test_vld1_dup_p8(i8* frozen %a) #1 { // CHECK: [[TMP0:%.*]] = load i8, i8* %a // CHECK: [[TMP1:%.*]] = insertelement <8 x i8> undef, i8 [[TMP0]], i32 0 // CHECK: [[LANE:%.*]] = shufflevector <8 x i8> [[TMP1]], <8 x i8> [[TMP1]], <8 x i32> zeroinitializer @@ -278,7 +278,7 @@ return vld1_dup_p8(a); } -// CHECK-LABEL: define <4 x i16> @test_vld1_dup_p16(i16* %a) #1 { +// CHECK-LABEL: define frozen <4 x i16> @test_vld1_dup_p16(i16* frozen %a) #1 { // CHECK: [[TMP0:%.*]] = bitcast i16* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i16* // CHECK: [[TMP2:%.*]] = load i16, i16* [[TMP1]] @@ -289,7 +289,7 @@ return vld1_dup_p16(a); } -// CHECK-LABEL: define <1 x i64> @test_vld1_dup_p64(i64* %a) #1 { +// CHECK-LABEL: define frozen <1 x i64> @test_vld1_dup_p64(i64* frozen %a) #1 { // CHECK: [[TMP0:%.*]] = bitcast i64* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i64* // CHECK: [[TMP2:%.*]] = load i64, i64* [[TMP1]] @@ -300,7 +300,7 @@ return vld1_dup_p64(a); } -// CHECK-LABEL: define %struct.uint64x2x2_t @test_vld2q_dup_u64(i64* %a) #2 { +// CHECK-LABEL: define %struct.uint64x2x2_t @test_vld2q_dup_u64(i64* frozen %a) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.uint64x2x2_t, align 16 // CHECK: [[__RET:%.*]] = alloca %struct.uint64x2x2_t, align 16 // CHECK: [[TMP0:%.*]] = bitcast %struct.uint64x2x2_t* [[__RET]] to i8* @@ -318,7 +318,7 @@ return vld2q_dup_u64(a); } -// CHECK-LABEL: define %struct.int64x2x2_t @test_vld2q_dup_s64(i64* %a) #2 { +// CHECK-LABEL: define %struct.int64x2x2_t @test_vld2q_dup_s64(i64* frozen %a) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.int64x2x2_t, align 16 // CHECK: [[__RET:%.*]] = alloca %struct.int64x2x2_t, align 16 // CHECK: [[TMP0:%.*]] = bitcast %struct.int64x2x2_t* [[__RET]] to i8* @@ -336,7 +336,7 @@ return vld2q_dup_s64(a); } -// CHECK-LABEL: define %struct.float64x2x2_t @test_vld2q_dup_f64(double* %a) #2 { +// CHECK-LABEL: define %struct.float64x2x2_t @test_vld2q_dup_f64(double* frozen %a) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.float64x2x2_t, align 16 // CHECK: [[__RET:%.*]] = alloca %struct.float64x2x2_t, align 16 // CHECK: [[TMP0:%.*]] = bitcast %struct.float64x2x2_t* [[__RET]] to i8* @@ -354,7 +354,7 @@ return vld2q_dup_f64(a); } -// CHECK-LABEL: define %struct.poly64x2x2_t @test_vld2q_dup_p64(i64* %a) #2 { +// CHECK-LABEL: define %struct.poly64x2x2_t @test_vld2q_dup_p64(i64* frozen %a) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.poly64x2x2_t, align 16 // CHECK: [[__RET:%.*]] = alloca %struct.poly64x2x2_t, align 16 // CHECK: [[TMP0:%.*]] = bitcast %struct.poly64x2x2_t* [[__RET]] to i8* @@ -372,7 +372,7 @@ return vld2q_dup_p64(a); } -// CHECK-LABEL: define %struct.float64x1x2_t @test_vld2_dup_f64(double* %a) #2 { +// CHECK-LABEL: define %struct.float64x1x2_t @test_vld2_dup_f64(double* frozen %a) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.float64x1x2_t, align 8 // CHECK: [[__RET:%.*]] = alloca %struct.float64x1x2_t, align 8 // CHECK: [[TMP0:%.*]] = bitcast %struct.float64x1x2_t* [[__RET]] to i8* @@ -390,7 +390,7 @@ return vld2_dup_f64(a); } -// CHECK-LABEL: define %struct.poly64x1x2_t @test_vld2_dup_p64(i64* %a) #2 { +// CHECK-LABEL: define %struct.poly64x1x2_t @test_vld2_dup_p64(i64* frozen %a) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.poly64x1x2_t, align 8 // CHECK: [[__RET:%.*]] = alloca %struct.poly64x1x2_t, align 8 // CHECK: [[TMP0:%.*]] = bitcast %struct.poly64x1x2_t* [[__RET]] to i8* @@ -408,7 +408,7 @@ return vld2_dup_p64(a); } -// CHECK-LABEL: define %struct.uint64x2x3_t @test_vld3q_dup_u64(i64* %a) #2 { +// CHECK-LABEL: define %struct.uint64x2x3_t @test_vld3q_dup_u64(i64* frozen %a) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.uint64x2x3_t, align 16 // CHECK: [[__RET:%.*]] = alloca %struct.uint64x2x3_t, align 16 // CHECK: [[TMP0:%.*]] = bitcast %struct.uint64x2x3_t* [[__RET]] to i8* @@ -427,7 +427,7 @@ // [{{x[0-9]+|sp}}] } -// CHECK-LABEL: define %struct.int64x2x3_t @test_vld3q_dup_s64(i64* %a) #2 { +// CHECK-LABEL: define %struct.int64x2x3_t @test_vld3q_dup_s64(i64* frozen %a) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.int64x2x3_t, align 16 // CHECK: [[__RET:%.*]] = alloca %struct.int64x2x3_t, align 16 // CHECK: [[TMP0:%.*]] = bitcast %struct.int64x2x3_t* [[__RET]] to i8* @@ -446,7 +446,7 @@ // [{{x[0-9]+|sp}}] } -// CHECK-LABEL: define %struct.float64x2x3_t @test_vld3q_dup_f64(double* %a) #2 { +// CHECK-LABEL: define %struct.float64x2x3_t @test_vld3q_dup_f64(double* frozen %a) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.float64x2x3_t, align 16 // CHECK: [[__RET:%.*]] = alloca %struct.float64x2x3_t, align 16 // CHECK: [[TMP0:%.*]] = bitcast %struct.float64x2x3_t* [[__RET]] to i8* @@ -465,7 +465,7 @@ // [{{x[0-9]+|sp}}] } -// CHECK-LABEL: define %struct.poly64x2x3_t @test_vld3q_dup_p64(i64* %a) #2 { +// CHECK-LABEL: define %struct.poly64x2x3_t @test_vld3q_dup_p64(i64* frozen %a) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.poly64x2x3_t, align 16 // CHECK: [[__RET:%.*]] = alloca %struct.poly64x2x3_t, align 16 // CHECK: [[TMP0:%.*]] = bitcast %struct.poly64x2x3_t* [[__RET]] to i8* @@ -484,7 +484,7 @@ // [{{x[0-9]+|sp}}] } -// CHECK-LABEL: define %struct.float64x1x3_t @test_vld3_dup_f64(double* %a) #2 { +// CHECK-LABEL: define %struct.float64x1x3_t @test_vld3_dup_f64(double* frozen %a) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.float64x1x3_t, align 8 // CHECK: [[__RET:%.*]] = alloca %struct.float64x1x3_t, align 8 // CHECK: [[TMP0:%.*]] = bitcast %struct.float64x1x3_t* [[__RET]] to i8* @@ -503,7 +503,7 @@ // [{{x[0-9]+|sp}}] } -// CHECK-LABEL: define %struct.poly64x1x3_t @test_vld3_dup_p64(i64* %a) #2 { +// CHECK-LABEL: define %struct.poly64x1x3_t @test_vld3_dup_p64(i64* frozen %a) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.poly64x1x3_t, align 8 // CHECK: [[__RET:%.*]] = alloca %struct.poly64x1x3_t, align 8 // CHECK: [[TMP0:%.*]] = bitcast %struct.poly64x1x3_t* [[__RET]] to i8* @@ -522,7 +522,7 @@ // [{{x[0-9]+|sp}}] } -// CHECK-LABEL: define %struct.uint64x2x4_t @test_vld4q_dup_u64(i64* %a) #2 { +// CHECK-LABEL: define %struct.uint64x2x4_t @test_vld4q_dup_u64(i64* frozen %a) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.uint64x2x4_t, align 16 // CHECK: [[__RET:%.*]] = alloca %struct.uint64x2x4_t, align 16 // CHECK: [[TMP0:%.*]] = bitcast %struct.uint64x2x4_t* [[__RET]] to i8* @@ -540,7 +540,7 @@ return vld4q_dup_u64(a); } -// CHECK-LABEL: define %struct.int64x2x4_t @test_vld4q_dup_s64(i64* %a) #2 { +// CHECK-LABEL: define %struct.int64x2x4_t @test_vld4q_dup_s64(i64* frozen %a) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.int64x2x4_t, align 16 // CHECK: [[__RET:%.*]] = alloca %struct.int64x2x4_t, align 16 // CHECK: [[TMP0:%.*]] = bitcast %struct.int64x2x4_t* [[__RET]] to i8* @@ -558,7 +558,7 @@ return vld4q_dup_s64(a); } -// CHECK-LABEL: define %struct.float64x2x4_t @test_vld4q_dup_f64(double* %a) #2 { +// CHECK-LABEL: define %struct.float64x2x4_t @test_vld4q_dup_f64(double* frozen %a) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.float64x2x4_t, align 16 // CHECK: [[__RET:%.*]] = alloca %struct.float64x2x4_t, align 16 // CHECK: [[TMP0:%.*]] = bitcast %struct.float64x2x4_t* [[__RET]] to i8* @@ -576,7 +576,7 @@ return vld4q_dup_f64(a); } -// CHECK-LABEL: define %struct.poly64x2x4_t @test_vld4q_dup_p64(i64* %a) #2 { +// CHECK-LABEL: define %struct.poly64x2x4_t @test_vld4q_dup_p64(i64* frozen %a) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.poly64x2x4_t, align 16 // CHECK: [[__RET:%.*]] = alloca %struct.poly64x2x4_t, align 16 // CHECK: [[TMP0:%.*]] = bitcast %struct.poly64x2x4_t* [[__RET]] to i8* @@ -594,7 +594,7 @@ return vld4q_dup_p64(a); } -// CHECK-LABEL: define %struct.float64x1x4_t @test_vld4_dup_f64(double* %a) #2 { +// CHECK-LABEL: define %struct.float64x1x4_t @test_vld4_dup_f64(double* frozen %a) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.float64x1x4_t, align 8 // CHECK: [[__RET:%.*]] = alloca %struct.float64x1x4_t, align 8 // CHECK: [[TMP0:%.*]] = bitcast %struct.float64x1x4_t* [[__RET]] to i8* @@ -612,7 +612,7 @@ return vld4_dup_f64(a); } -// CHECK-LABEL: define %struct.poly64x1x4_t @test_vld4_dup_p64(i64* %a) #2 { +// CHECK-LABEL: define %struct.poly64x1x4_t @test_vld4_dup_p64(i64* frozen %a) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.poly64x1x4_t, align 8 // CHECK: [[__RET:%.*]] = alloca %struct.poly64x1x4_t, align 8 // CHECK: [[TMP0:%.*]] = bitcast %struct.poly64x1x4_t* [[__RET]] to i8* @@ -630,7 +630,7 @@ return vld4_dup_p64(a); } -// CHECK-LABEL: define <16 x i8> @test_vld1q_lane_u8(i8* %a, <16 x i8> %b) #0 { +// CHECK-LABEL: define frozen <16 x i8> @test_vld1q_lane_u8(i8* frozen %a, <16 x i8> frozen %b) #0 { // CHECK: [[TMP0:%.*]] = load i8, i8* %a // CHECK: [[VLD1_LANE:%.*]] = insertelement <16 x i8> %b, i8 [[TMP0]], i32 15 // CHECK: ret <16 x i8> [[VLD1_LANE]] @@ -638,7 +638,7 @@ return vld1q_lane_u8(a, b, 15); } -// CHECK-LABEL: define <8 x i16> @test_vld1q_lane_u16(i16* %a, <8 x i16> %b) #0 { +// CHECK-LABEL: define frozen <8 x i16> @test_vld1q_lane_u16(i16* frozen %a, <8 x i16> frozen %b) #0 { // CHECK: [[TMP0:%.*]] = bitcast i16* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast <8 x i16> %b to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16> @@ -650,7 +650,7 @@ return vld1q_lane_u16(a, b, 7); } -// CHECK-LABEL: define <4 x i32> @test_vld1q_lane_u32(i32* %a, <4 x i32> %b) #0 { +// CHECK-LABEL: define frozen <4 x i32> @test_vld1q_lane_u32(i32* frozen %a, <4 x i32> frozen %b) #0 { // CHECK: [[TMP0:%.*]] = bitcast i32* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast <4 x i32> %b to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32> @@ -662,7 +662,7 @@ return vld1q_lane_u32(a, b, 3); } -// CHECK-LABEL: define <2 x i64> @test_vld1q_lane_u64(i64* %a, <2 x i64> %b) #0 { +// CHECK-LABEL: define frozen <2 x i64> @test_vld1q_lane_u64(i64* frozen %a, <2 x i64> frozen %b) #0 { // CHECK: [[TMP0:%.*]] = bitcast i64* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast <2 x i64> %b to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x i64> @@ -674,7 +674,7 @@ return vld1q_lane_u64(a, b, 1); } -// CHECK-LABEL: define <16 x i8> @test_vld1q_lane_s8(i8* %a, <16 x i8> %b) #0 { +// CHECK-LABEL: define frozen <16 x i8> @test_vld1q_lane_s8(i8* frozen %a, <16 x i8> frozen %b) #0 { // CHECK: [[TMP0:%.*]] = load i8, i8* %a // CHECK: [[VLD1_LANE:%.*]] = insertelement <16 x i8> %b, i8 [[TMP0]], i32 15 // CHECK: ret <16 x i8> [[VLD1_LANE]] @@ -682,7 +682,7 @@ return vld1q_lane_s8(a, b, 15); } -// CHECK-LABEL: define <8 x i16> @test_vld1q_lane_s16(i16* %a, <8 x i16> %b) #0 { +// CHECK-LABEL: define frozen <8 x i16> @test_vld1q_lane_s16(i16* frozen %a, <8 x i16> frozen %b) #0 { // CHECK: [[TMP0:%.*]] = bitcast i16* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast <8 x i16> %b to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16> @@ -694,7 +694,7 @@ return vld1q_lane_s16(a, b, 7); } -// CHECK-LABEL: define <4 x i32> @test_vld1q_lane_s32(i32* %a, <4 x i32> %b) #0 { +// CHECK-LABEL: define frozen <4 x i32> @test_vld1q_lane_s32(i32* frozen %a, <4 x i32> frozen %b) #0 { // CHECK: [[TMP0:%.*]] = bitcast i32* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast <4 x i32> %b to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32> @@ -706,7 +706,7 @@ return vld1q_lane_s32(a, b, 3); } -// CHECK-LABEL: define <2 x i64> @test_vld1q_lane_s64(i64* %a, <2 x i64> %b) #0 { +// CHECK-LABEL: define frozen <2 x i64> @test_vld1q_lane_s64(i64* frozen %a, <2 x i64> frozen %b) #0 { // CHECK: [[TMP0:%.*]] = bitcast i64* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast <2 x i64> %b to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x i64> @@ -718,7 +718,7 @@ return vld1q_lane_s64(a, b, 1); } -// CHECK-LABEL: define <8 x half> @test_vld1q_lane_f16(half* %a, <8 x half> %b) #0 { +// CHECK-LABEL: define frozen <8 x half> @test_vld1q_lane_f16(half* frozen %a, <8 x half> frozen %b) #0 { // CHECK: [[TMP0:%.*]] = bitcast half* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast <8 x half> %b to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x half> @@ -730,7 +730,7 @@ return vld1q_lane_f16(a, b, 7); } -// CHECK-LABEL: define <4 x float> @test_vld1q_lane_f32(float* %a, <4 x float> %b) #0 { +// CHECK-LABEL: define frozen <4 x float> @test_vld1q_lane_f32(float* frozen %a, <4 x float> frozen %b) #0 { // CHECK: [[TMP0:%.*]] = bitcast float* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast <4 x float> %b to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x float> @@ -742,7 +742,7 @@ return vld1q_lane_f32(a, b, 3); } -// CHECK-LABEL: define <2 x double> @test_vld1q_lane_f64(double* %a, <2 x double> %b) #0 { +// CHECK-LABEL: define frozen <2 x double> @test_vld1q_lane_f64(double* frozen %a, <2 x double> frozen %b) #0 { // CHECK: [[TMP0:%.*]] = bitcast double* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast <2 x double> %b to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x double> @@ -754,7 +754,7 @@ return vld1q_lane_f64(a, b, 1); } -// CHECK-LABEL: define <16 x i8> @test_vld1q_lane_p8(i8* %a, <16 x i8> %b) #0 { +// CHECK-LABEL: define frozen <16 x i8> @test_vld1q_lane_p8(i8* frozen %a, <16 x i8> frozen %b) #0 { // CHECK: [[TMP0:%.*]] = load i8, i8* %a // CHECK: [[VLD1_LANE:%.*]] = insertelement <16 x i8> %b, i8 [[TMP0]], i32 15 // CHECK: ret <16 x i8> [[VLD1_LANE]] @@ -762,7 +762,7 @@ return vld1q_lane_p8(a, b, 15); } -// CHECK-LABEL: define <8 x i16> @test_vld1q_lane_p16(i16* %a, <8 x i16> %b) #0 { +// CHECK-LABEL: define frozen <8 x i16> @test_vld1q_lane_p16(i16* frozen %a, <8 x i16> frozen %b) #0 { // CHECK: [[TMP0:%.*]] = bitcast i16* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast <8 x i16> %b to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16> @@ -774,7 +774,7 @@ return vld1q_lane_p16(a, b, 7); } -// CHECK-LABEL: define <2 x i64> @test_vld1q_lane_p64(i64* %a, <2 x i64> %b) #0 { +// CHECK-LABEL: define frozen <2 x i64> @test_vld1q_lane_p64(i64* frozen %a, <2 x i64> frozen %b) #0 { // CHECK: [[TMP0:%.*]] = bitcast i64* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast <2 x i64> %b to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x i64> @@ -786,7 +786,7 @@ return vld1q_lane_p64(a, b, 1); } -// CHECK-LABEL: define <8 x i8> @test_vld1_lane_u8(i8* %a, <8 x i8> %b) #1 { +// CHECK-LABEL: define frozen <8 x i8> @test_vld1_lane_u8(i8* frozen %a, <8 x i8> frozen %b) #1 { // CHECK: [[TMP0:%.*]] = load i8, i8* %a // CHECK: [[VLD1_LANE:%.*]] = insertelement <8 x i8> %b, i8 [[TMP0]], i32 7 // CHECK: ret <8 x i8> [[VLD1_LANE]] @@ -794,7 +794,7 @@ return vld1_lane_u8(a, b, 7); } -// CHECK-LABEL: define <4 x i16> @test_vld1_lane_u16(i16* %a, <4 x i16> %b) #1 { +// CHECK-LABEL: define frozen <4 x i16> @test_vld1_lane_u16(i16* frozen %a, <4 x i16> frozen %b) #1 { // CHECK: [[TMP0:%.*]] = bitcast i16* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast <4 x i16> %b to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16> @@ -806,7 +806,7 @@ return vld1_lane_u16(a, b, 3); } -// CHECK-LABEL: define <2 x i32> @test_vld1_lane_u32(i32* %a, <2 x i32> %b) #1 { +// CHECK-LABEL: define frozen <2 x i32> @test_vld1_lane_u32(i32* frozen %a, <2 x i32> frozen %b) #1 { // CHECK: [[TMP0:%.*]] = bitcast i32* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast <2 x i32> %b to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32> @@ -818,7 +818,7 @@ return vld1_lane_u32(a, b, 1); } -// CHECK-LABEL: define <1 x i64> @test_vld1_lane_u64(i64* %a, <1 x i64> %b) #1 { +// CHECK-LABEL: define frozen <1 x i64> @test_vld1_lane_u64(i64* frozen %a, <1 x i64> frozen %b) #1 { // CHECK: [[TMP0:%.*]] = bitcast i64* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast <1 x i64> %b to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <1 x i64> @@ -830,7 +830,7 @@ return vld1_lane_u64(a, b, 0); } -// CHECK-LABEL: define <8 x i8> @test_vld1_lane_s8(i8* %a, <8 x i8> %b) #1 { +// CHECK-LABEL: define frozen <8 x i8> @test_vld1_lane_s8(i8* frozen %a, <8 x i8> frozen %b) #1 { // CHECK: [[TMP0:%.*]] = load i8, i8* %a // CHECK: [[VLD1_LANE:%.*]] = insertelement <8 x i8> %b, i8 [[TMP0]], i32 7 // CHECK: ret <8 x i8> [[VLD1_LANE]] @@ -838,7 +838,7 @@ return vld1_lane_s8(a, b, 7); } -// CHECK-LABEL: define <4 x i16> @test_vld1_lane_s16(i16* %a, <4 x i16> %b) #1 { +// CHECK-LABEL: define frozen <4 x i16> @test_vld1_lane_s16(i16* frozen %a, <4 x i16> frozen %b) #1 { // CHECK: [[TMP0:%.*]] = bitcast i16* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast <4 x i16> %b to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16> @@ -850,7 +850,7 @@ return vld1_lane_s16(a, b, 3); } -// CHECK-LABEL: define <2 x i32> @test_vld1_lane_s32(i32* %a, <2 x i32> %b) #1 { +// CHECK-LABEL: define frozen <2 x i32> @test_vld1_lane_s32(i32* frozen %a, <2 x i32> frozen %b) #1 { // CHECK: [[TMP0:%.*]] = bitcast i32* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast <2 x i32> %b to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32> @@ -862,7 +862,7 @@ return vld1_lane_s32(a, b, 1); } -// CHECK-LABEL: define <1 x i64> @test_vld1_lane_s64(i64* %a, <1 x i64> %b) #1 { +// CHECK-LABEL: define frozen <1 x i64> @test_vld1_lane_s64(i64* frozen %a, <1 x i64> frozen %b) #1 { // CHECK: [[TMP0:%.*]] = bitcast i64* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast <1 x i64> %b to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <1 x i64> @@ -874,7 +874,7 @@ return vld1_lane_s64(a, b, 0); } -// CHECK-LABEL: define <4 x half> @test_vld1_lane_f16(half* %a, <4 x half> %b) #1 { +// CHECK-LABEL: define frozen <4 x half> @test_vld1_lane_f16(half* frozen %a, <4 x half> frozen %b) #1 { // CHECK: [[TMP0:%.*]] = bitcast half* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast <4 x half> %b to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x half> @@ -886,7 +886,7 @@ return vld1_lane_f16(a, b, 3); } -// CHECK-LABEL: define <2 x float> @test_vld1_lane_f32(float* %a, <2 x float> %b) #1 { +// CHECK-LABEL: define frozen <2 x float> @test_vld1_lane_f32(float* frozen %a, <2 x float> frozen %b) #1 { // CHECK: [[TMP0:%.*]] = bitcast float* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast <2 x float> %b to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x float> @@ -898,7 +898,7 @@ return vld1_lane_f32(a, b, 1); } -// CHECK-LABEL: define <1 x double> @test_vld1_lane_f64(double* %a, <1 x double> %b) #1 { +// CHECK-LABEL: define frozen <1 x double> @test_vld1_lane_f64(double* frozen %a, <1 x double> frozen %b) #1 { // CHECK: [[TMP0:%.*]] = bitcast double* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast <1 x double> %b to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <1 x double> @@ -910,7 +910,7 @@ return vld1_lane_f64(a, b, 0); } -// CHECK-LABEL: define <8 x i8> @test_vld1_lane_p8(i8* %a, <8 x i8> %b) #1 { +// CHECK-LABEL: define frozen <8 x i8> @test_vld1_lane_p8(i8* frozen %a, <8 x i8> frozen %b) #1 { // CHECK: [[TMP0:%.*]] = load i8, i8* %a // CHECK: [[VLD1_LANE:%.*]] = insertelement <8 x i8> %b, i8 [[TMP0]], i32 7 // CHECK: ret <8 x i8> [[VLD1_LANE]] @@ -918,7 +918,7 @@ return vld1_lane_p8(a, b, 7); } -// CHECK-LABEL: define <4 x i16> @test_vld1_lane_p16(i16* %a, <4 x i16> %b) #1 { +// CHECK-LABEL: define frozen <4 x i16> @test_vld1_lane_p16(i16* frozen %a, <4 x i16> frozen %b) #1 { // CHECK: [[TMP0:%.*]] = bitcast i16* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast <4 x i16> %b to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16> @@ -930,7 +930,7 @@ return vld1_lane_p16(a, b, 3); } -// CHECK-LABEL: define <1 x i64> @test_vld1_lane_p64(i64* %a, <1 x i64> %b) #1 { +// CHECK-LABEL: define frozen <1 x i64> @test_vld1_lane_p64(i64* frozen %a, <1 x i64> frozen %b) #1 { // CHECK: [[TMP0:%.*]] = bitcast i64* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast <1 x i64> %b to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <1 x i64> @@ -942,7 +942,7 @@ return vld1_lane_p64(a, b, 0); } -// CHECK-LABEL: define %struct.int8x16x2_t @test_vld2q_lane_s8(i8* %ptr, [2 x <16 x i8>] %src.coerce) #2 { +// CHECK-LABEL: define %struct.int8x16x2_t @test_vld2q_lane_s8(i8* frozen %ptr, [2 x <16 x i8>] %src.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.int8x16x2_t, align 16 // CHECK: [[SRC:%.*]] = alloca %struct.int8x16x2_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.int8x16x2_t, align 16 @@ -971,7 +971,7 @@ return vld2q_lane_s8(ptr, src, 15); } -// CHECK-LABEL: define %struct.uint8x16x2_t @test_vld2q_lane_u8(i8* %ptr, [2 x <16 x i8>] %src.coerce) #2 { +// CHECK-LABEL: define %struct.uint8x16x2_t @test_vld2q_lane_u8(i8* frozen %ptr, [2 x <16 x i8>] %src.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.uint8x16x2_t, align 16 // CHECK: [[SRC:%.*]] = alloca %struct.uint8x16x2_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.uint8x16x2_t, align 16 @@ -1000,7 +1000,7 @@ return vld2q_lane_u8(ptr, src, 15); } -// CHECK-LABEL: define %struct.poly8x16x2_t @test_vld2q_lane_p8(i8* %ptr, [2 x <16 x i8>] %src.coerce) #2 { +// CHECK-LABEL: define %struct.poly8x16x2_t @test_vld2q_lane_p8(i8* frozen %ptr, [2 x <16 x i8>] %src.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.poly8x16x2_t, align 16 // CHECK: [[SRC:%.*]] = alloca %struct.poly8x16x2_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.poly8x16x2_t, align 16 @@ -1029,7 +1029,7 @@ return vld2q_lane_p8(ptr, src, 15); } -// CHECK-LABEL: define %struct.int8x16x3_t @test_vld3q_lane_s8(i8* %ptr, [3 x <16 x i8>] %src.coerce) #2 { +// CHECK-LABEL: define %struct.int8x16x3_t @test_vld3q_lane_s8(i8* frozen %ptr, [3 x <16 x i8>] %src.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.int8x16x3_t, align 16 // CHECK: [[SRC:%.*]] = alloca %struct.int8x16x3_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.int8x16x3_t, align 16 @@ -1061,7 +1061,7 @@ return vld3q_lane_s8(ptr, src, 15); } -// CHECK-LABEL: define %struct.uint8x16x3_t @test_vld3q_lane_u8(i8* %ptr, [3 x <16 x i8>] %src.coerce) #2 { +// CHECK-LABEL: define %struct.uint8x16x3_t @test_vld3q_lane_u8(i8* frozen %ptr, [3 x <16 x i8>] %src.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.uint8x16x3_t, align 16 // CHECK: [[SRC:%.*]] = alloca %struct.uint8x16x3_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.uint8x16x3_t, align 16 @@ -1093,7 +1093,7 @@ return vld3q_lane_u8(ptr, src, 15); } -// CHECK-LABEL: define %struct.uint16x8x2_t @test_vld2q_lane_u16(i16* %a, [2 x <8 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.uint16x8x2_t @test_vld2q_lane_u16(i16* frozen %a, [2 x <8 x i16>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.uint16x8x2_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.uint16x8x2_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.uint16x8x2_t, align 16 @@ -1127,7 +1127,7 @@ return vld2q_lane_u16(a, b, 7); } -// CHECK-LABEL: define %struct.uint32x4x2_t @test_vld2q_lane_u32(i32* %a, [2 x <4 x i32>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.uint32x4x2_t @test_vld2q_lane_u32(i32* frozen %a, [2 x <4 x i32>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.uint32x4x2_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.uint32x4x2_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.uint32x4x2_t, align 16 @@ -1161,7 +1161,7 @@ return vld2q_lane_u32(a, b, 3); } -// CHECK-LABEL: define %struct.uint64x2x2_t @test_vld2q_lane_u64(i64* %a, [2 x <2 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.uint64x2x2_t @test_vld2q_lane_u64(i64* frozen %a, [2 x <2 x i64>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.uint64x2x2_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.uint64x2x2_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.uint64x2x2_t, align 16 @@ -1195,7 +1195,7 @@ return vld2q_lane_u64(a, b, 1); } -// CHECK-LABEL: define %struct.int16x8x2_t @test_vld2q_lane_s16(i16* %a, [2 x <8 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.int16x8x2_t @test_vld2q_lane_s16(i16* frozen %a, [2 x <8 x i16>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.int16x8x2_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.int16x8x2_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.int16x8x2_t, align 16 @@ -1229,7 +1229,7 @@ return vld2q_lane_s16(a, b, 7); } -// CHECK-LABEL: define %struct.int32x4x2_t @test_vld2q_lane_s32(i32* %a, [2 x <4 x i32>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.int32x4x2_t @test_vld2q_lane_s32(i32* frozen %a, [2 x <4 x i32>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.int32x4x2_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.int32x4x2_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.int32x4x2_t, align 16 @@ -1263,7 +1263,7 @@ return vld2q_lane_s32(a, b, 3); } -// CHECK-LABEL: define %struct.int64x2x2_t @test_vld2q_lane_s64(i64* %a, [2 x <2 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.int64x2x2_t @test_vld2q_lane_s64(i64* frozen %a, [2 x <2 x i64>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.int64x2x2_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.int64x2x2_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.int64x2x2_t, align 16 @@ -1297,7 +1297,7 @@ return vld2q_lane_s64(a, b, 1); } -// CHECK-LABEL: define %struct.float16x8x2_t @test_vld2q_lane_f16(half* %a, [2 x <8 x half>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.float16x8x2_t @test_vld2q_lane_f16(half* frozen %a, [2 x <8 x half>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.float16x8x2_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.float16x8x2_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.float16x8x2_t, align 16 @@ -1331,7 +1331,7 @@ return vld2q_lane_f16(a, b, 7); } -// CHECK-LABEL: define %struct.float32x4x2_t @test_vld2q_lane_f32(float* %a, [2 x <4 x float>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.float32x4x2_t @test_vld2q_lane_f32(float* frozen %a, [2 x <4 x float>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.float32x4x2_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.float32x4x2_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.float32x4x2_t, align 16 @@ -1365,7 +1365,7 @@ return vld2q_lane_f32(a, b, 3); } -// CHECK-LABEL: define %struct.float64x2x2_t @test_vld2q_lane_f64(double* %a, [2 x <2 x double>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.float64x2x2_t @test_vld2q_lane_f64(double* frozen %a, [2 x <2 x double>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.float64x2x2_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.float64x2x2_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.float64x2x2_t, align 16 @@ -1399,7 +1399,7 @@ return vld2q_lane_f64(a, b, 1); } -// CHECK-LABEL: define %struct.poly16x8x2_t @test_vld2q_lane_p16(i16* %a, [2 x <8 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.poly16x8x2_t @test_vld2q_lane_p16(i16* frozen %a, [2 x <8 x i16>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.poly16x8x2_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.poly16x8x2_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.poly16x8x2_t, align 16 @@ -1433,7 +1433,7 @@ return vld2q_lane_p16(a, b, 7); } -// CHECK-LABEL: define %struct.poly64x2x2_t @test_vld2q_lane_p64(i64* %a, [2 x <2 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.poly64x2x2_t @test_vld2q_lane_p64(i64* frozen %a, [2 x <2 x i64>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.poly64x2x2_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.poly64x2x2_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.poly64x2x2_t, align 16 @@ -1467,7 +1467,7 @@ return vld2q_lane_p64(a, b, 1); } -// CHECK-LABEL: define %struct.uint8x8x2_t @test_vld2_lane_u8(i8* %a, [2 x <8 x i8>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.uint8x8x2_t @test_vld2_lane_u8(i8* frozen %a, [2 x <8 x i8>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.uint8x8x2_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.uint8x8x2_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.uint8x8x2_t, align 8 @@ -1496,7 +1496,7 @@ return vld2_lane_u8(a, b, 7); } -// CHECK-LABEL: define %struct.uint16x4x2_t @test_vld2_lane_u16(i16* %a, [2 x <4 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.uint16x4x2_t @test_vld2_lane_u16(i16* frozen %a, [2 x <4 x i16>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.uint16x4x2_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.uint16x4x2_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.uint16x4x2_t, align 8 @@ -1530,7 +1530,7 @@ return vld2_lane_u16(a, b, 3); } -// CHECK-LABEL: define %struct.uint32x2x2_t @test_vld2_lane_u32(i32* %a, [2 x <2 x i32>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.uint32x2x2_t @test_vld2_lane_u32(i32* frozen %a, [2 x <2 x i32>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.uint32x2x2_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.uint32x2x2_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.uint32x2x2_t, align 8 @@ -1564,7 +1564,7 @@ return vld2_lane_u32(a, b, 1); } -// CHECK-LABEL: define %struct.uint64x1x2_t @test_vld2_lane_u64(i64* %a, [2 x <1 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.uint64x1x2_t @test_vld2_lane_u64(i64* frozen %a, [2 x <1 x i64>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.uint64x1x2_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.uint64x1x2_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.uint64x1x2_t, align 8 @@ -1598,7 +1598,7 @@ return vld2_lane_u64(a, b, 0); } -// CHECK-LABEL: define %struct.int8x8x2_t @test_vld2_lane_s8(i8* %a, [2 x <8 x i8>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.int8x8x2_t @test_vld2_lane_s8(i8* frozen %a, [2 x <8 x i8>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.int8x8x2_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.int8x8x2_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.int8x8x2_t, align 8 @@ -1627,7 +1627,7 @@ return vld2_lane_s8(a, b, 7); } -// CHECK-LABEL: define %struct.int16x4x2_t @test_vld2_lane_s16(i16* %a, [2 x <4 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.int16x4x2_t @test_vld2_lane_s16(i16* frozen %a, [2 x <4 x i16>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.int16x4x2_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.int16x4x2_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.int16x4x2_t, align 8 @@ -1661,7 +1661,7 @@ return vld2_lane_s16(a, b, 3); } -// CHECK-LABEL: define %struct.int32x2x2_t @test_vld2_lane_s32(i32* %a, [2 x <2 x i32>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.int32x2x2_t @test_vld2_lane_s32(i32* frozen %a, [2 x <2 x i32>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.int32x2x2_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.int32x2x2_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.int32x2x2_t, align 8 @@ -1695,7 +1695,7 @@ return vld2_lane_s32(a, b, 1); } -// CHECK-LABEL: define %struct.int64x1x2_t @test_vld2_lane_s64(i64* %a, [2 x <1 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.int64x1x2_t @test_vld2_lane_s64(i64* frozen %a, [2 x <1 x i64>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.int64x1x2_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.int64x1x2_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.int64x1x2_t, align 8 @@ -1729,7 +1729,7 @@ return vld2_lane_s64(a, b, 0); } -// CHECK-LABEL: define %struct.float16x4x2_t @test_vld2_lane_f16(half* %a, [2 x <4 x half>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.float16x4x2_t @test_vld2_lane_f16(half* frozen %a, [2 x <4 x half>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.float16x4x2_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.float16x4x2_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.float16x4x2_t, align 8 @@ -1763,7 +1763,7 @@ return vld2_lane_f16(a, b, 3); } -// CHECK-LABEL: define %struct.float32x2x2_t @test_vld2_lane_f32(float* %a, [2 x <2 x float>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.float32x2x2_t @test_vld2_lane_f32(float* frozen %a, [2 x <2 x float>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.float32x2x2_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.float32x2x2_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.float32x2x2_t, align 8 @@ -1797,7 +1797,7 @@ return vld2_lane_f32(a, b, 1); } -// CHECK-LABEL: define %struct.float64x1x2_t @test_vld2_lane_f64(double* %a, [2 x <1 x double>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.float64x1x2_t @test_vld2_lane_f64(double* frozen %a, [2 x <1 x double>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.float64x1x2_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.float64x1x2_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.float64x1x2_t, align 8 @@ -1831,7 +1831,7 @@ return vld2_lane_f64(a, b, 0); } -// CHECK-LABEL: define %struct.poly8x8x2_t @test_vld2_lane_p8(i8* %a, [2 x <8 x i8>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.poly8x8x2_t @test_vld2_lane_p8(i8* frozen %a, [2 x <8 x i8>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.poly8x8x2_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.poly8x8x2_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.poly8x8x2_t, align 8 @@ -1860,7 +1860,7 @@ return vld2_lane_p8(a, b, 7); } -// CHECK-LABEL: define %struct.poly16x4x2_t @test_vld2_lane_p16(i16* %a, [2 x <4 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.poly16x4x2_t @test_vld2_lane_p16(i16* frozen %a, [2 x <4 x i16>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.poly16x4x2_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.poly16x4x2_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.poly16x4x2_t, align 8 @@ -1894,7 +1894,7 @@ return vld2_lane_p16(a, b, 3); } -// CHECK-LABEL: define %struct.poly64x1x2_t @test_vld2_lane_p64(i64* %a, [2 x <1 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.poly64x1x2_t @test_vld2_lane_p64(i64* frozen %a, [2 x <1 x i64>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.poly64x1x2_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.poly64x1x2_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.poly64x1x2_t, align 8 @@ -1928,7 +1928,7 @@ return vld2_lane_p64(a, b, 0); } -// CHECK-LABEL: define %struct.uint16x8x3_t @test_vld3q_lane_u16(i16* %a, [3 x <8 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.uint16x8x3_t @test_vld3q_lane_u16(i16* frozen %a, [3 x <8 x i16>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.uint16x8x3_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.uint16x8x3_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.uint16x8x3_t, align 16 @@ -1967,7 +1967,7 @@ return vld3q_lane_u16(a, b, 7); } -// CHECK-LABEL: define %struct.uint32x4x3_t @test_vld3q_lane_u32(i32* %a, [3 x <4 x i32>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.uint32x4x3_t @test_vld3q_lane_u32(i32* frozen %a, [3 x <4 x i32>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.uint32x4x3_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.uint32x4x3_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.uint32x4x3_t, align 16 @@ -2006,7 +2006,7 @@ return vld3q_lane_u32(a, b, 3); } -// CHECK-LABEL: define %struct.uint64x2x3_t @test_vld3q_lane_u64(i64* %a, [3 x <2 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.uint64x2x3_t @test_vld3q_lane_u64(i64* frozen %a, [3 x <2 x i64>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.uint64x2x3_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.uint64x2x3_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.uint64x2x3_t, align 16 @@ -2045,7 +2045,7 @@ return vld3q_lane_u64(a, b, 1); } -// CHECK-LABEL: define %struct.int16x8x3_t @test_vld3q_lane_s16(i16* %a, [3 x <8 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.int16x8x3_t @test_vld3q_lane_s16(i16* frozen %a, [3 x <8 x i16>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.int16x8x3_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.int16x8x3_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.int16x8x3_t, align 16 @@ -2084,7 +2084,7 @@ return vld3q_lane_s16(a, b, 7); } -// CHECK-LABEL: define %struct.int32x4x3_t @test_vld3q_lane_s32(i32* %a, [3 x <4 x i32>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.int32x4x3_t @test_vld3q_lane_s32(i32* frozen %a, [3 x <4 x i32>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.int32x4x3_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.int32x4x3_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.int32x4x3_t, align 16 @@ -2123,7 +2123,7 @@ return vld3q_lane_s32(a, b, 3); } -// CHECK-LABEL: define %struct.int64x2x3_t @test_vld3q_lane_s64(i64* %a, [3 x <2 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.int64x2x3_t @test_vld3q_lane_s64(i64* frozen %a, [3 x <2 x i64>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.int64x2x3_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.int64x2x3_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.int64x2x3_t, align 16 @@ -2162,7 +2162,7 @@ return vld3q_lane_s64(a, b, 1); } -// CHECK-LABEL: define %struct.float16x8x3_t @test_vld3q_lane_f16(half* %a, [3 x <8 x half>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.float16x8x3_t @test_vld3q_lane_f16(half* frozen %a, [3 x <8 x half>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.float16x8x3_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.float16x8x3_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.float16x8x3_t, align 16 @@ -2201,7 +2201,7 @@ return vld3q_lane_f16(a, b, 7); } -// CHECK-LABEL: define %struct.float32x4x3_t @test_vld3q_lane_f32(float* %a, [3 x <4 x float>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.float32x4x3_t @test_vld3q_lane_f32(float* frozen %a, [3 x <4 x float>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.float32x4x3_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.float32x4x3_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.float32x4x3_t, align 16 @@ -2240,7 +2240,7 @@ return vld3q_lane_f32(a, b, 3); } -// CHECK-LABEL: define %struct.float64x2x3_t @test_vld3q_lane_f64(double* %a, [3 x <2 x double>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.float64x2x3_t @test_vld3q_lane_f64(double* frozen %a, [3 x <2 x double>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.float64x2x3_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.float64x2x3_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.float64x2x3_t, align 16 @@ -2279,7 +2279,7 @@ return vld3q_lane_f64(a, b, 1); } -// CHECK-LABEL: define %struct.poly8x16x3_t @test_vld3q_lane_p8(i8* %a, [3 x <16 x i8>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.poly8x16x3_t @test_vld3q_lane_p8(i8* frozen %a, [3 x <16 x i8>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.poly8x16x3_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.poly8x16x3_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.poly8x16x3_t, align 16 @@ -2311,7 +2311,7 @@ return vld3q_lane_p8(a, b, 15); } -// CHECK-LABEL: define %struct.poly16x8x3_t @test_vld3q_lane_p16(i16* %a, [3 x <8 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.poly16x8x3_t @test_vld3q_lane_p16(i16* frozen %a, [3 x <8 x i16>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.poly16x8x3_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.poly16x8x3_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.poly16x8x3_t, align 16 @@ -2350,7 +2350,7 @@ return vld3q_lane_p16(a, b, 7); } -// CHECK-LABEL: define %struct.poly64x2x3_t @test_vld3q_lane_p64(i64* %a, [3 x <2 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.poly64x2x3_t @test_vld3q_lane_p64(i64* frozen %a, [3 x <2 x i64>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.poly64x2x3_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.poly64x2x3_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.poly64x2x3_t, align 16 @@ -2389,7 +2389,7 @@ return vld3q_lane_p64(a, b, 1); } -// CHECK-LABEL: define %struct.uint8x8x3_t @test_vld3_lane_u8(i8* %a, [3 x <8 x i8>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.uint8x8x3_t @test_vld3_lane_u8(i8* frozen %a, [3 x <8 x i8>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.uint8x8x3_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.uint8x8x3_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.uint8x8x3_t, align 8 @@ -2421,7 +2421,7 @@ return vld3_lane_u8(a, b, 7); } -// CHECK-LABEL: define %struct.uint16x4x3_t @test_vld3_lane_u16(i16* %a, [3 x <4 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.uint16x4x3_t @test_vld3_lane_u16(i16* frozen %a, [3 x <4 x i16>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.uint16x4x3_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.uint16x4x3_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.uint16x4x3_t, align 8 @@ -2460,7 +2460,7 @@ return vld3_lane_u16(a, b, 3); } -// CHECK-LABEL: define %struct.uint32x2x3_t @test_vld3_lane_u32(i32* %a, [3 x <2 x i32>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.uint32x2x3_t @test_vld3_lane_u32(i32* frozen %a, [3 x <2 x i32>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.uint32x2x3_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.uint32x2x3_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.uint32x2x3_t, align 8 @@ -2499,7 +2499,7 @@ return vld3_lane_u32(a, b, 1); } -// CHECK-LABEL: define %struct.uint64x1x3_t @test_vld3_lane_u64(i64* %a, [3 x <1 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.uint64x1x3_t @test_vld3_lane_u64(i64* frozen %a, [3 x <1 x i64>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.uint64x1x3_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.uint64x1x3_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.uint64x1x3_t, align 8 @@ -2538,7 +2538,7 @@ return vld3_lane_u64(a, b, 0); } -// CHECK-LABEL: define %struct.int8x8x3_t @test_vld3_lane_s8(i8* %a, [3 x <8 x i8>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.int8x8x3_t @test_vld3_lane_s8(i8* frozen %a, [3 x <8 x i8>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.int8x8x3_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.int8x8x3_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.int8x8x3_t, align 8 @@ -2570,7 +2570,7 @@ return vld3_lane_s8(a, b, 7); } -// CHECK-LABEL: define %struct.int16x4x3_t @test_vld3_lane_s16(i16* %a, [3 x <4 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.int16x4x3_t @test_vld3_lane_s16(i16* frozen %a, [3 x <4 x i16>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.int16x4x3_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.int16x4x3_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.int16x4x3_t, align 8 @@ -2609,7 +2609,7 @@ return vld3_lane_s16(a, b, 3); } -// CHECK-LABEL: define %struct.int32x2x3_t @test_vld3_lane_s32(i32* %a, [3 x <2 x i32>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.int32x2x3_t @test_vld3_lane_s32(i32* frozen %a, [3 x <2 x i32>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.int32x2x3_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.int32x2x3_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.int32x2x3_t, align 8 @@ -2648,7 +2648,7 @@ return vld3_lane_s32(a, b, 1); } -// CHECK-LABEL: define %struct.int64x1x3_t @test_vld3_lane_s64(i64* %a, [3 x <1 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.int64x1x3_t @test_vld3_lane_s64(i64* frozen %a, [3 x <1 x i64>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.int64x1x3_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.int64x1x3_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.int64x1x3_t, align 8 @@ -2687,7 +2687,7 @@ return vld3_lane_s64(a, b, 0); } -// CHECK-LABEL: define %struct.float16x4x3_t @test_vld3_lane_f16(half* %a, [3 x <4 x half>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.float16x4x3_t @test_vld3_lane_f16(half* frozen %a, [3 x <4 x half>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.float16x4x3_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.float16x4x3_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.float16x4x3_t, align 8 @@ -2726,7 +2726,7 @@ return vld3_lane_f16(a, b, 3); } -// CHECK-LABEL: define %struct.float32x2x3_t @test_vld3_lane_f32(float* %a, [3 x <2 x float>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.float32x2x3_t @test_vld3_lane_f32(float* frozen %a, [3 x <2 x float>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.float32x2x3_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.float32x2x3_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.float32x2x3_t, align 8 @@ -2765,7 +2765,7 @@ return vld3_lane_f32(a, b, 1); } -// CHECK-LABEL: define %struct.float64x1x3_t @test_vld3_lane_f64(double* %a, [3 x <1 x double>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.float64x1x3_t @test_vld3_lane_f64(double* frozen %a, [3 x <1 x double>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.float64x1x3_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.float64x1x3_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.float64x1x3_t, align 8 @@ -2804,7 +2804,7 @@ return vld3_lane_f64(a, b, 0); } -// CHECK-LABEL: define %struct.poly8x8x3_t @test_vld3_lane_p8(i8* %a, [3 x <8 x i8>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.poly8x8x3_t @test_vld3_lane_p8(i8* frozen %a, [3 x <8 x i8>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.poly8x8x3_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.poly8x8x3_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.poly8x8x3_t, align 8 @@ -2836,7 +2836,7 @@ return vld3_lane_p8(a, b, 7); } -// CHECK-LABEL: define %struct.poly16x4x3_t @test_vld3_lane_p16(i16* %a, [3 x <4 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.poly16x4x3_t @test_vld3_lane_p16(i16* frozen %a, [3 x <4 x i16>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.poly16x4x3_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.poly16x4x3_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.poly16x4x3_t, align 8 @@ -2875,7 +2875,7 @@ return vld3_lane_p16(a, b, 3); } -// CHECK-LABEL: define %struct.poly64x1x3_t @test_vld3_lane_p64(i64* %a, [3 x <1 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.poly64x1x3_t @test_vld3_lane_p64(i64* frozen %a, [3 x <1 x i64>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.poly64x1x3_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.poly64x1x3_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.poly64x1x3_t, align 8 @@ -2914,7 +2914,7 @@ return vld3_lane_p64(a, b, 0); } -// CHECK-LABEL: define %struct.uint8x16x4_t @test_vld4q_lane_u8(i8* %a, [4 x <16 x i8>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.uint8x16x4_t @test_vld4q_lane_u8(i8* frozen %a, [4 x <16 x i8>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.uint8x16x4_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.uint8x16x4_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.uint8x16x4_t, align 16 @@ -2949,7 +2949,7 @@ return vld4q_lane_u8(a, b, 15); } -// CHECK-LABEL: define %struct.uint16x8x4_t @test_vld4q_lane_u16(i16* %a, [4 x <8 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.uint16x8x4_t @test_vld4q_lane_u16(i16* frozen %a, [4 x <8 x i16>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.uint16x8x4_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.uint16x8x4_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.uint16x8x4_t, align 16 @@ -2993,7 +2993,7 @@ return vld4q_lane_u16(a, b, 7); } -// CHECK-LABEL: define %struct.uint32x4x4_t @test_vld4q_lane_u32(i32* %a, [4 x <4 x i32>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.uint32x4x4_t @test_vld4q_lane_u32(i32* frozen %a, [4 x <4 x i32>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.uint32x4x4_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.uint32x4x4_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.uint32x4x4_t, align 16 @@ -3037,7 +3037,7 @@ return vld4q_lane_u32(a, b, 3); } -// CHECK-LABEL: define %struct.uint64x2x4_t @test_vld4q_lane_u64(i64* %a, [4 x <2 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.uint64x2x4_t @test_vld4q_lane_u64(i64* frozen %a, [4 x <2 x i64>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.uint64x2x4_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.uint64x2x4_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.uint64x2x4_t, align 16 @@ -3081,7 +3081,7 @@ return vld4q_lane_u64(a, b, 1); } -// CHECK-LABEL: define %struct.int8x16x4_t @test_vld4q_lane_s8(i8* %a, [4 x <16 x i8>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.int8x16x4_t @test_vld4q_lane_s8(i8* frozen %a, [4 x <16 x i8>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.int8x16x4_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.int8x16x4_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.int8x16x4_t, align 16 @@ -3116,7 +3116,7 @@ return vld4q_lane_s8(a, b, 15); } -// CHECK-LABEL: define %struct.int16x8x4_t @test_vld4q_lane_s16(i16* %a, [4 x <8 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.int16x8x4_t @test_vld4q_lane_s16(i16* frozen %a, [4 x <8 x i16>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.int16x8x4_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.int16x8x4_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.int16x8x4_t, align 16 @@ -3160,7 +3160,7 @@ return vld4q_lane_s16(a, b, 7); } -// CHECK-LABEL: define %struct.int32x4x4_t @test_vld4q_lane_s32(i32* %a, [4 x <4 x i32>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.int32x4x4_t @test_vld4q_lane_s32(i32* frozen %a, [4 x <4 x i32>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.int32x4x4_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.int32x4x4_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.int32x4x4_t, align 16 @@ -3204,7 +3204,7 @@ return vld4q_lane_s32(a, b, 3); } -// CHECK-LABEL: define %struct.int64x2x4_t @test_vld4q_lane_s64(i64* %a, [4 x <2 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.int64x2x4_t @test_vld4q_lane_s64(i64* frozen %a, [4 x <2 x i64>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.int64x2x4_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.int64x2x4_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.int64x2x4_t, align 16 @@ -3248,7 +3248,7 @@ return vld4q_lane_s64(a, b, 1); } -// CHECK-LABEL: define %struct.float16x8x4_t @test_vld4q_lane_f16(half* %a, [4 x <8 x half>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.float16x8x4_t @test_vld4q_lane_f16(half* frozen %a, [4 x <8 x half>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.float16x8x4_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.float16x8x4_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.float16x8x4_t, align 16 @@ -3292,7 +3292,7 @@ return vld4q_lane_f16(a, b, 7); } -// CHECK-LABEL: define %struct.float32x4x4_t @test_vld4q_lane_f32(float* %a, [4 x <4 x float>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.float32x4x4_t @test_vld4q_lane_f32(float* frozen %a, [4 x <4 x float>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.float32x4x4_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.float32x4x4_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.float32x4x4_t, align 16 @@ -3336,7 +3336,7 @@ return vld4q_lane_f32(a, b, 3); } -// CHECK-LABEL: define %struct.float64x2x4_t @test_vld4q_lane_f64(double* %a, [4 x <2 x double>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.float64x2x4_t @test_vld4q_lane_f64(double* frozen %a, [4 x <2 x double>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.float64x2x4_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.float64x2x4_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.float64x2x4_t, align 16 @@ -3380,7 +3380,7 @@ return vld4q_lane_f64(a, b, 1); } -// CHECK-LABEL: define %struct.poly8x16x4_t @test_vld4q_lane_p8(i8* %a, [4 x <16 x i8>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.poly8x16x4_t @test_vld4q_lane_p8(i8* frozen %a, [4 x <16 x i8>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.poly8x16x4_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.poly8x16x4_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.poly8x16x4_t, align 16 @@ -3415,7 +3415,7 @@ return vld4q_lane_p8(a, b, 15); } -// CHECK-LABEL: define %struct.poly16x8x4_t @test_vld4q_lane_p16(i16* %a, [4 x <8 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.poly16x8x4_t @test_vld4q_lane_p16(i16* frozen %a, [4 x <8 x i16>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.poly16x8x4_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.poly16x8x4_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.poly16x8x4_t, align 16 @@ -3459,7 +3459,7 @@ return vld4q_lane_p16(a, b, 7); } -// CHECK-LABEL: define %struct.poly64x2x4_t @test_vld4q_lane_p64(i64* %a, [4 x <2 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.poly64x2x4_t @test_vld4q_lane_p64(i64* frozen %a, [4 x <2 x i64>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.poly64x2x4_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.poly64x2x4_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.poly64x2x4_t, align 16 @@ -3503,7 +3503,7 @@ return vld4q_lane_p64(a, b, 1); } -// CHECK-LABEL: define %struct.uint8x8x4_t @test_vld4_lane_u8(i8* %a, [4 x <8 x i8>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.uint8x8x4_t @test_vld4_lane_u8(i8* frozen %a, [4 x <8 x i8>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.uint8x8x4_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.uint8x8x4_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.uint8x8x4_t, align 8 @@ -3538,7 +3538,7 @@ return vld4_lane_u8(a, b, 7); } -// CHECK-LABEL: define %struct.uint16x4x4_t @test_vld4_lane_u16(i16* %a, [4 x <4 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.uint16x4x4_t @test_vld4_lane_u16(i16* frozen %a, [4 x <4 x i16>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.uint16x4x4_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.uint16x4x4_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.uint16x4x4_t, align 8 @@ -3582,7 +3582,7 @@ return vld4_lane_u16(a, b, 3); } -// CHECK-LABEL: define %struct.uint32x2x4_t @test_vld4_lane_u32(i32* %a, [4 x <2 x i32>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.uint32x2x4_t @test_vld4_lane_u32(i32* frozen %a, [4 x <2 x i32>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.uint32x2x4_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.uint32x2x4_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.uint32x2x4_t, align 8 @@ -3626,7 +3626,7 @@ return vld4_lane_u32(a, b, 1); } -// CHECK-LABEL: define %struct.uint64x1x4_t @test_vld4_lane_u64(i64* %a, [4 x <1 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.uint64x1x4_t @test_vld4_lane_u64(i64* frozen %a, [4 x <1 x i64>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.uint64x1x4_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.uint64x1x4_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.uint64x1x4_t, align 8 @@ -3670,7 +3670,7 @@ return vld4_lane_u64(a, b, 0); } -// CHECK-LABEL: define %struct.int8x8x4_t @test_vld4_lane_s8(i8* %a, [4 x <8 x i8>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.int8x8x4_t @test_vld4_lane_s8(i8* frozen %a, [4 x <8 x i8>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.int8x8x4_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.int8x8x4_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.int8x8x4_t, align 8 @@ -3705,7 +3705,7 @@ return vld4_lane_s8(a, b, 7); } -// CHECK-LABEL: define %struct.int16x4x4_t @test_vld4_lane_s16(i16* %a, [4 x <4 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.int16x4x4_t @test_vld4_lane_s16(i16* frozen %a, [4 x <4 x i16>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.int16x4x4_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.int16x4x4_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.int16x4x4_t, align 8 @@ -3749,7 +3749,7 @@ return vld4_lane_s16(a, b, 3); } -// CHECK-LABEL: define %struct.int32x2x4_t @test_vld4_lane_s32(i32* %a, [4 x <2 x i32>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.int32x2x4_t @test_vld4_lane_s32(i32* frozen %a, [4 x <2 x i32>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.int32x2x4_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.int32x2x4_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.int32x2x4_t, align 8 @@ -3793,7 +3793,7 @@ return vld4_lane_s32(a, b, 1); } -// CHECK-LABEL: define %struct.int64x1x4_t @test_vld4_lane_s64(i64* %a, [4 x <1 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.int64x1x4_t @test_vld4_lane_s64(i64* frozen %a, [4 x <1 x i64>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.int64x1x4_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.int64x1x4_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.int64x1x4_t, align 8 @@ -3837,7 +3837,7 @@ return vld4_lane_s64(a, b, 0); } -// CHECK-LABEL: define %struct.float16x4x4_t @test_vld4_lane_f16(half* %a, [4 x <4 x half>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.float16x4x4_t @test_vld4_lane_f16(half* frozen %a, [4 x <4 x half>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.float16x4x4_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.float16x4x4_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.float16x4x4_t, align 8 @@ -3881,7 +3881,7 @@ return vld4_lane_f16(a, b, 3); } -// CHECK-LABEL: define %struct.float32x2x4_t @test_vld4_lane_f32(float* %a, [4 x <2 x float>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.float32x2x4_t @test_vld4_lane_f32(float* frozen %a, [4 x <2 x float>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.float32x2x4_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.float32x2x4_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.float32x2x4_t, align 8 @@ -3925,7 +3925,7 @@ return vld4_lane_f32(a, b, 1); } -// CHECK-LABEL: define %struct.float64x1x4_t @test_vld4_lane_f64(double* %a, [4 x <1 x double>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.float64x1x4_t @test_vld4_lane_f64(double* frozen %a, [4 x <1 x double>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.float64x1x4_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.float64x1x4_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.float64x1x4_t, align 8 @@ -3969,7 +3969,7 @@ return vld4_lane_f64(a, b, 0); } -// CHECK-LABEL: define %struct.poly8x8x4_t @test_vld4_lane_p8(i8* %a, [4 x <8 x i8>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.poly8x8x4_t @test_vld4_lane_p8(i8* frozen %a, [4 x <8 x i8>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.poly8x8x4_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.poly8x8x4_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.poly8x8x4_t, align 8 @@ -4004,7 +4004,7 @@ return vld4_lane_p8(a, b, 7); } -// CHECK-LABEL: define %struct.poly16x4x4_t @test_vld4_lane_p16(i16* %a, [4 x <4 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.poly16x4x4_t @test_vld4_lane_p16(i16* frozen %a, [4 x <4 x i16>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.poly16x4x4_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.poly16x4x4_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.poly16x4x4_t, align 8 @@ -4048,7 +4048,7 @@ return vld4_lane_p16(a, b, 3); } -// CHECK-LABEL: define %struct.poly64x1x4_t @test_vld4_lane_p64(i64* %a, [4 x <1 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define %struct.poly64x1x4_t @test_vld4_lane_p64(i64* frozen %a, [4 x <1 x i64>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.poly64x1x4_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.poly64x1x4_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.poly64x1x4_t, align 8 @@ -4092,7 +4092,7 @@ return vld4_lane_p64(a, b, 0); } -// CHECK-LABEL: define void @test_vst1q_lane_u8(i8* %a, <16 x i8> %b) #0 { +// CHECK-LABEL: define void @test_vst1q_lane_u8(i8* frozen %a, <16 x i8> frozen %b) #0 { // CHECK: [[TMP0:%.*]] = extractelement <16 x i8> %b, i32 15 // CHECK: store i8 [[TMP0]], i8* %a // CHECK: ret void @@ -4100,7 +4100,7 @@ vst1q_lane_u8(a, b, 15); } -// CHECK-LABEL: define void @test_vst1q_lane_u16(i16* %a, <8 x i16> %b) #0 { +// CHECK-LABEL: define void @test_vst1q_lane_u16(i16* frozen %a, <8 x i16> frozen %b) #0 { // CHECK: [[TMP0:%.*]] = bitcast i16* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast <8 x i16> %b to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16> @@ -4112,7 +4112,7 @@ vst1q_lane_u16(a, b, 7); } -// CHECK-LABEL: define void @test_vst1q_lane_u32(i32* %a, <4 x i32> %b) #0 { +// CHECK-LABEL: define void @test_vst1q_lane_u32(i32* frozen %a, <4 x i32> frozen %b) #0 { // CHECK: [[TMP0:%.*]] = bitcast i32* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast <4 x i32> %b to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32> @@ -4124,7 +4124,7 @@ vst1q_lane_u32(a, b, 3); } -// CHECK-LABEL: define void @test_vst1q_lane_u64(i64* %a, <2 x i64> %b) #0 { +// CHECK-LABEL: define void @test_vst1q_lane_u64(i64* frozen %a, <2 x i64> frozen %b) #0 { // CHECK: [[TMP0:%.*]] = bitcast i64* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast <2 x i64> %b to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x i64> @@ -4136,7 +4136,7 @@ vst1q_lane_u64(a, b, 1); } -// CHECK-LABEL: define void @test_vst1q_lane_s8(i8* %a, <16 x i8> %b) #0 { +// CHECK-LABEL: define void @test_vst1q_lane_s8(i8* frozen %a, <16 x i8> frozen %b) #0 { // CHECK: [[TMP0:%.*]] = extractelement <16 x i8> %b, i32 15 // CHECK: store i8 [[TMP0]], i8* %a // CHECK: ret void @@ -4144,7 +4144,7 @@ vst1q_lane_s8(a, b, 15); } -// CHECK-LABEL: define void @test_vst1q_lane_s16(i16* %a, <8 x i16> %b) #0 { +// CHECK-LABEL: define void @test_vst1q_lane_s16(i16* frozen %a, <8 x i16> frozen %b) #0 { // CHECK: [[TMP0:%.*]] = bitcast i16* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast <8 x i16> %b to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16> @@ -4156,7 +4156,7 @@ vst1q_lane_s16(a, b, 7); } -// CHECK-LABEL: define void @test_vst1q_lane_s32(i32* %a, <4 x i32> %b) #0 { +// CHECK-LABEL: define void @test_vst1q_lane_s32(i32* frozen %a, <4 x i32> frozen %b) #0 { // CHECK: [[TMP0:%.*]] = bitcast i32* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast <4 x i32> %b to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32> @@ -4168,7 +4168,7 @@ vst1q_lane_s32(a, b, 3); } -// CHECK-LABEL: define void @test_vst1q_lane_s64(i64* %a, <2 x i64> %b) #0 { +// CHECK-LABEL: define void @test_vst1q_lane_s64(i64* frozen %a, <2 x i64> frozen %b) #0 { // CHECK: [[TMP0:%.*]] = bitcast i64* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast <2 x i64> %b to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x i64> @@ -4180,7 +4180,7 @@ vst1q_lane_s64(a, b, 1); } -// CHECK-LABEL: define void @test_vst1q_lane_f16(half* %a, <8 x half> %b) #0 { +// CHECK-LABEL: define void @test_vst1q_lane_f16(half* frozen %a, <8 x half> frozen %b) #0 { // CHECK: [[TMP0:%.*]] = bitcast half* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast <8 x half> %b to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x half> @@ -4192,7 +4192,7 @@ vst1q_lane_f16(a, b, 7); } -// CHECK-LABEL: define void @test_vst1q_lane_f32(float* %a, <4 x float> %b) #0 { +// CHECK-LABEL: define void @test_vst1q_lane_f32(float* frozen %a, <4 x float> frozen %b) #0 { // CHECK: [[TMP0:%.*]] = bitcast float* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast <4 x float> %b to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x float> @@ -4204,7 +4204,7 @@ vst1q_lane_f32(a, b, 3); } -// CHECK-LABEL: define void @test_vst1q_lane_f64(double* %a, <2 x double> %b) #0 { +// CHECK-LABEL: define void @test_vst1q_lane_f64(double* frozen %a, <2 x double> frozen %b) #0 { // CHECK: [[TMP0:%.*]] = bitcast double* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast <2 x double> %b to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x double> @@ -4216,7 +4216,7 @@ vst1q_lane_f64(a, b, 1); } -// CHECK-LABEL: define void @test_vst1q_lane_p8(i8* %a, <16 x i8> %b) #0 { +// CHECK-LABEL: define void @test_vst1q_lane_p8(i8* frozen %a, <16 x i8> frozen %b) #0 { // CHECK: [[TMP0:%.*]] = extractelement <16 x i8> %b, i32 15 // CHECK: store i8 [[TMP0]], i8* %a // CHECK: ret void @@ -4224,7 +4224,7 @@ vst1q_lane_p8(a, b, 15); } -// CHECK-LABEL: define void @test_vst1q_lane_p16(i16* %a, <8 x i16> %b) #0 { +// CHECK-LABEL: define void @test_vst1q_lane_p16(i16* frozen %a, <8 x i16> frozen %b) #0 { // CHECK: [[TMP0:%.*]] = bitcast i16* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast <8 x i16> %b to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16> @@ -4236,7 +4236,7 @@ vst1q_lane_p16(a, b, 7); } -// CHECK-LABEL: define void @test_vst1q_lane_p64(i64* %a, <2 x i64> %b) #0 { +// CHECK-LABEL: define void @test_vst1q_lane_p64(i64* frozen %a, <2 x i64> frozen %b) #0 { // CHECK: [[TMP0:%.*]] = bitcast i64* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast <2 x i64> %b to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x i64> @@ -4248,7 +4248,7 @@ vst1q_lane_p64(a, b, 1); } -// CHECK-LABEL: define void @test_vst1_lane_u8(i8* %a, <8 x i8> %b) #1 { +// CHECK-LABEL: define void @test_vst1_lane_u8(i8* frozen %a, <8 x i8> frozen %b) #1 { // CHECK: [[TMP0:%.*]] = extractelement <8 x i8> %b, i32 7 // CHECK: store i8 [[TMP0]], i8* %a // CHECK: ret void @@ -4256,7 +4256,7 @@ vst1_lane_u8(a, b, 7); } -// CHECK-LABEL: define void @test_vst1_lane_u16(i16* %a, <4 x i16> %b) #1 { +// CHECK-LABEL: define void @test_vst1_lane_u16(i16* frozen %a, <4 x i16> frozen %b) #1 { // CHECK: [[TMP0:%.*]] = bitcast i16* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast <4 x i16> %b to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16> @@ -4268,7 +4268,7 @@ vst1_lane_u16(a, b, 3); } -// CHECK-LABEL: define void @test_vst1_lane_u32(i32* %a, <2 x i32> %b) #1 { +// CHECK-LABEL: define void @test_vst1_lane_u32(i32* frozen %a, <2 x i32> frozen %b) #1 { // CHECK: [[TMP0:%.*]] = bitcast i32* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast <2 x i32> %b to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32> @@ -4280,7 +4280,7 @@ vst1_lane_u32(a, b, 1); } -// CHECK-LABEL: define void @test_vst1_lane_u64(i64* %a, <1 x i64> %b) #1 { +// CHECK-LABEL: define void @test_vst1_lane_u64(i64* frozen %a, <1 x i64> frozen %b) #1 { // CHECK: [[TMP0:%.*]] = bitcast i64* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast <1 x i64> %b to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <1 x i64> @@ -4292,7 +4292,7 @@ vst1_lane_u64(a, b, 0); } -// CHECK-LABEL: define void @test_vst1_lane_s8(i8* %a, <8 x i8> %b) #1 { +// CHECK-LABEL: define void @test_vst1_lane_s8(i8* frozen %a, <8 x i8> frozen %b) #1 { // CHECK: [[TMP0:%.*]] = extractelement <8 x i8> %b, i32 7 // CHECK: store i8 [[TMP0]], i8* %a // CHECK: ret void @@ -4300,7 +4300,7 @@ vst1_lane_s8(a, b, 7); } -// CHECK-LABEL: define void @test_vst1_lane_s16(i16* %a, <4 x i16> %b) #1 { +// CHECK-LABEL: define void @test_vst1_lane_s16(i16* frozen %a, <4 x i16> frozen %b) #1 { // CHECK: [[TMP0:%.*]] = bitcast i16* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast <4 x i16> %b to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16> @@ -4312,7 +4312,7 @@ vst1_lane_s16(a, b, 3); } -// CHECK-LABEL: define void @test_vst1_lane_s32(i32* %a, <2 x i32> %b) #1 { +// CHECK-LABEL: define void @test_vst1_lane_s32(i32* frozen %a, <2 x i32> frozen %b) #1 { // CHECK: [[TMP0:%.*]] = bitcast i32* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast <2 x i32> %b to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32> @@ -4324,7 +4324,7 @@ vst1_lane_s32(a, b, 1); } -// CHECK-LABEL: define void @test_vst1_lane_s64(i64* %a, <1 x i64> %b) #1 { +// CHECK-LABEL: define void @test_vst1_lane_s64(i64* frozen %a, <1 x i64> frozen %b) #1 { // CHECK: [[TMP0:%.*]] = bitcast i64* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast <1 x i64> %b to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <1 x i64> @@ -4336,7 +4336,7 @@ vst1_lane_s64(a, b, 0); } -// CHECK-LABEL: define void @test_vst1_lane_f16(half* %a, <4 x half> %b) #1 { +// CHECK-LABEL: define void @test_vst1_lane_f16(half* frozen %a, <4 x half> frozen %b) #1 { // CHECK: [[TMP0:%.*]] = bitcast half* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast <4 x half> %b to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x half> @@ -4348,7 +4348,7 @@ vst1_lane_f16(a, b, 3); } -// CHECK-LABEL: define void @test_vst1_lane_f32(float* %a, <2 x float> %b) #1 { +// CHECK-LABEL: define void @test_vst1_lane_f32(float* frozen %a, <2 x float> frozen %b) #1 { // CHECK: [[TMP0:%.*]] = bitcast float* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast <2 x float> %b to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x float> @@ -4360,7 +4360,7 @@ vst1_lane_f32(a, b, 1); } -// CHECK-LABEL: define void @test_vst1_lane_f64(double* %a, <1 x double> %b) #1 { +// CHECK-LABEL: define void @test_vst1_lane_f64(double* frozen %a, <1 x double> frozen %b) #1 { // CHECK: [[TMP0:%.*]] = bitcast double* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast <1 x double> %b to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <1 x double> @@ -4372,7 +4372,7 @@ vst1_lane_f64(a, b, 0); } -// CHECK-LABEL: define void @test_vst1_lane_p8(i8* %a, <8 x i8> %b) #1 { +// CHECK-LABEL: define void @test_vst1_lane_p8(i8* frozen %a, <8 x i8> frozen %b) #1 { // CHECK: [[TMP0:%.*]] = extractelement <8 x i8> %b, i32 7 // CHECK: store i8 [[TMP0]], i8* %a // CHECK: ret void @@ -4380,7 +4380,7 @@ vst1_lane_p8(a, b, 7); } -// CHECK-LABEL: define void @test_vst1_lane_p16(i16* %a, <4 x i16> %b) #1 { +// CHECK-LABEL: define void @test_vst1_lane_p16(i16* frozen %a, <4 x i16> frozen %b) #1 { // CHECK: [[TMP0:%.*]] = bitcast i16* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast <4 x i16> %b to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16> @@ -4392,7 +4392,7 @@ vst1_lane_p16(a, b, 3); } -// CHECK-LABEL: define void @test_vst1_lane_p64(i64* %a, <1 x i64> %b) #1 { +// CHECK-LABEL: define void @test_vst1_lane_p64(i64* frozen %a, <1 x i64> frozen %b) #1 { // CHECK: [[TMP0:%.*]] = bitcast i64* %a to i8* // CHECK: [[TMP1:%.*]] = bitcast <1 x i64> %b to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <1 x i64> @@ -4404,7 +4404,7 @@ vst1_lane_p64(a, b, 0); } -// CHECK-LABEL: define void @test_vst2q_lane_u8(i8* %a, [2 x <16 x i8>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst2q_lane_u8(i8* frozen %a, [2 x <16 x i8>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.uint8x16x2_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.uint8x16x2_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x16x2_t, %struct.uint8x16x2_t* [[B]], i32 0, i32 0 @@ -4424,7 +4424,7 @@ vst2q_lane_u8(a, b, 15); } -// CHECK-LABEL: define void @test_vst2q_lane_u16(i16* %a, [2 x <8 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst2q_lane_u16(i16* frozen %a, [2 x <8 x i16>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.uint16x8x2_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.uint16x8x2_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint16x8x2_t, %struct.uint16x8x2_t* [[B]], i32 0, i32 0 @@ -4449,7 +4449,7 @@ vst2q_lane_u16(a, b, 7); } -// CHECK-LABEL: define void @test_vst2q_lane_u32(i32* %a, [2 x <4 x i32>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst2q_lane_u32(i32* frozen %a, [2 x <4 x i32>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.uint32x4x2_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.uint32x4x2_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint32x4x2_t, %struct.uint32x4x2_t* [[B]], i32 0, i32 0 @@ -4474,7 +4474,7 @@ vst2q_lane_u32(a, b, 3); } -// CHECK-LABEL: define void @test_vst2q_lane_u64(i64* %a, [2 x <2 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst2q_lane_u64(i64* frozen %a, [2 x <2 x i64>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.uint64x2x2_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.uint64x2x2_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint64x2x2_t, %struct.uint64x2x2_t* [[B]], i32 0, i32 0 @@ -4499,7 +4499,7 @@ vst2q_lane_u64(a, b, 1); } -// CHECK-LABEL: define void @test_vst2q_lane_s8(i8* %a, [2 x <16 x i8>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst2q_lane_s8(i8* frozen %a, [2 x <16 x i8>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.int8x16x2_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.int8x16x2_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x16x2_t, %struct.int8x16x2_t* [[B]], i32 0, i32 0 @@ -4519,7 +4519,7 @@ vst2q_lane_s8(a, b, 15); } -// CHECK-LABEL: define void @test_vst2q_lane_s16(i16* %a, [2 x <8 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst2q_lane_s16(i16* frozen %a, [2 x <8 x i16>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.int16x8x2_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.int16x8x2_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int16x8x2_t, %struct.int16x8x2_t* [[B]], i32 0, i32 0 @@ -4544,7 +4544,7 @@ vst2q_lane_s16(a, b, 7); } -// CHECK-LABEL: define void @test_vst2q_lane_s32(i32* %a, [2 x <4 x i32>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst2q_lane_s32(i32* frozen %a, [2 x <4 x i32>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.int32x4x2_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.int32x4x2_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int32x4x2_t, %struct.int32x4x2_t* [[B]], i32 0, i32 0 @@ -4569,7 +4569,7 @@ vst2q_lane_s32(a, b, 3); } -// CHECK-LABEL: define void @test_vst2q_lane_s64(i64* %a, [2 x <2 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst2q_lane_s64(i64* frozen %a, [2 x <2 x i64>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.int64x2x2_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.int64x2x2_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int64x2x2_t, %struct.int64x2x2_t* [[B]], i32 0, i32 0 @@ -4594,7 +4594,7 @@ vst2q_lane_s64(a, b, 1); } -// CHECK-LABEL: define void @test_vst2q_lane_f16(half* %a, [2 x <8 x half>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst2q_lane_f16(half* frozen %a, [2 x <8 x half>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.float16x8x2_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.float16x8x2_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float16x8x2_t, %struct.float16x8x2_t* [[B]], i32 0, i32 0 @@ -4619,7 +4619,7 @@ vst2q_lane_f16(a, b, 7); } -// CHECK-LABEL: define void @test_vst2q_lane_f32(float* %a, [2 x <4 x float>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst2q_lane_f32(float* frozen %a, [2 x <4 x float>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.float32x4x2_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.float32x4x2_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float32x4x2_t, %struct.float32x4x2_t* [[B]], i32 0, i32 0 @@ -4644,7 +4644,7 @@ vst2q_lane_f32(a, b, 3); } -// CHECK-LABEL: define void @test_vst2q_lane_f64(double* %a, [2 x <2 x double>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst2q_lane_f64(double* frozen %a, [2 x <2 x double>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.float64x2x2_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.float64x2x2_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float64x2x2_t, %struct.float64x2x2_t* [[B]], i32 0, i32 0 @@ -4669,7 +4669,7 @@ vst2q_lane_f64(a, b, 1); } -// CHECK-LABEL: define void @test_vst2q_lane_p8(i8* %a, [2 x <16 x i8>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst2q_lane_p8(i8* frozen %a, [2 x <16 x i8>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.poly8x16x2_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.poly8x16x2_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x16x2_t, %struct.poly8x16x2_t* [[B]], i32 0, i32 0 @@ -4689,7 +4689,7 @@ vst2q_lane_p8(a, b, 15); } -// CHECK-LABEL: define void @test_vst2q_lane_p16(i16* %a, [2 x <8 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst2q_lane_p16(i16* frozen %a, [2 x <8 x i16>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.poly16x8x2_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.poly16x8x2_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly16x8x2_t, %struct.poly16x8x2_t* [[B]], i32 0, i32 0 @@ -4714,7 +4714,7 @@ vst2q_lane_p16(a, b, 7); } -// CHECK-LABEL: define void @test_vst2q_lane_p64(i64* %a, [2 x <2 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst2q_lane_p64(i64* frozen %a, [2 x <2 x i64>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.poly64x2x2_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.poly64x2x2_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly64x2x2_t, %struct.poly64x2x2_t* [[B]], i32 0, i32 0 @@ -4739,7 +4739,7 @@ vst2q_lane_p64(a, b, 1); } -// CHECK-LABEL: define void @test_vst2_lane_u8(i8* %a, [2 x <8 x i8>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst2_lane_u8(i8* frozen %a, [2 x <8 x i8>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.uint8x8x2_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.uint8x8x2_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x8x2_t, %struct.uint8x8x2_t* [[B]], i32 0, i32 0 @@ -4759,7 +4759,7 @@ vst2_lane_u8(a, b, 7); } -// CHECK-LABEL: define void @test_vst2_lane_u16(i16* %a, [2 x <4 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst2_lane_u16(i16* frozen %a, [2 x <4 x i16>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.uint16x4x2_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.uint16x4x2_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint16x4x2_t, %struct.uint16x4x2_t* [[B]], i32 0, i32 0 @@ -4784,7 +4784,7 @@ vst2_lane_u16(a, b, 3); } -// CHECK-LABEL: define void @test_vst2_lane_u32(i32* %a, [2 x <2 x i32>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst2_lane_u32(i32* frozen %a, [2 x <2 x i32>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.uint32x2x2_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.uint32x2x2_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint32x2x2_t, %struct.uint32x2x2_t* [[B]], i32 0, i32 0 @@ -4809,7 +4809,7 @@ vst2_lane_u32(a, b, 1); } -// CHECK-LABEL: define void @test_vst2_lane_u64(i64* %a, [2 x <1 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst2_lane_u64(i64* frozen %a, [2 x <1 x i64>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.uint64x1x2_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.uint64x1x2_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint64x1x2_t, %struct.uint64x1x2_t* [[B]], i32 0, i32 0 @@ -4834,7 +4834,7 @@ vst2_lane_u64(a, b, 0); } -// CHECK-LABEL: define void @test_vst2_lane_s8(i8* %a, [2 x <8 x i8>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst2_lane_s8(i8* frozen %a, [2 x <8 x i8>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.int8x8x2_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.int8x8x2_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x8x2_t, %struct.int8x8x2_t* [[B]], i32 0, i32 0 @@ -4854,7 +4854,7 @@ vst2_lane_s8(a, b, 7); } -// CHECK-LABEL: define void @test_vst2_lane_s16(i16* %a, [2 x <4 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst2_lane_s16(i16* frozen %a, [2 x <4 x i16>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.int16x4x2_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.int16x4x2_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int16x4x2_t, %struct.int16x4x2_t* [[B]], i32 0, i32 0 @@ -4879,7 +4879,7 @@ vst2_lane_s16(a, b, 3); } -// CHECK-LABEL: define void @test_vst2_lane_s32(i32* %a, [2 x <2 x i32>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst2_lane_s32(i32* frozen %a, [2 x <2 x i32>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.int32x2x2_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.int32x2x2_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int32x2x2_t, %struct.int32x2x2_t* [[B]], i32 0, i32 0 @@ -4904,7 +4904,7 @@ vst2_lane_s32(a, b, 1); } -// CHECK-LABEL: define void @test_vst2_lane_s64(i64* %a, [2 x <1 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst2_lane_s64(i64* frozen %a, [2 x <1 x i64>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.int64x1x2_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.int64x1x2_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int64x1x2_t, %struct.int64x1x2_t* [[B]], i32 0, i32 0 @@ -4929,7 +4929,7 @@ vst2_lane_s64(a, b, 0); } -// CHECK-LABEL: define void @test_vst2_lane_f16(half* %a, [2 x <4 x half>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst2_lane_f16(half* frozen %a, [2 x <4 x half>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.float16x4x2_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.float16x4x2_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float16x4x2_t, %struct.float16x4x2_t* [[B]], i32 0, i32 0 @@ -4954,7 +4954,7 @@ vst2_lane_f16(a, b, 3); } -// CHECK-LABEL: define void @test_vst2_lane_f32(float* %a, [2 x <2 x float>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst2_lane_f32(float* frozen %a, [2 x <2 x float>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.float32x2x2_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.float32x2x2_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float32x2x2_t, %struct.float32x2x2_t* [[B]], i32 0, i32 0 @@ -4979,7 +4979,7 @@ vst2_lane_f32(a, b, 1); } -// CHECK-LABEL: define void @test_vst2_lane_f64(double* %a, [2 x <1 x double>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst2_lane_f64(double* frozen %a, [2 x <1 x double>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.float64x1x2_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.float64x1x2_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float64x1x2_t, %struct.float64x1x2_t* [[B]], i32 0, i32 0 @@ -5004,7 +5004,7 @@ vst2_lane_f64(a, b, 0); } -// CHECK-LABEL: define void @test_vst2_lane_p8(i8* %a, [2 x <8 x i8>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst2_lane_p8(i8* frozen %a, [2 x <8 x i8>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.poly8x8x2_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.poly8x8x2_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x8x2_t, %struct.poly8x8x2_t* [[B]], i32 0, i32 0 @@ -5024,7 +5024,7 @@ vst2_lane_p8(a, b, 7); } -// CHECK-LABEL: define void @test_vst2_lane_p16(i16* %a, [2 x <4 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst2_lane_p16(i16* frozen %a, [2 x <4 x i16>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.poly16x4x2_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.poly16x4x2_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly16x4x2_t, %struct.poly16x4x2_t* [[B]], i32 0, i32 0 @@ -5049,7 +5049,7 @@ vst2_lane_p16(a, b, 3); } -// CHECK-LABEL: define void @test_vst2_lane_p64(i64* %a, [2 x <1 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst2_lane_p64(i64* frozen %a, [2 x <1 x i64>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.poly64x1x2_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.poly64x1x2_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly64x1x2_t, %struct.poly64x1x2_t* [[B]], i32 0, i32 0 @@ -5074,7 +5074,7 @@ vst2_lane_p64(a, b, 0); } -// CHECK-LABEL: define void @test_vst3q_lane_u8(i8* %a, [3 x <16 x i8>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst3q_lane_u8(i8* frozen %a, [3 x <16 x i8>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.uint8x16x3_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.uint8x16x3_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x16x3_t, %struct.uint8x16x3_t* [[B]], i32 0, i32 0 @@ -5097,7 +5097,7 @@ vst3q_lane_u8(a, b, 15); } -// CHECK-LABEL: define void @test_vst3q_lane_u16(i16* %a, [3 x <8 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst3q_lane_u16(i16* frozen %a, [3 x <8 x i16>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.uint16x8x3_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.uint16x8x3_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint16x8x3_t, %struct.uint16x8x3_t* [[B]], i32 0, i32 0 @@ -5127,7 +5127,7 @@ vst3q_lane_u16(a, b, 7); } -// CHECK-LABEL: define void @test_vst3q_lane_u32(i32* %a, [3 x <4 x i32>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst3q_lane_u32(i32* frozen %a, [3 x <4 x i32>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.uint32x4x3_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.uint32x4x3_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint32x4x3_t, %struct.uint32x4x3_t* [[B]], i32 0, i32 0 @@ -5157,7 +5157,7 @@ vst3q_lane_u32(a, b, 3); } -// CHECK-LABEL: define void @test_vst3q_lane_u64(i64* %a, [3 x <2 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst3q_lane_u64(i64* frozen %a, [3 x <2 x i64>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.uint64x2x3_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.uint64x2x3_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint64x2x3_t, %struct.uint64x2x3_t* [[B]], i32 0, i32 0 @@ -5187,7 +5187,7 @@ vst3q_lane_u64(a, b, 1); } -// CHECK-LABEL: define void @test_vst3q_lane_s8(i8* %a, [3 x <16 x i8>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst3q_lane_s8(i8* frozen %a, [3 x <16 x i8>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.int8x16x3_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.int8x16x3_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x16x3_t, %struct.int8x16x3_t* [[B]], i32 0, i32 0 @@ -5210,7 +5210,7 @@ vst3q_lane_s8(a, b, 15); } -// CHECK-LABEL: define void @test_vst3q_lane_s16(i16* %a, [3 x <8 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst3q_lane_s16(i16* frozen %a, [3 x <8 x i16>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.int16x8x3_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.int16x8x3_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int16x8x3_t, %struct.int16x8x3_t* [[B]], i32 0, i32 0 @@ -5240,7 +5240,7 @@ vst3q_lane_s16(a, b, 7); } -// CHECK-LABEL: define void @test_vst3q_lane_s32(i32* %a, [3 x <4 x i32>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst3q_lane_s32(i32* frozen %a, [3 x <4 x i32>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.int32x4x3_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.int32x4x3_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int32x4x3_t, %struct.int32x4x3_t* [[B]], i32 0, i32 0 @@ -5270,7 +5270,7 @@ vst3q_lane_s32(a, b, 3); } -// CHECK-LABEL: define void @test_vst3q_lane_s64(i64* %a, [3 x <2 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst3q_lane_s64(i64* frozen %a, [3 x <2 x i64>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.int64x2x3_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.int64x2x3_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int64x2x3_t, %struct.int64x2x3_t* [[B]], i32 0, i32 0 @@ -5300,7 +5300,7 @@ vst3q_lane_s64(a, b, 1); } -// CHECK-LABEL: define void @test_vst3q_lane_f16(half* %a, [3 x <8 x half>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst3q_lane_f16(half* frozen %a, [3 x <8 x half>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.float16x8x3_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.float16x8x3_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float16x8x3_t, %struct.float16x8x3_t* [[B]], i32 0, i32 0 @@ -5330,7 +5330,7 @@ vst3q_lane_f16(a, b, 7); } -// CHECK-LABEL: define void @test_vst3q_lane_f32(float* %a, [3 x <4 x float>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst3q_lane_f32(float* frozen %a, [3 x <4 x float>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.float32x4x3_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.float32x4x3_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float32x4x3_t, %struct.float32x4x3_t* [[B]], i32 0, i32 0 @@ -5360,7 +5360,7 @@ vst3q_lane_f32(a, b, 3); } -// CHECK-LABEL: define void @test_vst3q_lane_f64(double* %a, [3 x <2 x double>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst3q_lane_f64(double* frozen %a, [3 x <2 x double>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.float64x2x3_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.float64x2x3_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float64x2x3_t, %struct.float64x2x3_t* [[B]], i32 0, i32 0 @@ -5390,7 +5390,7 @@ vst3q_lane_f64(a, b, 1); } -// CHECK-LABEL: define void @test_vst3q_lane_p8(i8* %a, [3 x <16 x i8>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst3q_lane_p8(i8* frozen %a, [3 x <16 x i8>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.poly8x16x3_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.poly8x16x3_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x16x3_t, %struct.poly8x16x3_t* [[B]], i32 0, i32 0 @@ -5413,7 +5413,7 @@ vst3q_lane_p8(a, b, 15); } -// CHECK-LABEL: define void @test_vst3q_lane_p16(i16* %a, [3 x <8 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst3q_lane_p16(i16* frozen %a, [3 x <8 x i16>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.poly16x8x3_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.poly16x8x3_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly16x8x3_t, %struct.poly16x8x3_t* [[B]], i32 0, i32 0 @@ -5443,7 +5443,7 @@ vst3q_lane_p16(a, b, 7); } -// CHECK-LABEL: define void @test_vst3q_lane_p64(i64* %a, [3 x <2 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst3q_lane_p64(i64* frozen %a, [3 x <2 x i64>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.poly64x2x3_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.poly64x2x3_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly64x2x3_t, %struct.poly64x2x3_t* [[B]], i32 0, i32 0 @@ -5473,7 +5473,7 @@ vst3q_lane_p64(a, b, 1); } -// CHECK-LABEL: define void @test_vst3_lane_u8(i8* %a, [3 x <8 x i8>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst3_lane_u8(i8* frozen %a, [3 x <8 x i8>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.uint8x8x3_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.uint8x8x3_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x8x3_t, %struct.uint8x8x3_t* [[B]], i32 0, i32 0 @@ -5496,7 +5496,7 @@ vst3_lane_u8(a, b, 7); } -// CHECK-LABEL: define void @test_vst3_lane_u16(i16* %a, [3 x <4 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst3_lane_u16(i16* frozen %a, [3 x <4 x i16>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.uint16x4x3_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.uint16x4x3_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint16x4x3_t, %struct.uint16x4x3_t* [[B]], i32 0, i32 0 @@ -5526,7 +5526,7 @@ vst3_lane_u16(a, b, 3); } -// CHECK-LABEL: define void @test_vst3_lane_u32(i32* %a, [3 x <2 x i32>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst3_lane_u32(i32* frozen %a, [3 x <2 x i32>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.uint32x2x3_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.uint32x2x3_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint32x2x3_t, %struct.uint32x2x3_t* [[B]], i32 0, i32 0 @@ -5556,7 +5556,7 @@ vst3_lane_u32(a, b, 1); } -// CHECK-LABEL: define void @test_vst3_lane_u64(i64* %a, [3 x <1 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst3_lane_u64(i64* frozen %a, [3 x <1 x i64>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.uint64x1x3_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.uint64x1x3_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint64x1x3_t, %struct.uint64x1x3_t* [[B]], i32 0, i32 0 @@ -5586,7 +5586,7 @@ vst3_lane_u64(a, b, 0); } -// CHECK-LABEL: define void @test_vst3_lane_s8(i8* %a, [3 x <8 x i8>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst3_lane_s8(i8* frozen %a, [3 x <8 x i8>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.int8x8x3_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.int8x8x3_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x8x3_t, %struct.int8x8x3_t* [[B]], i32 0, i32 0 @@ -5609,7 +5609,7 @@ vst3_lane_s8(a, b, 7); } -// CHECK-LABEL: define void @test_vst3_lane_s16(i16* %a, [3 x <4 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst3_lane_s16(i16* frozen %a, [3 x <4 x i16>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.int16x4x3_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.int16x4x3_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int16x4x3_t, %struct.int16x4x3_t* [[B]], i32 0, i32 0 @@ -5639,7 +5639,7 @@ vst3_lane_s16(a, b, 3); } -// CHECK-LABEL: define void @test_vst3_lane_s32(i32* %a, [3 x <2 x i32>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst3_lane_s32(i32* frozen %a, [3 x <2 x i32>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.int32x2x3_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.int32x2x3_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int32x2x3_t, %struct.int32x2x3_t* [[B]], i32 0, i32 0 @@ -5669,7 +5669,7 @@ vst3_lane_s32(a, b, 1); } -// CHECK-LABEL: define void @test_vst3_lane_s64(i64* %a, [3 x <1 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst3_lane_s64(i64* frozen %a, [3 x <1 x i64>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.int64x1x3_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.int64x1x3_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int64x1x3_t, %struct.int64x1x3_t* [[B]], i32 0, i32 0 @@ -5699,7 +5699,7 @@ vst3_lane_s64(a, b, 0); } -// CHECK-LABEL: define void @test_vst3_lane_f16(half* %a, [3 x <4 x half>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst3_lane_f16(half* frozen %a, [3 x <4 x half>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.float16x4x3_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.float16x4x3_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float16x4x3_t, %struct.float16x4x3_t* [[B]], i32 0, i32 0 @@ -5729,7 +5729,7 @@ vst3_lane_f16(a, b, 3); } -// CHECK-LABEL: define void @test_vst3_lane_f32(float* %a, [3 x <2 x float>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst3_lane_f32(float* frozen %a, [3 x <2 x float>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.float32x2x3_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.float32x2x3_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float32x2x3_t, %struct.float32x2x3_t* [[B]], i32 0, i32 0 @@ -5759,7 +5759,7 @@ vst3_lane_f32(a, b, 1); } -// CHECK-LABEL: define void @test_vst3_lane_f64(double* %a, [3 x <1 x double>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst3_lane_f64(double* frozen %a, [3 x <1 x double>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.float64x1x3_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.float64x1x3_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float64x1x3_t, %struct.float64x1x3_t* [[B]], i32 0, i32 0 @@ -5789,7 +5789,7 @@ vst3_lane_f64(a, b, 0); } -// CHECK-LABEL: define void @test_vst3_lane_p8(i8* %a, [3 x <8 x i8>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst3_lane_p8(i8* frozen %a, [3 x <8 x i8>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.poly8x8x3_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.poly8x8x3_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x8x3_t, %struct.poly8x8x3_t* [[B]], i32 0, i32 0 @@ -5812,7 +5812,7 @@ vst3_lane_p8(a, b, 7); } -// CHECK-LABEL: define void @test_vst3_lane_p16(i16* %a, [3 x <4 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst3_lane_p16(i16* frozen %a, [3 x <4 x i16>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.poly16x4x3_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.poly16x4x3_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly16x4x3_t, %struct.poly16x4x3_t* [[B]], i32 0, i32 0 @@ -5842,7 +5842,7 @@ vst3_lane_p16(a, b, 3); } -// CHECK-LABEL: define void @test_vst3_lane_p64(i64* %a, [3 x <1 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst3_lane_p64(i64* frozen %a, [3 x <1 x i64>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.poly64x1x3_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.poly64x1x3_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly64x1x3_t, %struct.poly64x1x3_t* [[B]], i32 0, i32 0 @@ -5872,7 +5872,7 @@ vst3_lane_p64(a, b, 0); } -// CHECK-LABEL: define void @test_vst4q_lane_u8(i8* %a, [4 x <16 x i8>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst4q_lane_u8(i8* frozen %a, [4 x <16 x i8>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.uint8x16x4_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.uint8x16x4_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x16x4_t, %struct.uint8x16x4_t* [[B]], i32 0, i32 0 @@ -5898,7 +5898,7 @@ vst4q_lane_u8(a, b, 15); } -// CHECK-LABEL: define void @test_vst4q_lane_u16(i16* %a, [4 x <8 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst4q_lane_u16(i16* frozen %a, [4 x <8 x i16>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.uint16x8x4_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.uint16x8x4_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint16x8x4_t, %struct.uint16x8x4_t* [[B]], i32 0, i32 0 @@ -5933,7 +5933,7 @@ vst4q_lane_u16(a, b, 7); } -// CHECK-LABEL: define void @test_vst4q_lane_u32(i32* %a, [4 x <4 x i32>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst4q_lane_u32(i32* frozen %a, [4 x <4 x i32>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.uint32x4x4_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.uint32x4x4_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint32x4x4_t, %struct.uint32x4x4_t* [[B]], i32 0, i32 0 @@ -5968,7 +5968,7 @@ vst4q_lane_u32(a, b, 3); } -// CHECK-LABEL: define void @test_vst4q_lane_u64(i64* %a, [4 x <2 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst4q_lane_u64(i64* frozen %a, [4 x <2 x i64>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.uint64x2x4_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.uint64x2x4_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint64x2x4_t, %struct.uint64x2x4_t* [[B]], i32 0, i32 0 @@ -6003,7 +6003,7 @@ vst4q_lane_u64(a, b, 1); } -// CHECK-LABEL: define void @test_vst4q_lane_s8(i8* %a, [4 x <16 x i8>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst4q_lane_s8(i8* frozen %a, [4 x <16 x i8>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.int8x16x4_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.int8x16x4_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x16x4_t, %struct.int8x16x4_t* [[B]], i32 0, i32 0 @@ -6029,7 +6029,7 @@ vst4q_lane_s8(a, b, 15); } -// CHECK-LABEL: define void @test_vst4q_lane_s16(i16* %a, [4 x <8 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst4q_lane_s16(i16* frozen %a, [4 x <8 x i16>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.int16x8x4_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.int16x8x4_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int16x8x4_t, %struct.int16x8x4_t* [[B]], i32 0, i32 0 @@ -6064,7 +6064,7 @@ vst4q_lane_s16(a, b, 7); } -// CHECK-LABEL: define void @test_vst4q_lane_s32(i32* %a, [4 x <4 x i32>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst4q_lane_s32(i32* frozen %a, [4 x <4 x i32>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.int32x4x4_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.int32x4x4_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int32x4x4_t, %struct.int32x4x4_t* [[B]], i32 0, i32 0 @@ -6099,7 +6099,7 @@ vst4q_lane_s32(a, b, 3); } -// CHECK-LABEL: define void @test_vst4q_lane_s64(i64* %a, [4 x <2 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst4q_lane_s64(i64* frozen %a, [4 x <2 x i64>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.int64x2x4_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.int64x2x4_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int64x2x4_t, %struct.int64x2x4_t* [[B]], i32 0, i32 0 @@ -6134,7 +6134,7 @@ vst4q_lane_s64(a, b, 1); } -// CHECK-LABEL: define void @test_vst4q_lane_f16(half* %a, [4 x <8 x half>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst4q_lane_f16(half* frozen %a, [4 x <8 x half>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.float16x8x4_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.float16x8x4_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float16x8x4_t, %struct.float16x8x4_t* [[B]], i32 0, i32 0 @@ -6169,7 +6169,7 @@ vst4q_lane_f16(a, b, 7); } -// CHECK-LABEL: define void @test_vst4q_lane_f32(float* %a, [4 x <4 x float>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst4q_lane_f32(float* frozen %a, [4 x <4 x float>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.float32x4x4_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.float32x4x4_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float32x4x4_t, %struct.float32x4x4_t* [[B]], i32 0, i32 0 @@ -6204,7 +6204,7 @@ vst4q_lane_f32(a, b, 3); } -// CHECK-LABEL: define void @test_vst4q_lane_f64(double* %a, [4 x <2 x double>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst4q_lane_f64(double* frozen %a, [4 x <2 x double>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.float64x2x4_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.float64x2x4_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float64x2x4_t, %struct.float64x2x4_t* [[B]], i32 0, i32 0 @@ -6239,7 +6239,7 @@ vst4q_lane_f64(a, b, 1); } -// CHECK-LABEL: define void @test_vst4q_lane_p8(i8* %a, [4 x <16 x i8>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst4q_lane_p8(i8* frozen %a, [4 x <16 x i8>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.poly8x16x4_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.poly8x16x4_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x16x4_t, %struct.poly8x16x4_t* [[B]], i32 0, i32 0 @@ -6265,7 +6265,7 @@ vst4q_lane_p8(a, b, 15); } -// CHECK-LABEL: define void @test_vst4q_lane_p16(i16* %a, [4 x <8 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst4q_lane_p16(i16* frozen %a, [4 x <8 x i16>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.poly16x8x4_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.poly16x8x4_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly16x8x4_t, %struct.poly16x8x4_t* [[B]], i32 0, i32 0 @@ -6300,7 +6300,7 @@ vst4q_lane_p16(a, b, 7); } -// CHECK-LABEL: define void @test_vst4q_lane_p64(i64* %a, [4 x <2 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst4q_lane_p64(i64* frozen %a, [4 x <2 x i64>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.poly64x2x4_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.poly64x2x4_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly64x2x4_t, %struct.poly64x2x4_t* [[B]], i32 0, i32 0 @@ -6335,7 +6335,7 @@ vst4q_lane_p64(a, b, 1); } -// CHECK-LABEL: define void @test_vst4_lane_u8(i8* %a, [4 x <8 x i8>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst4_lane_u8(i8* frozen %a, [4 x <8 x i8>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.uint8x8x4_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.uint8x8x4_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x8x4_t, %struct.uint8x8x4_t* [[B]], i32 0, i32 0 @@ -6361,7 +6361,7 @@ vst4_lane_u8(a, b, 7); } -// CHECK-LABEL: define void @test_vst4_lane_u16(i16* %a, [4 x <4 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst4_lane_u16(i16* frozen %a, [4 x <4 x i16>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.uint16x4x4_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.uint16x4x4_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint16x4x4_t, %struct.uint16x4x4_t* [[B]], i32 0, i32 0 @@ -6396,7 +6396,7 @@ vst4_lane_u16(a, b, 3); } -// CHECK-LABEL: define void @test_vst4_lane_u32(i32* %a, [4 x <2 x i32>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst4_lane_u32(i32* frozen %a, [4 x <2 x i32>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.uint32x2x4_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.uint32x2x4_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint32x2x4_t, %struct.uint32x2x4_t* [[B]], i32 0, i32 0 @@ -6431,7 +6431,7 @@ vst4_lane_u32(a, b, 1); } -// CHECK-LABEL: define void @test_vst4_lane_u64(i64* %a, [4 x <1 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst4_lane_u64(i64* frozen %a, [4 x <1 x i64>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.uint64x1x4_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.uint64x1x4_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint64x1x4_t, %struct.uint64x1x4_t* [[B]], i32 0, i32 0 @@ -6466,7 +6466,7 @@ vst4_lane_u64(a, b, 0); } -// CHECK-LABEL: define void @test_vst4_lane_s8(i8* %a, [4 x <8 x i8>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst4_lane_s8(i8* frozen %a, [4 x <8 x i8>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.int8x8x4_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.int8x8x4_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x8x4_t, %struct.int8x8x4_t* [[B]], i32 0, i32 0 @@ -6492,7 +6492,7 @@ vst4_lane_s8(a, b, 7); } -// CHECK-LABEL: define void @test_vst4_lane_s16(i16* %a, [4 x <4 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst4_lane_s16(i16* frozen %a, [4 x <4 x i16>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.int16x4x4_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.int16x4x4_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int16x4x4_t, %struct.int16x4x4_t* [[B]], i32 0, i32 0 @@ -6527,7 +6527,7 @@ vst4_lane_s16(a, b, 3); } -// CHECK-LABEL: define void @test_vst4_lane_s32(i32* %a, [4 x <2 x i32>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst4_lane_s32(i32* frozen %a, [4 x <2 x i32>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.int32x2x4_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.int32x2x4_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int32x2x4_t, %struct.int32x2x4_t* [[B]], i32 0, i32 0 @@ -6562,7 +6562,7 @@ vst4_lane_s32(a, b, 1); } -// CHECK-LABEL: define void @test_vst4_lane_s64(i64* %a, [4 x <1 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst4_lane_s64(i64* frozen %a, [4 x <1 x i64>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.int64x1x4_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.int64x1x4_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int64x1x4_t, %struct.int64x1x4_t* [[B]], i32 0, i32 0 @@ -6597,7 +6597,7 @@ vst4_lane_s64(a, b, 0); } -// CHECK-LABEL: define void @test_vst4_lane_f16(half* %a, [4 x <4 x half>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst4_lane_f16(half* frozen %a, [4 x <4 x half>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.float16x4x4_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.float16x4x4_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float16x4x4_t, %struct.float16x4x4_t* [[B]], i32 0, i32 0 @@ -6632,7 +6632,7 @@ vst4_lane_f16(a, b, 3); } -// CHECK-LABEL: define void @test_vst4_lane_f32(float* %a, [4 x <2 x float>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst4_lane_f32(float* frozen %a, [4 x <2 x float>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.float32x2x4_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.float32x2x4_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float32x2x4_t, %struct.float32x2x4_t* [[B]], i32 0, i32 0 @@ -6667,7 +6667,7 @@ vst4_lane_f32(a, b, 1); } -// CHECK-LABEL: define void @test_vst4_lane_f64(double* %a, [4 x <1 x double>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst4_lane_f64(double* frozen %a, [4 x <1 x double>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.float64x1x4_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.float64x1x4_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float64x1x4_t, %struct.float64x1x4_t* [[B]], i32 0, i32 0 @@ -6702,7 +6702,7 @@ vst4_lane_f64(a, b, 0); } -// CHECK-LABEL: define void @test_vst4_lane_p8(i8* %a, [4 x <8 x i8>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst4_lane_p8(i8* frozen %a, [4 x <8 x i8>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.poly8x8x4_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.poly8x8x4_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x8x4_t, %struct.poly8x8x4_t* [[B]], i32 0, i32 0 @@ -6728,7 +6728,7 @@ vst4_lane_p8(a, b, 7); } -// CHECK-LABEL: define void @test_vst4_lane_p16(i16* %a, [4 x <4 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst4_lane_p16(i16* frozen %a, [4 x <4 x i16>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.poly16x4x4_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.poly16x4x4_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly16x4x4_t, %struct.poly16x4x4_t* [[B]], i32 0, i32 0 @@ -6763,7 +6763,7 @@ vst4_lane_p16(a, b, 3); } -// CHECK-LABEL: define void @test_vst4_lane_p64(i64* %a, [4 x <1 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define void @test_vst4_lane_p64(i64* frozen %a, [4 x <1 x i64>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.poly64x1x4_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.poly64x1x4_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly64x1x4_t, %struct.poly64x1x4_t* [[B]], i32 0, i32 0 diff --git a/clang/test/CodeGen/aarch64-neon-scalar-copy.c b/clang/test/CodeGen/aarch64-neon-scalar-copy.c --- a/clang/test/CodeGen/aarch64-neon-scalar-copy.c +++ b/clang/test/CodeGen/aarch64-neon-scalar-copy.c @@ -3,7 +3,7 @@ #include -// CHECK-LABEL: define float @test_vdups_lane_f32(<2 x float> %a) #0 { +// CHECK-LABEL: define frozen float @test_vdups_lane_f32(<2 x float> frozen %a) #0 { // CHECK: [[VDUPS_LANE:%.*]] = extractelement <2 x float> %a, i32 1 // CHECK: ret float [[VDUPS_LANE]] float32_t test_vdups_lane_f32(float32x2_t a) { @@ -11,7 +11,7 @@ } -// CHECK-LABEL: define double @test_vdupd_lane_f64(<1 x double> %a) #0 { +// CHECK-LABEL: define frozen double @test_vdupd_lane_f64(<1 x double> frozen %a) #0 { // CHECK: [[VDUPD_LANE:%.*]] = extractelement <1 x double> %a, i32 0 // CHECK: ret double [[VDUPD_LANE]] float64_t test_vdupd_lane_f64(float64x1_t a) { @@ -19,7 +19,7 @@ } -// CHECK-LABEL: define float @test_vdups_laneq_f32(<4 x float> %a) #1 { +// CHECK-LABEL: define frozen float @test_vdups_laneq_f32(<4 x float> frozen %a) #1 { // CHECK: [[VGETQ_LANE:%.*]] = extractelement <4 x float> %a, i32 3 // CHECK: ret float [[VGETQ_LANE]] float32_t test_vdups_laneq_f32(float32x4_t a) { @@ -27,7 +27,7 @@ } -// CHECK-LABEL: define double @test_vdupd_laneq_f64(<2 x double> %a) #1 { +// CHECK-LABEL: define frozen double @test_vdupd_laneq_f64(<2 x double> frozen %a) #1 { // CHECK: [[VGETQ_LANE:%.*]] = extractelement <2 x double> %a, i32 1 // CHECK: ret double [[VGETQ_LANE]] float64_t test_vdupd_laneq_f64(float64x2_t a) { @@ -35,7 +35,7 @@ } -// CHECK-LABEL: define i8 @test_vdupb_lane_s8(<8 x i8> %a) #0 { +// CHECK-LABEL: define frozen i8 @test_vdupb_lane_s8(<8 x i8> frozen %a) #0 { // CHECK: [[VGET_LANE:%.*]] = extractelement <8 x i8> %a, i32 7 // CHECK: ret i8 [[VGET_LANE]] int8_t test_vdupb_lane_s8(int8x8_t a) { @@ -43,7 +43,7 @@ } -// CHECK-LABEL: define i16 @test_vduph_lane_s16(<4 x i16> %a) #0 { +// CHECK-LABEL: define frozen i16 @test_vduph_lane_s16(<4 x i16> frozen %a) #0 { // CHECK: [[VGET_LANE:%.*]] = extractelement <4 x i16> %a, i32 3 // CHECK: ret i16 [[VGET_LANE]] int16_t test_vduph_lane_s16(int16x4_t a) { @@ -51,7 +51,7 @@ } -// CHECK-LABEL: define i32 @test_vdups_lane_s32(<2 x i32> %a) #0 { +// CHECK-LABEL: define frozen i32 @test_vdups_lane_s32(<2 x i32> frozen %a) #0 { // CHECK: [[VGET_LANE:%.*]] = extractelement <2 x i32> %a, i32 1 // CHECK: ret i32 [[VGET_LANE]] int32_t test_vdups_lane_s32(int32x2_t a) { @@ -59,7 +59,7 @@ } -// CHECK-LABEL: define i64 @test_vdupd_lane_s64(<1 x i64> %a) #0 { +// CHECK-LABEL: define frozen i64 @test_vdupd_lane_s64(<1 x i64> frozen %a) #0 { // CHECK: [[VGET_LANE:%.*]] = extractelement <1 x i64> %a, i32 0 // CHECK: ret i64 [[VGET_LANE]] int64_t test_vdupd_lane_s64(int64x1_t a) { @@ -67,7 +67,7 @@ } -// CHECK-LABEL: define i8 @test_vdupb_lane_u8(<8 x i8> %a) #0 { +// CHECK-LABEL: define frozen i8 @test_vdupb_lane_u8(<8 x i8> frozen %a) #0 { // CHECK: [[VGET_LANE:%.*]] = extractelement <8 x i8> %a, i32 7 // CHECK: ret i8 [[VGET_LANE]] uint8_t test_vdupb_lane_u8(uint8x8_t a) { @@ -75,7 +75,7 @@ } -// CHECK-LABEL: define i16 @test_vduph_lane_u16(<4 x i16> %a) #0 { +// CHECK-LABEL: define frozen i16 @test_vduph_lane_u16(<4 x i16> frozen %a) #0 { // CHECK: [[VGET_LANE:%.*]] = extractelement <4 x i16> %a, i32 3 // CHECK: ret i16 [[VGET_LANE]] uint16_t test_vduph_lane_u16(uint16x4_t a) { @@ -83,7 +83,7 @@ } -// CHECK-LABEL: define i32 @test_vdups_lane_u32(<2 x i32> %a) #0 { +// CHECK-LABEL: define frozen i32 @test_vdups_lane_u32(<2 x i32> frozen %a) #0 { // CHECK: [[VGET_LANE:%.*]] = extractelement <2 x i32> %a, i32 1 // CHECK: ret i32 [[VGET_LANE]] uint32_t test_vdups_lane_u32(uint32x2_t a) { @@ -91,14 +91,14 @@ } -// CHECK-LABEL: define i64 @test_vdupd_lane_u64(<1 x i64> %a) #0 { +// CHECK-LABEL: define frozen i64 @test_vdupd_lane_u64(<1 x i64> frozen %a) #0 { // CHECK: [[VGET_LANE:%.*]] = extractelement <1 x i64> %a, i32 0 // CHECK: ret i64 [[VGET_LANE]] uint64_t test_vdupd_lane_u64(uint64x1_t a) { return vdupd_lane_u64(a, 0); } -// CHECK-LABEL: define i8 @test_vdupb_laneq_s8(<16 x i8> %a) #1 { +// CHECK-LABEL: define frozen i8 @test_vdupb_laneq_s8(<16 x i8> frozen %a) #1 { // CHECK: [[VGETQ_LANE:%.*]] = extractelement <16 x i8> %a, i32 15 // CHECK: ret i8 [[VGETQ_LANE]] int8_t test_vdupb_laneq_s8(int8x16_t a) { @@ -106,7 +106,7 @@ } -// CHECK-LABEL: define i16 @test_vduph_laneq_s16(<8 x i16> %a) #1 { +// CHECK-LABEL: define frozen i16 @test_vduph_laneq_s16(<8 x i16> frozen %a) #1 { // CHECK: [[VGETQ_LANE:%.*]] = extractelement <8 x i16> %a, i32 7 // CHECK: ret i16 [[VGETQ_LANE]] int16_t test_vduph_laneq_s16(int16x8_t a) { @@ -114,7 +114,7 @@ } -// CHECK-LABEL: define i32 @test_vdups_laneq_s32(<4 x i32> %a) #1 { +// CHECK-LABEL: define frozen i32 @test_vdups_laneq_s32(<4 x i32> frozen %a) #1 { // CHECK: [[VGETQ_LANE:%.*]] = extractelement <4 x i32> %a, i32 3 // CHECK: ret i32 [[VGETQ_LANE]] int32_t test_vdups_laneq_s32(int32x4_t a) { @@ -122,7 +122,7 @@ } -// CHECK-LABEL: define i64 @test_vdupd_laneq_s64(<2 x i64> %a) #1 { +// CHECK-LABEL: define frozen i64 @test_vdupd_laneq_s64(<2 x i64> frozen %a) #1 { // CHECK: [[VGETQ_LANE:%.*]] = extractelement <2 x i64> %a, i32 1 // CHECK: ret i64 [[VGETQ_LANE]] int64_t test_vdupd_laneq_s64(int64x2_t a) { @@ -130,7 +130,7 @@ } -// CHECK-LABEL: define i8 @test_vdupb_laneq_u8(<16 x i8> %a) #1 { +// CHECK-LABEL: define frozen i8 @test_vdupb_laneq_u8(<16 x i8> frozen %a) #1 { // CHECK: [[VGETQ_LANE:%.*]] = extractelement <16 x i8> %a, i32 15 // CHECK: ret i8 [[VGETQ_LANE]] uint8_t test_vdupb_laneq_u8(uint8x16_t a) { @@ -138,7 +138,7 @@ } -// CHECK-LABEL: define i16 @test_vduph_laneq_u16(<8 x i16> %a) #1 { +// CHECK-LABEL: define frozen i16 @test_vduph_laneq_u16(<8 x i16> frozen %a) #1 { // CHECK: [[VGETQ_LANE:%.*]] = extractelement <8 x i16> %a, i32 7 // CHECK: ret i16 [[VGETQ_LANE]] uint16_t test_vduph_laneq_u16(uint16x8_t a) { @@ -146,7 +146,7 @@ } -// CHECK-LABEL: define i32 @test_vdups_laneq_u32(<4 x i32> %a) #1 { +// CHECK-LABEL: define frozen i32 @test_vdups_laneq_u32(<4 x i32> frozen %a) #1 { // CHECK: [[VGETQ_LANE:%.*]] = extractelement <4 x i32> %a, i32 3 // CHECK: ret i32 [[VGETQ_LANE]] uint32_t test_vdups_laneq_u32(uint32x4_t a) { @@ -154,35 +154,35 @@ } -// CHECK-LABEL: define i64 @test_vdupd_laneq_u64(<2 x i64> %a) #1 { +// CHECK-LABEL: define frozen i64 @test_vdupd_laneq_u64(<2 x i64> frozen %a) #1 { // CHECK: [[VGETQ_LANE:%.*]] = extractelement <2 x i64> %a, i32 1 // CHECK: ret i64 [[VGETQ_LANE]] uint64_t test_vdupd_laneq_u64(uint64x2_t a) { return vdupd_laneq_u64(a, 1); } -// CHECK-LABEL: define i8 @test_vdupb_lane_p8(<8 x i8> %a) #0 { +// CHECK-LABEL: define frozen i8 @test_vdupb_lane_p8(<8 x i8> frozen %a) #0 { // CHECK: [[VGET_LANE:%.*]] = extractelement <8 x i8> %a, i32 7 // CHECK: ret i8 [[VGET_LANE]] poly8_t test_vdupb_lane_p8(poly8x8_t a) { return vdupb_lane_p8(a, 7); } -// CHECK-LABEL: define i16 @test_vduph_lane_p16(<4 x i16> %a) #0 { +// CHECK-LABEL: define frozen i16 @test_vduph_lane_p16(<4 x i16> frozen %a) #0 { // CHECK: [[VGET_LANE:%.*]] = extractelement <4 x i16> %a, i32 3 // CHECK: ret i16 [[VGET_LANE]] poly16_t test_vduph_lane_p16(poly16x4_t a) { return vduph_lane_p16(a, 3); } -// CHECK-LABEL: define i8 @test_vdupb_laneq_p8(<16 x i8> %a) #1 { +// CHECK-LABEL: define frozen i8 @test_vdupb_laneq_p8(<16 x i8> frozen %a) #1 { // CHECK: [[VGETQ_LANE:%.*]] = extractelement <16 x i8> %a, i32 15 // CHECK: ret i8 [[VGETQ_LANE]] poly8_t test_vdupb_laneq_p8(poly8x16_t a) { return vdupb_laneq_p8(a, 15); } -// CHECK-LABEL: define i16 @test_vduph_laneq_p16(<8 x i16> %a) #1 { +// CHECK-LABEL: define frozen i16 @test_vduph_laneq_p16(<8 x i16> frozen %a) #1 { // CHECK: [[VGETQ_LANE:%.*]] = extractelement <8 x i16> %a, i32 7 // CHECK: ret i16 [[VGETQ_LANE]] poly16_t test_vduph_laneq_p16(poly16x8_t a) { diff --git a/clang/test/CodeGen/aarch64-neon-scalar-x-indexed-elem.c b/clang/test/CodeGen/aarch64-neon-scalar-x-indexed-elem.c --- a/clang/test/CodeGen/aarch64-neon-scalar-x-indexed-elem.c +++ b/clang/test/CodeGen/aarch64-neon-scalar-x-indexed-elem.c @@ -6,7 +6,7 @@ #include -// CHECK-LABEL: define float @test_vmuls_lane_f32(float %a, <2 x float> %b) #0 { +// CHECK-LABEL: define frozen float @test_vmuls_lane_f32(float frozen %a, <2 x float> frozen %b) #0 { // CHECK: [[VGET_LANE:%.*]] = extractelement <2 x float> %b, i32 1 // CHECK: [[MUL:%.*]] = fmul float %a, [[VGET_LANE]] // CHECK: ret float [[MUL]] @@ -14,7 +14,7 @@ return vmuls_lane_f32(a, b, 1); } -// CHECK-LABEL: define double @test_vmuld_lane_f64(double %a, <1 x double> %b) #0 { +// CHECK-LABEL: define frozen double @test_vmuld_lane_f64(double frozen %a, <1 x double> frozen %b) #0 { // CHECK: [[VGET_LANE:%.*]] = extractelement <1 x double> %b, i32 0 // CHECK: [[MUL:%.*]] = fmul double %a, [[VGET_LANE]] // CHECK: ret double [[MUL]] @@ -22,7 +22,7 @@ return vmuld_lane_f64(a, b, 0); } -// CHECK-LABEL: define float @test_vmuls_laneq_f32(float %a, <4 x float> %b) #1 { +// CHECK-LABEL: define frozen float @test_vmuls_laneq_f32(float frozen %a, <4 x float> frozen %b) #1 { // CHECK: [[VGETQ_LANE:%.*]] = extractelement <4 x float> %b, i32 3 // CHECK: [[MUL:%.*]] = fmul float %a, [[VGETQ_LANE]] // CHECK: ret float [[MUL]] @@ -30,7 +30,7 @@ return vmuls_laneq_f32(a, b, 3); } -// CHECK-LABEL: define double @test_vmuld_laneq_f64(double %a, <2 x double> %b) #1 { +// CHECK-LABEL: define frozen double @test_vmuld_laneq_f64(double frozen %a, <2 x double> frozen %b) #1 { // CHECK: [[VGETQ_LANE:%.*]] = extractelement <2 x double> %b, i32 1 // CHECK: [[MUL:%.*]] = fmul double %a, [[VGETQ_LANE]] // CHECK: ret double [[MUL]] @@ -38,7 +38,7 @@ return vmuld_laneq_f64(a, b, 1); } -// CHECK-LABEL: define <1 x double> @test_vmul_n_f64(<1 x double> %a, double %b) #0 { +// CHECK-LABEL: define frozen <1 x double> @test_vmul_n_f64(<1 x double> frozen %a, double frozen %b) #0 { // CHECK: [[TMP2:%.*]] = bitcast <1 x double> %a to double // CHECK: [[TMP3:%.*]] = fmul double [[TMP2]], %b // CHECK: [[TMP4:%.*]] = bitcast double [[TMP3]] to <1 x double> @@ -47,7 +47,7 @@ return vmul_n_f64(a, b); } -// CHECK-LABEL: define float @test_vmulxs_lane_f32(float %a, <2 x float> %b) #0 { +// CHECK-LABEL: define frozen float @test_vmulxs_lane_f32(float frozen %a, <2 x float> frozen %b) #0 { // CHECK: [[VGET_LANE:%.*]] = extractelement <2 x float> %b, i32 1 // CHECK: [[VMULXS_F32_I:%.*]] = call float @llvm.aarch64.neon.fmulx.f32(float %a, float [[VGET_LANE]]) // CHECK: ret float [[VMULXS_F32_I]] @@ -55,7 +55,7 @@ return vmulxs_lane_f32(a, b, 1); } -// CHECK-LABEL: define float @test_vmulxs_laneq_f32(float %a, <4 x float> %b) #1 { +// CHECK-LABEL: define frozen float @test_vmulxs_laneq_f32(float frozen %a, <4 x float> frozen %b) #1 { // CHECK: [[VGETQ_LANE:%.*]] = extractelement <4 x float> %b, i32 3 // CHECK: [[VMULXS_F32_I:%.*]] = call float @llvm.aarch64.neon.fmulx.f32(float %a, float [[VGETQ_LANE]]) // CHECK: ret float [[VMULXS_F32_I]] @@ -63,7 +63,7 @@ return vmulxs_laneq_f32(a, b, 3); } -// CHECK-LABEL: define double @test_vmulxd_lane_f64(double %a, <1 x double> %b) #0 { +// CHECK-LABEL: define frozen double @test_vmulxd_lane_f64(double frozen %a, <1 x double> frozen %b) #0 { // CHECK: [[VGET_LANE:%.*]] = extractelement <1 x double> %b, i32 0 // CHECK: [[VMULXD_F64_I:%.*]] = call double @llvm.aarch64.neon.fmulx.f64(double %a, double [[VGET_LANE]]) // CHECK: ret double [[VMULXD_F64_I]] @@ -71,7 +71,7 @@ return vmulxd_lane_f64(a, b, 0); } -// CHECK-LABEL: define double @test_vmulxd_laneq_f64(double %a, <2 x double> %b) #1 { +// CHECK-LABEL: define frozen double @test_vmulxd_laneq_f64(double frozen %a, <2 x double> frozen %b) #1 { // CHECK: [[VGETQ_LANE:%.*]] = extractelement <2 x double> %b, i32 1 // CHECK: [[VMULXD_F64_I:%.*]] = call double @llvm.aarch64.neon.fmulx.f64(double %a, double [[VGETQ_LANE]]) // CHECK: ret double [[VMULXD_F64_I]] @@ -79,7 +79,7 @@ return vmulxd_laneq_f64(a, b, 1); } -// CHECK-LABEL: define <1 x double> @test_vmulx_lane_f64(<1 x double> %a, <1 x double> %b) #0 { +// CHECK-LABEL: define frozen <1 x double> @test_vmulx_lane_f64(<1 x double> frozen %a, <1 x double> frozen %b) #0 { // CHECK: [[VGET_LANE:%.*]] = extractelement <1 x double> %a, i32 0 // CHECK: [[VGET_LANE6:%.*]] = extractelement <1 x double> %b, i32 0 // CHECK: [[VMULXD_F64_I:%.*]] = call double @llvm.aarch64.neon.fmulx.f64(double [[VGET_LANE]], double [[VGET_LANE6]]) @@ -90,7 +90,7 @@ } -// CHECK-LABEL: define <1 x double> @test_vmulx_laneq_f64_0(<1 x double> %a, <2 x double> %b) #1 { +// CHECK-LABEL: define frozen <1 x double> @test_vmulx_laneq_f64_0(<1 x double> frozen %a, <2 x double> frozen %b) #1 { // CHECK: [[VGET_LANE:%.*]] = extractelement <1 x double> %a, i32 0 // CHECK: [[VGETQ_LANE:%.*]] = extractelement <2 x double> %b, i32 0 // CHECK: [[VMULXD_F64_I:%.*]] = call double @llvm.aarch64.neon.fmulx.f64(double [[VGET_LANE]], double [[VGETQ_LANE]]) @@ -100,7 +100,7 @@ return vmulx_laneq_f64(a, b, 0); } -// CHECK-LABEL: define <1 x double> @test_vmulx_laneq_f64_1(<1 x double> %a, <2 x double> %b) #1 { +// CHECK-LABEL: define frozen <1 x double> @test_vmulx_laneq_f64_1(<1 x double> frozen %a, <2 x double> frozen %b) #1 { // CHECK: [[VGET_LANE:%.*]] = extractelement <1 x double> %a, i32 0 // CHECK: [[VGETQ_LANE:%.*]] = extractelement <2 x double> %b, i32 1 // CHECK: [[VMULXD_F64_I:%.*]] = call double @llvm.aarch64.neon.fmulx.f64(double [[VGET_LANE]], double [[VGETQ_LANE]]) @@ -111,7 +111,7 @@ } -// CHECK-LABEL: define float @test_vfmas_lane_f32(float %a, float %b, <2 x float> %c) #0 { +// CHECK-LABEL: define frozen float @test_vfmas_lane_f32(float frozen %a, float frozen %b, <2 x float> frozen %c) #0 { // CHECK: [[EXTRACT:%.*]] = extractelement <2 x float> %c, i32 1 // CHECK: [[TMP2:%.*]] = call float @llvm.fma.f32(float %b, float [[EXTRACT]], float %a) // CHECK: ret float [[TMP2]] @@ -119,7 +119,7 @@ return vfmas_lane_f32(a, b, c, 1); } -// CHECK-LABEL: define double @test_vfmad_lane_f64(double %a, double %b, <1 x double> %c) #0 { +// CHECK-LABEL: define frozen double @test_vfmad_lane_f64(double frozen %a, double frozen %b, <1 x double> frozen %c) #0 { // CHECK: [[EXTRACT:%.*]] = extractelement <1 x double> %c, i32 0 // CHECK: [[TMP2:%.*]] = call double @llvm.fma.f64(double %b, double [[EXTRACT]], double %a) // CHECK: ret double [[TMP2]] @@ -127,7 +127,7 @@ return vfmad_lane_f64(a, b, c, 0); } -// CHECK-LABEL: define double @test_vfmad_laneq_f64(double %a, double %b, <2 x double> %c) #1 { +// CHECK-LABEL: define frozen double @test_vfmad_laneq_f64(double frozen %a, double frozen %b, <2 x double> frozen %c) #1 { // CHECK: [[EXTRACT:%.*]] = extractelement <2 x double> %c, i32 1 // CHECK: [[TMP2:%.*]] = call double @llvm.fma.f64(double %b, double [[EXTRACT]], double %a) // CHECK: ret double [[TMP2]] @@ -135,7 +135,7 @@ return vfmad_laneq_f64(a, b, c, 1); } -// CHECK-LABEL: define float @test_vfmss_lane_f32(float %a, float %b, <2 x float> %c) #0 { +// CHECK-LABEL: define frozen float @test_vfmss_lane_f32(float frozen %a, float frozen %b, <2 x float> frozen %c) #0 { // CHECK: [[SUB:%.*]] = fneg float %b // CHECK: [[EXTRACT:%.*]] = extractelement <2 x float> %c, i32 1 // CHECK: [[TMP2:%.*]] = call float @llvm.fma.f32(float [[SUB]], float [[EXTRACT]], float %a) @@ -144,7 +144,7 @@ return vfmss_lane_f32(a, b, c, 1); } -// CHECK-LABEL: define <1 x double> @test_vfma_lane_f64(<1 x double> %a, <1 x double> %b, <1 x double> %v) #0 { +// CHECK-LABEL: define frozen <1 x double> @test_vfma_lane_f64(<1 x double> frozen %a, <1 x double> frozen %b, <1 x double> frozen %v) #0 { // CHECK: [[TMP0:%.*]] = bitcast <1 x double> %a to <8 x i8> // CHECK: [[TMP1:%.*]] = bitcast <1 x double> %b to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <1 x double> %v to <8 x i8> @@ -158,7 +158,7 @@ return vfma_lane_f64(a, b, v, 0); } -// CHECK-LABEL: define <1 x double> @test_vfms_lane_f64(<1 x double> %a, <1 x double> %b, <1 x double> %v) #0 { +// CHECK-LABEL: define frozen <1 x double> @test_vfms_lane_f64(<1 x double> frozen %a, <1 x double> frozen %b, <1 x double> frozen %v) #0 { // CHECK: [[SUB:%.*]] = fneg <1 x double> %b // CHECK: [[TMP0:%.*]] = bitcast <1 x double> %a to <8 x i8> // CHECK: [[TMP1:%.*]] = bitcast <1 x double> [[SUB]] to <8 x i8> @@ -173,7 +173,7 @@ return vfms_lane_f64(a, b, v, 0); } -// CHECK-LABEL: define <1 x double> @test_vfma_laneq_f64(<1 x double> %a, <1 x double> %b, <2 x double> %v) #1 { +// CHECK-LABEL: define frozen <1 x double> @test_vfma_laneq_f64(<1 x double> frozen %a, <1 x double> frozen %b, <2 x double> frozen %v) #1 { // CHECK: [[TMP0:%.*]] = bitcast <1 x double> %a to <8 x i8> // CHECK: [[TMP1:%.*]] = bitcast <1 x double> %b to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <2 x double> %v to <16 x i8> @@ -188,7 +188,7 @@ return vfma_laneq_f64(a, b, v, 0); } -// CHECK-LABEL: define <1 x double> @test_vfms_laneq_f64(<1 x double> %a, <1 x double> %b, <2 x double> %v) #1 { +// CHECK-LABEL: define frozen <1 x double> @test_vfms_laneq_f64(<1 x double> frozen %a, <1 x double> frozen %b, <2 x double> frozen %v) #1 { // CHECK: [[SUB:%.*]] = fneg <1 x double> %b // CHECK: [[TMP0:%.*]] = bitcast <1 x double> %a to <8 x i8> // CHECK: [[TMP1:%.*]] = bitcast <1 x double> [[SUB]] to <8 x i8> @@ -204,7 +204,7 @@ return vfms_laneq_f64(a, b, v, 0); } -// CHECK-LABEL: define i32 @test_vqdmullh_lane_s16(i16 %a, <4 x i16> %b) #0 { +// CHECK-LABEL: define frozen i32 @test_vqdmullh_lane_s16(i16 frozen %a, <4 x i16> frozen %b) #0 { // CHECK: [[VGET_LANE:%.*]] = extractelement <4 x i16> %b, i32 3 // CHECK: [[TMP2:%.*]] = insertelement <4 x i16> undef, i16 %a, i64 0 // CHECK: [[TMP3:%.*]] = insertelement <4 x i16> undef, i16 [[VGET_LANE]], i64 0 @@ -215,7 +215,7 @@ return vqdmullh_lane_s16(a, b, 3); } -// CHECK-LABEL: define i64 @test_vqdmulls_lane_s32(i32 %a, <2 x i32> %b) #0 { +// CHECK-LABEL: define frozen i64 @test_vqdmulls_lane_s32(i32 frozen %a, <2 x i32> frozen %b) #0 { // CHECK: [[VGET_LANE:%.*]] = extractelement <2 x i32> %b, i32 1 // CHECK: [[VQDMULLS_S32_I:%.*]] = call i64 @llvm.aarch64.neon.sqdmulls.scalar(i32 %a, i32 [[VGET_LANE]]) // CHECK: ret i64 [[VQDMULLS_S32_I]] @@ -223,7 +223,7 @@ return vqdmulls_lane_s32(a, b, 1); } -// CHECK-LABEL: define i32 @test_vqdmullh_laneq_s16(i16 %a, <8 x i16> %b) #1 { +// CHECK-LABEL: define frozen i32 @test_vqdmullh_laneq_s16(i16 frozen %a, <8 x i16> frozen %b) #1 { // CHECK: [[VGETQ_LANE:%.*]] = extractelement <8 x i16> %b, i32 7 // CHECK: [[TMP2:%.*]] = insertelement <4 x i16> undef, i16 %a, i64 0 // CHECK: [[TMP3:%.*]] = insertelement <4 x i16> undef, i16 [[VGETQ_LANE]], i64 0 @@ -234,7 +234,7 @@ return vqdmullh_laneq_s16(a, b, 7); } -// CHECK-LABEL: define i64 @test_vqdmulls_laneq_s32(i32 %a, <4 x i32> %b) #1 { +// CHECK-LABEL: define frozen i64 @test_vqdmulls_laneq_s32(i32 frozen %a, <4 x i32> frozen %b) #1 { // CHECK: [[VGETQ_LANE:%.*]] = extractelement <4 x i32> %b, i32 3 // CHECK: [[VQDMULLS_S32_I:%.*]] = call i64 @llvm.aarch64.neon.sqdmulls.scalar(i32 %a, i32 [[VGETQ_LANE]]) // CHECK: ret i64 [[VQDMULLS_S32_I]] @@ -242,7 +242,7 @@ return vqdmulls_laneq_s32(a, b, 3); } -// CHECK-LABEL: define i16 @test_vqdmulhh_lane_s16(i16 %a, <4 x i16> %b) #0 { +// CHECK-LABEL: define frozen i16 @test_vqdmulhh_lane_s16(i16 frozen %a, <4 x i16> frozen %b) #0 { // CHECK: [[VGET_LANE:%.*]] = extractelement <4 x i16> %b, i32 3 // CHECK: [[TMP2:%.*]] = insertelement <4 x i16> undef, i16 %a, i64 0 // CHECK: [[TMP3:%.*]] = insertelement <4 x i16> undef, i16 [[VGET_LANE]], i64 0 @@ -253,7 +253,7 @@ return vqdmulhh_lane_s16(a, b, 3); } -// CHECK-LABEL: define i32 @test_vqdmulhs_lane_s32(i32 %a, <2 x i32> %b) #0 { +// CHECK-LABEL: define frozen i32 @test_vqdmulhs_lane_s32(i32 frozen %a, <2 x i32> frozen %b) #0 { // CHECK: [[VGET_LANE:%.*]] = extractelement <2 x i32> %b, i32 1 // CHECK: [[VQDMULHS_S32_I:%.*]] = call i32 @llvm.aarch64.neon.sqdmulh.i32(i32 %a, i32 [[VGET_LANE]]) // CHECK: ret i32 [[VQDMULHS_S32_I]] @@ -262,7 +262,7 @@ } -// CHECK-LABEL: define i16 @test_vqdmulhh_laneq_s16(i16 %a, <8 x i16> %b) #1 { +// CHECK-LABEL: define frozen i16 @test_vqdmulhh_laneq_s16(i16 frozen %a, <8 x i16> frozen %b) #1 { // CHECK: [[VGETQ_LANE:%.*]] = extractelement <8 x i16> %b, i32 7 // CHECK: [[TMP2:%.*]] = insertelement <4 x i16> undef, i16 %a, i64 0 // CHECK: [[TMP3:%.*]] = insertelement <4 x i16> undef, i16 [[VGETQ_LANE]], i64 0 @@ -274,7 +274,7 @@ } -// CHECK-LABEL: define i32 @test_vqdmulhs_laneq_s32(i32 %a, <4 x i32> %b) #1 { +// CHECK-LABEL: define frozen i32 @test_vqdmulhs_laneq_s32(i32 frozen %a, <4 x i32> frozen %b) #1 { // CHECK: [[VGETQ_LANE:%.*]] = extractelement <4 x i32> %b, i32 3 // CHECK: [[VQDMULHS_S32_I:%.*]] = call i32 @llvm.aarch64.neon.sqdmulh.i32(i32 %a, i32 [[VGETQ_LANE]]) // CHECK: ret i32 [[VQDMULHS_S32_I]] @@ -282,7 +282,7 @@ return vqdmulhs_laneq_s32(a, b, 3); } -// CHECK-LABEL: define i16 @test_vqrdmulhh_lane_s16(i16 %a, <4 x i16> %b) #0 { +// CHECK-LABEL: define frozen i16 @test_vqrdmulhh_lane_s16(i16 frozen %a, <4 x i16> frozen %b) #0 { // CHECK: [[VGET_LANE:%.*]] = extractelement <4 x i16> %b, i32 3 // CHECK: [[TMP2:%.*]] = insertelement <4 x i16> undef, i16 %a, i64 0 // CHECK: [[TMP3:%.*]] = insertelement <4 x i16> undef, i16 [[VGET_LANE]], i64 0 @@ -293,7 +293,7 @@ return vqrdmulhh_lane_s16(a, b, 3); } -// CHECK-LABEL: define i32 @test_vqrdmulhs_lane_s32(i32 %a, <2 x i32> %b) #0 { +// CHECK-LABEL: define frozen i32 @test_vqrdmulhs_lane_s32(i32 frozen %a, <2 x i32> frozen %b) #0 { // CHECK: [[VGET_LANE:%.*]] = extractelement <2 x i32> %b, i32 1 // CHECK: [[VQRDMULHS_S32_I:%.*]] = call i32 @llvm.aarch64.neon.sqrdmulh.i32(i32 %a, i32 [[VGET_LANE]]) // CHECK: ret i32 [[VQRDMULHS_S32_I]] @@ -302,7 +302,7 @@ } -// CHECK-LABEL: define i16 @test_vqrdmulhh_laneq_s16(i16 %a, <8 x i16> %b) #1 { +// CHECK-LABEL: define frozen i16 @test_vqrdmulhh_laneq_s16(i16 frozen %a, <8 x i16> frozen %b) #1 { // CHECK: [[VGETQ_LANE:%.*]] = extractelement <8 x i16> %b, i32 7 // CHECK: [[TMP2:%.*]] = insertelement <4 x i16> undef, i16 %a, i64 0 // CHECK: [[TMP3:%.*]] = insertelement <4 x i16> undef, i16 [[VGETQ_LANE]], i64 0 @@ -314,7 +314,7 @@ } -// CHECK-LABEL: define i32 @test_vqrdmulhs_laneq_s32(i32 %a, <4 x i32> %b) #1 { +// CHECK-LABEL: define frozen i32 @test_vqrdmulhs_laneq_s32(i32 frozen %a, <4 x i32> frozen %b) #1 { // CHECK: [[VGETQ_LANE:%.*]] = extractelement <4 x i32> %b, i32 3 // CHECK: [[VQRDMULHS_S32_I:%.*]] = call i32 @llvm.aarch64.neon.sqrdmulh.i32(i32 %a, i32 [[VGETQ_LANE]]) // CHECK: ret i32 [[VQRDMULHS_S32_I]] @@ -322,7 +322,7 @@ return vqrdmulhs_laneq_s32(a, b, 3); } -// CHECK-LABEL: define i32 @test_vqdmlalh_lane_s16(i32 %a, i16 %b, <4 x i16> %c) #0 { +// CHECK-LABEL: define frozen i32 @test_vqdmlalh_lane_s16(i32 frozen %a, i16 frozen %b, <4 x i16> frozen %c) #0 { // CHECK: [[LANE:%.*]] = extractelement <4 x i16> %c, i32 3 // CHECK: [[TMP2:%.*]] = insertelement <4 x i16> undef, i16 %b, i64 0 // CHECK: [[TMP3:%.*]] = insertelement <4 x i16> undef, i16 [[LANE]], i64 0 @@ -334,7 +334,7 @@ return vqdmlalh_lane_s16(a, b, c, 3); } -// CHECK-LABEL: define i64 @test_vqdmlals_lane_s32(i64 %a, i32 %b, <2 x i32> %c) #0 { +// CHECK-LABEL: define frozen i64 @test_vqdmlals_lane_s32(i64 frozen %a, i32 frozen %b, <2 x i32> frozen %c) #0 { // CHECK: [[LANE:%.*]] = extractelement <2 x i32> %c, i32 1 // CHECK: [[VQDMLXL:%.*]] = call i64 @llvm.aarch64.neon.sqdmulls.scalar(i32 %b, i32 [[LANE]]) // CHECK: [[VQDMLXL1:%.*]] = call i64 @llvm.aarch64.neon.sqadd.i64(i64 %a, i64 [[VQDMLXL]]) @@ -343,7 +343,7 @@ return vqdmlals_lane_s32(a, b, c, 1); } -// CHECK-LABEL: define i32 @test_vqdmlalh_laneq_s16(i32 %a, i16 %b, <8 x i16> %c) #1 { +// CHECK-LABEL: define frozen i32 @test_vqdmlalh_laneq_s16(i32 frozen %a, i16 frozen %b, <8 x i16> frozen %c) #1 { // CHECK: [[LANE:%.*]] = extractelement <8 x i16> %c, i32 7 // CHECK: [[TMP2:%.*]] = insertelement <4 x i16> undef, i16 %b, i64 0 // CHECK: [[TMP3:%.*]] = insertelement <4 x i16> undef, i16 [[LANE]], i64 0 @@ -355,7 +355,7 @@ return vqdmlalh_laneq_s16(a, b, c, 7); } -// CHECK-LABEL: define i64 @test_vqdmlals_laneq_s32(i64 %a, i32 %b, <4 x i32> %c) #1 { +// CHECK-LABEL: define frozen i64 @test_vqdmlals_laneq_s32(i64 frozen %a, i32 frozen %b, <4 x i32> frozen %c) #1 { // CHECK: [[LANE:%.*]] = extractelement <4 x i32> %c, i32 3 // CHECK: [[VQDMLXL:%.*]] = call i64 @llvm.aarch64.neon.sqdmulls.scalar(i32 %b, i32 [[LANE]]) // CHECK: [[VQDMLXL1:%.*]] = call i64 @llvm.aarch64.neon.sqadd.i64(i64 %a, i64 [[VQDMLXL]]) @@ -364,7 +364,7 @@ return vqdmlals_laneq_s32(a, b, c, 3); } -// CHECK-LABEL: define i32 @test_vqdmlslh_lane_s16(i32 %a, i16 %b, <4 x i16> %c) #0 { +// CHECK-LABEL: define frozen i32 @test_vqdmlslh_lane_s16(i32 frozen %a, i16 frozen %b, <4 x i16> frozen %c) #0 { // CHECK: [[LANE:%.*]] = extractelement <4 x i16> %c, i32 3 // CHECK: [[TMP2:%.*]] = insertelement <4 x i16> undef, i16 %b, i64 0 // CHECK: [[TMP3:%.*]] = insertelement <4 x i16> undef, i16 [[LANE]], i64 0 @@ -376,7 +376,7 @@ return vqdmlslh_lane_s16(a, b, c, 3); } -// CHECK-LABEL: define i64 @test_vqdmlsls_lane_s32(i64 %a, i32 %b, <2 x i32> %c) #0 { +// CHECK-LABEL: define frozen i64 @test_vqdmlsls_lane_s32(i64 frozen %a, i32 frozen %b, <2 x i32> frozen %c) #0 { // CHECK: [[LANE:%.*]] = extractelement <2 x i32> %c, i32 1 // CHECK: [[VQDMLXL:%.*]] = call i64 @llvm.aarch64.neon.sqdmulls.scalar(i32 %b, i32 [[LANE]]) // CHECK: [[VQDMLXL1:%.*]] = call i64 @llvm.aarch64.neon.sqsub.i64(i64 %a, i64 [[VQDMLXL]]) @@ -385,7 +385,7 @@ return vqdmlsls_lane_s32(a, b, c, 1); } -// CHECK-LABEL: define i32 @test_vqdmlslh_laneq_s16(i32 %a, i16 %b, <8 x i16> %c) #1 { +// CHECK-LABEL: define frozen i32 @test_vqdmlslh_laneq_s16(i32 frozen %a, i16 frozen %b, <8 x i16> frozen %c) #1 { // CHECK: [[LANE:%.*]] = extractelement <8 x i16> %c, i32 7 // CHECK: [[TMP2:%.*]] = insertelement <4 x i16> undef, i16 %b, i64 0 // CHECK: [[TMP3:%.*]] = insertelement <4 x i16> undef, i16 [[LANE]], i64 0 @@ -397,7 +397,7 @@ return vqdmlslh_laneq_s16(a, b, c, 7); } -// CHECK-LABEL: define i64 @test_vqdmlsls_laneq_s32(i64 %a, i32 %b, <4 x i32> %c) #1 { +// CHECK-LABEL: define frozen i64 @test_vqdmlsls_laneq_s32(i64 frozen %a, i32 frozen %b, <4 x i32> frozen %c) #1 { // CHECK: [[LANE:%.*]] = extractelement <4 x i32> %c, i32 3 // CHECK: [[VQDMLXL:%.*]] = call i64 @llvm.aarch64.neon.sqdmulls.scalar(i32 %b, i32 [[LANE]]) // CHECK: [[VQDMLXL1:%.*]] = call i64 @llvm.aarch64.neon.sqsub.i64(i64 %a, i64 [[VQDMLXL]]) @@ -406,7 +406,7 @@ return vqdmlsls_laneq_s32(a, b, c, 3); } -// CHECK-LABEL: define <1 x double> @test_vmulx_lane_f64_0() #0 { +// CHECK-LABEL: define frozen <1 x double> @test_vmulx_lane_f64_0() #0 { // CHECK: [[TMP0:%.*]] = bitcast i64 4599917171378402754 to <1 x double> // CHECK: [[TMP1:%.*]] = bitcast i64 4606655882138939123 to <1 x double> // CHECK: [[VGET_LANE:%.*]] = extractelement <1 x double> [[TMP0]], i32 0 @@ -425,7 +425,7 @@ return result; } -// CHECK-LABEL: define <1 x double> @test_vmulx_laneq_f64_2() #1 { +// CHECK-LABEL: define frozen <1 x double> @test_vmulx_laneq_f64_2() #1 { // CHECK: [[TMP0:%.*]] = bitcast i64 4599917171378402754 to <1 x double> // CHECK: [[TMP1:%.*]] = bitcast i64 4606655882138939123 to <1 x double> // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <1 x double> [[TMP0]], <1 x double> [[TMP1]], <2 x i32> diff --git a/clang/test/CodeGen/aarch64-neon-tbl.c b/clang/test/CodeGen/aarch64-neon-tbl.c --- a/clang/test/CodeGen/aarch64-neon-tbl.c +++ b/clang/test/CodeGen/aarch64-neon-tbl.c @@ -5,7 +5,7 @@ #include -// CHECK-LABEL: define <8 x i8> @test_vtbl1_s8(<8 x i8> %a, <8 x i8> %b) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vtbl1_s8(<8 x i8> frozen %a, <8 x i8> frozen %b) #0 { // CHECK: [[VTBL1_I:%.*]] = shufflevector <8 x i8> %a, <8 x i8> zeroinitializer, <16 x i32> // CHECK: [[VTBL11_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.tbl1.v8i8(<16 x i8> [[VTBL1_I]], <8 x i8> %b) #3 // CHECK: ret <8 x i8> [[VTBL11_I]] @@ -13,14 +13,14 @@ return vtbl1_s8(a, b); } -// CHECK-LABEL: define <8 x i8> @test_vqtbl1_s8(<16 x i8> %a, <8 x i8> %b) #1 { +// CHECK-LABEL: define frozen <8 x i8> @test_vqtbl1_s8(<16 x i8> frozen %a, <8 x i8> frozen %b) #1 { // CHECK: [[VTBL1_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.tbl1.v8i8(<16 x i8> %a, <8 x i8> %b) #3 // CHECK: ret <8 x i8> [[VTBL1_I]] int8x8_t test_vqtbl1_s8(int8x16_t a, uint8x8_t b) { return vqtbl1_s8(a, b); } -// CHECK-LABEL: define <8 x i8> @test_vtbl2_s8([2 x <8 x i8>] %a.coerce, <8 x i8> %b) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vtbl2_s8([2 x <8 x i8>] %a.coerce, <8 x i8> frozen %b) #0 { // CHECK: [[__P0_I:%.*]] = alloca %struct.int8x8x2_t, align 8 // CHECK: [[A:%.*]] = alloca %struct.int8x8x2_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x8x2_t, %struct.int8x8x2_t* [[A]], i32 0, i32 0 @@ -42,7 +42,7 @@ return vtbl2_s8(a, b); } -// CHECK-LABEL: define <8 x i8> @test_vqtbl2_s8([2 x <16 x i8>] %a.coerce, <8 x i8> %b) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vqtbl2_s8([2 x <16 x i8>] %a.coerce, <8 x i8> frozen %b) #0 { // CHECK: [[__P0_I:%.*]] = alloca %struct.int8x16x2_t, align 16 // CHECK: [[A:%.*]] = alloca %struct.int8x16x2_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x16x2_t, %struct.int8x16x2_t* [[A]], i32 0, i32 0 @@ -63,7 +63,7 @@ return vqtbl2_s8(a, b); } -// CHECK-LABEL: define <8 x i8> @test_vtbl3_s8([3 x <8 x i8>] %a.coerce, <8 x i8> %b) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vtbl3_s8([3 x <8 x i8>] %a.coerce, <8 x i8> frozen %b) #0 { // CHECK: [[__P0_I:%.*]] = alloca %struct.int8x8x3_t, align 8 // CHECK: [[A:%.*]] = alloca %struct.int8x8x3_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x8x3_t, %struct.int8x8x3_t* [[A]], i32 0, i32 0 @@ -89,7 +89,7 @@ return vtbl3_s8(a, b); } -// CHECK-LABEL: define <8 x i8> @test_vqtbl3_s8([3 x <16 x i8>] %a.coerce, <8 x i8> %b) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vqtbl3_s8([3 x <16 x i8>] %a.coerce, <8 x i8> frozen %b) #0 { // CHECK: [[__P0_I:%.*]] = alloca %struct.int8x16x3_t, align 16 // CHECK: [[A:%.*]] = alloca %struct.int8x16x3_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x16x3_t, %struct.int8x16x3_t* [[A]], i32 0, i32 0 @@ -113,7 +113,7 @@ return vqtbl3_s8(a, b); } -// CHECK-LABEL: define <8 x i8> @test_vtbl4_s8([4 x <8 x i8>] %a.coerce, <8 x i8> %b) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vtbl4_s8([4 x <8 x i8>] %a.coerce, <8 x i8> frozen %b) #0 { // CHECK: [[__P0_I:%.*]] = alloca %struct.int8x8x4_t, align 8 // CHECK: [[A:%.*]] = alloca %struct.int8x8x4_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x8x4_t, %struct.int8x8x4_t* [[A]], i32 0, i32 0 @@ -142,7 +142,7 @@ return vtbl4_s8(a, b); } -// CHECK-LABEL: define <8 x i8> @test_vqtbl4_s8([4 x <16 x i8>] %a.coerce, <8 x i8> %b) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vqtbl4_s8([4 x <16 x i8>] %a.coerce, <8 x i8> frozen %b) #0 { // CHECK: [[__P0_I:%.*]] = alloca %struct.int8x16x4_t, align 16 // CHECK: [[A:%.*]] = alloca %struct.int8x16x4_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x16x4_t, %struct.int8x16x4_t* [[A]], i32 0, i32 0 @@ -169,14 +169,14 @@ return vqtbl4_s8(a, b); } -// CHECK-LABEL: define <16 x i8> @test_vqtbl1q_s8(<16 x i8> %a, <16 x i8> %b) #1 { +// CHECK-LABEL: define frozen <16 x i8> @test_vqtbl1q_s8(<16 x i8> frozen %a, <16 x i8> frozen %b) #1 { // CHECK: [[VTBL1_I:%.*]] = call <16 x i8> @llvm.aarch64.neon.tbl1.v16i8(<16 x i8> %a, <16 x i8> %b) #3 // CHECK: ret <16 x i8> [[VTBL1_I]] int8x16_t test_vqtbl1q_s8(int8x16_t a, int8x16_t b) { return vqtbl1q_s8(a, b); } -// CHECK-LABEL: define <16 x i8> @test_vqtbl2q_s8([2 x <16 x i8>] %a.coerce, <16 x i8> %b) #1 { +// CHECK-LABEL: define frozen <16 x i8> @test_vqtbl2q_s8([2 x <16 x i8>] %a.coerce, <16 x i8> frozen %b) #1 { // CHECK: [[__P0_I:%.*]] = alloca %struct.int8x16x2_t, align 16 // CHECK: [[A:%.*]] = alloca %struct.int8x16x2_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x16x2_t, %struct.int8x16x2_t* [[A]], i32 0, i32 0 @@ -197,7 +197,7 @@ return vqtbl2q_s8(a, b); } -// CHECK-LABEL: define <16 x i8> @test_vqtbl3q_s8([3 x <16 x i8>] %a.coerce, <16 x i8> %b) #1 { +// CHECK-LABEL: define frozen <16 x i8> @test_vqtbl3q_s8([3 x <16 x i8>] %a.coerce, <16 x i8> frozen %b) #1 { // CHECK: [[__P0_I:%.*]] = alloca %struct.int8x16x3_t, align 16 // CHECK: [[A:%.*]] = alloca %struct.int8x16x3_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x16x3_t, %struct.int8x16x3_t* [[A]], i32 0, i32 0 @@ -221,7 +221,7 @@ return vqtbl3q_s8(a, b); } -// CHECK-LABEL: define <16 x i8> @test_vqtbl4q_s8([4 x <16 x i8>] %a.coerce, <16 x i8> %b) #1 { +// CHECK-LABEL: define frozen <16 x i8> @test_vqtbl4q_s8([4 x <16 x i8>] %a.coerce, <16 x i8> frozen %b) #1 { // CHECK: [[__P0_I:%.*]] = alloca %struct.int8x16x4_t, align 16 // CHECK: [[A:%.*]] = alloca %struct.int8x16x4_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x16x4_t, %struct.int8x16x4_t* [[A]], i32 0, i32 0 @@ -248,7 +248,7 @@ return vqtbl4q_s8(a, b); } -// CHECK-LABEL: define <8 x i8> @test_vtbx1_s8(<8 x i8> %a, <8 x i8> %b, <8 x i8> %c) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vtbx1_s8(<8 x i8> frozen %a, <8 x i8> frozen %b, <8 x i8> frozen %c) #0 { // CHECK: [[VTBL1_I:%.*]] = shufflevector <8 x i8> %b, <8 x i8> zeroinitializer, <16 x i32> // CHECK: [[VTBL11_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.tbl1.v8i8(<16 x i8> [[VTBL1_I]], <8 x i8> %c) #3 // CHECK: [[TMP0:%.*]] = icmp uge <8 x i8> %c, @@ -262,7 +262,7 @@ return vtbx1_s8(a, b, c); } -// CHECK-LABEL: define <8 x i8> @test_vtbx2_s8(<8 x i8> %a, [2 x <8 x i8>] %b.coerce, <8 x i8> %c) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vtbx2_s8(<8 x i8> frozen %a, [2 x <8 x i8>] %b.coerce, <8 x i8> frozen %c) #0 { // CHECK: [[__P1_I:%.*]] = alloca %struct.int8x8x2_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.int8x8x2_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x8x2_t, %struct.int8x8x2_t* [[B]], i32 0, i32 0 @@ -284,7 +284,7 @@ return vtbx2_s8(a, b, c); } -// CHECK-LABEL: define <8 x i8> @test_vtbx3_s8(<8 x i8> %a, [3 x <8 x i8>] %b.coerce, <8 x i8> %c) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vtbx3_s8(<8 x i8> frozen %a, [3 x <8 x i8>] %b.coerce, <8 x i8> frozen %c) #0 { // CHECK: [[__P1_I:%.*]] = alloca %struct.int8x8x3_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.int8x8x3_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x8x3_t, %struct.int8x8x3_t* [[B]], i32 0, i32 0 @@ -316,7 +316,7 @@ return vtbx3_s8(a, b, c); } -// CHECK-LABEL: define <8 x i8> @test_vtbx4_s8(<8 x i8> %a, [4 x <8 x i8>] %b.coerce, <8 x i8> %c) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vtbx4_s8(<8 x i8> frozen %a, [4 x <8 x i8>] %b.coerce, <8 x i8> frozen %c) #0 { // CHECK: [[__P1_I:%.*]] = alloca %struct.int8x8x4_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.int8x8x4_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x8x4_t, %struct.int8x8x4_t* [[B]], i32 0, i32 0 @@ -345,14 +345,14 @@ return vtbx4_s8(a, b, c); } -// CHECK-LABEL: define <8 x i8> @test_vqtbx1_s8(<8 x i8> %a, <16 x i8> %b, <8 x i8> %c) #1 { +// CHECK-LABEL: define frozen <8 x i8> @test_vqtbx1_s8(<8 x i8> frozen %a, <16 x i8> frozen %b, <8 x i8> frozen %c) #1 { // CHECK: [[VTBX1_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.tbx1.v8i8(<8 x i8> %a, <16 x i8> %b, <8 x i8> %c) #3 // CHECK: ret <8 x i8> [[VTBX1_I]] int8x8_t test_vqtbx1_s8(int8x8_t a, int8x16_t b, uint8x8_t c) { return vqtbx1_s8(a, b, c); } -// CHECK-LABEL: define <8 x i8> @test_vqtbx2_s8(<8 x i8> %a, [2 x <16 x i8>] %b.coerce, <8 x i8> %c) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vqtbx2_s8(<8 x i8> frozen %a, [2 x <16 x i8>] %b.coerce, <8 x i8> frozen %c) #0 { // CHECK: [[__P1_I:%.*]] = alloca %struct.int8x16x2_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.int8x16x2_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x16x2_t, %struct.int8x16x2_t* [[B]], i32 0, i32 0 @@ -373,7 +373,7 @@ return vqtbx2_s8(a, b, c); } -// CHECK-LABEL: define <8 x i8> @test_vqtbx3_s8(<8 x i8> %a, [3 x <16 x i8>] %b.coerce, <8 x i8> %c) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vqtbx3_s8(<8 x i8> frozen %a, [3 x <16 x i8>] %b.coerce, <8 x i8> frozen %c) #0 { // CHECK: [[__P1_I:%.*]] = alloca %struct.int8x16x3_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.int8x16x3_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x16x3_t, %struct.int8x16x3_t* [[B]], i32 0, i32 0 @@ -397,7 +397,7 @@ return vqtbx3_s8(a, b, c); } -// CHECK-LABEL: define <8 x i8> @test_vqtbx4_s8(<8 x i8> %a, [4 x <16 x i8>] %b.coerce, <8 x i8> %c) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vqtbx4_s8(<8 x i8> frozen %a, [4 x <16 x i8>] %b.coerce, <8 x i8> frozen %c) #0 { // CHECK: [[__P1_I:%.*]] = alloca %struct.int8x16x4_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.int8x16x4_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x16x4_t, %struct.int8x16x4_t* [[B]], i32 0, i32 0 @@ -424,14 +424,14 @@ return vqtbx4_s8(a, b, c); } -// CHECK-LABEL: define <16 x i8> @test_vqtbx1q_s8(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c) #1 { +// CHECK-LABEL: define frozen <16 x i8> @test_vqtbx1q_s8(<16 x i8> frozen %a, <16 x i8> frozen %b, <16 x i8> frozen %c) #1 { // CHECK: [[VTBX1_I:%.*]] = call <16 x i8> @llvm.aarch64.neon.tbx1.v16i8(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c) #3 // CHECK: ret <16 x i8> [[VTBX1_I]] int8x16_t test_vqtbx1q_s8(int8x16_t a, int8x16_t b, uint8x16_t c) { return vqtbx1q_s8(a, b, c); } -// CHECK-LABEL: define <16 x i8> @test_vqtbx2q_s8(<16 x i8> %a, [2 x <16 x i8>] %b.coerce, <16 x i8> %c) #1 { +// CHECK-LABEL: define frozen <16 x i8> @test_vqtbx2q_s8(<16 x i8> frozen %a, [2 x <16 x i8>] %b.coerce, <16 x i8> frozen %c) #1 { // CHECK: [[__P1_I:%.*]] = alloca %struct.int8x16x2_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.int8x16x2_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x16x2_t, %struct.int8x16x2_t* [[B]], i32 0, i32 0 @@ -452,7 +452,7 @@ return vqtbx2q_s8(a, b, c); } -// CHECK-LABEL: define <16 x i8> @test_vqtbx3q_s8(<16 x i8> %a, [3 x <16 x i8>] %b.coerce, <16 x i8> %c) #1 { +// CHECK-LABEL: define frozen <16 x i8> @test_vqtbx3q_s8(<16 x i8> frozen %a, [3 x <16 x i8>] %b.coerce, <16 x i8> frozen %c) #1 { // CHECK: [[__P1_I:%.*]] = alloca %struct.int8x16x3_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.int8x16x3_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x16x3_t, %struct.int8x16x3_t* [[B]], i32 0, i32 0 @@ -476,7 +476,7 @@ return vqtbx3q_s8(a, b, c); } -// CHECK-LABEL: define <16 x i8> @test_vqtbx4q_s8(<16 x i8> %a, [4 x <16 x i8>] %b.coerce, <16 x i8> %c) #1 { +// CHECK-LABEL: define frozen <16 x i8> @test_vqtbx4q_s8(<16 x i8> frozen %a, [4 x <16 x i8>] %b.coerce, <16 x i8> frozen %c) #1 { // CHECK: [[__P1_I:%.*]] = alloca %struct.int8x16x4_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.int8x16x4_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x16x4_t, %struct.int8x16x4_t* [[B]], i32 0, i32 0 @@ -503,7 +503,7 @@ return vqtbx4q_s8(a, b, c); } -// CHECK-LABEL: define <8 x i8> @test_vtbl1_u8(<8 x i8> %a, <8 x i8> %b) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vtbl1_u8(<8 x i8> frozen %a, <8 x i8> frozen %b) #0 { // CHECK: [[VTBL1_I:%.*]] = shufflevector <8 x i8> %a, <8 x i8> zeroinitializer, <16 x i32> // CHECK: [[VTBL11_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.tbl1.v8i8(<16 x i8> [[VTBL1_I]], <8 x i8> %b) #3 // CHECK: ret <8 x i8> [[VTBL11_I]] @@ -511,14 +511,14 @@ return vtbl1_u8(a, b); } -// CHECK-LABEL: define <8 x i8> @test_vqtbl1_u8(<16 x i8> %a, <8 x i8> %b) #1 { +// CHECK-LABEL: define frozen <8 x i8> @test_vqtbl1_u8(<16 x i8> frozen %a, <8 x i8> frozen %b) #1 { // CHECK: [[VTBL1_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.tbl1.v8i8(<16 x i8> %a, <8 x i8> %b) #3 // CHECK: ret <8 x i8> [[VTBL1_I]] uint8x8_t test_vqtbl1_u8(uint8x16_t a, uint8x8_t b) { return vqtbl1_u8(a, b); } -// CHECK-LABEL: define <8 x i8> @test_vtbl2_u8([2 x <8 x i8>] %a.coerce, <8 x i8> %b) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vtbl2_u8([2 x <8 x i8>] %a.coerce, <8 x i8> frozen %b) #0 { // CHECK: [[__P0_I:%.*]] = alloca %struct.uint8x8x2_t, align 8 // CHECK: [[A:%.*]] = alloca %struct.uint8x8x2_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x8x2_t, %struct.uint8x8x2_t* [[A]], i32 0, i32 0 @@ -540,7 +540,7 @@ return vtbl2_u8(a, b); } -// CHECK-LABEL: define <8 x i8> @test_vqtbl2_u8([2 x <16 x i8>] %a.coerce, <8 x i8> %b) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vqtbl2_u8([2 x <16 x i8>] %a.coerce, <8 x i8> frozen %b) #0 { // CHECK: [[__P0_I:%.*]] = alloca %struct.uint8x16x2_t, align 16 // CHECK: [[A:%.*]] = alloca %struct.uint8x16x2_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x16x2_t, %struct.uint8x16x2_t* [[A]], i32 0, i32 0 @@ -561,7 +561,7 @@ return vqtbl2_u8(a, b); } -// CHECK-LABEL: define <8 x i8> @test_vtbl3_u8([3 x <8 x i8>] %a.coerce, <8 x i8> %b) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vtbl3_u8([3 x <8 x i8>] %a.coerce, <8 x i8> frozen %b) #0 { // CHECK: [[__P0_I:%.*]] = alloca %struct.uint8x8x3_t, align 8 // CHECK: [[A:%.*]] = alloca %struct.uint8x8x3_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x8x3_t, %struct.uint8x8x3_t* [[A]], i32 0, i32 0 @@ -587,7 +587,7 @@ return vtbl3_u8(a, b); } -// CHECK-LABEL: define <8 x i8> @test_vqtbl3_u8([3 x <16 x i8>] %a.coerce, <8 x i8> %b) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vqtbl3_u8([3 x <16 x i8>] %a.coerce, <8 x i8> frozen %b) #0 { // CHECK: [[__P0_I:%.*]] = alloca %struct.uint8x16x3_t, align 16 // CHECK: [[A:%.*]] = alloca %struct.uint8x16x3_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x16x3_t, %struct.uint8x16x3_t* [[A]], i32 0, i32 0 @@ -611,7 +611,7 @@ return vqtbl3_u8(a, b); } -// CHECK-LABEL: define <8 x i8> @test_vtbl4_u8([4 x <8 x i8>] %a.coerce, <8 x i8> %b) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vtbl4_u8([4 x <8 x i8>] %a.coerce, <8 x i8> frozen %b) #0 { // CHECK: [[__P0_I:%.*]] = alloca %struct.uint8x8x4_t, align 8 // CHECK: [[A:%.*]] = alloca %struct.uint8x8x4_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x8x4_t, %struct.uint8x8x4_t* [[A]], i32 0, i32 0 @@ -640,7 +640,7 @@ return vtbl4_u8(a, b); } -// CHECK-LABEL: define <8 x i8> @test_vqtbl4_u8([4 x <16 x i8>] %a.coerce, <8 x i8> %b) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vqtbl4_u8([4 x <16 x i8>] %a.coerce, <8 x i8> frozen %b) #0 { // CHECK: [[__P0_I:%.*]] = alloca %struct.uint8x16x4_t, align 16 // CHECK: [[A:%.*]] = alloca %struct.uint8x16x4_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x16x4_t, %struct.uint8x16x4_t* [[A]], i32 0, i32 0 @@ -667,14 +667,14 @@ return vqtbl4_u8(a, b); } -// CHECK-LABEL: define <16 x i8> @test_vqtbl1q_u8(<16 x i8> %a, <16 x i8> %b) #1 { +// CHECK-LABEL: define frozen <16 x i8> @test_vqtbl1q_u8(<16 x i8> frozen %a, <16 x i8> frozen %b) #1 { // CHECK: [[VTBL1_I:%.*]] = call <16 x i8> @llvm.aarch64.neon.tbl1.v16i8(<16 x i8> %a, <16 x i8> %b) #3 // CHECK: ret <16 x i8> [[VTBL1_I]] uint8x16_t test_vqtbl1q_u8(uint8x16_t a, uint8x16_t b) { return vqtbl1q_u8(a, b); } -// CHECK-LABEL: define <16 x i8> @test_vqtbl2q_u8([2 x <16 x i8>] %a.coerce, <16 x i8> %b) #1 { +// CHECK-LABEL: define frozen <16 x i8> @test_vqtbl2q_u8([2 x <16 x i8>] %a.coerce, <16 x i8> frozen %b) #1 { // CHECK: [[__P0_I:%.*]] = alloca %struct.uint8x16x2_t, align 16 // CHECK: [[A:%.*]] = alloca %struct.uint8x16x2_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x16x2_t, %struct.uint8x16x2_t* [[A]], i32 0, i32 0 @@ -695,7 +695,7 @@ return vqtbl2q_u8(a, b); } -// CHECK-LABEL: define <16 x i8> @test_vqtbl3q_u8([3 x <16 x i8>] %a.coerce, <16 x i8> %b) #1 { +// CHECK-LABEL: define frozen <16 x i8> @test_vqtbl3q_u8([3 x <16 x i8>] %a.coerce, <16 x i8> frozen %b) #1 { // CHECK: [[__P0_I:%.*]] = alloca %struct.uint8x16x3_t, align 16 // CHECK: [[A:%.*]] = alloca %struct.uint8x16x3_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x16x3_t, %struct.uint8x16x3_t* [[A]], i32 0, i32 0 @@ -719,7 +719,7 @@ return vqtbl3q_u8(a, b); } -// CHECK-LABEL: define <16 x i8> @test_vqtbl4q_u8([4 x <16 x i8>] %a.coerce, <16 x i8> %b) #1 { +// CHECK-LABEL: define frozen <16 x i8> @test_vqtbl4q_u8([4 x <16 x i8>] %a.coerce, <16 x i8> frozen %b) #1 { // CHECK: [[__P0_I:%.*]] = alloca %struct.uint8x16x4_t, align 16 // CHECK: [[A:%.*]] = alloca %struct.uint8x16x4_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x16x4_t, %struct.uint8x16x4_t* [[A]], i32 0, i32 0 @@ -746,7 +746,7 @@ return vqtbl4q_u8(a, b); } -// CHECK-LABEL: define <8 x i8> @test_vtbx1_u8(<8 x i8> %a, <8 x i8> %b, <8 x i8> %c) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vtbx1_u8(<8 x i8> frozen %a, <8 x i8> frozen %b, <8 x i8> frozen %c) #0 { // CHECK: [[VTBL1_I:%.*]] = shufflevector <8 x i8> %b, <8 x i8> zeroinitializer, <16 x i32> // CHECK: [[VTBL11_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.tbl1.v8i8(<16 x i8> [[VTBL1_I]], <8 x i8> %c) #3 // CHECK: [[TMP0:%.*]] = icmp uge <8 x i8> %c, @@ -760,7 +760,7 @@ return vtbx1_u8(a, b, c); } -// CHECK-LABEL: define <8 x i8> @test_vtbx2_u8(<8 x i8> %a, [2 x <8 x i8>] %b.coerce, <8 x i8> %c) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vtbx2_u8(<8 x i8> frozen %a, [2 x <8 x i8>] %b.coerce, <8 x i8> frozen %c) #0 { // CHECK: [[__P1_I:%.*]] = alloca %struct.uint8x8x2_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.uint8x8x2_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x8x2_t, %struct.uint8x8x2_t* [[B]], i32 0, i32 0 @@ -782,7 +782,7 @@ return vtbx2_u8(a, b, c); } -// CHECK-LABEL: define <8 x i8> @test_vtbx3_u8(<8 x i8> %a, [3 x <8 x i8>] %b.coerce, <8 x i8> %c) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vtbx3_u8(<8 x i8> frozen %a, [3 x <8 x i8>] %b.coerce, <8 x i8> frozen %c) #0 { // CHECK: [[__P1_I:%.*]] = alloca %struct.uint8x8x3_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.uint8x8x3_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x8x3_t, %struct.uint8x8x3_t* [[B]], i32 0, i32 0 @@ -814,7 +814,7 @@ return vtbx3_u8(a, b, c); } -// CHECK-LABEL: define <8 x i8> @test_vtbx4_u8(<8 x i8> %a, [4 x <8 x i8>] %b.coerce, <8 x i8> %c) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vtbx4_u8(<8 x i8> frozen %a, [4 x <8 x i8>] %b.coerce, <8 x i8> frozen %c) #0 { // CHECK: [[__P1_I:%.*]] = alloca %struct.uint8x8x4_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.uint8x8x4_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x8x4_t, %struct.uint8x8x4_t* [[B]], i32 0, i32 0 @@ -843,14 +843,14 @@ return vtbx4_u8(a, b, c); } -// CHECK-LABEL: define <8 x i8> @test_vqtbx1_u8(<8 x i8> %a, <16 x i8> %b, <8 x i8> %c) #1 { +// CHECK-LABEL: define frozen <8 x i8> @test_vqtbx1_u8(<8 x i8> frozen %a, <16 x i8> frozen %b, <8 x i8> frozen %c) #1 { // CHECK: [[VTBX1_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.tbx1.v8i8(<8 x i8> %a, <16 x i8> %b, <8 x i8> %c) #3 // CHECK: ret <8 x i8> [[VTBX1_I]] uint8x8_t test_vqtbx1_u8(uint8x8_t a, uint8x16_t b, uint8x8_t c) { return vqtbx1_u8(a, b, c); } -// CHECK-LABEL: define <8 x i8> @test_vqtbx2_u8(<8 x i8> %a, [2 x <16 x i8>] %b.coerce, <8 x i8> %c) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vqtbx2_u8(<8 x i8> frozen %a, [2 x <16 x i8>] %b.coerce, <8 x i8> frozen %c) #0 { // CHECK: [[__P1_I:%.*]] = alloca %struct.uint8x16x2_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.uint8x16x2_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x16x2_t, %struct.uint8x16x2_t* [[B]], i32 0, i32 0 @@ -871,7 +871,7 @@ return vqtbx2_u8(a, b, c); } -// CHECK-LABEL: define <8 x i8> @test_vqtbx3_u8(<8 x i8> %a, [3 x <16 x i8>] %b.coerce, <8 x i8> %c) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vqtbx3_u8(<8 x i8> frozen %a, [3 x <16 x i8>] %b.coerce, <8 x i8> frozen %c) #0 { // CHECK: [[__P1_I:%.*]] = alloca %struct.uint8x16x3_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.uint8x16x3_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x16x3_t, %struct.uint8x16x3_t* [[B]], i32 0, i32 0 @@ -895,7 +895,7 @@ return vqtbx3_u8(a, b, c); } -// CHECK-LABEL: define <8 x i8> @test_vqtbx4_u8(<8 x i8> %a, [4 x <16 x i8>] %b.coerce, <8 x i8> %c) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vqtbx4_u8(<8 x i8> frozen %a, [4 x <16 x i8>] %b.coerce, <8 x i8> frozen %c) #0 { // CHECK: [[__P1_I:%.*]] = alloca %struct.uint8x16x4_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.uint8x16x4_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x16x4_t, %struct.uint8x16x4_t* [[B]], i32 0, i32 0 @@ -922,14 +922,14 @@ return vqtbx4_u8(a, b, c); } -// CHECK-LABEL: define <16 x i8> @test_vqtbx1q_u8(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c) #1 { +// CHECK-LABEL: define frozen <16 x i8> @test_vqtbx1q_u8(<16 x i8> frozen %a, <16 x i8> frozen %b, <16 x i8> frozen %c) #1 { // CHECK: [[VTBX1_I:%.*]] = call <16 x i8> @llvm.aarch64.neon.tbx1.v16i8(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c) #3 // CHECK: ret <16 x i8> [[VTBX1_I]] uint8x16_t test_vqtbx1q_u8(uint8x16_t a, uint8x16_t b, uint8x16_t c) { return vqtbx1q_u8(a, b, c); } -// CHECK-LABEL: define <16 x i8> @test_vqtbx2q_u8(<16 x i8> %a, [2 x <16 x i8>] %b.coerce, <16 x i8> %c) #1 { +// CHECK-LABEL: define frozen <16 x i8> @test_vqtbx2q_u8(<16 x i8> frozen %a, [2 x <16 x i8>] %b.coerce, <16 x i8> frozen %c) #1 { // CHECK: [[__P1_I:%.*]] = alloca %struct.uint8x16x2_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.uint8x16x2_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x16x2_t, %struct.uint8x16x2_t* [[B]], i32 0, i32 0 @@ -950,7 +950,7 @@ return vqtbx2q_u8(a, b, c); } -// CHECK-LABEL: define <16 x i8> @test_vqtbx3q_u8(<16 x i8> %a, [3 x <16 x i8>] %b.coerce, <16 x i8> %c) #1 { +// CHECK-LABEL: define frozen <16 x i8> @test_vqtbx3q_u8(<16 x i8> frozen %a, [3 x <16 x i8>] %b.coerce, <16 x i8> frozen %c) #1 { // CHECK: [[__P1_I:%.*]] = alloca %struct.uint8x16x3_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.uint8x16x3_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x16x3_t, %struct.uint8x16x3_t* [[B]], i32 0, i32 0 @@ -974,7 +974,7 @@ return vqtbx3q_u8(a, b, c); } -// CHECK-LABEL: define <16 x i8> @test_vqtbx4q_u8(<16 x i8> %a, [4 x <16 x i8>] %b.coerce, <16 x i8> %c) #1 { +// CHECK-LABEL: define frozen <16 x i8> @test_vqtbx4q_u8(<16 x i8> frozen %a, [4 x <16 x i8>] %b.coerce, <16 x i8> frozen %c) #1 { // CHECK: [[__P1_I:%.*]] = alloca %struct.uint8x16x4_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.uint8x16x4_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x16x4_t, %struct.uint8x16x4_t* [[B]], i32 0, i32 0 @@ -1001,7 +1001,7 @@ return vqtbx4q_u8(a, b, c); } -// CHECK-LABEL: define <8 x i8> @test_vtbl1_p8(<8 x i8> %a, <8 x i8> %b) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vtbl1_p8(<8 x i8> frozen %a, <8 x i8> frozen %b) #0 { // CHECK: [[VTBL1_I:%.*]] = shufflevector <8 x i8> %a, <8 x i8> zeroinitializer, <16 x i32> // CHECK: [[VTBL11_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.tbl1.v8i8(<16 x i8> [[VTBL1_I]], <8 x i8> %b) #3 // CHECK: ret <8 x i8> [[VTBL11_I]] @@ -1009,14 +1009,14 @@ return vtbl1_p8(a, b); } -// CHECK-LABEL: define <8 x i8> @test_vqtbl1_p8(<16 x i8> %a, <8 x i8> %b) #1 { +// CHECK-LABEL: define frozen <8 x i8> @test_vqtbl1_p8(<16 x i8> frozen %a, <8 x i8> frozen %b) #1 { // CHECK: [[VTBL1_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.tbl1.v8i8(<16 x i8> %a, <8 x i8> %b) #3 // CHECK: ret <8 x i8> [[VTBL1_I]] poly8x8_t test_vqtbl1_p8(poly8x16_t a, uint8x8_t b) { return vqtbl1_p8(a, b); } -// CHECK-LABEL: define <8 x i8> @test_vtbl2_p8([2 x <8 x i8>] %a.coerce, <8 x i8> %b) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vtbl2_p8([2 x <8 x i8>] %a.coerce, <8 x i8> frozen %b) #0 { // CHECK: [[__P0_I:%.*]] = alloca %struct.poly8x8x2_t, align 8 // CHECK: [[A:%.*]] = alloca %struct.poly8x8x2_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x8x2_t, %struct.poly8x8x2_t* [[A]], i32 0, i32 0 @@ -1038,7 +1038,7 @@ return vtbl2_p8(a, b); } -// CHECK-LABEL: define <8 x i8> @test_vqtbl2_p8([2 x <16 x i8>] %a.coerce, <8 x i8> %b) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vqtbl2_p8([2 x <16 x i8>] %a.coerce, <8 x i8> frozen %b) #0 { // CHECK: [[__P0_I:%.*]] = alloca %struct.poly8x16x2_t, align 16 // CHECK: [[A:%.*]] = alloca %struct.poly8x16x2_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x16x2_t, %struct.poly8x16x2_t* [[A]], i32 0, i32 0 @@ -1059,7 +1059,7 @@ return vqtbl2_p8(a, b); } -// CHECK-LABEL: define <8 x i8> @test_vtbl3_p8([3 x <8 x i8>] %a.coerce, <8 x i8> %b) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vtbl3_p8([3 x <8 x i8>] %a.coerce, <8 x i8> frozen %b) #0 { // CHECK: [[__P0_I:%.*]] = alloca %struct.poly8x8x3_t, align 8 // CHECK: [[A:%.*]] = alloca %struct.poly8x8x3_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x8x3_t, %struct.poly8x8x3_t* [[A]], i32 0, i32 0 @@ -1085,7 +1085,7 @@ return vtbl3_p8(a, b); } -// CHECK-LABEL: define <8 x i8> @test_vqtbl3_p8([3 x <16 x i8>] %a.coerce, <8 x i8> %b) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vqtbl3_p8([3 x <16 x i8>] %a.coerce, <8 x i8> frozen %b) #0 { // CHECK: [[__P0_I:%.*]] = alloca %struct.poly8x16x3_t, align 16 // CHECK: [[A:%.*]] = alloca %struct.poly8x16x3_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x16x3_t, %struct.poly8x16x3_t* [[A]], i32 0, i32 0 @@ -1109,7 +1109,7 @@ return vqtbl3_p8(a, b); } -// CHECK-LABEL: define <8 x i8> @test_vtbl4_p8([4 x <8 x i8>] %a.coerce, <8 x i8> %b) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vtbl4_p8([4 x <8 x i8>] %a.coerce, <8 x i8> frozen %b) #0 { // CHECK: [[__P0_I:%.*]] = alloca %struct.poly8x8x4_t, align 8 // CHECK: [[A:%.*]] = alloca %struct.poly8x8x4_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x8x4_t, %struct.poly8x8x4_t* [[A]], i32 0, i32 0 @@ -1138,7 +1138,7 @@ return vtbl4_p8(a, b); } -// CHECK-LABEL: define <8 x i8> @test_vqtbl4_p8([4 x <16 x i8>] %a.coerce, <8 x i8> %b) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vqtbl4_p8([4 x <16 x i8>] %a.coerce, <8 x i8> frozen %b) #0 { // CHECK: [[__P0_I:%.*]] = alloca %struct.poly8x16x4_t, align 16 // CHECK: [[A:%.*]] = alloca %struct.poly8x16x4_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x16x4_t, %struct.poly8x16x4_t* [[A]], i32 0, i32 0 @@ -1165,14 +1165,14 @@ return vqtbl4_p8(a, b); } -// CHECK-LABEL: define <16 x i8> @test_vqtbl1q_p8(<16 x i8> %a, <16 x i8> %b) #1 { +// CHECK-LABEL: define frozen <16 x i8> @test_vqtbl1q_p8(<16 x i8> frozen %a, <16 x i8> frozen %b) #1 { // CHECK: [[VTBL1_I:%.*]] = call <16 x i8> @llvm.aarch64.neon.tbl1.v16i8(<16 x i8> %a, <16 x i8> %b) #3 // CHECK: ret <16 x i8> [[VTBL1_I]] poly8x16_t test_vqtbl1q_p8(poly8x16_t a, uint8x16_t b) { return vqtbl1q_p8(a, b); } -// CHECK-LABEL: define <16 x i8> @test_vqtbl2q_p8([2 x <16 x i8>] %a.coerce, <16 x i8> %b) #1 { +// CHECK-LABEL: define frozen <16 x i8> @test_vqtbl2q_p8([2 x <16 x i8>] %a.coerce, <16 x i8> frozen %b) #1 { // CHECK: [[__P0_I:%.*]] = alloca %struct.poly8x16x2_t, align 16 // CHECK: [[A:%.*]] = alloca %struct.poly8x16x2_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x16x2_t, %struct.poly8x16x2_t* [[A]], i32 0, i32 0 @@ -1193,7 +1193,7 @@ return vqtbl2q_p8(a, b); } -// CHECK-LABEL: define <16 x i8> @test_vqtbl3q_p8([3 x <16 x i8>] %a.coerce, <16 x i8> %b) #1 { +// CHECK-LABEL: define frozen <16 x i8> @test_vqtbl3q_p8([3 x <16 x i8>] %a.coerce, <16 x i8> frozen %b) #1 { // CHECK: [[__P0_I:%.*]] = alloca %struct.poly8x16x3_t, align 16 // CHECK: [[A:%.*]] = alloca %struct.poly8x16x3_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x16x3_t, %struct.poly8x16x3_t* [[A]], i32 0, i32 0 @@ -1217,7 +1217,7 @@ return vqtbl3q_p8(a, b); } -// CHECK-LABEL: define <16 x i8> @test_vqtbl4q_p8([4 x <16 x i8>] %a.coerce, <16 x i8> %b) #1 { +// CHECK-LABEL: define frozen <16 x i8> @test_vqtbl4q_p8([4 x <16 x i8>] %a.coerce, <16 x i8> frozen %b) #1 { // CHECK: [[__P0_I:%.*]] = alloca %struct.poly8x16x4_t, align 16 // CHECK: [[A:%.*]] = alloca %struct.poly8x16x4_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x16x4_t, %struct.poly8x16x4_t* [[A]], i32 0, i32 0 @@ -1244,7 +1244,7 @@ return vqtbl4q_p8(a, b); } -// CHECK-LABEL: define <8 x i8> @test_vtbx1_p8(<8 x i8> %a, <8 x i8> %b, <8 x i8> %c) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vtbx1_p8(<8 x i8> frozen %a, <8 x i8> frozen %b, <8 x i8> frozen %c) #0 { // CHECK: [[VTBL1_I:%.*]] = shufflevector <8 x i8> %b, <8 x i8> zeroinitializer, <16 x i32> // CHECK: [[VTBL11_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.tbl1.v8i8(<16 x i8> [[VTBL1_I]], <8 x i8> %c) #3 // CHECK: [[TMP0:%.*]] = icmp uge <8 x i8> %c, @@ -1258,7 +1258,7 @@ return vtbx1_p8(a, b, c); } -// CHECK-LABEL: define <8 x i8> @test_vtbx2_p8(<8 x i8> %a, [2 x <8 x i8>] %b.coerce, <8 x i8> %c) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vtbx2_p8(<8 x i8> frozen %a, [2 x <8 x i8>] %b.coerce, <8 x i8> frozen %c) #0 { // CHECK: [[__P1_I:%.*]] = alloca %struct.poly8x8x2_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.poly8x8x2_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x8x2_t, %struct.poly8x8x2_t* [[B]], i32 0, i32 0 @@ -1280,7 +1280,7 @@ return vtbx2_p8(a, b, c); } -// CHECK-LABEL: define <8 x i8> @test_vtbx3_p8(<8 x i8> %a, [3 x <8 x i8>] %b.coerce, <8 x i8> %c) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vtbx3_p8(<8 x i8> frozen %a, [3 x <8 x i8>] %b.coerce, <8 x i8> frozen %c) #0 { // CHECK: [[__P1_I:%.*]] = alloca %struct.poly8x8x3_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.poly8x8x3_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x8x3_t, %struct.poly8x8x3_t* [[B]], i32 0, i32 0 @@ -1312,7 +1312,7 @@ return vtbx3_p8(a, b, c); } -// CHECK-LABEL: define <8 x i8> @test_vtbx4_p8(<8 x i8> %a, [4 x <8 x i8>] %b.coerce, <8 x i8> %c) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vtbx4_p8(<8 x i8> frozen %a, [4 x <8 x i8>] %b.coerce, <8 x i8> frozen %c) #0 { // CHECK: [[__P1_I:%.*]] = alloca %struct.poly8x8x4_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.poly8x8x4_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x8x4_t, %struct.poly8x8x4_t* [[B]], i32 0, i32 0 @@ -1341,14 +1341,14 @@ return vtbx4_p8(a, b, c); } -// CHECK-LABEL: define <8 x i8> @test_vqtbx1_p8(<8 x i8> %a, <16 x i8> %b, <8 x i8> %c) #1 { +// CHECK-LABEL: define frozen <8 x i8> @test_vqtbx1_p8(<8 x i8> frozen %a, <16 x i8> frozen %b, <8 x i8> frozen %c) #1 { // CHECK: [[VTBX1_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.tbx1.v8i8(<8 x i8> %a, <16 x i8> %b, <8 x i8> %c) #3 // CHECK: ret <8 x i8> [[VTBX1_I]] poly8x8_t test_vqtbx1_p8(poly8x8_t a, uint8x16_t b, uint8x8_t c) { return vqtbx1_p8(a, b, c); } -// CHECK-LABEL: define <8 x i8> @test_vqtbx2_p8(<8 x i8> %a, [2 x <16 x i8>] %b.coerce, <8 x i8> %c) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vqtbx2_p8(<8 x i8> frozen %a, [2 x <16 x i8>] %b.coerce, <8 x i8> frozen %c) #0 { // CHECK: [[__P1_I:%.*]] = alloca %struct.poly8x16x2_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.poly8x16x2_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x16x2_t, %struct.poly8x16x2_t* [[B]], i32 0, i32 0 @@ -1369,7 +1369,7 @@ return vqtbx2_p8(a, b, c); } -// CHECK-LABEL: define <8 x i8> @test_vqtbx3_p8(<8 x i8> %a, [3 x <16 x i8>] %b.coerce, <8 x i8> %c) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vqtbx3_p8(<8 x i8> frozen %a, [3 x <16 x i8>] %b.coerce, <8 x i8> frozen %c) #0 { // CHECK: [[__P1_I:%.*]] = alloca %struct.poly8x16x3_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.poly8x16x3_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x16x3_t, %struct.poly8x16x3_t* [[B]], i32 0, i32 0 @@ -1393,7 +1393,7 @@ return vqtbx3_p8(a, b, c); } -// CHECK-LABEL: define <8 x i8> @test_vqtbx4_p8(<8 x i8> %a, [4 x <16 x i8>] %b.coerce, <8 x i8> %c) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vqtbx4_p8(<8 x i8> frozen %a, [4 x <16 x i8>] %b.coerce, <8 x i8> frozen %c) #0 { // CHECK: [[__P1_I:%.*]] = alloca %struct.poly8x16x4_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.poly8x16x4_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x16x4_t, %struct.poly8x16x4_t* [[B]], i32 0, i32 0 @@ -1420,14 +1420,14 @@ return vqtbx4_p8(a, b, c); } -// CHECK-LABEL: define <16 x i8> @test_vqtbx1q_p8(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c) #1 { +// CHECK-LABEL: define frozen <16 x i8> @test_vqtbx1q_p8(<16 x i8> frozen %a, <16 x i8> frozen %b, <16 x i8> frozen %c) #1 { // CHECK: [[VTBX1_I:%.*]] = call <16 x i8> @llvm.aarch64.neon.tbx1.v16i8(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c) #3 // CHECK: ret <16 x i8> [[VTBX1_I]] poly8x16_t test_vqtbx1q_p8(poly8x16_t a, uint8x16_t b, uint8x16_t c) { return vqtbx1q_p8(a, b, c); } -// CHECK-LABEL: define <16 x i8> @test_vqtbx2q_p8(<16 x i8> %a, [2 x <16 x i8>] %b.coerce, <16 x i8> %c) #1 { +// CHECK-LABEL: define frozen <16 x i8> @test_vqtbx2q_p8(<16 x i8> frozen %a, [2 x <16 x i8>] %b.coerce, <16 x i8> frozen %c) #1 { // CHECK: [[__P1_I:%.*]] = alloca %struct.poly8x16x2_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.poly8x16x2_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x16x2_t, %struct.poly8x16x2_t* [[B]], i32 0, i32 0 @@ -1448,7 +1448,7 @@ return vqtbx2q_p8(a, b, c); } -// CHECK-LABEL: define <16 x i8> @test_vqtbx3q_p8(<16 x i8> %a, [3 x <16 x i8>] %b.coerce, <16 x i8> %c) #1 { +// CHECK-LABEL: define frozen <16 x i8> @test_vqtbx3q_p8(<16 x i8> frozen %a, [3 x <16 x i8>] %b.coerce, <16 x i8> frozen %c) #1 { // CHECK: [[__P1_I:%.*]] = alloca %struct.poly8x16x3_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.poly8x16x3_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x16x3_t, %struct.poly8x16x3_t* [[B]], i32 0, i32 0 @@ -1472,7 +1472,7 @@ return vqtbx3q_p8(a, b, c); } -// CHECK-LABEL: define <16 x i8> @test_vqtbx4q_p8(<16 x i8> %a, [4 x <16 x i8>] %b.coerce, <16 x i8> %c) #1 { +// CHECK-LABEL: define frozen <16 x i8> @test_vqtbx4q_p8(<16 x i8> frozen %a, [4 x <16 x i8>] %b.coerce, <16 x i8> frozen %c) #1 { // CHECK: [[__P1_I:%.*]] = alloca %struct.poly8x16x4_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.poly8x16x4_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x16x4_t, %struct.poly8x16x4_t* [[B]], i32 0, i32 0 diff --git a/clang/test/CodeGen/aarch64-neon-vcombine.c b/clang/test/CodeGen/aarch64-neon-vcombine.c --- a/clang/test/CodeGen/aarch64-neon-vcombine.c +++ b/clang/test/CodeGen/aarch64-neon-vcombine.c @@ -4,98 +4,98 @@ #include -// CHECK-LABEL: define <16 x i8> @test_vcombine_s8(<8 x i8> %low, <8 x i8> %high) #0 { +// CHECK-LABEL: define frozen <16 x i8> @test_vcombine_s8(<8 x i8> frozen %low, <8 x i8> frozen %high) #0 { // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <8 x i8> %low, <8 x i8> %high, <16 x i32> // CHECK: ret <16 x i8> [[SHUFFLE_I]] int8x16_t test_vcombine_s8(int8x8_t low, int8x8_t high) { return vcombine_s8(low, high); } -// CHECK-LABEL: define <8 x i16> @test_vcombine_s16(<4 x i16> %low, <4 x i16> %high) #0 { +// CHECK-LABEL: define frozen <8 x i16> @test_vcombine_s16(<4 x i16> frozen %low, <4 x i16> frozen %high) #0 { // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <4 x i16> %low, <4 x i16> %high, <8 x i32> // CHECK: ret <8 x i16> [[SHUFFLE_I]] int16x8_t test_vcombine_s16(int16x4_t low, int16x4_t high) { return vcombine_s16(low, high); } -// CHECK-LABEL: define <4 x i32> @test_vcombine_s32(<2 x i32> %low, <2 x i32> %high) #0 { +// CHECK-LABEL: define frozen <4 x i32> @test_vcombine_s32(<2 x i32> frozen %low, <2 x i32> frozen %high) #0 { // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <2 x i32> %low, <2 x i32> %high, <4 x i32> // CHECK: ret <4 x i32> [[SHUFFLE_I]] int32x4_t test_vcombine_s32(int32x2_t low, int32x2_t high) { return vcombine_s32(low, high); } -// CHECK-LABEL: define <2 x i64> @test_vcombine_s64(<1 x i64> %low, <1 x i64> %high) #0 { +// CHECK-LABEL: define frozen <2 x i64> @test_vcombine_s64(<1 x i64> frozen %low, <1 x i64> frozen %high) #0 { // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <1 x i64> %low, <1 x i64> %high, <2 x i32> // CHECK: ret <2 x i64> [[SHUFFLE_I]] int64x2_t test_vcombine_s64(int64x1_t low, int64x1_t high) { return vcombine_s64(low, high); } -// CHECK-LABEL: define <16 x i8> @test_vcombine_u8(<8 x i8> %low, <8 x i8> %high) #0 { +// CHECK-LABEL: define frozen <16 x i8> @test_vcombine_u8(<8 x i8> frozen %low, <8 x i8> frozen %high) #0 { // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <8 x i8> %low, <8 x i8> %high, <16 x i32> // CHECK: ret <16 x i8> [[SHUFFLE_I]] uint8x16_t test_vcombine_u8(uint8x8_t low, uint8x8_t high) { return vcombine_u8(low, high); } -// CHECK-LABEL: define <8 x i16> @test_vcombine_u16(<4 x i16> %low, <4 x i16> %high) #0 { +// CHECK-LABEL: define frozen <8 x i16> @test_vcombine_u16(<4 x i16> frozen %low, <4 x i16> frozen %high) #0 { // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <4 x i16> %low, <4 x i16> %high, <8 x i32> // CHECK: ret <8 x i16> [[SHUFFLE_I]] uint16x8_t test_vcombine_u16(uint16x4_t low, uint16x4_t high) { return vcombine_u16(low, high); } -// CHECK-LABEL: define <4 x i32> @test_vcombine_u32(<2 x i32> %low, <2 x i32> %high) #0 { +// CHECK-LABEL: define frozen <4 x i32> @test_vcombine_u32(<2 x i32> frozen %low, <2 x i32> frozen %high) #0 { // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <2 x i32> %low, <2 x i32> %high, <4 x i32> // CHECK: ret <4 x i32> [[SHUFFLE_I]] uint32x4_t test_vcombine_u32(uint32x2_t low, uint32x2_t high) { return vcombine_u32(low, high); } -// CHECK-LABEL: define <2 x i64> @test_vcombine_u64(<1 x i64> %low, <1 x i64> %high) #0 { +// CHECK-LABEL: define frozen <2 x i64> @test_vcombine_u64(<1 x i64> frozen %low, <1 x i64> frozen %high) #0 { // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <1 x i64> %low, <1 x i64> %high, <2 x i32> // CHECK: ret <2 x i64> [[SHUFFLE_I]] uint64x2_t test_vcombine_u64(uint64x1_t low, uint64x1_t high) { return vcombine_u64(low, high); } -// CHECK-LABEL: define <2 x i64> @test_vcombine_p64(<1 x i64> %low, <1 x i64> %high) #0 { +// CHECK-LABEL: define frozen <2 x i64> @test_vcombine_p64(<1 x i64> frozen %low, <1 x i64> frozen %high) #0 { // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <1 x i64> %low, <1 x i64> %high, <2 x i32> // CHECK: ret <2 x i64> [[SHUFFLE_I]] poly64x2_t test_vcombine_p64(poly64x1_t low, poly64x1_t high) { return vcombine_p64(low, high); } -// CHECK-LABEL: define <8 x half> @test_vcombine_f16(<4 x half> %low, <4 x half> %high) #0 { +// CHECK-LABEL: define frozen <8 x half> @test_vcombine_f16(<4 x half> frozen %low, <4 x half> frozen %high) #0 { // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <4 x half> %low, <4 x half> %high, <8 x i32> // CHECK: ret <8 x half> [[SHUFFLE_I]] float16x8_t test_vcombine_f16(float16x4_t low, float16x4_t high) { return vcombine_f16(low, high); } -// CHECK-LABEL: define <4 x float> @test_vcombine_f32(<2 x float> %low, <2 x float> %high) #0 { +// CHECK-LABEL: define frozen <4 x float> @test_vcombine_f32(<2 x float> frozen %low, <2 x float> frozen %high) #0 { // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <2 x float> %low, <2 x float> %high, <4 x i32> // CHECK: ret <4 x float> [[SHUFFLE_I]] float32x4_t test_vcombine_f32(float32x2_t low, float32x2_t high) { return vcombine_f32(low, high); } -// CHECK-LABEL: define <16 x i8> @test_vcombine_p8(<8 x i8> %low, <8 x i8> %high) #0 { +// CHECK-LABEL: define frozen <16 x i8> @test_vcombine_p8(<8 x i8> frozen %low, <8 x i8> frozen %high) #0 { // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <8 x i8> %low, <8 x i8> %high, <16 x i32> // CHECK: ret <16 x i8> [[SHUFFLE_I]] poly8x16_t test_vcombine_p8(poly8x8_t low, poly8x8_t high) { return vcombine_p8(low, high); } -// CHECK-LABEL: define <8 x i16> @test_vcombine_p16(<4 x i16> %low, <4 x i16> %high) #0 { +// CHECK-LABEL: define frozen <8 x i16> @test_vcombine_p16(<4 x i16> frozen %low, <4 x i16> frozen %high) #0 { // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <4 x i16> %low, <4 x i16> %high, <8 x i32> // CHECK: ret <8 x i16> [[SHUFFLE_I]] poly16x8_t test_vcombine_p16(poly16x4_t low, poly16x4_t high) { return vcombine_p16(low, high); } -// CHECK-LABEL: define <2 x double> @test_vcombine_f64(<1 x double> %low, <1 x double> %high) #0 { +// CHECK-LABEL: define frozen <2 x double> @test_vcombine_f64(<1 x double> frozen %low, <1 x double> frozen %high) #0 { // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <1 x double> %low, <1 x double> %high, <2 x i32> // CHECK: ret <2 x double> [[SHUFFLE_I]] float64x2_t test_vcombine_f64(float64x1_t low, float64x1_t high) { diff --git a/clang/test/CodeGen/aarch64-neon-vget-hilo.c b/clang/test/CodeGen/aarch64-neon-vget-hilo.c --- a/clang/test/CodeGen/aarch64-neon-vget-hilo.c +++ b/clang/test/CodeGen/aarch64-neon-vget-hilo.c @@ -5,196 +5,196 @@ #include -// CHECK-LABEL: define <8 x i8> @test_vget_high_s8(<16 x i8> %a) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vget_high_s8(<16 x i8> frozen %a) #0 { // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <16 x i8> %a, <16 x i8> %a, <8 x i32> // CHECK: ret <8 x i8> [[SHUFFLE_I]] int8x8_t test_vget_high_s8(int8x16_t a) { return vget_high_s8(a); } -// CHECK-LABEL: define <4 x i16> @test_vget_high_s16(<8 x i16> %a) #0 { +// CHECK-LABEL: define frozen <4 x i16> @test_vget_high_s16(<8 x i16> frozen %a) #0 { // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <8 x i16> %a, <8 x i16> %a, <4 x i32> // CHECK: ret <4 x i16> [[SHUFFLE_I]] int16x4_t test_vget_high_s16(int16x8_t a) { return vget_high_s16(a); } -// CHECK-LABEL: define <2 x i32> @test_vget_high_s32(<4 x i32> %a) #0 { +// CHECK-LABEL: define frozen <2 x i32> @test_vget_high_s32(<4 x i32> frozen %a) #0 { // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <4 x i32> %a, <4 x i32> %a, <2 x i32> // CHECK: ret <2 x i32> [[SHUFFLE_I]] int32x2_t test_vget_high_s32(int32x4_t a) { return vget_high_s32(a); } -// CHECK-LABEL: define <1 x i64> @test_vget_high_s64(<2 x i64> %a) #0 { +// CHECK-LABEL: define frozen <1 x i64> @test_vget_high_s64(<2 x i64> frozen %a) #0 { // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <2 x i64> %a, <2 x i64> %a, <1 x i32> // CHECK: ret <1 x i64> [[SHUFFLE_I]] int64x1_t test_vget_high_s64(int64x2_t a) { return vget_high_s64(a); } -// CHECK-LABEL: define <8 x i8> @test_vget_high_u8(<16 x i8> %a) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vget_high_u8(<16 x i8> frozen %a) #0 { // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <16 x i8> %a, <16 x i8> %a, <8 x i32> // CHECK: ret <8 x i8> [[SHUFFLE_I]] uint8x8_t test_vget_high_u8(uint8x16_t a) { return vget_high_u8(a); } -// CHECK-LABEL: define <4 x i16> @test_vget_high_u16(<8 x i16> %a) #0 { +// CHECK-LABEL: define frozen <4 x i16> @test_vget_high_u16(<8 x i16> frozen %a) #0 { // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <8 x i16> %a, <8 x i16> %a, <4 x i32> // CHECK: ret <4 x i16> [[SHUFFLE_I]] uint16x4_t test_vget_high_u16(uint16x8_t a) { return vget_high_u16(a); } -// CHECK-LABEL: define <2 x i32> @test_vget_high_u32(<4 x i32> %a) #0 { +// CHECK-LABEL: define frozen <2 x i32> @test_vget_high_u32(<4 x i32> frozen %a) #0 { // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <4 x i32> %a, <4 x i32> %a, <2 x i32> // CHECK: ret <2 x i32> [[SHUFFLE_I]] uint32x2_t test_vget_high_u32(uint32x4_t a) { return vget_high_u32(a); } -// CHECK-LABEL: define <1 x i64> @test_vget_high_u64(<2 x i64> %a) #0 { +// CHECK-LABEL: define frozen <1 x i64> @test_vget_high_u64(<2 x i64> frozen %a) #0 { // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <2 x i64> %a, <2 x i64> %a, <1 x i32> // CHECK: ret <1 x i64> [[SHUFFLE_I]] uint64x1_t test_vget_high_u64(uint64x2_t a) { return vget_high_u64(a); } -// CHECK-LABEL: define <1 x i64> @test_vget_high_p64(<2 x i64> %a) #0 { +// CHECK-LABEL: define frozen <1 x i64> @test_vget_high_p64(<2 x i64> frozen %a) #0 { // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <2 x i64> %a, <2 x i64> %a, <1 x i32> // CHECK: ret <1 x i64> [[SHUFFLE_I]] poly64x1_t test_vget_high_p64(poly64x2_t a) { return vget_high_p64(a); } -// CHECK-LABEL: define <4 x half> @test_vget_high_f16(<8 x half> %a) #0 { +// CHECK-LABEL: define frozen <4 x half> @test_vget_high_f16(<8 x half> frozen %a) #0 { // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <8 x half> %a, <8 x half> %a, <4 x i32> // CHECK: ret <4 x half> [[SHUFFLE_I]] float16x4_t test_vget_high_f16(float16x8_t a) { return vget_high_f16(a); } -// CHECK-LABEL: define <2 x float> @test_vget_high_f32(<4 x float> %a) #0 { +// CHECK-LABEL: define frozen <2 x float> @test_vget_high_f32(<4 x float> frozen %a) #0 { // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <4 x float> %a, <4 x float> %a, <2 x i32> // CHECK: ret <2 x float> [[SHUFFLE_I]] float32x2_t test_vget_high_f32(float32x4_t a) { return vget_high_f32(a); } -// CHECK-LABEL: define <8 x i8> @test_vget_high_p8(<16 x i8> %a) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vget_high_p8(<16 x i8> frozen %a) #0 { // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <16 x i8> %a, <16 x i8> %a, <8 x i32> // CHECK: ret <8 x i8> [[SHUFFLE_I]] poly8x8_t test_vget_high_p8(poly8x16_t a) { return vget_high_p8(a); } -// CHECK-LABEL: define <4 x i16> @test_vget_high_p16(<8 x i16> %a) #0 { +// CHECK-LABEL: define frozen <4 x i16> @test_vget_high_p16(<8 x i16> frozen %a) #0 { // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <8 x i16> %a, <8 x i16> %a, <4 x i32> // CHECK: ret <4 x i16> [[SHUFFLE_I]] poly16x4_t test_vget_high_p16(poly16x8_t a) { return vget_high_p16(a); } -// CHECK-LABEL: define <1 x double> @test_vget_high_f64(<2 x double> %a) #0 { +// CHECK-LABEL: define frozen <1 x double> @test_vget_high_f64(<2 x double> frozen %a) #0 { // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <2 x double> %a, <2 x double> %a, <1 x i32> // CHECK: ret <1 x double> [[SHUFFLE_I]] float64x1_t test_vget_high_f64(float64x2_t a) { return vget_high_f64(a); } -// CHECK-LABEL: define <8 x i8> @test_vget_low_s8(<16 x i8> %a) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vget_low_s8(<16 x i8> frozen %a) #0 { // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <16 x i8> %a, <16 x i8> %a, <8 x i32> // CHECK: ret <8 x i8> [[SHUFFLE_I]] int8x8_t test_vget_low_s8(int8x16_t a) { return vget_low_s8(a); } -// CHECK-LABEL: define <4 x i16> @test_vget_low_s16(<8 x i16> %a) #0 { +// CHECK-LABEL: define frozen <4 x i16> @test_vget_low_s16(<8 x i16> frozen %a) #0 { // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <8 x i16> %a, <8 x i16> %a, <4 x i32> // CHECK: ret <4 x i16> [[SHUFFLE_I]] int16x4_t test_vget_low_s16(int16x8_t a) { return vget_low_s16(a); } -// CHECK-LABEL: define <2 x i32> @test_vget_low_s32(<4 x i32> %a) #0 { +// CHECK-LABEL: define frozen <2 x i32> @test_vget_low_s32(<4 x i32> frozen %a) #0 { // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <4 x i32> %a, <4 x i32> %a, <2 x i32> // CHECK: ret <2 x i32> [[SHUFFLE_I]] int32x2_t test_vget_low_s32(int32x4_t a) { return vget_low_s32(a); } -// CHECK-LABEL: define <1 x i64> @test_vget_low_s64(<2 x i64> %a) #0 { +// CHECK-LABEL: define frozen <1 x i64> @test_vget_low_s64(<2 x i64> frozen %a) #0 { // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <2 x i64> %a, <2 x i64> %a, <1 x i32> zeroinitializer // CHECK: ret <1 x i64> [[SHUFFLE_I]] int64x1_t test_vget_low_s64(int64x2_t a) { return vget_low_s64(a); } -// CHECK-LABEL: define <8 x i8> @test_vget_low_u8(<16 x i8> %a) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vget_low_u8(<16 x i8> frozen %a) #0 { // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <16 x i8> %a, <16 x i8> %a, <8 x i32> // CHECK: ret <8 x i8> [[SHUFFLE_I]] uint8x8_t test_vget_low_u8(uint8x16_t a) { return vget_low_u8(a); } -// CHECK-LABEL: define <4 x i16> @test_vget_low_u16(<8 x i16> %a) #0 { +// CHECK-LABEL: define frozen <4 x i16> @test_vget_low_u16(<8 x i16> frozen %a) #0 { // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <8 x i16> %a, <8 x i16> %a, <4 x i32> // CHECK: ret <4 x i16> [[SHUFFLE_I]] uint16x4_t test_vget_low_u16(uint16x8_t a) { return vget_low_u16(a); } -// CHECK-LABEL: define <2 x i32> @test_vget_low_u32(<4 x i32> %a) #0 { +// CHECK-LABEL: define frozen <2 x i32> @test_vget_low_u32(<4 x i32> frozen %a) #0 { // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <4 x i32> %a, <4 x i32> %a, <2 x i32> // CHECK: ret <2 x i32> [[SHUFFLE_I]] uint32x2_t test_vget_low_u32(uint32x4_t a) { return vget_low_u32(a); } -// CHECK-LABEL: define <1 x i64> @test_vget_low_u64(<2 x i64> %a) #0 { +// CHECK-LABEL: define frozen <1 x i64> @test_vget_low_u64(<2 x i64> frozen %a) #0 { // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <2 x i64> %a, <2 x i64> %a, <1 x i32> zeroinitializer // CHECK: ret <1 x i64> [[SHUFFLE_I]] uint64x1_t test_vget_low_u64(uint64x2_t a) { return vget_low_u64(a); } -// CHECK-LABEL: define <1 x i64> @test_vget_low_p64(<2 x i64> %a) #0 { +// CHECK-LABEL: define frozen <1 x i64> @test_vget_low_p64(<2 x i64> frozen %a) #0 { // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <2 x i64> %a, <2 x i64> %a, <1 x i32> zeroinitializer // CHECK: ret <1 x i64> [[SHUFFLE_I]] poly64x1_t test_vget_low_p64(poly64x2_t a) { return vget_low_p64(a); } -// CHECK-LABEL: define <4 x half> @test_vget_low_f16(<8 x half> %a) #0 { +// CHECK-LABEL: define frozen <4 x half> @test_vget_low_f16(<8 x half> frozen %a) #0 { // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <8 x half> %a, <8 x half> %a, <4 x i32> // CHECK: ret <4 x half> [[SHUFFLE_I]] float16x4_t test_vget_low_f16(float16x8_t a) { return vget_low_f16(a); } -// CHECK-LABEL: define <2 x float> @test_vget_low_f32(<4 x float> %a) #0 { +// CHECK-LABEL: define frozen <2 x float> @test_vget_low_f32(<4 x float> frozen %a) #0 { // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <4 x float> %a, <4 x float> %a, <2 x i32> // CHECK: ret <2 x float> [[SHUFFLE_I]] float32x2_t test_vget_low_f32(float32x4_t a) { return vget_low_f32(a); } -// CHECK-LABEL: define <8 x i8> @test_vget_low_p8(<16 x i8> %a) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vget_low_p8(<16 x i8> frozen %a) #0 { // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <16 x i8> %a, <16 x i8> %a, <8 x i32> // CHECK: ret <8 x i8> [[SHUFFLE_I]] poly8x8_t test_vget_low_p8(poly8x16_t a) { return vget_low_p8(a); } -// CHECK-LABEL: define <4 x i16> @test_vget_low_p16(<8 x i16> %a) #0 { +// CHECK-LABEL: define frozen <4 x i16> @test_vget_low_p16(<8 x i16> frozen %a) #0 { // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <8 x i16> %a, <8 x i16> %a, <4 x i32> // CHECK: ret <4 x i16> [[SHUFFLE_I]] poly16x4_t test_vget_low_p16(poly16x8_t a) { return vget_low_p16(a); } -// CHECK-LABEL: define <1 x double> @test_vget_low_f64(<2 x double> %a) #0 { +// CHECK-LABEL: define frozen <1 x double> @test_vget_low_f64(<2 x double> frozen %a) #0 { // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <2 x double> %a, <2 x double> %a, <1 x i32> zeroinitializer // CHECK: ret <1 x double> [[SHUFFLE_I]] float64x1_t test_vget_low_f64(float64x2_t a) { diff --git a/clang/test/CodeGen/aarch64-neon-vget.c b/clang/test/CodeGen/aarch64-neon-vget.c --- a/clang/test/CodeGen/aarch64-neon-vget.c +++ b/clang/test/CodeGen/aarch64-neon-vget.c @@ -4,70 +4,70 @@ #include -// CHECK-LABEL: define i8 @test_vget_lane_u8(<8 x i8> %a) #0 { +// CHECK-LABEL: define frozen i8 @test_vget_lane_u8(<8 x i8> frozen %a) #0 { // CHECK: [[VGET_LANE:%.*]] = extractelement <8 x i8> %a, i32 7 // CHECK: ret i8 [[VGET_LANE]] uint8_t test_vget_lane_u8(uint8x8_t a) { return vget_lane_u8(a, 7); } -// CHECK-LABEL: define i16 @test_vget_lane_u16(<4 x i16> %a) #0 { +// CHECK-LABEL: define frozen i16 @test_vget_lane_u16(<4 x i16> frozen %a) #0 { // CHECK: [[VGET_LANE:%.*]] = extractelement <4 x i16> %a, i32 3 // CHECK: ret i16 [[VGET_LANE]] uint16_t test_vget_lane_u16(uint16x4_t a) { return vget_lane_u16(a, 3); } -// CHECK-LABEL: define i32 @test_vget_lane_u32(<2 x i32> %a) #0 { +// CHECK-LABEL: define frozen i32 @test_vget_lane_u32(<2 x i32> frozen %a) #0 { // CHECK: [[VGET_LANE:%.*]] = extractelement <2 x i32> %a, i32 1 // CHECK: ret i32 [[VGET_LANE]] uint32_t test_vget_lane_u32(uint32x2_t a) { return vget_lane_u32(a, 1); } -// CHECK-LABEL: define i8 @test_vget_lane_s8(<8 x i8> %a) #0 { +// CHECK-LABEL: define frozen i8 @test_vget_lane_s8(<8 x i8> frozen %a) #0 { // CHECK: [[VGET_LANE:%.*]] = extractelement <8 x i8> %a, i32 7 // CHECK: ret i8 [[VGET_LANE]] int8_t test_vget_lane_s8(int8x8_t a) { return vget_lane_s8(a, 7); } -// CHECK-LABEL: define i16 @test_vget_lane_s16(<4 x i16> %a) #0 { +// CHECK-LABEL: define frozen i16 @test_vget_lane_s16(<4 x i16> frozen %a) #0 { // CHECK: [[VGET_LANE:%.*]] = extractelement <4 x i16> %a, i32 3 // CHECK: ret i16 [[VGET_LANE]] int16_t test_vget_lane_s16(int16x4_t a) { return vget_lane_s16(a, 3); } -// CHECK-LABEL: define i32 @test_vget_lane_s32(<2 x i32> %a) #0 { +// CHECK-LABEL: define frozen i32 @test_vget_lane_s32(<2 x i32> frozen %a) #0 { // CHECK: [[VGET_LANE:%.*]] = extractelement <2 x i32> %a, i32 1 // CHECK: ret i32 [[VGET_LANE]] int32_t test_vget_lane_s32(int32x2_t a) { return vget_lane_s32(a, 1); } -// CHECK-LABEL: define i8 @test_vget_lane_p8(<8 x i8> %a) #0 { +// CHECK-LABEL: define frozen i8 @test_vget_lane_p8(<8 x i8> frozen %a) #0 { // CHECK: [[VGET_LANE:%.*]] = extractelement <8 x i8> %a, i32 7 // CHECK: ret i8 [[VGET_LANE]] poly8_t test_vget_lane_p8(poly8x8_t a) { return vget_lane_p8(a, 7); } -// CHECK-LABEL: define i16 @test_vget_lane_p16(<4 x i16> %a) #0 { +// CHECK-LABEL: define frozen i16 @test_vget_lane_p16(<4 x i16> frozen %a) #0 { // CHECK: [[VGET_LANE:%.*]] = extractelement <4 x i16> %a, i32 3 // CHECK: ret i16 [[VGET_LANE]] poly16_t test_vget_lane_p16(poly16x4_t a) { return vget_lane_p16(a, 3); } -// CHECK-LABEL: define float @test_vget_lane_f32(<2 x float> %a) #0 { +// CHECK-LABEL: define frozen float @test_vget_lane_f32(<2 x float> frozen %a) #0 { // CHECK: [[VGET_LANE:%.*]] = extractelement <2 x float> %a, i32 1 // CHECK: ret float [[VGET_LANE]] float32_t test_vget_lane_f32(float32x2_t a) { return vget_lane_f32(a, 1); } -// CHECK-LABEL: define float @test_vget_lane_f16(<4 x half> %a) #0 { +// CHECK-LABEL: define frozen float @test_vget_lane_f16(<4 x half> frozen %a) #0 { // CHECK: [[__REINT_242:%.*]] = alloca <4 x half>, align 8 // CHECK: [[__REINT1_242:%.*]] = alloca i16, align 2 // CHECK: store <4 x half> %a, <4 x half>* [[__REINT_242]], align 8 @@ -83,70 +83,70 @@ return vget_lane_f16(a, 1); } -// CHECK-LABEL: define i8 @test_vgetq_lane_u8(<16 x i8> %a) #1 { +// CHECK-LABEL: define frozen i8 @test_vgetq_lane_u8(<16 x i8> frozen %a) #1 { // CHECK: [[VGETQ_LANE:%.*]] = extractelement <16 x i8> %a, i32 15 // CHECK: ret i8 [[VGETQ_LANE]] uint8_t test_vgetq_lane_u8(uint8x16_t a) { return vgetq_lane_u8(a, 15); } -// CHECK-LABEL: define i16 @test_vgetq_lane_u16(<8 x i16> %a) #1 { +// CHECK-LABEL: define frozen i16 @test_vgetq_lane_u16(<8 x i16> frozen %a) #1 { // CHECK: [[VGETQ_LANE:%.*]] = extractelement <8 x i16> %a, i32 7 // CHECK: ret i16 [[VGETQ_LANE]] uint16_t test_vgetq_lane_u16(uint16x8_t a) { return vgetq_lane_u16(a, 7); } -// CHECK-LABEL: define i32 @test_vgetq_lane_u32(<4 x i32> %a) #1 { +// CHECK-LABEL: define frozen i32 @test_vgetq_lane_u32(<4 x i32> frozen %a) #1 { // CHECK: [[VGETQ_LANE:%.*]] = extractelement <4 x i32> %a, i32 3 // CHECK: ret i32 [[VGETQ_LANE]] uint32_t test_vgetq_lane_u32(uint32x4_t a) { return vgetq_lane_u32(a, 3); } -// CHECK-LABEL: define i8 @test_vgetq_lane_s8(<16 x i8> %a) #1 { +// CHECK-LABEL: define frozen i8 @test_vgetq_lane_s8(<16 x i8> frozen %a) #1 { // CHECK: [[VGETQ_LANE:%.*]] = extractelement <16 x i8> %a, i32 15 // CHECK: ret i8 [[VGETQ_LANE]] int8_t test_vgetq_lane_s8(int8x16_t a) { return vgetq_lane_s8(a, 15); } -// CHECK-LABEL: define i16 @test_vgetq_lane_s16(<8 x i16> %a) #1 { +// CHECK-LABEL: define frozen i16 @test_vgetq_lane_s16(<8 x i16> frozen %a) #1 { // CHECK: [[VGETQ_LANE:%.*]] = extractelement <8 x i16> %a, i32 7 // CHECK: ret i16 [[VGETQ_LANE]] int16_t test_vgetq_lane_s16(int16x8_t a) { return vgetq_lane_s16(a, 7); } -// CHECK-LABEL: define i32 @test_vgetq_lane_s32(<4 x i32> %a) #1 { +// CHECK-LABEL: define frozen i32 @test_vgetq_lane_s32(<4 x i32> frozen %a) #1 { // CHECK: [[VGETQ_LANE:%.*]] = extractelement <4 x i32> %a, i32 3 // CHECK: ret i32 [[VGETQ_LANE]] int32_t test_vgetq_lane_s32(int32x4_t a) { return vgetq_lane_s32(a, 3); } -// CHECK-LABEL: define i8 @test_vgetq_lane_p8(<16 x i8> %a) #1 { +// CHECK-LABEL: define frozen i8 @test_vgetq_lane_p8(<16 x i8> frozen %a) #1 { // CHECK: [[VGETQ_LANE:%.*]] = extractelement <16 x i8> %a, i32 15 // CHECK: ret i8 [[VGETQ_LANE]] poly8_t test_vgetq_lane_p8(poly8x16_t a) { return vgetq_lane_p8(a, 15); } -// CHECK-LABEL: define i16 @test_vgetq_lane_p16(<8 x i16> %a) #1 { +// CHECK-LABEL: define frozen i16 @test_vgetq_lane_p16(<8 x i16> frozen %a) #1 { // CHECK: [[VGETQ_LANE:%.*]] = extractelement <8 x i16> %a, i32 7 // CHECK: ret i16 [[VGETQ_LANE]] poly16_t test_vgetq_lane_p16(poly16x8_t a) { return vgetq_lane_p16(a, 7); } -// CHECK-LABEL: define float @test_vgetq_lane_f32(<4 x float> %a) #1 { +// CHECK-LABEL: define frozen float @test_vgetq_lane_f32(<4 x float> frozen %a) #1 { // CHECK: [[VGETQ_LANE:%.*]] = extractelement <4 x float> %a, i32 3 // CHECK: ret float [[VGETQ_LANE]] float32_t test_vgetq_lane_f32(float32x4_t a) { return vgetq_lane_f32(a, 3); } -// CHECK-LABEL: define float @test_vgetq_lane_f16(<8 x half> %a) #1 { +// CHECK-LABEL: define frozen float @test_vgetq_lane_f16(<8 x half> frozen %a) #1 { // CHECK: [[__REINT_244:%.*]] = alloca <8 x half>, align 16 // CHECK: [[__REINT1_244:%.*]] = alloca i16, align 2 // CHECK: store <8 x half> %a, <8 x half>* [[__REINT_244]], align 16 @@ -162,28 +162,28 @@ return vgetq_lane_f16(a, 3); } -// CHECK-LABEL: define i64 @test_vget_lane_s64(<1 x i64> %a) #0 { +// CHECK-LABEL: define frozen i64 @test_vget_lane_s64(<1 x i64> frozen %a) #0 { // CHECK: [[VGET_LANE:%.*]] = extractelement <1 x i64> %a, i32 0 // CHECK: ret i64 [[VGET_LANE]] int64_t test_vget_lane_s64(int64x1_t a) { return vget_lane_s64(a, 0); } -// CHECK-LABEL: define i64 @test_vget_lane_u64(<1 x i64> %a) #0 { +// CHECK-LABEL: define frozen i64 @test_vget_lane_u64(<1 x i64> frozen %a) #0 { // CHECK: [[VGET_LANE:%.*]] = extractelement <1 x i64> %a, i32 0 // CHECK: ret i64 [[VGET_LANE]] uint64_t test_vget_lane_u64(uint64x1_t a) { return vget_lane_u64(a, 0); } -// CHECK-LABEL: define i64 @test_vgetq_lane_s64(<2 x i64> %a) #1 { +// CHECK-LABEL: define frozen i64 @test_vgetq_lane_s64(<2 x i64> frozen %a) #1 { // CHECK: [[VGETQ_LANE:%.*]] = extractelement <2 x i64> %a, i32 1 // CHECK: ret i64 [[VGETQ_LANE]] int64_t test_vgetq_lane_s64(int64x2_t a) { return vgetq_lane_s64(a, 1); } -// CHECK-LABEL: define i64 @test_vgetq_lane_u64(<2 x i64> %a) #1 { +// CHECK-LABEL: define frozen i64 @test_vgetq_lane_u64(<2 x i64> frozen %a) #1 { // CHECK: [[VGETQ_LANE:%.*]] = extractelement <2 x i64> %a, i32 1 // CHECK: ret i64 [[VGETQ_LANE]] uint64_t test_vgetq_lane_u64(uint64x2_t a) { @@ -191,70 +191,70 @@ } -// CHECK-LABEL: define <8 x i8> @test_vset_lane_u8(i8 %a, <8 x i8> %b) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vset_lane_u8(i8 frozen %a, <8 x i8> frozen %b) #0 { // CHECK: [[VSET_LANE:%.*]] = insertelement <8 x i8> %b, i8 %a, i32 7 // CHECK: ret <8 x i8> [[VSET_LANE]] uint8x8_t test_vset_lane_u8(uint8_t a, uint8x8_t b) { return vset_lane_u8(a, b, 7); } -// CHECK-LABEL: define <4 x i16> @test_vset_lane_u16(i16 %a, <4 x i16> %b) #0 { +// CHECK-LABEL: define frozen <4 x i16> @test_vset_lane_u16(i16 frozen %a, <4 x i16> frozen %b) #0 { // CHECK: [[VSET_LANE:%.*]] = insertelement <4 x i16> %b, i16 %a, i32 3 // CHECK: ret <4 x i16> [[VSET_LANE]] uint16x4_t test_vset_lane_u16(uint16_t a, uint16x4_t b) { return vset_lane_u16(a, b, 3); } -// CHECK-LABEL: define <2 x i32> @test_vset_lane_u32(i32 %a, <2 x i32> %b) #0 { +// CHECK-LABEL: define frozen <2 x i32> @test_vset_lane_u32(i32 frozen %a, <2 x i32> frozen %b) #0 { // CHECK: [[VSET_LANE:%.*]] = insertelement <2 x i32> %b, i32 %a, i32 1 // CHECK: ret <2 x i32> [[VSET_LANE]] uint32x2_t test_vset_lane_u32(uint32_t a, uint32x2_t b) { return vset_lane_u32(a, b, 1); } -// CHECK-LABEL: define <8 x i8> @test_vset_lane_s8(i8 %a, <8 x i8> %b) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vset_lane_s8(i8 frozen %a, <8 x i8> frozen %b) #0 { // CHECK: [[VSET_LANE:%.*]] = insertelement <8 x i8> %b, i8 %a, i32 7 // CHECK: ret <8 x i8> [[VSET_LANE]] int8x8_t test_vset_lane_s8(int8_t a, int8x8_t b) { return vset_lane_s8(a, b, 7); } -// CHECK-LABEL: define <4 x i16> @test_vset_lane_s16(i16 %a, <4 x i16> %b) #0 { +// CHECK-LABEL: define frozen <4 x i16> @test_vset_lane_s16(i16 frozen %a, <4 x i16> frozen %b) #0 { // CHECK: [[VSET_LANE:%.*]] = insertelement <4 x i16> %b, i16 %a, i32 3 // CHECK: ret <4 x i16> [[VSET_LANE]] int16x4_t test_vset_lane_s16(int16_t a, int16x4_t b) { return vset_lane_s16(a, b, 3); } -// CHECK-LABEL: define <2 x i32> @test_vset_lane_s32(i32 %a, <2 x i32> %b) #0 { +// CHECK-LABEL: define frozen <2 x i32> @test_vset_lane_s32(i32 frozen %a, <2 x i32> frozen %b) #0 { // CHECK: [[VSET_LANE:%.*]] = insertelement <2 x i32> %b, i32 %a, i32 1 // CHECK: ret <2 x i32> [[VSET_LANE]] int32x2_t test_vset_lane_s32(int32_t a, int32x2_t b) { return vset_lane_s32(a, b, 1); } -// CHECK-LABEL: define <8 x i8> @test_vset_lane_p8(i8 %a, <8 x i8> %b) #0 { +// CHECK-LABEL: define frozen <8 x i8> @test_vset_lane_p8(i8 frozen %a, <8 x i8> frozen %b) #0 { // CHECK: [[VSET_LANE:%.*]] = insertelement <8 x i8> %b, i8 %a, i32 7 // CHECK: ret <8 x i8> [[VSET_LANE]] poly8x8_t test_vset_lane_p8(poly8_t a, poly8x8_t b) { return vset_lane_p8(a, b, 7); } -// CHECK-LABEL: define <4 x i16> @test_vset_lane_p16(i16 %a, <4 x i16> %b) #0 { +// CHECK-LABEL: define frozen <4 x i16> @test_vset_lane_p16(i16 frozen %a, <4 x i16> frozen %b) #0 { // CHECK: [[VSET_LANE:%.*]] = insertelement <4 x i16> %b, i16 %a, i32 3 // CHECK: ret <4 x i16> [[VSET_LANE]] poly16x4_t test_vset_lane_p16(poly16_t a, poly16x4_t b) { return vset_lane_p16(a, b, 3); } -// CHECK-LABEL: define <2 x float> @test_vset_lane_f32(float %a, <2 x float> %b) #0 { +// CHECK-LABEL: define frozen <2 x float> @test_vset_lane_f32(float frozen %a, <2 x float> frozen %b) #0 { // CHECK: [[VSET_LANE:%.*]] = insertelement <2 x float> %b, float %a, i32 1 // CHECK: ret <2 x float> [[VSET_LANE]] float32x2_t test_vset_lane_f32(float32_t a, float32x2_t b) { return vset_lane_f32(a, b, 1); } -// CHECK-LABEL: define <4 x half> @test_vset_lane_f16(half* %a, <4 x half> %b) #0 { +// CHECK-LABEL: define frozen <4 x half> @test_vset_lane_f16(half* frozen %a, <4 x half> frozen %b) #0 { // CHECK: [[__REINT_246:%.*]] = alloca half, align 2 // CHECK: [[__REINT1_246:%.*]] = alloca <4 x half>, align 8 // CHECK: [[__REINT2_246:%.*]] = alloca <4 x i16>, align 8 @@ -274,70 +274,70 @@ return vset_lane_f16(*a, b, 3); } -// CHECK-LABEL: define <16 x i8> @test_vsetq_lane_u8(i8 %a, <16 x i8> %b) #1 { +// CHECK-LABEL: define frozen <16 x i8> @test_vsetq_lane_u8(i8 frozen %a, <16 x i8> frozen %b) #1 { // CHECK: [[VSET_LANE:%.*]] = insertelement <16 x i8> %b, i8 %a, i32 15 // CHECK: ret <16 x i8> [[VSET_LANE]] uint8x16_t test_vsetq_lane_u8(uint8_t a, uint8x16_t b) { return vsetq_lane_u8(a, b, 15); } -// CHECK-LABEL: define <8 x i16> @test_vsetq_lane_u16(i16 %a, <8 x i16> %b) #1 { +// CHECK-LABEL: define frozen <8 x i16> @test_vsetq_lane_u16(i16 frozen %a, <8 x i16> frozen %b) #1 { // CHECK: [[VSET_LANE:%.*]] = insertelement <8 x i16> %b, i16 %a, i32 7 // CHECK: ret <8 x i16> [[VSET_LANE]] uint16x8_t test_vsetq_lane_u16(uint16_t a, uint16x8_t b) { return vsetq_lane_u16(a, b, 7); } -// CHECK-LABEL: define <4 x i32> @test_vsetq_lane_u32(i32 %a, <4 x i32> %b) #1 { +// CHECK-LABEL: define frozen <4 x i32> @test_vsetq_lane_u32(i32 frozen %a, <4 x i32> frozen %b) #1 { // CHECK: [[VSET_LANE:%.*]] = insertelement <4 x i32> %b, i32 %a, i32 3 // CHECK: ret <4 x i32> [[VSET_LANE]] uint32x4_t test_vsetq_lane_u32(uint32_t a, uint32x4_t b) { return vsetq_lane_u32(a, b, 3); } -// CHECK-LABEL: define <16 x i8> @test_vsetq_lane_s8(i8 %a, <16 x i8> %b) #1 { +// CHECK-LABEL: define frozen <16 x i8> @test_vsetq_lane_s8(i8 frozen %a, <16 x i8> frozen %b) #1 { // CHECK: [[VSET_LANE:%.*]] = insertelement <16 x i8> %b, i8 %a, i32 15 // CHECK: ret <16 x i8> [[VSET_LANE]] int8x16_t test_vsetq_lane_s8(int8_t a, int8x16_t b) { return vsetq_lane_s8(a, b, 15); } -// CHECK-LABEL: define <8 x i16> @test_vsetq_lane_s16(i16 %a, <8 x i16> %b) #1 { +// CHECK-LABEL: define frozen <8 x i16> @test_vsetq_lane_s16(i16 frozen %a, <8 x i16> frozen %b) #1 { // CHECK: [[VSET_LANE:%.*]] = insertelement <8 x i16> %b, i16 %a, i32 7 // CHECK: ret <8 x i16> [[VSET_LANE]] int16x8_t test_vsetq_lane_s16(int16_t a, int16x8_t b) { return vsetq_lane_s16(a, b, 7); } -// CHECK-LABEL: define <4 x i32> @test_vsetq_lane_s32(i32 %a, <4 x i32> %b) #1 { +// CHECK-LABEL: define frozen <4 x i32> @test_vsetq_lane_s32(i32 frozen %a, <4 x i32> frozen %b) #1 { // CHECK: [[VSET_LANE:%.*]] = insertelement <4 x i32> %b, i32 %a, i32 3 // CHECK: ret <4 x i32> [[VSET_LANE]] int32x4_t test_vsetq_lane_s32(int32_t a, int32x4_t b) { return vsetq_lane_s32(a, b, 3); } -// CHECK-LABEL: define <16 x i8> @test_vsetq_lane_p8(i8 %a, <16 x i8> %b) #1 { +// CHECK-LABEL: define frozen <16 x i8> @test_vsetq_lane_p8(i8 frozen %a, <16 x i8> frozen %b) #1 { // CHECK: [[VSET_LANE:%.*]] = insertelement <16 x i8> %b, i8 %a, i32 15 // CHECK: ret <16 x i8> [[VSET_LANE]] poly8x16_t test_vsetq_lane_p8(poly8_t a, poly8x16_t b) { return vsetq_lane_p8(a, b, 15); } -// CHECK-LABEL: define <8 x i16> @test_vsetq_lane_p16(i16 %a, <8 x i16> %b) #1 { +// CHECK-LABEL: define frozen <8 x i16> @test_vsetq_lane_p16(i16 frozen %a, <8 x i16> frozen %b) #1 { // CHECK: [[VSET_LANE:%.*]] = insertelement <8 x i16> %b, i16 %a, i32 7 // CHECK: ret <8 x i16> [[VSET_LANE]] poly16x8_t test_vsetq_lane_p16(poly16_t a, poly16x8_t b) { return vsetq_lane_p16(a, b, 7); } -// CHECK-LABEL: define <4 x float> @test_vsetq_lane_f32(float %a, <4 x float> %b) #1 { +// CHECK-LABEL: define frozen <4 x float> @test_vsetq_lane_f32(float frozen %a, <4 x float> frozen %b) #1 { // CHECK: [[VSET_LANE:%.*]] = insertelement <4 x float> %b, float %a, i32 3 // CHECK: ret <4 x float> [[VSET_LANE]] float32x4_t test_vsetq_lane_f32(float32_t a, float32x4_t b) { return vsetq_lane_f32(a, b, 3); } -// CHECK-LABEL: define <8 x half> @test_vsetq_lane_f16(half* %a, <8 x half> %b) #1 { +// CHECK-LABEL: define frozen <8 x half> @test_vsetq_lane_f16(half* frozen %a, <8 x half> frozen %b) #1 { // CHECK: [[__REINT_248:%.*]] = alloca half, align 2 // CHECK: [[__REINT1_248:%.*]] = alloca <8 x half>, align 16 // CHECK: [[__REINT2_248:%.*]] = alloca <8 x i16>, align 16 @@ -357,28 +357,28 @@ return vsetq_lane_f16(*a, b, 7); } -// CHECK-LABEL: define <1 x i64> @test_vset_lane_s64(i64 %a, <1 x i64> %b) #0 { +// CHECK-LABEL: define frozen <1 x i64> @test_vset_lane_s64(i64 frozen %a, <1 x i64> frozen %b) #0 { // CHECK: [[VSET_LANE:%.*]] = insertelement <1 x i64> %b, i64 %a, i32 0 // CHECK: ret <1 x i64> [[VSET_LANE]] int64x1_t test_vset_lane_s64(int64_t a, int64x1_t b) { return vset_lane_s64(a, b, 0); } -// CHECK-LABEL: define <1 x i64> @test_vset_lane_u64(i64 %a, <1 x i64> %b) #0 { +// CHECK-LABEL: define frozen <1 x i64> @test_vset_lane_u64(i64 frozen %a, <1 x i64> frozen %b) #0 { // CHECK: [[VSET_LANE:%.*]] = insertelement <1 x i64> %b, i64 %a, i32 0 // CHECK: ret <1 x i64> [[VSET_LANE]] uint64x1_t test_vset_lane_u64(uint64_t a, uint64x1_t b) { return vset_lane_u64(a, b, 0); } -// CHECK-LABEL: define <2 x i64> @test_vsetq_lane_s64(i64 %a, <2 x i64> %b) #1 { +// CHECK-LABEL: define frozen <2 x i64> @test_vsetq_lane_s64(i64 frozen %a, <2 x i64> frozen %b) #1 { // CHECK: [[VSET_LANE:%.*]] = insertelement <2 x i64> %b, i64 %a, i32 1 // CHECK: ret <2 x i64> [[VSET_LANE]] int64x2_t test_vsetq_lane_s64(int64_t a, int64x2_t b) { return vsetq_lane_s64(a, b, 1); } -// CHECK-LABEL: define <2 x i64> @test_vsetq_lane_u64(i64 %a, <2 x i64> %b) #1 { +// CHECK-LABEL: define frozen <2 x i64> @test_vsetq_lane_u64(i64 frozen %a, <2 x i64> frozen %b) #1 { // CHECK: [[VSET_LANE:%.*]] = insertelement <2 x i64> %b, i64 %a, i32 1 // CHECK: ret <2 x i64> [[VSET_LANE]] uint64x2_t test_vsetq_lane_u64(uint64_t a, uint64x2_t b) { diff --git a/clang/test/CodeGen/aarch64-poly128.c b/clang/test/CodeGen/aarch64-poly128.c --- a/clang/test/CodeGen/aarch64-poly128.c +++ b/clang/test/CodeGen/aarch64-poly128.c @@ -12,7 +12,7 @@ #include -// CHECK-LABEL: define void @test_vstrq_p128(i128* %ptr, i128 %val) #0 { +// CHECK-LABEL: define void @test_vstrq_p128(i128* frozen %ptr, i128 frozen %val) #0 { // CHECK: [[TMP0:%.*]] = bitcast i128* %ptr to i8* // CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i128* // CHECK: store i128 %val, i128* [[TMP1]] @@ -22,7 +22,7 @@ } -// CHECK-LABEL: define i128 @test_vldrq_p128(i128* %ptr) #0 { +// CHECK-LABEL: define frozen i128 @test_vldrq_p128(i128* frozen %ptr) #0 { // CHECK: [[TMP0:%.*]] = bitcast i128* %ptr to i8* // CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i128* // CHECK: [[TMP2:%.*]] = load i128, i128* [[TMP1]] @@ -32,7 +32,7 @@ } -// CHECK-LABEL: define void @test_ld_st_p128(i128* %ptr) #0 { +// CHECK-LABEL: define void @test_ld_st_p128(i128* frozen %ptr) #0 { // CHECK: [[TMP0:%.*]] = bitcast i128* %ptr to i8* // CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i128* // CHECK: [[TMP2:%.*]] = load i128, i128* [[TMP1]] @@ -46,7 +46,7 @@ } -// CHECK-LABEL: define i128 @test_vmull_p64(i64 %a, i64 %b) #0 { +// CHECK-LABEL: define frozen i128 @test_vmull_p64(i64 frozen %a, i64 frozen %b) #0 { // CHECK: [[VMULL_P64_I:%.*]] = call <16 x i8> @llvm.aarch64.neon.pmull64(i64 %a, i64 %b) #3 // CHECK: [[VMULL_P641_I:%.*]] = bitcast <16 x i8> [[VMULL_P64_I]] to i128 // CHECK: ret i128 [[VMULL_P641_I]] @@ -54,7 +54,7 @@ return vmull_p64(a, b); } -// CHECK-LABEL: define i128 @test_vmull_high_p64(<2 x i64> %a, <2 x i64> %b) #1 { +// CHECK-LABEL: define frozen i128 @test_vmull_high_p64(<2 x i64> frozen %a, <2 x i64> frozen %b) #1 { // CHECK: [[SHUFFLE_I_I:%.*]] = shufflevector <2 x i64> %a, <2 x i64> %a, <1 x i32> // CHECK: [[TMP0:%.*]] = bitcast <1 x i64> [[SHUFFLE_I_I]] to i64 // CHECK: [[SHUFFLE_I7_I:%.*]] = shufflevector <2 x i64> %b, <2 x i64> %b, <1 x i32> @@ -66,182 +66,182 @@ return vmull_high_p64(a, b); } -// CHECK-LABEL: define i128 @test_vreinterpretq_p128_s8(<16 x i8> %a) #1 { +// CHECK-LABEL: define frozen i128 @test_vreinterpretq_p128_s8(<16 x i8> frozen %a) #1 { // CHECK: [[TMP0:%.*]] = bitcast <16 x i8> %a to i128 // CHECK: ret i128 [[TMP0]] poly128_t test_vreinterpretq_p128_s8(int8x16_t a) { return vreinterpretq_p128_s8(a); } -// CHECK-LABEL: define i128 @test_vreinterpretq_p128_s16(<8 x i16> %a) #1 { +// CHECK-LABEL: define frozen i128 @test_vreinterpretq_p128_s16(<8 x i16> frozen %a) #1 { // CHECK: [[TMP0:%.*]] = bitcast <8 x i16> %a to i128 // CHECK: ret i128 [[TMP0]] poly128_t test_vreinterpretq_p128_s16(int16x8_t a) { return vreinterpretq_p128_s16(a); } -// CHECK-LABEL: define i128 @test_vreinterpretq_p128_s32(<4 x i32> %a) #1 { +// CHECK-LABEL: define frozen i128 @test_vreinterpretq_p128_s32(<4 x i32> frozen %a) #1 { // CHECK: [[TMP0:%.*]] = bitcast <4 x i32> %a to i128 // CHECK: ret i128 [[TMP0]] poly128_t test_vreinterpretq_p128_s32(int32x4_t a) { return vreinterpretq_p128_s32(a); } -// CHECK-LABEL: define i128 @test_vreinterpretq_p128_s64(<2 x i64> %a) #1 { +// CHECK-LABEL: define frozen i128 @test_vreinterpretq_p128_s64(<2 x i64> frozen %a) #1 { // CHECK: [[TMP0:%.*]] = bitcast <2 x i64> %a to i128 // CHECK: ret i128 [[TMP0]] poly128_t test_vreinterpretq_p128_s64(int64x2_t a) { return vreinterpretq_p128_s64(a); } -// CHECK-LABEL: define i128 @test_vreinterpretq_p128_u8(<16 x i8> %a) #1 { +// CHECK-LABEL: define frozen i128 @test_vreinterpretq_p128_u8(<16 x i8> frozen %a) #1 { // CHECK: [[TMP0:%.*]] = bitcast <16 x i8> %a to i128 // CHECK: ret i128 [[TMP0]] poly128_t test_vreinterpretq_p128_u8(uint8x16_t a) { return vreinterpretq_p128_u8(a); } -// CHECK-LABEL: define i128 @test_vreinterpretq_p128_u16(<8 x i16> %a) #1 { +// CHECK-LABEL: define frozen i128 @test_vreinterpretq_p128_u16(<8 x i16> frozen %a) #1 { // CHECK: [[TMP0:%.*]] = bitcast <8 x i16> %a to i128 // CHECK: ret i128 [[TMP0]] poly128_t test_vreinterpretq_p128_u16(uint16x8_t a) { return vreinterpretq_p128_u16(a); } -// CHECK-LABEL: define i128 @test_vreinterpretq_p128_u32(<4 x i32> %a) #1 { +// CHECK-LABEL: define frozen i128 @test_vreinterpretq_p128_u32(<4 x i32> frozen %a) #1 { // CHECK: [[TMP0:%.*]] = bitcast <4 x i32> %a to i128 // CHECK: ret i128 [[TMP0]] poly128_t test_vreinterpretq_p128_u32(uint32x4_t a) { return vreinterpretq_p128_u32(a); } -// CHECK-LABEL: define i128 @test_vreinterpretq_p128_u64(<2 x i64> %a) #1 { +// CHECK-LABEL: define frozen i128 @test_vreinterpretq_p128_u64(<2 x i64> frozen %a) #1 { // CHECK: [[TMP0:%.*]] = bitcast <2 x i64> %a to i128 // CHECK: ret i128 [[TMP0]] poly128_t test_vreinterpretq_p128_u64(uint64x2_t a) { return vreinterpretq_p128_u64(a); } -// CHECK-LABEL: define i128 @test_vreinterpretq_p128_f32(<4 x float> %a) #1 { +// CHECK-LABEL: define frozen i128 @test_vreinterpretq_p128_f32(<4 x float> frozen %a) #1 { // CHECK: [[TMP0:%.*]] = bitcast <4 x float> %a to i128 // CHECK: ret i128 [[TMP0]] poly128_t test_vreinterpretq_p128_f32(float32x4_t a) { return vreinterpretq_p128_f32(a); } -// CHECK-LABEL: define i128 @test_vreinterpretq_p128_f64(<2 x double> %a) #1 { +// CHECK-LABEL: define frozen i128 @test_vreinterpretq_p128_f64(<2 x double> frozen %a) #1 { // CHECK: [[TMP0:%.*]] = bitcast <2 x double> %a to i128 // CHECK: ret i128 [[TMP0]] poly128_t test_vreinterpretq_p128_f64(float64x2_t a) { return vreinterpretq_p128_f64(a); } -// CHECK-LABEL: define i128 @test_vreinterpretq_p128_p8(<16 x i8> %a) #1 { +// CHECK-LABEL: define frozen i128 @test_vreinterpretq_p128_p8(<16 x i8> frozen %a) #1 { // CHECK: [[TMP0:%.*]] = bitcast <16 x i8> %a to i128 // CHECK: ret i128 [[TMP0]] poly128_t test_vreinterpretq_p128_p8(poly8x16_t a) { return vreinterpretq_p128_p8(a); } -// CHECK-LABEL: define i128 @test_vreinterpretq_p128_p16(<8 x i16> %a) #1 { +// CHECK-LABEL: define frozen i128 @test_vreinterpretq_p128_p16(<8 x i16> frozen %a) #1 { // CHECK: [[TMP0:%.*]] = bitcast <8 x i16> %a to i128 // CHECK: ret i128 [[TMP0]] poly128_t test_vreinterpretq_p128_p16(poly16x8_t a) { return vreinterpretq_p128_p16(a); } -// CHECK-LABEL: define i128 @test_vreinterpretq_p128_p64(<2 x i64> %a) #1 { +// CHECK-LABEL: define frozen i128 @test_vreinterpretq_p128_p64(<2 x i64> frozen %a) #1 { // CHECK: [[TMP0:%.*]] = bitcast <2 x i64> %a to i128 // CHECK: ret i128 [[TMP0]] poly128_t test_vreinterpretq_p128_p64(poly64x2_t a) { return vreinterpretq_p128_p64(a); } -// CHECK-LABEL: define <16 x i8> @test_vreinterpretq_s8_p128(i128 %a) #1 { +// CHECK-LABEL: define frozen <16 x i8> @test_vreinterpretq_s8_p128(i128 frozen %a) #1 { // CHECK: [[TMP0:%.*]] = bitcast i128 %a to <16 x i8> // CHECK: ret <16 x i8> [[TMP0]] int8x16_t test_vreinterpretq_s8_p128(poly128_t a) { return vreinterpretq_s8_p128(a); } -// CHECK-LABEL: define <8 x i16> @test_vreinterpretq_s16_p128(i128 %a) #1 { +// CHECK-LABEL: define frozen <8 x i16> @test_vreinterpretq_s16_p128(i128 frozen %a) #1 { // CHECK: [[TMP0:%.*]] = bitcast i128 %a to <8 x i16> // CHECK: ret <8 x i16> [[TMP0]] int16x8_t test_vreinterpretq_s16_p128(poly128_t a) { return vreinterpretq_s16_p128(a); } -// CHECK-LABEL: define <4 x i32> @test_vreinterpretq_s32_p128(i128 %a) #1 { +// CHECK-LABEL: define frozen <4 x i32> @test_vreinterpretq_s32_p128(i128 frozen %a) #1 { // CHECK: [[TMP0:%.*]] = bitcast i128 %a to <4 x i32> // CHECK: ret <4 x i32> [[TMP0]] int32x4_t test_vreinterpretq_s32_p128(poly128_t a) { return vreinterpretq_s32_p128(a); } -// CHECK-LABEL: define <2 x i64> @test_vreinterpretq_s64_p128(i128 %a) #1 { +// CHECK-LABEL: define frozen <2 x i64> @test_vreinterpretq_s64_p128(i128 frozen %a) #1 { // CHECK: [[TMP0:%.*]] = bitcast i128 %a to <2 x i64> // CHECK: ret <2 x i64> [[TMP0]] int64x2_t test_vreinterpretq_s64_p128(poly128_t a) { return vreinterpretq_s64_p128(a); } -// CHECK-LABEL: define <16 x i8> @test_vreinterpretq_u8_p128(i128 %a) #1 { +// CHECK-LABEL: define frozen <16 x i8> @test_vreinterpretq_u8_p128(i128 frozen %a) #1 { // CHECK: [[TMP0:%.*]] = bitcast i128 %a to <16 x i8> // CHECK: ret <16 x i8> [[TMP0]] uint8x16_t test_vreinterpretq_u8_p128(poly128_t a) { return vreinterpretq_u8_p128(a); } -// CHECK-LABEL: define <8 x i16> @test_vreinterpretq_u16_p128(i128 %a) #1 { +// CHECK-LABEL: define frozen <8 x i16> @test_vreinterpretq_u16_p128(i128 frozen %a) #1 { // CHECK: [[TMP0:%.*]] = bitcast i128 %a to <8 x i16> // CHECK: ret <8 x i16> [[TMP0]] uint16x8_t test_vreinterpretq_u16_p128(poly128_t a) { return vreinterpretq_u16_p128(a); } -// CHECK-LABEL: define <4 x i32> @test_vreinterpretq_u32_p128(i128 %a) #1 { +// CHECK-LABEL: define frozen <4 x i32> @test_vreinterpretq_u32_p128(i128 frozen %a) #1 { // CHECK: [[TMP0:%.*]] = bitcast i128 %a to <4 x i32> // CHECK: ret <4 x i32> [[TMP0]] uint32x4_t test_vreinterpretq_u32_p128(poly128_t a) { return vreinterpretq_u32_p128(a); } -// CHECK-LABEL: define <2 x i64> @test_vreinterpretq_u64_p128(i128 %a) #1 { +// CHECK-LABEL: define frozen <2 x i64> @test_vreinterpretq_u64_p128(i128 frozen %a) #1 { // CHECK: [[TMP0:%.*]] = bitcast i128 %a to <2 x i64> // CHECK: ret <2 x i64> [[TMP0]] uint64x2_t test_vreinterpretq_u64_p128(poly128_t a) { return vreinterpretq_u64_p128(a); } -// CHECK-LABEL: define <4 x float> @test_vreinterpretq_f32_p128(i128 %a) #1 { +// CHECK-LABEL: define frozen <4 x float> @test_vreinterpretq_f32_p128(i128 frozen %a) #1 { // CHECK: [[TMP0:%.*]] = bitcast i128 %a to <4 x float> // CHECK: ret <4 x float> [[TMP0]] float32x4_t test_vreinterpretq_f32_p128(poly128_t a) { return vreinterpretq_f32_p128(a); } -// CHECK-LABEL: define <2 x double> @test_vreinterpretq_f64_p128(i128 %a) #1 { +// CHECK-LABEL: define frozen <2 x double> @test_vreinterpretq_f64_p128(i128 frozen %a) #1 { // CHECK: [[TMP0:%.*]] = bitcast i128 %a to <2 x double> // CHECK: ret <2 x double> [[TMP0]] float64x2_t test_vreinterpretq_f64_p128(poly128_t a) { return vreinterpretq_f64_p128(a); } -// CHECK-LABEL: define <16 x i8> @test_vreinterpretq_p8_p128(i128 %a) #1 { +// CHECK-LABEL: define frozen <16 x i8> @test_vreinterpretq_p8_p128(i128 frozen %a) #1 { // CHECK: [[TMP0:%.*]] = bitcast i128 %a to <16 x i8> // CHECK: ret <16 x i8> [[TMP0]] poly8x16_t test_vreinterpretq_p8_p128(poly128_t a) { return vreinterpretq_p8_p128(a); } -// CHECK-LABEL: define <8 x i16> @test_vreinterpretq_p16_p128(i128 %a) #1 { +// CHECK-LABEL: define frozen <8 x i16> @test_vreinterpretq_p16_p128(i128 frozen %a) #1 { // CHECK: [[TMP0:%.*]] = bitcast i128 %a to <8 x i16> // CHECK: ret <8 x i16> [[TMP0]] poly16x8_t test_vreinterpretq_p16_p128(poly128_t a) { return vreinterpretq_p16_p128(a); } -// CHECK-LABEL: define <2 x i64> @test_vreinterpretq_p64_p128(i128 %a) #1 { +// CHECK-LABEL: define frozen <2 x i64> @test_vreinterpretq_p64_p128(i128 frozen %a) #1 { // CHECK: [[TMP0:%.*]] = bitcast i128 %a to <2 x i64> // CHECK: ret <2 x i64> [[TMP0]] poly64x2_t test_vreinterpretq_p64_p128(poly128_t a) { diff --git a/clang/test/CodeGen/aarch64-poly64.c b/clang/test/CodeGen/aarch64-poly64.c --- a/clang/test/CodeGen/aarch64-poly64.c +++ b/clang/test/CodeGen/aarch64-poly64.c @@ -6,7 +6,7 @@ #include -// CHECK-LABEL: define <1 x i64> @test_vceq_p64(<1 x i64> %a, <1 x i64> %b) #0 { +// CHECK-LABEL: define frozen <1 x i64> @test_vceq_p64(<1 x i64> frozen %a, <1 x i64> frozen %b) #0 { // CHECK: [[CMP_I:%.*]] = icmp eq <1 x i64> %a, %b // CHECK: [[SEXT_I:%.*]] = sext <1 x i1> [[CMP_I]] to <1 x i64> // CHECK: ret <1 x i64> [[SEXT_I]] @@ -14,7 +14,7 @@ return vceq_p64(a, b); } -// CHECK-LABEL: define <2 x i64> @test_vceqq_p64(<2 x i64> %a, <2 x i64> %b) #1 { +// CHECK-LABEL: define frozen <2 x i64> @test_vceqq_p64(<2 x i64> frozen %a, <2 x i64> frozen %b) #1 { // CHECK: [[CMP_I:%.*]] = icmp eq <2 x i64> %a, %b // CHECK: [[SEXT_I:%.*]] = sext <2 x i1> [[CMP_I]] to <2 x i64> // CHECK: ret <2 x i64> [[SEXT_I]] @@ -22,7 +22,7 @@ return vceqq_p64(a, b); } -// CHECK-LABEL: define <1 x i64> @test_vtst_p64(<1 x i64> %a, <1 x i64> %b) #0 { +// CHECK-LABEL: define frozen <1 x i64> @test_vtst_p64(<1 x i64> frozen %a, <1 x i64> frozen %b) #0 { // CHECK: [[TMP4:%.*]] = and <1 x i64> %a, %b // CHECK: [[TMP5:%.*]] = icmp ne <1 x i64> [[TMP4]], zeroinitializer // CHECK: [[VTST_I:%.*]] = sext <1 x i1> [[TMP5]] to <1 x i64> @@ -31,7 +31,7 @@ return vtst_p64(a, b); } -// CHECK-LABEL: define <2 x i64> @test_vtstq_p64(<2 x i64> %a, <2 x i64> %b) #1 { +// CHECK-LABEL: define frozen <2 x i64> @test_vtstq_p64(<2 x i64> frozen %a, <2 x i64> frozen %b) #1 { // CHECK: [[TMP4:%.*]] = and <2 x i64> %a, %b // CHECK: [[TMP5:%.*]] = icmp ne <2 x i64> [[TMP4]], zeroinitializer // CHECK: [[VTST_I:%.*]] = sext <2 x i1> [[TMP5]] to <2 x i64> @@ -40,7 +40,7 @@ return vtstq_p64(a, b); } -// CHECK-LABEL: define <1 x i64> @test_vbsl_p64(<1 x i64> %a, <1 x i64> %b, <1 x i64> %c) #0 { +// CHECK-LABEL: define frozen <1 x i64> @test_vbsl_p64(<1 x i64> frozen %a, <1 x i64> frozen %b, <1 x i64> frozen %c) #0 { // CHECK: [[VBSL3_I:%.*]] = and <1 x i64> %a, %b // CHECK: [[TMP3:%.*]] = xor <1 x i64> %a, // CHECK: [[VBSL4_I:%.*]] = and <1 x i64> [[TMP3]], %c @@ -50,7 +50,7 @@ return vbsl_p64(a, b, c); } -// CHECK-LABEL: define <2 x i64> @test_vbslq_p64(<2 x i64> %a, <2 x i64> %b, <2 x i64> %c) #1 { +// CHECK-LABEL: define frozen <2 x i64> @test_vbslq_p64(<2 x i64> frozen %a, <2 x i64> frozen %b, <2 x i64> frozen %c) #1 { // CHECK: [[VBSL3_I:%.*]] = and <2 x i64> %a, %b // CHECK: [[TMP3:%.*]] = xor <2 x i64> %a, // CHECK: [[VBSL4_I:%.*]] = and <2 x i64> [[TMP3]], %c @@ -60,35 +60,35 @@ return vbslq_p64(a, b, c); } -// CHECK-LABEL: define i64 @test_vget_lane_p64(<1 x i64> %v) #0 { +// CHECK-LABEL: define frozen i64 @test_vget_lane_p64(<1 x i64> frozen %v) #0 { // CHECK: [[VGET_LANE:%.*]] = extractelement <1 x i64> %v, i32 0 // CHECK: ret i64 [[VGET_LANE]] poly64_t test_vget_lane_p64(poly64x1_t v) { return vget_lane_p64(v, 0); } -// CHECK-LABEL: define i64 @test_vgetq_lane_p64(<2 x i64> %v) #1 { +// CHECK-LABEL: define frozen i64 @test_vgetq_lane_p64(<2 x i64> frozen %v) #1 { // CHECK: [[VGETQ_LANE:%.*]] = extractelement <2 x i64> %v, i32 1 // CHECK: ret i64 [[VGETQ_LANE]] poly64_t test_vgetq_lane_p64(poly64x2_t v) { return vgetq_lane_p64(v, 1); } -// CHECK-LABEL: define <1 x i64> @test_vset_lane_p64(i64 %a, <1 x i64> %v) #0 { +// CHECK-LABEL: define frozen <1 x i64> @test_vset_lane_p64(i64 frozen %a, <1 x i64> frozen %v) #0 { // CHECK: [[VSET_LANE:%.*]] = insertelement <1 x i64> %v, i64 %a, i32 0 // CHECK: ret <1 x i64> [[VSET_LANE]] poly64x1_t test_vset_lane_p64(poly64_t a, poly64x1_t v) { return vset_lane_p64(a, v, 0); } -// CHECK-LABEL: define <2 x i64> @test_vsetq_lane_p64(i64 %a, <2 x i64> %v) #1 { +// CHECK-LABEL: define frozen <2 x i64> @test_vsetq_lane_p64(i64 frozen %a, <2 x i64> frozen %v) #1 { // CHECK: [[VSET_LANE:%.*]] = insertelement <2 x i64> %v, i64 %a, i32 1 // CHECK: ret <2 x i64> [[VSET_LANE]] poly64x2_t test_vsetq_lane_p64(poly64_t a, poly64x2_t v) { return vsetq_lane_p64(a, v, 1); } -// CHECK-LABEL: define <1 x i64> @test_vcopy_lane_p64(<1 x i64> %a, <1 x i64> %b) #0 { +// CHECK-LABEL: define frozen <1 x i64> @test_vcopy_lane_p64(<1 x i64> frozen %a, <1 x i64> frozen %b) #0 { // CHECK: [[VGET_LANE:%.*]] = extractelement <1 x i64> %b, i32 0 // CHECK: [[VSET_LANE:%.*]] = insertelement <1 x i64> %a, i64 [[VGET_LANE]], i32 0 // CHECK: ret <1 x i64> [[VSET_LANE]] @@ -97,7 +97,7 @@ } -// CHECK-LABEL: define <2 x i64> @test_vcopyq_lane_p64(<2 x i64> %a, <1 x i64> %b) #1 { +// CHECK-LABEL: define frozen <2 x i64> @test_vcopyq_lane_p64(<2 x i64> frozen %a, <1 x i64> frozen %b) #1 { // CHECK: [[VGET_LANE:%.*]] = extractelement <1 x i64> %b, i32 0 // CHECK: [[VSET_LANE:%.*]] = insertelement <2 x i64> %a, i64 [[VGET_LANE]], i32 1 // CHECK: ret <2 x i64> [[VSET_LANE]] @@ -105,7 +105,7 @@ return vcopyq_lane_p64(a, 1, b, 0); } -// CHECK-LABEL: define <2 x i64> @test_vcopyq_laneq_p64(<2 x i64> %a, <2 x i64> %b) #1 { +// CHECK-LABEL: define frozen <2 x i64> @test_vcopyq_laneq_p64(<2 x i64> frozen %a, <2 x i64> frozen %b) #1 { // CHECK: [[VGETQ_LANE:%.*]] = extractelement <2 x i64> %b, i32 1 // CHECK: [[VSET_LANE:%.*]] = insertelement <2 x i64> %a, i64 [[VGETQ_LANE]], i32 1 // CHECK: ret <2 x i64> [[VSET_LANE]] @@ -113,20 +113,20 @@ return vcopyq_laneq_p64(a, 1, b, 1); } -// CHECK-LABEL: define <1 x i64> @test_vcreate_p64(i64 %a) #0 { +// CHECK-LABEL: define frozen <1 x i64> @test_vcreate_p64(i64 frozen %a) #0 { // CHECK: [[TMP0:%.*]] = bitcast i64 %a to <1 x i64> // CHECK: ret <1 x i64> [[TMP0]] poly64x1_t test_vcreate_p64(uint64_t a) { return vcreate_p64(a); } -// CHECK-LABEL: define <1 x i64> @test_vdup_n_p64(i64 %a) #0 { +// CHECK-LABEL: define frozen <1 x i64> @test_vdup_n_p64(i64 frozen %a) #0 { // CHECK: [[VECINIT_I:%.*]] = insertelement <1 x i64> undef, i64 %a, i32 0 // CHECK: ret <1 x i64> [[VECINIT_I]] poly64x1_t test_vdup_n_p64(poly64_t a) { return vdup_n_p64(a); } -// CHECK-LABEL: define <2 x i64> @test_vdupq_n_p64(i64 %a) #1 { +// CHECK-LABEL: define frozen <2 x i64> @test_vdupq_n_p64(i64 frozen %a) #1 { // CHECK: [[VECINIT_I:%.*]] = insertelement <2 x i64> undef, i64 %a, i32 0 // CHECK: [[VECINIT1_I:%.*]] = insertelement <2 x i64> [[VECINIT_I]], i64 %a, i32 1 // CHECK: ret <2 x i64> [[VECINIT1_I]] @@ -134,14 +134,14 @@ return vdupq_n_p64(a); } -// CHECK-LABEL: define <1 x i64> @test_vmov_n_p64(i64 %a) #0 { +// CHECK-LABEL: define frozen <1 x i64> @test_vmov_n_p64(i64 frozen %a) #0 { // CHECK: [[VECINIT_I:%.*]] = insertelement <1 x i64> undef, i64 %a, i32 0 // CHECK: ret <1 x i64> [[VECINIT_I]] poly64x1_t test_vmov_n_p64(poly64_t a) { return vmov_n_p64(a); } -// CHECK-LABEL: define <2 x i64> @test_vmovq_n_p64(i64 %a) #1 { +// CHECK-LABEL: define frozen <2 x i64> @test_vmovq_n_p64(i64 frozen %a) #1 { // CHECK: [[VECINIT_I:%.*]] = insertelement <2 x i64> undef, i64 %a, i32 0 // CHECK: [[VECINIT1_I:%.*]] = insertelement <2 x i64> [[VECINIT_I]], i64 %a, i32 1 // CHECK: ret <2 x i64> [[VECINIT1_I]] @@ -149,7 +149,7 @@ return vmovq_n_p64(a); } -// CHECK-LABEL: define <1 x i64> @test_vdup_lane_p64(<1 x i64> %vec) #0 { +// CHECK-LABEL: define frozen <1 x i64> @test_vdup_lane_p64(<1 x i64> frozen %vec) #0 { // CHECK: [[TMP0:%.*]] = bitcast <1 x i64> [[VEC:%.*]] to <8 x i8> // CHECK: [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x i64> // CHECK: [[LANE:%.*]] = shufflevector <1 x i64> [[TMP1]], <1 x i64> [[TMP1]], <1 x i32> zeroinitializer @@ -158,7 +158,7 @@ return vdup_lane_p64(vec, 0); } -// CHECK-LABEL: define <2 x i64> @test_vdupq_lane_p64(<1 x i64> %vec) #1 { +// CHECK-LABEL: define frozen <2 x i64> @test_vdupq_lane_p64(<1 x i64> frozen %vec) #1 { // CHECK: [[TMP0:%.*]] = bitcast <1 x i64> [[VEC:%.*]] to <8 x i8> // CHECK: [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x i64> // CHECK: [[LANE:%.*]] = shufflevector <1 x i64> [[TMP1]], <1 x i64> [[TMP1]], <2 x i32> zeroinitializer @@ -167,7 +167,7 @@ return vdupq_lane_p64(vec, 0); } -// CHECK-LABEL: define <2 x i64> @test_vdupq_laneq_p64(<2 x i64> %vec) #1 { +// CHECK-LABEL: define frozen <2 x i64> @test_vdupq_laneq_p64(<2 x i64> frozen %vec) #1 { // CHECK: [[TMP0:%.*]] = bitcast <2 x i64> [[VEC:%.*]] to <16 x i8> // CHECK: [[TMP1:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64> // CHECK: [[LANE:%.*]] = shufflevector <2 x i64> [[TMP1]], <2 x i64> [[TMP1]], <2 x i32> @@ -176,14 +176,14 @@ return vdupq_laneq_p64(vec, 1); } -// CHECK-LABEL: define <2 x i64> @test_vcombine_p64(<1 x i64> %low, <1 x i64> %high) #1 { +// CHECK-LABEL: define frozen <2 x i64> @test_vcombine_p64(<1 x i64> frozen %low, <1 x i64> frozen %high) #1 { // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <1 x i64> %low, <1 x i64> %high, <2 x i32> // CHECK: ret <2 x i64> [[SHUFFLE_I]] poly64x2_t test_vcombine_p64(poly64x1_t low, poly64x1_t high) { return vcombine_p64(low, high); } -// CHECK-LABEL: define <1 x i64> @test_vld1_p64(i64* %ptr) #0 { +// CHECK-LABEL: define frozen <1 x i64> @test_vld1_p64(i64* frozen %ptr) #0 { // CHECK: [[TMP0:%.*]] = bitcast i64* %ptr to i8* // CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to <1 x i64>* // CHECK: [[TMP2:%.*]] = load <1 x i64>, <1 x i64>* [[TMP1]] @@ -192,7 +192,7 @@ return vld1_p64(ptr); } -// CHECK-LABEL: define <2 x i64> @test_vld1q_p64(i64* %ptr) #1 { +// CHECK-LABEL: define frozen <2 x i64> @test_vld1q_p64(i64* frozen %ptr) #1 { // CHECK: [[TMP0:%.*]] = bitcast i64* %ptr to i8* // CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to <2 x i64>* // CHECK: [[TMP2:%.*]] = load <2 x i64>, <2 x i64>* [[TMP1]] @@ -201,7 +201,7 @@ return vld1q_p64(ptr); } -// CHECK-LABEL: define void @test_vst1_p64(i64* %ptr, <1 x i64> %val) #0 { +// CHECK-LABEL: define void @test_vst1_p64(i64* frozen %ptr, <1 x i64> frozen %val) #0 { // CHECK: [[TMP0:%.*]] = bitcast i64* %ptr to i8* // CHECK: [[TMP1:%.*]] = bitcast <1 x i64> %val to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast i8* [[TMP0]] to <1 x i64>* @@ -212,7 +212,7 @@ return vst1_p64(ptr, val); } -// CHECK-LABEL: define void @test_vst1q_p64(i64* %ptr, <2 x i64> %val) #1 { +// CHECK-LABEL: define void @test_vst1q_p64(i64* frozen %ptr, <2 x i64> frozen %val) #1 { // CHECK: [[TMP0:%.*]] = bitcast i64* %ptr to i8* // CHECK: [[TMP1:%.*]] = bitcast <2 x i64> %val to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast i8* [[TMP0]] to <2 x i64>* @@ -223,7 +223,7 @@ return vst1q_p64(ptr, val); } -// CHECK-LABEL: define %struct.poly64x1x2_t @test_vld2_p64(i64* %ptr) #2 { +// CHECK-LABEL: define %struct.poly64x1x2_t @test_vld2_p64(i64* frozen %ptr) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.poly64x1x2_t, align 8 // CHECK: [[__RET:%.*]] = alloca %struct.poly64x1x2_t, align 8 // CHECK: [[TMP0:%.*]] = bitcast %struct.poly64x1x2_t* [[__RET]] to i8* @@ -241,7 +241,7 @@ return vld2_p64(ptr); } -// CHECK-LABEL: define %struct.poly64x2x2_t @test_vld2q_p64(i64* %ptr) #2 { +// CHECK-LABEL: define %struct.poly64x2x2_t @test_vld2q_p64(i64* frozen %ptr) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.poly64x2x2_t, align 16 // CHECK: [[__RET:%.*]] = alloca %struct.poly64x2x2_t, align 16 // CHECK: [[TMP0:%.*]] = bitcast %struct.poly64x2x2_t* [[__RET]] to i8* @@ -259,7 +259,7 @@ return vld2q_p64(ptr); } -// CHECK-LABEL: define %struct.poly64x1x3_t @test_vld3_p64(i64* %ptr) #2 { +// CHECK-LABEL: define %struct.poly64x1x3_t @test_vld3_p64(i64* frozen %ptr) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.poly64x1x3_t, align 8 // CHECK: [[__RET:%.*]] = alloca %struct.poly64x1x3_t, align 8 // CHECK: [[TMP0:%.*]] = bitcast %struct.poly64x1x3_t* [[__RET]] to i8* @@ -277,7 +277,7 @@ return vld3_p64(ptr); } -// CHECK-LABEL: define %struct.poly64x2x3_t @test_vld3q_p64(i64* %ptr) #2 { +// CHECK-LABEL: define %struct.poly64x2x3_t @test_vld3q_p64(i64* frozen %ptr) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.poly64x2x3_t, align 16 // CHECK: [[__RET:%.*]] = alloca %struct.poly64x2x3_t, align 16 // CHECK: [[TMP0:%.*]] = bitcast %struct.poly64x2x3_t* [[__RET]] to i8* @@ -295,7 +295,7 @@ return vld3q_p64(ptr); } -// CHECK-LABEL: define %struct.poly64x1x4_t @test_vld4_p64(i64* %ptr) #2 { +// CHECK-LABEL: define %struct.poly64x1x4_t @test_vld4_p64(i64* frozen %ptr) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.poly64x1x4_t, align 8 // CHECK: [[__RET:%.*]] = alloca %struct.poly64x1x4_t, align 8 // CHECK: [[TMP0:%.*]] = bitcast %struct.poly64x1x4_t* [[__RET]] to i8* @@ -313,7 +313,7 @@ return vld4_p64(ptr); } -// CHECK-LABEL: define %struct.poly64x2x4_t @test_vld4q_p64(i64* %ptr) #2 { +// CHECK-LABEL: define %struct.poly64x2x4_t @test_vld4q_p64(i64* frozen %ptr) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.poly64x2x4_t, align 16 // CHECK: [[__RET:%.*]] = alloca %struct.poly64x2x4_t, align 16 // CHECK: [[TMP0:%.*]] = bitcast %struct.poly64x2x4_t* [[__RET]] to i8* @@ -331,7 +331,7 @@ return vld4q_p64(ptr); } -// CHECK-LABEL: define void @test_vst2_p64(i64* %ptr, [2 x <1 x i64>] %val.coerce) #2 { +// CHECK-LABEL: define void @test_vst2_p64(i64* frozen %ptr, [2 x <1 x i64>] %val.coerce) #2 { // CHECK: [[VAL:%.*]] = alloca %struct.poly64x1x2_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.poly64x1x2_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly64x1x2_t, %struct.poly64x1x2_t* [[VAL]], i32 0, i32 0 @@ -356,7 +356,7 @@ return vst2_p64(ptr, val); } -// CHECK-LABEL: define void @test_vst2q_p64(i64* %ptr, [2 x <2 x i64>] %val.coerce) #2 { +// CHECK-LABEL: define void @test_vst2q_p64(i64* frozen %ptr, [2 x <2 x i64>] %val.coerce) #2 { // CHECK: [[VAL:%.*]] = alloca %struct.poly64x2x2_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.poly64x2x2_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly64x2x2_t, %struct.poly64x2x2_t* [[VAL]], i32 0, i32 0 @@ -381,7 +381,7 @@ return vst2q_p64(ptr, val); } -// CHECK-LABEL: define void @test_vst3_p64(i64* %ptr, [3 x <1 x i64>] %val.coerce) #2 { +// CHECK-LABEL: define void @test_vst3_p64(i64* frozen %ptr, [3 x <1 x i64>] %val.coerce) #2 { // CHECK: [[VAL:%.*]] = alloca %struct.poly64x1x3_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.poly64x1x3_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly64x1x3_t, %struct.poly64x1x3_t* [[VAL]], i32 0, i32 0 @@ -411,7 +411,7 @@ return vst3_p64(ptr, val); } -// CHECK-LABEL: define void @test_vst3q_p64(i64* %ptr, [3 x <2 x i64>] %val.coerce) #2 { +// CHECK-LABEL: define void @test_vst3q_p64(i64* frozen %ptr, [3 x <2 x i64>] %val.coerce) #2 { // CHECK: [[VAL:%.*]] = alloca %struct.poly64x2x3_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.poly64x2x3_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly64x2x3_t, %struct.poly64x2x3_t* [[VAL]], i32 0, i32 0 @@ -441,7 +441,7 @@ return vst3q_p64(ptr, val); } -// CHECK-LABEL: define void @test_vst4_p64(i64* %ptr, [4 x <1 x i64>] %val.coerce) #2 { +// CHECK-LABEL: define void @test_vst4_p64(i64* frozen %ptr, [4 x <1 x i64>] %val.coerce) #2 { // CHECK: [[VAL:%.*]] = alloca %struct.poly64x1x4_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.poly64x1x4_t, align 8 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly64x1x4_t, %struct.poly64x1x4_t* [[VAL]], i32 0, i32 0 @@ -476,7 +476,7 @@ return vst4_p64(ptr, val); } -// CHECK-LABEL: define void @test_vst4q_p64(i64* %ptr, [4 x <2 x i64>] %val.coerce) #2 { +// CHECK-LABEL: define void @test_vst4q_p64(i64* frozen %ptr, [4 x <2 x i64>] %val.coerce) #2 { // CHECK: [[VAL:%.*]] = alloca %struct.poly64x2x4_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.poly64x2x4_t, align 16 // CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly64x2x4_t, %struct.poly64x2x4_t* [[VAL]], i32 0, i32 0 @@ -511,7 +511,7 @@ return vst4q_p64(ptr, val); } -// CHECK-LABEL: define <1 x i64> @test_vext_p64(<1 x i64> %a, <1 x i64> %b) #0 { +// CHECK-LABEL: define frozen <1 x i64> @test_vext_p64(<1 x i64> frozen %a, <1 x i64> frozen %b) #0 { // CHECK: [[TMP0:%.*]] = bitcast <1 x i64> %a to <8 x i8> // CHECK: [[TMP1:%.*]] = bitcast <1 x i64> %b to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x i64> @@ -523,7 +523,7 @@ } -// CHECK-LABEL: define <2 x i64> @test_vextq_p64(<2 x i64> %a, <2 x i64> %b) #1 { +// CHECK-LABEL: define frozen <2 x i64> @test_vextq_p64(<2 x i64> frozen %a, <2 x i64> frozen %b) #1 { // CHECK: [[TMP0:%.*]] = bitcast <2 x i64> %a to <16 x i8> // CHECK: [[TMP1:%.*]] = bitcast <2 x i64> %b to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64> @@ -534,49 +534,49 @@ return vextq_p64(a, b, 1); } -// CHECK-LABEL: define <2 x i64> @test_vzip1q_p64(<2 x i64> %a, <2 x i64> %b) #1 { +// CHECK-LABEL: define frozen <2 x i64> @test_vzip1q_p64(<2 x i64> frozen %a, <2 x i64> frozen %b) #1 { // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> // CHECK: ret <2 x i64> [[SHUFFLE_I]] poly64x2_t test_vzip1q_p64(poly64x2_t a, poly64x2_t b) { return vzip1q_p64(a, b); } -// CHECK-LABEL: define <2 x i64> @test_vzip2q_p64(<2 x i64> %a, <2 x i64> %b) #1 { +// CHECK-LABEL: define frozen <2 x i64> @test_vzip2q_p64(<2 x i64> frozen %a, <2 x i64> frozen %b) #1 { // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> // CHECK: ret <2 x i64> [[SHUFFLE_I]] poly64x2_t test_vzip2q_p64(poly64x2_t a, poly64x2_t b) { return vzip2q_u64(a, b); } -// CHECK-LABEL: define <2 x i64> @test_vuzp1q_p64(<2 x i64> %a, <2 x i64> %b) #1 { +// CHECK-LABEL: define frozen <2 x i64> @test_vuzp1q_p64(<2 x i64> frozen %a, <2 x i64> frozen %b) #1 { // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> // CHECK: ret <2 x i64> [[SHUFFLE_I]] poly64x2_t test_vuzp1q_p64(poly64x2_t a, poly64x2_t b) { return vuzp1q_p64(a, b); } -// CHECK-LABEL: define <2 x i64> @test_vuzp2q_p64(<2 x i64> %a, <2 x i64> %b) #1 { +// CHECK-LABEL: define frozen <2 x i64> @test_vuzp2q_p64(<2 x i64> frozen %a, <2 x i64> frozen %b) #1 { // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> // CHECK: ret <2 x i64> [[SHUFFLE_I]] poly64x2_t test_vuzp2q_p64(poly64x2_t a, poly64x2_t b) { return vuzp2q_u64(a, b); } -// CHECK-LABEL: define <2 x i64> @test_vtrn1q_p64(<2 x i64> %a, <2 x i64> %b) #1 { +// CHECK-LABEL: define frozen <2 x i64> @test_vtrn1q_p64(<2 x i64> frozen %a, <2 x i64> frozen %b) #1 { // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> // CHECK: ret <2 x i64> [[SHUFFLE_I]] poly64x2_t test_vtrn1q_p64(poly64x2_t a, poly64x2_t b) { return vtrn1q_p64(a, b); } -// CHECK-LABEL: define <2 x i64> @test_vtrn2q_p64(<2 x i64> %a, <2 x i64> %b) #1 { +// CHECK-LABEL: define frozen <2 x i64> @test_vtrn2q_p64(<2 x i64> frozen %a, <2 x i64> frozen %b) #1 { // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> // CHECK: ret <2 x i64> [[SHUFFLE_I]] poly64x2_t test_vtrn2q_p64(poly64x2_t a, poly64x2_t b) { return vtrn2q_u64(a, b); } -// CHECK-LABEL: define <1 x i64> @test_vsri_n_p64(<1 x i64> %a, <1 x i64> %b) #0 { +// CHECK-LABEL: define frozen <1 x i64> @test_vsri_n_p64(<1 x i64> frozen %a, <1 x i64> frozen %b) #0 { // CHECK: [[TMP0:%.*]] = bitcast <1 x i64> %a to <8 x i8> // CHECK: [[TMP1:%.*]] = bitcast <1 x i64> %b to <8 x i8> // CHECK: [[VSRI_N:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x i64> @@ -587,7 +587,7 @@ return vsri_n_p64(a, b, 33); } -// CHECK-LABEL: define <2 x i64> @test_vsriq_n_p64(<2 x i64> %a, <2 x i64> %b) #1 { +// CHECK-LABEL: define frozen <2 x i64> @test_vsriq_n_p64(<2 x i64> frozen %a, <2 x i64> frozen %b) #1 { // CHECK: [[TMP0:%.*]] = bitcast <2 x i64> %a to <16 x i8> // CHECK: [[TMP1:%.*]] = bitcast <2 x i64> %b to <16 x i8> // CHECK: [[VSRI_N:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64> diff --git a/clang/test/CodeGen/aarch64-varargs-ms.c b/clang/test/CodeGen/aarch64-varargs-ms.c --- a/clang/test/CodeGen/aarch64-varargs-ms.c +++ b/clang/test/CodeGen/aarch64-varargs-ms.c @@ -3,7 +3,7 @@ #include int simple_int(va_list ap) { -// CHECK-LABEL: define dso_local i32 @simple_int +// CHECK-LABEL: define dso_local frozen i32 @simple_int return va_arg(ap, int); // CHECK: [[ADDR:%[a-z_0-9]+]] = bitcast i8* %argp.cur to i32* // CHECK: [[RESULT:%[a-z_0-9]+]] = load i32, i32* [[ADDR]] diff --git a/clang/test/CodeGen/aarch64-varargs.c b/clang/test/CodeGen/aarch64-varargs.c --- a/clang/test/CodeGen/aarch64-varargs.c +++ b/clang/test/CodeGen/aarch64-varargs.c @@ -9,7 +9,7 @@ va_list the_list; int simple_int(void) { -// CHECK-LABEL: define i32 @simple_int +// CHECK-LABEL: define frozen i32 @simple_int return va_arg(the_list, int); // CHECK: [[GR_OFFS:%[a-z_0-9]+]] = load i32, i32* getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 3) // CHECK: [[EARLY_ONSTACK:%[a-z_0-9]+]] = icmp sge i32 [[GR_OFFS]], 0 @@ -45,7 +45,7 @@ } __int128 aligned_int(void) { -// CHECK-LABEL: define i128 @aligned_int +// CHECK-LABEL: define frozen i128 @aligned_int return va_arg(the_list, __int128); // CHECK: [[GR_OFFS:%[a-z_0-9]+]] = load i32, i32* getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 3) // CHECK: [[EARLY_ONSTACK:%[a-z_0-9]+]] = icmp sge i32 [[GR_OFFS]], 0 @@ -156,7 +156,7 @@ } double simple_double(void) { -// CHECK-LABEL: define double @simple_double +// CHECK-LABEL: define frozen double @simple_double return va_arg(the_list, double); // CHECK: [[VR_OFFS:%[a-z_0-9]+]] = load i32, i32* getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 4) // CHECK: [[EARLY_ONSTACK:%[a-z_0-9]+]] = icmp sge i32 [[VR_OFFS]], 0 @@ -241,7 +241,7 @@ typedef int underaligned_int __attribute__((packed,aligned(2))); underaligned_int underaligned_int_test() { -// CHECK-LABEL: define i32 @underaligned_int_test() +// CHECK-LABEL: define frozen i32 @underaligned_int_test() return va_arg(the_list, underaligned_int); // CHECK: [[GR_OFFS:%[a-z_0-9]+]] = load i32, i32* getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 3) // CHECK: [[EARLY_ONSTACK:%[a-z_0-9]+]] = icmp sge i32 [[GR_OFFS]], 0 @@ -278,7 +278,7 @@ typedef int overaligned_int __attribute__((aligned(32))); overaligned_int overaligned_int_test() { -// CHECK-LABEL: define i32 @overaligned_int_test() +// CHECK-LABEL: define frozen i32 @overaligned_int_test() return va_arg(the_list, overaligned_int); // CHECK: [[GR_OFFS:%[a-z_0-9]+]] = load i32, i32* getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 3) // CHECK: [[EARLY_ONSTACK:%[a-z_0-9]+]] = icmp sge i32 [[GR_OFFS]], 0 @@ -315,7 +315,7 @@ typedef long long underaligned_long_long __attribute__((packed,aligned(2))); underaligned_long_long underaligned_long_long_test() { -// CHECK-LABEL: define i64 @underaligned_long_long_test() +// CHECK-LABEL: define frozen i64 @underaligned_long_long_test() return va_arg(the_list, underaligned_long_long); // CHECK: [[GR_OFFS:%[a-z_0-9]+]] = load i32, i32* getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 3) // CHECK: [[EARLY_ONSTACK:%[a-z_0-9]+]] = icmp sge i32 [[GR_OFFS]], 0 @@ -348,7 +348,7 @@ typedef long long overaligned_long_long __attribute__((aligned(32))); overaligned_long_long overaligned_long_long_test() { -// CHECK-LABEL: define i64 @overaligned_long_long_test() +// CHECK-LABEL: define frozen i64 @overaligned_long_long_test() return va_arg(the_list, overaligned_long_long); // CHECK: [[GR_OFFS:%[a-z_0-9]+]] = load i32, i32* getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 3) // CHECK: [[EARLY_ONSTACK:%[a-z_0-9]+]] = icmp sge i32 [[GR_OFFS]], 0 @@ -381,7 +381,7 @@ typedef __int128 underaligned_int128 __attribute__((packed,aligned(2))); underaligned_int128 underaligned_int128_test() { -// CHECK-LABEL: define i128 @underaligned_int128_test() +// CHECK-LABEL: define frozen i128 @underaligned_int128_test() return va_arg(the_list, underaligned_int128); // CHECK: [[GR_OFFS:%[a-z_0-9]+]] = load i32, i32* getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 3) // CHECK: [[EARLY_ONSTACK:%[a-z_0-9]+]] = icmp sge i32 [[GR_OFFS]], 0 @@ -420,7 +420,7 @@ typedef __int128 overaligned_int128 __attribute__((aligned(32))); overaligned_int128 overaligned_int128_test() { -// CHECK-LABEL: define i128 @overaligned_int128_test() +// CHECK-LABEL: define frozen i128 @overaligned_int128_test() return va_arg(the_list, overaligned_int128); // CHECK: [[GR_OFFS:%[a-z_0-9]+]] = load i32, i32* getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 3) // CHECK: [[EARLY_ONSTACK:%[a-z_0-9]+]] = icmp sge i32 [[GR_OFFS]], 0 @@ -883,7 +883,7 @@ } void check_start(int n, ...) { -// CHECK-LABEL: define void @check_start(i32 %n, ...) +// CHECK-LABEL: define void @check_start(i32 frozen %n, ...) va_list the_list; va_start(the_list, n); diff --git a/clang/test/CodeGen/address-space-avr.c b/clang/test/CodeGen/address-space-avr.c --- a/clang/test/CodeGen/address-space-avr.c +++ b/clang/test/CodeGen/address-space-avr.c @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -triple avr -emit-llvm < %s | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args -triple avr -emit-llvm < %s | FileCheck %s // Test that function declarations in nonzero address spaces without prototype // are called correctly. diff --git a/clang/test/CodeGen/address-space-field1.c b/clang/test/CodeGen/address-space-field1.c --- a/clang/test/CodeGen/address-space-field1.c +++ b/clang/test/CodeGen/address-space-field1.c @@ -1,6 +1,6 @@ // RUN: %clang_cc1 -emit-llvm -triple x86_64-apple-darwin10 < %s -o - | FileCheck %s // CHECK:%struct.S = type { i32, i32 } -// CHECK:define void @test_addrspace(%struct.S addrspace(1)* %p1, %struct.S addrspace(2)* %p2) [[NUW:#[0-9]+]] +// CHECK:define void @test_addrspace(%struct.S addrspace(1)* frozen %p1, %struct.S addrspace(2)* frozen %p2) [[NUW:#[0-9]+]] // CHECK: [[p1addr:%.*]] = alloca %struct.S addrspace(1)* // CHECK: [[p2addr:%.*]] = alloca %struct.S addrspace(2)* // CHECK: store %struct.S addrspace(1)* %p1, %struct.S addrspace(1)** [[p1addr]] diff --git a/clang/test/CodeGen/address-space.c b/clang/test/CodeGen/address-space.c --- a/clang/test/CodeGen/address-space.c +++ b/clang/test/CodeGen/address-space.c @@ -10,11 +10,11 @@ // CHECK: @a = global int a __attribute__((address_space(0))); -// CHECK-LABEL: define i32 @test1() +// CHECK-LABEL: define frozen i32 @test1() // CHECK: load i32, i32 addrspace(1)* @foo int test1() { return foo; } -// CHECK-LABEL: define i32 @test2(i32 %i) +// CHECK-LABEL: define frozen i32 @test2(i32 frozen %i) // CHECK: load i32, i32 addrspace(1)* // CHECK-NEXT: ret i32 int test2(int i) { return ban[i]; } diff --git a/clang/test/CodeGen/aggregate-assign-call.c b/clang/test/CodeGen/aggregate-assign-call.c --- a/clang/test/CodeGen/aggregate-assign-call.c +++ b/clang/test/CodeGen/aggregate-assign-call.c @@ -62,8 +62,8 @@ // O1-NEWPM: %[[TMP3:.*]] = bitcast %struct.S* %[[TMP2_ALLOCA]] to i8* // O1-NEWPM: call void @llvm.lifetime.end.p0i8({{[^,]*}}, i8* nonnull %[[P]]) // - // O1-LEGACY: call void @foo_int(%struct.S* sret align 4 %[[TMP1_ALLOCA]], - // O1-NEWPM: call void @foo_int(%struct.S* nonnull sret align 4 %[[TMP1_ALLOCA]], + // O1-LEGACY: call void @foo_int(%struct.S* sret align 4 %[[TMP1_ALLOCA]] + // O1-NEWPM: call void @foo_int(%struct.S* nonnull sret align 4 %[[TMP1_ALLOCA]] // O1: call void @llvm.memcpy // O1-LEGACY: %[[P:[^ ]+]] = bitcast %struct.S* %[[TMP1_ALLOCA]] to i8* // O1-LEGACY: call void @llvm.lifetime.end.p0i8({{[^,]*}}, i8* %[[P]]) @@ -71,8 +71,8 @@ // O1-LEGACY: %[[P:[^ ]+]] = bitcast %struct.S* %[[TMP2_ALLOCA]] to i8* // O1-LEGACY: call void @llvm.lifetime.start.p0i8({{[^,]*}}, i8* %[[P]]) // O1-NEWPM: call void @llvm.lifetime.start.p0i8({{[^,]*}}, i8* nonnull %[[TMP3]]) - // O1-LEGACY: call void @foo_int(%struct.S* sret align 4 %[[TMP2_ALLOCA]], - // O1-NEWPM: call void @foo_int(%struct.S* nonnull sret align 4 %[[TMP2_ALLOCA]], + // O1-LEGACY: call void @foo_int(%struct.S* sret align 4 %[[TMP2_ALLOCA]] + // O1-NEWPM: call void @foo_int(%struct.S* nonnull sret align 4 %[[TMP2_ALLOCA]] // O1: call void @llvm.memcpy // O1-LEGACY: %[[P:[^ ]+]] = bitcast %struct.S* %[[TMP2_ALLOCA]] to i8* // O1-LEGACY: call void @llvm.lifetime.end.p0i8({{[^,]*}}, i8* %[[P]]) diff --git a/clang/test/CodeGen/aix-return.c b/clang/test/CodeGen/aix-return.c --- a/clang/test/CodeGen/aix-return.c +++ b/clang/test/CodeGen/aix-return.c @@ -7,27 +7,27 @@ // AIX-LABEL: define void @retVoid() void retVoid(void) {} -// AIX-LABEL: define signext i8 @retChar(i8 signext %x) +// AIX-LABEL: define frozen signext i8 @retChar(i8 frozen signext %x) char retChar(char x) { return x; } -// AIX-LABEL: define signext i16 @retShort(i16 signext %x) +// AIX-LABEL: define frozen signext i16 @retShort(i16 frozen signext %x) short retShort(short x) { return x; } -// AIX32-LABEL: define i32 @retInt(i32 %x) -// AIX64-LABEL: define signext i32 @retInt(i32 signext %x) +// AIX32-LABEL: define frozen i32 @retInt(i32 frozen %x) +// AIX64-LABEL: define frozen signext i32 @retInt(i32 frozen signext %x) int retInt(int x) { return 1; } -// AIX-LABEL: define i64 @retLongLong(i64 %x) +// AIX-LABEL: define frozen i64 @retLongLong(i64 frozen %x) long long retLongLong(long long x) { return x; } -// AIX-LABEL: define signext i8 @retEnumChar(i8 signext %x) +// AIX-LABEL: define frozen signext i8 @retEnumChar(i8 frozen signext %x) enum EnumChar : char { IsChar }; enum EnumChar retEnumChar(enum EnumChar x) { return x; } -// AIX32-LABEL: define i32 @retEnumInt(i32 %x) -// AIX64-LABEL: define signext i32 @retEnumInt(i32 signext %x) +// AIX32-LABEL: define frozen i32 @retEnumInt(i32 frozen %x) +// AIX64-LABEL: define frozen signext i32 @retEnumInt(i32 frozen signext %x) enum EnumInt : int { IsInt }; enum EnumInt retEnumInt(enum EnumInt x) { return x; diff --git a/clang/test/CodeGen/aix-struct-arg.c b/clang/test/CodeGen/aix-struct-arg.c --- a/clang/test/CodeGen/aix-struct-arg.c +++ b/clang/test/CodeGen/aix-struct-arg.c @@ -38,52 +38,52 @@ vector signed int vsi; } StructVector; -// AIX32-LABEL: define void @arg0(%struct.Zero* byval(%struct.Zero) align 4 %x) -// AIX64-LABEL: define void @arg0(%struct.Zero* byval(%struct.Zero) align 8 %x) +// AIX32-LABEL: define void @arg0(%struct.Zero* frozen byval(%struct.Zero) align 4 %x) +// AIX64-LABEL: define void @arg0(%struct.Zero* frozen byval(%struct.Zero) align 8 %x) void arg0(Zero x) {} -// AIX32-LABEL: define void @arg1(%struct.One* byval(%struct.One) align 4 %x) -// AIX64-LABEL: define void @arg1(%struct.One* byval(%struct.One) align 8 %x) +// AIX32-LABEL: define void @arg1(%struct.One* frozen byval(%struct.One) align 4 %x) +// AIX64-LABEL: define void @arg1(%struct.One* frozen byval(%struct.One) align 8 %x) void arg1(One x) {} -// AIX32-LABEL: define void @arg2(%struct.Two* byval(%struct.Two) align 4 %x) -// AIX64-LABEL: define void @arg2(%struct.Two* byval(%struct.Two) align 8 %x) +// AIX32-LABEL: define void @arg2(%struct.Two* frozen byval(%struct.Two) align 4 %x) +// AIX64-LABEL: define void @arg2(%struct.Two* frozen byval(%struct.Two) align 8 %x) void arg2(Two x) {} -// AIX32-LABEL: define void @arg3(%struct.Three* byval(%struct.Three) align 4 %x) -// AIX64-LABEL: define void @arg3(%struct.Three* byval(%struct.Three) align 8 %x) +// AIX32-LABEL: define void @arg3(%struct.Three* frozen byval(%struct.Three) align 4 %x) +// AIX64-LABEL: define void @arg3(%struct.Three* frozen byval(%struct.Three) align 8 %x) void arg3(Three x) {} -// AIX32-LABEL: define void @arg4(%struct.Four* byval(%struct.Four) align 4 %x) -// AIX64-LABEL: define void @arg4(%struct.Four* byval(%struct.Four) align 8 %x) +// AIX32-LABEL: define void @arg4(%struct.Four* frozen byval(%struct.Four) align 4 %x) +// AIX64-LABEL: define void @arg4(%struct.Four* frozen byval(%struct.Four) align 8 %x) void arg4(Four x) {} -// AIX32-LABEL: define void @arg5(%struct.Five* byval(%struct.Five) align 4 %x) -// AIX64-LABEL: define void @arg5(%struct.Five* byval(%struct.Five) align 8 %x) +// AIX32-LABEL: define void @arg5(%struct.Five* frozen byval(%struct.Five) align 4 %x) +// AIX64-LABEL: define void @arg5(%struct.Five* frozen byval(%struct.Five) align 8 %x) void arg5(Five x) {} -// AIX32-LABEL: define void @arg6(%struct.Six* byval(%struct.Six) align 4 %x) -// AIX64-LABEL: define void @arg6(%struct.Six* byval(%struct.Six) align 8 %x) +// AIX32-LABEL: define void @arg6(%struct.Six* frozen byval(%struct.Six) align 4 %x) +// AIX64-LABEL: define void @arg6(%struct.Six* frozen byval(%struct.Six) align 8 %x) void arg6(Six x) {} -// AIX32-LABEL: define void @arg7(%struct.Seven* byval(%struct.Seven) align 4 %x) -// AIX64-LABEL: define void @arg7(%struct.Seven* byval(%struct.Seven) align 8 %x) +// AIX32-LABEL: define void @arg7(%struct.Seven* frozen byval(%struct.Seven) align 4 %x) +// AIX64-LABEL: define void @arg7(%struct.Seven* frozen byval(%struct.Seven) align 8 %x) void arg7(Seven x) {} -// AIX32-LABEL: define void @arg8(%struct.Eight* byval(%struct.Eight) align 4 %0) +// AIX32-LABEL: define void @arg8(%struct.Eight* frozen byval(%struct.Eight) align 4 %0) // AIX32: %x = alloca %struct.Eight, align 8 // AIX32: call void @llvm.memcpy.p0i8.p0i8.i32 -// AIX64-LABEL: define void @arg8(%struct.Eight* byval(%struct.Eight) align 8 %x) +// AIX64-LABEL: define void @arg8(%struct.Eight* frozen byval(%struct.Eight) align 8 %x) void arg8(Eight x) {} -// AIX32-LABEL: define void @arg9(%struct.OverAligned* byval(%struct.OverAligned) align 4 %0) +// AIX32-LABEL: define void @arg9(%struct.OverAligned* frozen byval(%struct.OverAligned) align 4 %0) // AIX32: %x = alloca %struct.OverAligned, align 32 // AIX32: call void @llvm.memcpy.p0i8.p0i8.i32 -// AIX64-LABEL: define void @arg9(%struct.OverAligned* byval(%struct.OverAligned) align 8 %0) +// AIX64-LABEL: define void @arg9(%struct.OverAligned* frozen byval(%struct.OverAligned) align 8 %0) // AIX64: %x = alloca %struct.OverAligned, align 32 // AIX64: call void @llvm.memcpy.p0i8.p0i8.i64 void arg9(OverAligned x) {} -// AIX32-LABEL: define void @arg10(%struct.StructVector* byval(%struct.StructVector) align 16 %x) -// AIX64-LABEL: define void @arg10(%struct.StructVector* byval(%struct.StructVector) align 16 %x) +// AIX32-LABEL: define void @arg10(%struct.StructVector* frozen byval(%struct.StructVector) align 16 %x) +// AIX64-LABEL: define void @arg10(%struct.StructVector* frozen byval(%struct.StructVector) align 16 %x) void arg10(StructVector x) {} diff --git a/clang/test/CodeGen/aix-vaargs.c b/clang/test/CodeGen/aix-vaargs.c --- a/clang/test/CodeGen/aix-vaargs.c +++ b/clang/test/CodeGen/aix-vaargs.c @@ -19,8 +19,8 @@ __builtin_va_end(ap); } -// AIX32: define void @testva(i32 %n, ...) -// AIX64: define void @testva(i32 signext %n, ...) +// AIX32: define void @testva(i32 frozen %n, ...) +// AIX64: define void @testva(i32 frozen signext %n, ...) // CHECK-NEXT: entry: // CHECK-NEXT: %n.addr = alloca i32, align 4 diff --git a/clang/test/CodeGen/alias.c b/clang/test/CodeGen/alias.c --- a/clang/test/CodeGen/alias.c +++ b/clang/test/CodeGen/alias.c @@ -57,7 +57,7 @@ // Make sure that aliases cause referenced values to be emitted. // PR3200 static inline int foo1() { return 0; } -// CHECKBASIC-LABEL: define internal i32 @foo1() +// CHECKBASIC-LABEL: define internal frozen i32 @foo1() int foo() __attribute__((alias("foo1"))); int bar() __attribute__((alias("bar1"))); @@ -72,16 +72,16 @@ extern __typeof(inner) inner_a __attribute__((alias("inner"))); static __typeof(inner_weak) inner_weak_a __attribute__((weakref, alias("inner_weak"))); // CHECKCC: @inner_a = alias i32 (i32), i32 (i32)* @inner -// CHECKCC: define internal arm_aapcs_vfpcc i32 @inner(i32 %a) [[NUW:#[0-9]+]] { +// CHECKCC: define internal arm_aapcs_vfpcc frozen i32 @inner(i32 frozen %a) [[NUW:#[0-9]+]] { int outer(int a) { return inner(a); } -// CHECKCC: define arm_aapcs_vfpcc i32 @outer(i32 %a) [[NUW]] { -// CHECKCC: call arm_aapcs_vfpcc i32 @inner(i32 %{{.*}}) +// CHECKCC: define arm_aapcs_vfpcc frozen i32 @outer(i32 frozen %a) [[NUW]] { +// CHECKCC: call arm_aapcs_vfpcc frozen i32 @inner(i32 frozen %{{.*}}) int outer_weak(int a) { return inner_weak_a(a); } -// CHECKCC: define arm_aapcs_vfpcc i32 @outer_weak(i32 %a) [[NUW]] { -// CHECKCC: call arm_aapcs_vfpcc i32 @inner_weak(i32 %{{.*}}) -// CHECKCC: define internal arm_aapcs_vfpcc i32 @inner_weak(i32 %a) [[NUW]] { +// CHECKCC: define arm_aapcs_vfpcc frozen i32 @outer_weak(i32 frozen %a) [[NUW]] { +// CHECKCC: call arm_aapcs_vfpcc frozen i32 @inner_weak(i32 frozen %{{.*}}) +// CHECKCC: define internal arm_aapcs_vfpcc frozen i32 @inner_weak(i32 frozen %a) [[NUW]] { // CHECKBASIC: attributes [[NUW]] = { noinline nounwind{{.*}} } diff --git a/clang/test/CodeGen/align-param.c b/clang/test/CodeGen/align-param.c --- a/clang/test/CodeGen/align-param.c +++ b/clang/test/CodeGen/align-param.c @@ -5,7 +5,7 @@ int test (long long x) { return (int)x; } -// CHECK-LABEL: define i32 @test +// CHECK-LABEL: define frozen i32 @test // CHECK: alloca i64, align 8 @@ -14,5 +14,5 @@ int test2(struct X x __attribute((aligned(16)))) { return x.z; } -// CHECK-LABEL: define i32 @test2 +// CHECK-LABEL: define frozen i32 @test2 // CHECK: alloca %struct.X, align 16 diff --git a/clang/test/CodeGen/align_value.cpp b/clang/test/CodeGen/align_value.cpp --- a/clang/test/CodeGen/align_value.cpp +++ b/clang/test/CodeGen/align_value.cpp @@ -4,7 +4,7 @@ void foo(aligned_double x, double * y __attribute__((align_value(32))), double & z __attribute__((align_value(128)))) { }; -// CHECK: define void @_Z3fooPdS_Rd(double* align 64 %x, double* align 32 %y, double* nonnull align 128 dereferenceable(8) %z) +// CHECK: define void @_Z3fooPdS_Rd(double* frozen align 64 %x, double* frozen align 32 %y, double* frozen nonnull align 128 dereferenceable(8) %z) struct ad_struct { aligned_double a; diff --git a/clang/test/CodeGen/alloc-align-attr.c b/clang/test/CodeGen/alloc-align-attr.c --- a/clang/test/CodeGen/alloc-align-attr.c +++ b/clang/test/CodeGen/alloc-align-attr.c @@ -1,12 +1,12 @@ -// RUN: %clang_cc1 -triple x86_64-pc-linux -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args -triple x86_64-pc-linux -emit-llvm -o - %s | FileCheck %s __INT32_TYPE__*m1(__INT32_TYPE__ i) __attribute__((alloc_align(1))); // Condition where parameter to m1 is not size_t. __INT32_TYPE__ test1(__INT32_TYPE__ a) { -// CHECK: define i32 @test1 +// CHECK: define frozen i32 @test1 return *m1(a); -// CHECK: call i32* @m1(i32 [[PARAM1:%[^\)]+]]) +// CHECK: call frozen i32* @m1(i32 [[PARAM1:%[^\)]+]]) // CHECK: [[ALIGNCAST1:%.+]] = zext i32 [[PARAM1]] to i64 // CHECK: [[MASK1:%.+]] = sub i64 [[ALIGNCAST1]], 1 // CHECK: [[PTRINT1:%.+]] = ptrtoint @@ -16,10 +16,10 @@ } // Condition where test2 param needs casting. __INT32_TYPE__ test2(__SIZE_TYPE__ a) { -// CHECK: define i32 @test2 +// CHECK: define frozen i32 @test2 return *m1(a); // CHECK: [[CONV2:%.+]] = trunc i64 %{{.+}} to i32 -// CHECK: call i32* @m1(i32 [[CONV2]]) +// CHECK: call frozen i32* @m1(i32 [[CONV2]]) // CHECK: [[ALIGNCAST2:%.+]] = zext i32 [[CONV2]] to i64 // CHECK: [[MASK2:%.+]] = sub i64 [[ALIGNCAST2]], 1 // CHECK: [[PTRINT2:%.+]] = ptrtoint @@ -31,10 +31,10 @@ // test3 param needs casting, but 'm2' is correct. __INT32_TYPE__ test3(__INT32_TYPE__ a) { -// CHECK: define i32 @test3 +// CHECK: define frozen i32 @test3 return *m2(a); // CHECK: [[CONV3:%.+]] = sext i32 %{{.+}} to i64 -// CHECK: call i32* @m2(i64 [[CONV3]]) +// CHECK: call frozen i32* @m2(i64 [[CONV3]]) // CHECK: [[MASK3:%.+]] = sub i64 [[CONV3]], 1 // CHECK: [[PTRINT3:%.+]] = ptrtoint // CHECK: [[MASKEDPTR3:%.+]] = and i64 [[PTRINT3]], [[MASK3]] @@ -44,9 +44,9 @@ // Every type matches, canonical example. __INT32_TYPE__ test4(__SIZE_TYPE__ a) { -// CHECK: define i32 @test4 +// CHECK: define frozen i32 @test4 return *m2(a); -// CHECK: call i32* @m2(i64 [[PARAM4:%[^\)]+]]) +// CHECK: call frozen i32* @m2(i64 [[PARAM4:%[^\)]+]]) // CHECK: [[MASK4:%.+]] = sub i64 [[PARAM4]], 1 // CHECK: [[PTRINT4:%.+]] = ptrtoint // CHECK: [[MASKEDPTR4:%.+]] = and i64 [[PTRINT4]], [[MASK4]] @@ -61,10 +61,10 @@ // Truncation to i64 is permissible, since alignments of greater than 2^64 are insane. __INT32_TYPE__ *m3(struct Empty s, __int128_t i) __attribute__((alloc_align(2))); __INT32_TYPE__ test5(__int128_t a) { -// CHECK: define i32 @test5 +// CHECK: define frozen i32 @test5 struct Empty e; return *m3(e, a); -// CHECK: call i32* @m3(i64 %{{.*}}, i64 %{{.*}}) +// CHECK: call frozen i32* @m3(i64 %{{.*}}, i64 %{{.*}}) // CHECK: [[ALIGNCAST5:%.+]] = trunc i128 %{{.*}} to i64 // CHECK: [[MASK5:%.+]] = sub i64 [[ALIGNCAST5]], 1 // CHECK: [[PTRINT5:%.+]] = ptrtoint @@ -75,10 +75,10 @@ // Struct parameter takes up 2 parameters, 'i' takes up 2. __INT32_TYPE__ *m4(struct MultiArgs s, __int128_t i) __attribute__((alloc_align(2))); __INT32_TYPE__ test6(__int128_t a) { -// CHECK: define i32 @test6 +// CHECK: define frozen i32 @test6 struct MultiArgs e; return *m4(e, a); -// CHECK: call i32* @m4(i64 %{{.*}}, i64 %{{.*}}, i64 %{{.*}}) +// CHECK: call frozen i32* @m4(i64 %{{.*}}, i64 %{{.*}}, i64 %{{.*}}) // CHECK: [[ALIGNCAST6:%.+]] = trunc i128 %{{.*}} to i64 // CHECK: [[MASK6:%.+]] = sub i64 [[ALIGNCAST6]], 1 // CHECK: [[PTRINT6:%.+]] = ptrtoint diff --git a/clang/test/CodeGen/arc/arguments.c b/clang/test/CodeGen/arc/arguments.c --- a/clang/test/CodeGen/arc/arguments.c +++ b/clang/test/CodeGen/arc/arguments.c @@ -3,7 +3,7 @@ // Basic argument tests for ARC. -// CHECK: define void @f0(i32 inreg %i, i32 inreg %j, i64 inreg %k) +// CHECK: define void @f0(i32 frozen inreg %i, i32 frozen inreg %j, i64 frozen inreg %k) void f0(int i, long j, long long k) {} typedef struct { @@ -38,13 +38,13 @@ return foo; } -// CHECK: define void @f4(i64 inreg %i) +// CHECK: define void @f4(i64 frozen inreg %i) void f4(long long i) {} -// CHECK: define void @f5(i8 inreg signext %a, i16 inreg signext %b) +// CHECK: define void @f5(i8 frozen inreg signext %a, i16 frozen inreg signext %b) void f5(signed char a, short b) {} -// CHECK: define void @f6(i8 inreg zeroext %a, i16 inreg zeroext %b) +// CHECK: define void @f6(i8 frozen inreg zeroext %a, i16 frozen inreg zeroext %b) void f6(unsigned char a, unsigned short b) {} enum my_enum { @@ -53,14 +53,14 @@ ENUM3, }; // Enums should be treated as the underlying i32. -// CHECK: define void @f7(i32 inreg %a) +// CHECK: define void @f7(i32 frozen inreg %a) void f7(enum my_enum a) {} enum my_big_enum { ENUM4 = 0xFFFFFFFFFFFFFFFF, }; // Big enums should be treated as the underlying i64. -// CHECK: define void @f8(i64 inreg %a) +// CHECK: define void @f8(i64 frozen inreg %a) void f8(enum my_big_enum a) {} union simple_union { @@ -80,32 +80,32 @@ // CHECK: define void @f10(i32 inreg %bf1.coerce) void f10(bitfield1 bf1) {} -// CHECK: define inreg { float, float } @cplx1(float inreg %r) +// CHECK: define frozen inreg { float, float } @cplx1(float frozen inreg %r) _Complex float cplx1(float r) { return r + 2.0fi; } -// CHECK: define inreg { double, double } @cplx2(double inreg %r) +// CHECK: define frozen inreg { double, double } @cplx2(double frozen inreg %r) _Complex double cplx2(double r) { return r + 2.0i; } -// CHECK: define inreg { i32, i32 } @cplx3(i32 inreg %r) +// CHECK: define frozen inreg { i32, i32 } @cplx3(i32 frozen inreg %r) _Complex int cplx3(int r) { return r + 2i; } -// CHECK: define inreg { i64, i64 } @cplx4(i64 inreg %r) +// CHECK: define frozen inreg { i64, i64 } @cplx4(i64 frozen inreg %r) _Complex long long cplx4(long long r) { return r + 2i; } -// CHECK: define inreg { i8, i8 } @cplx6(i8 inreg signext %r) +// CHECK: define frozen inreg { i8, i8 } @cplx6(i8 frozen inreg signext %r) _Complex signed char cplx6(signed char r) { return r + 2i; } -// CHECK: define inreg { i16, i16 } @cplx7(i16 inreg signext %r) +// CHECK: define frozen inreg { i16, i16 } @cplx7(i16 frozen inreg signext %r) _Complex short cplx7(short r) { return r + 2i; } @@ -128,7 +128,7 @@ // 1 sret + 1 i32 + 2*(i32 coerce) + 4*(i32 coerce) + 1 byval s16 st4(int x, s8 a, s16 b, s16 c) { return b; } -// CHECK: define void @st4(%struct.s16* noalias sret align 4 %agg.result, i32 inreg %x, i32 inreg %a.coerce0, i32 inreg %a.coerce1, i32 inreg %b.coerce0, i32 inreg %b.coerce1, i32 inreg %b.coerce2, i32 inreg %b.coerce3, { i32, i32, i32, i32 } %c.coerce) +// CHECK: define void @st4(%struct.s16* noalias sret align 4 %agg.result, i32 frozen inreg %x, i32 inreg %a.coerce0, i32 inreg %a.coerce1, i32 inreg %b.coerce0, i32 inreg %b.coerce1, i32 inreg %b.coerce2, i32 inreg %b.coerce3, { i32, i32, i32, i32 } %c.coerce) // 1 sret + 2*(i32 coerce) + 4*(i32 coerce) + 4*(i32 coerce) s16 st5(s8 a, s16 b, s16 c) { return b; } diff --git a/clang/test/CodeGen/arc/struct-align.c b/clang/test/CodeGen/arc/struct-align.c --- a/clang/test/CodeGen/arc/struct-align.c +++ b/clang/test/CodeGen/arc/struct-align.c @@ -8,7 +8,7 @@ double bb; } s1; -// CHECK: define i32 @f1 +// CHECK: define frozen i32 @f1 // CHECK: ret i32 12 int f1() { return sizeof(s1); @@ -18,7 +18,7 @@ int aa; long long bb; } s2; -// CHECK: define i32 @f2 +// CHECK: define frozen i32 @f2 // CHECK: ret i32 12 int f2() { return sizeof(s2); diff --git a/clang/test/CodeGen/arm-aapcs-vfp.c b/clang/test/CodeGen/arm-aapcs-vfp.c --- a/clang/test/CodeGen/arm-aapcs-vfp.c +++ b/clang/test/CodeGen/arm-aapcs-vfp.c @@ -1,19 +1,19 @@ // REQUIRES: arm-registered-target // REQUIRES: aarch64-registered-target -// RUN: %clang_cc1 -triple thumbv7-apple-darwin9 \ +// RUN: %clang_cc1 -disable-frozen-args -triple thumbv7-apple-darwin9 \ // RUN: -target-abi aapcs \ // RUN: -target-cpu cortex-a8 \ // RUN: -mfloat-abi hard \ // RUN: -ffreestanding \ // RUN: -emit-llvm -w -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple armv7-unknown-nacl-gnueabi \ +// RUN: %clang_cc1 -disable-frozen-args -triple armv7-unknown-nacl-gnueabi \ // RUN: -target-cpu cortex-a8 \ // RUN: -mfloat-abi hard \ // RUN: -ffreestanding \ // RUN: -emit-llvm -w -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple arm64-apple-darwin9 -target-feature +neon \ +// RUN: %clang_cc1 -disable-frozen-args -triple arm64-apple-darwin9 -target-feature +neon \ // RUN: -ffreestanding \ // RUN: -emit-llvm -w -o - %s | FileCheck -check-prefix=CHECK64 %s @@ -93,8 +93,8 @@ } // Neon multi-vector types are homogeneous aggregates. -// CHECK: define arm_aapcs_vfpcc <16 x i8> @f0(%struct.int8x16x4_t %{{.*}}) -// CHECK64: define <16 x i8> @f0([4 x <16 x i8>] %{{.*}}) +// CHECK: define arm_aapcs_vfpcc frozen <16 x i8> @f0(%struct.int8x16x4_t %{{.*}}) +// CHECK64: define frozen <16 x i8> @f0([4 x <16 x i8>] %{{.*}}) int8x16_t f0(int8x16x4_t v4) { return vaddq_s8(v4.val[0], v4.val[3]); } diff --git a/clang/test/CodeGen/arm-abi-vector.c b/clang/test/CodeGen/arm-abi-vector.c --- a/clang/test/CodeGen/arm-abi-vector.c +++ b/clang/test/CodeGen/arm-abi-vector.c @@ -1,6 +1,6 @@ -// RUN: %clang_cc1 -triple armv7-apple-darwin -target-abi aapcs -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple armv7-apple-darwin -target-abi apcs-gnu -emit-llvm -o - %s | FileCheck -check-prefix=APCS-GNU %s -// RUN: %clang_cc1 -triple arm-linux-androideabi -emit-llvm -o - %s | FileCheck -check-prefix=ANDROID %s +// RUN: %clang_cc1 -disable-frozen-args -triple armv7-apple-darwin -target-abi aapcs -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args -triple armv7-apple-darwin -target-abi apcs-gnu -emit-llvm -o - %s | FileCheck -check-prefix=APCS-GNU %s +// RUN: %clang_cc1 -disable-frozen-args -triple arm-linux-androideabi -emit-llvm -o - %s | FileCheck -check-prefix=ANDROID %s #include @@ -48,11 +48,11 @@ double test_2i(__int2 *in) { // CHECK: test_2i -// CHECK: call arm_aapcscc double (i32, ...) @varargs_vec_2i(i32 3, <2 x i32> {{%.*}}) +// CHECK: call arm_aapcscc frozen double (i32, ...) @varargs_vec_2i(i32 3, <2 x i32> {{%.*}}) // APCS-GNU: test_2i -// APCS-GNU: call double (i32, ...) @varargs_vec_2i(i32 3, <2 x i32> {{%.*}}) +// APCS-GNU: call frozen double (i32, ...) @varargs_vec_2i(i32 3, <2 x i32> {{%.*}}) // ANDROID: test_2i -// ANDROID: call double (i32, ...) @varargs_vec_2i(i32 3, <2 x i32> {{%.*}}) +// ANDROID: call frozen double (i32, ...) @varargs_vec_2i(i32 3, <2 x i32> {{%.*}}) return varargs_vec_2i(3, *in); } @@ -80,11 +80,11 @@ double test_3c(__char3 *in) { // CHECK: test_3c -// CHECK: call arm_aapcscc double (i32, ...) @varargs_vec_3c(i32 3, i32 {{%.*}}) +// CHECK: call arm_aapcscc frozen double (i32, ...) @varargs_vec_3c(i32 3, i32 {{%.*}}) // APCS-GNU: test_3c -// APCS-GNU: call double (i32, ...) @varargs_vec_3c(i32 3, i32 {{%.*}}) +// APCS-GNU: call frozen double (i32, ...) @varargs_vec_3c(i32 3, i32 {{%.*}}) // ANDROID: test_3c -// ANDROID: call double (i32, ...) @varargs_vec_3c(i32 3, <3 x i8> {{%.*}}) +// ANDROID: call frozen double (i32, ...) @varargs_vec_3c(i32 3, <3 x i8> {{%.*}}) return varargs_vec_3c(3, *in); } @@ -123,11 +123,11 @@ double test_5c(__char5 *in) { // CHECK: test_5c -// CHECK: call arm_aapcscc double (i32, ...) @varargs_vec_5c(i32 5, <2 x i32> {{%.*}}) +// CHECK: call arm_aapcscc frozen double (i32, ...) @varargs_vec_5c(i32 5, <2 x i32> {{%.*}}) // APCS-GNU: test_5c -// APCS-GNU: call double (i32, ...) @varargs_vec_5c(i32 5, <2 x i32> {{%.*}}) +// APCS-GNU: call frozen double (i32, ...) @varargs_vec_5c(i32 5, <2 x i32> {{%.*}}) // ANDROID: test_5c -// ANDROID: call double (i32, ...) @varargs_vec_5c(i32 5, <2 x i32> {{%.*}}) +// ANDROID: call frozen double (i32, ...) @varargs_vec_5c(i32 5, <2 x i32> {{%.*}}) return varargs_vec_5c(5, *in); } @@ -166,11 +166,11 @@ double test_9c(__char9 *in) { // CHECK: test_9c -// CHECK: call arm_aapcscc double (i32, ...) @varargs_vec_9c(i32 9, <4 x i32> {{%.*}}) +// CHECK: call arm_aapcscc frozen double (i32, ...) @varargs_vec_9c(i32 9, <4 x i32> {{%.*}}) // APCS-GNU: test_9c -// APCS-GNU: call double (i32, ...) @varargs_vec_9c(i32 9, <4 x i32> {{%.*}}) +// APCS-GNU: call frozen double (i32, ...) @varargs_vec_9c(i32 9, <4 x i32> {{%.*}}) // ANDROID: test_9c -// ANDROID: call double (i32, ...) @varargs_vec_9c(i32 9, <4 x i32> {{%.*}}) +// ANDROID: call frozen double (i32, ...) @varargs_vec_9c(i32 9, <4 x i32> {{%.*}}) return varargs_vec_9c(9, *in); } @@ -198,11 +198,11 @@ double test_19c(__char19 *in) { // CHECK: test_19c -// CHECK: call arm_aapcscc double (i32, ...) @varargs_vec_19c(i32 19, <19 x i8>* {{%.*}}) +// CHECK: call arm_aapcscc frozen double (i32, ...) @varargs_vec_19c(i32 19, <19 x i8>* {{%.*}}) // APCS-GNU: test_19c -// APCS-GNU: call double (i32, ...) @varargs_vec_19c(i32 19, <19 x i8>* {{%.*}}) +// APCS-GNU: call frozen double (i32, ...) @varargs_vec_19c(i32 19, <19 x i8>* {{%.*}}) // ANDROID: test_19c -// ANDROID: call double (i32, ...) @varargs_vec_19c(i32 19, <19 x i8>* {{%.*}}) +// ANDROID: call frozen double (i32, ...) @varargs_vec_19c(i32 19, <19 x i8>* {{%.*}}) return varargs_vec_19c(19, *in); } @@ -236,11 +236,11 @@ double test_3s(__short3 *in) { // CHECK: test_3s -// CHECK: call arm_aapcscc double (i32, ...) @varargs_vec_3s(i32 3, <2 x i32> {{%.*}}) +// CHECK: call arm_aapcscc frozen double (i32, ...) @varargs_vec_3s(i32 3, <2 x i32> {{%.*}}) // APCS-GNU: test_3s -// APCS-GNU: call double (i32, ...) @varargs_vec_3s(i32 3, <2 x i32> {{%.*}}) +// APCS-GNU: call frozen double (i32, ...) @varargs_vec_3s(i32 3, <2 x i32> {{%.*}}) // ANDROID: test_3s -// ANDROID: call double (i32, ...) @varargs_vec_3s(i32 3, <3 x i16> {{%.*}}) +// ANDROID: call frozen double (i32, ...) @varargs_vec_3s(i32 3, <3 x i16> {{%.*}}) return varargs_vec_3s(3, *in); } @@ -278,11 +278,11 @@ double test_5s(__short5 *in) { // CHECK: test_5s -// CHECK: call arm_aapcscc double (i32, ...) @varargs_vec_5s(i32 5, <4 x i32> {{%.*}}) +// CHECK: call arm_aapcscc frozen double (i32, ...) @varargs_vec_5s(i32 5, <4 x i32> {{%.*}}) // APCS-GNU: test_5s -// APCS-GNU: call double (i32, ...) @varargs_vec_5s(i32 5, <4 x i32> {{%.*}}) +// APCS-GNU: call frozen double (i32, ...) @varargs_vec_5s(i32 5, <4 x i32> {{%.*}}) // ANDROID: test_5s -// ANDROID: call double (i32, ...) @varargs_vec_5s(i32 5, <4 x i32> {{%.*}}) +// ANDROID: call frozen double (i32, ...) @varargs_vec_5s(i32 5, <4 x i32> {{%.*}}) return varargs_vec_5s(5, *in); } @@ -320,10 +320,10 @@ double test_struct(StructWithVec* d) { // CHECK: test_struct -// CHECK: call arm_aapcscc double (i32, ...) @varargs_struct(i32 3, [2 x i64] {{%.*}}) +// CHECK: call arm_aapcscc frozen double (i32, ...) @varargs_struct(i32 3, [2 x i64] {{%.*}}) // APCS-GNU: test_struct -// APCS-GNU: call double (i32, ...) @varargs_struct(i32 3, [2 x i64] {{%.*}}) +// APCS-GNU: call frozen double (i32, ...) @varargs_struct(i32 3, [2 x i64] {{%.*}}) // ANDROID: test_struct -// ANDROID: call double (i32, ...) @varargs_struct(i32 3, [2 x i64] {{%.*}}) +// ANDROID: call frozen double (i32, ...) @varargs_struct(i32 3, [2 x i64] {{%.*}}) return varargs_struct(3, *d); } diff --git a/clang/test/CodeGen/arm-arguments.c b/clang/test/CodeGen/arm-arguments.c --- a/clang/test/CodeGen/arm-arguments.c +++ b/clang/test/CodeGen/arm-arguments.c @@ -2,8 +2,8 @@ // RUN: %clang_cc1 -triple armv7-apple-darwin9 -target-feature +neon -target-abi apcs-gnu -emit-llvm -w -o - %s | FileCheck -check-prefix=APCS-GNU %s // RUN: %clang_cc1 -triple armv7-apple-darwin9 -target-feature +neon -target-abi aapcs -emit-llvm -w -o - %s | FileCheck -check-prefix=AAPCS %s -// APCS-GNU-LABEL: define signext i8 @f0() -// AAPCS-LABEL: define arm_aapcscc signext i8 @f0() +// APCS-GNU-LABEL: define frozen signext i8 @f0() +// AAPCS-LABEL: define arm_aapcscc frozen signext i8 @f0() char f0(void) { return 0; } @@ -121,14 +121,14 @@ struct s21 { struct {} f1; int f0 : 4; }; struct s21 f21(void) {} -// APCS-GNU-LABEL: define i16 @f22() -// APCS-GNU-LABEL: define i32 @f23() -// APCS-GNU-LABEL: define i64 @f24() -// APCS-GNU-LABEL: define i128 @f25() -// APCS-GNU-LABEL: define i64 @f26() -// APCS-GNU-LABEL: define i128 @f27() -// AAPCS-LABEL: define arm_aapcscc i16 @f22() -// AAPCS-LABEL: define arm_aapcscc i32 @f23() +// APCS-GNU-LABEL: define frozen i16 @f22() +// APCS-GNU-LABEL: define frozen i32 @f23() +// APCS-GNU-LABEL: define frozen i64 @f24() +// APCS-GNU-LABEL: define frozen i128 @f25() +// APCS-GNU-LABEL: define frozen i64 @f26() +// APCS-GNU-LABEL: define frozen i128 @f27() +// AAPCS-LABEL: define arm_aapcscc frozen i16 @f22() +// AAPCS-LABEL: define arm_aapcscc frozen i32 @f23() // AAPCS: define arm_aapcscc void @f24({{.*}} noalias sret // AAPCS: define arm_aapcscc void @f25({{.*}} noalias sret // AAPCS: define arm_aapcscc void @f26({{.*}} noalias sret @@ -176,14 +176,14 @@ // PR13350 struct s33 { char buf[32*32]; }; void f33(struct s33 s) { } -// APCS-GNU-LABEL: define void @f33(%struct.s33* byval(%struct.s33) align 4 %s) -// AAPCS-LABEL: define arm_aapcscc void @f33(%struct.s33* byval(%struct.s33) align 4 %s) +// APCS-GNU-LABEL: define void @f33(%struct.s33* frozen byval(%struct.s33) align 4 %s) +// AAPCS-LABEL: define arm_aapcscc void @f33(%struct.s33* frozen byval(%struct.s33) align 4 %s) // PR14048 struct s34 { char c; }; void f34(struct s34 s); void g34(struct s34 *s) { f34(*s); } -// AAPCS: @g34(%struct.s34* %s) +// AAPCS: @g34(%struct.s34* frozen %s) // AAPCS: %[[a:.*]] = alloca [1 x i32] // AAPCS: load [1 x i32], [1 x i32]* %[[a]] @@ -204,7 +204,7 @@ *(float32x4_t *)&s2); return v; } -// APCS-GNU-LABEL: define <4 x float> @f35(i32 %i, %struct.s35* byval(%struct.s35) align 4 %0, %struct.s35* byval(%struct.s35) align 4 %1) +// APCS-GNU-LABEL: define frozen <4 x float> @f35(i32 frozen %i, %struct.s35* frozen byval(%struct.s35) align 4 %0, %struct.s35* frozen byval(%struct.s35) align 4 %1) // APCS-GNU: %[[a:.*]] = alloca %struct.s35, align 16 // APCS-GNU: %[[b:.*]] = bitcast %struct.s35* %[[a]] to i8* // APCS-GNU: %[[c:.*]] = bitcast %struct.s35* %0 to i8* @@ -212,7 +212,7 @@ // APCS-GNU: %[[d:.*]] = bitcast %struct.s35* %[[a]] to <4 x float>* // APCS-GNU: load <4 x float>, <4 x float>* %[[d]], align 16 -// AAPCS-LABEL: define arm_aapcscc <4 x float> @f35(i32 %i, %struct.s35* byval(%struct.s35) align 4 %s1, %struct.s35* byval(%struct.s35) align 4 %s2) +// AAPCS-LABEL: define arm_aapcscc frozen <4 x float> @f35(i32 frozen %i, %struct.s35* frozen byval(%struct.s35) align 4 %s1, %struct.s35* frozen byval(%struct.s35) align 4 %s2) // AAPCS: %[[a_addr:.*]] = alloca <4 x float>, align 16 // AAPCS: %[[b_addr:.*]] = alloca <4 x float>, align 16 // AAPCS: %[[p1:.*]] = bitcast %struct.s35* %s1 to <4 x float>* diff --git a/clang/test/CodeGen/arm-bf16-params-returns.c b/clang/test/CodeGen/arm-bf16-params-returns.c --- a/clang/test/CodeGen/arm-bf16-params-returns.c +++ b/clang/test/CodeGen/arm-bf16-params-returns.c @@ -1,7 +1,7 @@ -// RUN: %clang_cc1 -triple armv8.6a-arm-none-eabi -target-abi aapcs -mfloat-abi hard -target-feature +bf16 -target-feature +neon -emit-llvm -O2 -o - %s | opt -S -mem2reg -sroa | FileCheck %s --check-prefix=CHECK32-HARD -// RUN: %clang_cc1 -triple aarch64-arm-none-eabi -target-abi aapcs -mfloat-abi hard -target-feature +bf16 -target-feature +neon -emit-llvm -O2 -o - %s | opt -S -mem2reg -sroa | FileCheck %s --check-prefix=CHECK64-HARD -// RUN: %clang_cc1 -triple armv8.6a-arm-none-eabi -target-abi aapcs -mfloat-abi softfp -target-feature +bf16 -target-feature +neon -emit-llvm -O2 -o - %s | opt -S -mem2reg -sroa | FileCheck %s --check-prefix=CHECK32-SOFTFP -// RUN: %clang_cc1 -triple aarch64-arm-none-eabi -target-abi aapcs -mfloat-abi softfp -target-feature +bf16 -target-feature +neon -emit-llvm -O2 -o - %s | opt -S -mem2reg -sroa | FileCheck %s --check-prefix=CHECK64-SOFTFP +// RUN: %clang_cc1 -disable-frozen-args -triple armv8.6a-arm-none-eabi -target-abi aapcs -mfloat-abi hard -target-feature +bf16 -target-feature +neon -emit-llvm -O2 -o - %s | opt -S -mem2reg -sroa | FileCheck %s --check-prefix=CHECK32-HARD +// RUN: %clang_cc1 -disable-frozen-args -triple aarch64-arm-none-eabi -target-abi aapcs -mfloat-abi hard -target-feature +bf16 -target-feature +neon -emit-llvm -O2 -o - %s | opt -S -mem2reg -sroa | FileCheck %s --check-prefix=CHECK64-HARD +// RUN: %clang_cc1 -disable-frozen-args -triple armv8.6a-arm-none-eabi -target-abi aapcs -mfloat-abi softfp -target-feature +bf16 -target-feature +neon -emit-llvm -O2 -o - %s | opt -S -mem2reg -sroa | FileCheck %s --check-prefix=CHECK32-SOFTFP +// RUN: %clang_cc1 -disable-frozen-args -triple aarch64-arm-none-eabi -target-abi aapcs -mfloat-abi softfp -target-feature +bf16 -target-feature +neon -emit-llvm -O2 -o - %s | opt -S -mem2reg -sroa | FileCheck %s --check-prefix=CHECK64-SOFTFP #include @@ -9,24 +9,24 @@ __bf16 test_ret_bf16(__bf16 v) { return v; } -// CHECK32-HARD: define arm_aapcs_vfpcc bfloat @test_ret_bf16(bfloat returned %v) {{.*}} { +// CHECK32-HARD: define arm_aapcs_vfpcc frozen bfloat @test_ret_bf16(bfloat returned %v) {{.*}} { // CHECK32-HARD: ret bfloat %v -// CHECK64-HARD: define bfloat @test_ret_bf16(bfloat returned %v) {{.*}} { +// CHECK64-HARD: define frozen bfloat @test_ret_bf16(bfloat returned %v) {{.*}} { // CHECK64-HARD: ret bfloat %v -// CHECK32-SOFTFP: define i32 @test_ret_bf16(i32 [[V0:.*]]) {{.*}} { +// CHECK32-SOFTFP: define frozen i32 @test_ret_bf16(i32 [[V0:.*]]) {{.*}} { // CHECK32-SOFTFP: %tmp2.0.insert.ext = and i32 [[V0]], 65535 // CHECK32-SOFTFP: ret i32 %tmp2.0.insert.ext -// CHECK64-SOFTFP: define bfloat @test_ret_bf16(bfloat returned %v) {{.*}} { +// CHECK64-SOFTFP: define frozen bfloat @test_ret_bf16(bfloat returned %v) {{.*}} { // CHECK64-SOFTFP: ret bfloat %v bfloat16x4_t test_ret_bf16x4_t(bfloat16x4_t v) { return v; } -// CHECK32-HARD: define arm_aapcs_vfpcc <4 x bfloat> @test_ret_bf16x4_t(<4 x bfloat> returned %v) {{.*}} { +// CHECK32-HARD: define arm_aapcs_vfpcc frozen <4 x bfloat> @test_ret_bf16x4_t(<4 x bfloat> returned %v) {{.*}} { // CHECK32-HARD: ret <4 x bfloat> %v -// CHECK64-HARD: define <4 x bfloat> @test_ret_bf16x4_t(<4 x bfloat> returned %v) {{.*}} { +// CHECK64-HARD: define frozen <4 x bfloat> @test_ret_bf16x4_t(<4 x bfloat> returned %v) {{.*}} { // CHECK64-HARD: ret <4 x bfloat> %v -// CHECK32-SOFTFP: define <2 x i32> @test_ret_bf16x4_t(<2 x i32> [[V0:.*]]) {{.*}} { +// CHECK32-SOFTFP: define frozen <2 x i32> @test_ret_bf16x4_t(<2 x i32> [[V0:.*]]) {{.*}} { // CHECK32-SOFTFP: ret <2 x i32> %v -// CHECK64-SOFTFP: define <4 x bfloat> @test_ret_bf16x4_t(<4 x bfloat> returned %v) {{.*}} { +// CHECK64-SOFTFP: define frozen <4 x bfloat> @test_ret_bf16x4_t(<4 x bfloat> returned %v) {{.*}} { // CHECK64-SOFTFP: ret <4 x bfloat> %v diff --git a/clang/test/CodeGen/arm-byval-align.c b/clang/test/CodeGen/arm-byval-align.c --- a/clang/test/CodeGen/arm-byval-align.c +++ b/clang/test/CodeGen/arm-byval-align.c @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -triple=armv7-none-eabi < %s -S -emit-llvm | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args -triple=armv7-none-eabi < %s -S -emit-llvm | FileCheck %s struct foo { long long a; diff --git a/clang/test/CodeGen/arm-cmse-attr.c b/clang/test/CodeGen/arm-cmse-attr.c --- a/clang/test/CodeGen/arm-cmse-attr.c +++ b/clang/test/CodeGen/arm-cmse-attr.c @@ -29,9 +29,9 @@ { } -// CHECK: define void @f1(void ()* nocapture %fptr) {{[^#]*}}#0 { +// CHECK: define void @f1(void ()* frozen nocapture %fptr) {{[^#]*}}#0 { // CHECK: call void %fptr() #2 -// CHECK: define void @f2(void ()* nocapture %fptr) {{[^#]*}}#0 { +// CHECK: define void @f2(void ()* frozen nocapture %fptr) {{[^#]*}}#0 { // CHECK: call void %fptr() #2 // CHECK: define void @f3() {{[^#]*}}#1 { // CHECK: define void @f4() {{[^#]*}}#1 { diff --git a/clang/test/CodeGen/arm-cmse-call.c b/clang/test/CodeGen/arm-cmse-call.c --- a/clang/test/CodeGen/arm-cmse-call.c +++ b/clang/test/CodeGen/arm-cmse-call.c @@ -40,7 +40,7 @@ p2(i); // CHECK: %[[#P2:]] = load {{.*}} @p2 -// CHECK: call void %[[#P2]](i32 %i) #[[#A2]] +// CHECK: call void %[[#P2]](i32 frozen %i) #[[#A2]] a0[i](); // CHECK: %[[EP0:.*]] = getelementptr {{.*}} @a0 @@ -70,7 +70,7 @@ b[i](i); // CHECK: %[[EP5:.*]] = getelementptr {{.*}} @b // CHECK: %[[#E5:]] = load {{.*}} %[[EP5]] -// CHECK: call void %[[#E5]](i32 %i) #[[#A2]] +// CHECK: call void %[[#E5]](i32 frozen %i) #[[#A2]] } // CHECK: attributes #[[#A1]] = { nounwind } diff --git a/clang/test/CodeGen/arm-float-helpers.c b/clang/test/CodeGen/arm-float-helpers.c --- a/clang/test/CodeGen/arm-float-helpers.c +++ b/clang/test/CodeGen/arm-float-helpers.c @@ -32,192 +32,192 @@ // other runtime functions such as the _Complex helper routines are not covered. float fadd(float a, float b) { return a + b; } -// CHECK-LABEL: define float @fadd(float %a, float %b) +// CHECK-LABEL: define frozen float @fadd(float frozen %a, float frozen %b) // CHECK-NOT: __aeabi_fadd // CHECK: %add = fadd float {{.*}}, {{.*}} float fdiv(float a, float b) { return a / b; } -// CHECK-LABEL: define float @fdiv(float %a, float %b) +// CHECK-LABEL: define frozen float @fdiv(float frozen %a, float frozen %b) // CHECK-NOT: __aeabi_fdiv // CHECK: %div = fdiv float {{.*}}, {{.*}} float fmul(float a, float b) { return a * b; } -// CHECK-LABEL: define float @fmul(float %a, float %b) +// CHECK-LABEL: define frozen float @fmul(float frozen %a, float frozen %b) // CHECK-NOT: __aeabi_fmul // CHECK: %mul = fmul float {{.*}}, {{.*}} float fsub(float a, float b) { return a - b; } -// CHECK-LABEL: define float @fsub(float %a, float %b) +// CHECK-LABEL: define frozen float @fsub(float frozen %a, float frozen %b) // CHECK-NOT: __aeabi_fsub // CHECK: %sub = fsub float {{.*}}, {{.*}} int fcmpeq(float a, float b) { return a == b; } -// CHECK-LABEL: define i32 @fcmpeq(float %a, float %b) +// CHECK-LABEL: define frozen i32 @fcmpeq(float frozen %a, float frozen %b) // CHECK-NOT: __aeabi_fcmpeq // CHECK: %cmp = fcmp oeq float {{.*}}, {{.*}} int fcmplt(float a, float b) { return a < b; } -// CHECK-LABEL: define i32 @fcmplt(float %a, float %b) +// CHECK-LABEL: define frozen i32 @fcmplt(float frozen %a, float frozen %b) // CHECK-NOT: __aeabi_fcmplt // CHECK: %cmp = fcmp olt float {{.*}}, {{.*}} int fcmple(float a, float b) { return a <= b; } -// CHECK-LABEL: define i32 @fcmple(float %a, float %b) +// CHECK-LABEL: define frozen i32 @fcmple(float frozen %a, float frozen %b) // CHECK-NOT: __aeabi_fcmple // CHECK: %cmp = fcmp ole float {{.*}}, {{.*}} int fcmpge(float a, float b) { return a >= b; } -// CHECK-LABEL: define i32 @fcmpge(float %a, float %b) +// CHECK-LABEL: define frozen i32 @fcmpge(float frozen %a, float frozen %b) // CHECK-NOT: __aeabi_fcmpge // CHECK: %cmp = fcmp oge float {{.*}}, {{.*}} int fcmpgt(float a, float b) { return a > b; } -// CHECK-LABEL: define i32 @fcmpgt(float %a, float %b) +// CHECK-LABEL: define frozen i32 @fcmpgt(float frozen %a, float frozen %b) // CHECK-NOT: __aeabi_fcmpgt // CHECK: %cmp = fcmp ogt float {{.*}}, {{.*}} int fcmpun(float a, float b) { return __builtin_isunordered(a, b); } -// CHECK-LABEL: define i32 @fcmpun(float %a, float %b) +// CHECK-LABEL: define frozen i32 @fcmpun(float frozen %a, float frozen %b) // CHECK-NOT: __aeabi_fcmpun // CHECK: %cmp = fcmp uno float {{.*}}, {{.*}} double dadd(double a, double b) { return a + b; } -// CHECK-LABEL: define double @dadd(double %a, double %b) +// CHECK-LABEL: define frozen double @dadd(double frozen %a, double frozen %b) // CHECK-NOT: __aeabi_dadd // CHECK: %add = fadd double {{.*}}, {{.*}} double ddiv(double a, double b) { return a / b; } -// CHECK-LABEL: define double @ddiv(double %a, double %b) +// CHECK-LABEL: define frozen double @ddiv(double frozen %a, double frozen %b) // CHECK-NOT: __aeabi_ddiv // CHECK: %div = fdiv double {{.*}}, {{.*}} double dmul(double a, double b) { return a * b; } -// CHECK-LABEL: define double @dmul(double %a, double %b) +// CHECK-LABEL: define frozen double @dmul(double frozen %a, double frozen %b) // CHECK-NOT: __aeabi_dmul // CHECK: %mul = fmul double {{.*}}, {{.*}} double dsub(double a, double b) { return a - b; } -// CHECK-LABEL: define double @dsub(double %a, double %b) +// CHECK-LABEL: define frozen double @dsub(double frozen %a, double frozen %b) // CHECK-NOT: __aeabi_dsub // CHECK: %sub = fsub double {{.*}}, {{.*}} int dcmpeq(double a, double b) { return a == b; } -// CHECK-LABEL: define i32 @dcmpeq(double %a, double %b) +// CHECK-LABEL: define frozen i32 @dcmpeq(double frozen %a, double frozen %b) // CHECK-NOT: __aeabi_dcmpeq // CHECK: %cmp = fcmp oeq double {{.*}}, {{.*}} int dcmplt(double a, double b) { return a < b; } -// CHECK-LABEL: define i32 @dcmplt(double %a, double %b) +// CHECK-LABEL: define frozen i32 @dcmplt(double frozen %a, double frozen %b) // CHECK-NOT: __aeabi_dcmplt // CHECK: %cmp = fcmp olt double {{.*}}, {{.*}} int dcmple(double a, double b) { return a <= b; } -// CHECK-LABEL: define i32 @dcmple(double %a, double %b) +// CHECK-LABEL: define frozen i32 @dcmple(double frozen %a, double frozen %b) // CHECK-NOT: __aeabi_dcmple // CHECK: %cmp = fcmp ole double {{.*}}, {{.*}} int dcmpge(double a, double b) { return a >= b; } -// CHECK-LABEL: define i32 @dcmpge(double %a, double %b) +// CHECK-LABEL: define frozen i32 @dcmpge(double frozen %a, double frozen %b) // CHECK-NOT: __aeabi_dcmpge // CHECK: %cmp = fcmp oge double {{.*}}, {{.*}} int dcmpgt(double a, double b) { return a > b; } -// CHECK-LABEL: define i32 @dcmpgt(double %a, double %b) +// CHECK-LABEL: define frozen i32 @dcmpgt(double frozen %a, double frozen %b) // CHECK-NOT: __aeabi_dcmpgt // CHECK: %cmp = fcmp ogt double {{.*}}, {{.*}} int dcmpun(double a, double b) { return __builtin_isunordered(a, b); } -// CHECK-LABEL: define i32 @dcmpun(double %a, double %b) +// CHECK-LABEL: define frozen i32 @dcmpun(double frozen %a, double frozen %b) // CHECK-NOT: __aeabi_dcmpun // CHECK: %cmp = fcmp uno double {{.*}}, {{.*}} int d2iz(double a) { return (int)a; } -// CHECK-LABEL: define i32 @d2iz(double %a) +// CHECK-LABEL: define frozen i32 @d2iz(double frozen %a) // CHECK-NOT: __aeabi_d2iz // CHECK: %conv = fptosi double {{.*}} to i32 unsigned int d2uiz(double a) { return (unsigned int)a; } -// CHECK-LABEL: define i32 @d2uiz(double %a) +// CHECK-LABEL: define frozen i32 @d2uiz(double frozen %a) // CHECK-NOT: __aeabi_d2uiz // CHECK: %conv = fptoui double {{.*}} to i32 long long d2lz(double a) { return (long long)a; } -// CHECK-LABEL: define i64 @d2lz(double %a) +// CHECK-LABEL: define frozen i64 @d2lz(double frozen %a) // CHECK-NOT: __aeabi_d2lz // CHECK: %conv = fptosi double {{.*}} to i64 unsigned long long d2ulz(double a) { return (unsigned long long)a; } -// CHECK-LABEL: define i64 @d2ulz(double %a) +// CHECK-LABEL: define frozen i64 @d2ulz(double frozen %a) // CHECK-NOT: __aeabi_d2ulz // CHECK: %conv = fptoui double {{.*}} to i64 int f2iz(float a) { return (int)a; } -// CHECK-LABEL: define i32 @f2iz(float %a) +// CHECK-LABEL: define frozen i32 @f2iz(float frozen %a) // CHECK-NOT: __aeabi_f2iz // CHECK: %conv = fptosi float {{.*}} to i32 unsigned int f2uiz(float a) { return (unsigned int)a; } -// CHECK-LABEL: define i32 @f2uiz(float %a) +// CHECK-LABEL: define frozen i32 @f2uiz(float frozen %a) // CHECK-NOT: __aeabi_f2uiz // CHECK: %conv = fptoui float {{.*}} to i32 long long f2lz(float a) { return (long long)a; } -// CHECK-LABEL: define i64 @f2lz(float %a) +// CHECK-LABEL: define frozen i64 @f2lz(float frozen %a) // CHECK-NOT: __aeabi_f2lz // CHECK: %conv = fptosi float {{.*}} to i64 unsigned long long f2ulz(float a) { return (unsigned long long)a; } -// CHECK-LABEL: define i64 @f2ulz(float %a) +// CHECK-LABEL: define frozen i64 @f2ulz(float frozen %a) // CHECK-NOT: __aeabi_f2ulz // CHECK: %conv = fptoui float {{.*}} to i64 float d2f(double a) { return (float)a; } -// CHECK-LABEL: define float @d2f(double %a) +// CHECK-LABEL: define frozen float @d2f(double frozen %a) // CHECK-NOT: __aeabi_d2f // CHECK: %conv = fptrunc double {{.*}} to float double f2d(float a) { return (double)a; } -// CHECK-LABEL: define double @f2d(float %a) +// CHECK-LABEL: define frozen double @f2d(float frozen %a) // CHECK-NOT: __aeabi_f2d // CHECK: %conv = fpext float {{.*}} to double double i2d(int a) { return (double)a; } -// CHECK-LABEL: define double @i2d(i32 %a) +// CHECK-LABEL: define frozen double @i2d(i32 frozen %a) // CHECK-NOT: __aeabi_i2d // CHECK: %conv = sitofp i32 {{.*}} to double double ui2d(unsigned int a) { return (double)a; } -// CHECK-LABEL: define double @ui2d(i32 %a) +// CHECK-LABEL: define frozen double @ui2d(i32 frozen %a) // CHECK-NOT: __aeabi_ui2d // CHECK: %conv = uitofp i32 {{.*}} to double double l2d(long long a) { return (double)a; } -// CHECK-LABEL: define double @l2d(i64 %a) +// CHECK-LABEL: define frozen double @l2d(i64 frozen %a) // CHECK-NOT: __aeabi_l2d // CHECK: %conv = sitofp i64 {{.*}} to double double ul2d(unsigned long long a) { return (unsigned long long)a; } -// CHECK-LABEL: define double @ul2d(i64 %a) +// CHECK-LABEL: define frozen double @ul2d(i64 frozen %a) // CHECK-NOT: __aeabi_ul2d // CHECK: %conv = uitofp i64 {{.*}} to double float i2f(int a) { return (int)a; } -// CHECK-LABEL: define float @i2f(i32 %a) +// CHECK-LABEL: define frozen float @i2f(i32 frozen %a) // CHECK-NOT: __aeabi_i2f // CHECK: %conv = sitofp i32 {{.*}} to float float ui2f(unsigned int a) { return (unsigned int)a; } -// CHECK-LABEL: define float @ui2f(i32 %a) +// CHECK-LABEL: define frozen float @ui2f(i32 frozen %a) // CHECK-NOT: __aeabi_ui2f // CHECK: %conv = uitofp i32 {{.*}} to float float l2f(long long a) { return (long long)a; } -// CHECK-LABEL: define float @l2f(i64 %a) +// CHECK-LABEL: define frozen float @l2f(i64 frozen %a) // CHECK-NOT: __aeabi_l2f // CHECK: %conv = sitofp i64 {{.*}} to float float ul2f(unsigned long long a) { return (unsigned long long)a; } -// CHECK-LABEL: define float @ul2f(i64 %a) +// CHECK-LABEL: define frozen float @ul2f(i64 frozen %a) // CHECK-NOT: __aeabi_ul2f // CHECK: %conv = uitofp i64 {{.*}} to float diff --git a/clang/test/CodeGen/arm-fp16-arguments.c b/clang/test/CodeGen/arm-fp16-arguments.c --- a/clang/test/CodeGen/arm-fp16-arguments.c +++ b/clang/test/CodeGen/arm-fp16-arguments.c @@ -1,6 +1,6 @@ -// RUN: %clang_cc1 -triple armv7a--none-eabi -target-abi aapcs -mfloat-abi soft -fallow-half-arguments-and-returns -emit-llvm -o - -O2 %s | FileCheck %s --check-prefix=CHECK --check-prefix=SOFT -// RUN: %clang_cc1 -triple armv7a--none-eabi -target-abi aapcs -mfloat-abi hard -fallow-half-arguments-and-returns -emit-llvm -o - -O2 %s | FileCheck %s --check-prefix=CHECK --check-prefix=HARD -// RUN: %clang_cc1 -triple armv7a--none-eabi -target-abi aapcs -mfloat-abi soft -fnative-half-arguments-and-returns -emit-llvm -o - -O2 %s | FileCheck %s --check-prefix=NATIVE +// RUN: %clang_cc1 -disable-frozen-args -triple armv7a--none-eabi -target-abi aapcs -mfloat-abi soft -fallow-half-arguments-and-returns -emit-llvm -o - -O2 %s | FileCheck %s --check-prefix=CHECK --check-prefix=SOFT +// RUN: %clang_cc1 -disable-frozen-args -triple armv7a--none-eabi -target-abi aapcs -mfloat-abi hard -fallow-half-arguments-and-returns -emit-llvm -o - -O2 %s | FileCheck %s --check-prefix=CHECK --check-prefix=HARD +// RUN: %clang_cc1 -disable-frozen-args -triple armv7a--none-eabi -target-abi aapcs -mfloat-abi soft -fnative-half-arguments-and-returns -emit-llvm -o - -O2 %s | FileCheck %s --check-prefix=NATIVE __fp16 g; @@ -15,9 +15,9 @@ // NATIVE: store half [[PARAM]], half* @g __fp16 t2() { return g; } -// SOFT: define i32 @t2() -// HARD: define arm_aapcs_vfpcc float @t2() -// NATIVE: define half @t2() +// SOFT: define frozen i32 @t2() +// HARD: define arm_aapcs_vfpcc frozen float @t2() +// NATIVE: define frozen half @t2() // CHECK: [[LOAD:%.*]] = load i16, i16* bitcast (half* @g to i16*) // CHECK: [[ZEXT:%.*]] = zext i16 [[LOAD]] to i32 // SOFT: ret i32 [[ZEXT]] @@ -39,9 +39,9 @@ // NATIVE: store half [[PARAM]], half* @h _Float16 t4() { return h; } -// SOFT: define i32 @t4() -// HARD: define arm_aapcs_vfpcc float @t4() -// NATIVE: define half @t4() +// SOFT: define frozen i32 @t4() +// HARD: define arm_aapcs_vfpcc frozen float @t4() +// NATIVE: define frozen half @t4() // CHECK: [[LOAD:%.*]] = load i16, i16* bitcast (half* @h to i16*) // CHECK: [[ZEXT:%.*]] = zext i16 [[LOAD]] to i32 // SOFT: ret i32 [[ZEXT]] diff --git a/clang/test/CodeGen/arm-homogenous.c b/clang/test/CodeGen/arm-homogenous.c --- a/clang/test/CodeGen/arm-homogenous.c +++ b/clang/test/CodeGen/arm-homogenous.c @@ -95,7 +95,7 @@ float a[4] = {1.0, 2.0, 3.0, 4.0}; takes_array_of_floats(a); } -// CHECK: declare arm_aapcs_vfpcc void @takes_array_of_floats(float*) +// CHECK: declare arm_aapcs_vfpcc void @takes_array_of_floats(float* frozen) /* Struct-type homogenous aggregate */ typedef struct { diff --git a/clang/test/CodeGen/arm-mangle-bf16.cpp b/clang/test/CodeGen/arm-mangle-bf16.cpp --- a/clang/test/CodeGen/arm-mangle-bf16.cpp +++ b/clang/test/CodeGen/arm-mangle-bf16.cpp @@ -1,6 +1,6 @@ -// RUN: %clang_cc1 -triple aarch64-arm-none-eabi -target-feature +bf16 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK64 -// RUN: %clang_cc1 -triple arm-arm-none-eabi -target-feature +bf16 -mfloat-abi hard -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK32-HARD -// RUN: %clang_cc1 -triple arm-arm-none-eabi -target-feature +bf16 -mfloat-abi softfp -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK32-SOFTFP +// RUN: %clang_cc1 -disable-frozen-args -triple aarch64-arm-none-eabi -target-feature +bf16 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK64 +// RUN: %clang_cc1 -disable-frozen-args -triple arm-arm-none-eabi -target-feature +bf16 -mfloat-abi hard -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK32-HARD +// RUN: %clang_cc1 -disable-frozen-args -triple arm-arm-none-eabi -target-feature +bf16 -mfloat-abi softfp -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK32-SOFTFP // CHECK64: define {{.*}}void @_Z3foou6__bf16(bfloat %b) // CHECK32-HARD: define {{.*}}void @_Z3foou6__bf16(bfloat %b) diff --git a/clang/test/CodeGen/arm-neon-directed-rounding.c b/clang/test/CodeGen/arm-neon-directed-rounding.c --- a/clang/test/CodeGen/arm-neon-directed-rounding.c +++ b/clang/test/CodeGen/arm-neon-directed-rounding.c @@ -7,7 +7,7 @@ #include -// CHECK-LABEL: define <2 x float> @test_vrnda_f32(<2 x float> %a) +// CHECK-LABEL: define frozen <2 x float> @test_vrnda_f32(<2 x float> frozen %a) // CHECK-A32: [[VRNDA_V1_I:%.*]] = call <2 x float> @llvm.arm.neon.vrinta.v2f32(<2 x float> %a) // CHECK-A64: [[VRNDA_V1_I:%.*]] = call <2 x float> @llvm.round.v2f32(<2 x float> %a) // CHECK: ret <2 x float> [[VRNDA_V1_I]] @@ -15,7 +15,7 @@ return vrnda_f32(a); } -// CHECK-LABEL: define <4 x float> @test_vrndaq_f32(<4 x float> %a) +// CHECK-LABEL: define frozen <4 x float> @test_vrndaq_f32(<4 x float> frozen %a) // CHECK-A32: [[VRNDAQ_V1_I:%.*]] = call <4 x float> @llvm.arm.neon.vrinta.v4f32(<4 x float> %a) // CHECK-A64: [[VRNDAQ_V1_I:%.*]] = call <4 x float> @llvm.round.v4f32(<4 x float> %a) // CHECK: ret <4 x float> [[VRNDAQ_V1_I]] @@ -23,7 +23,7 @@ return vrndaq_f32(a); } -// CHECK-LABEL: define <2 x float> @test_vrndm_f32(<2 x float> %a) +// CHECK-LABEL: define frozen <2 x float> @test_vrndm_f32(<2 x float> frozen %a) // CHECK-A32: [[VRNDM_V1_I:%.*]] = call <2 x float> @llvm.arm.neon.vrintm.v2f32(<2 x float> %a) // CHECK-A64: [[VRNDM_V1_I:%.*]] = call <2 x float> @llvm.floor.v2f32(<2 x float> %a) // CHECK: ret <2 x float> [[VRNDM_V1_I]] @@ -31,7 +31,7 @@ return vrndm_f32(a); } -// CHECK-LABEL: define <4 x float> @test_vrndmq_f32(<4 x float> %a) +// CHECK-LABEL: define frozen <4 x float> @test_vrndmq_f32(<4 x float> frozen %a) // CHECK-A32: [[VRNDMQ_V1_I:%.*]] = call <4 x float> @llvm.arm.neon.vrintm.v4f32(<4 x float> %a) // CHECK-A64: [[VRNDMQ_V1_I:%.*]] = call <4 x float> @llvm.floor.v4f32(<4 x float> %a) // CHECK: ret <4 x float> [[VRNDMQ_V1_I]] @@ -39,7 +39,7 @@ return vrndmq_f32(a); } -// CHECK-LABEL: define <2 x float> @test_vrndn_f32(<2 x float> %a) +// CHECK-LABEL: define frozen <2 x float> @test_vrndn_f32(<2 x float> frozen %a) // CHECK-A32: [[VRNDN_V1_I:%.*]] = call <2 x float> @llvm.arm.neon.vrintn.v2f32(<2 x float> %a) // CHECK-A64: [[VRNDN_V1_I:%.*]] = call <2 x float> @llvm.aarch64.neon.frintn.v2f32(<2 x float> %a) // CHECK: ret <2 x float> [[VRNDN_V1_I]] @@ -47,7 +47,7 @@ return vrndn_f32(a); } -// CHECK-LABEL: define <4 x float> @test_vrndnq_f32(<4 x float> %a) +// CHECK-LABEL: define frozen <4 x float> @test_vrndnq_f32(<4 x float> frozen %a) // CHECK-A32: [[VRNDNQ_V1_I:%.*]] = call <4 x float> @llvm.arm.neon.vrintn.v4f32(<4 x float> %a) // CHECK-A64: [[VRNDNQ_V1_I:%.*]] = call <4 x float> @llvm.aarch64.neon.frintn.v4f32(<4 x float> %a) // CHECK: ret <4 x float> [[VRNDNQ_V1_I]] @@ -55,7 +55,7 @@ return vrndnq_f32(a); } -// CHECK-LABEL: define <2 x float> @test_vrndp_f32(<2 x float> %a) +// CHECK-LABEL: define frozen <2 x float> @test_vrndp_f32(<2 x float> frozen %a) // CHECK-A32: [[VRNDP_V1_I:%.*]] = call <2 x float> @llvm.arm.neon.vrintp.v2f32(<2 x float> %a) // CHECK-A64: [[VRNDP_V1_I:%.*]] = call <2 x float> @llvm.ceil.v2f32(<2 x float> %a) // CHECK: ret <2 x float> [[VRNDP_V1_I]] @@ -63,7 +63,7 @@ return vrndp_f32(a); } -// CHECK-LABEL: define <4 x float> @test_vrndpq_f32(<4 x float> %a) +// CHECK-LABEL: define frozen <4 x float> @test_vrndpq_f32(<4 x float> frozen %a) // CHECK-A32: [[VRNDPQ_V1_I:%.*]] = call <4 x float> @llvm.arm.neon.vrintp.v4f32(<4 x float> %a) // CHECK-A64: [[VRNDPQ_V1_I:%.*]] = call <4 x float> @llvm.ceil.v4f32(<4 x float> %a) // CHECK: ret <4 x float> [[VRNDPQ_V1_I]] @@ -71,7 +71,7 @@ return vrndpq_f32(a); } -// CHECK-LABEL: define <2 x float> @test_vrndx_f32(<2 x float> %a) +// CHECK-LABEL: define frozen <2 x float> @test_vrndx_f32(<2 x float> frozen %a) // CHECK-A32: [[VRNDX_V1_I:%.*]] = call <2 x float> @llvm.arm.neon.vrintx.v2f32(<2 x float> %a) // CHECK-A64: [[VRNDX_V1_I:%.*]] = call <2 x float> @llvm.rint.v2f32(<2 x float> %a) // CHECK: ret <2 x float> [[VRNDX_V1_I]] @@ -79,7 +79,7 @@ return vrndx_f32(a); } -// CHECK-LABEL: define <4 x float> @test_vrndxq_f32(<4 x float> %a) +// CHECK-LABEL: define frozen <4 x float> @test_vrndxq_f32(<4 x float> frozen %a) // CHECK-A32: [[VRNDXQ_V1_I:%.*]] = call <4 x float> @llvm.arm.neon.vrintx.v4f32(<4 x float> %a) // CHECK-A64: [[VRNDXQ_V1_I:%.*]] = call <4 x float> @llvm.rint.v4f32(<4 x float> %a) // CHECK: ret <4 x float> [[VRNDXQ_V1_I]] @@ -87,7 +87,7 @@ return vrndxq_f32(a); } -// CHECK-LABEL: define <2 x float> @test_vrnd_f32(<2 x float> %a) +// CHECK-LABEL: define frozen <2 x float> @test_vrnd_f32(<2 x float> frozen %a) // CHECK-A32: [[VRND_V1_I:%.*]] = call <2 x float> @llvm.arm.neon.vrintz.v2f32(<2 x float> %a) // CHECK-A64: [[VRND_V1_I:%.*]] = call <2 x float> @llvm.trunc.v2f32(<2 x float> %a) // CHECK: ret <2 x float> [[VRND_V1_I]] @@ -95,7 +95,7 @@ return vrnd_f32(a); } -// CHECK-LABEL: define <4 x float> @test_vrndq_f32(<4 x float> %a) +// CHECK-LABEL: define frozen <4 x float> @test_vrndq_f32(<4 x float> frozen %a) // CHECK-A32: [[VRNDQ_V1_I:%.*]] = call <4 x float> @llvm.arm.neon.vrintz.v4f32(<4 x float> %a) // CHECK-A64: [[VRNDQ_V1_I:%.*]] = call <4 x float> @llvm.trunc.v4f32(<4 x float> %a) // CHECK: ret <4 x float> [[VRNDQ_V1_I]] @@ -103,7 +103,7 @@ return vrndq_f32(a); } -// CHECK-LABEL: define float @test_vrndns_f32(float %a) +// CHECK-LABEL: define frozen float @test_vrndns_f32(float frozen %a) // CHECK-A32: [[VRNDN_I:%.*]] = call float @llvm.arm.neon.vrintn.f32(float %a) // CHECK-A64: [[VRNDN_I:%.*]] = call float @llvm.aarch64.neon.frintn.f32(float %a) // CHECK: ret float [[VRNDN_I]] @@ -111,7 +111,7 @@ return vrndns_f32(a); } -// CHECK-LABEL: define <2 x float> @test_vrndi_f32(<2 x float> %a) +// CHECK-LABEL: define frozen <2 x float> @test_vrndi_f32(<2 x float> frozen %a) // CHECK: [[TMP0:%.*]] = bitcast <2 x float> %a to <8 x i8> // CHECK: [[VRNDI1_I:%.*]] = call <2 x float> @llvm.nearbyint.v2f32(<2 x float> %a) // CHECK: ret <2 x float> [[VRNDI1_I]] @@ -119,7 +119,7 @@ return vrndi_f32(a); } -// CHECK-LABEL: define <4 x float> @test_vrndiq_f32(<4 x float> %a) +// CHECK-LABEL: define frozen <4 x float> @test_vrndiq_f32(<4 x float> frozen %a) // CHECK: [[TMP0:%.*]] = bitcast <4 x float> %a to <16 x i8> // CHECK: [[VRNDI1_I:%.*]] = call <4 x float> @llvm.nearbyint.v4f32(<4 x float> %a) // CHECK: ret <4 x float> [[VRNDI1_I]] diff --git a/clang/test/CodeGen/arm-neon-dot-product.c b/clang/test/CodeGen/arm-neon-dot-product.c --- a/clang/test/CodeGen/arm-neon-dot-product.c +++ b/clang/test/CodeGen/arm-neon-dot-product.c @@ -8,35 +8,35 @@ #include uint32x2_t test_vdot_u32(uint32x2_t a, uint8x8_t b, uint8x8_t c) { -// CHECK-LABEL: define <2 x i32> @test_vdot_u32(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c) +// CHECK-LABEL: define frozen <2 x i32> @test_vdot_u32(<2 x i32> frozen %a, <8 x i8> frozen %b, <8 x i8> frozen %c) // CHECK: [[RESULT:%.*]] = call <2 x i32> @llvm.arm.neon.udot.v2i32.v8i8(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c) // CHECK: ret <2 x i32> [[RESULT]] return vdot_u32(a, b, c); } uint32x4_t test_vdotq_u32(uint32x4_t a, uint8x16_t b, uint8x16_t c) { -// CHECK-LABEL: define <4 x i32> @test_vdotq_u32(<4 x i32> %a, <16 x i8> %b, <16 x i8> %c) +// CHECK-LABEL: define frozen <4 x i32> @test_vdotq_u32(<4 x i32> frozen %a, <16 x i8> frozen %b, <16 x i8> frozen %c) // CHECK: [[RESULT:%.*]] = call <4 x i32> @llvm.arm.neon.udot.v4i32.v16i8(<4 x i32> %a, <16 x i8> %b, <16 x i8> %c) // CHECK: ret <4 x i32> [[RESULT]] return vdotq_u32(a, b, c); } int32x2_t test_vdot_s32(int32x2_t a, int8x8_t b, int8x8_t c) { -// CHECK-LABEL: define <2 x i32> @test_vdot_s32(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c) +// CHECK-LABEL: define frozen <2 x i32> @test_vdot_s32(<2 x i32> frozen %a, <8 x i8> frozen %b, <8 x i8> frozen %c) // CHECK: [[RESULT:%.*]] = call <2 x i32> @llvm.arm.neon.sdot.v2i32.v8i8(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c) // CHECK: ret <2 x i32> [[RESULT]] return vdot_s32(a, b, c); } int32x4_t test_vdotq_s32(int32x4_t a, int8x16_t b, int8x16_t c) { -// CHECK-LABEL: define <4 x i32> @test_vdotq_s32(<4 x i32> %a, <16 x i8> %b, <16 x i8> %c) +// CHECK-LABEL: define frozen <4 x i32> @test_vdotq_s32(<4 x i32> frozen %a, <16 x i8> frozen %b, <16 x i8> frozen %c) // CHECK: [[RESULT:%.*]] = call <4 x i32> @llvm.arm.neon.sdot.v4i32.v16i8(<4 x i32> %a, <16 x i8> %b, <16 x i8> %c) // CHECK: ret <4 x i32> [[RESULT]] return vdotq_s32(a, b, c); } uint32x2_t test_vdot_lane_u32(uint32x2_t a, uint8x8_t b, uint8x8_t c) { -// CHECK-LABEL: define <2 x i32> @test_vdot_lane_u32(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c) +// CHECK-LABEL: define frozen <2 x i32> @test_vdot_lane_u32(<2 x i32> frozen %a, <8 x i8> frozen %b, <8 x i8> frozen %c) // CHECK: [[CAST1:%.*]] = bitcast <8 x i8> %c to <2 x i32> // CHECK: [[SHUFFLE:%.*]] = shufflevector <2 x i32> [[CAST1]], <2 x i32> undef, <2 x i32> // CHECK: [[CAST2:%.*]] = bitcast <2 x i32> [[SHUFFLE]] to <8 x i8> @@ -46,7 +46,7 @@ } uint32x4_t test_vdotq_lane_u32(uint32x4_t a, uint8x16_t b, uint8x8_t c) { -// CHECK-LABEL: define <4 x i32> @test_vdotq_lane_u32(<4 x i32> %a, <16 x i8> %b, <8 x i8> %c) +// CHECK-LABEL: define frozen <4 x i32> @test_vdotq_lane_u32(<4 x i32> frozen %a, <16 x i8> frozen %b, <8 x i8> frozen %c) // CHECK: [[CAST1:%.*]] = bitcast <8 x i8> %c to <2 x i32> // CHECK: [[SHUFFLE:%.*]] = shufflevector <2 x i32> [[CAST1]], <2 x i32> undef, <4 x i32> // CHECK: [[CAST2:%.*]] = bitcast <4 x i32> [[SHUFFLE]] to <16 x i8> @@ -56,7 +56,7 @@ } int32x2_t test_vdot_lane_s32(int32x2_t a, int8x8_t b, int8x8_t c) { -// CHECK-LABEL: define <2 x i32> @test_vdot_lane_s32(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c) +// CHECK-LABEL: define frozen <2 x i32> @test_vdot_lane_s32(<2 x i32> frozen %a, <8 x i8> frozen %b, <8 x i8> frozen %c) // CHECK: [[CAST1:%.*]] = bitcast <8 x i8> %c to <2 x i32> // CHECK: [[SHUFFLE:%.*]] = shufflevector <2 x i32> [[CAST1]], <2 x i32> undef, <2 x i32> // CHECK: [[CAST2:%.*]] = bitcast <2 x i32> [[SHUFFLE]] to <8 x i8> @@ -66,7 +66,7 @@ } int32x4_t test_vdotq_lane_s32(int32x4_t a, int8x16_t b, int8x8_t c) { -// CHECK-LABEL: define <4 x i32> @test_vdotq_lane_s32(<4 x i32> %a, <16 x i8> %b, <8 x i8> %c) +// CHECK-LABEL: define frozen <4 x i32> @test_vdotq_lane_s32(<4 x i32> frozen %a, <16 x i8> frozen %b, <8 x i8> frozen %c) // CHECK: [[CAST1:%.*]] = bitcast <8 x i8> %c to <2 x i32> // CHECK: [[SHUFFLE:%.*]] = shufflevector <2 x i32> [[CAST1]], <2 x i32> undef, <4 x i32> // CHECK: [[CAST2:%.*]] = bitcast <4 x i32> [[SHUFFLE]] to <16 x i8> diff --git a/clang/test/CodeGen/arm-neon-fma.c b/clang/test/CodeGen/arm-neon-fma.c --- a/clang/test/CodeGen/arm-neon-fma.c +++ b/clang/test/CodeGen/arm-neon-fma.c @@ -7,21 +7,21 @@ #include -// CHECK-LABEL: define <2 x float> @test_fma_order(<2 x float> %accum, <2 x float> %lhs, <2 x float> %rhs) #0 { +// CHECK-LABEL: define frozen <2 x float> @test_fma_order(<2 x float> frozen %accum, <2 x float> frozen %lhs, <2 x float> frozen %rhs) #0 { // CHECK: [[TMP6:%.*]] = call <2 x float> @llvm.fma.v2f32(<2 x float> %lhs, <2 x float> %rhs, <2 x float> %accum) #3 // CHECK: ret <2 x float> [[TMP6]] float32x2_t test_fma_order(float32x2_t accum, float32x2_t lhs, float32x2_t rhs) { return vfma_f32(accum, lhs, rhs); } -// CHECK-LABEL: define <4 x float> @test_fmaq_order(<4 x float> %accum, <4 x float> %lhs, <4 x float> %rhs) #1 { +// CHECK-LABEL: define frozen <4 x float> @test_fmaq_order(<4 x float> frozen %accum, <4 x float> frozen %lhs, <4 x float> frozen %rhs) #1 { // CHECK: [[TMP6:%.*]] = call <4 x float> @llvm.fma.v4f32(<4 x float> %lhs, <4 x float> %rhs, <4 x float> %accum) #3 // CHECK: ret <4 x float> [[TMP6]] float32x4_t test_fmaq_order(float32x4_t accum, float32x4_t lhs, float32x4_t rhs) { return vfmaq_f32(accum, lhs, rhs); } -// CHECK-LABEL: define <2 x float> @test_vfma_n_f32(<2 x float> %a, <2 x float> %b, float %n) #0 { +// CHECK-LABEL: define frozen <2 x float> @test_vfma_n_f32(<2 x float> frozen %a, <2 x float> frozen %b, float frozen %n) #0 { // CHECK: [[VECINIT_I:%.*]] = insertelement <2 x float> undef, float %n, i32 0 // CHECK: [[VECINIT1_I:%.*]] = insertelement <2 x float> [[VECINIT_I]], float %n, i32 1 // CHECK: [[TMP1:%.*]] = bitcast <2 x float> %b to <8 x i8> @@ -32,7 +32,7 @@ return vfma_n_f32(a, b, n); } -// CHECK-LABEL: define <4 x float> @test_vfmaq_n_f32(<4 x float> %a, <4 x float> %b, float %n) #1 { +// CHECK-LABEL: define frozen <4 x float> @test_vfmaq_n_f32(<4 x float> frozen %a, <4 x float> frozen %b, float frozen %n) #1 { // CHECK: [[VECINIT_I:%.*]] = insertelement <4 x float> undef, float %n, i32 0 // CHECK: [[VECINIT1_I:%.*]] = insertelement <4 x float> [[VECINIT_I]], float %n, i32 1 // CHECK: [[VECINIT2_I:%.*]] = insertelement <4 x float> [[VECINIT1_I]], float %n, i32 2 diff --git a/clang/test/CodeGen/arm-neon-numeric-maxmin.c b/clang/test/CodeGen/arm-neon-numeric-maxmin.c --- a/clang/test/CodeGen/arm-neon-numeric-maxmin.c +++ b/clang/test/CodeGen/arm-neon-numeric-maxmin.c @@ -2,28 +2,28 @@ #include -// CHECK-LABEL: define <2 x float> @test_vmaxnm_f32(<2 x float> %a, <2 x float> %b) #0 { +// CHECK-LABEL: define frozen <2 x float> @test_vmaxnm_f32(<2 x float> frozen %a, <2 x float> frozen %b) #0 { // CHECK: [[VMAXNM_V2_I:%.*]] = call <2 x float> @llvm.arm.neon.vmaxnm.v2f32(<2 x float> %a, <2 x float> %b) #3 // CHECK: ret <2 x float> [[VMAXNM_V2_I]] float32x2_t test_vmaxnm_f32(float32x2_t a, float32x2_t b) { return vmaxnm_f32(a, b); } -// CHECK-LABEL: define <4 x float> @test_vmaxnmq_f32(<4 x float> %a, <4 x float> %b) #1 { +// CHECK-LABEL: define frozen <4 x float> @test_vmaxnmq_f32(<4 x float> frozen %a, <4 x float> frozen %b) #1 { // CHECK: [[VMAXNMQ_V2_I:%.*]] = call <4 x float> @llvm.arm.neon.vmaxnm.v4f32(<4 x float> %a, <4 x float> %b) #3 // CHECK: ret <4 x float> [[VMAXNMQ_V2_I]] float32x4_t test_vmaxnmq_f32(float32x4_t a, float32x4_t b) { return vmaxnmq_f32(a, b); } -// CHECK-LABEL: define <2 x float> @test_vminnm_f32(<2 x float> %a, <2 x float> %b) #0 { +// CHECK-LABEL: define frozen <2 x float> @test_vminnm_f32(<2 x float> frozen %a, <2 x float> frozen %b) #0 { // CHECK: [[VMINNM_V2_I:%.*]] = call <2 x float> @llvm.arm.neon.vminnm.v2f32(<2 x float> %a, <2 x float> %b) #3 // CHECK: ret <2 x float> [[VMINNM_V2_I]] float32x2_t test_vminnm_f32(float32x2_t a, float32x2_t b) { return vminnm_f32(a, b); } -// CHECK-LABEL: define <4 x float> @test_vminnmq_f32(<4 x float> %a, <4 x float> %b) #1 { +// CHECK-LABEL: define frozen <4 x float> @test_vminnmq_f32(<4 x float> frozen %a, <4 x float> frozen %b) #1 { // CHECK: [[VMINNMQ_V2_I:%.*]] = call <4 x float> @llvm.arm.neon.vminnm.v4f32(<4 x float> %a, <4 x float> %b) #3 // CHECK: ret <4 x float> [[VMINNMQ_V2_I]] float32x4_t test_vminnmq_f32(float32x4_t a, float32x4_t b) { diff --git a/clang/test/CodeGen/arm-neon-vcvtX.c b/clang/test/CodeGen/arm-neon-vcvtX.c --- a/clang/test/CodeGen/arm-neon-vcvtX.c +++ b/clang/test/CodeGen/arm-neon-vcvtX.c @@ -2,112 +2,112 @@ #include -// CHECK-LABEL: define <2 x i32> @test_vcvta_s32_f32(<2 x float> %a) #0 { +// CHECK-LABEL: define frozen <2 x i32> @test_vcvta_s32_f32(<2 x float> frozen %a) #0 { // CHECK: [[VCVTA_S32_V1_I:%.*]] = call <2 x i32> @llvm.arm.neon.vcvtas.v2i32.v2f32(<2 x float> %a) #3 // CHECK: ret <2 x i32> [[VCVTA_S32_V1_I]] int32x2_t test_vcvta_s32_f32(float32x2_t a) { return vcvta_s32_f32(a); } -// CHECK-LABEL: define <2 x i32> @test_vcvta_u32_f32(<2 x float> %a) #0 { +// CHECK-LABEL: define frozen <2 x i32> @test_vcvta_u32_f32(<2 x float> frozen %a) #0 { // CHECK: [[VCVTA_U32_V1_I:%.*]] = call <2 x i32> @llvm.arm.neon.vcvtau.v2i32.v2f32(<2 x float> %a) #3 // CHECK: ret <2 x i32> [[VCVTA_U32_V1_I]] uint32x2_t test_vcvta_u32_f32(float32x2_t a) { return vcvta_u32_f32(a); } -// CHECK-LABEL: define <4 x i32> @test_vcvtaq_s32_f32(<4 x float> %a) #1 { +// CHECK-LABEL: define frozen <4 x i32> @test_vcvtaq_s32_f32(<4 x float> frozen %a) #1 { // CHECK: [[VCVTAQ_S32_V1_I:%.*]] = call <4 x i32> @llvm.arm.neon.vcvtas.v4i32.v4f32(<4 x float> %a) #3 // CHECK: ret <4 x i32> [[VCVTAQ_S32_V1_I]] int32x4_t test_vcvtaq_s32_f32(float32x4_t a) { return vcvtaq_s32_f32(a); } -// CHECK-LABEL: define <4 x i32> @test_vcvtaq_u32_f32(<4 x float> %a) #1 { +// CHECK-LABEL: define frozen <4 x i32> @test_vcvtaq_u32_f32(<4 x float> frozen %a) #1 { // CHECK: [[VCVTAQ_U32_V1_I:%.*]] = call <4 x i32> @llvm.arm.neon.vcvtau.v4i32.v4f32(<4 x float> %a) #3 // CHECK: ret <4 x i32> [[VCVTAQ_U32_V1_I]] uint32x4_t test_vcvtaq_u32_f32(float32x4_t a) { return vcvtaq_u32_f32(a); } -// CHECK-LABEL: define <2 x i32> @test_vcvtn_s32_f32(<2 x float> %a) #0 { +// CHECK-LABEL: define frozen <2 x i32> @test_vcvtn_s32_f32(<2 x float> frozen %a) #0 { // CHECK: [[VCVTN_S32_V1_I:%.*]] = call <2 x i32> @llvm.arm.neon.vcvtns.v2i32.v2f32(<2 x float> %a) #3 // CHECK: ret <2 x i32> [[VCVTN_S32_V1_I]] int32x2_t test_vcvtn_s32_f32(float32x2_t a) { return vcvtn_s32_f32(a); } -// CHECK-LABEL: define <2 x i32> @test_vcvtn_u32_f32(<2 x float> %a) #0 { +// CHECK-LABEL: define frozen <2 x i32> @test_vcvtn_u32_f32(<2 x float> frozen %a) #0 { // CHECK: [[VCVTN_U32_V1_I:%.*]] = call <2 x i32> @llvm.arm.neon.vcvtnu.v2i32.v2f32(<2 x float> %a) #3 // CHECK: ret <2 x i32> [[VCVTN_U32_V1_I]] uint32x2_t test_vcvtn_u32_f32(float32x2_t a) { return vcvtn_u32_f32(a); } -// CHECK-LABEL: define <4 x i32> @test_vcvtnq_s32_f32(<4 x float> %a) #1 { +// CHECK-LABEL: define frozen <4 x i32> @test_vcvtnq_s32_f32(<4 x float> frozen %a) #1 { // CHECK: [[VCVTNQ_S32_V1_I:%.*]] = call <4 x i32> @llvm.arm.neon.vcvtns.v4i32.v4f32(<4 x float> %a) #3 // CHECK: ret <4 x i32> [[VCVTNQ_S32_V1_I]] int32x4_t test_vcvtnq_s32_f32(float32x4_t a) { return vcvtnq_s32_f32(a); } -// CHECK-LABEL: define <4 x i32> @test_vcvtnq_u32_f32(<4 x float> %a) #1 { +// CHECK-LABEL: define frozen <4 x i32> @test_vcvtnq_u32_f32(<4 x float> frozen %a) #1 { // CHECK: [[VCVTNQ_U32_V1_I:%.*]] = call <4 x i32> @llvm.arm.neon.vcvtnu.v4i32.v4f32(<4 x float> %a) #3 // CHECK: ret <4 x i32> [[VCVTNQ_U32_V1_I]] uint32x4_t test_vcvtnq_u32_f32(float32x4_t a) { return vcvtnq_u32_f32(a); } -// CHECK-LABEL: define <2 x i32> @test_vcvtp_s32_f32(<2 x float> %a) #0 { +// CHECK-LABEL: define frozen <2 x i32> @test_vcvtp_s32_f32(<2 x float> frozen %a) #0 { // CHECK: [[VCVTP_S32_V1_I:%.*]] = call <2 x i32> @llvm.arm.neon.vcvtps.v2i32.v2f32(<2 x float> %a) #3 // CHECK: ret <2 x i32> [[VCVTP_S32_V1_I]] int32x2_t test_vcvtp_s32_f32(float32x2_t a) { return vcvtp_s32_f32(a); } -// CHECK-LABEL: define <2 x i32> @test_vcvtp_u32_f32(<2 x float> %a) #0 { +// CHECK-LABEL: define frozen <2 x i32> @test_vcvtp_u32_f32(<2 x float> frozen %a) #0 { // CHECK: [[VCVTP_U32_V1_I:%.*]] = call <2 x i32> @llvm.arm.neon.vcvtpu.v2i32.v2f32(<2 x float> %a) #3 // CHECK: ret <2 x i32> [[VCVTP_U32_V1_I]] uint32x2_t test_vcvtp_u32_f32(float32x2_t a) { return vcvtp_u32_f32(a); } -// CHECK-LABEL: define <4 x i32> @test_vcvtpq_s32_f32(<4 x float> %a) #1 { +// CHECK-LABEL: define frozen <4 x i32> @test_vcvtpq_s32_f32(<4 x float> frozen %a) #1 { // CHECK: [[VCVTPQ_S32_V1_I:%.*]] = call <4 x i32> @llvm.arm.neon.vcvtps.v4i32.v4f32(<4 x float> %a) #3 // CHECK: ret <4 x i32> [[VCVTPQ_S32_V1_I]] int32x4_t test_vcvtpq_s32_f32(float32x4_t a) { return vcvtpq_s32_f32(a); } -// CHECK-LABEL: define <4 x i32> @test_vcvtpq_u32_f32(<4 x float> %a) #1 { +// CHECK-LABEL: define frozen <4 x i32> @test_vcvtpq_u32_f32(<4 x float> frozen %a) #1 { // CHECK: [[VCVTPQ_U32_V1_I:%.*]] = call <4 x i32> @llvm.arm.neon.vcvtpu.v4i32.v4f32(<4 x float> %a) #3 // CHECK: ret <4 x i32> [[VCVTPQ_U32_V1_I]] uint32x4_t test_vcvtpq_u32_f32(float32x4_t a) { return vcvtpq_u32_f32(a); } -// CHECK-LABEL: define <2 x i32> @test_vcvtm_s32_f32(<2 x float> %a) #0 { +// CHECK-LABEL: define frozen <2 x i32> @test_vcvtm_s32_f32(<2 x float> frozen %a) #0 { // CHECK: [[VCVTM_S32_V1_I:%.*]] = call <2 x i32> @llvm.arm.neon.vcvtms.v2i32.v2f32(<2 x float> %a) #3 // CHECK: ret <2 x i32> [[VCVTM_S32_V1_I]] int32x2_t test_vcvtm_s32_f32(float32x2_t a) { return vcvtm_s32_f32(a); } -// CHECK-LABEL: define <2 x i32> @test_vcvtm_u32_f32(<2 x float> %a) #0 { +// CHECK-LABEL: define frozen <2 x i32> @test_vcvtm_u32_f32(<2 x float> frozen %a) #0 { // CHECK: [[VCVTM_U32_V1_I:%.*]] = call <2 x i32> @llvm.arm.neon.vcvtmu.v2i32.v2f32(<2 x float> %a) #3 // CHECK: ret <2 x i32> [[VCVTM_U32_V1_I]] uint32x2_t test_vcvtm_u32_f32(float32x2_t a) { return vcvtm_u32_f32(a); } -// CHECK-LABEL: define <4 x i32> @test_vcvtmq_s32_f32(<4 x float> %a) #1 { +// CHECK-LABEL: define frozen <4 x i32> @test_vcvtmq_s32_f32(<4 x float> frozen %a) #1 { // CHECK: [[VCVTMQ_S32_V1_I:%.*]] = call <4 x i32> @llvm.arm.neon.vcvtms.v4i32.v4f32(<4 x float> %a) #3 // CHECK: ret <4 x i32> [[VCVTMQ_S32_V1_I]] int32x4_t test_vcvtmq_s32_f32(float32x4_t a) { return vcvtmq_s32_f32(a); } -// CHECK-LABEL: define <4 x i32> @test_vcvtmq_u32_f32(<4 x float> %a) #1 { +// CHECK-LABEL: define frozen <4 x i32> @test_vcvtmq_u32_f32(<4 x float> frozen %a) #1 { // CHECK: [[VCVTMQ_U32_V1_I:%.*]] = call <4 x i32> @llvm.arm.neon.vcvtmu.v4i32.v4f32(<4 x float> %a) #3 // CHECK: ret <4 x i32> [[VCVTMQ_U32_V1_I]] uint32x4_t test_vcvtmq_u32_f32(float32x4_t a) { diff --git a/clang/test/CodeGen/arm-pcs.c b/clang/test/CodeGen/arm-pcs.c --- a/clang/test/CodeGen/arm-pcs.c +++ b/clang/test/CodeGen/arm-pcs.c @@ -6,8 +6,8 @@ aapcs_fn bar; int foo(aapcs_vfp_fn baz) { -// CHECK-LABEL: define i32 @foo -// CHECK: call arm_aapcscc -// CHECK: call arm_aapcs_vfpcc +// CHECK-LABEL: define frozen i32 @foo +// CHECK: call arm_aapcscc frozen +// CHECK: call arm_aapcs_vfpcc frozen return bar() + baz(); } diff --git a/clang/test/CodeGen/arm-swiftcall.c b/clang/test/CodeGen/arm-swiftcall.c --- a/clang/test/CodeGen/arm-swiftcall.c +++ b/clang/test/CodeGen/arm-swiftcall.c @@ -1,6 +1,6 @@ -// RUN: %clang_cc1 -triple armv7-apple-darwin9 -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple armv7s-apple-ios9 -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple armv7k-apple-ios9 -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args -triple armv7-apple-darwin9 -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args -triple armv7s-apple-ios9 -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args -triple armv7k-apple-ios9 -emit-llvm -o - %s | FileCheck %s #define SWIFTCALL __attribute__((swiftcall)) #define OUT __attribute__((swift_indirect_result)) @@ -428,7 +428,7 @@ // CHECK-LABEL: define void @test_int8() // CHECK: [[TMP1:%.*]] = alloca [[REC]], align // CHECK: [[TMP2:%.*]] = alloca [[REC]], align -// CHECK: [[CALL:%.*]] = call [[SWIFTCC]] [[UAGG]] @return_int8() +// CHECK: [[CALL:%.*]] = call [[SWIFTCC]] frozen [[UAGG]] @return_int8() // CHECK: [[CAST_TMP:%.*]] = bitcast [[REC]]* [[TMP1]] to [[AGG]]* // CHECK: [[T0:%.*]] = getelementptr inbounds [[AGG]], [[AGG]]* [[CAST_TMP]], i32 0, i32 0 // CHECK: [[T1:%.*]] = extractvalue [[UAGG]] [[CALL]], 0 @@ -471,7 +471,7 @@ // CHECK-LABEL: define void @test_int5() // CHECK: [[TMP1:%.*]] = alloca [[REC]], align // CHECK: [[TMP2:%.*]] = alloca [[REC]], align -// CHECK: [[CALL:%.*]] = call [[SWIFTCC]] [[UAGG]] @return_int5() +// CHECK: [[CALL:%.*]] = call [[SWIFTCC]] frozen [[UAGG]] @return_int5() // CHECK: [[CAST_TMP:%.*]] = bitcast [[REC]]* [[TMP1]] to [[AGG]]* // CHECK: [[T0:%.*]] = getelementptr inbounds [[AGG]], [[AGG]]* [[CAST_TMP]], i32 0, i32 0 // CHECK: [[T1:%.*]] = extractvalue [[UAGG]] [[CALL]], 0 diff --git a/clang/test/CodeGen/arm-varargs.c b/clang/test/CodeGen/arm-varargs.c --- a/clang/test/CodeGen/arm-varargs.c +++ b/clang/test/CodeGen/arm-varargs.c @@ -9,7 +9,7 @@ va_list the_list; int simple_int(void) { -// CHECK-LABEL: define i32 @simple_int +// CHECK-LABEL: define frozen i32 @simple_int return va_arg(the_list, int); // CHECK: [[CUR:%[a-z0-9._]+]] = load i8*, i8** getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 0), align 4 // CHECK: [[NEXT:%[a-z0-9._]+]] = getelementptr inbounds i8, i8* [[CUR]], i32 4 @@ -59,7 +59,7 @@ } double simple_double(void) { -// CHECK-LABEL: define double @simple_double +// CHECK-LABEL: define frozen double @simple_double return va_arg(the_list, double); // CHECK: [[CUR:%[a-z0-9._]+]] = load i8*, i8** getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 0), align 4 // CHECK: [[CUR_INT:%[a-z0-9._]+]] = ptrtoint i8* [[CUR]] to i32 @@ -96,7 +96,7 @@ typedef int underaligned_int __attribute__((packed,aligned(2))); underaligned_int underaligned_int_test() { -// CHECK-LABEL: define i32 @underaligned_int_test() +// CHECK-LABEL: define frozen i32 @underaligned_int_test() return va_arg(the_list, underaligned_int); // CHECK: [[CUR:%[a-z0-9._]+]] = load i8*, i8** getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 0), align 4 // CHECK: [[NEXT:%[a-z0-9._]+]] = getelementptr inbounds i8, i8* [[CUR]], i32 4 @@ -108,7 +108,7 @@ typedef int overaligned_int __attribute__((aligned(32))); overaligned_int overaligned_int_test() { -// CHECK-LABEL: define i32 @overaligned_int_test() +// CHECK-LABEL: define frozen i32 @overaligned_int_test() return va_arg(the_list, overaligned_int); // CHECK: [[CUR:%[a-z0-9._]+]] = load i8*, i8** getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 0), align 4 // CHECK: [[NEXT:%[a-z0-9._]+]] = getelementptr inbounds i8, i8* [[CUR]], i32 4 @@ -120,7 +120,7 @@ typedef long long underaligned_long_long __attribute__((packed,aligned(2))); underaligned_long_long underaligned_long_long_test() { -// CHECK-LABEL: define i64 @underaligned_long_long_test() +// CHECK-LABEL: define frozen i64 @underaligned_long_long_test() return va_arg(the_list, underaligned_long_long); // CHECK: [[CUR:%[a-z0-9._]+]] = load i8*, i8** getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 0), align 4 // CHECK: [[CUR_INT:%[a-z0-9._]+]] = ptrtoint i8* [[CUR]] to i32 @@ -136,7 +136,7 @@ typedef long long overaligned_long_long __attribute__((aligned(32))); overaligned_long_long overaligned_long_long_test() { -// CHECK-LABEL: define i64 @overaligned_long_long_test() +// CHECK-LABEL: define frozen i64 @overaligned_long_long_test() return va_arg(the_list, overaligned_long_long); // CHECK: [[CUR:%[a-z0-9._]+]] = load i8*, i8** getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 0), align 4 // CHECK: [[CUR_INT:%[a-z0-9._]+]] = ptrtoint i8* [[CUR]] to i32 @@ -312,7 +312,7 @@ } void check_start(int n, ...) { -// CHECK-LABEL: define void @check_start(i32 %n, ...) +// CHECK-LABEL: define void @check_start(i32 frozen %n, ...) va_list the_list; va_start(the_list, n); diff --git a/clang/test/CodeGen/arm-vector-arguments.c b/clang/test/CodeGen/arm-vector-arguments.c --- a/clang/test/CodeGen/arm-vector-arguments.c +++ b/clang/test/CodeGen/arm-vector-arguments.c @@ -9,7 +9,7 @@ #include -// CHECK: define void @f0(%struct.int8x16x2_t* noalias sret align 16 %agg.result, <16 x i8> %{{.*}}, <16 x i8> %{{.*}}) +// CHECK: define void @f0(%struct.int8x16x2_t* noalias sret align 16 %agg.result, <16 x i8> frozen %{{.*}}, <16 x i8> frozen %{{.*}}) int8x16x2_t f0(int8x16_t a0, int8x16_t a1) { return vzipq_s8(a0, a1); } @@ -21,11 +21,11 @@ typedef float T_float32x8 __attribute__ ((__vector_size__ (32))); typedef float T_float32x16 __attribute__ ((__vector_size__ (64))); -// CHECK: define <2 x float> @f1_0(<2 x float> %{{.*}}) +// CHECK: define frozen <2 x float> @f1_0(<2 x float> frozen %{{.*}}) T_float32x2 f1_0(T_float32x2 a0) { return a0; } -// CHECK: define <4 x float> @f1_1(<4 x float> %{{.*}}) +// CHECK: define frozen <4 x float> @f1_1(<4 x float> frozen %{{.*}}) T_float32x4 f1_1(T_float32x4 a0) { return a0; } -// CHECK: define void @f1_2(<8 x float>* noalias sret align 32 %{{.*}}, <8 x float> %{{.*}}) +// CHECK: define void @f1_2(<8 x float>* noalias sret align 32 %{{.*}}, <8 x float> frozen %{{.*}}) T_float32x8 f1_2(T_float32x8 a0) { return a0; } -// CHECK: define void @f1_3(<16 x float>* noalias sret align 64 %{{.*}}, <16 x float> %{{.*}}) +// CHECK: define void @f1_3(<16 x float>* noalias sret align 64 %{{.*}}, <16 x float> frozen %{{.*}}) T_float32x16 f1_3(T_float32x16 a0) { return a0; } diff --git a/clang/test/CodeGen/arm-vfp16-arguments.c b/clang/test/CodeGen/arm-vfp16-arguments.c --- a/clang/test/CodeGen/arm-vfp16-arguments.c +++ b/clang/test/CodeGen/arm-vfp16-arguments.c @@ -1,10 +1,10 @@ -// RUN: %clang_cc1 -triple armv7a--none-eabi -target-abi aapcs \ +// RUN: %clang_cc1 -disable-frozen-args -triple armv7a--none-eabi -target-abi aapcs \ // RUN: -mfloat-abi soft -target-feature +neon -emit-llvm -o - -O1 %s \ // RUN: | FileCheck %s --check-prefix=CHECK-SOFT -// RUN: %clang_cc1 -triple armv7a--none-eabi -target-abi aapcs \ +// RUN: %clang_cc1 -disable-frozen-args -triple armv7a--none-eabi -target-abi aapcs \ // RUN: -mfloat-abi hard -target-feature +neon -emit-llvm -o - -O1 %s \ // RUN: | FileCheck %s --check-prefix=CHECK-HARD -// RUN: %clang_cc1 -triple armv7a--none-eabi -target-abi aapcs \ +// RUN: %clang_cc1 -disable-frozen-args -triple armv7a--none-eabi -target-abi aapcs \ // RUN: -mfloat-abi hard -target-feature +neon -target-feature +fullfp16 \ // RUN: -emit-llvm -o - -O1 %s \ // RUN: | FileCheck %s --check-prefix=CHECK-FULL @@ -29,15 +29,15 @@ // CHECK-FULL: store <4 x half> %a, <4 x half>* @g4 float16x4_t ld4(void) { return g4; } -// CHECK-SOFT: define <2 x i32> @ld4() +// CHECK-SOFT: define frozen <2 x i32> @ld4() // CHECK-SOFT: %0 = load <2 x i32>, <2 x i32>* bitcast (<4 x half>* @g4 to <2 x i32>*) // CHECK-SOFT: ret <2 x i32> %0 // -// CHECK-HARD: define arm_aapcs_vfpcc <2 x i32> @ld4() +// CHECK-HARD: define arm_aapcs_vfpcc frozen <2 x i32> @ld4() // CHECK-HARD: %0 = load <2 x i32>, <2 x i32>* bitcast (<4 x half>* @g4 to <2 x i32>*) // CHECK-HARD: ret <2 x i32> %0 // -// CHECK-FULL: define arm_aapcs_vfpcc <4 x half> @ld4() +// CHECK-FULL: define arm_aapcs_vfpcc frozen <4 x half> @ld4() // CHECK-FULL: %0 = load <4 x half>, <4 x half>* @g4 // CHECK-FULL: ret <4 x half> %0 @@ -52,15 +52,15 @@ // CHECK-FULL: store <8 x half> %a, <8 x half>* @g8 float16x8_t ld8(void) { return g8; } -// CHECK-SOFT: define <4 x i32> @ld8() +// CHECK-SOFT: define frozen <4 x i32> @ld8() // CHECK-SOFT: %0 = load <4 x i32>, <4 x i32>* bitcast (<8 x half>* @g8 to <4 x i32>*) // CHECK-SOFT: ret <4 x i32> %0 // -// CHECK-HARD: define arm_aapcs_vfpcc <4 x i32> @ld8() +// CHECK-HARD: define arm_aapcs_vfpcc frozen <4 x i32> @ld8() // CHECK-HARD: %0 = load <4 x i32>, <4 x i32>* bitcast (<8 x half>* @g8 to <4 x i32>*) // CHECK-HARD: ret <4 x i32> %0 // -// CHECK-FULL: define arm_aapcs_vfpcc <8 x half> @ld8() +// CHECK-FULL: define arm_aapcs_vfpcc frozen <8 x half> @ld8() // CHECK-FULL: %0 = load <8 x half>, <8 x half>* @g8 // CHECK-FULL: ret <8 x half> %0 diff --git a/clang/test/CodeGen/arm-vfp16-arguments2.cpp b/clang/test/CodeGen/arm-vfp16-arguments2.cpp --- a/clang/test/CodeGen/arm-vfp16-arguments2.cpp +++ b/clang/test/CodeGen/arm-vfp16-arguments2.cpp @@ -1,10 +1,10 @@ -// RUN: %clang_cc1 -triple armv7a--none-eabi -target-abi aapcs \ +// RUN: %clang_cc1 -disable-frozen-args -triple armv7a--none-eabi -target-abi aapcs \ // RUN: -mfloat-abi soft -target-feature +neon -emit-llvm -o - -O2 %s \ // RUN: | FileCheck %s --check-prefix=CHECK-SOFT -// RUN: %clang_cc1 -triple armv7a--none-eabi -target-abi aapcs \ +// RUN: %clang_cc1 -disable-frozen-args -triple armv7a--none-eabi -target-abi aapcs \ // RUN: -mfloat-abi hard -target-feature +neon -emit-llvm -o - -O2 %s \ // RUN: | FileCheck %s --check-prefix=CHECK-HARD -// RUN: %clang_cc1 -triple armv7a--none-eabi -target-abi aapcs \ +// RUN: %clang_cc1 -disable-frozen-args -triple armv7a--none-eabi -target-abi aapcs \ // RUN: -mfloat-abi hard -target-feature +neon -target-feature +fullfp16 \ // RUN: -emit-llvm -o - -O2 %s \ // RUN: | FileCheck %s --check-prefix=CHECK-FULL diff --git a/clang/test/CodeGen/arm64-aapcs-arguments.c b/clang/test/CodeGen/arm64-aapcs-arguments.c --- a/clang/test/CodeGen/arm64-aapcs-arguments.c +++ b/clang/test/CodeGen/arm64-aapcs-arguments.c @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -triple aarch64-linux-gnu -target-feature +neon -target-abi aapcs -ffreestanding -fallow-half-arguments-and-returns -emit-llvm -w -o - %s | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args -triple aarch64-linux-gnu -target-feature +neon -target-abi aapcs -ffreestanding -fallow-half-arguments-and-returns -emit-llvm -w -o - %s | FileCheck %s // AAPCS clause C.8 says: If the argument has an alignment of 16 then the NGRN // is rounded up to the next even number. @@ -37,12 +37,12 @@ // It's the job of the argument *consumer* to perform the required sign & zero // extensions under AAPCS. There shouldn't be -// CHECK: define i8 @test5(i8 %a, i16 %b) +// CHECK: define frozen i8 @test5(i8 %a, i16 %b) unsigned char test5(unsigned char a, signed short b) { } // __fp16 can be used as a function argument or return type (ACLE 2.0) -// CHECK: define half @test_half(half %{{.*}}) +// CHECK: define frozen half @test_half(half %{{.*}}) __fp16 test_half(__fp16 A) { } // __fp16 is a base type for homogeneous floating-point aggregates for AArch64 (but not 32-bit ARM). diff --git a/clang/test/CodeGen/arm64-abi-vector.c b/clang/test/CodeGen/arm64-abi-vector.c --- a/clang/test/CodeGen/arm64-abi-vector.c +++ b/clang/test/CodeGen/arm64-abi-vector.c @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -triple arm64-apple-ios7 -target-abi darwinpcs -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-linux-android -emit-llvm -o - %s | FileCheck -check-prefix=ANDROID %s +// RUN: %clang_cc1 -disable-frozen-args -triple arm64-apple-ios7 -target-abi darwinpcs -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args -triple aarch64-linux-android -emit-llvm -o - %s | FileCheck -check-prefix=ANDROID %s #include @@ -31,7 +31,7 @@ } double test_2c(__char2 *in) { -// ANDROID: call double (i32, ...) @varargs_vec_2c(i32 3, i16 {{%.*}}) +// ANDROID: call frozen double (i32, ...) @varargs_vec_2c(i32 3, i16 {{%.*}}) return varargs_vec_2c(3, *in); } @@ -51,7 +51,7 @@ double test_3c(__char3 *in) { // CHECK: test_3c -// CHECK: call double (i32, ...) @varargs_vec_3c(i32 3, i32 {{%.*}}) +// CHECK: call frozen double (i32, ...) @varargs_vec_3c(i32 3, i32 {{%.*}}) return varargs_vec_3c(3, *in); } @@ -71,7 +71,7 @@ double test_4c(__char4 *in) { // CHECK: test_4c -// CHECK: call double (i32, ...) @varargs_vec_4c(i32 4, i32 {{%.*}}) +// CHECK: call frozen double (i32, ...) @varargs_vec_4c(i32 4, i32 {{%.*}}) return varargs_vec_4c(4, *in); } @@ -91,7 +91,7 @@ double test_5c(__char5 *in) { // CHECK: test_5c -// CHECK: call double (i32, ...) @varargs_vec_5c(i32 5, <2 x i32> {{%.*}}) +// CHECK: call frozen double (i32, ...) @varargs_vec_5c(i32 5, <2 x i32> {{%.*}}) return varargs_vec_5c(5, *in); } @@ -113,7 +113,7 @@ double test_9c(__char9 *in) { // CHECK: test_9c -// CHECK: call double (i32, ...) @varargs_vec_9c(i32 9, <4 x i32> {{%.*}}) +// CHECK: call frozen double (i32, ...) @varargs_vec_9c(i32 9, <4 x i32> {{%.*}}) return varargs_vec_9c(9, *in); } @@ -133,7 +133,7 @@ double test_19c(__char19 *in) { // CHECK: test_19c -// CHECK: call double (i32, ...) @varargs_vec_19c(i32 19, <19 x i8>* {{%.*}}) +// CHECK: call frozen double (i32, ...) @varargs_vec_19c(i32 19, <19 x i8>* {{%.*}}) return varargs_vec_19c(19, *in); } @@ -153,7 +153,7 @@ double test_3s(__short3 *in) { // CHECK: test_3s -// CHECK: call double (i32, ...) @varargs_vec_3s(i32 3, <2 x i32> {{%.*}}) +// CHECK: call frozen double (i32, ...) @varargs_vec_3s(i32 3, <2 x i32> {{%.*}}) return varargs_vec_3s(3, *in); } @@ -175,7 +175,7 @@ double test_5s(__short5 *in) { // CHECK: test_5s -// CHECK: call double (i32, ...) @varargs_vec_5s(i32 5, <4 x i32> {{%.*}}) +// CHECK: call frozen double (i32, ...) @varargs_vec_5s(i32 5, <4 x i32> {{%.*}}) return varargs_vec_5s(5, *in); } @@ -197,7 +197,7 @@ double test_3i(__int3 *in) { // CHECK: test_3i -// CHECK: call double (i32, ...) @varargs_vec_3i(i32 3, <4 x i32> {{%.*}}) +// CHECK: call frozen double (i32, ...) @varargs_vec_3i(i32 3, <4 x i32> {{%.*}}) return varargs_vec_3i(3, *in); } @@ -218,7 +218,7 @@ double test_5i(__int5 *in) { // CHECK: test_5i -// CHECK: call double (i32, ...) @varargs_vec_5i(i32 5, <5 x i32>* {{%.*}}) +// CHECK: call frozen double (i32, ...) @varargs_vec_5i(i32 5, <5 x i32>* {{%.*}}) return varargs_vec_5i(5, *in); } @@ -239,7 +239,7 @@ double test_3d(__double3 *in) { // CHECK: test_3d -// CHECK: call double (i32, ...) @varargs_vec_3d(i32 3, <3 x double>* {{%.*}}) +// CHECK: call frozen double (i32, ...) @varargs_vec_3d(i32 3, <3 x double>* {{%.*}}) return varargs_vec_3d(3, *in); } @@ -301,7 +301,7 @@ __short3 *s3, __short5 *s5, __int3 *i3, __int5 *i5, __double3 *d3) { double ret = varargs_vec(3, *c3, *c5, *c9, *c19, *s3, *s5, *i3, *i5, *d3); -// CHECK: call double (i32, ...) @varargs_vec(i32 3, i32 {{%.*}}, <2 x i32> {{%.*}}, <4 x i32> {{%.*}}, <19 x i8>* {{%.*}}, <2 x i32> {{%.*}}, <4 x i32> {{%.*}}, <4 x i32> {{%.*}}, <5 x i32>* {{%.*}}, <3 x double>* {{%.*}}) +// CHECK: call frozen double (i32, ...) @varargs_vec(i32 3, i32 {{%.*}}, <2 x i32> {{%.*}}, <4 x i32> {{%.*}}, <19 x i8>* {{%.*}}, <2 x i32> {{%.*}}, <4 x i32> {{%.*}}, <4 x i32> {{%.*}}, <5 x i32>* {{%.*}}, <3 x double>* {{%.*}}) return ret; } @@ -317,7 +317,7 @@ double fixed_3c(__char3 *in) { // CHECK: fixed_3c -// CHECK: call double @args_vec_3c(i32 3, i32 {{%.*}}) +// CHECK: call frozen double @args_vec_3c(i32 3, i32 {{%.*}}) return args_vec_3c(3, *in); } @@ -333,7 +333,7 @@ double fixed_5c(__char5 *in) { // CHECK: fixed_5c -// CHECK: call double @args_vec_5c(i32 5, <2 x i32> {{%.*}}) +// CHECK: call frozen double @args_vec_5c(i32 5, <2 x i32> {{%.*}}) return args_vec_5c(5, *in); } @@ -349,7 +349,7 @@ double fixed_9c(__char9 *in) { // CHECK: fixed_9c -// CHECK: call double @args_vec_9c(i32 9, <4 x i32> {{%.*}}) +// CHECK: call frozen double @args_vec_9c(i32 9, <4 x i32> {{%.*}}) return args_vec_9c(9, *in); } @@ -363,7 +363,7 @@ double fixed_19c(__char19 *in) { // CHECK: fixed_19c -// CHECK: call double @args_vec_19c(i32 19, <19 x i8>* {{%.*}}) +// CHECK: call frozen double @args_vec_19c(i32 19, <19 x i8>* {{%.*}}) return args_vec_19c(19, *in); } @@ -379,7 +379,7 @@ double fixed_3s(__short3 *in) { // CHECK: fixed_3s -// CHECK: call double @args_vec_3s(i32 3, <2 x i32> {{%.*}}) +// CHECK: call frozen double @args_vec_3s(i32 3, <2 x i32> {{%.*}}) return args_vec_3s(3, *in); } @@ -395,7 +395,7 @@ double fixed_5s(__short5 *in) { // CHECK: fixed_5s -// CHECK: call double @args_vec_5s(i32 5, <4 x i32> {{%.*}}) +// CHECK: call frozen double @args_vec_5s(i32 5, <4 x i32> {{%.*}}) return args_vec_5s(5, *in); } @@ -411,7 +411,7 @@ double fixed_3i(__int3 *in) { // CHECK: fixed_3i -// CHECK: call double @args_vec_3i(i32 3, <4 x i32> {{%.*}}) +// CHECK: call frozen double @args_vec_3i(i32 3, <4 x i32> {{%.*}}) return args_vec_3i(3, *in); } @@ -425,7 +425,7 @@ double fixed_5i(__int5 *in) { // CHECK: fixed_5i -// CHECK: call double @args_vec_5i(i32 5, <5 x i32>* {{%.*}}) +// CHECK: call frozen double @args_vec_5i(i32 5, <5 x i32>* {{%.*}}) return args_vec_5i(5, *in); } @@ -441,6 +441,6 @@ double fixed_3d(__double3 *in) { // CHECK: fixed_3d -// CHECK: call double @args_vec_3d(i32 3, <3 x double>* {{%.*}}) +// CHECK: call frozen double @args_vec_3d(i32 3, <3 x double>* {{%.*}}) return args_vec_3d(3, *in); } diff --git a/clang/test/CodeGen/arm64-arguments.c b/clang/test/CodeGen/arm64-arguments.c --- a/clang/test/CodeGen/arm64-arguments.c +++ b/clang/test/CodeGen/arm64-arguments.c @@ -1,6 +1,6 @@ -// RUN: %clang_cc1 -triple arm64-apple-ios7 -target-feature +neon -target-abi darwinpcs -ffreestanding -emit-llvm -w -o - %s | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args -triple arm64-apple-ios7 -target-feature +neon -target-abi darwinpcs -ffreestanding -emit-llvm -w -o - %s | FileCheck %s -// CHECK: define signext i8 @f0() +// CHECK: define frozen signext i8 @f0() char f0(void) { return 0; } @@ -89,12 +89,12 @@ struct s21 { struct {} f1; int f0 : 4; }; struct s21 f21(void) {} -// CHECK: define i64 @f22() -// CHECK: define i64 @f23() -// CHECK: define i64 @f24() -// CHECK: define [2 x i64] @f25() -// CHECK: define { float, float } @f26() -// CHECK: define { double, double } @f27() +// CHECK: define frozen i64 @f22() +// CHECK: define frozen i64 @f23() +// CHECK: define frozen i64 @f24() +// CHECK: define frozen [2 x i64] @f25() +// CHECK: define frozen { float, float } @f26() +// CHECK: define frozen { double, double } @f27() _Complex char f22(void) {} _Complex short f23(void) {} _Complex int f24(void) {} @@ -176,9 +176,9 @@ typedef float T_float32x8 __attribute__ ((__vector_size__ (32))); typedef float T_float32x16 __attribute__ ((__vector_size__ (64))); -// CHECK: define <2 x float> @f1_0(<2 x float> %{{.*}}) +// CHECK: define frozen <2 x float> @f1_0(<2 x float> %{{.*}}) T_float32x2 f1_0(T_float32x2 a0) { return a0; } -// CHECK: define <4 x float> @f1_1(<4 x float> %{{.*}}) +// CHECK: define frozen <4 x float> @f1_1(<4 x float> %{{.*}}) T_float32x4 f1_1(T_float32x4 a0) { return a0; } // Vector with length bigger than 16-byte is illegal and is passed indirectly. // CHECK: define void @f1_2(<8 x float>* noalias sret align 16 %{{.*}}, <8 x float>* %0) @@ -196,7 +196,7 @@ typedef __attribute__((neon_vector_type(4))) float float32x4_t; float32x4_t f35(int i, s35_with_align s1, s35_with_align s2) { -// CHECK: define <4 x float> @f35(i32 %i, [4 x float] %s1.coerce, [4 x float] %s2.coerce) +// CHECK: define frozen <4 x float> @f35(i32 %i, [4 x float] %s1.coerce, [4 x float] %s2.coerce) // CHECK: %s1 = alloca %struct.s35, align 16 // CHECK: %s2 = alloca %struct.s35, align 16 // CHECK: %[[a:.*]] = bitcast %struct.s35* %s1 to <4 x float>* @@ -216,7 +216,7 @@ typedef __attribute__((neon_vector_type(4))) int int32x4_t; int32x4_t f36(int i, s36_with_align s1, s36_with_align s2) { -// CHECK: define <4 x i32> @f36(i32 %i, i128 %s1.coerce, i128 %s2.coerce) +// CHECK: define frozen <4 x i32> @f36(i32 %i, i128 %s1.coerce, i128 %s2.coerce) // CHECK: %s1 = alloca %struct.s36, align 16 // CHECK: %s2 = alloca %struct.s36, align 16 // CHECK: store i128 %s1.coerce, i128* %{{.*}}, align 16 @@ -237,7 +237,7 @@ typedef struct s37 s37_with_align; int32x4_t f37(int i, s37_with_align s1, s37_with_align s2) { -// CHECK: define <4 x i32> @f37(i32 %i, %struct.s37* %s1, %struct.s37* %s2) +// CHECK: define frozen <4 x i32> @f37(i32 %i, %struct.s37* %s1, %struct.s37* %s2) // CHECK: %[[a:.*]] = bitcast %struct.s37* %s1 to <4 x i32>* // CHECK: load <4 x i32>, <4 x i32>* %[[a]], align 16 // CHECK: %[[b:.*]] = bitcast %struct.s37* %s2 to <4 x i32>* @@ -253,7 +253,7 @@ // CHECK: %[[b:.*]] = alloca %struct.s37, align 16 // CHECK: call void @llvm.memcpy // CHECK: call void @llvm.memcpy -// CHECK: call <4 x i32> @f37(i32 3, %struct.s37* %[[a]], %struct.s37* %[[b]]) +// CHECK: call frozen <4 x i32> @f37(i32 3, %struct.s37* %[[a]], %struct.s37* %[[b]]) return f37(3, g37, g37); } @@ -272,7 +272,7 @@ // passing structs in registers __attribute__ ((noinline)) int f38(int i, s38_no_align s1, s38_no_align s2) { -// CHECK: define i32 @f38(i32 %i, i64 %s1.coerce, i64 %s2.coerce) +// CHECK: define frozen i32 @f38(i32 %i, i64 %s1.coerce, i64 %s2.coerce) // CHECK: %s1 = alloca %struct.s38, align 4 // CHECK: %s2 = alloca %struct.s38, align 4 // CHECK: store i64 %s1.coerce, i64* %{{.*}}, align 4 @@ -286,17 +286,17 @@ s38_no_align g38; s38_no_align g38_2; int caller38() { -// CHECK: define i32 @caller38() +// CHECK: define frozen i32 @caller38() // CHECK: %[[a:.*]] = load i64, i64* bitcast (%struct.s38* @g38 to i64*), align 4 // CHECK: %[[b:.*]] = load i64, i64* bitcast (%struct.s38* @g38_2 to i64*), align 4 -// CHECK: call i32 @f38(i32 3, i64 %[[a]], i64 %[[b]]) +// CHECK: call frozen i32 @f38(i32 3, i64 %[[a]], i64 %[[b]]) return f38(3, g38, g38_2); } // passing structs on stack __attribute__ ((noinline)) int f38_stack(int i, int i2, int i3, int i4, int i5, int i6, int i7, int i8, int i9, s38_no_align s1, s38_no_align s2) { -// CHECK: define i32 @f38_stack(i32 %i, i32 %i2, i32 %i3, i32 %i4, i32 %i5, i32 %i6, i32 %i7, i32 %i8, i32 %i9, i64 %s1.coerce, i64 %s2.coerce) +// CHECK: define frozen i32 @f38_stack(i32 %i, i32 %i2, i32 %i3, i32 %i4, i32 %i5, i32 %i6, i32 %i7, i32 %i8, i32 %i9, i64 %s1.coerce, i64 %s2.coerce) // CHECK: %s1 = alloca %struct.s38, align 4 // CHECK: %s2 = alloca %struct.s38, align 4 // CHECK: store i64 %s1.coerce, i64* %{{.*}}, align 4 @@ -308,10 +308,10 @@ return s1.i + s2.i + i + i2 + i3 + i4 + i5 + i6 + i7 + i8 + i9 + s1.s + s2.s; } int caller38_stack() { -// CHECK: define i32 @caller38_stack() +// CHECK: define frozen i32 @caller38_stack() // CHECK: %[[a:.*]] = load i64, i64* bitcast (%struct.s38* @g38 to i64*), align 4 // CHECK: %[[b:.*]] = load i64, i64* bitcast (%struct.s38* @g38_2 to i64*), align 4 -// CHECK: call i32 @f38_stack(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i64 %[[a]], i64 %[[b]]) +// CHECK: call frozen i32 @f38_stack(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i64 %[[a]], i64 %[[b]]) return f38_stack(1, 2, 3, 4, 5, 6, 7, 8, 9, g38, g38_2); } @@ -325,7 +325,7 @@ // passing aligned structs in registers __attribute__ ((noinline)) int f39(int i, s39_with_align s1, s39_with_align s2) { -// CHECK: define i32 @f39(i32 %i, i128 %s1.coerce, i128 %s2.coerce) +// CHECK: define frozen i32 @f39(i32 %i, i128 %s1.coerce, i128 %s2.coerce) // CHECK: %s1 = alloca %struct.s39, align 16 // CHECK: %s2 = alloca %struct.s39, align 16 // CHECK: store i128 %s1.coerce, i128* %{{.*}}, align 16 @@ -339,17 +339,17 @@ s39_with_align g39; s39_with_align g39_2; int caller39() { -// CHECK: define i32 @caller39() +// CHECK: define frozen i32 @caller39() // CHECK: %[[a:.*]] = load i128, i128* bitcast (%struct.s39* @g39 to i128*), align 16 // CHECK: %[[b:.*]] = load i128, i128* bitcast (%struct.s39* @g39_2 to i128*), align 16 -// CHECK: call i32 @f39(i32 3, i128 %[[a]], i128 %[[b]]) +// CHECK: call frozen i32 @f39(i32 3, i128 %[[a]], i128 %[[b]]) return f39(3, g39, g39_2); } // passing aligned structs on stack __attribute__ ((noinline)) int f39_stack(int i, int i2, int i3, int i4, int i5, int i6, int i7, int i8, int i9, s39_with_align s1, s39_with_align s2) { -// CHECK: define i32 @f39_stack(i32 %i, i32 %i2, i32 %i3, i32 %i4, i32 %i5, i32 %i6, i32 %i7, i32 %i8, i32 %i9, i128 %s1.coerce, i128 %s2.coerce) +// CHECK: define frozen i32 @f39_stack(i32 %i, i32 %i2, i32 %i3, i32 %i4, i32 %i5, i32 %i6, i32 %i7, i32 %i8, i32 %i9, i128 %s1.coerce, i128 %s2.coerce) // CHECK: %s1 = alloca %struct.s39, align 16 // CHECK: %s2 = alloca %struct.s39, align 16 // CHECK: store i128 %s1.coerce, i128* %{{.*}}, align 16 @@ -361,10 +361,10 @@ return s1.i + s2.i + i + i2 + i3 + i4 + i5 + i6 + i7 + i8 + i9 + s1.s + s2.s; } int caller39_stack() { -// CHECK: define i32 @caller39_stack() +// CHECK: define frozen i32 @caller39_stack() // CHECK: %[[a:.*]] = load i128, i128* bitcast (%struct.s39* @g39 to i128*), align 16 // CHECK: %[[b:.*]] = load i128, i128* bitcast (%struct.s39* @g39_2 to i128*), align 16 -// CHECK: call i32 @f39_stack(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i128 %[[a]], i128 %[[b]]) +// CHECK: call frozen i32 @f39_stack(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i128 %[[a]], i128 %[[b]]) return f39_stack(1, 2, 3, 4, 5, 6, 7, 8, 9, g39, g39_2); } @@ -380,7 +380,7 @@ // passing structs in registers __attribute__ ((noinline)) int f40(int i, s40_no_align s1, s40_no_align s2) { -// CHECK: define i32 @f40(i32 %i, [2 x i64] %s1.coerce, [2 x i64] %s2.coerce) +// CHECK: define frozen i32 @f40(i32 %i, [2 x i64] %s1.coerce, [2 x i64] %s2.coerce) // CHECK: %s1 = alloca %struct.s40, align 4 // CHECK: %s2 = alloca %struct.s40, align 4 // CHECK: store [2 x i64] %s1.coerce, [2 x i64]* %{{.*}}, align 4 @@ -394,17 +394,17 @@ s40_no_align g40; s40_no_align g40_2; int caller40() { -// CHECK: define i32 @caller40() +// CHECK: define frozen i32 @caller40() // CHECK: %[[a:.*]] = load [2 x i64], [2 x i64]* bitcast (%struct.s40* @g40 to [2 x i64]*), align 4 // CHECK: %[[b:.*]] = load [2 x i64], [2 x i64]* bitcast (%struct.s40* @g40_2 to [2 x i64]*), align 4 -// CHECK: call i32 @f40(i32 3, [2 x i64] %[[a]], [2 x i64] %[[b]]) +// CHECK: call frozen i32 @f40(i32 3, [2 x i64] %[[a]], [2 x i64] %[[b]]) return f40(3, g40, g40_2); } // passing structs on stack __attribute__ ((noinline)) int f40_stack(int i, int i2, int i3, int i4, int i5, int i6, int i7, int i8, int i9, s40_no_align s1, s40_no_align s2) { -// CHECK: define i32 @f40_stack(i32 %i, i32 %i2, i32 %i3, i32 %i4, i32 %i5, i32 %i6, i32 %i7, i32 %i8, i32 %i9, [2 x i64] %s1.coerce, [2 x i64] %s2.coerce) +// CHECK: define frozen i32 @f40_stack(i32 %i, i32 %i2, i32 %i3, i32 %i4, i32 %i5, i32 %i6, i32 %i7, i32 %i8, i32 %i9, [2 x i64] %s1.coerce, [2 x i64] %s2.coerce) // CHECK: %s1 = alloca %struct.s40, align 4 // CHECK: %s2 = alloca %struct.s40, align 4 // CHECK: store [2 x i64] %s1.coerce, [2 x i64]* %{{.*}}, align 4 @@ -416,10 +416,10 @@ return s1.i + s2.i + i + i2 + i3 + i4 + i5 + i6 + i7 + i8 + i9 + s1.s + s2.s; } int caller40_stack() { -// CHECK: define i32 @caller40_stack() +// CHECK: define frozen i32 @caller40_stack() // CHECK: %[[a:.*]] = load [2 x i64], [2 x i64]* bitcast (%struct.s40* @g40 to [2 x i64]*), align 4 // CHECK: %[[b:.*]] = load [2 x i64], [2 x i64]* bitcast (%struct.s40* @g40_2 to [2 x i64]*), align 4 -// CHECK: call i32 @f40_stack(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, [2 x i64] %[[a]], [2 x i64] %[[b]]) +// CHECK: call frozen i32 @f40_stack(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, [2 x i64] %[[a]], [2 x i64] %[[b]]) return f40_stack(1, 2, 3, 4, 5, 6, 7, 8, 9, g40, g40_2); } @@ -435,7 +435,7 @@ // passing aligned structs in registers __attribute__ ((noinline)) int f41(int i, s41_with_align s1, s41_with_align s2) { -// CHECK: define i32 @f41(i32 %i, i128 %s1.coerce, i128 %s2.coerce) +// CHECK: define frozen i32 @f41(i32 %i, i128 %s1.coerce, i128 %s2.coerce) // CHECK: %s1 = alloca %struct.s41, align 16 // CHECK: %s2 = alloca %struct.s41, align 16 // CHECK: store i128 %s1.coerce, i128* %{{.*}}, align 16 @@ -449,17 +449,17 @@ s41_with_align g41; s41_with_align g41_2; int caller41() { -// CHECK: define i32 @caller41() +// CHECK: define frozen i32 @caller41() // CHECK: %[[a:.*]] = load i128, i128* bitcast (%struct.s41* @g41 to i128*), align 16 // CHECK: %[[b:.*]] = load i128, i128* bitcast (%struct.s41* @g41_2 to i128*), align 16 -// CHECK: call i32 @f41(i32 3, i128 %[[a]], i128 %[[b]]) +// CHECK: call frozen i32 @f41(i32 3, i128 %[[a]], i128 %[[b]]) return f41(3, g41, g41_2); } // passing aligned structs on stack __attribute__ ((noinline)) int f41_stack(int i, int i2, int i3, int i4, int i5, int i6, int i7, int i8, int i9, s41_with_align s1, s41_with_align s2) { -// CHECK: define i32 @f41_stack(i32 %i, i32 %i2, i32 %i3, i32 %i4, i32 %i5, i32 %i6, i32 %i7, i32 %i8, i32 %i9, i128 %s1.coerce, i128 %s2.coerce) +// CHECK: define frozen i32 @f41_stack(i32 %i, i32 %i2, i32 %i3, i32 %i4, i32 %i5, i32 %i6, i32 %i7, i32 %i8, i32 %i9, i128 %s1.coerce, i128 %s2.coerce) // CHECK: %s1 = alloca %struct.s41, align 16 // CHECK: %s2 = alloca %struct.s41, align 16 // CHECK: store i128 %s1.coerce, i128* %{{.*}}, align 16 @@ -471,10 +471,10 @@ return s1.i + s2.i + i + i2 + i3 + i4 + i5 + i6 + i7 + i8 + i9 + s1.s + s2.s; } int caller41_stack() { -// CHECK: define i32 @caller41_stack() +// CHECK: define frozen i32 @caller41_stack() // CHECK: %[[a:.*]] = load i128, i128* bitcast (%struct.s41* @g41 to i128*), align 16 // CHECK: %[[b:.*]] = load i128, i128* bitcast (%struct.s41* @g41_2 to i128*), align 16 -// CHECK: call i32 @f41_stack(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i128 %[[a]], i128 %[[b]]) +// CHECK: call frozen i32 @f41_stack(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i128 %[[a]], i128 %[[b]]) return f41_stack(1, 2, 3, 4, 5, 6, 7, 8, 9, g41, g41_2); } @@ -492,7 +492,7 @@ // passing structs in registers __attribute__ ((noinline)) int f42(int i, s42_no_align s1, s42_no_align s2) { -// CHECK: define i32 @f42(i32 %i, %struct.s42* %s1, %struct.s42* %s2) +// CHECK: define frozen i32 @f42(i32 %i, %struct.s42* %s1, %struct.s42* %s2) // CHECK: getelementptr inbounds %struct.s42, %struct.s42* %s1, i32 0, i32 0 // CHECK: getelementptr inbounds %struct.s42, %struct.s42* %s2, i32 0, i32 0 // CHECK: getelementptr inbounds %struct.s42, %struct.s42* %s1, i32 0, i32 1 @@ -502,21 +502,21 @@ s42_no_align g42; s42_no_align g42_2; int caller42() { -// CHECK: define i32 @caller42() +// CHECK: define frozen i32 @caller42() // CHECK: %[[a:.*]] = alloca %struct.s42, align 4 // CHECK: %[[b:.*]] = alloca %struct.s42, align 4 // CHECK: %[[c:.*]] = bitcast %struct.s42* %[[a]] to i8* // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64 // CHECK: %[[d:.*]] = bitcast %struct.s42* %[[b]] to i8* // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64 -// CHECK: call i32 @f42(i32 3, %struct.s42* %[[a]], %struct.s42* %[[b]]) +// CHECK: call frozen i32 @f42(i32 3, %struct.s42* %[[a]], %struct.s42* %[[b]]) return f42(3, g42, g42_2); } // passing structs on stack __attribute__ ((noinline)) int f42_stack(int i, int i2, int i3, int i4, int i5, int i6, int i7, int i8, int i9, s42_no_align s1, s42_no_align s2) { -// CHECK: define i32 @f42_stack(i32 %i, i32 %i2, i32 %i3, i32 %i4, i32 %i5, i32 %i6, i32 %i7, i32 %i8, i32 %i9, %struct.s42* %s1, %struct.s42* %s2) +// CHECK: define frozen i32 @f42_stack(i32 %i, i32 %i2, i32 %i3, i32 %i4, i32 %i5, i32 %i6, i32 %i7, i32 %i8, i32 %i9, %struct.s42* %s1, %struct.s42* %s2) // CHECK: getelementptr inbounds %struct.s42, %struct.s42* %s1, i32 0, i32 0 // CHECK: getelementptr inbounds %struct.s42, %struct.s42* %s2, i32 0, i32 0 // CHECK: getelementptr inbounds %struct.s42, %struct.s42* %s1, i32 0, i32 1 @@ -524,14 +524,14 @@ return s1.i + s2.i + i + i2 + i3 + i4 + i5 + i6 + i7 + i8 + i9 + s1.s + s2.s; } int caller42_stack() { -// CHECK: define i32 @caller42_stack() +// CHECK: define frozen i32 @caller42_stack() // CHECK: %[[a:.*]] = alloca %struct.s42, align 4 // CHECK: %[[b:.*]] = alloca %struct.s42, align 4 // CHECK: %[[c:.*]] = bitcast %struct.s42* %[[a]] to i8* // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64 // CHECK: %[[d:.*]] = bitcast %struct.s42* %[[b]] to i8* // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64 -// CHECK: call i32 @f42_stack(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, %struct.s42* %[[a]], %struct.s42* %[[b]]) +// CHECK: call frozen i32 @f42_stack(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, %struct.s42* %[[a]], %struct.s42* %[[b]]) return f42_stack(1, 2, 3, 4, 5, 6, 7, 8, 9, g42, g42_2); } @@ -549,7 +549,7 @@ // passing aligned structs in registers __attribute__ ((noinline)) int f43(int i, s43_with_align s1, s43_with_align s2) { -// CHECK: define i32 @f43(i32 %i, %struct.s43* %s1, %struct.s43* %s2) +// CHECK: define frozen i32 @f43(i32 %i, %struct.s43* %s1, %struct.s43* %s2) // CHECK: getelementptr inbounds %struct.s43, %struct.s43* %s1, i32 0, i32 0 // CHECK: getelementptr inbounds %struct.s43, %struct.s43* %s2, i32 0, i32 0 // CHECK: getelementptr inbounds %struct.s43, %struct.s43* %s1, i32 0, i32 1 @@ -559,21 +559,21 @@ s43_with_align g43; s43_with_align g43_2; int caller43() { -// CHECK: define i32 @caller43() +// CHECK: define frozen i32 @caller43() // CHECK: %[[a:.*]] = alloca %struct.s43, align 16 // CHECK: %[[b:.*]] = alloca %struct.s43, align 16 // CHECK: %[[c:.*]] = bitcast %struct.s43* %[[a]] to i8* // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64 // CHECK: %[[d:.*]] = bitcast %struct.s43* %[[b]] to i8* // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64 -// CHECK: call i32 @f43(i32 3, %struct.s43* %[[a]], %struct.s43* %[[b]]) +// CHECK: call frozen i32 @f43(i32 3, %struct.s43* %[[a]], %struct.s43* %[[b]]) return f43(3, g43, g43_2); } // passing aligned structs on stack __attribute__ ((noinline)) int f43_stack(int i, int i2, int i3, int i4, int i5, int i6, int i7, int i8, int i9, s43_with_align s1, s43_with_align s2) { -// CHECK: define i32 @f43_stack(i32 %i, i32 %i2, i32 %i3, i32 %i4, i32 %i5, i32 %i6, i32 %i7, i32 %i8, i32 %i9, %struct.s43* %s1, %struct.s43* %s2) +// CHECK: define frozen i32 @f43_stack(i32 %i, i32 %i2, i32 %i3, i32 %i4, i32 %i5, i32 %i6, i32 %i7, i32 %i8, i32 %i9, %struct.s43* %s1, %struct.s43* %s2) // CHECK: getelementptr inbounds %struct.s43, %struct.s43* %s1, i32 0, i32 0 // CHECK: getelementptr inbounds %struct.s43, %struct.s43* %s2, i32 0, i32 0 // CHECK: getelementptr inbounds %struct.s43, %struct.s43* %s1, i32 0, i32 1 @@ -581,14 +581,14 @@ return s1.i + s2.i + i + i2 + i3 + i4 + i5 + i6 + i7 + i8 + i9 + s1.s + s2.s; } int caller43_stack() { -// CHECK: define i32 @caller43_stack() +// CHECK: define frozen i32 @caller43_stack() // CHECK: %[[a:.*]] = alloca %struct.s43, align 16 // CHECK: %[[b:.*]] = alloca %struct.s43, align 16 // CHECK: %[[c:.*]] = bitcast %struct.s43* %[[a]] to i8* // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64 // CHECK: %[[d:.*]] = bitcast %struct.s43* %[[b]] to i8* // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64 -// CHECK: call i32 @f43_stack(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, %struct.s43* %[[a]], %struct.s43* %[[b]]) +// CHECK: call frozen i32 @f43_stack(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, %struct.s43* %[[a]], %struct.s43* %[[b]]) return f43_stack(1, 2, 3, 4, 5, 6, 7, 8, 9, g43, g43_2); } @@ -597,24 +597,24 @@ __attribute__ ((noinline)) int f40_split(int i, int i2, int i3, int i4, int i5, int i6, int i7, s40_no_align s1, s40_no_align s2) { -// CHECK: define i32 @f40_split(i32 %i, i32 %i2, i32 %i3, i32 %i4, i32 %i5, i32 %i6, i32 %i7, [2 x i64] %s1.coerce, [2 x i64] %s2.coerce) +// CHECK: define frozen i32 @f40_split(i32 %i, i32 %i2, i32 %i3, i32 %i4, i32 %i5, i32 %i6, i32 %i7, [2 x i64] %s1.coerce, [2 x i64] %s2.coerce) return s1.i + s2.i + i + i2 + i3 + i4 + i5 + i6 + i7 + s1.s + s2.s; } int caller40_split() { -// CHECK: define i32 @caller40_split() -// CHECK: call i32 @f40_split(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, [2 x i64] %{{.*}} [2 x i64] %{{.*}}) +// CHECK: define frozen i32 @caller40_split() +// CHECK: call frozen i32 @f40_split(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, [2 x i64] %{{.*}} [2 x i64] %{{.*}}) return f40_split(1, 2, 3, 4, 5, 6, 7, g40, g40_2); } __attribute__ ((noinline)) int f41_split(int i, int i2, int i3, int i4, int i5, int i6, int i7, s41_with_align s1, s41_with_align s2) { -// CHECK: define i32 @f41_split(i32 %i, i32 %i2, i32 %i3, i32 %i4, i32 %i5, i32 %i6, i32 %i7, i128 %s1.coerce, i128 %s2.coerce) +// CHECK: define frozen i32 @f41_split(i32 %i, i32 %i2, i32 %i3, i32 %i4, i32 %i5, i32 %i6, i32 %i7, i128 %s1.coerce, i128 %s2.coerce) return s1.i + s2.i + i + i2 + i3 + i4 + i5 + i6 + i7 + s1.s + s2.s; } int caller41_split() { -// CHECK: define i32 @caller41_split() -// CHECK: call i32 @f41_split(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i128 %{{.*}}, i128 %{{.*}}) +// CHECK: define frozen i32 @caller41_split() +// CHECK: call frozen i32 @f41_split(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i128 %{{.*}}, i128 %{{.*}}) return f41_split(1, 2, 3, 4, 5, 6, 7, g41, g41_2); } @@ -624,7 +624,7 @@ }; float test_hfa(int n, ...) { -// CHECK-LABEL: define float @test_hfa(i32 %n, ...) +// CHECK-LABEL: define frozen float @test_hfa(i32 %n, ...) // CHECK: [[THELIST:%.*]] = alloca i8* // CHECK: [[CURLIST:%.*]] = load i8*, i8** [[THELIST]] @@ -640,8 +640,8 @@ } float test_hfa_call(struct HFA *a) { -// CHECK-LABEL: define float @test_hfa_call(%struct.HFA* %a) -// CHECK: call float (i32, ...) @test_hfa(i32 1, [4 x float] {{.*}}) +// CHECK-LABEL: define frozen float @test_hfa_call(%struct.HFA* %a) +// CHECK: call frozen float (i32, ...) @test_hfa(i32 1, [4 x float] {{.*}}) test_hfa(1, *a); } @@ -650,7 +650,7 @@ }; float test_toobig_hfa(int n, ...) { -// CHECK-LABEL: define float @test_toobig_hfa(i32 %n, ...) +// CHECK-LABEL: define frozen float @test_toobig_hfa(i32 %n, ...) // CHECK: [[THELIST:%.*]] = alloca i8* // CHECK: [[CURLIST:%.*]] = load i8*, i8** [[THELIST]] @@ -672,7 +672,7 @@ }; int32x4_t test_hva(int n, ...) { -// CHECK-LABEL: define <4 x i32> @test_hva(i32 %n, ...) +// CHECK-LABEL: define frozen <4 x i32> @test_hva(i32 %n, ...) // CHECK: [[THELIST:%.*]] = alloca i8* // CHECK: [[CURLIST:%.*]] = load i8*, i8** [[THELIST]] @@ -698,7 +698,7 @@ }; int32x4_t test_toobig_hva(int n, ...) { -// CHECK-LABEL: define <4 x i32> @test_toobig_hva(i32 %n, ...) +// CHECK-LABEL: define frozen <4 x i32> @test_toobig_hva(i32 %n, ...) // CHECK: [[THELIST:%.*]] = alloca i8* // CHECK: [[CURLIST:%.*]] = load i8*, i8** [[THELIST]] @@ -719,7 +719,7 @@ typedef struct { float32x3_t arr[4]; } HFAv3; float32x3_t test_hva_v3(int n, ...) { -// CHECK-LABEL: define <3 x float> @test_hva_v3(i32 %n, ...) +// CHECK-LABEL: define frozen <3 x float> @test_hva_v3(i32 %n, ...) // CHECK: [[THELIST:%.*]] = alloca i8* // CHECK: [[CURLIST:%.*]] = load i8*, i8** [[THELIST]] @@ -741,7 +741,7 @@ } float32x3_t test_hva_v3_call(HFAv3 *a) { -// CHECK-LABEL: define <3 x float> @test_hva_v3_call(%struct.HFAv3* %a) -// CHECK: call <3 x float> (i32, ...) @test_hva_v3(i32 1, [4 x <4 x float>] {{.*}}) +// CHECK-LABEL: define frozen <3 x float> @test_hva_v3_call(%struct.HFAv3* %a) +// CHECK: call frozen <3 x float> (i32, ...) @test_hva_v3(i32 1, [4 x <4 x float>] {{.*}}) return test_hva_v3(1, *a); } diff --git a/clang/test/CodeGen/arm64-microsoft-arguments.cpp b/clang/test/CodeGen/arm64-microsoft-arguments.cpp --- a/clang/test/CodeGen/arm64-microsoft-arguments.cpp +++ b/clang/test/CodeGen/arm64-microsoft-arguments.cpp @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -triple aarch64-windows -ffreestanding -emit-llvm -O0 \ +// RUN: %clang_cc1 -disable-frozen-args -triple aarch64-windows -ffreestanding -emit-llvm -O0 \ // RUN: -x c++ -o - %s | FileCheck %s // Pass and return for type size <= 8 bytes. diff --git a/clang/test/CodeGen/arm64-microsoft-intrinsics.c b/clang/test/CodeGen/arm64-microsoft-intrinsics.c --- a/clang/test/CodeGen/arm64-microsoft-intrinsics.c +++ b/clang/test/CodeGen/arm64-microsoft-intrinsics.c @@ -12,7 +12,7 @@ return _InterlockedAdd(Addend, -1); } -// CHECK-LABEL: define {{.*}} i32 @test_InterlockedAdd(i32* %Addend, i32 %Value) {{.*}} { +// CHECK-LABEL: define {{.*}} i32 @test_InterlockedAdd(i32* frozen %Addend, i32 frozen %Value) {{.*}} { // CHECK-MSVC: %[[OLDVAL:[0-9]+]] = atomicrmw add i32* %1, i32 %2 seq_cst // CHECK-MSVC: %[[NEWVAL:[0-9]+]] = add i32 %[[OLDVAL:[0-9]+]], %2 // CHECK-MSVC: ret i32 %[[NEWVAL:[0-9]+]] diff --git a/clang/test/CodeGen/arm64-mte.c b/clang/test/CodeGen/arm64-mte.c --- a/clang/test/CodeGen/arm64-mte.c +++ b/clang/test/CodeGen/arm64-mte.c @@ -3,7 +3,7 @@ #include #include -// CHECK-LABEL: define i32* @create_tag1 +// CHECK-LABEL: define frozen i32* @create_tag1 int *create_tag1(int *a, unsigned b) { // CHECK: [[T0:%[0-9]+]] = bitcast i32* %a to i8* // CHECK: [[T1:%[0-9]+]] = zext i32 %b to i64 @@ -12,7 +12,7 @@ return __arm_mte_create_random_tag(a,b); } -// CHECK-LABEL: define i16* @create_tag2 +// CHECK-LABEL: define frozen i16* @create_tag2 short *create_tag2(short *a, unsigned b) { // CHECK: [[T0:%[0-9]+]] = bitcast i16* %a to i8* // CHECK: [[T1:%[0-9]+]] = zext i32 %b to i64 @@ -21,7 +21,7 @@ return __arm_mte_create_random_tag(a,b); } -// CHECK-LABEL: define i8* @create_tag3 +// CHECK-LABEL: define frozen i8* @create_tag3 char *create_tag3(char *a, unsigned b) { // CHECK: [[T1:%[0-9]+]] = zext i32 %b to i64 // CHECK: [[T2:%[0-9]+]] = tail call i8* @llvm.aarch64.irg(i8* %a, i64 [[T1]]) @@ -29,13 +29,13 @@ return __arm_mte_create_random_tag(a,b); } -// CHECK-LABEL: define i8* @increment_tag1 +// CHECK-LABEL: define frozen i8* @increment_tag1 char *increment_tag1(char *a) { // CHECK: call i8* @llvm.aarch64.addg(i8* %a, i64 3) return __arm_mte_increment_tag(a,3); } -// CHECK-LABEL: define i16* @increment_tag2 +// CHECK-LABEL: define frozen i16* @increment_tag2 short *increment_tag2(short *a) { // CHECK: [[T0:%[0-9]+]] = bitcast i16* %a to i8* // CHECK: [[T1:%[0-9]+]] = tail call i8* @llvm.aarch64.addg(i8* [[T0]], i64 3) @@ -43,7 +43,7 @@ return __arm_mte_increment_tag(a,3); } -// CHECK-LABEL: define i32 @exclude_tag +// CHECK-LABEL: define frozen i32 @exclude_tag unsigned exclude_tag(int *a, unsigned m) { // CHECK: [[T0:%[0-9]+]] = zext i32 %m to i64 // CHECK: [[T1:%[0-9]+]] = bitcast i32* %a to i8* @@ -52,7 +52,7 @@ return __arm_mte_exclude_tag(a, m); } -// CHECK-LABEL: define i32* @get_tag1 +// CHECK-LABEL: define frozen i32* @get_tag1 int *get_tag1(int *a) { // CHECK: [[T0:%[0-9]+]] = bitcast i32* %a to i8* // CHECK: [[T1:%[0-9]+]] = tail call i8* @llvm.aarch64.ldg(i8* [[T0]], i8* [[T0]]) @@ -60,7 +60,7 @@ return __arm_mte_get_tag(a); } -// CHECK-LABEL: define i16* @get_tag2 +// CHECK-LABEL: define frozen i16* @get_tag2 short *get_tag2(short *a) { // CHECK: [[T0:%[0-9]+]] = bitcast i16* %a to i8* // CHECK: [[T1:%[0-9]+]] = tail call i8* @llvm.aarch64.ldg(i8* [[T0]], i8* [[T0]]) @@ -75,7 +75,7 @@ __arm_mte_set_tag(a); } -// CHECK-LABEL: define i64 @subtract_pointers +// CHECK-LABEL: define frozen i64 @subtract_pointers ptrdiff_t subtract_pointers(int *a, int *b) { // CHECK: [[T0:%[0-9]+]] = bitcast i32* %a to i8* // CHECK: [[T1:%[0-9]+]] = bitcast i32* %b to i8* @@ -84,7 +84,7 @@ return __arm_mte_ptrdiff(a, b); } -// CHECK-LABEL: define i64 @subtract_pointers_null_1 +// CHECK-LABEL: define frozen i64 @subtract_pointers_null_1 ptrdiff_t subtract_pointers_null_1(int *a) { // CHECK: [[T0:%[0-9]+]] = bitcast i32* %a to i8* // CHECK: [[T1:%[0-9]+]] = tail call i64 @llvm.aarch64.subp(i8* [[T0]], i8* null) @@ -92,7 +92,7 @@ return __arm_mte_ptrdiff(a, NULL); } -// CHECK-LABEL: define i64 @subtract_pointers_null_2 +// CHECK-LABEL: define frozen i64 @subtract_pointers_null_2 ptrdiff_t subtract_pointers_null_2(int *a) { // CHECK: [[T0:%[0-9]+]] = bitcast i32* %a to i8* // CHECK: [[T1:%[0-9]+]] = tail call i64 @llvm.aarch64.subp(i8* null, i8* [[T0]]) @@ -101,7 +101,7 @@ } // Check arithmetic promotion on return type -// CHECK-LABEL: define i32 @subtract_pointers4 +// CHECK-LABEL: define frozen i32 @subtract_pointers4 int subtract_pointers4(void* a, void *b) { // CHECK: [[T0:%[0-9]+]] = tail call i64 @llvm.aarch64.subp(i8* %a, i8* %b) // CHECK-NEXT: %cmp = icmp slt i64 [[T0]], 1 diff --git a/clang/test/CodeGen/arm64_32-vaarg.c b/clang/test/CodeGen/arm64_32-vaarg.c --- a/clang/test/CodeGen/arm64_32-vaarg.c +++ b/clang/test/CodeGen/arm64_32-vaarg.c @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -triple arm64_32-apple-ios7.0 -target-abi darwinpcs -emit-llvm -o - -O1 -ffreestanding %s | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args -triple arm64_32-apple-ios7.0 -target-abi darwinpcs -emit-llvm -o - -O1 -ffreestanding %s | FileCheck %s #include @@ -8,7 +8,7 @@ // No realignment should be needed here: slot size is 4 bytes. int test_int(OneInt input, va_list *mylist) { -// CHECK-LABEL: define i32 @test_int(i32 %input +// CHECK-LABEL: define frozen i32 @test_int(i32 %input // CHECK: [[START:%.*]] = load i8*, i8** %mylist // CHECK: [[NEXT:%.*]] = getelementptr inbounds i8, i8* [[START]], i32 4 // CHECK: store i8* [[NEXT]], i8** %mylist @@ -27,7 +27,7 @@ // Minimum slot size is 4 bytes, so address needs rounding up to multiple of 8. long long test_longlong(OneLongLong input, va_list *mylist) { -// CHECK-LABEL: define i64 @test_longlong(i64 %input +// CHECK-LABEL: define frozen i64 @test_longlong(i64 %input // CHECK: [[STARTPTR:%.*]] = bitcast i8** %mylist to i32* // CHECK: [[START:%.*]] = load i32, i32* [[STARTPTR]] @@ -52,7 +52,7 @@ // HFAs take priority over passing large structs indirectly. float test_hfa(va_list *mylist) { -// CHECK-LABEL: define float @test_hfa +// CHECK-LABEL: define frozen float @test_hfa // CHECK: [[START:%.*]] = load i8*, i8** %mylist // CHECK: [[NEXT:%.*]] = getelementptr inbounds i8, i8* [[START]], i32 16 @@ -81,7 +81,7 @@ // Structs bigger than 16 bytes are passed indirectly: a pointer is placed on // the stack. long long test_bigstruct(BigStruct input, va_list *mylist) { -// CHECK-LABEL: define i64 @test_bigstruct(%struct.BigStruct* +// CHECK-LABEL: define frozen i64 @test_bigstruct(%struct.BigStruct* // CHECK: [[START:%.*]] = load i8*, i8** %mylist // CHECK: [[NEXT:%.*]] = getelementptr inbounds i8, i8* [[START]], i32 4 // CHECK: store i8* [[NEXT]], i8** %mylist @@ -103,7 +103,7 @@ // alignment must be passed via "[N x i32]" to be correctly allocated in the // backend. short test_threeshorts(ThreeShorts input, va_list *mylist) { -// CHECK-LABEL: define signext i16 @test_threeshorts([2 x i32] %input +// CHECK-LABEL: define frozen signext i16 @test_threeshorts([2 x i32] %input // CHECK: [[START:%.*]] = load i8*, i8** %mylist // CHECK: [[NEXT:%.*]] = getelementptr inbounds i8, i8* [[START]], i32 8 diff --git a/clang/test/CodeGen/arm64_32.c b/clang/test/CodeGen/arm64_32.c --- a/clang/test/CodeGen/arm64_32.c +++ b/clang/test/CodeGen/arm64_32.c @@ -27,4 +27,4 @@ typedef float __attribute__((ext_vector_type(16))) v16f32; v16f32 func(v16f32 in) { return in; } -// CHECK: define void @func(<16 x float>* noalias sret align 16 {{%.*}}, <16 x float> {{%.*}}) +// CHECK: define void @func(<16 x float>* noalias sret align 16 {{%.*}}, <16 x float> frozen {{%.*}}) diff --git a/clang/test/CodeGen/arm64_vcopy.c b/clang/test/CodeGen/arm64_vcopy.c --- a/clang/test/CodeGen/arm64_vcopy.c +++ b/clang/test/CodeGen/arm64_vcopy.c @@ -4,7 +4,7 @@ #include -// CHECK-LABEL: define <16 x i8> @test_vcopyq_laneq_s8(<16 x i8> %a1, <16 x i8> %a2) #0 { +// CHECK-LABEL: define frozen <16 x i8> @test_vcopyq_laneq_s8(<16 x i8> frozen %a1, <16 x i8> frozen %a2) #0 { // CHECK: [[VGETQ_LANE:%.*]] = extractelement <16 x i8> %a2, i32 13 // CHECK: [[VSET_LANE:%.*]] = insertelement <16 x i8> %a1, i8 [[VGETQ_LANE]], i32 3 // CHECK: ret <16 x i8> [[VSET_LANE]] @@ -12,7 +12,7 @@ return vcopyq_laneq_s8(a1, (int64_t) 3, a2, (int64_t) 13); } -// CHECK-LABEL: define <16 x i8> @test_vcopyq_laneq_u8(<16 x i8> %a1, <16 x i8> %a2) #0 { +// CHECK-LABEL: define frozen <16 x i8> @test_vcopyq_laneq_u8(<16 x i8> frozen %a1, <16 x i8> frozen %a2) #0 { // CHECK: [[VGETQ_LANE:%.*]] = extractelement <16 x i8> %a2, i32 13 // CHECK: [[VSET_LANE:%.*]] = insertelement <16 x i8> %a1, i8 [[VGETQ_LANE]], i32 3 // CHECK: ret <16 x i8> [[VSET_LANE]] @@ -21,7 +21,7 @@ } -// CHECK-LABEL: define <8 x i16> @test_vcopyq_laneq_s16(<8 x i16> %a1, <8 x i16> %a2) #0 { +// CHECK-LABEL: define frozen <8 x i16> @test_vcopyq_laneq_s16(<8 x i16> frozen %a1, <8 x i16> frozen %a2) #0 { // CHECK: [[VGETQ_LANE:%.*]] = extractelement <8 x i16> %a2, i32 7 // CHECK: [[VSET_LANE:%.*]] = insertelement <8 x i16> %a1, i16 [[VGETQ_LANE]], i32 3 // CHECK: ret <8 x i16> [[VSET_LANE]] @@ -30,7 +30,7 @@ } -// CHECK-LABEL: define <8 x i16> @test_vcopyq_laneq_u16(<8 x i16> %a1, <8 x i16> %a2) #0 { +// CHECK-LABEL: define frozen <8 x i16> @test_vcopyq_laneq_u16(<8 x i16> frozen %a1, <8 x i16> frozen %a2) #0 { // CHECK: [[VGETQ_LANE:%.*]] = extractelement <8 x i16> %a2, i32 7 // CHECK: [[VSET_LANE:%.*]] = insertelement <8 x i16> %a1, i16 [[VGETQ_LANE]], i32 3 // CHECK: ret <8 x i16> [[VSET_LANE]] @@ -39,7 +39,7 @@ } -// CHECK-LABEL: define <4 x i32> @test_vcopyq_laneq_s32(<4 x i32> %a1, <4 x i32> %a2) #0 { +// CHECK-LABEL: define frozen <4 x i32> @test_vcopyq_laneq_s32(<4 x i32> frozen %a1, <4 x i32> frozen %a2) #0 { // CHECK: [[VGETQ_LANE:%.*]] = extractelement <4 x i32> %a2, i32 3 // CHECK: [[VSET_LANE:%.*]] = insertelement <4 x i32> %a1, i32 [[VGETQ_LANE]], i32 3 // CHECK: ret <4 x i32> [[VSET_LANE]] @@ -47,7 +47,7 @@ return vcopyq_laneq_s32(a1, (int64_t) 3, a2, (int64_t) 3); } -// CHECK-LABEL: define <4 x i32> @test_vcopyq_laneq_u32(<4 x i32> %a1, <4 x i32> %a2) #0 { +// CHECK-LABEL: define frozen <4 x i32> @test_vcopyq_laneq_u32(<4 x i32> frozen %a1, <4 x i32> frozen %a2) #0 { // CHECK: [[VGETQ_LANE:%.*]] = extractelement <4 x i32> %a2, i32 3 // CHECK: [[VSET_LANE:%.*]] = insertelement <4 x i32> %a1, i32 [[VGETQ_LANE]], i32 3 // CHECK: ret <4 x i32> [[VSET_LANE]] @@ -55,7 +55,7 @@ return vcopyq_laneq_u32(a1, (int64_t) 3, a2, (int64_t) 3); } -// CHECK-LABEL: define <2 x i64> @test_vcopyq_laneq_s64(<2 x i64> %a1, <2 x i64> %a2) #0 { +// CHECK-LABEL: define frozen <2 x i64> @test_vcopyq_laneq_s64(<2 x i64> frozen %a1, <2 x i64> frozen %a2) #0 { // CHECK: [[VGETQ_LANE:%.*]] = extractelement <2 x i64> %a2, i32 1 // CHECK: [[VSET_LANE:%.*]] = insertelement <2 x i64> %a1, i64 [[VGETQ_LANE]], i32 0 // CHECK: ret <2 x i64> [[VSET_LANE]] @@ -63,7 +63,7 @@ return vcopyq_laneq_s64(a1, (int64_t) 0, a2, (int64_t) 1); } -// CHECK-LABEL: define <2 x i64> @test_vcopyq_laneq_u64(<2 x i64> %a1, <2 x i64> %a2) #0 { +// CHECK-LABEL: define frozen <2 x i64> @test_vcopyq_laneq_u64(<2 x i64> frozen %a1, <2 x i64> frozen %a2) #0 { // CHECK: [[VGETQ_LANE:%.*]] = extractelement <2 x i64> %a2, i32 1 // CHECK: [[VSET_LANE:%.*]] = insertelement <2 x i64> %a1, i64 [[VGETQ_LANE]], i32 0 // CHECK: ret <2 x i64> [[VSET_LANE]] @@ -71,7 +71,7 @@ return vcopyq_laneq_u64(a1, (int64_t) 0, a2, (int64_t) 1); } -// CHECK-LABEL: define <4 x float> @test_vcopyq_laneq_f32(<4 x float> %a1, <4 x float> %a2) #0 { +// CHECK-LABEL: define frozen <4 x float> @test_vcopyq_laneq_f32(<4 x float> frozen %a1, <4 x float> frozen %a2) #0 { // CHECK: [[VGETQ_LANE:%.*]] = extractelement <4 x float> %a2, i32 3 // CHECK: [[VSET_LANE:%.*]] = insertelement <4 x float> %a1, float [[VGETQ_LANE]], i32 0 // CHECK: ret <4 x float> [[VSET_LANE]] @@ -79,7 +79,7 @@ return vcopyq_laneq_f32(a1, 0, a2, 3); } -// CHECK-LABEL: define <2 x double> @test_vcopyq_laneq_f64(<2 x double> %a1, <2 x double> %a2) #0 { +// CHECK-LABEL: define frozen <2 x double> @test_vcopyq_laneq_f64(<2 x double> frozen %a1, <2 x double> frozen %a2) #0 { // CHECK: [[VGETQ_LANE:%.*]] = extractelement <2 x double> %a2, i32 1 // CHECK: [[VSET_LANE:%.*]] = insertelement <2 x double> %a1, double [[VGETQ_LANE]], i32 0 // CHECK: ret <2 x double> [[VSET_LANE]] diff --git a/clang/test/CodeGen/arm64_vdupq_n_f64.c b/clang/test/CodeGen/arm64_vdupq_n_f64.c --- a/clang/test/CodeGen/arm64_vdupq_n_f64.c +++ b/clang/test/CodeGen/arm64_vdupq_n_f64.c @@ -4,7 +4,7 @@ // vdupq_n_f64 -> dup.2d v0, v0[0] // -// CHECK-LABEL: define <2 x double> @test_vdupq_n_f64(double %w) #0 { +// CHECK-LABEL: define frozen <2 x double> @test_vdupq_n_f64(double frozen %w) #0 { // CHECK: [[VECINIT_I:%.*]] = insertelement <2 x double> undef, double %w, i32 0 // CHECK: [[VECINIT1_I:%.*]] = insertelement <2 x double> [[VECINIT_I]], double %w, i32 1 // CHECK: ret <2 x double> [[VECINIT1_I]] @@ -14,7 +14,7 @@ // might as well test this while we're here // vdupq_n_f32 -> dup.4s v0, v0[0] -// CHECK-LABEL: define <4 x float> @test_vdupq_n_f32(float %w) #0 { +// CHECK-LABEL: define frozen <4 x float> @test_vdupq_n_f32(float frozen %w) #0 { // CHECK: [[VECINIT_I:%.*]] = insertelement <4 x float> undef, float %w, i32 0 // CHECK: [[VECINIT1_I:%.*]] = insertelement <4 x float> [[VECINIT_I]], float %w, i32 1 // CHECK: [[VECINIT2_I:%.*]] = insertelement <4 x float> [[VECINIT1_I]], float %w, i32 2 @@ -27,7 +27,7 @@ // vdupq_lane_f64 -> dup.2d v0, v0[0] // this was in , but had already been implemented, // test anyway -// CHECK-LABEL: define <2 x double> @test_vdupq_lane_f64(<1 x double> %V) #0 { +// CHECK-LABEL: define frozen <2 x double> @test_vdupq_lane_f64(<1 x double> frozen %V) #0 { // CHECK: [[TMP0:%.*]] = bitcast <1 x double> %V to <8 x i8> // CHECK: [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x double> // CHECK: [[SHUFFLE:%.*]] = shufflevector <1 x double> [[TMP1]], <1 x double> [[TMP1]], <2 x i32> zeroinitializer @@ -38,7 +38,7 @@ // vmovq_n_f64 -> dup Vd.2d,X0 // this wasn't in , but it was between the vdups -// CHECK-LABEL: define <2 x double> @test_vmovq_n_f64(double %w) #0 { +// CHECK-LABEL: define frozen <2 x double> @test_vmovq_n_f64(double frozen %w) #0 { // CHECK: [[VECINIT_I:%.*]] = insertelement <2 x double> undef, double %w, i32 0 // CHECK: [[VECINIT1_I:%.*]] = insertelement <2 x double> [[VECINIT_I]], double %w, i32 1 // CHECK: ret <2 x double> [[VECINIT1_I]] @@ -46,7 +46,7 @@ return vmovq_n_f64(w); } -// CHECK-LABEL: define <4 x half> @test_vmov_n_f16(half* %a1) #1 { +// CHECK-LABEL: define frozen <4 x half> @test_vmov_n_f16(half* frozen %a1) #1 { // CHECK: [[TMP0:%.*]] = load half, half* %a1, align 2 // CHECK: [[VECINIT:%.*]] = insertelement <4 x half> undef, half [[TMP0]], i32 0 // CHECK: [[VECINIT1:%.*]] = insertelement <4 x half> [[VECINIT]], half [[TMP0]], i32 1 @@ -63,7 +63,7 @@ } */ -// CHECK-LABEL: define <8 x half> @test_vmovq_n_f16(half* %a1) #0 { +// CHECK-LABEL: define frozen <8 x half> @test_vmovq_n_f16(half* frozen %a1) #0 { // CHECK: [[TMP0:%.*]] = load half, half* %a1, align 2 // CHECK: [[VECINIT:%.*]] = insertelement <8 x half> undef, half [[TMP0]], i32 0 // CHECK: [[VECINIT1:%.*]] = insertelement <8 x half> [[VECINIT]], half [[TMP0]], i32 1 diff --git a/clang/test/CodeGen/arm_neon_intrinsics.c b/clang/test/CodeGen/arm_neon_intrinsics.c --- a/clang/test/CodeGen/arm_neon_intrinsics.c +++ b/clang/test/CodeGen/arm_neon_intrinsics.c @@ -20223,259 +20223,259 @@ return vtbx4_p8(a, b, c); } -// CHECK: @test_vtrn_s8({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vtrn_s8({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.int8x8x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to <8 x i8>* // CHECK: [[VTRN_I:%.*]] = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> -// CHECK: store <8 x i8> [[VTRN_I]], <8 x i8>* [[TMP1]], align 4, !alias.scope !3 +// CHECK: store <8 x i8> [[VTRN_I]], <8 x i8>* [[TMP1]], align 4, !alias.scope // CHECK: [[TMP2:%.*]] = getelementptr inbounds <8 x i8>, <8 x i8>* [[TMP1]], i32 1 // CHECK: [[VTRN1_I:%.*]] = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> -// CHECK: store <8 x i8> [[VTRN1_I]], <8 x i8>* [[TMP2]], align 4, !alias.scope !3 +// CHECK: store <8 x i8> [[VTRN1_I]], <8 x i8>* [[TMP2]], align 4, !alias.scope // CHECK: ret void int8x8x2_t test_vtrn_s8(int8x8_t a, int8x8_t b) { return vtrn_s8(a, b); } -// CHECK: @test_vtrn_s16({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vtrn_s16({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.int16x4x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast <4 x i16> %a to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <4 x i16> %b to <8 x i8> // CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to <4 x i16>* // CHECK: [[VTRN_I:%.*]] = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> -// CHECK: store <4 x i16> [[VTRN_I]], <4 x i16>* [[TMP3]], align 4, !alias.scope !6 +// CHECK: store <4 x i16> [[VTRN_I]], <4 x i16>* [[TMP3]], align 4, !alias.scope // CHECK: [[TMP4:%.*]] = getelementptr inbounds <4 x i16>, <4 x i16>* [[TMP3]], i32 1 // CHECK: [[VTRN1_I:%.*]] = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> -// CHECK: store <4 x i16> [[VTRN1_I]], <4 x i16>* [[TMP4]], align 4, !alias.scope !6 +// CHECK: store <4 x i16> [[VTRN1_I]], <4 x i16>* [[TMP4]], align 4, !alias.scope // CHECK: ret void int16x4x2_t test_vtrn_s16(int16x4_t a, int16x4_t b) { return vtrn_s16(a, b); } -// CHECK: @test_vtrn_s32({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vtrn_s32({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.int32x2x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast <2 x i32> %a to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <2 x i32> %b to <8 x i8> // CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to <2 x i32>* // CHECK: [[VTRN_I:%.*]] = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> -// CHECK: store <2 x i32> [[VTRN_I]], <2 x i32>* [[TMP3]], align 4, !alias.scope !9 +// CHECK: store <2 x i32> [[VTRN_I]], <2 x i32>* [[TMP3]], align 4, !alias.scope // CHECK: [[TMP4:%.*]] = getelementptr inbounds <2 x i32>, <2 x i32>* [[TMP3]], i32 1 // CHECK: [[VTRN1_I:%.*]] = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> -// CHECK: store <2 x i32> [[VTRN1_I]], <2 x i32>* [[TMP4]], align 4, !alias.scope !9 +// CHECK: store <2 x i32> [[VTRN1_I]], <2 x i32>* [[TMP4]], align 4, !alias.scope // CHECK: ret void int32x2x2_t test_vtrn_s32(int32x2_t a, int32x2_t b) { return vtrn_s32(a, b); } -// CHECK: @test_vtrn_u8({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vtrn_u8({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.uint8x8x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to <8 x i8>* // CHECK: [[VTRN_I:%.*]] = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> -// CHECK: store <8 x i8> [[VTRN_I]], <8 x i8>* [[TMP1]], align 4, !alias.scope !12 +// CHECK: store <8 x i8> [[VTRN_I]], <8 x i8>* [[TMP1]], align 4, !alias.scope // CHECK: [[TMP2:%.*]] = getelementptr inbounds <8 x i8>, <8 x i8>* [[TMP1]], i32 1 // CHECK: [[VTRN1_I:%.*]] = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> -// CHECK: store <8 x i8> [[VTRN1_I]], <8 x i8>* [[TMP2]], align 4, !alias.scope !12 +// CHECK: store <8 x i8> [[VTRN1_I]], <8 x i8>* [[TMP2]], align 4, !alias.scope // CHECK: ret void uint8x8x2_t test_vtrn_u8(uint8x8_t a, uint8x8_t b) { return vtrn_u8(a, b); } -// CHECK: @test_vtrn_u16({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vtrn_u16({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.uint16x4x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast <4 x i16> %a to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <4 x i16> %b to <8 x i8> // CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to <4 x i16>* // CHECK: [[VTRN_I:%.*]] = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> -// CHECK: store <4 x i16> [[VTRN_I]], <4 x i16>* [[TMP3]], align 4, !alias.scope !15 +// CHECK: store <4 x i16> [[VTRN_I]], <4 x i16>* [[TMP3]], align 4, !alias.scope // CHECK: [[TMP4:%.*]] = getelementptr inbounds <4 x i16>, <4 x i16>* [[TMP3]], i32 1 // CHECK: [[VTRN1_I:%.*]] = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> -// CHECK: store <4 x i16> [[VTRN1_I]], <4 x i16>* [[TMP4]], align 4, !alias.scope !15 +// CHECK: store <4 x i16> [[VTRN1_I]], <4 x i16>* [[TMP4]], align 4, !alias.scope // CHECK: ret void uint16x4x2_t test_vtrn_u16(uint16x4_t a, uint16x4_t b) { return vtrn_u16(a, b); } -// CHECK: @test_vtrn_u32({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vtrn_u32({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.uint32x2x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast <2 x i32> %a to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <2 x i32> %b to <8 x i8> // CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to <2 x i32>* // CHECK: [[VTRN_I:%.*]] = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> -// CHECK: store <2 x i32> [[VTRN_I]], <2 x i32>* [[TMP3]], align 4, !alias.scope !18 +// CHECK: store <2 x i32> [[VTRN_I]], <2 x i32>* [[TMP3]], align 4, !alias.scope // CHECK: [[TMP4:%.*]] = getelementptr inbounds <2 x i32>, <2 x i32>* [[TMP3]], i32 1 // CHECK: [[VTRN1_I:%.*]] = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> -// CHECK: store <2 x i32> [[VTRN1_I]], <2 x i32>* [[TMP4]], align 4, !alias.scope !18 +// CHECK: store <2 x i32> [[VTRN1_I]], <2 x i32>* [[TMP4]], align 4, !alias.scope // CHECK: ret void uint32x2x2_t test_vtrn_u32(uint32x2_t a, uint32x2_t b) { return vtrn_u32(a, b); } -// CHECK: @test_vtrn_f32({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vtrn_f32({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.float32x2x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast <2 x float> %a to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <2 x float> %b to <8 x i8> // CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to <2 x float>* // CHECK: [[VTRN_I:%.*]] = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> -// CHECK: store <2 x float> [[VTRN_I]], <2 x float>* [[TMP3]], align 4, !alias.scope !21 +// CHECK: store <2 x float> [[VTRN_I]], <2 x float>* [[TMP3]], align 4, !alias.scope // CHECK: [[TMP4:%.*]] = getelementptr inbounds <2 x float>, <2 x float>* [[TMP3]], i32 1 // CHECK: [[VTRN1_I:%.*]] = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> -// CHECK: store <2 x float> [[VTRN1_I]], <2 x float>* [[TMP4]], align 4, !alias.scope !21 +// CHECK: store <2 x float> [[VTRN1_I]], <2 x float>* [[TMP4]], align 4, !alias.scope // CHECK: ret void float32x2x2_t test_vtrn_f32(float32x2_t a, float32x2_t b) { return vtrn_f32(a, b); } -// CHECK: @test_vtrn_p8({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vtrn_p8({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.poly8x8x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to <8 x i8>* // CHECK: [[VTRN_I:%.*]] = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> -// CHECK: store <8 x i8> [[VTRN_I]], <8 x i8>* [[TMP1]], align 4, !alias.scope !24 +// CHECK: store <8 x i8> [[VTRN_I]], <8 x i8>* [[TMP1]], align 4, !alias.scope // CHECK: [[TMP2:%.*]] = getelementptr inbounds <8 x i8>, <8 x i8>* [[TMP1]], i32 1 // CHECK: [[VTRN1_I:%.*]] = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> -// CHECK: store <8 x i8> [[VTRN1_I]], <8 x i8>* [[TMP2]], align 4, !alias.scope !24 +// CHECK: store <8 x i8> [[VTRN1_I]], <8 x i8>* [[TMP2]], align 4, !alias.scope // CHECK: ret void poly8x8x2_t test_vtrn_p8(poly8x8_t a, poly8x8_t b) { return vtrn_p8(a, b); } -// CHECK: @test_vtrn_p16({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vtrn_p16({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.poly16x4x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast <4 x i16> %a to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <4 x i16> %b to <8 x i8> // CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to <4 x i16>* // CHECK: [[VTRN_I:%.*]] = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> -// CHECK: store <4 x i16> [[VTRN_I]], <4 x i16>* [[TMP3]], align 4, !alias.scope !27 +// CHECK: store <4 x i16> [[VTRN_I]], <4 x i16>* [[TMP3]], align 4, !alias.scope // CHECK: [[TMP4:%.*]] = getelementptr inbounds <4 x i16>, <4 x i16>* [[TMP3]], i32 1 // CHECK: [[VTRN1_I:%.*]] = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> -// CHECK: store <4 x i16> [[VTRN1_I]], <4 x i16>* [[TMP4]], align 4, !alias.scope !27 +// CHECK: store <4 x i16> [[VTRN1_I]], <4 x i16>* [[TMP4]], align 4, !alias.scope // CHECK: ret void poly16x4x2_t test_vtrn_p16(poly16x4_t a, poly16x4_t b) { return vtrn_p16(a, b); } -// CHECK: @test_vtrnq_s8({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vtrnq_s8({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.int8x16x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to <16 x i8>* // CHECK: [[VTRN_I:%.*]] = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> -// CHECK: store <16 x i8> [[VTRN_I]], <16 x i8>* [[TMP1]], align 4, !alias.scope !30 +// CHECK: store <16 x i8> [[VTRN_I]], <16 x i8>* [[TMP1]], align 4, !alias.scope // CHECK: [[TMP2:%.*]] = getelementptr inbounds <16 x i8>, <16 x i8>* [[TMP1]], i32 1 // CHECK: [[VTRN1_I:%.*]] = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> -// CHECK: store <16 x i8> [[VTRN1_I]], <16 x i8>* [[TMP2]], align 4, !alias.scope !30 +// CHECK: store <16 x i8> [[VTRN1_I]], <16 x i8>* [[TMP2]], align 4, !alias.scope // CHECK: ret void int8x16x2_t test_vtrnq_s8(int8x16_t a, int8x16_t b) { return vtrnq_s8(a, b); } -// CHECK: @test_vtrnq_s16({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vtrnq_s16({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.int16x8x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast <8 x i16> %a to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i16> %b to <16 x i8> // CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to <8 x i16>* // CHECK: [[VTRN_I:%.*]] = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> -// CHECK: store <8 x i16> [[VTRN_I]], <8 x i16>* [[TMP3]], align 4, !alias.scope !33 +// CHECK: store <8 x i16> [[VTRN_I]], <8 x i16>* [[TMP3]], align 4, !alias.scope // CHECK: [[TMP4:%.*]] = getelementptr inbounds <8 x i16>, <8 x i16>* [[TMP3]], i32 1 // CHECK: [[VTRN1_I:%.*]] = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> -// CHECK: store <8 x i16> [[VTRN1_I]], <8 x i16>* [[TMP4]], align 4, !alias.scope !33 +// CHECK: store <8 x i16> [[VTRN1_I]], <8 x i16>* [[TMP4]], align 4, !alias.scope // CHECK: ret void int16x8x2_t test_vtrnq_s16(int16x8_t a, int16x8_t b) { return vtrnq_s16(a, b); } -// CHECK: @test_vtrnq_s32({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vtrnq_s32({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.int32x4x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast <4 x i32> %a to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <4 x i32> %b to <16 x i8> // CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to <4 x i32>* // CHECK: [[VTRN_I:%.*]] = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> -// CHECK: store <4 x i32> [[VTRN_I]], <4 x i32>* [[TMP3]], align 4, !alias.scope !36 +// CHECK: store <4 x i32> [[VTRN_I]], <4 x i32>* [[TMP3]], align 4, !alias.scope // CHECK: [[TMP4:%.*]] = getelementptr inbounds <4 x i32>, <4 x i32>* [[TMP3]], i32 1 // CHECK: [[VTRN1_I:%.*]] = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> -// CHECK: store <4 x i32> [[VTRN1_I]], <4 x i32>* [[TMP4]], align 4, !alias.scope !36 +// CHECK: store <4 x i32> [[VTRN1_I]], <4 x i32>* [[TMP4]], align 4, !alias.scope // CHECK: ret void int32x4x2_t test_vtrnq_s32(int32x4_t a, int32x4_t b) { return vtrnq_s32(a, b); } -// CHECK: @test_vtrnq_u8({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vtrnq_u8({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.uint8x16x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to <16 x i8>* // CHECK: [[VTRN_I:%.*]] = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> -// CHECK: store <16 x i8> [[VTRN_I]], <16 x i8>* [[TMP1]], align 4, !alias.scope !39 +// CHECK: store <16 x i8> [[VTRN_I]], <16 x i8>* [[TMP1]], align 4, !alias.scope // CHECK: [[TMP2:%.*]] = getelementptr inbounds <16 x i8>, <16 x i8>* [[TMP1]], i32 1 // CHECK: [[VTRN1_I:%.*]] = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> -// CHECK: store <16 x i8> [[VTRN1_I]], <16 x i8>* [[TMP2]], align 4, !alias.scope !39 +// CHECK: store <16 x i8> [[VTRN1_I]], <16 x i8>* [[TMP2]], align 4, !alias.scope // CHECK: ret void uint8x16x2_t test_vtrnq_u8(uint8x16_t a, uint8x16_t b) { return vtrnq_u8(a, b); } -// CHECK: @test_vtrnq_u16({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vtrnq_u16({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.uint16x8x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast <8 x i16> %a to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i16> %b to <16 x i8> // CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to <8 x i16>* // CHECK: [[VTRN_I:%.*]] = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> -// CHECK: store <8 x i16> [[VTRN_I]], <8 x i16>* [[TMP3]], align 4, !alias.scope !42 +// CHECK: store <8 x i16> [[VTRN_I]], <8 x i16>* [[TMP3]], align 4, !alias.scope // CHECK: [[TMP4:%.*]] = getelementptr inbounds <8 x i16>, <8 x i16>* [[TMP3]], i32 1 // CHECK: [[VTRN1_I:%.*]] = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> -// CHECK: store <8 x i16> [[VTRN1_I]], <8 x i16>* [[TMP4]], align 4, !alias.scope !42 +// CHECK: store <8 x i16> [[VTRN1_I]], <8 x i16>* [[TMP4]], align 4, !alias.scope // CHECK: ret void uint16x8x2_t test_vtrnq_u16(uint16x8_t a, uint16x8_t b) { return vtrnq_u16(a, b); } -// CHECK: @test_vtrnq_u32({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vtrnq_u32({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.uint32x4x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast <4 x i32> %a to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <4 x i32> %b to <16 x i8> // CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to <4 x i32>* // CHECK: [[VTRN_I:%.*]] = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> -// CHECK: store <4 x i32> [[VTRN_I]], <4 x i32>* [[TMP3]], align 4, !alias.scope !45 +// CHECK: store <4 x i32> [[VTRN_I]], <4 x i32>* [[TMP3]], align 4, !alias.scope // CHECK: [[TMP4:%.*]] = getelementptr inbounds <4 x i32>, <4 x i32>* [[TMP3]], i32 1 // CHECK: [[VTRN1_I:%.*]] = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> -// CHECK: store <4 x i32> [[VTRN1_I]], <4 x i32>* [[TMP4]], align 4, !alias.scope !45 +// CHECK: store <4 x i32> [[VTRN1_I]], <4 x i32>* [[TMP4]], align 4, !alias.scope // CHECK: ret void uint32x4x2_t test_vtrnq_u32(uint32x4_t a, uint32x4_t b) { return vtrnq_u32(a, b); } -// CHECK: @test_vtrnq_f32({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vtrnq_f32({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.float32x4x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast <4 x float> %a to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <4 x float> %b to <16 x i8> // CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to <4 x float>* // CHECK: [[VTRN_I:%.*]] = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> -// CHECK: store <4 x float> [[VTRN_I]], <4 x float>* [[TMP3]], align 4, !alias.scope !48 +// CHECK: store <4 x float> [[VTRN_I]], <4 x float>* [[TMP3]], align 4, !alias.scope // CHECK: [[TMP4:%.*]] = getelementptr inbounds <4 x float>, <4 x float>* [[TMP3]], i32 1 // CHECK: [[VTRN1_I:%.*]] = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> -// CHECK: store <4 x float> [[VTRN1_I]], <4 x float>* [[TMP4]], align 4, !alias.scope !48 +// CHECK: store <4 x float> [[VTRN1_I]], <4 x float>* [[TMP4]], align 4, !alias.scope // CHECK: ret void float32x4x2_t test_vtrnq_f32(float32x4_t a, float32x4_t b) { return vtrnq_f32(a, b); } -// CHECK: @test_vtrnq_p8({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vtrnq_p8({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.poly8x16x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to <16 x i8>* // CHECK: [[VTRN_I:%.*]] = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> -// CHECK: store <16 x i8> [[VTRN_I]], <16 x i8>* [[TMP1]], align 4, !alias.scope !51 +// CHECK: store <16 x i8> [[VTRN_I]], <16 x i8>* [[TMP1]], align 4, !alias.scope // CHECK: [[TMP2:%.*]] = getelementptr inbounds <16 x i8>, <16 x i8>* [[TMP1]], i32 1 // CHECK: [[VTRN1_I:%.*]] = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> -// CHECK: store <16 x i8> [[VTRN1_I]], <16 x i8>* [[TMP2]], align 4, !alias.scope !51 +// CHECK: store <16 x i8> [[VTRN1_I]], <16 x i8>* [[TMP2]], align 4, !alias.scope // CHECK: ret void poly8x16x2_t test_vtrnq_p8(poly8x16_t a, poly8x16_t b) { return vtrnq_p8(a, b); } -// CHECK: @test_vtrnq_p16({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vtrnq_p16({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.poly16x8x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast <8 x i16> %a to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i16> %b to <16 x i8> // CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to <8 x i16>* // CHECK: [[VTRN_I:%.*]] = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> -// CHECK: store <8 x i16> [[VTRN_I]], <8 x i16>* [[TMP3]], align 4, !alias.scope !54 +// CHECK: store <8 x i16> [[VTRN_I]], <8 x i16>* [[TMP3]], align 4, !alias.scope // CHECK: [[TMP4:%.*]] = getelementptr inbounds <8 x i16>, <8 x i16>* [[TMP3]], i32 1 // CHECK: [[VTRN1_I:%.*]] = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> -// CHECK: store <8 x i16> [[VTRN1_I]], <8 x i16>* [[TMP4]], align 4, !alias.scope !54 +// CHECK: store <8 x i16> [[VTRN1_I]], <8 x i16>* [[TMP4]], align 4, !alias.scope // CHECK: ret void poly16x8x2_t test_vtrnq_p16(poly16x8_t a, poly16x8_t b) { return vtrnq_p16(a, b); @@ -20645,517 +20645,517 @@ return vtstq_p16(a, b); } -// CHECK: @test_vuzp_s8({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vuzp_s8({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.int8x8x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to <8 x i8>* // CHECK: [[VUZP_I:%.*]] = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> -// CHECK: store <8 x i8> [[VUZP_I]], <8 x i8>* [[TMP1]], align 4, !alias.scope !57 +// CHECK: store <8 x i8> [[VUZP_I]], <8 x i8>* [[TMP1]], align 4, !alias.scope // CHECK: [[TMP2:%.*]] = getelementptr inbounds <8 x i8>, <8 x i8>* [[TMP1]], i32 1 // CHECK: [[VUZP1_I:%.*]] = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> -// CHECK: store <8 x i8> [[VUZP1_I]], <8 x i8>* [[TMP2]], align 4, !alias.scope !57 +// CHECK: store <8 x i8> [[VUZP1_I]], <8 x i8>* [[TMP2]], align 4, !alias.scope // CHECK: ret void int8x8x2_t test_vuzp_s8(int8x8_t a, int8x8_t b) { return vuzp_s8(a, b); } -// CHECK: @test_vuzp_s16({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vuzp_s16({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.int16x4x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast <4 x i16> %a to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <4 x i16> %b to <8 x i8> // CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to <4 x i16>* // CHECK: [[VUZP_I:%.*]] = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> -// CHECK: store <4 x i16> [[VUZP_I]], <4 x i16>* [[TMP3]], align 4, !alias.scope !60 +// CHECK: store <4 x i16> [[VUZP_I]], <4 x i16>* [[TMP3]], align 4, !alias.scope // CHECK: [[TMP4:%.*]] = getelementptr inbounds <4 x i16>, <4 x i16>* [[TMP3]], i32 1 // CHECK: [[VUZP1_I:%.*]] = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> -// CHECK: store <4 x i16> [[VUZP1_I]], <4 x i16>* [[TMP4]], align 4, !alias.scope !60 +// CHECK: store <4 x i16> [[VUZP1_I]], <4 x i16>* [[TMP4]], align 4, !alias.scope // CHECK: ret void int16x4x2_t test_vuzp_s16(int16x4_t a, int16x4_t b) { return vuzp_s16(a, b); } -// CHECK: @test_vuzp_s32({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vuzp_s32({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.int32x2x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast <2 x i32> %a to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <2 x i32> %b to <8 x i8> // CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to <2 x i32>* // CHECK: [[VUZP_I:%.*]] = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> -// CHECK: store <2 x i32> [[VUZP_I]], <2 x i32>* [[TMP3]], align 4, !alias.scope !63 +// CHECK: store <2 x i32> [[VUZP_I]], <2 x i32>* [[TMP3]], align 4, !alias.scope // CHECK: [[TMP4:%.*]] = getelementptr inbounds <2 x i32>, <2 x i32>* [[TMP3]], i32 1 // CHECK: [[VUZP1_I:%.*]] = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> -// CHECK: store <2 x i32> [[VUZP1_I]], <2 x i32>* [[TMP4]], align 4, !alias.scope !63 +// CHECK: store <2 x i32> [[VUZP1_I]], <2 x i32>* [[TMP4]], align 4, !alias.scope // CHECK: ret void int32x2x2_t test_vuzp_s32(int32x2_t a, int32x2_t b) { return vuzp_s32(a, b); } -// CHECK: @test_vuzp_u8({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vuzp_u8({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.uint8x8x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to <8 x i8>* // CHECK: [[VUZP_I:%.*]] = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> -// CHECK: store <8 x i8> [[VUZP_I]], <8 x i8>* [[TMP1]], align 4, !alias.scope !66 +// CHECK: store <8 x i8> [[VUZP_I]], <8 x i8>* [[TMP1]], align 4, !alias.scope // CHECK: [[TMP2:%.*]] = getelementptr inbounds <8 x i8>, <8 x i8>* [[TMP1]], i32 1 // CHECK: [[VUZP1_I:%.*]] = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> -// CHECK: store <8 x i8> [[VUZP1_I]], <8 x i8>* [[TMP2]], align 4, !alias.scope !66 +// CHECK: store <8 x i8> [[VUZP1_I]], <8 x i8>* [[TMP2]], align 4, !alias.scope // CHECK: ret void uint8x8x2_t test_vuzp_u8(uint8x8_t a, uint8x8_t b) { return vuzp_u8(a, b); } -// CHECK: @test_vuzp_u16({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vuzp_u16({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.uint16x4x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast <4 x i16> %a to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <4 x i16> %b to <8 x i8> // CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to <4 x i16>* // CHECK: [[VUZP_I:%.*]] = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> -// CHECK: store <4 x i16> [[VUZP_I]], <4 x i16>* [[TMP3]], align 4, !alias.scope !69 +// CHECK: store <4 x i16> [[VUZP_I]], <4 x i16>* [[TMP3]], align 4, !alias.scope // CHECK: [[TMP4:%.*]] = getelementptr inbounds <4 x i16>, <4 x i16>* [[TMP3]], i32 1 // CHECK: [[VUZP1_I:%.*]] = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> -// CHECK: store <4 x i16> [[VUZP1_I]], <4 x i16>* [[TMP4]], align 4, !alias.scope !69 +// CHECK: store <4 x i16> [[VUZP1_I]], <4 x i16>* [[TMP4]], align 4, !alias.scope // CHECK: ret void uint16x4x2_t test_vuzp_u16(uint16x4_t a, uint16x4_t b) { return vuzp_u16(a, b); } -// CHECK: @test_vuzp_u32({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vuzp_u32({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.uint32x2x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast <2 x i32> %a to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <2 x i32> %b to <8 x i8> // CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to <2 x i32>* // CHECK: [[VUZP_I:%.*]] = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> -// CHECK: store <2 x i32> [[VUZP_I]], <2 x i32>* [[TMP3]], align 4, !alias.scope !72 +// CHECK: store <2 x i32> [[VUZP_I]], <2 x i32>* [[TMP3]], align 4, !alias.scope // CHECK: [[TMP4:%.*]] = getelementptr inbounds <2 x i32>, <2 x i32>* [[TMP3]], i32 1 // CHECK: [[VUZP1_I:%.*]] = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> -// CHECK: store <2 x i32> [[VUZP1_I]], <2 x i32>* [[TMP4]], align 4, !alias.scope !72 +// CHECK: store <2 x i32> [[VUZP1_I]], <2 x i32>* [[TMP4]], align 4, !alias.scope // CHECK: ret void uint32x2x2_t test_vuzp_u32(uint32x2_t a, uint32x2_t b) { return vuzp_u32(a, b); } -// CHECK: @test_vuzp_f32({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vuzp_f32({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.float32x2x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast <2 x float> %a to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <2 x float> %b to <8 x i8> // CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to <2 x float>* // CHECK: [[VUZP_I:%.*]] = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> -// CHECK: store <2 x float> [[VUZP_I]], <2 x float>* [[TMP3]], align 4, !alias.scope !75 +// CHECK: store <2 x float> [[VUZP_I]], <2 x float>* [[TMP3]], align 4, !alias.scope // CHECK: [[TMP4:%.*]] = getelementptr inbounds <2 x float>, <2 x float>* [[TMP3]], i32 1 // CHECK: [[VUZP1_I:%.*]] = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> -// CHECK: store <2 x float> [[VUZP1_I]], <2 x float>* [[TMP4]], align 4, !alias.scope !75 +// CHECK: store <2 x float> [[VUZP1_I]], <2 x float>* [[TMP4]], align 4, !alias.scope // CHECK: ret void float32x2x2_t test_vuzp_f32(float32x2_t a, float32x2_t b) { return vuzp_f32(a, b); } -// CHECK: @test_vuzp_p8({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vuzp_p8({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.poly8x8x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to <8 x i8>* // CHECK: [[VUZP_I:%.*]] = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> -// CHECK: store <8 x i8> [[VUZP_I]], <8 x i8>* [[TMP1]], align 4, !alias.scope !78 +// CHECK: store <8 x i8> [[VUZP_I]], <8 x i8>* [[TMP1]], align 4, !alias.scope // CHECK: [[TMP2:%.*]] = getelementptr inbounds <8 x i8>, <8 x i8>* [[TMP1]], i32 1 // CHECK: [[VUZP1_I:%.*]] = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> -// CHECK: store <8 x i8> [[VUZP1_I]], <8 x i8>* [[TMP2]], align 4, !alias.scope !78 +// CHECK: store <8 x i8> [[VUZP1_I]], <8 x i8>* [[TMP2]], align 4, !alias.scope // CHECK: ret void poly8x8x2_t test_vuzp_p8(poly8x8_t a, poly8x8_t b) { return vuzp_p8(a, b); } -// CHECK: @test_vuzp_p16({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vuzp_p16({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.poly16x4x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast <4 x i16> %a to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <4 x i16> %b to <8 x i8> // CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to <4 x i16>* // CHECK: [[VUZP_I:%.*]] = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> -// CHECK: store <4 x i16> [[VUZP_I]], <4 x i16>* [[TMP3]], align 4, !alias.scope !81 +// CHECK: store <4 x i16> [[VUZP_I]], <4 x i16>* [[TMP3]], align 4, !alias.scope // CHECK: [[TMP4:%.*]] = getelementptr inbounds <4 x i16>, <4 x i16>* [[TMP3]], i32 1 // CHECK: [[VUZP1_I:%.*]] = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> -// CHECK: store <4 x i16> [[VUZP1_I]], <4 x i16>* [[TMP4]], align 4, !alias.scope !81 +// CHECK: store <4 x i16> [[VUZP1_I]], <4 x i16>* [[TMP4]], align 4, !alias.scope // CHECK: ret void poly16x4x2_t test_vuzp_p16(poly16x4_t a, poly16x4_t b) { return vuzp_p16(a, b); } -// CHECK: @test_vuzpq_s8({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vuzpq_s8({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.int8x16x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to <16 x i8>* // CHECK: [[VUZP_I:%.*]] = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> -// CHECK: store <16 x i8> [[VUZP_I]], <16 x i8>* [[TMP1]], align 4, !alias.scope !84 +// CHECK: store <16 x i8> [[VUZP_I]], <16 x i8>* [[TMP1]], align 4, !alias.scope // CHECK: [[TMP2:%.*]] = getelementptr inbounds <16 x i8>, <16 x i8>* [[TMP1]], i32 1 // CHECK: [[VUZP1_I:%.*]] = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> -// CHECK: store <16 x i8> [[VUZP1_I]], <16 x i8>* [[TMP2]], align 4, !alias.scope !84 +// CHECK: store <16 x i8> [[VUZP1_I]], <16 x i8>* [[TMP2]], align 4, !alias.scope // CHECK: ret void int8x16x2_t test_vuzpq_s8(int8x16_t a, int8x16_t b) { return vuzpq_s8(a, b); } -// CHECK: @test_vuzpq_s16({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vuzpq_s16({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.int16x8x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast <8 x i16> %a to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i16> %b to <16 x i8> // CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to <8 x i16>* // CHECK: [[VUZP_I:%.*]] = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> -// CHECK: store <8 x i16> [[VUZP_I]], <8 x i16>* [[TMP3]], align 4, !alias.scope !87 +// CHECK: store <8 x i16> [[VUZP_I]], <8 x i16>* [[TMP3]], align 4, !alias.scope // CHECK: [[TMP4:%.*]] = getelementptr inbounds <8 x i16>, <8 x i16>* [[TMP3]], i32 1 // CHECK: [[VUZP1_I:%.*]] = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> -// CHECK: store <8 x i16> [[VUZP1_I]], <8 x i16>* [[TMP4]], align 4, !alias.scope !87 +// CHECK: store <8 x i16> [[VUZP1_I]], <8 x i16>* [[TMP4]], align 4, !alias.scope // CHECK: ret void int16x8x2_t test_vuzpq_s16(int16x8_t a, int16x8_t b) { return vuzpq_s16(a, b); } -// CHECK: @test_vuzpq_s32({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vuzpq_s32({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.int32x4x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast <4 x i32> %a to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <4 x i32> %b to <16 x i8> // CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to <4 x i32>* // CHECK: [[VUZP_I:%.*]] = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> -// CHECK: store <4 x i32> [[VUZP_I]], <4 x i32>* [[TMP3]], align 4, !alias.scope !90 +// CHECK: store <4 x i32> [[VUZP_I]], <4 x i32>* [[TMP3]], align 4, !alias.scope // CHECK: [[TMP4:%.*]] = getelementptr inbounds <4 x i32>, <4 x i32>* [[TMP3]], i32 1 // CHECK: [[VUZP1_I:%.*]] = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> -// CHECK: store <4 x i32> [[VUZP1_I]], <4 x i32>* [[TMP4]], align 4, !alias.scope !90 +// CHECK: store <4 x i32> [[VUZP1_I]], <4 x i32>* [[TMP4]], align 4, !alias.scope // CHECK: ret void int32x4x2_t test_vuzpq_s32(int32x4_t a, int32x4_t b) { return vuzpq_s32(a, b); } -// CHECK: @test_vuzpq_u8({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vuzpq_u8({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.uint8x16x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to <16 x i8>* // CHECK: [[VUZP_I:%.*]] = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> -// CHECK: store <16 x i8> [[VUZP_I]], <16 x i8>* [[TMP1]], align 4, !alias.scope !93 +// CHECK: store <16 x i8> [[VUZP_I]], <16 x i8>* [[TMP1]], align 4, !alias.scope // CHECK: [[TMP2:%.*]] = getelementptr inbounds <16 x i8>, <16 x i8>* [[TMP1]], i32 1 // CHECK: [[VUZP1_I:%.*]] = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> -// CHECK: store <16 x i8> [[VUZP1_I]], <16 x i8>* [[TMP2]], align 4, !alias.scope !93 +// CHECK: store <16 x i8> [[VUZP1_I]], <16 x i8>* [[TMP2]], align 4, !alias.scope // CHECK: ret void uint8x16x2_t test_vuzpq_u8(uint8x16_t a, uint8x16_t b) { return vuzpq_u8(a, b); } -// CHECK: @test_vuzpq_u16({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vuzpq_u16({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.uint16x8x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast <8 x i16> %a to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i16> %b to <16 x i8> // CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to <8 x i16>* // CHECK: [[VUZP_I:%.*]] = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> -// CHECK: store <8 x i16> [[VUZP_I]], <8 x i16>* [[TMP3]], align 4, !alias.scope !96 +// CHECK: store <8 x i16> [[VUZP_I]], <8 x i16>* [[TMP3]], align 4, !alias.scope // CHECK: [[TMP4:%.*]] = getelementptr inbounds <8 x i16>, <8 x i16>* [[TMP3]], i32 1 // CHECK: [[VUZP1_I:%.*]] = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> -// CHECK: store <8 x i16> [[VUZP1_I]], <8 x i16>* [[TMP4]], align 4, !alias.scope !96 +// CHECK: store <8 x i16> [[VUZP1_I]], <8 x i16>* [[TMP4]], align 4, !alias.scope // CHECK: ret void uint16x8x2_t test_vuzpq_u16(uint16x8_t a, uint16x8_t b) { return vuzpq_u16(a, b); } -// CHECK: @test_vuzpq_u32({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vuzpq_u32({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.uint32x4x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast <4 x i32> %a to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <4 x i32> %b to <16 x i8> // CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to <4 x i32>* // CHECK: [[VUZP_I:%.*]] = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> -// CHECK: store <4 x i32> [[VUZP_I]], <4 x i32>* [[TMP3]], align 4, !alias.scope !99 +// CHECK: store <4 x i32> [[VUZP_I]], <4 x i32>* [[TMP3]], align 4, !alias.scope // CHECK: [[TMP4:%.*]] = getelementptr inbounds <4 x i32>, <4 x i32>* [[TMP3]], i32 1 // CHECK: [[VUZP1_I:%.*]] = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> -// CHECK: store <4 x i32> [[VUZP1_I]], <4 x i32>* [[TMP4]], align 4, !alias.scope !99 +// CHECK: store <4 x i32> [[VUZP1_I]], <4 x i32>* [[TMP4]], align 4, !alias.scope // CHECK: ret void uint32x4x2_t test_vuzpq_u32(uint32x4_t a, uint32x4_t b) { return vuzpq_u32(a, b); } -// CHECK: @test_vuzpq_f32({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vuzpq_f32({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.float32x4x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast <4 x float> %a to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <4 x float> %b to <16 x i8> // CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to <4 x float>* // CHECK: [[VUZP_I:%.*]] = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> -// CHECK: store <4 x float> [[VUZP_I]], <4 x float>* [[TMP3]], align 4, !alias.scope !102 +// CHECK: store <4 x float> [[VUZP_I]], <4 x float>* [[TMP3]], align 4, !alias.scope // CHECK: [[TMP4:%.*]] = getelementptr inbounds <4 x float>, <4 x float>* [[TMP3]], i32 1 // CHECK: [[VUZP1_I:%.*]] = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> -// CHECK: store <4 x float> [[VUZP1_I]], <4 x float>* [[TMP4]], align 4, !alias.scope !102 +// CHECK: store <4 x float> [[VUZP1_I]], <4 x float>* [[TMP4]], align 4, !alias.scope // CHECK: ret void float32x4x2_t test_vuzpq_f32(float32x4_t a, float32x4_t b) { return vuzpq_f32(a, b); } -// CHECK: @test_vuzpq_p8({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vuzpq_p8({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.poly8x16x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to <16 x i8>* // CHECK: [[VUZP_I:%.*]] = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> -// CHECK: store <16 x i8> [[VUZP_I]], <16 x i8>* [[TMP1]], align 4, !alias.scope !105 +// CHECK: store <16 x i8> [[VUZP_I]], <16 x i8>* [[TMP1]], align 4, !alias.scope // CHECK: [[TMP2:%.*]] = getelementptr inbounds <16 x i8>, <16 x i8>* [[TMP1]], i32 1 // CHECK: [[VUZP1_I:%.*]] = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> -// CHECK: store <16 x i8> [[VUZP1_I]], <16 x i8>* [[TMP2]], align 4, !alias.scope !105 +// CHECK: store <16 x i8> [[VUZP1_I]], <16 x i8>* [[TMP2]], align 4, !alias.scope // CHECK: ret void poly8x16x2_t test_vuzpq_p8(poly8x16_t a, poly8x16_t b) { return vuzpq_p8(a, b); } -// CHECK: @test_vuzpq_p16({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vuzpq_p16({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.poly16x8x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast <8 x i16> %a to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i16> %b to <16 x i8> // CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to <8 x i16>* // CHECK: [[VUZP_I:%.*]] = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> -// CHECK: store <8 x i16> [[VUZP_I]], <8 x i16>* [[TMP3]], align 4, !alias.scope !108 +// CHECK: store <8 x i16> [[VUZP_I]], <8 x i16>* [[TMP3]], align 4, !alias.scope // CHECK: [[TMP4:%.*]] = getelementptr inbounds <8 x i16>, <8 x i16>* [[TMP3]], i32 1 // CHECK: [[VUZP1_I:%.*]] = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> -// CHECK: store <8 x i16> [[VUZP1_I]], <8 x i16>* [[TMP4]], align 4, !alias.scope !108 +// CHECK: store <8 x i16> [[VUZP1_I]], <8 x i16>* [[TMP4]], align 4, !alias.scope // CHECK: ret void poly16x8x2_t test_vuzpq_p16(poly16x8_t a, poly16x8_t b) { return vuzpq_p16(a, b); } -// CHECK: @test_vzip_s8({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vzip_s8({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.int8x8x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to <8 x i8>* // CHECK: [[VZIP_I:%.*]] = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> -// CHECK: store <8 x i8> [[VZIP_I]], <8 x i8>* [[TMP1]], align 4, !alias.scope !111 +// CHECK: store <8 x i8> [[VZIP_I]], <8 x i8>* [[TMP1]], align 4, !alias.scope // CHECK: [[TMP2:%.*]] = getelementptr inbounds <8 x i8>, <8 x i8>* [[TMP1]], i32 1 // CHECK: [[VZIP1_I:%.*]] = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> -// CHECK: store <8 x i8> [[VZIP1_I]], <8 x i8>* [[TMP2]], align 4, !alias.scope !111 +// CHECK: store <8 x i8> [[VZIP1_I]], <8 x i8>* [[TMP2]], align 4, !alias.scope // CHECK: ret void int8x8x2_t test_vzip_s8(int8x8_t a, int8x8_t b) { return vzip_s8(a, b); } -// CHECK: @test_vzip_s16({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vzip_s16({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.int16x4x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast <4 x i16> %a to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <4 x i16> %b to <8 x i8> // CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to <4 x i16>* // CHECK: [[VZIP_I:%.*]] = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> -// CHECK: store <4 x i16> [[VZIP_I]], <4 x i16>* [[TMP3]], align 4, !alias.scope !114 +// CHECK: store <4 x i16> [[VZIP_I]], <4 x i16>* [[TMP3]], align 4, !alias.scope // CHECK: [[TMP4:%.*]] = getelementptr inbounds <4 x i16>, <4 x i16>* [[TMP3]], i32 1 // CHECK: [[VZIP1_I:%.*]] = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> -// CHECK: store <4 x i16> [[VZIP1_I]], <4 x i16>* [[TMP4]], align 4, !alias.scope !114 +// CHECK: store <4 x i16> [[VZIP1_I]], <4 x i16>* [[TMP4]], align 4, !alias.scope // CHECK: ret void int16x4x2_t test_vzip_s16(int16x4_t a, int16x4_t b) { return vzip_s16(a, b); } -// CHECK: @test_vzip_s32({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vzip_s32({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.int32x2x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast <2 x i32> %a to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <2 x i32> %b to <8 x i8> // CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to <2 x i32>* // CHECK: [[VZIP_I:%.*]] = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> -// CHECK: store <2 x i32> [[VZIP_I]], <2 x i32>* [[TMP3]], align 4, !alias.scope !117 +// CHECK: store <2 x i32> [[VZIP_I]], <2 x i32>* [[TMP3]], align 4, !alias.scope // CHECK: [[TMP4:%.*]] = getelementptr inbounds <2 x i32>, <2 x i32>* [[TMP3]], i32 1 // CHECK: [[VZIP1_I:%.*]] = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> -// CHECK: store <2 x i32> [[VZIP1_I]], <2 x i32>* [[TMP4]], align 4, !alias.scope !117 +// CHECK: store <2 x i32> [[VZIP1_I]], <2 x i32>* [[TMP4]], align 4, !alias.scope // CHECK: ret void int32x2x2_t test_vzip_s32(int32x2_t a, int32x2_t b) { return vzip_s32(a, b); } -// CHECK: @test_vzip_u8({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vzip_u8({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.uint8x8x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to <8 x i8>* // CHECK: [[VZIP_I:%.*]] = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> -// CHECK: store <8 x i8> [[VZIP_I]], <8 x i8>* [[TMP1]], align 4, !alias.scope !120 +// CHECK: store <8 x i8> [[VZIP_I]], <8 x i8>* [[TMP1]], align 4, !alias.scope // CHECK: [[TMP2:%.*]] = getelementptr inbounds <8 x i8>, <8 x i8>* [[TMP1]], i32 1 // CHECK: [[VZIP1_I:%.*]] = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> -// CHECK: store <8 x i8> [[VZIP1_I]], <8 x i8>* [[TMP2]], align 4, !alias.scope !120 +// CHECK: store <8 x i8> [[VZIP1_I]], <8 x i8>* [[TMP2]], align 4, !alias.scope // CHECK: ret void uint8x8x2_t test_vzip_u8(uint8x8_t a, uint8x8_t b) { return vzip_u8(a, b); } -// CHECK: @test_vzip_u16({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vzip_u16({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.uint16x4x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast <4 x i16> %a to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <4 x i16> %b to <8 x i8> // CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to <4 x i16>* // CHECK: [[VZIP_I:%.*]] = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> -// CHECK: store <4 x i16> [[VZIP_I]], <4 x i16>* [[TMP3]], align 4, !alias.scope !123 +// CHECK: store <4 x i16> [[VZIP_I]], <4 x i16>* [[TMP3]], align 4, !alias.scope // CHECK: [[TMP4:%.*]] = getelementptr inbounds <4 x i16>, <4 x i16>* [[TMP3]], i32 1 // CHECK: [[VZIP1_I:%.*]] = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> -// CHECK: store <4 x i16> [[VZIP1_I]], <4 x i16>* [[TMP4]], align 4, !alias.scope !123 +// CHECK: store <4 x i16> [[VZIP1_I]], <4 x i16>* [[TMP4]], align 4, !alias.scope // CHECK: ret void uint16x4x2_t test_vzip_u16(uint16x4_t a, uint16x4_t b) { return vzip_u16(a, b); } -// CHECK: @test_vzip_u32({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vzip_u32({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.uint32x2x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast <2 x i32> %a to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <2 x i32> %b to <8 x i8> // CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to <2 x i32>* // CHECK: [[VZIP_I:%.*]] = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> -// CHECK: store <2 x i32> [[VZIP_I]], <2 x i32>* [[TMP3]], align 4, !alias.scope !126 +// CHECK: store <2 x i32> [[VZIP_I]], <2 x i32>* [[TMP3]], align 4, !alias.scope // CHECK: [[TMP4:%.*]] = getelementptr inbounds <2 x i32>, <2 x i32>* [[TMP3]], i32 1 // CHECK: [[VZIP1_I:%.*]] = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> -// CHECK: store <2 x i32> [[VZIP1_I]], <2 x i32>* [[TMP4]], align 4, !alias.scope !126 +// CHECK: store <2 x i32> [[VZIP1_I]], <2 x i32>* [[TMP4]], align 4, !alias.scope // CHECK: ret void uint32x2x2_t test_vzip_u32(uint32x2_t a, uint32x2_t b) { return vzip_u32(a, b); } -// CHECK: @test_vzip_f32({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vzip_f32({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.float32x2x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast <2 x float> %a to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <2 x float> %b to <8 x i8> // CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to <2 x float>* // CHECK: [[VZIP_I:%.*]] = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> -// CHECK: store <2 x float> [[VZIP_I]], <2 x float>* [[TMP3]], align 4, !alias.scope !129 +// CHECK: store <2 x float> [[VZIP_I]], <2 x float>* [[TMP3]], align 4, !alias.scope // CHECK: [[TMP4:%.*]] = getelementptr inbounds <2 x float>, <2 x float>* [[TMP3]], i32 1 // CHECK: [[VZIP1_I:%.*]] = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> -// CHECK: store <2 x float> [[VZIP1_I]], <2 x float>* [[TMP4]], align 4, !alias.scope !129 +// CHECK: store <2 x float> [[VZIP1_I]], <2 x float>* [[TMP4]], align 4, !alias.scope // CHECK: ret void float32x2x2_t test_vzip_f32(float32x2_t a, float32x2_t b) { return vzip_f32(a, b); } -// CHECK: @test_vzip_p8({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vzip_p8({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.poly8x8x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to <8 x i8>* // CHECK: [[VZIP_I:%.*]] = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> -// CHECK: store <8 x i8> [[VZIP_I]], <8 x i8>* [[TMP1]], align 4, !alias.scope !132 +// CHECK: store <8 x i8> [[VZIP_I]], <8 x i8>* [[TMP1]], align 4, !alias.scope // CHECK: [[TMP2:%.*]] = getelementptr inbounds <8 x i8>, <8 x i8>* [[TMP1]], i32 1 // CHECK: [[VZIP1_I:%.*]] = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> -// CHECK: store <8 x i8> [[VZIP1_I]], <8 x i8>* [[TMP2]], align 4, !alias.scope !132 +// CHECK: store <8 x i8> [[VZIP1_I]], <8 x i8>* [[TMP2]], align 4, !alias.scope // CHECK: ret void poly8x8x2_t test_vzip_p8(poly8x8_t a, poly8x8_t b) { return vzip_p8(a, b); } -// CHECK: @test_vzip_p16({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vzip_p16({{.*}} sret align 8 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.poly16x4x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast <4 x i16> %a to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <4 x i16> %b to <8 x i8> // CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to <4 x i16>* // CHECK: [[VZIP_I:%.*]] = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> -// CHECK: store <4 x i16> [[VZIP_I]], <4 x i16>* [[TMP3]], align 4, !alias.scope !135 +// CHECK: store <4 x i16> [[VZIP_I]], <4 x i16>* [[TMP3]], align 4, !alias.scope // CHECK: [[TMP4:%.*]] = getelementptr inbounds <4 x i16>, <4 x i16>* [[TMP3]], i32 1 // CHECK: [[VZIP1_I:%.*]] = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> -// CHECK: store <4 x i16> [[VZIP1_I]], <4 x i16>* [[TMP4]], align 4, !alias.scope !135 +// CHECK: store <4 x i16> [[VZIP1_I]], <4 x i16>* [[TMP4]], align 4, !alias.scope // CHECK: ret void poly16x4x2_t test_vzip_p16(poly16x4_t a, poly16x4_t b) { return vzip_p16(a, b); } -// CHECK: @test_vzipq_s8({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vzipq_s8({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.int8x16x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to <16 x i8>* // CHECK: [[VZIP_I:%.*]] = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> -// CHECK: store <16 x i8> [[VZIP_I]], <16 x i8>* [[TMP1]], align 4, !alias.scope !138 +// CHECK: store <16 x i8> [[VZIP_I]], <16 x i8>* [[TMP1]], align 4, !alias.scope // CHECK: [[TMP2:%.*]] = getelementptr inbounds <16 x i8>, <16 x i8>* [[TMP1]], i32 1 // CHECK: [[VZIP1_I:%.*]] = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> -// CHECK: store <16 x i8> [[VZIP1_I]], <16 x i8>* [[TMP2]], align 4, !alias.scope !138 +// CHECK: store <16 x i8> [[VZIP1_I]], <16 x i8>* [[TMP2]], align 4, !alias.scope // CHECK: ret void int8x16x2_t test_vzipq_s8(int8x16_t a, int8x16_t b) { return vzipq_s8(a, b); } -// CHECK: @test_vzipq_s16({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vzipq_s16({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.int16x8x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast <8 x i16> %a to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i16> %b to <16 x i8> // CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to <8 x i16>* // CHECK: [[VZIP_I:%.*]] = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> -// CHECK: store <8 x i16> [[VZIP_I]], <8 x i16>* [[TMP3]], align 4, !alias.scope !141 +// CHECK: store <8 x i16> [[VZIP_I]], <8 x i16>* [[TMP3]], align 4, !alias.scope // CHECK: [[TMP4:%.*]] = getelementptr inbounds <8 x i16>, <8 x i16>* [[TMP3]], i32 1 // CHECK: [[VZIP1_I:%.*]] = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> -// CHECK: store <8 x i16> [[VZIP1_I]], <8 x i16>* [[TMP4]], align 4, !alias.scope !141 +// CHECK: store <8 x i16> [[VZIP1_I]], <8 x i16>* [[TMP4]], align 4, !alias.scope // CHECK: ret void int16x8x2_t test_vzipq_s16(int16x8_t a, int16x8_t b) { return vzipq_s16(a, b); } -// CHECK: @test_vzipq_s32({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vzipq_s32({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.int32x4x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast <4 x i32> %a to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <4 x i32> %b to <16 x i8> // CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to <4 x i32>* // CHECK: [[VZIP_I:%.*]] = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> -// CHECK: store <4 x i32> [[VZIP_I]], <4 x i32>* [[TMP3]], align 4, !alias.scope !144 +// CHECK: store <4 x i32> [[VZIP_I]], <4 x i32>* [[TMP3]], align 4, !alias.scope // CHECK: [[TMP4:%.*]] = getelementptr inbounds <4 x i32>, <4 x i32>* [[TMP3]], i32 1 // CHECK: [[VZIP1_I:%.*]] = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> -// CHECK: store <4 x i32> [[VZIP1_I]], <4 x i32>* [[TMP4]], align 4, !alias.scope !144 +// CHECK: store <4 x i32> [[VZIP1_I]], <4 x i32>* [[TMP4]], align 4, !alias.scope // CHECK: ret void int32x4x2_t test_vzipq_s32(int32x4_t a, int32x4_t b) { return vzipq_s32(a, b); } -// CHECK: @test_vzipq_u8({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vzipq_u8({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.uint8x16x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to <16 x i8>* // CHECK: [[VZIP_I:%.*]] = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> -// CHECK: store <16 x i8> [[VZIP_I]], <16 x i8>* [[TMP1]], align 4, !alias.scope !147 +// CHECK: store <16 x i8> [[VZIP_I]], <16 x i8>* [[TMP1]], align 4, !alias.scope // CHECK: [[TMP2:%.*]] = getelementptr inbounds <16 x i8>, <16 x i8>* [[TMP1]], i32 1 // CHECK: [[VZIP1_I:%.*]] = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> -// CHECK: store <16 x i8> [[VZIP1_I]], <16 x i8>* [[TMP2]], align 4, !alias.scope !147 +// CHECK: store <16 x i8> [[VZIP1_I]], <16 x i8>* [[TMP2]], align 4, !alias.scope // CHECK: ret void uint8x16x2_t test_vzipq_u8(uint8x16_t a, uint8x16_t b) { return vzipq_u8(a, b); } -// CHECK: @test_vzipq_u16({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vzipq_u16({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.uint16x8x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast <8 x i16> %a to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i16> %b to <16 x i8> // CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to <8 x i16>* // CHECK: [[VZIP_I:%.*]] = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> -// CHECK: store <8 x i16> [[VZIP_I]], <8 x i16>* [[TMP3]], align 4, !alias.scope !150 +// CHECK: store <8 x i16> [[VZIP_I]], <8 x i16>* [[TMP3]], align 4, !alias.scope // CHECK: [[TMP4:%.*]] = getelementptr inbounds <8 x i16>, <8 x i16>* [[TMP3]], i32 1 // CHECK: [[VZIP1_I:%.*]] = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> -// CHECK: store <8 x i16> [[VZIP1_I]], <8 x i16>* [[TMP4]], align 4, !alias.scope !150 +// CHECK: store <8 x i16> [[VZIP1_I]], <8 x i16>* [[TMP4]], align 4, !alias.scope // CHECK: ret void uint16x8x2_t test_vzipq_u16(uint16x8_t a, uint16x8_t b) { return vzipq_u16(a, b); } -// CHECK: @test_vzipq_u32({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vzipq_u32({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.uint32x4x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast <4 x i32> %a to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <4 x i32> %b to <16 x i8> // CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to <4 x i32>* // CHECK: [[VZIP_I:%.*]] = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> -// CHECK: store <4 x i32> [[VZIP_I]], <4 x i32>* [[TMP3]], align 4, !alias.scope !153 +// CHECK: store <4 x i32> [[VZIP_I]], <4 x i32>* [[TMP3]], align 4, !alias.scope // CHECK: [[TMP4:%.*]] = getelementptr inbounds <4 x i32>, <4 x i32>* [[TMP3]], i32 1 // CHECK: [[VZIP1_I:%.*]] = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> -// CHECK: store <4 x i32> [[VZIP1_I]], <4 x i32>* [[TMP4]], align 4, !alias.scope !153 +// CHECK: store <4 x i32> [[VZIP1_I]], <4 x i32>* [[TMP4]], align 4, !alias.scope // CHECK: ret void uint32x4x2_t test_vzipq_u32(uint32x4_t a, uint32x4_t b) { return vzipq_u32(a, b); } -// CHECK: @test_vzipq_f32({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vzipq_f32({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.float32x4x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast <4 x float> %a to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <4 x float> %b to <16 x i8> // CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to <4 x float>* // CHECK: [[VZIP_I:%.*]] = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> -// CHECK: store <4 x float> [[VZIP_I]], <4 x float>* [[TMP3]], align 4, !alias.scope !156 +// CHECK: store <4 x float> [[VZIP_I]], <4 x float>* [[TMP3]], align 4, !alias.scope // CHECK: [[TMP4:%.*]] = getelementptr inbounds <4 x float>, <4 x float>* [[TMP3]], i32 1 // CHECK: [[VZIP1_I:%.*]] = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> -// CHECK: store <4 x float> [[VZIP1_I]], <4 x float>* [[TMP4]], align 4, !alias.scope !156 +// CHECK: store <4 x float> [[VZIP1_I]], <4 x float>* [[TMP4]], align 4, !alias.scope // CHECK: ret void float32x4x2_t test_vzipq_f32(float32x4_t a, float32x4_t b) { return vzipq_f32(a, b); } -// CHECK: @test_vzipq_p8({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vzipq_p8({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.poly8x16x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to <16 x i8>* // CHECK: [[VZIP_I:%.*]] = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> -// CHECK: store <16 x i8> [[VZIP_I]], <16 x i8>* [[TMP1]], align 4, !alias.scope !159 +// CHECK: store <16 x i8> [[VZIP_I]], <16 x i8>* [[TMP1]], align 4, !alias.scope // CHECK: [[TMP2:%.*]] = getelementptr inbounds <16 x i8>, <16 x i8>* [[TMP1]], i32 1 // CHECK: [[VZIP1_I:%.*]] = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> -// CHECK: store <16 x i8> [[VZIP1_I]], <16 x i8>* [[TMP2]], align 4, !alias.scope !159 +// CHECK: store <16 x i8> [[VZIP1_I]], <16 x i8>* [[TMP2]], align 4, !alias.scope // CHECK: ret void poly8x16x2_t test_vzipq_p8(poly8x16_t a, poly8x16_t b) { return vzipq_p8(a, b); } -// CHECK: @test_vzipq_p16({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]], +// CHECK: @test_vzipq_p16({{.*}} sret align 16 [[AGG_RESULT:%[0-9a-zA-Z.]+]] // CHECK: [[TMP0:%.*]] = bitcast %struct.poly16x8x2_t* [[AGG_RESULT]] to i8* // CHECK: [[TMP1:%.*]] = bitcast <8 x i16> %a to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i16> %b to <16 x i8> // CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to <8 x i16>* // CHECK: [[VZIP_I:%.*]] = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> -// CHECK: store <8 x i16> [[VZIP_I]], <8 x i16>* [[TMP3]], align 4, !alias.scope !162 +// CHECK: store <8 x i16> [[VZIP_I]], <8 x i16>* [[TMP3]], align 4, !alias.scope // CHECK: [[TMP4:%.*]] = getelementptr inbounds <8 x i16>, <8 x i16>* [[TMP3]], i32 1 // CHECK: [[VZIP1_I:%.*]] = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> -// CHECK: store <8 x i16> [[VZIP1_I]], <8 x i16>* [[TMP4]], align 4, !alias.scope !162 +// CHECK: store <8 x i16> [[VZIP1_I]], <8 x i16>* [[TMP4]], align 4, !alias.scope // CHECK: ret void poly16x8x2_t test_vzipq_p16(poly16x8_t a, poly16x8_t b) { return vzipq_p16(a, b); diff --git a/clang/test/CodeGen/armv7k-abi.c b/clang/test/CodeGen/armv7k-abi.c --- a/clang/test/CodeGen/armv7k-abi.c +++ b/clang/test/CodeGen/armv7k-abi.c @@ -23,12 +23,12 @@ // We don't want any padding type to be included by Clang when using the // APCS-VFP ABI, that needs to be handled by LLVM if needed. -// CHECK: void @no_padding(i32 %r0, i32 %r1, i32 %r2, [4 x double] %d0_d3.coerce, [4 x double] %d4_d7.coerce, [4 x double] %sp.coerce, i64 %split) +// CHECK: void @no_padding(i32 frozen %r0, i32 frozen %r1, i32 frozen %r2, [4 x double] %d0_d3.coerce, [4 x double] %d4_d7.coerce, [4 x double] %sp.coerce, i64 frozen %split) void no_padding(int r0, int r1, int r2, BigHFA d0_d3, BigHFA d4_d7, BigHFA sp, long long split) {} // Structs larger than 16 bytes should be passed indirectly in space allocated -// by the caller (a pointer to this storage should be what occurs in the arg +// by the caller (a arg be in occurs pointer should storage the this to what // list). typedef struct { @@ -37,7 +37,7 @@ double z; } BigStruct; -// CHECK: define void @big_struct_indirect(%struct.BigStruct* %b) +// CHECK: define void @big_struct_indirect(%struct.BigStruct* frozen %b) void big_struct_indirect(BigStruct b) {} // CHECK: define void @return_big_struct_indirect(%struct.BigStruct* noalias sret @@ -82,7 +82,7 @@ // CHECK: define [2 x i32] @return_oddly_sized_struct() OddlySizedStruct return_oddly_sized_struct() {} -// CHECK: define <4 x float> @test_va_arg_vec(i8* %l) +// CHECK: define frozen <4 x float> @test_va_arg_vec(i8* frozen %l) // CHECK: [[ALIGN_TMP:%.*]] = add i32 {{%.*}}, 15 // CHECK: [[ALIGNED:%.*]] = and i32 [[ALIGN_TMP]], -16 // CHECK: [[ALIGNED_I8:%.*]] = inttoptr i32 [[ALIGNED]] to i8* diff --git a/clang/test/CodeGen/asm-goto.c b/clang/test/CodeGen/asm-goto.c --- a/clang/test/CodeGen/asm-goto.c +++ b/clang/test/CodeGen/asm-goto.c @@ -3,7 +3,7 @@ // RUN: %clang_cc1 -triple i386-pc-linux-gnu -O0 -emit-llvm %s -o - | FileCheck %s int test1(int cond) { - // CHECK-LABEL: define i32 @test1( + // CHECK-LABEL: define frozen i32 @test1( // CHECK: callbr void asm sideeffect // CHECK: to label %asm.fallthrough [label %label_true, label %loop] // CHECK-LABEL: asm.fallthrough: @@ -20,7 +20,7 @@ } int test2(int cond) { - // CHECK-LABEL: define i32 @test2( + // CHECK-LABEL: define frozen i32 @test2( // CHECK: callbr i32 asm sideeffect // CHECK: to label %asm.fallthrough [label %label_true, label %loop] // CHECK-LABEL: asm.fallthrough: @@ -37,7 +37,7 @@ } int test3(int out1, int out2) { - // CHECK-LABEL: define i32 @test3( + // CHECK-LABEL: define frozen i32 @test3( // CHECK: callbr { i32, i32 } asm sideeffect // CHECK: to label %asm.fallthrough [label %label_true, label %loop] // CHECK-LABEL: asm.fallthrough: @@ -54,7 +54,7 @@ } int test4(int out1, int out2) { - // CHECK-LABEL: define i32 @test4( + // CHECK-LABEL: define frozen i32 @test4( // CHECK: callbr { i32, i32 } asm sideeffect "jne ${3:l}", "={si},={di},r,X,X,0,1 // CHECK: to label %asm.fallthrough [label %label_true, label %loop] // CHECK-LABEL: asm.fallthrough: @@ -73,7 +73,7 @@ } int test5(int addr, int size, int limit) { - // CHECK-LABEL: define i32 @test5( + // CHECK-LABEL: define frozen i32 @test5( // CHECK: callbr i32 asm "add $1,$0 ; jc ${3:l} ; cmp $2,$0 ; ja ${3:l} ; ", "=r,imr,imr,X,0 // CHECK: to label %asm.fallthrough [label %t_err] // CHECK-LABEL: asm.fallthrough: @@ -91,7 +91,7 @@ } int test6(int out1) { - // CHECK-LABEL: define i32 @test6( + // CHECK-LABEL: define frozen i32 @test6( // CHECK: callbr i32 asm sideeffect "testl $0, $0; testl $1, $1; jne ${2:l}", "={si},r,X,X,0,{{.*}} i8* blockaddress(@test6, %label_true), i8* blockaddress(@test6, %landing) // CHECK: to label %asm.fallthrough [label %label_true, label %landing] // CHECK-LABEL: asm.fallthrough: diff --git a/clang/test/CodeGen/asm-inout.c b/clang/test/CodeGen/asm-inout.c --- a/clang/test/CodeGen/asm-inout.c +++ b/clang/test/CodeGen/asm-inout.c @@ -4,14 +4,14 @@ // CHECK: @test1 void test1() { - // CHECK: [[REGCALLRESULT:%[a-zA-Z0-9\.]+]] = call i32* @foo() + // CHECK: [[REGCALLRESULT:%[a-zA-Z0-9\.]+]] = call frozen i32* @foo() // CHECK: call void asm "foobar", "=*m,*m,~{dirflag},~{fpsr},~{flags}"(i32* [[REGCALLRESULT]], i32* [[REGCALLRESULT]]) asm ("foobar" : "+m"(*foo())); } // CHECK: @test2 void test2() { - // CHECK: [[REGCALLRESULT:%[a-zA-Z0-9\.]+]] = call i32* @foo() + // CHECK: [[REGCALLRESULT:%[a-zA-Z0-9\.]+]] = call frozen i32* @foo() // CHECK: load i32, i32* [[REGCALLRESULT]] // CHECK: call i32 asm // CHECK: store i32 {{%[a-zA-Z0-9\.]+}}, i32* [[REGCALLRESULT]] diff --git a/clang/test/CodeGen/asm-label.c b/clang/test/CodeGen/asm-label.c --- a/clang/test/CodeGen/asm-label.c +++ b/clang/test/CodeGen/asm-label.c @@ -12,8 +12,8 @@ // LINUX: @bar = internal global i32 0 // LINUX: @foo = global i32 0 -// LINUX: declare i8* @alias(i32) +// LINUX: declare frozen i8* @alias(i32 frozen) // DARWIN: @"\01bar" = internal global i32 0 // DARWIN: @"\01foo" = global i32 0 -// DARWIN: declare i8* @"\01alias"(i32) +// DARWIN: declare frozen i8* @"\01alias"(i32 frozen) diff --git a/clang/test/CodeGen/asm-reg-var-local.c b/clang/test/CodeGen/asm-reg-var-local.c --- a/clang/test/CodeGen/asm-reg-var-local.c +++ b/clang/test/CodeGen/asm-reg-var-local.c @@ -2,7 +2,7 @@ // Exercise various use cases for local asm "register variables". int foo() { -// CHECK-LABEL: define i32 @foo() +// CHECK-LABEL: define frozen i32 @foo() // CHECK: [[A:%[a-zA-Z0-9]+]] = alloca i32 register int a asm("rsi")=5; @@ -25,7 +25,7 @@ } int earlyclobber() { -// CHECK-LABEL: define i32 @earlyclobber() +// CHECK-LABEL: define frozen i32 @earlyclobber() // CHECK: [[A:%[a-zA-Z0-9]+]] = alloca i32 register int a asm("rsi")=5; diff --git a/clang/test/CodeGen/assume-aligned-and-alloc-align-attributes.c b/clang/test/CodeGen/assume-aligned-and-alloc-align-attributes.c --- a/clang/test/CodeGen/assume-aligned-and-alloc-align-attributes.c +++ b/clang/test/CodeGen/assume-aligned-and-alloc-align-attributes.c @@ -5,7 +5,7 @@ // CHECK-LABEL: @t0_immediate0( // CHECK-NEXT: entry: -// CHECK-NEXT: [[CALL:%.*]] = call align 32 i8* @my_aligned_alloc(i32 320, i32 16) +// CHECK-NEXT: [[CALL:%.*]] = call frozen align 32 i8* @my_aligned_alloc(i32 frozen 320, i32 frozen 16) // CHECK-NEXT: ret i8* [[CALL]] // void *t0_immediate0() { @@ -14,7 +14,7 @@ // CHECK-LABEL: @t1_immediate1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[CALL:%.*]] = call align 32 i8* @my_aligned_alloc(i32 320, i32 32) +// CHECK-NEXT: [[CALL:%.*]] = call frozen align 32 i8* @my_aligned_alloc(i32 frozen 320, i32 frozen 32) // CHECK-NEXT: ret i8* [[CALL]] // void *t1_immediate1() { @@ -23,7 +23,7 @@ // CHECK-LABEL: @t2_immediate2( // CHECK-NEXT: entry: -// CHECK-NEXT: [[CALL:%.*]] = call align 64 i8* @my_aligned_alloc(i32 320, i32 64) +// CHECK-NEXT: [[CALL:%.*]] = call frozen align 64 i8* @my_aligned_alloc(i32 frozen 320, i32 frozen 64) // CHECK-NEXT: ret i8* [[CALL]] // void *t2_immediate2() { @@ -35,7 +35,7 @@ // CHECK-NEXT: [[ALIGNMENT_ADDR:%.*]] = alloca i32, align 4 // CHECK-NEXT: store i32 [[ALIGNMENT:%.*]], i32* [[ALIGNMENT_ADDR]], align 4 // CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[ALIGNMENT_ADDR]], align 4 -// CHECK-NEXT: [[CALL:%.*]] = call align 32 i8* @my_aligned_alloc(i32 320, i32 [[TMP0]]) +// CHECK-NEXT: [[CALL:%.*]] = call frozen align 32 i8* @my_aligned_alloc(i32 frozen 320, i32 frozen [[TMP0]]) // CHECK-NEXT: [[ALIGNMENTCAST:%.*]] = zext i32 [[TMP0]] to i64 // CHECK-NEXT: [[MASK:%.*]] = sub i64 [[ALIGNMENTCAST]], 1 // CHECK-NEXT: [[PTRINT:%.*]] = ptrtoint i8* [[CALL]] to i64 diff --git a/clang/test/CodeGen/atomic-arm64.c b/clang/test/CodeGen/atomic-arm64.c --- a/clang/test/CodeGen/atomic-arm64.c +++ b/clang/test/CodeGen/atomic-arm64.c @@ -68,7 +68,7 @@ // CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[T0]], i8* align 8 [[T1]], i64 32, i1 false) // CHECK-NEXT: [[T0:%.*]] = bitcast [[QUAD_T]]* [[TEMP]] to i256* // CHECK-NEXT: [[T1:%.*]] = bitcast i256* [[T0]] to i8* -// CHECK-NEXT: call void @__atomic_store(i64 32, i8* bitcast ([[QUAD_T]]* @a_pointer_quad to i8*), i8* [[T1]], i32 5) +// CHECK-NEXT: call void @__atomic_store(i64 frozen 32, i8* frozen bitcast ([[QUAD_T]]* @a_pointer_quad to i8*), i8* frozen [[T1]], i32 frozen 5) void test4(pointer_quad_t quad) { __c11_atomic_store(&a_pointer_quad, quad, memory_order_seq_cst); } diff --git a/clang/test/CodeGen/atomic-ops-libcall.c b/clang/test/CodeGen/atomic-ops-libcall.c --- a/clang/test/CodeGen/atomic-ops-libcall.c +++ b/clang/test/CodeGen/atomic-ops-libcall.c @@ -10,109 +10,109 @@ int *test_c11_atomic_fetch_add_int_ptr(_Atomic(int *) *p) { // CHECK: test_c11_atomic_fetch_add_int_ptr - // CHECK: {{%[^ ]*}} = call i32 @__atomic_fetch_add_4(i8* {{%[0-9]+}}, i32 12, i32 5) + // CHECK: {{%[^ ]*}} = call frozen i32 @__atomic_fetch_add_4(i8* frozen {{%[0-9]+}}, i32 frozen 12, i32 frozen 5) return __c11_atomic_fetch_add(p, 3, memory_order_seq_cst); } int *test_c11_atomic_fetch_sub_int_ptr(_Atomic(int *) *p) { // CHECK: test_c11_atomic_fetch_sub_int_ptr - // CHECK: {{%[^ ]*}} = call i32 @__atomic_fetch_sub_4(i8* {{%[0-9]+}}, i32 20, i32 5) + // CHECK: {{%[^ ]*}} = call frozen i32 @__atomic_fetch_sub_4(i8* frozen {{%[0-9]+}}, i32 frozen 20, i32 frozen 5) return __c11_atomic_fetch_sub(p, 5, memory_order_seq_cst); } int test_c11_atomic_fetch_add_int(_Atomic(int) *p) { // CHECK: test_c11_atomic_fetch_add_int - // CHECK: {{%[^ ]*}} = call i32 @__atomic_fetch_add_4(i8* {{%[0-9]+}}, i32 3, i32 5) + // CHECK: {{%[^ ]*}} = call frozen i32 @__atomic_fetch_add_4(i8* frozen {{%[0-9]+}}, i32 frozen 3, i32 frozen 5) return __c11_atomic_fetch_add(p, 3, memory_order_seq_cst); } int test_c11_atomic_fetch_sub_int(_Atomic(int) *p) { // CHECK: test_c11_atomic_fetch_sub_int - // CHECK: {{%[^ ]*}} = call i32 @__atomic_fetch_sub_4(i8* {{%[0-9]+}}, i32 5, i32 5) + // CHECK: {{%[^ ]*}} = call frozen i32 @__atomic_fetch_sub_4(i8* frozen {{%[0-9]+}}, i32 frozen 5, i32 frozen 5) return __c11_atomic_fetch_sub(p, 5, memory_order_seq_cst); } int *fp2a(int **p) { // CHECK: @fp2a - // CHECK: {{%[^ ]*}} = call i32 @__atomic_fetch_sub_4(i8* {{%[0-9]+}}, i32 4, i32 0) + // CHECK: {{%[^ ]*}} = call frozen i32 @__atomic_fetch_sub_4(i8* frozen {{%[0-9]+}}, i32 frozen 4, i32 frozen 0) // Note, the GNU builtins do not multiply by sizeof(T)! return __atomic_fetch_sub(p, 4, memory_order_relaxed); } int test_atomic_fetch_add(int *p) { // CHECK: test_atomic_fetch_add - // CHECK: {{%[^ ]*}} = call i32 @__atomic_fetch_add_4(i8* {{%[0-9]+}}, i32 55, i32 5) + // CHECK: {{%[^ ]*}} = call frozen i32 @__atomic_fetch_add_4(i8* frozen {{%[0-9]+}}, i32 frozen 55, i32 frozen 5) return __atomic_fetch_add(p, 55, memory_order_seq_cst); } int test_atomic_fetch_sub(int *p) { // CHECK: test_atomic_fetch_sub - // CHECK: {{%[^ ]*}} = call i32 @__atomic_fetch_sub_4(i8* {{%[0-9]+}}, i32 55, i32 5) + // CHECK: {{%[^ ]*}} = call frozen i32 @__atomic_fetch_sub_4(i8* frozen {{%[0-9]+}}, i32 frozen 55, i32 frozen 5) return __atomic_fetch_sub(p, 55, memory_order_seq_cst); } int test_atomic_fetch_and(int *p) { // CHECK: test_atomic_fetch_and - // CHECK: {{%[^ ]*}} = call i32 @__atomic_fetch_and_4(i8* {{%[0-9]+}}, i32 55, i32 5) + // CHECK: {{%[^ ]*}} = call frozen i32 @__atomic_fetch_and_4(i8* frozen {{%[0-9]+}}, i32 frozen 55, i32 frozen 5) return __atomic_fetch_and(p, 55, memory_order_seq_cst); } int test_atomic_fetch_or(int *p) { // CHECK: test_atomic_fetch_or - // CHECK: {{%[^ ]*}} = call i32 @__atomic_fetch_or_4(i8* {{%[0-9]+}}, i32 55, i32 5) + // CHECK: {{%[^ ]*}} = call frozen i32 @__atomic_fetch_or_4(i8* frozen {{%[0-9]+}}, i32 frozen 55, i32 frozen 5) return __atomic_fetch_or(p, 55, memory_order_seq_cst); } int test_atomic_fetch_xor(int *p) { // CHECK: test_atomic_fetch_xor - // CHECK: {{%[^ ]*}} = call i32 @__atomic_fetch_xor_4(i8* {{%[0-9]+}}, i32 55, i32 5) + // CHECK: {{%[^ ]*}} = call frozen i32 @__atomic_fetch_xor_4(i8* frozen {{%[0-9]+}}, i32 frozen 55, i32 frozen 5) return __atomic_fetch_xor(p, 55, memory_order_seq_cst); } int test_atomic_fetch_nand(int *p) { // CHECK: test_atomic_fetch_nand - // CHECK: {{%[^ ]*}} = call i32 @__atomic_fetch_nand_4(i8* {{%[0-9]+}}, i32 55, i32 5) + // CHECK: {{%[^ ]*}} = call frozen i32 @__atomic_fetch_nand_4(i8* frozen {{%[0-9]+}}, i32 frozen 55, i32 frozen 5) return __atomic_fetch_nand(p, 55, memory_order_seq_cst); } int test_atomic_add_fetch(int *p) { // CHECK: test_atomic_add_fetch - // CHECK: [[CALL:%[^ ]*]] = call i32 @__atomic_fetch_add_4(i8* {{%[0-9]+}}, i32 55, i32 5) + // CHECK: [[CALL:%[^ ]*]] = call frozen i32 @__atomic_fetch_add_4(i8* frozen {{%[0-9]+}}, i32 frozen 55, i32 frozen 5) // CHECK: {{%[^ ]*}} = add i32 [[CALL]], 55 return __atomic_add_fetch(p, 55, memory_order_seq_cst); } int test_atomic_sub_fetch(int *p) { // CHECK: test_atomic_sub_fetch - // CHECK: [[CALL:%[^ ]*]] = call i32 @__atomic_fetch_sub_4(i8* {{%[0-9]+}}, i32 55, i32 5) + // CHECK: [[CALL:%[^ ]*]] = call frozen i32 @__atomic_fetch_sub_4(i8* frozen {{%[0-9]+}}, i32 frozen 55, i32 frozen 5) // CHECK: {{%[^ ]*}} = add i32 [[CALL]], -55 return __atomic_sub_fetch(p, 55, memory_order_seq_cst); } int test_atomic_and_fetch(int *p) { // CHECK: test_atomic_and_fetch - // CHECK: [[CALL:%[^ ]*]] = call i32 @__atomic_fetch_and_4(i8* {{%[0-9]+}}, i32 55, i32 5) + // CHECK: [[CALL:%[^ ]*]] = call frozen i32 @__atomic_fetch_and_4(i8* frozen {{%[0-9]+}}, i32 frozen 55, i32 frozen 5) // CHECK: {{%[^ ]*}} = and i32 [[CALL]], 55 return __atomic_and_fetch(p, 55, memory_order_seq_cst); } int test_atomic_or_fetch(int *p) { // CHECK: test_atomic_or_fetch - // CHECK: [[CALL:%[^ ]*]] = call i32 @__atomic_fetch_or_4(i8* {{%[0-9]+}}, i32 55, i32 5) + // CHECK: [[CALL:%[^ ]*]] = call frozen i32 @__atomic_fetch_or_4(i8* frozen {{%[0-9]+}}, i32 frozen 55, i32 frozen 5) // CHECK: {{%[^ ]*}} = or i32 [[CALL]], 55 return __atomic_or_fetch(p, 55, memory_order_seq_cst); } int test_atomic_xor_fetch(int *p) { // CHECK: test_atomic_xor_fetch - // CHECK: [[CALL:%[^ ]*]] = call i32 @__atomic_fetch_xor_4(i8* {{%[0-9]+}}, i32 55, i32 5) + // CHECK: [[CALL:%[^ ]*]] = call frozen i32 @__atomic_fetch_xor_4(i8* frozen {{%[0-9]+}}, i32 frozen 55, i32 frozen 5) // CHECK: {{%[^ ]*}} = xor i32 [[CALL]], 55 return __atomic_xor_fetch(p, 55, memory_order_seq_cst); } int test_atomic_nand_fetch(int *p) { // CHECK: test_atomic_nand_fetch - // CHECK: [[CALL:%[^ ]*]] = call i32 @__atomic_fetch_nand_4(i8* {{%[0-9]+}}, i32 55, i32 5) + // CHECK: [[CALL:%[^ ]*]] = call frozen i32 @__atomic_fetch_nand_4(i8* frozen {{%[0-9]+}}, i32 frozen 55, i32 frozen 5) // FIXME: We should not be checking optimized IR. It changes independently of clang. // FIXME-CHECK: [[AND:%[^ ]*]] = and i32 [[CALL]], 55 // FIXME-CHECK: {{%[^ ]*}} = xor i32 [[AND]], -1 diff --git a/clang/test/CodeGen/atomic-ops.c b/clang/test/CodeGen/atomic-ops.c --- a/clang/test/CodeGen/atomic-ops.c +++ b/clang/test/CodeGen/atomic-ops.c @@ -202,7 +202,7 @@ // CHECK: [[CAST:%.*]] = bitcast %struct.S* [[RETVAL]] to i64* // CHECK: [[SRC:%.*]] = bitcast i64* [[A]] to i8* // CHECK: [[DEST:%.*]] = bitcast i64* [[CAST]] to i8* - // CHECK: call void @__atomic_load(i32 8, i8* [[SRC]], i8* [[DEST]], i32 5) + // CHECK: call void @__atomic_load(i32 frozen 8, i8* frozen [[SRC]], i8* frozen [[DEST]], i32 frozen 5) // CHECK: ret struct S ret; __atomic_load(a, &ret, memory_order_seq_cst); @@ -221,7 +221,7 @@ // CHECK-NEXT: [[COERCED_B:%.*]] = bitcast %struct.S* [[LOAD_B_PTR]] to i64* // CHECK-NEXT: [[COERCED_A:%.*]] = bitcast i64* [[COERCED_A_TMP]] to i8* // CHECK-NEXT: [[CAST_B:%.*]] = bitcast i64* [[COERCED_B]] to i8* - // CHECK-NEXT: call void @__atomic_store(i32 8, i8* [[COERCED_A]], i8* [[CAST_B]], + // CHECK-NEXT: call void @__atomic_store(i32 frozen 8, i8* frozen [[COERCED_A]], i8* frozen [[CAST_B]], // CHECK-NEXT: ret void __atomic_store(a, b, memory_order_seq_cst); } @@ -243,8 +243,7 @@ // CHECK-NEXT: [[COERCED_A:%.*]] = bitcast i64* [[COERCED_A_TMP]] to i8* // CHECK-NEXT: [[CAST_B:%.*]] = bitcast i64* [[COERCED_B]] to i8* // CHECK-NEXT: [[CAST_C:%.*]] = bitcast i64* [[COERCED_C]] to i8* - // CHECK-NEXT: call void @__atomic_exchange(i32 8, i8* [[COERCED_A]], i8* [[CAST_B]], i8* [[CAST_C]], - + // CHECK-NEXT: call void @__atomic_exchange(i32 frozen 8, i8* frozen [[COERCED_A]], i8* frozen [[CAST_B]], i8* frozen [[CAST_C]], __atomic_exchange(a, b, c, memory_order_seq_cst); } @@ -265,7 +264,7 @@ // CHECK-NEXT: [[COERCED_A:%.*]] = bitcast i64* [[COERCED_A_TMP]] to i8* // CHECK-NEXT: [[COERCED_B:%.*]] = bitcast i64* [[COERCED_B_TMP]] to i8* // CHECK-NEXT: [[CAST_C:%.*]] = bitcast i64* [[COERCED_C]] to i8* - // CHECK-NEXT: [[CALL:%.*]] = call zeroext i1 @__atomic_compare_exchange(i32 8, i8* [[COERCED_A]], i8* [[COERCED_B]], i8* [[CAST_C]], + // CHECK-NEXT: [[CALL:%.*]] = call frozen zeroext i1 @__atomic_compare_exchange(i32 frozen 8, i8* frozen [[COERCED_A]], i8* frozen [[COERCED_B]], i8* frozen [[CAST_C]], // CHECK-NEXT: ret i1 [[CALL]] return __atomic_compare_exchange(a, b, c, 1, 5, 5); } @@ -343,20 +342,20 @@ int lock_free(struct Incomplete *incomplete) { // CHECK-LABEL: @lock_free - // CHECK: call zeroext i1 @__atomic_is_lock_free(i32 3, i8* null) + // CHECK: call frozen zeroext i1 @__atomic_is_lock_free(i32 frozen 3, i8* frozen null) __c11_atomic_is_lock_free(3); - // CHECK: call zeroext i1 @__atomic_is_lock_free(i32 16, i8* {{.*}}@sixteen{{.*}}) + // CHECK: call frozen zeroext i1 @__atomic_is_lock_free(i32 frozen 16, i8* {{.*}}@sixteen{{.*}}) __atomic_is_lock_free(16, &sixteen); - // CHECK: call zeroext i1 @__atomic_is_lock_free(i32 17, i8* {{.*}}@seventeen{{.*}}) + // CHECK: call frozen zeroext i1 @__atomic_is_lock_free(i32 frozen 17, i8* {{.*}}@seventeen{{.*}}) __atomic_is_lock_free(17, &seventeen); - // CHECK: call zeroext i1 @__atomic_is_lock_free(i32 4, {{.*}}) + // CHECK: call frozen zeroext i1 @__atomic_is_lock_free(i32 frozen 4, {{.*}}) __atomic_is_lock_free(4, incomplete); char cs[20]; - // CHECK: call zeroext i1 @__atomic_is_lock_free(i32 4, {{.*}}) + // CHECK: call frozen zeroext i1 @__atomic_is_lock_free(i32 frozen 4, {{.*}}) __atomic_is_lock_free(4, cs+1); // CHECK-NOT: call @@ -393,36 +392,36 @@ struct foo f = {0}; struct bar b = {0}; __atomic_store(&smallThing, &b, 5); - // CHECK: call void @__atomic_store(i32 3, i8* {{.*}} @smallThing + // CHECK: call void @__atomic_store(i32 frozen 3, i8* {{.*}} @smallThing __atomic_store(&bigThing, &f, 5); - // CHECK: call void @__atomic_store(i32 512, i8* {{.*}} @bigThing + // CHECK: call void @__atomic_store(i32 frozen 512, i8* {{.*}} @bigThing } void structAtomicLoad() { // CHECK-LABEL: @structAtomicLoad struct bar b; __atomic_load(&smallThing, &b, 5); - // CHECK: call void @__atomic_load(i32 3, i8* {{.*}} @smallThing + // CHECK: call void @__atomic_load(i32 frozen 3, i8* {{.*}} @smallThing struct foo f = {0}; __atomic_load(&bigThing, &f, 5); - // CHECK: call void @__atomic_load(i32 512, i8* {{.*}} @bigThing + // CHECK: call void @__atomic_load(i32 frozen 512, i8* {{.*}} @bigThing } struct foo structAtomicExchange() { // CHECK-LABEL: @structAtomicExchange struct foo f = {0}; struct foo old; __atomic_exchange(&f, &bigThing, &old, 5); - // CHECK: call void @__atomic_exchange(i32 512, {{.*}}, i8* bitcast ({{.*}} @bigThing to i8*), + // CHECK: call void @__atomic_exchange(i32 frozen 512, {{.*}}, i8* frozen bitcast ({{.*}} @bigThing to i8*), return __c11_atomic_exchange(&bigAtomic, f, 5); - // CHECK: call void @__atomic_exchange(i32 512, i8* bitcast ({{.*}} @bigAtomic to i8*), + // CHECK: call void @__atomic_exchange(i32 frozen 512, i8* frozen bitcast ({{.*}} @bigAtomic to i8*), } int structAtomicCmpExchange() { // CHECK-LABEL: @structAtomicCmpExchange // CHECK: %[[x_mem:.*]] = alloca i8 _Bool x = __atomic_compare_exchange(&smallThing, &thing1, &thing2, 1, 5, 5); - // CHECK: %[[call1:.*]] = call zeroext i1 @__atomic_compare_exchange(i32 3, {{.*}} @smallThing{{.*}} @thing1{{.*}} @thing2 + // CHECK: %[[call1:.*]] = call frozen zeroext i1 @__atomic_compare_exchange(i32 frozen 3, {{.*}} @smallThing{{.*}} @thing1{{.*}} @thing2 // CHECK: %[[zext1:.*]] = zext i1 %[[call1]] to i8 // CHECK: store i8 %[[zext1]], i8* %[[x_mem]], align 1 // CHECK: %[[x:.*]] = load i8, i8* %[[x_mem]] @@ -433,7 +432,7 @@ struct foo g = {0}; g.big[12] = 12; return x & __c11_atomic_compare_exchange_strong(&bigAtomic, &f, g, 5, 5); - // CHECK: %[[call2:.*]] = call zeroext i1 @__atomic_compare_exchange(i32 512, i8* bitcast ({{.*}} @bigAtomic to i8*), + // CHECK: %[[call2:.*]] = call frozen zeroext i1 @__atomic_compare_exchange(i32 frozen 512, i8* frozen bitcast ({{.*}} @bigAtomic to i8*), // CHECK: %[[conv2:.*]] = zext i1 %[[call2]] to i32 // CHECK: %[[and:.*]] = and i32 %[[conv1]], %[[conv2]] // CHECK: ret i32 %[[and]] @@ -640,13 +639,13 @@ // CHECK-LABEL: @test_underaligned struct Underaligned { char c[8]; } underaligned_a, underaligned_b, underaligned_c; - // CHECK: call void @__atomic_load(i32 8, + // CHECK: call void @__atomic_load(i32 frozen 8, __atomic_load(&underaligned_a, &underaligned_b, memory_order_seq_cst); - // CHECK: call void @__atomic_store(i32 8, + // CHECK: call void @__atomic_store(i32 frozen 8, __atomic_store(&underaligned_a, &underaligned_b, memory_order_seq_cst); - // CHECK: call void @__atomic_exchange(i32 8, + // CHECK: call void @__atomic_exchange(i32 frozen 8, __atomic_exchange(&underaligned_a, &underaligned_b, &underaligned_c, memory_order_seq_cst); - // CHECK: call {{.*}} @__atomic_compare_exchange(i32 8, + // CHECK: call {{.*}} @__atomic_compare_exchange(i32 frozen 8, __atomic_compare_exchange(&underaligned_a, &underaligned_b, &underaligned_c, 1, memory_order_seq_cst, memory_order_seq_cst); __attribute__((aligned)) struct Underaligned aligned_a, aligned_b, aligned_c; @@ -730,7 +729,7 @@ // CHECK: store i8 [[NEW]], i8* *sc = __atomic_min_fetch(sc, 42, memory_order_release); - // CHECK: [[OLD:%.*]] = call i64 @__atomic_fetch_umin_8(i8* {{%.*}}, i64 [[RHS:%.*]], + // CHECK: [[OLD:%.*]] = call frozen i64 @__atomic_fetch_umin_8(i8* frozen {{%.*}}, i64 frozen [[RHS:%.*]], // CHECK: [[TST:%.*]] = icmp ult i64 [[OLD]], [[RHS]] // CHECK: [[NEW:%.*]] = select i1 [[TST]], i64 [[OLD]], i64 [[RHS]] // CHECK: store i64 [[NEW]], i64* diff --git a/clang/test/CodeGen/atomic_ops.c b/clang/test/CodeGen/atomic_ops.c --- a/clang/test/CodeGen/atomic_ops.c +++ b/clang/test/CodeGen/atomic_ops.c @@ -12,17 +12,17 @@ // NATIVE: mul nsw i32 // NATIVE: cmpxchg i32* // LIBCALL: mul nsw i32 - // LIBCALL: i1 @__atomic_compare_exchange(i32 4, + // LIBCALL: i1 @__atomic_compare_exchange(i32 frozen 4 i /= 2; // NATIVE: sdiv i32 // NATIVE: cmpxchg i32* // LIBCALL: sdiv i32 - // LIBCALL: i1 @__atomic_compare_exchange(i32 4, + // LIBCALL: i1 @__atomic_compare_exchange(i32 frozen 4 j /= x; // NATIVE: sdiv i32 // NATIVE: cmpxchg i16* // LIBCALL: sdiv i32 - // LIBCALL: i1 @__atomic_compare_exchange(i32 2, + // LIBCALL: i1 @__atomic_compare_exchange(i32 frozen 2 } @@ -34,7 +34,7 @@ // NATIVE: %[[tobool:.*]] = trunc i8 %[[load]] to i1 // NATIVE: ret i1 %[[tobool]] // LIBCALL-LABEL: @bar -// LIBCALL: call void @__atomic_load(i32 1, i8* @b, i8* %atomic-temp, i32 5) +// LIBCALL: call void @__atomic_load(i32 frozen 1, i8* frozen @b, i8* frozen %atomic-temp, i32 frozen 5) // LIBCALL: %[[load:.*]] = load i8, i8* %atomic-temp // LIBCALL: %[[tobool:.*]] = trunc i8 %[[load]] to i1 // LIBCALL: ret i1 %[[tobool]] @@ -103,7 +103,7 @@ // NATIVE: cmpxchg i32* {{%.*}}, i32 {{%.*}}, i32 [[NEW:%.*]] seq_cst seq_cst // NATIVE: ret i32 [[NEW]] // LIBCALL-LABEL: @compound_mul -// LIBCALL: i1 @__atomic_compare_exchange(i32 4, +// LIBCALL: i1 @__atomic_compare_exchange(i32 frozen 4 return (in *= 5); } diff --git a/clang/test/CodeGen/atomics-inlining.c b/clang/test/CodeGen/atomics-inlining.c --- a/clang/test/CodeGen/atomics-inlining.c +++ b/clang/test/CodeGen/atomics-inlining.c @@ -37,16 +37,16 @@ (void)__atomic_store(&a1, &a2, memory_order_seq_cst); // ARM-LABEL: define{{.*}} void @test1 -// ARM: = call{{.*}} zeroext i8 @__atomic_load_1(i8* @c1 -// ARM: call{{.*}} void @__atomic_store_1(i8* @c1, i8 zeroext -// ARM: = call{{.*}} zeroext i16 @__atomic_load_2(i8* bitcast (i16* @s1 to i8*) -// ARM: call{{.*}} void @__atomic_store_2(i8* bitcast (i16* @s1 to i8*), i16 zeroext -// ARM: = call{{.*}} i32 @__atomic_load_4(i8* bitcast (i32* @i1 to i8*) -// ARM: call{{.*}} void @__atomic_store_4(i8* bitcast (i32* @i1 to i8*), i32 -// ARM: = call{{.*}} i64 @__atomic_load_8(i8* bitcast (i64* @ll1 to i8*) -// ARM: call{{.*}} void @__atomic_store_8(i8* bitcast (i64* @ll1 to i8*), i64 -// ARM: call{{.*}} void @__atomic_load(i32 100, i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a1, i32 0, i32 0), i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a2, i32 0, i32 0) -// ARM: call{{.*}} void @__atomic_store(i32 100, i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a1, i32 0, i32 0), i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a2, i32 0, i32 0) +// ARM: = call{{.*}} zeroext i8 @__atomic_load_1(i8* frozen @c1 +// ARM: call{{.*}} void @__atomic_store_1(i8* frozen @c1, i8 frozen zeroext +// ARM: = call{{.*}} zeroext i16 @__atomic_load_2(i8* frozen bitcast (i16* @s1 to i8*) +// ARM: call{{.*}} void @__atomic_store_2(i8* frozen bitcast (i16* @s1 to i8*), i16 frozen zeroext +// ARM: = call{{.*}} i32 @__atomic_load_4(i8* frozen bitcast (i32* @i1 to i8*) +// ARM: call{{.*}} void @__atomic_store_4(i8* frozen bitcast (i32* @i1 to i8*), i32 +// ARM: = call{{.*}} i64 @__atomic_load_8(i8* frozen bitcast (i64* @ll1 to i8*) +// ARM: call{{.*}} void @__atomic_store_8(i8* frozen bitcast (i64* @ll1 to i8*), i64 +// ARM: call{{.*}} void @__atomic_load(i32 frozen 100, i8* frozen getelementptr inbounds ([100 x i8], [100 x i8]* @a1, i32 0, i32 0), i8* frozen getelementptr inbounds ([100 x i8], [100 x i8]* @a2, i32 0, i32 0) +// ARM: call{{.*}} void @__atomic_store(i32 frozen 100, i8* frozen getelementptr inbounds ([100 x i8], [100 x i8]* @a1, i32 0, i32 0), i8* frozen getelementptr inbounds ([100 x i8], [100 x i8]* @a2, i32 0, i32 0) // PPC32-LABEL: define void @test1 // PPC32: = load atomic i8, i8* @c1 seq_cst @@ -55,10 +55,10 @@ // PPC32: store atomic i16 {{.*}}, i16* @s1 seq_cst // PPC32: = load atomic i32, i32* @i1 seq_cst // PPC32: store atomic i32 {{.*}}, i32* @i1 seq_cst -// PPC32: = call i64 @__atomic_load_8(i8* bitcast (i64* @ll1 to i8*) -// PPC32: call void @__atomic_store_8(i8* bitcast (i64* @ll1 to i8*), i64 -// PPC32: call void @__atomic_load(i32 100, i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a1, i32 0, i32 0), i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a2, i32 0, i32 0) -// PPC32: call void @__atomic_store(i32 100, i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a1, i32 0, i32 0), i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a2, i32 0, i32 0) +// PPC32: = call frozen i64 @__atomic_load_8(i8* frozen bitcast (i64* @ll1 to i8*) +// PPC32: call void @__atomic_store_8(i8* frozen bitcast (i64* @ll1 to i8*), i64 +// PPC32: call void @__atomic_load(i32 frozen 100, i8* frozen getelementptr inbounds ([100 x i8], [100 x i8]* @a1, i32 0, i32 0), i8* frozen getelementptr inbounds ([100 x i8], [100 x i8]* @a2, i32 0, i32 0) +// PPC32: call void @__atomic_store(i32 frozen 100, i8* frozen getelementptr inbounds ([100 x i8], [100 x i8]* @a1, i32 0, i32 0), i8* frozen getelementptr inbounds ([100 x i8], [100 x i8]* @a2, i32 0, i32 0) // PPC64-LABEL: define void @test1 // PPC64: = load atomic i8, i8* @c1 seq_cst @@ -69,8 +69,8 @@ // PPC64: store atomic i32 {{.*}}, i32* @i1 seq_cst // PPC64: = load atomic i64, i64* @ll1 seq_cst // PPC64: store atomic i64 {{.*}}, i64* @ll1 seq_cst -// PPC64: call void @__atomic_load(i64 100, i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a1, i32 0, i32 0), i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a2, i32 0, i32 0) -// PPC64: call void @__atomic_store(i64 100, i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a1, i32 0, i32 0), i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a2, i32 0, i32 0) +// PPC64: call void @__atomic_load(i64 frozen 100, i8* frozen getelementptr inbounds ([100 x i8], [100 x i8]* @a1, i32 0, i32 0), i8* frozen getelementptr inbounds ([100 x i8], [100 x i8]* @a2, i32 0, i32 0) +// PPC64: call void @__atomic_store(i64 frozen 100, i8* frozen getelementptr inbounds ([100 x i8], [100 x i8]* @a1, i32 0, i32 0), i8* frozen getelementptr inbounds ([100 x i8], [100 x i8]* @a2, i32 0, i32 0) // MIPS32-LABEL: define void @test1 // MIPS32: = load atomic i8, i8* @c1 seq_cst @@ -79,10 +79,10 @@ // MIPS32: store atomic i16 {{.*}}, i16* @s1 seq_cst // MIPS32: = load atomic i32, i32* @i1 seq_cst // MIPS32: store atomic i32 {{.*}}, i32* @i1 seq_cst -// MIPS32: call i64 @__atomic_load_8(i8* bitcast (i64* @ll1 to i8*) -// MIPS32: call void @__atomic_store_8(i8* bitcast (i64* @ll1 to i8*), i64 -// MIPS32: call void @__atomic_load(i32 signext 100, i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a1, i32 0, i32 0), i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a2, i32 0, i32 0) -// MIPS32: call void @__atomic_store(i32 signext 100, i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a1, i32 0, i32 0), i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a2, i32 0, i32 0) +// MIPS32: call frozen i64 @__atomic_load_8(i8* frozen bitcast (i64* @ll1 to i8*) +// MIPS32: call void @__atomic_store_8(i8* frozen bitcast (i64* @ll1 to i8*), i64 +// MIPS32: call void @__atomic_load(i32 frozen signext 100, i8* frozen getelementptr inbounds ([100 x i8], [100 x i8]* @a1, i32 0, i32 0), i8* frozen getelementptr inbounds ([100 x i8], [100 x i8]* @a2, i32 0, i32 0) +// MIPS32: call void @__atomic_store(i32 frozen signext 100, i8* frozen getelementptr inbounds ([100 x i8], [100 x i8]* @a1, i32 0, i32 0), i8* frozen getelementptr inbounds ([100 x i8], [100 x i8]* @a2, i32 0, i32 0) // MIPS64-LABEL: define void @test1 // MIPS64: = load atomic i8, i8* @c1 seq_cst @@ -93,8 +93,8 @@ // MIPS64: store atomic i32 {{.*}}, i32* @i1 seq_cst // MIPS64: = load atomic i64, i64* @ll1 seq_cst // MIPS64: store atomic i64 {{.*}}, i64* @ll1 seq_cst -// MIPS64: call void @__atomic_load(i64 zeroext 100, i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a1, i32 0, i32 0) -// MIPS64: call void @__atomic_store(i64 zeroext 100, i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a1, i32 0, i32 0), i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a2, i32 0, i32 0) +// MIPS64: call void @__atomic_load(i64 frozen zeroext 100, i8* frozen getelementptr inbounds ([100 x i8], [100 x i8]* @a1, i32 0, i32 0) +// MIPS64: call void @__atomic_store(i64 frozen zeroext 100, i8* frozen getelementptr inbounds ([100 x i8], [100 x i8]* @a1, i32 0, i32 0), i8* frozen getelementptr inbounds ([100 x i8], [100 x i8]* @a2, i32 0, i32 0) // SPARC-LABEL: define void @test1 // SPARC: = load atomic i8, i8* @c1 seq_cst @@ -103,10 +103,10 @@ // SPARC: store atomic i16 {{.*}}, i16* @s1 seq_cst // SPARC: = load atomic i32, i32* @i1 seq_cst // SPARC: store atomic i32 {{.*}}, i32* @i1 seq_cst -// SPARCV8: call i64 @__atomic_load_8(i8* bitcast (i64* @ll1 to i8*) -// SPARCV8: call void @__atomic_store_8(i8* bitcast (i64* @ll1 to i8*), i64 +// SPARCV8: call frozen i64 @__atomic_load_8(i8* frozen bitcast (i64* @ll1 to i8*) +// SPARCV8: call void @__atomic_store_8(i8* frozen bitcast (i64* @ll1 to i8*), i64 // SPARCV9: load atomic i64, i64* @ll1 seq_cst, align 8 // SPARCV9: store atomic i64 {{.*}}, i64* @ll1 seq_cst, align 8 -// SPARCV8: call void @__atomic_load(i32 100, i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a1, i32 0, i32 0), i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a2, i32 0, i32 0) -// SPARCV8: call void @__atomic_store(i32 100, i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a1, i32 0, i32 0), i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a2, i32 0, i32 0) +// SPARCV8: call void @__atomic_load(i32 frozen 100, i8* frozen getelementptr inbounds ([100 x i8], [100 x i8]* @a1, i32 0, i32 0), i8* frozen getelementptr inbounds ([100 x i8], [100 x i8]* @a2, i32 0, i32 0) +// SPARCV8: call void @__atomic_store(i32 frozen 100, i8* frozen getelementptr inbounds ([100 x i8], [100 x i8]* @a1, i32 0, i32 0), i8* frozen getelementptr inbounds ([100 x i8], [100 x i8]* @a2, i32 0, i32 0) } diff --git a/clang/test/CodeGen/attr-cpuspecific.c b/clang/test/CodeGen/attr-cpuspecific.c --- a/clang/test/CodeGen/attr-cpuspecific.c +++ b/clang/test/CodeGen/attr-cpuspecific.c @@ -256,18 +256,18 @@ ATTR(cpu_specific(atom)) int DispatchFirst(void) {return 0;} -// LINUX: define i32 @DispatchFirst.O +// LINUX: define frozen i32 @DispatchFirst.O // LINUX: ret i32 0 -// WINDOWS: define dso_local i32 @DispatchFirst.O() +// WINDOWS: define dso_local frozen i32 @DispatchFirst.O() // WINDOWS: ret i32 0 ATTR(cpu_specific(pentium)) int DispatchFirst(void) {return 1;} -// LINUX: define i32 @DispatchFirst.B +// LINUX: define frozen i32 @DispatchFirst.B // LINUX: ret i32 1 -// WINDOWS: define dso_local i32 @DispatchFirst.B +// WINDOWS: define dso_local frozen i32 @DispatchFirst.B // WINDOWS: ret i32 1 // CHECK: attributes #[[S]] = {{.*}}"target-features"="+avx,+cmov,+cx8,+f16c,+mmx,+popcnt,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87,+xsave" diff --git a/clang/test/CodeGen/attr-disable-tail-calls.c b/clang/test/CodeGen/attr-disable-tail-calls.c --- a/clang/test/CodeGen/attr-disable-tail-calls.c +++ b/clang/test/CodeGen/attr-disable-tail-calls.c @@ -1,10 +1,10 @@ // RUN: %clang_cc1 -triple x86_64-apple-macosx10.7.0 %s -emit-llvm -mdisable-tail-calls -o - | FileCheck %s -check-prefix=DISABLE // RUN: %clang_cc1 -triple x86_64-apple-macosx10.7.0 %s -emit-llvm -o - | FileCheck %s -check-prefix=ENABLE -// DISABLE: define i32 @f1() [[ATTRTRUE:#[0-9]+]] { -// DISABLE: define i32 @f2() [[ATTRTRUE]] { -// ENABLE: define i32 @f1() [[ATTRFALSE:#[0-9]+]] { -// ENABLE: define i32 @f2() [[ATTRTRUE:#[0-9]+]] { +// DISABLE: define frozen i32 @f1() [[ATTRTRUE:#[0-9]+]] { +// DISABLE: define frozen i32 @f2() [[ATTRTRUE]] { +// ENABLE: define frozen i32 @f1() [[ATTRFALSE:#[0-9]+]] { +// ENABLE: define frozen i32 @f2() [[ATTRTRUE:#[0-9]+]] { int f1() { return 0; diff --git a/clang/test/CodeGen/attr-func-def.c b/clang/test/CodeGen/attr-func-def.c --- a/clang/test/CodeGen/attr-func-def.c +++ b/clang/test/CodeGen/attr-func-def.c @@ -1,7 +1,7 @@ // RUN: %clang_cc1 -triple x86_64-apple-macosx10.10.0 -emit-llvm -Oz -o - %s | FileCheck %s -// CHECK: define i32 @foo2(i32 %a) local_unnamed_addr [[ATTRS2:#[0-9]+]] { -// CHECK: define i32 @foo1(i32 %a) local_unnamed_addr [[ATTRS1:#[0-9]+]] { +// CHECK: define frozen i32 @foo2(i32 frozen %a) local_unnamed_addr [[ATTRS2:#[0-9]+]] { +// CHECK: define frozen i32 @foo1(i32 frozen %a) local_unnamed_addr [[ATTRS1:#[0-9]+]] { int foo1(int); diff --git a/clang/test/CodeGen/attr-naked.c b/clang/test/CodeGen/attr-naked.c --- a/clang/test/CodeGen/attr-naked.c +++ b/clang/test/CodeGen/attr-naked.c @@ -17,7 +17,7 @@ // Make sure not to generate prolog or epilog for naked functions. __attribute((naked)) void t3(int x) { -// CHECK: define void @t3(i32 %0) +// CHECK: define void @t3(i32 frozen %0) // CHECK-NOT: alloca // CHECK-NOT: store // CHECK: unreachable diff --git a/clang/test/CodeGen/attr-no-tail.c b/clang/test/CodeGen/attr-no-tail.c --- a/clang/test/CodeGen/attr-no-tail.c +++ b/clang/test/CodeGen/attr-no-tail.c @@ -1,14 +1,14 @@ // RUN: %clang_cc1 -triple x86_64-apple-macosx10.7.0 %s -emit-llvm -o - | FileCheck %s -// CHECK: %{{[a-z0-9]+}} = notail call i32 @callee0(i32 % -// CHECK: %{{[a-z0-9]+}} = notail call i32 @callee1(i32 % +// CHECK: %{{[a-z0-9]+}} = notail call frozen i32 @callee0(i32 frozen % +// CHECK: %{{[a-z0-9]+}} = notail call frozen i32 @callee1(i32 frozen % // Check that indirect calls do not have the notail marker. // CHECK: store i32 (i32)* @callee1, i32 (i32)** [[ALLOCA1:%[A-Za-z0-9]+]], align 8 // CHECK: [[INDIRFUNC:%[0-9]+]] = load i32 (i32)*, i32 (i32)** [[ALLOCA1]], align 8 -// CHECK: %{{[a-z0-9]+}} = call i32 [[INDIRFUNC]](i32 %{{[0-9]+}} +// CHECK: %{{[a-z0-9]+}} = call frozen i32 [[INDIRFUNC]](i32 frozen %{{[0-9]+}} -// CHECK: %{{[a-z0-9]+}} = call i32 @callee2(i32 % +// CHECK: %{{[a-z0-9]+}} = call frozen i32 @callee2(i32 frozen % int callee0(int a) __attribute__((not_tail_called)) { return a + 1; diff --git a/clang/test/CodeGen/attr-nomerge.cpp b/clang/test/CodeGen/attr-nomerge.cpp --- a/clang/test/CodeGen/attr-nomerge.cpp +++ b/clang/test/CodeGen/attr-nomerge.cpp @@ -12,15 +12,15 @@ [[clang::nomerge]] for (bar(); bar(); bar()) {} bar(); } -// CHECK: call zeroext i1 @_Z3barv() #[[NOMERGEATTR:[0-9]+]] -// CHECK: call zeroext i1 @_Z3barv() #[[NOMERGEATTR]] -// CHECK: call zeroext i1 @_Z3barv() #[[NOMERGEATTR]] -// CHECK: call zeroext i1 @_Z3barv() #[[NOMERGEATTR]] -// CHECK: call zeroext i1 @_Z3barv() #[[NOMERGEATTR]] +// CHECK: call frozen zeroext i1 @_Z3barv() #[[NOMERGEATTR:[0-9]+]] +// CHECK: call frozen zeroext i1 @_Z3barv() #[[NOMERGEATTR]] +// CHECK: call frozen zeroext i1 @_Z3barv() #[[NOMERGEATTR]] +// CHECK: call frozen zeroext i1 @_Z3barv() #[[NOMERGEATTR]] +// CHECK: call frozen zeroext i1 @_Z3barv() #[[NOMERGEATTR]] // CHECK: call void @_Z1fbb({{.*}}) #[[NOMERGEATTR]] -// CHECK: call void @"_ZZ3fooiENK3$_0clEv"(%class.anon* %ref.tmp) #[[NOMERGEATTR]] -// CHECK: call zeroext i1 @_Z3barv() #[[NOMERGEATTR]] -// CHECK: call zeroext i1 @_Z3barv() #[[NOMERGEATTR]] -// CHECK: call zeroext i1 @_Z3barv() #[[NOMERGEATTR]] -// CHECK: call zeroext i1 @_Z3barv() +// CHECK: call void @"_ZZ3fooiENK3$_0clEv"(%class.anon* frozen %ref.tmp) #[[NOMERGEATTR]] +// CHECK: call frozen zeroext i1 @_Z3barv() #[[NOMERGEATTR]] +// CHECK: call frozen zeroext i1 @_Z3barv() #[[NOMERGEATTR]] +// CHECK: call frozen zeroext i1 @_Z3barv() #[[NOMERGEATTR]] +// CHECK: call frozen zeroext i1 @_Z3barv() // CHECK: attributes #[[NOMERGEATTR]] = { nomerge } diff --git a/clang/test/CodeGen/attr-optnone.c b/clang/test/CodeGen/attr-optnone.c --- a/clang/test/CodeGen/attr-optnone.c +++ b/clang/test/CodeGen/attr-optnone.c @@ -21,7 +21,7 @@ int test4() { return test2(); } // PRESENT-DAG: @test4{{.*}}[[ATTR4:#[0-9]+]] // Also check that test2 is inlined into test4 (always_inline still works). -// PRESENT-NOT: call i32 @test2 +// PRESENT-NOT: call frozen i32 @test2 // Check for both noinline and optnone on each optnone function. // PRESENT-DAG: attributes [[ATTR3]] = { {{.*}}noinline{{.*}}optnone{{.*}} } diff --git a/clang/test/CodeGen/attr-target-mv-func-ptrs.c b/clang/test/CodeGen/attr-target-mv-func-ptrs.c --- a/clang/test/CodeGen/attr-target-mv-func-ptrs.c +++ b/clang/test/CodeGen/attr-target-mv-func-ptrs.c @@ -18,30 +18,30 @@ } // LINUX: @foo.ifunc = weak_odr ifunc i32 (i32), i32 (i32)* ()* @foo.resolver -// LINUX: define i32 @foo.sse4.2( +// LINUX: define frozen i32 @foo.sse4.2( // LINUX: ret i32 0 -// LINUX: define i32 @foo.arch_ivybridge( +// LINUX: define frozen i32 @foo.arch_ivybridge( // LINUX: ret i32 1 -// LINUX: define i32 @foo( +// LINUX: define frozen i32 @foo( // LINUX: ret i32 2 -// WINDOWS: define dso_local i32 @foo.sse4.2( +// WINDOWS: define dso_local frozen i32 @foo.sse4.2( // WINDOWS: ret i32 0 -// WINDOWS: define dso_local i32 @foo.arch_ivybridge( +// WINDOWS: define dso_local frozen i32 @foo.arch_ivybridge( // WINDOWS: ret i32 1 -// WINDOWS: define dso_local i32 @foo( +// WINDOWS: define dso_local frozen i32 @foo( // WINDOWS: ret i32 2 -// LINUX: define i32 @bar() -// LINUX: call void @func(i32 (i32)* @foo.ifunc) +// LINUX: define frozen i32 @bar() +// LINUX: call void @func(i32 (i32)* frozen @foo.ifunc) // LINUX: store i32 (i32)* @foo.ifunc // LINUX: store i32 (i32)* @foo.ifunc -// WINDOWS: define dso_local i32 @bar() -// WINDOWS: call void @func(i32 (i32)* @foo.resolver) +// WINDOWS: define dso_local frozen i32 @bar() +// WINDOWS: call void @func(i32 (i32)* frozen @foo.resolver) // WINDOWS: store i32 (i32)* @foo.resolver // WINDOWS: store i32 (i32)* @foo.resolver -// LINUX: declare i32 @foo.arch_sandybridge( +// LINUX: declare frozen i32 @foo.arch_sandybridge( -// WINDOWS: declare dso_local i32 @foo.arch_sandybridge( +// WINDOWS: declare dso_local frozen i32 @foo.arch_sandybridge( diff --git a/clang/test/CodeGen/attr-target-mv-va-args.c b/clang/test/CodeGen/attr-target-mv-va-args.c --- a/clang/test/CodeGen/attr-target-mv-va-args.c +++ b/clang/test/CodeGen/attr-target-mv-va-args.c @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -triple x86_64-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=LINUX -// RUN: %clang_cc1 -triple x86_64-windows-pc -emit-llvm %s -o - | FileCheck %s --check-prefix=WINDOWS +// RUN: %clang_cc1 -disable-frozen-args -triple x86_64-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=LINUX +// RUN: %clang_cc1 -disable-frozen-args -triple x86_64-windows-pc -emit-llvm %s -o - | FileCheck %s --check-prefix=WINDOWS int __attribute__((target("sse4.2"))) foo(int i, ...) { return 0; } int __attribute__((target("arch=sandybridge"))) foo(int i, ...); int __attribute__((target("arch=ivybridge"))) foo(int i, ...) {return 1;} @@ -10,36 +10,36 @@ } // LINUX: @foo.ifunc = weak_odr ifunc i32 (i32, ...), i32 (i32, ...)* ()* @foo.resolver -// LINUX: define i32 @foo.sse4.2(i32 %i, ...) +// LINUX: define frozen i32 @foo.sse4.2(i32 %i, ...) // LINUX: ret i32 0 -// LINUX: define i32 @foo.arch_ivybridge(i32 %i, ...) +// LINUX: define frozen i32 @foo.arch_ivybridge(i32 %i, ...) // LINUX: ret i32 1 -// LINUX: define i32 @foo(i32 %i, ...) +// LINUX: define frozen i32 @foo(i32 %i, ...) // LINUX: ret i32 2 -// LINUX: define i32 @bar() -// LINUX: call i32 (i32, ...) @foo.ifunc(i32 1, i32 97, double -// LINUX: call i32 (i32, ...) @foo.ifunc(i32 2, double 2.2{{[0-9Ee+]+}}, i8* getelementptr inbounds +// LINUX: define frozen i32 @bar() +// LINUX: call frozen i32 (i32, ...) @foo.ifunc(i32 1, i32 97, double +// LINUX: call frozen i32 (i32, ...) @foo.ifunc(i32 2, double 2.2{{[0-9Ee+]+}}, i8* getelementptr inbounds // LINUX: define weak_odr i32 (i32, ...)* @foo.resolver() comdat // LINUX: ret i32 (i32, ...)* @foo.arch_sandybridge // LINUX: ret i32 (i32, ...)* @foo.arch_ivybridge // LINUX: ret i32 (i32, ...)* @foo.sse4.2 // LINUX: ret i32 (i32, ...)* @foo -// LINUX: declare i32 @foo.arch_sandybridge(i32, ...) +// LINUX: declare frozen i32 @foo.arch_sandybridge(i32, ...) -// WINDOWS: define dso_local i32 @foo.sse4.2(i32 %i, ...) +// WINDOWS: define dso_local frozen i32 @foo.sse4.2(i32 %i, ...) // WINDOWS: ret i32 0 -// WINDOWS: define dso_local i32 @foo.arch_ivybridge(i32 %i, ...) +// WINDOWS: define dso_local frozen i32 @foo.arch_ivybridge(i32 %i, ...) // WINDOWS: ret i32 1 -// WINDOWS: define dso_local i32 @foo(i32 %i, ...) +// WINDOWS: define dso_local frozen i32 @foo(i32 %i, ...) // WINDOWS: ret i32 2 -// WINDOWS: define dso_local i32 @bar() -// WINDOWS: call i32 (i32, ...) @foo.resolver(i32 1, i32 97, double -// WINDOWS: call i32 (i32, ...) @foo.resolver(i32 2, double 2.2{{[0-9Ee+]+}}, i8* getelementptr inbounds +// WINDOWS: define dso_local frozen i32 @bar() +// WINDOWS: call frozen i32 (i32, ...) @foo.resolver(i32 1, i32 97, double +// WINDOWS: call frozen i32 (i32, ...) @foo.resolver(i32 2, double 2.2{{[0-9Ee+]+}}, i8* getelementptr inbounds // WINDOWS: define weak_odr dso_local i32 @foo.resolver(i32 %0, ...) comdat // WINDOWS: musttail call i32 (i32, ...) @foo.arch_sandybridge // WINDOWS: musttail call i32 (i32, ...) @foo.arch_ivybridge // WINDOWS: musttail call i32 (i32, ...) @foo.sse4.2 // WINDOWS: musttail call i32 (i32, ...) @foo -// WINDOWS: declare dso_local i32 @foo.arch_sandybridge(i32, ...) +// WINDOWS: declare dso_local frozen i32 @foo.arch_sandybridge(i32, ...) diff --git a/clang/test/CodeGen/attr-target-mv.c b/clang/test/CodeGen/attr-target-mv.c --- a/clang/test/CodeGen/attr-target-mv.c +++ b/clang/test/CodeGen/attr-target-mv.c @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -triple x86_64-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=LINUX -// RUN: %clang_cc1 -triple x86_64-windows-pc -emit-llvm %s -o - | FileCheck %s --check-prefix=WINDOWS +// RUN: %clang_cc1 -disable-frozen-args -triple x86_64-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=LINUX +// RUN: %clang_cc1 -disable-frozen-args -triple x86_64-windows-pc -emit-llvm %s -o - | FileCheck %s --check-prefix=WINDOWS int __attribute__((target("sse4.2"))) foo(void) { return 0; } int __attribute__((target("arch=sandybridge"))) foo(void); @@ -71,43 +71,43 @@ // LINUX: @fwd_decl_default.ifunc = weak_odr ifunc i32 (), i32 ()* ()* @fwd_decl_default.resolver // LINUX: @fwd_decl_avx.ifunc = weak_odr ifunc i32 (), i32 ()* ()* @fwd_decl_avx.resolver -// LINUX: define i32 @foo.sse4.2() +// LINUX: define frozen i32 @foo.sse4.2() // LINUX: ret i32 0 -// LINUX: define i32 @foo.arch_ivybridge() +// LINUX: define frozen i32 @foo.arch_ivybridge() // LINUX: ret i32 1 -// LINUX: define i32 @foo.arch_goldmont() +// LINUX: define frozen i32 @foo.arch_goldmont() // LINUX: ret i32 3 -// LINUX: define i32 @foo.arch_goldmont-plus() +// LINUX: define frozen i32 @foo.arch_goldmont-plus() // LINUX: ret i32 4 -// LINUX: define i32 @foo.arch_tremont() +// LINUX: define frozen i32 @foo.arch_tremont() // LINUX: ret i32 5 -// LINUX: define i32 @foo.arch_icelake-client() +// LINUX: define frozen i32 @foo.arch_icelake-client() // LINUX: ret i32 6 -// LINUX: define i32 @foo.arch_icelake-server() +// LINUX: define frozen i32 @foo.arch_icelake-server() // LINUX: ret i32 7 -// LINUX: define i32 @foo() +// LINUX: define frozen i32 @foo() // LINUX: ret i32 2 -// LINUX: define i32 @bar() -// LINUX: call i32 @foo.ifunc() +// LINUX: define frozen i32 @bar() +// LINUX: call frozen i32 @foo.ifunc() -// WINDOWS: define dso_local i32 @foo.sse4.2() +// WINDOWS: define dso_local frozen i32 @foo.sse4.2() // WINDOWS: ret i32 0 -// WINDOWS: define dso_local i32 @foo.arch_ivybridge() +// WINDOWS: define dso_local frozen i32 @foo.arch_ivybridge() // WINDOWS: ret i32 1 -// WINDOWS: define dso_local i32 @foo.arch_goldmont() +// WINDOWS: define dso_local frozen i32 @foo.arch_goldmont() // WINDOWS: ret i32 3 -// WINDOWS: define dso_local i32 @foo.arch_goldmont-plus() +// WINDOWS: define dso_local frozen i32 @foo.arch_goldmont-plus() // WINDOWS: ret i32 4 -// WINDOWS: define dso_local i32 @foo.arch_tremont() +// WINDOWS: define dso_local frozen i32 @foo.arch_tremont() // WINDOWS: ret i32 5 -// WINDOWS: define dso_local i32 @foo.arch_icelake-client() +// WINDOWS: define dso_local frozen i32 @foo.arch_icelake-client() // WINDOWS: ret i32 6 -// WINDOWS: define dso_local i32 @foo.arch_icelake-server() +// WINDOWS: define dso_local frozen i32 @foo.arch_icelake-server() // WINDOWS: ret i32 7 -// WINDOWS: define dso_local i32 @foo() +// WINDOWS: define dso_local frozen i32 @foo() // WINDOWS: ret i32 2 -// WINDOWS: define dso_local i32 @bar() -// WINDOWS: call i32 @foo.resolver() +// WINDOWS: define dso_local frozen i32 @bar() +// WINDOWS: call frozen i32 @foo.resolver() // LINUX: define weak_odr i32 ()* @foo.resolver() comdat // LINUX: call void @__cpu_indicator_init() @@ -121,13 +121,13 @@ // WINDOWS: call i32 @foo.arch_sandybridge // WINDOWS: call i32 @foo.arch_ivybridge // WINDOWS: call i32 @foo.sse4.2 -// WINDOWS: call i32 @foo +// WINDOWS: call i32 @foo( -// LINUX: define i32 @bar2() -// LINUX: call i32 @foo_inline.ifunc() +// LINUX: define frozen i32 @bar2() +// LINUX: call frozen i32 @foo_inline.ifunc() -// WINDOWS: define dso_local i32 @bar2() -// WINDOWS: call i32 @foo_inline.resolver() +// WINDOWS: define dso_local frozen i32 @bar2() +// WINDOWS: call frozen i32 @foo_inline.resolver() // LINUX: define weak_odr i32 ()* @foo_inline.resolver() comdat // LINUX: call void @__cpu_indicator_init() @@ -193,27 +193,27 @@ // WINDOWS: call void @foo_multi(i32 %0, double %1) // WINDOWS-NEXT: ret void -// LINUX: define i32 @fwd_decl_default() +// LINUX: define frozen i32 @fwd_decl_default() // LINUX: ret i32 2 -// LINUX: define i32 @fwd_decl_avx.avx() +// LINUX: define frozen i32 @fwd_decl_avx.avx() // LINUX: ret i32 2 -// LINUX: define i32 @fwd_decl_avx() +// LINUX: define frozen i32 @fwd_decl_avx() // LINUX: ret i32 2 -// WINDOWS: define dso_local i32 @fwd_decl_default() +// WINDOWS: define dso_local frozen i32 @fwd_decl_default() // WINDOWS: ret i32 2 -// WINDOWS: define dso_local i32 @fwd_decl_avx.avx() +// WINDOWS: define dso_local frozen i32 @fwd_decl_avx.avx() // WINDOWS: ret i32 2 -// WINDOWS: define dso_local i32 @fwd_decl_avx() +// WINDOWS: define dso_local frozen i32 @fwd_decl_avx() // WINDOWS: ret i32 2 // LINUX: define void @bar5() -// LINUX: call i32 @fwd_decl_default.ifunc() -// LINUX: call i32 @fwd_decl_avx.ifunc() +// LINUX: call frozen i32 @fwd_decl_default.ifunc() +// LINUX: call frozen i32 @fwd_decl_avx.ifunc() // WINDOWS: define dso_local void @bar5() -// WINDOWS: call i32 @fwd_decl_default.resolver() -// WINDOWS: call i32 @fwd_decl_avx.resolver() +// WINDOWS: call frozen i32 @fwd_decl_default.resolver() +// WINDOWS: call frozen i32 @fwd_decl_avx.resolver() // LINUX: define weak_odr i32 ()* @fwd_decl_default.resolver() comdat // LINUX: call void @__cpu_indicator_init() @@ -231,11 +231,11 @@ // WINDOWS: call i32 @fwd_decl_avx.avx // WINDOWS: call i32 @fwd_decl_avx -// LINUX: define i32 @changed_to_mv.avx() -// LINUX: define i32 @changed_to_mv.fma4() +// LINUX: define frozen i32 @changed_to_mv.avx() +// LINUX: define frozen i32 @changed_to_mv.fma4() -// WINDOWS: define dso_local i32 @changed_to_mv.avx() -// WINDOWS: define dso_local i32 @changed_to_mv.fma4() +// WINDOWS: define dso_local frozen i32 @changed_to_mv.avx() +// WINDOWS: define dso_local frozen i32 @changed_to_mv.fma4() // LINUX: define linkonce void @foo_used(i32 %{{.*}}, double %{{.*}}) // LINUX-NOT: @foo_used.avx_sse4.2( @@ -247,27 +247,27 @@ // WINDOWS-NOT: @foo_used2( // WINDOWS: define linkonce_odr dso_local void @foo_used2.avx_sse4.2(i32 %{{.*}}, double %{{.*}}) -// LINUX: declare i32 @foo.arch_sandybridge() -// WINDOWS: declare dso_local i32 @foo.arch_sandybridge() +// LINUX: declare frozen i32 @foo.arch_sandybridge() +// WINDOWS: declare dso_local frozen i32 @foo.arch_sandybridge() -// LINUX: define linkonce i32 @foo_inline.sse4.2() +// LINUX: define linkonce frozen i32 @foo_inline.sse4.2() // LINUX: ret i32 0 -// WINDOWS: define linkonce_odr dso_local i32 @foo_inline.sse4.2() +// WINDOWS: define linkonce_odr dso_local frozen i32 @foo_inline.sse4.2() // WINDOWS: ret i32 0 -// LINUX: declare i32 @foo_inline.arch_sandybridge() +// LINUX: declare frozen i32 @foo_inline.arch_sandybridge() -// WINDOWS: declare dso_local i32 @foo_inline.arch_sandybridge() +// WINDOWS: declare dso_local frozen i32 @foo_inline.arch_sandybridge() -// LINUX: define linkonce i32 @foo_inline.arch_ivybridge() +// LINUX: define linkonce frozen i32 @foo_inline.arch_ivybridge() // LINUX: ret i32 1 -// LINUX: define linkonce i32 @foo_inline() +// LINUX: define linkonce frozen i32 @foo_inline() // LINUX: ret i32 2 -// WINDOWS: define linkonce_odr dso_local i32 @foo_inline.arch_ivybridge() +// WINDOWS: define linkonce_odr dso_local frozen i32 @foo_inline.arch_ivybridge() // WINDOWS: ret i32 1 -// WINDOWS: define linkonce_odr dso_local i32 @foo_inline() +// WINDOWS: define linkonce_odr dso_local frozen i32 @foo_inline() // WINDOWS: ret i32 2 // LINUX: define linkonce void @foo_decls() diff --git a/clang/test/CodeGen/attr-x86-interrupt.c b/clang/test/CodeGen/attr-x86-interrupt.c --- a/clang/test/CodeGen/attr-x86-interrupt.c +++ b/clang/test/CodeGen/attr-x86-interrupt.c @@ -13,22 +13,22 @@ __attribute__((interrupt)) void foo7(int *a, uword b) {} __attribute__((interrupt)) void foo8(int *a) {} // X86_64_LINUX: @llvm.used = appending global [2 x i8*] [i8* bitcast (void (i32*, i64)* @foo7 to i8*), i8* bitcast (void (i32*)* @foo8 to i8*)], section "llvm.metadata" -// X86_64_LINUX: define x86_intrcc void @foo7(i32* %{{.+}}, i64 %{{.+}}) -// X86_64_LINUX: define x86_intrcc void @foo8(i32* %{{.+}}) +// X86_64_LINUX: define x86_intrcc void @foo7(i32* frozen %{{.+}}, i64 frozen %{{.+}}) +// X86_64_LINUX: define x86_intrcc void @foo8(i32* frozen %{{.+}}) // X86_64_LINUX: "disable-tail-calls"="true" // X86_64_LINUX-NOT: "disable-tail-calls"="false" // X86_LINUX: @llvm.used = appending global [2 x i8*] [i8* bitcast (void (i32*, i32)* @foo7 to i8*), i8* bitcast (void (i32*)* @foo8 to i8*)], section "llvm.metadata" -// X86_LINUX: define x86_intrcc void @foo7(i32* %{{.+}}, i32 %{{.+}}) -// X86_LINUX: define x86_intrcc void @foo8(i32* %{{.+}}) +// X86_LINUX: define x86_intrcc void @foo7(i32* frozen %{{.+}}, i32 frozen %{{.+}}) +// X86_LINUX: define x86_intrcc void @foo8(i32* frozen %{{.+}}) // X86_LINUX: "disable-tail-calls"="true" // X86_LINUX-NOT: "disable-tail-calls"="false" // X86_64_WIN: @llvm.used = appending global [2 x i8*] [i8* bitcast (void (i32*, i64)* @foo7 to i8*), i8* bitcast (void (i32*)* @foo8 to i8*)], section "llvm.metadata" -// X86_64_WIN: define dso_local x86_intrcc void @foo7(i32* %{{.+}}, i64 %{{.+}}) -// X86_64_WIN: define dso_local x86_intrcc void @foo8(i32* %{{.+}}) +// X86_64_WIN: define dso_local x86_intrcc void @foo7(i32* frozen %{{.+}}, i64 frozen %{{.+}}) +// X86_64_WIN: define dso_local x86_intrcc void @foo8(i32* frozen %{{.+}}) // X86_64_Win: "disable-tail-calls"="true" // X86_64_Win-NOT: "disable-tail-calls"="false" // X86_WIN: @llvm.used = appending global [2 x i8*] [i8* bitcast (void (i32*, i32)* @foo7 to i8*), i8* bitcast (void (i32*)* @foo8 to i8*)], section "llvm.metadata" -// X86_WIN: define dso_local x86_intrcc void @foo7(i32* %{{.+}}, i32 %{{.+}}) -// X86_WIN: define dso_local x86_intrcc void @foo8(i32* %{{.+}}) +// X86_WIN: define dso_local x86_intrcc void @foo7(i32* frozen %{{.+}}, i32 frozen %{{.+}}) +// X86_WIN: define dso_local x86_intrcc void @foo8(i32* frozen %{{.+}}) // X86_Win: "disable-tail-calls"="true" // X86_Win-NOT: "disable-tail-calls"="false" diff --git a/clang/test/CodeGen/attributes.c b/clang/test/CodeGen/attributes.c --- a/clang/test/CodeGen/attributes.c +++ b/clang/test/CodeGen/attributes.c @@ -30,7 +30,7 @@ void __t8() {} void t9() __attribute__((weak, alias("__t8"))); -// CHECK: declare extern_weak i32 @t15() +// CHECK: declare extern_weak frozen i32 @t15() int __attribute__((weak_import)) t15(void); int t17() { return t15() + t16; @@ -69,7 +69,7 @@ // CHECK: define void @t11() [[NUW]] section "SECT" { void __attribute__((section("SECT"))) t11(void) {} -// CHECK: define i32 @t19() [[NUW]] { +// CHECK: define frozen i32 @t19() [[NUW]] { extern int t19(void) __attribute__((weak_import)); int t19(void) { return 10; @@ -87,7 +87,7 @@ fptr(10); } // CHECK: [[FPTRVAR:%[a-z0-9]+]] = load void (i32)*, void (i32)** @fptr -// CHECK-NEXT: call x86_fastcallcc void [[FPTRVAR]](i32 inreg 10) +// CHECK-NEXT: call x86_fastcallcc void [[FPTRVAR]](i32 frozen inreg 10) // PR9356: We might want to err on this, but for now at least make sure we diff --git a/clang/test/CodeGen/available-externally-hidden.cpp b/clang/test/CodeGen/available-externally-hidden.cpp --- a/clang/test/CodeGen/available-externally-hidden.cpp +++ b/clang/test/CodeGen/available-externally-hidden.cpp @@ -17,7 +17,7 @@ virtual ~Sender() {} }; -// CHECK: declare zeroext i1 @_ZThn16_N17SyncMessageFilter4SendEP7Message +// CHECK: declare frozen zeroext i1 @_ZThn16_N17SyncMessageFilter4SendEP7Message class SyncMessageFilter : public Filter, public Sender { public: bool Send(Message* message) override; diff --git a/clang/test/CodeGen/available-externally-suppress.c b/clang/test/CodeGen/available-externally-suppress.c --- a/clang/test/CodeGen/available-externally-suppress.c +++ b/clang/test/CodeGen/available-externally-suppress.c @@ -13,7 +13,7 @@ inline void f0(int y) { x = y; } // CHECK-LABEL: define void @test() -// CHECK: declare void @f0(i32) +// CHECK: declare void @f0(i32 frozen) // LTO-LABEL: define void @test() // LTO: define available_externally void @f0 void test() { diff --git a/clang/test/CodeGen/avr-builtins.c b/clang/test/CodeGen/avr-builtins.c --- a/clang/test/CodeGen/avr-builtins.c +++ b/clang/test/CodeGen/avr-builtins.c @@ -8,99 +8,99 @@ return __builtin_bitreverse8(data); } -// CHECK: define zeroext i8 @bitrev8 +// CHECK: define frozen zeroext i8 @bitrev8 // CHECK: i8 @llvm.bitreverse.i8(i8 unsigned int bitrev16(unsigned int data) { return __builtin_bitreverse16(data); } -// CHECK: define i16 @bitrev16 +// CHECK: define frozen i16 @bitrev16 // CHECK: i16 @llvm.bitreverse.i16(i16 unsigned long bitrev32(unsigned long data) { return __builtin_bitreverse32(data); } -// CHECK: define i32 @bitrev32 +// CHECK: define frozen i32 @bitrev32 // CHECK: i32 @llvm.bitreverse.i32(i32 unsigned long long bitrev64(unsigned long long data) { return __builtin_bitreverse64(data); } -// CHECK: define i64 @bitrev64 +// CHECK: define frozen i64 @bitrev64 // CHECK: i64 @llvm.bitreverse.i64(i64 unsigned char rotleft8(unsigned char x, unsigned char y) { return __builtin_rotateleft8(x, y); } -// CHECK: define zeroext i8 @rotleft8 +// CHECK: define frozen zeroext i8 @rotleft8 // CHECK: i8 @llvm.fshl.i8(i8 unsigned int rotleft16(unsigned int x, unsigned int y) { return __builtin_rotateleft16(x, y); } -// CHECK: define i16 @rotleft16 +// CHECK: define frozen i16 @rotleft16 // CHECK: i16 @llvm.fshl.i16(i16 unsigned long rotleft32(unsigned long x, unsigned long y) { return __builtin_rotateleft32(x, y); } -// CHECK: define i32 @rotleft32 +// CHECK: define frozen i32 @rotleft32 // CHECK: i32 @llvm.fshl.i32(i32 unsigned long long rotleft64(unsigned long long x, unsigned long long y) { return __builtin_rotateleft64(x, y); } -// CHECK: define i64 @rotleft64 +// CHECK: define frozen i64 @rotleft64 // CHECK: i64 @llvm.fshl.i64(i64 unsigned char rotright8(unsigned char x, unsigned char y) { return __builtin_rotateright8(x, y); } -// CHECK: define zeroext i8 @rotright8 +// CHECK: define frozen zeroext i8 @rotright8 // CHECK: i8 @llvm.fshr.i8(i8 unsigned int rotright16(unsigned int x, unsigned int y) { return __builtin_rotateright16(x, y); } -// CHECK: define i16 @rotright16 +// CHECK: define frozen i16 @rotright16 // CHECK: i16 @llvm.fshr.i16(i16 unsigned long rotright32(unsigned long x, unsigned long y) { return __builtin_rotateright32(x, y); } -// CHECK: define i32 @rotright32 +// CHECK: define frozen i32 @rotright32 // CHECK: i32 @llvm.fshr.i32(i32 unsigned long long rotright64(unsigned long long x, unsigned long long y) { return __builtin_rotateright64(x, y); } -// CHECK: define i64 @rotright64 +// CHECK: define frozen i64 @rotright64 // CHECK: i64 @llvm.fshr.i64(i64 unsigned int byteswap16(unsigned int x) { return __builtin_bswap16(x); } -// CHECK: define i16 @byteswap16 +// CHECK: define frozen i16 @byteswap16 // CHECK: i16 @llvm.bswap.i16(i16 unsigned long byteswap32(unsigned long x) { return __builtin_bswap32(x); } -// CHECK: define i32 @byteswap32 +// CHECK: define frozen i32 @byteswap32 // CHECK: i32 @llvm.bswap.i32(i32 unsigned long long byteswap64(unsigned long long x) { return __builtin_bswap64(x); } -// CHECK: define i64 @byteswap64 +// CHECK: define frozen i64 @byteswap64 // CHECK: i64 @llvm.bswap.i64(i64 diff --git a/clang/test/CodeGen/avx2-builtins.c b/clang/test/CodeGen/avx2-builtins.c --- a/clang/test/CodeGen/avx2-builtins.c +++ b/clang/test/CodeGen/avx2-builtins.c @@ -117,7 +117,7 @@ return _mm256_avg_epu16(a, b); } -// FIXME: We should also lower the __builtin_ia32_pblendw128 (and similar) +// FIXME: We should also lower the __builtin_ia32_pblendw128 (and similar) // functions to this IR. In the future we could delete the corresponding // intrinsic in LLVM if it's not being used anymore. __m256i test_mm256_blend_epi16(__m256i a, __m256i b) { diff --git a/clang/test/CodeGen/avx512-reduceMinMaxIntrin.c b/clang/test/CodeGen/avx512-reduceMinMaxIntrin.c --- a/clang/test/CodeGen/avx512-reduceMinMaxIntrin.c +++ b/clang/test/CodeGen/avx512-reduceMinMaxIntrin.c @@ -2,7 +2,7 @@ #include -// CHECK-LABEL: define i64 @test_mm512_reduce_max_epi64(<8 x i64> %__W) #0 { +// CHECK-LABEL: define frozen i64 @test_mm512_reduce_max_epi64(<8 x i64> frozen %__W) #0 { // CHECK-NEXT: entry: // CHECK-NEXT: [[__A_ADDR_I7_I:%.*]] = alloca <8 x i64>, align 64 // CHECK-NEXT: [[__B_ADDR_I8_I:%.*]] = alloca <8 x i64>, align 64 @@ -67,7 +67,7 @@ return _mm512_reduce_max_epi64(__W); } -// CHECK-LABEL: define i64 @test_mm512_reduce_max_epu64(<8 x i64> %__W) #0 { +// CHECK-LABEL: define frozen i64 @test_mm512_reduce_max_epu64(<8 x i64> frozen %__W) #0 { // CHECK-NEXT: entry: // CHECK-NEXT: [[__A_ADDR_I7_I:%.*]] = alloca <8 x i64>, align 64 // CHECK-NEXT: [[__B_ADDR_I8_I:%.*]] = alloca <8 x i64>, align 64 @@ -132,7 +132,7 @@ return _mm512_reduce_max_epu64(__W); } -// CHECK-LABEL: define double @test_mm512_reduce_max_pd(<8 x double> %__W) #0 { +// CHECK-LABEL: define frozen double @test_mm512_reduce_max_pd(<8 x double> frozen %__W) #0 { // CHECK-NEXT: entry: // CHECK-NEXT: [[__A_ADDR_I8_I:%.*]] = alloca <2 x double>, align 16 // CHECK-NEXT: [[__B_ADDR_I9_I:%.*]] = alloca <2 x double>, align 16 @@ -200,7 +200,7 @@ return _mm512_reduce_max_pd(__W); } -// CHECK-LABEL: define i64 @test_mm512_reduce_min_epi64(<8 x i64> %__W) #0 { +// CHECK-LABEL: define frozen i64 @test_mm512_reduce_min_epi64(<8 x i64> frozen %__W) #0 { // CHECK-NEXT: entry: // CHECK-NEXT: [[__A_ADDR_I7_I:%.*]] = alloca <8 x i64>, align 64 // CHECK-NEXT: [[__B_ADDR_I8_I:%.*]] = alloca <8 x i64>, align 64 @@ -265,7 +265,7 @@ return _mm512_reduce_min_epi64(__W); } -// CHECK-LABEL: define i64 @test_mm512_reduce_min_epu64(<8 x i64> %__W) #0 { +// CHECK-LABEL: define frozen i64 @test_mm512_reduce_min_epu64(<8 x i64> frozen %__W) #0 { // CHECK-NEXT: entry: // CHECK-NEXT: [[__A_ADDR_I7_I:%.*]] = alloca <8 x i64>, align 64 // CHECK-NEXT: [[__B_ADDR_I8_I:%.*]] = alloca <8 x i64>, align 64 @@ -330,7 +330,7 @@ return _mm512_reduce_min_epu64(__W); } -// CHECK-LABEL: define double @test_mm512_reduce_min_pd(<8 x double> %__W) #0 { +// CHECK-LABEL: define frozen double @test_mm512_reduce_min_pd(<8 x double> frozen %__W) #0 { // CHECK-NEXT: entry: // CHECK-NEXT: [[__A_ADDR_I8_I:%.*]] = alloca <2 x double>, align 16 // CHECK-NEXT: [[__B_ADDR_I9_I:%.*]] = alloca <2 x double>, align 16 @@ -398,7 +398,7 @@ return _mm512_reduce_min_pd(__W); } -// CHECK-LABEL: define i64 @test_mm512_mask_reduce_max_epi64(i8 zeroext %__M, <8 x i64> %__W) #0 { +// CHECK-LABEL: define frozen i64 @test_mm512_mask_reduce_max_epi64(i8 frozen zeroext %__M, <8 x i64> frozen %__W) #0 { // CHECK-NEXT: entry: // CHECK-NEXT: [[__D_ADDR_I_I:%.*]] = alloca i64, align 8 // CHECK-NEXT: [[DOTCOMPOUNDLITERAL_I_I:%.*]] = alloca <8 x i64>, align 64 @@ -503,7 +503,7 @@ return _mm512_mask_reduce_max_epi64(__M, __W); } -// CHECK-LABEL: define i64 @test_mm512_mask_reduce_max_epu64(i8 zeroext %__M, <8 x i64> %__W) #0 { +// CHECK-LABEL: define frozen i64 @test_mm512_mask_reduce_max_epu64(i8 frozen zeroext %__M, <8 x i64> frozen %__W) #0 { // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTCOMPOUNDLITERAL_I_I_I:%.*]] = alloca <8 x i64>, align 64 // CHECK-NEXT: [[__U_ADDR_I_I:%.*]] = alloca i8, align 1 @@ -587,7 +587,7 @@ return _mm512_mask_reduce_max_epu64(__M, __W); } -// CHECK-LABEL: define double @test_mm512_mask_reduce_max_pd(i8 zeroext %__M, <8 x double> %__W) #0 { +// CHECK-LABEL: define frozen double @test_mm512_mask_reduce_max_pd(i8 frozen zeroext %__M, <8 x double> frozen %__W) #0 { // CHECK-NEXT: entry: // CHECK-NEXT: [[__W_ADDR_I_I:%.*]] = alloca double, align 8 // CHECK-NEXT: [[DOTCOMPOUNDLITERAL_I_I:%.*]] = alloca <8 x double>, align 64 @@ -695,7 +695,7 @@ return _mm512_mask_reduce_max_pd(__M, __W); } -// CHECK-LABEL: define i64 @test_mm512_mask_reduce_min_epi64(i8 zeroext %__M, <8 x i64> %__W) #0 { +// CHECK-LABEL: define frozen i64 @test_mm512_mask_reduce_min_epi64(i8 frozen zeroext %__M, <8 x i64> frozen %__W) #0 { // CHECK-NEXT: entry: // CHECK-NEXT: [[__D_ADDR_I_I:%.*]] = alloca i64, align 8 // CHECK-NEXT: [[DOTCOMPOUNDLITERAL_I_I:%.*]] = alloca <8 x i64>, align 64 @@ -800,7 +800,7 @@ return _mm512_mask_reduce_min_epi64(__M, __W); } -// CHECK-LABEL: define i64 @test_mm512_mask_reduce_min_epu64(i8 zeroext %__M, <8 x i64> %__W) #0 { +// CHECK-LABEL: define frozen i64 @test_mm512_mask_reduce_min_epu64(i8 frozen zeroext %__M, <8 x i64> frozen %__W) #0 { // CHECK-NEXT: entry: // CHECK-NEXT: [[__D_ADDR_I_I:%.*]] = alloca i64, align 8 // CHECK-NEXT: [[DOTCOMPOUNDLITERAL_I_I:%.*]] = alloca <8 x i64>, align 64 @@ -905,7 +905,7 @@ return _mm512_mask_reduce_min_epu64(__M, __W); } -// CHECK-LABEL: define double @test_mm512_mask_reduce_min_pd(i8 zeroext %__M, <8 x double> %__W) #0 { +// CHECK-LABEL: define frozen double @test_mm512_mask_reduce_min_pd(i8 frozen zeroext %__M, <8 x double> frozen %__W) #0 { // CHECK-NEXT: entry: // CHECK-NEXT: [[__W_ADDR_I_I:%.*]] = alloca double, align 8 // CHECK-NEXT: [[DOTCOMPOUNDLITERAL_I_I:%.*]] = alloca <8 x double>, align 64 @@ -1013,7 +1013,7 @@ return _mm512_mask_reduce_min_pd(__M, __W); } -// CHECK-LABEL: define i32 @test_mm512_reduce_max_epi32(<8 x i64> %__W) #0 { +// CHECK-LABEL: define frozen i32 @test_mm512_reduce_max_epi32(<8 x i64> frozen %__W) #0 { // CHECK-NEXT: entry: // CHECK-NEXT: [[__V1_ADDR_I12_I:%.*]] = alloca <2 x i64>, align 16 // CHECK-NEXT: [[__V2_ADDR_I13_I:%.*]] = alloca <2 x i64>, align 16 @@ -1120,7 +1120,7 @@ return _mm512_reduce_max_epi32(__W); } -// CHECK-LABEL: define i32 @test_mm512_reduce_max_epu32(<8 x i64> %__W) #0 { +// CHECK-LABEL: define frozen i32 @test_mm512_reduce_max_epu32(<8 x i64> frozen %__W) #0 { // CHECK-NEXT: entry: // CHECK-NEXT: [[__V1_ADDR_I12_I:%.*]] = alloca <2 x i64>, align 16 // CHECK-NEXT: [[__V2_ADDR_I13_I:%.*]] = alloca <2 x i64>, align 16 @@ -1227,7 +1227,7 @@ return _mm512_reduce_max_epu32(__W); } -// CHECK-LABEL: define float @test_mm512_reduce_max_ps(<16 x float> %__W) #0 { +// CHECK-LABEL: define frozen float @test_mm512_reduce_max_ps(<16 x float> frozen %__W) #0 { // CHECK-NEXT: entry: // CHECK-NEXT: [[__A_ADDR_I12_I:%.*]] = alloca <4 x float>, align 16 // CHECK-NEXT: [[__B_ADDR_I13_I:%.*]] = alloca <4 x float>, align 16 @@ -1315,7 +1315,7 @@ return _mm512_reduce_max_ps(__W); } -// CHECK-LABEL: define i32 @test_mm512_reduce_min_epi32(<8 x i64> %__W) #0 { +// CHECK-LABEL: define frozen i32 @test_mm512_reduce_min_epi32(<8 x i64> frozen %__W) #0 { // CHECK-NEXT: entry: // CHECK-NEXT: [[__V1_ADDR_I12_I:%.*]] = alloca <2 x i64>, align 16 // CHECK-NEXT: [[__V2_ADDR_I13_I:%.*]] = alloca <2 x i64>, align 16 @@ -1422,7 +1422,7 @@ return _mm512_reduce_min_epi32(__W); } -// CHECK-LABEL: define i32 @test_mm512_reduce_min_epu32(<8 x i64> %__W) #0 { +// CHECK-LABEL: define frozen i32 @test_mm512_reduce_min_epu32(<8 x i64> frozen %__W) #0 { // CHECK-NEXT: entry: // CHECK-NEXT: [[__V1_ADDR_I12_I:%.*]] = alloca <2 x i64>, align 16 // CHECK-NEXT: [[__V2_ADDR_I13_I:%.*]] = alloca <2 x i64>, align 16 @@ -1529,7 +1529,7 @@ return _mm512_reduce_min_epu32(__W); } -// CHECK-LABEL: define float @test_mm512_reduce_min_ps(<16 x float> %__W) #0 { +// CHECK-LABEL: define frozen float @test_mm512_reduce_min_ps(<16 x float> frozen %__W) #0 { // CHECK-NEXT: entry: // CHECK-NEXT: [[__A_ADDR_I12_I:%.*]] = alloca <4 x float>, align 16 // CHECK-NEXT: [[__B_ADDR_I13_I:%.*]] = alloca <4 x float>, align 16 @@ -1617,7 +1617,7 @@ return _mm512_reduce_min_ps(__W); } -// CHECK-LABEL: define i32 @test_mm512_mask_reduce_max_epi32(i16 zeroext %__M, <8 x i64> %__W) #0 { +// CHECK-LABEL: define frozen i32 @test_mm512_mask_reduce_max_epi32(i16 frozen zeroext %__M, <8 x i64> frozen %__W) #0 { // CHECK-NEXT: entry: // CHECK-NEXT: [[__S_ADDR_I_I:%.*]] = alloca i32, align 4 // CHECK-NEXT: [[DOTCOMPOUNDLITERAL_I_I:%.*]] = alloca <16 x i32>, align 64 @@ -1784,7 +1784,7 @@ return _mm512_mask_reduce_max_epi32(__M, __W); } -// CHECK-LABEL: define i32 @test_mm512_mask_reduce_max_epu32(i16 zeroext %__M, <8 x i64> %__W) #0 { +// CHECK-LABEL: define frozen i32 @test_mm512_mask_reduce_max_epu32(i16 frozen zeroext %__M, <8 x i64> frozen %__W) #0 { // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTCOMPOUNDLITERAL_I_I_I:%.*]] = alloca <8 x i64>, align 64 // CHECK-NEXT: [[__U_ADDR_I_I:%.*]] = alloca i16, align 2 @@ -1913,7 +1913,7 @@ return _mm512_mask_reduce_max_epu32(__M, __W); } -// CHECK-LABEL: define float @test_mm512_mask_reduce_max_ps(i16 zeroext %__M, <16 x float> %__W) #0 { +// CHECK-LABEL: define frozen float @test_mm512_mask_reduce_max_ps(i16 frozen zeroext %__M, <16 x float> frozen %__W) #0 { // CHECK-NEXT: entry: // CHECK-NEXT: [[__W_ADDR_I_I:%.*]] = alloca float, align 4 // CHECK-NEXT: [[DOTCOMPOUNDLITERAL_I_I:%.*]] = alloca <16 x float>, align 64 @@ -2057,7 +2057,7 @@ return _mm512_mask_reduce_max_ps(__M, __W); } -// CHECK-LABEL: define i32 @test_mm512_mask_reduce_min_epi32(i16 zeroext %__M, <8 x i64> %__W) #0 { +// CHECK-LABEL: define frozen i32 @test_mm512_mask_reduce_min_epi32(i16 frozen zeroext %__M, <8 x i64> frozen %__W) #0 { // CHECK-NEXT: entry: // CHECK-NEXT: [[__S_ADDR_I_I:%.*]] = alloca i32, align 4 // CHECK-NEXT: [[DOTCOMPOUNDLITERAL_I_I:%.*]] = alloca <16 x i32>, align 64 @@ -2224,7 +2224,7 @@ return _mm512_mask_reduce_min_epi32(__M, __W); } -// CHECK-LABEL: define i32 @test_mm512_mask_reduce_min_epu32(i16 zeroext %__M, <8 x i64> %__W) #0 { +// CHECK-LABEL: define frozen i32 @test_mm512_mask_reduce_min_epu32(i16 frozen zeroext %__M, <8 x i64> frozen %__W) #0 { // CHECK-NEXT: entry: // CHECK-NEXT: [[__S_ADDR_I_I:%.*]] = alloca i32, align 4 // CHECK-NEXT: [[DOTCOMPOUNDLITERAL_I_I:%.*]] = alloca <16 x i32>, align 64 @@ -2391,7 +2391,7 @@ return _mm512_mask_reduce_min_epu32(__M, __W); } -// CHECK-LABEL: define float @test_mm512_mask_reduce_min_ps(i16 zeroext %__M, <16 x float> %__W) #0 { +// CHECK-LABEL: define frozen float @test_mm512_mask_reduce_min_ps(i16 frozen zeroext %__M, <16 x float> frozen %__W) #0 { // CHECK-NEXT: entry: // CHECK-NEXT: [[__W_ADDR_I_I:%.*]] = alloca float, align 4 // CHECK-NEXT: [[DOTCOMPOUNDLITERAL_I_I:%.*]] = alloca <16 x float>, align 64 diff --git a/clang/test/CodeGen/big-atomic-ops.c b/clang/test/CodeGen/big-atomic-ops.c --- a/clang/test/CodeGen/big-atomic-ops.c +++ b/clang/test/CodeGen/big-atomic-ops.c @@ -198,20 +198,20 @@ int lock_free(struct Incomplete *incomplete) { // CHECK: @lock_free - // CHECK: call zeroext i1 @__atomic_is_lock_free(i64 3, i8* null) + // CHECK: call frozen zeroext i1 @__atomic_is_lock_free(i64 frozen 3, i8* frozen null) __c11_atomic_is_lock_free(3); - // CHECK: call zeroext i1 @__atomic_is_lock_free(i64 16, i8* {{.*}}@sixteen{{.*}}) + // CHECK: call frozen zeroext i1 @__atomic_is_lock_free(i64 frozen 16, i8* {{.*}}@sixteen{{.*}}) __atomic_is_lock_free(16, &sixteen); - // CHECK: call zeroext i1 @__atomic_is_lock_free(i64 17, i8* {{.*}}@seventeen{{.*}}) + // CHECK: call frozen zeroext i1 @__atomic_is_lock_free(i64 frozen 17, i8* {{.*}}@seventeen{{.*}}) __atomic_is_lock_free(17, &seventeen); - // CHECK: call zeroext i1 @__atomic_is_lock_free(i64 4, {{.*}}) + // CHECK: call frozen zeroext i1 @__atomic_is_lock_free(i64 frozen 4, {{.*}}) __atomic_is_lock_free(4, incomplete); char cs[20]; - // CHECK: call zeroext i1 @__atomic_is_lock_free(i64 4, {{.*}}) + // CHECK: call frozen zeroext i1 @__atomic_is_lock_free(i64 frozen 4, {{.*}}) __atomic_is_lock_free(4, cs+1); // CHECK-NOT: call @@ -247,47 +247,47 @@ // CHECK: @structAtomicStore struct foo f = {0}; __c11_atomic_store(&bigAtomic, f, 5); - // CHECK: call void @__atomic_store(i64 512, i8* bitcast ({{.*}} @bigAtomic to i8*), + // CHECK: call void @__atomic_store(i64 frozen 512, i8* frozen bitcast ({{.*}} @bigAtomic to i8*) struct bar b = {0}; __atomic_store(&smallThing, &b, 5); - // CHECK: call void @__atomic_store(i64 3, i8* {{.*}} @smallThing + // CHECK: call void @__atomic_store(i64 frozen 3, i8* {{.*}} @smallThing __atomic_store(&bigThing, &f, 5); - // CHECK: call void @__atomic_store(i64 512, i8* {{.*}} @bigThing + // CHECK: call void @__atomic_store(i64 frozen 512, i8* {{.*}} @bigThing } void structAtomicLoad() { // CHECK: @structAtomicLoad struct foo f = __c11_atomic_load(&bigAtomic, 5); - // CHECK: call void @__atomic_load(i64 512, i8* bitcast ({{.*}} @bigAtomic to i8*), + // CHECK: call void @__atomic_load(i64 frozen 512, i8* frozen bitcast ({{.*}} @bigAtomic to i8*) struct bar b; __atomic_load(&smallThing, &b, 5); - // CHECK: call void @__atomic_load(i64 3, i8* {{.*}} @smallThing + // CHECK: call void @__atomic_load(i64 frozen 3, i8* {{.*}} @smallThing __atomic_load(&bigThing, &f, 5); - // CHECK: call void @__atomic_load(i64 512, i8* {{.*}} @bigThing + // CHECK: call void @__atomic_load(i64 frozen 512, i8* {{.*}} @bigThing } struct foo structAtomicExchange() { // CHECK: @structAtomicExchange struct foo f = {0}; struct foo old; __atomic_exchange(&f, &bigThing, &old, 5); - // CHECK: call void @__atomic_exchange(i64 512, {{.*}}, i8* bitcast ({{.*}} @bigThing to i8*), + // CHECK: call void @__atomic_exchange(i64 frozen 512, {{.*}}, i8* frozen bitcast ({{.*}} @bigThing to i8*) return __c11_atomic_exchange(&bigAtomic, f, 5); - // CHECK: call void @__atomic_exchange(i64 512, i8* bitcast ({{.*}} @bigAtomic to i8*), + // CHECK: call void @__atomic_exchange(i64 frozen 512, i8* frozen bitcast ({{.*}} @bigAtomic to i8*) } int structAtomicCmpExchange() { // CHECK: @structAtomicCmpExchange _Bool x = __atomic_compare_exchange(&smallThing, &thing1, &thing2, 1, 5, 5); - // CHECK: call zeroext i1 @__atomic_compare_exchange(i64 3, {{.*}} @smallThing{{.*}} @thing1{{.*}} @thing2 + // CHECK: call frozen zeroext i1 @__atomic_compare_exchange(i64 frozen 3, {{.*}} @smallThing{{.*}} @thing1{{.*}} @thing2 struct foo f = {0}; struct foo g = {0}; g.big[12] = 12; return x & __c11_atomic_compare_exchange_strong(&bigAtomic, &f, g, 5, 5); - // CHECK: call zeroext i1 @__atomic_compare_exchange(i64 512, i8* bitcast ({{.*}} @bigAtomic to i8*), + // CHECK: call frozen zeroext i1 @__atomic_compare_exchange(i64 frozen 512, i8* frozen bitcast ({{.*}} @bigAtomic to i8*) } // Check that no atomic operations are used in any initialisation of _Atomic diff --git a/clang/test/CodeGen/bitfield-2.c b/clang/test/CodeGen/bitfield-2.c --- a/clang/test/CodeGen/bitfield-2.c +++ b/clang/test/CodeGen/bitfield-2.c @@ -32,7 +32,7 @@ return (a0->f0 += 1); } -// CHECK-OPT-LABEL: define i64 @test_0() +// CHECK-OPT-LABEL: define frozen i64 @test_0() // CHECK-OPT: ret i64 1 // CHECK-OPT: } unsigned long long test_0() { @@ -78,7 +78,7 @@ return (a0->f1 += 1234); } -// CHECK-OPT-LABEL: define i64 @test_1() +// CHECK-OPT-LABEL: define frozen i64 @test_1() // CHECK-OPT: ret i64 210 // CHECK-OPT: } unsigned long long test_1() { @@ -120,7 +120,7 @@ return (a0->f0 += 1234); } -// CHECK-OPT-LABEL: define i64 @test_2() +// CHECK-OPT-LABEL: define frozen i64 @test_2() // CHECK-OPT: ret i64 2 // CHECK-OPT: } unsigned long long test_2() { @@ -156,7 +156,7 @@ return (a0->f0 += 1234); } -// CHECK-OPT-LABEL: define i64 @test_3() +// CHECK-OPT-LABEL: define frozen i64 @test_3() // CHECK-OPT: ret i64 -559039940 // CHECK-OPT: } unsigned long long test_3() { @@ -190,7 +190,7 @@ return (a0->f0 += 1234) ^ (a0->f1 += 5678); } -// CHECK-OPT-LABEL: define i64 @test_4() +// CHECK-OPT-LABEL: define frozen i64 @test_4() // CHECK-OPT: ret i64 4860 // CHECK-OPT: } unsigned long long test_4() { @@ -222,7 +222,7 @@ return (a0->f0 += 0xF) ^ (a0->f1 += 0xF) ^ (a0->f2 += 0xF); } -// CHECK-OPT-LABEL: define i64 @test_5() +// CHECK-OPT-LABEL: define frozen i64 @test_5() // CHECK-OPT: ret i64 2 // CHECK-OPT: } unsigned long long test_5() { @@ -252,7 +252,7 @@ return (a0->f0 += 0xF); } -// CHECK-OPT-LABEL: define zeroext i1 @test_6() +// CHECK-OPT-LABEL: define frozen zeroext i1 @test_6() // CHECK-OPT: ret i1 true // CHECK-OPT: } _Bool test_6() { @@ -310,7 +310,7 @@ return (a0->f0 += 0xFD) ^ (a0->f2 += 0xFD) ^ (a0->f3 += 0xFD); } -// CHECK-OPT-LABEL: define i32 @test_8() +// CHECK-OPT-LABEL: define frozen i32 @test_8() // CHECK-OPT: ret i32 -3 // CHECK-OPT: } unsigned test_8() { diff --git a/clang/test/CodeGen/bittest-intrin.c b/clang/test/CodeGen/bittest-intrin.c --- a/clang/test/CodeGen/bittest-intrin.c +++ b/clang/test/CodeGen/bittest-intrin.c @@ -33,7 +33,7 @@ } #endif -// X64-LABEL: define dso_local void @test32(i32* %base, i32 %idx) +// X64-LABEL: define dso_local void @test32(i32* frozen %base, i32 frozen %idx) // X64: call i8 asm sideeffect "btl $2, ($1)\0A\09setc ${0:b}", "=r,r,r,~{{.*}}"(i32* %{{.*}}, i32 {{.*}}) // X64: call i8 asm sideeffect "btcl $2, ($1)\0A\09setc ${0:b}", "=r,r,r,~{{.*}}"(i32* %{{.*}}, i32 {{.*}}) // X64: call i8 asm sideeffect "btrl $2, ($1)\0A\09setc ${0:b}", "=r,r,r,~{{.*}}"(i32* %{{.*}}, i32 {{.*}}) @@ -41,7 +41,7 @@ // X64: call i8 asm sideeffect "lock btrl $2, ($1)\0A\09setc ${0:b}", "=r,r,r,~{{.*}}"(i32* %{{.*}}, i32 {{.*}}) // X64: call i8 asm sideeffect "lock btsl $2, ($1)\0A\09setc ${0:b}", "=r,r,r,~{{.*}}"(i32* %{{.*}}, i32 {{.*}}) -// X64-LABEL: define dso_local void @test64(i64* %base, i64 %idx) +// X64-LABEL: define dso_local void @test64(i64* frozen %base, i64 frozen %idx) // X64: call i8 asm sideeffect "btq $2, ($1)\0A\09setc ${0:b}", "=r,r,r,~{{.*}}"(i64* %{{.*}}, i64 {{.*}}) // X64: call i8 asm sideeffect "btcq $2, ($1)\0A\09setc ${0:b}", "=r,r,r,~{{.*}}"(i64* %{{.*}}, i64 {{.*}}) // X64: call i8 asm sideeffect "btrq $2, ($1)\0A\09setc ${0:b}", "=r,r,r,~{{.*}}"(i64* %{{.*}}, i64 {{.*}}) @@ -49,7 +49,7 @@ // X64: call i8 asm sideeffect "lock btrq $2, ($1)\0A\09setc ${0:b}", "=r,r,r,~{{.*}}"(i64* %{{.*}}, i64 {{.*}}) // X64: call i8 asm sideeffect "lock btsq $2, ($1)\0A\09setc ${0:b}", "=r,r,r,~{{.*}}"(i64* %{{.*}}, i64 {{.*}}) -// ARM-LABEL: define dso_local {{.*}}void @test32(i32* %base, i32 %idx) +// ARM-LABEL: define dso_local {{.*}}void @test32(i32* frozen %base, i32 frozen %idx) // ARM: %[[IDXHI:[^ ]*]] = ashr i32 %{{.*}}, 3 // ARM: %[[BASE:[^ ]*]] = bitcast i32* %{{.*}} to i8* // ARM: %[[BYTEADDR:[^ ]*]] = getelementptr inbounds i8, i8* %[[BASE]], i32 %[[IDXHI]] @@ -126,7 +126,7 @@ // Just look for the atomicrmw instructions. -// ARM-LABEL: define dso_local {{.*}}void @test_arm(i32* %base, i32 %idx) +// ARM-LABEL: define dso_local {{.*}}void @test_arm(i32* frozen %base, i32 frozen %idx) // ARM: atomicrmw and i8* %{{.*}}, i8 {{.*}} acquire // ARM: atomicrmw and i8* %{{.*}}, i8 {{.*}} release // ARM: atomicrmw and i8* %{{.*}}, i8 {{.*}} monotonic diff --git a/clang/test/CodeGen/blocks-seq.c b/clang/test/CodeGen/blocks-seq.c --- a/clang/test/CodeGen/blocks-seq.c +++ b/clang/test/CodeGen/blocks-seq.c @@ -1,9 +1,9 @@ // RUN: %clang_cc1 -fblocks -triple x86_64-apple-darwin10 -emit-llvm -o - %s | FileCheck %s // CHECK: [[Vi:%.+]] = alloca %struct.__block_byref_i, align 8 -// CHECK: call i32 (...) @rhs() +// CHECK: call frozen i32 (...) @rhs() // CHECK: [[V7:%.+]] = getelementptr inbounds %struct.__block_byref_i, %struct.__block_byref_i* [[Vi]], i32 0, i32 1 // CHECK: load %struct.__block_byref_i*, %struct.__block_byref_i** [[V7]] -// CHECK: call i32 (...) @rhs() +// CHECK: call frozen i32 (...) @rhs() // CHECK: [[V11:%.+]] = getelementptr inbounds %struct.__block_byref_i, %struct.__block_byref_i* [[Vi]], i32 0, i32 1 // CHECK: load %struct.__block_byref_i*, %struct.__block_byref_i** [[V11]] diff --git a/clang/test/CodeGen/blocks.c b/clang/test/CodeGen/blocks.c --- a/clang/test/CodeGen/blocks.c +++ b/clang/test/CodeGen/blocks.c @@ -18,7 +18,7 @@ int a[64]; }; -// CHECK: define internal void @__f2_block_invoke(%struct.s0* noalias sret align 4 {{%.*}}, i8* {{%.*}}, %struct.s0* byval(%struct.s0) align 4 {{.*}}) +// CHECK: define internal void @__f2_block_invoke(%struct.s0* noalias sret align 4 {{%.*}}, i8* frozen {{%.*}}, %struct.s0* frozen byval(%struct.s0) align 4 {{.*}}) struct s0 f2(struct s0 a0) { return ^(struct s0 a1){ return a1; }(a0); } @@ -33,7 +33,7 @@ ^ { i = 1; }(); }; -// CHECK-LABEL: define linkonce_odr hidden void @__copy_helper_block_4_20r(i8* %0, i8* %1) unnamed_addr +// CHECK-LABEL: define linkonce_odr hidden void @__copy_helper_block_4_20r(i8* frozen %0, i8* frozen %1) unnamed_addr // CHECK: %[[_ADDR:.*]] = alloca i8*, align 4 // CHECK-NEXT: %[[_ADDR1:.*]] = alloca i8*, align 4 // CHECK-NEXT: store i8* %0, i8** %[[_ADDR]], align 4 @@ -49,7 +49,7 @@ // CHECK-NEXT: call void @_Block_object_assign(i8* %[[V6]], i8* %[[BLOCKCOPY_SRC]], i32 8) // CHECK-NEXT: ret void -// CHECK-LABEL: define linkonce_odr hidden void @__destroy_helper_block_4_20r(i8* %0) unnamed_addr +// CHECK-LABEL: define linkonce_odr hidden void @__destroy_helper_block_4_20r(i8* frozen %0) unnamed_addr // CHECK: %[[_ADDR:.*]] = alloca i8*, align 4 // CHECK-NEXT: store i8* %0, i8** %[[_ADDR]], align 4 // CHECK-NEXT: %[[V1:.*]] = load i8*, i8** %[[_ADDR]], align 4 diff --git a/clang/test/CodeGen/bool-convert.c b/clang/test/CodeGen/bool-convert.c --- a/clang/test/CodeGen/bool-convert.c +++ b/clang/test/CodeGen/bool-convert.c @@ -14,7 +14,7 @@ // CHECK-LABEL: @test4 = global [0 x i8]* null _Bool (*test4)[]; -// CHECK-LABEL: define void @f(i32 %x) +// CHECK-LABEL: define void @f(i32 frozen %x) void f(int x) { // CHECK: alloca i8, align 1 _Bool test5; diff --git a/clang/test/CodeGen/bpf-attr-preserve-access-index-4.c b/clang/test/CodeGen/bpf-attr-preserve-access-index-4.c --- a/clang/test/CodeGen/bpf-attr-preserve-access-index-4.c +++ b/clang/test/CodeGen/bpf-attr-preserve-access-index-4.c @@ -25,7 +25,7 @@ return arg->a.b[2].c; } -// CHECK: define dso_local i32 @test +// CHECK: define dso_local frozen i32 @test // CHECK-NOT: call %struct.s2* @llvm.preserve.struct.access.index.p0s_struct.s2s.p0s_struct.s3s // CHECK: call %union.anon* @llvm.preserve.struct.access.index.p0s_union.anons.p0s_struct.s2s(%struct.s2* %{{[0-9a-z]+}}, i32 0, i32 0) // CHECK: call %union.anon* @llvm.preserve.union.access.index.p0s_union.anons.p0s_union.anons(%union.anon* %{{[0-9a-z]+}}, i32 0) diff --git a/clang/test/CodeGen/builtin-align-array.c b/clang/test/CodeGen/builtin-align-array.c --- a/clang/test/CodeGen/builtin-align-array.c +++ b/clang/test/CodeGen/builtin-align-array.c @@ -4,7 +4,7 @@ extern int func(char *c); -// CHECK-LABEL: define {{[^@]+}}@test_array() #0 +// CHECK-LABEL: define frozen {{[^@]+}}@test_array() #0 // CHECK-NEXT: entry: // CHECK-NEXT: [[BUF:%.*]] = alloca [1024 x i8], align 16 // CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1024 x i8], [1024 x i8]* [[BUF]], i64 0, i64 44 @@ -16,7 +16,7 @@ // CHECK-NEXT: [[MASKEDPTR:%.*]] = and i64 [[PTRINT]], 15 // CHECK-NEXT: [[MASKCOND:%.*]] = icmp eq i64 [[MASKEDPTR]], 0 // CHECK-NEXT: call void @llvm.assume(i1 [[MASKCOND]]) -// CHECK-NEXT: [[CALL:%.*]] = call i32 @func(i8* [[ALIGNED_RESULT]]) +// CHECK-NEXT: [[CALL:%.*]] = call frozen i32 @func(i8* frozen [[ALIGNED_RESULT]]) // CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds [1024 x i8], [1024 x i8]* [[BUF]], i64 0, i64 22 // CHECK-NEXT: [[INTPTR2:%.*]] = ptrtoint i8* [[ARRAYIDX1]] to i64 // CHECK-NEXT: [[OVER_BOUNDARY:%.*]] = add i64 [[INTPTR2]], 31 @@ -27,7 +27,7 @@ // CHECK-NEXT: [[MASKEDPTR8:%.*]] = and i64 [[PTRINT7]], 31 // CHECK-NEXT: [[MASKCOND9:%.*]] = icmp eq i64 [[MASKEDPTR8]], 0 // CHECK-NEXT: call void @llvm.assume(i1 [[MASKCOND9]]) -// CHECK-NEXT: [[CALL10:%.*]] = call i32 @func(i8* [[ALIGNED_RESULT6]]) +// CHECK-NEXT: [[CALL10:%.*]] = call frozen i32 @func(i8* frozen [[ALIGNED_RESULT6]]) // CHECK-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds [1024 x i8], [1024 x i8]* [[BUF]], i64 0, i64 16 // CHECK-NEXT: [[SRC_ADDR:%.*]] = ptrtoint i8* [[ARRAYIDX11]] to i64 // CHECK-NEXT: [[SET_BITS:%.*]] = and i64 [[SRC_ADDR]], 63 @@ -42,7 +42,7 @@ return __builtin_is_aligned(&buf[16], 64); } -// CHECK-LABEL: define {{[^@]+}}@test_array_should_not_mask() #0 +// CHECK-LABEL: define frozen {{[^@]+}}@test_array_should_not_mask() #0 // CHECK-NEXT: entry: // CHECK-NEXT: [[BUF:%.*]] = alloca [1024 x i8], align 32 // CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1024 x i8], [1024 x i8]* [[BUF]], i64 0, i64 64 @@ -54,7 +54,7 @@ // CHECK-NEXT: [[MASKEDPTR:%.*]] = and i64 [[PTRINT]], 15 // CHECK-NEXT: [[MASKCOND:%.*]] = icmp eq i64 [[MASKEDPTR]], 0 // CHECK-NEXT: call void @llvm.assume(i1 [[MASKCOND]]) -// CHECK-NEXT: [[CALL:%.*]] = call i32 @func(i8* [[ALIGNED_RESULT]]) +// CHECK-NEXT: [[CALL:%.*]] = call frozen i32 @func(i8* frozen [[ALIGNED_RESULT]]) // CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds [1024 x i8], [1024 x i8]* [[BUF]], i64 0, i64 32 // CHECK-NEXT: [[INTPTR2:%.*]] = ptrtoint i8* [[ARRAYIDX1]] to i64 // CHECK-NEXT: [[OVER_BOUNDARY:%.*]] = add i64 [[INTPTR2]], 31 @@ -65,7 +65,7 @@ // CHECK-NEXT: [[MASKEDPTR8:%.*]] = and i64 [[PTRINT7]], 31 // CHECK-NEXT: [[MASKCOND9:%.*]] = icmp eq i64 [[MASKEDPTR8]], 0 // CHECK-NEXT: call void @llvm.assume(i1 [[MASKCOND9]]) -// CHECK-NEXT: [[CALL10:%.*]] = call i32 @func(i8* [[ALIGNED_RESULT6]]) +// CHECK-NEXT: [[CALL10:%.*]] = call frozen i32 @func(i8* frozen [[ALIGNED_RESULT6]]) // CHECK-NEXT: ret i32 1 // int test_array_should_not_mask(void) { diff --git a/clang/test/CodeGen/builtin-align.c b/clang/test/CodeGen/builtin-align.c --- a/clang/test/CodeGen/builtin-align.c +++ b/clang/test/CodeGen/builtin-align.c @@ -49,7 +49,7 @@ // CHECK: @up_2 = global i32 256, align 4 /// Capture the IR type here to use in the remaining FileCheck captures: -// CHECK: define {{[^@]+}}@get_type() #0 +// CHECK: define frozen {{[^@]+}}@get_type() #0 // CHECK-NEXT: entry: // POINTER-NEXT: ret [[$TYPE:.+]] null // INTEGER-NEXT: ret [[$TYPE:.+]] 0 @@ -58,8 +58,8 @@ return (TYPE)0; } -// CHECK-LABEL: define {{[^@]+}}@is_aligned -// CHECK-SAME: ([[$TYPE]] {{[^%]*}}[[PTR:%.*]], i32 [[ALIGN:%.*]]) #0 +// CHECK-LABEL: define frozen {{[^@]+}}@is_aligned +// CHECK-SAME: ([[$TYPE]] {{[^%]*}}[[PTR:%.*]], i32 frozen [[ALIGN:%.*]]) #0 // CHECK-NEXT: entry: // ALIGNMENT_EXT-NEXT: [[ALIGNMENT:%.*]] = zext i32 [[ALIGN]] to [[ALIGN_TYPE:i64]] // ALIGNMENT_TRUNC-NEXT: [[ALIGNMENT:%.*]] = trunc i32 [[ALIGN]] to [[ALIGN_TYPE:i16]] @@ -73,8 +73,8 @@ return __builtin_is_aligned(ptr, align); } -// CHECK-LABEL: define {{[^@]+}}@align_up -// CHECK-SAME: ([[$TYPE]] {{[^%]*}}[[PTR:%.*]], i32 [[ALIGN:%.*]]) #0 +// CHECK-LABEL: define frozen {{[^@]+}}@align_up +// CHECK-SAME: ([[$TYPE]] {{[^%]*}}[[PTR:%.*]], i32 frozen [[ALIGN:%.*]]) #0 // CHECK-NEXT: entry: // ALIGNMENT_EXT-NEXT: [[ALIGNMENT:%.*]] = zext i32 [[ALIGN]] to [[ALIGN_TYPE:i64]] // ALIGNMENT_TRUNC-NEXT: [[ALIGNMENT:%.*]] = trunc i32 [[ALIGN]] to [[ALIGN_TYPE:i16]] @@ -100,8 +100,8 @@ return __builtin_align_up(ptr, align); } -// CHECK-LABEL: define {{[^@]+}}@align_down -// CHECK-SAME: ([[$TYPE]] {{[^%]*}}[[PTR:%.*]], i32 [[ALIGN:%.*]]) #0 +// CHECK-LABEL: define frozen {{[^@]+}}@align_down +// CHECK-SAME: ([[$TYPE]] {{[^%]*}}[[PTR:%.*]], i32 frozen [[ALIGN:%.*]]) #0 // CHECK-NEXT: entry: // ALIGNMENT_EXT-NEXT: [[ALIGNMENT:%.*]] = zext i32 [[ALIGN]] to [[ALIGN_TYPE:i64]] // ALIGNMENT_TRUNC-NEXT: [[ALIGNMENT:%.*]] = trunc i32 [[ALIGN]] to [[ALIGN_TYPE:i16]] diff --git a/clang/test/CodeGen/builtin-assume-aligned.c b/clang/test/CodeGen/builtin-assume-aligned.c --- a/clang/test/CodeGen/builtin-assume-aligned.c +++ b/clang/test/CodeGen/builtin-assume-aligned.c @@ -46,7 +46,7 @@ // CHECK-LABEL: @test5( // CHECK-NEXT: entry: -// CHECK-NEXT: [[CALL:%.*]] = call align 64 i32* (...) @m1() +// CHECK-NEXT: [[CALL:%.*]] = call frozen align 64 i32* (...) @m1() // CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[CALL]], align 4 // CHECK-NEXT: ret i32 [[TMP0]] // diff --git a/clang/test/CodeGen/builtin-assume.c b/clang/test/CodeGen/builtin-assume.c --- a/clang/test/CodeGen/builtin-assume.c +++ b/clang/test/CodeGen/builtin-assume.c @@ -12,11 +12,11 @@ // CHECK: [[CMP:%.+]] = icmp ne i32* [[A]], null // CHECK: call void @llvm.assume(i1 [[CMP]]) -// CHECK: [[CALL:%.+]] = call i32 @isconst() +// CHECK: [[CALL:%.+]] = call frozen i32 @isconst() // CHECK: [[BOOL:%.+]] = icmp ne i32 [[CALL]], 0 // CHECK: call void @llvm.assume(i1 [[BOOL]]) -// CHECK: [[CALLPURE:%.+]] = call i32 @ispure() +// CHECK: [[CALLPURE:%.+]] = call frozen i32 @ispure() // CHECK: [[BOOLPURE:%.+]] = icmp ne i32 [[CALLPURE]], 0 // CHECK: call void @llvm.assume(i1 [[BOOLPURE]]) #ifdef _MSC_VER @@ -32,7 +32,7 @@ // Nothing is generated for an assume with side effects... // CHECK-NOT: load i32*, i32** %i.addr // CHECK-NOT: call void @llvm.assume -// CHECK-NOT: call i32 @nonconst() +// CHECK-NOT: call frozen i32 @nonconst() #ifdef _MSC_VER __assume(++i != 0) __assume(nonconst()); diff --git a/clang/test/CodeGen/builtin-attributes.c b/clang/test/CodeGen/builtin-attributes.c --- a/clang/test/CodeGen/builtin-attributes.c +++ b/clang/test/CodeGen/builtin-attributes.c @@ -1,7 +1,7 @@ // REQUIRES: arm-registered-target // RUN: %clang_cc1 -triple arm-unknown-linux-gnueabi -emit-llvm -o - %s | FileCheck %s -// CHECK: declare i32 @printf(i8*, ...) +// CHECK: declare frozen i32 @printf(i8* frozen, ...) void f0() { printf("a\n"); } @@ -12,7 +12,7 @@ exit(1); } -// CHECK: call i8* @strstr{{.*}} [[NUW:#[0-9]+]] +// CHECK: call frozen i8* @strstr{{.*}} [[NUW:#[0-9]+]] char* f2(char* a, char* b) { return __builtin_strstr(a, b); } @@ -21,27 +21,27 @@ // // // CHECK: f3 -// CHECK: call double @frexp(double % +// CHECK: call frozen double @frexp(double frozen % // CHECK-NOT: readnone -// CHECK: call float @frexpf(float % +// CHECK: call frozen float @frexpf(float frozen % // CHECK-NOT: readnone -// CHECK: call double @frexpl(double % +// CHECK: call frozen double @frexpl(double frozen % // CHECK-NOT: readnone // // Same thing for modf and friends. // -// CHECK: call double @modf(double % +// CHECK: call frozen double @modf(double frozen % // CHECK-NOT: readnone -// CHECK: call float @modff(float % +// CHECK: call frozen float @modff(float frozen % // CHECK-NOT: readnone -// CHECK: call double @modfl(double % +// CHECK: call frozen double @modfl(double frozen % // CHECK-NOT: readnone // -// CHECK: call double @remquo(double % +// CHECK: call frozen double @remquo(double frozen % // CHECK-NOT: readnone -// CHECK: call float @remquof(float % +// CHECK: call frozen float @remquof(float frozen % // CHECK-NOT: readnone -// CHECK: call double @remquol(double % +// CHECK: call frozen double @remquol(double frozen % // CHECK-NOT: readnone // CHECK: ret int f3(double x) { diff --git a/clang/test/CodeGen/builtin-bpf-btf-type-id.c b/clang/test/CodeGen/builtin-bpf-btf-type-id.c --- a/clang/test/CodeGen/builtin-bpf-btf-type-id.c +++ b/clang/test/CodeGen/builtin-bpf-btf-type-id.c @@ -4,9 +4,9 @@ unsigned test1(int a) { return __builtin_btf_type_id(a, 0); } unsigned test2(int a) { return __builtin_btf_type_id(&a, 0); } -// CHECK: define dso_local i32 @test1 +// CHECK: define dso_local frozen i32 @test1 // CHECK: call i32 @llvm.bpf.btf.type.id.p0i32.i32(i32* %{{[0-9a-z.]+}}, i32 1, i64 0), !dbg !{{[0-9]+}}, !llvm.preserve.access.index ![[INT:[0-9]+]] -// CHECK: define dso_local i32 @test2 +// CHECK: define dso_local frozen i32 @test2 // CHECK: call i32 @llvm.bpf.btf.type.id.p0i32.i32(i32* %{{[0-9a-z.]+}}, i32 0, i64 0), !dbg !{{[0-9]+}}, !llvm.preserve.access.index ![[INT_POINTER:[0-9]+]] // // CHECK: ![[INT]] = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed diff --git a/clang/test/CodeGen/builtin-constant-p.c b/clang/test/CodeGen/builtin-constant-p.c --- a/clang/test/CodeGen/builtin-constant-p.c +++ b/clang/test/CodeGen/builtin-constant-p.c @@ -48,7 +48,7 @@ } int test4() { - // CHECK: define i32 @test4 + // CHECK: define frozen i32 @test4 // CHECK: ret i32 0 return __builtin_constant_p(test4_i(test3_c)); } diff --git a/clang/test/CodeGen/builtin-expect.c b/clang/test/CodeGen/builtin-expect.c --- a/clang/test/CodeGen/builtin-expect.c +++ b/clang/test/CodeGen/builtin-expect.c @@ -5,7 +5,7 @@ // If optimizations are on, generate the correct expect and preserve other necessary operations. int expect_taken(int x) { -// ALL-LABEL: define i32 @expect_taken +// ALL-LABEL: define frozen i32 @expect_taken // O1: call i64 @llvm.expect.i64(i64 {{%.*}}, i64 1) // O0-NOT: @llvm.expect @@ -16,7 +16,7 @@ int expect_not_taken(int x) { -// ALL-LABEL: define i32 @expect_not_taken +// ALL-LABEL: define frozen i32 @expect_not_taken // O1: call i64 @llvm.expect.i64(i64 {{%.*}}, i64 0) // O0-NOT: @llvm.expect @@ -32,7 +32,7 @@ void expect_value_side_effects() { // ALL-LABEL: define void @expect_value_side_effects() -// ALL: [[CALL:%.*]] = call i32 @y +// ALL: [[CALL:%.*]] = call frozen i32 @y // O1: [[SEXT:%.*]] = sext i32 [[CALL]] to i64 // O1: call i64 @llvm.expect.i64(i64 {{%.*}}, i64 [[SEXT]]) // O0-NOT: @llvm.expect @@ -49,9 +49,9 @@ long bar(); int main() { -// ALL-LABEL: define i32 @main() +// ALL-LABEL: define frozen i32 @main() // ALL: call void @isigprocmask() -// ALL: [[CALL:%.*]] = call i64 (...) @bar() +// ALL: [[CALL:%.*]] = call frozen i64 (...) @bar() // O1: call i64 @llvm.expect.i64(i64 0, i64 [[CALL]]) // O0-NOT: @llvm.expect @@ -60,7 +60,7 @@ int switch_cond(int x) { -// ALL-LABEL: define i32 @switch_cond +// ALL-LABEL: define frozen i32 @switch_cond // O1: call i64 @llvm.expect.i64(i64 {{%.*}}, i64 5) // O0-NOT: @llvm.expect @@ -79,7 +79,7 @@ } int variable_expected(int stuff) { -// ALL-LABEL: define i32 @variable_expected( +// ALL-LABEL: define frozen i32 @variable_expected( // O1: call i64 @llvm.expect.i64(i64 {{%.*}}, i64 {{%.*}}) // O0-NOT: @llvm.expect diff --git a/clang/test/CodeGen/builtin-memfns.c b/clang/test/CodeGen/builtin-memfns.c --- a/clang/test/CodeGen/builtin-memfns.c +++ b/clang/test/CodeGen/builtin-memfns.c @@ -96,10 +96,10 @@ // CHECK-LABEL: @test10 // FIXME: Consider lowering these to llvm.memcpy / llvm.memmove. void test10() { - // CHECK: call i32* @wmemcpy(i32* @dest, i32* @src, i32 4) + // CHECK: call frozen i32* @wmemcpy(i32* frozen @dest, i32* frozen @src, i32 frozen 4) __builtin_wmemcpy(&dest, &src, 4); - // CHECK: call i32* @wmemmove(i32* @dest, i32* @src, i32 4) + // CHECK: call frozen i32* @wmemmove(i32* frozen @dest, i32* frozen @src, i32 frozen 4) __builtin_wmemmove(&dest, &src, 4); } @@ -122,6 +122,6 @@ // CHECK-LABEL: @test13 void test13(char *d, char *s, int c, size_t n) { - // CHECK: call i8* @memccpy + // CHECK: call frozen i8* @memccpy memccpy(d, s, c, n); } diff --git a/clang/test/CodeGen/builtin-ms-noop.cpp b/clang/test/CodeGen/builtin-ms-noop.cpp --- a/clang/test/CodeGen/builtin-ms-noop.cpp +++ b/clang/test/CodeGen/builtin-ms-noop.cpp @@ -5,7 +5,7 @@ }; extern "C" int f() { -// CHECK: define i32 @f() +// CHECK: define frozen i32 @f() // CHECK-NOT: call void @_ZN1AD1Ev // CHECK: ret i32 0 return __noop(A()); @@ -13,18 +13,18 @@ extern "C" int g() { return __noop; -// CHECK: define i32 @g() +// CHECK: define frozen i32 @g() // CHECK: ret i32 0 } extern "C" int h() { return (__noop); -// CHECK: define i32 @h() +// CHECK: define frozen i32 @h() // CHECK: ret i32 0 } extern "C" int i() { return __noop + 1; -// CHECK: define i32 @i() +// CHECK: define frozen i32 @i() // CHECK: ret i32 1 } diff --git a/clang/test/CodeGen/builtin-preserve-access-index-array.c b/clang/test/CodeGen/builtin-preserve-access-index-array.c --- a/clang/test/CodeGen/builtin-preserve-access-index-array.c +++ b/clang/test/CodeGen/builtin-preserve-access-index-array.c @@ -10,7 +10,7 @@ const void *unit1(struct s1 *arg) { return _(&arg->b[2]); } -// CHECK: define dso_local i8* @unit1 +// CHECK: define dso_local frozen i8* @unit1 // CHECK: call [4 x i32]* @llvm.preserve.struct.access.index.p0a4i32.p0s_struct.s1s(%struct.s1* %{{[0-9a-z]+}}, i32 1, i32 1), !dbg !{{[0-9]+}}, !llvm.preserve.access.index ![[STRUCT_S1:[0-9]+]] // CHECK: call i32* @llvm.preserve.array.access.index.p0i32.p0a4i32([4 x i32]* %{{[0-9a-z]+}}, i32 1, i32 2), !dbg !{{[0-9]+}}, !llvm.preserve.access.index ![[ARRAY:[0-9]+]] // diff --git a/clang/test/CodeGen/builtin-preserve-access-index-nonptr.c b/clang/test/CodeGen/builtin-preserve-access-index-nonptr.c --- a/clang/test/CodeGen/builtin-preserve-access-index-nonptr.c +++ b/clang/test/CodeGen/builtin-preserve-access-index-nonptr.c @@ -10,7 +10,7 @@ int unit1(struct s1 *arg) { return _(arg->b[2]); } -// CHECK: define dso_local i32 @unit1 +// CHECK: define dso_local frozen i32 @unit1 // CHECK: call [4 x i32]* @llvm.preserve.struct.access.index.p0a4i32.p0s_struct.s1s(%struct.s1* %{{[0-9a-z]+}}, i32 1, i32 1), !dbg !{{[0-9]+}}, !llvm.preserve.access.index ![[STRUCT_S1:[0-9]+]] // CHECK: call i32* @llvm.preserve.array.access.index.p0i32.p0a4i32([4 x i32]* %{{[0-9a-z]+}}, i32 1, i32 2), !dbg !{{[0-9]+}}, !llvm.preserve.access.index ![[ARRAY:[0-9]+]] // diff --git a/clang/test/CodeGen/builtin-preserve-access-index-typedef.c b/clang/test/CodeGen/builtin-preserve-access-index-typedef.c --- a/clang/test/CodeGen/builtin-preserve-access-index-typedef.c +++ b/clang/test/CodeGen/builtin-preserve-access-index-typedef.c @@ -14,9 +14,9 @@ int test2(const __u *arg) { return arg->b; } -// CHECK: define dso_local i32 @test1 +// CHECK: define dso_local frozen i32 @test1 // CHECK: call i32* @llvm.preserve.struct.access.index.p0i32.p0s_struct.__ts(%struct.__t* %{{[0-9a-z]+}}, i32 0, i32 0), !dbg !{{[0-9]+}}, !llvm.preserve.access.index ![[TYPEDEF_STRUCT:[0-9]+]] -// CHECK: define dso_local i32 @test2 +// CHECK: define dso_local frozen i32 @test2 // CHECK: call %union.__u* @llvm.preserve.union.access.index.p0s_union.__us.p0s_union.__us(%union.__u* %{{[0-9a-z]+}}, i32 0), !dbg !{{[0-9]+}}, !llvm.preserve.access.index ![[CONST_TYPEDEF:[0-9]+]] // // CHECK: ![[TYPEDEF_STRUCT]] = !DIDerivedType(tag: DW_TAG_typedef, name: "__t" diff --git a/clang/test/CodeGen/builtin-preserve-access-index.c b/clang/test/CodeGen/builtin-preserve-access-index.c --- a/clang/test/CodeGen/builtin-preserve-access-index.c +++ b/clang/test/CodeGen/builtin-preserve-access-index.c @@ -5,7 +5,7 @@ const void *unit1(const void *arg) { return _(arg); } -// CHECK: define dso_local i8* @unit1 +// CHECK: define dso_local frozen i8* @unit1 // CHECK-NOT: llvm.preserve.array.access.index // CHECK-NOT: llvm.preserve.struct.access.index // CHECK-NOT: llvm.preserve.union.access.index @@ -13,7 +13,7 @@ const void *unit2(void) { return _((const void *)0xffffffffFFFF0000ULL); } -// CHECK: define dso_local i8* @unit2 +// CHECK: define dso_local frozen i8* @unit2 // CHECK-NOT: llvm.preserve.array.access.index // CHECK-NOT: llvm.preserve.struct.access.index // CHECK-NOT: llvm.preserve.union.access.index @@ -21,7 +21,7 @@ const void *unit3(const int *arg) { return _(arg + 1); } -// CHECK: define dso_local i8* @unit3 +// CHECK: define dso_local frozen i8* @unit3 // CHECK-NOT: llvm.preserve.array.access.index // CHECK-NOT: llvm.preserve.struct.access.index // CHECK-NOT: llvm.preserve.union.access.index @@ -29,14 +29,14 @@ const void *unit4(const int *arg) { return _(&arg[1]); } -// CHECK: define dso_local i8* @unit4 +// CHECK: define dso_local frozen i8* @unit4 // CHECK-NOT: getelementptr // CHECK: call i32* @llvm.preserve.array.access.index.p0i32.p0i32(i32* %{{[0-9a-z]+}}, i32 0, i32 1), !dbg !{{[0-9]+}}, !llvm.preserve.access.index ![[POINTER:[0-9]+]] const void *unit5(const int *arg[5]) { return _(&arg[1][2]); } -// CHECK: define dso_local i8* @unit5 +// CHECK: define dso_local frozen i8* @unit5 // CHECK-NOT: getelementptr // CHECK: call i32** @llvm.preserve.array.access.index.p0p0i32.p0p0i32(i32** %{{[0-9a-z]+}}, i32 0, i32 1), !dbg !{{[0-9]+}}, !llvm.preserve.access.index !{{[0-9]+}} // CHECK-NOT: getelementptr @@ -63,28 +63,28 @@ const void *unit6(struct s1 *arg) { return _(&arg->a); } -// CHECK: define dso_local i8* @unit6 +// CHECK: define dso_local frozen i8* @unit6 // CHECK-NOT: getelementptr // CHECK: call i8* @llvm.preserve.struct.access.index.p0i8.p0s_struct.s1s(%struct.s1* %{{[0-9a-z]+}}, i32 0, i32 0), !dbg !{{[0-9]+}}, !llvm.preserve.access.index ![[STRUCT_S1:[0-9]+]] const void *unit7(struct s1 *arg) { return _(&arg->b); } -// CHECK: define dso_local i8* @unit7 +// CHECK: define dso_local frozen i8* @unit7 // CHECK-NOT: getelementptr // CHECK: call i32* @llvm.preserve.struct.access.index.p0i32.p0s_struct.s1s(%struct.s1* %{{[0-9a-z]+}}, i32 1, i32 1), !dbg !{{[0-9]+}}, !llvm.preserve.access.index ![[STRUCT_S1]] const void *unit8(struct s2 *arg) { return _(&arg->b); } -// CHECK: define dso_local i8* @unit8 +// CHECK: define dso_local frozen i8* @unit8 // CHECK-NOT: getelementptr // CHECK: call i32* @llvm.preserve.struct.access.index.p0i32.p0s_struct.s2s(%struct.s2* %{{[0-9a-z]+}}, i32 1, i32 2), !dbg !{{[0-9]+}}, !llvm.preserve.access.index ![[STRUCT_S2:[0-9]+]] const void *unit9(struct s3 *arg) { return _(&arg->b); } -// CHECK: define dso_local i8* @unit9 +// CHECK: define dso_local frozen i8* @unit9 // CHECK-NOT: getelementptr // CHECK: call i32* @llvm.preserve.struct.access.index.p0i32.p0s_struct.s3s(%struct.s3* %{{[0-9a-z]+}}, i32 1, i32 2), !dbg !{{[0-9]+}}, !llvm.preserve.access.index ![[STRUCT_S3:[0-9]+]] @@ -102,21 +102,21 @@ const void *unit10(union u1 *arg) { return _(&arg->a); } -// CHECK: define dso_local i8* @unit10 +// CHECK: define dso_local frozen i8* @unit10 // CHECK-NOT: getelementptr // CHECK: call %union.u1* @llvm.preserve.union.access.index.p0s_union.u1s.p0s_union.u1s(%union.u1* %{{[0-9a-z]+}}, i32 0), !dbg !{{[0-9]+}}, !llvm.preserve.access.index ![[UNION_U1:[0-9]+]] const void *unit11(union u1 *arg) { return _(&arg->b); } -// CHECK: define dso_local i8* @unit11 +// CHECK: define dso_local frozen i8* @unit11 // CHECK-NOT: getelementptr // CHECK: call %union.u1* @llvm.preserve.union.access.index.p0s_union.u1s.p0s_union.u1s(%union.u1* %{{[0-9a-z]+}}, i32 1), !dbg !{{[0-9]+}}, !llvm.preserve.access.index ![[UNION_U1]] const void *unit12(union u2 *arg) { return _(&arg->b); } -// CHECK: define dso_local i8* @unit12 +// CHECK: define dso_local frozen i8* @unit12 // CHECK-NOT: getelementptr // CHECK: call %union.u2* @llvm.preserve.union.access.index.p0s_union.u2s.p0s_union.u2s(%union.u2* %{{[0-9a-z]+}}, i32 1), !dbg !{{[0-9]+}}, !llvm.preserve.access.index ![[UNION_U2:[0-9]+]] @@ -138,7 +138,7 @@ const void *unit13(struct s4 *arg) { return _(&arg->c.b[2]); } -// CHECK: define dso_local i8* @unit13 +// CHECK: define dso_local frozen i8* @unit13 // CHECK: call %union.u* @llvm.preserve.struct.access.index.p0s_union.us.p0s_struct.s4s(%struct.s4* %{{[0-9a-z]+}}, i32 1, i32 1), !dbg !{{[0-9]+}}, !llvm.preserve.access.index ![[STRUCT_S4:[0-9]+]] // CHECK: call %union.u* @llvm.preserve.union.access.index.p0s_union.us.p0s_union.us(%union.u* %{{[0-9a-z]+}}, i32 0), !dbg !{{[0-9]+}}, !llvm.preserve.access.index ![[UNION_I_U:[0-9]+]] // CHECK: call i32* @llvm.preserve.array.access.index.p0i32.p0a4i32([4 x i32]* %{{[0-9a-z]+}}, i32 1, i32 2), !dbg !{{[0-9]+}}, !llvm.preserve.access.index !{{[0-9]+}} @@ -146,7 +146,7 @@ const void *unit14(union u3 *arg) { return _(&arg->c.b[2]); } -// CHECK: define dso_local i8* @unit14 +// CHECK: define dso_local frozen i8* @unit14 // CHECK: call %union.u3* @llvm.preserve.union.access.index.p0s_union.u3s.p0s_union.u3s(%union.u3* %{{[0-9a-z]+}}, i32 0), !dbg !{{[0-9]+}}, !llvm.preserve.access.index ![[UNION_U3:[0-9]+]] // CHECK: call [4 x i32]* @llvm.preserve.struct.access.index.p0a4i32.p0s_struct.ss(%struct.s* %{{[0-9a-z]+}}, i32 0, i32 0), !dbg !{{[0-9]+}}, !llvm.preserve.access.index ![[STRUCT_I_S:[0-9]+]] // CHECK: call i32* @llvm.preserve.array.access.index.p0i32.p0a4i32([4 x i32]* %{{[0-9a-z]+}}, i32 1, i32 2), !dbg !{{[0-9]+}}, !llvm.preserve.access.index !{{[0-9]+}} @@ -154,7 +154,7 @@ const void *unit15(struct s4 *arg) { return _(&arg[2].c.a); } -// CHECK: define dso_local i8* @unit15 +// CHECK: define dso_local frozen i8* @unit15 // CHECK: call %struct.s4* @llvm.preserve.array.access.index.p0s_struct.s4s.p0s_struct.s4s(%struct.s4* %{{[0-9a-z]+}}, i32 0, i32 2), !dbg !{{[0-9]+}}, !llvm.preserve.access.index !{{[0-9]+}} // CHECK: call %union.u* @llvm.preserve.struct.access.index.p0s_union.us.p0s_struct.s4s(%struct.s4* %{{[0-9a-z]+}}, i32 1, i32 1), !dbg !{{[0-9]+}}, !llvm.preserve.access.index ![[STRUCT_S4]] // CHECK: call %union.u* @llvm.preserve.union.access.index.p0s_union.us.p0s_union.us(%union.u* %{{[0-9a-z]+}}, i32 1), !dbg !{{[0-9]+}}, !llvm.preserve.access.index ![[UNION_I_U]] @@ -162,7 +162,7 @@ const void *unit16(union u3 *arg) { return _(&arg[2].a); } -// CHECK: define dso_local i8* @unit16 +// CHECK: define dso_local frozen i8* @unit16 // CHECK: call %union.u3* @llvm.preserve.array.access.index.p0s_union.u3s.p0s_union.u3s(%union.u3* %{{[0-9a-z]+}}, i32 0, i32 2), !dbg !{{[0-9]+}}, !llvm.preserve.access.index !{{[0-9]+}} // CHECK: call %union.u3* @llvm.preserve.union.access.index.p0s_union.u3s.p0s_union.u3s(%union.u3* %{{[0-9a-z]+}}, i32 1), !dbg !{{[0-9]+}}, !llvm.preserve.access.index ![[UNION_U3]] diff --git a/clang/test/CodeGen/builtin-sponentry.c b/clang/test/CodeGen/builtin-sponentry.c --- a/clang/test/CodeGen/builtin-sponentry.c +++ b/clang/test/CodeGen/builtin-sponentry.c @@ -3,6 +3,6 @@ void *test_sponentry() { return __builtin_sponentry(); } -// CHECK-LABEL: define dso_local i8* @test_sponentry() +// CHECK-LABEL: define dso_local frozen i8* @test_sponentry() // CHECK: = tail call i8* @llvm.sponentry.p0i8() // CHECK: ret i8* diff --git a/clang/test/CodeGen/builtin-sqrt.c b/clang/test/CodeGen/builtin-sqrt.c --- a/clang/test/CodeGen/builtin-sqrt.c +++ b/clang/test/CodeGen/builtin-sqrt.c @@ -2,12 +2,12 @@ // RUN: %clang_cc1 -triple x86_64-apple-darwin %s -emit-llvm -o - | FileCheck %s --check-prefix=NO_ERRNO float foo(float X) { - // HAS_ERRNO: call float @sqrtf(float + // HAS_ERRNO: call frozen float @sqrtf(float // NO_ERRNO: call float @llvm.sqrt.f32(float return __builtin_sqrtf(X); } -// HAS_ERRNO: declare float @sqrtf(float) [[ATTR:#[0-9]+]] +// HAS_ERRNO: declare frozen float @sqrtf(float frozen) [[ATTR:#[0-9]+]] // HAS_ERRNO-NOT: attributes [[ATTR]] = {{{.*}} readnone // NO_ERRNO: declare float @llvm.sqrt.f32(float) [[ATTR:#[0-9]+]] diff --git a/clang/test/CodeGen/builtins-arm.c b/clang/test/CodeGen/builtins-arm.c --- a/clang/test/CodeGen/builtins-arm.c +++ b/clang/test/CodeGen/builtins-arm.c @@ -102,56 +102,56 @@ } void ldc(const void *i) { - // CHECK: define void @ldc(i8* %i) + // CHECK: define void @ldc(i8* frozen %i) // CHECK: call void @llvm.arm.ldc(i32 1, i32 2, i8* %i) // CHECK-NEXT: ret void __builtin_arm_ldc(1, 2, i); } void ldcl(const void *i) { - // CHECK: define void @ldcl(i8* %i) + // CHECK: define void @ldcl(i8* frozen %i) // CHECK: call void @llvm.arm.ldcl(i32 1, i32 2, i8* %i) // CHECK-NEXT: ret void __builtin_arm_ldcl(1, 2, i); } void ldc2(const void *i) { - // CHECK: define void @ldc2(i8* %i) + // CHECK: define void @ldc2(i8* frozen %i) // CHECK: call void @llvm.arm.ldc2(i32 1, i32 2, i8* %i) // CHECK-NEXT: ret void __builtin_arm_ldc2(1, 2, i); } void ldc2l(const void *i) { - // CHECK: define void @ldc2l(i8* %i) + // CHECK: define void @ldc2l(i8* frozen %i) // CHECK: call void @llvm.arm.ldc2l(i32 1, i32 2, i8* %i) // CHECK-NEXT: ret void __builtin_arm_ldc2l(1, 2, i); } void stc(void *i) { - // CHECK: define void @stc(i8* %i) + // CHECK: define void @stc(i8* frozen %i) // CHECK: call void @llvm.arm.stc(i32 1, i32 2, i8* %i) // CHECK-NEXT: ret void __builtin_arm_stc(1, 2, i); } void stcl(void *i) { - // CHECK: define void @stcl(i8* %i) + // CHECK: define void @stcl(i8* frozen %i) // CHECK: call void @llvm.arm.stcl(i32 1, i32 2, i8* %i) // CHECK-NEXT: ret void __builtin_arm_stcl(1, 2, i); } void stc2(void *i) { - // CHECK: define void @stc2(i8* %i) + // CHECK: define void @stc2(i8* frozen %i) // CHECK: call void @llvm.arm.stc2(i32 1, i32 2, i8* %i) // CHECK-NEXT: ret void __builtin_arm_stc2(1, 2, i); } void stc2l(void *i) { - // CHECK: define void @stc2l(i8* %i) + // CHECK: define void @stc2l(i8* frozen %i) // CHECK: call void @llvm.arm.stc2l(i32 1, i32 2, i8* %i) // CHECK-NEXT: ret void __builtin_arm_stc2l(1, 2, i); @@ -172,51 +172,51 @@ } unsigned mrc() { - // CHECK: define i32 @mrc() + // CHECK: define frozen i32 @mrc() // CHECK: [[R:%.*]] = call i32 @llvm.arm.mrc(i32 15, i32 0, i32 13, i32 0, i32 3) // CHECK-NEXT: ret i32 [[R]] return __builtin_arm_mrc(15, 0, 13, 0, 3); } unsigned mrc2() { - // CHECK: define i32 @mrc2() + // CHECK: define frozen i32 @mrc2() // CHECK: [[R:%.*]] = call i32 @llvm.arm.mrc2(i32 15, i32 0, i32 13, i32 0, i32 3) // CHECK-NEXT: ret i32 [[R]] return __builtin_arm_mrc2(15, 0, 13, 0, 3); } void mcr(unsigned a) { - // CHECK: define void @mcr(i32 [[A:%.*]]) + // CHECK: define void @mcr(i32 frozen [[A:%.*]]) // CHECK: call void @llvm.arm.mcr(i32 15, i32 0, i32 [[A]], i32 13, i32 0, i32 3) __builtin_arm_mcr(15, 0, a, 13, 0, 3); } void mcr2(unsigned a) { - // CHECK: define void @mcr2(i32 [[A:%.*]]) + // CHECK: define void @mcr2(i32 frozen [[A:%.*]]) // CHECK: call void @llvm.arm.mcr2(i32 15, i32 0, i32 [[A]], i32 13, i32 0, i32 3) __builtin_arm_mcr2(15, 0, a, 13, 0, 3); } void mcrr(uint64_t a) { - // CHECK: define void @mcrr(i64 %{{.*}}) + // CHECK: define void @mcrr(i64 frozen %{{.*}}) // CHECK: call void @llvm.arm.mcrr(i32 15, i32 0, i32 %{{[0-9]+}}, i32 %{{[0-9]+}}, i32 0) __builtin_arm_mcrr(15, 0, a, 0); } void mcrr2(uint64_t a) { - // CHECK: define void @mcrr2(i64 %{{.*}}) + // CHECK: define void @mcrr2(i64 frozen %{{.*}}) // CHECK: call void @llvm.arm.mcrr2(i32 15, i32 0, i32 %{{[0-9]+}}, i32 %{{[0-9]+}}, i32 0) __builtin_arm_mcrr2(15, 0, a, 0); } uint64_t mrrc() { - // CHECK: define i64 @mrrc() + // CHECK: define frozen i64 @mrrc() // CHECK: call { i32, i32 } @llvm.arm.mrrc(i32 15, i32 0, i32 0) return __builtin_arm_mrrc(15, 0, 0); } uint64_t mrrc2() { - // CHECK: define i64 @mrrc2() + // CHECK: define frozen i64 @mrrc2() // CHECK: call { i32, i32 } @llvm.arm.mrrc2(i32 15, i32 0, i32 0) return __builtin_arm_mrrc2(15, 0, 0); } diff --git a/clang/test/CodeGen/builtins-bpf-preserve-field-info-1.c b/clang/test/CodeGen/builtins-bpf-preserve-field-info-1.c --- a/clang/test/CodeGen/builtins-bpf-preserve-field-info-1.c +++ b/clang/test/CodeGen/builtins-bpf-preserve-field-info-1.c @@ -16,7 +16,7 @@ unsigned unit1(struct s1 *arg) { return _(arg->a, 10) + _(arg->b, 10); } -// CHECK: define dso_local i32 @unit1 +// CHECK: define dso_local frozen i32 @unit1 // CHECK: call i8* @llvm.preserve.struct.access.index.p0i8.p0s_struct.s1s(%struct.s1* %{{[0-9a-z]+}}, i32 0, i32 0), !dbg !{{[0-9]+}}, !llvm.preserve.access.index ![[STRUCT_S1:[0-9]+]] // CHECK: call i32 @llvm.bpf.preserve.field.info.p0i8(i8* %{{[0-9a-z]+}}, i64 10), !dbg !{{[0-9]+}} // CHECK: call i8* @llvm.preserve.struct.access.index.p0i8.p0s_struct.s1s(%struct.s1* %{{[0-9a-z]+}}, i32 1, i32 1), !dbg !{{[0-9]+}}, !llvm.preserve.access.index ![[STRUCT_S1:[0-9]+]] @@ -25,7 +25,7 @@ unsigned unit2(union u1 *arg) { return _(arg->a, 10) + _(arg->b, 10); } -// CHECK: define dso_local i32 @unit2 +// CHECK: define dso_local frozen i32 @unit2 // CHECK: call %union.u1* @llvm.preserve.union.access.index.p0s_union.u1s.p0s_union.u1s(%union.u1* %{{[0-9a-z]+}}, i32 0), !dbg !{{[0-9]+}}, !llvm.preserve.access.index ![[UNION_U1:[0-9]+]] // CHECK: call i32 @llvm.bpf.preserve.field.info.p0i8(i8* %{{[0-9a-z]+}}, i64 10), !dbg !{{[0-9]+}} // CHECK: call i8* @llvm.preserve.struct.access.index.p0i8.p0s_union.u1s(%union.u1* %{{[0-9a-z]+}}, i32 0, i32 1), !dbg !{{[0-9]+}}, !llvm.preserve.access.index ![[UNION_U1:[0-9]+]] diff --git a/clang/test/CodeGen/builtins-bpf-preserve-field-info-2.c b/clang/test/CodeGen/builtins-bpf-preserve-field-info-2.c --- a/clang/test/CodeGen/builtins-bpf-preserve-field-info-2.c +++ b/clang/test/CodeGen/builtins-bpf-preserve-field-info-2.c @@ -14,7 +14,7 @@ unsigned unit1(struct s2 *arg) { return _(arg->s.a, 10) + _(arg->s.b, 10); } -// CHECK: define dso_local i32 @unit1 +// CHECK: define dso_local frozen i32 @unit1 // CHECK: call %struct.s1* @llvm.preserve.struct.access.index.p0s_struct.s1s.p0s_struct.s2s(%struct.s2* %{{[0-9a-z]+}}, i32 0, i32 0), !dbg !{{[0-9]+}}, !llvm.preserve.access.index ![[STRUCT_S2:[0-9]+]] // CHECK: call i8* @llvm.preserve.struct.access.index.p0i8.p0s_struct.s1s(%struct.s1* %{{[0-9a-z]+}}, i32 0, i32 0), !dbg !{{[0-9]+}}, !llvm.preserve.access.index ![[STRUCT_S1:[0-9]+]] // CHECK: call i32 @llvm.bpf.preserve.field.info.p0i8(i8* %{{[0-9a-z]+}}, i64 10), !dbg !{{[0-9]+}} diff --git a/clang/test/CodeGen/builtins-memcpy-inline.c b/clang/test/CodeGen/builtins-memcpy-inline.c --- a/clang/test/CodeGen/builtins-memcpy-inline.c +++ b/clang/test/CodeGen/builtins-memcpy-inline.c @@ -1,25 +1,25 @@ // REQUIRES: x86-registered-target // RUN: %clang_cc1 -triple x86_64-unknown-linux -emit-llvm %s -o - | FileCheck %s -// CHECK-LABEL: define void @test_memcpy_inline_0(i8* %dst, i8* %src) +// CHECK-LABEL: define void @test_memcpy_inline_0(i8* frozen %dst, i8* frozen %src) void test_memcpy_inline_0(void *dst, const void *src) { // CHECK: call void @llvm.memcpy.inline.p0i8.p0i8.i64(i8* align 1 %0, i8* align 1 %1, i64 0, i1 false) __builtin_memcpy_inline(dst, src, 0); } -// CHECK-LABEL: define void @test_memcpy_inline_1(i8* %dst, i8* %src) +// CHECK-LABEL: define void @test_memcpy_inline_1(i8* frozen %dst, i8* frozen %src) void test_memcpy_inline_1(void *dst, const void *src) { // CHECK: call void @llvm.memcpy.inline.p0i8.p0i8.i64(i8* align 1 %0, i8* align 1 %1, i64 1, i1 false) __builtin_memcpy_inline(dst, src, 1); } -// CHECK-LABEL: define void @test_memcpy_inline_4(i8* %dst, i8* %src) +// CHECK-LABEL: define void @test_memcpy_inline_4(i8* frozen %dst, i8* frozen %src) void test_memcpy_inline_4(void *dst, const void *src) { // CHECK: call void @llvm.memcpy.inline.p0i8.p0i8.i64(i8* align 1 %0, i8* align 1 %1, i64 4, i1 false) __builtin_memcpy_inline(dst, src, 4); } -// CHECK-LABEL: define void @test_memcpy_inline_aligned_buffers(i64* %dst, i64* %src) +// CHECK-LABEL: define void @test_memcpy_inline_aligned_buffers(i64* frozen %dst, i64* frozen %src) void test_memcpy_inline_aligned_buffers(unsigned long long *dst, const unsigned long long *src) { // CHECK: call void @llvm.memcpy.inline.p0i8.p0i8.i64(i8* align 8 %2, i8* align 8 %3, i64 4, i1 false) __builtin_memcpy_inline(dst, src, 4); diff --git a/clang/test/CodeGen/builtins-ms.c b/clang/test/CodeGen/builtins-ms.c --- a/clang/test/CodeGen/builtins-ms.c +++ b/clang/test/CodeGen/builtins-ms.c @@ -5,12 +5,12 @@ void test_alloca(int n) { capture(_alloca(n)); // CHECK: %[[arg:.*]] = alloca i8, i32 %{{.*}}, align 16 - // CHECK: call void @capture(i8* %[[arg]]) + // CHECK: call void @capture(i8* frozen %[[arg]]) } // CHECK-LABEL: define dso_local void @test_alloca_with_align( void test_alloca_with_align(int n) { capture(__builtin_alloca_with_align(n, 64)); // CHECK: %[[arg:.*]] = alloca i8, i32 %{{.*}}, align 8 - // CHECK: call void @capture(i8* %[[arg]]) + // CHECK: call void @capture(i8* frozen %[[arg]]) } diff --git a/clang/test/CodeGen/builtins-multiprecision.c b/clang/test/CodeGen/builtins-multiprecision.c --- a/clang/test/CodeGen/builtins-multiprecision.c +++ b/clang/test/CodeGen/builtins-multiprecision.c @@ -60,7 +60,7 @@ unsigned long test_addcl(unsigned long x, unsigned long y, unsigned long carryin, unsigned long *z) { // long is i32 on i686, i64 on x86_64. - // CHECK: @test_addcl([[UL:i32|i64]] %x + // CHECK: @test_addcl([[UL:i32|i64]] frozen %x // CHECK: %{{.+}} = {{.*}} call { [[UL]], i1 } @llvm.uadd.with.overflow.[[UL]]([[UL]] %x, [[UL]] %y) // CHECK: %{{.+}} = extractvalue { [[UL]], i1 } %{{.+}}, 1 // CHECK: %{{.+}} = extractvalue { [[UL]], i1 } %{{.+}}, 0 @@ -152,7 +152,7 @@ unsigned long test_subcl(unsigned long x, unsigned long y, unsigned long carryin, unsigned long *z) { - // CHECK: @test_subcl([[UL:i32|i64]] %x + // CHECK: @test_subcl([[UL:i32|i64]] frozen %x // CHECK: %{{.+}} = {{.*}} call { [[UL]], i1 } @llvm.usub.with.overflow.[[UL]]([[UL]] %x, [[UL]] %y) // CHECK: %{{.+}} = extractvalue { [[UL]], i1 } %{{.+}}, 1 // CHECK: %{{.+}} = extractvalue { [[UL]], i1 } %{{.+}}, 0 diff --git a/clang/test/CodeGen/builtins-overflow.c b/clang/test/CodeGen/builtins-overflow.c --- a/clang/test/CodeGen/builtins-overflow.c +++ b/clang/test/CodeGen/builtins-overflow.c @@ -14,7 +14,7 @@ void overflowed(void); unsigned test_add_overflow_uint_uint_uint(unsigned x, unsigned y) { - // CHECK-LABEL: define {{(dso_local )?}}i32 @test_add_overflow_uint_uint_uint + // CHECK-LABEL: define {{(dso_local )?}}frozen i32 @test_add_overflow_uint_uint_uint // CHECK-NOT: ext // CHECK: [[S:%.+]] = call { i32, i1 } @llvm.uadd.with.overflow.i32(i32 %{{.+}}, i32 %{{.+}}) // CHECK-DAG: [[Q:%.+]] = extractvalue { i32, i1 } [[S]], 0 @@ -28,7 +28,7 @@ } int test_add_overflow_int_int_int(int x, int y) { - // CHECK-LABEL: define {{(dso_local )?}}i32 @test_add_overflow_int_int_int + // CHECK-LABEL: define {{(dso_local )?}}frozen i32 @test_add_overflow_int_int_int // CHECK-NOT: ext // CHECK: [[S:%.+]] = call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 %{{.+}}, i32 %{{.+}}) // CHECK-DAG: [[C:%.+]] = extractvalue { i32, i1 } [[S]], 1 @@ -42,7 +42,7 @@ } unsigned test_sub_overflow_uint_uint_uint(unsigned x, unsigned y) { - // CHECK-LABEL: define {{(dso_local )?}}i32 @test_sub_overflow_uint_uint_uint + // CHECK-LABEL: define {{(dso_local )?}}frozen i32 @test_sub_overflow_uint_uint_uint // CHECK-NOT: ext // CHECK: [[S:%.+]] = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %{{.+}}, i32 %{{.+}}) // CHECK-DAG: [[Q:%.+]] = extractvalue { i32, i1 } [[S]], 0 @@ -56,7 +56,7 @@ } int test_sub_overflow_int_int_int(int x, int y) { - // CHECK-LABEL: define {{(dso_local )?}}i32 @test_sub_overflow_int_int_int + // CHECK-LABEL: define {{(dso_local )?}}frozen i32 @test_sub_overflow_int_int_int // CHECK-NOT: ext // CHECK: [[S:%.+]] = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %{{.+}}, i32 %{{.+}}) // CHECK-DAG: [[C:%.+]] = extractvalue { i32, i1 } [[S]], 1 @@ -70,7 +70,7 @@ } unsigned test_mul_overflow_uint_uint_uint(unsigned x, unsigned y) { - // CHECK-LABEL: define {{(dso_local )?}}i32 @test_mul_overflow_uint_uint_uint + // CHECK-LABEL: define {{(dso_local )?}}frozen i32 @test_mul_overflow_uint_uint_uint // CHECK-NOT: ext // CHECK: [[S:%.+]] = call { i32, i1 } @llvm.umul.with.overflow.i32(i32 %{{.+}}, i32 %{{.+}}) // CHECK-DAG: [[Q:%.+]] = extractvalue { i32, i1 } [[S]], 0 @@ -84,7 +84,7 @@ } int test_mul_overflow_int_int_int(int x, int y) { - // CHECK-LABEL: define {{(dso_local )?}}i32 @test_mul_overflow_int_int_int + // CHECK-LABEL: define {{(dso_local )?}}frozen i32 @test_mul_overflow_int_int_int // CHECK-NOT: ext // CHECK: [[S:%.+]] = call { i32, i1 } @llvm.smul.with.overflow.i32(i32 %{{.+}}, i32 %{{.+}}) // CHECK-DAG: [[C:%.+]] = extractvalue { i32, i1 } [[S]], 1 @@ -98,7 +98,7 @@ } int test_add_overflow_uint_int_int(unsigned x, int y) { - // CHECK-LABEL: define {{(dso_local )?}}i32 @test_add_overflow_uint_int_int + // CHECK-LABEL: define {{(dso_local )?}}frozen i32 @test_add_overflow_uint_int_int // CHECK: [[XE:%.+]] = zext i32 %{{.+}} to i33 // CHECK: [[YE:%.+]] = sext i32 %{{.+}} to i33 // CHECK: [[S:%.+]] = call { i33, i1 } @llvm.sadd.with.overflow.i33(i33 [[XE]], i33 [[YE]]) @@ -136,7 +136,7 @@ } unsigned test_add_overflow_bool_bool_uint(_Bool x, _Bool y) { - // CHECK-LABEL: define {{(dso_local )?}}i32 @test_add_overflow_bool_bool_uint + // CHECK-LABEL: define {{(dso_local )?}}frozen i32 @test_add_overflow_bool_bool_uint // CHECK: [[XE:%.+]] = zext i1 %{{.+}} to i32 // CHECK: [[YE:%.+]] = zext i1 %{{.+}} to i32 // CHECK: [[S:%.+]] = call { i32, i1 } @llvm.uadd.with.overflow.i32(i32 [[XE]], i32 [[YE]]) @@ -165,7 +165,7 @@ } int test_add_overflow_volatile(int x, int y) { - // CHECK-LABEL: define {{(dso_local )?}}i32 @test_add_overflow_volatile + // CHECK-LABEL: define {{(dso_local )?}}frozen i32 @test_add_overflow_volatile // CHECK: [[S:%.+]] = call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 %{{.+}}, i32 %{{.+}}) // CHECK-DAG: [[Q:%.+]] = extractvalue { i32, i1 } [[S]], 0 // CHECK-DAG: [[C:%.+]] = extractvalue { i32, i1 } [[S]], 1 @@ -187,7 +187,7 @@ } unsigned long test_uaddl_overflow(unsigned long x, unsigned long y) { -// CHECK: @test_uaddl_overflow([[UL:i32|i64]] %x +// CHECK: @test_uaddl_overflow([[UL:i32|i64]] frozen %x // CHECK: %{{.+}} = call { [[UL]], i1 } @llvm.uadd.with.overflow.[[UL]]([[UL]] %{{.+}}, [[UL]] %{{.+}}) unsigned long result; if (__builtin_uaddl_overflow(x, y, &result)) @@ -214,7 +214,7 @@ } unsigned long test_usubl_overflow(unsigned long x, unsigned long y) { -// CHECK: @test_usubl_overflow([[UL:i32|i64]] %x +// CHECK: @test_usubl_overflow([[UL:i32|i64]] frozen %x // CHECK: %{{.+}} = call { [[UL]], i1 } @llvm.usub.with.overflow.[[UL]]([[UL]] %{{.+}}, [[UL]] %{{.+}}) unsigned long result; if (__builtin_usubl_overflow(x, y, &result)) @@ -241,7 +241,7 @@ } unsigned long test_umull_overflow(unsigned long x, unsigned long y) { -// CHECK: @test_umull_overflow([[UL:i32|i64]] %x +// CHECK: @test_umull_overflow([[UL:i32|i64]] frozen %x // CHECK: %{{.+}} = call { [[UL]], i1 } @llvm.umul.with.overflow.[[UL]]([[UL]] %{{.+}}, [[UL]] %{{.+}}) unsigned long result; if (__builtin_umull_overflow(x, y, &result)) @@ -268,7 +268,7 @@ } long test_saddl_overflow(long x, long y) { -// CHECK: @test_saddl_overflow([[UL:i32|i64]] %x +// CHECK: @test_saddl_overflow([[UL:i32|i64]] frozen %x // CHECK: %{{.+}} = call { [[UL]], i1 } @llvm.sadd.with.overflow.[[UL]]([[UL]] %{{.+}}, [[UL]] %{{.+}}) long result; if (__builtin_saddl_overflow(x, y, &result)) @@ -295,7 +295,7 @@ } long test_ssubl_overflow(long x, long y) { -// CHECK: @test_ssubl_overflow([[UL:i32|i64]] %x +// CHECK: @test_ssubl_overflow([[UL:i32|i64]] frozen %x // CHECK: %{{.+}} = call { [[UL]], i1 } @llvm.ssub.with.overflow.[[UL]]([[UL]] %{{.+}}, [[UL]] %{{.+}}) long result; if (__builtin_ssubl_overflow(x, y, &result)) @@ -322,7 +322,7 @@ } long test_smull_overflow(long x, long y) { -// CHECK: @test_smull_overflow([[UL:i32|i64]] %x +// CHECK: @test_smull_overflow([[UL:i32|i64]] frozen %x // CHECK: %{{.+}} = call { [[UL]], i1 } @llvm.smul.with.overflow.[[UL]]([[UL]] %{{.+}}, [[UL]] %{{.+}}) long result; if (__builtin_smull_overflow(x, y, &result)) diff --git a/clang/test/CodeGen/builtins-ppc-crypto.c b/clang/test/CodeGen/builtins-ppc-crypto.c --- a/clang/test/CodeGen/builtins-ppc-crypto.c +++ b/clang/test/CodeGen/builtins-ppc-crypto.c @@ -24,7 +24,7 @@ #define D_INIT2 { 0x7172737475767778, \ 0x797A7B7C7D7E7F70 }; -// CHECK-LABEL: define <16 x i8> @test_vpmsumb +// CHECK-LABEL: define frozen <16 x i8> @test_vpmsumb vector unsigned char test_vpmsumb(void) { vector unsigned char a = B_INIT1 @@ -33,7 +33,7 @@ // CHECK: @llvm.ppc.altivec.crypto.vpmsumb } -// CHECK-LABEL: define <8 x i16> @test_vpmsumh +// CHECK-LABEL: define frozen <8 x i16> @test_vpmsumh vector unsigned short test_vpmsumh(void) { vector unsigned short a = H_INIT1 @@ -42,7 +42,7 @@ // CHECK: @llvm.ppc.altivec.crypto.vpmsumh } -// CHECK-LABEL: define <4 x i32> @test_vpmsumw +// CHECK-LABEL: define frozen <4 x i32> @test_vpmsumw vector unsigned int test_vpmsumw(void) { vector unsigned int a = W_INIT1 @@ -51,7 +51,7 @@ // CHECK: @llvm.ppc.altivec.crypto.vpmsumw } -// CHECK-LABEL: define <2 x i64> @test_vpmsumd +// CHECK-LABEL: define frozen <2 x i64> @test_vpmsumd vector unsigned long long test_vpmsumd(void) { vector unsigned long long a = D_INIT1 @@ -60,7 +60,7 @@ // CHECK: @llvm.ppc.altivec.crypto.vpmsumd } -// CHECK-LABEL: define <2 x i64> @test_vsbox +// CHECK-LABEL: define frozen <2 x i64> @test_vsbox vector unsigned long long test_vsbox(void) { vector unsigned long long a = D_INIT1 @@ -68,7 +68,7 @@ // CHECK: @llvm.ppc.altivec.crypto.vsbox } -// CHECK-LABEL: define <16 x i8> @test_vpermxorb +// CHECK-LABEL: define frozen <16 x i8> @test_vpermxorb vector unsigned char test_vpermxorb(void) { vector unsigned char a = B_INIT1 @@ -78,7 +78,7 @@ // CHECK: @llvm.ppc.altivec.crypto.vpermxor } -// CHECK-LABEL: define <8 x i16> @test_vpermxorh +// CHECK-LABEL: define frozen <8 x i16> @test_vpermxorh vector unsigned short test_vpermxorh(void) { vector unsigned short a = H_INIT1 @@ -88,7 +88,7 @@ // CHECK: @llvm.ppc.altivec.crypto.vpermxor } -// CHECK-LABEL: define <4 x i32> @test_vpermxorw +// CHECK-LABEL: define frozen <4 x i32> @test_vpermxorw vector unsigned int test_vpermxorw(void) { vector unsigned int a = W_INIT1 @@ -98,7 +98,7 @@ // CHECK: @llvm.ppc.altivec.crypto.vpermxor } -// CHECK-LABEL: define <2 x i64> @test_vpermxord +// CHECK-LABEL: define frozen <2 x i64> @test_vpermxord vector unsigned long long test_vpermxord(void) { vector unsigned long long a = D_INIT1 @@ -132,7 +132,7 @@ // CHECK: @llvm.ppc.altivec.crypto.vpermxor } -// CHECK-LABEL: define <2 x i64> @test_vcipher +// CHECK-LABEL: define frozen <2 x i64> @test_vcipher vector unsigned long long test_vcipher(void) { vector unsigned long long a = D_INIT1 @@ -141,7 +141,7 @@ // CHECK: @llvm.ppc.altivec.crypto.vcipher } -// CHECK-LABEL: define <2 x i64> @test_vcipherlast +// CHECK-LABEL: define frozen <2 x i64> @test_vcipherlast vector unsigned long long test_vcipherlast(void) { vector unsigned long long a = D_INIT1 @@ -159,7 +159,7 @@ // CHECK: @llvm.ppc.altivec.crypto.vncipher } -// CHECK-LABEL: define <2 x i64> @test_vncipherlast +// CHECK-LABEL: define frozen <2 x i64> @test_vncipherlast vector unsigned long long test_vncipherlast(void) { vector unsigned long long a = D_INIT1 @@ -168,7 +168,7 @@ // CHECK: @llvm.ppc.altivec.crypto.vncipherlast } -// CHECK-LABEL: define <4 x i32> @test_vshasigmaw +// CHECK-LABEL: define frozen <4 x i32> @test_vshasigmaw vector unsigned int test_vshasigmaw(void) { vector unsigned int a = W_INIT1 @@ -176,7 +176,7 @@ // CHECK: @llvm.ppc.altivec.crypto.vshasigmaw } -// CHECK-LABEL: define <2 x i64> @test_vshasigmad +// CHECK-LABEL: define frozen <2 x i64> @test_vshasigmad vector unsigned long long test_vshasigmad(void) { vector unsigned long long a = D_INIT2 @@ -186,7 +186,7 @@ // Test cases for the builtins the way they are exposed to // users through altivec.h -// CHECK-LABEL: define <16 x i8> @test_vpmsumb_e +// CHECK-LABEL: define frozen <16 x i8> @test_vpmsumb_e vector unsigned char test_vpmsumb_e(void) { vector unsigned char a = B_INIT1 @@ -195,7 +195,7 @@ // CHECK: @llvm.ppc.altivec.crypto.vpmsumb } -// CHECK-LABEL: define <8 x i16> @test_vpmsumh_e +// CHECK-LABEL: define frozen <8 x i16> @test_vpmsumh_e vector unsigned short test_vpmsumh_e(void) { vector unsigned short a = H_INIT1 @@ -204,7 +204,7 @@ // CHECK: @llvm.ppc.altivec.crypto.vpmsumh } -// CHECK-LABEL: define <4 x i32> @test_vpmsumw_e +// CHECK-LABEL: define frozen <4 x i32> @test_vpmsumw_e vector unsigned int test_vpmsumw_e(void) { vector unsigned int a = W_INIT1 @@ -213,7 +213,7 @@ // CHECK: @llvm.ppc.altivec.crypto.vpmsumw } -// CHECK-LABEL: define <2 x i64> @test_vpmsumd_e +// CHECK-LABEL: define frozen <2 x i64> @test_vpmsumd_e vector unsigned long long test_vpmsumd_e(void) { vector unsigned long long a = D_INIT1 @@ -222,7 +222,7 @@ // CHECK: @llvm.ppc.altivec.crypto.vpmsumd } -// CHECK-LABEL: define <2 x i64> @test_vsbox_e +// CHECK-LABEL: define frozen <2 x i64> @test_vsbox_e vector unsigned long long test_vsbox_e(void) { vector unsigned long long a = D_INIT1 @@ -230,7 +230,7 @@ // CHECK: @llvm.ppc.altivec.crypto.vsbox } -// CHECK-LABEL: define <16 x i8> @test_vpermxorb_e +// CHECK-LABEL: define frozen <16 x i8> @test_vpermxorb_e vector unsigned char test_vpermxorb_e(void) { vector unsigned char a = B_INIT1 @@ -240,7 +240,7 @@ // CHECK: @llvm.ppc.altivec.crypto.vpermxor } -// CHECK-LABEL: define <8 x i16> @test_vpermxorh_e +// CHECK-LABEL: define frozen <8 x i16> @test_vpermxorh_e vector unsigned short test_vpermxorh_e(void) { vector unsigned short a = H_INIT1 @@ -250,7 +250,7 @@ // CHECK: @llvm.ppc.altivec.crypto.vpermxor } -// CHECK-LABEL: define <4 x i32> @test_vpermxorw_e +// CHECK-LABEL: define frozen <4 x i32> @test_vpermxorw_e vector unsigned int test_vpermxorw_e(void) { vector unsigned int a = W_INIT1 @@ -260,7 +260,7 @@ // CHECK: @llvm.ppc.altivec.crypto.vpermxor } -// CHECK-LABEL: define <2 x i64> @test_vpermxord_e +// CHECK-LABEL: define frozen <2 x i64> @test_vpermxord_e vector unsigned long long test_vpermxord_e(void) { vector unsigned long long a = D_INIT1 @@ -270,7 +270,7 @@ // CHECK: @llvm.ppc.altivec.crypto.vpermxor } -// CHECK-LABEL: define <2 x i64> @test_vcipher_e +// CHECK-LABEL: define frozen <2 x i64> @test_vcipher_e vector unsigned long long test_vcipher_e(void) { vector unsigned long long a = D_INIT1 @@ -279,7 +279,7 @@ // CHECK: @llvm.ppc.altivec.crypto.vcipher } -// CHECK-LABEL: define <2 x i64> @test_vcipherlast_e +// CHECK-LABEL: define frozen <2 x i64> @test_vcipherlast_e vector unsigned long long test_vcipherlast_e(void) { vector unsigned long long a = D_INIT1 @@ -288,7 +288,7 @@ // CHECK: @llvm.ppc.altivec.crypto.vcipherlast } -// CHECK-LABEL: define <2 x i64> @test_vncipher_e +// CHECK-LABEL: define frozen <2 x i64> @test_vncipher_e vector unsigned long long test_vncipher_e(void) { vector unsigned long long a = D_INIT1 @@ -297,7 +297,7 @@ // CHECK: @llvm.ppc.altivec.crypto.vncipher } -// CHECK-LABEL: define <2 x i64> @test_vncipherlast_e +// CHECK-LABEL: define frozen <2 x i64> @test_vncipherlast_e vector unsigned long long test_vncipherlast_e(void) { vector unsigned long long a = D_INIT1 @@ -306,7 +306,7 @@ // CHECK: @llvm.ppc.altivec.crypto.vncipherlast } -// CHECK-LABEL: define <4 x i32> @test_vshasigmaw_e +// CHECK-LABEL: define frozen <4 x i32> @test_vshasigmaw_e vector unsigned int test_vshasigmaw_e(void) { vector unsigned int a = W_INIT1 @@ -314,7 +314,7 @@ // CHECK: @llvm.ppc.altivec.crypto.vshasigmaw } -// CHECK-LABEL: define <2 x i64> @test_vshasigmad_e +// CHECK-LABEL: define frozen <2 x i64> @test_vshasigmad_e vector unsigned long long test_vshasigmad_e(void) { vector unsigned long long a = D_INIT2 diff --git a/clang/test/CodeGen/builtins-ppc-p7.c b/clang/test/CodeGen/builtins-ppc-p7.c --- a/clang/test/CodeGen/builtins-ppc-p7.c +++ b/clang/test/CodeGen/builtins-ppc-p7.c @@ -5,7 +5,7 @@ // RUN: %clang_cc1 -triple powerpc64le-unknown-unknown -target-cpu pwr8 \ // RUN: -emit-llvm %s -o - | FileCheck %s -// CHECK-LABEL: define signext i32 @test_divwe +// CHECK-LABEL: define frozen signext i32 @test_divwe int test_divwe(void) { int a = 74; @@ -14,7 +14,7 @@ // CHECK: @llvm.ppc.divwe } -// CHECK-LABEL: define zeroext i32 @test_divweu +// CHECK-LABEL: define frozen zeroext i32 @test_divweu unsigned int test_divweu(void) { unsigned int a = 74; @@ -23,7 +23,7 @@ // CHECK: @llvm.ppc.divweu } -// CHECK-LABEL: define i64 @test_divde +// CHECK-LABEL: define frozen i64 @test_divde long long test_divde(void) { long long a = 74LL; @@ -32,7 +32,7 @@ // CHECK: @llvm.ppc.divde } -// CHECK-LABEL: define i64 @test_divdeu +// CHECK-LABEL: define frozen i64 @test_divdeu unsigned long long test_divdeu(void) { unsigned long long a = 74ULL; @@ -41,7 +41,7 @@ // CHECK: @llvm.ppc.divdeu } -// CHECK-LABEL: define i64 @test_bpermd +// CHECK-LABEL: define frozen i64 @test_bpermd long long test_bpermd(void) { long long a = 74LL; diff --git a/clang/test/CodeGen/builtins-ppc.c b/clang/test/CodeGen/builtins-ppc.c --- a/clang/test/CodeGen/builtins-ppc.c +++ b/clang/test/CodeGen/builtins-ppc.c @@ -8,7 +8,7 @@ res = __builtin_eh_return_data_regno(1); // CHECK: store volatile i32 4 } -// CHECK-LABEL: define i64 @test_builtin_ppc_get_timebase +// CHECK-LABEL: define frozen i64 @test_builtin_ppc_get_timebase long long test_builtin_ppc_get_timebase() { // CHECK: call i64 @llvm.readcyclecounter() return __builtin_ppc_get_timebase(); diff --git a/clang/test/CodeGen/builtins.c b/clang/test/CodeGen/builtins.c --- a/clang/test/CodeGen/builtins.c +++ b/clang/test/CodeGen/builtins.c @@ -1,6 +1,6 @@ -// RUN: %clang_cc1 -emit-llvm -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -emit-llvm -o %t %s // RUN: not grep __builtin %t -// RUN: %clang_cc1 %s -emit-llvm -o - -triple x86_64-darwin-apple | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args %s -emit-llvm -o - -triple x86_64-darwin-apple | FileCheck %s int printf(const char *, ...); @@ -438,7 +438,7 @@ #endif -// CHECK-LABEL: define i64 @test_builtin_readcyclecounter +// CHECK-LABEL: define frozen i64 @test_builtin_readcyclecounter long long test_builtin_readcyclecounter() { // CHECK: call i64 @llvm.readcyclecounter() return __builtin_readcyclecounter(); diff --git a/clang/test/CodeGen/c-strings.c b/clang/test/CodeGen/c-strings.c --- a/clang/test/CodeGen/c-strings.c +++ b/clang/test/CodeGen/c-strings.c @@ -40,7 +40,7 @@ static char *x = "hello"; bar(x); // CHECK: [[T1:%.*]] = load i8*, i8** @f1.x - // CHECK: call {{.*}}void @bar(i8* [[T1:%.*]]) + // CHECK: call {{.*}}void @bar(i8* frozen [[T1:%.*]]) } // CHECK-LABEL: define {{.*}}void @f2() diff --git a/clang/test/CodeGen/c11atomics-ios.c b/clang/test/CodeGen/c11atomics-ios.c --- a/clang/test/CodeGen/c11atomics-ios.c +++ b/clang/test/CodeGen/c11atomics-ios.c @@ -203,7 +203,7 @@ } PS test_promoted_load(_Atomic(PS) *addr) { - // CHECK-LABEL: @test_promoted_load(%struct.PS* noalias sret align 2 %agg.result, { %struct.PS, [2 x i8] }* %addr) + // CHECK-LABEL: @test_promoted_load(%struct.PS* noalias sret align 2 %agg.result, { %struct.PS, [2 x i8] }* frozen %addr) // CHECK: [[ADDR_ARG:%.*]] = alloca { %struct.PS, [2 x i8] }*, align 4 // CHECK: [[ATOMIC_RES:%.*]] = alloca { %struct.PS, [2 x i8] }, align 8 // CHECK: store { %struct.PS, [2 x i8] }* %addr, { %struct.PS, [2 x i8] }** [[ADDR_ARG]], align 4 @@ -221,7 +221,7 @@ } void test_promoted_store(_Atomic(PS) *addr, PS *val) { - // CHECK-LABEL: @test_promoted_store({ %struct.PS, [2 x i8] }* %addr, %struct.PS* %val) + // CHECK-LABEL: @test_promoted_store({ %struct.PS, [2 x i8] }* frozen %addr, %struct.PS* frozen %val) // CHECK: [[ADDR_ARG:%.*]] = alloca { %struct.PS, [2 x i8] }*, align 4 // CHECK: [[VAL_ARG:%.*]] = alloca %struct.PS*, align 4 // CHECK: [[NONATOMIC_TMP:%.*]] = alloca %struct.PS, align 2 @@ -245,7 +245,7 @@ } PS test_promoted_exchange(_Atomic(PS) *addr, PS *val) { - // CHECK-LABEL: @test_promoted_exchange(%struct.PS* noalias sret align 2 %agg.result, { %struct.PS, [2 x i8] }* %addr, %struct.PS* %val) + // CHECK-LABEL: @test_promoted_exchange(%struct.PS* noalias sret align 2 %agg.result, { %struct.PS, [2 x i8] }* frozen %addr, %struct.PS* frozen %val) // CHECK: [[ADDR_ARG:%.*]] = alloca { %struct.PS, [2 x i8] }*, align 4 // CHECK: [[VAL_ARG:%.*]] = alloca %struct.PS*, align 4 // CHECK: [[NONATOMIC_TMP:%.*]] = alloca %struct.PS, align 2 @@ -275,7 +275,7 @@ } _Bool test_promoted_cmpxchg(_Atomic(PS) *addr, PS *desired, PS *new) { - // CHECK: define zeroext i1 @test_promoted_cmpxchg({ %struct.PS, [2 x i8] }* %addr, %struct.PS* %desired, %struct.PS* %new) #0 { + // CHECK: define frozen zeroext i1 @test_promoted_cmpxchg({ %struct.PS, [2 x i8] }* frozen %addr, %struct.PS* frozen %desired, %struct.PS* frozen %new) #0 { // CHECK: [[ADDR_ARG:%.*]] = alloca { %struct.PS, [2 x i8] }*, align 4 // CHECK: [[DESIRED_ARG:%.*]] = alloca %struct.PS*, align 4 // CHECK: [[NEW_ARG:%.*]] = alloca %struct.PS*, align 4 diff --git a/clang/test/CodeGen/c11atomics.c b/clang/test/CodeGen/c11atomics.c --- a/clang/test/CodeGen/c11atomics.c +++ b/clang/test/CodeGen/c11atomics.c @@ -73,7 +73,7 @@ // CHECK: testdec void testdec(void) { - // CHECK: call arm_aapcscc zeroext i1 @__atomic_compare_exchange(i32 1, i8* @b + // CHECK: call arm_aapcscc frozen zeroext i1 @__atomic_compare_exchange(i32 frozen 1, i8* frozen @b b--; // CHECK: atomicrmw sub i32* @i, i32 1 seq_cst i--; @@ -81,7 +81,7 @@ l--; // CHECK: atomicrmw sub i16* @s, i16 1 seq_cst s--; - // CHECK: call arm_aapcscc zeroext i1 @__atomic_compare_exchange(i32 1, i8* @b + // CHECK: call arm_aapcscc frozen zeroext i1 @__atomic_compare_exchange(i32 frozen 1, i8* frozen @b --b; // CHECK: atomicrmw sub i32* @i, i32 1 seq_cst // CHECK: sub i32 @@ -96,7 +96,7 @@ // CHECK: testaddeq void testaddeq(void) { - // CHECK: call arm_aapcscc zeroext i1 @__atomic_compare_exchange(i32 1, i8* @b + // CHECK: call arm_aapcscc frozen zeroext i1 @__atomic_compare_exchange(i32 frozen 1, i8* frozen @b // CHECK: atomicrmw add i32* @i, i32 42 seq_cst // CHECK: atomicrmw add i64* @l, i64 42 seq_cst // CHECK: atomicrmw add i16* @s, i16 42 seq_cst @@ -108,7 +108,7 @@ // CHECK: testsubeq void testsubeq(void) { - // CHECK: call arm_aapcscc zeroext i1 @__atomic_compare_exchange(i32 1, i8* @b + // CHECK: call arm_aapcscc frozen zeroext i1 @__atomic_compare_exchange(i32 frozen 1, i8* frozen @b // CHECK: atomicrmw sub i32* @i, i32 42 seq_cst // CHECK: atomicrmw sub i64* @l, i64 42 seq_cst // CHECK: atomicrmw sub i16* @s, i16 42 seq_cst @@ -120,7 +120,7 @@ // CHECK: testxoreq void testxoreq(void) { - // CHECK: call arm_aapcscc zeroext i1 @__atomic_compare_exchange(i32 1, i8* @b + // CHECK: call arm_aapcscc frozen zeroext i1 @__atomic_compare_exchange(i32 frozen 1, i8* frozen @b // CHECK: atomicrmw xor i32* @i, i32 42 seq_cst // CHECK: atomicrmw xor i64* @l, i64 42 seq_cst // CHECK: atomicrmw xor i16* @s, i16 42 seq_cst @@ -132,7 +132,7 @@ // CHECK: testoreq void testoreq(void) { - // CHECK: call arm_aapcscc zeroext i1 @__atomic_compare_exchange(i32 1, i8* @b + // CHECK: call arm_aapcscc frozen zeroext i1 @__atomic_compare_exchange(i32 frozen 1, i8* frozen @b // CHECK: atomicrmw or i32* @i, i32 42 seq_cst // CHECK: atomicrmw or i64* @l, i64 42 seq_cst // CHECK: atomicrmw or i16* @s, i16 42 seq_cst @@ -144,7 +144,7 @@ // CHECK: testandeq void testandeq(void) { - // CHECK: call arm_aapcscc zeroext i1 @__atomic_compare_exchange(i32 1, i8* @b + // CHECK: call arm_aapcscc frozen zeroext i1 @__atomic_compare_exchange(i32 frozen 1, i8* frozen @b // CHECK: atomicrmw and i32* @i, i32 42 seq_cst // CHECK: atomicrmw and i64* @l, i64 42 seq_cst // CHECK: atomicrmw and i16* @s, i16 42 seq_cst @@ -173,7 +173,7 @@ // CHECK-NEXT: [[T0:%.*]] = load float*, float** [[FP]] // CHECK-NEXT: [[T1:%.*]] = bitcast float* [[T0]] to i8* // CHECK-NEXT: [[T2:%.*]] = bitcast float* [[TMP0]] to i8* -// CHECK-NEXT: call arm_aapcscc void @__atomic_load(i32 4, i8* [[T1]], i8* [[T2]], i32 5) +// CHECK-NEXT: call arm_aapcscc void @__atomic_load(i32 frozen 4, i8* frozen [[T1]], i8* frozen [[T2]], i32 frozen 5) // CHECK-NEXT: [[T3:%.*]] = load float, float* [[TMP0]], align 4 // CHECK-NEXT: store float [[T3]], float* [[F]] float f = *fp; @@ -183,7 +183,7 @@ // CHECK-NEXT: store float [[T0]], float* [[TMP1]], align 4 // CHECK-NEXT: [[T2:%.*]] = bitcast float* [[T1]] to i8* // CHECK-NEXT: [[T3:%.*]] = bitcast float* [[TMP1]] to i8* -// CHECK-NEXT: call arm_aapcscc void @__atomic_store(i32 4, i8* [[T2]], i8* [[T3]], i32 5) +// CHECK-NEXT: call arm_aapcscc void @__atomic_store(i32 frozen 4, i8* frozen [[T2]], i8* frozen [[T3]], i32 frozen 5) *fp = f; // CHECK-NEXT: ret void @@ -214,7 +214,7 @@ // CHECK-NEXT: [[T0:%.*]] = load [[CF]]*, [[CF]]** [[FP]] // CHECK-NEXT: [[T1:%.*]] = bitcast [[CF]]* [[T0]] to i8* // CHECK-NEXT: [[T2:%.*]] = bitcast [[CF]]* [[TMP0]] to i8* -// CHECK-NEXT: call arm_aapcscc void @__atomic_load(i32 8, i8* [[T1]], i8* [[T2]], i32 5) +// CHECK-NEXT: call arm_aapcscc void @__atomic_load(i32 frozen 8, i8* frozen [[T1]], i8* frozen [[T2]], i32 frozen 5) // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds [[CF]], [[CF]]* [[TMP0]], i32 0, i32 0 // CHECK-NEXT: [[R:%.*]] = load float, float* [[T0]] // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds [[CF]], [[CF]]* [[TMP0]], i32 0, i32 1 @@ -236,7 +236,7 @@ // CHECK-NEXT: store float [[I]], float* [[T1]] // CHECK-NEXT: [[T0:%.*]] = bitcast [[CF]]* [[DEST]] to i8* // CHECK-NEXT: [[T1:%.*]] = bitcast [[CF]]* [[TMP1]] to i8* -// CHECK-NEXT: call arm_aapcscc void @__atomic_store(i32 8, i8* [[T0]], i8* [[T1]], i32 5) +// CHECK-NEXT: call arm_aapcscc void @__atomic_store(i32 frozen 8, i8* frozen [[T0]], i8* frozen [[T1]], i32 frozen 5) *fp = f; // CHECK-NEXT: ret void @@ -276,7 +276,7 @@ // CHECK-NEXT: [[T0:%.*]] = load [[S]]*, [[S]]** [[FP]] // CHECK-NEXT: [[T1:%.*]] = bitcast [[S]]* [[T0]] to i8* // CHECK-NEXT: [[T2:%.*]] = bitcast [[S]]* [[F]] to i8* -// CHECK-NEXT: call arm_aapcscc void @__atomic_load(i32 8, i8* [[T1]], i8* [[T2]], i32 5) +// CHECK-NEXT: call arm_aapcscc void @__atomic_load(i32 frozen 8, i8* frozen [[T1]], i8* frozen [[T2]], i32 frozen 5) S f = *fp; // CHECK-NEXT: [[T0:%.*]] = load [[S]]*, [[S]]** [[FP]] @@ -285,7 +285,7 @@ // CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 8 [[T1]], i8* align 2 [[T2]], i32 8, i1 false) // CHECK-NEXT: [[T3:%.*]] = bitcast [[S]]* [[T0]] to i8* // CHECK-NEXT: [[T4:%.*]] = bitcast [[S]]* [[TMP0]] to i8* -// CHECK-NEXT: call arm_aapcscc void @__atomic_store(i32 8, i8* [[T3]], i8* [[T4]], i32 5) +// CHECK-NEXT: call arm_aapcscc void @__atomic_store(i32 frozen 8, i8* frozen [[T3]], i8* frozen [[T4]], i32 frozen 5) *fp = f; // CHECK-NEXT: ret void @@ -331,7 +331,7 @@ // CHECK-NEXT: [[T0:%.*]] = load [[APS]]*, [[APS]]** [[FP]] // CHECK-NEXT: [[T1:%.*]] = bitcast [[APS]]* [[T0]] to i8* // CHECK-NEXT: [[T2:%.*]] = bitcast [[APS]]* [[TMP0]] to i8* -// CHECK-NEXT: call arm_aapcscc void @__atomic_load(i32 8, i8* [[T1]], i8* [[T2]], i32 5) +// CHECK-NEXT: call arm_aapcscc void @__atomic_load(i32 frozen 8, i8* frozen [[T1]], i8* frozen [[T2]], i32 frozen 5) // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds [[APS]], [[APS]]* [[TMP0]], i32 0, i32 0 // CHECK-NEXT: [[T1:%.*]] = bitcast [[PS]]* [[F]] to i8* // CHECK-NEXT: [[T2:%.*]] = bitcast [[PS]]* [[T0]] to i8* @@ -347,13 +347,13 @@ // CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 8 [[T2]], i8* align 2 [[T3]], i32 6, i1 false) // CHECK-NEXT: [[T4:%.*]] = bitcast [[APS]]* [[T0]] to i8* // CHECK-NEXT: [[T5:%.*]] = bitcast [[APS]]* [[TMP1]] to i8* -// CHECK-NEXT: call arm_aapcscc void @__atomic_store(i32 8, i8* [[T4]], i8* [[T5]], i32 5) +// CHECK-NEXT: call arm_aapcscc void @__atomic_store(i32 frozen 8, i8* frozen [[T4]], i8* frozen [[T5]], i32 frozen 5) *fp = f; // CHECK-NEXT: [[T0:%.*]] = load [[APS]]*, [[APS]]** [[FP]], align 4 // CHECK-NEXT: [[T1:%.*]] = bitcast [[APS]]* [[T0]] to i8* // CHECK-NEXT: [[T2:%.*]] = bitcast [[APS]]* [[TMP3]] to i8* -// CHECK-NEXT: call arm_aapcscc void @__atomic_load(i32 8, i8* [[T1]], i8* [[T2]], i32 5) +// CHECK-NEXT: call arm_aapcscc void @__atomic_load(i32 frozen 8, i8* frozen [[T1]], i8* frozen [[T2]], i32 frozen 5) // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds [[APS]], [[APS]]* [[TMP3]], i32 0, i32 0 // CHECK-NEXT: [[T1:%.*]] = bitcast %struct.PS* [[TMP2]] to i8* // CHECK-NEXT: [[T2:%.*]] = bitcast %struct.PS* [[T0]] to i8* @@ -368,7 +368,7 @@ } PS test_promoted_load(_Atomic(PS) *addr) { - // CHECK-LABEL: @test_promoted_load(%struct.PS* noalias sret align 2 %agg.result, { %struct.PS, [2 x i8] }* %addr) + // CHECK-LABEL: @test_promoted_load(%struct.PS* noalias sret align 2 %agg.result, { %struct.PS, [2 x i8] }* frozen %addr) // CHECK: [[ADDR_ARG:%.*]] = alloca { %struct.PS, [2 x i8] }*, align 4 // CHECK: [[ATOMIC_RES:%.*]] = alloca { %struct.PS, [2 x i8] }, align 8 // CHECK: store { %struct.PS, [2 x i8] }* %addr, { %struct.PS, [2 x i8] }** [[ADDR_ARG]], align 4 @@ -376,7 +376,7 @@ // CHECK: [[ADDR64:%.*]] = bitcast { %struct.PS, [2 x i8] }* [[ADDR]] to i64* // CHECK: [[ATOMIC_RES64:%.*]] = bitcast { %struct.PS, [2 x i8] }* [[ATOMIC_RES]] to i64* // CHECK: [[ADDR8:%.*]] = bitcast i64* [[ADDR64]] to i8* - // CHECK: [[RES:%.*]] = call arm_aapcscc i64 @__atomic_load_8(i8* [[ADDR8]], i32 5) + // CHECK: [[RES:%.*]] = call arm_aapcscc frozen i64 @__atomic_load_8(i8* frozen [[ADDR8]], i32 frozen 5) // CHECK: store i64 [[RES]], i64* [[ATOMIC_RES64]], align 8 // CHECK: [[ATOMIC_RES_STRUCT:%.*]] = bitcast i64* [[ATOMIC_RES64]] to %struct.PS* // CHECK: [[AGG_RESULT8:%.*]] = bitcast %struct.PS* %agg.result to i8* @@ -387,7 +387,7 @@ } void test_promoted_store(_Atomic(PS) *addr, PS *val) { - // CHECK-LABEL: @test_promoted_store({ %struct.PS, [2 x i8] }* %addr, %struct.PS* %val) + // CHECK-LABEL: @test_promoted_store({ %struct.PS, [2 x i8] }* frozen %addr, %struct.PS* frozen %val) // CHECK: [[ADDR_ARG:%.*]] = alloca { %struct.PS, [2 x i8] }*, align 4 // CHECK: [[VAL_ARG:%.*]] = alloca %struct.PS*, align 4 // CHECK: [[NONATOMIC_TMP:%.*]] = alloca %struct.PS, align 2 @@ -406,12 +406,12 @@ // CHECK: [[ATOMIC_VAL64:%.*]] = bitcast { %struct.PS, [2 x i8] }* [[ATOMIC_VAL]] to i64* // CHECK: [[ADDR8:%.*]] = bitcast i64* [[ADDR64]] to i8* // CHECK: [[VAL64:%.*]] = load i64, i64* [[ATOMIC_VAL64]], align 2 - // CHECK: call arm_aapcscc void @__atomic_store_8(i8* [[ADDR8]], i64 [[VAL64]], i32 5) + // CHECK: call arm_aapcscc void @__atomic_store_8(i8* frozen [[ADDR8]], i64 frozen [[VAL64]], i32 frozen 5) __c11_atomic_store(addr, *val, 5); } PS test_promoted_exchange(_Atomic(PS) *addr, PS *val) { - // CHECK-LABEL: @test_promoted_exchange(%struct.PS* noalias sret align 2 %agg.result, { %struct.PS, [2 x i8] }* %addr, %struct.PS* %val) + // CHECK-LABEL: @test_promoted_exchange(%struct.PS* noalias sret align 2 %agg.result, { %struct.PS, [2 x i8] }* frozen %addr, %struct.PS* frozen %val) // CHECK: [[ADDR_ARG:%.*]] = alloca { %struct.PS, [2 x i8] }*, align 4 // CHECK: [[VAL_ARG:%.*]] = alloca %struct.PS*, align 4 // CHECK: [[NONATOMIC_TMP:%.*]] = alloca %struct.PS, align 2 @@ -432,7 +432,7 @@ // CHECK: [[ATOMIC_RES64:%.*]] = bitcast { %struct.PS, [2 x i8] }* [[ATOMIC_RES]] to i64* // CHECK: [[ADDR8:%.*]] = bitcast i64* [[ADDR64]] to i8* // CHECK: [[VAL64:%.*]] = load i64, i64* [[ATOMIC_VAL64]], align 2 - // CHECK: [[RES:%.*]] = call arm_aapcscc i64 @__atomic_exchange_8(i8* [[ADDR8]], i64 [[VAL64]], i32 5) + // CHECK: [[RES:%.*]] = call arm_aapcscc frozen i64 @__atomic_exchange_8(i8* frozen [[ADDR8]], i64 frozen [[VAL64]], i32 frozen 5) // CHECK: store i64 [[RES]], i64* [[ATOMIC_RES64]], align 8 // CHECK: [[ATOMIC_RES_STRUCT:%.*]] = bitcast i64* [[ATOMIC_RES64]] to %struct.PS* // CHECK: [[AGG_RESULT8:%.*]] = bitcast %struct.PS* %agg.result to i8* @@ -442,7 +442,7 @@ } _Bool test_promoted_cmpxchg(_Atomic(PS) *addr, PS *desired, PS *new) { - // CHECK-LABEL: i1 @test_promoted_cmpxchg({ %struct.PS, [2 x i8] }* %addr, %struct.PS* %desired, %struct.PS* %new) #0 { + // CHECK-LABEL: i1 @test_promoted_cmpxchg({ %struct.PS, [2 x i8] }* frozen %addr, %struct.PS* frozen %desired, %struct.PS* frozen %new) #0 { // CHECK: [[ADDR_ARG:%.*]] = alloca { %struct.PS, [2 x i8] }*, align 4 // CHECK: [[DESIRED_ARG:%.*]] = alloca %struct.PS*, align 4 // CHECK: [[NEW_ARG:%.*]] = alloca %struct.PS*, align 4 @@ -470,7 +470,7 @@ // CHECK: [[ADDR8:%.*]] = bitcast i64* [[ADDR64]] to i8* // CHECK: [[ATOMIC_DESIRED8:%.*]] = bitcast i64* [[ATOMIC_DESIRED64]] to i8* // CHECK: [[NEW64:%.*]] = load i64, i64* [[ATOMIC_NEW64]], align 2 - // CHECK: [[RES:%.*]] = call arm_aapcscc zeroext i1 @__atomic_compare_exchange_8(i8* [[ADDR8]], i8* [[ATOMIC_DESIRED8]], i64 [[NEW64]], i32 5, i32 5) + // CHECK: [[RES:%.*]] = call arm_aapcscc frozen zeroext i1 @__atomic_compare_exchange_8(i8* frozen [[ADDR8]], i8* frozen [[ATOMIC_DESIRED8]], i64 frozen [[NEW64]], i32 frozen 5, i32 frozen 5) // CHECK: ret i1 [[RES]] return __c11_atomic_compare_exchange_strong(addr, desired, *new, 5, 5); } @@ -479,12 +479,12 @@ struct Empty test_empty_struct_load(_Atomic(struct Empty)* empty) { // CHECK-LABEL: @test_empty_struct_load( - // CHECK: call arm_aapcscc zeroext i8 @__atomic_load_1(i8* %{{.*}}, i32 5) + // CHECK: call arm_aapcscc frozen zeroext i8 @__atomic_load_1(i8* frozen %{{.*}}, i32 frozen 5) return __c11_atomic_load(empty, 5); } void test_empty_struct_store(_Atomic(struct Empty)* empty, struct Empty value) { // CHECK-LABEL: @test_empty_struct_store( - // CHECK: call arm_aapcscc void @__atomic_store_1(i8* %{{.*}}, i8 zeroext %{{.*}}, i32 5) + // CHECK: call arm_aapcscc void @__atomic_store_1(i8* frozen %{{.*}}, i8 frozen zeroext %{{.*}}, i32 frozen 5) __c11_atomic_store(empty, value, 5); } diff --git a/clang/test/CodeGen/callback_annotated.c b/clang/test/CodeGen/callback_annotated.c --- a/clang/test/CodeGen/callback_annotated.c +++ b/clang/test/CodeGen/callback_annotated.c @@ -14,18 +14,18 @@ void *broker2(void (*callee)(void)); -// RUN1-DAG: declare !callback ![[cid2:[0-9]+]] i8* @broker2 +// RUN1-DAG: declare !callback ![[cid2:[0-9]+]] frozen i8* @broker2 __attribute__((callback(callee))) void *broker2(void (*callee)(void)); void *broker2(void (*callee)(void)); -// RUN1-DAG: declare !callback ![[cid3:[0-9]+]] i8* @broker3 +// RUN1-DAG: declare !callback ![[cid3:[0-9]+]] frozen i8* @broker3 __attribute__((callback(4, 1, 2, c))) void *broker3(int, int, int c, int (*callee)(int, int, int), int); -// RUN1-DAG: declare !callback ![[cid4:[0-9]+]] i8* @broker4 +// RUN1-DAG: declare !callback ![[cid4:[0-9]+]] frozen i8* @broker4 __attribute__((callback(4, -1, a, __))) void *broker4(int a, int, int, int (*callee)(int, int, int), int); -// RUN1-DAG: declare !callback ![[cid5:[0-9]+]] i8* @broker5 +// RUN1-DAG: declare !callback ![[cid5:[0-9]+]] frozen i8* @broker5 __attribute__((callback(4, d, 5, 2))) void *broker5(int, int, int, int (*callee)(int, int, int), int d); static void *VoidPtr2VoidPtr(void *payload) { @@ -35,12 +35,12 @@ } static int ThreeInt2Int(int a, int b, int c) { - // RUN2: define internal i32 @ThreeInt2Int(i32 %a, i32 %b, i32 %c) + // RUN2: define internal frozen i32 @ThreeInt2Int(i32 frozen %a, i32 frozen %b, i32 frozen %c) // RUN2: %mul = mul nsw i32 %b, %a // RUN2: %add = add nsw i32 %mul, %c // RUN2: ret i32 %add - // IPCP: define internal i32 @ThreeInt2Int(i32 %a, i32 %b, i32 %c) + // IPCP: define internal frozen i32 @ThreeInt2Int(i32 frozen %a, i32 frozen %b, i32 frozen %c) // IPCP: %mul = mul nsw i32 4, %a // IPCP: %add = add nsw i32 %mul, %c // IPCP: ret i32 %add diff --git a/clang/test/CodeGen/callback_openmp.c b/clang/test/CodeGen/callback_openmp.c --- a/clang/test/CodeGen/callback_openmp.c +++ b/clang/test/CodeGen/callback_openmp.c @@ -15,14 +15,14 @@ #pragma omp parallel firstprivate(q, p) work1(p, q); -// IPCP: call void @work1(i32 2, i32 %{{[._a-zA-Z0-9]*}}) +// IPCP: call void @work1(i32 frozen 2, i32 frozen %{{[._a-zA-Z0-9]*}}) #pragma omp parallel for firstprivate(p, q) for (int i = 0; i < q; i++) work2(i, p); -// IPCP: call void @work2(i32 %{{[._a-zA-Z0-9]*}}, i32 2) +// IPCP: call void @work2(i32 frozen %{{[._a-zA-Z0-9]*}}, i32 frozen 2) #pragma omp target teams firstprivate(p) work12(p, p); -// IPCP: call void @work12(i32 2, i32 2) +// IPCP: call void @work12(i32 frozen 2, i32 frozen 2) } diff --git a/clang/test/CodeGen/callback_pthread_create.c b/clang/test/CodeGen/callback_pthread_create.c --- a/clang/test/CodeGen/callback_pthread_create.c +++ b/clang/test/CodeGen/callback_pthread_create.c @@ -21,13 +21,13 @@ const int GlobalVar = 0; static void *callee0(void *payload) { -// IPCP: define internal i8* @callee0 +// IPCP: define internal frozen i8* @callee0 // IPCP: ret i8* null return payload; } static void *callee1(void *payload) { -// IPCP: define internal i8* @callee1 +// IPCP: define internal frozen i8* @callee1 // IPCP: ret i8* bitcast (i32* @GlobalVar to i8*) return payload; } diff --git a/clang/test/CodeGen/calling-conv-ignored.c b/clang/test/CodeGen/calling-conv-ignored.c --- a/clang/test/CodeGen/calling-conv-ignored.c +++ b/clang/test/CodeGen/calling-conv-ignored.c @@ -16,30 +16,30 @@ } // X86-LABEL: define dso_local void @bar() -// X86: call void @foo_default(i8* null, i8* null) -// X86: call x86_stdcallcc void @"\01_foo_std@8"(i8* null, i8* null) -// X86: call x86_fastcallcc void @"\01@foo_fast@8"(i8* inreg null, i8* inreg null) -// X86: call x86_vectorcallcc void @"\01foo_vector@@8"(i8* inreg null, i8* inreg null) +// X86: call void @foo_default(i8* frozen null, i8* frozen null) +// X86: call x86_stdcallcc void @"\01_foo_std@8"(i8* frozen null, i8* frozen null) +// X86: call x86_fastcallcc void @"\01@foo_fast@8"(i8* frozen inreg null, i8* frozen inreg null) +// X86: call x86_vectorcallcc void @"\01foo_vector@@8"(i8* frozen inreg null, i8* frozen inreg null) // X86: ret void // X64-LABEL: define dso_local void @bar() -// X64: call void @foo_default(i8* null, i8* null) -// X64: call void @foo_std(i8* null, i8* null) -// X64: call void @foo_fast(i8* null, i8* null) -// X64: call x86_vectorcallcc void @"\01foo_vector@@16"(i8* null, i8* null) +// X64: call void @foo_default(i8* frozen null, i8* frozen null) +// X64: call void @foo_std(i8* frozen null, i8* frozen null) +// X64: call void @foo_fast(i8* frozen null, i8* frozen null) +// X64: call x86_vectorcallcc void @"\01foo_vector@@16"(i8* frozen null, i8* frozen null) // X64: ret void // X86-VEC-LABEL: define dso_local void @bar() -// X86-VEC: call x86_vectorcallcc void @"\01foo_default@@8"(i8* inreg null, i8* inreg null) -// X86-VEC: call x86_stdcallcc void @"\01_foo_std@8"(i8* null, i8* null) -// X86-VEC: call x86_fastcallcc void @"\01@foo_fast@8"(i8* inreg null, i8* inreg null) -// X86-VEC: call x86_vectorcallcc void @"\01foo_vector@@8"(i8* inreg null, i8* inreg null) +// X86-VEC: call x86_vectorcallcc void @"\01foo_default@@8"(i8* frozen inreg null, i8* frozen inreg null) +// X86-VEC: call x86_stdcallcc void @"\01_foo_std@8"(i8* frozen null, i8* frozen null) +// X86-VEC: call x86_fastcallcc void @"\01@foo_fast@8"(i8* frozen inreg null, i8* frozen inreg null) +// X86-VEC: call x86_vectorcallcc void @"\01foo_vector@@8"(i8* frozen inreg null, i8* frozen inreg null) // X86-VEC: ret void // X64-VEC-LABEL: define dso_local void @bar() -// X64-VEC: call x86_vectorcallcc void @"\01foo_default@@16"(i8* null, i8* null) -// X64-VEC: call void @foo_std(i8* null, i8* null) -// X64-VEC: call void @foo_fast(i8* null, i8* null) -// X64-VEC: call x86_vectorcallcc void @"\01foo_vector@@16"(i8* null, i8* null) +// X64-VEC: call x86_vectorcallcc void @"\01foo_default@@16"(i8* frozen null, i8* frozen null) +// X64-VEC: call void @foo_std(i8* frozen null, i8* frozen null) +// X64-VEC: call void @foo_fast(i8* frozen null, i8* frozen null) +// X64-VEC: call x86_vectorcallcc void @"\01foo_vector@@16"(i8* frozen null, i8* frozen null) // X64-VEC: ret void diff --git a/clang/test/CodeGen/catch-alignment-assumption-attribute-align_value-on-lvalue.cpp b/clang/test/CodeGen/catch-alignment-assumption-attribute-align_value-on-lvalue.cpp --- a/clang/test/CodeGen/catch-alignment-assumption-attribute-align_value-on-lvalue.cpp +++ b/clang/test/CodeGen/catch-alignment-assumption-attribute-align_value-on-lvalue.cpp @@ -14,7 +14,7 @@ // CHECK-SANITIZE-ANYRECOVER: @[[LINE_100_ALIGNMENT_ASSUMPTION:.*]] = {{.*}}, i32 100, i32 13 }, {{.*}}* @[[ALIGNED_CHAR]] } char **load_from_ac_struct(struct ac_struct *x) { - // CHECK: define i8** @{{.*}}(%[[STRUCT_AC_STRUCT]]* %[[X:.*]]) + // CHECK: define frozen i8** @{{.*}}(%[[STRUCT_AC_STRUCT]]* frozen %[[X:.*]]) // CHECK-NEXT: [[ENTRY:.*]]: // CHECK-NEXT: %[[STRUCT_AC_STRUCT_ADDR:.*]] = alloca %[[STRUCT_AC_STRUCT]]*, align 8 // CHECK-NEXT: store %[[STRUCT_AC_STRUCT]]* %[[X]], %[[STRUCT_AC_STRUCT]]** %[[STRUCT_AC_STRUCT_ADDR]], align 8 diff --git a/clang/test/CodeGen/catch-alignment-assumption-attribute-align_value-on-paramvar.cpp b/clang/test/CodeGen/catch-alignment-assumption-attribute-align_value-on-paramvar.cpp --- a/clang/test/CodeGen/catch-alignment-assumption-attribute-align_value-on-paramvar.cpp +++ b/clang/test/CodeGen/catch-alignment-assumption-attribute-align_value-on-paramvar.cpp @@ -7,8 +7,8 @@ // CHECK-SANITIZE-ANYRECOVER: @[[LINE_100_ALIGNMENT_ASSUMPTION:.*]] = {{.*}}, i32 100, i32 10 }, {{.*}}* @[[CHAR]] } char **passthrough(__attribute__((align_value(0x80000000))) char **x) { - // CHECK-NOSANITIZE: define i8** @{{.*}}(i8** align 536870912 %[[X:.*]]) - // CHECK-SANITIZE: define i8** @{{.*}}(i8** %[[X:.*]]) + // CHECK-NOSANITIZE: define frozen i8** @{{.*}}(i8** frozen align 536870912 %[[X:.*]]) + // CHECK-SANITIZE: define frozen i8** @{{.*}}(i8** frozen %[[X:.*]]) // CHECK-NEXT: [[entry:.*]]: // CHECK-NEXT: %[[X_ADDR:.*]] = alloca i8**, align 8 // CHECK-NEXT: store i8** %[[X]], i8*** %[[X_ADDR]], align 8 diff --git a/clang/test/CodeGen/catch-alignment-assumption-attribute-alloc_align-on-function-variable.cpp b/clang/test/CodeGen/catch-alignment-assumption-attribute-alloc_align-on-function-variable.cpp --- a/clang/test/CodeGen/catch-alignment-assumption-attribute-alloc_align-on-function-variable.cpp +++ b/clang/test/CodeGen/catch-alignment-assumption-attribute-alloc_align-on-function-variable.cpp @@ -8,7 +8,7 @@ char **__attribute__((alloc_align(2))) passthrough(char **x, unsigned long alignment) { - // CHECK: define i8** @[[PASSTHROUGH:.*]](i8** %[[X:.*]], i64 %[[ALIGNMENT:.*]]) + // CHECK: define frozen i8** @[[PASSTHROUGH:.*]](i8** frozen %[[X:.*]], i64 frozen %[[ALIGNMENT:.*]]) // CHECK-NEXT: entry: // CHECK-NEXT: %[[X_ADDR:.*]] = alloca i8**, align 8 // CHECK-NEXT: %[[ALIGNMENT_ADDR:.*]] = alloca i64, align 8 @@ -21,7 +21,7 @@ } char **caller(char **x, unsigned long alignment) { - // CHECK: define i8** @{{.*}}(i8** %[[X:.*]], i64 %[[ALIGNMENT:.*]]) + // CHECK: define frozen i8** @{{.*}}(i8** frozen %[[X:.*]], i64 frozen %[[ALIGNMENT:.*]]) // CHECK-NEXT: entry: // CHECK-NEXT: %[[X_ADDR:.*]] = alloca i8**, align 8 // CHECK-NEXT: %[[ALIGNMENT_ADDR:.*]] = alloca i64, align 8 @@ -29,7 +29,7 @@ // CHECK-NEXT: store i64 %[[ALIGNMENT]], i64* %[[ALIGNMENT_ADDR]], align 8 // CHECK-NEXT: %[[X_RELOADED:.*]] = load i8**, i8*** %[[X_ADDR]], align 8 // CHECK-NEXT: %[[ALIGNMENT_RELOADED:.*]] = load i64, i64* %[[ALIGNMENT_ADDR]], align 8 - // CHECK-NEXT: %[[X_RETURNED:.*]] = call i8** @[[PASSTHROUGH]](i8** %[[X_RELOADED]], i64 %[[ALIGNMENT_RELOADED]]) + // CHECK-NEXT: %[[X_RETURNED:.*]] = call frozen i8** @[[PASSTHROUGH]](i8** frozen %[[X_RELOADED]], i64 frozen %[[ALIGNMENT_RELOADED]]) // CHECK-NEXT: %[[MASK:.*]] = sub i64 %[[ALIGNMENT_RELOADED]], 1 // CHECK-NEXT: %[[PTRINT:.*]] = ptrtoint i8** %[[X_RETURNED]] to i64 // CHECK-NEXT: %[[MASKEDPTR:.*]] = and i64 %[[PTRINT]], %[[MASK]] diff --git a/clang/test/CodeGen/catch-alignment-assumption-attribute-alloc_align-on-function.cpp b/clang/test/CodeGen/catch-alignment-assumption-attribute-alloc_align-on-function.cpp --- a/clang/test/CodeGen/catch-alignment-assumption-attribute-alloc_align-on-function.cpp +++ b/clang/test/CodeGen/catch-alignment-assumption-attribute-alloc_align-on-function.cpp @@ -8,7 +8,7 @@ char **__attribute__((alloc_align(2))) passthrough(char **x, unsigned long alignment) { - // CHECK: define i8** @[[PASSTHROUGH:.*]](i8** %[[X:.*]], i64 %[[ALIGNMENT:.*]]) + // CHECK: define frozen i8** @[[PASSTHROUGH:.*]](i8** frozen %[[X:.*]], i64 frozen %[[ALIGNMENT:.*]]) // CHECK-NEXT: entry: // CHECK-NEXT: %[[X_ADDR:.*]] = alloca i8**, align 8 // CHECK-NEXT: %[[ALIGNMENT_ADDR:.*]] = alloca i64, align 8 @@ -21,13 +21,13 @@ } char **caller(char **x) { - // CHECK: define i8** @{{.*}}(i8** %[[X:.*]]) + // CHECK: define frozen i8** @{{.*}}(i8** frozen %[[X:.*]]) // CHECK-NEXT: entry: // CHECK-NEXT: %[[X_ADDR:.*]] = alloca i8**, align 8 // CHECK-NEXT: store i8** %[[X]], i8*** %[[X_ADDR]], align 8 // CHECK-NEXT: %[[X_RELOADED:.*]] = load i8**, i8*** %[[X_ADDR]], align 8 - // CHECK-NOSANITIZE-NEXT: %[[X_RETURNED:.*]] = call align 128 i8** @[[PASSTHROUGH]](i8** %[[X_RELOADED]], i64 128) - // CHECK-SANITIZE-NEXT: %[[X_RETURNED:.*]] = call i8** @[[PASSTHROUGH]](i8** %[[X_RELOADED]], i64 128) + // CHECK-NOSANITIZE-NEXT: %[[X_RETURNED:.*]] = call frozen align 128 i8** @[[PASSTHROUGH]](i8** frozen %[[X_RELOADED]], i64 frozen 128) + // CHECK-SANITIZE-NEXT: %[[X_RETURNED:.*]] = call frozen i8** @[[PASSTHROUGH]](i8** frozen %[[X_RELOADED]], i64 frozen 128) // CHECK-SANITIZE-NEXT: %[[PTRINT:.*]] = ptrtoint i8** %[[X_RETURNED]] to i64 // CHECK-SANITIZE-NEXT: %[[MASKEDPTR:.*]] = and i64 %[[PTRINT]], 127 // CHECK-SANITIZE-NEXT: %[[MASKCOND:.*]] = icmp eq i64 %[[MASKEDPTR]], 0 diff --git a/clang/test/CodeGen/catch-alignment-assumption-attribute-assume_aligned-on-function-two-params.cpp b/clang/test/CodeGen/catch-alignment-assumption-attribute-assume_aligned-on-function-two-params.cpp --- a/clang/test/CodeGen/catch-alignment-assumption-attribute-assume_aligned-on-function-two-params.cpp +++ b/clang/test/CodeGen/catch-alignment-assumption-attribute-assume_aligned-on-function-two-params.cpp @@ -7,7 +7,7 @@ // CHECK-SANITIZE-ANYRECOVER: @[[LINE_100_ALIGNMENT_ASSUMPTION:.*]] = {{.*}}, i32 100, i32 10 }, {{.*}}* @[[CHAR]] } char **__attribute__((assume_aligned(0x80000000, 42))) passthrough(char **x) { - // CHECK: define i8** @[[PASSTHROUGH:.*]](i8** %[[X:.*]]) + // CHECK: define frozen i8** @[[PASSTHROUGH:.*]](i8** frozen %[[X:.*]]) // CHECK-NEXT: entry: // CHECK-NEXT: %[[X_ADDR:.*]] = alloca i8**, align 8 // CHECK-NEXT: store i8** %[[X]], i8*** %[[X_ADDR]], align 8 @@ -18,12 +18,12 @@ } char **caller(char **x) { - // CHECK: define i8** @{{.*}}(i8** %[[X:.*]]) + // CHECK: define frozen i8** @{{.*}}(i8** frozen %[[X:.*]]) // CHECK-NEXT: entry: // CHECK-NEXT: %[[X_ADDR:.*]] = alloca i8**, align 8 // CHECK-NEXT: store i8** %[[X]], i8*** %[[X_ADDR]], align 8 // CHECK-NEXT: %[[X_RELOADED:.*]] = load i8**, i8*** %[[X_ADDR]], align 8 - // CHECK-NEXT: %[[X_RETURNED:.*]] = call i8** @[[PASSTHROUGH]](i8** %[[X_RELOADED]]) + // CHECK-NEXT: %[[X_RETURNED:.*]] = call frozen i8** @[[PASSTHROUGH]](i8** frozen %[[X_RELOADED]]) // CHECK-NEXT: %[[PTRINT:.*]] = ptrtoint i8** %[[X_RETURNED]] to i64 // CHECK-NEXT: %[[OFFSETPTR:.*]] = sub i64 %[[PTRINT]], 42 // CHECK-NEXT: %[[MASKEDPTR:.*]] = and i64 %[[OFFSETPTR]], 2147483647 diff --git a/clang/test/CodeGen/catch-alignment-assumption-attribute-assume_aligned-on-function.cpp b/clang/test/CodeGen/catch-alignment-assumption-attribute-assume_aligned-on-function.cpp --- a/clang/test/CodeGen/catch-alignment-assumption-attribute-assume_aligned-on-function.cpp +++ b/clang/test/CodeGen/catch-alignment-assumption-attribute-assume_aligned-on-function.cpp @@ -7,7 +7,7 @@ // CHECK-SANITIZE-ANYRECOVER: @[[LINE_100_ALIGNMENT_ASSUMPTION:.*]] = {{.*}}, i32 100, i32 10 }, {{.*}}* @[[CHAR]] } char **__attribute__((assume_aligned(128))) passthrough(char **x) { - // CHECK: define i8** @[[PASSTHROUGH:.*]](i8** %[[X:.*]]) + // CHECK: define frozen i8** @[[PASSTHROUGH:.*]](i8** frozen %[[X:.*]]) // CHECK-NEXT: entry: // CHECK-NEXT: %[[X_ADDR:.*]] = alloca i8**, align 8 // CHECK-NEXT: store i8** %[[X]], i8*** %[[X_ADDR]], align 8 @@ -18,13 +18,13 @@ } char **caller(char **x) { - // CHECK: define i8** @{{.*}}(i8** %[[X]]) + // CHECK: define frozen i8** @{{.*}}(i8** frozen %[[X]]) // CHECK-NEXT: entry: // CHECK-NEXT: %[[X_ADDR]] = alloca i8**, align 8 // CHECK-NEXT: store i8** %[[X]], i8*** %[[X_ADDR]], align 8 // CHECK-NEXT: %[[X_RELOADED:.*]] = load i8**, i8*** %[[X_ADDR]], align 8 - // CHECK-NOSANITIZE-NEXT: %[[X_RETURNED:.*]] = call align 128 i8** @[[PASSTHROUGH]](i8** %[[X_RELOADED]]) - // CHECK-SANITIZE-NEXT: %[[X_RETURNED:.*]] = call i8** @[[PASSTHROUGH]](i8** %[[X_RELOADED]]) + // CHECK-NOSANITIZE-NEXT: %[[X_RETURNED:.*]] = call frozen align 128 i8** @[[PASSTHROUGH]](i8** frozen %[[X_RELOADED]]) + // CHECK-SANITIZE-NEXT: %[[X_RETURNED:.*]] = call frozen i8** @[[PASSTHROUGH]](i8** frozen %[[X_RELOADED]]) // CHECK-SANITIZE-NEXT: %[[PTRINT:.*]] = ptrtoint i8** %[[X_RETURNED]] to i64 // CHECK-SANITIZE-NEXT: %[[MASKEDPTR:.*]] = and i64 %[[PTRINT]], 127 // CHECK-SANITIZE-NEXT: %[[MASKCOND:.*]] = icmp eq i64 %[[MASKEDPTR]], 0 diff --git a/clang/test/CodeGen/catch-alignment-assumption-builtin_assume_aligned-three-params-variable.cpp b/clang/test/CodeGen/catch-alignment-assumption-builtin_assume_aligned-three-params-variable.cpp --- a/clang/test/CodeGen/catch-alignment-assumption-builtin_assume_aligned-three-params-variable.cpp +++ b/clang/test/CodeGen/catch-alignment-assumption-builtin_assume_aligned-three-params-variable.cpp @@ -7,7 +7,7 @@ // CHECK-SANITIZE-ANYRECOVER: @[[LINE_100_ALIGNMENT_ASSUMPTION:.*]] = {{.*}}, i32 100, i32 35 }, {{.*}}* @[[CHAR]] } void *caller(char **x, unsigned long offset) { - // CHECK: define i8* @{{.*}}(i8** %[[X:.*]], i64 %[[OFFSET:.*]]) + // CHECK: define frozen i8* @{{.*}}(i8** frozen %[[X:.*]], i64 frozen %[[OFFSET:.*]]) // CHECK-NEXT: entry: // CHECK-NEXT: %[[X_ADDR:.*]] = alloca i8**, align 8 // CHECK-NEXT: %[[OFFSET_ADDR:.*]] = alloca i64, align 8 diff --git a/clang/test/CodeGen/catch-alignment-assumption-builtin_assume_aligned-three-params.cpp b/clang/test/CodeGen/catch-alignment-assumption-builtin_assume_aligned-three-params.cpp --- a/clang/test/CodeGen/catch-alignment-assumption-builtin_assume_aligned-three-params.cpp +++ b/clang/test/CodeGen/catch-alignment-assumption-builtin_assume_aligned-three-params.cpp @@ -7,7 +7,7 @@ // CHECK-SANITIZE-ANYRECOVER: @[[LINE_100_ALIGNMENT_ASSUMPTION:.*]] = {{.*}}, i32 100, i32 35 }, {{.*}}* @[[CHAR]] } void *caller(char **x) { - // CHECK: define i8* @{{.*}}(i8** %[[X:.*]]) + // CHECK: define frozen i8* @{{.*}}(i8** frozen %[[X:.*]]) // CHECK-NEXT: entry: // CHECK-NEXT: %[[X_ADDR:.*]] = alloca i8**, align 8 // CHECK-NEXT: store i8** %[[X]], i8*** %[[X_ADDR]], align 8 diff --git a/clang/test/CodeGen/catch-alignment-assumption-builtin_assume_aligned-two-params.cpp b/clang/test/CodeGen/catch-alignment-assumption-builtin_assume_aligned-two-params.cpp --- a/clang/test/CodeGen/catch-alignment-assumption-builtin_assume_aligned-two-params.cpp +++ b/clang/test/CodeGen/catch-alignment-assumption-builtin_assume_aligned-two-params.cpp @@ -7,7 +7,7 @@ // CHECK-SANITIZE-ANYRECOVER: @[[LINE_100_ALIGNMENT_ASSUMPTION:.*]] = {{.*}}, i32 100, i32 35 }, {{.*}}* @[[CHAR]] } void *caller(char **x) { - // CHECK: define i8* @{{.*}}(i8** %[[X:.*]]) + // CHECK: define frozen i8* @{{.*}}(i8** frozen %[[X:.*]]) // CHECK-NEXT: entry: // CHECK-NEXT: %[[X_ADDR:.*]] = alloca i8**, align 8 // CHECK-NEXT: store i8** %[[X]], i8*** %[[X_ADDR]], align 8 diff --git a/clang/test/CodeGen/catch-alignment-assumption-openmp.cpp b/clang/test/CodeGen/catch-alignment-assumption-openmp.cpp --- a/clang/test/CodeGen/catch-alignment-assumption-openmp.cpp +++ b/clang/test/CodeGen/catch-alignment-assumption-openmp.cpp @@ -7,7 +7,7 @@ // CHECK-SANITIZE-ANYRECOVER: @[[LINE_100_ALIGNMENT_ASSUMPTION:.*]] = {{.*}}, i32 100, i32 30 }, {{.*}}* @[[CHAR]] } void func(char *data) { - // CHECK: define void @{{.*}}(i8* %[[DATA:.*]]) + // CHECK: define void @{{.*}}(i8* frozen %[[DATA:.*]]) // CHECK-NEXT: [[ENTRY:.*]]: // CHECK-NEXT: %[[DATA_ADDR:.*]] = alloca i8*, align 8 // CHECK: store i8* %[[DATA]], i8** %[[DATA_ADDR]], align 8 diff --git a/clang/test/CodeGen/catch-implicit-integer-sign-changes-incdec.c b/clang/test/CodeGen/catch-implicit-integer-sign-changes-incdec.c --- a/clang/test/CodeGen/catch-implicit-integer-sign-changes-incdec.c +++ b/clang/test/CodeGen/catch-implicit-integer-sign-changes-incdec.c @@ -34,7 +34,7 @@ // CHECK-SANITIZE-NEXT: [[X_PROMOTED:%.*]] = zext i16 [[X_RELOADED]] to i32 // CHECK-SANITIZE-NEXT: [[INC:%.*]] = add i32 [[X_PROMOTED]], 1 // CHECK-SANITIZE-NEXT: [[X_PROMOTED_DEMOTED:%.*]] = trunc i32 [[INC]] to i16 -// CHECK-SANITIZE-NEXT: [[SRC_INC_NEGATIVITYCHECK:%.*]] = icmp slt i32 [[INC]], 0, !nosanitize !2 +// CHECK-SANITIZE-NEXT: [[SRC_INC_NEGATIVITYCHECK:%.*]] = icmp slt i32 [[INC]], 0, !nosanitize // CHECK-SANITIZE-NEXT: [[SIGNCHANGECHECK:%.*]] = icmp eq i1 [[SRC_INC_NEGATIVITYCHECK]], false, !nosanitize // CHECK-SANITIZE-NEXT: br i1 [[SIGNCHANGECHECK]], label %[[CONT:.*]], label %[[HANDLER_IMPLICIT_X_PROMOTEDERSION:[^,]+]],{{.*}} !nosanitize // CHECK-SANITIZE: [[HANDLER_IMPLICIT_X_PROMOTEDERSION]]: @@ -69,7 +69,7 @@ // CHECK-SANITIZE-NEXT: [[X_PROMOTED:%.*]] = zext i16 [[X_RELOADED]] to i32 // CHECK-SANITIZE-NEXT: [[INC:%.*]] = add i32 [[X_PROMOTED]], -1 // CHECK-SANITIZE-NEXT: [[X_PROMOTED_DEMOTED:%.*]] = trunc i32 [[INC]] to i16 -// CHECK-SANITIZE-NEXT: [[SRC_INC_NEGATIVITYCHECK:%.*]] = icmp slt i32 [[INC]], 0, !nosanitize !2 +// CHECK-SANITIZE-NEXT: [[SRC_INC_NEGATIVITYCHECK:%.*]] = icmp slt i32 [[INC]], 0, !nosanitize // CHECK-SANITIZE-NEXT: [[SIGNCHANGECHECK:%.*]] = icmp eq i1 [[SRC_INC_NEGATIVITYCHECK]], false, !nosanitize // CHECK-SANITIZE-NEXT: br i1 [[SIGNCHANGECHECK]], label %[[CONT:.*]], label %[[HANDLER_IMPLICIT_X_PROMOTEDERSION:[^,]+]],{{.*}} !nosanitize // CHECK-SANITIZE: [[HANDLER_IMPLICIT_X_PROMOTEDERSION]]: @@ -105,7 +105,7 @@ // CHECK-SANITIZE-NEXT: [[X_PROMOTED:%.*]] = zext i16 [[X_RELOADED]] to i32 // CHECK-SANITIZE-NEXT: [[INC:%.*]] = add i32 [[X_PROMOTED]], 1 // CHECK-SANITIZE-NEXT: [[X_PROMOTED_DEMOTED:%.*]] = trunc i32 [[INC]] to i16 -// CHECK-SANITIZE-NEXT: [[SRC_INC_NEGATIVITYCHECK:%.*]] = icmp slt i32 [[INC]], 0, !nosanitize !2 +// CHECK-SANITIZE-NEXT: [[SRC_INC_NEGATIVITYCHECK:%.*]] = icmp slt i32 [[INC]], 0, !nosanitize // CHECK-SANITIZE-NEXT: [[SIGNCHANGECHECK:%.*]] = icmp eq i1 [[SRC_INC_NEGATIVITYCHECK]], false, !nosanitize // CHECK-SANITIZE-NEXT: br i1 [[SIGNCHANGECHECK]], label %[[CONT:.*]], label %[[HANDLER_IMPLICIT_X_PROMOTEDERSION:[^,]+]],{{.*}} !nosanitize // CHECK-SANITIZE: [[HANDLER_IMPLICIT_X_PROMOTEDERSION]]: @@ -141,7 +141,7 @@ // CHECK-SANITIZE-NEXT: [[X_PROMOTED:%.*]] = zext i16 [[X_RELOADED]] to i32 // CHECK-SANITIZE-NEXT: [[INC:%.*]] = add i32 [[X_PROMOTED]], -1 // CHECK-SANITIZE-NEXT: [[X_PROMOTED_DEMOTED:%.*]] = trunc i32 [[INC]] to i16 -// CHECK-SANITIZE-NEXT: [[SRC_INC_NEGATIVITYCHECK:%.*]] = icmp slt i32 [[INC]], 0, !nosanitize !2 +// CHECK-SANITIZE-NEXT: [[SRC_INC_NEGATIVITYCHECK:%.*]] = icmp slt i32 [[INC]], 0, !nosanitize // CHECK-SANITIZE-NEXT: [[SIGNCHANGECHECK:%.*]] = icmp eq i1 [[SRC_INC_NEGATIVITYCHECK]], false, !nosanitize // CHECK-SANITIZE-NEXT: br i1 [[SIGNCHANGECHECK]], label %[[CONT:.*]], label %[[HANDLER_IMPLICIT_X_PROMOTEDERSION:[^,]+]],{{.*}} !nosanitize // CHECK-SANITIZE: [[HANDLER_IMPLICIT_X_PROMOTEDERSION]]: @@ -177,8 +177,8 @@ // CHECK-SANITIZE-NEXT: [[X_PROMOTED:%.*]] = sext i16 [[X_RELOADED]] to i32 // CHECK-SANITIZE-NEXT: [[INC:%.*]] = add i32 [[X_PROMOTED]], 1 // CHECK-SANITIZE-NEXT: [[X_PROMOTED_DEMOTED:%.*]] = trunc i32 [[INC]] to i16 -// CHECK-SANITIZE-NEXT: [[SRC_INC_NEGATIVITYCHECK:%.*]] = icmp slt i32 [[INC]], 0, !nosanitize !2 -// CHECK-SANITIZE-NEXT: [[DST_NEGATIVITYCHECK:%.*]] = icmp slt i16 [[X_PROMOTED_DEMOTED]], 0, !nosanitize !2 +// CHECK-SANITIZE-NEXT: [[SRC_INC_NEGATIVITYCHECK:%.*]] = icmp slt i32 [[INC]], 0, !nosanitize +// CHECK-SANITIZE-NEXT: [[DST_NEGATIVITYCHECK:%.*]] = icmp slt i16 [[X_PROMOTED_DEMOTED]], 0, !nosanitize // CHECK-SANITIZE-NEXT: [[SIGNCHANGECHECK:%.*]] = icmp eq i1 [[SRC_INC_NEGATIVITYCHECK]], [[DST_NEGATIVITYCHECK]], !nosanitize // CHECK-SANITIZE-NEXT: br i1 [[SIGNCHANGECHECK]], label %[[CONT:.*]], label %[[HANDLER_IMPLICIT_X_PROMOTEDERSION:[^,]+]],{{.*}} !nosanitize // CHECK-SANITIZE: [[HANDLER_IMPLICIT_X_PROMOTEDERSION]]: @@ -213,8 +213,8 @@ // CHECK-SANITIZE-NEXT: [[X_PROMOTED:%.*]] = sext i16 [[X_RELOADED]] to i32 // CHECK-SANITIZE-NEXT: [[INC:%.*]] = add i32 [[X_PROMOTED]], -1 // CHECK-SANITIZE-NEXT: [[X_PROMOTED_DEMOTED:%.*]] = trunc i32 [[INC]] to i16 -// CHECK-SANITIZE-NEXT: [[SRC_INC_NEGATIVITYCHECK:%.*]] = icmp slt i32 [[INC]], 0, !nosanitize !2 -// CHECK-SANITIZE-NEXT: [[DST_NEGATIVITYCHECK:%.*]] = icmp slt i16 [[X_PROMOTED_DEMOTED]], 0, !nosanitize !2 +// CHECK-SANITIZE-NEXT: [[SRC_INC_NEGATIVITYCHECK:%.*]] = icmp slt i32 [[INC]], 0, !nosanitize +// CHECK-SANITIZE-NEXT: [[DST_NEGATIVITYCHECK:%.*]] = icmp slt i16 [[X_PROMOTED_DEMOTED]], 0, !nosanitize // CHECK-SANITIZE-NEXT: [[SIGNCHANGECHECK:%.*]] = icmp eq i1 [[SRC_INC_NEGATIVITYCHECK]], [[DST_NEGATIVITYCHECK]], !nosanitize // CHECK-SANITIZE-NEXT: br i1 [[SIGNCHANGECHECK]], label %[[CONT:.*]], label %[[HANDLER_IMPLICIT_X_PROMOTEDERSION:[^,]+]],{{.*}} !nosanitize // CHECK-SANITIZE: [[HANDLER_IMPLICIT_X_PROMOTEDERSION]]: @@ -250,8 +250,8 @@ // CHECK-SANITIZE-NEXT: [[X_PROMOTED:%.*]] = sext i16 [[X_RELOADED]] to i32 // CHECK-SANITIZE-NEXT: [[INC:%.*]] = add i32 [[X_PROMOTED]], 1 // CHECK-SANITIZE-NEXT: [[X_PROMOTED_DEMOTED:%.*]] = trunc i32 [[INC]] to i16 -// CHECK-SANITIZE-NEXT: [[SRC_INC_NEGATIVITYCHECK:%.*]] = icmp slt i32 [[INC]], 0, !nosanitize !2 -// CHECK-SANITIZE-NEXT: [[DST_NEGATIVITYCHECK:%.*]] = icmp slt i16 [[X_PROMOTED_DEMOTED]], 0, !nosanitize !2 +// CHECK-SANITIZE-NEXT: [[SRC_INC_NEGATIVITYCHECK:%.*]] = icmp slt i32 [[INC]], 0, !nosanitize +// CHECK-SANITIZE-NEXT: [[DST_NEGATIVITYCHECK:%.*]] = icmp slt i16 [[X_PROMOTED_DEMOTED]], 0, !nosanitize // CHECK-SANITIZE-NEXT: [[SIGNCHANGECHECK:%.*]] = icmp eq i1 [[SRC_INC_NEGATIVITYCHECK]], [[DST_NEGATIVITYCHECK]], !nosanitize // CHECK-SANITIZE-NEXT: br i1 [[SIGNCHANGECHECK]], label %[[CONT:.*]], label %[[HANDLER_IMPLICIT_X_PROMOTEDERSION:[^,]+]],{{.*}} !nosanitize // CHECK-SANITIZE: [[HANDLER_IMPLICIT_X_PROMOTEDERSION]]: @@ -287,8 +287,8 @@ // CHECK-SANITIZE-NEXT: [[X_PROMOTED:%.*]] = sext i16 [[X_RELOADED]] to i32 // CHECK-SANITIZE-NEXT: [[INC:%.*]] = add i32 [[X_PROMOTED]], -1 // CHECK-SANITIZE-NEXT: [[X_PROMOTED_DEMOTED:%.*]] = trunc i32 [[INC]] to i16 -// CHECK-SANITIZE-NEXT: [[SRC_INC_NEGATIVITYCHECK:%.*]] = icmp slt i32 [[INC]], 0, !nosanitize !2 -// CHECK-SANITIZE-NEXT: [[DST_NEGATIVITYCHECK:%.*]] = icmp slt i16 [[X_PROMOTED_DEMOTED]], 0, !nosanitize !2 +// CHECK-SANITIZE-NEXT: [[SRC_INC_NEGATIVITYCHECK:%.*]] = icmp slt i32 [[INC]], 0, !nosanitize +// CHECK-SANITIZE-NEXT: [[DST_NEGATIVITYCHECK:%.*]] = icmp slt i16 [[X_PROMOTED_DEMOTED]], 0, !nosanitize // CHECK-SANITIZE-NEXT: [[SIGNCHANGECHECK:%.*]] = icmp eq i1 [[SRC_INC_NEGATIVITYCHECK]], [[DST_NEGATIVITYCHECK]], !nosanitize // CHECK-SANITIZE-NEXT: br i1 [[SIGNCHANGECHECK]], label %[[CONT:.*]], label %[[HANDLER_IMPLICIT_X_PROMOTEDERSION:[^,]+]],{{.*}} !nosanitize // CHECK-SANITIZE: [[HANDLER_IMPLICIT_X_PROMOTEDERSION]]: diff --git a/clang/test/CodeGen/catch-implicit-integer-sign-changes.c b/clang/test/CodeGen/catch-implicit-integer-sign-changes.c --- a/clang/test/CodeGen/catch-implicit-integer-sign-changes.c +++ b/clang/test/CodeGen/catch-implicit-integer-sign-changes.c @@ -1,7 +1,7 @@ -// RUN: %clang_cc1 -emit-llvm %s -o - -triple x86_64-linux-gnu | FileCheck %s --check-prefix=CHECK -// RUN: %clang_cc1 -fsanitize=implicit-integer-sign-change -fno-sanitize-recover=implicit-integer-sign-change -emit-llvm %s -o - -triple x86_64-linux-gnu | FileCheck %s -implicit-check-not="call void @__ubsan_handle_implicit_conversion" --check-prefixes=CHECK,CHECK-SANITIZE,CHECK-SANITIZE-ANYRECOVER,CHECK-SANITIZE-NORECOVER,CHECK-SANITIZE-UNREACHABLE -// RUN: %clang_cc1 -fsanitize=implicit-integer-sign-change -fsanitize-recover=implicit-integer-sign-change -emit-llvm %s -o - -triple x86_64-linux-gnu | FileCheck %s -implicit-check-not="call void @__ubsan_handle_implicit_conversion" --check-prefixes=CHECK,CHECK-SANITIZE,CHECK-SANITIZE-ANYRECOVER,CHECK-SANITIZE-RECOVER -// RUN: %clang_cc1 -fsanitize=implicit-integer-sign-change -fsanitize-trap=implicit-integer-sign-change -emit-llvm %s -o - -triple x86_64-linux-gnu | FileCheck %s -implicit-check-not="call void @__ubsan_handle_implicit_conversion" --check-prefixes=CHECK,CHECK-SANITIZE,CHECK-SANITIZE-TRAP,CHECK-SANITIZE-UNREACHABLE +// RUN: %clang_cc1 -disable-frozen-args -emit-llvm %s -o - -triple x86_64-linux-gnu | FileCheck %s --check-prefix=CHECK +// RUN: %clang_cc1 -disable-frozen-args -fsanitize=implicit-integer-sign-change -fno-sanitize-recover=implicit-integer-sign-change -emit-llvm %s -o - -triple x86_64-linux-gnu | FileCheck %s -implicit-check-not="call void @__ubsan_handle_implicit_conversion" --check-prefixes=CHECK,CHECK-SANITIZE,CHECK-SANITIZE-ANYRECOVER,CHECK-SANITIZE-NORECOVER,CHECK-SANITIZE-UNREACHABLE +// RUN: %clang_cc1 -disable-frozen-args -fsanitize=implicit-integer-sign-change -fsanitize-recover=implicit-integer-sign-change -emit-llvm %s -o - -triple x86_64-linux-gnu | FileCheck %s -implicit-check-not="call void @__ubsan_handle_implicit_conversion" --check-prefixes=CHECK,CHECK-SANITIZE,CHECK-SANITIZE-ANYRECOVER,CHECK-SANITIZE-RECOVER +// RUN: %clang_cc1 -disable-frozen-args -fsanitize=implicit-integer-sign-change -fsanitize-trap=implicit-integer-sign-change -emit-llvm %s -o - -triple x86_64-linux-gnu | FileCheck %s -implicit-check-not="call void @__ubsan_handle_implicit_conversion" --check-prefixes=CHECK,CHECK-SANITIZE,CHECK-SANITIZE-TRAP,CHECK-SANITIZE-UNREACHABLE // CHECK-SANITIZE-ANYRECOVER: @[[UNSIGNED_INT:.*]] = {{.*}} c"'unsigned int'\00" } // CHECK-SANITIZE-ANYRECOVER-NEXT: @[[SIGNED_INT:.*]] = {{.*}} c"'int'\00" } diff --git a/clang/test/CodeGen/catch-implicit-signed-integer-truncation-or-sign-change.c b/clang/test/CodeGen/catch-implicit-signed-integer-truncation-or-sign-change.c --- a/clang/test/CodeGen/catch-implicit-signed-integer-truncation-or-sign-change.c +++ b/clang/test/CodeGen/catch-implicit-signed-integer-truncation-or-sign-change.c @@ -1,7 +1,7 @@ -// RUN: %clang_cc1 -emit-llvm %s -o - -triple x86_64-linux-gnu | FileCheck %s --check-prefix=CHECK -// RUN: %clang_cc1 -fsanitize=implicit-signed-integer-truncation,implicit-integer-sign-change -fno-sanitize-recover=implicit-signed-integer-truncation,implicit-integer-sign-change -emit-llvm %s -o - -triple x86_64-linux-gnu | FileCheck %s -implicit-check-not="call void @__ubsan_handle_implicit_conversion" --check-prefixes=CHECK,CHECK-SANITIZE,CHECK-SANITIZE-ANYRECOVER,CHECK-SANITIZE-NORECOVER,CHECK-SANITIZE-UNREACHABLE -// RUN: %clang_cc1 -fsanitize=implicit-signed-integer-truncation,implicit-integer-sign-change -fsanitize-recover=implicit-signed-integer-truncation,implicit-integer-sign-change -emit-llvm %s -o - -triple x86_64-linux-gnu | FileCheck %s -implicit-check-not="call void @__ubsan_handle_implicit_conversion" --check-prefixes=CHECK,CHECK-SANITIZE,CHECK-SANITIZE-ANYRECOVER,CHECK-SANITIZE-RECOVER -// RUN: %clang_cc1 -fsanitize=implicit-signed-integer-truncation,implicit-integer-sign-change -fsanitize-trap=implicit-signed-integer-truncation,implicit-integer-sign-change -emit-llvm %s -o - -triple x86_64-linux-gnu | FileCheck %s -implicit-check-not="call void @__ubsan_handle_implicit_conversion" --check-prefixes=CHECK,CHECK-SANITIZE,CHECK-SANITIZE-TRAP,CHECK-SANITIZE-UNREACHABLE +// RUN: %clang_cc1 -disable-frozen-args -emit-llvm %s -o - -triple x86_64-linux-gnu | FileCheck %s --check-prefix=CHECK +// RUN: %clang_cc1 -disable-frozen-args -fsanitize=implicit-signed-integer-truncation,implicit-integer-sign-change -fno-sanitize-recover=implicit-signed-integer-truncation,implicit-integer-sign-change -emit-llvm %s -o - -triple x86_64-linux-gnu | FileCheck %s -implicit-check-not="call void @__ubsan_handle_implicit_conversion" --check-prefixes=CHECK,CHECK-SANITIZE,CHECK-SANITIZE-ANYRECOVER,CHECK-SANITIZE-NORECOVER,CHECK-SANITIZE-UNREACHABLE +// RUN: %clang_cc1 -disable-frozen-args -fsanitize=implicit-signed-integer-truncation,implicit-integer-sign-change -fsanitize-recover=implicit-signed-integer-truncation,implicit-integer-sign-change -emit-llvm %s -o - -triple x86_64-linux-gnu | FileCheck %s -implicit-check-not="call void @__ubsan_handle_implicit_conversion" --check-prefixes=CHECK,CHECK-SANITIZE,CHECK-SANITIZE-ANYRECOVER,CHECK-SANITIZE-RECOVER +// RUN: %clang_cc1 -disable-frozen-args -fsanitize=implicit-signed-integer-truncation,implicit-integer-sign-change -fsanitize-trap=implicit-signed-integer-truncation,implicit-integer-sign-change -emit-llvm %s -o - -triple x86_64-linux-gnu | FileCheck %s -implicit-check-not="call void @__ubsan_handle_implicit_conversion" --check-prefixes=CHECK,CHECK-SANITIZE,CHECK-SANITIZE-TRAP,CHECK-SANITIZE-UNREACHABLE // CHECK-SANITIZE-ANYRECOVER: @[[UNSIGNED_INT:.*]] = {{.*}} c"'unsigned int'\00" } // CHECK-SANITIZE-ANYRECOVER-NEXT: @[[SIGNED_CHAR:.*]] = {{.*}} c"'signed char'\00" } diff --git a/clang/test/CodeGen/catch-nullptr-and-nonzero-offset-in-offsetof-idiom.c b/clang/test/CodeGen/catch-nullptr-and-nonzero-offset-in-offsetof-idiom.c --- a/clang/test/CodeGen/catch-nullptr-and-nonzero-offset-in-offsetof-idiom.c +++ b/clang/test/CodeGen/catch-nullptr-and-nonzero-offset-in-offsetof-idiom.c @@ -14,7 +14,7 @@ int x, y; }; -// CHECK-LABEL: define i64 @{{.*}}get_offset_of_y_naively{{.*}}( +// CHECK-LABEL: define frozen i64 @{{.*}}get_offset_of_y_naively{{.*}}( uintptr_t get_offset_of_y_naively() { // CHECK: [[ENTRY:.*]]: // CHECK-NEXT: ret i64 ptrtoint (i32* getelementptr (i32, i32* null, i32 1) to i64) @@ -22,7 +22,7 @@ return ((uintptr_t)(&(((struct S *)0)->y))); } -// CHECK-LABEL: define i64 @{{.*}}get_offset_of_y_via_builtin{{.*}}( +// CHECK-LABEL: define frozen i64 @{{.*}}get_offset_of_y_via_builtin{{.*}}( uintptr_t get_offset_of_y_via_builtin() { // CHECK: [[ENTRY:.*]]: // CHECK-NEXT: ret i64 4 diff --git a/clang/test/CodeGen/catch-nullptr-and-nonzero-offset-when-nullptr-is-defined.c b/clang/test/CodeGen/catch-nullptr-and-nonzero-offset-when-nullptr-is-defined.c --- a/clang/test/CodeGen/catch-nullptr-and-nonzero-offset-when-nullptr-is-defined.c +++ b/clang/test/CodeGen/catch-nullptr-and-nonzero-offset-when-nullptr-is-defined.c @@ -25,7 +25,7 @@ #endif char *add_unsigned(char *base, unsigned long offset) { - // CHECK: define i8* @add_unsigned(i8* %[[BASE:.*]], i64 %[[OFFSET:.*]]) + // CHECK: define frozen i8* @add_unsigned(i8* frozen %[[BASE:.*]], i64 frozen %[[OFFSET:.*]]) // CHECK-NEXT: [[ENTRY:.*]]: // CHECK-NEXT: %[[BASE_ADDR:.*]] = alloca i8*, align 8 // CHECK-NEXT: %[[OFFSET_ADDR:.*]] = alloca i64, align 8 diff --git a/clang/test/CodeGen/catch-nullptr-and-nonzero-offset.c b/clang/test/CodeGen/catch-nullptr-and-nonzero-offset.c --- a/clang/test/CodeGen/catch-nullptr-and-nonzero-offset.c +++ b/clang/test/CodeGen/catch-nullptr-and-nonzero-offset.c @@ -41,7 +41,7 @@ #endif char *var_var(char *base, unsigned long offset) { - // CHECK: define i8* @var_var(i8* %[[BASE:.*]], i64 %[[OFFSET:.*]]) + // CHECK: define frozen i8* @var_var(i8* frozen %[[BASE:.*]], i64 frozen %[[OFFSET:.*]]) // CHECK-NEXT: [[ENTRY:.*]]: // CHECK-NEXT: %[[BASE_ADDR:.*]] = alloca i8*, align 8 // CHECK-NEXT: %[[OFFSET_ADDR:.*]] = alloca i64, align 8 @@ -76,7 +76,7 @@ } char *var_zero(char *base) { - // CHECK: define i8* @var_zero(i8* %[[BASE:.*]]) + // CHECK: define frozen i8* @var_zero(i8* frozen %[[BASE:.*]]) // CHECK-NEXT: [[ENTRY:.*]]: // CHECK-NEXT: %[[BASE_ADDR:.*]] = alloca i8*, align 8 // CHECK-NEXT: store i8* %[[BASE]], i8** %[[BASE_ADDR]], align 8 @@ -103,7 +103,7 @@ } char *var_one(char *base) { - // CHECK: define i8* @var_one(i8* %[[BASE:.*]]) + // CHECK: define frozen i8* @var_one(i8* frozen %[[BASE:.*]]) // CHECK-NEXT: [[ENTRY:.*]]: // CHECK-NEXT: %[[BASE_ADDR:.*]] = alloca i8*, align 8 // CHECK-NEXT: store i8* %[[BASE]], i8** %[[BASE_ADDR]], align 8 @@ -131,7 +131,7 @@ } char *var_allones(char *base) { - // CHECK: define i8* @var_allones(i8* %[[BASE:.*]]) + // CHECK: define frozen i8* @var_allones(i8* frozen %[[BASE:.*]]) // CHECK-NEXT: [[ENTRY:.*]]: // CHECK-NEXT: %[[BASE_ADDR:.*]] = alloca i8*, align 8 // CHECK-NEXT: store i8* %[[BASE]], i8** %[[BASE_ADDR]], align 8 @@ -161,7 +161,7 @@ //------------------------------------------------------------------------------ char *nullptr_var(unsigned long offset) { - // CHECK: define i8* @nullptr_var(i64 %[[OFFSET:.*]]) + // CHECK: define frozen i8* @nullptr_var(i64 frozen %[[OFFSET:.*]]) // CHECK-NEXT: [[ENTRY:.*]]: // CHECK-NEXT: %[[OFFSET_ADDR:.*]] = alloca i64, align 8 // CHECK-NEXT: store i64 %[[OFFSET]], i64* %[[OFFSET_ADDR]], align 8 @@ -192,7 +192,7 @@ } char *nullptr_zero() { - // CHECK: define i8* @nullptr_zero() + // CHECK: define frozen i8* @nullptr_zero() // CHECK-NEXT: [[ENTRY:.*]]: // CHECK-SANITIZE-C-NEXT: br i1 false, label %[[CONT:.*]], label %[[HANDLER_POINTER_OVERFLOW:[^,]+]],{{.*}} !nosanitize // CHECK-SANITIZE-C: [[HANDLER_POINTER_OVERFLOW]]: @@ -209,7 +209,7 @@ } char *nullptr_one_BAD() { - // CHECK: define i8* @nullptr_one_BAD() + // CHECK: define frozen i8* @nullptr_one_BAD() // CHECK-NEXT: [[ENTRY:.*]]: // CHECK-SANITIZE-C-NEXT: br i1 false, label %[[CONT:.*]], label %[[HANDLER_POINTER_OVERFLOW:[^,]+]],{{.*}} !nosanitize // CHECK-SANITIZE-CPP-NEXT: br i1 icmp eq (i64 ptrtoint (i8* getelementptr inbounds (i8, i8* null, i64 1) to i64), i64 0), label %[[CONT:.*]], label %[[HANDLER_POINTER_OVERFLOW:[^,]+]],{{.*}} !nosanitize @@ -227,7 +227,7 @@ } char *nullptr_allones_BAD() { - // CHECK: define i8* @nullptr_allones_BAD() + // CHECK: define frozen i8* @nullptr_allones_BAD() // CHECK-NEXT: [[ENTRY:.*]]: // CHECK-SANITIZE-C-NEXT: br i1 false, label %[[CONT:.*]], label %[[HANDLER_POINTER_OVERFLOW:[^,]+]],{{.*}} !nosanitize // CHECK-SANITIZE-CPP-NEXT: br i1 icmp eq (i64 mul (i64 ptrtoint (i8* getelementptr (i8, i8* null, i32 1) to i64), i64 -1), i64 0), label %[[CONT:.*]], label %[[HANDLER_POINTER_OVERFLOW:[^,]+]],{{.*}} !nosanitize @@ -247,7 +247,7 @@ //------------------------------------------------------------------------------ char *one_var(unsigned long offset) { - // CHECK: define i8* @one_var(i64 %[[OFFSET:.*]]) + // CHECK: define frozen i8* @one_var(i64 frozen %[[OFFSET:.*]]) // CHECK-NEXT: [[ENTRY:.*]]: // CHECK-NEXT: %[[OFFSET_ADDR:.*]] = alloca i64, align 8 // CHECK-NEXT: store i64 %[[OFFSET]], i64* %[[OFFSET_ADDR]], align 8 @@ -278,7 +278,7 @@ } char *one_zero() { - // CHECK: define i8* @one_zero() + // CHECK: define frozen i8* @one_zero() // CHECK-NEXT: [[ENTRY:.*]]: // CHECK-SANITIZE-C-NEXT: br i1 icmp ne (i8* inttoptr (i64 1 to i8*), i8* null), label %[[CONT:.*]], label %[[HANDLER_POINTER_OVERFLOW:[^,]+]],{{.*}} !nosanitize // CHECK-SANITIZE-C: [[HANDLER_POINTER_OVERFLOW]]: @@ -295,7 +295,7 @@ } char *one_one_OK() { - // CHECK: define i8* @one_one_OK() + // CHECK: define frozen i8* @one_one_OK() // CHECK-NEXT: [[ENTRY:.*]]: // CHECK-SANITIZE-C-NEXT: br i1 and (i1 icmp ne (i8* inttoptr (i64 1 to i8*), i8* null), i1 icmp ne (i64 add (i64 sub (i64 ptrtoint (i8* getelementptr inbounds (i8, i8* inttoptr (i64 1 to i8*), i64 1) to i64), i64 1), i64 1), i64 0)), label %[[CONT:.*]], label %[[HANDLER_POINTER_OVERFLOW:[^,]+]],{{.*}} !nosanitize // CHECK-SANITIZE-CPP-NEXT: br i1 xor (i1 icmp eq (i8* inttoptr (i64 1 to i8*), i8* null), i1 icmp ne (i64 add (i64 sub (i64 ptrtoint (i8* getelementptr inbounds (i8, i8* inttoptr (i64 1 to i8*), i64 1) to i64), i64 1), i64 1), i64 0)), label %[[CONT:.*]], label %[[HANDLER_POINTER_OVERFLOW:[^,]+]],{{.*}} !nosanitize @@ -313,7 +313,7 @@ } char *one_allones_BAD() { - // CHECK: define i8* @one_allones_BAD() + // CHECK: define frozen i8* @one_allones_BAD() // CHECK-NEXT: [[ENTRY:.*]]: // CHECK-SANITIZE-C-NEXT: br i1 and (i1 icmp ne (i8* inttoptr (i64 1 to i8*), i8* null), i1 icmp ne (i64 add (i64 sub (i64 ptrtoint (i8* getelementptr inbounds (i8, i8* inttoptr (i64 1 to i8*), i64 -1) to i64), i64 1), i64 1), i64 0)), label %[[CONT:.*]], label %[[HANDLER_POINTER_OVERFLOW:[^,]+]],{{.*}} !nosanitize // CHECK-SANITIZE-CPP-NEXT: br i1 xor (i1 icmp eq (i8* inttoptr (i64 1 to i8*), i8* null), i1 icmp ne (i64 add (i64 sub (i64 ptrtoint (i8* getelementptr inbounds (i8, i8* inttoptr (i64 1 to i8*), i64 -1) to i64), i64 1), i64 1), i64 0)), label %[[CONT:.*]], label %[[HANDLER_POINTER_OVERFLOW:[^,]+]],{{.*}} !nosanitize @@ -333,7 +333,7 @@ //------------------------------------------------------------------------------ char *allones_var(unsigned long offset) { - // CHECK: define i8* @allones_var(i64 %[[OFFSET:.*]]) + // CHECK: define frozen i8* @allones_var(i64 frozen %[[OFFSET:.*]]) // CHECK-NEXT: [[ENTRY:.*]]: // CHECK-NEXT: %[[OFFSET_ADDR:.*]] = alloca i64, align 8 // CHECK-NEXT: store i64 %[[OFFSET]], i64* %[[OFFSET_ADDR]], align 8 @@ -364,7 +364,7 @@ } char *allones_zero_OK() { - // CHECK: define i8* @allones_zero_OK() + // CHECK: define frozen i8* @allones_zero_OK() // CHECK-NEXT: [[ENTRY:.*]]: // CHECK-SANITIZE-C-NEXT: br i1 icmp ne (i8* inttoptr (i64 -1 to i8*), i8* null), label %[[CONT:.*]], label %[[HANDLER_POINTER_OVERFLOW:[^,]+]],{{.*}} !nosanitize // CHECK-SANITIZE-C: [[HANDLER_POINTER_OVERFLOW]]: @@ -381,7 +381,7 @@ } char *allones_one_BAD() { - // CHECK: define i8* @allones_one_BAD() + // CHECK: define frozen i8* @allones_one_BAD() // CHECK-NEXT: [[ENTRY:.*]]: // CHECK-SANITIZE-C-NEXT: br i1 and (i1 icmp ne (i8* inttoptr (i64 -1 to i8*), i8* null), i1 icmp ne (i64 add (i64 sub (i64 ptrtoint (i8* getelementptr inbounds (i8, i8* inttoptr (i64 -1 to i8*), i64 1) to i64), i64 -1), i64 -1), i64 0)), label %[[CONT:.*]], label %[[HANDLER_POINTER_OVERFLOW:[^,]+]],{{.*}} !nosanitize // CHECK-SANITIZE-CPP-NEXT: br i1 xor (i1 icmp eq (i8* inttoptr (i64 -1 to i8*), i8* null), i1 icmp ne (i64 add (i64 sub (i64 ptrtoint (i8* getelementptr inbounds (i8, i8* inttoptr (i64 -1 to i8*), i64 1) to i64), i64 -1), i64 -1), i64 0)), label %[[CONT:.*]], label %[[HANDLER_POINTER_OVERFLOW:[^,]+]],{{.*}} !nosanitize @@ -399,7 +399,7 @@ } char *allones_allones_OK() { - // CHECK: define i8* @allones_allones_OK() + // CHECK: define frozen i8* @allones_allones_OK() // CHECK-NEXT: [[ENTRY:.*]]: // CHECK-SANITIZE-C-NEXT: br i1 and (i1 icmp ne (i8* inttoptr (i64 -1 to i8*), i8* null), i1 icmp ne (i64 add (i64 sub (i64 ptrtoint (i8* getelementptr inbounds (i8, i8* inttoptr (i64 -1 to i8*), i64 -1) to i64), i64 -1), i64 -1), i64 0)), label %[[CONT:.*]], label %[[HANDLER_POINTER_OVERFLOW:[^,]+]],{{.*}} !nosanitize // CHECK-SANITIZE-CPP-NEXT: br i1 xor (i1 icmp eq (i8* inttoptr (i64 -1 to i8*), i8* null), i1 icmp ne (i64 add (i64 sub (i64 ptrtoint (i8* getelementptr inbounds (i8, i8* inttoptr (i64 -1 to i8*), i64 -1) to i64), i64 -1), i64 -1), i64 0)), label %[[CONT:.*]], label %[[HANDLER_POINTER_OVERFLOW:[^,]+]],{{.*}} !nosanitize diff --git a/clang/test/CodeGen/catch-pointer-overflow-volatile.c b/clang/test/CodeGen/catch-pointer-overflow-volatile.c --- a/clang/test/CodeGen/catch-pointer-overflow-volatile.c +++ b/clang/test/CodeGen/catch-pointer-overflow-volatile.c @@ -15,7 +15,7 @@ #endif char *volatile_ptr(char *volatile base, unsigned long offset) { - // CHECK: define i8* @volatile_ptr(i8* %[[BASE:.*]], i64 %[[OFFSET:.*]]) + // CHECK: define frozen i8* @volatile_ptr(i8* frozen %[[BASE:.*]], i64 frozen %[[OFFSET:.*]]) // CHECK-NEXT: [[ENTRY:.*]]: // CHECK-NEXT: %[[BASE_ADDR:.*]] = alloca i8*, align 8 // CHECK-NEXT: %[[OFFSET_ADDR:.*]] = alloca i64, align 8 diff --git a/clang/test/CodeGen/catch-pointer-overflow.c b/clang/test/CodeGen/catch-pointer-overflow.c --- a/clang/test/CodeGen/catch-pointer-overflow.c +++ b/clang/test/CodeGen/catch-pointer-overflow.c @@ -22,7 +22,7 @@ #endif char *add_unsigned(char *base, unsigned long offset) { - // CHECK: define i8* @add_unsigned(i8* %[[BASE:.*]], i64 %[[OFFSET:.*]]) + // CHECK: define frozen i8* @add_unsigned(i8* frozen %[[BASE:.*]], i64 frozen %[[OFFSET:.*]]) // CHECK-NEXT: [[ENTRY:.*]]: // CHECK-NEXT: %[[BASE_ADDR:.*]] = alloca i8*, align 8 // CHECK-NEXT: %[[OFFSET_ADDR:.*]] = alloca i64, align 8 @@ -57,7 +57,7 @@ } char *sub_unsigned(char *base, unsigned long offset) { - // CHECK: define i8* @sub_unsigned(i8* %[[BASE:.*]], i64 %[[OFFSET:.*]]) + // CHECK: define frozen i8* @sub_unsigned(i8* frozen %[[BASE:.*]], i64 frozen %[[OFFSET:.*]]) // CHECK-NEXT: [[ENTRY:.*]]: // CHECK-NEXT: %[[BASE_ADDR:.*]] = alloca i8*, align 8 // CHECK-NEXT: %[[OFFSET_ADDR:.*]] = alloca i64, align 8 @@ -93,7 +93,7 @@ } char *add_signed(char *base, signed long offset) { - // CHECK: define i8* @add_signed(i8* %[[BASE:.*]], i64 %[[OFFSET:.*]]) + // CHECK: define frozen i8* @add_signed(i8* frozen %[[BASE:.*]], i64 frozen %[[OFFSET:.*]]) // CHECK-NEXT: [[ENTRY:.*]]: // CHECK-NEXT: %[[BASE_ADDR:.*]] = alloca i8*, align 8 // CHECK-NEXT: %[[OFFSET_ADDR:.*]] = alloca i64, align 8 @@ -131,7 +131,7 @@ } char *sub_signed(char *base, signed long offset) { - // CHECK: define i8* @sub_signed(i8* %[[BASE:.*]], i64 %[[OFFSET:.*]]) + // CHECK: define frozen i8* @sub_signed(i8* frozen %[[BASE:.*]], i64 frozen %[[OFFSET:.*]]) // CHECK-NEXT: [[ENTRY:.*]]: // CHECK-NEXT: %[[BASE_ADDR:.*]] = alloca i8*, align 8 // CHECK-NEXT: %[[OFFSET_ADDR:.*]] = alloca i64, align 8 @@ -170,7 +170,7 @@ } char *postinc(char *base) { - // CHECK: define i8* @postinc(i8* %[[BASE:.*]]) + // CHECK: define frozen i8* @postinc(i8* frozen %[[BASE:.*]]) // CHECK-NEXT: [[ENTRY:.*]]: // CHECK-NEXT: %[[BASE_ADDR:.*]] = alloca i8*, align 8 // CHECK-NEXT: store i8* %[[BASE]], i8** %[[BASE_ADDR]], align 8 @@ -200,7 +200,7 @@ } char *postdec(char *base) { - // CHECK: define i8* @postdec(i8* %[[BASE:.*]]) + // CHECK: define frozen i8* @postdec(i8* frozen %[[BASE:.*]]) // CHECK-NEXT: [[ENTRY:.*]]: // CHECK-NEXT: %[[BASE_ADDR:.*]] = alloca i8*, align 8 // CHECK-NEXT: store i8* %[[BASE]], i8** %[[BASE_ADDR]], align 8 @@ -230,7 +230,7 @@ } char *preinc(char *base) { - // CHECK: define i8* @preinc(i8* %[[BASE:.*]]) + // CHECK: define frozen i8* @preinc(i8* frozen %[[BASE:.*]]) // CHECK-NEXT: [[ENTRY:.*]]: // CHECK-NEXT: %[[BASE_ADDR:.*]] = alloca i8*, align 8 // CHECK-NEXT: store i8* %[[BASE]], i8** %[[BASE_ADDR]], align 8 @@ -260,7 +260,7 @@ } char *predec(char *base) { - // CHECK: define i8* @predec(i8* %[[BASE:.*]]) + // CHECK: define frozen i8* @predec(i8* frozen %[[BASE:.*]]) // CHECK-NEXT: [[ENTRY:.*]]: // CHECK-NEXT: %[[BASE_ADDR:.*]] = alloca i8*, align 8 // CHECK-NEXT: store i8* %[[BASE]], i8** %[[BASE_ADDR]], align 8 diff --git a/clang/test/CodeGen/cfi-check-fail.c b/clang/test/CodeGen/cfi-check-fail.c --- a/clang/test/CodeGen/cfi-check-fail.c +++ b/clang/test/CodeGen/cfi-check-fail.c @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -triple x86_64-unknown-linux -O0 -fsanitize-cfi-cross-dso \ +// RUN: %clang_cc1 -disable-frozen-args -triple x86_64-unknown-linux -O0 -fsanitize-cfi-cross-dso \ // RUN: -fsanitize=cfi-icall,cfi-nvcall,cfi-vcall,cfi-unrelated-cast,cfi-derived-cast \ // RUN: -fsanitize-trap=cfi-icall,cfi-nvcall -fsanitize-recover=cfi-vcall,cfi-unrelated-cast \ // RUN: -emit-llvm -o - %s | FileCheck %s diff --git a/clang/test/CodeGen/cfi-check-fail2.c b/clang/test/CodeGen/cfi-check-fail2.c --- a/clang/test/CodeGen/cfi-check-fail2.c +++ b/clang/test/CodeGen/cfi-check-fail2.c @@ -13,7 +13,7 @@ f(); } -// CHECK: define weak_odr hidden void @__cfi_check_fail(i8* %0, i8* %1) +// CHECK: define weak_odr hidden void @__cfi_check_fail(i8* frozen %0, i8* frozen %1) // CHECK: store i8* %0, i8** %[[ALLOCA0:.*]], align 8 // CHECK: store i8* %1, i8** %[[ALLOCA1:.*]], align 8 // CHECK: %[[DATA:.*]] = load i8*, i8** %[[ALLOCA0]], align 8 diff --git a/clang/test/CodeGen/cfi-icall-generalize.c b/clang/test/CodeGen/cfi-icall-generalize.c --- a/clang/test/CodeGen/cfi-icall-generalize.c +++ b/clang/test/CodeGen/cfi-icall-generalize.c @@ -4,7 +4,7 @@ // Test that const char* is generalized to const void* and that const char** is // generalized to void* -// CHECK: define i32** @f({{.*}} !type [[TYPE:![0-9]+]] !type [[TYPE_GENERALIZED:![0-9]+]] +// CHECK: define frozen i32** @f({{.*}} !type [[TYPE:![0-9]+]] !type [[TYPE_GENERALIZED:![0-9]+]] int** f(const char *a, const char **b) { return (int**)0; } diff --git a/clang/test/CodeGen/cleanup-destslot-simple.c b/clang/test/CodeGen/cleanup-destslot-simple.c --- a/clang/test/CodeGen/cleanup-destslot-simple.c +++ b/clang/test/CodeGen/cleanup-destslot-simple.c @@ -7,7 +7,7 @@ // There is no exception to handle here, lifetime.end is not a destructor, // so there is no need have cleanup dest slot related code -// CHECK-LABEL: define i32 @test +// CHECK-LABEL: define frozen i32 @test int test() { int x = 3; int *volatile p = &x; diff --git a/clang/test/CodeGen/cmse-clear-arg.c b/clang/test/CodeGen/cmse-clear-arg.c --- a/clang/test/CodeGen/cmse-clear-arg.c +++ b/clang/test/CodeGen/cmse-clear-arg.c @@ -1,12 +1,12 @@ -// RUN: %clang_cc1 -triple thumbv8m.main -O0 -mcmse -S -emit-llvm %s -o - | \ +// RUN: %clang_cc1 -disable-frozen-args -triple thumbv8m.main -O0 -mcmse -S -emit-llvm %s -o - | \ // RUN: FileCheck %s --check-prefixes=CHECK,CHECK-LE,CHECK-SOFTFP -// RUN: %clang_cc1 -triple thumbebv8m.main -O0 -mcmse -S -emit-llvm %s -o - | \ +// RUN: %clang_cc1 -disable-frozen-args -triple thumbebv8m.main -O0 -mcmse -S -emit-llvm %s -o - | \ // RUN: FileCheck %s --check-prefixes=CHECK,CHECK-BE,CHECK-SOFTFP -// RUN: %clang_cc1 -triple thumbv8m.main -O2 -mcmse -S -emit-llvm %s -o - | \ +// RUN: %clang_cc1 -disable-frozen-args -triple thumbv8m.main -O2 -mcmse -S -emit-llvm %s -o - | \ // RUN: FileCheck %s --check-prefixes=CHECK,CHECK-LE,CHECK-SOFTFP -// RUN: %clang_cc1 -triple thumbebv8m.main -O2 -mcmse -S -emit-llvm %s -o - | \ +// RUN: %clang_cc1 -disable-frozen-args -triple thumbebv8m.main -O2 -mcmse -S -emit-llvm %s -o - | \ // RUN: FileCheck %s --check-prefixes=CHECK,CHECK-BE,CHECK-SOFTFP -// RUN: %clang_cc1 -triple thumbv8m.main -O0 -mcmse -mfloat-abi hard \ +// RUN: %clang_cc1 -disable-frozen-args -triple thumbv8m.main -O0 -mcmse -mfloat-abi hard \ // RUN: -S -emit-llvm %s -o - | \ // RUN: FileCheck %s --check-prefixes=CHECK,CHECK-LE,CHECK-HARDFP diff --git a/clang/test/CodeGen/cmse-clear-fp16.c b/clang/test/CodeGen/cmse-clear-fp16.c --- a/clang/test/CodeGen/cmse-clear-fp16.c +++ b/clang/test/CodeGen/cmse-clear-fp16.c @@ -1,13 +1,13 @@ -// RUN: %clang_cc1 -triple thumbv8m.main -O0 -mcmse -S -emit-llvm \ +// RUN: %clang_cc1 -disable-frozen-args -triple thumbv8m.main -O0 -mcmse -S -emit-llvm \ // RUN: -fallow-half-arguments-and-returns %s -o - | \ // RUN: FileCheck %s --check-prefixes=CHECK,CHECK-NOPT-SOFT -// RUN: %clang_cc1 -triple thumbv8m.main -O2 -mcmse -S -emit-llvm \ +// RUN: %clang_cc1 -disable-frozen-args -triple thumbv8m.main -O2 -mcmse -S -emit-llvm \ // RUN: -fallow-half-arguments-and-returns %s -o - | \ // RUN: FileCheck %s --check-prefixes=CHECK,CHECK-OPT-SOFT -// RUN: %clang_cc1 -triple thumbv8m.main -O0 -mcmse -S -emit-llvm \ +// RUN: %clang_cc1 -disable-frozen-args -triple thumbv8m.main -O0 -mcmse -S -emit-llvm \ // RUN: -fallow-half-arguments-and-returns -mfloat-abi hard %s -o - | \ // RUN: FileCheck %s --check-prefixes=CHECK,CHECK-NOPT-HARD -// RUN: %clang_cc1 -triple thumbv8m.main -O2 -mcmse -S -emit-llvm \ +// RUN: %clang_cc1 -disable-frozen-args -triple thumbv8m.main -O2 -mcmse -S -emit-llvm \ // RUN: -fallow-half-arguments-and-returns -mfloat-abi hard %s -o - | \ // RUN: FileCheck %s --check-prefixes=CHECK,CHECK-OPT-HARD diff --git a/clang/test/CodeGen/complex-builtins.c b/clang/test/CodeGen/complex-builtins.c --- a/clang/test/CodeGen/complex-builtins.c +++ b/clang/test/CodeGen/complex-builtins.c @@ -6,102 +6,102 @@ void foo(float f) { __builtin_cabs(f); __builtin_cabsf(f); __builtin_cabsl(f); -// NO__ERRNO: declare double @cabs(double, double) [[READNONE:#[0-9]+]] -// NO__ERRNO: declare float @cabsf(<2 x float>) [[READNONE]] -// NO__ERRNO: declare x86_fp80 @cabsl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE:#[0-9]+]] -// HAS_ERRNO: declare double @cabs(double, double) [[NOT_READNONE:#[0-9]+]] -// HAS_ERRNO: declare float @cabsf(<2 x float>) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @cabsl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @cabs(double frozen, double frozen) [[READNONE:#[0-9]+]] +// NO__ERRNO: declare frozen float @cabsf(<2 x float> frozen) [[READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @cabsl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE:#[0-9]+]] +// HAS_ERRNO: declare frozen double @cabs(double frozen, double frozen) [[NOT_READNONE:#[0-9]+]] +// HAS_ERRNO: declare frozen float @cabsf(<2 x float> frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @cabsl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] __builtin_cacos(f); __builtin_cacosf(f); __builtin_cacosl(f); -// NO__ERRNO: declare { double, double } @cacos(double, double) [[READNONE]] -// NO__ERRNO: declare <2 x float> @cacosf(<2 x float>) [[READNONE]] -// NO__ERRNO: declare { x86_fp80, x86_fp80 } @cacosl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] -// HAS_ERRNO: declare { double, double } @cacos(double, double) [[NOT_READNONE]] -// HAS_ERRNO: declare <2 x float> @cacosf(<2 x float>) [[NOT_READNONE]] -// HAS_ERRNO: declare { x86_fp80, x86_fp80 } @cacosl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// NO__ERRNO: declare frozen { double, double } @cacos(double frozen, double frozen) [[READNONE]] +// NO__ERRNO: declare frozen <2 x float> @cacosf(<2 x float> frozen) [[READNONE]] +// NO__ERRNO: declare frozen { x86_fp80, x86_fp80 } @cacosl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { double, double } @cacos(double frozen, double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen <2 x float> @cacosf(<2 x float> frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { x86_fp80, x86_fp80 } @cacosl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] __builtin_cacosh(f); __builtin_cacoshf(f); __builtin_cacoshl(f); -// NO__ERRNO: declare { double, double } @cacosh(double, double) [[READNONE]] -// NO__ERRNO: declare <2 x float> @cacoshf(<2 x float>) [[READNONE]] -// NO__ERRNO: declare { x86_fp80, x86_fp80 } @cacoshl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] -// HAS_ERRNO: declare { double, double } @cacosh(double, double) [[NOT_READNONE]] -// HAS_ERRNO: declare <2 x float> @cacoshf(<2 x float>) [[NOT_READNONE]] -// HAS_ERRNO: declare { x86_fp80, x86_fp80 } @cacoshl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// NO__ERRNO: declare frozen { double, double } @cacosh(double frozen, double frozen) [[READNONE]] +// NO__ERRNO: declare frozen <2 x float> @cacoshf(<2 x float> frozen) [[READNONE]] +// NO__ERRNO: declare frozen { x86_fp80, x86_fp80 } @cacoshl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { double, double } @cacosh(double frozen, double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen <2 x float> @cacoshf(<2 x float> frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { x86_fp80, x86_fp80 } @cacoshl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] __builtin_carg(f); __builtin_cargf(f); __builtin_cargl(f); -// NO__ERRNO: declare double @carg(double, double) [[READNONE]] -// NO__ERRNO: declare float @cargf(<2 x float>) [[READNONE]] -// NO__ERRNO: declare x86_fp80 @cargl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] -// HAS_ERRNO: declare double @carg(double, double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @cargf(<2 x float>) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @cargl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @carg(double frozen, double frozen) [[READNONE]] +// NO__ERRNO: declare frozen float @cargf(<2 x float> frozen) [[READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @cargl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen double @carg(double frozen, double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @cargf(<2 x float> frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @cargl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] __builtin_casin(f); __builtin_casinf(f); __builtin_casinl(f); -// NO__ERRNO: declare { double, double } @casin(double, double) [[READNONE]] -// NO__ERRNO: declare <2 x float> @casinf(<2 x float>) [[READNONE]] -// NO__ERRNO: declare { x86_fp80, x86_fp80 } @casinl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] -// HAS_ERRNO: declare { double, double } @casin(double, double) [[NOT_READNONE]] -// HAS_ERRNO: declare <2 x float> @casinf(<2 x float>) [[NOT_READNONE]] -// HAS_ERRNO: declare { x86_fp80, x86_fp80 } @casinl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// NO__ERRNO: declare frozen { double, double } @casin(double frozen, double frozen) [[READNONE]] +// NO__ERRNO: declare frozen <2 x float> @casinf(<2 x float> frozen) [[READNONE]] +// NO__ERRNO: declare frozen { x86_fp80, x86_fp80 } @casinl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { double, double } @casin(double frozen, double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen <2 x float> @casinf(<2 x float> frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { x86_fp80, x86_fp80 } @casinl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] __builtin_casinh(f); __builtin_casinhf(f); __builtin_casinhl(f); -// NO__ERRNO: declare { double, double } @casinh(double, double) [[READNONE]] -// NO__ERRNO: declare <2 x float> @casinhf(<2 x float>) [[READNONE]] -// NO__ERRNO: declare { x86_fp80, x86_fp80 } @casinhl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] -// HAS_ERRNO: declare { double, double } @casinh(double, double) [[NOT_READNONE]] -// HAS_ERRNO: declare <2 x float> @casinhf(<2 x float>) [[NOT_READNONE]] -// HAS_ERRNO: declare { x86_fp80, x86_fp80 } @casinhl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// NO__ERRNO: declare frozen { double, double } @casinh(double frozen, double frozen) [[READNONE]] +// NO__ERRNO: declare frozen <2 x float> @casinhf(<2 x float> frozen) [[READNONE]] +// NO__ERRNO: declare frozen { x86_fp80, x86_fp80 } @casinhl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { double, double } @casinh(double frozen, double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen <2 x float> @casinhf(<2 x float> frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { x86_fp80, x86_fp80 } @casinhl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] __builtin_catan(f); __builtin_catanf(f); __builtin_catanl(f); -// NO__ERRNO: declare { double, double } @catan(double, double) [[READNONE]] -// NO__ERRNO: declare <2 x float> @catanf(<2 x float>) [[READNONE]] -// NO__ERRNO: declare { x86_fp80, x86_fp80 } @catanl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] -// HAS_ERRNO: declare { double, double } @catan(double, double) [[NOT_READNONE]] -// HAS_ERRNO: declare <2 x float> @catanf(<2 x float>) [[NOT_READNONE]] -// HAS_ERRNO: declare { x86_fp80, x86_fp80 } @catanl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// NO__ERRNO: declare frozen { double, double } @catan(double frozen, double frozen) [[READNONE]] +// NO__ERRNO: declare frozen <2 x float> @catanf(<2 x float> frozen) [[READNONE]] +// NO__ERRNO: declare frozen { x86_fp80, x86_fp80 } @catanl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { double, double } @catan(double frozen, double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen <2 x float> @catanf(<2 x float> frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { x86_fp80, x86_fp80 } @catanl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] __builtin_catanh(f); __builtin_catanhf(f); __builtin_catanhl(f); -// NO__ERRNO: declare { double, double } @catanh(double, double) [[READNONE]] -// NO__ERRNO: declare <2 x float> @catanhf(<2 x float>) [[READNONE]] -// NO__ERRNO: declare { x86_fp80, x86_fp80 } @catanhl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] -// HAS_ERRNO: declare { double, double } @catanh(double, double) [[NOT_READNONE]] -// HAS_ERRNO: declare <2 x float> @catanhf(<2 x float>) [[NOT_READNONE]] -// HAS_ERRNO: declare { x86_fp80, x86_fp80 } @catanhl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// NO__ERRNO: declare frozen { double, double } @catanh(double frozen, double frozen) [[READNONE]] +// NO__ERRNO: declare frozen <2 x float> @catanhf(<2 x float> frozen) [[READNONE]] +// NO__ERRNO: declare frozen { x86_fp80, x86_fp80 } @catanhl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { double, double } @catanh(double frozen, double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen <2 x float> @catanhf(<2 x float> frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { x86_fp80, x86_fp80 } @catanhl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] __builtin_ccos(f); __builtin_ccosf(f); __builtin_ccosl(f); -// NO__ERRNO: declare { double, double } @ccos(double, double) [[READNONE]] -// NO__ERRNO: declare <2 x float> @ccosf(<2 x float>) [[READNONE]] -// NO__ERRNO: declare { x86_fp80, x86_fp80 } @ccosl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] -// HAS_ERRNO: declare { double, double } @ccos(double, double) [[NOT_READNONE]] -// HAS_ERRNO: declare <2 x float> @ccosf(<2 x float>) [[NOT_READNONE]] -// HAS_ERRNO: declare { x86_fp80, x86_fp80 } @ccosl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// NO__ERRNO: declare frozen { double, double } @ccos(double frozen, double frozen) [[READNONE]] +// NO__ERRNO: declare frozen <2 x float> @ccosf(<2 x float> frozen) [[READNONE]] +// NO__ERRNO: declare frozen { x86_fp80, x86_fp80 } @ccosl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { double, double } @ccos(double frozen, double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen <2 x float> @ccosf(<2 x float> frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { x86_fp80, x86_fp80 } @ccosl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] __builtin_ccosh(f); __builtin_ccoshf(f); __builtin_ccoshl(f); -// NO__ERRNO: declare { double, double } @ccosh(double, double) [[READNONE]] -// NO__ERRNO: declare <2 x float> @ccoshf(<2 x float>) [[READNONE]] -// NO__ERRNO: declare { x86_fp80, x86_fp80 } @ccoshl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] -// HAS_ERRNO: declare { double, double } @ccosh(double, double) [[NOT_READNONE]] -// HAS_ERRNO: declare <2 x float> @ccoshf(<2 x float>) [[NOT_READNONE]] -// HAS_ERRNO: declare { x86_fp80, x86_fp80 } @ccoshl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// NO__ERRNO: declare frozen { double, double } @ccosh(double frozen, double frozen) [[READNONE]] +// NO__ERRNO: declare frozen <2 x float> @ccoshf(<2 x float> frozen) [[READNONE]] +// NO__ERRNO: declare frozen { x86_fp80, x86_fp80 } @ccoshl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { double, double } @ccosh(double frozen, double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen <2 x float> @ccoshf(<2 x float> frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { x86_fp80, x86_fp80 } @ccoshl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] __builtin_cexp(f); __builtin_cexpf(f); __builtin_cexpl(f); -// NO__ERRNO: declare { double, double } @cexp(double, double) [[READNONE]] -// NO__ERRNO: declare <2 x float> @cexpf(<2 x float>) [[READNONE]] -// NO__ERRNO: declare { x86_fp80, x86_fp80 } @cexpl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] -// HAS_ERRNO: declare { double, double } @cexp(double, double) [[NOT_READNONE]] -// HAS_ERRNO: declare <2 x float> @cexpf(<2 x float>) [[NOT_READNONE]] -// HAS_ERRNO: declare { x86_fp80, x86_fp80 } @cexpl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// NO__ERRNO: declare frozen { double, double } @cexp(double frozen, double frozen) [[READNONE]] +// NO__ERRNO: declare frozen <2 x float> @cexpf(<2 x float> frozen) [[READNONE]] +// NO__ERRNO: declare frozen { x86_fp80, x86_fp80 } @cexpl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { double, double } @cexp(double frozen, double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen <2 x float> @cexpf(<2 x float> frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { x86_fp80, x86_fp80 } @cexpl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] __builtin_cimag(f); __builtin_cimagf(f); __builtin_cimagl(f); @@ -119,30 +119,30 @@ __builtin_clog(f); __builtin_clogf(f); __builtin_clogl(f); -// NO__ERRNO: declare { double, double } @clog(double, double) [[READNONE]] -// NO__ERRNO: declare <2 x float> @clogf(<2 x float>) [[READNONE]] -// NO__ERRNO: declare { x86_fp80, x86_fp80 } @clogl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] -// HAS_ERRNO: declare { double, double } @clog(double, double) [[NOT_READNONE]] -// HAS_ERRNO: declare <2 x float> @clogf(<2 x float>) [[NOT_READNONE]] -// HAS_ERRNO: declare { x86_fp80, x86_fp80 } @clogl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// NO__ERRNO: declare frozen { double, double } @clog(double frozen, double frozen) [[READNONE]] +// NO__ERRNO: declare frozen <2 x float> @clogf(<2 x float> frozen) [[READNONE]] +// NO__ERRNO: declare frozen { x86_fp80, x86_fp80 } @clogl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { double, double } @clog(double frozen, double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen <2 x float> @clogf(<2 x float> frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { x86_fp80, x86_fp80 } @clogl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] __builtin_cproj(f); __builtin_cprojf(f); __builtin_cprojl(f); -// NO__ERRNO: declare { double, double } @cproj(double, double) [[READNONE]] -// NO__ERRNO: declare <2 x float> @cprojf(<2 x float>) [[READNONE]] -// NO__ERRNO: declare { x86_fp80, x86_fp80 } @cprojl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] -// HAS_ERRNO: declare { double, double } @cproj(double, double) [[READNONE:#[0-9]+]] -// HAS_ERRNO: declare <2 x float> @cprojf(<2 x float>) [[READNONE]] -// HAS_ERRNO: declare { x86_fp80, x86_fp80 } @cprojl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// NO__ERRNO: declare frozen { double, double } @cproj(double frozen, double frozen) [[READNONE]] +// NO__ERRNO: declare frozen <2 x float> @cprojf(<2 x float> frozen) [[READNONE]] +// NO__ERRNO: declare frozen { x86_fp80, x86_fp80 } @cprojl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { double, double } @cproj(double frozen, double frozen) [[READNONE:#[0-9]+]] +// HAS_ERRNO: declare frozen <2 x float> @cprojf(<2 x float> frozen) [[READNONE]] +// HAS_ERRNO: declare frozen { x86_fp80, x86_fp80 } @cprojl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] __builtin_cpow(f,f); __builtin_cpowf(f,f); __builtin_cpowl(f,f); -// NO__ERRNO: declare { double, double } @cpow(double, double, double, double) [[READNONE]] -// NO__ERRNO: declare <2 x float> @cpowf(<2 x float>, <2 x float>) [[READNONE]] -// NO__ERRNO: declare { x86_fp80, x86_fp80 } @cpowl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16, { x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] -// HAS_ERRNO: declare { double, double } @cpow(double, double, double, double) [[NOT_READNONE]] -// HAS_ERRNO: declare <2 x float> @cpowf(<2 x float>, <2 x float>) [[NOT_READNONE]] -// HAS_ERRNO: declare { x86_fp80, x86_fp80 } @cpowl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16, { x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// NO__ERRNO: declare frozen { double, double } @cpow(double frozen, double frozen, double frozen, double frozen) [[READNONE]] +// NO__ERRNO: declare frozen <2 x float> @cpowf(<2 x float> frozen, <2 x float> frozen) [[READNONE]] +// NO__ERRNO: declare frozen { x86_fp80, x86_fp80 } @cpowl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16, { x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { double, double } @cpow(double frozen, double frozen, double frozen, double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen <2 x float> @cpowf(<2 x float> frozen, <2 x float> frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { x86_fp80, x86_fp80 } @cpowl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16, { x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] __builtin_creal(f); __builtin_crealf(f); __builtin_creall(f); @@ -153,48 +153,48 @@ __builtin_csin(f); __builtin_csinf(f); __builtin_csinl(f); -// NO__ERRNO: declare { double, double } @csin(double, double) [[READNONE]] -// NO__ERRNO: declare <2 x float> @csinf(<2 x float>) [[READNONE]] -// NO__ERRNO: declare { x86_fp80, x86_fp80 } @csinl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] -// HAS_ERRNO: declare { double, double } @csin(double, double) [[NOT_READNONE]] -// HAS_ERRNO: declare <2 x float> @csinf(<2 x float>) [[NOT_READNONE]] -// HAS_ERRNO: declare { x86_fp80, x86_fp80 } @csinl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// NO__ERRNO: declare frozen { double, double } @csin(double frozen, double frozen) [[READNONE]] +// NO__ERRNO: declare frozen <2 x float> @csinf(<2 x float> frozen) [[READNONE]] +// NO__ERRNO: declare frozen { x86_fp80, x86_fp80 } @csinl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { double, double } @csin(double frozen, double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen <2 x float> @csinf(<2 x float> frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { x86_fp80, x86_fp80 } @csinl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] __builtin_csinh(f); __builtin_csinhf(f); __builtin_csinhl(f); -// NO__ERRNO: declare { double, double } @csinh(double, double) [[READNONE]] -// NO__ERRNO: declare <2 x float> @csinhf(<2 x float>) [[READNONE]] -// NO__ERRNO: declare { x86_fp80, x86_fp80 } @csinhl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] -// HAS_ERRNO: declare { double, double } @csinh(double, double) [[NOT_READNONE]] -// HAS_ERRNO: declare <2 x float> @csinhf(<2 x float>) [[NOT_READNONE]] -// HAS_ERRNO: declare { x86_fp80, x86_fp80 } @csinhl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// NO__ERRNO: declare frozen { double, double } @csinh(double frozen, double frozen) [[READNONE]] +// NO__ERRNO: declare frozen <2 x float> @csinhf(<2 x float> frozen) [[READNONE]] +// NO__ERRNO: declare frozen { x86_fp80, x86_fp80 } @csinhl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { double, double } @csinh(double frozen, double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen <2 x float> @csinhf(<2 x float> frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { x86_fp80, x86_fp80 } @csinhl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] __builtin_csqrt(f); __builtin_csqrtf(f); __builtin_csqrtl(f); -// NO__ERRNO: declare { double, double } @csqrt(double, double) [[READNONE]] -// NO__ERRNO: declare <2 x float> @csqrtf(<2 x float>) [[READNONE]] -// NO__ERRNO: declare { x86_fp80, x86_fp80 } @csqrtl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] -// HAS_ERRNO: declare { double, double } @csqrt(double, double) [[NOT_READNONE]] -// HAS_ERRNO: declare <2 x float> @csqrtf(<2 x float>) [[NOT_READNONE]] -// HAS_ERRNO: declare { x86_fp80, x86_fp80 } @csqrtl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// NO__ERRNO: declare frozen { double, double } @csqrt(double frozen, double frozen) [[READNONE]] +// NO__ERRNO: declare frozen <2 x float> @csqrtf(<2 x float> frozen) [[READNONE]] +// NO__ERRNO: declare frozen { x86_fp80, x86_fp80 } @csqrtl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { double, double } @csqrt(double frozen, double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen <2 x float> @csqrtf(<2 x float> frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { x86_fp80, x86_fp80 } @csqrtl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] __builtin_ctan(f); __builtin_ctanf(f); __builtin_ctanl(f); -// NO__ERRNO: declare { double, double } @ctan(double, double) [[READNONE]] -// NO__ERRNO: declare <2 x float> @ctanf(<2 x float>) [[READNONE]] -// NO__ERRNO: declare { x86_fp80, x86_fp80 } @ctanl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] -// HAS_ERRNO: declare { double, double } @ctan(double, double) [[NOT_READNONE]] -// HAS_ERRNO: declare <2 x float> @ctanf(<2 x float>) [[NOT_READNONE]] -// HAS_ERRNO: declare { x86_fp80, x86_fp80 } @ctanl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// NO__ERRNO: declare frozen { double, double } @ctan(double frozen, double frozen) [[READNONE]] +// NO__ERRNO: declare frozen <2 x float> @ctanf(<2 x float> frozen) [[READNONE]] +// NO__ERRNO: declare frozen { x86_fp80, x86_fp80 } @ctanl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { double, double } @ctan(double frozen, double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen <2 x float> @ctanf(<2 x float> frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { x86_fp80, x86_fp80 } @ctanl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] __builtin_ctanh(f); __builtin_ctanhf(f); __builtin_ctanhl(f); -// NO__ERRNO: declare { double, double } @ctanh(double, double) [[READNONE]] -// NO__ERRNO: declare <2 x float> @ctanhf(<2 x float>) [[READNONE]] -// NO__ERRNO: declare { x86_fp80, x86_fp80 } @ctanhl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] -// HAS_ERRNO: declare { double, double } @ctanh(double, double) [[NOT_READNONE]] -// HAS_ERRNO: declare <2 x float> @ctanhf(<2 x float>) [[NOT_READNONE]] -// HAS_ERRNO: declare { x86_fp80, x86_fp80 } @ctanhl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// NO__ERRNO: declare frozen { double, double } @ctanh(double frozen, double frozen) [[READNONE]] +// NO__ERRNO: declare frozen <2 x float> @ctanhf(<2 x float> frozen) [[READNONE]] +// NO__ERRNO: declare frozen { x86_fp80, x86_fp80 } @ctanhl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { double, double } @ctanh(double frozen, double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen <2 x float> @ctanhf(<2 x float> frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { x86_fp80, x86_fp80 } @ctanhl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] }; diff --git a/clang/test/CodeGen/complex-indirect.c b/clang/test/CodeGen/complex-indirect.c --- a/clang/test/CodeGen/complex-indirect.c +++ b/clang/test/CodeGen/complex-indirect.c @@ -9,4 +9,4 @@ void b(__complex__ char *y) { a(0,0,0,0,0,0,*y); } // CHECK-LABEL: define void @b // CHECK: alloca { i8, i8 }*, align 8 -// CHECK: call void @a(i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i16 {{.*}}) +// CHECK: call void @a(i32 frozen 0, i32 frozen 0, i32 frozen 0, i32 frozen 0, i32 frozen 0, i32 frozen 0, i16 {{.*}}) diff --git a/clang/test/CodeGen/complex-init-list.c b/clang/test/CodeGen/complex-init-list.c --- a/clang/test/CodeGen/complex-init-list.c +++ b/clang/test/CodeGen/complex-init-list.c @@ -8,11 +8,11 @@ // CHECK: @x = global { float, float } { float 1.000000e+00, float 0x7FF0000000000000 }, align 4 _Complex float f(float x, float y) { _Complex float z = { x, y }; return z; } -// CHECK-LABEL: define <2 x float> @f +// CHECK-LABEL: define frozen <2 x float> @f // CHECK: alloca { float, float } // CHECK: alloca { float, float } _Complex float f2(float x, float y) { return (_Complex float){ x, y }; } -// CHECK-LABEL: define <2 x float> @f2 +// CHECK-LABEL: define frozen <2 x float> @f2 // CHECK: alloca { float, float } // CHECK: alloca { float, float } diff --git a/clang/test/CodeGen/complex-libcalls.c b/clang/test/CodeGen/complex-libcalls.c --- a/clang/test/CodeGen/complex-libcalls.c +++ b/clang/test/CodeGen/complex-libcalls.c @@ -6,102 +6,102 @@ void foo(float f) { cabs(f); cabsf(f); cabsl(f); -// NO__ERRNO: declare double @cabs(double, double) [[READNONE:#[0-9]+]] -// NO__ERRNO: declare float @cabsf(<2 x float>) [[READNONE]] -// NO__ERRNO: declare x86_fp80 @cabsl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE:#[0-9]+]] -// HAS_ERRNO: declare double @cabs(double, double) [[NOT_READNONE:#[0-9]+]] -// HAS_ERRNO: declare float @cabsf(<2 x float>) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @cabsl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @cabs(double frozen, double frozen) [[READNONE:#[0-9]+]] +// NO__ERRNO: declare frozen float @cabsf(<2 x float> frozen) [[READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @cabsl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE:#[0-9]+]] +// HAS_ERRNO: declare frozen double @cabs(double frozen, double frozen) [[NOT_READNONE:#[0-9]+]] +// HAS_ERRNO: declare frozen float @cabsf(<2 x float> frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @cabsl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] cacos(f); cacosf(f); cacosl(f); -// NO__ERRNO: declare { double, double } @cacos(double, double) [[READNONE]] -// NO__ERRNO: declare <2 x float> @cacosf(<2 x float>) [[READNONE]] -// NO__ERRNO: declare { x86_fp80, x86_fp80 } @cacosl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] -// HAS_ERRNO: declare { double, double } @cacos(double, double) [[NOT_READNONE]] -// HAS_ERRNO: declare <2 x float> @cacosf(<2 x float>) [[NOT_READNONE]] -// HAS_ERRNO: declare { x86_fp80, x86_fp80 } @cacosl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// NO__ERRNO: declare frozen { double, double } @cacos(double frozen, double frozen) [[READNONE]] +// NO__ERRNO: declare frozen <2 x float> @cacosf(<2 x float> frozen) [[READNONE]] +// NO__ERRNO: declare frozen { x86_fp80, x86_fp80 } @cacosl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { double, double } @cacos(double frozen, double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen <2 x float> @cacosf(<2 x float> frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { x86_fp80, x86_fp80 } @cacosl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] cacosh(f); cacoshf(f); cacoshl(f); -// NO__ERRNO: declare { double, double } @cacosh(double, double) [[READNONE]] -// NO__ERRNO: declare <2 x float> @cacoshf(<2 x float>) [[READNONE]] -// NO__ERRNO: declare { x86_fp80, x86_fp80 } @cacoshl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] -// HAS_ERRNO: declare { double, double } @cacosh(double, double) [[NOT_READNONE]] -// HAS_ERRNO: declare <2 x float> @cacoshf(<2 x float>) [[NOT_READNONE]] -// HAS_ERRNO: declare { x86_fp80, x86_fp80 } @cacoshl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// NO__ERRNO: declare frozen { double, double } @cacosh(double frozen, double frozen) [[READNONE]] +// NO__ERRNO: declare frozen <2 x float> @cacoshf(<2 x float> frozen) [[READNONE]] +// NO__ERRNO: declare frozen { x86_fp80, x86_fp80 } @cacoshl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { double, double } @cacosh(double frozen, double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen <2 x float> @cacoshf(<2 x float> frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { x86_fp80, x86_fp80 } @cacoshl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] carg(f); cargf(f); cargl(f); -// NO__ERRNO: declare double @carg(double, double) [[READNONE]] -// NO__ERRNO: declare float @cargf(<2 x float>) [[READNONE]] -// NO__ERRNO: declare x86_fp80 @cargl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] -// HAS_ERRNO: declare double @carg(double, double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @cargf(<2 x float>) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @cargl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @carg(double frozen, double frozen) [[READNONE]] +// NO__ERRNO: declare frozen float @cargf(<2 x float> frozen) [[READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @cargl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen double @carg(double frozen, double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @cargf(<2 x float> frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @cargl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] casin(f); casinf(f); casinl(f); -// NO__ERRNO: declare { double, double } @casin(double, double) [[READNONE]] -// NO__ERRNO: declare <2 x float> @casinf(<2 x float>) [[READNONE]] -// NO__ERRNO: declare { x86_fp80, x86_fp80 } @casinl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] -// HAS_ERRNO: declare { double, double } @casin(double, double) [[NOT_READNONE]] -// HAS_ERRNO: declare <2 x float> @casinf(<2 x float>) [[NOT_READNONE]] -// HAS_ERRNO: declare { x86_fp80, x86_fp80 } @casinl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// NO__ERRNO: declare frozen { double, double } @casin(double frozen, double frozen) [[READNONE]] +// NO__ERRNO: declare frozen <2 x float> @casinf(<2 x float> frozen) [[READNONE]] +// NO__ERRNO: declare frozen { x86_fp80, x86_fp80 } @casinl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { double, double } @casin(double frozen, double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen <2 x float> @casinf(<2 x float> frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { x86_fp80, x86_fp80 } @casinl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] casinh(f); casinhf(f); casinhl(f); -// NO__ERRNO: declare { double, double } @casinh(double, double) [[READNONE]] -// NO__ERRNO: declare <2 x float> @casinhf(<2 x float>) [[READNONE]] -// NO__ERRNO: declare { x86_fp80, x86_fp80 } @casinhl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] -// HAS_ERRNO: declare { double, double } @casinh(double, double) [[NOT_READNONE]] -// HAS_ERRNO: declare <2 x float> @casinhf(<2 x float>) [[NOT_READNONE]] -// HAS_ERRNO: declare { x86_fp80, x86_fp80 } @casinhl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// NO__ERRNO: declare frozen { double, double } @casinh(double frozen, double frozen) [[READNONE]] +// NO__ERRNO: declare frozen <2 x float> @casinhf(<2 x float> frozen) [[READNONE]] +// NO__ERRNO: declare frozen { x86_fp80, x86_fp80 } @casinhl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { double, double } @casinh(double frozen, double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen <2 x float> @casinhf(<2 x float> frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { x86_fp80, x86_fp80 } @casinhl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] catan(f); catanf(f); catanl(f); -// NO__ERRNO: declare { double, double } @catan(double, double) [[READNONE]] -// NO__ERRNO: declare <2 x float> @catanf(<2 x float>) [[READNONE]] -// NO__ERRNO: declare { x86_fp80, x86_fp80 } @catanl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] -// HAS_ERRNO: declare { double, double } @catan(double, double) [[NOT_READNONE]] -// HAS_ERRNO: declare <2 x float> @catanf(<2 x float>) [[NOT_READNONE]] -// HAS_ERRNO: declare { x86_fp80, x86_fp80 } @catanl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// NO__ERRNO: declare frozen { double, double } @catan(double frozen, double frozen) [[READNONE]] +// NO__ERRNO: declare frozen <2 x float> @catanf(<2 x float> frozen) [[READNONE]] +// NO__ERRNO: declare frozen { x86_fp80, x86_fp80 } @catanl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { double, double } @catan(double frozen, double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen <2 x float> @catanf(<2 x float> frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { x86_fp80, x86_fp80 } @catanl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] catanh(f); catanhf(f); catanhl(f); -// NO__ERRNO: declare { double, double } @catanh(double, double) [[READNONE]] -// NO__ERRNO: declare <2 x float> @catanhf(<2 x float>) [[READNONE]] -// NO__ERRNO: declare { x86_fp80, x86_fp80 } @catanhl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] -// HAS_ERRNO: declare { double, double } @catanh(double, double) [[NOT_READNONE]] -// HAS_ERRNO: declare <2 x float> @catanhf(<2 x float>) [[NOT_READNONE]] -// HAS_ERRNO: declare { x86_fp80, x86_fp80 } @catanhl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// NO__ERRNO: declare frozen { double, double } @catanh(double frozen, double frozen) [[READNONE]] +// NO__ERRNO: declare frozen <2 x float> @catanhf(<2 x float> frozen) [[READNONE]] +// NO__ERRNO: declare frozen { x86_fp80, x86_fp80 } @catanhl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { double, double } @catanh(double frozen, double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen <2 x float> @catanhf(<2 x float> frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { x86_fp80, x86_fp80 } @catanhl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] ccos(f); ccosf(f); ccosl(f); -// NO__ERRNO: declare { double, double } @ccos(double, double) [[READNONE]] -// NO__ERRNO: declare <2 x float> @ccosf(<2 x float>) [[READNONE]] -// NO__ERRNO: declare { x86_fp80, x86_fp80 } @ccosl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] -// HAS_ERRNO: declare { double, double } @ccos(double, double) [[NOT_READNONE]] -// HAS_ERRNO: declare <2 x float> @ccosf(<2 x float>) [[NOT_READNONE]] -// HAS_ERRNO: declare { x86_fp80, x86_fp80 } @ccosl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// NO__ERRNO: declare frozen { double, double } @ccos(double frozen, double frozen) [[READNONE]] +// NO__ERRNO: declare frozen <2 x float> @ccosf(<2 x float> frozen) [[READNONE]] +// NO__ERRNO: declare frozen { x86_fp80, x86_fp80 } @ccosl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { double, double } @ccos(double frozen, double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen <2 x float> @ccosf(<2 x float> frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { x86_fp80, x86_fp80 } @ccosl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] ccosh(f); ccoshf(f); ccoshl(f); -// NO__ERRNO: declare { double, double } @ccosh(double, double) [[READNONE]] -// NO__ERRNO: declare <2 x float> @ccoshf(<2 x float>) [[READNONE]] -// NO__ERRNO: declare { x86_fp80, x86_fp80 } @ccoshl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] -// HAS_ERRNO: declare { double, double } @ccosh(double, double) [[NOT_READNONE]] -// HAS_ERRNO: declare <2 x float> @ccoshf(<2 x float>) [[NOT_READNONE]] -// HAS_ERRNO: declare { x86_fp80, x86_fp80 } @ccoshl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// NO__ERRNO: declare frozen { double, double } @ccosh(double frozen, double frozen) [[READNONE]] +// NO__ERRNO: declare frozen <2 x float> @ccoshf(<2 x float> frozen) [[READNONE]] +// NO__ERRNO: declare frozen { x86_fp80, x86_fp80 } @ccoshl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { double, double } @ccosh(double frozen, double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen <2 x float> @ccoshf(<2 x float> frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { x86_fp80, x86_fp80 } @ccoshl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] cexp(f); cexpf(f); cexpl(f); -// NO__ERRNO: declare { double, double } @cexp(double, double) [[READNONE]] -// NO__ERRNO: declare <2 x float> @cexpf(<2 x float>) [[READNONE]] -// NO__ERRNO: declare { x86_fp80, x86_fp80 } @cexpl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] -// HAS_ERRNO: declare { double, double } @cexp(double, double) [[NOT_READNONE]] -// HAS_ERRNO: declare <2 x float> @cexpf(<2 x float>) [[NOT_READNONE]] -// HAS_ERRNO: declare { x86_fp80, x86_fp80 } @cexpl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// NO__ERRNO: declare frozen { double, double } @cexp(double frozen, double frozen) [[READNONE]] +// NO__ERRNO: declare frozen <2 x float> @cexpf(<2 x float> frozen) [[READNONE]] +// NO__ERRNO: declare frozen { x86_fp80, x86_fp80 } @cexpl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { double, double } @cexp(double frozen, double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen <2 x float> @cexpf(<2 x float> frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { x86_fp80, x86_fp80 } @cexpl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] cimag(f); cimagf(f); cimagl(f); @@ -119,30 +119,30 @@ clog(f); clogf(f); clogl(f); -// NO__ERRNO: declare { double, double } @clog(double, double) [[READNONE]] -// NO__ERRNO: declare <2 x float> @clogf(<2 x float>) [[READNONE]] -// NO__ERRNO: declare { x86_fp80, x86_fp80 } @clogl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] -// HAS_ERRNO: declare { double, double } @clog(double, double) [[NOT_READNONE]] -// HAS_ERRNO: declare <2 x float> @clogf(<2 x float>) [[NOT_READNONE]] -// HAS_ERRNO: declare { x86_fp80, x86_fp80 } @clogl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// NO__ERRNO: declare frozen { double, double } @clog(double frozen, double frozen) [[READNONE]] +// NO__ERRNO: declare frozen <2 x float> @clogf(<2 x float> frozen) [[READNONE]] +// NO__ERRNO: declare frozen { x86_fp80, x86_fp80 } @clogl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { double, double } @clog(double frozen, double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen <2 x float> @clogf(<2 x float> frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { x86_fp80, x86_fp80 } @clogl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] cproj(f); cprojf(f); cprojl(f); -// NO__ERRNO: declare { double, double } @cproj(double, double) [[READNONE]] -// NO__ERRNO: declare <2 x float> @cprojf(<2 x float>) [[READNONE]] -// NO__ERRNO: declare { x86_fp80, x86_fp80 } @cprojl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] -// HAS_ERRNO: declare { double, double } @cproj(double, double) [[READNONE:#[0-9]+]] -// HAS_ERRNO: declare <2 x float> @cprojf(<2 x float>) [[READNONE]] -// HAS_ERRNO: declare { x86_fp80, x86_fp80 } @cprojl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// NO__ERRNO: declare frozen { double, double } @cproj(double frozen, double frozen) [[READNONE]] +// NO__ERRNO: declare frozen <2 x float> @cprojf(<2 x float> frozen) [[READNONE]] +// NO__ERRNO: declare frozen { x86_fp80, x86_fp80 } @cprojl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { double, double } @cproj(double frozen, double frozen) [[READNONE:#[0-9]+]] +// HAS_ERRNO: declare frozen <2 x float> @cprojf(<2 x float> frozen) [[READNONE]] +// HAS_ERRNO: declare frozen { x86_fp80, x86_fp80 } @cprojl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] cpow(f,f); cpowf(f,f); cpowl(f,f); -// NO__ERRNO: declare { double, double } @cpow(double, double, double, double) [[READNONE]] -// NO__ERRNO: declare <2 x float> @cpowf(<2 x float>, <2 x float>) [[READNONE]] -// NO__ERRNO: declare { x86_fp80, x86_fp80 } @cpowl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16, { x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] -// HAS_ERRNO: declare { double, double } @cpow(double, double, double, double) [[NOT_READNONE]] -// HAS_ERRNO: declare <2 x float> @cpowf(<2 x float>, <2 x float>) [[NOT_READNONE]] -// HAS_ERRNO: declare { x86_fp80, x86_fp80 } @cpowl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16, { x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// NO__ERRNO: declare frozen { double, double } @cpow(double frozen, double frozen, double frozen, double frozen) [[READNONE]] +// NO__ERRNO: declare frozen <2 x float> @cpowf(<2 x float> frozen, <2 x float> frozen) [[READNONE]] +// NO__ERRNO: declare frozen { x86_fp80, x86_fp80 } @cpowl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16, { x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { double, double } @cpow(double frozen, double frozen, double frozen, double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen <2 x float> @cpowf(<2 x float> frozen, <2 x float> frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { x86_fp80, x86_fp80 } @cpowl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16, { x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] creal(f); crealf(f); creall(f); @@ -153,48 +153,48 @@ csin(f); csinf(f); csinl(f); -// NO__ERRNO: declare { double, double } @csin(double, double) [[READNONE]] -// NO__ERRNO: declare <2 x float> @csinf(<2 x float>) [[READNONE]] -// NO__ERRNO: declare { x86_fp80, x86_fp80 } @csinl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] -// HAS_ERRNO: declare { double, double } @csin(double, double) [[NOT_READNONE]] -// HAS_ERRNO: declare <2 x float> @csinf(<2 x float>) [[NOT_READNONE]] -// HAS_ERRNO: declare { x86_fp80, x86_fp80 } @csinl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// NO__ERRNO: declare frozen { double, double } @csin(double frozen, double frozen) [[READNONE]] +// NO__ERRNO: declare frozen <2 x float> @csinf(<2 x float> frozen) [[READNONE]] +// NO__ERRNO: declare frozen { x86_fp80, x86_fp80 } @csinl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { double, double } @csin(double frozen, double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen <2 x float> @csinf(<2 x float> frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { x86_fp80, x86_fp80 } @csinl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] csinh(f); csinhf(f); csinhl(f); -// NO__ERRNO: declare { double, double } @csinh(double, double) [[READNONE]] -// NO__ERRNO: declare <2 x float> @csinhf(<2 x float>) [[READNONE]] -// NO__ERRNO: declare { x86_fp80, x86_fp80 } @csinhl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] -// HAS_ERRNO: declare { double, double } @csinh(double, double) [[NOT_READNONE]] -// HAS_ERRNO: declare <2 x float> @csinhf(<2 x float>) [[NOT_READNONE]] -// HAS_ERRNO: declare { x86_fp80, x86_fp80 } @csinhl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// NO__ERRNO: declare frozen { double, double } @csinh(double frozen, double frozen) [[READNONE]] +// NO__ERRNO: declare frozen <2 x float> @csinhf(<2 x float> frozen) [[READNONE]] +// NO__ERRNO: declare frozen { x86_fp80, x86_fp80 } @csinhl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { double, double } @csinh(double frozen, double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen <2 x float> @csinhf(<2 x float> frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { x86_fp80, x86_fp80 } @csinhl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] csqrt(f); csqrtf(f); csqrtl(f); -// NO__ERRNO: declare { double, double } @csqrt(double, double) [[READNONE]] -// NO__ERRNO: declare <2 x float> @csqrtf(<2 x float>) [[READNONE]] -// NO__ERRNO: declare { x86_fp80, x86_fp80 } @csqrtl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] -// HAS_ERRNO: declare { double, double } @csqrt(double, double) [[NOT_READNONE]] -// HAS_ERRNO: declare <2 x float> @csqrtf(<2 x float>) [[NOT_READNONE]] -// HAS_ERRNO: declare { x86_fp80, x86_fp80 } @csqrtl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// NO__ERRNO: declare frozen { double, double } @csqrt(double frozen, double frozen) [[READNONE]] +// NO__ERRNO: declare frozen <2 x float> @csqrtf(<2 x float> frozen) [[READNONE]] +// NO__ERRNO: declare frozen { x86_fp80, x86_fp80 } @csqrtl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { double, double } @csqrt(double frozen, double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen <2 x float> @csqrtf(<2 x float> frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { x86_fp80, x86_fp80 } @csqrtl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] ctan(f); ctanf(f); ctanl(f); -// NO__ERRNO: declare { double, double } @ctan(double, double) [[READNONE]] -// NO__ERRNO: declare <2 x float> @ctanf(<2 x float>) [[READNONE]] -// NO__ERRNO: declare { x86_fp80, x86_fp80 } @ctanl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] -// HAS_ERRNO: declare { double, double } @ctan(double, double) [[NOT_READNONE]] -// HAS_ERRNO: declare <2 x float> @ctanf(<2 x float>) [[NOT_READNONE]] -// HAS_ERRNO: declare { x86_fp80, x86_fp80 } @ctanl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// NO__ERRNO: declare frozen { double, double } @ctan(double frozen, double frozen) [[READNONE]] +// NO__ERRNO: declare frozen <2 x float> @ctanf(<2 x float> frozen) [[READNONE]] +// NO__ERRNO: declare frozen { x86_fp80, x86_fp80 } @ctanl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { double, double } @ctan(double frozen, double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen <2 x float> @ctanf(<2 x float> frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { x86_fp80, x86_fp80 } @ctanl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] ctanh(f); ctanhf(f); ctanhl(f); -// NO__ERRNO: declare { double, double } @ctanh(double, double) [[READNONE]] -// NO__ERRNO: declare <2 x float> @ctanhf(<2 x float>) [[READNONE]] -// NO__ERRNO: declare { x86_fp80, x86_fp80 } @ctanhl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] -// HAS_ERRNO: declare { double, double } @ctanh(double, double) [[NOT_READNONE]] -// HAS_ERRNO: declare <2 x float> @ctanhf(<2 x float>) [[NOT_READNONE]] -// HAS_ERRNO: declare { x86_fp80, x86_fp80 } @ctanhl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// NO__ERRNO: declare frozen { double, double } @ctanh(double frozen, double frozen) [[READNONE]] +// NO__ERRNO: declare frozen <2 x float> @ctanhf(<2 x float> frozen) [[READNONE]] +// NO__ERRNO: declare frozen { x86_fp80, x86_fp80 } @ctanhl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { double, double } @ctanh(double frozen, double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen <2 x float> @ctanhf(<2 x float> frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen { x86_fp80, x86_fp80 } @ctanhl({ x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]] }; diff --git a/clang/test/CodeGen/complex-math.c b/clang/test/CodeGen/complex-math.c --- a/clang/test/CodeGen/complex-math.c +++ b/clang/test/CodeGen/complex-math.c @@ -132,7 +132,7 @@ // X86: ret // a / b = (A+iB) / (C+iD) = ((AC+BD)/(CC+DD)) + i((BC-AD)/(CC+DD)) - // AARCH64-FASTMATH-LABEL: @div_float_rc(float %a, [2 x float] %b.coerce) + // AARCH64-FASTMATH-LABEL: @div_float_rc(float frozen %a, [2 x float] frozen %b.coerce) // A = a // B = 0 // @@ -159,7 +159,7 @@ // X86: ret // a / b = (A+iB) / (C+iD) = ((AC+BD)/(CC+DD)) + i((BC-AD)/(CC+DD)) - // AARCH64-FASTMATH-LABEL: @div_float_cc([2 x float] %a.coerce, [2 x float] %b.coerce) + // AARCH64-FASTMATH-LABEL: @div_float_cc([2 x float] frozen %a.coerce, [2 x float] frozen %b.coerce) // // AARCH64-FASTMATH: [[AC:%.*]] = fmul fast float // AARCH64-FASTMATH: [[BD:%.*]] = fmul fast float @@ -303,7 +303,7 @@ // X86: ret // a / b = (A+iB) / (C+iD) = ((AC+BD)/(CC+DD)) + i((BC-AD)/(CC+DD)) - // AARCH64-FASTMATH-LABEL: @div_double_rc(double %a, [2 x double] %b.coerce) + // AARCH64-FASTMATH-LABEL: @div_double_rc(double frozen %a, [2 x double] frozen %b.coerce) // A = a // B = 0 // @@ -330,7 +330,7 @@ // X86: ret // a / b = (A+iB) / (C+iD) = ((AC+BD)/(CC+DD)) + i((BC-AD)/(CC+DD)) - // AARCH64-FASTMATH-LABEL: @div_double_cc([2 x double] %a.coerce, [2 x double] %b.coerce) + // AARCH64-FASTMATH-LABEL: @div_double_cc([2 x double] frozen %a.coerce, [2 x double] frozen %b.coerce) // // AARCH64-FASTMATH: [[AC:%.*]] = fmul fast double // AARCH64-FASTMATH: [[BD:%.*]] = fmul fast double @@ -492,7 +492,7 @@ // PPC: ret // a / b = (A+iB) / (C+iD) = ((AC+BD)/(CC+DD)) + i((BC-AD)/(CC+DD)) - // AARCH64-FASTMATH-LABEL: @div_long_double_rc(fp128 %a, [2 x fp128] %b.coerce) + // AARCH64-FASTMATH-LABEL: @div_long_double_rc(fp128 frozen %a, [2 x fp128] frozen %b.coerce) // A = a // B = 0 // @@ -523,7 +523,7 @@ // PPC: ret // a / b = (A+iB) / (C+iD) = ((AC+BD)/(CC+DD)) + i((BC-AD)/(CC+DD)) - // AARCH64-FASTMATH-LABEL: @div_long_double_cc([2 x fp128] %a.coerce, [2 x fp128] %b.coerce) + // AARCH64-FASTMATH-LABEL: @div_long_double_cc([2 x fp128] frozen %a.coerce, [2 x fp128] frozen %b.coerce) // // AARCH64-FASTMATH: [[AC:%.*]] = fmul fast fp128 // AARCH64-FASTMATH: [[BD:%.*]] = fmul fast fp128 @@ -604,9 +604,9 @@ // ARM: call void @__muldc3 // ARMHF-LABEL: @foo( - // ARMHF: call { double, double } @__muldc3 + // ARMHF: call frozen { double, double } @__muldc3 // ARM7K-LABEL: @foo( - // ARM7K: call { double, double } @__muldc3 + // ARM7K: call frozen { double, double } @__muldc3 return a*b; } diff --git a/clang/test/CodeGen/compound-literal.c b/clang/test/CodeGen/compound-literal.c --- a/clang/test/CodeGen/compound-literal.c +++ b/clang/test/CodeGen/compound-literal.c @@ -79,7 +79,7 @@ // We had a bug where we'd emit a new GlobalVariable for each time we used a // const pointer to a variable initialized by a compound literal. -// CHECK-LABEL: define i32 @compareMyCLH() #0 +// CHECK-LABEL: define frozen i32 @compareMyCLH() #0 int compareMyCLH() { // CHECK: store i8* bitcast ([[MY_CLH]] to i8*) const void *a = MyCLH; @@ -90,7 +90,7 @@ // Check generated code for GNU constant array init from compound literal, // for a local variable. -// CHECK-LABEL: define i32 @compound_array_fn() +// CHECK-LABEL: define frozen i32 @compound_array_fn() // CHECK: [[COMPOUND_ARRAY:%.*]] = alloca [8 x i32] // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64({{.*}}, i64 32, i1 false) int compound_array_fn() { diff --git a/clang/test/CodeGen/constructor-attribute.c b/clang/test/CodeGen/constructor-attribute.c --- a/clang/test/CodeGen/constructor-attribute.c +++ b/clang/test/CodeGen/constructor-attribute.c @@ -12,11 +12,11 @@ // CHECK: define internal void @E() // CHECK: define internal void @F() // CHECK: define internal void @G() -// CHECK: define i32 @__GLOBAL_init_789(i32 %{{.*}}) +// CHECK: define frozen i32 @__GLOBAL_init_789(i32 frozen %{{.*}}) // CHECK: define internal void @C() // CHECK: define internal void @D() -// CHECK: define i32 @main() -// CHECK: define internal i32 @foo() +// CHECK: define frozen i32 @main() +// CHECK: define internal frozen i32 @foo() // WITHOUTATEXIT-NOT: define // WITHATEXIT: define internal void @__GLOBAL_init_123(){{.*}}section "__TEXT,__StaticInit,regular,pure_instructions" diff --git a/clang/test/CodeGen/cxx-default-arg.cpp b/clang/test/CodeGen/cxx-default-arg.cpp --- a/clang/test/CodeGen/cxx-default-arg.cpp +++ b/clang/test/CodeGen/cxx-default-arg.cpp @@ -1,6 +1,6 @@ // RUN: %clang_cc1 -triple %itanium_abi_triple -emit-llvm %s -o %t -// Note-LABEL: define CLANG_GENERATE_KNOWN_GOOD and compile to generate code +// Note-LABEL: define frozen CLANG_GENERATE_KNOWN_GOOD and compile to generate code // that makes all of the defaulted arguments explicit. The resulting // byte code should be identical to the compilation without // CLANG_GENERATE_KNOWN_GOOD. diff --git a/clang/test/CodeGen/debug-info-block-vars.c b/clang/test/CodeGen/debug-info-block-vars.c --- a/clang/test/CodeGen/debug-info-block-vars.c +++ b/clang/test/CodeGen/debug-info-block-vars.c @@ -4,7 +4,7 @@ // RUN: -triple x86_64-apple-darwin -o - %s \ // RUN: | FileCheck --check-prefix=CHECK-OPT %s -// CHECK: define internal void @__f_block_invoke(i8* %.block_descriptor) +// CHECK: define internal void @__f_block_invoke(i8* frozen %.block_descriptor) // CHECK: %.block_descriptor.addr = alloca i8*, align 8 // CHECK: %block.addr = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor* }>*, align 8 // CHECK: store i8* %.block_descriptor, i8** %.block_descriptor.addr, align 8 diff --git a/clang/test/CodeGen/debug-info-codeview-heapallocsite.c b/clang/test/CodeGen/debug-info-codeview-heapallocsite.c --- a/clang/test/CodeGen/debug-info-codeview-heapallocsite.c +++ b/clang/test/CodeGen/debug-info-codeview-heapallocsite.c @@ -14,10 +14,10 @@ } // CHECK-LABEL: define {{.*}}void @call_alloc -// CHECK: call i8* {{.*}}@alloc_void{{.*}} !heapallocsite [[DBG1:!.*]] -// CHECK: call %struct.Foo* {{.*}}@alloc_foo{{.*}} !heapallocsite [[DBG2:!.*]] -// CHECK: call i8* {{.*}}@alloc_void{{.*}} !heapallocsite [[DBG2]] -// CHECK: call i8* {{.*}}@alloc_void{{.*}} !heapallocsite [[DBG3:!.*]] +// CHECK: call frozen i8* {{.*}}@alloc_void{{.*}} !heapallocsite [[DBG1:!.*]] +// CHECK: call frozen %struct.Foo* {{.*}}@alloc_foo{{.*}} !heapallocsite [[DBG2:!.*]] +// CHECK: call frozen i8* {{.*}}@alloc_void{{.*}} !heapallocsite [[DBG2]] +// CHECK: call frozen i8* {{.*}}@alloc_void{{.*}} !heapallocsite [[DBG3:!.*]] // CHECK: [[DBG1]] = !{} // CHECK: [[DBG2]] = !DICompositeType(tag: DW_TAG_structure_type, diff --git a/clang/test/CodeGen/debug-info-no-inline-line-tables.c b/clang/test/CodeGen/debug-info-no-inline-line-tables.c --- a/clang/test/CodeGen/debug-info-no-inline-line-tables.c +++ b/clang/test/CodeGen/debug-info-no-inline-line-tables.c @@ -16,7 +16,7 @@ // Check that clang emits the location of the call site and not the inlined // function in the debug info. -// CHECK: define dso_local i32 @main() +// CHECK: define dso_local frozen i32 @main() // CHECK: %{{.+}} = load i32, i32* @x, align 4, !dbg [[DbgLoc:![0-9]+]] // Check that the no-inline-line-tables attribute is added. diff --git a/clang/test/CodeGen/decl-in-prototype.c b/clang/test/CodeGen/decl-in-prototype.c --- a/clang/test/CodeGen/decl-in-prototype.c +++ b/clang/test/CodeGen/decl-in-prototype.c @@ -2,13 +2,13 @@ const int AA = 5; -// CHECK-LABEL: define i32 @f1 +// CHECK-LABEL: define frozen i32 @f1 int f1(enum {AA,BB} E) { // CHECK: ret i32 1 return BB; } -// CHECK-LABEL: define i32 @f2 +// CHECK-LABEL: define frozen i32 @f2 int f2(enum {AA=7,BB} E) { // CHECK: ret i32 7 return AA; diff --git a/clang/test/CodeGen/decl.c b/clang/test/CodeGen/decl.c --- a/clang/test/CodeGen/decl.c +++ b/clang/test/CodeGen/decl.c @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -w -fmerge-all-constants -emit-llvm < %s | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args -w -fmerge-all-constants -emit-llvm < %s | FileCheck %s // CHECK: @test1.x = internal constant [12 x i32] [i32 1 // CHECK: @__const.test2.x = private unnamed_addr constant [13 x i32] [i32 1, diff --git a/clang/test/CodeGen/default-address-space.c b/clang/test/CodeGen/default-address-space.c --- a/clang/test/CodeGen/default-address-space.c +++ b/clang/test/CodeGen/default-address-space.c @@ -11,11 +11,11 @@ int *A; int *B; -// CHECK-LABEL: define i32 @test1() +// CHECK-LABEL: define frozen i32 @test1() // CHECK: load i32, i32* addrspacecast{{[^@]+}} @foo int test1() { return foo; } -// CHECK-LABEL: define i32 @test2(i32 %i) +// CHECK-LABEL: define frozen i32 @test2(i32 frozen %i) // CHECK: %[[addr:.*]] = getelementptr // CHECK: load i32, i32* %[[addr]] // CHECK-NEXT: ret i32 @@ -30,7 +30,7 @@ *A = *B; } -// CHECK-LABEL: define void @test4(i32* %a) +// CHECK-LABEL: define void @test4(i32* frozen %a) // CHECK: %[[alloca:.*]] = alloca i32*, align 8, addrspace(5) // CHECK: %[[a_addr:.*]] = addrspacecast{{.*}} %[[alloca]] to i32** // CHECK: store i32* %a, i32** %[[a_addr]] diff --git a/clang/test/CodeGen/disable-tail-calls.c b/clang/test/CodeGen/disable-tail-calls.c --- a/clang/test/CodeGen/disable-tail-calls.c +++ b/clang/test/CodeGen/disable-tail-calls.c @@ -5,12 +5,12 @@ int data; } List; -// CHECK-LABEL: define %struct.List* @find +// CHECK-LABEL: define frozen %struct.List* @find List *find(List *head, int data) { if (!head) return 0; if (head->data == data) return head; - // CHECK: call %struct.List* @find + // CHECK: call frozen %struct.List* @find return find(head->next, data); } diff --git a/clang/test/CodeGen/dso-local-executable.c b/clang/test/CodeGen/dso-local-executable.c --- a/clang/test/CodeGen/dso-local-executable.c +++ b/clang/test/CodeGen/dso-local-executable.c @@ -3,7 +3,7 @@ // COFF-DAG: @weak_bar = extern_weak global i32 // COFF-DAG: declare dso_local void @foo() // COFF-DAG: @baz = dso_local global i32 42 -// COFF-DAG: define dso_local i32* @zed() +// COFF-DAG: define dso_local frozen i32* @zed() // COFF-DAG: @thread_var = external dso_local thread_local global i32 // COFF-DAG: @local_thread_var = dso_local thread_local global i32 42 // COFF-DAG: @import_var = external dllimport global i32 @@ -14,7 +14,7 @@ // MINGW-DAG: @weak_bar = extern_weak global i32 // MINGW-DAG: declare dso_local void @foo() // MINGW-DAG: @baz = dso_local global i32 42 -// MINGW-DAG: define dso_local i32* @zed() +// MINGW-DAG: define dso_local frozen i32* @zed() // MINGW-DAG: @thread_var = external dso_local thread_local global i32 // MINGW-DAG: @local_thread_var = dso_local thread_local global i32 42 // MINGW-DAG: @import_var = external dllimport global i32 @@ -25,7 +25,7 @@ // STATIC-DAG: @weak_bar = extern_weak dso_local global i32 // STATIC-DAG: declare dso_local void @foo() // STATIC-DAG: @baz = dso_local global i32 42 -// STATIC-DAG: define dso_local i32* @zed() +// STATIC-DAG: define dso_local frozen i32* @zed() // STATIC-DAG: @thread_var = external thread_local global i32 // STATIC-DAG: @local_thread_var = dso_local thread_local global i32 42 // STATIC-DAG: @import_var = external dso_local global i32 @@ -36,7 +36,7 @@ // PIE-COPY-DAG: @weak_bar = extern_weak global i32 // PIE-COPY-DAG: declare void @foo() // PIE-COPY-DAG: @baz = dso_local global i32 42 -// PIE-COPY-DAG: define dso_local i32* @zed() +// PIE-COPY-DAG: define dso_local frozen i32* @zed() // PIE-COPY-DAG: @thread_var = external thread_local global i32 // PIE-COPY-DAG: @local_thread_var = dso_local thread_local global i32 42 // PIE-COPY-DAG: @import_var = external dso_local global i32 @@ -47,7 +47,7 @@ // PIE-DAG: @weak_bar = extern_weak global i32 // PIE-DAG: declare void @foo() // PIE-DAG: @baz = dso_local global i32 42 -// PIE-DAG: define dso_local i32* @zed() +// PIE-DAG: define dso_local frozen i32* @zed() // PIE-DAG: @thread_var = external thread_local global i32 // PIE-DAG: @local_thread_var = dso_local thread_local global i32 42 // PIE-DAG: @import_var = external global i32 @@ -58,7 +58,7 @@ // NOPLT-DAG: @weak_bar = extern_weak dso_local global i32 // NOPLT-DAG: declare void @foo() // NOPLT-DAG: @baz = dso_local global i32 42 -// NOPLT-DAG: define dso_local i32* @zed() +// NOPLT-DAG: define dso_local frozen i32* @zed() // NOPLT-DAG: @thread_var = external thread_local global i32 // NOPLT-DAG: @local_thread_var = dso_local thread_local global i32 42 // NOPLT-DAG: @import_var = external dso_local global i32 @@ -69,7 +69,7 @@ // PIE-COPY-NOPLT-DAG: @weak_bar = extern_weak global i32 // PIE-COPY-NOPLT-DAG: declare void @foo() // PIE-COPY-NOPLT-DAG: @baz = dso_local global i32 42 -// PIE-COPY-NOPLT-DAG: define dso_local i32* @zed() +// PIE-COPY-NOPLT-DAG: define dso_local frozen i32* @zed() // PIE-COPY-NOPLT-DAG: @thread_var = external thread_local global i32 // PIE-COPY-NOPLT-DAG: @local_thread_var = dso_local thread_local global i32 42 // PIE-COPY-NOPLT-DAG: @import_var = external dso_local global i32 @@ -81,7 +81,7 @@ // PIE-NO-PLT-DAG: @weak_bar = extern_weak global i32 // PIE-NO-PLT-DAG: declare void @foo() // PIE-NO-PLT-DAG: @baz = dso_local global i32 42 -// PIE-NO-PLT-DAG: define dso_local i32* @zed() +// PIE-NO-PLT-DAG: define dso_local frozen i32* @zed() // PIE-NO-PLT-DAG: @thread_var = external thread_local global i32 // PIE-NO-PLT-DAG: @local_thread_var = dso_local thread_local global i32 42 // PIE-NO-PLT-DAG: @import_var = external global i32 @@ -92,7 +92,7 @@ // SHARED-DAG: @weak_bar = extern_weak global i32 // SHARED-DAG: declare void @foo() // SHARED-DAG: @baz = global i32 42 -// SHARED-DAG: define i32* @zed() +// SHARED-DAG: define frozen i32* @zed() // SHARED-DAG: @thread_var = external thread_local global i32 // SHARED-DAG: @local_thread_var = thread_local global i32 42 // PIE-NO-PLT-DAG: @import_var = external global i32 diff --git a/clang/test/CodeGen/enable_if.c b/clang/test/CodeGen/enable_if.c --- a/clang/test/CodeGen/enable_if.c +++ b/clang/test/CodeGen/enable_if.c @@ -90,6 +90,6 @@ int foo(char *i __attribute__((pass_object_size(0)))) __attribute__((enable_if(1, ""), overloadable)); - // CHECK: call i32 @_Z3fooUa9enable_ifIXLi1EEEPcU17pass_object_size0 + // CHECK: call frozen i32 @_Z3fooUa9enable_ifIXLi1EEEPcU17pass_object_size0 foo((void*)0); } diff --git a/clang/test/CodeGen/exceptions-seh-finally.c b/clang/test/CodeGen/exceptions-seh-finally.c --- a/clang/test/CodeGen/exceptions-seh-finally.c +++ b/clang/test/CodeGen/exceptions-seh-finally.c @@ -21,13 +21,13 @@ // // CHECK: [[invoke_cont]] // CHECK: %[[fp:[^ ]*]] = call i8* @llvm.localaddress() -// CHECK: call void @"?fin$0@0@basic_finally@@"({{i8( zeroext)?}} 0, i8* %[[fp]]) +// CHECK: call void @"?fin$0@0@basic_finally@@"({{i8 frozen( zeroext)?}} 0, i8* frozen %[[fp]]) // CHECK-NEXT: ret void // // CHECK: [[lpad]] // CHECK-NEXT: %[[pad:[^ ]*]] = cleanuppad // CHECK: %[[fp:[^ ]*]] = call i8* @llvm.localaddress() -// CHECK: call void @"?fin$0@0@basic_finally@@"({{i8( zeroext)?}} 1, i8* %[[fp]]) +// CHECK: call void @"?fin$0@0@basic_finally@@"({{i8 frozen( zeroext)?}} 1, i8* frozen %[[fp]]) // CHECK-NEXT: cleanupret from %[[pad]] unwind to caller // CHECK: define internal void @"?fin$0@0@basic_finally@@"({{.*}}) @@ -61,7 +61,7 @@ // // CHECK: [[invoke_cont]] // CHECK: %[[fp:[^ ]*]] = call i8* @llvm.localaddress() -// CHECK: call void @"?fin$0@0@label_in_finally@@"({{i8( zeroext)?}} 0, i8* %[[fp]]) +// CHECK: call void @"?fin$0@0@label_in_finally@@"({{i8 frozen( zeroext)?}} 0, i8* frozen %[[fp]]) // CHECK: ret void // CHECK: define internal void @"?fin$0@0@label_in_finally@@"({{.*}}) @@ -70,7 +70,7 @@ // // CHECK: [[l]] // CHECK: call void @cleanup() -// CHECK: call i32 @check_condition() +// CHECK: call frozen i32 @check_condition() // CHECK: br i1 {{.*}}, label // CHECK: br label %[[l]] @@ -89,16 +89,16 @@ // // CHECK: [[invoke_cont]] // CHECK: %[[fp:[^ ]*]] = call i8* @llvm.localaddress() -// CHECK: call void @"?fin$0@0@use_abnormal_termination@@"({{i8( zeroext)?}} 0, i8* %[[fp]]) +// CHECK: call void @"?fin$0@0@use_abnormal_termination@@"({{i8 frozen( zeroext)?}} 0, i8* frozen %[[fp]]) // CHECK: ret void // // CHECK: [[lpad]] // CHECK-NEXT: %[[pad:[^ ]*]] = cleanuppad // CHECK: %[[fp:[^ ]*]] = call i8* @llvm.localaddress() -// CHECK: call void @"?fin$0@0@use_abnormal_termination@@"({{i8( zeroext)?}} 1, i8* %[[fp]]) +// CHECK: call void @"?fin$0@0@use_abnormal_termination@@"({{i8 frozen( zeroext)?}} 1, i8* frozen %[[fp]]) // CHECK-NEXT: cleanupret from %[[pad]] unwind to caller -// CHECK: define internal void @"?fin$0@0@use_abnormal_termination@@"({{i8( zeroext)?}} %[[abnormal:abnormal_termination]], i8* %frame_pointer) +// CHECK: define internal void @"?fin$0@0@use_abnormal_termination@@"({{i8 frozen( zeroext)?}} %[[abnormal:abnormal_termination]], i8* frozen %frame_pointer) // CHECK-SAME: [[finally_attrs]] // CHECK: %[[abnormal_zext:[^ ]*]] = zext i8 %[[abnormal]] to i32 // CHECK: store i32 %[[abnormal_zext]], i32* @crashed @@ -153,7 +153,7 @@ } __finally { } } -// CHECK-LABEL: define dso_local i32 @finally_with_return() +// CHECK-LABEL: define dso_local frozen i32 @finally_with_return() // CHECK: call void @"?fin$0@0@finally_with_return@@"({{.*}}) // CHECK-NEXT: ret i32 42 @@ -175,7 +175,7 @@ return 0; } -// CHECK-LABEL: define dso_local i32 @nested___finally___finally +// CHECK-LABEL: define dso_local frozen i32 @nested___finally___finally // CHECK: invoke void @"?fin$1@0@nested___finally___finally@@"({{.*}}) // CHECK: to label %[[outercont:[^ ]*]] unwind label %[[lpad:[^ ]*]] // @@ -210,7 +210,7 @@ } return 912; } -// CHECK-LABEL: define dso_local i32 @nested___finally___finally_with_eh_edge +// CHECK-LABEL: define dso_local frozen i32 @nested___finally___finally_with_eh_edge // CHECK: invoke void @might_crash() // CHECK-NEXT: to label %[[invokecont:[^ ]*]] unwind label %[[lpad1:[^ ]*]] // @@ -280,7 +280,7 @@ } // CHECK-LABEL: define internal void @"?fin$0@0@finally_with_func@@"({{[^)]*}}) -// CHECK: call void @cleanup_with_func(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @"??_C@_0BC@COAGBPGM@finally_with_func?$AA@", i{{32|64}} 0, i{{32|64}} 0)) +// CHECK: call void @cleanup_with_func(i8* frozen getelementptr inbounds ([18 x i8], [18 x i8]* @"??_C@_0BC@COAGBPGM@finally_with_func?$AA@", i{{32|64}} 0, i{{32|64}} 0)) // Look for the absence of noinline. nounwind is expected; any further // attributes should be string attributes. diff --git a/clang/test/CodeGen/exceptions-seh-leave.c b/clang/test/CodeGen/exceptions-seh-leave.c --- a/clang/test/CodeGen/exceptions-seh-leave.c +++ b/clang/test/CodeGen/exceptions-seh-leave.c @@ -17,7 +17,7 @@ } return 1; } -// CHECK-LABEL: define dso_local i32 @__leave_with___except_simple() +// CHECK-LABEL: define dso_local frozen i32 @__leave_with___except_simple() // CHECK: store i32 15, i32* %myres // CHECK-NEXT: br label %[[tryleave:[^ ]*]] // CHECK-NOT: store i32 23 @@ -37,7 +37,7 @@ } return 1; } -// CHECK-LABEL: define dso_local i32 @__leave_with___except() +// CHECK-LABEL: define dso_local frozen i32 @__leave_with___except() // CHECK: invoke void @g() // CHECK-NEXT: to label %[[cont:.*]] unwind label %{{.*}} // For __excepts, instead of an explicit __try.__leave label, we could use @@ -69,13 +69,13 @@ } return 1; } -// CHECK-LABEL: define dso_local i32 @__leave_with___finally_simple() +// CHECK-LABEL: define dso_local frozen i32 @__leave_with___finally_simple() // CHECK: store i32 15, i32* %myres // CHECK-NEXT: br label %[[tryleave:[^ ]*]] // CHECK-NOT: store i32 23 // CHECK: [[tryleave]] // CHECK-NEXT: %[[fp:[^ ]*]] = call i8* @llvm.localaddress() -// CHECK-NEXT: call void @"?fin$0@0@__leave_with___finally_simple@@"(i8 0, i8* %[[fp]]) +// CHECK-NEXT: call void @"?fin$0@0@__leave_with___finally_simple@@"(i8 frozen 0, i8* frozen %[[fp]]) // __finally block doesn't return, __finally.cont doesn't exist. int __leave_with___finally_noreturn() { @@ -89,13 +89,13 @@ } return 1; } -// CHECK-LABEL: define dso_local i32 @__leave_with___finally_noreturn() +// CHECK-LABEL: define dso_local frozen i32 @__leave_with___finally_noreturn() // CHECK: store i32 15, i32* %myres // CHECK-NEXT: br label %[[tryleave:[^ ]*]] // CHECK-NOT: store i32 23 // CHECK: [[tryleave]] // CHECK-NEXT: %[[fp:[^ ]*]] = call i8* @llvm.localaddress() -// CHECK-NEXT: call void @"?fin$0@0@__leave_with___finally_noreturn@@"(i8 0, i8* %[[fp]]) +// CHECK-NEXT: call void @"?fin$0@0@__leave_with___finally_noreturn@@"(i8 frozen 0, i8* frozen %[[fp]]) // The "normal" case. int __leave_with___finally() { @@ -109,7 +109,7 @@ } return 1; } -// CHECK-LABEL: define dso_local i32 @__leave_with___finally() +// CHECK-LABEL: define dso_local frozen i32 @__leave_with___finally() // CHECK: invoke void @g() // CHECK-NEXT: to label %[[cont:.*]] unwind label %{{.*}} // For __finally, there needs to be an explicit __try.__leave, because @@ -119,7 +119,7 @@ // CHECK-NOT: store i32 23 // CHECK: [[tryleave]] // CHECK-NEXT: %[[fp:[^ ]*]] = call i8* @llvm.localaddress() -// CHECK-NEXT: call void @"?fin$0@0@__leave_with___finally@@"(i8 0, i8* %[[fp]]) +// CHECK-NEXT: call void @"?fin$0@0@__leave_with___finally@@"(i8 frozen 0, i8* frozen %[[fp]]) ////////////////////////////////////////////////////////////////////////////// @@ -142,14 +142,14 @@ } return 1; } -// CHECK-LABEL: define dso_local i32 @nested___except___finally() +// CHECK-LABEL: define dso_local frozen i32 @nested___except___finally() // CHECK-LABEL: invoke void @g() // CHECK-NEXT: to label %[[g1_cont1:.*]] unwind label %[[g1_lpad:.*]] // CHECK: [[g1_cont1]] // CHECK-NEXT: %[[fp:[^ ]*]] = call i8* @llvm.localaddress() -// CHECK-NEXT: invoke void @"?fin$0@0@nested___except___finally@@"(i8 0, i8* %[[fp]]) +// CHECK-NEXT: invoke void @"?fin$0@0@nested___except___finally@@"(i8 frozen 0, i8* frozen %[[fp]]) // CHECK-NEXT: to label %[[fin_cont:.*]] unwind label %[[g2_lpad:.*]] // CHECK: [[fin_cont]] @@ -159,7 +159,7 @@ // CHECK: [[g1_lpad]] // CHECK-NEXT: cleanuppad // CHECK-NEXT: %[[fp:[^ ]*]] = call i8* @llvm.localaddress() -// CHECK-NEXT: invoke void @"?fin$0@0@nested___except___finally@@"(i8 1, i8* %[[fp]]) +// CHECK-NEXT: invoke void @"?fin$0@0@nested___except___finally@@"(i8 frozen 1, i8* frozen %[[fp]]) // CHECK-NEXT: to label %[[g1_resume:.*]] unwind label %[[g2_lpad]] // CHECK: cleanupret {{.*}} unwind label %[[g2_lpad]] @@ -171,7 +171,7 @@ // CHECK: [[trycont]] // CHECK-NEXT: ret i32 1 -// CHECK-LABEL: define internal void @"?fin$0@0@nested___except___finally@@"(i8 %abnormal_termination, i8* %frame_pointer) +// CHECK-LABEL: define internal void @"?fin$0@0@nested___except___finally@@"(i8 frozen %abnormal_termination, i8* frozen %frame_pointer) // CHECK: call void @g() // CHECK: unreachable @@ -194,7 +194,7 @@ return 1; } // The order of basic blocks in the below doesn't matter. -// CHECK-LABEL: define dso_local i32 @nested___except___except() +// CHECK-LABEL: define dso_local frozen i32 @nested___except___except() // CHECK-LABEL: invoke void @g() // CHECK-NEXT: to label %[[g1_cont:.*]] unwind label %[[g1_lpad:.*]] @@ -247,7 +247,7 @@ return 1; } // The order of basic blocks in the below doesn't matter. -// CHECK-LABEL: define dso_local i32 @nested___finally___except() +// CHECK-LABEL: define dso_local frozen i32 @nested___finally___except() // CHECK-LABEL: invoke void @g() // CHECK-NEXT: to label %[[g1_cont:.*]] unwind label %[[g1_lpad:.*]] @@ -271,16 +271,16 @@ // CHECK: [[tryleave]] // CHECK: %[[fp:[^ ]*]] = call i8* @llvm.localaddress() -// CHECK-NEXT: call void @"?fin$0@0@nested___finally___except@@"(i8 0, i8* %[[fp]]) +// CHECK-NEXT: call void @"?fin$0@0@nested___finally___except@@"(i8 frozen 0, i8* frozen %[[fp]]) // CHECK-NEXT: ret i32 1 // CHECK: [[g2_lpad]] // CHECK: cleanuppad // CHECK: %[[fp:[^ ]*]] = call i8* @llvm.localaddress() -// CHECK-NEXT: call void @"?fin$0@0@nested___finally___except@@"(i8 1, i8* %[[fp]]) +// CHECK-NEXT: call void @"?fin$0@0@nested___finally___except@@"(i8 frozen 1, i8* frozen %[[fp]]) // CHECK: cleanupret {{.*}} unwind to caller -// CHECK-LABEL: define internal void @"?fin$0@0@nested___finally___except@@"(i8 %abnormal_termination, i8* %frame_pointer) +// CHECK-LABEL: define internal void @"?fin$0@0@nested___finally___except@@"(i8 frozen %abnormal_termination, i8* frozen %frame_pointer) // CHECK: ret void int nested___finally___finally() { @@ -302,7 +302,7 @@ return 1; } // The order of basic blocks in the below doesn't matter. -// CHECK-LABEL: define dso_local i32 @nested___finally___finally() +// CHECK-LABEL: define dso_local frozen i32 @nested___finally___finally() // CHECK: invoke void @g() // CHECK-NEXT: to label %[[g1_cont:.*]] unwind label %[[g1_lpad:.*]] @@ -310,19 +310,19 @@ // CHECK: [[g1_cont]] // CHECK: store i32 16, i32* %[[myres:[^ ]*]], // CHECK: %[[fp:[^ ]*]] = call i8* @llvm.localaddress() -// CHECK-NEXT: invoke void @"?fin$1@0@nested___finally___finally@@"(i8 0, i8* %[[fp]]) +// CHECK-NEXT: invoke void @"?fin$1@0@nested___finally___finally@@"(i8 frozen 0, i8* frozen %[[fp]]) // CHECK-NEXT: to label %[[finally_cont:.*]] unwind label %[[g2_lpad:.*]] // CHECK: [[finally_cont]] // CHECK: store i32 51, i32* %[[myres]] // CHECK: %[[fp:[^ ]*]] = call i8* @llvm.localaddress() -// CHECK-NEXT: call void @"?fin$0@0@nested___finally___finally@@"(i8 0, i8* %[[fp]]) +// CHECK-NEXT: call void @"?fin$0@0@nested___finally___finally@@"(i8 frozen 0, i8* frozen %[[fp]]) // CHECK-NEXT: ret i32 1 // CHECK: [[g1_lpad]] // CHECK-NEXT: %[[padtoken:[^ ]*]] = cleanuppad within none [] // CHECK-NEXT: %[[fp:[^ ]*]] = call i8* @llvm.localaddress() -// CHECK-NEXT: invoke void @"?fin$1@0@nested___finally___finally@@"(i8 1, i8* %[[fp]]) +// CHECK-NEXT: invoke void @"?fin$1@0@nested___finally___finally@@"(i8 frozen 1, i8* frozen %[[fp]]) // CHECK-NEXT: to label %[[finally_cont2:.*]] unwind label %[[g2_lpad]] // CHECK: [[finally_cont2]] // CHECK: cleanupret from %[[padtoken]] unwind label %[[g2_lpad]] @@ -330,12 +330,12 @@ // CHECK: [[g2_lpad]] // CHECK-NEXT: %[[padtoken:[^ ]*]] = cleanuppad within none [] // CHECK-NEXT: %[[fp:[^ ]*]] = call i8* @llvm.localaddress() -// CHECK-NEXT: call void @"?fin$0@0@nested___finally___finally@@"(i8 1, i8* %[[fp]]) +// CHECK-NEXT: call void @"?fin$0@0@nested___finally___finally@@"(i8 frozen 1, i8* frozen %[[fp]]) // CHECK: cleanupret from %[[padtoken]] unwind to caller -// CHECK-LABEL: define internal void @"?fin$0@0@nested___finally___finally@@"(i8 %abnormal_termination, i8* %frame_pointer) +// CHECK-LABEL: define internal void @"?fin$0@0@nested___finally___finally@@"(i8 frozen %abnormal_termination, i8* frozen %frame_pointer) // CHECK: ret void -// CHECK-LABEL: define internal void @"?fin$1@0@nested___finally___finally@@"(i8 %abnormal_termination, i8* %frame_pointer) +// CHECK-LABEL: define internal void @"?fin$1@0@nested___finally___finally@@"(i8 frozen %abnormal_termination, i8* frozen %frame_pointer) // CHECK: call void @g() // CHECK: unreachable diff --git a/clang/test/CodeGen/exceptions-seh-nested-finally.c b/clang/test/CodeGen/exceptions-seh-nested-finally.c --- a/clang/test/CodeGen/exceptions-seh-nested-finally.c +++ b/clang/test/CodeGen/exceptions-seh-nested-finally.c @@ -8,8 +8,8 @@ // Check that the first finally block passes the enclosing function's frame // pointer to the second finally block, instead of generating it via localaddr. -// CHECK-LABEL: define internal void @"?fin$0@0@main@@"({{i8( zeroext)?}} %abnormal_termination, i8* %frame_pointer) -// CHECK: call void @"?fin$1@0@main@@"({{i8( zeroext)?}} 0, i8* %frame_pointer) +// CHECK-LABEL: define internal void @"?fin$0@0@main@@"({{i8 frozen( zeroext)?}} %abnormal_termination, i8* frozen %frame_pointer) +// CHECK: call void @"?fin$1@0@main@@"({{i8 frozen( zeroext)?}} 0, i8* frozen %frame_pointer) int main() { int Check = 0; diff --git a/clang/test/CodeGen/exceptions-seh.c b/clang/test/CodeGen/exceptions-seh.c --- a/clang/test/CodeGen/exceptions-seh.c +++ b/clang/test/CodeGen/exceptions-seh.c @@ -12,7 +12,7 @@ void try_body(int numerator, int denominator, int *myres) { *myres = numerator / denominator; } -// CHECK-LABEL: define dso_local void @try_body(i32 %numerator, i32 %denominator, i32* %myres) +// CHECK-LABEL: define dso_local void @try_body(i32 frozen %numerator, i32 frozen %denominator, i32* frozen %myres) // CHECK: sdiv i32 // CHECK: store i32 %{{.*}}, i32* // CHECK: ret void @@ -29,11 +29,11 @@ return success; } -// CHECK-LABEL: define dso_local i32 @safe_div(i32 %numerator, i32 %denominator, i32* %res) +// CHECK-LABEL: define dso_local frozen i32 @safe_div(i32 frozen %numerator, i32 frozen %denominator, i32* frozen %res) // X64-SAME: personality i8* bitcast (i32 (...)* @__C_specific_handler to i8*) // ARM64-SAME: personality i8* bitcast (i32 (...)* @__C_specific_handler to i8*) // X86-SAME: personality i8* bitcast (i32 (...)* @_except_handler3 to i8*) -// CHECK: invoke void @try_body(i32 %{{.*}}, i32 %{{.*}}, i32* %{{.*}}) #[[NOINLINE:[0-9]+]] +// CHECK: invoke void @try_body(i32 frozen %{{.*}}, i32 frozen %{{.*}}, i32* frozen %{{.*}}) #[[NOINLINE:[0-9]+]] // CHECK: to label %{{.*}} unwind label %[[catchpad:[^ ]*]] // // CHECK: [[catchpad]] @@ -50,7 +50,7 @@ // 32-bit SEH needs this filter to save the exception code. // -// X86-LABEL: define internal i32 @"?filt$0@0@safe_div@@"() +// X86-LABEL: define internal frozen i32 @"?filt$0@0@safe_div@@"() // X86: %[[ebp:[^ ]*]] = call i8* @llvm.frameaddress.p0i8(i32 1) // X86: %[[fp:[^ ]*]] = call i8* @llvm.eh.recoverfp(i8* bitcast (i32 (i32, i32, i32*)* @safe_div to i8*), i8* %[[ebp]]) // X86: call i8* @llvm.localrecover(i8* bitcast (i32 (i32, i32, i32*)* @safe_div to i8*), i8* %[[fp]], i32 0) @@ -61,9 +61,9 @@ // X86: ret i32 1 // Mingw uses msvcrt, so it can also use _except_handler3. -// X86-GNU-LABEL: define dso_local i32 @safe_div(i32 %numerator, i32 %denominator, i32* %res) +// X86-GNU-LABEL: define dso_local frozen i32 @safe_div(i32 frozen %numerator, i32 frozen %denominator, i32* frozen %res) // X86-GNU-SAME: personality i8* bitcast (i32 (...)* @_except_handler3 to i8*) -// X64-GNU-LABEL: define dso_local i32 @safe_div(i32 %numerator, i32 %denominator, i32* %res) +// X64-GNU-LABEL: define dso_local frozen i32 @safe_div(i32 frozen %numerator, i32 frozen %denominator, i32* frozen %res) // X64-GNU-SAME: personality i8* bitcast (i32 (...)* @__C_specific_handler to i8*) void j(void); @@ -78,7 +78,7 @@ return r; } -// CHECK-LABEL: define dso_local i32 @filter_expr_capture() +// CHECK-LABEL: define dso_local frozen i32 @filter_expr_capture() // X64-SAME: personality i8* bitcast (i32 (...)* @__C_specific_handler to i8*) // ARM64-SAME: personality i8* bitcast (i32 (...)* @__C_specific_handler to i8*) // X86-SAME: personality i8* bitcast (i32 (...)* @_except_handler3 to i8*) @@ -94,15 +94,15 @@ // CHECK: %[[rv:[^ ]*]] = load i32, i32* %[[r]] // CHECK: ret i32 %[[rv]] -// X64-LABEL: define internal i32 @"?filt$0@0@filter_expr_capture@@"(i8* %exception_pointers, i8* %frame_pointer) +// X64-LABEL: define internal frozen i32 @"?filt$0@0@filter_expr_capture@@"(i8* frozen %exception_pointers, i8* frozen %frame_pointer) // X64: %[[fp:[^ ]*]] = call i8* @llvm.eh.recoverfp(i8* bitcast (i32 ()* @filter_expr_capture to i8*), i8* %frame_pointer) // X64: call i8* @llvm.localrecover(i8* bitcast (i32 ()* @filter_expr_capture to i8*), i8* %[[fp]], i32 0) // -// ARM64-LABEL: define internal i32 @"?filt$0@0@filter_expr_capture@@"(i8* %exception_pointers, i8* %frame_pointer) +// ARM64-LABEL: define internal frozen i32 @"?filt$0@0@filter_expr_capture@@"(i8* frozen %exception_pointers, i8* frozen %frame_pointer) // ARM64: %[[fp:[^ ]*]] = call i8* @llvm.eh.recoverfp(i8* bitcast (i32 ()* @filter_expr_capture to i8*), i8* %frame_pointer) // ARM64: call i8* @llvm.localrecover(i8* bitcast (i32 ()* @filter_expr_capture to i8*), i8* %[[fp]], i32 0) // -// X86-LABEL: define internal i32 @"?filt$0@0@filter_expr_capture@@"() +// X86-LABEL: define internal frozen i32 @"?filt$0@0@filter_expr_capture@@"() // X86: %[[ebp:[^ ]*]] = call i8* @llvm.frameaddress.p0i8(i32 1) // X86: %[[fp:[^ ]*]] = call i8* @llvm.eh.recoverfp(i8* bitcast (i32 ()* @filter_expr_capture to i8*), i8* %[[ebp]]) // X86: call i8* @llvm.localrecover(i8* bitcast (i32 ()* @filter_expr_capture to i8*), i8* %[[fp]], i32 0) @@ -124,7 +124,7 @@ } return r; } -// CHECK-LABEL: define dso_local i32 @nested_try() +// CHECK-LABEL: define dso_local frozen i32 @nested_try() // X64-SAME: personality i8* bitcast (i32 (...)* @__C_specific_handler to i8*) // ARM64-SAME: personality i8* bitcast (i32 (...)* @__C_specific_handler to i8*) // X86-SAME: personality i8* bitcast (i32 (...)* @_except_handler3 to i8*) @@ -165,13 +165,13 @@ // CHECK: store i32 0, i32* %[[r]] // CHECK: br label %[[inner_try_cont]] // -// CHECK-LABEL: define internal i32 @"?filt$0@0@nested_try@@"({{.*}}) +// CHECK-LABEL: define internal frozen i32 @"?filt$0@0@nested_try@@"({{.*}}) // X86: call i8* @llvm.eh.recoverfp({{.*}}) // CHECK: load i32*, i32** // CHECK: load i32, i32* // CHECK: icmp eq i32 %{{.*}}, 456 // -// CHECK-LABEL: define internal i32 @"?filt$1@0@nested_try@@"({{.*}}) +// CHECK-LABEL: define internal frozen i32 @"?filt$1@0@nested_try@@"({{.*}}) // X86: call i8* @llvm.eh.recoverfp({{.*}}) // CHECK: load i32*, i32** // CHECK: load i32, i32* @@ -185,7 +185,7 @@ } return g; } -// CHECK-LABEL: define dso_local i32 @basic_finally(i32 %g) +// CHECK-LABEL: define dso_local frozen i32 @basic_finally(i32 frozen %g) // X64-SAME: personality i8* bitcast (i32 (...)* @__C_specific_handler to i8*) // ARM64-SAME: personality i8* bitcast (i32 (...)* @__C_specific_handler to i8*) // X86-SAME: personality i8* bitcast (i32 (...)* @_except_handler3 to i8*) @@ -198,17 +198,17 @@ // // CHECK: [[cont]] // CHECK: %[[fp:[^ ]*]] = call i8* @llvm.localaddress() -// CHECK: call void @"?fin$0@0@basic_finally@@"({{i8( zeroext)?}} 0, i8* %[[fp]]) +// CHECK: call void @"?fin$0@0@basic_finally@@"({{i8( frozen| zeroext)*}} 0, i8* frozen %[[fp]]) // CHECK: load i32, i32* %[[g_addr]], align 4 // CHECK: ret i32 // // CHECK: [[cleanuppad]] // CHECK: %[[padtoken:[^ ]*]] = cleanuppad within none [] // CHECK: %[[fp:[^ ]*]] = call i8* @llvm.localaddress() -// CHECK: call void @"?fin$0@0@basic_finally@@"({{i8( zeroext)?}} 1, i8* %[[fp]]) +// CHECK: call void @"?fin$0@0@basic_finally@@"({{i8( frozen| zeroext)*}} 1, i8* frozen %[[fp]]) // CHECK: cleanupret from %[[padtoken]] unwind to caller -// CHECK: define internal void @"?fin$0@0@basic_finally@@"({{i8( zeroext)?}} %abnormal_termination, i8* %frame_pointer) +// CHECK: define internal void @"?fin$0@0@basic_finally@@"({{i8( frozen| zeroext)*}} %abnormal_termination, i8* frozen %frame_pointer) // CHECK: call i8* @llvm.localrecover(i8* bitcast (i32 (i32)* @basic_finally to i8*), i8* %frame_pointer, i32 0) // CHECK: load i32, i32* %{{.*}}, align 4 // CHECK: add nsw i32 %{{.*}}, 1 @@ -223,8 +223,8 @@ return 42; } } -// CHECK-LABEL: define dso_local i32 @except_return() -// CHECK: %[[tmp:[^ ]*]] = invoke i32 @returns_int() +// CHECK-LABEL: define dso_local frozen i32 @except_return() +// CHECK: %[[tmp:[^ ]*]] = invoke frozen i32 @returns_int() // CHECK: to label %[[cont:[^ ]*]] unwind label %[[catchpad:[^ ]*]] // // CHECK: [[catchpad]] @@ -257,7 +257,7 @@ // CHECK: call void (...) @llvm.localescape(i32* [[X]]) // CHECK-NEXT: store i32 {{.*}}, i32* [[X]], align 4 // CHECK-NEXT: [[LOCAL:%.*]] = call i8* @llvm.localaddress() -// CHECK-NEXT: call void [[FINALLY:@.*]](i8{{ zeroext | }}0, i8* [[LOCAL]]) +// CHECK-NEXT: call void [[FINALLY:@.*]](i8 frozen{{ zeroext | }}0, i8* frozen [[LOCAL]]) // CHECK: define internal void [[FINALLY]]( // CHECK: [[LOCAL:%.*]] = call i8* @llvm.localrecover( // CHECK: [[X:%.*]] = bitcast i8* [[LOCAL]] to i32* @@ -279,10 +279,10 @@ } } -// CHECK-LABEL: define dso_local i32 @exception_code_in_except() +// CHECK-LABEL: define dso_local frozen i32 @exception_code_in_except() // CHECK: %[[ret_slot:[^ ]*]] = alloca i32 // CHECK: %[[code_slot:[^ ]*]] = alloca i32 -// CHECK: invoke void @try_body(i32 0, i32 0, i32* null) +// CHECK: invoke void @try_body(i32 frozen 0, i32 frozen 0, i32* frozen null) // CHECK: %[[pad:[^ ]*]] = catchpad // CHECK: catchret from %[[pad]] // X64: %[[code:[^ ]*]] = call i32 @llvm.eh.exceptioncode(token %[[pad]]) diff --git a/clang/test/CodeGen/exceptions.c b/clang/test/CodeGen/exceptions.c --- a/clang/test/CodeGen/exceptions.c +++ b/clang/test/CodeGen/exceptions.c @@ -28,4 +28,4 @@ } void test2_helper(int x, int y) { } -// CHECK: invoke void @test2_helper(i32 5, i32 6) +// CHECK: invoke void @test2_helper(i32 frozen 5, i32 frozen 6) diff --git a/clang/test/CodeGen/exprs.c b/clang/test/CodeGen/exprs.c --- a/clang/test/CodeGen/exprs.c +++ b/clang/test/CodeGen/exprs.c @@ -121,7 +121,7 @@ } // rdar://7530813 -// CHECK-LABEL: define i32 @f11 +// CHECK-LABEL: define frozen i32 @f11 int f11(long X) { int A[100]; return A[X]; @@ -135,14 +135,14 @@ int f12() { // PR3150 - // CHECK-LABEL: define i32 @f12 + // CHECK-LABEL: define frozen i32 @f12 // CHECK: ret i32 1 return 1||1; } // Make sure negate of fp uses -0.0 for proper -0 handling. double f13(double X) { - // CHECK-LABEL: define double @f13 + // CHECK-LABEL: define frozen double @f13 // CHECK: fneg double return -X; } @@ -195,13 +195,13 @@ (strct)returns_int(); } // CHECK-LABEL: define void @f18() -// CHECK: call i32 @returns_int() +// CHECK: call frozen i32 @returns_int() // Ensure the right stmt is returned int f19() { return ({ 3;;4;; }); } -// CHECK-LABEL: define i32 @f19() +// CHECK-LABEL: define frozen i32 @f19() // CHECK: [[T:%.*]] = alloca i32 // CHECK: store i32 4, i32* [[T]] // CHECK: [[L:%.*]] = load i32, i32* [[T]] diff --git a/clang/test/CodeGen/ext-int-cc.c b/clang/test/CodeGen/ext-int-cc.c --- a/clang/test/CodeGen/ext-int-cc.c +++ b/clang/test/CodeGen/ext-int-cc.c @@ -1,33 +1,33 @@ -// RUN: %clang_cc1 -triple x86_64-gnu-linux -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=LIN64 -// RUN: %clang_cc1 -triple x86_64-windows-pc -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=WIN64 -// RUN: %clang_cc1 -triple i386-gnu-linux -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=LIN32 -// RUN: %clang_cc1 -triple i386-windows-pc -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=WIN32 -// RUN: %clang_cc1 -triple le32-nacl -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=NACL -// RUN: %clang_cc1 -triple nvptx64 -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=NVPTX64 -// RUN: %clang_cc1 -triple nvptx -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=NVPTX -// RUN: %clang_cc1 -triple sparcv9 -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=SPARCV9 -// RUN: %clang_cc1 -triple sparc -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=SPARC -// RUN: %clang_cc1 -triple mips64 -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=MIPS64 -// RUN: %clang_cc1 -triple mips -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=MIPS -// RUN: %clang_cc1 -triple spir64 -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=SPIR64 -// RUN: %clang_cc1 -triple spir -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=SPIR -// RUN: %clang_cc1 -triple hexagon -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=HEX -// RUN: %clang_cc1 -triple lanai -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=LANAI -// RUN: %clang_cc1 -triple r600 -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=R600 -// RUN: %clang_cc1 -triple arc -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=ARC -// RUN: %clang_cc1 -triple xcore -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=XCORE -// RUN: %clang_cc1 -triple riscv64 -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=RISCV64 -// RUN: %clang_cc1 -triple riscv32 -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=RISCV32 -// RUN: %clang_cc1 -triple wasm64 -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=WASM -// RUN: %clang_cc1 -triple wasm32 -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=WASM -// RUN: %clang_cc1 -triple systemz -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=SYSTEMZ -// RUN: %clang_cc1 -triple ppc64 -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=PPC64 -// RUN: %clang_cc1 -triple ppc -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=PPC32 -// RUN: %clang_cc1 -triple aarch64 -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=AARCH64 -// RUN: %clang_cc1 -triple aarch64 -target-abi darwinpcs -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=AARCH64DARWIN -// RUN: %clang_cc1 -triple arm64_32-apple-ios -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=AARCH64 -// RUN: %clang_cc1 -triple arm64_32-apple-ios -target-abi darwinpcs -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=AARCH64DARWIN -// RUN: %clang_cc1 -triple arm -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=ARM +// RUN: %clang_cc1 -disable-frozen-args -triple x86_64-gnu-linux -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=LIN64 +// RUN: %clang_cc1 -disable-frozen-args -triple x86_64-windows-pc -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=WIN64 +// RUN: %clang_cc1 -disable-frozen-args -triple i386-gnu-linux -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=LIN32 +// RUN: %clang_cc1 -disable-frozen-args -triple i386-windows-pc -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=WIN32 +// RUN: %clang_cc1 -disable-frozen-args -triple le32-nacl -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=NACL +// RUN: %clang_cc1 -disable-frozen-args -triple nvptx64 -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=NVPTX64 +// RUN: %clang_cc1 -disable-frozen-args -triple nvptx -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=NVPTX +// RUN: %clang_cc1 -disable-frozen-args -triple sparcv9 -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=SPARCV9 +// RUN: %clang_cc1 -disable-frozen-args -triple sparc -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=SPARC +// RUN: %clang_cc1 -disable-frozen-args -triple mips64 -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=MIPS64 +// RUN: %clang_cc1 -disable-frozen-args -triple mips -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=MIPS +// RUN: %clang_cc1 -disable-frozen-args -triple spir64 -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=SPIR64 +// RUN: %clang_cc1 -disable-frozen-args -triple spir -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=SPIR +// RUN: %clang_cc1 -disable-frozen-args -triple hexagon -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=HEX +// RUN: %clang_cc1 -disable-frozen-args -triple lanai -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=LANAI +// RUN: %clang_cc1 -disable-frozen-args -triple r600 -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=R600 +// RUN: %clang_cc1 -disable-frozen-args -triple arc -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=ARC +// RUN: %clang_cc1 -disable-frozen-args -triple xcore -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=XCORE +// RUN: %clang_cc1 -disable-frozen-args -triple riscv64 -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=RISCV64 +// RUN: %clang_cc1 -disable-frozen-args -triple riscv32 -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=RISCV32 +// RUN: %clang_cc1 -disable-frozen-args -triple wasm64 -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=WASM +// RUN: %clang_cc1 -disable-frozen-args -triple wasm32 -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=WASM +// RUN: %clang_cc1 -disable-frozen-args -triple systemz -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=SYSTEMZ +// RUN: %clang_cc1 -disable-frozen-args -triple ppc64 -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=PPC64 +// RUN: %clang_cc1 -disable-frozen-args -triple ppc -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=PPC32 +// RUN: %clang_cc1 -disable-frozen-args -triple aarch64 -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=AARCH64 +// RUN: %clang_cc1 -disable-frozen-args -triple aarch64 -target-abi darwinpcs -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=AARCH64DARWIN +// RUN: %clang_cc1 -disable-frozen-args -triple arm64_32-apple-ios -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=AARCH64 +// RUN: %clang_cc1 -disable-frozen-args -triple arm64_32-apple-ios -target-abi darwinpcs -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=AARCH64DARWIN +// RUN: %clang_cc1 -disable-frozen-args -triple arm -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=ARM // Make sure 128 and 64 bit versions are passed like integers, and that >128 // is passed indirectly. @@ -120,121 +120,121 @@ // ARM: define arm_aapcscc void @ParamPassing3(i15 signext %{{.+}}, i31 signext %{{.+}}) _ExtInt(63) ReturnPassing(){} -// LIN64: define i64 @ReturnPassing( -// WIN64: define dso_local i63 @ReturnPassing( -// LIN32: define i63 @ReturnPassing( -// WIN32: define dso_local i63 @ReturnPassing( -// NACL: define i63 @ReturnPassing( -// NVPTX64: define i63 @ReturnPassing( -// NVPTX: define i63 @ReturnPassing( -// SPARCV9: define signext i63 @ReturnPassing( -// SPARC: define i63 @ReturnPassing( -// MIPS64: define i63 @ReturnPassing( -// MIPS: define i63 @ReturnPassing( -// SPIR64: define spir_func i63 @ReturnPassing( -// SPIR: define spir_func i63 @ReturnPassing( -// HEX: define i63 @ReturnPassing( -// LANAI: define i63 @ReturnPassing( -// R600: define i63 @ReturnPassing( -// ARC: define i63 @ReturnPassing( -// XCORE: define i63 @ReturnPassing( -// RISCV64: define signext i63 @ReturnPassing( -// RISCV32: define i63 @ReturnPassing( -// WASM: define i63 @ReturnPassing( -// SYSTEMZ: define signext i63 @ReturnPassing( -// PPC64: define signext i63 @ReturnPassing( -// PPC32: define i63 @ReturnPassing( -// AARCH64: define i63 @ReturnPassing( -// AARCH64DARWIN: define i63 @ReturnPassing( -// ARM: define arm_aapcscc i63 @ReturnPassing( +// LIN64: define frozen i64 @ReturnPassing( +// WIN64: define dso_local frozen i63 @ReturnPassing( +// LIN32: define frozen i63 @ReturnPassing( +// WIN32: define dso_local frozen i63 @ReturnPassing( +// NACL: define frozen i63 @ReturnPassing( +// NVPTX64: define frozen i63 @ReturnPassing( +// NVPTX: define frozen i63 @ReturnPassing( +// SPARCV9: define frozen signext i63 @ReturnPassing( +// SPARC: define frozen i63 @ReturnPassing( +// MIPS64: define frozen i63 @ReturnPassing( +// MIPS: define frozen i63 @ReturnPassing( +// SPIR64: define spir_func frozen i63 @ReturnPassing( +// SPIR: define spir_func frozen i63 @ReturnPassing( +// HEX: define frozen i63 @ReturnPassing( +// LANAI: define frozen i63 @ReturnPassing( +// R600: define frozen i63 @ReturnPassing( +// ARC: define frozen i63 @ReturnPassing( +// XCORE: define frozen i63 @ReturnPassing( +// RISCV64: define frozen signext i63 @ReturnPassing( +// RISCV32: define frozen i63 @ReturnPassing( +// WASM: define frozen i63 @ReturnPassing( +// SYSTEMZ: define frozen signext i63 @ReturnPassing( +// PPC64: define frozen signext i63 @ReturnPassing( +// PPC32: define frozen i63 @ReturnPassing( +// AARCH64: define frozen i63 @ReturnPassing( +// AARCH64DARWIN: define frozen i63 @ReturnPassing( +// ARM: define arm_aapcscc frozen i63 @ReturnPassing( _ExtInt(64) ReturnPassing2(){} -// LIN64: define i64 @ReturnPassing2( -// WIN64: define dso_local i64 @ReturnPassing2( -// LIN32: define i64 @ReturnPassing2( -// WIN32: define dso_local i64 @ReturnPassing2( -// NACL: define i64 @ReturnPassing2( -// NVPTX64: define i64 @ReturnPassing2( -// NVPTX: define i64 @ReturnPassing2( -// SPARCV9: define i64 @ReturnPassing2( -// SPARC: define i64 @ReturnPassing2( -// MIPS64: define i64 @ReturnPassing2( -// MIPS: define i64 @ReturnPassing2( -// SPIR64: define spir_func i64 @ReturnPassing2( -// SPIR: define spir_func i64 @ReturnPassing2( -// HEX: define i64 @ReturnPassing2( -// LANAI: define i64 @ReturnPassing2( -// R600: define i64 @ReturnPassing2( -// ARC: define i64 @ReturnPassing2( -// XCORE: define i64 @ReturnPassing2( -// RISCV64: define i64 @ReturnPassing2( -// RISCV32: define i64 @ReturnPassing2( -// WASM: define i64 @ReturnPassing2( -// SYSTEMZ: define i64 @ReturnPassing2( -// PPC64: define i64 @ReturnPassing2( -// PPC32: define i64 @ReturnPassing2( -// AARCH64: define i64 @ReturnPassing2( -// AARCH64DARWIN: define i64 @ReturnPassing2( -// ARM: define arm_aapcscc i64 @ReturnPassing2( +// LIN64: define frozen i64 @ReturnPassing2( +// WIN64: define dso_local frozen i64 @ReturnPassing2( +// LIN32: define frozen i64 @ReturnPassing2( +// WIN32: define dso_local frozen i64 @ReturnPassing2( +// NACL: define frozen i64 @ReturnPassing2( +// NVPTX64: define frozen i64 @ReturnPassing2( +// NVPTX: define frozen i64 @ReturnPassing2( +// SPARCV9: define frozen i64 @ReturnPassing2( +// SPARC: define frozen i64 @ReturnPassing2( +// MIPS64: define frozen i64 @ReturnPassing2( +// MIPS: define frozen i64 @ReturnPassing2( +// SPIR64: define spir_func frozen i64 @ReturnPassing2( +// SPIR: define spir_func frozen i64 @ReturnPassing2( +// HEX: define frozen i64 @ReturnPassing2( +// LANAI: define frozen i64 @ReturnPassing2( +// R600: define frozen i64 @ReturnPassing2( +// ARC: define frozen i64 @ReturnPassing2( +// XCORE: define frozen i64 @ReturnPassing2( +// RISCV64: define frozen i64 @ReturnPassing2( +// RISCV32: define frozen i64 @ReturnPassing2( +// WASM: define frozen i64 @ReturnPassing2( +// SYSTEMZ: define frozen i64 @ReturnPassing2( +// PPC64: define frozen i64 @ReturnPassing2( +// PPC32: define frozen i64 @ReturnPassing2( +// AARCH64: define frozen i64 @ReturnPassing2( +// AARCH64DARWIN: define frozen i64 @ReturnPassing2( +// ARM: define arm_aapcscc frozen i64 @ReturnPassing2( _ExtInt(127) ReturnPassing3(){} -// LIN64: define { i64, i64 } @ReturnPassing3( +// LIN64: define frozen { i64, i64 } @ReturnPassing3( // WIN64: define dso_local void @ReturnPassing3(i127* noalias sret // LIN32: define void @ReturnPassing3(i127* noalias sret // WIN32: define dso_local void @ReturnPassing3(i127* noalias sret // NACL: define void @ReturnPassing3(i127* noalias sret // NVPTX/64 makes the intentional choice to put all return values direct, even // large structures, so we do the same here. -// NVPTX64: define i127 @ReturnPassing3( -// NVPTX: define i127 @ReturnPassing3( -// SPARCV9: define i127 @ReturnPassing3( +// NVPTX64: define frozen i127 @ReturnPassing3( +// NVPTX: define frozen i127 @ReturnPassing3( +// SPARCV9: define frozen i127 @ReturnPassing3( // SPARC: define void @ReturnPassing3(i127* noalias sret -// MIPS64: define i127 @ReturnPassing3( +// MIPS64: define frozen i127 @ReturnPassing3( // MIPS: define void @ReturnPassing3(i127* noalias sret -// SPIR64: define spir_func i127 @ReturnPassing3( +// SPIR64: define spir_func frozen i127 @ReturnPassing3( // SPIR: define spir_func void @ReturnPassing3(i127* noalias sret // HEX: define void @ReturnPassing3(i127* noalias sret // LANAI: define void @ReturnPassing3(i127* noalias sret // R600: define void @ReturnPassing3(i127 addrspace(5)* noalias sret // ARC: define void @ReturnPassing3(i127* noalias sret // XCORE: define void @ReturnPassing3(i127* noalias sret -// RISCV64: define i127 @ReturnPassing3( +// RISCV64: define frozen i127 @ReturnPassing3( // RISCV32: define void @ReturnPassing3(i127* noalias sret -// WASM: define i127 @ReturnPassing3( +// WASM: define frozen i127 @ReturnPassing3( // SYSTEMZ: define void @ReturnPassing3(i127* noalias sret -// PPC64: define i127 @ReturnPassing3( +// PPC64: define frozen i127 @ReturnPassing3( // PPC32: define void @ReturnPassing3(i127* noalias sret -// AARCH64: define i127 @ReturnPassing3( -// AARCH64DARWIN: define i127 @ReturnPassing3( +// AARCH64: define frozen i127 @ReturnPassing3( +// AARCH64DARWIN: define frozen i127 @ReturnPassing3( // ARM: define arm_aapcscc void @ReturnPassing3(i127* noalias sret _ExtInt(128) ReturnPassing4(){} -// LIN64: define { i64, i64 } @ReturnPassing4( +// LIN64: define frozen { i64, i64 } @ReturnPassing4( // WIN64: define dso_local void @ReturnPassing4(i128* noalias sret // LIN32: define void @ReturnPassing4(i128* noalias sret // WIN32: define dso_local void @ReturnPassing4(i128* noalias sret // NACL: define void @ReturnPassing4(i128* noalias sret -// NVPTX64: define i128 @ReturnPassing4( -// NVPTX: define i128 @ReturnPassing4( -// SPARCV9: define i128 @ReturnPassing4( +// NVPTX64: define frozen i128 @ReturnPassing4( +// NVPTX: define frozen i128 @ReturnPassing4( +// SPARCV9: define frozen i128 @ReturnPassing4( // SPARC: define void @ReturnPassing4(i128* noalias sret -// MIPS64: define i128 @ReturnPassing4( +// MIPS64: define frozen i128 @ReturnPassing4( // MIPS: define void @ReturnPassing4(i128* noalias sret -// SPIR64: define spir_func i128 @ReturnPassing4( +// SPIR64: define spir_func frozen i128 @ReturnPassing4( // SPIR: define spir_func void @ReturnPassing4(i128* noalias sret // HEX: define void @ReturnPassing4(i128* noalias sret // LANAI: define void @ReturnPassing4(i128* noalias sret // R600: define void @ReturnPassing4(i128 addrspace(5)* noalias sret // ARC: define void @ReturnPassing4(i128* noalias sret // XCORE: define void @ReturnPassing4(i128* noalias sret -// RISCV64: define i128 @ReturnPassing4( +// RISCV64: define frozen i128 @ReturnPassing4( // RISCV32: define void @ReturnPassing4(i128* noalias sret -// WASM: define i128 @ReturnPassing4( +// WASM: define frozen i128 @ReturnPassing4( // SYSTEMZ: define void @ReturnPassing4(i128* noalias sret -// PPC64: define i128 @ReturnPassing4( +// PPC64: define frozen i128 @ReturnPassing4( // PPC32: define void @ReturnPassing4(i128* noalias sret -// AARCH64: define i128 @ReturnPassing4( -// AARCH64DARWIN: define i128 @ReturnPassing4( +// AARCH64: define frozen i128 @ReturnPassing4( +// AARCH64DARWIN: define frozen i128 @ReturnPassing4( // ARM: define arm_aapcscc void @ReturnPassing4(i128* noalias sret _ExtInt(129) ReturnPassing5(){} @@ -243,9 +243,9 @@ // LIN32: define void @ReturnPassing5(i129* noalias sret // WIN32: define dso_local void @ReturnPassing5(i129* noalias sret // NACL: define void @ReturnPassing5(i129* noalias sret -// NVPTX64: define i129 @ReturnPassing5( -// NVPTX: define i129 @ReturnPassing5( -// SPARCV9: define i129 @ReturnPassing5( +// NVPTX64: define frozen i129 @ReturnPassing5( +// NVPTX: define frozen i129 @ReturnPassing5( +// SPARCV9: define frozen i129 @ReturnPassing5( // SPARC: define void @ReturnPassing5(i129* noalias sret // MIPS64: define void @ReturnPassing5(i129* noalias sret // MIPS: define void @ReturnPassing5(i129* noalias sret @@ -269,6 +269,6 @@ // SparcV9 is odd in that it has a return-size limit of 256, not 128 or 64 // like other platforms, so test to make sure this behavior will still work. _ExtInt(256) ReturnPassing6() {} -// SPARCV9: define i256 @ReturnPassing6( +// SPARCV9: define frozen i256 @ReturnPassing6( _ExtInt(257) ReturnPassing7() {} // SPARCV9: define void @ReturnPassing7(i257* noalias sret diff --git a/clang/test/CodeGen/extern-inline.c b/clang/test/CodeGen/extern-inline.c --- a/clang/test/CodeGen/extern-inline.c +++ b/clang/test/CodeGen/extern-inline.c @@ -6,21 +6,21 @@ // redefinition. extern inline int f(int a) {return a;} int g(void) {return f(0);} -// CHECK: call i32 @f +// CHECK: call frozen i32 @f int f(int b) {return 1+b;} // CHECK: load i32, i32* %{{.*}} // CHECK: add nsw i32 1, %{{.*}} int h(void) {return f(1);} -// CHECK: call i32 @f +// CHECK: call frozen i32 @f // It shouldn't matter if the function was redefined static. extern inline int f2(int a, int b) {return a+b;} int g2(void) {return f2(0,1);} -// CHECK: call i32 @f2 +// CHECK: call frozen i32 @f2 static int f2(int a, int b) {return a*b;} // CHECK: load i32, i32* %{{.*}} // CHECK: load i32, i32* %{{.*}} // CHECK: mul nsw i32 %{{.*}}, %{{.*}} int h2(void) {return f2(1,2);} -// CHECK: call i32 @f2 +// CHECK: call frozen i32 @f2 diff --git a/clang/test/CodeGen/fp-floatcontrol-pragma.cpp b/clang/test/CodeGen/fp-floatcontrol-pragma.cpp --- a/clang/test/CodeGen/fp-floatcontrol-pragma.cpp +++ b/clang/test/CodeGen/fp-floatcontrol-pragma.cpp @@ -65,7 +65,7 @@ #pragma float_control(pop) float fff(float x, float y) { -// CHECK-LABEL: define float @_Z3fffff{{.*}} +// CHECK-LABEL: define frozen float @_Z3fffff{{.*}} // CHECK: entry #pragma float_control(except, on) float z; @@ -87,7 +87,7 @@ return z; } float check_precise(float x, float y) { - // CHECK-LABEL: define float @_Z13check_preciseff{{.*}} + // CHECK-LABEL: define frozen float @_Z13check_preciseff{{.*}} float z; { #pragma float_control(precise, on) diff --git a/clang/test/CodeGen/fp-function-attrs.cpp b/clang/test/CodeGen/fp-function-attrs.cpp --- a/clang/test/CodeGen/fp-function-attrs.cpp +++ b/clang/test/CodeGen/fp-function-attrs.cpp @@ -7,7 +7,7 @@ return tmp; } -// CHECK: define float @_Z12test_defaultfff(float %a, float %b, float %c) [[FAST_ATTRS:#[0-9]+]] +// CHECK: define frozen float @_Z12test_defaultfff(float frozen %a, float frozen %b, float frozen %c) [[FAST_ATTRS:#[0-9]+]] // CHECK: fadd fast float {{%.+}}, {{%.+}} // CHECK: fadd fast float {{%.+}}, {{%.+}} @@ -21,7 +21,7 @@ return tmp; } -// CHECK: define float @_Z22test_precise_on_pragmafff(float %a, float %b, float %c) [[PRECISE_ATTRS:#[0-9]+]] +// CHECK: define frozen float @_Z22test_precise_on_pragmafff(float frozen %a, float frozen %b, float frozen %c) [[PRECISE_ATTRS:#[0-9]+]] // CHECK: fadd float {{%.+}}, {{%.+}} // CHECK: fadd fast float {{%.+}}, {{%.+}} @@ -35,7 +35,7 @@ return tmp; } -// CHECK: define float @_Z27test_reassociate_off_pragmafff(float %a, float %b, float %c) [[NOREASSOC_ATTRS:#[0-9]+]] +// CHECK: define frozen float @_Z27test_reassociate_off_pragmafff(float frozen %a, float frozen %b, float frozen %c) [[NOREASSOC_ATTRS:#[0-9]+]] // CHECK: fadd nnan ninf nsz arcp contract afn float {{%.+}}, {{%.+}} // CHECK: fadd fast float {{%.+}}, {{%.+}} diff --git a/clang/test/CodeGen/fp-options-to-fast-math-flags.c b/clang/test/CodeGen/fp-options-to-fast-math-flags.c --- a/clang/test/CodeGen/fp-options-to-fast-math-flags.c +++ b/clang/test/CodeGen/fp-options-to-fast-math-flags.c @@ -14,29 +14,29 @@ return a + fn(a); } -// CHECK-PRECISE: [[CALL_RES:%.+]] = call float @fn(float {{%.+}}) +// CHECK-PRECISE: [[CALL_RES:%.+]] = call frozen float @fn(float frozen {{%.+}}) // CHECK-PRECISE: {{%.+}} = fadd float {{%.+}}, [[CALL_RES]] -// CHECK-NO-NANS: [[CALL_RES:%.+]] = call nnan float @fn(float {{%.+}}) +// CHECK-NO-NANS: [[CALL_RES:%.+]] = call nnan frozen float @fn(float frozen {{%.+}}) // CHECK-NO-NANS: {{%.+}} = fadd nnan float {{%.+}}, [[CALL_RES]] -// CHECK-NO-INFS: [[CALL_RES:%.+]] = call ninf float @fn(float {{%.+}}) +// CHECK-NO-INFS: [[CALL_RES:%.+]] = call ninf frozen float @fn(float frozen {{%.+}}) // CHECK-NO-INFS: {{%.+}} = fadd ninf float {{%.+}}, [[CALL_RES]] -// CHECK-FINITE: [[CALL_RES:%.+]] = call nnan ninf float @fn(float {{%.+}}) +// CHECK-FINITE: [[CALL_RES:%.+]] = call nnan ninf frozen float @fn(float frozen {{%.+}}) // CHECK-FINITE: {{%.+}} = fadd nnan ninf float {{%.+}}, [[CALL_RES]] -// CHECK-NO-SIGNED-ZEROS: [[CALL_RES:%.+]] = call nsz float @fn(float {{%.+}}) +// CHECK-NO-SIGNED-ZEROS: [[CALL_RES:%.+]] = call nsz frozen float @fn(float frozen {{%.+}}) // CHECK-NO-SIGNED-ZEROS: {{%.+}} = fadd nsz float {{%.+}}, [[CALL_RES]] -// CHECK-REASSOC: [[CALL_RES:%.+]] = call reassoc float @fn(float {{%.+}}) +// CHECK-REASSOC: [[CALL_RES:%.+]] = call reassoc frozen float @fn(float frozen {{%.+}}) // CHECK-REASSOC: {{%.+}} = fadd reassoc float {{%.+}}, [[CALL_RES]] -// CHECK-RECIP: [[CALL_RES:%.+]] = call arcp float @fn(float {{%.+}}) +// CHECK-RECIP: [[CALL_RES:%.+]] = call arcp frozen float @fn(float frozen {{%.+}}) // CHECK-RECIP: {{%.+}} = fadd arcp float {{%.+}}, [[CALL_RES]] -// CHECK-UNSAFE: [[CALL_RES:%.+]] = call reassoc nsz arcp afn float @fn(float {{%.+}}) +// CHECK-UNSAFE: [[CALL_RES:%.+]] = call reassoc nsz arcp afn frozen float @fn(float frozen {{%.+}}) // CHECK-UNSAFE: {{%.+}} = fadd reassoc nsz arcp afn float {{%.+}}, [[CALL_RES]] -// CHECK-FAST: [[CALL_RES:%.+]] = call reassoc nnan ninf nsz arcp afn float @fn(float {{%.+}}) +// CHECK-FAST: [[CALL_RES:%.+]] = call reassoc nnan ninf nsz arcp afn frozen float @fn(float frozen {{%.+}}) // CHECK-FAST: {{%.+}} = fadd reassoc nnan ninf nsz arcp afn float {{%.+}}, [[CALL_RES]] diff --git a/clang/test/CodeGen/fp128_complex.c b/clang/test/CodeGen/fp128_complex.c --- a/clang/test/CodeGen/fp128_complex.c +++ b/clang/test/CodeGen/fp128_complex.c @@ -2,8 +2,8 @@ _Complex long double a, b, c, d; void test_fp128_compound_assign(void) { - // CHECK: call { fp128, fp128 } @__multc3 + // CHECK: call frozen { fp128, fp128 } @__multc3 a *= b; - // CHECK: call { fp128, fp128 } @__divtc3 + // CHECK: call frozen { fp128, fp128 } @__divtc3 c /= d; } diff --git a/clang/test/CodeGen/fpconstrained-cmp-double.c b/clang/test/CodeGen/fpconstrained-cmp-double.c --- a/clang/test/CodeGen/fpconstrained-cmp-double.c +++ b/clang/test/CodeGen/fpconstrained-cmp-double.c @@ -6,7 +6,7 @@ // RUN: %clang_cc1 -frounding-math -ffp-exception-behavior=maytrap -emit-llvm -o - %s | FileCheck %s -check-prefix=CHECK -check-prefix=MAYTRAP _Bool QuietEqual(double f1, double f2) { - // CHECK-LABEL: define {{.*}}i1 @QuietEqual(double %f1, double %f2) + // CHECK-LABEL: define {{.*}}i1 @QuietEqual(double frozen %f1, double frozen %f2) // FCMP: fcmp oeq double %{{.*}}, %{{.*}} // IGNORE: call i1 @llvm.experimental.constrained.fcmp.f64(double %{{.*}}, double %{{.*}}, metadata !"oeq", metadata !"fpexcept.ignore") @@ -18,7 +18,7 @@ } _Bool QuietNotEqual(double f1, double f2) { - // CHECK-LABEL: define {{.*}}i1 @QuietNotEqual(double %f1, double %f2) + // CHECK-LABEL: define {{.*}}i1 @QuietNotEqual(double frozen %f1, double frozen %f2) // FCMP: fcmp une double %{{.*}}, %{{.*}} // IGNORE: call i1 @llvm.experimental.constrained.fcmp.f64(double %{{.*}}, double %{{.*}}, metadata !"une", metadata !"fpexcept.ignore") @@ -30,7 +30,7 @@ } _Bool SignalingLess(double f1, double f2) { - // CHECK-LABEL: define {{.*}}i1 @SignalingLess(double %f1, double %f2) + // CHECK-LABEL: define {{.*}}i1 @SignalingLess(double frozen %f1, double frozen %f2) // FCMP: fcmp olt double %{{.*}}, %{{.*}} // IGNORE: call i1 @llvm.experimental.constrained.fcmps.f64(double %{{.*}}, double %{{.*}}, metadata !"olt", metadata !"fpexcept.ignore") @@ -42,7 +42,7 @@ } _Bool SignalingLessEqual(double f1, double f2) { - // CHECK-LABEL: define {{.*}}i1 @SignalingLessEqual(double %f1, double %f2) + // CHECK-LABEL: define {{.*}}i1 @SignalingLessEqual(double frozen %f1, double frozen %f2) // FCMP: fcmp ole double %{{.*}}, %{{.*}} // IGNORE: call i1 @llvm.experimental.constrained.fcmps.f64(double %{{.*}}, double %{{.*}}, metadata !"ole", metadata !"fpexcept.ignore") @@ -54,7 +54,7 @@ } _Bool SignalingGreater(double f1, double f2) { - // CHECK-LABEL: define {{.*}}i1 @SignalingGreater(double %f1, double %f2) + // CHECK-LABEL: define {{.*}}i1 @SignalingGreater(double frozen %f1, double frozen %f2) // FCMP: fcmp ogt double %{{.*}}, %{{.*}} // IGNORE: call i1 @llvm.experimental.constrained.fcmps.f64(double %{{.*}}, double %{{.*}}, metadata !"ogt", metadata !"fpexcept.ignore") @@ -66,7 +66,7 @@ } _Bool SignalingGreaterEqual(double f1, double f2) { - // CHECK-LABEL: define {{.*}}i1 @SignalingGreaterEqual(double %f1, double %f2) + // CHECK-LABEL: define {{.*}}i1 @SignalingGreaterEqual(double frozen %f1, double frozen %f2) // FCMP: fcmp oge double %{{.*}}, %{{.*}} // IGNORE: call i1 @llvm.experimental.constrained.fcmps.f64(double %{{.*}}, double %{{.*}}, metadata !"oge", metadata !"fpexcept.ignore") @@ -78,7 +78,7 @@ } _Bool QuietLess(double f1, double f2) { - // CHECK-LABEL: define {{.*}}i1 @QuietLess(double %f1, double %f2) + // CHECK-LABEL: define {{.*}}i1 @QuietLess(double frozen %f1, double frozen %f2) // FCMP: fcmp olt double %{{.*}}, %{{.*}} // IGNORE: call i1 @llvm.experimental.constrained.fcmp.f64(double %{{.*}}, double %{{.*}}, metadata !"olt", metadata !"fpexcept.ignore") @@ -90,7 +90,7 @@ } _Bool QuietLessEqual(double f1, double f2) { - // CHECK-LABEL: define {{.*}}i1 @QuietLessEqual(double %f1, double %f2) + // CHECK-LABEL: define {{.*}}i1 @QuietLessEqual(double frozen %f1, double frozen %f2) // FCMP: fcmp ole double %{{.*}}, %{{.*}} // IGNORE: call i1 @llvm.experimental.constrained.fcmp.f64(double %{{.*}}, double %{{.*}}, metadata !"ole", metadata !"fpexcept.ignore") @@ -102,7 +102,7 @@ } _Bool QuietGreater(double f1, double f2) { - // CHECK-LABEL: define {{.*}}i1 @QuietGreater(double %f1, double %f2) + // CHECK-LABEL: define {{.*}}i1 @QuietGreater(double frozen %f1, double frozen %f2) // FCMP: fcmp ogt double %{{.*}}, %{{.*}} // IGNORE: call i1 @llvm.experimental.constrained.fcmp.f64(double %{{.*}}, double %{{.*}}, metadata !"ogt", metadata !"fpexcept.ignore") @@ -114,7 +114,7 @@ } _Bool QuietGreaterEqual(double f1, double f2) { - // CHECK-LABEL: define {{.*}}i1 @QuietGreaterEqual(double %f1, double %f2) + // CHECK-LABEL: define {{.*}}i1 @QuietGreaterEqual(double frozen %f1, double frozen %f2) // FCMP: fcmp oge double %{{.*}}, %{{.*}} // IGNORE: call i1 @llvm.experimental.constrained.fcmp.f64(double %{{.*}}, double %{{.*}}, metadata !"oge", metadata !"fpexcept.ignore") @@ -126,7 +126,7 @@ } _Bool QuietLessGreater(double f1, double f2) { - // CHECK-LABEL: define {{.*}}i1 @QuietLessGreater(double %f1, double %f2) + // CHECK-LABEL: define {{.*}}i1 @QuietLessGreater(double frozen %f1, double frozen %f2) // FCMP: fcmp one double %{{.*}}, %{{.*}} // IGNORE: call i1 @llvm.experimental.constrained.fcmp.f64(double %{{.*}}, double %{{.*}}, metadata !"one", metadata !"fpexcept.ignore") @@ -138,7 +138,7 @@ } _Bool QuietUnordered(double f1, double f2) { - // CHECK-LABEL: define {{.*}}i1 @QuietUnordered(double %f1, double %f2) + // CHECK-LABEL: define {{.*}}i1 @QuietUnordered(double frozen %f1, double frozen %f2) // FCMP: fcmp uno double %{{.*}}, %{{.*}} // IGNORE: call i1 @llvm.experimental.constrained.fcmp.f64(double %{{.*}}, double %{{.*}}, metadata !"uno", metadata !"fpexcept.ignore") diff --git a/clang/test/CodeGen/fpconstrained-cmp-float.c b/clang/test/CodeGen/fpconstrained-cmp-float.c --- a/clang/test/CodeGen/fpconstrained-cmp-float.c +++ b/clang/test/CodeGen/fpconstrained-cmp-float.c @@ -6,7 +6,7 @@ // RUN: %clang_cc1 -frounding-math -ffp-exception-behavior=maytrap -emit-llvm -o - %s | FileCheck %s -check-prefix=CHECK -check-prefix=MAYTRAP _Bool QuietEqual(float f1, float f2) { - // CHECK-LABEL: define {{.*}}i1 @QuietEqual(float %f1, float %f2) + // CHECK-LABEL: define {{.*}}i1 @QuietEqual(float frozen %f1, float frozen %f2) // FCMP: fcmp oeq float %{{.*}}, %{{.*}} // IGNORE: call i1 @llvm.experimental.constrained.fcmp.f32(float %{{.*}}, float %{{.*}}, metadata !"oeq", metadata !"fpexcept.ignore") @@ -18,7 +18,7 @@ } _Bool QuietNotEqual(float f1, float f2) { - // CHECK-LABEL: define {{.*}}i1 @QuietNotEqual(float %f1, float %f2) + // CHECK-LABEL: define {{.*}}i1 @QuietNotEqual(float frozen %f1, float frozen %f2) // FCMP: fcmp une float %{{.*}}, %{{.*}} // IGNORE: call i1 @llvm.experimental.constrained.fcmp.f32(float %{{.*}}, float %{{.*}}, metadata !"une", metadata !"fpexcept.ignore") @@ -30,7 +30,7 @@ } _Bool SignalingLess(float f1, float f2) { - // CHECK-LABEL: define {{.*}}i1 @SignalingLess(float %f1, float %f2) + // CHECK-LABEL: define {{.*}}i1 @SignalingLess(float frozen %f1, float frozen %f2) // FCMP: fcmp olt float %{{.*}}, %{{.*}} // IGNORE: call i1 @llvm.experimental.constrained.fcmps.f32(float %{{.*}}, float %{{.*}}, metadata !"olt", metadata !"fpexcept.ignore") @@ -42,7 +42,7 @@ } _Bool SignalingLessEqual(float f1, float f2) { - // CHECK-LABEL: define {{.*}}i1 @SignalingLessEqual(float %f1, float %f2) + // CHECK-LABEL: define {{.*}}i1 @SignalingLessEqual(float frozen %f1, float frozen %f2) // FCMP: fcmp ole float %{{.*}}, %{{.*}} // IGNORE: call i1 @llvm.experimental.constrained.fcmps.f32(float %{{.*}}, float %{{.*}}, metadata !"ole", metadata !"fpexcept.ignore") @@ -54,7 +54,7 @@ } _Bool SignalingGreater(float f1, float f2) { - // CHECK-LABEL: define {{.*}}i1 @SignalingGreater(float %f1, float %f2) + // CHECK-LABEL: define {{.*}}i1 @SignalingGreater(float frozen %f1, float frozen %f2) // FCMP: fcmp ogt float %{{.*}}, %{{.*}} // IGNORE: call i1 @llvm.experimental.constrained.fcmps.f32(float %{{.*}}, float %{{.*}}, metadata !"ogt", metadata !"fpexcept.ignore") @@ -66,7 +66,7 @@ } _Bool SignalingGreaterEqual(float f1, float f2) { - // CHECK-LABEL: define {{.*}}i1 @SignalingGreaterEqual(float %f1, float %f2) + // CHECK-LABEL: define {{.*}}i1 @SignalingGreaterEqual(float frozen %f1, float frozen %f2) // FCMP: fcmp oge float %{{.*}}, %{{.*}} // IGNORE: call i1 @llvm.experimental.constrained.fcmps.f32(float %{{.*}}, float %{{.*}}, metadata !"oge", metadata !"fpexcept.ignore") @@ -78,7 +78,7 @@ } _Bool QuietLess(float f1, float f2) { - // CHECK-LABEL: define {{.*}}i1 @QuietLess(float %f1, float %f2) + // CHECK-LABEL: define {{.*}}i1 @QuietLess(float frozen %f1, float frozen %f2) // FCMP: fcmp olt float %{{.*}}, %{{.*}} // IGNORE: call i1 @llvm.experimental.constrained.fcmp.f32(float %{{.*}}, float %{{.*}}, metadata !"olt", metadata !"fpexcept.ignore") @@ -90,7 +90,7 @@ } _Bool QuietLessEqual(float f1, float f2) { - // CHECK-LABEL: define {{.*}}i1 @QuietLessEqual(float %f1, float %f2) + // CHECK-LABEL: define {{.*}}i1 @QuietLessEqual(float frozen %f1, float frozen %f2) // FCMP: fcmp ole float %{{.*}}, %{{.*}} // IGNORE: call i1 @llvm.experimental.constrained.fcmp.f32(float %{{.*}}, float %{{.*}}, metadata !"ole", metadata !"fpexcept.ignore") @@ -102,7 +102,7 @@ } _Bool QuietGreater(float f1, float f2) { - // CHECK-LABEL: define {{.*}}i1 @QuietGreater(float %f1, float %f2) + // CHECK-LABEL: define {{.*}}i1 @QuietGreater(float frozen %f1, float frozen %f2) // FCMP: fcmp ogt float %{{.*}}, %{{.*}} // IGNORE: call i1 @llvm.experimental.constrained.fcmp.f32(float %{{.*}}, float %{{.*}}, metadata !"ogt", metadata !"fpexcept.ignore") @@ -114,7 +114,7 @@ } _Bool QuietGreaterEqual(float f1, float f2) { - // CHECK-LABEL: define {{.*}}i1 @QuietGreaterEqual(float %f1, float %f2) + // CHECK-LABEL: define {{.*}}i1 @QuietGreaterEqual(float frozen %f1, float frozen %f2) // FCMP: fcmp oge float %{{.*}}, %{{.*}} // IGNORE: call i1 @llvm.experimental.constrained.fcmp.f32(float %{{.*}}, float %{{.*}}, metadata !"oge", metadata !"fpexcept.ignore") @@ -126,7 +126,7 @@ } _Bool QuietLessGreater(float f1, float f2) { - // CHECK-LABEL: define {{.*}}i1 @QuietLessGreater(float %f1, float %f2) + // CHECK-LABEL: define {{.*}}i1 @QuietLessGreater(float frozen %f1, float frozen %f2) // FCMP: fcmp one float %{{.*}}, %{{.*}} // IGNORE: call i1 @llvm.experimental.constrained.fcmp.f32(float %{{.*}}, float %{{.*}}, metadata !"one", metadata !"fpexcept.ignore") @@ -138,7 +138,7 @@ } _Bool QuietUnordered(float f1, float f2) { - // CHECK-LABEL: define {{.*}}i1 @QuietUnordered(float %f1, float %f2) + // CHECK-LABEL: define {{.*}}i1 @QuietUnordered(float frozen %f1, float frozen %f2) // FCMP: fcmp uno float %{{.*}}, %{{.*}} // IGNORE: call i1 @llvm.experimental.constrained.fcmp.f32(float %{{.*}}, float %{{.*}}, metadata !"uno", metadata !"fpexcept.ignore") diff --git a/clang/test/CodeGen/function-attributes.c b/clang/test/CodeGen/function-attributes.c --- a/clang/test/CodeGen/function-attributes.c +++ b/clang/test/CodeGen/function-attributes.c @@ -1,14 +1,14 @@ // RUN: %clang_cc1 -triple i386-unknown-unknown -emit-llvm -disable-llvm-passes -Os -o - %s | FileCheck %s // RUN: %clang_cc1 -triple i386-unknown-unknown -emit-llvm -disable-llvm-passes -Os -std=c99 -o - %s | FileCheck %s // RUN: %clang_cc1 -triple x86_64-unknown-unknown -emit-llvm -disable-llvm-passes -Os -std=c99 -o - %s | FileCheck %s -// CHECK: define signext i8 @f0(i32 %x) [[NUW:#[0-9]+]] -// CHECK: define zeroext i8 @f1(i32 %x) [[NUW]] -// CHECK: define void @f2(i8 signext %x) [[NUW]] -// CHECK: define void @f3(i8 zeroext %x) [[NUW]] -// CHECK: define signext i16 @f4(i32 %x) [[NUW]] -// CHECK: define zeroext i16 @f5(i32 %x) [[NUW]] -// CHECK: define void @f6(i16 signext %x) [[NUW]] -// CHECK: define void @f7(i16 zeroext %x) [[NUW]] +// CHECK: define frozen signext i8 @f0(i32 frozen %x) [[NUW:#[0-9]+]] +// CHECK: define frozen zeroext i8 @f1(i32 frozen %x) [[NUW]] +// CHECK: define void @f2(i8 frozen signext %x) [[NUW]] +// CHECK: define void @f3(i8 frozen zeroext %x) [[NUW]] +// CHECK: define frozen signext i16 @f4(i32 frozen %x) [[NUW]] +// CHECK: define frozen zeroext i16 @f5(i32 frozen %x) [[NUW]] +// CHECK: define void @f6(i16 frozen signext %x) [[NUW]] +// CHECK: define void @f7(i16 frozen zeroext %x) [[NUW]] signed char f0(int x) { return x; } @@ -44,7 +44,7 @@ void f9b(void) { f9a(); } // FIXME: We should be setting nounwind on calls. -// CHECK: call i32 @f10_t() +// CHECK: call frozen i32 @f10_t() // CHECK: [[NUW_RN:#[0-9]+]] // CHECK: { int __attribute__((const)) f10_t(void); @@ -90,7 +90,7 @@ // CHECK-LABEL: define void @f19() // CHECK: { -// CHECK: call i32 @setjmp(i32* null) +// CHECK: call frozen i32 @setjmp(i32* frozen null) // CHECK: [[RT_CALL]] // CHECK: ret void typedef int jmp_buf[((9 * 2) + 3 + 16)]; @@ -101,7 +101,7 @@ // CHECK-LABEL: define void @f20() // CHECK: { -// CHECK: call i32 @_setjmp(i32* null) +// CHECK: call frozen i32 @_setjmp(i32* frozen null) // CHECK: [[RT_CALL]] // CHECK: ret void int _setjmp(jmp_buf); diff --git a/clang/test/CodeGen/functions.c b/clang/test/CodeGen/functions.c --- a/clang/test/CodeGen/functions.c +++ b/clang/test/CodeGen/functions.c @@ -55,8 +55,8 @@ void f8_test() { f8_user(&f8_callback); // CHECK-LABEL: define void @f8_test() -// CHECK: call void @f8_user({{.*}}* bitcast (void ()* @f8_callback to {{.*}}*)) -// CHECK: declare void @f8_user({{.*}}*) +// CHECK: call void @f8_user({{.*}}* frozen bitcast (void ()* @f8_callback to {{.*}}*)) +// CHECK: declare void @f8_user({{.*}}* frozen) // CHECK: declare void @f8_callback() } diff --git a/clang/test/CodeGen/global-decls.c b/clang/test/CodeGen/global-decls.c --- a/clang/test/CodeGen/global-decls.c +++ b/clang/test/CodeGen/global-decls.c @@ -2,7 +2,7 @@ // RUN: grep '@g0_ext = extern_weak global i32' %t extern int g0_ext __attribute__((weak)); -// RUN: grep 'declare extern_weak i32 @g1_ext()' %t +// RUN: grep 'declare extern_weak frozen i32 @g1_ext()' %t extern int __attribute__((weak)) g1_ext (void); // RUN: grep '@g0_common = weak global i32' %t @@ -10,7 +10,7 @@ // RUN: grep '@g0_def = weak global i32' %t int g0_def __attribute__((weak)) = 52; -// RUN: grep 'define weak i32 @g1_def()' %t +// RUN: grep 'define weak frozen i32 @g1_def()' %t int __attribute__((weak)) g1_def (void) { return 0; } // Force _ext references diff --git a/clang/test/CodeGen/hexagon-hvx-abi.c b/clang/test/CodeGen/hexagon-hvx-abi.c --- a/clang/test/CodeGen/hexagon-hvx-abi.c +++ b/clang/test/CodeGen/hexagon-hvx-abi.c @@ -6,14 +6,14 @@ typedef long HVX_VectorPair __attribute__((__vector_size__(2*__HVX_LENGTH__))) __attribute__((aligned(__HVX_LENGTH__))); -// CHECK-HVX64: define {{.*}} <16 x i32> @foo(<16 x i32> %a, <32 x i32> %b) -// CHECK-HVX128: define {{.*}} <32 x i32> @foo(<32 x i32> %a, <64 x i32> %b) +// CHECK-HVX64: define {{.*}} <16 x i32> @foo(<16 x i32> frozen %a, <32 x i32> frozen %b) +// CHECK-HVX128: define {{.*}} <32 x i32> @foo(<32 x i32> frozen %a, <64 x i32> frozen %b) HVX_Vector foo(HVX_Vector a, HVX_VectorPair b) { return a; } -// CHECK-HVX64: define {{.*}} <32 x i32> @bar(<16 x i32> %a, <32 x i32> %b) -// CHECK-HVX128: define {{.*}} <64 x i32> @bar(<32 x i32> %a, <64 x i32> %b) +// CHECK-HVX64: define {{.*}} <32 x i32> @bar(<16 x i32> frozen %a, <32 x i32> frozen %b) +// CHECK-HVX128: define {{.*}} <64 x i32> @bar(<32 x i32> frozen %a, <64 x i32> frozen %b) HVX_VectorPair bar(HVX_Vector a, HVX_VectorPair b) { return b; } diff --git a/clang/test/CodeGen/ifunc.c b/clang/test/CodeGen/ifunc.c --- a/clang/test/CodeGen/ifunc.c +++ b/clang/test/CodeGen/ifunc.c @@ -37,5 +37,5 @@ // CHECK: @foo = ifunc i32 (i32), bitcast (i32 (i32)* ()* @foo_ifunc to i32 (i32)*) // CHECK: @goo = ifunc void (), bitcast (i8* ()* @goo_ifunc to void ()*) -// CHECK: call i32 @foo(i32 +// CHECK: call frozen i32 @foo(i32 // CHECK: call void @goo() diff --git a/clang/test/CodeGen/incomplete-function-type-2.c b/clang/test/CodeGen/incomplete-function-type-2.c --- a/clang/test/CodeGen/incomplete-function-type-2.c +++ b/clang/test/CodeGen/incomplete-function-type-2.c @@ -2,7 +2,7 @@ // PR14355: don't crash // Keep this test in its own file because CodeGenTypes has global state. -// CHECK: define void @test10_foo({}* %p1.coerce) [[NUW:#[0-9]+]] { +// CHECK: define void @test10_foo({}* frozen %p1.coerce) [[NUW:#[0-9]+]] struct test10_B; typedef struct test10_B test10_F3(double); void test10_foo(test10_F3 p1); diff --git a/clang/test/CodeGen/inline-optim.c b/clang/test/CodeGen/inline-optim.c --- a/clang/test/CodeGen/inline-optim.c +++ b/clang/test/CodeGen/inline-optim.c @@ -22,16 +22,16 @@ // NOINLINE-LABEL: @foo // HINT-LABEL: @foo // INLINE-LABEL: @foo -// NOINLINE: call i32 @inline_hint -// HINT-NOT: call i32 @inline_hint -// INLINE-NOT: call i32 @inline_hint +// NOINLINE: call frozen i32 @inline_hint +// HINT-NOT: call frozen i32 @inline_hint +// INLINE-NOT: call frozen i32 @inline_hint pa[0] = inline_hint(pa[1],pa[2]); -// NOINLINE-NOT: call i32 @inline_always -// HINT-NOT: call i32 @inline_always -// INLINE-NOT: call i32 @inline_always +// NOINLINE-NOT: call frozen i32 @inline_always +// HINT-NOT: call frozen i32 @inline_always +// INLINE-NOT: call frozen i32 @inline_always pa[3] = inline_always(pa[4],pa[5]); -// NOINLINE: call i32 @inline_no_hint -// HINT: call i32 @inline_no_hint -// INLINE-NOT: call i32 @inline_no_hint +// NOINLINE: call frozen i32 @inline_no_hint +// HINT: call frozen i32 @inline_no_hint +// INLINE-NOT: call frozen i32 @inline_no_hint pa[6] = inline_no_hint(pa[7], pa[8]); } diff --git a/clang/test/CodeGen/inline.c b/clang/test/CodeGen/inline.c --- a/clang/test/CodeGen/inline.c +++ b/clang/test/CodeGen/inline.c @@ -3,70 +3,70 @@ // RUN: echo "GNU89 tests:" // RUN: %clang_cc1 %s -triple i386-unknown-unknown -O1 -disable-llvm-passes -emit-llvm -o - -std=gnu89 | FileCheck %s --check-prefix=CHECK1 // RUN: %clang_cc1 %s -triple i386-unknown-unknown -fexperimental-new-pass-manager -O1 -disable-llvm-passes -emit-llvm -o - -std=gnu89 | FileCheck %s --check-prefix=CHECK1 -// CHECK1-LABEL: define i32 @foo() -// CHECK1-LABEL: define i32 @bar() +// CHECK1-LABEL: define frozen i32 @foo() +// CHECK1-LABEL: define frozen i32 @bar() // CHECK1-LABEL: define void @unreferenced1() // CHECK1-NOT: unreferenced2 // CHECK1-LABEL: define void @gnu_inline() -// CHECK1-LABEL: define i32 @test1 -// CHECK1-LABEL: define i32 @test2 +// CHECK1-LABEL: define frozen i32 @test1 +// CHECK1-LABEL: define frozen i32 @test2 // CHECK1-LABEL: define void @test3() -// CHECK1-LABEL: define available_externally i32 @test4 -// CHECK1-LABEL: define available_externally i32 @test5 -// CHECK1-LABEL: define i32 @test6 +// CHECK1-LABEL: define available_externally frozen i32 @test4 +// CHECK1-LABEL: define available_externally frozen i32 @test5 +// CHECK1-LABEL: define frozen i32 @test6 // CHECK1-LABEL: define void @test7 -// CHECK1: define i{{..}} @strlcpy +// CHECK1: define frozen i{{..}} @strlcpy // CHECK1-NOT: test9 // CHECK1-LABEL: define void @testA // CHECK1-LABEL: define void @testB // CHECK1-LABEL: define void @testC -// CHECK1-LABEL: define available_externally i32 @ei() +// CHECK1-LABEL: define available_externally frozen i32 @ei() // CHECK1-LABEL: define available_externally void @gnu_ei_inline() // RUN: echo "C99 tests:" // RUN: %clang_cc1 %s -triple i386-unknown-unknown -O1 -disable-llvm-passes -emit-llvm -o - -std=gnu99 | FileCheck %s --check-prefix=CHECK2 // RUN: %clang_cc1 %s -triple i386-unknown-unknown -fexperimental-new-pass-manager -O1 -disable-llvm-passes -emit-llvm -o - -std=gnu99 | FileCheck %s --check-prefix=CHECK2 -// CHECK2-LABEL: define i32 @ei() -// CHECK2-LABEL: define i32 @bar() +// CHECK2-LABEL: define frozen i32 @ei() +// CHECK2-LABEL: define frozen i32 @bar() // CHECK2-NOT: unreferenced1 // CHECK2-LABEL: define void @unreferenced2() // CHECK2-LABEL: define void @gnu_inline() -// CHECK2-LABEL: define i32 @test1 -// CHECK2-LABEL: define i32 @test2 +// CHECK2-LABEL: define frozen i32 @test1 +// CHECK2-LABEL: define frozen i32 @test2 // CHECK2-LABEL: define void @test3 -// CHECK2-LABEL: define available_externally i32 @test4 -// CHECK2-LABEL: define available_externally i32 @test5 -// CHECK2-LABEL: define i32 @test6 +// CHECK2-LABEL: define available_externally frozen i32 @test4 +// CHECK2-LABEL: define available_externally frozen i32 @test5 +// CHECK2-LABEL: define frozen i32 @test6 // CHECK2-LABEL: define void @test7 -// CHECK2: define available_externally i{{..}} @strlcpy +// CHECK2: define available_externally frozen i{{..}} @strlcpy // CHECK2-LABEL: define void @test9 // CHECK2-LABEL: define void @testA // CHECK2-LABEL: define void @testB // CHECK2-LABEL: define void @testC -// CHECK2-LABEL: define available_externally i32 @foo() +// CHECK2-LABEL: define available_externally frozen i32 @foo() // CHECK2-LABEL: define available_externally void @gnu_ei_inline() // RUN: echo "C++ tests:" // RUN: %clang_cc1 -x c++ %s -triple i386-unknown-unknown -O1 -disable-llvm-passes -emit-llvm -o - -std=c++98 | FileCheck %s --check-prefix=CHECK3 // RUN: %clang_cc1 -x c++ %s -triple i386-unknown-unknown -fexperimental-new-pass-manager -O1 -disable-llvm-passes -emit-llvm -o - -std=c++98 | FileCheck %s --check-prefix=CHECK3 -// CHECK3-LABEL: define i32 @_Z3barv() -// CHECK3-LABEL: define linkonce_odr i32 @_Z3foov() +// CHECK3-LABEL: define frozen i32 @_Z3barv() +// CHECK3-LABEL: define linkonce_odr frozen i32 @_Z3foov() // CHECK3-NOT: unreferenced // CHECK3-LABEL: define available_externally void @_Z10gnu_inlinev() // CHECK3-LABEL: define available_externally void @_Z13gnu_ei_inlinev() // CHECK3-NOT: @_Z5testCv -// CHECK3-LABEL: define linkonce_odr i32 @_Z2eiv() +// CHECK3-LABEL: define linkonce_odr frozen i32 @_Z2eiv() // RUN: echo "MS C Mode tests:" // RUN: %clang_cc1 %s -triple i386-pc-win32 -O1 -disable-llvm-passes -emit-llvm -o - -std=c99 | FileCheck %s --check-prefix=CHECK4 // RUN: %clang_cc1 %s -triple i386-pc-win32 -fexperimental-new-pass-manager -O1 -disable-llvm-passes -emit-llvm -o - -std=c99 | FileCheck %s --check-prefix=CHECK4 // CHECK4-NOT: define weak_odr void @_Exit( -// CHECK4-LABEL: define weak_odr dso_local i32 @ei() -// CHECK4-LABEL: define dso_local i32 @bar() +// CHECK4-LABEL: define weak_odr dso_local frozen i32 @ei() +// CHECK4-LABEL: define dso_local frozen i32 @bar() // CHECK4-NOT: unreferenced1 // CHECK4-LABEL: define weak_odr dso_local void @unreferenced2() // CHECK4-LABEL: define dso_local void @gnu_inline() -// CHECK4-LABEL: define linkonce_odr dso_local i32 @foo() +// CHECK4-LABEL: define linkonce_odr dso_local frozen i32 @foo() // CHECK4-LABEL: define available_externally dso_local void @gnu_ei_inline() __attribute__((noreturn)) void __cdecl _exit(int _Code); diff --git a/clang/test/CodeGen/inline2.c b/clang/test/CodeGen/inline2.c --- a/clang/test/CodeGen/inline2.c +++ b/clang/test/CodeGen/inline2.c @@ -1,65 +1,65 @@ // RUN: %clang_cc1 -O1 -fno-experimental-new-pass-manager -std=gnu89 -triple i386-apple-darwin9 -emit-llvm %s -o - | FileCheck -check-prefix CHECK-GNU89 %s // RUN: %clang_cc1 -O1 -fno-experimental-new-pass-manager -std=c99 -triple i386-apple-darwin9 -emit-llvm %s -o - | FileCheck -check-prefix CHECK-C99 %s -// CHECK-GNU89-LABEL: define i32 @f0() -// CHECK-C99-LABEL: define i32 @f0() +// CHECK-GNU89-LABEL: define frozen i32 @f0() +// CHECK-C99-LABEL: define frozen i32 @f0() int f0(void); int f0(void) { return 0; } -// CHECK-GNU89-LABEL: define i32 @f1() -// CHECK-C99-LABEL: define i32 @f1() +// CHECK-GNU89-LABEL: define frozen i32 @f1() +// CHECK-C99-LABEL: define frozen i32 @f1() inline int f1(void); int f1(void) { return 0; } -// CHECK-GNU89-LABEL: define i32 @f2() -// CHECK-C99-LABEL: define i32 @f2() +// CHECK-GNU89-LABEL: define frozen i32 @f2() +// CHECK-C99-LABEL: define frozen i32 @f2() int f2(void); inline int f2(void) { return 0; } -// CHECK-GNU89-LABEL: define i32 @f3() -// CHECK-C99-LABEL: define i32 @f3() +// CHECK-GNU89-LABEL: define frozen i32 @f3() +// CHECK-C99-LABEL: define frozen i32 @f3() extern inline int f3(void); int f3(void) { return 0; } -// CHECK-GNU89-LABEL: define i32 @f5() -// CHECK-C99-LABEL: define i32 @f5() +// CHECK-GNU89-LABEL: define frozen i32 @f5() +// CHECK-C99-LABEL: define frozen i32 @f5() extern inline int f5(void); inline int f5(void) { return 0; } -// CHECK-GNU89-LABEL: define i32 @f6() -// CHECK-C99-LABEL: define i32 @f6() +// CHECK-GNU89-LABEL: define frozen i32 @f6() +// CHECK-C99-LABEL: define frozen i32 @f6() inline int f6(void); extern inline int f6(void) { return 0; } -// CHECK-GNU89-LABEL: define i32 @f7() -// CHECK-C99-LABEL: define i32 @f7() +// CHECK-GNU89-LABEL: define frozen i32 @f7() +// CHECK-C99-LABEL: define frozen i32 @f7() extern inline int f7(void); extern int f7(void) { return 0; } -// CHECK-GNU89-LABEL: define i32 @fA() +// CHECK-GNU89-LABEL: define frozen i32 @fA() inline int fA(void) { return 0; } -// CHECK-GNU89-LABEL: define i32 @fB() +// CHECK-GNU89-LABEL: define frozen i32 @fB() inline int fB() { return 0; } -// CHECK-GNU89-LABEL: define available_externally i32 @f4() -// CHECK-C99-LABEL: define i32 @f4() +// CHECK-GNU89-LABEL: define available_externally frozen i32 @f4() +// CHECK-C99-LABEL: define frozen i32 @f4() int f4(void); extern inline int f4(void) { return 0; } -// CHECK-GNU89-LABEL: define available_externally i32 @f8() -// CHECK-C99-LABEL: define i32 @f8() +// CHECK-GNU89-LABEL: define available_externally frozen i32 @f8() +// CHECK-C99-LABEL: define frozen i32 @f8() extern int f8(void); extern inline int f8(void) { return 0; } -// CHECK-GNU89-LABEL: define available_externally i32 @f9() -// CHECK-C99-LABEL: define i32 @f9() +// CHECK-GNU89-LABEL: define available_externally frozen i32 @f9() +// CHECK-C99-LABEL: define frozen i32 @f9() extern inline int f9(void); extern inline int f9(void) { return 0; } -// CHECK-C99-LABEL: define available_externally i32 @fA() +// CHECK-C99-LABEL: define available_externally frozen i32 @fA() -// CHECK-C99-LABEL: define i32 @fB() +// CHECK-C99-LABEL: define frozen i32 @fB() int test_all() { return f0() + f1() + f2() + f3() + f4() + f5() + f6() + f7() + f8() + f9() diff --git a/clang/test/CodeGen/lanai-arguments.c b/clang/test/CodeGen/lanai-arguments.c --- a/clang/test/CodeGen/lanai-arguments.c +++ b/clang/test/CodeGen/lanai-arguments.c @@ -3,7 +3,7 @@ // Basic argument/attribute tests for Lanai. -// CHECK: define void @f0(i32 inreg %i, i32 inreg %j, i64 inreg %k) +// CHECK: define void @f0(i32 frozen inreg %i, i32 frozen inreg %j, i64 frozen inreg %k) void f0(int i, long j, long long k) {} typedef struct { @@ -32,13 +32,13 @@ return foo; } -// CHECK: define void @f4(i64 inreg %i) +// CHECK: define void @f4(i64 frozen inreg %i) void f4(long long i) {} -// CHECK: define void @f5(i8 inreg %a, i16 inreg %b) +// CHECK: define void @f5(i8 frozen inreg %a, i16 frozen inreg %b) void f5(char a, short b) {} -// CHECK: define void @f6(i8 inreg %a, i16 inreg %b) +// CHECK: define void @f6(i8 frozen inreg %a, i16 frozen inreg %b) void f6(unsigned char a, unsigned short b) {} enum my_enum { @@ -47,14 +47,14 @@ ENUM3, }; // Enums should be treated as the underlying i32. -// CHECK: define void @f7(i32 inreg %a) +// CHECK: define void @f7(i32 frozen inreg %a) void f7(enum my_enum a) {} enum my_big_enum { ENUM4 = 0xFFFFFFFFFFFFFFFF, }; // Big enums should be treated as the underlying i64. -// CHECK: define void @f8(i64 inreg %a) +// CHECK: define void @f8(i64 frozen inreg %a) void f8(enum my_big_enum a) {} union simple_union { diff --git a/clang/test/CodeGen/lanai-regparm.c b/clang/test/CodeGen/lanai-regparm.c --- a/clang/test/CodeGen/lanai-regparm.c +++ b/clang/test/CodeGen/lanai-regparm.c @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -triple lanai-unknown-unknown -mregparm 4 %s -emit-llvm -o - | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args -triple lanai-unknown-unknown -mregparm 4 %s -emit-llvm -o - | FileCheck %s void f1(int a, int b, int c, int d, int e, int f, int g, int h); diff --git a/clang/test/CodeGen/le32-arguments.c b/clang/test/CodeGen/le32-arguments.c --- a/clang/test/CodeGen/le32-arguments.c +++ b/clang/test/CodeGen/le32-arguments.c @@ -2,7 +2,7 @@ // Basic argument/attribute tests for le32/PNaCl -// CHECK-LABEL: define void @f0(i32 %i, i32 %j, double %k) +// CHECK-LABEL: define void @f0(i32 frozen %i, i32 frozen %j, double frozen %k) void f0(int i, long j, double k) {} typedef struct { @@ -10,7 +10,7 @@ int bb; } s1; // Structs should be passed byval and not split up -// CHECK-LABEL: define void @f1(%struct.s1* byval(%struct.s1) align 4 %i) +// CHECK-LABEL: define void @f1(%struct.s1* frozen byval(%struct.s1) align 4 %i) void f1(s1 i) {} typedef struct { @@ -23,14 +23,14 @@ return foo; } -// CHECK-LABEL: define void @f3(i64 %i) +// CHECK-LABEL: define void @f3(i64 frozen %i) void f3(long long i) {} // i8/i16 should be signext, i32 and higher should not -// CHECK-LABEL: define void @f4(i8 signext %a, i16 signext %b) +// CHECK-LABEL: define void @f4(i8 frozen signext %a, i16 frozen signext %b) void f4(char a, short b) {} -// CHECK-LABEL: define void @f5(i8 zeroext %a, i16 zeroext %b) +// CHECK-LABEL: define void @f5(i8 frozen zeroext %a, i16 frozen zeroext %b) void f5(unsigned char a, unsigned short b) {} @@ -40,7 +40,7 @@ ENUM3, }; // Enums should be treated as the underlying i32 -// CHECK-LABEL: define void @f6(i32 %a) +// CHECK-LABEL: define void @f6(i32 frozen %a) void f6(enum my_enum a) {} union simple_union { @@ -48,7 +48,7 @@ char b; }; // Unions should be passed as byval structs -// CHECK-LABEL: define void @f7(%union.simple_union* byval(%union.simple_union) align 4 %s) +// CHECK-LABEL: define void @f7(%union.simple_union* frozen byval(%union.simple_union) align 4 %s) void f7(union simple_union s) {} typedef struct { @@ -57,5 +57,5 @@ int b8 : 8; } bitfield1; // Bitfields should be passed as byval structs -// CHECK-LABEL: define void @f8(%struct.bitfield1* byval(%struct.bitfield1) align 4 %bf1) +// CHECK-LABEL: define void @f8(%struct.bitfield1* frozen byval(%struct.bitfield1) align 4 %bf1) void f8(bitfield1 bf1) {} diff --git a/clang/test/CodeGen/le32-libcall-pow.c b/clang/test/CodeGen/le32-libcall-pow.c --- a/clang/test/CodeGen/le32-libcall-pow.c +++ b/clang/test/CodeGen/le32-libcall-pow.c @@ -11,17 +11,17 @@ // CHECK-LABEL: define void @test_pow void test_pow(float a0, double a1, long double a2) { - // CHECK: call float @powf + // CHECK: call frozen float @powf float l0 = powf(a0, a0); - // CHECK: call double @pow + // CHECK: call frozen double @pow double l1 = pow(a1, a1); - // CHECK: call double @powl + // CHECK: call frozen double @powl long double l2 = powl(a2, a2); } -// CHECK: declare float @powf(float, float) -// CHECK: declare double @pow(double, double) -// CHECK: declare double @powl(double, double) +// CHECK: declare frozen float @powf(float frozen, float frozen) +// CHECK: declare frozen double @pow(double frozen, double frozen) +// CHECK: declare frozen double @powl(double frozen, double frozen) diff --git a/clang/test/CodeGen/le32-vaarg.c b/clang/test/CodeGen/le32-vaarg.c --- a/clang/test/CodeGen/le32-vaarg.c +++ b/clang/test/CodeGen/le32-vaarg.c @@ -4,7 +4,7 @@ int get_int(va_list *args) { return va_arg(*args, int); } -// CHECK: define i32 @get_int +// CHECK: define frozen i32 @get_int // CHECK: [[RESULT:%[a-z_0-9]+]] = va_arg {{.*}}, i32{{$}} // CHECK: store i32 [[RESULT]], i32* [[LOC:%[a-z_0-9]+]] // CHECK: [[RESULT2:%[a-z_0-9]+]] = load i32, i32* [[LOC]] diff --git a/clang/test/CodeGen/libcall-declarations.c b/clang/test/CodeGen/libcall-declarations.c --- a/clang/test/CodeGen/libcall-declarations.c +++ b/clang/test/CodeGen/libcall-declarations.c @@ -312,307 +312,307 @@ F(__cospif), F(__tanpi), F(__tanpif), F(__exp10), F(__exp10f) }; -// CHECK-NOERRNO: declare double @atan2(double, double) [[NUWRN:#[0-9]+]] -// CHECK-NOERRNO: declare float @atan2f(float, float) [[NUWRN]] -// CHECK-NOERRNO: declare x86_fp80 @atan2l(x86_fp80, x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare i32 @abs(i32) [[NUWRN]] -// CHECK-NOERRNO: declare i64 @labs(i64) [[NUWRN]] -// CHECK-NOERRNO: declare i64 @llabs(i64) [[NUWRN]] -// CHECK-NOERRNO: declare double @copysign(double, double) [[NUWRN]] -// CHECK-NOERRNO: declare float @copysignf(float, float) [[NUWRN]] -// CHECK-NOERRNO: declare x86_fp80 @copysignl(x86_fp80, x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare double @fabs(double) [[NUWRN]] -// CHECK-NOERRNO: declare float @fabsf(float) [[NUWRN]] -// CHECK-NOERRNO: declare x86_fp80 @fabsl(x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare double @fmod(double, double) [[NUWRN]] -// CHECK-NOERRNO: declare float @fmodf(float, float) [[NUWRN]] -// CHECK-NOERRNO: declare x86_fp80 @fmodl(x86_fp80, x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare double @ldexp(double, i32) [[NUWRN]] -// CHECK-NOERRNO: declare float @ldexpf(float, i32) [[NUWRN]] -// CHECK-NOERRNO: declare x86_fp80 @ldexpl(x86_fp80, i32) [[NUWRN]] -// CHECK-NOERRNO: declare double @nan(i8*) [[NUWRO:#[0-9]+]] -// CHECK-NOERRNO: declare float @nanf(i8*) [[NUWRO]] -// CHECK-NOERRNO: declare x86_fp80 @nanl(i8*) [[NUWRO]] -// CHECK-NOERRNO: declare double @pow(double, double) [[NUWRN]] -// CHECK-NOERRNO: declare float @powf(float, float) [[NUWRN]] -// CHECK-NOERRNO: declare x86_fp80 @powl(x86_fp80, x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare double @acos(double) [[NUWRN]] -// CHECK-NOERRNO: declare float @acosf(float) [[NUWRN]] -// CHECK-NOERRNO: declare x86_fp80 @acosl(x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare double @acosh(double) [[NUWRN]] -// CHECK-NOERRNO: declare float @acoshf(float) [[NUWRN]] -// CHECK-NOERRNO: declare x86_fp80 @acoshl(x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare double @asin(double) [[NUWRN]] -// CHECK-NOERRNO: declare float @asinf(float) [[NUWRN]] -// CHECK-NOERRNO: declare x86_fp80 @asinl(x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare double @asinh(double) [[NUWRN]] -// CHECK-NOERRNO: declare float @asinhf(float) [[NUWRN]] -// CHECK-NOERRNO: declare x86_fp80 @asinhl(x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare double @atan(double) [[NUWRN]] -// CHECK-NOERRNO: declare float @atanf(float) [[NUWRN]] -// CHECK-NOERRNO: declare x86_fp80 @atanl(x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare double @atanh(double) [[NUWRN]] -// CHECK-NOERRNO: declare float @atanhf(float) [[NUWRN]] -// CHECK-NOERRNO: declare x86_fp80 @atanhl(x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare double @cbrt(double) [[NUWRN]] -// CHECK-NOERRNO: declare float @cbrtf(float) [[NUWRN]] -// CHECK-NOERRNO: declare x86_fp80 @cbrtl(x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare double @ceil(double) [[NUWRN]] -// CHECK-NOERRNO: declare float @ceilf(float) [[NUWRN]] -// CHECK-NOERRNO: declare x86_fp80 @ceill(x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare double @cos(double) [[NUWRN]] -// CHECK-NOERRNO: declare float @cosf(float) [[NUWRN]] -// CHECK-NOERRNO: declare x86_fp80 @cosl(x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare double @cosh(double) [[NUWRN]] -// CHECK-NOERRNO: declare float @coshf(float) [[NUWRN]] -// CHECK-NOERRNO: declare x86_fp80 @coshl(x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare double @erf(double) [[NUWRN]] -// CHECK-NOERRNO: declare float @erff(float) [[NUWRN]] -// CHECK-NOERRNO: declare x86_fp80 @erfl(x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare double @erfc(double) [[NUWRN]] -// CHECK-NOERRNO: declare float @erfcf(float) [[NUWRN]] -// CHECK-NOERRNO: declare x86_fp80 @erfcl(x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare double @exp(double) [[NUWRN]] -// CHECK-NOERRNO: declare float @expf(float) [[NUWRN]] -// CHECK-NOERRNO: declare x86_fp80 @expl(x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare double @exp2(double) [[NUWRN]] -// CHECK-NOERRNO: declare float @exp2f(float) [[NUWRN]] -// CHECK-NOERRNO: declare x86_fp80 @exp2l(x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare double @expm1(double) [[NUWRN]] -// CHECK-NOERRNO: declare float @expm1f(float) [[NUWRN]] -// CHECK-NOERRNO: declare x86_fp80 @expm1l(x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare double @fdim(double, double) [[NUWRN]] -// CHECK-NOERRNO: declare float @fdimf(float, float) [[NUWRN]] -// CHECK-NOERRNO: declare x86_fp80 @fdiml(x86_fp80, x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare double @floor(double) [[NUWRN]] -// CHECK-NOERRNO: declare float @floorf(float) [[NUWRN]] -// CHECK-NOERRNO: declare x86_fp80 @floorl(x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare double @fma(double, double, double) [[NUWRN]] -// CHECK-NOERRNO: declare float @fmaf(float, float, float) [[NUWRN]] -// CHECK-NOERRNO: declare x86_fp80 @fmal(x86_fp80, x86_fp80, x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare double @fmax(double, double) [[NUWRN]] -// CHECK-NOERRNO: declare float @fmaxf(float, float) [[NUWRN]] -// CHECK-NOERRNO: declare x86_fp80 @fmaxl(x86_fp80, x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare double @fmin(double, double) [[NUWRN]] -// CHECK-NOERRNO: declare float @fminf(float, float) [[NUWRN]] -// CHECK-NOERRNO: declare x86_fp80 @fminl(x86_fp80, x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare double @hypot(double, double) [[NUWRN]] -// CHECK-NOERRNO: declare float @hypotf(float, float) [[NUWRN]] -// CHECK-NOERRNO: declare x86_fp80 @hypotl(x86_fp80, x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare i32 @ilogb(double) [[NUWRN]] -// CHECK-NOERRNO: declare i32 @ilogbf(float) [[NUWRN]] -// CHECK-NOERRNO: declare i32 @ilogbl(x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare double @lgamma(double) [[NONCONST:#[0-9]+]] -// CHECK-NOERRNO: declare float @lgammaf(float) [[NONCONST]] -// CHECK-NOERRNO: declare x86_fp80 @lgammal(x86_fp80) [[NONCONST]] -// CHECK-NOERRNO: declare i64 @llrint(double) [[NUWRN]] -// CHECK-NOERRNO: declare i64 @llrintf(float) [[NUWRN]] -// CHECK-NOERRNO: declare i64 @llrintl(x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare i64 @llround(double) [[NUWRN]] -// CHECK-NOERRNO: declare i64 @llroundf(float) [[NUWRN]] -// CHECK-NOERRNO: declare i64 @llroundl(x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare double @log(double) [[NUWRN]] -// CHECK-NOERRNO: declare float @logf(float) [[NUWRN]] -// CHECK-NOERRNO: declare x86_fp80 @logl(x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare double @log10(double) [[NUWRN]] -// CHECK-NOERRNO: declare float @log10f(float) [[NUWRN]] -// CHECK-NOERRNO: declare x86_fp80 @log10l(x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare double @log1p(double) [[NUWRN]] -// CHECK-NOERRNO: declare float @log1pf(float) [[NUWRN]] -// CHECK-NOERRNO: declare x86_fp80 @log1pl(x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare double @log2(double) [[NUWRN]] -// CHECK-NOERRNO: declare float @log2f(float) [[NUWRN]] -// CHECK-NOERRNO: declare x86_fp80 @log2l(x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare double @logb(double) [[NUWRN]] -// CHECK-NOERRNO: declare float @logbf(float) [[NUWRN]] -// CHECK-NOERRNO: declare x86_fp80 @logbl(x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare i64 @lrint(double) [[NUWRN]] -// CHECK-NOERRNO: declare i64 @lrintf(float) [[NUWRN]] -// CHECK-NOERRNO: declare i64 @lrintl(x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare i64 @lround(double) [[NUWRN]] -// CHECK-NOERRNO: declare i64 @lroundf(float) [[NUWRN]] -// CHECK-NOERRNO: declare i64 @lroundl(x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare double @nearbyint(double) [[NUWRN]] -// CHECK-NOERRNO: declare float @nearbyintf(float) [[NUWRN]] -// CHECK-NOERRNO: declare x86_fp80 @nearbyintl(x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare double @nextafter(double, double) [[NUWRN]] -// CHECK-NOERRNO: declare float @nextafterf(float, float) [[NUWRN]] -// CHECK-NOERRNO: declare x86_fp80 @nextafterl(x86_fp80, x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare double @nexttoward(double, x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare float @nexttowardf(float, x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare x86_fp80 @nexttowardl(x86_fp80, x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare double @remainder(double, double) [[NUWRN]] -// CHECK-NOERRNO: declare float @remainderf(float, float) [[NUWRN]] -// CHECK-NOERRNO: declare x86_fp80 @remainderl(x86_fp80, x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare double @rint(double) [[NUWRN]] -// CHECK-NOERRNO: declare float @rintf(float) [[NUWRN]] -// CHECK-NOERRNO: declare x86_fp80 @rintl(x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare double @round(double) [[NUWRN]] -// CHECK-NOERRNO: declare float @roundf(float) [[NUWRN]] -// CHECK-NOERRNO: declare x86_fp80 @roundl(x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare double @scalbln(double, i64) [[NUWRN]] -// CHECK-NOERRNO: declare float @scalblnf(float, i64) [[NUWRN]] -// CHECK-NOERRNO: declare x86_fp80 @scalblnl(x86_fp80, i64) [[NUWRN]] -// CHECK-NOERRNO: declare double @scalbn(double, i32) [[NUWRN]] -// CHECK-NOERRNO: declare float @scalbnf(float, i32) [[NUWRN]] -// CHECK-NOERRNO: declare x86_fp80 @scalbnl(x86_fp80, i32) [[NUWRN]] -// CHECK-NOERRNO: declare double @sin(double) [[NUWRN]] -// CHECK-NOERRNO: declare float @sinf(float) [[NUWRN]] -// CHECK-NOERRNO: declare x86_fp80 @sinl(x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare double @sinh(double) [[NUWRN]] -// CHECK-NOERRNO: declare float @sinhf(float) [[NUWRN]] -// CHECK-NOERRNO: declare x86_fp80 @sinhl(x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare double @sqrt(double) [[NUWRN]] -// CHECK-NOERRNO: declare float @sqrtf(float) [[NUWRN]] -// CHECK-NOERRNO: declare x86_fp80 @sqrtl(x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare double @tan(double) [[NUWRN]] -// CHECK-NOERRNO: declare float @tanf(float) [[NUWRN]] -// CHECK-NOERRNO: declare x86_fp80 @tanl(x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare double @tanh(double) [[NUWRN]] -// CHECK-NOERRNO: declare float @tanhf(float) [[NUWRN]] -// CHECK-NOERRNO: declare x86_fp80 @tanhl(x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare double @tgamma(double) [[NUWRN]] -// CHECK-NOERRNO: declare float @tgammaf(float) [[NUWRN]] -// CHECK-NOERRNO: declare x86_fp80 @tgammal(x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare double @trunc(double) [[NUWRN]] -// CHECK-NOERRNO: declare float @truncf(float) [[NUWRN]] -// CHECK-NOERRNO: declare x86_fp80 @truncl(x86_fp80) [[NUWRN]] -// CHECK-NOERRNO: declare double @cabs(double, double) [[NUWRN]] -// CHECK-NOERRNO: declare float @cabsf(<2 x float>) [[NUWRN]] -// CHECK-NOERRNO: declare { double, double } @cacos(double, double) [[NUWRN]] -// CHECK-NOERRNO: declare <2 x float> @cacosf(<2 x float>) [[NUWRN]] -// CHECK-NOERRNO: declare { double, double } @cacosh(double, double) [[NUWRN]] -// CHECK-NOERRNO: declare <2 x float> @cacoshf(<2 x float>) [[NUWRN]] -// CHECK-NOERRNO: declare double @carg(double, double) [[NUWRN]] -// CHECK-NOERRNO: declare float @cargf(<2 x float>) [[NUWRN]] -// CHECK-NOERRNO: declare { double, double } @casin(double, double) [[NUWRN]] -// CHECK-NOERRNO: declare <2 x float> @casinf(<2 x float>) [[NUWRN]] -// CHECK-NOERRNO: declare { double, double } @casinh(double, double) [[NUWRN]] -// CHECK-NOERRNO: declare <2 x float> @casinhf(<2 x float>) [[NUWRN]] -// CHECK-NOERRNO: declare { double, double } @catan(double, double) [[NUWRN]] -// CHECK-NOERRNO: declare <2 x float> @catanf(<2 x float>) [[NUWRN]] -// CHECK-NOERRNO: declare { double, double } @catanh(double, double) [[NUWRN]] -// CHECK-NOERRNO: declare <2 x float> @catanhf(<2 x float>) [[NUWRN]] -// CHECK-NOERRNO: declare { double, double } @ccos(double, double) [[NUWRN]] -// CHECK-NOERRNO: declare <2 x float> @ccosf(<2 x float>) [[NUWRN]] -// CHECK-NOERRNO: declare { double, double } @ccosh(double, double) [[NUWRN]] -// CHECK-NOERRNO: declare <2 x float> @ccoshf(<2 x float>) [[NUWRN]] -// CHECK-NOERRNO: declare { double, double } @cexp(double, double) [[NUWRN]] -// CHECK-NOERRNO: declare <2 x float> @cexpf(<2 x float>) [[NUWRN]] -// CHECK-NOERRNO: declare double @cimag(double, double) [[NUWRN]] -// CHECK-NOERRNO: declare float @cimagf(<2 x float>) [[NUWRN]] -// CHECK-NOERRNO: declare { double, double } @conj(double, double) [[NUWRN]] -// CHECK-NOERRNO: declare <2 x float> @conjf(<2 x float>) [[NUWRN]] -// CHECK-NOERRNO: declare { double, double } @clog(double, double) [[NUWRN]] -// CHECK-NOERRNO: declare <2 x float> @clogf(<2 x float>) [[NUWRN]] -// CHECK-NOERRNO: declare { double, double } @cproj(double, double) [[NUWRN]] -// CHECK-NOERRNO: declare <2 x float> @cprojf(<2 x float>) [[NUWRN]] -// CHECK-NOERRNO: declare { double, double } @cpow(double, double, double, double) [[NUWRN]] -// CHECK-NOERRNO: declare <2 x float> @cpowf(<2 x float>, <2 x float>) [[NUWRN]] -// CHECK-NOERRNO: declare double @creal(double, double) [[NUWRN]] -// CHECK-NOERRNO: declare float @crealf(<2 x float>) [[NUWRN]] -// CHECK-NOERRNO: declare { double, double } @csin(double, double) [[NUWRN]] -// CHECK-NOERRNO: declare <2 x float> @csinf(<2 x float>) [[NUWRN]] -// CHECK-NOERRNO: declare { double, double } @csinh(double, double) [[NUWRN]] -// CHECK-NOERRNO: declare <2 x float> @csinhf(<2 x float>) [[NUWRN]] -// CHECK-NOERRNO: declare { double, double } @csqrt(double, double) [[NUWRN]] -// CHECK-NOERRNO: declare <2 x float> @csqrtf(<2 x float>) [[NUWRN]] -// CHECK-NOERRNO: declare { double, double } @ctan(double, double) [[NUWRN]] -// CHECK-NOERRNO: declare <2 x float> @ctanf(<2 x float>) [[NUWRN]] -// CHECK-NOERRNO: declare { double, double } @ctanh(double, double) [[NUWRN]] -// CHECK-NOERRNO: declare <2 x float> @ctanhf(<2 x float>) [[NUWRN]] -// CHECK-NOERRNO: declare double @__sinpi(double) [[NUWRN]] -// CHECK-NOERRNO: declare float @__sinpif(float) [[NUWRN]] -// CHECK-NOERRNO: declare double @__cospi(double) [[NUWRN]] -// CHECK-NOERRNO: declare float @__cospif(float) [[NUWRN]] -// CHECK-NOERRNO: declare double @__tanpi(double) [[NUWRN]] -// CHECK-NOERRNO: declare float @__tanpif(float) [[NUWRN]] -// CHECK-NOERRNO: declare double @__exp10(double) [[NUWRN]] -// CHECK-NOERRNO: declare float @__exp10f(float) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @atan2(double frozen, double frozen) [[NUWRN:#[0-9]+]] +// CHECK-NOERRNO: declare frozen float @atan2f(float frozen, float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen x86_fp80 @atan2l(x86_fp80 frozen, x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen i32 @abs(i32 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen i64 @labs(i64 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen i64 @llabs(i64 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @copysign(double frozen, double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @copysignf(float frozen, float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen x86_fp80 @copysignl(x86_fp80 frozen, x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @fabs(double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @fabsf(float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen x86_fp80 @fabsl(x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @fmod(double frozen, double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @fmodf(float frozen, float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen x86_fp80 @fmodl(x86_fp80 frozen, x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @ldexp(double frozen, i32 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @ldexpf(float frozen, i32 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen x86_fp80 @ldexpl(x86_fp80 frozen, i32 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @nan(i8* frozen) [[NUWRO:#[0-9]+]] +// CHECK-NOERRNO: declare frozen float @nanf(i8* frozen) [[NUWRO]] +// CHECK-NOERRNO: declare frozen x86_fp80 @nanl(i8* frozen) [[NUWRO]] +// CHECK-NOERRNO: declare frozen double @pow(double frozen, double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @powf(float frozen, float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen x86_fp80 @powl(x86_fp80 frozen, x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @acos(double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @acosf(float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen x86_fp80 @acosl(x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @acosh(double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @acoshf(float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen x86_fp80 @acoshl(x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @asin(double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @asinf(float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen x86_fp80 @asinl(x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @asinh(double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @asinhf(float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen x86_fp80 @asinhl(x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @atan(double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @atanf(float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen x86_fp80 @atanl(x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @atanh(double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @atanhf(float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen x86_fp80 @atanhl(x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @cbrt(double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @cbrtf(float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen x86_fp80 @cbrtl(x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @ceil(double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @ceilf(float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen x86_fp80 @ceill(x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @cos(double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @cosf(float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen x86_fp80 @cosl(x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @cosh(double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @coshf(float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen x86_fp80 @coshl(x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @erf(double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @erff(float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen x86_fp80 @erfl(x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @erfc(double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @erfcf(float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen x86_fp80 @erfcl(x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @exp(double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @expf(float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen x86_fp80 @expl(x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @exp2(double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @exp2f(float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen x86_fp80 @exp2l(x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @expm1(double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @expm1f(float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen x86_fp80 @expm1l(x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @fdim(double frozen, double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @fdimf(float frozen, float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen x86_fp80 @fdiml(x86_fp80 frozen, x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @floor(double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @floorf(float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen x86_fp80 @floorl(x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @fma(double frozen, double frozen, double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @fmaf(float frozen, float frozen, float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen x86_fp80 @fmal(x86_fp80 frozen, x86_fp80 frozen, x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @fmax(double frozen, double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @fmaxf(float frozen, float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen x86_fp80 @fmaxl(x86_fp80 frozen, x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @fmin(double frozen, double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @fminf(float frozen, float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen x86_fp80 @fminl(x86_fp80 frozen, x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @hypot(double frozen, double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @hypotf(float frozen, float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen x86_fp80 @hypotl(x86_fp80 frozen, x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen i32 @ilogb(double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen i32 @ilogbf(float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen i32 @ilogbl(x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @lgamma(double frozen) [[NONCONST:#[0-9]+]] +// CHECK-NOERRNO: declare frozen float @lgammaf(float frozen) [[NONCONST]] +// CHECK-NOERRNO: declare frozen x86_fp80 @lgammal(x86_fp80 frozen) [[NONCONST]] +// CHECK-NOERRNO: declare frozen i64 @llrint(double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen i64 @llrintf(float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen i64 @llrintl(x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen i64 @llround(double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen i64 @llroundf(float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen i64 @llroundl(x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @log(double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @logf(float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen x86_fp80 @logl(x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @log10(double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @log10f(float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen x86_fp80 @log10l(x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @log1p(double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @log1pf(float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen x86_fp80 @log1pl(x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @log2(double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @log2f(float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen x86_fp80 @log2l(x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @logb(double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @logbf(float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen x86_fp80 @logbl(x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen i64 @lrint(double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen i64 @lrintf(float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen i64 @lrintl(x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen i64 @lround(double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen i64 @lroundf(float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen i64 @lroundl(x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @nearbyint(double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @nearbyintf(float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen x86_fp80 @nearbyintl(x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @nextafter(double frozen, double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @nextafterf(float frozen, float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen x86_fp80 @nextafterl(x86_fp80 frozen, x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @nexttoward(double frozen, x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @nexttowardf(float frozen, x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen x86_fp80 @nexttowardl(x86_fp80 frozen, x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @remainder(double frozen, double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @remainderf(float frozen, float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen x86_fp80 @remainderl(x86_fp80 frozen, x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @rint(double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @rintf(float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen x86_fp80 @rintl(x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @round(double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @roundf(float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen x86_fp80 @roundl(x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @scalbln(double frozen, i64 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @scalblnf(float frozen, i64 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen x86_fp80 @scalblnl(x86_fp80 frozen, i64 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @scalbn(double frozen, i32 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @scalbnf(float frozen, i32 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen x86_fp80 @scalbnl(x86_fp80 frozen, i32 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @sin(double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @sinf(float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen x86_fp80 @sinl(x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @sinh(double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @sinhf(float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen x86_fp80 @sinhl(x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @sqrt(double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @sqrtf(float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen x86_fp80 @sqrtl(x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @tan(double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @tanf(float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen x86_fp80 @tanl(x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @tanh(double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @tanhf(float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen x86_fp80 @tanhl(x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @tgamma(double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @tgammaf(float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen x86_fp80 @tgammal(x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @trunc(double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @truncf(float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen x86_fp80 @truncl(x86_fp80 frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @cabs(double frozen, double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @cabsf(<2 x float> frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen { double, double } @cacos(double frozen, double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen <2 x float> @cacosf(<2 x float> frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen { double, double } @cacosh(double frozen, double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen <2 x float> @cacoshf(<2 x float> frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @carg(double frozen, double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @cargf(<2 x float> frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen { double, double } @casin(double frozen, double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen <2 x float> @casinf(<2 x float> frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen { double, double } @casinh(double frozen, double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen <2 x float> @casinhf(<2 x float> frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen { double, double } @catan(double frozen, double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen <2 x float> @catanf(<2 x float> frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen { double, double } @catanh(double frozen, double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen <2 x float> @catanhf(<2 x float> frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen { double, double } @ccos(double frozen, double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen <2 x float> @ccosf(<2 x float> frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen { double, double } @ccosh(double frozen, double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen <2 x float> @ccoshf(<2 x float> frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen { double, double } @cexp(double frozen, double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen <2 x float> @cexpf(<2 x float> frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @cimag(double frozen, double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @cimagf(<2 x float> frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen { double, double } @conj(double frozen, double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen <2 x float> @conjf(<2 x float> frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen { double, double } @clog(double frozen, double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen <2 x float> @clogf(<2 x float> frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen { double, double } @cproj(double frozen, double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen <2 x float> @cprojf(<2 x float> frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen { double, double } @cpow(double frozen, double frozen, double frozen, double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen <2 x float> @cpowf(<2 x float> frozen, <2 x float> frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @creal(double frozen, double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @crealf(<2 x float> frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen { double, double } @csin(double frozen, double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen <2 x float> @csinf(<2 x float> frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen { double, double } @csinh(double frozen, double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen <2 x float> @csinhf(<2 x float> frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen { double, double } @csqrt(double frozen, double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen <2 x float> @csqrtf(<2 x float> frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen { double, double } @ctan(double frozen, double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen <2 x float> @ctanf(<2 x float> frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen { double, double } @ctanh(double frozen, double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen <2 x float> @ctanhf(<2 x float> frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @__sinpi(double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @__sinpif(float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @__cospi(double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @__cospif(float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @__tanpi(double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @__tanpif(float frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen double @__exp10(double frozen) [[NUWRN]] +// CHECK-NOERRNO: declare frozen float @__exp10f(float frozen) [[NUWRN]] -// CHECK-ERRNO: declare i32 @abs(i32) [[NUWRN:#[0-9]+]] -// CHECK-ERRNO: declare i64 @labs(i64) [[NUWRN]] -// CHECK-ERRNO: declare i64 @llabs(i64) [[NUWRN]] -// CHECK-ERRNO: declare double @copysign(double, double) [[NUWRN]] -// CHECK-ERRNO: declare float @copysignf(float, float) [[NUWRN]] -// CHECK-ERRNO: declare x86_fp80 @copysignl(x86_fp80, x86_fp80) [[NUWRN]] -// CHECK-ERRNO: declare double @fabs(double) [[NUWRN]] -// CHECK-ERRNO: declare float @fabsf(float) [[NUWRN]] -// CHECK-ERRNO: declare x86_fp80 @fabsl(x86_fp80) [[NUWRN]] -// CHECK-ERRNO: declare double @nan(i8*) [[NUWRO:#[0-9]+]] -// CHECK-ERRNO: declare float @nanf(i8*) [[NUWRO]] -// CHECK-ERRNO: declare x86_fp80 @nanl(i8*) [[NUWRO]] -// CHECK-ERRNO: declare double @ceil(double) [[NUWRN]] -// CHECK-ERRNO: declare float @ceilf(float) [[NUWRN]] -// CHECK-ERRNO: declare x86_fp80 @ceill(x86_fp80) [[NUWRN]] -// CHECK-ERRNO: declare double @floor(double) [[NUWRN]] -// CHECK-ERRNO: declare float @floorf(float) [[NUWRN]] -// CHECK-ERRNO: declare x86_fp80 @floorl(x86_fp80) [[NUWRN]] -// CHECK-ERRNO: declare double @fmax(double, double) [[NUWRN]] -// CHECK-ERRNO: declare float @fmaxf(float, float) [[NUWRN]] -// CHECK-ERRNO: declare x86_fp80 @fmaxl(x86_fp80, x86_fp80) [[NUWRN]] -// CHECK-ERRNO: declare double @fmin(double, double) [[NUWRN]] -// CHECK-ERRNO: declare float @fminf(float, float) [[NUWRN]] -// CHECK-ERRNO: declare x86_fp80 @fminl(x86_fp80, x86_fp80) [[NUWRN]] -// CHECK-ERRNO: declare double @lgamma(double) [[NONCONST:#[0-9]+]] -// CHECK-ERRNO: declare float @lgammaf(float) [[NONCONST]] -// CHECK-ERRNO: declare x86_fp80 @lgammal(x86_fp80) [[NONCONST]] -// CHECK-ERRNO: declare double @nearbyint(double) [[NUWRN]] -// CHECK-ERRNO: declare float @nearbyintf(float) [[NUWRN]] -// CHECK-ERRNO: declare x86_fp80 @nearbyintl(x86_fp80) [[NUWRN]] -// CHECK-ERRNO: declare double @rint(double) [[NUWRN]] -// CHECK-ERRNO: declare float @rintf(float) [[NUWRN]] -// CHECK-ERRNO: declare x86_fp80 @rintl(x86_fp80) [[NUWRN]] -// CHECK-ERRNO: declare double @round(double) [[NUWRN]] -// CHECK-ERRNO: declare float @roundf(float) [[NUWRN]] -// CHECK-ERRNO: declare x86_fp80 @roundl(x86_fp80) [[NUWRN]] -// CHECK-ERRNO: declare double @trunc(double) [[NUWRN]] -// CHECK-ERRNO: declare float @truncf(float) [[NUWRN]] -// CHECK-ERRNO: declare x86_fp80 @truncl(x86_fp80) [[NUWRN]] -// CHECK-ERRNO: declare double @cabs(double, double) [[NONCONST]] -// CHECK-ERRNO: declare float @cabsf(<2 x float>) [[NONCONST]] -// CHECK-ERRNO: declare { double, double } @cacos(double, double) [[NONCONST]] -// CHECK-ERRNO: declare <2 x float> @cacosf(<2 x float>) [[NONCONST]] -// CHECK-ERRNO: declare { double, double } @cacosh(double, double) [[NONCONST]] -// CHECK-ERRNO: declare <2 x float> @cacoshf(<2 x float>) [[NONCONST]] -// CHECK-ERRNO: declare double @carg(double, double) [[NONCONST]] -// CHECK-ERRNO: declare float @cargf(<2 x float>) [[NONCONST]] -// CHECK-ERRNO: declare { double, double } @casin(double, double) [[NONCONST]] -// CHECK-ERRNO: declare <2 x float> @casinf(<2 x float>) [[NONCONST]] -// CHECK-ERRNO: declare { double, double } @casinh(double, double) [[NONCONST]] -// CHECK-ERRNO: declare <2 x float> @casinhf(<2 x float>) [[NONCONST]] -// CHECK-ERRNO: declare { double, double } @catan(double, double) [[NONCONST]] -// CHECK-ERRNO: declare <2 x float> @catanf(<2 x float>) [[NONCONST]] -// CHECK-ERRNO: declare { double, double } @catanh(double, double) [[NONCONST]] -// CHECK-ERRNO: declare <2 x float> @catanhf(<2 x float>) [[NONCONST]] -// CHECK-ERRNO: declare { double, double } @ccos(double, double) [[NONCONST]] -// CHECK-ERRNO: declare <2 x float> @ccosf(<2 x float>) [[NONCONST]] -// CHECK-ERRNO: declare { double, double } @ccosh(double, double) [[NONCONST]] -// CHECK-ERRNO: declare <2 x float> @ccoshf(<2 x float>) [[NONCONST]] -// CHECK-ERRNO: declare { double, double } @cexp(double, double) [[NONCONST]] -// CHECK-ERRNO: declare <2 x float> @cexpf(<2 x float>) [[NONCONST]] -// CHECK-ERRNO: declare double @cimag(double, double) [[NUWRN]] -// CHECK-ERRNO: declare float @cimagf(<2 x float>) [[NUWRN]] -// CHECK-ERRNO: declare { double, double } @conj(double, double) [[NUWRN]] -// CHECK-ERRNO: declare <2 x float> @conjf(<2 x float>) [[NUWRN]] -// CHECK-ERRNO: declare { double, double } @clog(double, double) [[NONCONST]] -// CHECK-ERRNO: declare <2 x float> @clogf(<2 x float>) [[NONCONST]] -// CHECK-ERRNO: declare { double, double } @cproj(double, double) [[NUWRN]] -// CHECK-ERRNO: declare <2 x float> @cprojf(<2 x float>) [[NUWRN]] -// CHECK-ERRNO: declare { double, double } @cpow(double, double, double, double) [[NONCONST]] -// CHECK-ERRNO: declare <2 x float> @cpowf(<2 x float>, <2 x float>) [[NONCONST]] -// CHECK-ERRNO: declare double @creal(double, double) [[NUWRN]] -// CHECK-ERRNO: declare float @crealf(<2 x float>) [[NUWRN]] -// CHECK-ERRNO: declare { double, double } @csin(double, double) [[NONCONST]] -// CHECK-ERRNO: declare <2 x float> @csinf(<2 x float>) [[NONCONST]] -// CHECK-ERRNO: declare { double, double } @csinh(double, double) [[NONCONST]] -// CHECK-ERRNO: declare <2 x float> @csinhf(<2 x float>) [[NONCONST]] -// CHECK-ERRNO: declare { double, double } @csqrt(double, double) [[NONCONST]] -// CHECK-ERRNO: declare <2 x float> @csqrtf(<2 x float>) [[NONCONST]] -// CHECK-ERRNO: declare { double, double } @ctan(double, double) [[NONCONST]] -// CHECK-ERRNO: declare <2 x float> @ctanf(<2 x float>) [[NONCONST]] -// CHECK-ERRNO: declare { double, double } @ctanh(double, double) [[NONCONST]] -// CHECK-ERRNO: declare <2 x float> @ctanhf(<2 x float>) [[NONCONST]] +// CHECK-ERRNO: declare frozen i32 @abs(i32 frozen) [[NUWRN:#[0-9]+]] +// CHECK-ERRNO: declare frozen i64 @labs(i64 frozen) [[NUWRN]] +// CHECK-ERRNO: declare frozen i64 @llabs(i64 frozen) [[NUWRN]] +// CHECK-ERRNO: declare frozen double @copysign(double frozen, double frozen) [[NUWRN]] +// CHECK-ERRNO: declare frozen float @copysignf(float frozen, float frozen) [[NUWRN]] +// CHECK-ERRNO: declare frozen x86_fp80 @copysignl(x86_fp80 frozen, x86_fp80 frozen) [[NUWRN]] +// CHECK-ERRNO: declare frozen double @fabs(double frozen) [[NUWRN]] +// CHECK-ERRNO: declare frozen float @fabsf(float frozen) [[NUWRN]] +// CHECK-ERRNO: declare frozen x86_fp80 @fabsl(x86_fp80 frozen) [[NUWRN]] +// CHECK-ERRNO: declare frozen double @nan(i8* frozen) [[NUWRO:#[0-9]+]] +// CHECK-ERRNO: declare frozen float @nanf(i8* frozen) [[NUWRO]] +// CHECK-ERRNO: declare frozen x86_fp80 @nanl(i8* frozen) [[NUWRO]] +// CHECK-ERRNO: declare frozen double @ceil(double frozen) [[NUWRN]] +// CHECK-ERRNO: declare frozen float @ceilf(float frozen) [[NUWRN]] +// CHECK-ERRNO: declare frozen x86_fp80 @ceill(x86_fp80 frozen) [[NUWRN]] +// CHECK-ERRNO: declare frozen double @floor(double frozen) [[NUWRN]] +// CHECK-ERRNO: declare frozen float @floorf(float frozen) [[NUWRN]] +// CHECK-ERRNO: declare frozen x86_fp80 @floorl(x86_fp80 frozen) [[NUWRN]] +// CHECK-ERRNO: declare frozen double @fmax(double frozen, double frozen) [[NUWRN]] +// CHECK-ERRNO: declare frozen float @fmaxf(float frozen, float frozen) [[NUWRN]] +// CHECK-ERRNO: declare frozen x86_fp80 @fmaxl(x86_fp80 frozen, x86_fp80 frozen) [[NUWRN]] +// CHECK-ERRNO: declare frozen double @fmin(double frozen, double frozen) [[NUWRN]] +// CHECK-ERRNO: declare frozen float @fminf(float frozen, float frozen) [[NUWRN]] +// CHECK-ERRNO: declare frozen x86_fp80 @fminl(x86_fp80 frozen, x86_fp80 frozen) [[NUWRN]] +// CHECK-ERRNO: declare frozen double @lgamma(double frozen) [[NONCONST:#[0-9]+]] +// CHECK-ERRNO: declare frozen float @lgammaf(float frozen) [[NONCONST]] +// CHECK-ERRNO: declare frozen x86_fp80 @lgammal(x86_fp80 frozen) [[NONCONST]] +// CHECK-ERRNO: declare frozen double @nearbyint(double frozen) [[NUWRN]] +// CHECK-ERRNO: declare frozen float @nearbyintf(float frozen) [[NUWRN]] +// CHECK-ERRNO: declare frozen x86_fp80 @nearbyintl(x86_fp80 frozen) [[NUWRN]] +// CHECK-ERRNO: declare frozen double @rint(double frozen) [[NUWRN]] +// CHECK-ERRNO: declare frozen float @rintf(float frozen) [[NUWRN]] +// CHECK-ERRNO: declare frozen x86_fp80 @rintl(x86_fp80 frozen) [[NUWRN]] +// CHECK-ERRNO: declare frozen double @round(double frozen) [[NUWRN]] +// CHECK-ERRNO: declare frozen float @roundf(float frozen) [[NUWRN]] +// CHECK-ERRNO: declare frozen x86_fp80 @roundl(x86_fp80 frozen) [[NUWRN]] +// CHECK-ERRNO: declare frozen double @trunc(double frozen) [[NUWRN]] +// CHECK-ERRNO: declare frozen float @truncf(float frozen) [[NUWRN]] +// CHECK-ERRNO: declare frozen x86_fp80 @truncl(x86_fp80 frozen) [[NUWRN]] +// CHECK-ERRNO: declare frozen double @cabs(double frozen, double frozen) [[NONCONST]] +// CHECK-ERRNO: declare frozen float @cabsf(<2 x float> frozen) [[NONCONST]] +// CHECK-ERRNO: declare frozen { double, double } @cacos(double frozen, double frozen) [[NONCONST]] +// CHECK-ERRNO: declare frozen <2 x float> @cacosf(<2 x float> frozen) [[NONCONST]] +// CHECK-ERRNO: declare frozen { double, double } @cacosh(double frozen, double frozen) [[NONCONST]] +// CHECK-ERRNO: declare frozen <2 x float> @cacoshf(<2 x float> frozen) [[NONCONST]] +// CHECK-ERRNO: declare frozen double @carg(double frozen, double frozen) [[NONCONST]] +// CHECK-ERRNO: declare frozen float @cargf(<2 x float> frozen) [[NONCONST]] +// CHECK-ERRNO: declare frozen { double, double } @casin(double frozen, double frozen) [[NONCONST]] +// CHECK-ERRNO: declare frozen <2 x float> @casinf(<2 x float> frozen) [[NONCONST]] +// CHECK-ERRNO: declare frozen { double, double } @casinh(double frozen, double frozen) [[NONCONST]] +// CHECK-ERRNO: declare frozen <2 x float> @casinhf(<2 x float> frozen) [[NONCONST]] +// CHECK-ERRNO: declare frozen { double, double } @catan(double frozen, double frozen) [[NONCONST]] +// CHECK-ERRNO: declare frozen <2 x float> @catanf(<2 x float> frozen) [[NONCONST]] +// CHECK-ERRNO: declare frozen { double, double } @catanh(double frozen, double frozen) [[NONCONST]] +// CHECK-ERRNO: declare frozen <2 x float> @catanhf(<2 x float> frozen) [[NONCONST]] +// CHECK-ERRNO: declare frozen { double, double } @ccos(double frozen, double frozen) [[NONCONST]] +// CHECK-ERRNO: declare frozen <2 x float> @ccosf(<2 x float> frozen) [[NONCONST]] +// CHECK-ERRNO: declare frozen { double, double } @ccosh(double frozen, double frozen) [[NONCONST]] +// CHECK-ERRNO: declare frozen <2 x float> @ccoshf(<2 x float> frozen) [[NONCONST]] +// CHECK-ERRNO: declare frozen { double, double } @cexp(double frozen, double frozen) [[NONCONST]] +// CHECK-ERRNO: declare frozen <2 x float> @cexpf(<2 x float> frozen) [[NONCONST]] +// CHECK-ERRNO: declare frozen double @cimag(double frozen, double frozen) [[NUWRN]] +// CHECK-ERRNO: declare frozen float @cimagf(<2 x float> frozen) [[NUWRN]] +// CHECK-ERRNO: declare frozen { double, double } @conj(double frozen, double frozen) [[NUWRN]] +// CHECK-ERRNO: declare frozen <2 x float> @conjf(<2 x float> frozen) [[NUWRN]] +// CHECK-ERRNO: declare frozen { double, double } @clog(double frozen, double frozen) [[NONCONST]] +// CHECK-ERRNO: declare frozen <2 x float> @clogf(<2 x float> frozen) [[NONCONST]] +// CHECK-ERRNO: declare frozen { double, double } @cproj(double frozen, double frozen) [[NUWRN]] +// CHECK-ERRNO: declare frozen <2 x float> @cprojf(<2 x float> frozen) [[NUWRN]] +// CHECK-ERRNO: declare frozen { double, double } @cpow(double frozen, double frozen, double frozen, double frozen) [[NONCONST]] +// CHECK-ERRNO: declare frozen <2 x float> @cpowf(<2 x float> frozen, <2 x float> frozen) [[NONCONST]] +// CHECK-ERRNO: declare frozen double @creal(double frozen, double frozen) [[NUWRN]] +// CHECK-ERRNO: declare frozen float @crealf(<2 x float> frozen) [[NUWRN]] +// CHECK-ERRNO: declare frozen { double, double } @csin(double frozen, double frozen) [[NONCONST]] +// CHECK-ERRNO: declare frozen <2 x float> @csinf(<2 x float> frozen) [[NONCONST]] +// CHECK-ERRNO: declare frozen { double, double } @csinh(double frozen, double frozen) [[NONCONST]] +// CHECK-ERRNO: declare frozen <2 x float> @csinhf(<2 x float> frozen) [[NONCONST]] +// CHECK-ERRNO: declare frozen { double, double } @csqrt(double frozen, double frozen) [[NONCONST]] +// CHECK-ERRNO: declare frozen <2 x float> @csqrtf(<2 x float> frozen) [[NONCONST]] +// CHECK-ERRNO: declare frozen { double, double } @ctan(double frozen, double frozen) [[NONCONST]] +// CHECK-ERRNO: declare frozen <2 x float> @ctanf(<2 x float> frozen) [[NONCONST]] +// CHECK-ERRNO: declare frozen { double, double } @ctanh(double frozen, double frozen) [[NONCONST]] +// CHECK-ERRNO: declare frozen <2 x float> @ctanhf(<2 x float> frozen) [[NONCONST]] // CHECK-NOERRNO: attributes [[NUWRN]] = { nounwind readnone{{.*}} } // CHECK-NOERRNO: attributes [[NUWRO]] = { nounwind readonly{{.*}} } diff --git a/clang/test/CodeGen/libcalls-complex.c b/clang/test/CodeGen/libcalls-complex.c --- a/clang/test/CodeGen/libcalls-complex.c +++ b/clang/test/CodeGen/libcalls-complex.c @@ -14,36 +14,36 @@ double test_creal(double _Complex z) { return creal(z); - // CHECK-NO-NOT: call double @creal - // CHECK-YES: call double @creal + // CHECK-NO-NOT: call frozen double @creal + // CHECK-YES: call frozen double @creal } long double test_creall(double _Complex z) { return creall(z); - // CHECK-NO-NOT: call x86_fp80 @creall - // CHECK-YES: call x86_fp80 @creall + // CHECK-NO-NOT: call frozen x86_fp80 @creall + // CHECK-YES: call frozen x86_fp80 @creall } float test_crealf(double _Complex z) { return crealf(z); - // CHECK-NO-NOT: call float @crealf - // CHECK-YES: call float @crealf + // CHECK-NO-NOT: call frozen float @crealf + // CHECK-YES: call frozen float @crealf } double test_cimag(double _Complex z) { return cimag(z); - // CHECK-NO-NOT: call double @cimag - // CHECK-YES: call double @cimag + // CHECK-NO-NOT: call frozen double @cimag + // CHECK-YES: call frozen double @cimag } long double test_cimagl(double _Complex z) { return cimagl(z); - // CHECK-NO-NOT: call x86_fp80 @cimagl - // CHECK-YES: call x86_fp80 @cimagl + // CHECK-NO-NOT: call frozen x86_fp80 @cimagl + // CHECK-YES: call frozen x86_fp80 @cimagl } float test_cimagf(double _Complex z) { return cimagf(z); - // CHECK-NO-NOT: call float @cimagf - // CHECK-YES: call float @cimagf + // CHECK-NO-NOT: call frozen float @cimagf + // CHECK-YES: call frozen float @cimagf } diff --git a/clang/test/CodeGen/libcalls.c b/clang/test/CodeGen/libcalls.c --- a/clang/test/CodeGen/libcalls.c +++ b/clang/test/CodeGen/libcalls.c @@ -6,25 +6,25 @@ // CHECK-NO-LABEL: define void @test_sqrt // CHECK-FAST-LABEL: define void @test_sqrt void test_sqrt(float a0, double a1, long double a2) { - // CHECK-YES: call float @sqrtf + // CHECK-YES: call frozen float @sqrtf // CHECK-NO: call float @llvm.sqrt.f32(float // CHECK-FAST: call reassoc nsz arcp afn float @llvm.sqrt.f32(float float l0 = sqrtf(a0); - // CHECK-YES: call double @sqrt + // CHECK-YES: call frozen double @sqrt // CHECK-NO: call double @llvm.sqrt.f64(double // CHECK-FAST: call reassoc nsz arcp afn double @llvm.sqrt.f64(double double l1 = sqrt(a1); - // CHECK-YES: call x86_fp80 @sqrtl + // CHECK-YES: call frozen x86_fp80 @sqrtl // CHECK-NO: call x86_fp80 @llvm.sqrt.f80(x86_fp80 // CHECK-FAST: call reassoc nsz arcp afn x86_fp80 @llvm.sqrt.f80(x86_fp80 long double l2 = sqrtl(a2); } -// CHECK-YES: declare float @sqrtf(float) -// CHECK-YES: declare double @sqrt(double) -// CHECK-YES: declare x86_fp80 @sqrtl(x86_fp80) +// CHECK-YES: declare frozen float @sqrtf(float frozen) +// CHECK-YES: declare frozen double @sqrt(double frozen) +// CHECK-YES: declare frozen x86_fp80 @sqrtl(x86_fp80 frozen) // CHECK-NO: declare float @llvm.sqrt.f32(float) // CHECK-NO: declare double @llvm.sqrt.f64(double) // CHECK-NO: declare x86_fp80 @llvm.sqrt.f80(x86_fp80) @@ -35,22 +35,22 @@ // CHECK-YES-LABEL: define void @test_pow // CHECK-NO-LABEL: define void @test_pow void test_pow(float a0, double a1, long double a2) { - // CHECK-YES: call float @powf + // CHECK-YES: call frozen float @powf // CHECK-NO: call float @llvm.pow.f32 float l0 = powf(a0, a0); - // CHECK-YES: call double @pow + // CHECK-YES: call frozen double @pow // CHECK-NO: call double @llvm.pow.f64 double l1 = pow(a1, a1); - // CHECK-YES: call x86_fp80 @powl + // CHECK-YES: call frozen x86_fp80 @powl // CHECK-NO: call x86_fp80 @llvm.pow.f80 long double l2 = powl(a2, a2); } -// CHECK-YES: declare float @powf(float, float) -// CHECK-YES: declare double @pow(double, double) -// CHECK-YES: declare x86_fp80 @powl(x86_fp80, x86_fp80) +// CHECK-YES: declare frozen float @powf(float frozen, float frozen) +// CHECK-YES: declare frozen double @pow(double frozen, double frozen) +// CHECK-YES: declare frozen x86_fp80 @powl(x86_fp80 frozen, x86_fp80 frozen) // CHECK-NO: declare float @llvm.pow.f32(float, float) [[NUW_RNI:#[0-9]+]] // CHECK-NO: declare double @llvm.pow.f64(double, double) [[NUW_RNI]] // CHECK-NO: declare x86_fp80 @llvm.pow.f80(x86_fp80, x86_fp80) [[NUW_RNI]] @@ -58,22 +58,22 @@ // CHECK-YES-LABEL: define void @test_fma // CHECK-NO-LABEL: define void @test_fma void test_fma(float a0, double a1, long double a2) { - // CHECK-YES: call float @fmaf + // CHECK-YES: call frozen float @fmaf // CHECK-NO: call float @llvm.fma.f32 float l0 = fmaf(a0, a0, a0); - // CHECK-YES: call double @fma + // CHECK-YES: call frozen double @fma // CHECK-NO: call double @llvm.fma.f64 double l1 = fma(a1, a1, a1); - // CHECK-YES: call x86_fp80 @fmal + // CHECK-YES: call frozen x86_fp80 @fmal // CHECK-NO: call x86_fp80 @llvm.fma.f80 long double l2 = fmal(a2, a2, a2); } -// CHECK-YES: declare float @fmaf(float, float, float) -// CHECK-YES: declare double @fma(double, double, double) -// CHECK-YES: declare x86_fp80 @fmal(x86_fp80, x86_fp80, x86_fp80) +// CHECK-YES: declare frozen float @fmaf(float frozen, float frozen, float frozen) +// CHECK-YES: declare frozen double @fma(double frozen, double frozen, double frozen) +// CHECK-YES: declare frozen x86_fp80 @fmal(x86_fp80 frozen, x86_fp80 frozen, x86_fp80 frozen) // CHECK-NO: declare float @llvm.fma.f32(float, float, float) [[NUW_RN2:#[0-9]+]] // CHECK-NO: declare double @llvm.fma.f64(double, double, double) [[NUW_RN2]] // CHECK-NO: declare x86_fp80 @llvm.fma.f80(x86_fp80, x86_fp80, x86_fp80) [[NUW_RN2]] @@ -85,22 +85,22 @@ double atan_ = atan(d); long double atanl_ = atanl(ld); float atanf_ = atanf(f); -// CHECK-NO: declare double @atan(double) [[NUW_RN:#[0-9]+]] -// CHECK-NO: declare x86_fp80 @atanl(x86_fp80) [[NUW_RN]] -// CHECK-NO: declare float @atanf(float) [[NUW_RN]] -// CHECK-YES-NOT: declare double @atan(double) [[NUW_RN]] -// CHECK-YES-NOT: declare x86_fp80 @atanl(x86_fp80) [[NUW_RN]] -// CHECK-YES-NOT: declare float @atanf(float) [[NUW_RN]] +// CHECK-NO: declare frozen double @atan(double frozen) [[NUW_RN:#[0-9]+]] +// CHECK-NO: declare frozen x86_fp80 @atanl(x86_fp80 frozen) [[NUW_RN]] +// CHECK-NO: declare frozen float @atanf(float frozen) [[NUW_RN]] +// CHECK-YES-NOT: declare frozen double @atan(double frozen) [[NUW_RN]] +// CHECK-YES-NOT: declare frozen x86_fp80 @atanl(x86_fp80 frozen) [[NUW_RN]] +// CHECK-YES-NOT: declare frozen float @atanf(float frozen) [[NUW_RN]] double atan2_ = atan2(d, 2); long double atan2l_ = atan2l(ld, ld); float atan2f_ = atan2f(f, f); -// CHECK-NO: declare double @atan2(double, double) [[NUW_RN]] -// CHECK-NO: declare x86_fp80 @atan2l(x86_fp80, x86_fp80) [[NUW_RN]] -// CHECK-NO: declare float @atan2f(float, float) [[NUW_RN]] -// CHECK-YES-NOT: declare double @atan2(double, double) [[NUW_RN]] -// CHECK-YES-NOT: declare x86_fp80 @atan2l(x86_fp80, x86_fp80) [[NUW_RN]] -// CHECK-YES-NOT: declare float @atan2f(float, float) [[NUW_RN]] +// CHECK-NO: declare frozen double @atan2(double frozen, double frozen) [[NUW_RN]] +// CHECK-NO: declare frozen x86_fp80 @atan2l(x86_fp80 frozen, x86_fp80 frozen) [[NUW_RN]] +// CHECK-NO: declare frozen float @atan2f(float frozen, float frozen) [[NUW_RN]] +// CHECK-YES-NOT: declare frozen double @atan2(double frozen, double frozen) [[NUW_RN]] +// CHECK-YES-NOT: declare frozen x86_fp80 @atan2l(x86_fp80 frozen, x86_fp80 frozen) [[NUW_RN]] +// CHECK-YES-NOT: declare frozen float @atan2f(float frozen, float frozen) [[NUW_RN]] double exp_ = exp(d); long double expl_ = expl(ld); @@ -108,9 +108,9 @@ // CHECK-NO: declare double @llvm.exp.f64(double) [[NUW_RNI]] // CHECK-NO: declare x86_fp80 @llvm.exp.f80(x86_fp80) [[NUW_RNI]] // CHECK-NO: declare float @llvm.exp.f32(float) [[NUW_RNI]] -// CHECK-YES-NOT: declare double @exp(double) [[NUW_RN]] -// CHECK-YES-NOT: declare x86_fp80 @expl(x86_fp80) [[NUW_RN]] -// CHECK-YES-NOT: declare float @expf(float) [[NUW_RN]] +// CHECK-YES-NOT: declare frozen double @exp(double frozen) [[NUW_RN]] +// CHECK-YES-NOT: declare frozen x86_fp80 @expl(x86_fp80 frozen) [[NUW_RN]] +// CHECK-YES-NOT: declare frozen float @expf(float frozen) [[NUW_RN]] double log_ = log(d); long double logl_ = logl(ld); @@ -118,9 +118,9 @@ // CHECK-NO: declare double @llvm.log.f64(double) [[NUW_RNI]] // CHECK-NO: declare x86_fp80 @llvm.log.f80(x86_fp80) [[NUW_RNI]] // CHECK-NO: declare float @llvm.log.f32(float) [[NUW_RNI]] -// CHECK-YES-NOT: declare double @log(double) [[NUW_RN]] -// CHECK-YES-NOT: declare x86_fp80 @logl(x86_fp80) [[NUW_RN]] -// CHECK-YES-NOT: declare float @logf(float) [[NUW_RN]] +// CHECK-YES-NOT: declare frozen double @log(double frozen) [[NUW_RN]] +// CHECK-YES-NOT: declare frozen x86_fp80 @logl(x86_fp80 frozen) [[NUW_RN]] +// CHECK-YES-NOT: declare frozen float @logf(float frozen) [[NUW_RN]] } // CHECK-NO-DAG: attributes [[NUW_RN]] = { nounwind readnone{{.*}} } diff --git a/clang/test/CodeGen/lifetime-debuginfo-1.c b/clang/test/CodeGen/lifetime-debuginfo-1.c --- a/clang/test/CodeGen/lifetime-debuginfo-1.c +++ b/clang/test/CodeGen/lifetime-debuginfo-1.c @@ -5,7 +5,7 @@ extern int x; -// CHECK-LABEL: define i32 @f +// CHECK-LABEL: define frozen i32 @f int f() { int *p = &x; // CHECK: ret i32 %{{.*}}, !dbg [[DI:![0-9]*]] diff --git a/clang/test/CodeGen/lifetime-debuginfo-2.c b/clang/test/CodeGen/lifetime-debuginfo-2.c --- a/clang/test/CodeGen/lifetime-debuginfo-2.c +++ b/clang/test/CodeGen/lifetime-debuginfo-2.c @@ -10,7 +10,7 @@ extern int f(int); extern int g(int); -// CHECK-LABEL: define i32 @test +// CHECK-LABEL: define frozen i32 @test int test(int a, int b) { int res; diff --git a/clang/test/CodeGen/link-bitcode-file.c b/clang/test/CodeGen/link-bitcode-file.c --- a/clang/test/CodeGen/link-bitcode-file.c +++ b/clang/test/CodeGen/link-bitcode-file.c @@ -26,14 +26,14 @@ int f2(void) { return 43; } #else -// CHECK-NO-BC-LABEL: define i32 @g +// CHECK-NO-BC-LABEL: define frozen i32 @g // CHECK-NO-BC: ret i32 42 int g(void) { return f(); } -// CHECK-NO-BC-LABEL: define i32 @f -// CHECK-NO-BC2-LABEL: define i32 @f2 +// CHECK-NO-BC-LABEL: define frozen i32 @f +// CHECK-NO-BC2-LABEL: define frozen i32 @f2 #endif diff --git a/clang/test/CodeGen/long_double_fp128.cpp b/clang/test/CodeGen/long_double_fp128.cpp --- a/clang/test/CodeGen/long_double_fp128.cpp +++ b/clang/test/CodeGen/long_double_fp128.cpp @@ -17,10 +17,10 @@ // Android's gcc and llvm use fp128 for long double. // NaCl uses double format for long double, but still has separate overloads. void test(long, float, double, long double, long double _Complex) { } -// A64: define void @_Z4testlfdgCg(i64 %0, float %1, double %2, fp128 %3, { fp128, fp128 }* -// G64: define void @_Z4testlfdeCe(i64 %0, float %1, double %2, x86_fp80 %3, { x86_fp80, x86_fp80 }* -// P64: define void @_Z4testlfdgCg(i64 %0, float %1, double %2, ppc_fp128 %3, ppc_fp128 {{.*}}, ppc_fp128 -// A32: define void @_Z4testlfdeCe(i32 %0, float %1, double %2, double %3, { double, double }* -// G32: define void @_Z4testlfdeCe(i32 %0, float %1, double %2, x86_fp80 %3, { x86_fp80, x86_fp80 }* -// P32: define void @_Z4testlfdgCg(i32 %0, float %1, double %2, ppc_fp128 %3, { ppc_fp128, ppc_fp128 }* -// N64: define void @_Z4testlfdeCe(i32 %0, float %1, double %2, double %3, double {{.*}}, double +// A64: define void @_Z4testlfdgCg(i64 frozen %0, float frozen %1, double frozen %2, fp128 frozen %3, { fp128, fp128 }* +// G64: define void @_Z4testlfdeCe(i64 frozen %0, float frozen %1, double frozen %2, x86_fp80 frozen %3, { x86_fp80, x86_fp80 }* +// P64: define void @_Z4testlfdgCg(i64 frozen %0, float frozen %1, double frozen %2, ppc_fp128 frozen %3, ppc_fp128 {{.*}}, ppc_fp128 +// A32: define void @_Z4testlfdeCe(i32 frozen %0, float frozen %1, double frozen %2, double frozen %3, { double, double }* +// G32: define void @_Z4testlfdeCe(i32 frozen %0, float frozen %1, double frozen %2, x86_fp80 frozen %3, { x86_fp80, x86_fp80 }* +// P32: define void @_Z4testlfdgCg(i32 frozen %0, float frozen %1, double frozen %2, ppc_fp128 frozen %3, { ppc_fp128, ppc_fp128 }* +// N64: define void @_Z4testlfdeCe(i32 frozen %0, float frozen %1, double frozen %2, double frozen %3, double {{.*}}, double diff --git a/clang/test/CodeGen/malign-double-x86-nacl.c b/clang/test/CodeGen/malign-double-x86-nacl.c --- a/clang/test/CodeGen/malign-double-x86-nacl.c +++ b/clang/test/CodeGen/malign-double-x86-nacl.c @@ -5,7 +5,7 @@ int checksize[sizeof(long double) == 8 ? 1 : -1]; int checkalign[__alignof(long double) == 8 ? 1 : -1]; -// CHECK-LABEL: define void @s1(double %a) +// CHECK-LABEL: define void @s1(double frozen %a) void s1(long double a) {} struct st_ld { @@ -18,7 +18,7 @@ int checksize3[sizeof(double) == 8 ? 1 : -1]; int checkalign3[__alignof(double) == 8 ? 1 : -1]; -// CHECK-LABEL: define void @s2(double %a) +// CHECK-LABEL: define void @s2(double frozen %a) void s2(double a) {} struct st_d { @@ -32,7 +32,7 @@ int checksize5[sizeof(long long) == 8 ? 1 : -1]; int checkalign5[__alignof(long long) == 8 ? 1 : -1]; -// CHECK-LABEL: define void @s3(i64 %a) +// CHECK-LABEL: define void @s3(i64 frozen %a) void s3(long long a) {} struct st_ll { diff --git a/clang/test/CodeGen/mangle-blocks.c b/clang/test/CodeGen/mangle-blocks.c --- a/clang/test/CodeGen/mangle-blocks.c +++ b/clang/test/CodeGen/mangle-blocks.c @@ -15,9 +15,9 @@ // CHECK: @.str{{.*}} = private unnamed_addr constant {{.*}}, align 1 // CHECK: @.str[[STR1:.*]] = private unnamed_addr constant [7 x i8] c"mangle\00", align 1 -// CHECK: define internal void @__mangle_block_invoke(i8* %.block_descriptor) +// CHECK: define internal void @__mangle_block_invoke(i8* frozen %.block_descriptor) -// CHECK: define internal void @__mangle_block_invoke_2(i8* %.block_descriptor){{.*}}{ -// CHECK: call void @__assert_rtn(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @__func__.__mangle_block_invoke_2, i32 0, i32 0), i8* getelementptr inbounds {{.*}}, i32 9, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str[[STR1]], i32 0, i32 0)) +// CHECK: define internal void @__mangle_block_invoke_2(i8* frozen %.block_descriptor){{.*}}{ +// CHECK: call void @__assert_rtn(i8* frozen getelementptr inbounds ([22 x i8], [22 x i8]* @__func__.__mangle_block_invoke_2, i32 0, i32 0), i8* frozen getelementptr inbounds {{.*}}, i32 frozen 9, i8* frozen getelementptr inbounds ([7 x i8], [7 x i8]* @.str[[STR1]], i32 0, i32 0)) // CHECK: } diff --git a/clang/test/CodeGen/mangle-windows.c b/clang/test/CodeGen/mangle-windows.c --- a/clang/test/CodeGen/mangle-windows.c +++ b/clang/test/CodeGen/mangle-windows.c @@ -47,7 +47,7 @@ // X64: define dso_local void @f8( void __fastcall f9(long long a, char b, char c, short d) {} -// CHECK: define dso_local x86_fastcallcc void @"\01@f9@20"(i64 %a, i8 signext %b, i8 signext %c, i16 signext %d) +// CHECK: define dso_local x86_fastcallcc void @"\01@f9@20"(i64 frozen %a, i8 frozen signext %b, i8 frozen signext %c, i16 frozen signext %d) // X64: define dso_local void @f9( void f12(void) {} diff --git a/clang/test/CodeGen/mangle.c b/clang/test/CodeGen/mangle.c --- a/clang/test/CodeGen/mangle.c +++ b/clang/test/CodeGen/mangle.c @@ -73,6 +73,6 @@ __asm__("llvm.atomic.cmp.swap.i32.p0i32"); int foo10(volatile int* add, int from, int to) { - // CHECK: call i32 @llvm.atomic.cmp.swap.i32.p0i32 + // CHECK: call frozen i32 @llvm.atomic.cmp.swap.i32.p0i32 return llvm_cas(add, from, to); } diff --git a/clang/test/CodeGen/math-builtins.c b/clang/test/CodeGen/math-builtins.c --- a/clang/test/CodeGen/math-builtins.c +++ b/clang/test/CodeGen/math-builtins.c @@ -12,18 +12,18 @@ // NO__ERRNO: frem double // NO__ERRNO: frem float // NO__ERRNO: frem x86_fp80 -// HAS_ERRNO: declare double @fmod(double, double) [[NOT_READNONE:#[0-9]+]] -// HAS_ERRNO: declare float @fmodf(float, float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @fmodl(x86_fp80, x86_fp80) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen double @fmod(double frozen, double frozen) [[NOT_READNONE:#[0-9]+]] +// HAS_ERRNO: declare frozen float @fmodf(float frozen, float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @fmodl(x86_fp80 frozen, x86_fp80 frozen) [[NOT_READNONE]] __builtin_atan2(f,f); __builtin_atan2f(f,f) ; __builtin_atan2l(f, f); -// NO__ERRNO: declare double @atan2(double, double) [[READNONE:#[0-9]+]] -// NO__ERRNO: declare float @atan2f(float, float) [[READNONE]] -// NO__ERRNO: declare x86_fp80 @atan2l(x86_fp80, x86_fp80) [[READNONE]] -// HAS_ERRNO: declare double @atan2(double, double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @atan2f(float, float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @atan2l(x86_fp80, x86_fp80) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @atan2(double frozen, double frozen) [[READNONE:#[0-9]+]] +// NO__ERRNO: declare frozen float @atan2f(float frozen, float frozen) [[READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @atan2l(x86_fp80 frozen, x86_fp80 frozen) [[READNONE]] +// HAS_ERRNO: declare frozen double @atan2(double frozen, double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @atan2f(float frozen, float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @atan2l(x86_fp80 frozen, x86_fp80 frozen) [[NOT_READNONE]] __builtin_copysign(f,f); __builtin_copysignf(f,f); __builtin_copysignl(f,f); __builtin_copysignf128(f,f); @@ -49,12 +49,12 @@ __builtin_frexp(f,i); __builtin_frexpf(f,i); __builtin_frexpl(f,i); -// NO__ERRNO: declare double @frexp(double, i32*) [[NOT_READNONE:#[0-9]+]] -// NO__ERRNO: declare float @frexpf(float, i32*) [[NOT_READNONE]] -// NO__ERRNO: declare x86_fp80 @frexpl(x86_fp80, i32*) [[NOT_READNONE]] -// HAS_ERRNO: declare double @frexp(double, i32*) [[NOT_READNONE]] -// HAS_ERRNO: declare float @frexpf(float, i32*) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @frexpl(x86_fp80, i32*) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @frexp(double frozen, i32* frozen) [[NOT_READNONE:#[0-9]+]] +// NO__ERRNO: declare frozen float @frexpf(float frozen, i32* frozen) [[NOT_READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @frexpl(x86_fp80 frozen, i32* frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen double @frexp(double frozen, i32* frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @frexpf(float frozen, i32* frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @frexpl(x86_fp80 frozen, i32* frozen) [[NOT_READNONE]] __builtin_huge_val(); __builtin_huge_valf(); __builtin_huge_vall(); __builtin_huge_valf128(); @@ -72,52 +72,52 @@ __builtin_ldexp(f,f); __builtin_ldexpf(f,f); __builtin_ldexpl(f,f); -// NO__ERRNO: declare double @ldexp(double, i32) [[READNONE]] -// NO__ERRNO: declare float @ldexpf(float, i32) [[READNONE]] -// NO__ERRNO: declare x86_fp80 @ldexpl(x86_fp80, i32) [[READNONE]] -// HAS_ERRNO: declare double @ldexp(double, i32) [[NOT_READNONE]] -// HAS_ERRNO: declare float @ldexpf(float, i32) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @ldexpl(x86_fp80, i32) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @ldexp(double frozen, i32 frozen) [[READNONE]] +// NO__ERRNO: declare frozen float @ldexpf(float frozen, i32 frozen) [[READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @ldexpl(x86_fp80 frozen, i32 frozen) [[READNONE]] +// HAS_ERRNO: declare frozen double @ldexp(double frozen, i32 frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @ldexpf(float frozen, i32 frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @ldexpl(x86_fp80 frozen, i32 frozen) [[NOT_READNONE]] __builtin_modf(f,d); __builtin_modff(f,fp); __builtin_modfl(f,l); -// NO__ERRNO: declare double @modf(double, double*) [[NOT_READNONE]] -// NO__ERRNO: declare float @modff(float, float*) [[NOT_READNONE]] -// NO__ERRNO: declare x86_fp80 @modfl(x86_fp80, x86_fp80*) [[NOT_READNONE]] -// HAS_ERRNO: declare double @modf(double, double*) [[NOT_READNONE]] -// HAS_ERRNO: declare float @modff(float, float*) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @modfl(x86_fp80, x86_fp80*) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @modf(double frozen, double* frozen) [[NOT_READNONE]] +// NO__ERRNO: declare frozen float @modff(float frozen, float* frozen) [[NOT_READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @modfl(x86_fp80 frozen, x86_fp80* frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen double @modf(double frozen, double* frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @modff(float frozen, float* frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @modfl(x86_fp80 frozen, x86_fp80* frozen) [[NOT_READNONE]] __builtin_nan(c); __builtin_nanf(c); __builtin_nanl(c); __builtin_nanf128(c); -// NO__ERRNO: declare double @nan(i8*) [[PURE:#[0-9]+]] -// NO__ERRNO: declare float @nanf(i8*) [[PURE]] -// NO__ERRNO: declare x86_fp80 @nanl(i8*) [[PURE]] -// NO__ERRNO: declare fp128 @nanf128(i8*) [[PURE]] -// HAS_ERRNO: declare double @nan(i8*) [[PURE:#[0-9]+]] -// HAS_ERRNO: declare float @nanf(i8*) [[PURE]] -// HAS_ERRNO: declare x86_fp80 @nanl(i8*) [[PURE]] -// HAS_ERRNO: declare fp128 @nanf128(i8*) [[PURE]] +// NO__ERRNO: declare frozen double @nan(i8* frozen) [[PURE:#[0-9]+]] +// NO__ERRNO: declare frozen float @nanf(i8* frozen) [[PURE]] +// NO__ERRNO: declare frozen x86_fp80 @nanl(i8* frozen) [[PURE]] +// NO__ERRNO: declare frozen fp128 @nanf128(i8* frozen) [[PURE]] +// HAS_ERRNO: declare frozen double @nan(i8* frozen) [[PURE:#[0-9]+]] +// HAS_ERRNO: declare frozen float @nanf(i8* frozen) [[PURE]] +// HAS_ERRNO: declare frozen x86_fp80 @nanl(i8* frozen) [[PURE]] +// HAS_ERRNO: declare frozen fp128 @nanf128(i8* frozen) [[PURE]] __builtin_nans(c); __builtin_nansf(c); __builtin_nansl(c); __builtin_nansf128(c); -// NO__ERRNO: declare double @nans(i8*) [[PURE]] -// NO__ERRNO: declare float @nansf(i8*) [[PURE]] -// NO__ERRNO: declare x86_fp80 @nansl(i8*) [[PURE]] -// NO__ERRNO: declare fp128 @nansf128(i8*) [[PURE]] -// HAS_ERRNO: declare double @nans(i8*) [[PURE]] -// HAS_ERRNO: declare float @nansf(i8*) [[PURE]] -// HAS_ERRNO: declare x86_fp80 @nansl(i8*) [[PURE]] -// HAS_ERRNO: declare fp128 @nansf128(i8*) [[PURE]] +// NO__ERRNO: declare frozen double @nans(i8* frozen) [[PURE]] +// NO__ERRNO: declare frozen float @nansf(i8* frozen) [[PURE]] +// NO__ERRNO: declare frozen x86_fp80 @nansl(i8* frozen) [[PURE]] +// NO__ERRNO: declare frozen fp128 @nansf128(i8* frozen) [[PURE]] +// HAS_ERRNO: declare frozen double @nans(i8* frozen) [[PURE]] +// HAS_ERRNO: declare frozen float @nansf(i8* frozen) [[PURE]] +// HAS_ERRNO: declare frozen x86_fp80 @nansl(i8* frozen) [[PURE]] +// HAS_ERRNO: declare frozen fp128 @nansf128(i8* frozen) [[PURE]] __builtin_pow(f,f); __builtin_powf(f,f); __builtin_powl(f,f); // NO__ERRNO: declare double @llvm.pow.f64(double, double) [[READNONE_INTRINSIC]] // NO__ERRNO: declare float @llvm.pow.f32(float, float) [[READNONE_INTRINSIC]] // NO__ERRNO: declare x86_fp80 @llvm.pow.f80(x86_fp80, x86_fp80) [[READNONE_INTRINSIC]] -// HAS_ERRNO: declare double @pow(double, double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @powf(float, float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @powl(x86_fp80, x86_fp80) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen double @pow(double frozen, double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @powf(float frozen, float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @powl(x86_fp80 frozen, x86_fp80 frozen) [[NOT_READNONE]] __builtin_powi(f,f); __builtin_powif(f,f); __builtin_powil(f,f); @@ -131,66 +131,66 @@ /* math */ __builtin_acos(f); __builtin_acosf(f); __builtin_acosl(f); -// NO__ERRNO: declare double @acos(double) [[READNONE]] -// NO__ERRNO: declare float @acosf(float) [[READNONE]] -// NO__ERRNO: declare x86_fp80 @acosl(x86_fp80) [[READNONE]] -// HAS_ERRNO: declare double @acos(double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @acosf(float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @acosl(x86_fp80) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @acos(double frozen) [[READNONE]] +// NO__ERRNO: declare frozen float @acosf(float frozen) [[READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @acosl(x86_fp80 frozen) [[READNONE]] +// HAS_ERRNO: declare frozen double @acos(double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @acosf(float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @acosl(x86_fp80 frozen) [[NOT_READNONE]] __builtin_acosh(f); __builtin_acoshf(f); __builtin_acoshl(f); -// NO__ERRNO: declare double @acosh(double) [[READNONE]] -// NO__ERRNO: declare float @acoshf(float) [[READNONE]] -// NO__ERRNO: declare x86_fp80 @acoshl(x86_fp80) [[READNONE]] -// HAS_ERRNO: declare double @acosh(double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @acoshf(float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @acoshl(x86_fp80) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @acosh(double frozen) [[READNONE]] +// NO__ERRNO: declare frozen float @acoshf(float frozen) [[READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @acoshl(x86_fp80 frozen) [[READNONE]] +// HAS_ERRNO: declare frozen double @acosh(double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @acoshf(float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @acoshl(x86_fp80 frozen) [[NOT_READNONE]] __builtin_asin(f); __builtin_asinf(f); __builtin_asinl(f); -// NO__ERRNO: declare double @asin(double) [[READNONE]] -// NO__ERRNO: declare float @asinf(float) [[READNONE]] -// NO__ERRNO: declare x86_fp80 @asinl(x86_fp80) [[READNONE]] -// HAS_ERRNO: declare double @asin(double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @asinf(float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @asinl(x86_fp80) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @asin(double frozen) [[READNONE]] +// NO__ERRNO: declare frozen float @asinf(float frozen) [[READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @asinl(x86_fp80 frozen) [[READNONE]] +// HAS_ERRNO: declare frozen double @asin(double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @asinf(float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @asinl(x86_fp80 frozen) [[NOT_READNONE]] __builtin_asinh(f); __builtin_asinhf(f); __builtin_asinhl(f); -// NO__ERRNO: declare double @asinh(double) [[READNONE]] -// NO__ERRNO: declare float @asinhf(float) [[READNONE]] -// NO__ERRNO: declare x86_fp80 @asinhl(x86_fp80) [[READNONE]] -// HAS_ERRNO: declare double @asinh(double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @asinhf(float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @asinhl(x86_fp80) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @asinh(double frozen) [[READNONE]] +// NO__ERRNO: declare frozen float @asinhf(float frozen) [[READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @asinhl(x86_fp80 frozen) [[READNONE]] +// HAS_ERRNO: declare frozen double @asinh(double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @asinhf(float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @asinhl(x86_fp80 frozen) [[NOT_READNONE]] __builtin_atan(f); __builtin_atanf(f); __builtin_atanl(f); -// NO__ERRNO: declare double @atan(double) [[READNONE]] -// NO__ERRNO: declare float @atanf(float) [[READNONE]] -// NO__ERRNO: declare x86_fp80 @atanl(x86_fp80) [[READNONE]] -// HAS_ERRNO: declare double @atan(double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @atanf(float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @atanl(x86_fp80) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @atan(double frozen) [[READNONE]] +// NO__ERRNO: declare frozen float @atanf(float frozen) [[READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @atanl(x86_fp80 frozen) [[READNONE]] +// HAS_ERRNO: declare frozen double @atan(double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @atanf(float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @atanl(x86_fp80 frozen) [[NOT_READNONE]] __builtin_atanh(f); __builtin_atanhf(f); __builtin_atanhl(f); -// NO__ERRNO: declare double @atanh(double) [[READNONE]] -// NO__ERRNO: declare float @atanhf(float) [[READNONE]] -// NO__ERRNO: declare x86_fp80 @atanhl(x86_fp80) [[READNONE]] -// HAS_ERRNO: declare double @atanh(double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @atanhf(float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @atanhl(x86_fp80) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @atanh(double frozen) [[READNONE]] +// NO__ERRNO: declare frozen float @atanhf(float frozen) [[READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @atanhl(x86_fp80 frozen) [[READNONE]] +// HAS_ERRNO: declare frozen double @atanh(double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @atanhf(float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @atanhl(x86_fp80 frozen) [[NOT_READNONE]] __builtin_cbrt(f); __builtin_cbrtf(f); __builtin_cbrtl(f); -// NO__ERRNO: declare double @cbrt(double) [[READNONE]] -// NO__ERRNO: declare float @cbrtf(float) [[READNONE]] -// NO__ERRNO: declare x86_fp80 @cbrtl(x86_fp80) [[READNONE]] -// HAS_ERRNO: declare double @cbrt(double) [[READNONE:#[0-9]+]] -// HAS_ERRNO: declare float @cbrtf(float) [[READNONE]] -// HAS_ERRNO: declare x86_fp80 @cbrtl(x86_fp80) [[READNONE]] +// NO__ERRNO: declare frozen double @cbrt(double frozen) [[READNONE]] +// NO__ERRNO: declare frozen float @cbrtf(float frozen) [[READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @cbrtl(x86_fp80 frozen) [[READNONE]] +// HAS_ERRNO: declare frozen double @cbrt(double frozen) [[READNONE:#[0-9]+]] +// HAS_ERRNO: declare frozen float @cbrtf(float frozen) [[READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @cbrtl(x86_fp80 frozen) [[READNONE]] __builtin_ceil(f); __builtin_ceilf(f); __builtin_ceill(f); @@ -206,72 +206,72 @@ // NO__ERRNO: declare double @llvm.cos.f64(double) [[READNONE_INTRINSIC]] // NO__ERRNO: declare float @llvm.cos.f32(float) [[READNONE_INTRINSIC]] // NO__ERRNO: declare x86_fp80 @llvm.cos.f80(x86_fp80) [[READNONE_INTRINSIC]] -// HAS_ERRNO: declare double @cos(double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @cosf(float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @cosl(x86_fp80) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen double @cos(double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @cosf(float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @cosl(x86_fp80 frozen) [[NOT_READNONE]] __builtin_cosh(f); __builtin_coshf(f); __builtin_coshl(f); -// NO__ERRNO: declare double @cosh(double) [[READNONE]] -// NO__ERRNO: declare float @coshf(float) [[READNONE]] -// NO__ERRNO: declare x86_fp80 @coshl(x86_fp80) [[READNONE]] -// HAS_ERRNO: declare double @cosh(double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @coshf(float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @coshl(x86_fp80) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @cosh(double frozen) [[READNONE]] +// NO__ERRNO: declare frozen float @coshf(float frozen) [[READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @coshl(x86_fp80 frozen) [[READNONE]] +// HAS_ERRNO: declare frozen double @cosh(double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @coshf(float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @coshl(x86_fp80 frozen) [[NOT_READNONE]] __builtin_erf(f); __builtin_erff(f); __builtin_erfl(f); -// NO__ERRNO: declare double @erf(double) [[READNONE]] -// NO__ERRNO: declare float @erff(float) [[READNONE]] -// NO__ERRNO: declare x86_fp80 @erfl(x86_fp80) [[READNONE]] -// HAS_ERRNO: declare double @erf(double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @erff(float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @erfl(x86_fp80) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @erf(double frozen) [[READNONE]] +// NO__ERRNO: declare frozen float @erff(float frozen) [[READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @erfl(x86_fp80 frozen) [[READNONE]] +// HAS_ERRNO: declare frozen double @erf(double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @erff(float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @erfl(x86_fp80 frozen) [[NOT_READNONE]] __builtin_erfc(f); __builtin_erfcf(f); __builtin_erfcl(f); -// NO__ERRNO: declare double @erfc(double) [[READNONE]] -// NO__ERRNO: declare float @erfcf(float) [[READNONE]] -// NO__ERRNO: declare x86_fp80 @erfcl(x86_fp80) [[READNONE]] -// HAS_ERRNO: declare double @erfc(double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @erfcf(float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @erfcl(x86_fp80) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @erfc(double frozen) [[READNONE]] +// NO__ERRNO: declare frozen float @erfcf(float frozen) [[READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @erfcl(x86_fp80 frozen) [[READNONE]] +// HAS_ERRNO: declare frozen double @erfc(double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @erfcf(float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @erfcl(x86_fp80 frozen) [[NOT_READNONE]] __builtin_exp(f); __builtin_expf(f); __builtin_expl(f); // NO__ERRNO: declare double @llvm.exp.f64(double) [[READNONE_INTRINSIC]] // NO__ERRNO: declare float @llvm.exp.f32(float) [[READNONE_INTRINSIC]] // NO__ERRNO: declare x86_fp80 @llvm.exp.f80(x86_fp80) [[READNONE_INTRINSIC]] -// HAS_ERRNO: declare double @exp(double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @expf(float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @expl(x86_fp80) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen double @exp(double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @expf(float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @expl(x86_fp80 frozen) [[NOT_READNONE]] __builtin_exp2(f); __builtin_exp2f(f); __builtin_exp2l(f); // NO__ERRNO: declare double @llvm.exp2.f64(double) [[READNONE_INTRINSIC]] // NO__ERRNO: declare float @llvm.exp2.f32(float) [[READNONE_INTRINSIC]] // NO__ERRNO: declare x86_fp80 @llvm.exp2.f80(x86_fp80) [[READNONE_INTRINSIC]] -// HAS_ERRNO: declare double @exp2(double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @exp2f(float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @exp2l(x86_fp80) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen double @exp2(double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @exp2f(float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @exp2l(x86_fp80 frozen) [[NOT_READNONE]] __builtin_expm1(f); __builtin_expm1f(f); __builtin_expm1l(f); -// NO__ERRNO: declare double @expm1(double) [[READNONE]] -// NO__ERRNO: declare float @expm1f(float) [[READNONE]] -// NO__ERRNO: declare x86_fp80 @expm1l(x86_fp80) [[READNONE]] -// HAS_ERRNO: declare double @expm1(double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @expm1f(float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @expm1l(x86_fp80) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @expm1(double frozen) [[READNONE]] +// NO__ERRNO: declare frozen float @expm1f(float frozen) [[READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @expm1l(x86_fp80 frozen) [[READNONE]] +// HAS_ERRNO: declare frozen double @expm1(double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @expm1f(float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @expm1l(x86_fp80 frozen) [[NOT_READNONE]] __builtin_fdim(f,f); __builtin_fdimf(f,f); __builtin_fdiml(f,f); -// NO__ERRNO: declare double @fdim(double, double) [[READNONE]] -// NO__ERRNO: declare float @fdimf(float, float) [[READNONE]] -// NO__ERRNO: declare x86_fp80 @fdiml(x86_fp80, x86_fp80) [[READNONE]] -// HAS_ERRNO: declare double @fdim(double, double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @fdimf(float, float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @fdiml(x86_fp80, x86_fp80) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @fdim(double frozen, double frozen) [[READNONE]] +// NO__ERRNO: declare frozen float @fdimf(float frozen, float frozen) [[READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @fdiml(x86_fp80 frozen, x86_fp80 frozen) [[READNONE]] +// HAS_ERRNO: declare frozen double @fdim(double frozen, double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @fdimf(float frozen, float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @fdiml(x86_fp80 frozen, x86_fp80 frozen) [[NOT_READNONE]] __builtin_floor(f); __builtin_floorf(f); __builtin_floorl(f); @@ -287,9 +287,9 @@ // NO__ERRNO: declare double @llvm.fma.f64(double, double, double) [[READNONE_INTRINSIC]] // NO__ERRNO: declare float @llvm.fma.f32(float, float, float) [[READNONE_INTRINSIC]] // NO__ERRNO: declare x86_fp80 @llvm.fma.f80(x86_fp80, x86_fp80, x86_fp80) [[READNONE_INTRINSIC]] -// HAS_ERRNO: declare double @fma(double, double, double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @fmaf(float, float, float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @fmal(x86_fp80, x86_fp80, x86_fp80) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen double @fma(double frozen, double frozen, double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @fmaf(float frozen, float frozen, float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @fmal(x86_fp80 frozen, x86_fp80 frozen, x86_fp80 frozen) [[NOT_READNONE]] // On GNU or Win, fma never sets errno, so we can convert to the intrinsic. @@ -326,111 +326,111 @@ __builtin_hypot(f,f); __builtin_hypotf(f,f); __builtin_hypotl(f,f); -// NO__ERRNO: declare double @hypot(double, double) [[READNONE]] -// NO__ERRNO: declare float @hypotf(float, float) [[READNONE]] -// NO__ERRNO: declare x86_fp80 @hypotl(x86_fp80, x86_fp80) [[READNONE]] -// HAS_ERRNO: declare double @hypot(double, double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @hypotf(float, float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @hypotl(x86_fp80, x86_fp80) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @hypot(double frozen, double frozen) [[READNONE]] +// NO__ERRNO: declare frozen float @hypotf(float frozen, float frozen) [[READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @hypotl(x86_fp80 frozen, x86_fp80 frozen) [[READNONE]] +// HAS_ERRNO: declare frozen double @hypot(double frozen, double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @hypotf(float frozen, float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @hypotl(x86_fp80 frozen, x86_fp80 frozen) [[NOT_READNONE]] __builtin_ilogb(f); __builtin_ilogbf(f); __builtin_ilogbl(f); -// NO__ERRNO: declare i32 @ilogb(double) [[READNONE]] -// NO__ERRNO: declare i32 @ilogbf(float) [[READNONE]] -// NO__ERRNO: declare i32 @ilogbl(x86_fp80) [[READNONE]] -// HAS_ERRNO: declare i32 @ilogb(double) [[NOT_READNONE]] -// HAS_ERRNO: declare i32 @ilogbf(float) [[NOT_READNONE]] -// HAS_ERRNO: declare i32 @ilogbl(x86_fp80) [[NOT_READNONE]] +// NO__ERRNO: declare frozen i32 @ilogb(double frozen) [[READNONE]] +// NO__ERRNO: declare frozen i32 @ilogbf(float frozen) [[READNONE]] +// NO__ERRNO: declare frozen i32 @ilogbl(x86_fp80 frozen) [[READNONE]] +// HAS_ERRNO: declare frozen i32 @ilogb(double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen i32 @ilogbf(float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen i32 @ilogbl(x86_fp80 frozen) [[NOT_READNONE]] __builtin_lgamma(f); __builtin_lgammaf(f); __builtin_lgammal(f); -// NO__ERRNO: declare double @lgamma(double) [[NOT_READNONE]] -// NO__ERRNO: declare float @lgammaf(float) [[NOT_READNONE]] -// NO__ERRNO: declare x86_fp80 @lgammal(x86_fp80) [[NOT_READNONE]] -// HAS_ERRNO: declare double @lgamma(double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @lgammaf(float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @lgammal(x86_fp80) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @lgamma(double frozen) [[NOT_READNONE]] +// NO__ERRNO: declare frozen float @lgammaf(float frozen) [[NOT_READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @lgammal(x86_fp80 frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen double @lgamma(double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @lgammaf(float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @lgammal(x86_fp80 frozen) [[NOT_READNONE]] __builtin_llrint(f); __builtin_llrintf(f); __builtin_llrintl(f); // NO__ERRNO: declare i64 @llvm.llrint.i64.f64(double) [[READNONE_INTRINSIC]] // NO__ERRNO: declare i64 @llvm.llrint.i64.f32(float) [[READNONE_INTRINSIC]] // NO__ERRNO: declare i64 @llvm.llrint.i64.f80(x86_fp80) [[READNONE_INTRINSIC]] -// HAS_ERRNO: declare i64 @llrint(double) [[NOT_READNONE]] -// HAS_ERRNO: declare i64 @llrintf(float) [[NOT_READNONE]] -// HAS_ERRNO: declare i64 @llrintl(x86_fp80) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen i64 @llrint(double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen i64 @llrintf(float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen i64 @llrintl(x86_fp80 frozen) [[NOT_READNONE]] __builtin_llround(f); __builtin_llroundf(f); __builtin_llroundl(f); // NO__ERRNO: declare i64 @llvm.llround.i64.f64(double) [[READNONE_INTRINSIC]] // NO__ERRNO: declare i64 @llvm.llround.i64.f32(float) [[READNONE_INTRINSIC]] // NO__ERRNO: declare i64 @llvm.llround.i64.f80(x86_fp80) [[READNONE_INTRINSIC]] -// HAS_ERRNO: declare i64 @llround(double) [[NOT_READNONE]] -// HAS_ERRNO: declare i64 @llroundf(float) [[NOT_READNONE]] -// HAS_ERRNO: declare i64 @llroundl(x86_fp80) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen i64 @llround(double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen i64 @llroundf(float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen i64 @llroundl(x86_fp80 frozen) [[NOT_READNONE]] __builtin_log(f); __builtin_logf(f); __builtin_logl(f); // NO__ERRNO: declare double @llvm.log.f64(double) [[READNONE_INTRINSIC]] // NO__ERRNO: declare float @llvm.log.f32(float) [[READNONE_INTRINSIC]] // NO__ERRNO: declare x86_fp80 @llvm.log.f80(x86_fp80) [[READNONE_INTRINSIC]] -// HAS_ERRNO: declare double @log(double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @logf(float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @logl(x86_fp80) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen double @log(double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @logf(float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @logl(x86_fp80 frozen) [[NOT_READNONE]] __builtin_log10(f); __builtin_log10f(f); __builtin_log10l(f); // NO__ERRNO: declare double @llvm.log10.f64(double) [[READNONE_INTRINSIC]] // NO__ERRNO: declare float @llvm.log10.f32(float) [[READNONE_INTRINSIC]] // NO__ERRNO: declare x86_fp80 @llvm.log10.f80(x86_fp80) [[READNONE_INTRINSIC]] -// HAS_ERRNO: declare double @log10(double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @log10f(float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @log10l(x86_fp80) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen double @log10(double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @log10f(float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @log10l(x86_fp80 frozen) [[NOT_READNONE]] __builtin_log1p(f); __builtin_log1pf(f); __builtin_log1pl(f); -// NO__ERRNO: declare double @log1p(double) [[READNONE]] -// NO__ERRNO: declare float @log1pf(float) [[READNONE]] -// NO__ERRNO: declare x86_fp80 @log1pl(x86_fp80) [[READNONE]] -// HAS_ERRNO: declare double @log1p(double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @log1pf(float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @log1pl(x86_fp80) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @log1p(double frozen) [[READNONE]] +// NO__ERRNO: declare frozen float @log1pf(float frozen) [[READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @log1pl(x86_fp80 frozen) [[READNONE]] +// HAS_ERRNO: declare frozen double @log1p(double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @log1pf(float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @log1pl(x86_fp80 frozen) [[NOT_READNONE]] __builtin_log2(f); __builtin_log2f(f); __builtin_log2l(f); // NO__ERRNO: declare double @llvm.log2.f64(double) [[READNONE_INTRINSIC]] // NO__ERRNO: declare float @llvm.log2.f32(float) [[READNONE_INTRINSIC]] // NO__ERRNO: declare x86_fp80 @llvm.log2.f80(x86_fp80) [[READNONE_INTRINSIC]] -// HAS_ERRNO: declare double @log2(double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @log2f(float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @log2l(x86_fp80) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen double @log2(double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @log2f(float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @log2l(x86_fp80 frozen) [[NOT_READNONE]] __builtin_logb(f); __builtin_logbf(f); __builtin_logbl(f); -// NO__ERRNO: declare double @logb(double) [[READNONE]] -// NO__ERRNO: declare float @logbf(float) [[READNONE]] -// NO__ERRNO: declare x86_fp80 @logbl(x86_fp80) [[READNONE]] -// HAS_ERRNO: declare double @logb(double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @logbf(float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @logbl(x86_fp80) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @logb(double frozen) [[READNONE]] +// NO__ERRNO: declare frozen float @logbf(float frozen) [[READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @logbl(x86_fp80 frozen) [[READNONE]] +// HAS_ERRNO: declare frozen double @logb(double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @logbf(float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @logbl(x86_fp80 frozen) [[NOT_READNONE]] __builtin_lrint(f); __builtin_lrintf(f); __builtin_lrintl(f); // NO__ERRNO: declare i64 @llvm.lrint.i64.f64(double) [[READNONE_INTRINSIC]] // NO__ERRNO: declare i64 @llvm.lrint.i64.f32(float) [[READNONE_INTRINSIC]] // NO__ERRNO: declare i64 @llvm.lrint.i64.f80(x86_fp80) [[READNONE_INTRINSIC]] -// HAS_ERRNO: declare i64 @lrint(double) [[NOT_READNONE]] -// HAS_ERRNO: declare i64 @lrintf(float) [[NOT_READNONE]] -// HAS_ERRNO: declare i64 @lrintl(x86_fp80) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen i64 @lrint(double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen i64 @lrintf(float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen i64 @lrintl(x86_fp80 frozen) [[NOT_READNONE]] __builtin_lround(f); __builtin_lroundf(f); __builtin_lroundl(f); // NO__ERRNO: declare i64 @llvm.lround.i64.f64(double) [[READNONE_INTRINSIC]] // NO__ERRNO: declare i64 @llvm.lround.i64.f32(float) [[READNONE_INTRINSIC]] // NO__ERRNO: declare i64 @llvm.lround.i64.f80(x86_fp80) [[READNONE_INTRINSIC]] -// HAS_ERRNO: declare i64 @lround(double) [[NOT_READNONE]] -// HAS_ERRNO: declare i64 @lroundf(float) [[NOT_READNONE]] -// HAS_ERRNO: declare i64 @lroundl(x86_fp80) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen i64 @lround(double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen i64 @lroundf(float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen i64 @lroundl(x86_fp80 frozen) [[NOT_READNONE]] __builtin_nearbyint(f); __builtin_nearbyintf(f); __builtin_nearbyintl(f); @@ -443,39 +443,39 @@ __builtin_nextafter(f,f); __builtin_nextafterf(f,f); __builtin_nextafterl(f,f); -// NO__ERRNO: declare double @nextafter(double, double) [[READNONE]] -// NO__ERRNO: declare float @nextafterf(float, float) [[READNONE]] -// NO__ERRNO: declare x86_fp80 @nextafterl(x86_fp80, x86_fp80) [[READNONE]] -// HAS_ERRNO: declare double @nextafter(double, double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @nextafterf(float, float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @nextafterl(x86_fp80, x86_fp80) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @nextafter(double frozen, double frozen) [[READNONE]] +// NO__ERRNO: declare frozen float @nextafterf(float frozen, float frozen) [[READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @nextafterl(x86_fp80 frozen, x86_fp80 frozen) [[READNONE]] +// HAS_ERRNO: declare frozen double @nextafter(double frozen, double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @nextafterf(float frozen, float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @nextafterl(x86_fp80 frozen, x86_fp80 frozen) [[NOT_READNONE]] __builtin_nexttoward(f,f); __builtin_nexttowardf(f,f);__builtin_nexttowardl(f,f); -// NO__ERRNO: declare double @nexttoward(double, x86_fp80) [[READNONE]] -// NO__ERRNO: declare float @nexttowardf(float, x86_fp80) [[READNONE]] -// NO__ERRNO: declare x86_fp80 @nexttowardl(x86_fp80, x86_fp80) [[READNONE]] -// HAS_ERRNO: declare double @nexttoward(double, x86_fp80) [[NOT_READNONE]] -// HAS_ERRNO: declare float @nexttowardf(float, x86_fp80) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @nexttowardl(x86_fp80, x86_fp80) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @nexttoward(double frozen, x86_fp80 frozen) [[READNONE]] +// NO__ERRNO: declare frozen float @nexttowardf(float frozen, x86_fp80 frozen) [[READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @nexttowardl(x86_fp80 frozen, x86_fp80 frozen) [[READNONE]] +// HAS_ERRNO: declare frozen double @nexttoward(double frozen, x86_fp80 frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @nexttowardf(float frozen, x86_fp80 frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @nexttowardl(x86_fp80 frozen, x86_fp80 frozen) [[NOT_READNONE]] __builtin_remainder(f,f); __builtin_remainderf(f,f); __builtin_remainderl(f,f); -// NO__ERRNO: declare double @remainder(double, double) [[READNONE]] -// NO__ERRNO: declare float @remainderf(float, float) [[READNONE]] -// NO__ERRNO: declare x86_fp80 @remainderl(x86_fp80, x86_fp80) [[READNONE]] -// HAS_ERRNO: declare double @remainder(double, double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @remainderf(float, float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @remainderl(x86_fp80, x86_fp80) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @remainder(double frozen, double frozen) [[READNONE]] +// NO__ERRNO: declare frozen float @remainderf(float frozen, float frozen) [[READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @remainderl(x86_fp80 frozen, x86_fp80 frozen) [[READNONE]] +// HAS_ERRNO: declare frozen double @remainder(double frozen, double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @remainderf(float frozen, float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @remainderl(x86_fp80 frozen, x86_fp80 frozen) [[NOT_READNONE]] __builtin_remquo(f,f,i); __builtin_remquof(f,f,i); __builtin_remquol(f,f,i); -// NO__ERRNO: declare double @remquo(double, double, i32*) [[NOT_READNONE]] -// NO__ERRNO: declare float @remquof(float, float, i32*) [[NOT_READNONE]] -// NO__ERRNO: declare x86_fp80 @remquol(x86_fp80, x86_fp80, i32*) [[NOT_READNONE]] -// HAS_ERRNO: declare double @remquo(double, double, i32*) [[NOT_READNONE]] -// HAS_ERRNO: declare float @remquof(float, float, i32*) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @remquol(x86_fp80, x86_fp80, i32*) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @remquo(double frozen, double frozen, i32* frozen) [[NOT_READNONE]] +// NO__ERRNO: declare frozen float @remquof(float frozen, float frozen, i32* frozen) [[NOT_READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @remquol(x86_fp80 frozen, x86_fp80 frozen, i32* frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen double @remquo(double frozen, double frozen, i32* frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @remquof(float frozen, float frozen, i32* frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @remquol(x86_fp80 frozen, x86_fp80 frozen, i32* frozen) [[NOT_READNONE]] __builtin_rint(f); __builtin_rintf(f); __builtin_rintl(f); @@ -497,75 +497,75 @@ __builtin_scalbln(f,f); __builtin_scalblnf(f,f); __builtin_scalblnl(f,f); -// NO__ERRNO: declare double @scalbln(double, i64) [[READNONE]] -// NO__ERRNO: declare float @scalblnf(float, i64) [[READNONE]] -// NO__ERRNO: declare x86_fp80 @scalblnl(x86_fp80, i64) [[READNONE]] -// HAS_ERRNO: declare double @scalbln(double, i64) [[NOT_READNONE]] -// HAS_ERRNO: declare float @scalblnf(float, i64) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @scalblnl(x86_fp80, i64) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @scalbln(double frozen, i64 frozen) [[READNONE]] +// NO__ERRNO: declare frozen float @scalblnf(float frozen, i64 frozen) [[READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @scalblnl(x86_fp80 frozen, i64 frozen) [[READNONE]] +// HAS_ERRNO: declare frozen double @scalbln(double frozen, i64 frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @scalblnf(float frozen, i64 frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @scalblnl(x86_fp80 frozen, i64 frozen) [[NOT_READNONE]] __builtin_scalbn(f,f); __builtin_scalbnf(f,f); __builtin_scalbnl(f,f); -// NO__ERRNO: declare double @scalbn(double, i32) [[READNONE]] -// NO__ERRNO: declare float @scalbnf(float, i32) [[READNONE]] -// NO__ERRNO: declare x86_fp80 @scalbnl(x86_fp80, i32) [[READNONE]] -// HAS_ERRNO: declare double @scalbn(double, i32) [[NOT_READNONE]] -// HAS_ERRNO: declare float @scalbnf(float, i32) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @scalbnl(x86_fp80, i32) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @scalbn(double frozen, i32 frozen) [[READNONE]] +// NO__ERRNO: declare frozen float @scalbnf(float frozen, i32 frozen) [[READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @scalbnl(x86_fp80 frozen, i32 frozen) [[READNONE]] +// HAS_ERRNO: declare frozen double @scalbn(double frozen, i32 frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @scalbnf(float frozen, i32 frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @scalbnl(x86_fp80 frozen, i32 frozen) [[NOT_READNONE]] __builtin_sin(f); __builtin_sinf(f); __builtin_sinl(f); // NO__ERRNO: declare double @llvm.sin.f64(double) [[READNONE_INTRINSIC]] // NO__ERRNO: declare float @llvm.sin.f32(float) [[READNONE_INTRINSIC]] // NO__ERRNO: declare x86_fp80 @llvm.sin.f80(x86_fp80) [[READNONE_INTRINSIC]] -// HAS_ERRNO: declare double @sin(double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @sinf(float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @sinl(x86_fp80) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen double @sin(double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @sinf(float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @sinl(x86_fp80 frozen) [[NOT_READNONE]] __builtin_sinh(f); __builtin_sinhf(f); __builtin_sinhl(f); -// NO__ERRNO: declare double @sinh(double) [[READNONE]] -// NO__ERRNO: declare float @sinhf(float) [[READNONE]] -// NO__ERRNO: declare x86_fp80 @sinhl(x86_fp80) [[READNONE]] -// HAS_ERRNO: declare double @sinh(double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @sinhf(float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @sinhl(x86_fp80) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @sinh(double frozen) [[READNONE]] +// NO__ERRNO: declare frozen float @sinhf(float frozen) [[READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @sinhl(x86_fp80 frozen) [[READNONE]] +// HAS_ERRNO: declare frozen double @sinh(double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @sinhf(float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @sinhl(x86_fp80 frozen) [[NOT_READNONE]] __builtin_sqrt(f); __builtin_sqrtf(f); __builtin_sqrtl(f); // NO__ERRNO: declare double @llvm.sqrt.f64(double) [[READNONE_INTRINSIC]] // NO__ERRNO: declare float @llvm.sqrt.f32(float) [[READNONE_INTRINSIC]] // NO__ERRNO: declare x86_fp80 @llvm.sqrt.f80(x86_fp80) [[READNONE_INTRINSIC]] -// HAS_ERRNO: declare double @sqrt(double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @sqrtf(float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @sqrtl(x86_fp80) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen double @sqrt(double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @sqrtf(float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @sqrtl(x86_fp80 frozen) [[NOT_READNONE]] __builtin_tan(f); __builtin_tanf(f); __builtin_tanl(f); -// NO__ERRNO: declare double @tan(double) [[READNONE]] -// NO__ERRNO: declare float @tanf(float) [[READNONE]] -// NO__ERRNO: declare x86_fp80 @tanl(x86_fp80) [[READNONE]] -// HAS_ERRNO: declare double @tan(double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @tanf(float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @tanl(x86_fp80) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @tan(double frozen) [[READNONE]] +// NO__ERRNO: declare frozen float @tanf(float frozen) [[READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @tanl(x86_fp80 frozen) [[READNONE]] +// HAS_ERRNO: declare frozen double @tan(double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @tanf(float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @tanl(x86_fp80 frozen) [[NOT_READNONE]] __builtin_tanh(f); __builtin_tanhf(f); __builtin_tanhl(f); -// NO__ERRNO: declare double @tanh(double) [[READNONE]] -// NO__ERRNO: declare float @tanhf(float) [[READNONE]] -// NO__ERRNO: declare x86_fp80 @tanhl(x86_fp80) [[READNONE]] -// HAS_ERRNO: declare double @tanh(double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @tanhf(float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @tanhl(x86_fp80) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @tanh(double frozen) [[READNONE]] +// NO__ERRNO: declare frozen float @tanhf(float frozen) [[READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @tanhl(x86_fp80 frozen) [[READNONE]] +// HAS_ERRNO: declare frozen double @tanh(double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @tanhf(float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @tanhl(x86_fp80 frozen) [[NOT_READNONE]] __builtin_tgamma(f); __builtin_tgammaf(f); __builtin_tgammal(f); -// NO__ERRNO: declare double @tgamma(double) [[READNONE]] -// NO__ERRNO: declare float @tgammaf(float) [[READNONE]] -// NO__ERRNO: declare x86_fp80 @tgammal(x86_fp80) [[READNONE]] -// HAS_ERRNO: declare double @tgamma(double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @tgammaf(float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @tgammal(x86_fp80) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @tgamma(double frozen) [[READNONE]] +// NO__ERRNO: declare frozen float @tgammaf(float frozen) [[READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @tgammal(x86_fp80 frozen) [[READNONE]] +// HAS_ERRNO: declare frozen double @tgamma(double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @tgammaf(float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @tgammal(x86_fp80 frozen) [[NOT_READNONE]] __builtin_trunc(f); __builtin_truncf(f); __builtin_truncl(f); diff --git a/clang/test/CodeGen/math-libcalls.c b/clang/test/CodeGen/math-libcalls.c --- a/clang/test/CodeGen/math-libcalls.c +++ b/clang/test/CodeGen/math-libcalls.c @@ -11,18 +11,18 @@ // NO__ERRNO: frem double // NO__ERRNO: frem float // NO__ERRNO: frem x86_fp80 -// HAS_ERRNO: declare double @fmod(double, double) [[NOT_READNONE:#[0-9]+]] -// HAS_ERRNO: declare float @fmodf(float, float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @fmodl(x86_fp80, x86_fp80) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen double @fmod(double frozen, double frozen) [[NOT_READNONE:#[0-9]+]] +// HAS_ERRNO: declare frozen float @fmodf(float frozen, float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @fmodl(x86_fp80 frozen, x86_fp80 frozen) [[NOT_READNONE]] atan2(f,f); atan2f(f,f) ; atan2l(f, f); -// NO__ERRNO: declare double @atan2(double, double) [[READNONE:#[0-9]+]] -// NO__ERRNO: declare float @atan2f(float, float) [[READNONE]] -// NO__ERRNO: declare x86_fp80 @atan2l(x86_fp80, x86_fp80) [[READNONE]] -// HAS_ERRNO: declare double @atan2(double, double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @atan2f(float, float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @atan2l(x86_fp80, x86_fp80) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @atan2(double frozen, double frozen) [[READNONE:#[0-9]+]] +// NO__ERRNO: declare frozen float @atan2f(float frozen, float frozen) [[READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @atan2l(x86_fp80 frozen, x86_fp80 frozen) [[READNONE]] +// HAS_ERRNO: declare frozen double @atan2(double frozen, double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @atan2f(float frozen, float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @atan2l(x86_fp80 frozen, x86_fp80 frozen) [[NOT_READNONE]] copysign(f,f); copysignf(f,f);copysignl(f,f); @@ -44,112 +44,112 @@ frexp(f,i); frexpf(f,i); frexpl(f,i); -// NO__ERRNO: declare double @frexp(double, i32*) [[NOT_READNONE:#[0-9]+]] -// NO__ERRNO: declare float @frexpf(float, i32*) [[NOT_READNONE]] -// NO__ERRNO: declare x86_fp80 @frexpl(x86_fp80, i32*) [[NOT_READNONE]] -// HAS_ERRNO: declare double @frexp(double, i32*) [[NOT_READNONE]] -// HAS_ERRNO: declare float @frexpf(float, i32*) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @frexpl(x86_fp80, i32*) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @frexp(double frozen, i32* frozen) [[NOT_READNONE:#[0-9]+]] +// NO__ERRNO: declare frozen float @frexpf(float frozen, i32* frozen) [[NOT_READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @frexpl(x86_fp80 frozen, i32* frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen double @frexp(double frozen, i32* frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @frexpf(float frozen, i32* frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @frexpl(x86_fp80 frozen, i32* frozen) [[NOT_READNONE]] ldexp(f,f); ldexpf(f,f); ldexpl(f,f); -// NO__ERRNO: declare double @ldexp(double, i32) [[READNONE]] -// NO__ERRNO: declare float @ldexpf(float, i32) [[READNONE]] -// NO__ERRNO: declare x86_fp80 @ldexpl(x86_fp80, i32) [[READNONE]] -// HAS_ERRNO: declare double @ldexp(double, i32) [[NOT_READNONE]] -// HAS_ERRNO: declare float @ldexpf(float, i32) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @ldexpl(x86_fp80, i32) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @ldexp(double frozen, i32 frozen) [[READNONE]] +// NO__ERRNO: declare frozen float @ldexpf(float frozen, i32 frozen) [[READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @ldexpl(x86_fp80 frozen, i32 frozen) [[READNONE]] +// HAS_ERRNO: declare frozen double @ldexp(double frozen, i32 frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @ldexpf(float frozen, i32 frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @ldexpl(x86_fp80 frozen, i32 frozen) [[NOT_READNONE]] modf(f,d); modff(f,fp); modfl(f,l); -// NO__ERRNO: declare double @modf(double, double*) [[NOT_READNONE]] -// NO__ERRNO: declare float @modff(float, float*) [[NOT_READNONE]] -// NO__ERRNO: declare x86_fp80 @modfl(x86_fp80, x86_fp80*) [[NOT_READNONE]] -// HAS_ERRNO: declare double @modf(double, double*) [[NOT_READNONE]] -// HAS_ERRNO: declare float @modff(float, float*) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @modfl(x86_fp80, x86_fp80*) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @modf(double frozen, double* frozen) [[NOT_READNONE]] +// NO__ERRNO: declare frozen float @modff(float frozen, float* frozen) [[NOT_READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @modfl(x86_fp80 frozen, x86_fp80* frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen double @modf(double frozen, double* frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @modff(float frozen, float* frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @modfl(x86_fp80 frozen, x86_fp80* frozen) [[NOT_READNONE]] nan(c); nanf(c); nanl(c); -// NO__ERRNO: declare double @nan(i8*) [[READONLY:#[0-9]+]] -// NO__ERRNO: declare float @nanf(i8*) [[READONLY]] -// NO__ERRNO: declare x86_fp80 @nanl(i8*) [[READONLY]] -// HAS_ERRNO: declare double @nan(i8*) [[READONLY:#[0-9]+]] -// HAS_ERRNO: declare float @nanf(i8*) [[READONLY]] -// HAS_ERRNO: declare x86_fp80 @nanl(i8*) [[READONLY]] +// NO__ERRNO: declare frozen double @nan(i8* frozen) [[READONLY:#[0-9]+]] +// NO__ERRNO: declare frozen float @nanf(i8* frozen) [[READONLY]] +// NO__ERRNO: declare frozen x86_fp80 @nanl(i8* frozen) [[READONLY]] +// HAS_ERRNO: declare frozen double @nan(i8* frozen) [[READONLY:#[0-9]+]] +// HAS_ERRNO: declare frozen float @nanf(i8* frozen) [[READONLY]] +// HAS_ERRNO: declare frozen x86_fp80 @nanl(i8* frozen) [[READONLY]] pow(f,f); powf(f,f); powl(f,f); // NO__ERRNO: declare double @llvm.pow.f64(double, double) [[READNONE_INTRINSIC]] // NO__ERRNO: declare float @llvm.pow.f32(float, float) [[READNONE_INTRINSIC]] // NO__ERRNO: declare x86_fp80 @llvm.pow.f80(x86_fp80, x86_fp80) [[READNONE_INTRINSIC]] -// HAS_ERRNO: declare double @pow(double, double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @powf(float, float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @powl(x86_fp80, x86_fp80) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen double @pow(double frozen, double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @powf(float frozen, float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @powl(x86_fp80 frozen, x86_fp80 frozen) [[NOT_READNONE]] /* math */ acos(f); acosf(f); acosl(f); -// NO__ERRNO: declare double @acos(double) [[READNONE]] -// NO__ERRNO: declare float @acosf(float) [[READNONE]] -// NO__ERRNO: declare x86_fp80 @acosl(x86_fp80) [[READNONE]] -// HAS_ERRNO: declare double @acos(double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @acosf(float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @acosl(x86_fp80) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @acos(double frozen) [[READNONE]] +// NO__ERRNO: declare frozen float @acosf(float frozen) [[READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @acosl(x86_fp80 frozen) [[READNONE]] +// HAS_ERRNO: declare frozen double @acos(double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @acosf(float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @acosl(x86_fp80 frozen) [[NOT_READNONE]] acosh(f); acoshf(f); acoshl(f); -// NO__ERRNO: declare double @acosh(double) [[READNONE]] -// NO__ERRNO: declare float @acoshf(float) [[READNONE]] -// NO__ERRNO: declare x86_fp80 @acoshl(x86_fp80) [[READNONE]] -// HAS_ERRNO: declare double @acosh(double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @acoshf(float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @acoshl(x86_fp80) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @acosh(double frozen) [[READNONE]] +// NO__ERRNO: declare frozen float @acoshf(float frozen) [[READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @acoshl(x86_fp80 frozen) [[READNONE]] +// HAS_ERRNO: declare frozen double @acosh(double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @acoshf(float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @acoshl(x86_fp80 frozen) [[NOT_READNONE]] asin(f); asinf(f); asinl(f); -// NO__ERRNO: declare double @asin(double) [[READNONE]] -// NO__ERRNO: declare float @asinf(float) [[READNONE]] -// NO__ERRNO: declare x86_fp80 @asinl(x86_fp80) [[READNONE]] -// HAS_ERRNO: declare double @asin(double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @asinf(float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @asinl(x86_fp80) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @asin(double frozen) [[READNONE]] +// NO__ERRNO: declare frozen float @asinf(float frozen) [[READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @asinl(x86_fp80 frozen) [[READNONE]] +// HAS_ERRNO: declare frozen double @asin(double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @asinf(float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @asinl(x86_fp80 frozen) [[NOT_READNONE]] asinh(f); asinhf(f); asinhl(f); -// NO__ERRNO: declare double @asinh(double) [[READNONE]] -// NO__ERRNO: declare float @asinhf(float) [[READNONE]] -// NO__ERRNO: declare x86_fp80 @asinhl(x86_fp80) [[READNONE]] -// HAS_ERRNO: declare double @asinh(double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @asinhf(float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @asinhl(x86_fp80) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @asinh(double frozen) [[READNONE]] +// NO__ERRNO: declare frozen float @asinhf(float frozen) [[READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @asinhl(x86_fp80 frozen) [[READNONE]] +// HAS_ERRNO: declare frozen double @asinh(double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @asinhf(float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @asinhl(x86_fp80 frozen) [[NOT_READNONE]] atan(f); atanf(f); atanl(f); -// NO__ERRNO: declare double @atan(double) [[READNONE]] -// NO__ERRNO: declare float @atanf(float) [[READNONE]] -// NO__ERRNO: declare x86_fp80 @atanl(x86_fp80) [[READNONE]] -// HAS_ERRNO: declare double @atan(double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @atanf(float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @atanl(x86_fp80) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @atan(double frozen) [[READNONE]] +// NO__ERRNO: declare frozen float @atanf(float frozen) [[READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @atanl(x86_fp80 frozen) [[READNONE]] +// HAS_ERRNO: declare frozen double @atan(double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @atanf(float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @atanl(x86_fp80 frozen) [[NOT_READNONE]] atanh(f); atanhf(f); atanhl(f); -// NO__ERRNO: declare double @atanh(double) [[READNONE]] -// NO__ERRNO: declare float @atanhf(float) [[READNONE]] -// NO__ERRNO: declare x86_fp80 @atanhl(x86_fp80) [[READNONE]] -// HAS_ERRNO: declare double @atanh(double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @atanhf(float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @atanhl(x86_fp80) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @atanh(double frozen) [[READNONE]] +// NO__ERRNO: declare frozen float @atanhf(float frozen) [[READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @atanhl(x86_fp80 frozen) [[READNONE]] +// HAS_ERRNO: declare frozen double @atanh(double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @atanhf(float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @atanhl(x86_fp80 frozen) [[NOT_READNONE]] cbrt(f); cbrtf(f); cbrtl(f); -// NO__ERRNO: declare double @cbrt(double) [[READNONE]] -// NO__ERRNO: declare float @cbrtf(float) [[READNONE]] -// NO__ERRNO: declare x86_fp80 @cbrtl(x86_fp80) [[READNONE]] -// HAS_ERRNO: declare double @cbrt(double) [[READNONE:#[0-9]+]] -// HAS_ERRNO: declare float @cbrtf(float) [[READNONE]] -// HAS_ERRNO: declare x86_fp80 @cbrtl(x86_fp80) [[READNONE]] +// NO__ERRNO: declare frozen double @cbrt(double frozen) [[READNONE]] +// NO__ERRNO: declare frozen float @cbrtf(float frozen) [[READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @cbrtl(x86_fp80 frozen) [[READNONE]] +// HAS_ERRNO: declare frozen double @cbrt(double frozen) [[READNONE:#[0-9]+]] +// HAS_ERRNO: declare frozen float @cbrtf(float frozen) [[READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @cbrtl(x86_fp80 frozen) [[READNONE]] ceil(f); ceilf(f); ceill(f); @@ -165,72 +165,72 @@ // NO__ERRNO: declare double @llvm.cos.f64(double) [[READNONE_INTRINSIC]] // NO__ERRNO: declare float @llvm.cos.f32(float) [[READNONE_INTRINSIC]] // NO__ERRNO: declare x86_fp80 @llvm.cos.f80(x86_fp80) [[READNONE_INTRINSIC]] -// HAS_ERRNO: declare double @cos(double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @cosf(float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @cosl(x86_fp80) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen double @cos(double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @cosf(float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @cosl(x86_fp80 frozen) [[NOT_READNONE]] cosh(f); coshf(f); coshl(f); -// NO__ERRNO: declare double @cosh(double) [[READNONE]] -// NO__ERRNO: declare float @coshf(float) [[READNONE]] -// NO__ERRNO: declare x86_fp80 @coshl(x86_fp80) [[READNONE]] -// HAS_ERRNO: declare double @cosh(double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @coshf(float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @coshl(x86_fp80) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @cosh(double frozen) [[READNONE]] +// NO__ERRNO: declare frozen float @coshf(float frozen) [[READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @coshl(x86_fp80 frozen) [[READNONE]] +// HAS_ERRNO: declare frozen double @cosh(double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @coshf(float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @coshl(x86_fp80 frozen) [[NOT_READNONE]] erf(f); erff(f); erfl(f); -// NO__ERRNO: declare double @erf(double) [[READNONE]] -// NO__ERRNO: declare float @erff(float) [[READNONE]] -// NO__ERRNO: declare x86_fp80 @erfl(x86_fp80) [[READNONE]] -// HAS_ERRNO: declare double @erf(double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @erff(float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @erfl(x86_fp80) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @erf(double frozen) [[READNONE]] +// NO__ERRNO: declare frozen float @erff(float frozen) [[READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @erfl(x86_fp80 frozen) [[READNONE]] +// HAS_ERRNO: declare frozen double @erf(double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @erff(float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @erfl(x86_fp80 frozen) [[NOT_READNONE]] erfc(f); erfcf(f); erfcl(f); -// NO__ERRNO: declare double @erfc(double) [[READNONE]] -// NO__ERRNO: declare float @erfcf(float) [[READNONE]] -// NO__ERRNO: declare x86_fp80 @erfcl(x86_fp80) [[READNONE]] -// HAS_ERRNO: declare double @erfc(double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @erfcf(float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @erfcl(x86_fp80) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @erfc(double frozen) [[READNONE]] +// NO__ERRNO: declare frozen float @erfcf(float frozen) [[READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @erfcl(x86_fp80 frozen) [[READNONE]] +// HAS_ERRNO: declare frozen double @erfc(double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @erfcf(float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @erfcl(x86_fp80 frozen) [[NOT_READNONE]] exp(f); expf(f); expl(f); // NO__ERRNO: declare double @llvm.exp.f64(double) [[READNONE_INTRINSIC]] // NO__ERRNO: declare float @llvm.exp.f32(float) [[READNONE_INTRINSIC]] // NO__ERRNO: declare x86_fp80 @llvm.exp.f80(x86_fp80) [[READNONE_INTRINSIC]] -// HAS_ERRNO: declare double @exp(double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @expf(float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @expl(x86_fp80) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen double @exp(double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @expf(float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @expl(x86_fp80 frozen) [[NOT_READNONE]] exp2(f); exp2f(f); exp2l(f); // NO__ERRNO: declare double @llvm.exp2.f64(double) [[READNONE_INTRINSIC]] // NO__ERRNO: declare float @llvm.exp2.f32(float) [[READNONE_INTRINSIC]] // NO__ERRNO: declare x86_fp80 @llvm.exp2.f80(x86_fp80) [[READNONE_INTRINSIC]] -// HAS_ERRNO: declare double @exp2(double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @exp2f(float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @exp2l(x86_fp80) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen double @exp2(double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @exp2f(float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @exp2l(x86_fp80 frozen) [[NOT_READNONE]] expm1(f); expm1f(f); expm1l(f); -// NO__ERRNO: declare double @expm1(double) [[READNONE]] -// NO__ERRNO: declare float @expm1f(float) [[READNONE]] -// NO__ERRNO: declare x86_fp80 @expm1l(x86_fp80) [[READNONE]] -// HAS_ERRNO: declare double @expm1(double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @expm1f(float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @expm1l(x86_fp80) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @expm1(double frozen) [[READNONE]] +// NO__ERRNO: declare frozen float @expm1f(float frozen) [[READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @expm1l(x86_fp80 frozen) [[READNONE]] +// HAS_ERRNO: declare frozen double @expm1(double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @expm1f(float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @expm1l(x86_fp80 frozen) [[NOT_READNONE]] fdim(f,f); fdimf(f,f); fdiml(f,f); -// NO__ERRNO: declare double @fdim(double, double) [[READNONE]] -// NO__ERRNO: declare float @fdimf(float, float) [[READNONE]] -// NO__ERRNO: declare x86_fp80 @fdiml(x86_fp80, x86_fp80) [[READNONE]] -// HAS_ERRNO: declare double @fdim(double, double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @fdimf(float, float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @fdiml(x86_fp80, x86_fp80) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @fdim(double frozen, double frozen) [[READNONE]] +// NO__ERRNO: declare frozen float @fdimf(float frozen, float frozen) [[READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @fdiml(x86_fp80 frozen, x86_fp80 frozen) [[READNONE]] +// HAS_ERRNO: declare frozen double @fdim(double frozen, double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @fdimf(float frozen, float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @fdiml(x86_fp80 frozen, x86_fp80 frozen) [[NOT_READNONE]] floor(f); floorf(f); floorl(f); @@ -246,9 +246,9 @@ // NO__ERRNO: declare double @llvm.fma.f64(double, double, double) [[READNONE_INTRINSIC]] // NO__ERRNO: declare float @llvm.fma.f32(float, float, float) [[READNONE_INTRINSIC]] // NO__ERRNO: declare x86_fp80 @llvm.fma.f80(x86_fp80, x86_fp80, x86_fp80) [[READNONE_INTRINSIC]] -// HAS_ERRNO: declare double @fma(double, double, double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @fmaf(float, float, float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @fmal(x86_fp80, x86_fp80, x86_fp80) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen double @fma(double frozen, double frozen, double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @fmaf(float frozen, float frozen, float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @fmal(x86_fp80 frozen, x86_fp80 frozen, x86_fp80 frozen) [[NOT_READNONE]] // On GNU or Win, fma never sets errno, so we can convert to the intrinsic. @@ -281,111 +281,111 @@ hypot(f,f); hypotf(f,f); hypotl(f,f); -// NO__ERRNO: declare double @hypot(double, double) [[READNONE]] -// NO__ERRNO: declare float @hypotf(float, float) [[READNONE]] -// NO__ERRNO: declare x86_fp80 @hypotl(x86_fp80, x86_fp80) [[READNONE]] -// HAS_ERRNO: declare double @hypot(double, double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @hypotf(float, float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @hypotl(x86_fp80, x86_fp80) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @hypot(double frozen, double frozen) [[READNONE]] +// NO__ERRNO: declare frozen float @hypotf(float frozen, float frozen) [[READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @hypotl(x86_fp80 frozen, x86_fp80 frozen) [[READNONE]] +// HAS_ERRNO: declare frozen double @hypot(double frozen, double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @hypotf(float frozen, float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @hypotl(x86_fp80 frozen, x86_fp80 frozen) [[NOT_READNONE]] ilogb(f); ilogbf(f); ilogbl(f); -// NO__ERRNO: declare i32 @ilogb(double) [[READNONE]] -// NO__ERRNO: declare i32 @ilogbf(float) [[READNONE]] -// NO__ERRNO: declare i32 @ilogbl(x86_fp80) [[READNONE]] -// HAS_ERRNO: declare i32 @ilogb(double) [[NOT_READNONE]] -// HAS_ERRNO: declare i32 @ilogbf(float) [[NOT_READNONE]] -// HAS_ERRNO: declare i32 @ilogbl(x86_fp80) [[NOT_READNONE]] +// NO__ERRNO: declare frozen i32 @ilogb(double frozen) [[READNONE]] +// NO__ERRNO: declare frozen i32 @ilogbf(float frozen) [[READNONE]] +// NO__ERRNO: declare frozen i32 @ilogbl(x86_fp80 frozen) [[READNONE]] +// HAS_ERRNO: declare frozen i32 @ilogb(double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen i32 @ilogbf(float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen i32 @ilogbl(x86_fp80 frozen) [[NOT_READNONE]] lgamma(f); lgammaf(f); lgammal(f); -// NO__ERRNO: declare double @lgamma(double) [[NOT_READNONE]] -// NO__ERRNO: declare float @lgammaf(float) [[NOT_READNONE]] -// NO__ERRNO: declare x86_fp80 @lgammal(x86_fp80) [[NOT_READNONE]] -// HAS_ERRNO: declare double @lgamma(double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @lgammaf(float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @lgammal(x86_fp80) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @lgamma(double frozen) [[NOT_READNONE]] +// NO__ERRNO: declare frozen float @lgammaf(float frozen) [[NOT_READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @lgammal(x86_fp80 frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen double @lgamma(double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @lgammaf(float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @lgammal(x86_fp80 frozen) [[NOT_READNONE]] llrint(f); llrintf(f); llrintl(f); // NO__ERRNO: declare i64 @llvm.llrint.i64.f64(double) [[READNONE_INTRINSIC]] // NO__ERRNO: declare i64 @llvm.llrint.i64.f32(float) [[READNONE_INTRINSIC]] // NO__ERRNO: declare i64 @llvm.llrint.i64.f80(x86_fp80) [[READNONE_INTRINSIC]] -// HAS_ERRNO: declare i64 @llrint(double) [[NOT_READNONE]] -// HAS_ERRNO: declare i64 @llrintf(float) [[NOT_READNONE]] -// HAS_ERRNO: declare i64 @llrintl(x86_fp80) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen i64 @llrint(double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen i64 @llrintf(float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen i64 @llrintl(x86_fp80 frozen) [[NOT_READNONE]] llround(f); llroundf(f); llroundl(f); // NO__ERRNO: declare i64 @llvm.llround.i64.f64(double) [[READNONE_INTRINSIC]] // NO__ERRNO: declare i64 @llvm.llround.i64.f32(float) [[READNONE_INTRINSIC]] // NO__ERRNO: declare i64 @llvm.llround.i64.f80(x86_fp80) [[READNONE_INTRINSIC]] -// HAS_ERRNO: declare i64 @llround(double) [[NOT_READNONE]] -// HAS_ERRNO: declare i64 @llroundf(float) [[NOT_READNONE]] -// HAS_ERRNO: declare i64 @llroundl(x86_fp80) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen i64 @llround(double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen i64 @llroundf(float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen i64 @llroundl(x86_fp80 frozen) [[NOT_READNONE]] log(f); logf(f); logl(f); // NO__ERRNO: declare double @llvm.log.f64(double) [[READNONE_INTRINSIC]] // NO__ERRNO: declare float @llvm.log.f32(float) [[READNONE_INTRINSIC]] // NO__ERRNO: declare x86_fp80 @llvm.log.f80(x86_fp80) [[READNONE_INTRINSIC]] -// HAS_ERRNO: declare double @log(double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @logf(float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @logl(x86_fp80) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen double @log(double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @logf(float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @logl(x86_fp80 frozen) [[NOT_READNONE]] log10(f); log10f(f); log10l(f); // NO__ERRNO: declare double @llvm.log10.f64(double) [[READNONE_INTRINSIC]] // NO__ERRNO: declare float @llvm.log10.f32(float) [[READNONE_INTRINSIC]] // NO__ERRNO: declare x86_fp80 @llvm.log10.f80(x86_fp80) [[READNONE_INTRINSIC]] -// HAS_ERRNO: declare double @log10(double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @log10f(float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @log10l(x86_fp80) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen double @log10(double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @log10f(float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @log10l(x86_fp80 frozen) [[NOT_READNONE]] log1p(f); log1pf(f); log1pl(f); -// NO__ERRNO: declare double @log1p(double) [[READNONE]] -// NO__ERRNO: declare float @log1pf(float) [[READNONE]] -// NO__ERRNO: declare x86_fp80 @log1pl(x86_fp80) [[READNONE]] -// HAS_ERRNO: declare double @log1p(double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @log1pf(float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @log1pl(x86_fp80) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @log1p(double frozen) [[READNONE]] +// NO__ERRNO: declare frozen float @log1pf(float frozen) [[READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @log1pl(x86_fp80 frozen) [[READNONE]] +// HAS_ERRNO: declare frozen double @log1p(double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @log1pf(float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @log1pl(x86_fp80 frozen) [[NOT_READNONE]] log2(f); log2f(f); log2l(f); // NO__ERRNO: declare double @llvm.log2.f64(double) [[READNONE_INTRINSIC]] // NO__ERRNO: declare float @llvm.log2.f32(float) [[READNONE_INTRINSIC]] // NO__ERRNO: declare x86_fp80 @llvm.log2.f80(x86_fp80) [[READNONE_INTRINSIC]] -// HAS_ERRNO: declare double @log2(double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @log2f(float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @log2l(x86_fp80) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen double @log2(double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @log2f(float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @log2l(x86_fp80 frozen) [[NOT_READNONE]] logb(f); logbf(f); logbl(f); -// NO__ERRNO: declare double @logb(double) [[READNONE]] -// NO__ERRNO: declare float @logbf(float) [[READNONE]] -// NO__ERRNO: declare x86_fp80 @logbl(x86_fp80) [[READNONE]] -// HAS_ERRNO: declare double @logb(double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @logbf(float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @logbl(x86_fp80) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @logb(double frozen) [[READNONE]] +// NO__ERRNO: declare frozen float @logbf(float frozen) [[READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @logbl(x86_fp80 frozen) [[READNONE]] +// HAS_ERRNO: declare frozen double @logb(double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @logbf(float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @logbl(x86_fp80 frozen) [[NOT_READNONE]] lrint(f); lrintf(f); lrintl(f); // NO__ERRNO: declare i64 @llvm.lrint.i64.f64(double) [[READNONE_INTRINSIC]] // NO__ERRNO: declare i64 @llvm.lrint.i64.f32(float) [[READNONE_INTRINSIC]] // NO__ERRNO: declare i64 @llvm.lrint.i64.f80(x86_fp80) [[READNONE_INTRINSIC]] -// HAS_ERRNO: declare i64 @lrint(double) [[NOT_READNONE]] -// HAS_ERRNO: declare i64 @lrintf(float) [[NOT_READNONE]] -// HAS_ERRNO: declare i64 @lrintl(x86_fp80) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen i64 @lrint(double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen i64 @lrintf(float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen i64 @lrintl(x86_fp80 frozen) [[NOT_READNONE]] lround(f); lroundf(f); lroundl(f); // NO__ERRNO: declare i64 @llvm.lround.i64.f64(double) [[READNONE_INTRINSIC]] // NO__ERRNO: declare i64 @llvm.lround.i64.f32(float) [[READNONE_INTRINSIC]] // NO__ERRNO: declare i64 @llvm.lround.i64.f80(x86_fp80) [[READNONE_INTRINSIC]] -// HAS_ERRNO: declare i64 @lround(double) [[NOT_READNONE]] -// HAS_ERRNO: declare i64 @lroundf(float) [[NOT_READNONE]] -// HAS_ERRNO: declare i64 @lroundl(x86_fp80) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen i64 @lround(double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen i64 @lroundf(float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen i64 @lroundl(x86_fp80 frozen) [[NOT_READNONE]] nearbyint(f); nearbyintf(f); nearbyintl(f); @@ -398,39 +398,39 @@ nextafter(f,f); nextafterf(f,f); nextafterl(f,f); -// NO__ERRNO: declare double @nextafter(double, double) [[READNONE]] -// NO__ERRNO: declare float @nextafterf(float, float) [[READNONE]] -// NO__ERRNO: declare x86_fp80 @nextafterl(x86_fp80, x86_fp80) [[READNONE]] -// HAS_ERRNO: declare double @nextafter(double, double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @nextafterf(float, float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @nextafterl(x86_fp80, x86_fp80) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @nextafter(double frozen, double frozen) [[READNONE]] +// NO__ERRNO: declare frozen float @nextafterf(float frozen, float frozen) [[READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @nextafterl(x86_fp80 frozen, x86_fp80 frozen) [[READNONE]] +// HAS_ERRNO: declare frozen double @nextafter(double frozen, double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @nextafterf(float frozen, float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @nextafterl(x86_fp80 frozen, x86_fp80 frozen) [[NOT_READNONE]] nexttoward(f,f); nexttowardf(f,f);nexttowardl(f,f); -// NO__ERRNO: declare double @nexttoward(double, x86_fp80) [[READNONE]] -// NO__ERRNO: declare float @nexttowardf(float, x86_fp80) [[READNONE]] -// NO__ERRNO: declare x86_fp80 @nexttowardl(x86_fp80, x86_fp80) [[READNONE]] -// HAS_ERRNO: declare double @nexttoward(double, x86_fp80) [[NOT_READNONE]] -// HAS_ERRNO: declare float @nexttowardf(float, x86_fp80) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @nexttowardl(x86_fp80, x86_fp80) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @nexttoward(double frozen, x86_fp80 frozen) [[READNONE]] +// NO__ERRNO: declare frozen float @nexttowardf(float frozen, x86_fp80 frozen) [[READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @nexttowardl(x86_fp80 frozen, x86_fp80 frozen) [[READNONE]] +// HAS_ERRNO: declare frozen double @nexttoward(double frozen, x86_fp80 frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @nexttowardf(float frozen, x86_fp80 frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @nexttowardl(x86_fp80 frozen, x86_fp80 frozen) [[NOT_READNONE]] remainder(f,f); remainderf(f,f); remainderl(f,f); -// NO__ERRNO: declare double @remainder(double, double) [[READNONE]] -// NO__ERRNO: declare float @remainderf(float, float) [[READNONE]] -// NO__ERRNO: declare x86_fp80 @remainderl(x86_fp80, x86_fp80) [[READNONE]] -// HAS_ERRNO: declare double @remainder(double, double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @remainderf(float, float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @remainderl(x86_fp80, x86_fp80) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @remainder(double frozen, double frozen) [[READNONE]] +// NO__ERRNO: declare frozen float @remainderf(float frozen, float frozen) [[READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @remainderl(x86_fp80 frozen, x86_fp80 frozen) [[READNONE]] +// HAS_ERRNO: declare frozen double @remainder(double frozen, double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @remainderf(float frozen, float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @remainderl(x86_fp80 frozen, x86_fp80 frozen) [[NOT_READNONE]] remquo(f,f,i); remquof(f,f,i); remquol(f,f,i); -// NO__ERRNO: declare double @remquo(double, double, i32*) [[NOT_READNONE]] -// NO__ERRNO: declare float @remquof(float, float, i32*) [[NOT_READNONE]] -// NO__ERRNO: declare x86_fp80 @remquol(x86_fp80, x86_fp80, i32*) [[NOT_READNONE]] -// HAS_ERRNO: declare double @remquo(double, double, i32*) [[NOT_READNONE]] -// HAS_ERRNO: declare float @remquof(float, float, i32*) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @remquol(x86_fp80, x86_fp80, i32*) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @remquo(double frozen, double frozen, i32* frozen) [[NOT_READNONE]] +// NO__ERRNO: declare frozen float @remquof(float frozen, float frozen, i32* frozen) [[NOT_READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @remquol(x86_fp80 frozen, x86_fp80 frozen, i32* frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen double @remquo(double frozen, double frozen, i32* frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @remquof(float frozen, float frozen, i32* frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @remquol(x86_fp80 frozen, x86_fp80 frozen, i32* frozen) [[NOT_READNONE]] rint(f); rintf(f); rintl(f); @@ -452,75 +452,75 @@ scalbln(f,f); scalblnf(f,f); scalblnl(f,f); -// NO__ERRNO: declare double @scalbln(double, i64) [[READNONE]] -// NO__ERRNO: declare float @scalblnf(float, i64) [[READNONE]] -// NO__ERRNO: declare x86_fp80 @scalblnl(x86_fp80, i64) [[READNONE]] -// HAS_ERRNO: declare double @scalbln(double, i64) [[NOT_READNONE]] -// HAS_ERRNO: declare float @scalblnf(float, i64) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @scalblnl(x86_fp80, i64) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @scalbln(double frozen, i64 frozen) [[READNONE]] +// NO__ERRNO: declare frozen float @scalblnf(float frozen, i64 frozen) [[READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @scalblnl(x86_fp80 frozen, i64 frozen) [[READNONE]] +// HAS_ERRNO: declare frozen double @scalbln(double frozen, i64 frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @scalblnf(float frozen, i64 frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @scalblnl(x86_fp80 frozen, i64 frozen) [[NOT_READNONE]] scalbn(f,f); scalbnf(f,f); scalbnl(f,f); -// NO__ERRNO: declare double @scalbn(double, i32) [[READNONE]] -// NO__ERRNO: declare float @scalbnf(float, i32) [[READNONE]] -// NO__ERRNO: declare x86_fp80 @scalbnl(x86_fp80, i32) [[READNONE]] -// HAS_ERRNO: declare double @scalbn(double, i32) [[NOT_READNONE]] -// HAS_ERRNO: declare float @scalbnf(float, i32) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @scalbnl(x86_fp80, i32) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @scalbn(double frozen, i32 frozen) [[READNONE]] +// NO__ERRNO: declare frozen float @scalbnf(float frozen, i32 frozen) [[READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @scalbnl(x86_fp80 frozen, i32 frozen) [[READNONE]] +// HAS_ERRNO: declare frozen double @scalbn(double frozen, i32 frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @scalbnf(float frozen, i32 frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @scalbnl(x86_fp80 frozen, i32 frozen) [[NOT_READNONE]] sin(f); sinf(f); sinl(f); // NO__ERRNO: declare double @llvm.sin.f64(double) [[READNONE_INTRINSIC]] // NO__ERRNO: declare float @llvm.sin.f32(float) [[READNONE_INTRINSIC]] // NO__ERRNO: declare x86_fp80 @llvm.sin.f80(x86_fp80) [[READNONE_INTRINSIC]] -// HAS_ERRNO: declare double @sin(double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @sinf(float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @sinl(x86_fp80) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen double @sin(double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @sinf(float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @sinl(x86_fp80 frozen) [[NOT_READNONE]] sinh(f); sinhf(f); sinhl(f); -// NO__ERRNO: declare double @sinh(double) [[READNONE]] -// NO__ERRNO: declare float @sinhf(float) [[READNONE]] -// NO__ERRNO: declare x86_fp80 @sinhl(x86_fp80) [[READNONE]] -// HAS_ERRNO: declare double @sinh(double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @sinhf(float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @sinhl(x86_fp80) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @sinh(double frozen) [[READNONE]] +// NO__ERRNO: declare frozen float @sinhf(float frozen) [[READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @sinhl(x86_fp80 frozen) [[READNONE]] +// HAS_ERRNO: declare frozen double @sinh(double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @sinhf(float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @sinhl(x86_fp80 frozen) [[NOT_READNONE]] sqrt(f); sqrtf(f); sqrtl(f); // NO__ERRNO: declare double @llvm.sqrt.f64(double) [[READNONE_INTRINSIC]] // NO__ERRNO: declare float @llvm.sqrt.f32(float) [[READNONE_INTRINSIC]] // NO__ERRNO: declare x86_fp80 @llvm.sqrt.f80(x86_fp80) [[READNONE_INTRINSIC]] -// HAS_ERRNO: declare double @sqrt(double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @sqrtf(float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @sqrtl(x86_fp80) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen double @sqrt(double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @sqrtf(float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @sqrtl(x86_fp80 frozen) [[NOT_READNONE]] tan(f); tanf(f); tanl(f); -// NO__ERRNO: declare double @tan(double) [[READNONE]] -// NO__ERRNO: declare float @tanf(float) [[READNONE]] -// NO__ERRNO: declare x86_fp80 @tanl(x86_fp80) [[READNONE]] -// HAS_ERRNO: declare double @tan(double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @tanf(float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @tanl(x86_fp80) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @tan(double frozen) [[READNONE]] +// NO__ERRNO: declare frozen float @tanf(float frozen) [[READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @tanl(x86_fp80 frozen) [[READNONE]] +// HAS_ERRNO: declare frozen double @tan(double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @tanf(float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @tanl(x86_fp80 frozen) [[NOT_READNONE]] tanh(f); tanhf(f); tanhl(f); -// NO__ERRNO: declare double @tanh(double) [[READNONE]] -// NO__ERRNO: declare float @tanhf(float) [[READNONE]] -// NO__ERRNO: declare x86_fp80 @tanhl(x86_fp80) [[READNONE]] -// HAS_ERRNO: declare double @tanh(double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @tanhf(float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @tanhl(x86_fp80) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @tanh(double frozen) [[READNONE]] +// NO__ERRNO: declare frozen float @tanhf(float frozen) [[READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @tanhl(x86_fp80 frozen) [[READNONE]] +// HAS_ERRNO: declare frozen double @tanh(double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @tanhf(float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @tanhl(x86_fp80 frozen) [[NOT_READNONE]] tgamma(f); tgammaf(f); tgammal(f); -// NO__ERRNO: declare double @tgamma(double) [[READNONE]] -// NO__ERRNO: declare float @tgammaf(float) [[READNONE]] -// NO__ERRNO: declare x86_fp80 @tgammal(x86_fp80) [[READNONE]] -// HAS_ERRNO: declare double @tgamma(double) [[NOT_READNONE]] -// HAS_ERRNO: declare float @tgammaf(float) [[NOT_READNONE]] -// HAS_ERRNO: declare x86_fp80 @tgammal(x86_fp80) [[NOT_READNONE]] +// NO__ERRNO: declare frozen double @tgamma(double frozen) [[READNONE]] +// NO__ERRNO: declare frozen float @tgammaf(float frozen) [[READNONE]] +// NO__ERRNO: declare frozen x86_fp80 @tgammal(x86_fp80 frozen) [[READNONE]] +// HAS_ERRNO: declare frozen double @tgamma(double frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen float @tgammaf(float frozen) [[NOT_READNONE]] +// HAS_ERRNO: declare frozen x86_fp80 @tgammal(x86_fp80 frozen) [[NOT_READNONE]] trunc(f); truncf(f); truncl(f); diff --git a/clang/test/CodeGen/matrix-type-builtins.c b/clang/test/CodeGen/matrix-type-builtins.c --- a/clang/test/CodeGen/matrix-type-builtins.c +++ b/clang/test/CodeGen/matrix-type-builtins.c @@ -75,7 +75,7 @@ // CHECK-LABEL: define void @transpose_rvalue() // CHECK-NEXT: entry: // CHECK-NEXT: [[M_T_ADDR:%.*]] = alloca [25 x double], align 8 - // CHECK-NEXT: [[CALL:%.*]] = call <25 x double> (...) @get_matrix() + // CHECK-NEXT: [[CALL:%.*]] = call frozen <25 x double> (...) @get_matrix() // CHECK-NEXT: [[M_T:%.*]] = call <25 x double> @llvm.matrix.transpose.v25f64(<25 x double> [[CALL]], i32 5, i32 5) // CHECK-NEXT: [[M_T_ADDR_C:%.*]] = bitcast [25 x double]* [[M_T_ADDR]] to <25 x double>* // CHECK-NEXT: store <25 x double> [[M_T]], <25 x double>* [[M_T_ADDR_C]], align 8 diff --git a/clang/test/CodeGen/matrix-type-operators.c b/clang/test/CodeGen/matrix-type-operators.c --- a/clang/test/CodeGen/matrix-type-operators.c +++ b/clang/test/CodeGen/matrix-type-operators.c @@ -8,7 +8,7 @@ // Floating point matrix/scalar additions. void add_matrix_matrix_double(dx5x5_t a, dx5x5_t b, dx5x5_t c) { - // CHECK-LABEL: define void @add_matrix_matrix_double(<25 x double> %a, <25 x double> %b, <25 x double> %c) + // CHECK-LABEL: define void @add_matrix_matrix_double(<25 x double> frozen %a, <25 x double> frozen %b, <25 x double> frozen %c) // CHECK: [[B:%.*]] = load <25 x double>, <25 x double>* {{.*}}, align 8 // CHECK-NEXT: [[C:%.*]] = load <25 x double>, <25 x double>* {{.*}}, align 8 // CHECK-NEXT: [[RES:%.*]] = fadd <25 x double> [[B]], [[C]] @@ -18,7 +18,7 @@ } void add_matrix_matrix_float(fx2x3_t a, fx2x3_t b, fx2x3_t c) { - // CHECK-LABEL: define void @add_matrix_matrix_float(<6 x float> %a, <6 x float> %b, <6 x float> %c) + // CHECK-LABEL: define void @add_matrix_matrix_float(<6 x float> frozen %a, <6 x float> frozen %b, <6 x float> frozen %c) // CHECK: [[B:%.*]] = load <6 x float>, <6 x float>* {{.*}}, align 4 // CHECK-NEXT: [[C:%.*]] = load <6 x float>, <6 x float>* {{.*}}, align 4 // CHECK-NEXT: [[RES:%.*]] = fadd <6 x float> [[B]], [[C]] @@ -28,7 +28,7 @@ } void add_matrix_scalar_double_float(dx5x5_t a, float vf) { - // CHECK-LABEL: define void @add_matrix_scalar_double_float(<25 x double> %a, float %vf) + // CHECK-LABEL: define void @add_matrix_scalar_double_float(<25 x double> frozen %a, float frozen %vf) // CHECK: [[MATRIX:%.*]] = load <25 x double>, <25 x double>* {{.*}}, align 8 // CHECK-NEXT: [[SCALAR:%.*]] = load float, float* %vf.addr, align 4 // CHECK-NEXT: [[SCALAR_EXT:%.*]] = fpext float [[SCALAR]] to double @@ -41,7 +41,7 @@ } void add_matrix_scalar_double_double(dx5x5_t a, double vd) { - // CHECK-LABEL: define void @add_matrix_scalar_double_double(<25 x double> %a, double %vd) + // CHECK-LABEL: define void @add_matrix_scalar_double_double(<25 x double> frozen %a, double frozen %vd) // CHECK: [[MATRIX:%.*]] = load <25 x double>, <25 x double>* {{.*}}, align 8 // CHECK-NEXT: [[SCALAR:%.*]] = load double, double* %vd.addr, align 8 // CHECK-NEXT: [[SCALAR_EMBED:%.*]] = insertelement <25 x double> undef, double [[SCALAR]], i32 0 @@ -53,7 +53,7 @@ } void add_matrix_scalar_float_float(fx2x3_t b, float vf) { - // CHECK-LABEL: define void @add_matrix_scalar_float_float(<6 x float> %b, float %vf) + // CHECK-LABEL: define void @add_matrix_scalar_float_float(<6 x float> frozen %b, float frozen %vf) // CHECK: [[MATRIX:%.*]] = load <6 x float>, <6 x float>* {{.*}}, align 4 // CHECK-NEXT: [[SCALAR:%.*]] = load float, float* %vf.addr, align 4 // CHECK-NEXT: [[SCALAR_EMBED:%.*]] = insertelement <6 x float> undef, float [[SCALAR]], i32 0 @@ -65,7 +65,7 @@ } void add_matrix_scalar_float_double(fx2x3_t b, double vd) { - // CHECK-LABEL: define void @add_matrix_scalar_float_double(<6 x float> %b, double %vd) + // CHECK-LABEL: define void @add_matrix_scalar_float_double(<6 x float> frozen %b, double frozen %vd) // CHECK: [[MATRIX:%.*]] = load <6 x float>, <6 x float>* {{.*}}, align 4 // CHECK-NEXT: [[SCALAR:%.*]] = load double, double* %vd.addr, align 8 // CHECK-NEXT: [[SCALAR_TRUNC:%.*]] = fptrunc double [[SCALAR]] to float @@ -80,7 +80,7 @@ // Integer matrix/scalar additions void add_matrix_matrix_int(ix9x3_t a, ix9x3_t b, ix9x3_t c) { - // CHECK-LABEL: define void @add_matrix_matrix_int(<27 x i32> %a, <27 x i32> %b, <27 x i32> %c) + // CHECK-LABEL: define void @add_matrix_matrix_int(<27 x i32> frozen %a, <27 x i32> frozen %b, <27 x i32> frozen %c) // CHECK: [[B:%.*]] = load <27 x i32>, <27 x i32>* {{.*}}, align 4 // CHECK-NEXT: [[C:%.*]] = load <27 x i32>, <27 x i32>* {{.*}}, align 4 // CHECK-NEXT: [[RES:%.*]] = add <27 x i32> [[B]], [[C]] @@ -89,7 +89,7 @@ } void add_matrix_matrix_unsigned_long_long(ullx4x2_t a, ullx4x2_t b, ullx4x2_t c) { - // CHECK-LABEL: define void @add_matrix_matrix_unsigned_long_long(<8 x i64> %a, <8 x i64> %b, <8 x i64> %c) + // CHECK-LABEL: define void @add_matrix_matrix_unsigned_long_long(<8 x i64> frozen %a, <8 x i64> frozen %b, <8 x i64> frozen %c) // CHECK: [[B:%.*]] = load <8 x i64>, <8 x i64>* {{.*}}, align 8 // CHECK-NEXT: [[C:%.*]] = load <8 x i64>, <8 x i64>* {{.*}}, align 8 // CHECK-NEXT: [[RES:%.*]] = add <8 x i64> [[B]], [[C]] @@ -99,7 +99,7 @@ } void add_matrix_scalar_int_short(ix9x3_t a, short vs) { - // CHECK-LABEL: define void @add_matrix_scalar_int_short(<27 x i32> %a, i16 signext %vs) + // CHECK-LABEL: define void @add_matrix_scalar_int_short(<27 x i32> frozen %a, i16 frozen signext %vs) // CHECK: [[MATRIX:%.*]] = load <27 x i32>, <27 x i32>* [[MAT_ADDR:%.*]], align 4 // CHECK-NEXT: [[SCALAR:%.*]] = load i16, i16* %vs.addr, align 2 // CHECK-NEXT: [[SCALAR_EXT:%.*]] = sext i16 [[SCALAR]] to i32 @@ -112,7 +112,7 @@ } void add_matrix_scalar_int_long_int(ix9x3_t a, long int vli) { - // CHECK-LABEL: define void @add_matrix_scalar_int_long_int(<27 x i32> %a, i64 %vli) + // CHECK-LABEL: define void @add_matrix_scalar_int_long_int(<27 x i32> frozen %a, i64 frozen %vli) // CHECK: [[MATRIX:%.*]] = load <27 x i32>, <27 x i32>* [[MAT_ADDR:%.*]], align 4 // CHECK-NEXT: [[SCALAR:%.*]] = load i64, i64* %vli.addr, align 8 // CHECK-NEXT: [[SCALAR_TRUNC:%.*]] = trunc i64 [[SCALAR]] to i32 @@ -125,7 +125,7 @@ } void add_matrix_scalar_int_unsigned_long_long(ix9x3_t a, unsigned long long int vulli) { - // CHECK-LABEL: define void @add_matrix_scalar_int_unsigned_long_long(<27 x i32> %a, i64 %vulli) + // CHECK-LABEL: define void @add_matrix_scalar_int_unsigned_long_long(<27 x i32> frozen %a, i64 frozen %vulli) // CHECK: [[MATRIX:%.*]] = load <27 x i32>, <27 x i32>* [[MAT_ADDR:%.*]], align 4 // CHECK-NEXT: [[SCALAR:%.*]] = load i64, i64* %vulli.addr, align 8 // CHECK-NEXT: [[SCALAR_TRUNC:%.*]] = trunc i64 [[SCALAR]] to i32 @@ -138,7 +138,7 @@ } void add_matrix_scalar_long_long_int_short(ullx4x2_t b, short vs) { - // CHECK-LABEL: define void @add_matrix_scalar_long_long_int_short(<8 x i64> %b, i16 signext %vs) + // CHECK-LABEL: define void @add_matrix_scalar_long_long_int_short(<8 x i64> frozen %b, i16 frozen signext %vs) // CHECK: [[SCALAR:%.*]] = load i16, i16* %vs.addr, align 2 // CHECK-NEXT: [[SCALAR_EXT:%.*]] = sext i16 [[SCALAR]] to i64 // CHECK-NEXT: [[MATRIX:%.*]] = load <8 x i64>, <8 x i64>* {{.*}}, align 8 @@ -151,7 +151,7 @@ } void add_matrix_scalar_long_long_int_int(ullx4x2_t b, long int vli) { - // CHECK-LABEL: define void @add_matrix_scalar_long_long_int_int(<8 x i64> %b, i64 %vli) + // CHECK-LABEL: define void @add_matrix_scalar_long_long_int_int(<8 x i64> frozen %b, i64 frozen %vli) // CHECK: [[SCALAR:%.*]] = load i64, i64* %vli.addr, align 8 // CHECK-NEXT: [[MATRIX:%.*]] = load <8 x i64>, <8 x i64>* {{.*}}, align 8 // CHECK-NEXT: [[SCALAR_EMBED:%.*]] = insertelement <8 x i64> undef, i64 [[SCALAR]], i32 0 @@ -519,7 +519,7 @@ } void insert_compound_stmt(dx5x5_t a) { - // CHECK-LABEL: define void @insert_compound_stmt(<25 x double> %a) + // CHECK-LABEL: define void @insert_compound_stmt(<25 x double> frozen %a) // CHECK: [[A:%.*]] = load <25 x double>, <25 x double>* [[A_PTR:%.*]], align 8 // CHECK-NEXT: [[EXT:%.*]] = extractelement <25 x double> [[A]], i64 17 // CHECK-NEXT: [[SUB:%.*]] = fsub double [[EXT]], 1.000000e+00 @@ -536,7 +536,7 @@ }; void insert_compound_stmt_field(struct Foo *a, float f, unsigned i, unsigned j) { - // CHECK-LABEL: define void @insert_compound_stmt_field(%struct.Foo* %a, float %f, i32 %i, i32 %j) + // CHECK-LABEL: define void @insert_compound_stmt_field(%struct.Foo* frozen %a, float frozen %f, i32 frozen %i, i32 frozen %j) // CHECK: [[I:%.*]] = load i32, i32* %i.addr, align 4 // CHECK-NEXT: [[I_EXT:%.*]] = zext i32 [[I]] to i64 // CHECK-NEXT: [[J:%.*]] = load i32, i32* %j.addr, align 4 @@ -556,7 +556,7 @@ } void matrix_as_idx(ix9x3_t a, int i, int j, dx5x5_t b) { - // CHECK-LABEL: define void @matrix_as_idx(<27 x i32> %a, i32 %i, i32 %j, <25 x double> %b) + // CHECK-LABEL: define void @matrix_as_idx(<27 x i32> frozen %a, i32 frozen %i, i32 frozen %j, <25 x double> frozen %b) // CHECK: [[I1:%.*]] = load i32, i32* %i.addr, align 4 // CHECK-NEXT: [[I1_EXT:%.*]] = sext i32 [[I1]] to i64 // CHECK-NEXT: [[J1:%.*]] = load i32, i32* %j.addr, align 4 diff --git a/clang/test/CodeGen/matrix-type.c b/clang/test/CodeGen/matrix-type.c --- a/clang/test/CodeGen/matrix-type.c +++ b/clang/test/CodeGen/matrix-type.c @@ -121,7 +121,7 @@ } fx3x3_t return_matrix(fx3x3_t *a) { - // CHECK-LABEL: define <9 x float> @return_matrix + // CHECK-LABEL: define frozen <9 x float> @return_matrix // CHECK-NEXT: entry: // CHECK-NEXT: %a.addr = alloca [9 x float]*, align 8 // CHECK-NEXT: store [9 x float]* %a, [9 x float]** %a.addr, align 8 diff --git a/clang/test/CodeGen/memccpy-libcall.c b/clang/test/CodeGen/memccpy-libcall.c --- a/clang/test/CodeGen/memccpy-libcall.c +++ b/clang/test/CodeGen/memccpy-libcall.c @@ -5,7 +5,7 @@ void *memccpy(void *, void const *, int, size_t); void test13(char *d, char *s, int c, size_t n) { - // CHECK: call i8* @memccpy{{.*}} #2 + // CHECK: call frozen i8* @memccpy{{.*}} #2 memccpy(d, s, c, n); } diff --git a/clang/test/CodeGen/memcpy-no-nobuiltin-if-not-emitted.c b/clang/test/CodeGen/memcpy-no-nobuiltin-if-not-emitted.c --- a/clang/test/CodeGen/memcpy-no-nobuiltin-if-not-emitted.c +++ b/clang/test/CodeGen/memcpy-no-nobuiltin-if-not-emitted.c @@ -18,7 +18,7 @@ void foo(void *a, const void *b, size_t c) { // Clang will always _emit_ this as memcpy. LLVM turns it into @llvm.memcpy // later on if optimizations are enabled. - // CHECK: call i8* @memcpy + // CHECK: call frozen i8* @memcpy memcpy(a, b, c); } diff --git a/clang/test/CodeGen/microsoft-call-conv-x64.c b/clang/test/CodeGen/microsoft-call-conv-x64.c --- a/clang/test/CodeGen/microsoft-call-conv-x64.c +++ b/clang/test/CodeGen/microsoft-call-conv-x64.c @@ -35,5 +35,5 @@ void __stdcall f7(foo) int foo; {} void f8(void) { f7(0); - // CHECK: call void @f7(i32 0) + // CHECK: call void @f7(i32 frozen 0) } diff --git a/clang/test/CodeGen/microsoft-call-conv.c b/clang/test/CodeGen/microsoft-call-conv.c --- a/clang/test/CodeGen/microsoft-call-conv.c +++ b/clang/test/CodeGen/microsoft-call-conv.c @@ -56,7 +56,7 @@ void __stdcall f7(foo) int foo; {} void f8(void) { f7(0); - // CHECK: call x86_stdcallcc void @f7(i32 0) + // CHECK: call x86_stdcallcc void @f7(i32 frozen 0) } // PR12535 diff --git a/clang/test/CodeGen/mingw-long-double.c b/clang/test/CodeGen/mingw-long-double.c --- a/clang/test/CodeGen/mingw-long-double.c +++ b/clang/test/CodeGen/mingw-long-double.c @@ -31,16 +31,16 @@ long double TestLD(long double x) { return x * x; } -// GNU32: define dso_local x86_fp80 @TestLD(x86_fp80 %x) -// GNU64: define dso_local void @TestLD(x86_fp80* noalias sret align 16 %agg.result, x86_fp80* %0) -// MSC64: define dso_local double @TestLD(double %x) +// GNU32: define dso_local frozen x86_fp80 @TestLD(x86_fp80 frozen %x) +// GNU64: define dso_local void @TestLD(x86_fp80* noalias sret align 16 %agg.result, x86_fp80* frozen %0) +// MSC64: define dso_local frozen double @TestLD(double frozen %x) long double _Complex TestLDC(long double _Complex x) { return x * x; } -// GNU32: define dso_local void @TestLDC({ x86_fp80, x86_fp80 }* noalias sret align 4 %agg.result, { x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 4 %x) -// GNU64: define dso_local void @TestLDC({ x86_fp80, x86_fp80 }* noalias sret align 16 %agg.result, { x86_fp80, x86_fp80 }* %x) -// MSC64: define dso_local void @TestLDC({ double, double }* noalias sret align 8 %agg.result, { double, double }* %x) +// GNU32: define dso_local void @TestLDC({ x86_fp80, x86_fp80 }* noalias sret align 4 %agg.result, { x86_fp80, x86_fp80 }* frozen byval({ x86_fp80, x86_fp80 }) align 4 %x) +// GNU64: define dso_local void @TestLDC({ x86_fp80, x86_fp80 }* noalias sret align 16 %agg.result, { x86_fp80, x86_fp80 }* frozen %x) +// MSC64: define dso_local void @TestLDC({ double, double }* noalias sret align 8 %agg.result, { double, double }* frozen %x) // GNU32: declare dso_local void @__mulxc3 // GNU64: declare dso_local void @__mulxc3 diff --git a/clang/test/CodeGen/mips-transparent-union.c b/clang/test/CodeGen/mips-transparent-union.c --- a/clang/test/CodeGen/mips-transparent-union.c +++ b/clang/test/CodeGen/mips-transparent-union.c @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -triple mips64-linux-gnu -S -o - -emit-llvm %s | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args -triple mips64-linux-gnu -S -o - -emit-llvm %s | FileCheck %s // // Transparent unions are passed according to the calling convention rules of // the first member. In this case, it is as if it were a void pointer so we diff --git a/clang/test/CodeGen/mips-unsigned-ext-var.c b/clang/test/CodeGen/mips-unsigned-ext-var.c --- a/clang/test/CodeGen/mips-unsigned-ext-var.c +++ b/clang/test/CodeGen/mips-unsigned-ext-var.c @@ -1,6 +1,6 @@ -// RUN: %clang_cc1 -triple mips64-unknown-linux -O2 -target-abi n64 -S -emit-llvm %s -o - | FileCheck %s -check-prefix=N64 -// RUN: %clang_cc1 -triple mips64-unknown-linux -O2 -target-abi n32 -S -emit-llvm %s -o - | FileCheck %s -check-prefix=N32 -// RUN: %clang_cc1 -triple mips-unknown-linux -O2 -target-abi o32 -S -emit-llvm %s -o - | FileCheck %s -check-prefix=O32 +// RUN: %clang_cc1 -disable-frozen-args -triple mips64-unknown-linux -O2 -target-abi n64 -S -emit-llvm %s -o - | FileCheck %s -check-prefix=N64 +// RUN: %clang_cc1 -disable-frozen-args -triple mips64-unknown-linux -O2 -target-abi n32 -S -emit-llvm %s -o - | FileCheck %s -check-prefix=N32 +// RUN: %clang_cc1 -disable-frozen-args -triple mips-unknown-linux -O2 -target-abi o32 -S -emit-llvm %s -o - | FileCheck %s -check-prefix=O32 #include @@ -17,6 +17,6 @@ foo(1,f); } -//N64: call signext i32 (i32, ...) @foo(i32 signext undef, i32 signext -32) -//N32: call signext i32 (i32, ...) @foo(i32 signext undef, i32 signext -32) -//O32: call i32 (i32, ...) @foo(i32 signext undef, i32 signext -32) +//N64: call frozen signext i32 (i32, ...) @foo(i32 signext undef, i32 signext -32) +//N32: call frozen signext i32 (i32, ...) @foo(i32 signext undef, i32 signext -32) +//O32: call frozen i32 (i32, ...) @foo(i32 signext undef, i32 signext -32) diff --git a/clang/test/CodeGen/mips-unsigned-extend.c b/clang/test/CodeGen/mips-unsigned-extend.c --- a/clang/test/CodeGen/mips-unsigned-extend.c +++ b/clang/test/CodeGen/mips-unsigned-extend.c @@ -10,6 +10,6 @@ foo(f); } -// N64: call void @foo(i32 signext %{{[0-9]+}}) -// N32: call void @foo(i32 signext %{{[0-9]+}}) -// O32: call void @foo(i32 signext %{{[0-9]+}}) +// N64: call void @foo(i32 frozen signext %{{[0-9]+}}) +// N32: call void @foo(i32 frozen signext %{{[0-9]+}}) +// O32: call void @foo(i32 frozen signext %{{[0-9]+}}) diff --git a/clang/test/CodeGen/mips-varargs.c b/clang/test/CodeGen/mips-varargs.c --- a/clang/test/CodeGen/mips-varargs.c +++ b/clang/test/CodeGen/mips-varargs.c @@ -19,9 +19,9 @@ return v; } -// O32-LABEL: define i32 @test_i32(i8*{{.*}} %fmt, ...) -// N32-LABEL: define signext i32 @test_i32(i8*{{.*}} %fmt, ...) -// N64-LABEL: define signext i32 @test_i32(i8*{{.*}} %fmt, ...) +// O32-LABEL: define frozen i32 @test_i32(i8*{{.*}} %fmt, ...) +// N32-LABEL: define frozen signext i32 @test_i32(i8*{{.*}} %fmt, ...) +// N64-LABEL: define frozen signext i32 @test_i32(i8*{{.*}} %fmt, ...) // // O32: %va = alloca i8*, align [[$PTRALIGN:4]] // N32: %va = alloca i8*, align [[$PTRALIGN:4]] @@ -63,7 +63,7 @@ return v; } -// ALL-LABEL: define i64 @test_i64(i8*{{.*}} %fmt, ...) +// ALL-LABEL: define frozen i64 @test_i64(i8*{{.*}} %fmt, ...) // // ALL: %va = alloca i8*, align [[$PTRALIGN]] // ALL: [[VA:%.+]] = bitcast i8** %va to i8* @@ -97,7 +97,7 @@ return v; } -// ALL-LABEL: define i8* @test_ptr(i8*{{.*}} %fmt, ...) +// ALL-LABEL: define frozen i8* @test_ptr(i8*{{.*}} %fmt, ...) // // ALL: %va = alloca i8*, align [[$PTRALIGN]] // ALL: [[V:%.*]] = alloca i8*, align [[$PTRALIGN]] @@ -135,9 +135,9 @@ return v[0]; } -// O32-LABEL: define i32 @test_v4i32(i8*{{.*}} %fmt, ...) -// N32-LABEL: define signext i32 @test_v4i32(i8*{{.*}} %fmt, ...) -// N64-LABEL: define signext i32 @test_v4i32(i8*{{.*}} %fmt, ...) +// O32-LABEL: define frozen i32 @test_v4i32(i8*{{.*}} %fmt, ...) +// N32-LABEL: define frozen signext i32 @test_v4i32(i8*{{.*}} %fmt, ...) +// N64-LABEL: define frozen signext i32 @test_v4i32(i8*{{.*}} %fmt, ...) // // ALL: %va = alloca i8*, align [[$PTRALIGN]] // ALL: [[V:%.+]] = alloca <4 x i32>, align 16 diff --git a/clang/test/CodeGen/mips-vector-arg.c b/clang/test/CodeGen/mips-vector-arg.c --- a/clang/test/CodeGen/mips-vector-arg.c +++ b/clang/test/CodeGen/mips-vector-arg.c @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -triple mipsel-unknown-linux -O3 -S -o - -emit-llvm %s | FileCheck %s -check-prefix=O32 -// RUN: %clang_cc1 -triple mips64el-unknown-linux -O3 -S -target-abi n64 -o - -emit-llvm %s | FileCheck %s -check-prefix=N64 +// RUN: %clang_cc1 -disable-frozen-args -triple mipsel-unknown-linux -O3 -S -o - -emit-llvm %s | FileCheck %s -check-prefix=O32 +// RUN: %clang_cc1 -disable-frozen-args -triple mips64el-unknown-linux -O3 -S -target-abi n64 -o - -emit-llvm %s | FileCheck %s -check-prefix=N64 // check that // 1. vector arguments are passed in integer registers @@ -9,18 +9,18 @@ typedef int v4i32 __attribute__ ((__vector_size__ (16))); // O32: define void @test_v4sf(i32 inreg %a1.coerce0, i32 inreg %a1.coerce1, i32 inreg %a1.coerce2, i32 inreg %a1.coerce3, i32 signext %a2, i32 %0, i32 inreg %a3.coerce0, i32 inreg %a3.coerce1, i32 inreg %a3.coerce2, i32 inreg %a3.coerce3) local_unnamed_addr [[NUW:#[0-9]+]] -// O32: declare i32 @test_v4sf_2(i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 signext, i32, i32 inreg, i32 inreg, i32 inreg, i32 inreg) +// O32: declare frozen i32 @test_v4sf_2(i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 signext, i32, i32 inreg, i32 inreg, i32 inreg, i32 inreg) // N64: define void @test_v4sf(i64 inreg %a1.coerce0, i64 inreg %a1.coerce1, i32 signext %a2, i64 %0, i64 inreg %a3.coerce0, i64 inreg %a3.coerce1) local_unnamed_addr [[NUW:#[0-9]+]] -// N64: declare signext i32 @test_v4sf_2(i64 inreg, i64 inreg, i32 signext, i64, i64 inreg, i64 inreg) +// N64: declare frozen signext i32 @test_v4sf_2(i64 inreg, i64 inreg, i32 signext, i64, i64 inreg, i64 inreg) extern test_v4sf_2(v4sf, int, v4sf); void test_v4sf(v4sf a1, int a2, v4sf a3) { test_v4sf_2(a3, a2, a1); } // O32: define void @test_v4i32(i32 inreg %a1.coerce0, i32 inreg %a1.coerce1, i32 inreg %a1.coerce2, i32 inreg %a1.coerce3, i32 signext %a2, i32 %0, i32 inreg %a3.coerce0, i32 inreg %a3.coerce1, i32 inreg %a3.coerce2, i32 inreg %a3.coerce3) local_unnamed_addr [[NUW]] -// O32: declare i32 @test_v4i32_2(i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 signext, i32, i32 inreg, i32 inreg, i32 inreg, i32 inreg) +// O32: declare frozen i32 @test_v4i32_2(i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 signext, i32, i32 inreg, i32 inreg, i32 inreg, i32 inreg) // N64: define void @test_v4i32(i64 inreg %a1.coerce0, i64 inreg %a1.coerce1, i32 signext %a2, i64 %0, i64 inreg %a3.coerce0, i64 inreg %a3.coerce1) local_unnamed_addr [[NUW]] -// N64: declare signext i32 @test_v4i32_2(i64 inreg, i64 inreg, i32 signext, i64, i64 inreg, i64 inreg) +// N64: declare frozen signext i32 @test_v4i32_2(i64 inreg, i64 inreg, i32 signext, i64, i64 inreg, i64 inreg) extern test_v4i32_2(v4i32, int, v4i32); void test_v4i32(v4i32 a1, int a2, v4i32 a3) { test_v4i32_2(a3, a2, a1); diff --git a/clang/test/CodeGen/mips-vector-return.c b/clang/test/CodeGen/mips-vector-return.c --- a/clang/test/CodeGen/mips-vector-return.c +++ b/clang/test/CodeGen/mips-vector-return.c @@ -9,7 +9,7 @@ typedef int v4i32 __attribute__ ((__vector_size__ (16))); // O32-LABEL: define dso_local void @test_v4sf(<4 x float>* noalias nocapture sret -// N64: define inreg { i64, i64 } @test_v4sf +// N64: define frozen inreg { i64, i64 } @test_v4sf v4sf test_v4sf(float a) { return (v4sf){0.0f, a, 0.0f, 0.0f}; } @@ -23,8 +23,8 @@ // O32 returns integer vectors whose size is equal to or smaller than 16-bytes // in integer registers. // -// O32: define dso_local inreg { i32, i32, i32, i32 } @test_v4i32 -// N64: define inreg { i64, i64 } @test_v4i32 +// O32: define dso_local frozen inreg { i32, i32, i32, i32 } @test_v4i32 +// N64: define frozen inreg { i64, i64 } @test_v4i32 v4i32 test_v4i32(int a) { return (v4i32){0, a, 0, 0}; } diff --git a/clang/test/CodeGen/mips-zero-sized-struct.c b/clang/test/CodeGen/mips-zero-sized-struct.c --- a/clang/test/CodeGen/mips-zero-sized-struct.c +++ b/clang/test/CodeGen/mips-zero-sized-struct.c @@ -19,9 +19,9 @@ // RUN: %clang_cc1 -triple mipsisa64r6-unknown-linux-gnuabi64 -S -emit-llvm -o - %s | FileCheck -check-prefix=N64 %s // RUN: %clang_cc1 -triple mipsisa64r6el-unknown-linux-gnuabi64 -S -emit-llvm -o - %s | FileCheck -check-prefix=N64 %s -// O32: define void @fn28(%struct.T2* noalias sret align 1 %agg.result, i8 signext %arg0) -// N32: define void @fn28(i8 signext %arg0) -// N64: define void @fn28(i8 signext %arg0) +// O32: define void @fn28(%struct.T2* noalias sret align 1 %agg.result, i8 frozen signext %arg0) +// N32: define void @fn28(i8 frozen signext %arg0) +// N64: define void @fn28(i8 frozen signext %arg0) typedef struct T2 { } T2; T2 T2_retval; diff --git a/clang/test/CodeGen/mips64-padding-arg.c b/clang/test/CodeGen/mips64-padding-arg.c --- a/clang/test/CodeGen/mips64-padding-arg.c +++ b/clang/test/CodeGen/mips64-padding-arg.c @@ -1,6 +1,6 @@ -// RUN: %clang_cc1 -triple mipsel-unknown-linux -O3 -S -o - -emit-llvm %s | FileCheck %s -check-prefix=O32 -// RUN: %clang_cc1 -triple mips64el-unknown-linux -O3 -S -target-abi n64 -o - -emit-llvm %s | FileCheck %s -check-prefix=N64 -// RUN: %clang_cc1 -triple mipsel-unknown-linux -target-feature "+fp64" -O3 -S -o - -emit-llvm %s | FileCheck %s -check-prefix=O32 +// RUN: %clang_cc1 -disable-frozen-args -triple mipsel-unknown-linux -O3 -S -o - -emit-llvm %s | FileCheck %s -check-prefix=O32 +// RUN: %clang_cc1 -disable-frozen-args -triple mips64el-unknown-linux -O3 -S -target-abi n64 -o - -emit-llvm %s | FileCheck %s -check-prefix=N64 +// RUN: %clang_cc1 -disable-frozen-args -triple mipsel-unknown-linux -target-feature "+fp64" -O3 -S -o - -emit-llvm %s | FileCheck %s -check-prefix=O32 typedef struct { double d; diff --git a/clang/test/CodeGen/mrtd.c b/clang/test/CodeGen/mrtd.c --- a/clang/test/CodeGen/mrtd.c +++ b/clang/test/CodeGen/mrtd.c @@ -4,20 +4,20 @@ void baz(int arg); -// CHECK: define x86_stdcallcc void @foo(i32 %arg) [[NUW:#[0-9]+]] +// CHECK: define x86_stdcallcc void @foo(i32 frozen %arg) [[NUW:#[0-9]+]] void foo(int arg) { -// CHECK: call x86_stdcallcc i32 bitcast (i32 (...)* @bar to i32 (i32)*)( +// CHECK: call x86_stdcallcc frozen i32 bitcast (i32 (...)* @bar to i32 (i32)*)( bar(arg); // CHECK: call x86_stdcallcc void @baz(i32 baz(arg); } -// CHECK: declare x86_stdcallcc i32 @bar(...) +// CHECK: declare x86_stdcallcc frozen i32 @bar(...) -// CHECK: declare x86_stdcallcc void @baz(i32) +// CHECK: declare x86_stdcallcc void @baz(i32 frozen) void qux(int arg, ...) { } -// CHECK: define void @qux(i32 %arg, ...) +// CHECK: define void @qux(i32 frozen %arg, ...) void quux(int a1, int a2, int a3) { qux(a1, a2, a3); diff --git a/clang/test/CodeGen/ms-inline-asm.c b/clang/test/CodeGen/ms-inline-asm.c --- a/clang/test/CodeGen/ms-inline-asm.c +++ b/clang/test/CodeGen/ms-inline-asm.c @@ -581,7 +581,7 @@ } void t41(unsigned short a) { -// CHECK-LABEL: define void @t41(i16 zeroext %a) +// CHECK-LABEL: define void @t41(i16 frozen zeroext %a) __asm mov cs, a; // CHECK: mov cs, $0 __asm mov ds, a; @@ -790,7 +790,7 @@ int test_indirect_field(LARGE_INTEGER LargeInteger) { __asm mov eax, LargeInteger.LowPart } -// CHECK-LABEL: define i32 @test_indirect_field( +// CHECK-LABEL: define frozen i32 @test_indirect_field( // CHECK: call i32 asm sideeffect inteldialect "mov eax, $1", // MS ASM containing labels must not be duplicated (PR23715). diff --git a/clang/test/CodeGen/ms-intrinsics-cpuid.c b/clang/test/CodeGen/ms-intrinsics-cpuid.c --- a/clang/test/CodeGen/ms-intrinsics-cpuid.c +++ b/clang/test/CodeGen/ms-intrinsics-cpuid.c @@ -12,7 +12,7 @@ void test__cpuid(int *info, int level) { __cpuid(info, level); } -// CHECK-LABEL: define {{.*}} @test__cpuid(i32* %{{.*}}, i32 %{{.*}}) +// CHECK-LABEL: define {{.*}} @test__cpuid(i32* frozen %{{.*}}, i32 frozen %{{.*}}) // CHECK: call { i32, i32, i32, i32 } asm "cpuid", // CHECK-SAME: "={ax},={bx},={cx},={dx},{ax},{cx},~{dirflag},~{fpsr},~{flags}" // CHECK-SAME: (i32 %{{.*}}, i32 0) diff --git a/clang/test/CodeGen/ms-intrinsics-other.c b/clang/test/CodeGen/ms-intrinsics-other.c --- a/clang/test/CodeGen/ms-intrinsics-other.c +++ b/clang/test/CodeGen/ms-intrinsics-other.c @@ -24,7 +24,7 @@ unsigned char test_BitScanForward(unsigned LONG *Index, unsigned LONG Mask) { return _BitScanForward(Index, Mask); } -// CHECK: define{{.*}}i8 @test_BitScanForward(i32* {{[a-z_ ]*}}%Index, i32 {{[a-z_ ]*}}%Mask){{.*}}{ +// CHECK: define{{.*}}i8 @test_BitScanForward(i32* frozen {{[a-z_ ]*}}%Index, i32 frozen {{[a-z_ ]*}}%Mask){{.*}}{ // CHECK: [[ISNOTZERO:%[a-z0-9._]+]] = icmp eq i32 %Mask, 0 // CHECK: br i1 [[ISNOTZERO]], label %[[END_LABEL:[a-z0-9._]+]], label %[[ISNOTZERO_LABEL:[a-z0-9._]+]] // CHECK: [[END_LABEL]]: @@ -38,7 +38,7 @@ unsigned char test_BitScanReverse(unsigned LONG *Index, unsigned LONG Mask) { return _BitScanReverse(Index, Mask); } -// CHECK: define{{.*}}i8 @test_BitScanReverse(i32* {{[a-z_ ]*}}%Index, i32 {{[a-z_ ]*}}%Mask){{.*}}{ +// CHECK: define{{.*}}i8 @test_BitScanReverse(i32* frozen {{[a-z_ ]*}}%Index, i32 frozen {{[a-z_ ]*}}%Mask){{.*}}{ // CHECK: [[ISNOTZERO:%[0-9]+]] = icmp eq i32 %Mask, 0 // CHECK: br i1 [[ISNOTZERO]], label %[[END_LABEL:[a-z0-9._]+]], label %[[ISNOTZERO_LABEL:[a-z0-9._]+]] // CHECK: [[END_LABEL]]: @@ -54,7 +54,7 @@ unsigned char test_BitScanForward64(unsigned LONG *Index, unsigned __int64 Mask) { return _BitScanForward64(Index, Mask); } -// CHECK: define{{.*}}i8 @test_BitScanForward64(i32* {{[a-z_ ]*}}%Index, i64 {{[a-z_ ]*}}%Mask){{.*}}{ +// CHECK: define{{.*}}i8 @test_BitScanForward64(i32* frozen {{[a-z_ ]*}}%Index, i64 frozen {{[a-z_ ]*}}%Mask){{.*}}{ // CHECK: [[ISNOTZERO:%[a-z0-9._]+]] = icmp eq i64 %Mask, 0 // CHECK: br i1 [[ISNOTZERO]], label %[[END_LABEL:[a-z0-9._]+]], label %[[ISNOTZERO_LABEL:[a-z0-9._]+]] // CHECK: [[END_LABEL]]: @@ -69,7 +69,7 @@ unsigned char test_BitScanReverse64(unsigned LONG *Index, unsigned __int64 Mask) { return _BitScanReverse64(Index, Mask); } -// CHECK: define{{.*}}i8 @test_BitScanReverse64(i32* {{[a-z_ ]*}}%Index, i64 {{[a-z_ ]*}}%Mask){{.*}}{ +// CHECK: define{{.*}}i8 @test_BitScanReverse64(i32* frozen {{[a-z_ ]*}}%Index, i64 frozen {{[a-z_ ]*}}%Mask){{.*}}{ // CHECK: [[ISNOTZERO:%[0-9]+]] = icmp eq i64 %Mask, 0 // CHECK: br i1 [[ISNOTZERO]], label %[[END_LABEL:[a-z0-9._]+]], label %[[ISNOTZERO_LABEL:[a-z0-9._]+]] // CHECK: [[END_LABEL]]: @@ -211,7 +211,7 @@ return _InterlockedAdd(Addend, Value); } -// CHECK-ARM-ARM64: define{{.*}}i32 @test_InterlockedAdd(i32*{{[a-z_ ]*}}%Addend, i32 %Value) {{.*}} { +// CHECK-ARM-ARM64: define{{.*}}i32 @test_InterlockedAdd(i32*{{[a-z_ ]*}}%Addend, i32 frozen %Value) {{.*}} { // CHECK-ARM-ARM64: %[[OLDVAL:[0-9]+]] = atomicrmw add i32* %Addend, i32 %Value seq_cst // CHECK-ARM-ARM64: %[[NEWVAL:[0-9]+]] = add i32 %[[OLDVAL:[0-9]+]], %Value // CHECK-ARM-ARM64: ret i32 %[[NEWVAL:[0-9]+]] diff --git a/clang/test/CodeGen/ms-intrinsics.c b/clang/test/CodeGen/ms-intrinsics.c --- a/clang/test/CodeGen/ms-intrinsics.c +++ b/clang/test/CodeGen/ms-intrinsics.c @@ -141,7 +141,7 @@ void *test_AddressOfReturnAddress() { return _AddressOfReturnAddress(); } -// CHECK-INTEL-LABEL: define dso_local i8* @test_AddressOfReturnAddress() +// CHECK-INTEL-LABEL: define dso_local frozen i8* @test_AddressOfReturnAddress() // CHECK-INTEL: = tail call i8* @llvm.addressofreturnaddress.p0i8() // CHECK-INTEL: ret i8* #endif @@ -149,7 +149,7 @@ unsigned char test_BitScanForward(unsigned long *Index, unsigned long Mask) { return _BitScanForward(Index, Mask); } -// CHECK: define{{.*}}i8 @test_BitScanForward(i32* {{[a-z_ ]*}}%Index, i32 {{[a-z_ ]*}}%Mask){{.*}}{ +// CHECK: define{{.*}}i8 @test_BitScanForward(i32* frozen {{[a-z_ ]*}}%Index, i32 frozen {{[a-z_ ]*}}%Mask){{.*}}{ // CHECK: [[ISNOTZERO:%[a-z0-9._]+]] = icmp eq i32 %Mask, 0 // CHECK: br i1 [[ISNOTZERO]], label %[[END_LABEL:[a-z0-9._]+]], label %[[ISNOTZERO_LABEL:[a-z0-9._]+]] // CHECK: [[END_LABEL]]: @@ -163,7 +163,7 @@ unsigned char test_BitScanReverse(unsigned long *Index, unsigned long Mask) { return _BitScanReverse(Index, Mask); } -// CHECK: define{{.*}}i8 @test_BitScanReverse(i32* {{[a-z_ ]*}}%Index, i32 {{[a-z_ ]*}}%Mask){{.*}}{ +// CHECK: define{{.*}}i8 @test_BitScanReverse(i32* frozen {{[a-z_ ]*}}%Index, i32 frozen {{[a-z_ ]*}}%Mask){{.*}}{ // CHECK: [[ISNOTZERO:%[0-9]+]] = icmp eq i32 %Mask, 0 // CHECK: br i1 [[ISNOTZERO]], label %[[END_LABEL:[a-z0-9._]+]], label %[[ISNOTZERO_LABEL:[a-z0-9._]+]] // CHECK: [[END_LABEL]]: @@ -179,7 +179,7 @@ unsigned char test_BitScanForward64(unsigned long *Index, unsigned __int64 Mask) { return _BitScanForward64(Index, Mask); } -// CHECK-ARM-X64: define{{.*}}i8 @test_BitScanForward64(i32* {{[a-z_ ]*}}%Index, i64 {{[a-z_ ]*}}%Mask){{.*}}{ +// CHECK-ARM-X64: define{{.*}}i8 @test_BitScanForward64(i32* frozen {{[a-z_ ]*}}%Index, i64 frozen {{[a-z_ ]*}}%Mask){{.*}}{ // CHECK-ARM-X64: [[ISNOTZERO:%[a-z0-9._]+]] = icmp eq i64 %Mask, 0 // CHECK-ARM-X64: br i1 [[ISNOTZERO]], label %[[END_LABEL:[a-z0-9._]+]], label %[[ISNOTZERO_LABEL:[a-z0-9._]+]] // CHECK-ARM-X64: [[END_LABEL]]: @@ -194,7 +194,7 @@ unsigned char test_BitScanReverse64(unsigned long *Index, unsigned __int64 Mask) { return _BitScanReverse64(Index, Mask); } -// CHECK-ARM-X64: define{{.*}}i8 @test_BitScanReverse64(i32* {{[a-z_ ]*}}%Index, i64 {{[a-z_ ]*}}%Mask){{.*}}{ +// CHECK-ARM-X64: define{{.*}}i8 @test_BitScanReverse64(i32* frozen {{[a-z_ ]*}}%Index, i64 frozen {{[a-z_ ]*}}%Mask){{.*}}{ // CHECK-ARM-X64: [[ISNOTZERO:%[0-9]+]] = icmp eq i64 %Mask, 0 // CHECK-ARM-X64: br i1 [[ISNOTZERO]], label %[[END_LABEL:[a-z0-9._]+]], label %[[ISNOTZERO_LABEL:[a-z0-9._]+]] // CHECK-ARM-X64: [[END_LABEL]]: @@ -212,7 +212,7 @@ return _InterlockedExchangePointer(Target, Value); } -// CHECK: define{{.*}}i8* @test_InterlockedExchangePointer(i8** {{[a-z_ ]*}}%Target, i8* {{[a-z_ ]*}}%Value){{.*}}{ +// CHECK: define{{.*}}i8* @test_InterlockedExchangePointer(i8** frozen {{[a-z_ ]*}}%Target, i8* frozen {{[a-z_ ]*}}%Value){{.*}}{ // CHECK: %[[TARGET:[0-9]+]] = bitcast i8** %Target to [[iPTR:i[0-9]+]]* // CHECK: %[[VALUE:[0-9]+]] = ptrtoint i8* %Value to [[iPTR]] // CHECK: %[[EXCHANGE:[0-9]+]] = atomicrmw xchg [[iPTR]]* %[[TARGET]], [[iPTR]] %[[VALUE]] seq_cst @@ -225,7 +225,7 @@ return _InterlockedCompareExchangePointer(Destination, Exchange, Comparand); } -// CHECK: define{{.*}}i8* @test_InterlockedCompareExchangePointer(i8** {{[a-z_ ]*}}%Destination, i8* {{[a-z_ ]*}}%Exchange, i8* {{[a-z_ ]*}}%Comparand){{.*}}{ +// CHECK: define{{.*}}i8* @test_InterlockedCompareExchangePointer(i8** frozen {{[a-z_ ]*}}%Destination, i8* frozen {{[a-z_ ]*}}%Exchange, i8* frozen {{[a-z_ ]*}}%Comparand){{.*}}{ // CHECK: %[[DEST:[0-9]+]] = bitcast i8** %Destination to [[iPTR]]* // CHECK: %[[EXCHANGE:[0-9]+]] = ptrtoint i8* %Exchange to [[iPTR]] // CHECK: %[[COMPARAND:[0-9]+]] = ptrtoint i8* %Comparand to [[iPTR]] @@ -240,7 +240,7 @@ return _InterlockedCompareExchangePointer_nf(Destination, Exchange, Comparand); } -// CHECK: define{{.*}}i8* @test_InterlockedCompareExchangePointer_nf(i8** {{[a-z_ ]*}}%Destination, i8* {{[a-z_ ]*}}%Exchange, i8* {{[a-z_ ]*}}%Comparand){{.*}}{ +// CHECK: define{{.*}}i8* @test_InterlockedCompareExchangePointer_nf(i8** frozen {{[a-z_ ]*}}%Destination, i8* frozen {{[a-z_ ]*}}%Exchange, i8* frozen {{[a-z_ ]*}}%Comparand){{.*}}{ // CHECK: %[[DEST:[0-9]+]] = bitcast i8** %Destination to [[iPTR]]* // CHECK: %[[EXCHANGE:[0-9]+]] = ptrtoint i8* %Exchange to [[iPTR]] // CHECK: %[[COMPARAND:[0-9]+]] = ptrtoint i8* %Comparand to [[iPTR]] @@ -513,13 +513,13 @@ void test_iso_volatile_store32(int volatile *p, int v) { __iso_volatile_store32(p, v); } void test_iso_volatile_store64(__int64 volatile *p, __int64 v) { __iso_volatile_store64(p, v); } -// CHECK: define{{.*}}void @test_iso_volatile_store8(i8*{{[a-z_ ]*}}%p, i8 {{[a-z_ ]*}}%v) +// CHECK: define{{.*}}void @test_iso_volatile_store8(i8*{{[a-z_ ]*}}%p, i8 frozen {{[a-z_ ]*}}%v) // CHECK: store volatile i8 %v, i8* %p -// CHECK: define{{.*}}void @test_iso_volatile_store16(i16*{{[a-z_ ]*}}%p, i16 {{[a-z_ ]*}}%v) +// CHECK: define{{.*}}void @test_iso_volatile_store16(i16*{{[a-z_ ]*}}%p, i16 frozen {{[a-z_ ]*}}%v) // CHECK: store volatile i16 %v, i16* %p -// CHECK: define{{.*}}void @test_iso_volatile_store32(i32*{{[a-z_ ]*}}%p, i32 {{[a-z_ ]*}}%v) +// CHECK: define{{.*}}void @test_iso_volatile_store32(i32*{{[a-z_ ]*}}%p, i32 frozen {{[a-z_ ]*}}%v) // CHECK: store volatile i32 %v, i32* %p -// CHECK: define{{.*}}void @test_iso_volatile_store64(i64*{{[a-z_ ]*}}%p, i64 {{[a-z_ ]*}}%v) +// CHECK: define{{.*}}void @test_iso_volatile_store64(i64*{{[a-z_ ]*}}%p, i64 frozen {{[a-z_ ]*}}%v) // CHECK: store volatile i64 %v, i64* %p diff --git a/clang/test/CodeGen/ms-mixed-ptr-sizes.c b/clang/test/CodeGen/ms-mixed-ptr-sizes.c --- a/clang/test/CodeGen/ms-mixed-ptr-sizes.c +++ b/clang/test/CodeGen/ms-mixed-ptr-sizes.c @@ -9,32 +9,32 @@ }; void use_foo(struct Foo *f); void test_sign_ext(struct Foo *f, int * __ptr32 __sptr i) { -// X64-LABEL: define dso_local void @test_sign_ext({{.*}}i32 addrspace(270)* %i) -// X86-LABEL: define dso_local void @test_sign_ext(%struct.Foo* %f, i32* %i) +// X64-LABEL: define dso_local void @test_sign_ext({{.*}}i32 addrspace(270)* frozen %i) +// X86-LABEL: define dso_local void @test_sign_ext(%struct.Foo* frozen %f, i32* frozen %i) // X64: %{{.+}} = addrspacecast i32 addrspace(270)* %i to i32* // X86: %{{.+}} = addrspacecast i32* %i to i32 addrspace(272)* f->p64 = i; use_foo(f); } void test_zero_ext(struct Foo *f, int * __ptr32 __uptr i) { -// X64-LABEL: define dso_local void @test_zero_ext({{.*}}i32 addrspace(271)* %i) -// X86-LABEL: define dso_local void @test_zero_ext({{.*}}i32 addrspace(271)* %i) +// X64-LABEL: define dso_local void @test_zero_ext({{.*}}i32 addrspace(271)* frozen %i) +// X86-LABEL: define dso_local void @test_zero_ext({{.*}}i32 addrspace(271)* frozen %i) // X64: %{{.+}} = addrspacecast i32 addrspace(271)* %i to i32* // X86: %{{.+}} = addrspacecast i32 addrspace(271)* %i to i32 addrspace(272)* f->p64 = i; use_foo(f); } void test_trunc(struct Foo *f, int * __ptr64 i) { -// X64-LABEL: define dso_local void @test_trunc(%struct.Foo* %f, i32* %i) -// X86-LABEL: define dso_local void @test_trunc({{.*}}i32 addrspace(272)* %i) +// X64-LABEL: define dso_local void @test_trunc(%struct.Foo* frozen %f, i32* frozen %i) +// X86-LABEL: define dso_local void @test_trunc({{.*}}i32 addrspace(272)* frozen %i) // X64: %{{.+}} = addrspacecast i32* %i to i32 addrspace(270)* // X86: %{{.+}} = addrspacecast i32 addrspace(272)* %i to i32* f->p32 = i; use_foo(f); } void test_noop(struct Foo *f, int * __ptr32 i) { -// X64-LABEL: define dso_local void @test_noop({{.*}}i32 addrspace(270)* %i) -// X86-LABEL: define dso_local void @test_noop({{.*}}i32* %i) +// X64-LABEL: define dso_local void @test_noop({{.*}}i32 addrspace(270)* frozen %i) +// X86-LABEL: define dso_local void @test_noop({{.*}}i32* frozen %i) // X64-NOT: addrspacecast // X86-NOT: addrspacecast f->p32 = i; @@ -42,8 +42,8 @@ } void test_other(struct Foo *f, __attribute__((address_space(10))) int *i) { -// X64-LABEL: define dso_local void @test_other({{.*}}i32 addrspace(10)* %i) -// X86-LABEL: define dso_local void @test_other({{.*}}i32 addrspace(10)* %i) +// X64-LABEL: define dso_local void @test_other({{.*}}i32 addrspace(10)* frozen %i) +// X86-LABEL: define dso_local void @test_other({{.*}}i32 addrspace(10)* frozen %i) // X64: %{{.+}} = addrspacecast i32 addrspace(10)* %i to i32 addrspace(270)* // X86: %{{.+}} = addrspacecast i32 addrspace(10)* %i to i32* f->p32 = (int * __ptr32)i; diff --git a/clang/test/CodeGen/ms-setjmp.c b/clang/test/CodeGen/ms-setjmp.c --- a/clang/test/CodeGen/ms-setjmp.c +++ b/clang/test/CodeGen/ms-setjmp.c @@ -15,16 +15,16 @@ int test_setjmp() { return _setjmp(jb); - // I386-LABEL: define dso_local i32 @test_setjmp + // I386-LABEL: define dso_local frozen i32 @test_setjmp // I386: %[[call:.*]] = call i32 (i8*, i32, ...) @_setjmp3(i8* getelementptr inbounds ([1 x i8], [1 x i8]* @jb, i32 0, i32 0), i32 0) // I386-NEXT: ret i32 %[[call]] - // X64-LABEL: define dso_local i32 @test_setjmp + // X64-LABEL: define dso_local frozen i32 @test_setjmp // X64: %[[addr:.*]] = call i8* @llvm.frameaddress.p0i8(i32 0) // X64: %[[call:.*]] = call i32 @_setjmp(i8* getelementptr inbounds ([1 x i8], [1 x i8]* @jb, i64 0, i64 0), i8* %[[addr]]) // X64-NEXT: ret i32 %[[call]] - // AARCH64-LABEL: define dso_local i32 @test_setjmp + // AARCH64-LABEL: define dso_local frozen i32 @test_setjmp // AARCH64: %[[addr:.*]] = call i8* @llvm.sponentry.p0i8() // AARCH64: %[[call:.*]] = call i32 @_setjmpex(i8* getelementptr inbounds ([1 x i8], [1 x i8]* @jb, i64 0, i64 0), i8* %[[addr]]) // AARCH64-NEXT: ret i32 %[[call]] @@ -32,12 +32,12 @@ int test_setjmpex() { return _setjmpex(jb); - // X64-LABEL: define dso_local i32 @test_setjmpex + // X64-LABEL: define dso_local frozen i32 @test_setjmpex // X64: %[[addr:.*]] = call i8* @llvm.frameaddress.p0i8(i32 0) // X64: %[[call:.*]] = call i32 @_setjmpex(i8* getelementptr inbounds ([1 x i8], [1 x i8]* @jb, i64 0, i64 0), i8* %[[addr]]) // X64-NEXT: ret i32 %[[call]] - // AARCH64-LABEL: define dso_local i32 @test_setjmpex + // AARCH64-LABEL: define dso_local frozen i32 @test_setjmpex // AARCH64: %[[addr:.*]] = call i8* @llvm.sponentry.p0i8() // AARCH64: %[[call:.*]] = call i32 @_setjmpex(i8* getelementptr inbounds ([1 x i8], [1 x i8]* @jb, i64 0, i64 0), i8* %[[addr]]) // AARCH64-NEXT: ret i32 %[[call]] diff --git a/clang/test/CodeGen/ms-x86-intrinsics.c b/clang/test/CodeGen/ms-x86-intrinsics.c --- a/clang/test/CodeGen/ms-x86-intrinsics.c +++ b/clang/test/CodeGen/ms-x86-intrinsics.c @@ -9,7 +9,7 @@ char test__readfsbyte(unsigned long Offset) { return __readfsbyte(++Offset); } -// CHECK-I386-LABEL: define dso_local signext i8 @test__readfsbyte(i32 %Offset) +// CHECK-I386-LABEL: define dso_local frozen signext i8 @test__readfsbyte(i32 frozen %Offset) // CHECK-I386: %inc = add i32 %Offset, 1 // CHECK-I386: [[PTR:%[0-9]+]] = inttoptr i32 %inc to i8 addrspace(257)* // CHECK-I386: [[VALUE:%[0-9]+]] = load volatile i8, i8 addrspace(257)* [[PTR]], align 1 @@ -18,7 +18,7 @@ short test__readfsword(unsigned long Offset) { return __readfsword(++Offset); } -// CHECK-I386-LABEL: define dso_local signext i16 @test__readfsword(i32 %Offset) +// CHECK-I386-LABEL: define dso_local frozen signext i16 @test__readfsword(i32 frozen %Offset) // CHECK-I386: %inc = add i32 %Offset, 1 // CHECK-I386: [[PTR:%[0-9]+]] = inttoptr i32 %inc to i16 addrspace(257)* // CHECK-I386: [[VALUE:%[0-9]+]] = load volatile i16, i16 addrspace(257)* [[PTR]], align 2 @@ -27,7 +27,7 @@ long test__readfsdword(unsigned long Offset) { return __readfsdword(++Offset); } -// CHECK-I386-LABEL: define dso_local i32 @test__readfsdword(i32 %Offset) +// CHECK-I386-LABEL: define dso_local frozen i32 @test__readfsdword(i32 frozen %Offset) // CHECK-I386: %inc = add i32 %Offset, 1 // CHECK-I386: [[PTR:%[0-9]+]] = inttoptr i32 %inc to i32 addrspace(257)* // CHECK-I386: [[VALUE:%[0-9]+]] = load volatile i32, i32 addrspace(257)* [[PTR]], align 4 @@ -36,7 +36,7 @@ long long test__readfsqword(unsigned long Offset) { return __readfsqword(++Offset); } -// CHECK-I386-LABEL: define dso_local i64 @test__readfsqword(i32 %Offset) +// CHECK-I386-LABEL: define dso_local frozen i64 @test__readfsqword(i32 frozen %Offset) // CHECK-I386: %inc = add i32 %Offset, 1 // CHECK-I386: [[PTR:%[0-9]+]] = inttoptr i32 %inc to i64 addrspace(257)* // CHECK-I386: [[VALUE:%[0-9]+]] = load volatile i64, i64 addrspace(257)* [[PTR]], align 8 @@ -46,7 +46,7 @@ __int64 test__emul(int a, int b) { return __emul(a, b); } -// CHECK-LABEL: define dso_local i64 @test__emul(i32 %a, i32 %b) +// CHECK-LABEL: define dso_local frozen i64 @test__emul(i32 frozen %a, i32 frozen %b) // CHECK: [[X:%[0-9]+]] = sext i32 %a to i64 // CHECK: [[Y:%[0-9]+]] = sext i32 %b to i64 // CHECK: [[RES:%[0-9]+]] = mul nsw i64 [[Y]], [[X]] @@ -55,7 +55,7 @@ unsigned __int64 test__emulu(unsigned int a, unsigned int b) { return __emulu(a, b); } -// CHECK-LABEL: define dso_local i64 @test__emulu(i32 %a, i32 %b) +// CHECK-LABEL: define dso_local frozen i64 @test__emulu(i32 frozen %a, i32 frozen %b) // CHECK: [[X:%[0-9]+]] = zext i32 %a to i64 // CHECK: [[Y:%[0-9]+]] = zext i32 %b to i64 // CHECK: [[RES:%[0-9]+]] = mul nuw i64 [[Y]], [[X]] @@ -66,7 +66,7 @@ char test__readgsbyte(unsigned long Offset) { return __readgsbyte(++Offset); } -// CHECK-X64-LABEL: define dso_local i8 @test__readgsbyte(i32 %Offset) +// CHECK-X64-LABEL: define dso_local frozen i8 @test__readgsbyte(i32 frozen %Offset) // CHECK-X64: %inc = add i32 %Offset, 1 // CHECK-X64: [[ZEXT:%[0-9]+]] = zext i32 %inc to i64 // CHECK-X64: [[PTR:%[0-9]+]] = inttoptr i64 [[ZEXT]] to i8 addrspace(256)* @@ -76,7 +76,7 @@ short test__readgsword(unsigned long Offset) { return __readgsword(++Offset); } -// CHECK-X64-LABEL: define dso_local i16 @test__readgsword(i32 %Offset) +// CHECK-X64-LABEL: define dso_local frozen i16 @test__readgsword(i32 frozen %Offset) // CHECK-X64: %inc = add i32 %Offset, 1 // CHECK-X64: [[ZEXT:%[0-9]+]] = zext i32 %inc to i64 // CHECK-X64: [[PTR:%[0-9]+]] = inttoptr i64 [[ZEXT]] to i16 addrspace(256)* @@ -86,7 +86,7 @@ long test__readgsdword(unsigned long Offset) { return __readgsdword(++Offset); } -// CHECK-X64-LABEL: define dso_local i32 @test__readgsdword(i32 %Offset) +// CHECK-X64-LABEL: define dso_local frozen i32 @test__readgsdword(i32 frozen %Offset) // CHECK-X64: %inc = add i32 %Offset, 1 // CHECK-X64: [[ZEXT:%[0-9]+]] = zext i32 %inc to i64 // CHECK-X64: [[PTR:%[0-9]+]] = inttoptr i64 [[ZEXT]] to i32 addrspace(256)* @@ -96,7 +96,7 @@ long long test__readgsqword(unsigned long Offset) { return __readgsqword(++Offset); } -// CHECK-X64-LABEL: define dso_local i64 @test__readgsqword(i32 %Offset) +// CHECK-X64-LABEL: define dso_local frozen i64 @test__readgsqword(i32 frozen %Offset) // CHECK-X64: %inc = add i32 %Offset, 1 // CHECK-X64: [[ZEXT:%[0-9]+]] = zext i32 %inc to i64 // CHECK-X64: [[PTR:%[0-9]+]] = inttoptr i64 [[ZEXT]] to i64 addrspace(256)* @@ -106,13 +106,13 @@ __int64 test__mulh(__int64 a, __int64 b) { return __mulh(a, b); } -// CHECK-X64-LABEL: define dso_local i64 @test__mulh(i64 %a, i64 %b) +// CHECK-X64-LABEL: define dso_local frozen i64 @test__mulh(i64 frozen %a, i64 frozen %b) // CHECK-X64: = mul nsw i128 % unsigned __int64 test__umulh(unsigned __int64 a, unsigned __int64 b) { return __umulh(a, b); } -// CHECK-X64-LABEL: define dso_local i64 @test__umulh(i64 %a, i64 %b) +// CHECK-X64-LABEL: define dso_local frozen i64 @test__umulh(i64 frozen %a, i64 frozen %b) // CHECK-X64: = mul nuw i128 % __int64 test_mul128(__int64 Multiplier, @@ -120,7 +120,7 @@ __int64 *HighProduct) { return _mul128(Multiplier, Multiplicand, HighProduct); } -// CHECK-X64-LABEL: define dso_local i64 @test_mul128(i64 %Multiplier, i64 %Multiplicand, i64*{{[a-z_ ]*}}%HighProduct) +// CHECK-X64-LABEL: define dso_local frozen i64 @test_mul128(i64 frozen %Multiplier, i64 frozen %Multiplicand, i64*{{[a-z_ ]*}}%HighProduct) // CHECK-X64: = sext i64 %Multiplier to i128 // CHECK-X64: = sext i64 %Multiplicand to i128 // CHECK-X64: = mul nsw i128 % @@ -132,7 +132,7 @@ unsigned __int64 *HighProduct) { return _umul128(Multiplier, Multiplicand, HighProduct); } -// CHECK-X64-LABEL: define dso_local i64 @test_umul128(i64 %Multiplier, i64 %Multiplicand, i64*{{[a-z_ ]*}}%HighProduct) +// CHECK-X64-LABEL: define dso_local frozen i64 @test_umul128(i64 frozen %Multiplier, i64 frozen %Multiplicand, i64*{{[a-z_ ]*}}%HighProduct) // CHECK-X64: = zext i64 %Multiplier to i128 // CHECK-X64: = zext i64 %Multiplicand to i128 // CHECK-X64: = mul nuw i128 % @@ -143,7 +143,7 @@ unsigned char d) { return __shiftleft128(l, h, d); } -// CHECK-X64-LABEL: define dso_local i64 @test__shiftleft128(i64 %l, i64 %h, i8 %d) +// CHECK-X64-LABEL: define dso_local frozen i64 @test__shiftleft128(i64 frozen %l, i64 frozen %h, i8 frozen %d) // CHECK-X64: = zext i64 %{{.*}} to i128 // CHECK-X64: = shl nuw i128 %{{.*}}, 64 // CHECK-X64: = zext i64 %{{.*}} to i128 @@ -158,7 +158,7 @@ unsigned char d) { return __shiftright128(l, h, d); } -// CHECK-X64-LABEL: define dso_local i64 @test__shiftright128(i64 %l, i64 %h, i8 %d) +// CHECK-X64-LABEL: define dso_local frozen i64 @test__shiftright128(i64 frozen %l, i64 frozen %h, i8 frozen %d) // CHECK-X64: = zext i64 %{{.*}} to i128 // CHECK-X64: = shl nuw i128 %{{.*}}, 64 // CHECK-X64: = zext i64 %{{.*}} to i128 diff --git a/clang/test/CodeGen/ms_abi.c b/clang/test/CodeGen/ms_abi.c --- a/clang/test/CodeGen/ms_abi.c +++ b/clang/test/CodeGen/ms_abi.c @@ -155,7 +155,7 @@ }; __attribute__((ms_abi)) struct i128 f7(struct i128 a) { - // WIN64: define dso_local void @f7(%struct.i128* noalias sret align 8 %agg.result, %struct.i128* %a) - // FREEBSD: define win64cc void @f7(%struct.i128* noalias sret align 8 %agg.result, %struct.i128* %a) + // WIN64: define dso_local void @f7(%struct.i128* noalias sret align 8 %agg.result, %struct.i128* frozen %a) + // FREEBSD: define win64cc void @f7(%struct.i128* noalias sret align 8 %agg.result, %struct.i128* frozen %a) return a; } diff --git a/clang/test/CodeGen/named_reg_global.c b/clang/test/CodeGen/named_reg_global.c --- a/clang/test/CodeGen/named_reg_global.c +++ b/clang/test/CodeGen/named_reg_global.c @@ -30,7 +30,7 @@ } // CHECK: declare{{.*}} i[[bits]] @llvm.read_register.i[[bits]](metadata) -// CHECK: define{{.*}} void @set_stack_pointer_addr(i[[bits]] %addr) #0 { +// CHECK: define{{.*}} void @set_stack_pointer_addr(i[[bits]] frozen %addr) #0 { // CHECK: [[sto:%[0-9]+]] = load i[[bits]], i[[bits]]* % // CHECK: call void @llvm.write_register.i[[bits]](metadata !0, i[[bits]] [[sto]]) // CHECK: ret void diff --git a/clang/test/CodeGen/no-bitfield-type-align.c b/clang/test/CodeGen/no-bitfield-type-align.c --- a/clang/test/CodeGen/no-bitfield-type-align.c +++ b/clang/test/CodeGen/no-bitfield-type-align.c @@ -9,7 +9,7 @@ unsigned short f2:15; }; -// CHECK: define void @test_zero_width_bitfield(%[[STRUCT_S]]* %[[A:.*]]) +// CHECK: define void @test_zero_width_bitfield(%[[STRUCT_S]]* frozen %[[A:.*]]) // CHECK: %[[BF_LOAD:.*]] = load i32, i32* %[[V1:.*]], align 1 // CHECK: %[[BF_CLEAR:.*]] = and i32 %[[BF_LOAD]], 32767 // CHECK: %[[BF_CAST:.*]] = trunc i32 %[[BF_CLEAR]] to i16 diff --git a/clang/test/CodeGen/no-builtin.cpp b/clang/test/CodeGen/no-builtin.cpp --- a/clang/test/CodeGen/no-builtin.cpp +++ b/clang/test/CodeGen/no-builtin.cpp @@ -29,15 +29,15 @@ virtual ~B(); }; -// CHECK-LABEL: define void @call_a_foo(%struct.A* %a) #3 +// CHECK-LABEL: define void @call_a_foo(%struct.A* frozen %a) #3 extern "C" void call_a_foo(A *a) { - // CHECK: %call = call i32 %2(%struct.A* %0) + // CHECK: %call = call frozen i32 %2(%struct.A* frozen %0) a->foo(); // virtual call is not annotated } -// CHECK-LABEL: define void @call_b_foo(%struct.B* %b) #3 +// CHECK-LABEL: define void @call_b_foo(%struct.B* frozen %b) #3 extern "C" void call_b_foo(B *b) { - // CHECK: %call = call i32 %2(%struct.B* %0) + // CHECK: %call = call frozen i32 %2(%struct.B* frozen %0) b->foo(); // virtual call is not annotated } @@ -50,8 +50,8 @@ A::~A() {} // Anchoring A so A::foo() gets generated B::~B() {} // Anchoring B so B::foo() gets generated -// CHECK-LABEL: define linkonce_odr i32 @_ZNK1A3fooEv(%struct.A* %this) unnamed_addr #0 comdat align 2 -// CHECK-LABEL: define linkonce_odr i32 @_ZNK1B3fooEv(%struct.B* %this) unnamed_addr #5 comdat align 2 +// CHECK-LABEL: define linkonce_odr frozen i32 @_ZNK1A3fooEv(%struct.A* frozen %this) unnamed_addr #0 comdat align 2 +// CHECK-LABEL: define linkonce_odr frozen i32 @_ZNK1B3fooEv(%struct.B* frozen %this) unnamed_addr #5 comdat align 2 // CHECK: attributes #0 = {{{.*}}"no-builtin-memcpy"{{.*}}} // CHECK-NOT: attributes #0 = {{{.*}}"no-builtin-memmove"{{.*}}} diff --git a/clang/test/CodeGen/no-prototype.c b/clang/test/CodeGen/no-prototype.c --- a/clang/test/CodeGen/no-prototype.c +++ b/clang/test/CodeGen/no-prototype.c @@ -11,9 +11,9 @@ return foo(); } -// CHECK: define i32 @bar(i32 %a) [[BAR_ATTR:#[0-9]+]] { -// CHECK: declare i32 @foo(...) [[FOO_ATTR:#[0-9]+]] -// CHECK: define i32 @baz() [[BAZ_ATTR:#[0-9]+]] { +// CHECK: define frozen i32 @bar(i32 frozen %a) [[BAR_ATTR:#[0-9]+]] { +// CHECK: declare frozen i32 @foo(...) [[FOO_ATTR:#[0-9]+]] +// CHECK: define frozen i32 @baz() [[BAZ_ATTR:#[0-9]+]] { // CHECK: attributes [[FOO_ATTR]] = { {{.*}}"no-prototype"{{.*}} } // CHECK-NOT: attributes [[BAR_ATTR]] = { {{.*}}"no-prototype"{{.*}} } diff --git a/clang/test/CodeGen/noduplicate-cxx11-test.cpp b/clang/test/CodeGen/noduplicate-cxx11-test.cpp --- a/clang/test/CodeGen/noduplicate-cxx11-test.cpp +++ b/clang/test/CodeGen/noduplicate-cxx11-test.cpp @@ -3,7 +3,7 @@ // This was a problem in Sema, but only shows up as noinline missing // in CodeGen. -// CHECK: define i32 @_Z15noduplicatedfuni(i32 %a) [[NI:#[0-9]+]] +// CHECK: define frozen i32 @_Z15noduplicatedfuni(i32 frozen %a) [[NI:#[0-9]+]] int noduplicatedfun [[clang::noduplicate]] (int a) { diff --git a/clang/test/CodeGen/non-power-of-2-alignment-assumptions.c b/clang/test/CodeGen/non-power-of-2-alignment-assumptions.c --- a/clang/test/CodeGen/non-power-of-2-alignment-assumptions.c +++ b/clang/test/CodeGen/non-power-of-2-alignment-assumptions.c @@ -8,7 +8,7 @@ // CHECK-NEXT: [[ALIGN_ADDR:%.*]] = alloca i32, align 4 // CHECK-NEXT: store i32 [[ALIGN:%.*]], i32* [[ALIGN_ADDR]], align 4 // CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[ALIGN_ADDR]], align 4 -// CHECK-NEXT: [[CALL:%.*]] = call i8* @alloc(i32 [[TMP0]]) +// CHECK-NEXT: [[CALL:%.*]] = call frozen i8* @alloc(i32 frozen [[TMP0]]) // CHECK-NEXT: [[ALIGNMENTCAST:%.*]] = zext i32 [[TMP0]] to i64 // CHECK-NEXT: [[MASK:%.*]] = sub i64 [[ALIGNMENTCAST]], 1 // CHECK-NEXT: [[PTRINT:%.*]] = ptrtoint i8* [[CALL]] to i64 @@ -24,7 +24,7 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[ALIGN_ADDR:%.*]] = alloca i32, align 4 // CHECK-NEXT: store i32 [[ALIGN:%.*]], i32* [[ALIGN_ADDR]], align 4 -// CHECK-NEXT: [[CALL:%.*]] = call i8* @alloc(i32 7) +// CHECK-NEXT: [[CALL:%.*]] = call frozen i8* @alloc(i32 frozen 7) // CHECK-NEXT: [[PTRINT:%.*]] = ptrtoint i8* [[CALL]] to i64 // CHECK-NEXT: [[MASKEDPTR:%.*]] = and i64 [[PTRINT]], 6 // CHECK-NEXT: [[MASKCOND:%.*]] = icmp eq i64 [[MASKEDPTR]], 0 @@ -38,7 +38,7 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[ALIGN_ADDR:%.*]] = alloca i32, align 4 // CHECK-NEXT: store i32 [[ALIGN:%.*]], i32* [[ALIGN_ADDR]], align 4 -// CHECK-NEXT: [[CALL:%.*]] = call align 8 i8* @alloc(i32 8) +// CHECK-NEXT: [[CALL:%.*]] = call frozen align 8 i8* @alloc(i32 frozen 8) // CHECK-NEXT: ret void // void t2(int align) { diff --git a/clang/test/CodeGen/nonnull.c b/clang/test/CodeGen/nonnull.c --- a/clang/test/CodeGen/nonnull.c +++ b/clang/test/CodeGen/nonnull.c @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -triple x86_64-apple-darwin -emit-llvm < %s | FileCheck -check-prefix=NULL-INVALID %s -// RUN: %clang_cc1 -triple x86_64-apple-darwin -emit-llvm -fno-delete-null-pointer-checks < %s | FileCheck -check-prefix=NULL-VALID %s +// RUN: %clang_cc1 -disable-frozen-args -triple x86_64-apple-darwin -emit-llvm < %s | FileCheck -check-prefix=NULL-INVALID %s +// RUN: %clang_cc1 -disable-frozen-args -triple x86_64-apple-darwin -emit-llvm -fno-delete-null-pointer-checks < %s | FileCheck -check-prefix=NULL-VALID %s // NULL-INVALID: define void @foo(i32* nonnull %x) // NULL-VALID: define void @foo(i32* %x) @@ -20,20 +20,20 @@ } static int a; -// NULL-INVALID: define nonnull i32* @bar3() -// NULL-VALID: define i32* @bar3() +// NULL-INVALID: define frozen nonnull i32* @bar3() +// NULL-VALID: define frozen i32* @bar3() int * bar3() __attribute__((returns_nonnull)) { return &a; } -// NULL-INVALID: define i32 @bar4(i32 %n, i32* nonnull %p) -// NULL-VALID: define i32 @bar4(i32 %n, i32* %p) +// NULL-INVALID: define frozen i32 @bar4(i32 %n, i32* nonnull %p) +// NULL-VALID: define frozen i32 @bar4(i32 %n, i32* %p) int bar4(int n, int *p) __attribute__((nonnull)) { return n + *p; } -// NULL-INVALID: define i32 @bar5(i32 %n, i32* nonnull %p) -// NULL-VALID: define i32 @bar5(i32 %n, i32* %p) +// NULL-INVALID: define frozen i32 @bar5(i32 %n, i32* nonnull %p) +// NULL-VALID: define frozen i32 @bar5(i32 %n, i32* %p) int bar5(int n, int *p) __attribute__((nonnull(1, 2))) { return n + *p; } @@ -44,8 +44,8 @@ double d; } TransparentUnion __attribute__((transparent_union)); -// NULL-INVALID: define i32 @bar6(i64 % -// NULL-VALID: define i32 @bar6(i64 % +// NULL-INVALID: define frozen i32 @bar6(i64 % +// NULL-VALID: define frozen i32 @bar6(i64 % int bar6(TransparentUnion tu) __attribute__((nonnull(1))) { return *tu.p; } diff --git a/clang/test/CodeGen/nvptx-abi.c b/clang/test/CodeGen/nvptx-abi.c --- a/clang/test/CodeGen/nvptx-abi.c +++ b/clang/test/CodeGen/nvptx-abi.c @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -triple nvptx-unknown-unknown -S -o - %s -emit-llvm | FileCheck %s -// RUN: %clang_cc1 -triple nvptx64-unknown-unknown -S -o - %s -emit-llvm | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args -triple nvptx-unknown-unknown -S -o - %s -emit-llvm | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args -triple nvptx64-unknown-unknown -S -o - %s -emit-llvm | FileCheck %s typedef struct float4_s { float x, y, z, w; diff --git a/clang/test/CodeGen/object-size.c b/clang/test/CodeGen/object-size.c --- a/clang/test/CodeGen/object-size.c +++ b/clang/test/CodeGen/object-size.c @@ -22,25 +22,25 @@ // CHECK-LABEL: define void @test1 void test1() { - // CHECK: = call i8* @__strcpy_chk(i8* getelementptr inbounds ([63 x i8], [63 x i8]* @gbuf, i64 0, i64 4), i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i64 59) + // CHECK: = call frozen i8* @__strcpy_chk(i8* frozen getelementptr inbounds ([63 x i8], [63 x i8]* @gbuf, i64 0, i64 4), i8* frozen getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i64 frozen 59) strcpy(&gbuf[4], "Hi there"); } // CHECK-LABEL: define void @test2 void test2() { - // CHECK: = call i8* @__strcpy_chk(i8* getelementptr inbounds ([63 x i8], [63 x i8]* @gbuf, i64 0, i64 0), i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i64 63) + // CHECK: = call frozen i8* @__strcpy_chk(i8* frozen getelementptr inbounds ([63 x i8], [63 x i8]* @gbuf, i64 0, i64 0), i8* frozen getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i64 frozen 63) strcpy(gbuf, "Hi there"); } // CHECK-LABEL: define void @test3 void test3() { - // CHECK: = call i8* @__strcpy_chk(i8* getelementptr inbounds ([63 x i8], [63 x i8]* @gbuf, i64 1, i64 37), i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i64 0) + // CHECK: = call frozen i8* @__strcpy_chk(i8* frozen getelementptr inbounds ([63 x i8], [63 x i8]* @gbuf, i64 1, i64 37), i8* frozen getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i64 frozen 0) strcpy(&gbuf[100], "Hi there"); } // CHECK-LABEL: define void @test4 void test4() { - // CHECK: = call i8* @__strcpy_chk(i8* getelementptr inbounds ([63 x i8], [63 x i8]* @gbuf, i64 0, i64 -1), i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i64 0) + // CHECK: = call frozen i8* @__strcpy_chk(i8* frozen getelementptr inbounds ([63 x i8], [63 x i8]* @gbuf, i64 0, i64 -1), i8* frozen getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i64 frozen 0) strcpy((char*)(void*)&gbuf[-1], "Hi there"); } @@ -55,7 +55,7 @@ void test6() { char buf[57]; - // CHECK: = call i8* @__strcpy_chk(i8* %{{.*}}, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i64 53) + // CHECK: = call frozen i8* @__strcpy_chk(i8* frozen %{{.*}}, i8* frozen getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i64 frozen 53) strcpy(&buf[4], "Hi there"); } @@ -65,7 +65,7 @@ // Ensure we only evaluate the side-effect once. // CHECK: = add // CHECK-NOT: = add - // CHECK: = call i8* @__strcpy_chk(i8* getelementptr inbounds ([63 x i8], [63 x i8]* @gbuf, i64 0, i64 0), i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i64 63) + // CHECK: = call frozen i8* @__strcpy_chk(i8* frozen getelementptr inbounds ([63 x i8], [63 x i8]* @gbuf, i64 0, i64 0), i8* frozen getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i64 frozen 63) strcpy((++i, gbuf), "Hi there"); } @@ -73,14 +73,14 @@ void test8() { char *buf[50]; // CHECK-NOT: __strcpy_chk - // CHECK: = call i8* @__inline_strcpy_chk(i8* %{{.*}}, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0)) + // CHECK: = call frozen i8* @__inline_strcpy_chk(i8* frozen %{{.*}}, i8* frozen getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0)) strcpy(buf[++gi], "Hi there"); } // CHECK-LABEL: define void @test9 void test9() { // CHECK-NOT: __strcpy_chk - // CHECK: = call i8* @__inline_strcpy_chk(i8* %{{.*}}, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0)) + // CHECK: = call frozen i8* @__inline_strcpy_chk(i8* frozen %{{.*}}, i8* frozen getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0)) strcpy((char *)((++gi) + gj), "Hi there"); } @@ -88,49 +88,49 @@ char **p; void test10() { // CHECK-NOT: __strcpy_chk - // CHECK: = call i8* @__inline_strcpy_chk(i8* %{{.*}}, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0)) + // CHECK: = call frozen i8* @__inline_strcpy_chk(i8* frozen %{{.*}}, i8* frozen getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0)) strcpy(*(++p), "Hi there"); } // CHECK-LABEL: define void @test11 void test11() { // CHECK-NOT: __strcpy_chk - // CHECK: = call i8* @__inline_strcpy_chk(i8* getelementptr inbounds ([63 x i8], [63 x i8]* @gbuf, i64 0, i64 0), i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0)) + // CHECK: = call frozen i8* @__inline_strcpy_chk(i8* frozen getelementptr inbounds ([63 x i8], [63 x i8]* @gbuf, i64 0, i64 0), i8* frozen getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0)) strcpy(gp = gbuf, "Hi there"); } // CHECK-LABEL: define void @test12 void test12() { // CHECK-NOT: __strcpy_chk - // CHECK: = call i8* @__inline_strcpy_chk(i8* %{{.*}}, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0)) + // CHECK: = call frozen i8* @__inline_strcpy_chk(i8* frozen %{{.*}}, i8* frozen getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0)) strcpy(++gp, "Hi there"); } // CHECK-LABEL: define void @test13 void test13() { // CHECK-NOT: __strcpy_chk - // CHECK: = call i8* @__inline_strcpy_chk(i8* %{{.*}}, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0)) + // CHECK: = call frozen i8* @__inline_strcpy_chk(i8* frozen %{{.*}}, i8* frozen getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0)) strcpy(gp++, "Hi there"); } // CHECK-LABEL: define void @test14 void test14() { // CHECK-NOT: __strcpy_chk - // CHECK: = call i8* @__inline_strcpy_chk(i8* %{{.*}}, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0)) + // CHECK: = call frozen i8* @__inline_strcpy_chk(i8* frozen %{{.*}}, i8* frozen getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0)) strcpy(--gp, "Hi there"); } // CHECK-LABEL: define void @test15 void test15() { // CHECK-NOT: __strcpy_chk - // CHECK: = call i8* @__inline_strcpy_chk(i8* %{{..*}}, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0)) + // CHECK: = call frozen i8* @__inline_strcpy_chk(i8* frozen %{{..*}}, i8* frozen getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0)) strcpy(gp--, "Hi there"); } // CHECK-LABEL: define void @test16 void test16() { // CHECK-NOT: __strcpy_chk - // CHECK: = call i8* @__inline_strcpy_chk(i8* %{{.*}}, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0)) + // CHECK: = call frozen i8* @__inline_strcpy_chk(i8* frozen %{{.*}}, i8* frozen getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0)) strcpy(gp += 1, "Hi there"); } diff --git a/clang/test/CodeGen/packed-arrays.c b/clang/test/CodeGen/packed-arrays.c --- a/clang/test/CodeGen/packed-arrays.c +++ b/clang/test/CodeGen/packed-arrays.c @@ -51,10 +51,10 @@ // CHECK: @align3_x0 = local_unnamed_addr global i32 4 int align3_x0 = __alignof(((struct s3*) 0)->x[0]); -// CHECK-LABEL: define i32 @f0_a +// CHECK-LABEL: define frozen i32 @f0_a // CHECK: load i32, i32* %{{.*}}, align 1 // CHECK: } -// CHECK-LABEL: define i32 @f0_b +// CHECK-LABEL: define frozen i32 @f0_b // CHECK: load i32, i32* %{{.*}}, align 4 // CHECK: } int f0_a(struct s0 *a) { @@ -68,19 +68,19 @@ // Note that we are incompatible with GCC on this example. // -// CHECK-LABEL: define i32 @f1_a +// CHECK-LABEL: define frozen i32 @f1_a // CHECK: load i32, i32* %{{.*}}, align 4 // CHECK: } -// CHECK-LABEL: define i32 @f1_b +// CHECK-LABEL: define frozen i32 @f1_b // CHECK: load i32, i32* %{{.*}}, align 4 // CHECK: } // Note that we are incompatible with GCC on this example. // -// CHECK-LABEL: define i32 @f1_c +// CHECK-LABEL: define frozen i32 @f1_c // CHECK: load i32, i32* %{{.*}}, align 4 // CHECK: } -// CHECK-LABEL: define i32 @f1_d +// CHECK-LABEL: define frozen i32 @f1_d // CHECK: load i32, i32* %{{.*}}, align 4 // CHECK: } int f1_a(struct s1 *a) { @@ -96,16 +96,16 @@ return a->z; } -// CHECK-LABEL: define i32 @f2_a +// CHECK-LABEL: define frozen i32 @f2_a // CHECK: load i32, i32* %{{.*}}, align 1 // CHECK: } -// CHECK-LABEL: define i32 @f2_b +// CHECK-LABEL: define frozen i32 @f2_b // CHECK: load i32, i32* %{{.*}}, align 4 // CHECK: } -// CHECK-LABEL: define i32 @f2_c +// CHECK-LABEL: define frozen i32 @f2_c // CHECK: load i32, i32* %{{.*}}, align 1 // CHECK: } -// CHECK-LABEL: define i32 @f2_d +// CHECK-LABEL: define frozen i32 @f2_d // CHECK: load i32, i32* %{{.*}}, align 1 // CHECK: } int f2_a(struct s2 *a) { @@ -121,16 +121,16 @@ return a->z; } -// CHECK-LABEL: define i32 @f3_a +// CHECK-LABEL: define frozen i32 @f3_a // CHECK: load i32, i32* %{{.*}}, align 1 // CHECK: } -// CHECK-LABEL: define i32 @f3_b +// CHECK-LABEL: define frozen i32 @f3_b // CHECK: load i32, i32* %{{.*}}, align 4 // CHECK: } -// CHECK-LABEL: define i32 @f3_c +// CHECK-LABEL: define frozen i32 @f3_c // CHECK: load i32, i32* %{{.*}}, align 1 // CHECK: } -// CHECK-LABEL: define i32 @f3_d +// CHECK-LABEL: define frozen i32 @f3_d // CHECK: load i32, i32* %{{.*}}, align 1 // CHECK: } int f3_a(struct s3 *a) { @@ -148,7 +148,7 @@ // Verify we don't claim things are overaligned. // -// CHECK-LABEL: define double @f4 +// CHECK-LABEL: define frozen double @f4 // CHECK: load double, double* {{.*}}, align 8 // CHECK: } extern double g4[5] __attribute__((aligned(16))); diff --git a/clang/test/CodeGen/packed-structure.c b/clang/test/CodeGen/packed-structure.c --- a/clang/test/CodeGen/packed-structure.c +++ b/clang/test/CodeGen/packed-structure.c @@ -16,7 +16,7 @@ int s0_align_y = __alignof(((struct s0*)0)->y); int s0_align = __alignof(struct s0); -// CHECK-FUNCTIONS-LABEL: define i32 @s0_load_x +// CHECK-FUNCTIONS-LABEL: define frozen i32 @s0_load_x // CHECK-FUNCTIONS: [[s0_load_x:%.*]] = load i32, i32* {{.*}}, align 4 // CHECK-FUNCTIONS: ret i32 [[s0_load_x]] int s0_load_x(struct s0 *a) { return a->x; } @@ -24,7 +24,7 @@ // has changed in llvm-gcc recently, previously both x and y would be loaded // with align 1 (in 2363.1 at least). // -// CHECK-FUNCTIONS-LABEL: define i32 @s0_load_y +// CHECK-FUNCTIONS-LABEL: define frozen i32 @s0_load_y // CHECK-FUNCTIONS: [[s0_load_y:%.*]] = load i32, i32* {{.*}}, align 4 // CHECK-FUNCTIONS: ret i32 [[s0_load_y]] int s0_load_y(struct s0 *a) { return a->y; } @@ -46,11 +46,11 @@ int s1_align_y = __alignof(((struct s1*)0)->y); int s1_align = __alignof(struct s1); -// CHECK-FUNCTIONS-LABEL: define i32 @s1_load_x +// CHECK-FUNCTIONS-LABEL: define frozen i32 @s1_load_x // CHECK-FUNCTIONS: [[s1_load_x:%.*]] = load i32, i32* {{.*}}, align 1 // CHECK-FUNCTIONS: ret i32 [[s1_load_x]] int s1_load_x(struct s1 *a) { return a->x; } -// CHECK-FUNCTIONS-LABEL: define i32 @s1_load_y +// CHECK-FUNCTIONS-LABEL: define frozen i32 @s1_load_y // CHECK-FUNCTIONS: [[s1_load_y:%.*]] = load i32, i32* {{.*}}, align 1 // CHECK-FUNCTIONS: ret i32 [[s1_load_y]] int s1_load_y(struct s1 *a) { return a->y; } @@ -74,11 +74,11 @@ int s2_align_y = __alignof(((struct s2*)0)->y); int s2_align = __alignof(struct s2); -// CHECK-FUNCTIONS-LABEL: define i32 @s2_load_x +// CHECK-FUNCTIONS-LABEL: define frozen i32 @s2_load_x // CHECK-FUNCTIONS: [[s2_load_y:%.*]] = load i32, i32* {{.*}}, align 2 // CHECK-FUNCTIONS: ret i32 [[s2_load_y]] int s2_load_x(struct s2 *a) { return a->x; } -// CHECK-FUNCTIONS-LABEL: define i32 @s2_load_y +// CHECK-FUNCTIONS-LABEL: define frozen i32 @s2_load_y // CHECK-FUNCTIONS: [[s2_load_y:%.*]] = load i32, i32* {{.*}}, align 2 // CHECK-FUNCTIONS: ret i32 [[s2_load_y]] int s2_load_y(struct s2 *a) { return a->y; } @@ -92,7 +92,7 @@ }; // CHECK-GLOBAL: @s3_1 = global i32 1 int s3_1 = __alignof(((struct s3*) 0)->anInt); -// CHECK-FUNCTIONS-LABEL: define i32 @test3( +// CHECK-FUNCTIONS-LABEL: define frozen i32 @test3( int test3(struct s3 *ptr) { // CHECK-FUNCTIONS: [[PTR:%.*]] = getelementptr inbounds {{%.*}}, {{%.*}}* {{%.*}}, i32 0, i32 1 // CHECK-FUNCTIONS-NEXT: load i32, i32* [[PTR]], align 2 diff --git a/clang/test/CodeGen/padding-init.c b/clang/test/CodeGen/padding-init.c --- a/clang/test/CodeGen/padding-init.c +++ b/clang/test/CodeGen/padding-init.c @@ -24,7 +24,7 @@ // CHECK: %s = alloca // CHECK-NEXT: %[[B:[0-9+]]] = bitcast %struct.S* %s to i8* // CHECK-NEXT: call void @llvm.memset{{.*}}(i8* align 8 %[[B]], i8 0, -// CHECK-NEXT: call void @use(%struct.S* %s) +// CHECK-NEXT: call void @use(%struct.S* frozen %s) void empty_braces() { struct S s = {}; return use(&s); @@ -34,7 +34,7 @@ // CHECK: %s = alloca // CHECK-NEXT: %[[B:[0-9+]]] = bitcast %struct.S* %s to i8* // CHECK-NEXT: call void @llvm.memcpy{{.*}}(i8* align 8 %[[B]], {{.*}}@__const.partial_init.s -// CHECK-NEXT: call void @use(%struct.S* %s) +// CHECK-NEXT: call void @use(%struct.S* frozen %s) void partial_init() { struct S s = { .c = 42 }; return use(&s); @@ -44,7 +44,7 @@ // CHECK: %s = alloca // CHECK-NEXT: %[[B:[0-9+]]] = bitcast %struct.S* %s to i8* // CHECK-NEXT: call void @llvm.memcpy{{.*}}(i8* align 8 %[[B]], {{.*}}@__const.init_all.s -// CHECK-NEXT: call void @use(%struct.S* %s) +// CHECK-NEXT: call void @use(%struct.S* frozen %s) void init_all() { struct S s = { .c = 42, .l = 0xdeadbeefc0fedead }; return use(&s); diff --git a/clang/test/CodeGen/pass-object-size.c b/clang/test/CodeGen/pass-object-size.c --- a/clang/test/CodeGen/pass-object-size.c +++ b/clang/test/CodeGen/pass-object-size.c @@ -11,49 +11,49 @@ int gi = 0; -// CHECK-LABEL: define i32 @ObjectSize0(i8* %{{.*}}, i64 %0) +// CHECK-LABEL: define frozen i32 @ObjectSize0(i8* frozen %{{.*}}, i64 frozen %0) int ObjectSize0(void *const p PS(0)) { // CHECK-NOT: @llvm.objectsize return __builtin_object_size(p, 0); } -// CHECK-LABEL: define i32 @DynamicObjectSize0(i8* %{{.*}}, i64 %0) +// CHECK-LABEL: define frozen i32 @DynamicObjectSize0(i8* frozen %{{.*}}, i64 frozen %0) int DynamicObjectSize0(void *const p PDS(0)) { // CHECK-NOT: @llvm.objectsize return __builtin_dynamic_object_size(p, 0); } -// CHECK-LABEL: define i32 @ObjectSize1(i8* %{{.*}}, i64 %0) +// CHECK-LABEL: define frozen i32 @ObjectSize1(i8* frozen %{{.*}}, i64 frozen %0) int ObjectSize1(void *const p PS(1)) { // CHECK-NOT: @llvm.objectsize return __builtin_object_size(p, 1); } -// CHECK-LABEL: define i32 @DynamicObjectSize1(i8* %{{.*}}, i64 %0) +// CHECK-LABEL: define frozen i32 @DynamicObjectSize1(i8* frozen %{{.*}}, i64 frozen %0) int DynamicObjectSize1(void *const p PDS(1)) { // CHECK-NOT: @llvm.objectsize return __builtin_dynamic_object_size(p, 1); } -// CHECK-LABEL: define i32 @ObjectSize2(i8* %{{.*}}, i64 %0) +// CHECK-LABEL: define frozen i32 @ObjectSize2(i8* frozen %{{.*}}, i64 frozen %0) int ObjectSize2(void *const p PS(2)) { // CHECK-NOT: @llvm.objectsize return __builtin_object_size(p, 2); } -// CHECK-LABEL: define i32 @DynamicObjectSize2(i8* %{{.*}}, i64 %0) +// CHECK-LABEL: define frozen i32 @DynamicObjectSize2(i8* frozen %{{.*}}, i64 frozen %0) int DynamicObjectSize2(void *const p PDS(2)) { // CHECK-NOT: @llvm.objectsize return __builtin_object_size(p, 2); } -// CHECK-LABEL: define i32 @ObjectSize3(i8* %{{.*}}, i64 %0) +// CHECK-LABEL: define frozen i32 @ObjectSize3(i8* frozen %{{.*}}, i64 frozen %0) int ObjectSize3(void *const p PS(3)) { // CHECK-NOT: @llvm.objectsize return __builtin_object_size(p, 3); } -// CHECK-LABEL: define i32 @DynamicObjectSize3(i8* %{{.*}}, i64 %0) +// CHECK-LABEL: define frozen i32 @DynamicObjectSize3(i8* frozen %{{.*}}, i64 frozen %0) int DynamicObjectSize3(void *const p PDS(3)) { // CHECK-NOT: @llvm.objectsize return __builtin_object_size(p, 3); @@ -65,81 +65,81 @@ void test1(unsigned long sz) { struct Foo t[10]; - // CHECK: call i32 @ObjectSize0(i8* %{{.*}}, i64 360) + // CHECK: call frozen i32 @ObjectSize0(i8* frozen %{{.*}}, i64 frozen 360) gi = ObjectSize0(&t[1]); - // CHECK: call i32 @ObjectSize1(i8* %{{.*}}, i64 360) + // CHECK: call frozen i32 @ObjectSize1(i8* frozen %{{.*}}, i64 frozen 360) gi = ObjectSize1(&t[1]); - // CHECK: call i32 @ObjectSize2(i8* %{{.*}}, i64 360) + // CHECK: call frozen i32 @ObjectSize2(i8* frozen %{{.*}}, i64 frozen 360) gi = ObjectSize2(&t[1]); - // CHECK: call i32 @ObjectSize3(i8* %{{.*}}, i64 360) + // CHECK: call frozen i32 @ObjectSize3(i8* frozen %{{.*}}, i64 frozen 360) gi = ObjectSize3(&t[1]); - // CHECK: call i32 @ObjectSize0(i8* %{{.*}}, i64 356) + // CHECK: call frozen i32 @ObjectSize0(i8* frozen %{{.*}}, i64 frozen 356) gi = ObjectSize0(&t[1].t[1]); - // CHECK: call i32 @ObjectSize1(i8* %{{.*}}, i64 36) + // CHECK: call frozen i32 @ObjectSize1(i8* frozen %{{.*}}, i64 frozen 36) gi = ObjectSize1(&t[1].t[1]); - // CHECK: call i32 @ObjectSize2(i8* %{{.*}}, i64 356) + // CHECK: call frozen i32 @ObjectSize2(i8* frozen %{{.*}}, i64 frozen 356) gi = ObjectSize2(&t[1].t[1]); - // CHECK: call i32 @ObjectSize3(i8* %{{.*}}, i64 36) + // CHECK: call frozen i32 @ObjectSize3(i8* frozen %{{.*}}, i64 frozen 36) gi = ObjectSize3(&t[1].t[1]); char *ptr = (char *)malloc(sz); // CHECK: [[REG:%.*]] = call i64 @llvm.objectsize.i64.p0i8({{.*}}, i1 false, i1 true, i1 true) - // CHECK: call i32 @DynamicObjectSize0(i8* %{{.*}}, i64 [[REG]]) + // CHECK: call frozen i32 @DynamicObjectSize0(i8* frozen %{{.*}}, i64 frozen [[REG]]) gi = DynamicObjectSize0(ptr); // CHECK: [[WITH_OFFSET:%.*]] = getelementptr // CHECK: [[REG:%.*]] = call i64 @llvm.objectsize.i64.p0i8(i8* [[WITH_OFFSET]], i1 false, i1 true, i1 true) - // CHECK: call i32 @DynamicObjectSize0(i8* {{.*}}, i64 [[REG]]) + // CHECK: call frozen i32 @DynamicObjectSize0(i8* {{.*}}, i64 frozen [[REG]]) gi = DynamicObjectSize0(ptr+10); // CHECK: [[REG:%.*]] = call i64 @llvm.objectsize.i64.p0i8({{.*}}, i1 true, i1 true, i1 true) - // CHECK: call i32 @DynamicObjectSize2(i8* {{.*}}, i64 [[REG]]) + // CHECK: call frozen i32 @DynamicObjectSize2(i8* {{.*}}, i64 frozen [[REG]]) gi = DynamicObjectSize2(ptr); } // CHECK-LABEL: define void @test2 void test2(struct Foo *t) { // CHECK: [[VAR:%[0-9]+]] = call i64 @llvm.objectsize - // CHECK: call i32 @ObjectSize1(i8* %{{.*}}, i64 [[VAR]]) + // CHECK: call frozen i32 @ObjectSize1(i8* frozen %{{.*}}, i64 frozen [[VAR]]) gi = ObjectSize1(&t->t[1]); - // CHECK: call i32 @ObjectSize3(i8* %{{.*}}, i64 36) + // CHECK: call frozen i32 @ObjectSize3(i8* frozen %{{.*}}, i64 frozen 36) gi = ObjectSize3(&t->t[1]); } -// CHECK-LABEL: define i32 @_Z27NoViableOverloadObjectSize0Pv +// CHECK-LABEL: define frozen i32 @_Z27NoViableOverloadObjectSize0Pv int NoViableOverloadObjectSize0(void *const p) __attribute__((overloadable)) { // CHECK: @llvm.objectsize return __builtin_object_size(p, 0); } -// CHECK-LABEL: define i32 @_Z34NoViableOverloadDynamicObjectSize0Pv +// CHECK-LABEL: define frozen i32 @_Z34NoViableOverloadDynamicObjectSize0Pv int NoViableOverloadDynamicObjectSize0(void *const p) __attribute__((overloadable)) { // CHECK: @llvm.objectsize return __builtin_object_size(p, 0); } -// CHECK-LABEL: define i32 @_Z27NoViableOverloadObjectSize1Pv +// CHECK-LABEL: define frozen i32 @_Z27NoViableOverloadObjectSize1Pv int NoViableOverloadObjectSize1(void *const p) __attribute__((overloadable)) { // CHECK: @llvm.objectsize return __builtin_object_size(p, 1); } -// CHECK-LABEL: define i32 @_Z27NoViableOverloadObjectSize2Pv +// CHECK-LABEL: define frozen i32 @_Z27NoViableOverloadObjectSize2Pv int NoViableOverloadObjectSize2(void *const p) __attribute__((overloadable)) { // CHECK: @llvm.objectsize return __builtin_object_size(p, 2); } -// CHECK-LABEL: define i32 @_Z27NoViableOverloadObjectSize3Pv +// CHECK-LABEL: define frozen i32 @_Z27NoViableOverloadObjectSize3Pv int NoViableOverloadObjectSize3(void *const p) __attribute__((overloadable)) { // CHECK-NOT: @llvm.objectsize return __builtin_object_size(p, 3); } -// CHECK-LABEL: define i32 @_Z27NoViableOverloadObjectSize0Pv +// CHECK-LABEL: define frozen i32 @_Z27NoViableOverloadObjectSize0Pv // CHECK-NOT: @llvm.objectsize int NoViableOverloadObjectSize0(void *const p PS(0)) __attribute__((overloadable)) { @@ -191,47 +191,47 @@ void test3() { struct Foo t[10]; - // CHECK: call i32 @_Z27NoViableOverloadObjectSize0PvU17pass_object_size0(i8* %{{.*}}, i64 360) + // CHECK: call frozen i32 @_Z27NoViableOverloadObjectSize0PvU17pass_object_size0(i8* frozen %{{.*}}, i64 frozen 360) gi = NoViableOverloadObjectSize0(&t[1]); - // CHECK: call i32 @_Z27NoViableOverloadObjectSize1PvU17pass_object_size1(i8* %{{.*}}, i64 360) + // CHECK: call frozen i32 @_Z27NoViableOverloadObjectSize1PvU17pass_object_size1(i8* frozen %{{.*}}, i64 frozen 360) gi = NoViableOverloadObjectSize1(&t[1]); - // CHECK: call i32 @_Z27NoViableOverloadObjectSize2PvU17pass_object_size2(i8* %{{.*}}, i64 360) + // CHECK: call frozen i32 @_Z27NoViableOverloadObjectSize2PvU17pass_object_size2(i8* frozen %{{.*}}, i64 frozen 360) gi = NoViableOverloadObjectSize2(&t[1]); - // CHECK: call i32 @_Z27NoViableOverloadObjectSize3PvU17pass_object_size3(i8* %{{.*}}, i64 360) + // CHECK: call frozen i32 @_Z27NoViableOverloadObjectSize3PvU17pass_object_size3(i8* frozen %{{.*}}, i64 frozen 360) gi = NoViableOverloadObjectSize3(&t[1]); - // CHECK: call i32 @_Z27NoViableOverloadObjectSize0PvU17pass_object_size0(i8* %{{.*}}, i64 356) + // CHECK: call frozen i32 @_Z27NoViableOverloadObjectSize0PvU17pass_object_size0(i8* frozen %{{.*}}, i64 frozen 356) gi = NoViableOverloadObjectSize0(&t[1].t[1]); - // CHECK: call i32 @_Z27NoViableOverloadObjectSize1PvU17pass_object_size1(i8* %{{.*}}, i64 36) + // CHECK: call frozen i32 @_Z27NoViableOverloadObjectSize1PvU17pass_object_size1(i8* frozen %{{.*}}, i64 frozen 36) gi = NoViableOverloadObjectSize1(&t[1].t[1]); - // CHECK: call i32 @_Z27NoViableOverloadObjectSize2PvU17pass_object_size2(i8* %{{.*}}, i64 356) + // CHECK: call frozen i32 @_Z27NoViableOverloadObjectSize2PvU17pass_object_size2(i8* frozen %{{.*}}, i64 frozen 356) gi = NoViableOverloadObjectSize2(&t[1].t[1]); - // CHECK: call i32 @_Z27NoViableOverloadObjectSize3PvU17pass_object_size3(i8* %{{.*}}, i64 36) + // CHECK: call frozen i32 @_Z27NoViableOverloadObjectSize3PvU17pass_object_size3(i8* frozen %{{.*}}, i64 frozen 36) gi = NoViableOverloadObjectSize3(&t[1].t[1]); - // CHECK: call i32 @_Z34NoViableOverloadDynamicObjectSize0PvU25pass_dynamic_object_size0(i8* %{{.*}}, i64 360) + // CHECK: call frozen i32 @_Z34NoViableOverloadDynamicObjectSize0PvU25pass_dynamic_object_size0(i8* frozen %{{.*}}, i64 frozen 360) gi = NoViableOverloadDynamicObjectSize0(&t[1]); } // CHECK-LABEL: define void @test4 void test4(struct Foo *t) { - // CHECK: call i32 @_Z27NoViableOverloadObjectSize0PvU17pass_object_size0(i8* %{{.*}}, i64 %{{.*}}) + // CHECK: call frozen i32 @_Z27NoViableOverloadObjectSize0PvU17pass_object_size0(i8* frozen %{{.*}}, i64 frozen %{{.*}}) gi = NoViableOverloadObjectSize0(&t[1]); - // CHECK: call i32 @_Z27NoViableOverloadObjectSize1PvU17pass_object_size1(i8* %{{.*}}, i64 %{{.*}}) + // CHECK: call frozen i32 @_Z27NoViableOverloadObjectSize1PvU17pass_object_size1(i8* frozen %{{.*}}, i64 frozen %{{.*}}) gi = NoViableOverloadObjectSize1(&t[1]); - // CHECK: call i32 @_Z27NoViableOverloadObjectSize2PvU17pass_object_size2(i8* %{{.*}}, i64 %{{.*}}) + // CHECK: call frozen i32 @_Z27NoViableOverloadObjectSize2PvU17pass_object_size2(i8* frozen %{{.*}}, i64 frozen %{{.*}}) gi = NoViableOverloadObjectSize2(&t[1]); - // CHECK: call i32 @_Z27NoViableOverloadObjectSize3PvU17pass_object_size3(i8* %{{.*}}, i64 0) + // CHECK: call frozen i32 @_Z27NoViableOverloadObjectSize3PvU17pass_object_size3(i8* frozen %{{.*}}, i64 frozen 0) gi = NoViableOverloadObjectSize3(&t[1]); - // CHECK: call i32 @_Z27NoViableOverloadObjectSize0PvU17pass_object_size0(i8* %{{.*}}, i64 %{{.*}}) + // CHECK: call frozen i32 @_Z27NoViableOverloadObjectSize0PvU17pass_object_size0(i8* frozen %{{.*}}, i64 frozen %{{.*}}) gi = NoViableOverloadObjectSize0(&t[1].t[1]); // CHECK: [[VAR:%[0-9]+]] = call i64 @llvm.objectsize - // CHECK: call i32 @_Z27NoViableOverloadObjectSize1PvU17pass_object_size1(i8* %{{.*}}, i64 [[VAR]]) + // CHECK: call frozen i32 @_Z27NoViableOverloadObjectSize1PvU17pass_object_size1(i8* frozen %{{.*}}, i64 frozen [[VAR]]) gi = NoViableOverloadObjectSize1(&t[1].t[1]); - // CHECK: call i32 @_Z27NoViableOverloadObjectSize2PvU17pass_object_size2(i8* %{{.*}}, i64 %{{.*}}) + // CHECK: call frozen i32 @_Z27NoViableOverloadObjectSize2PvU17pass_object_size2(i8* frozen %{{.*}}, i64 frozen %{{.*}}) gi = NoViableOverloadObjectSize2(&t[1].t[1]); - // CHECK: call i32 @_Z27NoViableOverloadObjectSize3PvU17pass_object_size3(i8* %{{.*}}, i64 36) + // CHECK: call frozen i32 @_Z27NoViableOverloadObjectSize3PvU17pass_object_size3(i8* frozen %{{.*}}, i64 frozen 36) gi = NoViableOverloadObjectSize3(&t[1].t[1]); } @@ -245,36 +245,36 @@ gi = g(&t[1]); } -// CHECK-LABEL: define i32 @IndirectObjectSize0 +// CHECK-LABEL: define frozen i32 @IndirectObjectSize0 int IndirectObjectSize0(void *const p PS(0)) { - // CHECK: call i32 @ObjectSize0(i8* %{{.*}}, i64 %{{.*}}) + // CHECK: call frozen i32 @ObjectSize0(i8* frozen %{{.*}}, i64 frozen %{{.*}}) // CHECK-NOT: @llvm.objectsize return ObjectSize0(p); } -// CHECK-LABEL: define i32 @IndirectObjectSize1 +// CHECK-LABEL: define frozen i32 @IndirectObjectSize1 int IndirectObjectSize1(void *const p PS(1)) { - // CHECK: call i32 @ObjectSize1(i8* %{{.*}}, i64 %{{.*}}) + // CHECK: call frozen i32 @ObjectSize1(i8* frozen %{{.*}}, i64 frozen %{{.*}}) // CHECK-NOT: @llvm.objectsize return ObjectSize1(p); } -// CHECK-LABEL: define i32 @IndirectObjectSize2 +// CHECK-LABEL: define frozen i32 @IndirectObjectSize2 int IndirectObjectSize2(void *const p PS(2)) { - // CHECK: call i32 @ObjectSize2(i8* %{{.*}}, i64 %{{.*}}) + // CHECK: call frozen i32 @ObjectSize2(i8* frozen %{{.*}}, i64 frozen %{{.*}}) // CHECK-NOT: @llvm.objectsize return ObjectSize2(p); } -// CHECK-LABEL: define i32 @IndirectObjectSize3 +// CHECK-LABEL: define frozen i32 @IndirectObjectSize3 int IndirectObjectSize3(void *const p PS(3)) { - // CHECK: call i32 @ObjectSize3(i8* %{{.*}}, i64 %{{.*}}) + // CHECK: call frozen i32 @ObjectSize3(i8* frozen %{{.*}}, i64 frozen %{{.*}}) // CHECK-NOT: @llvm.objectsize return ObjectSize3(p); } int IndirectDynamicObjectSize0(void *const p PDS(0)) { - // CHECK: call i32 @ObjectSize0(i8* %{{.*}}, i64 %{{.*}}) + // CHECK: call frozen i32 @ObjectSize0(i8* frozen %{{.*}}, i64 frozen %{{.*}}) // CHECK-NOT: @llvm.objectsize return ObjectSize0(p); } @@ -293,16 +293,16 @@ void test6() { int known[10], *opaque; - // CHECK: call i32 @"\01Overload0" + // CHECK: call frozen i32 @"\01Overload0" gi = OverloadedObjectSize(&known[0], &known[0]); - // CHECK: call i32 @"\01Overload0" + // CHECK: call frozen i32 @"\01Overload0" gi = OverloadedObjectSize(&known[0], opaque); - // CHECK: call i32 @"\01Overload0" + // CHECK: call frozen i32 @"\01Overload0" gi = OverloadedObjectSize(opaque, &known[0]); - // CHECK: call i32 @"\01Overload0" + // CHECK: call frozen i32 @"\01Overload0" gi = OverloadedObjectSize(opaque, opaque); } @@ -321,31 +321,31 @@ void test7() { struct Foo t[10]; - // CHECK: call i32 @"\01Identity"(i8* %{{.*}}, i64 360) + // CHECK: call frozen i32 @"\01Identity"(i8* frozen %{{.*}}, i64 frozen 360) gi = AsmObjectSize0(&t[1]); - // CHECK: call i32 @"\01Identity"(i8* %{{.*}}, i64 360) + // CHECK: call frozen i32 @"\01Identity"(i8* frozen %{{.*}}, i64 frozen 360) gi = AsmObjectSize1(&t[1]); - // CHECK: call i32 @"\01Identity"(i8* %{{.*}}, i64 360) + // CHECK: call frozen i32 @"\01Identity"(i8* frozen %{{.*}}, i64 frozen 360) gi = AsmObjectSize2(&t[1]); - // CHECK: call i32 @"\01Identity"(i8* %{{.*}}, i64 360) + // CHECK: call frozen i32 @"\01Identity"(i8* frozen %{{.*}}, i64 frozen 360) gi = AsmObjectSize3(&t[1]); - // CHECK: call i32 @"\01Identity"(i8* %{{.*}}, i64 356) + // CHECK: call frozen i32 @"\01Identity"(i8* frozen %{{.*}}, i64 frozen 356) gi = AsmObjectSize0(&t[1].t[1]); - // CHECK: call i32 @"\01Identity"(i8* %{{.*}}, i64 36) + // CHECK: call frozen i32 @"\01Identity"(i8* frozen %{{.*}}, i64 frozen 36) gi = AsmObjectSize1(&t[1].t[1]); - // CHECK: call i32 @"\01Identity"(i8* %{{.*}}, i64 356) + // CHECK: call frozen i32 @"\01Identity"(i8* frozen %{{.*}}, i64 frozen 356) gi = AsmObjectSize2(&t[1].t[1]); - // CHECK: call i32 @"\01Identity"(i8* %{{.*}}, i64 36) + // CHECK: call frozen i32 @"\01Identity"(i8* frozen %{{.*}}, i64 frozen 36) gi = AsmObjectSize3(&t[1].t[1]); } // CHECK-LABEL: define void @test8 void test8(struct Foo *t) { // CHECK: [[VAR:%[0-9]+]] = call i64 @llvm.objectsize - // CHECK: call i32 @"\01Identity"(i8* %{{.*}}, i64 [[VAR]]) + // CHECK: call frozen i32 @"\01Identity"(i8* frozen %{{.*}}, i64 frozen [[VAR]]) gi = AsmObjectSize1(&t[1].t[1]); - // CHECK: call i32 @"\01Identity"(i8* %{{.*}}, i64 36) + // CHECK: call frozen i32 @"\01Identity"(i8* frozen %{{.*}}, i64 frozen 36) gi = AsmObjectSize3(&t[1].t[1]); } @@ -363,7 +363,7 @@ DifferingObjectSize0(p); DifferingObjectSize1(p); - // CHECK: call void @DifferingObjectSize3(i8* %{{.*}}, i64 0) + // CHECK: call void @DifferingObjectSize3(i8* frozen %{{.*}}, i64 frozen 0) DifferingObjectSize3(p); } @@ -377,7 +377,7 @@ // CHECK-NOT: @llvm.objectsize DifferingObjectSize1(p); - // CHECK: call void @DifferingObjectSize3(i8* %{{.*}}, i64 0) + // CHECK: call void @DifferingObjectSize3(i8* frozen %{{.*}}, i64 frozen 0) DifferingObjectSize3(p); } @@ -391,7 +391,7 @@ // CHECK-NOT: @llvm.objectsize DifferingObjectSize2(p); - // CHECK: call void @DifferingObjectSize3(i8* %{{.*}}, i64 0) + // CHECK: call void @DifferingObjectSize3(i8* frozen %{{.*}}, i64 frozen 0) DifferingObjectSize3(p); } @@ -421,13 +421,13 @@ // CHECK: = add // CHECK-NOT: = add // CHECK: @llvm.objectsize - // CHECK: call i32 @ObjectSize0 + // CHECK: call frozen i32 @ObjectSize0 ObjectSize0(p + ++i); // CHECK: = add // CHECK: @llvm.objectsize // CHECK-NOT: = add - // CHECK: call i32 @ObjectSize0 + // CHECK: call frozen i32 @ObjectSize0 ObjectSize0(p + i++); } @@ -481,7 +481,7 @@ // CHECK-NOT: 65535 // CHECK: @llvm.objectsize.i64.p0i8(i8* [[PTR:%[^,]+]], // CHECK-NOT: 65535 - // CHECK: call i32 @ObjectSize0(i8* [[PTR]] + // CHECK: call frozen i32 @ObjectSize0(i8* frozen [[PTR]] ObjectSize0(C + ({ int a = 65535; a; })); } diff --git a/clang/test/CodeGen/pch-dllexport.cpp b/clang/test/CodeGen/pch-dllexport.cpp --- a/clang/test/CodeGen/pch-dllexport.cpp +++ b/clang/test/CodeGen/pch-dllexport.cpp @@ -77,13 +77,13 @@ // PCHWITHOBJ: define weak_odr dso_local dllexport void @"??$implicitInstantiation@H@@YAXH@Z" template<> inline void __declspec(dllexport) explicitSpecialization(int) {} -// PCHWITHOBJ: define weak_odr dso_local dllexport void @"??$explicitSpecialization@H@@YAXH@Z" +// PCHWITHOBJ: define weak_odr dso_local dllexport void @"??$explicitSpecialization@H@@YAXH@Z" template void __declspec(dllexport) explicitInstantiationDef(int); // PCHWITHOBJ: define weak_odr dso_local dllexport void @"??$explicitInstantiationDef@H@@YAXH@Z" template void __declspec(dllexport) explicitInstantiationDefAfterDecl(int); -// PCHWITHOBJ: define weak_odr dso_local dllexport void @"??$explicitInstantiationDefAfterDecl@H@@YAXH@Z"(i32 %0) +// PCHWITHOBJ: define weak_odr dso_local dllexport void @"??$explicitInstantiationDefAfterDecl@H@@YAXH@Z"(i32 frozen %0) template int __declspec(dllexport) variableTemplate; // PCHWITHOBJVARS: @"??$variableTemplate@H@@3HA" = weak_odr dso_local dllexport global @@ -91,6 +91,6 @@ // PR38934: Make sure S::operator= gets emitted. While it itself isn't a // template specialization, its parent is. template struct __declspec(dllexport) pr38934::S; -// PCHWITHOBJ: define weak_odr dso_local dllexport x86_thiscallcc nonnull align 1 dereferenceable(1) %"struct.pr38934::S"* @"??4?$S@H@pr38934@@QAEAAU01@ABU01@@Z" +// PCHWITHOBJ: define weak_odr dso_local dllexport x86_thiscallcc frozen nonnull align 1 dereferenceable(1) %"struct.pr38934::S"* @"??4?$S@H@pr38934@@QAEAAU01@ABU01@@Z" #endif diff --git a/clang/test/CodeGen/ppc-emmintrin.c b/clang/test/CodeGen/ppc-emmintrin.c --- a/clang/test/CodeGen/ppc-emmintrin.c +++ b/clang/test/CodeGen/ppc-emmintrin.c @@ -47,7 +47,7 @@ // CHECK-LABEL: @test_add -// CHECK: define available_externally <2 x i64> @_mm_add_epi64(<2 x i64> [[REG1:[0-9a-zA-Z_%.]+]], <2 x i64> [[REG2:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x i64> @_mm_add_epi64(<2 x i64> frozen [[REG1:[0-9a-zA-Z_%.]+]], <2 x i64> frozen [[REG2:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x i64> [[REG1]], <2 x i64>* [[REG3:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <2 x i64> [[REG2]], <2 x i64>* [[REG4:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG5:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG3]], align 16 @@ -55,7 +55,7 @@ // CHECK-NEXT: [[REG7:[0-9a-zA-Z_%.]+]] = add <2 x i64> [[REG5]], [[REG6]] // CHECK-NEXT: ret <2 x i64> [[REG7]] -// CHECK: define available_externally <2 x i64> @_mm_add_epi32(<2 x i64> [[REG8:[0-9a-zA-Z_%.]+]], <2 x i64> [[REG9:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x i64> @_mm_add_epi32(<2 x i64> frozen [[REG8:[0-9a-zA-Z_%.]+]], <2 x i64> frozen [[REG9:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x i64> [[REG8]], <2 x i64>* [[REG10:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <2 x i64> [[REG9]], <2 x i64>* [[REG11:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG12:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG10]], align 16 @@ -66,7 +66,7 @@ // CHECK-NEXT: [[REG17:[0-9a-zA-Z_%.]+]] = bitcast <4 x i32> [[REG16]] to <2 x i64> // CHECK-NEXT: ret <2 x i64> [[REG17]] -// CHECK: define available_externally <2 x i64> @_mm_add_epi16(<2 x i64> [[REG18:[0-9a-zA-Z_%.]+]], <2 x i64> [[REG19:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x i64> @_mm_add_epi16(<2 x i64> frozen [[REG18:[0-9a-zA-Z_%.]+]], <2 x i64> frozen [[REG19:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x i64> [[REG18]], <2 x i64>* [[REG20:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <2 x i64> [[REG19]], <2 x i64>* [[REG21:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG22:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG20]], align 16 @@ -77,7 +77,7 @@ // CHECK-NEXT: [[REG27:[0-9a-zA-Z_%.]+]] = bitcast <8 x i16> [[REG26]] to <2 x i64> // CHECK-NEXT: ret <2 x i64> [[REG27]] -// CHECK: define available_externally <2 x i64> @_mm_add_epi8(<2 x i64> [[REG28:[0-9a-zA-Z_%.]+]], <2 x i64> [[REG29:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x i64> @_mm_add_epi8(<2 x i64> frozen [[REG28:[0-9a-zA-Z_%.]+]], <2 x i64> frozen [[REG29:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x i64> [[REG28]], <2 x i64>* [[REG30:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <2 x i64> [[REG29]], <2 x i64>* [[REG31:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG32:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG30]], align 16 @@ -88,7 +88,7 @@ // CHECK-NEXT: [[REG37:[0-9a-zA-Z_%.]+]] = bitcast <16 x i8> [[REG36]] to <2 x i64> // CHECK-NEXT: ret <2 x i64> [[REG37]] -// CHECK: define available_externally <2 x double> @_mm_add_pd(<2 x double> [[REG38:[0-9a-zA-Z_%.]+]], <2 x double> [[REG39:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x double> @_mm_add_pd(<2 x double> frozen [[REG38:[0-9a-zA-Z_%.]+]], <2 x double> frozen [[REG39:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x double> [[REG38]], <2 x double>* [[REG40:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <2 x double> [[REG39]], <2 x double>* [[REG41:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG42:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG40]], align 16 @@ -96,7 +96,7 @@ // CHECK-NEXT: [[REG44:[0-9a-zA-Z_%.]+]] = fadd <2 x double> [[REG42]], [[REG43]] // CHECK-NEXT: ret <2 x double> [[REG44]] -// CHECK: define available_externally <2 x double> @_mm_add_sd(<2 x double> [[REG45:[0-9a-zA-Z_%.]+]], <2 x double> [[REG46:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x double> @_mm_add_sd(<2 x double> frozen [[REG45:[0-9a-zA-Z_%.]+]], <2 x double> frozen [[REG46:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x double> [[REG45]], <2 x double>* [[REG47:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <2 x double> [[REG46]], <2 x double>* [[REG48:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG49:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG47]], align 16 @@ -110,7 +110,7 @@ // CHECK-NEXT: [[REG56:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG47]], align 16 // CHECK-NEXT: ret <2 x double> [[REG56]] -// CHECK: define available_externally i64 @_mm_add_si64(i64 [[REG57:[0-9a-zA-Z_%.]+]], i64 [[REG58:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen i64 @_mm_add_si64(i64 frozen [[REG57:[0-9a-zA-Z_%.]+]], i64 frozen [[REG58:[0-9a-zA-Z_%.]+]]) // CHECK: store i64 [[REG57]], i64* [[REG59:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: store i64 [[REG58]], i64* [[REG60:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: [[REG61:[0-9a-zA-Z_%.]+]] = load i64, i64* [[REG59]], align 8 @@ -118,47 +118,47 @@ // CHECK-NEXT: [[REG63:[0-9a-zA-Z_%.]+]] = add i64 [[REG61]], [[REG62]] // CHECK-NEXT: ret i64 [[REG63]] -// CHECK: define available_externally <2 x i64> @_mm_adds_epi16(<2 x i64> [[REG64:[0-9a-zA-Z_%.]+]], <2 x i64> [[REG65:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x i64> @_mm_adds_epi16(<2 x i64> frozen [[REG64:[0-9a-zA-Z_%.]+]], <2 x i64> frozen [[REG65:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x i64> [[REG64]], <2 x i64>* [[REG66:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <2 x i64> [[REG65]], <2 x i64>* [[REG67:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG68:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG66]], align 16 // CHECK-NEXT: [[REG69:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG68]] to <8 x i16> // CHECK-NEXT: [[REG70:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG67]], align 16 // CHECK-NEXT: [[REG71:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG70]] to <8 x i16> -// CHECK-NEXT: [[REG72:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_adds(short vector[8], short vector[8])(<8 x i16> [[REG69]], <8 x i16> [[REG71]]) +// CHECK-NEXT: [[REG72:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_adds(short vector[8], short vector[8])(<8 x i16> frozen [[REG69]], <8 x i16> frozen [[REG71]]) // CHECK-NEXT: [[REG73:[0-9a-zA-Z_%.]+]] = bitcast <8 x i16> [[REG72]] to <2 x i64> // CHECK-NEXT: ret <2 x i64> [[REG73]] -// CHECK: define available_externally <2 x i64> @_mm_adds_epi8(<2 x i64> [[REG74:[0-9a-zA-Z_%.]+]], <2 x i64> [[REG75:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x i64> @_mm_adds_epi8(<2 x i64> frozen [[REG74:[0-9a-zA-Z_%.]+]], <2 x i64> frozen [[REG75:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x i64> [[REG74]], <2 x i64>* [[REG76:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <2 x i64> [[REG75]], <2 x i64>* [[REG77:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG78:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG76]], align 16 // CHECK-NEXT: [[REG79:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG78]] to <16 x i8> // CHECK-NEXT: [[REG80:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG77]], align 16 // CHECK-NEXT: [[REG81:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG80]] to <16 x i8> -// CHECK-NEXT: [[REG82:[0-9a-zA-Z_%.]+]] = call <16 x i8> @vec_adds(signed char vector[16], signed char vector[16])(<16 x i8> [[REG79]], <16 x i8> [[REG81]]) +// CHECK-NEXT: [[REG82:[0-9a-zA-Z_%.]+]] = call frozen <16 x i8> @vec_adds(signed char vector[16], signed char vector[16])(<16 x i8> frozen [[REG79]], <16 x i8> frozen [[REG81]]) // CHECK-NEXT: [[REG83:[0-9a-zA-Z_%.]+]] = bitcast <16 x i8> [[REG82]] to <2 x i64> // CHECK-NEXT: ret <2 x i64> [[REG83]] -// CHECK: define available_externally <2 x i64> @_mm_adds_epu16(<2 x i64> [[REG84:[0-9a-zA-Z_%.]+]], <2 x i64> [[REG85:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x i64> @_mm_adds_epu16(<2 x i64> frozen [[REG84:[0-9a-zA-Z_%.]+]], <2 x i64> frozen [[REG85:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x i64> [[REG84]], <2 x i64>* [[REG86:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <2 x i64> [[REG85]], <2 x i64>* [[REG87:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG88:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG86]], align 16 // CHECK-NEXT: [[REG89:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG88]] to <8 x i16> // CHECK-NEXT: [[REG90:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG87]], align 16 // CHECK-NEXT: [[REG91:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG90]] to <8 x i16> -// CHECK-NEXT: [[REG92:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_adds(unsigned short vector[8], unsigned short vector[8])(<8 x i16> [[REG89]], <8 x i16> [[REG91]]) +// CHECK-NEXT: [[REG92:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_adds(unsigned short vector[8], unsigned short vector[8])(<8 x i16> frozen [[REG89]], <8 x i16> frozen [[REG91]]) // CHECK-NEXT: [[REG93:[0-9a-zA-Z_%.]+]] = bitcast <8 x i16> [[REG92]] to <2 x i64> // CHECK-NEXT: ret <2 x i64> [[REG93]] -// CHECK: define available_externally <2 x i64> @_mm_adds_epu8(<2 x i64> [[REG94:[0-9a-zA-Z_%.]+]], <2 x i64> [[REG95:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x i64> @_mm_adds_epu8(<2 x i64> frozen [[REG94:[0-9a-zA-Z_%.]+]], <2 x i64> frozen [[REG95:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x i64> [[REG94]], <2 x i64>* [[REG96:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <2 x i64> [[REG95]], <2 x i64>* [[REG97:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG98:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG96]], align 16 // CHECK-NEXT: [[REG99:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG98]] to <16 x i8> // CHECK-NEXT: [[REG100:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG97]], align 16 // CHECK-NEXT: [[REG101:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG100]] to <16 x i8> -// CHECK-NEXT: [[REG102:[0-9a-zA-Z_%.]+]] = call <16 x i8> @vec_adds(unsigned char vector[16], unsigned char vector[16])(<16 x i8> [[REG99]], <16 x i8> [[REG101]]) +// CHECK-NEXT: [[REG102:[0-9a-zA-Z_%.]+]] = call frozen <16 x i8> @vec_adds(unsigned char vector[16], unsigned char vector[16])(<16 x i8> frozen [[REG99]], <16 x i8> frozen [[REG101]]) // CHECK-NEXT: [[REG103:[0-9a-zA-Z_%.]+]] = bitcast <16 x i8> [[REG102]] to <2 x i64> // CHECK-NEXT: ret <2 x i64> [[REG103]] @@ -170,25 +170,25 @@ // CHECK-LABEL: @test_avg -// CHECK: define available_externally <2 x i64> @_mm_avg_epu16(<2 x i64> [[REG104:[0-9a-zA-Z_%.]+]], <2 x i64> [[REG105:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x i64> @_mm_avg_epu16(<2 x i64> frozen [[REG104:[0-9a-zA-Z_%.]+]], <2 x i64> frozen [[REG105:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x i64> [[REG104]], <2 x i64>* [[REG106:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <2 x i64> [[REG105]], <2 x i64>* [[REG107:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG108:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG106]], align 16 // CHECK-NEXT: [[REG109:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG108]] to <8 x i16> // CHECK-NEXT: [[REG110:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG107]], align 16 // CHECK-NEXT: [[REG111:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG110]] to <8 x i16> -// CHECK-NEXT: [[REG112:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_avg(unsigned short vector[8], unsigned short vector[8])(<8 x i16> [[REG109]], <8 x i16> [[REG111]]) +// CHECK-NEXT: [[REG112:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_avg(unsigned short vector[8], unsigned short vector[8])(<8 x i16> frozen [[REG109]], <8 x i16> frozen [[REG111]]) // CHECK-NEXT: [[REG113:[0-9a-zA-Z_%.]+]] = bitcast <8 x i16> [[REG112]] to <2 x i64> // CHECK-NEXT: ret <2 x i64> [[REG113]] -// CHECK: define available_externally <2 x i64> @_mm_avg_epu8(<2 x i64> [[REG114:[0-9a-zA-Z_%.]+]], <2 x i64> [[REG115:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x i64> @_mm_avg_epu8(<2 x i64> frozen [[REG114:[0-9a-zA-Z_%.]+]], <2 x i64> frozen [[REG115:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x i64> [[REG114]], <2 x i64>* [[REG116:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <2 x i64> [[REG115]], <2 x i64>* [[REG117:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG118:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG116]], align 16 // CHECK-NEXT: [[REG119:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG118]] to <16 x i8> // CHECK-NEXT: [[REG120:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG117]], align 16 // CHECK-NEXT: [[REG121:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG120]] to <16 x i8> -// CHECK-NEXT: [[REG122:[0-9a-zA-Z_%.]+]] = call <16 x i8> @vec_avg(unsigned char vector[16], unsigned char vector[16])(<16 x i8> [[REG119]], <16 x i8> [[REG121]]) +// CHECK-NEXT: [[REG122:[0-9a-zA-Z_%.]+]] = call frozen <16 x i8> @vec_avg(unsigned char vector[16], unsigned char vector[16])(<16 x i8> frozen [[REG119]], <16 x i8> frozen [[REG121]]) // CHECK-NEXT: [[REG123:[0-9a-zA-Z_%.]+]] = bitcast <16 x i8> [[REG122]] to <2 x i64> // CHECK-NEXT: ret <2 x i64> [[REG123]] @@ -200,7 +200,7 @@ // CHECK-LABEL: @test_bs -// CHECK: define available_externally <2 x i64> @_mm_bslli_si128(<2 x i64> [[REG124:[0-9a-zA-Z_%.]+]], i32 signext [[REG125:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x i64> @_mm_bslli_si128(<2 x i64> frozen [[REG124:[0-9a-zA-Z_%.]+]], i32 frozen signext [[REG125:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x i64> [[REG124]], <2 x i64>* [[REG126:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store i32 [[REG125]], i32* [[REG127:[0-9a-zA-Z_%.]+]], align 4 // CHECK-NEXT: store <16 x i8> zeroinitializer, <16 x i8>* [[REG128:[0-9a-zA-Z_%.]+]], align 16 @@ -211,7 +211,7 @@ // CHECK-NEXT: [[REG133:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG126]], align 16 // CHECK-NEXT: [[REG134:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG133]] to <16 x i8> // CHECK-NEXT: [[REG135:[0-9a-zA-Z_%.]+]] = load i32, i32* [[REG127]], align 4 -// CHECK-NEXT: [[REG136:[0-9a-zA-Z_%.]+]] = call <16 x i8> @vec_sld(unsigned char vector[16], unsigned char vector[16], unsigned int)(<16 x i8> [[REG134]], <16 x i8> zeroinitializer, i32 zeroext [[REG135]]) +// CHECK-NEXT: [[REG136:[0-9a-zA-Z_%.]+]] = call frozen <16 x i8> @vec_sld(unsigned char vector[16], unsigned char vector[16], unsigned int)(<16 x i8> frozen [[REG134]], <16 x i8> frozen zeroinitializer, i32 frozen zeroext [[REG135]]) // CHECK-NEXT: store <16 x i8> [[REG136]], <16 x i8>* [[REG137:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: br label %[[REG138:[0-9a-zA-Z_%.]+]] // CHECK: [[REG132]]: @@ -222,7 +222,7 @@ // CHECK-NEXT: [[REG140:[0-9a-zA-Z_%.]+]] = bitcast <16 x i8> [[REG139]] to <2 x i64> // CHECK-NEXT: ret <2 x i64> [[REG140]] -// CHECK: define available_externally <2 x i64> @_mm_bsrli_si128(<2 x i64> [[REG141:[0-9a-zA-Z_%.]+]], i32 signext [[REG142:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x i64> @_mm_bsrli_si128(<2 x i64> frozen [[REG141:[0-9a-zA-Z_%.]+]], i32 frozen signext [[REG142:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x i64> [[REG141]], <2 x i64>* [[REG143:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store i32 [[REG142]], i32* [[REG144:[0-9a-zA-Z_%.]+]], align 4 // CHECK-NEXT: store <16 x i8> zeroinitializer, <16 x i8>* [[REG145:[0-9a-zA-Z_%.]+]], align 16 @@ -239,19 +239,19 @@ // CHECK-LE-NEXT: [[REG153:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG152]] to <16 x i8> // CHECK-LE-NEXT: [[REG154:[0-9a-zA-Z_%.]+]] = load i32, i32* [[REG144]], align 4 // CHECK-LE-NEXT: [[REG155:[0-9a-zA-Z_%.]+]] = sub nsw i32 16, [[REG154]] -// CHECK-LE-NEXT: [[REG156:[0-9a-zA-Z_%.]+]] = call <16 x i8> @vec_sld(unsigned char vector[16], unsigned char vector[16], unsigned int)(<16 x i8> zeroinitializer, <16 x i8> [[REG153]], i32 zeroext [[REG155]]) +// CHECK-LE-NEXT: [[REG156:[0-9a-zA-Z_%.]+]] = call frozen <16 x i8> @vec_sld(unsigned char vector[16], unsigned char vector[16], unsigned int)(<16 x i8> frozen zeroinitializer, <16 x i8> frozen [[REG153]], i32 frozen zeroext [[REG155]]) // CHECK-LE-NEXT: store <16 x i8> [[REG156]], <16 x i8>* [[REG157:[0-9a-zA-Z_%.]+]], align 16 // CHECK-LE-NEXT: br label %[[REG158:[0-9a-zA-Z_%.]+]] // CHECK-LE: [[REG151]]: // CHECK-LE: [[REG159:[0-9a-zA-Z_%.]+]] = load i32, i32* [[REG144]], align 4 // CHECK-LE-NEXT: [[REG160:[0-9a-zA-Z_%.]+]] = mul nsw i32 [[REG159]], 8 // CHECK-LE-NEXT: [[REG161:[0-9a-zA-Z_%.]+]] = trunc i32 [[REG160]] to i8 -// CHECK-LE-NEXT: [[REG162:[0-9a-zA-Z_%.]+]] = call <16 x i8> @vec_splats(unsigned char)(i8 zeroext [[REG161]]) +// CHECK-LE-NEXT: [[REG162:[0-9a-zA-Z_%.]+]] = call frozen <16 x i8> @vec_splats(unsigned char)(i8 frozen zeroext [[REG161]]) // CHECK-LE-NEXT: store <16 x i8> [[REG162]], <16 x i8>* [[REG163:[0-9a-zA-Z_%.]+]], align 16 // CHECK-LE-NEXT: [[REG164:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG143]], align 16 // CHECK-LE-NEXT: [[REG165:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG164]] to <16 x i8> // CHECK-LE-NEXT: [[REG166:[0-9a-zA-Z_%.]+]] = load <16 x i8>, <16 x i8>* [[REG163]], align 16 -// CHECK-LE-NEXT: [[REG167:[0-9a-zA-Z_%.]+]] = call <16 x i8> @vec_sro(unsigned char vector[16], unsigned char vector[16])(<16 x i8> [[REG165]], <16 x i8> [[REG166]]) +// CHECK-LE-NEXT: [[REG167:[0-9a-zA-Z_%.]+]] = call frozen <16 x i8> @vec_sro(unsigned char vector[16], unsigned char vector[16])(<16 x i8> frozen [[REG165]], <16 x i8> frozen [[REG166]]) // CHECK-LE-NEXT: store <16 x i8> [[REG167]], <16 x i8>* [[REG157]], align 16 // CHECK-LE-NEXT: br label %[[REG158:[0-9a-zA-Z_%.]+]] // CHECK-LE: [[REG158]]: @@ -267,12 +267,12 @@ // CHECK-BE: [[REG171:[0-9a-zA-Z_%.]+]] = load i32, i32* [[REG144]], align 4 // CHECK-BE-NEXT: [[REG172:[0-9a-zA-Z_%.]+]] = mul nsw i32 [[REG171]], 8 // CHECK-BE-NEXT: [[REG173:[0-9a-zA-Z_%.]+]] = trunc i32 [[REG172]] to i8 -// CHECK-BE-NEXT: [[REG174:[0-9a-zA-Z_%.]+]] = call <16 x i8> @vec_splats(unsigned char)(i8 zeroext [[REG173]]) +// CHECK-BE-NEXT: [[REG174:[0-9a-zA-Z_%.]+]] = call frozen <16 x i8> @vec_splats(unsigned char)(i8 frozen zeroext [[REG173]]) // CHECK-BE-NEXT: store <16 x i8> [[REG174]], <16 x i8>* [[REG175:[0-9a-zA-Z_%.]+]], align 16 // CHECK-BE-NEXT: [[REG176:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG143]], align 16 // CHECK-BE-NEXT: [[REG177:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG176]] to <16 x i8> // CHECK-BE-NEXT: [[REG178:[0-9a-zA-Z_%.]+]] = load <16 x i8>, <16 x i8>* [[REG175]], align 16 -// CHECK-BE-NEXT: [[REG179:[0-9a-zA-Z_%.]+]] = call <16 x i8> @vec_slo(unsigned char vector[16], unsigned char vector[16])(<16 x i8> [[REG177]], <16 x i8> [[REG178]]) +// CHECK-BE-NEXT: [[REG179:[0-9a-zA-Z_%.]+]] = call frozen <16 x i8> @vec_slo(unsigned char vector[16], unsigned char vector[16])(<16 x i8> frozen [[REG177]], <16 x i8> frozen [[REG178]]) // CHECK-BE-NEXT: store <16 x i8> [[REG179]], <16 x i8>* [[REG180:[0-9a-zA-Z_%.]+]], align 16 // CHECK-BE-NEXT: br label %[[REG181:[0-9a-zA-Z_%.]+]] // CHECK-BE: [[REG149]]: @@ -295,37 +295,37 @@ // CHECK-LABEL: @test_cast -// CHECK: define available_externally <4 x float> @_mm_castpd_ps(<2 x double> [[REG184:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <4 x float> @_mm_castpd_ps(<2 x double> frozen [[REG184:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x double> [[REG184]], <2 x double>* [[REG185:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG186:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG185]], align 16 // CHECK-NEXT: [[REG187:[0-9a-zA-Z_%.]+]] = bitcast <2 x double> [[REG186]] to <4 x float> // CHECK-NEXT: ret <4 x float> [[REG187]] -// CHECK: define available_externally <2 x i64> @_mm_castpd_si128(<2 x double> [[REG188:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x i64> @_mm_castpd_si128(<2 x double> frozen [[REG188:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x double> [[REG188]], <2 x double>* [[REG189:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG190:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG189]], align 16 // CHECK-NEXT: [[REG191:[0-9a-zA-Z_%.]+]] = bitcast <2 x double> [[REG190]] to <2 x i64> // CHECK-NEXT: ret <2 x i64> [[REG191]] -// CHECK: define available_externally <2 x double> @_mm_castps_pd(<4 x float> [[REG192:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x double> @_mm_castps_pd(<4 x float> frozen [[REG192:[0-9a-zA-Z_%.]+]]) // CHECK: store <4 x float> [[REG192]], <4 x float>* [[REG193:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG194:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG193]], align 16 // CHECK-NEXT: [[REG195:[0-9a-zA-Z_%.]+]] = bitcast <4 x float> [[REG194]] to <2 x double> // CHECK-NEXT: ret <2 x double> [[REG195]] -// CHECK: define available_externally <2 x i64> @_mm_castps_si128(<4 x float> [[REG196:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x i64> @_mm_castps_si128(<4 x float> frozen [[REG196:[0-9a-zA-Z_%.]+]]) // CHECK: store <4 x float> [[REG196]], <4 x float>* [[REG197:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG198:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG197]], align 16 // CHECK-NEXT: [[REG199:[0-9a-zA-Z_%.]+]] = bitcast <4 x float> [[REG198]] to <2 x i64> // CHECK-NEXT: ret <2 x i64> [[REG199]] -// CHECK: define available_externally <2 x double> @_mm_castsi128_pd(<2 x i64> [[REG200:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x double> @_mm_castsi128_pd(<2 x i64> frozen [[REG200:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x i64> [[REG200]], <2 x i64>* [[REG201:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG202:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG201]], align 16 // CHECK-NEXT: [[REG203:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG202]] to <2 x double> // CHECK-NEXT: ret <2 x double> [[REG203]] -// CHECK: define available_externally <4 x float> @_mm_castsi128_ps(<2 x i64> [[REG204:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <4 x float> @_mm_castsi128_ps(<2 x i64> frozen [[REG204:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x i64> [[REG204]], <2 x i64>* [[REG205:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG206:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG205]], align 16 // CHECK-NEXT: [[REG207:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG206]] to <4 x float> @@ -370,419 +370,419 @@ // CHECK-LABEL: @test_cmp -// CHECK: define available_externally <2 x i64> @_mm_cmpeq_epi32 -// CHECK: [[REG208:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_cmpeq(int vector[4], int vector[4]) +// CHECK: define available_externally frozen <2 x i64> @_mm_cmpeq_epi32 +// CHECK: [[REG208:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_cmpeq(int vector[4], int vector[4]) // CHECK-NEXT: [[REG209:[0-9a-zA-Z_%.]+]] = bitcast <4 x i32> [[REG208]] to <2 x i64> // CHECK-NEXT: ret <2 x i64> [[REG209]] -// CHECK: define available_externally <2 x i64> @_mm_cmpeq_epi16 -// CHECK: [[REG210:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_cmpeq(short vector[8], short vector[8])(<8 x i16> {{[0-9a-zA-Z_%.]+}}, <8 x i16> {{[0-9a-zA-Z_%.]+}}) +// CHECK: define available_externally frozen <2 x i64> @_mm_cmpeq_epi16 +// CHECK: [[REG210:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_cmpeq(short vector[8], short vector[8])(<8 x i16> frozen {{[0-9a-zA-Z_%.]+}}, <8 x i16> frozen {{[0-9a-zA-Z_%.]+}}) // CHECK-NEXT: [[REG211:[0-9a-zA-Z_%.]+]] = bitcast <8 x i16> [[REG210]] to <2 x i64> // CHECK-NEXT: ret <2 x i64> [[REG211]] -// CHECK: define available_externally <2 x i64> @_mm_cmpeq_epi8 -// CHECK: [[REG212:[0-9a-zA-Z_%.]+]] = call <16 x i8> @vec_cmpeq(signed char vector[16], signed char vector[16]) +// CHECK: define available_externally frozen <2 x i64> @_mm_cmpeq_epi8 +// CHECK: [[REG212:[0-9a-zA-Z_%.]+]] = call frozen <16 x i8> @vec_cmpeq(signed char vector[16], signed char vector[16]) // CHECK-NEXT: [[REG213:[0-9a-zA-Z_%.]+]] = bitcast <16 x i8> [[REG212]] to <2 x i64> // CHECK-NEXT: ret <2 x i64> [[REG213]] -// CHECK: define available_externally <2 x i64> @_mm_cmpgt_epi32 -// CHECK: [[REG214:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_cmpgt(int vector[4], int vector[4]) +// CHECK: define available_externally frozen <2 x i64> @_mm_cmpgt_epi32 +// CHECK: [[REG214:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_cmpgt(int vector[4], int vector[4]) // CHECK-NEXT: [[REG215:[0-9a-zA-Z_%.]+]] = bitcast <4 x i32> [[REG214]] to <2 x i64> // CHECK-NEXT: ret <2 x i64> [[REG215]] -// CHECK: define available_externally <2 x i64> @_mm_cmpgt_epi16 -// CHECK: [[REG216:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_cmpgt(short vector[8], short vector[8]) +// CHECK: define available_externally frozen <2 x i64> @_mm_cmpgt_epi16 +// CHECK: [[REG216:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_cmpgt(short vector[8], short vector[8]) // CHECK-NEXT: [[REG217:[0-9a-zA-Z_%.]+]] = bitcast <8 x i16> [[REG216]] to <2 x i64> // CHECK-NEXT: ret <2 x i64> [[REG217]] -// CHECK: define available_externally <2 x i64> @_mm_cmpgt_epi8 -// CHECK: [[REG218:[0-9a-zA-Z_%.]+]] = call <16 x i8> @vec_cmpgt(signed char vector[16], signed char vector[16]) +// CHECK: define available_externally frozen <2 x i64> @_mm_cmpgt_epi8 +// CHECK: [[REG218:[0-9a-zA-Z_%.]+]] = call frozen <16 x i8> @vec_cmpgt(signed char vector[16], signed char vector[16]) // CHECK-NEXT: [[REG219:[0-9a-zA-Z_%.]+]] = bitcast <16 x i8> [[REG218]] to <2 x i64> // CHECK-NEXT: ret <2 x i64> [[REG219]] -// CHECK: define available_externally <2 x i64> @_mm_cmplt_epi32 -// CHECK: [[REG220:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_cmplt(int vector[4], int vector[4]) +// CHECK: define available_externally frozen <2 x i64> @_mm_cmplt_epi32 +// CHECK: [[REG220:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_cmplt(int vector[4], int vector[4]) // CHECK-NEXT: [[REG221:[0-9a-zA-Z_%.]+]] = bitcast <4 x i32> [[REG220]] to <2 x i64> // CHECK-NEXT: ret <2 x i64> [[REG221]] -// CHECK: define available_externally <2 x i64> @_mm_cmplt_epi16 -// CHECK: [[REG222:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_cmplt(short vector[8], short vector[8]) +// CHECK: define available_externally frozen <2 x i64> @_mm_cmplt_epi16 +// CHECK: [[REG222:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_cmplt(short vector[8], short vector[8]) // CHECK-NEXT: [[REG223:[0-9a-zA-Z_%.]+]] = bitcast <8 x i16> [[REG222]] to <2 x i64> // CHECK-NEXT: ret <2 x i64> [[REG223]] -// CHECK: define available_externally <2 x i64> @_mm_cmplt_epi8 -// CHECK: [[REG224:[0-9a-zA-Z_%.]+]] = call <16 x i8> @vec_cmplt(signed char vector[16], signed char vector[16]) +// CHECK: define available_externally frozen <2 x i64> @_mm_cmplt_epi8 +// CHECK: [[REG224:[0-9a-zA-Z_%.]+]] = call frozen <16 x i8> @vec_cmplt(signed char vector[16], signed char vector[16]) // CHECK-NEXT: [[REG225:[0-9a-zA-Z_%.]+]] = bitcast <16 x i8> [[REG224]] to <2 x i64> // CHECK-NEXT: ret <2 x i64> [[REG225]] -// CHECK: define available_externally <2 x double> @_mm_cmpeq_pd -// CHECK: [[REG226:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_cmpeq(double vector[2], double vector[2]) +// CHECK: define available_externally frozen <2 x double> @_mm_cmpeq_pd +// CHECK: [[REG226:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_cmpeq(double vector[2], double vector[2]) // CHECK-NEXT: [[REG227:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG226]] to <2 x double> // CHECK-NEXT: ret <2 x double> [[REG227]] -// CHECK: define available_externally <2 x double> @_mm_cmpeq_sd(<2 x double> [[REG228:[0-9a-zA-Z_%.]+]], <2 x double> [[REG229:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x double> @_mm_cmpeq_sd(<2 x double> frozen [[REG228:[0-9a-zA-Z_%.]+]], <2 x double> frozen [[REG229:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x double> [[REG228]], <2 x double>* [[REG230:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <2 x double> [[REG229]], <2 x double>* [[REG231:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG232:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG230]], align 16 // CHECK-NEXT: [[REG233:[0-9a-zA-Z_%.]+]] = extractelement <2 x double> [[REG232]], i32 0 -// CHECK-NEXT: [[REG234:[0-9a-zA-Z_%.]+]] = call <2 x double> @vec_splats(double)(double [[REG233]]) +// CHECK-NEXT: [[REG234:[0-9a-zA-Z_%.]+]] = call frozen <2 x double> @vec_splats(double)(double frozen [[REG233]]) // CHECK-NEXT: store <2 x double> [[REG234]], <2 x double>* [[REG235:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG236:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG231]], align 16 // CHECK-NEXT: [[REG237:[0-9a-zA-Z_%.]+]] = extractelement <2 x double> [[REG236]], i32 0 -// CHECK-NEXT: [[REG238:[0-9a-zA-Z_%.]+]] = call <2 x double> @vec_splats(double)(double [[REG237]]) +// CHECK-NEXT: [[REG238:[0-9a-zA-Z_%.]+]] = call frozen <2 x double> @vec_splats(double)(double frozen [[REG237]]) // CHECK-NEXT: store <2 x double> [[REG238]], <2 x double>* [[REG239:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG240:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG235]], align 16 // CHECK-NEXT: [[REG241:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG239]], align 16 -// CHECK-NEXT: [[REG242:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_cmpeq(double vector[2], double vector[2])(<2 x double> [[REG240]], <2 x double> [[REG241]]) +// CHECK-NEXT: [[REG242:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_cmpeq(double vector[2], double vector[2])(<2 x double> frozen [[REG240]], <2 x double> frozen [[REG241]]) // CHECK-NEXT: [[REG243:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG242]] to <2 x double> // CHECK-NEXT: store <2 x double> [[REG243]], <2 x double>* [[REG244:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG245:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG244]], align 16 // CHECK-NEXT: [[REG246:[0-9a-zA-Z_%.]+]] = extractelement <2 x double> [[REG245]], i32 0 // CHECK-NEXT: [[REG247:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG230]], align 16 // CHECK-NEXT: [[REG248:[0-9a-zA-Z_%.]+]] = extractelement <2 x double> [[REG247]], i32 1 -// CHECK-NEXT: [[REG249:[0-9a-zA-Z_%.]+]] = call <2 x double> @_mm_setr_pd(double [[REG246]], double [[REG248]]) +// CHECK-NEXT: [[REG249:[0-9a-zA-Z_%.]+]] = call frozen <2 x double> @_mm_setr_pd(double frozen [[REG246]], double frozen [[REG248]]) // CHECK-NEXT: ret <2 x double> [[REG249]] -// CHECK: define available_externally <2 x double> @_mm_cmpge_pd -// CHECK: [[REG250:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_cmpge(double vector[2], double vector[2]) +// CHECK: define available_externally frozen <2 x double> @_mm_cmpge_pd +// CHECK: [[REG250:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_cmpge(double vector[2], double vector[2]) // CHECK-NEXT: [[REG251:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG250]] to <2 x double> // CHECK-NEXT: ret <2 x double> [[REG251]] -// CHECK: define available_externally <2 x double> @_mm_cmpge_sd(<2 x double> [[REG252:[0-9a-zA-Z_%.]+]], <2 x double> [[REG253:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x double> @_mm_cmpge_sd(<2 x double> frozen [[REG252:[0-9a-zA-Z_%.]+]], <2 x double> frozen [[REG253:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x double> [[REG252]], <2 x double>* [[REG254:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <2 x double> [[REG253]], <2 x double>* [[REG255:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG256:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG254]], align 16 // CHECK-NEXT: [[REG257:[0-9a-zA-Z_%.]+]] = extractelement <2 x double> [[REG256]], i32 0 -// CHECK-NEXT: [[REG258:[0-9a-zA-Z_%.]+]] = call <2 x double> @vec_splats(double)(double [[REG257]]) +// CHECK-NEXT: [[REG258:[0-9a-zA-Z_%.]+]] = call frozen <2 x double> @vec_splats(double)(double frozen [[REG257]]) // CHECK-NEXT: store <2 x double> [[REG258]], <2 x double>* [[REG259:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG260:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG255]], align 16 // CHECK-NEXT: [[REG261:[0-9a-zA-Z_%.]+]] = extractelement <2 x double> [[REG260]], i32 0 -// CHECK-NEXT: [[REG262:[0-9a-zA-Z_%.]+]] = call <2 x double> @vec_splats(double)(double [[REG261]]) +// CHECK-NEXT: [[REG262:[0-9a-zA-Z_%.]+]] = call frozen <2 x double> @vec_splats(double)(double frozen [[REG261]]) // CHECK-NEXT: store <2 x double> [[REG262]], <2 x double>* [[REG263:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG264:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG259]], align 16 // CHECK-NEXT: [[REG265:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG263]], align 16 -// CHECK-NEXT: [[REG266:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_cmpge(double vector[2], double vector[2])(<2 x double> [[REG264]], <2 x double> [[REG265]]) +// CHECK-NEXT: [[REG266:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_cmpge(double vector[2], double vector[2])(<2 x double> frozen [[REG264]], <2 x double> frozen [[REG265]]) // CHECK-NEXT: [[REG267:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG266]] to <2 x double> // CHECK-NEXT: store <2 x double> [[REG267]], <2 x double>* [[REG268:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG269:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG268]], align 16 // CHECK-NEXT: [[REG270:[0-9a-zA-Z_%.]+]] = extractelement <2 x double> [[REG269]], i32 0 // CHECK-NEXT: [[REG271:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG254]], align 16 // CHECK-NEXT: [[REG272:[0-9a-zA-Z_%.]+]] = extractelement <2 x double> [[REG271]], i32 1 -// CHECK-NEXT: [[REG273:[0-9a-zA-Z_%.]+]] = call <2 x double> @_mm_setr_pd(double [[REG270]], double [[REG272]]) +// CHECK-NEXT: [[REG273:[0-9a-zA-Z_%.]+]] = call frozen <2 x double> @_mm_setr_pd(double frozen [[REG270]], double frozen [[REG272]]) // CHECK-NEXT: ret <2 x double> [[REG273]] -// CHECK: define available_externally <2 x double> @_mm_cmpgt_pd -// CHECK: [[REG274:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_cmpgt(double vector[2], double vector[2]) +// CHECK: define available_externally frozen <2 x double> @_mm_cmpgt_pd +// CHECK: [[REG274:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_cmpgt(double vector[2], double vector[2]) // CHECK-NEXT: [[REG275:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG274]] to <2 x double> // CHECK-NEXT: ret <2 x double> [[REG275]] -// CHECK: define available_externally <2 x double> @_mm_cmpgt_sd(<2 x double> [[REG276:[0-9a-zA-Z_%.]+]], <2 x double> [[REG277:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x double> @_mm_cmpgt_sd(<2 x double> frozen [[REG276:[0-9a-zA-Z_%.]+]], <2 x double> frozen [[REG277:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x double> [[REG276]], <2 x double>* [[REG278:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <2 x double> [[REG277]], <2 x double>* [[REG279:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG280:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG278]], align 16 // CHECK-NEXT: [[REG281:[0-9a-zA-Z_%.]+]] = extractelement <2 x double> [[REG280]], i32 0 -// CHECK-NEXT: [[REG282:[0-9a-zA-Z_%.]+]] = call <2 x double> @vec_splats(double)(double [[REG281]]) +// CHECK-NEXT: [[REG282:[0-9a-zA-Z_%.]+]] = call frozen <2 x double> @vec_splats(double)(double frozen [[REG281]]) // CHECK-NEXT: store <2 x double> [[REG282]], <2 x double>* [[REG283:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG284:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG279]], align 16 // CHECK-NEXT: [[REG285:[0-9a-zA-Z_%.]+]] = extractelement <2 x double> [[REG284]], i32 0 -// CHECK-NEXT: [[REG286:[0-9a-zA-Z_%.]+]] = call <2 x double> @vec_splats(double)(double [[REG285]]) +// CHECK-NEXT: [[REG286:[0-9a-zA-Z_%.]+]] = call frozen <2 x double> @vec_splats(double)(double frozen [[REG285]]) // CHECK-NEXT: store <2 x double> [[REG286]], <2 x double>* [[REG287:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG288:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG283]], align 16 // CHECK-NEXT: [[REG289:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG287]], align 16 -// CHECK-NEXT: [[REG290:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_cmpgt(double vector[2], double vector[2])(<2 x double> [[REG288]], <2 x double> [[REG289]]) +// CHECK-NEXT: [[REG290:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_cmpgt(double vector[2], double vector[2])(<2 x double> frozen [[REG288]], <2 x double> frozen [[REG289]]) // CHECK-NEXT: [[REG291:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG290]] to <2 x double> // CHECK-NEXT: store <2 x double> [[REG291]], <2 x double>* [[REG292:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG293:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG292]], align 16 // CHECK-NEXT: [[REG294:[0-9a-zA-Z_%.]+]] = extractelement <2 x double> [[REG293]], i32 0 // CHECK-NEXT: [[REG295:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG278]], align 16 // CHECK-NEXT: [[REG296:[0-9a-zA-Z_%.]+]] = extractelement <2 x double> [[REG295]], i32 1 -// CHECK-NEXT: [[REG297:[0-9a-zA-Z_%.]+]] = call <2 x double> @_mm_setr_pd(double [[REG294]], double [[REG296]]) +// CHECK-NEXT: [[REG297:[0-9a-zA-Z_%.]+]] = call frozen <2 x double> @_mm_setr_pd(double frozen [[REG294]], double frozen [[REG296]]) // CHECK-NEXT: ret <2 x double> [[REG297]] -// CHECK: define available_externally <2 x double> @_mm_cmple_pd -// CHECK: [[REG298:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_cmple(double vector[2], double vector[2]) +// CHECK: define available_externally frozen <2 x double> @_mm_cmple_pd +// CHECK: [[REG298:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_cmple(double vector[2], double vector[2]) // CHECK-NEXT: [[REG299:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG298]] to <2 x double> // CHECK-NEXT: ret <2 x double> [[REG299]] -// CHECK: define available_externally <2 x double> @_mm_cmple_sd(<2 x double> [[REG300:[0-9a-zA-Z_%.]+]], <2 x double> [[REG301:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x double> @_mm_cmple_sd(<2 x double> frozen [[REG300:[0-9a-zA-Z_%.]+]], <2 x double> frozen [[REG301:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x double> [[REG300]], <2 x double>* [[REG302:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <2 x double> [[REG301]], <2 x double>* [[REG303:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG304:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG302]], align 16 // CHECK-NEXT: [[REG305:[0-9a-zA-Z_%.]+]] = extractelement <2 x double> [[REG304]], i32 0 -// CHECK-NEXT: [[REG306:[0-9a-zA-Z_%.]+]] = call <2 x double> @vec_splats(double)(double [[REG305]]) +// CHECK-NEXT: [[REG306:[0-9a-zA-Z_%.]+]] = call frozen <2 x double> @vec_splats(double)(double frozen [[REG305]]) // CHECK-NEXT: store <2 x double> [[REG306]], <2 x double>* [[REG307:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG308:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG303]], align 16 // CHECK-NEXT: [[REG309:[0-9a-zA-Z_%.]+]] = extractelement <2 x double> [[REG308]], i32 0 -// CHECK-NEXT: [[REG310:[0-9a-zA-Z_%.]+]] = call <2 x double> @vec_splats(double)(double [[REG309]]) +// CHECK-NEXT: [[REG310:[0-9a-zA-Z_%.]+]] = call frozen <2 x double> @vec_splats(double)(double frozen [[REG309]]) // CHECK-NEXT: store <2 x double> [[REG310]], <2 x double>* [[REG311:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG312:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG307]], align 16 // CHECK-NEXT: [[REG313:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG311]], align 16 -// CHECK-NEXT: [[REG314:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_cmple(double vector[2], double vector[2])(<2 x double> [[REG312]], <2 x double> [[REG313]]) +// CHECK-NEXT: [[REG314:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_cmple(double vector[2], double vector[2])(<2 x double> frozen [[REG312]], <2 x double> frozen [[REG313]]) // CHECK-NEXT: [[REG315:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG314]] to <2 x double> // CHECK-NEXT: store <2 x double> [[REG315]], <2 x double>* [[REG316:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG317:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG316]], align 16 // CHECK-NEXT: [[REG318:[0-9a-zA-Z_%.]+]] = extractelement <2 x double> [[REG317]], i32 0 // CHECK-NEXT: [[REG319:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG302]], align 16 // CHECK-NEXT: [[REG320:[0-9a-zA-Z_%.]+]] = extractelement <2 x double> [[REG319]], i32 1 -// CHECK-NEXT: [[REG321:[0-9a-zA-Z_%.]+]] = call <2 x double> @_mm_setr_pd(double [[REG318]], double [[REG320]]) +// CHECK-NEXT: [[REG321:[0-9a-zA-Z_%.]+]] = call frozen <2 x double> @_mm_setr_pd(double frozen [[REG318]], double frozen [[REG320]]) // CHECK-NEXT: ret <2 x double> [[REG321]] -// CHECK: define available_externally <2 x double> @_mm_cmplt_pd -// CHECK: [[REG322:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_cmplt(double vector[2], double vector[2]) +// CHECK: define available_externally frozen <2 x double> @_mm_cmplt_pd +// CHECK: [[REG322:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_cmplt(double vector[2], double vector[2]) // CHECK-NEXT: [[REG323:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG322]] to <2 x double> // CHECK-NEXT: ret <2 x double> [[REG323]] -// CHECK: define available_externally <2 x double> @_mm_cmplt_sd(<2 x double> [[REG324:[0-9a-zA-Z_%.]+]], <2 x double> [[REG325:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x double> @_mm_cmplt_sd(<2 x double> frozen [[REG324:[0-9a-zA-Z_%.]+]], <2 x double> frozen [[REG325:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x double> [[REG324]], <2 x double>* [[REG326:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <2 x double> [[REG325]], <2 x double>* [[REG327:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG328:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG326]], align 16 // CHECK-NEXT: [[REG329:[0-9a-zA-Z_%.]+]] = extractelement <2 x double> [[REG328]], i32 0 -// CHECK-NEXT: [[REG330:[0-9a-zA-Z_%.]+]] = call <2 x double> @vec_splats(double)(double [[REG329]]) +// CHECK-NEXT: [[REG330:[0-9a-zA-Z_%.]+]] = call frozen <2 x double> @vec_splats(double)(double frozen [[REG329]]) // CHECK-NEXT: store <2 x double> [[REG330]], <2 x double>* [[REG331:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG332:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG327]], align 16 // CHECK-NEXT: [[REG333:[0-9a-zA-Z_%.]+]] = extractelement <2 x double> [[REG332]], i32 0 -// CHECK-NEXT: [[REG334:[0-9a-zA-Z_%.]+]] = call <2 x double> @vec_splats(double)(double [[REG333]]) +// CHECK-NEXT: [[REG334:[0-9a-zA-Z_%.]+]] = call frozen <2 x double> @vec_splats(double)(double frozen [[REG333]]) // CHECK-NEXT: store <2 x double> [[REG334]], <2 x double>* [[REG335:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG336:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG331]], align 16 // CHECK-NEXT: [[REG337:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG335]], align 16 -// CHECK-NEXT: [[REG338:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_cmplt(double vector[2], double vector[2])(<2 x double> [[REG336]], <2 x double> [[REG337]]) +// CHECK-NEXT: [[REG338:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_cmplt(double vector[2], double vector[2])(<2 x double> frozen [[REG336]], <2 x double> frozen [[REG337]]) // CHECK-NEXT: [[REG339:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG338]] to <2 x double> // CHECK-NEXT: store <2 x double> [[REG339]], <2 x double>* [[REG340:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG341:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG340]], align 16 // CHECK-NEXT: [[REG342:[0-9a-zA-Z_%.]+]] = extractelement <2 x double> [[REG341]], i32 0 // CHECK-NEXT: [[REG343:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG326]], align 16 // CHECK-NEXT: [[REG344:[0-9a-zA-Z_%.]+]] = extractelement <2 x double> [[REG343]], i32 1 -// CHECK-NEXT: [[REG345:[0-9a-zA-Z_%.]+]] = call <2 x double> @_mm_setr_pd(double [[REG342]], double [[REG344]]) +// CHECK-NEXT: [[REG345:[0-9a-zA-Z_%.]+]] = call frozen <2 x double> @_mm_setr_pd(double frozen [[REG342]], double frozen [[REG344]]) // CHECK-NEXT: ret <2 x double> [[REG345]] -// CHECK: define available_externally <2 x double> @_mm_cmpneq_pd(<2 x double> [[REG346:[0-9a-zA-Z_%.]+]], <2 x double> [[REG347:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x double> @_mm_cmpneq_pd(<2 x double> frozen [[REG346:[0-9a-zA-Z_%.]+]], <2 x double> frozen [[REG347:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x double> [[REG346]], <2 x double>* [[REG348:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <2 x double> [[REG347]], <2 x double>* [[REG349:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG350:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG348]], align 16 // CHECK-NEXT: [[REG351:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG349]], align 16 -// CHECK-NEXT: [[REG352:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_cmpeq(double vector[2], double vector[2])(<2 x double> [[REG350]], <2 x double> [[REG351]]) +// CHECK-NEXT: [[REG352:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_cmpeq(double vector[2], double vector[2])(<2 x double> frozen [[REG350]], <2 x double> frozen [[REG351]]) // CHECK-NEXT: [[REG353:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG352]] to <2 x double> // CHECK-NEXT: store <2 x double> [[REG353]], <2 x double>* [[REG354:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG355:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG354]], align 16 // CHECK-NEXT: [[REG356:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG354]], align 16 -// CHECK-NEXT: [[REG357:[0-9a-zA-Z_%.]+]] = call <2 x double> @vec_nor(double vector[2], double vector[2])(<2 x double> [[REG355]], <2 x double> [[REG356]]) +// CHECK-NEXT: [[REG357:[0-9a-zA-Z_%.]+]] = call frozen <2 x double> @vec_nor(double vector[2], double vector[2])(<2 x double> frozen [[REG355]], <2 x double> frozen [[REG356]]) // CHECK-NEXT: ret <2 x double> [[REG357]] -// CHECK: define available_externally <2 x double> @_mm_cmpneq_sd(<2 x double> [[REG358:[0-9a-zA-Z_%.]+]], <2 x double> [[REG359:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x double> @_mm_cmpneq_sd(<2 x double> frozen [[REG358:[0-9a-zA-Z_%.]+]], <2 x double> frozen [[REG359:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x double> [[REG358]], <2 x double>* [[REG360:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <2 x double> [[REG359]], <2 x double>* [[REG361:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG362:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG360]], align 16 // CHECK-NEXT: [[REG363:[0-9a-zA-Z_%.]+]] = extractelement <2 x double> [[REG362]], i32 0 -// CHECK-NEXT: [[REG364:[0-9a-zA-Z_%.]+]] = call <2 x double> @vec_splats(double)(double [[REG363]]) +// CHECK-NEXT: [[REG364:[0-9a-zA-Z_%.]+]] = call frozen <2 x double> @vec_splats(double)(double frozen [[REG363]]) // CHECK-NEXT: store <2 x double> [[REG364]], <2 x double>* [[REG365:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG366:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG361]], align 16 // CHECK-NEXT: [[REG367:[0-9a-zA-Z_%.]+]] = extractelement <2 x double> [[REG366]], i32 0 -// CHECK-NEXT: [[REG368:[0-9a-zA-Z_%.]+]] = call <2 x double> @vec_splats(double)(double [[REG367]]) +// CHECK-NEXT: [[REG368:[0-9a-zA-Z_%.]+]] = call frozen <2 x double> @vec_splats(double)(double frozen [[REG367]]) // CHECK-NEXT: store <2 x double> [[REG368]], <2 x double>* [[REG369:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG370:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG365]], align 16 // CHECK-NEXT: [[REG371:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG369]], align 16 -// CHECK-NEXT: [[REG372:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_cmpeq(double vector[2], double vector[2])(<2 x double> [[REG370]], <2 x double> [[REG371]]) +// CHECK-NEXT: [[REG372:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_cmpeq(double vector[2], double vector[2])(<2 x double> frozen [[REG370]], <2 x double> frozen [[REG371]]) // CHECK-NEXT: [[REG373:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG372]] to <2 x double> // CHECK-NEXT: store <2 x double> [[REG373]], <2 x double>* [[REG374:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG375:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG374]], align 16 // CHECK-NEXT: [[REG376:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG374]], align 16 -// CHECK-NEXT: [[REG377:[0-9a-zA-Z_%.]+]] = call <2 x double> @vec_nor(double vector[2], double vector[2])(<2 x double> [[REG375]], <2 x double> [[REG376]]) +// CHECK-NEXT: [[REG377:[0-9a-zA-Z_%.]+]] = call frozen <2 x double> @vec_nor(double vector[2], double vector[2])(<2 x double> frozen [[REG375]], <2 x double> frozen [[REG376]]) // CHECK-NEXT: store <2 x double> [[REG377]], <2 x double>* [[REG374]], align 16 // CHECK-NEXT: [[REG378:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG374]], align 16 // CHECK-NEXT: [[REG379:[0-9a-zA-Z_%.]+]] = extractelement <2 x double> [[REG378]], i32 0 // CHECK-NEXT: [[REG380:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG360]], align 16 // CHECK-NEXT: [[REG381:[0-9a-zA-Z_%.]+]] = extractelement <2 x double> [[REG380]], i32 1 -// CHECK-NEXT: [[REG382:[0-9a-zA-Z_%.]+]] = call <2 x double> @_mm_setr_pd(double [[REG379]], double [[REG381]]) +// CHECK-NEXT: [[REG382:[0-9a-zA-Z_%.]+]] = call frozen <2 x double> @_mm_setr_pd(double frozen [[REG379]], double frozen [[REG381]]) // CHECK-NEXT: ret <2 x double> [[REG382]] -// CHECK: define available_externally <2 x double> @_mm_cmpnge_pd -// CHECK: [[REG383:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_cmplt(double vector[2], double vector[2]) +// CHECK: define available_externally frozen <2 x double> @_mm_cmpnge_pd +// CHECK: [[REG383:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_cmplt(double vector[2], double vector[2]) // CHECK-NEXT: [[REG384:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG383]] to <2 x double> // CHECK-NEXT: ret <2 x double> [[REG384]] -// CHECK: define available_externally <2 x double> @_mm_cmpnge_sd(<2 x double> [[REG385:[0-9a-zA-Z_%.]+]], <2 x double> [[REG386:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x double> @_mm_cmpnge_sd(<2 x double> frozen [[REG385:[0-9a-zA-Z_%.]+]], <2 x double> frozen [[REG386:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x double> [[REG385]], <2 x double>* [[REG387:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <2 x double> [[REG386]], <2 x double>* [[REG388:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG389:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG387]], align 16 // CHECK-NEXT: [[REG390:[0-9a-zA-Z_%.]+]] = extractelement <2 x double> [[REG389]], i32 0 -// CHECK-NEXT: [[REG391:[0-9a-zA-Z_%.]+]] = call <2 x double> @vec_splats(double)(double [[REG390]]) +// CHECK-NEXT: [[REG391:[0-9a-zA-Z_%.]+]] = call frozen <2 x double> @vec_splats(double)(double frozen [[REG390]]) // CHECK-NEXT: store <2 x double> [[REG391]], <2 x double>* [[REG392:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG393:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG388]], align 16 // CHECK-NEXT: [[REG394:[0-9a-zA-Z_%.]+]] = extractelement <2 x double> [[REG393]], i32 0 -// CHECK-NEXT: [[REG395:[0-9a-zA-Z_%.]+]] = call <2 x double> @vec_splats(double)(double [[REG394]]) +// CHECK-NEXT: [[REG395:[0-9a-zA-Z_%.]+]] = call frozen <2 x double> @vec_splats(double)(double frozen [[REG394]]) // CHECK-NEXT: store <2 x double> [[REG395]], <2 x double>* [[REG396:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG397:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG392]], align 16 // CHECK-NEXT: [[REG398:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG396]], align 16 -// CHECK-NEXT: [[REG399:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_cmplt(double vector[2], double vector[2])(<2 x double> [[REG397]], <2 x double> [[REG398]]) +// CHECK-NEXT: [[REG399:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_cmplt(double vector[2], double vector[2])(<2 x double> frozen [[REG397]], <2 x double> frozen [[REG398]]) // CHECK-NEXT: [[REG400:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG399]] to <2 x double> // CHECK-NEXT: store <2 x double> [[REG400]], <2 x double>* [[REG401:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG402:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG401]], align 16 // CHECK-NEXT: [[REG403:[0-9a-zA-Z_%.]+]] = extractelement <2 x double> [[REG402]], i32 0 // CHECK-NEXT: [[REG404:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG387]], align 16 // CHECK-NEXT: [[REG405:[0-9a-zA-Z_%.]+]] = extractelement <2 x double> [[REG404]], i32 1 -// CHECK-NEXT: [[REG406:[0-9a-zA-Z_%.]+]] = call <2 x double> @_mm_setr_pd(double [[REG403]], double [[REG405]]) +// CHECK-NEXT: [[REG406:[0-9a-zA-Z_%.]+]] = call frozen <2 x double> @_mm_setr_pd(double frozen [[REG403]], double frozen [[REG405]]) // CHECK-NEXT: ret <2 x double> [[REG406]] -// CHECK: define available_externally <2 x double> @_mm_cmpngt_pd(<2 x double> [[REG407:[0-9a-zA-Z_%.]+]], <2 x double> [[REG408:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x double> @_mm_cmpngt_pd(<2 x double> frozen [[REG407:[0-9a-zA-Z_%.]+]], <2 x double> frozen [[REG408:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x double> [[REG407]], <2 x double>* [[REG409:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <2 x double> [[REG408]], <2 x double>* [[REG410:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG411:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG409]], align 16 // CHECK-NEXT: [[REG412:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG410]], align 16 -// CHECK-NEXT: [[REG413:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_cmple(double vector[2], double vector[2])(<2 x double> [[REG411]], <2 x double> [[REG412]]) +// CHECK-NEXT: [[REG413:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_cmple(double vector[2], double vector[2])(<2 x double> frozen [[REG411]], <2 x double> frozen [[REG412]]) // CHECK-NEXT: [[REG414:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG413]] to <2 x double> // CHECK-NEXT: ret <2 x double> [[REG414]] -// CHECK: define available_externally <2 x double> @_mm_cmpngt_sd(<2 x double> [[REG415:[0-9a-zA-Z_%.]+]], <2 x double> [[REG416:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x double> @_mm_cmpngt_sd(<2 x double> frozen [[REG415:[0-9a-zA-Z_%.]+]], <2 x double> frozen [[REG416:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x double> [[REG415]], <2 x double>* [[REG417:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <2 x double> [[REG416]], <2 x double>* [[REG418:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG419:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG417]], align 16 // CHECK-NEXT: [[REG420:[0-9a-zA-Z_%.]+]] = extractelement <2 x double> [[REG419]], i32 0 -// CHECK-NEXT: [[REG421:[0-9a-zA-Z_%.]+]] = call <2 x double> @vec_splats(double)(double [[REG420]]) +// CHECK-NEXT: [[REG421:[0-9a-zA-Z_%.]+]] = call frozen <2 x double> @vec_splats(double)(double frozen [[REG420]]) // CHECK-NEXT: store <2 x double> [[REG421]], <2 x double>* [[REG422:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG423:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG418]], align 16 // CHECK-NEXT: [[REG424:[0-9a-zA-Z_%.]+]] = extractelement <2 x double> [[REG423]], i32 0 -// CHECK-NEXT: [[REG425:[0-9a-zA-Z_%.]+]] = call <2 x double> @vec_splats(double)(double [[REG424]]) +// CHECK-NEXT: [[REG425:[0-9a-zA-Z_%.]+]] = call frozen <2 x double> @vec_splats(double)(double frozen [[REG424]]) // CHECK-NEXT: store <2 x double> [[REG425]], <2 x double>* [[REG426:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG427:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG422]], align 16 // CHECK-NEXT: [[REG428:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG426]], align 16 -// CHECK-NEXT: [[REG429:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_cmple(double vector[2], double vector[2])(<2 x double> [[REG427]], <2 x double> [[REG428]]) +// CHECK-NEXT: [[REG429:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_cmple(double vector[2], double vector[2])(<2 x double> frozen [[REG427]], <2 x double> frozen [[REG428]]) // CHECK-NEXT: [[REG430:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG429]] to <2 x double> // CHECK-NEXT: store <2 x double> [[REG430]], <2 x double>* [[REG431:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG432:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG431]], align 16 // CHECK-NEXT: [[REG433:[0-9a-zA-Z_%.]+]] = extractelement <2 x double> [[REG432]], i32 0 // CHECK-NEXT: [[REG434:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG417]], align 16 // CHECK-NEXT: [[REG435:[0-9a-zA-Z_%.]+]] = extractelement <2 x double> [[REG434]], i32 1 -// CHECK-NEXT: [[REG436:[0-9a-zA-Z_%.]+]] = call <2 x double> @_mm_setr_pd(double [[REG433]], double [[REG435]]) +// CHECK-NEXT: [[REG436:[0-9a-zA-Z_%.]+]] = call frozen <2 x double> @_mm_setr_pd(double frozen [[REG433]], double frozen [[REG435]]) // CHECK-NEXT: ret <2 x double> [[REG436]] -// CHECK: define available_externally <2 x double> @_mm_cmpnle_pd -// CHECK: [[REG437:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_cmpgt(double vector[2], double vector[2]) +// CHECK: define available_externally frozen <2 x double> @_mm_cmpnle_pd +// CHECK: [[REG437:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_cmpgt(double vector[2], double vector[2]) // CHECK-NEXT: [[REG438:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG437]] to <2 x double> // CHECK-NEXT: ret <2 x double> [[REG438]] -// CHECK: define available_externally <2 x double> @_mm_cmpnle_sd(<2 x double> [[REG439:[0-9a-zA-Z_%.]+]], <2 x double> [[REG440:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x double> @_mm_cmpnle_sd(<2 x double> frozen [[REG439:[0-9a-zA-Z_%.]+]], <2 x double> frozen [[REG440:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x double> [[REG439]], <2 x double>* [[REG441:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <2 x double> [[REG440]], <2 x double>* [[REG442:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG443:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG441]], align 16 // CHECK-NEXT: [[REG444:[0-9a-zA-Z_%.]+]] = extractelement <2 x double> [[REG443]], i32 0 -// CHECK-NEXT: [[REG445:[0-9a-zA-Z_%.]+]] = call <2 x double> @vec_splats(double)(double [[REG444]]) +// CHECK-NEXT: [[REG445:[0-9a-zA-Z_%.]+]] = call frozen <2 x double> @vec_splats(double)(double frozen [[REG444]]) // CHECK-NEXT: store <2 x double> [[REG445]], <2 x double>* [[REG446:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG447:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG442]], align 16 // CHECK-NEXT: [[REG448:[0-9a-zA-Z_%.]+]] = extractelement <2 x double> [[REG447]], i32 0 -// CHECK-NEXT: [[REG449:[0-9a-zA-Z_%.]+]] = call <2 x double> @vec_splats(double)(double [[REG448]]) +// CHECK-NEXT: [[REG449:[0-9a-zA-Z_%.]+]] = call frozen <2 x double> @vec_splats(double)(double frozen [[REG448]]) // CHECK-NEXT: store <2 x double> [[REG449]], <2 x double>* [[REG450:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG451:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG446]], align 16 // CHECK-NEXT: [[REG452:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG450]], align 16 -// CHECK-NEXT: [[REG453:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_cmpge(double vector[2], double vector[2])(<2 x double> [[REG451]], <2 x double> [[REG452]]) +// CHECK-NEXT: [[REG453:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_cmpge(double vector[2], double vector[2])(<2 x double> frozen [[REG451]], <2 x double> frozen [[REG452]]) // CHECK-NEXT: [[REG454:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG453]] to <2 x double> // CHECK-NEXT: store <2 x double> [[REG454]], <2 x double>* [[REG455:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG456:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG455]], align 16 // CHECK-NEXT: [[REG457:[0-9a-zA-Z_%.]+]] = extractelement <2 x double> [[REG456]], i32 0 // CHECK-NEXT: [[REG458:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG441]], align 16 // CHECK-NEXT: [[REG459:[0-9a-zA-Z_%.]+]] = extractelement <2 x double> [[REG458]], i32 1 -// CHECK-NEXT: [[REG460:[0-9a-zA-Z_%.]+]] = call <2 x double> @_mm_setr_pd(double [[REG457]], double [[REG459]]) +// CHECK-NEXT: [[REG460:[0-9a-zA-Z_%.]+]] = call frozen <2 x double> @_mm_setr_pd(double frozen [[REG457]], double frozen [[REG459]]) // CHECK-NEXT: ret <2 x double> [[REG460]] -// CHECK: define available_externally <2 x double> @_mm_cmpnlt_pd -// CHECK: [[REG461:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_cmpge(double vector[2], double vector[2]) +// CHECK: define available_externally frozen <2 x double> @_mm_cmpnlt_pd +// CHECK: [[REG461:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_cmpge(double vector[2], double vector[2]) // CHECK-NEXT: [[REG462:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG461]] to <2 x double> // CHECK-NEXT: ret <2 x double> [[REG462]] -// CHECK: define available_externally <2 x double> @_mm_cmpnlt_sd(<2 x double> [[REG463:[0-9a-zA-Z_%.]+]], <2 x double> [[REG464:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x double> @_mm_cmpnlt_sd(<2 x double> frozen [[REG463:[0-9a-zA-Z_%.]+]], <2 x double> frozen [[REG464:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x double> [[REG463]], <2 x double>* [[REG465:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <2 x double> [[REG464]], <2 x double>* [[REG466:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG467:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG465]], align 16 // CHECK-NEXT: [[REG468:[0-9a-zA-Z_%.]+]] = extractelement <2 x double> [[REG467]], i32 0 -// CHECK-NEXT: [[REG469:[0-9a-zA-Z_%.]+]] = call <2 x double> @vec_splats(double)(double [[REG468]]) +// CHECK-NEXT: [[REG469:[0-9a-zA-Z_%.]+]] = call frozen <2 x double> @vec_splats(double)(double frozen [[REG468]]) // CHECK-NEXT: store <2 x double> [[REG469]], <2 x double>* [[REG470:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG471:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG466]], align 16 // CHECK-NEXT: [[REG472:[0-9a-zA-Z_%.]+]] = extractelement <2 x double> [[REG471]], i32 0 -// CHECK-NEXT: [[REG473:[0-9a-zA-Z_%.]+]] = call <2 x double> @vec_splats(double)(double [[REG472]]) +// CHECK-NEXT: [[REG473:[0-9a-zA-Z_%.]+]] = call frozen <2 x double> @vec_splats(double)(double frozen [[REG472]]) // CHECK-NEXT: store <2 x double> [[REG473]], <2 x double>* [[REG474:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG475:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG470]], align 16 // CHECK-NEXT: [[REG476:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG474]], align 16 -// CHECK-NEXT: [[REG477:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_cmpge(double vector[2], double vector[2])(<2 x double> [[REG475]], <2 x double> [[REG476]]) +// CHECK-NEXT: [[REG477:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_cmpge(double vector[2], double vector[2])(<2 x double> frozen [[REG475]], <2 x double> frozen [[REG476]]) // CHECK-NEXT: [[REG478:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG477]] to <2 x double> // CHECK-NEXT: store <2 x double> [[REG478]], <2 x double>* [[REG479:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG480:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG479]], align 16 // CHECK-NEXT: [[REG481:[0-9a-zA-Z_%.]+]] = extractelement <2 x double> [[REG480]], i32 0 // CHECK-NEXT: [[REG482:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG465]], align 16 // CHECK-NEXT: [[REG483:[0-9a-zA-Z_%.]+]] = extractelement <2 x double> [[REG482]], i32 1 -// CHECK-NEXT: [[REG484:[0-9a-zA-Z_%.]+]] = call <2 x double> @_mm_setr_pd(double [[REG481]], double [[REG483]]) +// CHECK-NEXT: [[REG484:[0-9a-zA-Z_%.]+]] = call frozen <2 x double> @_mm_setr_pd(double frozen [[REG481]], double frozen [[REG483]]) // CHECK-NEXT: ret <2 x double> [[REG484]] -// CHECK: define available_externally <2 x double> @_mm_cmpord_pd(<2 x double> [[REG485:[0-9a-zA-Z_%.]+]], <2 x double> [[REG486:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x double> @_mm_cmpord_pd(<2 x double> frozen [[REG485:[0-9a-zA-Z_%.]+]], <2 x double> frozen [[REG486:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x double> [[REG485]], <2 x double>* [[REG487:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <2 x double> [[REG486]], <2 x double>* [[REG488:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG489:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG487]], align 16 // CHECK-NEXT: [[REG490:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG487]], align 16 -// CHECK-NEXT: [[REG491:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_cmpeq(double vector[2], double vector[2])(<2 x double> [[REG489]], <2 x double> [[REG490]]) +// CHECK-NEXT: [[REG491:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_cmpeq(double vector[2], double vector[2])(<2 x double> frozen [[REG489]], <2 x double> frozen [[REG490]]) // CHECK-NEXT: store <2 x i64> [[REG491]], <2 x i64>* [[REG492:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG493:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG488]], align 16 // CHECK-NEXT: [[REG494:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG488]], align 16 -// CHECK-NEXT: [[REG495:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_cmpeq(double vector[2], double vector[2])(<2 x double> [[REG493]], <2 x double> [[REG494]]) +// CHECK-NEXT: [[REG495:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_cmpeq(double vector[2], double vector[2])(<2 x double> frozen [[REG493]], <2 x double> frozen [[REG494]]) // CHECK-NEXT: store <2 x i64> [[REG495]], <2 x i64>* [[REG496:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG497:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG492]], align 16 // CHECK-NEXT: [[REG498:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG496]], align 16 -// CHECK-NEXT: [[REG499:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_and(unsigned long long vector[2], unsigned long long vector[2])(<2 x i64> [[REG497]], <2 x i64> [[REG498]]) +// CHECK-NEXT: [[REG499:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_and(unsigned long long vector[2], unsigned long long vector[2])(<2 x i64> frozen [[REG497]], <2 x i64> frozen [[REG498]]) // CHECK-NEXT: [[REG500:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG499]] to <2 x double> // CHECK-NEXT: ret <2 x double> [[REG500]] -// CHECK: define available_externally <2 x double> @_mm_cmpord_sd(<2 x double> [[REG501:[0-9a-zA-Z_%.]+]], <2 x double> [[REG502:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x double> @_mm_cmpord_sd(<2 x double> frozen [[REG501:[0-9a-zA-Z_%.]+]], <2 x double> frozen [[REG502:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x double> [[REG501]], <2 x double>* [[REG503:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <2 x double> [[REG502]], <2 x double>* [[REG504:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG505:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG503]], align 16 // CHECK-NEXT: [[REG506:[0-9a-zA-Z_%.]+]] = extractelement <2 x double> [[REG505]], i32 0 -// CHECK-NEXT: [[REG507:[0-9a-zA-Z_%.]+]] = call <2 x double> @vec_splats(double)(double [[REG506]]) +// CHECK-NEXT: [[REG507:[0-9a-zA-Z_%.]+]] = call frozen <2 x double> @vec_splats(double)(double frozen [[REG506]]) // CHECK-NEXT: [[REG508:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG504]], align 16 // CHECK-NEXT: [[REG509:[0-9a-zA-Z_%.]+]] = extractelement <2 x double> [[REG508]], i32 0 -// CHECK-NEXT: [[REG510:[0-9a-zA-Z_%.]+]] = call <2 x double> @vec_splats(double)(double [[REG509]]) -// CHECK-NEXT: [[REG511:[0-9a-zA-Z_%.]+]] = call <2 x double> @_mm_cmpord_pd(<2 x double> [[REG507]], <2 x double> [[REG510]]) +// CHECK-NEXT: [[REG510:[0-9a-zA-Z_%.]+]] = call frozen <2 x double> @vec_splats(double)(double frozen [[REG509]]) +// CHECK-NEXT: [[REG511:[0-9a-zA-Z_%.]+]] = call frozen <2 x double> @_mm_cmpord_pd(<2 x double> frozen [[REG507]], <2 x double> frozen [[REG510]]) // CHECK-NEXT: store <2 x double> [[REG511]], <2 x double>* [[REG512:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG513:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG512]], align 16 // CHECK-NEXT: [[REG514:[0-9a-zA-Z_%.]+]] = extractelement <2 x double> [[REG513]], i32 0 // CHECK-NEXT: [[REG515:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG503]], align 16 // CHECK-NEXT: [[REG516:[0-9a-zA-Z_%.]+]] = extractelement <2 x double> [[REG515]], i32 1 -// CHECK-NEXT: [[REG517:[0-9a-zA-Z_%.]+]] = call <2 x double> @_mm_setr_pd(double [[REG514]], double [[REG516]]) +// CHECK-NEXT: [[REG517:[0-9a-zA-Z_%.]+]] = call frozen <2 x double> @_mm_setr_pd(double frozen [[REG514]], double frozen [[REG516]]) // CHECK-NEXT: ret <2 x double> [[REG517]] -// CHECK: define available_externally <2 x double> @_mm_cmpunord_pd(<2 x double> [[REG518:[0-9a-zA-Z_%.]+]], <2 x double> [[REG519:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x double> @_mm_cmpunord_pd(<2 x double> frozen [[REG518:[0-9a-zA-Z_%.]+]], <2 x double> frozen [[REG519:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x double> [[REG518]], <2 x double>* [[REG520:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <2 x double> [[REG519]], <2 x double>* [[REG521:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG522:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG520]], align 16 // CHECK-NEXT: [[REG523:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG520]], align 16 -// CHECK-NEXT: [[REG524:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_cmpeq(double vector[2], double vector[2])(<2 x double> [[REG522]], <2 x double> [[REG523]]) +// CHECK-NEXT: [[REG524:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_cmpeq(double vector[2], double vector[2])(<2 x double> frozen [[REG522]], <2 x double> frozen [[REG523]]) // CHECK-NEXT: store <2 x i64> [[REG524]], <2 x i64>* [[REG525:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG526:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG521]], align 16 // CHECK-NEXT: [[REG527:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG521]], align 16 -// CHECK-NEXT: [[REG528:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_cmpeq(double vector[2], double vector[2])(<2 x double> [[REG526]], <2 x double> [[REG527]]) +// CHECK-NEXT: [[REG528:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_cmpeq(double vector[2], double vector[2])(<2 x double> frozen [[REG526]], <2 x double> frozen [[REG527]]) // CHECK-NEXT: store <2 x i64> [[REG528]], <2 x i64>* [[REG529:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG530:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG525]], align 16 // CHECK-NEXT: [[REG531:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG525]], align 16 -// CHECK-NEXT: [[REG532:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_nor(unsigned long long vector[2], unsigned long long vector[2])(<2 x i64> [[REG530]], <2 x i64> [[REG531]]) +// CHECK-NEXT: [[REG532:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_nor(unsigned long long vector[2], unsigned long long vector[2])(<2 x i64> frozen [[REG530]], <2 x i64> frozen [[REG531]]) // CHECK-NEXT: store <2 x i64> [[REG532]], <2 x i64>* [[REG525]], align 16 // CHECK-NEXT: [[REG533:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG525]], align 16 // CHECK-NEXT: [[REG534:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG529]], align 16 -// CHECK-NEXT: [[REG535:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_orc(unsigned long long vector[2], unsigned long long vector[2])(<2 x i64> [[REG533]], <2 x i64> [[REG534]]) +// CHECK-NEXT: [[REG535:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_orc(unsigned long long vector[2], unsigned long long vector[2])(<2 x i64> frozen [[REG533]], <2 x i64> frozen [[REG534]]) // CHECK-NEXT: [[REG536:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG535]] to <2 x double> // CHECK-NEXT: ret <2 x double> [[REG536]] -// CHECK: define available_externally <2 x double> @_mm_cmpunord_sd(<2 x double> [[REG537:[0-9a-zA-Z_%.]+]], <2 x double> [[REG538:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x double> @_mm_cmpunord_sd(<2 x double> frozen [[REG537:[0-9a-zA-Z_%.]+]], <2 x double> frozen [[REG538:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x double> [[REG537]], <2 x double>* [[REG539:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <2 x double> [[REG538]], <2 x double>* [[REG540:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG541:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG539]], align 16 // CHECK-NEXT: [[REG542:[0-9a-zA-Z_%.]+]] = extractelement <2 x double> [[REG541]], i32 0 -// CHECK-NEXT: [[REG543:[0-9a-zA-Z_%.]+]] = call <2 x double> @vec_splats(double)(double [[REG542]]) +// CHECK-NEXT: [[REG543:[0-9a-zA-Z_%.]+]] = call frozen <2 x double> @vec_splats(double)(double frozen [[REG542]]) // CHECK-NEXT: [[REG544:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG540]], align 16 // CHECK-NEXT: [[REG545:[0-9a-zA-Z_%.]+]] = extractelement <2 x double> [[REG544]], i32 0 -// CHECK-NEXT: [[REG546:[0-9a-zA-Z_%.]+]] = call <2 x double> @vec_splats(double)(double [[REG545]]) -// CHECK-NEXT: [[REG547:[0-9a-zA-Z_%.]+]] = call <2 x double> @_mm_cmpunord_pd(<2 x double> [[REG543]], <2 x double> [[REG546]]) +// CHECK-NEXT: [[REG546:[0-9a-zA-Z_%.]+]] = call frozen <2 x double> @vec_splats(double)(double frozen [[REG545]]) +// CHECK-NEXT: [[REG547:[0-9a-zA-Z_%.]+]] = call frozen <2 x double> @_mm_cmpunord_pd(<2 x double> frozen [[REG543]], <2 x double> frozen [[REG546]]) // CHECK-NEXT: store <2 x double> [[REG547]], <2 x double>* [[REG548:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG549:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG548]], align 16 // CHECK-NEXT: [[REG550:[0-9a-zA-Z_%.]+]] = extractelement <2 x double> [[REG549]], i32 0 // CHECK-NEXT: [[REG551:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG539]], align 16 // CHECK-NEXT: [[REG552:[0-9a-zA-Z_%.]+]] = extractelement <2 x double> [[REG551]], i32 1 -// CHECK-NEXT: [[REG553:[0-9a-zA-Z_%.]+]] = call <2 x double> @_mm_setr_pd(double [[REG550]], double [[REG552]]) +// CHECK-NEXT: [[REG553:[0-9a-zA-Z_%.]+]] = call frozen <2 x double> @_mm_setr_pd(double frozen [[REG550]], double frozen [[REG552]]) // CHECK-NEXT: ret <2 x double> [[REG553]] void __attribute__((noinline)) @@ -797,7 +797,7 @@ // CHECK-LABEL: @test_comi -// CHECK: define available_externally signext i32 @_mm_comieq_sd(<2 x double> [[REG554:[0-9a-zA-Z_%.]+]], <2 x double> [[REG555:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen signext i32 @_mm_comieq_sd(<2 x double> frozen [[REG554:[0-9a-zA-Z_%.]+]], <2 x double> frozen [[REG555:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x double> [[REG554]], <2 x double>* [[REG556:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <2 x double> [[REG555]], <2 x double>* [[REG557:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG558:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG556]], align 16 @@ -808,27 +808,27 @@ // CHECK-NEXT: [[REG563:[0-9a-zA-Z_%.]+]] = zext i1 [[REG562]] to i32 // CHECK-NEXT: ret i32 [[REG563]] -// CHECK: define available_externally signext i32 @_mm_comige_sd +// CHECK: define available_externally frozen signext i32 @_mm_comige_sd // CHECK: [[REG564:[0-9a-zA-Z_%.]+]] = fcmp oge double {{[0-9a-zA-Z_%.]+}}, {{[0-9a-zA-Z_%.]+}} // CHECK-NEXT: [[REG565:[0-9a-zA-Z_%.]+]] = zext i1 [[REG564]] to i32 // CHECK-NEXT: ret i32 [[REG565]] -// CHECK: define available_externally signext i32 @_mm_comigt_sd +// CHECK: define available_externally frozen signext i32 @_mm_comigt_sd // CHECK: [[REG566:[0-9a-zA-Z_%.]+]] = fcmp ogt double {{[0-9a-zA-Z_%.]+}}, {{[0-9a-zA-Z_%.]+}} // CHECK-NEXT: [[REG567:[0-9a-zA-Z_%.]+]] = zext i1 [[REG566]] to i32 // CHECK-NEXT: ret i32 [[REG567]] -// CHECK: define available_externally signext i32 @_mm_comile_sd +// CHECK: define available_externally frozen signext i32 @_mm_comile_sd // CHECK: [[REG568:[0-9a-zA-Z_%.]+]] = fcmp ole double {{[0-9a-zA-Z_%.]+}}, {{[0-9a-zA-Z_%.]+}} // CHECK-NEXT: [[REG569:[0-9a-zA-Z_%.]+]] = zext i1 [[REG568]] to i32 // CHECK-NEXT: ret i32 [[REG569]] -// CHECK: define available_externally signext i32 @_mm_comilt_sd +// CHECK: define available_externally frozen signext i32 @_mm_comilt_sd // CHECK: [[REG570:[0-9a-zA-Z_%.]+]] = fcmp olt double {{[0-9a-zA-Z_%.]+}}, {{[0-9a-zA-Z_%.]+}} // CHECK-NEXT: [[REG571:[0-9a-zA-Z_%.]+]] = zext i1 [[REG570]] to i32 // CHECK-NEXT: ret i32 [[REG571]] -// CHECK: define available_externally signext i32 @_mm_comineq_sd +// CHECK: define available_externally frozen signext i32 @_mm_comineq_sd // CHECK: [[REG572:[0-9a-zA-Z_%.]+]] = fcmp une double {{[0-9a-zA-Z_%.]+}}, {{[0-9a-zA-Z_%.]+}} // CHECK-NEXT: [[REG573:[0-9a-zA-Z_%.]+]] = zext i1 [[REG572]] to i32 // CHECK-NEXT: ret i32 [[REG573]] @@ -843,10 +843,10 @@ // CHECK-LABEL: @test_control -// CHECK: define available_externally void @_mm_clflush(i8* [[REG574:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally void @_mm_clflush(i8* frozen [[REG574:[0-9a-zA-Z_%.]+]]) // CHECK: store i8* [[REG574]], i8** [[REG575:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: [[REG576:[0-9a-zA-Z_%.]+]] = load i8*, i8** [[REG575]], align 8 -// CHECK-NEXT: call void asm sideeffect "dcbf 0,$0", "b,~{memory}"(i8* [[REG576]]) +// CHECK-NEXT: call void asm sideeffect "dcbf 0,$0", "b,~{memory}"(i8* [[REG576]]) // CHECK-NEXT: ret void // CHECK: define available_externally void @_mm_lfence() @@ -897,80 +897,80 @@ // CHECK-LABEL: @test_converts -// CHECK: define available_externally <2 x double> @_mm_cvtepi32_pd(<2 x i64> [[REG579:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x double> @_mm_cvtepi32_pd(<2 x i64> frozen [[REG579:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x i64> [[REG579]], <2 x i64>* [[REG580:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG581:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG580]], align 16 // CHECK-NEXT: [[REG582:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG581]] to <4 x i32> -// CHECK-NEXT: [[REG583:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_unpackh(int vector[4])(<4 x i32> [[REG582]]) +// CHECK-NEXT: [[REG583:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_unpackh(int vector[4])(<4 x i32> frozen [[REG582]]) // CHECK-NEXT: store <2 x i64> [[REG583]], <2 x i64>* [[REG584:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG585:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG584]], align 16 // CHECK-NEXT: [[REG586:[0-9a-zA-Z_%.]+]] = sitofp <2 x i64> [[REG585]] to <2 x double> // CHECK-NEXT: [[REG587:[0-9a-zA-Z_%.]+]] = fmul <2 x double> [[REG586]], // CHECK-NEXT: ret <2 x double> [[REG587]] -// CHECK: define available_externally <4 x float> @_mm_cvtepi32_ps(<2 x i64> [[REG588:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <4 x float> @_mm_cvtepi32_ps(<2 x i64> frozen [[REG588:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x i64> [[REG588]], <2 x i64>* [[REG589:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG590:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG589]], align 16 // CHECK-NEXT: [[REG591:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG590]] to <4 x i32> // CHECK-NEXT: [[REG592:[0-9a-zA-Z_%.]+]] = call <4 x float> @llvm.ppc.altivec.vcfsx(<4 x i32> [[REG591]], i32 0) // CHECK-NEXT: ret <4 x float> [[REG592]] -// CHECK: define available_externally <2 x i64> @_mm_cvtpd_epi32(<2 x double> [[REG593:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x i64> @_mm_cvtpd_epi32(<2 x double> frozen [[REG593:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x double> [[REG593]], <2 x double>* [[REG594:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: %[[REG595:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG594]], align 16 -// CHECK-NEXT: [[REG596:[0-9a-zA-Z_%.]+]] = call <2 x double> @vec_rint(double vector[2])(<2 x double> %[[REG595:[0-9a-zA-Z_%.]+]]) +// CHECK-NEXT: [[REG596:[0-9a-zA-Z_%.]+]] = call frozen <2 x double> @vec_rint(double vector[2])(<2 x double> frozen %[[REG595:[0-9a-zA-Z_%.]+]]) // CHECK-NEXT: store <2 x double> [[REG596]], <2 x double>* [[REG597:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <4 x i32> zeroinitializer, <4 x i32>* [[REG598:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG599:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG597]], align 16 -// CHECK-NEXT: [[REG600:[0-9a-zA-Z_%.]+]] = call <4 x i32> asm "xvcvdpsxws ${0:x},${1:x}", "=^wa,^wa"(<2 x double> [[REG599]]) +// CHECK-NEXT: [[REG600:[0-9a-zA-Z_%.]+]] = call <4 x i32> asm "xvcvdpsxws ${0:x},${1:x}", "=^wa,^wa"(<2 x double> [[REG599]]) // CHECK-NEXT: store <4 x i32> [[REG600]], <4 x i32>* [[REG601:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG602:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG601]], align 16 // CHECK-NEXT: [[REG603:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG601]], align 16 -// CHECK-NEXT: [[REG604:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_mergeo(int vector[4], int vector[4])(<4 x i32> [[REG602]], <4 x i32> [[REG603]]) +// CHECK-NEXT: [[REG604:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_mergeo(int vector[4], int vector[4])(<4 x i32> frozen [[REG602]], <4 x i32> frozen [[REG603]]) // CHECK-NEXT: store <4 x i32> [[REG604]], <4 x i32>* [[REG601]], align 16 // CHECK-NEXT: [[REG605:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG601]], align 16 // CHECK-NEXT: [[REG606:[0-9a-zA-Z_%.]+]] = bitcast <4 x i32> [[REG605]] to <2 x i64> -// CHECK-NEXT: [[REG607:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_vpkudum(long long vector[2], long long vector[2])(<2 x i64> [[REG606]], <2 x i64> zeroinitializer) +// CHECK-NEXT: [[REG607:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_vpkudum(long long vector[2], long long vector[2])(<2 x i64> frozen [[REG606]], <2 x i64> frozen zeroinitializer) // CHECK-NEXT: store <4 x i32> [[REG607]], <4 x i32>* [[REG608:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG609:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG608]], align 16 // CHECK-NEXT: [[REG610:[0-9a-zA-Z_%.]+]] = bitcast <4 x i32> [[REG609]] to <2 x i64> // CHECK-NEXT: ret <2 x i64> [[REG610]] -// CHECK: define available_externally i64 @_mm_cvtpd_pi32(<2 x double> [[REG611:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen i64 @_mm_cvtpd_pi32(<2 x double> frozen [[REG611:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x double> [[REG611]], <2 x double>* [[REG612:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG613:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG612]], align 16 -// CHECK-NEXT: [[REG614:[0-9a-zA-Z_%.]+]] = call <2 x i64> @_mm_cvtpd_epi32(<2 x double> [[REG613]]) +// CHECK-NEXT: [[REG614:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @_mm_cvtpd_epi32(<2 x double> frozen [[REG613]]) // CHECK-NEXT: store <2 x i64> [[REG614]], <2 x i64>* [[REG615:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG616:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG615]], align 16 // CHECK-NEXT: [[REG617:[0-9a-zA-Z_%.]+]] = extractelement <2 x i64> [[REG616]], i32 0 // CHECK-NEXT: ret i64 [[REG617]] -// CHECK: define available_externally <4 x float> @_mm_cvtpd_ps(<2 x double> [[REG618:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <4 x float> @_mm_cvtpd_ps(<2 x double> frozen [[REG618:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x double> [[REG618]], <2 x double>* [[REG619:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <4 x i32> zeroinitializer, <4 x i32>* [[REG620:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: %[[REG621:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG619]], align 16 -// CHECK-NEXT: [[REG622:[0-9a-zA-Z_%.]+]] = call <4 x i32> asm "xvcvdpsp ${0:x},${1:x}", "=^wa,^wa"(<2 x double> %[[REG621:[0-9a-zA-Z_%.]+]]) +// CHECK-NEXT: [[REG622:[0-9a-zA-Z_%.]+]] = call <4 x i32> asm "xvcvdpsp ${0:x},${1:x}", "=^wa,^wa"(<2 x double> %[[REG621:[0-9a-zA-Z_%.]+]]) // CHECK-NEXT: store <4 x i32> [[REG622]], <4 x i32>* [[REG623:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG624:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG623]], align 16 // CHECK-NEXT: [[REG625:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG623]], align 16 -// CHECK-NEXT: [[REG626:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_mergeo(int vector[4], int vector[4])(<4 x i32> [[REG624]], <4 x i32> [[REG625]]) +// CHECK-NEXT: [[REG626:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_mergeo(int vector[4], int vector[4])(<4 x i32> frozen [[REG624]], <4 x i32> frozen [[REG625]]) // CHECK-NEXT: store <4 x i32> [[REG626]], <4 x i32>* [[REG623]], align 16 // CHECK-NEXT: [[REG627:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG623]], align 16 // CHECK-NEXT: [[REG628:[0-9a-zA-Z_%.]+]] = bitcast <4 x i32> [[REG627]] to <2 x i64> -// CHECK-NEXT: [[REG629:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_vpkudum(long long vector[2], long long vector[2])(<2 x i64> [[REG628]], <2 x i64> zeroinitializer) +// CHECK-NEXT: [[REG629:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_vpkudum(long long vector[2], long long vector[2])(<2 x i64> frozen [[REG628]], <2 x i64> frozen zeroinitializer) // CHECK-NEXT: [[REG630:[0-9a-zA-Z_%.]+]] = bitcast <4 x i32> [[REG629]] to <4 x float> // CHECK-NEXT: store <4 x float> [[REG630]], <4 x float>* [[REG631:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG632:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG631]], align 16 // CHECK-NEXT: ret <4 x float> [[REG632]] -// CHECK: define available_externally <2 x double> @_mm_cvtpi32_pd(i64 [[REG633:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x double> @_mm_cvtpi32_pd(i64 frozen [[REG633:[0-9a-zA-Z_%.]+]]) // CHECK: store i64 [[REG633]], i64* [[REG634:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: [[REG635:[0-9a-zA-Z_%.]+]] = load i64, i64* [[REG634]], align 8 -// CHECK-NEXT: [[REG636:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_splats(unsigned long long)(i64 [[REG635]]) +// CHECK-NEXT: [[REG636:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_splats(unsigned long long)(i64 frozen [[REG635]]) // CHECK-NEXT: [[REG637:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG636]] to <4 x i32> // CHECK-NEXT: store <4 x i32> [[REG637]], <4 x i32>* [[REG638:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG639:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG638]], align 16 -// CHECK-NEXT: [[REG640:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_unpackl(int vector[4])(<4 x i32> [[REG639]]) +// CHECK-NEXT: [[REG640:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_unpackl(int vector[4])(<4 x i32> frozen [[REG639]]) // CHECK-NEXT: store <2 x i64> [[REG640]], <2 x i64>* [[REG641:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG642:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG641]], align 16 // CHECK-NEXT: [[REG643:[0-9a-zA-Z_%.]+]] = sitofp <2 x i64> [[REG642]] to <2 x double> @@ -979,10 +979,10 @@ // CHECK-NEXT: [[REG646:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG645]], align 16 // CHECK-NEXT: ret <2 x double> [[REG646]] -// CHECK: define available_externally <2 x i64> @_mm_cvtps_epi32(<4 x float> [[REG647:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x i64> @_mm_cvtps_epi32(<4 x float> frozen [[REG647:[0-9a-zA-Z_%.]+]]) // CHECK: store <4 x float> [[REG647]], <4 x float>* [[REG648:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG649:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG648]], align 16 -// CHECK-NEXT: [[REG650:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_rint(float vector[4])(<4 x float> [[REG649]]) +// CHECK-NEXT: [[REG650:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_rint(float vector[4])(<4 x float> frozen [[REG649]]) // CHECK-NEXT: store <4 x float> [[REG650]], <4 x float>* [[REG651:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG652:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG651]], align 16 // CHECK-NEXT: [[REG653:[0-9a-zA-Z_%.]+]] = call <4 x i32> @llvm.ppc.altivec.vctsxs(<4 x float> [[REG652]], i32 0) @@ -991,17 +991,17 @@ // CHECK-NEXT: [[REG656:[0-9a-zA-Z_%.]+]] = bitcast <4 x i32> [[REG655]] to <2 x i64> // CHECK-NEXT: ret <2 x i64> [[REG656]] -// CHECK: define available_externally <2 x double> @_mm_cvtps_pd(<4 x float> [[REG657:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x double> @_mm_cvtps_pd(<4 x float> frozen [[REG657:[0-9a-zA-Z_%.]+]]) // CHECK: store <4 x float> [[REG657]], <4 x float>* [[REG658:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: %[[REG659:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG658]], align 16 // CHECK-NEXT: store <4 x float> %[[REG659:[0-9a-zA-Z_%.]+]], <4 x float>* [[REG660:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG661:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG660]], align 16 // CHECK-NEXT: [[REG662:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG660]], align 16 -// CHECK-BE-NEXT: [[REG663:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_vmrghw(float vector[4], float vector[4])(<4 x float> [[REG664:[0-9a-zA-Z_%.]+]], <4 x float> [[REG665:[0-9a-zA-Z_%.]+]]) +// CHECK-BE-NEXT: [[REG663:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_vmrghw(float vector[4], float vector[4])(<4 x float> frozen [[REG664:[0-9a-zA-Z_%.]+]], <4 x float> frozen [[REG665:[0-9a-zA-Z_%.]+]]) // CHECK-BE-NEXT: store <4 x float> [[REG663]], <4 x float>* [[REG666:[0-9a-zA-Z_%.]+]], align 16 // CHECK-BE-NEXT: [[REG667:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG666]], align 16 -// CHECK-BE-NEXT: [[REG668:[0-9a-zA-Z_%.]+]] = call <2 x double> asm " xvcvspdp ${0:x},${1:x}", "=^wa,^wa"(<4 x float> [[REG667]]) +// CHECK-BE-NEXT: [[REG668:[0-9a-zA-Z_%.]+]] = call <2 x double> asm " xvcvspdp ${0:x},${1:x}", "=^wa,^wa"(<4 x float> [[REG667]]) // CHECK-BE-NEXT: store <2 x double> [[REG668]], <2 x double>* [[REG669:[0-9a-zA-Z_%.]+]], align 16 // CHECK-BE-NEXT: [[REG670:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG669]], align 16 // CHECK-BE-NEXT: ret <2 x double> [[REG670]] @@ -1019,21 +1019,21 @@ // CHECK-LE-NEXT: [[REG680:[0-9a-zA-Z_%.]+]] = bitcast <4 x i32> [[REG679]] to <4 x float> // CHECK-LE-NEXT: store <4 x float> [[REG680]], <4 x float>* [[REG666]], align 16 // CHECK-LE-NEXT: [[REG681:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG666]], align 16 -// CHECK-LE-NEXT: [[REG682:[0-9a-zA-Z_%.]+]] = call <2 x double> asm " xvcvspdp ${0:x},${1:x}", "=^wa,^wa"(<4 x float> [[REG681]]) +// CHECK-LE-NEXT: [[REG682:[0-9a-zA-Z_%.]+]] = call <2 x double> asm " xvcvspdp ${0:x},${1:x}", "=^wa,^wa"(<4 x float> [[REG681]]) // CHECK-LE-NEXT: store <2 x double> [[REG682]], <2 x double>* [[REG669:[0-9a-zA-Z_%.]+]], align 16 // CHECK-LE-NEXT: [[REG683:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG669]], align 16 // CHECK-LE-NEXT: ret <2 x double> [[REG683]] -// CHECK: define available_externally double @_mm_cvtsd_f64(<2 x double> [[REG684:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen double @_mm_cvtsd_f64(<2 x double> frozen [[REG684:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x double> [[REG684]], <2 x double>* [[REG685:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG686:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG685]], align 16 // CHECK-NEXT: [[REG687:[0-9a-zA-Z_%.]+]] = extractelement <2 x double> [[REG686]], i32 0 // CHECK-NEXT: ret double [[REG687]] -// CHECK: define available_externally signext i32 @_mm_cvtsd_si32(<2 x double> [[REG688:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen signext i32 @_mm_cvtsd_si32(<2 x double> frozen [[REG688:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x double> [[REG688]], <2 x double>* [[REG689:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG690:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG689]], align 16 -// CHECK-NEXT: [[REG691:[0-9a-zA-Z_%.]+]] = call <2 x double> @vec_rint(double vector[2])(<2 x double> [[REG690]]) +// CHECK-NEXT: [[REG691:[0-9a-zA-Z_%.]+]] = call frozen <2 x double> @vec_rint(double vector[2])(<2 x double> frozen [[REG690]]) // CHECK-NEXT: store <2 x double> [[REG691]], <2 x double>* [[REG692:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG693:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG692]], align 16 // CHECK-NEXT: [[REG694:[0-9a-zA-Z_%.]+]] = extractelement <2 x double> [[REG693]], i32 0 @@ -1042,10 +1042,10 @@ // CHECK-NEXT: [[REG697:[0-9a-zA-Z_%.]+]] = load i32, i32* [[REG696]], align 4 // CHECK-NEXT: ret i32 [[REG697]] -// CHECK: define available_externally i64 @_mm_cvtsd_si64(<2 x double> [[REG698:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen i64 @_mm_cvtsd_si64(<2 x double> frozen [[REG698:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x double> [[REG698]], <2 x double>* [[REG699:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG700:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG699]], align 16 -// CHECK-NEXT: [[REG701:[0-9a-zA-Z_%.]+]] = call <2 x double> @vec_rint(double vector[2])(<2 x double> [[REG700]]) +// CHECK-NEXT: [[REG701:[0-9a-zA-Z_%.]+]] = call frozen <2 x double> @vec_rint(double vector[2])(<2 x double> frozen [[REG700]]) // CHECK-NEXT: store <2 x double> [[REG701]], <2 x double>* [[REG702:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG703:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG702]], align 16 // CHECK-NEXT: [[REG704:[0-9a-zA-Z_%.]+]] = extractelement <2 x double> [[REG703]], i32 0 @@ -1054,20 +1054,20 @@ // CHECK-NEXT: [[REG707:[0-9a-zA-Z_%.]+]] = load i64, i64* [[REG706]], align 8 // CHECK-NEXT: ret i64 [[REG707]] -// CHECK: define available_externally i64 @_mm_cvtsd_si64x(<2 x double> [[REG708:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen i64 @_mm_cvtsd_si64x(<2 x double> frozen [[REG708:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x double> [[REG708]], <2 x double>* [[REG709:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG710:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG709]], align 16 -// CHECK-NEXT: [[REG711:[0-9a-zA-Z_%.]+]] = call i64 @_mm_cvtsd_si64(<2 x double> [[REG710]]) +// CHECK-NEXT: [[REG711:[0-9a-zA-Z_%.]+]] = call frozen i64 @_mm_cvtsd_si64(<2 x double> frozen [[REG710]]) // CHECK-NEXT: ret i64 [[REG711]] -// CHECK: define available_externally <4 x float> @_mm_cvtsd_ss(<4 x float> [[REG712:[0-9a-zA-Z_%.]+]], <2 x double> [[REG713:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <4 x float> @_mm_cvtsd_ss(<4 x float> frozen [[REG712:[0-9a-zA-Z_%.]+]], <2 x double> frozen [[REG713:[0-9a-zA-Z_%.]+]]) // CHECK: store <4 x float> [[REG712]], <4 x float>* [[REG714:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <2 x double> [[REG713]], <2 x double>* [[REG715:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: %[[REG716:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG714]], align 16 // CHECK-NEXT: store <4 x float> %[[REG716:[0-9a-zA-Z_%.]+]], <4 x float>* [[REG717:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG718:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG715]], align 16 -// CHECK-LE-NEXT: [[REG719:[0-9a-zA-Z_%.]+]] = call <2 x double> @vec_splat(double vector[2], unsigned int)(<2 x double> [[REG718]], i32 zeroext 0) +// CHECK-LE-NEXT: [[REG719:[0-9a-zA-Z_%.]+]] = call frozen <2 x double> @vec_splat(double vector[2], unsigned int)(<2 x double> frozen [[REG718]], i32 frozen zeroext 0) // CHECK-LE-NEXT: store <2 x double> [[REG719]], <2 x double>* [[REG720:[0-9a-zA-Z_%.]+]], align 16 // CHECK-BE-NEXT: [[REG721:[0-9a-zA-Z_%.]+]] = extractelement <2 x double> [[REG718]], i32 0 @@ -1088,7 +1088,7 @@ // CHECK-LE-NEXT: [[REG729:[0-9a-zA-Z_%.]+]] = bitcast <4 x i32> [[REG728]] to <4 x float> // CHECK-LE-NEXT: store <4 x float> [[REG729]], <4 x float>* [[REG717]], align 16 // CHECK-LE-NEXT: [[REG730:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG720]], align 16 -// CHECK-LE-NEXT: [[REG731:[0-9a-zA-Z_%.]+]] = call <4 x float> asm "xscvdpsp ${0:x},${1:x}", "=^wa,^wa"(<2 x double> [[REG730]]) +// CHECK-LE-NEXT: [[REG731:[0-9a-zA-Z_%.]+]] = call <4 x float> asm "xscvdpsp ${0:x},${1:x}", "=^wa,^wa"(<2 x double> [[REG730]]) // CHECK-LE-NEXT: store <4 x float> [[REG731]], <4 x float>* [[REG732:[0-9a-zA-Z_%.]+]], align 16 // CHECK-LE-NEXT: [[REG733:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG717]], align 16 // CHECK-LE-NEXT: [[REG734:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG732]], align 16 @@ -1100,26 +1100,26 @@ // CHECK-LE-NEXT: [[REG739:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG717]], align 16 // CHECK-LE-NEXT: ret <4 x float> [[REG739]] -// CHECK: define available_externally signext i32 @_mm_cvtsi128_si32(<2 x i64> [[REG740:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen signext i32 @_mm_cvtsi128_si32(<2 x i64> frozen [[REG740:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x i64> [[REG740]], <2 x i64>* [[REG741:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG742:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG741]], align 16 // CHECK-NEXT: [[REG743:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG742]] to <4 x i32> // CHECK-NEXT: [[REG744:[0-9a-zA-Z_%.]+]] = extractelement <4 x i32> [[REG743]], i32 0 // CHECK-NEXT: ret i32 [[REG744]] -// CHECK: define available_externally i64 @_mm_cvtsi128_si64(<2 x i64> [[REG745:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen i64 @_mm_cvtsi128_si64(<2 x i64> frozen [[REG745:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x i64> [[REG745]], <2 x i64>* [[REG746:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG747:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG746]], align 16 // CHECK-NEXT: [[REG748:[0-9a-zA-Z_%.]+]] = extractelement <2 x i64> [[REG747]], i32 0 // CHECK-NEXT: ret i64 [[REG748]] -// CHECK: define available_externally i64 @_mm_cvtsi128_si64x(<2 x i64> [[REG749:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen i64 @_mm_cvtsi128_si64x(<2 x i64> frozen [[REG749:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x i64> [[REG749]], <2 x i64>* [[REG750:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG751:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG750]], align 16 // CHECK-NEXT: [[REG752:[0-9a-zA-Z_%.]+]] = extractelement <2 x i64> [[REG751]], i32 0 // CHECK-NEXT: ret i64 [[REG752]] -// CHECK: define available_externally <2 x double> @_mm_cvtsi32_sd(<2 x double> [[REG753:[0-9a-zA-Z_%.]+]], i32 signext [[REG754:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x double> @_mm_cvtsi32_sd(<2 x double> frozen [[REG753:[0-9a-zA-Z_%.]+]], i32 frozen signext [[REG754:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x double> [[REG753]], <2 x double>* [[REG755:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store i32 [[REG754]], i32* [[REG756:[0-9a-zA-Z_%.]+]], align 4 // CHECK-NEXT: [[REG757:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG755]], align 16 @@ -1134,13 +1134,13 @@ // CHECK-NEXT: [[REG765:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG758]], align 16 // CHECK-NEXT: ret <2 x double> [[REG765]] -// CHECK: define available_externally <2 x i64> @_mm_cvtsi32_si128(i32 signext [[REG766:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x i64> @_mm_cvtsi32_si128(i32 frozen signext [[REG766:[0-9a-zA-Z_%.]+]]) // CHECK: store i32 [[REG766]], i32* [[REG767:[0-9a-zA-Z_%.]+]], align 4 // CHECK-NEXT: [[REG768:[0-9a-zA-Z_%.]+]] = load i32, i32* [[REG767]], align 4 -// CHECK-NEXT: [[REG769:[0-9a-zA-Z_%.]+]] = call <2 x i64> @_mm_set_epi32(i32 signext 0, i32 signext 0, i32 signext 0, i32 signext [[REG768]]) +// CHECK-NEXT: [[REG769:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @_mm_set_epi32(i32 frozen signext 0, i32 frozen signext 0, i32 frozen signext 0, i32 frozen signext [[REG768]]) // CHECK-NEXT: ret <2 x i64> [[REG769]] -// CHECK: define available_externally <2 x double> @_mm_cvtsi64_sd(<2 x double> [[REG770:[0-9a-zA-Z_%.]+]], i64 [[REG771:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x double> @_mm_cvtsi64_sd(<2 x double> frozen [[REG770:[0-9a-zA-Z_%.]+]], i64 frozen [[REG771:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x double> [[REG770]], <2 x double>* [[REG772:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store i64 [[REG771]], i64* [[REG773:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: [[REG774:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG772]], align 16 @@ -1155,7 +1155,7 @@ // CHECK-NEXT: [[REG782:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG775]], align 16 // CHECK-NEXT: ret <2 x double> [[REG782]] -// CHECK: define available_externally <2 x i64> @_mm_cvtsi64_si128(i64 [[REG783:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x i64> @_mm_cvtsi64_si128(i64 frozen [[REG783:[0-9a-zA-Z_%.]+]]) // CHECK: store i64 [[REG783]], i64* [[REG784:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: [[REG785:[0-9a-zA-Z_%.]+]] = load i64, i64* [[REG784]], align 8 // CHECK-NEXT: [[REG786:[0-9a-zA-Z_%.]+]] = insertelement <2 x i64> undef, i64 [[REG785]], i32 0 @@ -1164,15 +1164,15 @@ // CHECK-NEXT: [[REG789:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG788]], align 16 // CHECK-NEXT: ret <2 x i64> [[REG789]] -// CHECK: define available_externally <2 x double> @_mm_cvtsi64x_sd(<2 x double> [[REG790:[0-9a-zA-Z_%.]+]], i64 [[REG791:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x double> @_mm_cvtsi64x_sd(<2 x double> frozen [[REG790:[0-9a-zA-Z_%.]+]], i64 frozen [[REG791:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x double> [[REG790]], <2 x double>* [[REG792:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store i64 [[REG791]], i64* [[REG793:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: [[REG794:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG792]], align 16 // CHECK-NEXT: [[REG795:[0-9a-zA-Z_%.]+]] = load i64, i64* [[REG793]], align 8 -// CHECK-NEXT: [[REG796:[0-9a-zA-Z_%.]+]] = call <2 x double> @_mm_cvtsi64_sd(<2 x double> [[REG794]], i64 [[REG795]]) +// CHECK-NEXT: [[REG796:[0-9a-zA-Z_%.]+]] = call frozen <2 x double> @_mm_cvtsi64_sd(<2 x double> frozen [[REG794]], i64 frozen [[REG795]]) // CHECK-NEXT: ret <2 x double> [[REG796]] -// CHECK: define available_externally <2 x i64> @_mm_cvtsi64x_si128(i64 [[REG797:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x i64> @_mm_cvtsi64x_si128(i64 frozen [[REG797:[0-9a-zA-Z_%.]+]]) // CHECK: store i64 [[REG797]], i64* [[REG798:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: [[REG799:[0-9a-zA-Z_%.]+]] = load i64, i64* [[REG798]], align 8 // CHECK-NEXT: [[REG800:[0-9a-zA-Z_%.]+]] = insertelement <2 x i64> undef, i64 [[REG799]], i32 0 @@ -1181,7 +1181,7 @@ // CHECK-NEXT: [[REG803:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG802]], align 16 // CHECK-NEXT: ret <2 x i64> [[REG803]] -// CHECK: define available_externally <2 x double> @_mm_cvtss_sd(<2 x double> [[REG804:[0-9a-zA-Z_%.]+]], <4 x float> [[REG805:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x double> @_mm_cvtss_sd(<2 x double> frozen [[REG804:[0-9a-zA-Z_%.]+]], <4 x float> frozen [[REG805:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x double> [[REG804]], <2 x double>* [[REG806:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <4 x float> [[REG805]], <4 x float>* [[REG807:[0-9a-zA-Z_%.]+]], align 16 @@ -1197,44 +1197,44 @@ // CHECK-BE-NEXT: ret <2 x double> [[REG815]] // CHECK-LE-NEXT: [[REG816:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG807]], align 16 -// CHECK-LE-NEXT: [[REG817:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_splat(float vector[4], unsigned int)(<4 x float> [[REG816:[0-9a-zA-Z_%.]+]], i32 zeroext 0) +// CHECK-LE-NEXT: [[REG817:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_splat(float vector[4], unsigned int)(<4 x float> frozen [[REG816:[0-9a-zA-Z_%.]+]], i32 frozen zeroext 0) // CHECK-LE-NEXT: store <4 x float> [[REG817]], <4 x float>* [[REG818:[0-9a-zA-Z_%.]+]], align 16 // CHECK-LE-NEXT: [[REG819:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG818]], align 16 -// CHECK-LE-NEXT: [[REG820:[0-9a-zA-Z_%.]+]] = call <2 x double> asm "xscvspdp ${0:x},${1:x}", "=^wa,^wa"(<4 x float> [[REG819]]) +// CHECK-LE-NEXT: [[REG820:[0-9a-zA-Z_%.]+]] = call <2 x double> asm "xscvspdp ${0:x},${1:x}", "=^wa,^wa"(<4 x float> [[REG819]]) // CHECK-LE-NEXT: store <2 x double> [[REG820]], <2 x double>* [[REG809:[0-9a-zA-Z_%.]+]], align 16 // CHECK-LE-NEXT: [[REG821:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG809]], align 16 // CHECK-LE-NEXT: [[REG822:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG806]], align 16 -// CHECK-LE-NEXT: [[REG823:[0-9a-zA-Z_%.]+]] = call <2 x double> @vec_mergel(double vector[2], double vector[2])(<2 x double> [[REG821]], <2 x double> [[REG822]]) +// CHECK-LE-NEXT: [[REG823:[0-9a-zA-Z_%.]+]] = call frozen <2 x double> @vec_mergel(double vector[2], double vector[2])(<2 x double> frozen [[REG821]], <2 x double> frozen [[REG822]]) // CHECK-LE-NEXT: ret <2 x double> [[REG823]] -// CHECK: define available_externally <2 x i64> @_mm_cvttpd_epi32(<2 x double> [[REG824:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x i64> @_mm_cvttpd_epi32(<2 x double> frozen [[REG824:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x double> [[REG824]], <2 x double>* [[REG825:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <4 x i32> zeroinitializer, <4 x i32>* [[REG826:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: %[[REG827:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG825]], align 16 -// CHECK-NEXT: [[REG828:[0-9a-zA-Z_%.]+]] = call <4 x i32> asm "xvcvdpsxws ${0:x},${1:x}", "=^wa,^wa"(<2 x double> %[[REG827:[0-9a-zA-Z_%.]+]]) +// CHECK-NEXT: [[REG828:[0-9a-zA-Z_%.]+]] = call <4 x i32> asm "xvcvdpsxws ${0:x},${1:x}", "=^wa,^wa"(<2 x double> %[[REG827:[0-9a-zA-Z_%.]+]]) // CHECK-NEXT: store <4 x i32> [[REG828]], <4 x i32>* [[REG829:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG830:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG829]], align 16 // CHECK-NEXT: [[REG831:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG829]], align 16 -// CHECK-NEXT: [[REG832:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_mergeo(int vector[4], int vector[4])(<4 x i32> [[REG830]], <4 x i32> [[REG831]]) +// CHECK-NEXT: [[REG832:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_mergeo(int vector[4], int vector[4])(<4 x i32> frozen [[REG830]], <4 x i32> frozen [[REG831]]) // CHECK-NEXT: store <4 x i32> [[REG832]], <4 x i32>* [[REG829]], align 16 // CHECK-NEXT: [[REG833:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG829]], align 16 // CHECK-NEXT: [[REG834:[0-9a-zA-Z_%.]+]] = bitcast <4 x i32> [[REG833]] to <2 x i64> -// CHECK-NEXT: [[REG835:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_vpkudum(long long vector[2], long long vector[2])(<2 x i64> [[REG834]], <2 x i64> zeroinitializer) +// CHECK-NEXT: [[REG835:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_vpkudum(long long vector[2], long long vector[2])(<2 x i64> frozen [[REG834]], <2 x i64> frozen zeroinitializer) // CHECK-NEXT: store <4 x i32> [[REG835]], <4 x i32>* [[REG836:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG837:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG836]], align 16 // CHECK-NEXT: [[REG838:[0-9a-zA-Z_%.]+]] = bitcast <4 x i32> [[REG837]] to <2 x i64> // CHECK-NEXT: ret <2 x i64> [[REG838]] -// CHECK: define available_externally i64 @_mm_cvttpd_pi32(<2 x double> [[REG839:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen i64 @_mm_cvttpd_pi32(<2 x double> frozen [[REG839:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x double> [[REG839]], <2 x double>* [[REG840:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG841:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG840]], align 16 -// CHECK-NEXT: [[REG842:[0-9a-zA-Z_%.]+]] = call <2 x i64> @_mm_cvttpd_epi32(<2 x double> [[REG841]]) +// CHECK-NEXT: [[REG842:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @_mm_cvttpd_epi32(<2 x double> frozen [[REG841]]) // CHECK-NEXT: store <2 x i64> [[REG842]], <2 x i64>* [[REG843:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG844:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG843]], align 16 // CHECK-NEXT: [[REG845:[0-9a-zA-Z_%.]+]] = extractelement <2 x i64> [[REG844]], i32 0 // CHECK-NEXT: ret i64 [[REG845]] -// CHECK: define available_externally <2 x i64> @_mm_cvttps_epi32(<4 x float> [[REG846:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x i64> @_mm_cvttps_epi32(<4 x float> frozen [[REG846:[0-9a-zA-Z_%.]+]]) // CHECK: store <4 x float> [[REG846]], <4 x float>* [[REG847:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG848:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG847]], align 16 // CHECK-NEXT: [[REG849:[0-9a-zA-Z_%.]+]] = call <4 x i32> @llvm.ppc.altivec.vctsxs(<4 x float> [[REG848]], i32 0) @@ -1243,7 +1243,7 @@ // CHECK-NEXT: [[REG852:[0-9a-zA-Z_%.]+]] = bitcast <4 x i32> [[REG851]] to <2 x i64> // CHECK-NEXT: ret <2 x i64> [[REG852]] -// CHECK: define available_externally signext i32 @_mm_cvttsd_si32(<2 x double> [[REG853:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen signext i32 @_mm_cvttsd_si32(<2 x double> frozen [[REG853:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x double> [[REG853]], <2 x double>* [[REG854:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG855:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG854]], align 16 // CHECK-NEXT: [[REG856:[0-9a-zA-Z_%.]+]] = extractelement <2 x double> [[REG855]], i32 0 @@ -1252,7 +1252,7 @@ // CHECK-NEXT: [[REG859:[0-9a-zA-Z_%.]+]] = load i32, i32* [[REG858]], align 4 // CHECK-NEXT: ret i32 [[REG859]] -// CHECK: define available_externally i64 @_mm_cvttsd_si64(<2 x double> [[REG860:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen i64 @_mm_cvttsd_si64(<2 x double> frozen [[REG860:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x double> [[REG860]], <2 x double>* [[REG861:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG862:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG861]], align 16 // CHECK-NEXT: [[REG863:[0-9a-zA-Z_%.]+]] = extractelement <2 x double> [[REG862]], i32 0 @@ -1261,10 +1261,10 @@ // CHECK-NEXT: [[REG866:[0-9a-zA-Z_%.]+]] = load i64, i64* [[REG865]], align 8 // CHECK-NEXT: ret i64 [[REG866]] -// CHECK: define available_externally i64 @_mm_cvttsd_si64x(<2 x double> [[REG867:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen i64 @_mm_cvttsd_si64x(<2 x double> frozen [[REG867:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x double> [[REG867]], <2 x double>* [[REG868:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG869:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG868]], align 16 -// CHECK-NEXT: [[REG870:[0-9a-zA-Z_%.]+]] = call i64 @_mm_cvttsd_si64(<2 x double> [[REG869]]) +// CHECK-NEXT: [[REG870:[0-9a-zA-Z_%.]+]] = call frozen i64 @_mm_cvttsd_si64(<2 x double> frozen [[REG869]]) // CHECK-NEXT: ret i64 [[REG870]] void __attribute__((noinline)) @@ -1275,7 +1275,7 @@ // CHECK-LABEL: @test_div -// CHECK: define available_externally <2 x double> @_mm_div_pd(<2 x double> [[REG871:[0-9a-zA-Z_%.]+]], <2 x double> [[REG872:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x double> @_mm_div_pd(<2 x double> frozen [[REG871:[0-9a-zA-Z_%.]+]], <2 x double> frozen [[REG872:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x double> [[REG871]], <2 x double>* [[REG873:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <2 x double> [[REG872]], <2 x double>* [[REG874:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG875:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG873]], align 16 @@ -1283,7 +1283,7 @@ // CHECK-NEXT: [[REG877:[0-9a-zA-Z_%.]+]] = fdiv <2 x double> [[REG875]], [[REG876]] // CHECK-NEXT: ret <2 x double> [[REG877]] -// CHECK: define available_externally <2 x double> @_mm_div_sd(<2 x double> [[REG878:[0-9a-zA-Z_%.]+]], <2 x double> [[REG879:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x double> @_mm_div_sd(<2 x double> frozen [[REG878:[0-9a-zA-Z_%.]+]], <2 x double> frozen [[REG879:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x double> [[REG878]], <2 x double>* [[REG880:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <2 x double> [[REG879]], <2 x double>* [[REG881:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG882:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG880]], align 16 @@ -1304,7 +1304,7 @@ // CHECK-LABEL: @test_extract -// CHECK: define available_externally signext i32 @_mm_extract_epi16(<2 x i64> [[REG890:[0-9a-zA-Z_%.]+]], i32 signext [[REG891:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen signext i32 @_mm_extract_epi16(<2 x i64> frozen [[REG890:[0-9a-zA-Z_%.]+]], i32 frozen signext [[REG891:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x i64> [[REG890]], <2 x i64>* [[REG892:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store i32 [[REG891]], i32* [[REG893:[0-9a-zA-Z_%.]+]], align 4 // CHECK-NEXT: [[REG894:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG892]], align 16 @@ -1322,7 +1322,7 @@ // CHECK-LABEL: @test_insert -// CHECK: define available_externally <2 x i64> @_mm_insert_epi16(<2 x i64> [[REG900:[0-9a-zA-Z_%.]+]], i32 signext [[REG901:[0-9a-zA-Z_%.]+]], i32 signext [[REG902:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x i64> @_mm_insert_epi16(<2 x i64> frozen [[REG900:[0-9a-zA-Z_%.]+]], i32 frozen signext [[REG901:[0-9a-zA-Z_%.]+]], i32 frozen signext [[REG902:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x i64> [[REG900]], <2 x i64>* [[REG903:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store i32 [[REG901]], i32* [[REG904:[0-9a-zA-Z_%.]+]], align 4 // CHECK-NEXT: store i32 [[REG902]], i32* [[REG905:[0-9a-zA-Z_%.]+]], align 4 @@ -1357,41 +1357,41 @@ // CHECK-LABEL: @test_load -// CHECK: define available_externally <2 x double> @_mm_load_pd(double* [[REG917:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x double> @_mm_load_pd(double* frozen [[REG917:[0-9a-zA-Z_%.]+]]) // CHECK: store double* [[REG917]], double** [[REG918:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: [[REG919:[0-9a-zA-Z_%.]+]] = load double*, double** [[REG918]], align 8 // CHECK-NEXT: [[REG920:[0-9a-zA-Z_%.]+]] = bitcast double* [[REG919]] to <16 x i8>* -// CHECK-NEXT: [[REG921:[0-9a-zA-Z_%.]+]] = call <16 x i8> @vec_ld(int, unsigned char vector[16] const*)(i32 signext 0, <16 x i8>* [[REG920]]) +// CHECK-NEXT: [[REG921:[0-9a-zA-Z_%.]+]] = call frozen <16 x i8> @vec_ld(int, unsigned char vector[16] const*)(i32 frozen signext 0, <16 x i8>* frozen [[REG920]]) // CHECK-NEXT: [[REG922:[0-9a-zA-Z_%.]+]] = bitcast <16 x i8> [[REG921]] to <2 x double> // CHECK-NEXT: ret <2 x double> [[REG922]] -// CHECK: define available_externally <2 x double> @_mm_load_pd1(double* [[REG923:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x double> @_mm_load_pd1(double* frozen [[REG923:[0-9a-zA-Z_%.]+]]) // CHECK: store double* [[REG923]], double** [[REG924:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: [[REG925:[0-9a-zA-Z_%.]+]] = load double*, double** [[REG924]], align 8 -// CHECK-NEXT: [[REG926:[0-9a-zA-Z_%.]+]] = call <2 x double> @_mm_load1_pd(double* [[REG925]]) +// CHECK-NEXT: [[REG926:[0-9a-zA-Z_%.]+]] = call frozen <2 x double> @_mm_load1_pd(double* frozen [[REG925]]) // CHECK-NEXT: ret <2 x double> [[REG926]] -// CHECK: define available_externally <2 x double> @_mm_load_sd(double* [[REG927:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x double> @_mm_load_sd(double* frozen [[REG927:[0-9a-zA-Z_%.]+]]) // CHECK: store double* [[REG927]], double** [[REG928:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: [[REG929:[0-9a-zA-Z_%.]+]] = load double*, double** [[REG928]], align 8 // CHECK-NEXT: [[REG930:[0-9a-zA-Z_%.]+]] = load double, double* [[REG929]], align 8 -// CHECK-NEXT: [[REG931:[0-9a-zA-Z_%.]+]] = call <2 x double> @_mm_set_sd(double [[REG930]]) +// CHECK-NEXT: [[REG931:[0-9a-zA-Z_%.]+]] = call frozen <2 x double> @_mm_set_sd(double frozen [[REG930]]) // CHECK-NEXT: ret <2 x double> [[REG931]] -// CHECK: define available_externally <2 x i64> @_mm_load_si128(<2 x i64>* [[REG932:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x i64> @_mm_load_si128(<2 x i64>* frozen [[REG932:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x i64>* [[REG932]], <2 x i64>** [[REG933:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: [[REG934:[0-9a-zA-Z_%.]+]] = load <2 x i64>*, <2 x i64>** [[REG933]], align 8 // CHECK-NEXT: [[REG935:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG934]], align 16 // CHECK-NEXT: ret <2 x i64> [[REG935]] -// CHECK: define available_externally <2 x double> @_mm_load1_pd(double* [[REG936:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x double> @_mm_load1_pd(double* frozen [[REG936:[0-9a-zA-Z_%.]+]]) // CHECK: store double* [[REG936]], double** [[REG937:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: [[REG938:[0-9a-zA-Z_%.]+]] = load double*, double** [[REG937]], align 8 // CHECK-NEXT: [[REG939:[0-9a-zA-Z_%.]+]] = load double, double* [[REG938]], align 8 -// CHECK-NEXT: [[REG940:[0-9a-zA-Z_%.]+]] = call <2 x double> @vec_splats(double)(double [[REG939]]) +// CHECK-NEXT: [[REG940:[0-9a-zA-Z_%.]+]] = call frozen <2 x double> @vec_splats(double)(double frozen [[REG939]]) // CHECK-NEXT: ret <2 x double> [[REG940]] -// CHECK: define available_externally <2 x double> @_mm_loadh_pd(<2 x double> [[REG941:[0-9a-zA-Z_%.]+]], double* [[REG942:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x double> @_mm_loadh_pd(<2 x double> frozen [[REG941:[0-9a-zA-Z_%.]+]], double* frozen [[REG942:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x double> [[REG941]], <2 x double>* [[REG943:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store double* [[REG942]], double** [[REG944:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: [[REG945:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG943]], align 16 @@ -1404,15 +1404,15 @@ // CHECK-NEXT: [[REG951:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG946]], align 16 // CHECK-NEXT: ret <2 x double> [[REG951]] -// CHECK: define available_externally <2 x i64> @_mm_loadl_epi64(<2 x i64>* [[REG952:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x i64> @_mm_loadl_epi64(<2 x i64>* frozen [[REG952:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x i64>* [[REG952]], <2 x i64>** [[REG953:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: [[REG954:[0-9a-zA-Z_%.]+]] = load <2 x i64>*, <2 x i64>** [[REG953]], align 8 // CHECK-NEXT: [[REG955:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64>* [[REG954]] to i64* // CHECK-NEXT: [[REG956:[0-9a-zA-Z_%.]+]] = load i64, i64* [[REG955]], align 8 -// CHECK-NEXT: [[REG957:[0-9a-zA-Z_%.]+]] = call <2 x i64> @_mm_set_epi64(i64 0, i64 [[REG956]]) +// CHECK-NEXT: [[REG957:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @_mm_set_epi64(i64 frozen 0, i64 frozen [[REG956]]) // CHECK-NEXT: ret <2 x i64> [[REG957]] -// CHECK: define available_externally <2 x double> @_mm_loadl_pd(<2 x double> [[REG958:[0-9a-zA-Z_%.]+]], double* [[REG959:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x double> @_mm_loadl_pd(<2 x double> frozen [[REG958:[0-9a-zA-Z_%.]+]], double* frozen [[REG959:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x double> [[REG958]], <2 x double>* [[REG960:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store double* [[REG959]], double** [[REG961:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: [[REG962:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG960]], align 16 @@ -1425,10 +1425,10 @@ // CHECK-NEXT: [[REG968:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG963]], align 16 // CHECK-NEXT: ret <2 x double> [[REG968]] -// CHECK: define available_externally <2 x double> @_mm_loadr_pd(double* [[REG969:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x double> @_mm_loadr_pd(double* frozen [[REG969:[0-9a-zA-Z_%.]+]]) // CHECK: store double* [[REG969]], double** [[REG970:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: [[REG971:[0-9a-zA-Z_%.]+]] = load double*, double** [[REG970]], align 8 -// CHECK-NEXT: [[REG972:[0-9a-zA-Z_%.]+]] = call <2 x double> @_mm_load_pd(double* [[REG971]]) +// CHECK-NEXT: [[REG972:[0-9a-zA-Z_%.]+]] = call frozen <2 x double> @_mm_load_pd(double* frozen [[REG971]]) // CHECK-NEXT: store <2 x double> [[REG972]], <2 x double>* [[REG973:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG974:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG973]], align 16 // CHECK-NEXT: [[REG975:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG973]], align 16 @@ -1438,17 +1438,17 @@ // CHECK-NEXT: [[REG979:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG978]] to <2 x double> // CHECK-NEXT: ret <2 x double> [[REG979]] -// CHECK: define available_externally <2 x double> @_mm_loadu_pd(double* [[REG980:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x double> @_mm_loadu_pd(double* frozen [[REG980:[0-9a-zA-Z_%.]+]]) // CHECK: store double* [[REG980]], double** [[REG981:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: [[REG982:[0-9a-zA-Z_%.]+]] = load double*, double** [[REG981]], align 8 -// CHECK-NEXT: [[REG983:[0-9a-zA-Z_%.]+]] = call <2 x double> @vec_vsx_ld(int, double const*)(i32 signext 0, double* [[REG982]]) +// CHECK-NEXT: [[REG983:[0-9a-zA-Z_%.]+]] = call frozen <2 x double> @vec_vsx_ld(int, double const*)(i32 frozen signext 0, double* frozen [[REG982]]) // CHECK-NEXT: ret <2 x double> [[REG983]] -// CHECK: define available_externally <2 x i64> @_mm_loadu_si128(<2 x i64>* [[REG984:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x i64> @_mm_loadu_si128(<2 x i64>* frozen [[REG984:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x i64>* [[REG984]], <2 x i64>** [[REG985:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: [[REG986:[0-9a-zA-Z_%.]+]] = load <2 x i64>*, <2 x i64>** [[REG985]], align 8 // CHECK-NEXT: [[REG987:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64>* [[REG986]] to i32* -// CHECK-NEXT: [[REG988:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_vsx_ld(int, int const*)(i32 signext 0, i32* [[REG987]]) +// CHECK-NEXT: [[REG988:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_vsx_ld(int, int const*)(i32 frozen signext 0, i32* frozen [[REG987]]) // CHECK-NEXT: [[REG989:[0-9a-zA-Z_%.]+]] = bitcast <4 x i32> [[REG988]] to <2 x i64> // CHECK-NEXT: ret <2 x i64> [[REG989]] @@ -1466,68 +1466,68 @@ // CHECK-LABEL: @test_logical -// CHECK: define available_externally <2 x double> @_mm_and_pd(<2 x double> [[REG990:[0-9a-zA-Z_%.]+]], <2 x double> [[REG991:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x double> @_mm_and_pd(<2 x double> frozen [[REG990:[0-9a-zA-Z_%.]+]], <2 x double> frozen [[REG991:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x double> [[REG990]], <2 x double>* [[REG992:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <2 x double> [[REG991]], <2 x double>* [[REG993:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG994:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG992]], align 16 // CHECK-NEXT: [[REG995:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG993]], align 16 -// CHECK-NEXT: [[REG996:[0-9a-zA-Z_%.]+]] = call <2 x double> @vec_and(double vector[2], double vector[2])(<2 x double> [[REG994]], <2 x double> [[REG995]]) +// CHECK-NEXT: [[REG996:[0-9a-zA-Z_%.]+]] = call frozen <2 x double> @vec_and(double vector[2], double vector[2])(<2 x double> frozen [[REG994]], <2 x double> frozen [[REG995]]) // CHECK-NEXT: ret <2 x double> [[REG996]] -// CHECK: define available_externally <2 x i64> @_mm_and_si128(<2 x i64> [[REG997:[0-9a-zA-Z_%.]+]], <2 x i64> [[REG998:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x i64> @_mm_and_si128(<2 x i64> frozen [[REG997:[0-9a-zA-Z_%.]+]], <2 x i64> frozen [[REG998:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x i64> [[REG997]], <2 x i64>* [[REG999:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <2 x i64> [[REG998]], <2 x i64>* [[REG1000:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG1001:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG999]], align 16 // CHECK-NEXT: [[REG1002:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG1000]], align 16 -// CHECK-NEXT: [[REG1003:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_and(long long vector[2], long long vector[2])(<2 x i64> [[REG1001]], <2 x i64> [[REG1002]]) +// CHECK-NEXT: [[REG1003:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_and(long long vector[2], long long vector[2])(<2 x i64> frozen [[REG1001]], <2 x i64> frozen [[REG1002]]) // CHECK-NEXT: ret <2 x i64> [[REG1003]] -// CHECK: define available_externally <2 x double> @_mm_andnot_pd(<2 x double> [[REG1004:[0-9a-zA-Z_%.]+]], <2 x double> [[REG1005:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x double> @_mm_andnot_pd(<2 x double> frozen [[REG1004:[0-9a-zA-Z_%.]+]], <2 x double> frozen [[REG1005:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x double> [[REG1004]], <2 x double>* [[REG1006:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <2 x double> [[REG1005]], <2 x double>* [[REG1007:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG1008:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG1007]], align 16 // CHECK-NEXT: [[REG1009:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG1006]], align 16 -// CHECK-NEXT: [[REG1010:[0-9a-zA-Z_%.]+]] = call <2 x double> @vec_andc(double vector[2], double vector[2])(<2 x double> [[REG1008]], <2 x double> [[REG1009]]) +// CHECK-NEXT: [[REG1010:[0-9a-zA-Z_%.]+]] = call frozen <2 x double> @vec_andc(double vector[2], double vector[2])(<2 x double> frozen [[REG1008]], <2 x double> frozen [[REG1009]]) // CHECK-NEXT: ret <2 x double> [[REG1010]] -// CHECK: define available_externally <2 x i64> @_mm_andnot_si128(<2 x i64> [[REG1011:[0-9a-zA-Z_%.]+]], <2 x i64> [[REG1012:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x i64> @_mm_andnot_si128(<2 x i64> frozen [[REG1011:[0-9a-zA-Z_%.]+]], <2 x i64> frozen [[REG1012:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x i64> [[REG1011]], <2 x i64>* [[REG1013:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <2 x i64> [[REG1012]], <2 x i64>* [[REG1014:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG1015:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG1014]], align 16 // CHECK-NEXT: [[REG1016:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG1013]], align 16 -// CHECK-NEXT: [[REG1017:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_andc(long long vector[2], long long vector[2])(<2 x i64> [[REG1015]], <2 x i64> [[REG1016]]) +// CHECK-NEXT: [[REG1017:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_andc(long long vector[2], long long vector[2])(<2 x i64> frozen [[REG1015]], <2 x i64> frozen [[REG1016]]) // CHECK-NEXT: ret <2 x i64> [[REG1017]] -// CHECK: define available_externally <2 x double> @_mm_xor_pd(<2 x double> [[REG1018:[0-9a-zA-Z_%.]+]], <2 x double> [[REG1019:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x double> @_mm_xor_pd(<2 x double> frozen [[REG1018:[0-9a-zA-Z_%.]+]], <2 x double> frozen [[REG1019:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x double> [[REG1018]], <2 x double>* [[REG1020:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <2 x double> [[REG1019]], <2 x double>* [[REG1021:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG1022:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG1020]], align 16 // CHECK-NEXT: [[REG1023:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG1021]], align 16 -// CHECK-NEXT: [[REG1024:[0-9a-zA-Z_%.]+]] = call <2 x double> @vec_xor(double vector[2], double vector[2])(<2 x double> [[REG1022]], <2 x double> [[REG1023]]) +// CHECK-NEXT: [[REG1024:[0-9a-zA-Z_%.]+]] = call frozen <2 x double> @vec_xor(double vector[2], double vector[2])(<2 x double> frozen [[REG1022]], <2 x double> frozen [[REG1023]]) // CHECK-NEXT: ret <2 x double> [[REG1024]] -// CHECK: define available_externally <2 x i64> @_mm_xor_si128(<2 x i64> [[REG1025:[0-9a-zA-Z_%.]+]], <2 x i64> [[REG1026:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x i64> @_mm_xor_si128(<2 x i64> frozen [[REG1025:[0-9a-zA-Z_%.]+]], <2 x i64> frozen [[REG1026:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x i64> [[REG1025]], <2 x i64>* [[REG1027:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <2 x i64> [[REG1026]], <2 x i64>* [[REG1028:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG1029:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG1027]], align 16 // CHECK-NEXT: [[REG1030:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG1028]], align 16 -// CHECK-NEXT: [[REG1031:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_xor(long long vector[2], long long vector[2])(<2 x i64> [[REG1029]], <2 x i64> [[REG1030]]) +// CHECK-NEXT: [[REG1031:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_xor(long long vector[2], long long vector[2])(<2 x i64> frozen [[REG1029]], <2 x i64> frozen [[REG1030]]) // CHECK-NEXT: ret <2 x i64> [[REG1031]] -// CHECK: define available_externally <2 x double> @_mm_or_pd(<2 x double> [[REG1032:[0-9a-zA-Z_%.]+]], <2 x double> [[REG1033:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x double> @_mm_or_pd(<2 x double> frozen [[REG1032:[0-9a-zA-Z_%.]+]], <2 x double> frozen [[REG1033:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x double> [[REG1032]], <2 x double>* [[REG1034:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <2 x double> [[REG1033]], <2 x double>* [[REG1035:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG1036:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG1034]], align 16 // CHECK-NEXT: [[REG1037:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG1035]], align 16 -// CHECK-NEXT: [[REG1038:[0-9a-zA-Z_%.]+]] = call <2 x double> @vec_or(double vector[2], double vector[2])(<2 x double> [[REG1036]], <2 x double> [[REG1037]]) +// CHECK-NEXT: [[REG1038:[0-9a-zA-Z_%.]+]] = call frozen <2 x double> @vec_or(double vector[2], double vector[2])(<2 x double> frozen [[REG1036]], <2 x double> frozen [[REG1037]]) // CHECK-NEXT: ret <2 x double> [[REG1038]] -// CHECK: define available_externally <2 x i64> @_mm_or_si128(<2 x i64> [[REG1039:[0-9a-zA-Z_%.]+]], <2 x i64> [[REG1040:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x i64> @_mm_or_si128(<2 x i64> frozen [[REG1039:[0-9a-zA-Z_%.]+]], <2 x i64> frozen [[REG1040:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x i64> [[REG1039]], <2 x i64>* [[REG1041:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <2 x i64> [[REG1040]], <2 x i64>* [[REG1042:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG1043:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG1041]], align 16 // CHECK-NEXT: [[REG1044:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG1042]], align 16 -// CHECK-NEXT: [[REG1045:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_or(long long vector[2], long long vector[2])(<2 x i64> [[REG1043]], <2 x i64> [[REG1044]]) +// CHECK-NEXT: [[REG1045:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_or(long long vector[2], long long vector[2])(<2 x i64> frozen [[REG1043]], <2 x i64> frozen [[REG1044]]) // CHECK-NEXT: ret <2 x i64> [[REG1045]] void __attribute__((noinline)) @@ -1540,40 +1540,40 @@ // CHECK-LABEL: @test_max -// CHECK: define available_externally <2 x i64> @_mm_max_epi16 -// CHECK: [[REG1046:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_max(short vector[8], short vector[8]) +// CHECK: define available_externally frozen <2 x i64> @_mm_max_epi16 +// CHECK: [[REG1046:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_max(short vector[8], short vector[8]) // CHECK-NEXT: [[REG1047:[0-9a-zA-Z_%.]+]] = bitcast <8 x i16> [[REG1046]] to <2 x i64> // CHECK-NEXT: ret <2 x i64> [[REG1047]] -// CHECK: define available_externally <2 x i64> @_mm_max_epu8 -// CHECK: [[REG1048:[0-9a-zA-Z_%.]+]] = call <16 x i8> @vec_max(unsigned char vector[16], unsigned char vector[16]) +// CHECK: define available_externally frozen <2 x i64> @_mm_max_epu8 +// CHECK: [[REG1048:[0-9a-zA-Z_%.]+]] = call frozen <16 x i8> @vec_max(unsigned char vector[16], unsigned char vector[16]) // CHECK-NEXT: [[REG1049:[0-9a-zA-Z_%.]+]] = bitcast <16 x i8> [[REG1048]] to <2 x i64> // CHECK-NEXT: ret <2 x i64> [[REG1049]] -// CHECK: define available_externally <2 x double> @_mm_max_pd -// CHECK: [[REG1050:[0-9a-zA-Z_%.]+]] = call <2 x double> @vec_max(double vector[2], double vector[2]) +// CHECK: define available_externally frozen <2 x double> @_mm_max_pd +// CHECK: [[REG1050:[0-9a-zA-Z_%.]+]] = call frozen <2 x double> @vec_max(double vector[2], double vector[2]) // CHECK-NEXT: ret <2 x double> [[REG1050]] -// CHECK: define available_externally <2 x double> @_mm_max_sd(<2 x double> [[REG1051:[0-9a-zA-Z_%.]+]], <2 x double> [[REG1052:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x double> @_mm_max_sd(<2 x double> frozen [[REG1051:[0-9a-zA-Z_%.]+]], <2 x double> frozen [[REG1052:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x double> [[REG1051]], <2 x double>* [[REG1053:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <2 x double> [[REG1052]], <2 x double>* [[REG1054:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG1055:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG1053]], align 16 // CHECK-NEXT: [[REG1056:[0-9a-zA-Z_%.]+]] = extractelement <2 x double> [[REG1055]], i32 0 -// CHECK-NEXT: [[REG1057:[0-9a-zA-Z_%.]+]] = call <2 x double> @vec_splats(double)(double [[REG1056]]) +// CHECK-NEXT: [[REG1057:[0-9a-zA-Z_%.]+]] = call frozen <2 x double> @vec_splats(double)(double frozen [[REG1056]]) // CHECK-NEXT: store <2 x double> [[REG1057]], <2 x double>* [[REG1058:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG1059:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG1054]], align 16 // CHECK-NEXT: [[REG1060:[0-9a-zA-Z_%.]+]] = extractelement <2 x double> [[REG1059]], i32 0 -// CHECK-NEXT: [[REG1061:[0-9a-zA-Z_%.]+]] = call <2 x double> @vec_splats(double)(double [[REG1060]]) +// CHECK-NEXT: [[REG1061:[0-9a-zA-Z_%.]+]] = call frozen <2 x double> @vec_splats(double)(double frozen [[REG1060]]) // CHECK-NEXT: store <2 x double> [[REG1061]], <2 x double>* [[REG1062:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG1063:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG1058]], align 16 // CHECK-NEXT: [[REG1064:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG1062]], align 16 -// CHECK-NEXT: [[REG1065:[0-9a-zA-Z_%.]+]] = call <2 x double> @vec_max(double vector[2], double vector[2])(<2 x double> [[REG1063]], <2 x double> [[REG1064]]) +// CHECK-NEXT: [[REG1065:[0-9a-zA-Z_%.]+]] = call frozen <2 x double> @vec_max(double vector[2], double vector[2])(<2 x double> frozen [[REG1063]], <2 x double> frozen [[REG1064]]) // CHECK-NEXT: store <2 x double> [[REG1065]], <2 x double>* [[REG1066:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG1067:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG1066]], align 16 // CHECK-NEXT: [[REG1068:[0-9a-zA-Z_%.]+]] = extractelement <2 x double> [[REG1067]], i32 0 // CHECK-NEXT: [[REG1069:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG1053]], align 16 // CHECK-NEXT: [[REG1070:[0-9a-zA-Z_%.]+]] = extractelement <2 x double> [[REG1069]], i32 1 -// CHECK-NEXT: [[REG1071:[0-9a-zA-Z_%.]+]] = call <2 x double> @_mm_setr_pd(double [[REG1068]], double [[REG1070]]) +// CHECK-NEXT: [[REG1071:[0-9a-zA-Z_%.]+]] = call frozen <2 x double> @_mm_setr_pd(double frozen [[REG1068]], double frozen [[REG1070]]) // CHECK-NEXT: ret <2 x double> [[REG1071]] void __attribute__((noinline)) @@ -1586,40 +1586,40 @@ // CHECK-LABEL: @test_min -// CHECK: define available_externally <2 x i64> @_mm_min_epi16 -// CHECK: [[REG1072:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_min(short vector[8], short vector[8]) +// CHECK: define available_externally frozen <2 x i64> @_mm_min_epi16 +// CHECK: [[REG1072:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_min(short vector[8], short vector[8]) // CHECK-NEXT: [[REG1073:[0-9a-zA-Z_%.]+]] = bitcast <8 x i16> [[REG1072]] to <2 x i64> // CHECK-NEXT: ret <2 x i64> [[REG1073]] -// CHECK: define available_externally <2 x i64> @_mm_min_epu8 -// CHECK: [[REG1074:[0-9a-zA-Z_%.]+]] = call <16 x i8> @vec_min(unsigned char vector[16], unsigned char vector[16]) +// CHECK: define available_externally frozen <2 x i64> @_mm_min_epu8 +// CHECK: [[REG1074:[0-9a-zA-Z_%.]+]] = call frozen <16 x i8> @vec_min(unsigned char vector[16], unsigned char vector[16]) // CHECK-NEXT: [[REG1075:[0-9a-zA-Z_%.]+]] = bitcast <16 x i8> [[REG1074]] to <2 x i64> // CHECK-NEXT: ret <2 x i64> [[REG1075]] -// CHECK: define available_externally <2 x double> @_mm_min_pd -// CHECK: [[REG1076:[0-9a-zA-Z_%.]+]] = call <2 x double> @vec_min(double vector[2], double vector[2]) +// CHECK: define available_externally frozen <2 x double> @_mm_min_pd +// CHECK: [[REG1076:[0-9a-zA-Z_%.]+]] = call frozen <2 x double> @vec_min(double vector[2], double vector[2]) // CHECK-NEXT: ret <2 x double> [[REG1076]] -// CHECK: define available_externally <2 x double> @_mm_min_sd(<2 x double> [[REG1077:[0-9a-zA-Z_%.]+]], <2 x double> [[REG1078:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x double> @_mm_min_sd(<2 x double> frozen [[REG1077:[0-9a-zA-Z_%.]+]], <2 x double> frozen [[REG1078:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x double> [[REG1077]], <2 x double>* [[REG1079:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <2 x double> [[REG1078]], <2 x double>* [[REG1080:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG1081:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG1079]], align 16 // CHECK-NEXT: [[REG1082:[0-9a-zA-Z_%.]+]] = extractelement <2 x double> [[REG1081]], i32 0 -// CHECK-NEXT: [[REG1083:[0-9a-zA-Z_%.]+]] = call <2 x double> @vec_splats(double)(double [[REG1082]]) +// CHECK-NEXT: [[REG1083:[0-9a-zA-Z_%.]+]] = call frozen <2 x double> @vec_splats(double)(double frozen [[REG1082]]) // CHECK-NEXT: store <2 x double> [[REG1083]], <2 x double>* [[REG1084:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG1085:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG1080]], align 16 // CHECK-NEXT: [[REG1086:[0-9a-zA-Z_%.]+]] = extractelement <2 x double> [[REG1085]], i32 0 -// CHECK-NEXT: [[REG1087:[0-9a-zA-Z_%.]+]] = call <2 x double> @vec_splats(double)(double [[REG1086]]) +// CHECK-NEXT: [[REG1087:[0-9a-zA-Z_%.]+]] = call frozen <2 x double> @vec_splats(double)(double frozen [[REG1086]]) // CHECK-NEXT: store <2 x double> [[REG1087]], <2 x double>* [[REG1088:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG1089:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG1084]], align 16 // CHECK-NEXT: [[REG1090:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG1088]], align 16 -// CHECK-NEXT: [[REG1091:[0-9a-zA-Z_%.]+]] = call <2 x double> @vec_min(double vector[2], double vector[2])(<2 x double> [[REG1089]], <2 x double> [[REG1090]]) +// CHECK-NEXT: [[REG1091:[0-9a-zA-Z_%.]+]] = call frozen <2 x double> @vec_min(double vector[2], double vector[2])(<2 x double> frozen [[REG1089]], <2 x double> frozen [[REG1090]]) // CHECK-NEXT: store <2 x double> [[REG1091]], <2 x double>* [[REG1092:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG1093:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG1092]], align 16 // CHECK-NEXT: [[REG1094:[0-9a-zA-Z_%.]+]] = extractelement <2 x double> [[REG1093]], i32 0 // CHECK-NEXT: [[REG1095:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG1079]], align 16 // CHECK-NEXT: [[REG1096:[0-9a-zA-Z_%.]+]] = extractelement <2 x double> [[REG1095]], i32 1 -// CHECK-NEXT: [[REG1097:[0-9a-zA-Z_%.]+]] = call <2 x double> @_mm_setr_pd(double [[REG1094]], double [[REG1096]]) +// CHECK-NEXT: [[REG1097:[0-9a-zA-Z_%.]+]] = call frozen <2 x double> @_mm_setr_pd(double frozen [[REG1094]], double frozen [[REG1096]]) // CHECK-NEXT: ret <2 x double> [[REG1097]] void __attribute__((noinline)) @@ -1635,14 +1635,14 @@ // CHECK-LABEL: @test_move -// CHECK: define available_externally <2 x i64> @_mm_move_epi64(<2 x i64> [[REG1098:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x i64> @_mm_move_epi64(<2 x i64> frozen [[REG1098:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x i64> [[REG1098]], <2 x i64>* [[REG1099:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG1100:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG1099]], align 16 // CHECK-NEXT: [[REG1101:[0-9a-zA-Z_%.]+]] = extractelement <2 x i64> [[REG1100]], i32 0 -// CHECK-NEXT: [[REG1102:[0-9a-zA-Z_%.]+]] = call <2 x i64> @_mm_set_epi64(i64 0, i64 [[REG1101]]) +// CHECK-NEXT: [[REG1102:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @_mm_set_epi64(i64 frozen 0, i64 frozen [[REG1101]]) // CHECK-NEXT: ret <2 x i64> [[REG1102]] -// CHECK: define available_externally <2 x double> @_mm_move_sd(<2 x double> [[REG1103:[0-9a-zA-Z_%.]+]], <2 x double> [[REG1104:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x double> @_mm_move_sd(<2 x double> frozen [[REG1103:[0-9a-zA-Z_%.]+]], <2 x double> frozen [[REG1104:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x double> [[REG1103]], <2 x double>* [[REG1105:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <2 x double> [[REG1104]], <2 x double>* [[REG1106:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG1107:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG1105]], align 16 @@ -1655,11 +1655,11 @@ // CHECK-NEXT: [[REG1113:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG1108]], align 16 // CHECK-NEXT: ret <2 x double> [[REG1113]] -// CHECK: define available_externally signext i32 @_mm_movemask_epi8(<2 x i64> [[REG1114:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen signext i32 @_mm_movemask_epi8(<2 x i64> frozen [[REG1114:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x i64> [[REG1114]], <2 x i64>* [[REG1115:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG1116:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG1115]], align 16 // CHECK-NEXT: [[REG1117:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG1116]] to <16 x i8> -// CHECK-NEXT: [[REG1118:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_vbpermq(unsigned char vector[16], unsigned char vector[16])(<16 x i8> [[REG1117]], <16 x i8> ) +// CHECK-NEXT: [[REG1118:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_vbpermq(unsigned char vector[16], unsigned char vector[16])(<16 x i8> frozen [[REG1117]], <16 x i8> frozen ) // CHECK-NEXT: store <2 x i64> [[REG1118]], <2 x i64>* [[REG1119:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG1120:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG1119]], align 16 // CHECK-LE-NEXT: [[REG1121:[0-9a-zA-Z_%.]+]] = extractelement <2 x i64> [[REG1120]], i32 1 @@ -1667,12 +1667,12 @@ // CHECK-NEXT: [[REG1122:[0-9a-zA-Z_%.]+]] = trunc i64 [[REG1121]] to i32 // CHECK-NEXT: ret i32 [[REG1122]] -// CHECK: define available_externally signext i32 @_mm_movemask_pd(<2 x double> [[REG1123:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen signext i32 @_mm_movemask_pd(<2 x double> frozen [[REG1123:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x double> [[REG1123]], <2 x double>* [[REG1124:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG1125:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG1124]], align 16 // CHECK-NEXT: [[REG1126:[0-9a-zA-Z_%.]+]] = bitcast <2 x double> [[REG1125]] to <16 x i8> -// CHECK-LE-NEXT: [[REG1127:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_vbpermq(unsigned char vector[16], unsigned char vector[16])(<16 x i8> [[REG1126]], <16 x i8> bitcast (<4 x i32> to <16 x i8>)) -// CHECK-BE-NEXT: [[REG1127:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_vbpermq(unsigned char vector[16], unsigned char vector[16])(<16 x i8> [[REG1126]], <16 x i8> bitcast (<4 x i32> to <16 x i8>)) +// CHECK-LE-NEXT: [[REG1127:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_vbpermq(unsigned char vector[16], unsigned char vector[16])(<16 x i8> frozen [[REG1126]], <16 x i8> frozen bitcast (<4 x i32> to <16 x i8>)) +// CHECK-BE-NEXT: [[REG1127:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_vbpermq(unsigned char vector[16], unsigned char vector[16])(<16 x i8> frozen [[REG1126]], <16 x i8> frozen bitcast (<4 x i32> to <16 x i8>)) // CHECK-NEXT: store <2 x i64> [[REG1127]], <2 x i64>* [[REG1128:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG1129:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG1128]], align 16 // CHECK-LE-NEXT: [[REG1130:[0-9a-zA-Z_%.]+]] = extractelement <2 x i64> [[REG1129]], i32 1 @@ -1680,19 +1680,19 @@ // CHECK-NEXT: [[REG1131:[0-9a-zA-Z_%.]+]] = trunc i64 [[REG1130]] to i32 // CHECK-NEXT: ret i32 [[REG1131]] -// CHECK: define available_externally i64 @_mm_movepi64_pi64(<2 x i64> [[REG1132:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen i64 @_mm_movepi64_pi64(<2 x i64> frozen [[REG1132:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x i64> [[REG1132]], <2 x i64>* [[REG1133:[0-9a-zA-Z_%.]+]], align 1 // CHECK-NEXT: [[REG1134:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG1133]], align 1 // CHECK-NEXT: [[REG1135:[0-9a-zA-Z_%.]+]] = extractelement <2 x i64> [[REG1134]], i32 0 // CHECK-NEXT: ret i64 [[REG1135]] -// CHECK: define available_externally <2 x i64> @_mm_movpi64_epi64(i64 [[REG1136:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x i64> @_mm_movpi64_epi64(i64 frozen [[REG1136:[0-9a-zA-Z_%.]+]]) // CHECK: store i64 [[REG1136]], i64* [[REG1137:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: [[REG1138:[0-9a-zA-Z_%.]+]] = load i64, i64* [[REG1137]], align 8 -// CHECK-NEXT: [[REG1139:[0-9a-zA-Z_%.]+]] = call <2 x i64> @_mm_set_epi64(i64 0, i64 [[REG1138]]) +// CHECK-NEXT: [[REG1139:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @_mm_set_epi64(i64 frozen 0, i64 frozen [[REG1138]]) // CHECK-NEXT: ret <2 x i64> [[REG1139]] -// CHECK: define available_externally void @_mm_maskmoveu_si128(<2 x i64> [[REG1140:[0-9a-zA-Z_%.]+]], <2 x i64> [[REG1141:[0-9a-zA-Z_%.]+]], i8* [[REG1142:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally void @_mm_maskmoveu_si128(<2 x i64> frozen [[REG1140:[0-9a-zA-Z_%.]+]], <2 x i64> frozen [[REG1141:[0-9a-zA-Z_%.]+]], i8* frozen [[REG1142:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x i64> [[REG1140]], <2 x i64>* [[REG1143:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <2 x i64> [[REG1141]], <2 x i64>* [[REG1144:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store i8* [[REG1142]], i8** [[REG1145:[0-9a-zA-Z_%.]+]], align 8 @@ -1701,25 +1701,25 @@ // CHECK-NEXT: [[REG1148:[0-9a-zA-Z_%.]+]] = bitcast i8* [[REG1147]] to <2 x i64>* // CHECK-NEXT: store <2 x i64>* [[REG1148]], <2 x i64>** [[REG1149:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: [[REG1150:[0-9a-zA-Z_%.]+]] = load <2 x i64>*, <2 x i64>** [[REG1149]], align 8 -// CHECK-NEXT: [[REG1151:[0-9a-zA-Z_%.]+]] = call <2 x i64> @_mm_loadu_si128(<2 x i64>* [[REG1150]]) +// CHECK-NEXT: [[REG1151:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @_mm_loadu_si128(<2 x i64>* frozen [[REG1150]]) // CHECK-NEXT: [[REG1152:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG1151]] to <16 x i8> // CHECK-NEXT: store <16 x i8> [[REG1152]], <16 x i8>* [[REG1153:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG1154:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG1144]], align 16 // CHECK-NEXT: [[REG1155:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG1154]] to <16 x i8> // CHECK-NEXT: [[REG1156:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG1146]], align 16 // CHECK-NEXT: [[REG1157:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG1156]] to <16 x i8> -// CHECK-NEXT: [[REG1158:[0-9a-zA-Z_%.]+]] = call <16 x i8> @vec_cmpgt(unsigned char vector[16], unsigned char vector[16])(<16 x i8> [[REG1155]], <16 x i8> [[REG1157]]) +// CHECK-NEXT: [[REG1158:[0-9a-zA-Z_%.]+]] = call frozen <16 x i8> @vec_cmpgt(unsigned char vector[16], unsigned char vector[16])(<16 x i8> frozen [[REG1155]], <16 x i8> frozen [[REG1157]]) // CHECK-NEXT: store <16 x i8> [[REG1158]], <16 x i8>* [[REG1159:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG1160:[0-9a-zA-Z_%.]+]] = load <16 x i8>, <16 x i8>* [[REG1153]], align 16 // CHECK-NEXT: [[REG1161:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG1143]], align 16 // CHECK-NEXT: [[REG1162:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG1161]] to <16 x i8> // CHECK-NEXT: [[REG1163:[0-9a-zA-Z_%.]+]] = load <16 x i8>, <16 x i8>* [[REG1159]], align 16 -// CHECK-NEXT: [[REG1164:[0-9a-zA-Z_%.]+]] = call <16 x i8> @vec_sel(unsigned char vector[16], unsigned char vector[16], unsigned char vector[16])(<16 x i8> [[REG1160]], <16 x i8> [[REG1162]], <16 x i8> [[REG1163]]) +// CHECK-NEXT: [[REG1164:[0-9a-zA-Z_%.]+]] = call frozen <16 x i8> @vec_sel(unsigned char vector[16], unsigned char vector[16], unsigned char vector[16])(<16 x i8> frozen [[REG1160]], <16 x i8> frozen [[REG1162]], <16 x i8> frozen [[REG1163]]) // CHECK-NEXT: store <16 x i8> [[REG1164]], <16 x i8>* [[REG1153]], align 16 // CHECK-NEXT: [[REG1165:[0-9a-zA-Z_%.]+]] = load <2 x i64>*, <2 x i64>** [[REG1149]], align 8 // CHECK-NEXT: [[REG1166:[0-9a-zA-Z_%.]+]] = load <16 x i8>, <16 x i8>* [[REG1153]], align 16 // CHECK-NEXT: [[REG1167:[0-9a-zA-Z_%.]+]] = bitcast <16 x i8> [[REG1166]] to <2 x i64> -// CHECK-NEXT: call void @_mm_storeu_si128(<2 x i64>* [[REG1165]], <2 x i64> [[REG1167]]) +// CHECK-NEXT: call void @_mm_storeu_si128(<2 x i64>* frozen [[REG1165]], <2 x i64> frozen [[REG1167]]) // CHECK-NEXT: ret void void __attribute__((noinline)) @@ -1735,18 +1735,18 @@ // CHECK-LABEL: @test_mul -// CHECK: define available_externally <2 x i64> @_mm_mul_epu32(<2 x i64> [[REG1168:[0-9a-zA-Z_%.]+]], <2 x i64> [[REG1169:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x i64> @_mm_mul_epu32(<2 x i64> frozen [[REG1168:[0-9a-zA-Z_%.]+]], <2 x i64> frozen [[REG1169:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x i64> [[REG1168]], <2 x i64>* [[REG1170:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <2 x i64> [[REG1169]], <2 x i64>* [[REG1171:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG1172:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG1170]], align 16 // CHECK-NEXT: [[REG1173:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG1171]], align 16 -// CHECK-LE-NEXT: [[REG1174:[0-9a-zA-Z_%.]+]] = call <2 x i64> asm "vmulouw $0,$1,$2", "=v,v,v"(<2 x i64> [[REG1172]], <2 x i64> [[REG1173]]) -// CHECK-BE-NEXT: [[REG1174:[0-9a-zA-Z_%.]+]] = call <2 x i64> asm "vmuleuw $0,$1,$2", "=v,v,v"(<2 x i64> [[REG1172]], <2 x i64> [[REG1173]]) +// CHECK-LE-NEXT: [[REG1174:[0-9a-zA-Z_%.]+]] = call <2 x i64> asm "vmulouw $0,$1,$2", "=v,v,v"(<2 x i64> [[REG1172]], <2 x i64> [[REG1173]]) +// CHECK-BE-NEXT: [[REG1174:[0-9a-zA-Z_%.]+]] = call <2 x i64> asm "vmuleuw $0,$1,$2", "=v,v,v"(<2 x i64> [[REG1172]], <2 x i64> [[REG1173]]) // CHECK-NEXT: store <2 x i64> [[REG1174]], <2 x i64>* [[REG1175:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG1176:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG1175]], align 16 // CHECK-NEXT: ret <2 x i64> [[REG1176]] -// CHECK: define available_externally <2 x double> @_mm_mul_pd(<2 x double> [[REG1177:[0-9a-zA-Z_%.]+]], <2 x double> [[REG1178:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x double> @_mm_mul_pd(<2 x double> frozen [[REG1177:[0-9a-zA-Z_%.]+]], <2 x double> frozen [[REG1178:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x double> [[REG1177]], <2 x double>* [[REG1179:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <2 x double> [[REG1178]], <2 x double>* [[REG1180:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG1181:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG1179]], align 16 @@ -1754,7 +1754,7 @@ // CHECK-NEXT: [[REG1183:[0-9a-zA-Z_%.]+]] = fmul <2 x double> [[REG1181]], [[REG1182]] // CHECK-NEXT: ret <2 x double> [[REG1183]] -// CHECK: define available_externally <2 x double> @_mm_mul_sd(<2 x double> [[REG1184:[0-9a-zA-Z_%.]+]], <2 x double> [[REG1185:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x double> @_mm_mul_sd(<2 x double> frozen [[REG1184:[0-9a-zA-Z_%.]+]], <2 x double> frozen [[REG1185:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x double> [[REG1184]], <2 x double>* [[REG1186:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <2 x double> [[REG1185]], <2 x double>* [[REG1187:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG1188:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG1186]], align 16 @@ -1768,7 +1768,7 @@ // CHECK-NEXT: [[REG1195:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG1186]], align 16 // CHECK-NEXT: ret <2 x double> [[REG1195]] -// CHECK: define available_externally i64 @_mm_mul_su32(i64 [[REG1196:[0-9a-zA-Z_%.]+]], i64 [[REG1197:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen i64 @_mm_mul_su32(i64 frozen [[REG1196:[0-9a-zA-Z_%.]+]], i64 frozen [[REG1197:[0-9a-zA-Z_%.]+]]) // CHECK: store i64 [[REG1196]], i64* [[REG1198:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: store i64 [[REG1197]], i64* [[REG1199:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: [[REG1200:[0-9a-zA-Z_%.]+]] = load i64, i64* [[REG1198]], align 8 @@ -1784,7 +1784,7 @@ // CHECK-NEXT: [[REG1210:[0-9a-zA-Z_%.]+]] = mul i64 [[REG1207]], [[REG1209]] // CHECK-NEXT: ret i64 [[REG1210]] -// CHECK: define available_externally <2 x i64> @_mm_mulhi_epi16(<2 x i64> [[REG1211:[0-9a-zA-Z_%.]+]], <2 x i64> [[REG1212:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x i64> @_mm_mulhi_epi16(<2 x i64> frozen [[REG1211:[0-9a-zA-Z_%.]+]], <2 x i64> frozen [[REG1212:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x i64> [[REG1211]], <2 x i64>* [[REG1213:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <2 x i64> [[REG1212]], <2 x i64>* [[REG1214:[0-9a-zA-Z_%.]+]], align 16 // CHECK-LE-NEXT: store <16 x i8> , <16 x i8>* [[REG1215:[0-9a-zA-Z_%.]+]], align 16 @@ -1793,22 +1793,22 @@ // CHECK-NEXT: [[REG1217:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG1216]] to <8 x i16> // CHECK-NEXT: [[REG1218:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG1214]], align 16 // CHECK-NEXT: [[REG1219:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG1218]] to <8 x i16> -// CHECK-NEXT: [[REG1220:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_vmulesh(<8 x i16> [[REG1217]], <8 x i16> [[REG1219]]) +// CHECK-NEXT: [[REG1220:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_vmulesh(<8 x i16> frozen [[REG1217]], <8 x i16> frozen [[REG1219]]) // CHECK-NEXT: store <4 x i32> [[REG1220]], <4 x i32>* [[REG1221:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG1222:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG1213]], align 16 // CHECK-NEXT: [[REG1223:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG1222]] to <8 x i16> // CHECK-NEXT: [[REG1224:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG1214]], align 16 // CHECK-NEXT: [[REG1225:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG1224]] to <8 x i16> -// CHECK-NEXT: [[REG1226:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_vmulosh(<8 x i16> [[REG1223]], <8 x i16> [[REG1225]]) +// CHECK-NEXT: [[REG1226:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_vmulosh(<8 x i16> frozen [[REG1223]], <8 x i16> frozen [[REG1225]]) // CHECK-NEXT: store <4 x i32> [[REG1226]], <4 x i32>* [[REG1227:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG1228:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG1221]], align 16 // CHECK-NEXT: [[REG1229:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG1227]], align 16 // CHECK-NEXT: [[REG1230:[0-9a-zA-Z_%.]+]] = load <16 x i8>, <16 x i8>* [[REG1215]], align 16 -// CHECK-NEXT: [[REG1231:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_perm(int vector[4], int vector[4], unsigned char vector[16])(<4 x i32> [[REG1228]], <4 x i32> [[REG1229]], <16 x i8> [[REG1230]]) +// CHECK-NEXT: [[REG1231:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_perm(int vector[4], int vector[4], unsigned char vector[16])(<4 x i32> frozen [[REG1228]], <4 x i32> frozen [[REG1229]], <16 x i8> frozen [[REG1230]]) // CHECK-NEXT: [[REG1232:[0-9a-zA-Z_%.]+]] = bitcast <4 x i32> [[REG1231]] to <2 x i64> // CHECK-NEXT: ret <2 x i64> [[REG1232]] -// CHECK: define available_externally <2 x i64> @_mm_mulhi_epu16(<2 x i64> [[REG1233:[0-9a-zA-Z_%.]+]], <2 x i64> [[REG1234:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x i64> @_mm_mulhi_epu16(<2 x i64> frozen [[REG1233:[0-9a-zA-Z_%.]+]], <2 x i64> frozen [[REG1234:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x i64> [[REG1233]], <2 x i64>* [[REG1235:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <2 x i64> [[REG1234]], <2 x i64>* [[REG1236:[0-9a-zA-Z_%.]+]], align 16 // CHECK-LE-NEXT: store <16 x i8> , <16 x i8>* [[REG1237:[0-9a-zA-Z_%.]+]], align 16 @@ -1817,22 +1817,22 @@ // CHECK-NEXT: [[REG1239:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG1238]] to <8 x i16> // CHECK-NEXT: [[REG1240:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG1236]], align 16 // CHECK-NEXT: [[REG1241:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG1240]] to <8 x i16> -// CHECK-NEXT: [[REG1242:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_vmuleuh(<8 x i16> [[REG1239]], <8 x i16> [[REG1241]]) +// CHECK-NEXT: [[REG1242:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_vmuleuh(<8 x i16> frozen [[REG1239]], <8 x i16> frozen [[REG1241]]) // CHECK-NEXT: store <4 x i32> [[REG1242]], <4 x i32>* [[REG1243:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG1244:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG1235]], align 16 // CHECK-NEXT: [[REG1245:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG1244]] to <8 x i16> // CHECK-NEXT: [[REG1246:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG1236]], align 16 // CHECK-NEXT: [[REG1247:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG1246]] to <8 x i16> -// CHECK-NEXT: [[REG1248:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_vmulouh(<8 x i16> [[REG1245]], <8 x i16> [[REG1247]]) +// CHECK-NEXT: [[REG1248:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_vmulouh(<8 x i16> frozen [[REG1245]], <8 x i16> frozen [[REG1247]]) // CHECK-NEXT: store <4 x i32> [[REG1248]], <4 x i32>* [[REG1249:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG1250:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG1243]], align 16 // CHECK-NEXT: [[REG1251:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG1249]], align 16 // CHECK-NEXT: [[REG1252:[0-9a-zA-Z_%.]+]] = load <16 x i8>, <16 x i8>* [[REG1237]], align 16 -// CHECK-NEXT: [[REG1253:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_perm(unsigned int vector[4], unsigned int vector[4], unsigned char vector[16])(<4 x i32> [[REG1250]], <4 x i32> [[REG1251]], <16 x i8> [[REG1252]]) +// CHECK-NEXT: [[REG1253:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_perm(unsigned int vector[4], unsigned int vector[4], unsigned char vector[16])(<4 x i32> frozen [[REG1250]], <4 x i32> frozen [[REG1251]], <16 x i8> frozen [[REG1252]]) // CHECK-NEXT: [[REG1254:[0-9a-zA-Z_%.]+]] = bitcast <4 x i32> [[REG1253]] to <2 x i64> // CHECK-NEXT: ret <2 x i64> [[REG1254]] -// CHECK: define available_externally <2 x i64> @_mm_mullo_epi16(<2 x i64> [[REG1255:[0-9a-zA-Z_%.]+]], <2 x i64> [[REG1256:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x i64> @_mm_mullo_epi16(<2 x i64> frozen [[REG1255:[0-9a-zA-Z_%.]+]], <2 x i64> frozen [[REG1256:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x i64> [[REG1255]], <2 x i64>* [[REG1257:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <2 x i64> [[REG1256]], <2 x i64>* [[REG1258:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG1259:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG1257]], align 16 @@ -1852,18 +1852,18 @@ // CHECK-LABEL: @test_pack -// CHECK: define available_externally <2 x i64> @_mm_packs_epi16 -// CHECK: [[REG1265:[0-9a-zA-Z_%.]+]] = call <16 x i8> @vec_packs(short vector[8], short vector[8]) +// CHECK: define available_externally frozen <2 x i64> @_mm_packs_epi16 +// CHECK: [[REG1265:[0-9a-zA-Z_%.]+]] = call frozen <16 x i8> @vec_packs(short vector[8], short vector[8]) // CHECK-NEXT: [[REG1266:[0-9a-zA-Z_%.]+]] = bitcast <16 x i8> [[REG1265]] to <2 x i64> // CHECK-NEXT: ret <2 x i64> [[REG1266]] -// CHECK: define available_externally <2 x i64> @_mm_packs_epi32 -// CHECK: [[REG1267:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_packs(int vector[4], int vector[4]) +// CHECK: define available_externally frozen <2 x i64> @_mm_packs_epi32 +// CHECK: [[REG1267:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_packs(int vector[4], int vector[4]) // CHECK-NEXT: [[REG1268:[0-9a-zA-Z_%.]+]] = bitcast <8 x i16> [[REG1267]] to <2 x i64> // CHECK-NEXT: ret <2 x i64> [[REG1268]] -// CHECK: define available_externally <2 x i64> @_mm_packus_epi16 -// CHECK: [[REG1269:[0-9a-zA-Z_%.]+]] = call <16 x i8> @vec_packsu(short vector[8], short vector[8]) +// CHECK: define available_externally frozen <2 x i64> @_mm_packus_epi16 +// CHECK: [[REG1269:[0-9a-zA-Z_%.]+]] = call frozen <16 x i8> @vec_packsu(short vector[8], short vector[8]) // CHECK-NEXT: [[REG1270:[0-9a-zA-Z_%.]+]] = bitcast <16 x i8> [[REG1269]] to <2 x i64> // CHECK-NEXT: ret <2 x i64> [[REG1270]] @@ -1874,14 +1874,14 @@ // CHECK-LABEL: @test_sad -// CHECK: define available_externally <2 x i64> @_mm_sad_epu8 -// CHECK: call <16 x i8> @vec_min(unsigned char vector[16], unsigned char vector[16]) -// CHECK: call <16 x i8> @vec_max(unsigned char vector[16], unsigned char vector[16]) -// CHECK: call <16 x i8> @vec_sub(unsigned char vector[16], unsigned char vector[16]) -// CHECK: call <4 x i32> @vec_sum4s(unsigned char vector[16], unsigned int vector[4])(<16 x i8> {{[0-9a-zA-Z_%.]+}}, <4 x i32> zeroinitializer) -// CHECK: call <4 x i32> @vec_sum2s(<4 x i32> {{[0-9a-zA-Z_%.]+}}, <4 x i32> zeroinitializer) -// CHECK-LE: [[REG1271:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_sld(int vector[4], int vector[4], unsigned int)(<4 x i32> {{[0-9a-zA-Z_%.]+}}, <4 x i32> {{[0-9a-zA-Z_%.]+}}, i32 zeroext 4) -// CHECK-BE: [[REG1271:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_sld(int vector[4], int vector[4], unsigned int)(<4 x i32> {{[0-9a-zA-Z_%.]+}}, <4 x i32> {{[0-9a-zA-Z_%.]+}}, i32 zeroext 6) +// CHECK: define available_externally frozen <2 x i64> @_mm_sad_epu8 +// CHECK: call frozen <16 x i8> @vec_min(unsigned char vector[16], unsigned char vector[16]) +// CHECK: call frozen <16 x i8> @vec_max(unsigned char vector[16], unsigned char vector[16]) +// CHECK: call frozen <16 x i8> @vec_sub(unsigned char vector[16], unsigned char vector[16]) +// CHECK: call frozen <4 x i32> @vec_sum4s(unsigned char vector[16], unsigned int vector[4])(<16 x i8> frozen {{[0-9a-zA-Z_%.]+}}, <4 x i32> frozen zeroinitializer) +// CHECK: call frozen <4 x i32> @vec_sum2s(<4 x i32> frozen {{[0-9a-zA-Z_%.]+}}, <4 x i32> frozen zeroinitializer) +// CHECK-LE: [[REG1271:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_sld(int vector[4], int vector[4], unsigned int)(<4 x i32> frozen {{[0-9a-zA-Z_%.]+}}, <4 x i32> frozen {{[0-9a-zA-Z_%.]+}}, i32 frozen zeroext 4) +// CHECK-BE: [[REG1271:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_sld(int vector[4], int vector[4], unsigned int)(<4 x i32> frozen {{[0-9a-zA-Z_%.]+}}, <4 x i32> frozen {{[0-9a-zA-Z_%.]+}}, i32 frozen zeroext 6) // CHECK-NEXT: store <4 x i32> [[REG1271]], <4 x i32>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG1272:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG1273:[0-9a-zA-Z_%.]+]] = bitcast <4 x i32> [[REG1272]] to <2 x i64> @@ -1914,25 +1914,25 @@ // CHECK-LABEL: @test_set -// CHECK: define available_externally <2 x i64> @_mm_set_epi16 +// CHECK: define available_externally frozen <2 x i64> @_mm_set_epi16 // CHECK-COUNT-8: store i16 {{[0-9a-zA-Z_%.]+}}, i16* {{[0-9a-zA-Z_%.]+}}, align 2 // CHECK: insertelement <8 x i16> undef, i16 {{[0-9a-zA-Z_%.]+}}, i32 0 // CHECK-COUNT-7: insertelement <8 x i16> {{[0-9a-zA-Z_%.]+}}, i16 {{[0-9a-zA-Z_%.]+}}, i32 {{[1-7]}} -// CHECK: define available_externally <2 x i64> @_mm_set_epi32 +// CHECK: define available_externally frozen <2 x i64> @_mm_set_epi32 // CHECK-COUNT-4: store i32 {{[0-9a-zA-Z_%.]+}}, i32* {{[0-9a-zA-Z_%.]+}}, align 4 // CHECK: insertelement <4 x i32> undef, i32 {{[0-9a-zA-Z_%.]+}}, i32 0 // CHECK-COUNT-3: insertelement <4 x i32> {{[0-9a-zA-Z_%.]+}}, i32 {{[0-9a-zA-Z_%.]+}}, i32 {{[1-3]}} -// CHECK: define available_externally <2 x i64> @_mm_set_epi64(i64 [[REG1274:[0-9a-zA-Z_%.]+]], i64 [[REG1275:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x i64> @_mm_set_epi64(i64 frozen [[REG1274:[0-9a-zA-Z_%.]+]], i64 frozen [[REG1275:[0-9a-zA-Z_%.]+]]) // CHECK: store i64 [[REG1274]], i64* [[REG1276:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: store i64 [[REG1275]], i64* [[REG1277:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: [[REG1278:[0-9a-zA-Z_%.]+]] = load i64, i64* [[REG1276]], align 8 // CHECK-NEXT: [[REG1279:[0-9a-zA-Z_%.]+]] = load i64, i64* [[REG1277]], align 8 -// CHECK-NEXT: [[REG1280:[0-9a-zA-Z_%.]+]] = call <2 x i64> @_mm_set_epi64x(i64 [[REG1278]], i64 [[REG1279]]) +// CHECK-NEXT: [[REG1280:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @_mm_set_epi64x(i64 frozen [[REG1278]], i64 frozen [[REG1279]]) // CHECK-NEXT: ret <2 x i64> [[REG1280]] -// CHECK: define available_externally <2 x i64> @_mm_set_epi64x(i64 [[REG1281:[0-9a-zA-Z_%.]+]], i64 [[REG1282:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x i64> @_mm_set_epi64x(i64 frozen [[REG1281:[0-9a-zA-Z_%.]+]], i64 frozen [[REG1282:[0-9a-zA-Z_%.]+]]) // CHECK: store i64 [[REG1281]], i64* [[REG1283:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: store i64 [[REG1282]], i64* [[REG1284:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: [[REG1285:[0-9a-zA-Z_%.]+]] = load i64, i64* [[REG1284]], align 8 @@ -1943,7 +1943,7 @@ // CHECK-NEXT: [[REG1290:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG1289]], align 16 // CHECK-NEXT: ret <2 x i64> [[REG1290]] -// CHECK: define available_externally <2 x i64> @_mm_set_epi8 +// CHECK: define available_externally frozen <2 x i64> @_mm_set_epi8 // CHECK-COUNT-16: store i8 {{[0-9a-zA-Z_%.]+}}, i8* {{[0-9a-zA-Z_%.]+}}, align 1 // CHECK: insertelement <16 x i8> undef, i8 {{[0-9a-zA-Z_%.]+}}, i32 {{[0-9]+}} // CHECK-COUNT-15: {{[0-9a-zA-Z_%.]+}} = insertelement <16 x i8> {{[0-9a-zA-Z_%.]+}}, i8 {{[0-9a-zA-Z_%.]+}}, i32 {{[0-9]+}} @@ -1952,7 +1952,7 @@ // CHECK-NEXT: [[REG1293:[0-9a-zA-Z_%.]+]] = bitcast <16 x i8> [[REG1292]] to <2 x i64> // CHECK-NEXT: ret <2 x i64> [[REG1293]] -// CHECK: define available_externally <2 x double> @_mm_set_pd(double [[REG1294:[0-9a-zA-Z_%.]+]], double [[REG1295:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x double> @_mm_set_pd(double frozen [[REG1294:[0-9a-zA-Z_%.]+]], double frozen [[REG1295:[0-9a-zA-Z_%.]+]]) // CHECK: store double [[REG1294]], double* [[REG1296:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: store double [[REG1295]], double* [[REG1297:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: [[REG1298:[0-9a-zA-Z_%.]+]] = load double, double* [[REG1297]], align 8 @@ -1963,13 +1963,13 @@ // CHECK-NEXT: [[REG1303:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG1302]], align 16 // CHECK-NEXT: ret <2 x double> [[REG1303]] -// CHECK: define available_externally <2 x double> @_mm_set_pd1(double [[REG1304:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x double> @_mm_set_pd1(double frozen [[REG1304:[0-9a-zA-Z_%.]+]]) // CHECK: store double [[REG1304]], double* [[REG1305:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: [[REG1306:[0-9a-zA-Z_%.]+]] = load double, double* [[REG1305]], align 8 -// CHECK-NEXT: [[REG1307:[0-9a-zA-Z_%.]+]] = call <2 x double> @_mm_set1_pd(double [[REG1306]]) +// CHECK-NEXT: [[REG1307:[0-9a-zA-Z_%.]+]] = call frozen <2 x double> @_mm_set1_pd(double frozen [[REG1306]]) // CHECK-NEXT: ret <2 x double> [[REG1307]] -// CHECK: define available_externally <2 x double> @_mm_set_sd(double [[REG1308:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x double> @_mm_set_sd(double frozen [[REG1308:[0-9a-zA-Z_%.]+]]) // CHECK: store double [[REG1308]], double* [[REG1309:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: [[REG1310:[0-9a-zA-Z_%.]+]] = load double, double* [[REG1309]], align 8 // CHECK-NEXT: [[REG1311:[0-9a-zA-Z_%.]+]] = insertelement <2 x double> undef, double [[REG1310]], i32 0 @@ -1978,39 +1978,39 @@ // CHECK-NEXT: [[REG1314:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG1313]], align 16 // CHECK-NEXT: ret <2 x double> [[REG1314]] -// CHECK: define available_externally <2 x i64> @_mm_set1_epi16(i16 signext [[REG1315:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x i64> @_mm_set1_epi16(i16 frozen signext [[REG1315:[0-9a-zA-Z_%.]+]]) // CHECK: store i16 [[REG1315]], i16* [[REG1316:[0-9a-zA-Z_%.]+]], align 2 // CHECK-COUNT-8: load i16, i16* [[REG1316]], align 2 -// CHECK-NEXT: [[REG1317:[0-9a-zA-Z_%.]+]] = call <2 x i64> @_mm_set_epi16 +// CHECK-NEXT: [[REG1317:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @_mm_set_epi16 // CHECK-NEXT: ret <2 x i64> [[REG1317]] -// CHECK: define available_externally <2 x i64> @_mm_set1_epi32(i32 signext [[REG1318:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x i64> @_mm_set1_epi32(i32 frozen signext [[REG1318:[0-9a-zA-Z_%.]+]]) // CHECK: store i32 [[REG1318]], i32* [[REG1319:[0-9a-zA-Z_%.]+]], align 4 // CHECK-COUNT-4: load i32, i32* [[REG1319]], align 4 -// CHECK-NEXT: [[REG1320:[0-9a-zA-Z_%.]+]] = call <2 x i64> @_mm_set_epi32 +// CHECK-NEXT: [[REG1320:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @_mm_set_epi32 // CHECK-NEXT: ret <2 x i64> [[REG1320]] -// CHECK: define available_externally <2 x i64> @_mm_set1_epi64(i64 [[REG1321:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x i64> @_mm_set1_epi64(i64 frozen [[REG1321:[0-9a-zA-Z_%.]+]]) // CHECK: store i64 [[REG1321]], i64* [[REG1322:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: [[REG1323:[0-9a-zA-Z_%.]+]] = load i64, i64* [[REG1322]], align 8 // CHECK-NEXT: [[REG1324:[0-9a-zA-Z_%.]+]] = load i64, i64* [[REG1322]], align 8 -// CHECK-NEXT: [[REG1325:[0-9a-zA-Z_%.]+]] = call <2 x i64> @_mm_set_epi64(i64 [[REG1323]], i64 [[REG1324]]) +// CHECK-NEXT: [[REG1325:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @_mm_set_epi64(i64 frozen [[REG1323]], i64 frozen [[REG1324]]) // CHECK-NEXT: ret <2 x i64> [[REG1325]] -// CHECK: define available_externally <2 x i64> @_mm_set1_epi64x(i64 [[REG1326:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x i64> @_mm_set1_epi64x(i64 frozen [[REG1326:[0-9a-zA-Z_%.]+]]) // CHECK: store i64 [[REG1326]], i64* [[REG1327:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: [[REG1328:[0-9a-zA-Z_%.]+]] = load i64, i64* [[REG1327]], align 8 // CHECK-NEXT: [[REG1329:[0-9a-zA-Z_%.]+]] = load i64, i64* [[REG1327]], align 8 -// CHECK-NEXT: [[REG1330:[0-9a-zA-Z_%.]+]] = call <2 x i64> @_mm_set_epi64x(i64 [[REG1328]], i64 [[REG1329]]) +// CHECK-NEXT: [[REG1330:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @_mm_set_epi64x(i64 frozen [[REG1328]], i64 frozen [[REG1329]]) // CHECK-NEXT: ret <2 x i64> [[REG1330]] -// CHECK: define available_externally <2 x i64> @_mm_set1_epi8(i8 zeroext [[REG1331:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x i64> @_mm_set1_epi8(i8 frozen zeroext [[REG1331:[0-9a-zA-Z_%.]+]]) // CHECK: store i8 [[REG1331]], i8* [[REG1332:[0-9a-zA-Z_%.]+]], align 1 // CHECK-COUNT-16: load i8, i8* [[REG1332]], align 1 -// CHECK: [[REG1333:[0-9a-zA-Z_%.]+]] = call <2 x i64> @_mm_set_epi8 +// CHECK: [[REG1333:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @_mm_set_epi8 // CHECK-NEXT: ret <2 x i64> [[REG1333]] -// CHECK: define available_externally <2 x double> @_mm_set1_pd(double [[REG1334:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x double> @_mm_set1_pd(double frozen [[REG1334:[0-9a-zA-Z_%.]+]]) // CHECK: store double [[REG1334]], double* [[REG1335:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: [[REG1336:[0-9a-zA-Z_%.]+]] = load double, double* [[REG1335]], align 8 // CHECK-NEXT: [[REG1337:[0-9a-zA-Z_%.]+]] = insertelement <2 x double> undef, double [[REG1336]], i32 0 @@ -2020,33 +2020,33 @@ // CHECK-NEXT: [[REG1341:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG1340]], align 16 // CHECK-NEXT: ret <2 x double> [[REG1341]] -// CHECK: define available_externally <2 x i64> @_mm_setr_epi16(i16 signext [[REG1342:[0-9a-zA-Z_%.]+]], i16 signext [[REG1343:[0-9a-zA-Z_%.]+]], i16 signext [[REG1344:[0-9a-zA-Z_%.]+]], i16 signext [[REG1345:[0-9a-zA-Z_%.]+]], i16 signext [[REG1346:[0-9a-zA-Z_%.]+]], i16 signext [[REG1347:[0-9a-zA-Z_%.]+]], i16 signext [[REG1348:[0-9a-zA-Z_%.]+]], i16 signext [[REG1349:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x i64> @_mm_setr_epi16(i16 frozen signext [[REG1342:[0-9a-zA-Z_%.]+]], i16 frozen signext [[REG1343:[0-9a-zA-Z_%.]+]], i16 frozen signext [[REG1344:[0-9a-zA-Z_%.]+]], i16 frozen signext [[REG1345:[0-9a-zA-Z_%.]+]], i16 frozen signext [[REG1346:[0-9a-zA-Z_%.]+]], i16 frozen signext [[REG1347:[0-9a-zA-Z_%.]+]], i16 frozen signext [[REG1348:[0-9a-zA-Z_%.]+]], i16 frozen signext [[REG1349:[0-9a-zA-Z_%.]+]]) // CHECK-COUNT-8: store i16 {{[0-9a-zA-Z_%.]+}}, i16* {{[0-9a-zA-Z_%.]+}}, align 2 // CHECK-COUNT-8: load i16, i16* {{[0-9a-zA-Z_%.]+}}, align 2 -// CHECK-NEXT: [[REG1350:[0-9a-zA-Z_%.]+]] = call <2 x i64> @_mm_set_epi16 +// CHECK-NEXT: [[REG1350:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @_mm_set_epi16 // CHECK-NEXT: ret <2 x i64> [[REG1350]] -// CHECK: define available_externally <2 x i64> @_mm_setr_epi32 +// CHECK: define available_externally frozen <2 x i64> @_mm_setr_epi32 // CHECK-COUNT-4: store i32 {{[0-9a-zA-Z_%.]+}}, i32* {{[0-9a-zA-Z_%.]+}}, align 4 // CHECK-COUNT-4: load i32, i32* {{[0-9a-zA-Z_%.]+}}, align 4 -// CHECK-NEXT: [[REG1351:[0-9a-zA-Z_%.]+]] = call <2 x i64> @_mm_set_epi32 +// CHECK-NEXT: [[REG1351:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @_mm_set_epi32 // CHECK-NEXT: ret <2 x i64> [[REG1351]] -// CHECK: define available_externally <2 x i64> @_mm_setr_epi64(i64 [[REG1352:[0-9a-zA-Z_%.]+]], i64 [[REG1353:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x i64> @_mm_setr_epi64(i64 frozen [[REG1352:[0-9a-zA-Z_%.]+]], i64 frozen [[REG1353:[0-9a-zA-Z_%.]+]]) // CHECK: store i64 [[REG1352]], i64* [[REG1354:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: store i64 [[REG1353]], i64* [[REG1355:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: [[REG1356:[0-9a-zA-Z_%.]+]] = load i64, i64* [[REG1355]], align 8 // CHECK-NEXT: [[REG1357:[0-9a-zA-Z_%.]+]] = load i64, i64* [[REG1354]], align 8 -// CHECK-NEXT: [[REG1358:[0-9a-zA-Z_%.]+]] = call <2 x i64> @_mm_set_epi64(i64 [[REG1356]], i64 [[REG1357]]) +// CHECK-NEXT: [[REG1358:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @_mm_set_epi64(i64 frozen [[REG1356]], i64 frozen [[REG1357]]) // CHECK-NEXT: ret <2 x i64> [[REG1358]] -// CHECK: define available_externally <2 x i64> @_mm_setr_epi8 +// CHECK: define available_externally frozen <2 x i64> @_mm_setr_epi8 // CHECK-COUNT-16: store i8 {{[0-9a-zA-Z_%.]+}}, i8* {{[0-9a-zA-Z_%.]+}}, align 1 // CHECK-COUNT-16: load i8, i8* {{[0-9a-zA-Z_%.]+}}, align 1 -// CHECK-NEXT: [[REG1359:[0-9a-zA-Z_%.]+]] = call <2 x i64> @_mm_set_epi8 +// CHECK-NEXT: [[REG1359:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @_mm_set_epi8 // CHECK-NEXT: ret <2 x i64> [[REG1359]] -// CHECK: define available_externally <2 x double> @_mm_setr_pd(double [[REG1360:[0-9a-zA-Z_%.]+]], double [[REG1361:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x double> @_mm_setr_pd(double frozen [[REG1360:[0-9a-zA-Z_%.]+]], double frozen [[REG1361:[0-9a-zA-Z_%.]+]]) // CHECK: store double [[REG1360]], double* [[REG1362:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: store double [[REG1361]], double* [[REG1363:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: [[REG1364:[0-9a-zA-Z_%.]+]] = load double, double* [[REG1362]], align 8 @@ -2057,12 +2057,12 @@ // CHECK-NEXT: [[REG1369:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG1368]], align 16 // CHECK-NEXT: ret <2 x double> [[REG1369]] -// CHECK: define available_externally <2 x double> @_mm_setzero_pd() -// CHECK: [[REG1370:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_splats(int)(i32 signext 0) +// CHECK: define available_externally frozen <2 x double> @_mm_setzero_pd() +// CHECK: [[REG1370:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_splats(int)(i32 frozen signext 0) // CHECK-NEXT: [[REG1371:[0-9a-zA-Z_%.]+]] = bitcast <4 x i32> [[REG1370]] to <2 x double> // CHECK-NEXT: ret <2 x double> [[REG1371]] -// CHECK: define available_externally <2 x i64> @_mm_setzero_si128() +// CHECK: define available_externally frozen <2 x i64> @_mm_setzero_si128() // CHECK: store <4 x i32> zeroinitializer, <4 x i32>* [[REG1372:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG1373:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG1372]], align 16 // CHECK-NEXT: [[REG1374:[0-9a-zA-Z_%.]+]] = bitcast <4 x i32> [[REG1373]] to <2 x i64> @@ -2078,7 +2078,7 @@ // CHECK-LABEL: @test_shuffle -// CHECK: define available_externally <2 x i64> @_mm_shuffle_epi32(<2 x i64> [[REG1375:[0-9a-zA-Z_%.]+]], i32 signext [[REG1376:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x i64> @_mm_shuffle_epi32(<2 x i64> frozen [[REG1375:[0-9a-zA-Z_%.]+]], i32 frozen signext [[REG1376:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x i64> [[REG1375]], <2 x i64>* [[REG1377:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store i32 [[REG1376]], i32* [[REG1378:[0-9a-zA-Z_%.]+]], align 4 // CHECK-NEXT: [[REG1379:[0-9a-zA-Z_%.]+]] = load i32, i32* [[REG1378]], align 4 @@ -2132,11 +2132,11 @@ // CHECK-NEXT: [[REG1424:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG1423]] to <4 x i32> // CHECK-NEXT: [[REG1425:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG1402]], align 16 // CHECK-NEXT: [[REG1426:[0-9a-zA-Z_%.]+]] = bitcast <4 x i32> [[REG1425]] to <16 x i8> -// CHECK-NEXT: [[REG1427:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_perm(int vector[4], int vector[4], unsigned char vector[16])(<4 x i32> [[REG1422]], <4 x i32> [[REG1424]], <16 x i8> [[REG1426]]) +// CHECK-NEXT: [[REG1427:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_perm(int vector[4], int vector[4], unsigned char vector[16])(<4 x i32> frozen [[REG1422]], <4 x i32> frozen [[REG1424]], <16 x i8> frozen [[REG1426]]) // CHECK-NEXT: [[REG1428:[0-9a-zA-Z_%.]+]] = bitcast <4 x i32> [[REG1427]] to <2 x i64> // CHECK-NEXT: ret <2 x i64> [[REG1428]] -// CHECK: define available_externally <2 x double> @_mm_shuffle_pd(<2 x double> [[REG1429:[0-9a-zA-Z_%.]+]], <2 x double> [[REG1430:[0-9a-zA-Z_%.]+]], i32 signext [[REG1431:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x double> @_mm_shuffle_pd(<2 x double> frozen [[REG1429:[0-9a-zA-Z_%.]+]], <2 x double> frozen [[REG1430:[0-9a-zA-Z_%.]+]], i32 frozen signext [[REG1431:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x double> [[REG1429]], <2 x double>* [[REG1432:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <2 x double> [[REG1430]], <2 x double>* [[REG1433:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store i32 [[REG1431]], i32* [[REG1434:[0-9a-zA-Z_%.]+]], align 4 @@ -2150,7 +2150,7 @@ // CHECK: [[REG1440]]: // CHECK-NEXT: [[REG1442:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG1432]], align 16 // CHECK-NEXT: [[REG1443:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG1433]], align 16 -// CHECK-NEXT: [[REG1444:[0-9a-zA-Z_%.]+]] = call <2 x double> @vec_mergeh(double vector[2], double vector[2])(<2 x double> [[REG1442]], <2 x double> [[REG1443]]) +// CHECK-NEXT: [[REG1444:[0-9a-zA-Z_%.]+]] = call frozen <2 x double> @vec_mergeh(double vector[2], double vector[2])(<2 x double> frozen [[REG1442]], <2 x double> frozen [[REG1443]]) // CHECK-NEXT: store <2 x double> [[REG1444]], <2 x double>* [[REG1445:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: br label %[[REG1446:[0-9a-zA-Z_%.]+]] @@ -2187,7 +2187,7 @@ // CHECK: [[REG1450]]: // CHECK-NEXT: [[REG1467:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG1432]], align 16 // CHECK-NEXT: [[REG1468:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG1433]], align 16 -// CHECK-NEXT: [[REG1469:[0-9a-zA-Z_%.]+]] = call <2 x double> @vec_mergel(double vector[2], double vector[2])(<2 x double> [[REG1467]], <2 x double> [[REG1468]]) +// CHECK-NEXT: [[REG1469:[0-9a-zA-Z_%.]+]] = call frozen <2 x double> @vec_mergel(double vector[2], double vector[2])(<2 x double> frozen [[REG1467]], <2 x double> frozen [[REG1468]]) // CHECK-NEXT: store <2 x double> [[REG1469]], <2 x double>* [[REG1445]], align 16 // CHECK-NEXT: br label %[[REG1466:[0-9a-zA-Z_%.]+]] @@ -2201,7 +2201,7 @@ // CHECK-NEXT: [[REG1470:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG1445]], align 16 // CHECK-NEXT: ret <2 x double> [[REG1470]] -// CHECK: define available_externally <2 x i64> @_mm_shufflehi_epi16(<2 x i64> [[REG1471:[0-9a-zA-Z_%.]+]], i32 signext [[REG1472:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x i64> @_mm_shufflehi_epi16(<2 x i64> frozen [[REG1471:[0-9a-zA-Z_%.]+]], i32 frozen signext [[REG1472:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x i64> [[REG1471]], <2 x i64>* [[REG1473:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store i32 [[REG1472]], i32* [[REG1474:[0-9a-zA-Z_%.]+]], align 4 // CHECK-NEXT: [[REG1475:[0-9a-zA-Z_%.]+]] = load i32, i32* [[REG1474]], align 4 @@ -2226,12 +2226,12 @@ // CHECK-LE-NEXT: store <2 x i64> , <2 x i64>* [[REG1494:[0-9a-zA-Z_%.]+]], align 16 // CHECK-BE-NEXT: store <2 x i64> , <2 x i64>* [[REG1494:[0-9a-zA-Z_%.]+]], align 16 // CHECK-COUNT-4: getelementptr inbounds [4 x i16], [4 x i16]* @_mm_shufflehi_epi16.permute_selectors, i64 0, i64 {{[0-9a-zA-Z_%.]+}} -// CHECK: [[REG1495:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_perm(unsigned long long vector[2], unsigned long long vector[2], unsigned char vector[16]) +// CHECK: [[REG1495:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_perm(unsigned long long vector[2], unsigned long long vector[2], unsigned char vector[16]) // CHECK-NEXT: store <2 x i64> [[REG1495]], <2 x i64>* [[REG1496:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG1497:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG1496]], align 16 // CHECK-NEXT: ret <2 x i64> [[REG1497]] -// CHECK: define available_externally <2 x i64> @_mm_shufflelo_epi16 +// CHECK: define available_externally frozen <2 x i64> @_mm_shufflelo_epi16 // CHECK: [[REG1498:[0-9a-zA-Z_%.]+]] = and i32 {{[0-9a-zA-Z_%.]+}}, 3 // CHECK-NEXT: sext i32 [[REG1498]] to i64 // CHECK: [[REG1499:[0-9a-zA-Z_%.]+]] = ashr i32 {{[0-9a-zA-Z_%.]+}}, 2 @@ -2247,7 +2247,7 @@ // CHECK-LE-NEXT: store <2 x i64> , <2 x i64>* [[REG1508:[0-9a-zA-Z_%.]+]], align 16 // CHECK-BE-NEXT: store <2 x i64> , <2 x i64>* [[REG1508:[0-9a-zA-Z_%.]+]], align 16 // CHECK-COUNT-4: [[REG1509:[0-9a-zA-Z_%.]+]] = getelementptr inbounds [4 x i16], [4 x i16]* @_mm_shufflelo_epi16.permute_selectors, i64 0, i64 {{[0-9a-zA-Z_%.]+}} -// CHECK: [[REG1510:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_perm(unsigned long long vector[2], unsigned long long vector[2], unsigned char vector[16]) +// CHECK: [[REG1510:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_perm(unsigned long long vector[2], unsigned long long vector[2], unsigned char vector[16]) // CHECK-NEXT: store <2 x i64> [[REG1510]], <2 x i64>* [[REG1511:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG1512:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG1511]], align 16 // CHECK-NEXT: ret <2 x i64> [[REG1512]] @@ -2265,56 +2265,56 @@ // CHECK-LABEL: @test_sll -// CHECK: define available_externally <2 x i64> @_mm_sll_epi16(<2 x i64> [[REG1513:[0-9a-zA-Z_%.]+]], <2 x i64> [[REG1514:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x i64> @_mm_sll_epi16(<2 x i64> frozen [[REG1513:[0-9a-zA-Z_%.]+]], <2 x i64> frozen [[REG1514:[0-9a-zA-Z_%.]+]]) // CHECK: store <8 x i16> , <8 x i16>* [[REG1515:[0-9a-zA-Z_%.]+]], align 16 -// CHECK-LE: [[REG1516:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_splat(unsigned short vector[8], unsigned int) -// CHECK-BE: [[REG1516:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_splat(unsigned short vector[8], unsigned int) +// CHECK-LE: [[REG1516:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_splat(unsigned short vector[8], unsigned int) +// CHECK-BE: [[REG1516:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_splat(unsigned short vector[8], unsigned int) // CHECK-NEXT: store <8 x i16> [[REG1516]], <8 x i16>* [[REG1517:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG1518:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG1517]], align 16 -// CHECK-NEXT: [[REG1519:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_cmple(unsigned short vector[8], unsigned short vector[8])(<8 x i16> [[REG1518]], <8 x i16> ) +// CHECK-NEXT: [[REG1519:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_cmple(unsigned short vector[8], unsigned short vector[8])(<8 x i16> frozen [[REG1518]], <8 x i16> frozen ) // CHECK-NEXT: store <8 x i16> [[REG1519]], <8 x i16>* [[REG1520:[0-9a-zA-Z_%.]+]], align 16 -// CHECK: [[REG1521:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_sl(unsigned short vector[8], unsigned short vector[8]) +// CHECK: [[REG1521:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_sl(unsigned short vector[8], unsigned short vector[8]) // CHECK-NEXT: store <8 x i16> [[REG1521]], <8 x i16>* [[REG1522:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG1523:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG1520]], align 16 // CHECK-NEXT: [[REG1524:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG1522]], align 16 // CHECK-NEXT: [[REG1525:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG1520]], align 16 -// CHECK-NEXT: [[REG1526:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_sel(unsigned short vector[8], unsigned short vector[8], bool vector[8])(<8 x i16> [[REG1523]], <8 x i16> [[REG1524]], <8 x i16> [[REG1525]]) +// CHECK-NEXT: [[REG1526:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_sel(unsigned short vector[8], unsigned short vector[8], bool vector[8])(<8 x i16> frozen [[REG1523]], <8 x i16> frozen [[REG1524]], <8 x i16> frozen [[REG1525]]) // CHECK-NEXT: store <8 x i16> [[REG1526]], <8 x i16>* [[REG1522]], align 16 // CHECK-NEXT: [[REG1527:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG1522]], align 16 // CHECK-NEXT: [[REG1528:[0-9a-zA-Z_%.]+]] = bitcast <8 x i16> [[REG1527]] to <2 x i64> // CHECK-NEXT: ret <2 x i64> [[REG1528]] -// CHECK: define available_externally <2 x i64> @_mm_sll_epi32(<2 x i64> [[REG1529:[0-9a-zA-Z_%.]+]], <2 x i64> [[REG1530:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x i64> @_mm_sll_epi32(<2 x i64> frozen [[REG1529:[0-9a-zA-Z_%.]+]], <2 x i64> frozen [[REG1530:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x i64> [[REG1529]], <2 x i64>* [[REG1531:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <2 x i64> [[REG1530]], <2 x i64>* [[REG1532:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <4 x i32> , <4 x i32>* [[REG1533:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG1534:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG1532]], align 16 // CHECK-NEXT: [[REG1535:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG1534]] to <4 x i32> -// CHECK-LE-NEXT: [[REG1536:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_splat(unsigned int vector[4], unsigned int)(<4 x i32> [[REG1535]], i32 zeroext 0) -// CHECK-BE-NEXT: [[REG1536:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_splat(unsigned int vector[4], unsigned int)(<4 x i32> [[REG1535]], i32 zeroext 1) -// CHECK: call <4 x i32> @vec_cmplt(unsigned int vector[4], unsigned int vector[4])(<4 x i32> {{[0-9a-zA-Z_%.]+}}, <4 x i32> ) -// CHECK: [[REG1537:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_sl(unsigned int vector[4], unsigned int vector[4]) +// CHECK-LE-NEXT: [[REG1536:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_splat(unsigned int vector[4], unsigned int)(<4 x i32> frozen [[REG1535]], i32 frozen zeroext 0) +// CHECK-BE-NEXT: [[REG1536:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_splat(unsigned int vector[4], unsigned int)(<4 x i32> frozen [[REG1535]], i32 frozen zeroext 1) +// CHECK: call frozen <4 x i32> @vec_cmplt(unsigned int vector[4], unsigned int vector[4])(<4 x i32> frozen {{[0-9a-zA-Z_%.]+}}, <4 x i32> frozen ) +// CHECK: [[REG1537:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_sl(unsigned int vector[4], unsigned int vector[4]) // CHECK-NEXT: store <4 x i32> [[REG1537]], <4 x i32>* [[REG1538:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG1539:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG1540:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG1538]], align 16 // CHECK-NEXT: [[REG1541:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* {{[0-9a-zA-Z_%.]+}}, align 16 -// CHECK-NEXT: [[REG1542:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_sel(unsigned int vector[4], unsigned int vector[4], bool vector[4])(<4 x i32> [[REG1539]], <4 x i32> [[REG1540]], <4 x i32> [[REG1541]]) +// CHECK-NEXT: [[REG1542:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_sel(unsigned int vector[4], unsigned int vector[4], bool vector[4])(<4 x i32> frozen [[REG1539]], <4 x i32> frozen [[REG1540]], <4 x i32> frozen [[REG1541]]) // CHECK-NEXT: store <4 x i32> [[REG1542]], <4 x i32>* [[REG1538]], align 16 // CHECK-NEXT: [[REG1543:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG1538]], align 16 // CHECK-NEXT: [[REG1544:[0-9a-zA-Z_%.]+]] = bitcast <4 x i32> [[REG1543]] to <2 x i64> // CHECK-NEXT: ret <2 x i64> [[REG1544]] -// CHECK: define available_externally <2 x i64> @_mm_sll_epi64 -// CHECK: call <2 x i64> @vec_splat(unsigned long long vector[2], unsigned int)(<2 x i64> {{[0-9a-zA-Z_%.]+}}, i32 zeroext 0) -// CHECK: call <2 x i64> @vec_cmplt(unsigned long long vector[2], unsigned long long vector[2])(<2 x i64> {{[0-9a-zA-Z_%.]+}}, <2 x i64> ) -// CHECK: call <2 x i64> @vec_sl(unsigned long long vector[2], unsigned long long vector[2]) -// CHECK: [[REG1545:[0-9a-zA-Z_%.]+]] = call <2 x double> @vec_sel(double vector[2], double vector[2], bool vector[2]) +// CHECK: define available_externally frozen <2 x i64> @_mm_sll_epi64 +// CHECK: call frozen <2 x i64> @vec_splat(unsigned long long vector[2], unsigned int)(<2 x i64> frozen {{[0-9a-zA-Z_%.]+}}, i32 frozen zeroext 0) +// CHECK: call frozen <2 x i64> @vec_cmplt(unsigned long long vector[2], unsigned long long vector[2])(<2 x i64> frozen {{[0-9a-zA-Z_%.]+}}, <2 x i64> frozen ) +// CHECK: call frozen <2 x i64> @vec_sl(unsigned long long vector[2], unsigned long long vector[2]) +// CHECK: [[REG1545:[0-9a-zA-Z_%.]+]] = call frozen <2 x double> @vec_sel(double vector[2], double vector[2], bool vector[2]) // CHECK-NEXT: [[REG1546:[0-9a-zA-Z_%.]+]] = bitcast <2 x double> [[REG1545]] to <2 x i64> // CHECK-NEXT: store <2 x i64> [[REG1546]], <2 x i64>* [[REG1547:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG1548:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG1547]], align 16 // CHECK-NEXT: ret <2 x i64> [[REG1548]] -// CHECK: define available_externally <2 x i64> @_mm_slli_epi16(<2 x i64> [[REG1549:[0-9a-zA-Z_%.]+]], i32 signext [[REG1550:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x i64> @_mm_slli_epi16(<2 x i64> frozen [[REG1549:[0-9a-zA-Z_%.]+]], i32 frozen signext [[REG1550:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x i64> [[REG1549]], <2 x i64>* [[REG1551:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store i32 [[REG1550]], i32* [[REG1552:[0-9a-zA-Z_%.]+]], align 4 // CHECK-NEXT: store <8 x i16> zeroinitializer, <8 x i16>* [[REG1553:[0-9a-zA-Z_%.]+]], align 16 @@ -2335,14 +2335,14 @@ // CHECK: [[REG1561]]: // CHECK-NEXT: [[REG1563:[0-9a-zA-Z_%.]+]] = load i32, i32* [[REG1552]], align 4 // CHECK-NEXT: [[REG1564:[0-9a-zA-Z_%.]+]] = trunc i32 [[REG1563]] to i8 -// CHECK-NEXT: [[REG1565:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_splat_s16(signed char)(i8 signext [[REG1564]]) +// CHECK-NEXT: [[REG1565:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_splat_s16(signed char)(i8 frozen signext [[REG1564]]) // CHECK-NEXT: store <8 x i16> [[REG1565]], <8 x i16>* [[REG1566:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: br label %[[REG1567:[0-9a-zA-Z_%.]+]] // CHECK: [[REG1562]]: // CHECK-NEXT: [[REG1568:[0-9a-zA-Z_%.]+]] = load i32, i32* [[REG1552]], align 4 // CHECK-NEXT: [[REG1569:[0-9a-zA-Z_%.]+]] = trunc i32 [[REG1568]] to i16 -// CHECK-NEXT: [[REG1570:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_splats(unsigned short)(i16 zeroext [[REG1569]]) +// CHECK-NEXT: [[REG1570:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_splats(unsigned short)(i16 frozen zeroext [[REG1569]]) // CHECK-NEXT: store <8 x i16> [[REG1570]], <8 x i16>* [[REG1566]], align 16 // CHECK-NEXT: br label %[[REG1567:[0-9a-zA-Z_%.]+]] @@ -2350,7 +2350,7 @@ // CHECK-NEXT: [[REG1571:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG1551]], align 16 // CHECK-NEXT: [[REG1572:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG1571]] to <8 x i16> // CHECK-NEXT: [[REG1573:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG1566]], align 16 -// CHECK-NEXT: [[REG1574:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_sl(short vector[8], unsigned short vector[8])(<8 x i16> [[REG1572]], <8 x i16> [[REG1573]]) +// CHECK-NEXT: [[REG1574:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_sl(short vector[8], unsigned short vector[8])(<8 x i16> frozen [[REG1572]], <8 x i16> frozen [[REG1573]]) // CHECK-NEXT: store <8 x i16> [[REG1574]], <8 x i16>* [[REG1553]], align 16 // CHECK-NEXT: br label %[[REG1557:[0-9a-zA-Z_%.]+]] @@ -2359,7 +2359,7 @@ // CHECK-NEXT: [[REG1576:[0-9a-zA-Z_%.]+]] = bitcast <8 x i16> [[REG1575]] to <2 x i64> // CHECK-NEXT: ret <2 x i64> [[REG1576]] -// CHECK: define available_externally <2 x i64> @_mm_slli_epi32(<2 x i64> [[REG1577:[0-9a-zA-Z_%.]+]], i32 signext [[REG1578:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x i64> @_mm_slli_epi32(<2 x i64> frozen [[REG1577:[0-9a-zA-Z_%.]+]], i32 frozen signext [[REG1578:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x i64> [[REG1577]], <2 x i64>* [[REG1579:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store i32 [[REG1578]], i32* [[REG1580:[0-9a-zA-Z_%.]+]], align 4 // CHECK-NEXT: store <4 x i32> zeroinitializer, <4 x i32>* [[REG1581:[0-9a-zA-Z_%.]+]], align 16 @@ -2385,13 +2385,13 @@ // CHECK: [[REG1593]]: // CHECK-NEXT: [[REG1594:[0-9a-zA-Z_%.]+]] = load i32, i32* [[REG1580]], align 4 // CHECK-NEXT: [[REG1595:[0-9a-zA-Z_%.]+]] = trunc i32 [[REG1594]] to i8 -// CHECK-NEXT: [[REG1596:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_splat_s32(signed char)(i8 signext [[REG1595]]) +// CHECK-NEXT: [[REG1596:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_splat_s32(signed char)(i8 frozen signext [[REG1595]]) // CHECK-NEXT: store <4 x i32> [[REG1596]], <4 x i32>* [[REG1597:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: br label %[[REG1598:[0-9a-zA-Z_%.]+]] // CHECK: [[REG1590]]: // CHECK-NEXT: [[REG1599:[0-9a-zA-Z_%.]+]] = load i32, i32* [[REG1580]], align 4 -// CHECK-NEXT: [[REG1600:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_splats(unsigned int)(i32 zeroext [[REG1599]]) +// CHECK-NEXT: [[REG1600:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_splats(unsigned int)(i32 frozen zeroext [[REG1599]]) // CHECK-NEXT: store <4 x i32> [[REG1600]], <4 x i32>* [[REG1597]], align 16 // CHECK-NEXT: br label %[[REG1598:[0-9a-zA-Z_%.]+]] @@ -2399,7 +2399,7 @@ // CHECK-NEXT: [[REG1601:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG1579]], align 16 // CHECK-NEXT: [[REG1602:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG1601]] to <4 x i32> // CHECK-NEXT: [[REG1603:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG1597]], align 16 -// CHECK-NEXT: [[REG1604:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_sl(int vector[4], unsigned int vector[4])(<4 x i32> [[REG1602]], <4 x i32> [[REG1603]]) +// CHECK-NEXT: [[REG1604:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_sl(int vector[4], unsigned int vector[4])(<4 x i32> frozen [[REG1602]], <4 x i32> frozen [[REG1603]]) // CHECK-NEXT: store <4 x i32> [[REG1604]], <4 x i32>* [[REG1581]], align 16 // CHECK-NEXT: br label %[[REG1585:[0-9a-zA-Z_%.]+]] @@ -2408,7 +2408,7 @@ // CHECK-NEXT: [[REG1606:[0-9a-zA-Z_%.]+]] = bitcast <4 x i32> [[REG1605]] to <2 x i64> // CHECK-NEXT: ret <2 x i64> [[REG1606]] -// CHECK: define available_externally <2 x i64> @_mm_slli_epi64(<2 x i64> [[REG1607:[0-9a-zA-Z_%.]+]], i32 signext [[REG1608:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x i64> @_mm_slli_epi64(<2 x i64> frozen [[REG1607:[0-9a-zA-Z_%.]+]], i32 frozen signext [[REG1608:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x i64> [[REG1607]], <2 x i64>* [[REG1609:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store i32 [[REG1608]], i32* [[REG1610:[0-9a-zA-Z_%.]+]], align 4 // CHECK-NEXT: store <2 x i64> zeroinitializer, <2 x i64>* [[REG1611:[0-9a-zA-Z_%.]+]], align 16 @@ -2434,14 +2434,14 @@ // CHECK: [[REG1623]]: // CHECK-NEXT: [[REG1624:[0-9a-zA-Z_%.]+]] = load i32, i32* [[REG1610]], align 4 // CHECK-NEXT: [[REG1625:[0-9a-zA-Z_%.]+]] = trunc i32 [[REG1624]] to i8 -// CHECK-NEXT: [[REG1626:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_splat_s32(signed char)(i8 signext [[REG1625]]) +// CHECK-NEXT: [[REG1626:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_splat_s32(signed char)(i8 frozen signext [[REG1625]]) // CHECK-NEXT: [[REG1627:[0-9a-zA-Z_%.]+]] = bitcast <4 x i32> [[REG1626]] to <2 x i64> // CHECK-NEXT: store <2 x i64> [[REG1627]], <2 x i64>* [[REG1628:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: br label %[[REG1629:[0-9a-zA-Z_%.]+]] // CHECK: [[REG1620]]: // CHECK-NEXT: [[REG1630:[0-9a-zA-Z_%.]+]] = load i32, i32* [[REG1610]], align 4 -// CHECK-NEXT: [[REG1631:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_splats(unsigned int)(i32 zeroext [[REG1630]]) +// CHECK-NEXT: [[REG1631:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_splats(unsigned int)(i32 frozen zeroext [[REG1630]]) // CHECK-NEXT: [[REG1632:[0-9a-zA-Z_%.]+]] = bitcast <4 x i32> [[REG1631]] to <2 x i64> // CHECK-NEXT: store <2 x i64> [[REG1632]], <2 x i64>* [[REG1628]], align 16 // CHECK-NEXT: br label %[[REG1629:[0-9a-zA-Z_%.]+]] @@ -2449,7 +2449,7 @@ // CHECK: [[REG1629]]: // CHECK-NEXT: [[REG1633:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG1609]], align 16 // CHECK-NEXT: [[REG1634:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG1628]], align 16 -// CHECK-NEXT: [[REG1635:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_sl(long long vector[2], unsigned long long vector[2])(<2 x i64> [[REG1633]], <2 x i64> [[REG1634]]) +// CHECK-NEXT: [[REG1635:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_sl(long long vector[2], unsigned long long vector[2])(<2 x i64> frozen [[REG1633]], <2 x i64> frozen [[REG1634]]) // CHECK-NEXT: store <2 x i64> [[REG1635]], <2 x i64>* [[REG1611]], align 16 // CHECK-NEXT: br label %[[REG1615:[0-9a-zA-Z_%.]+]] @@ -2457,7 +2457,7 @@ // CHECK-NEXT: [[REG1636:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG1611]], align 16 // CHECK-NEXT: ret <2 x i64> [[REG1636]] -// CHECK: define available_externally <2 x i64> @_mm_slli_si128(<2 x i64> [[REG1637:[0-9a-zA-Z_%.]+]], i32 signext [[REG1638:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x i64> @_mm_slli_si128(<2 x i64> frozen [[REG1637:[0-9a-zA-Z_%.]+]], i32 frozen signext [[REG1638:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x i64> [[REG1637]], <2 x i64>* [[REG1639:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store i32 [[REG1638]], i32* [[REG1640:[0-9a-zA-Z_%.]+]], align 4 // CHECK-NEXT: store <16 x i8> zeroinitializer, <16 x i8>* [[REG1641:[0-9a-zA-Z_%.]+]], align 16 @@ -2470,8 +2470,8 @@ // CHECK-NEXT: [[REG1647:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG1646]] to <16 x i8> // CHECK-NEXT: [[REG1648:[0-9a-zA-Z_%.]+]] = load i32, i32* [[REG1640]], align 4 // CHECK-BE-NEXT: [[REG1649:[0-9a-zA-Z_%.]+]] = sub nsw i32 16, [[REG1648]] -// CHECK-BE-NEXT: [[REG1650:[0-9a-zA-Z_%.]+]] = call <16 x i8> @vec_sld(unsigned char vector[16], unsigned char vector[16], unsigned int)(<16 x i8> zeroinitializer, <16 x i8> [[REG1647]], i32 zeroext [[REG1649]]) -// CHECK-LE-NEXT: [[REG1650:[0-9a-zA-Z_%.]+]] = call <16 x i8> @vec_sld(unsigned char vector[16], unsigned char vector[16], unsigned int)(<16 x i8> [[REG1647]], <16 x i8> zeroinitializer, i32 zeroext [[REG1648]]) +// CHECK-BE-NEXT: [[REG1650:[0-9a-zA-Z_%.]+]] = call frozen <16 x i8> @vec_sld(unsigned char vector[16], unsigned char vector[16], unsigned int)(<16 x i8> frozen zeroinitializer, <16 x i8> frozen [[REG1647]], i32 frozen zeroext [[REG1649]]) +// CHECK-LE-NEXT: [[REG1650:[0-9a-zA-Z_%.]+]] = call frozen <16 x i8> @vec_sld(unsigned char vector[16], unsigned char vector[16], unsigned int)(<16 x i8> frozen [[REG1647]], <16 x i8> frozen zeroinitializer, i32 frozen zeroext [[REG1648]]) // CHECK-NEXT: store <16 x i8> [[REG1650]], <16 x i8>* [[REG1651:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: br label %[[REG1652:[0-9a-zA-Z_%.]+]] // CHECK: [[REG1645]]: @@ -2491,23 +2491,23 @@ // CHECK-LABEL: @test_sqrt -// CHECK: define available_externally <2 x double> @_mm_sqrt_pd -// CHECK: [[REG1655:[0-9a-zA-Z_%.]+]] = call <2 x double> @vec_sqrt(double vector[2])(<2 x double> {{[0-9a-zA-Z_%.]+}}) +// CHECK: define available_externally frozen <2 x double> @_mm_sqrt_pd +// CHECK: [[REG1655:[0-9a-zA-Z_%.]+]] = call frozen <2 x double> @vec_sqrt(double vector[2])(<2 x double> frozen {{[0-9a-zA-Z_%.]+}}) // CHECK-NEXT: ret <2 x double> [[REG1655]] -// CHECK: define available_externally <2 x double> @_mm_sqrt_sd(<2 x double> [[REG1656:[0-9a-zA-Z_%.]+]], <2 x double> [[REG1657:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x double> @_mm_sqrt_sd(<2 x double> frozen [[REG1656:[0-9a-zA-Z_%.]+]], <2 x double> frozen [[REG1657:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x double> [[REG1656]], <2 x double>* [[REG1658:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <2 x double> [[REG1657]], <2 x double>* [[REG1659:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG1660:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG1659]], align 16 // CHECK-NEXT: [[REG1661:[0-9a-zA-Z_%.]+]] = extractelement <2 x double> [[REG1660]], i32 0 -// CHECK-NEXT: [[REG1662:[0-9a-zA-Z_%.]+]] = call <2 x double> @_mm_set1_pd(double [[REG1661]]) -// CHECK-NEXT: [[REG1663:[0-9a-zA-Z_%.]+]] = call <2 x double> @vec_sqrt(double vector[2])(<2 x double> [[REG1662]]) +// CHECK-NEXT: [[REG1662:[0-9a-zA-Z_%.]+]] = call frozen <2 x double> @_mm_set1_pd(double frozen [[REG1661]]) +// CHECK-NEXT: [[REG1663:[0-9a-zA-Z_%.]+]] = call frozen <2 x double> @vec_sqrt(double vector[2])(<2 x double> frozen [[REG1662]]) // CHECK-NEXT: store <2 x double> [[REG1663]], <2 x double>* [[REG1664:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG1665:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG1664]], align 16 // CHECK-NEXT: [[REG1666:[0-9a-zA-Z_%.]+]] = extractelement <2 x double> [[REG1665]], i32 0 // CHECK-NEXT: [[REG1667:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG1658]], align 16 // CHECK-NEXT: [[REG1668:[0-9a-zA-Z_%.]+]] = extractelement <2 x double> [[REG1667]], i32 1 -// CHECK-NEXT: [[REG1669:[0-9a-zA-Z_%.]+]] = call <2 x double> @_mm_setr_pd(double [[REG1666]], double [[REG1668]]) +// CHECK-NEXT: [[REG1669:[0-9a-zA-Z_%.]+]] = call frozen <2 x double> @_mm_setr_pd(double frozen [[REG1666]], double frozen [[REG1668]]) // CHECK-NEXT: ret <2 x double> [[REG1669]] void __attribute__((noinline)) @@ -2520,49 +2520,49 @@ // CHECK-LABEL: @test_sra -// CHECK: define available_externally <2 x i64> @_mm_sra_epi16(<2 x i64> [[REG1670:[0-9a-zA-Z_%.]+]], <2 x i64> [[REG1671:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x i64> @_mm_sra_epi16(<2 x i64> frozen [[REG1670:[0-9a-zA-Z_%.]+]], <2 x i64> frozen [[REG1671:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x i64> [[REG1670]], <2 x i64>* [[REG1672:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <2 x i64> [[REG1671]], <2 x i64>* [[REG1673:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <8 x i16> , <8 x i16>* [[REG1674:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG1675:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG1673]], align 16 // CHECK-NEXT: [[REG1676:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG1675]] to <8 x i16> -// CHECK-LE-NEXT: [[REG1677:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_splat(unsigned short vector[8], unsigned int)(<8 x i16> [[REG1676]], i32 zeroext 0) -// CHECK-BE-NEXT: [[REG1677:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_splat(unsigned short vector[8], unsigned int)(<8 x i16> [[REG1676]], i32 zeroext 3) +// CHECK-LE-NEXT: [[REG1677:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_splat(unsigned short vector[8], unsigned int)(<8 x i16> frozen [[REG1676]], i32 frozen zeroext 0) +// CHECK-BE-NEXT: [[REG1677:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_splat(unsigned short vector[8], unsigned int)(<8 x i16> frozen [[REG1676]], i32 frozen zeroext 3) // CHECK-NEXT: store <8 x i16> [[REG1677]], <8 x i16>* [[REG1678:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG1679:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG1678]], align 16 -// CHECK-NEXT: [[REG1680:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_min(unsigned short vector[8], unsigned short vector[8])(<8 x i16> [[REG1679]], <8 x i16> ) +// CHECK-NEXT: [[REG1680:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_min(unsigned short vector[8], unsigned short vector[8])(<8 x i16> frozen [[REG1679]], <8 x i16> frozen ) // CHECK-NEXT: store <8 x i16> [[REG1680]], <8 x i16>* [[REG1678]], align 16 // CHECK-NEXT: [[REG1681:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG1672]], align 16 // CHECK-NEXT: [[REG1682:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG1681]] to <8 x i16> // CHECK-NEXT: [[REG1683:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG1678]], align 16 -// CHECK-NEXT: [[REG1684:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_sra(short vector[8], unsigned short vector[8])(<8 x i16> [[REG1682]], <8 x i16> [[REG1683]]) +// CHECK-NEXT: [[REG1684:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_sra(short vector[8], unsigned short vector[8])(<8 x i16> frozen [[REG1682]], <8 x i16> frozen [[REG1683]]) // CHECK-NEXT: store <8 x i16> [[REG1684]], <8 x i16>* [[REG1685:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG1686:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG1685]], align 16 // CHECK-NEXT: [[REG1687:[0-9a-zA-Z_%.]+]] = bitcast <8 x i16> [[REG1686]] to <2 x i64> // CHECK-NEXT: ret <2 x i64> [[REG1687]] -// CHECK: define available_externally <2 x i64> @_mm_sra_epi32(<2 x i64> [[REG1688:[0-9a-zA-Z_%.]+]], <2 x i64> [[REG1689:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x i64> @_mm_sra_epi32(<2 x i64> frozen [[REG1688:[0-9a-zA-Z_%.]+]], <2 x i64> frozen [[REG1689:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x i64> [[REG1688]], <2 x i64>* [[REG1690:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <2 x i64> [[REG1689]], <2 x i64>* [[REG1691:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <4 x i32> , <4 x i32>* [[REG1692:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG1693:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG1691]], align 16 // CHECK-NEXT: [[REG1694:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG1693]] to <4 x i32> -// CHECK-LE-NEXT: [[REG1695:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_splat(unsigned int vector[4], unsigned int)(<4 x i32> [[REG1694]], i32 zeroext 0) -// CHECK-BE-NEXT: [[REG1695:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_splat(unsigned int vector[4], unsigned int)(<4 x i32> [[REG1694]], i32 zeroext 1) +// CHECK-LE-NEXT: [[REG1695:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_splat(unsigned int vector[4], unsigned int)(<4 x i32> frozen [[REG1694]], i32 frozen zeroext 0) +// CHECK-BE-NEXT: [[REG1695:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_splat(unsigned int vector[4], unsigned int)(<4 x i32> frozen [[REG1694]], i32 frozen zeroext 1) // CHECK-NEXT: store <4 x i32> [[REG1695]], <4 x i32>* [[REG1696:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG1697:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG1696]], align 16 -// CHECK-NEXT: [[REG1698:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_min(unsigned int vector[4], unsigned int vector[4])(<4 x i32> [[REG1697]], <4 x i32> ) +// CHECK-NEXT: [[REG1698:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_min(unsigned int vector[4], unsigned int vector[4])(<4 x i32> frozen [[REG1697]], <4 x i32> frozen ) // CHECK-NEXT: store <4 x i32> [[REG1698]], <4 x i32>* [[REG1696]], align 16 // CHECK-NEXT: [[REG1699:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG1690]], align 16 // CHECK-NEXT: [[REG1700:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG1699]] to <4 x i32> // CHECK-NEXT: [[REG1701:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG1696]], align 16 -// CHECK-NEXT: [[REG1702:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_sra(int vector[4], unsigned int vector[4])(<4 x i32> [[REG1700]], <4 x i32> [[REG1701]]) +// CHECK-NEXT: [[REG1702:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_sra(int vector[4], unsigned int vector[4])(<4 x i32> frozen [[REG1700]], <4 x i32> frozen [[REG1701]]) // CHECK-NEXT: store <4 x i32> [[REG1702]], <4 x i32>* [[REG1703:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG1704:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG1703]], align 16 // CHECK-NEXT: [[REG1705:[0-9a-zA-Z_%.]+]] = bitcast <4 x i32> [[REG1704]] to <2 x i64> // CHECK-NEXT: ret <2 x i64> [[REG1705]] -// CHECK: define available_externally <2 x i64> @_mm_srai_epi16(<2 x i64> [[REG1706:[0-9a-zA-Z_%.]+]], i32 signext [[REG1707:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x i64> @_mm_srai_epi16(<2 x i64> frozen [[REG1706:[0-9a-zA-Z_%.]+]], i32 frozen signext [[REG1707:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x i64> [[REG1706]], <2 x i64>* [[REG1708:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store i32 [[REG1707]], i32* [[REG1709:[0-9a-zA-Z_%.]+]], align 4 // CHECK-NEXT: store <8 x i16> , <8 x i16>* [[REG1710:[0-9a-zA-Z_%.]+]], align 16 @@ -2578,14 +2578,14 @@ // CHECK: [[REG1715]]: // CHECK-NEXT: [[REG1717:[0-9a-zA-Z_%.]+]] = load i32, i32* [[REG1709]], align 4 // CHECK-NEXT: [[REG1718:[0-9a-zA-Z_%.]+]] = trunc i32 [[REG1717]] to i8 -// CHECK-NEXT: [[REG1719:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_splat_s16(signed char)(i8 signext [[REG1718]]) +// CHECK-NEXT: [[REG1719:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_splat_s16(signed char)(i8 frozen signext [[REG1718]]) // CHECK-NEXT: store <8 x i16> [[REG1719]], <8 x i16>* [[REG1710]], align 16 // CHECK-NEXT: br label %[[REG1720:[0-9a-zA-Z_%.]+]] // CHECK: [[REG1716]]: // CHECK-NEXT: [[REG1721:[0-9a-zA-Z_%.]+]] = load i32, i32* [[REG1709]], align 4 // CHECK-NEXT: [[REG1722:[0-9a-zA-Z_%.]+]] = trunc i32 [[REG1721]] to i16 -// CHECK-NEXT: [[REG1723:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_splats(unsigned short)(i16 zeroext [[REG1722]]) +// CHECK-NEXT: [[REG1723:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_splats(unsigned short)(i16 frozen zeroext [[REG1722]]) // CHECK-NEXT: store <8 x i16> [[REG1723]], <8 x i16>* [[REG1710]], align 16 // CHECK-NEXT: br label %[[REG1720:[0-9a-zA-Z_%.]+]] @@ -2596,13 +2596,13 @@ // CHECK-NEXT: [[REG1724:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG1708]], align 16 // CHECK-NEXT: [[REG1725:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG1724]] to <8 x i16> // CHECK-NEXT: [[REG1726:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG1710]], align 16 -// CHECK-NEXT: [[REG1727:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_sra(short vector[8], unsigned short vector[8])(<8 x i16> [[REG1725]], <8 x i16> [[REG1726]]) +// CHECK-NEXT: [[REG1727:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_sra(short vector[8], unsigned short vector[8])(<8 x i16> frozen [[REG1725]], <8 x i16> frozen [[REG1726]]) // CHECK-NEXT: store <8 x i16> [[REG1727]], <8 x i16>* [[REG1728:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG1729:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG1728]], align 16 // CHECK-NEXT: [[REG1730:[0-9a-zA-Z_%.]+]] = bitcast <8 x i16> [[REG1729]] to <2 x i64> // CHECK-NEXT: ret <2 x i64> [[REG1730]] -// CHECK: define available_externally <2 x i64> @_mm_srai_epi32(<2 x i64> [[REG1731:[0-9a-zA-Z_%.]+]], i32 signext [[REG1732:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x i64> @_mm_srai_epi32(<2 x i64> frozen [[REG1731:[0-9a-zA-Z_%.]+]], i32 frozen signext [[REG1732:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x i64> [[REG1731]], <2 x i64>* [[REG1733:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store i32 [[REG1732]], i32* [[REG1734:[0-9a-zA-Z_%.]+]], align 4 // CHECK-NEXT: store <4 x i32> , <4 x i32>* [[REG1735:[0-9a-zA-Z_%.]+]], align 16 @@ -2623,13 +2623,13 @@ // CHECK: [[REG1744]]: // CHECK-NEXT: [[REG1746:[0-9a-zA-Z_%.]+]] = load i32, i32* [[REG1734]], align 4 // CHECK-NEXT: [[REG1747:[0-9a-zA-Z_%.]+]] = trunc i32 [[REG1746]] to i8 -// CHECK-NEXT: [[REG1748:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_splat_s32(signed char)(i8 signext [[REG1747]]) +// CHECK-NEXT: [[REG1748:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_splat_s32(signed char)(i8 frozen signext [[REG1747]]) // CHECK-NEXT: store <4 x i32> [[REG1748]], <4 x i32>* [[REG1735]], align 16 // CHECK-NEXT: br label %[[REG1749:[0-9a-zA-Z_%.]+]] // CHECK: [[REG1745]]: // CHECK-NEXT: [[REG1750:[0-9a-zA-Z_%.]+]] = load i32, i32* [[REG1734]], align 4 -// CHECK-NEXT: [[REG1751:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_splats(unsigned int)(i32 zeroext [[REG1750]]) +// CHECK-NEXT: [[REG1751:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_splats(unsigned int)(i32 frozen zeroext [[REG1750]]) // CHECK-NEXT: store <4 x i32> [[REG1751]], <4 x i32>* [[REG1735]], align 16 // CHECK-NEXT: br label %[[REG1749:[0-9a-zA-Z_%.]+]] @@ -2638,7 +2638,7 @@ // CHECK: [[REG1741]]: // CHECK-NEXT: [[REG1753:[0-9a-zA-Z_%.]+]] = load i32, i32* [[REG1734]], align 4 -// CHECK-NEXT: [[REG1754:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_splats(unsigned int)(i32 zeroext [[REG1753]]) +// CHECK-NEXT: [[REG1754:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_splats(unsigned int)(i32 frozen zeroext [[REG1753]]) // CHECK-NEXT: store <4 x i32> [[REG1754]], <4 x i32>* [[REG1735]], align 16 // CHECK-NEXT: br label %[[REG1752:[0-9a-zA-Z_%.]+]] @@ -2649,7 +2649,7 @@ // CHECK-NEXT: [[REG1755:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG1733]], align 16 // CHECK-NEXT: [[REG1756:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG1755]] to <4 x i32> // CHECK-NEXT: [[REG1757:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG1735]], align 16 -// CHECK-NEXT: [[REG1758:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_sra(int vector[4], unsigned int vector[4])(<4 x i32> [[REG1756]], <4 x i32> [[REG1757]]) +// CHECK-NEXT: [[REG1758:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_sra(int vector[4], unsigned int vector[4])(<4 x i32> frozen [[REG1756]], <4 x i32> frozen [[REG1757]]) // CHECK-NEXT: store <4 x i32> [[REG1758]], <4 x i32>* [[REG1759:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG1760:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG1759]], align 16 // CHECK-NEXT: [[REG1761:[0-9a-zA-Z_%.]+]] = bitcast <4 x i32> [[REG1760]] to <2 x i64> @@ -2668,84 +2668,84 @@ // CHECK-LABEL: @test_srl -// CHECK: define available_externally <2 x i64> @_mm_srl_epi16(<2 x i64> [[REG1762:[0-9a-zA-Z_%.]+]], <2 x i64> [[REG1763:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x i64> @_mm_srl_epi16(<2 x i64> frozen [[REG1762:[0-9a-zA-Z_%.]+]], <2 x i64> frozen [[REG1763:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x i64> [[REG1762]], <2 x i64>* [[REG1764:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <2 x i64> [[REG1763]], <2 x i64>* [[REG1765:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <8 x i16> , <8 x i16>* [[REG1766:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG1767:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG1765]], align 16 // CHECK-NEXT: [[REG1768:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG1767]] to <8 x i16> -// CHECK-LE-NEXT: [[REG1769:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_splat(unsigned short vector[8], unsigned int)(<8 x i16> [[REG1768]], i32 zeroext 0) -// CHECK-BE-NEXT: [[REG1769:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_splat(unsigned short vector[8], unsigned int)(<8 x i16> [[REG1768]], i32 zeroext 3) +// CHECK-LE-NEXT: [[REG1769:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_splat(unsigned short vector[8], unsigned int)(<8 x i16> frozen [[REG1768]], i32 frozen zeroext 0) +// CHECK-BE-NEXT: [[REG1769:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_splat(unsigned short vector[8], unsigned int)(<8 x i16> frozen [[REG1768]], i32 frozen zeroext 3) // CHECK-NEXT: store <8 x i16> [[REG1769]], <8 x i16>* [[REG1770:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG1771:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG1770]], align 16 -// CHECK-NEXT: [[REG1772:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_cmple(unsigned short vector[8], unsigned short vector[8])(<8 x i16> [[REG1771]], <8 x i16> ) +// CHECK-NEXT: [[REG1772:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_cmple(unsigned short vector[8], unsigned short vector[8])(<8 x i16> frozen [[REG1771]], <8 x i16> frozen ) // CHECK-NEXT: store <8 x i16> [[REG1772]], <8 x i16>* [[REG1773:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG1774:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG1764]], align 16 // CHECK-NEXT: [[REG1775:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG1774]] to <8 x i16> // CHECK-NEXT: [[REG1776:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG1770]], align 16 -// CHECK-NEXT: [[REG1777:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_sr(unsigned short vector[8], unsigned short vector[8])(<8 x i16> [[REG1775]], <8 x i16> [[REG1776]]) +// CHECK-NEXT: [[REG1777:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_sr(unsigned short vector[8], unsigned short vector[8])(<8 x i16> frozen [[REG1775]], <8 x i16> frozen [[REG1776]]) // CHECK-NEXT: store <8 x i16> [[REG1777]], <8 x i16>* [[REG1778:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG1779:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG1773]], align 16 // CHECK-NEXT: [[REG1780:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG1778]], align 16 // CHECK-NEXT: [[REG1781:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG1773]], align 16 -// CHECK-NEXT: [[REG1782:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_sel(unsigned short vector[8], unsigned short vector[8], bool vector[8])(<8 x i16> [[REG1779]], <8 x i16> [[REG1780]], <8 x i16> [[REG1781]]) +// CHECK-NEXT: [[REG1782:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_sel(unsigned short vector[8], unsigned short vector[8], bool vector[8])(<8 x i16> frozen [[REG1779]], <8 x i16> frozen [[REG1780]], <8 x i16> frozen [[REG1781]]) // CHECK-NEXT: store <8 x i16> [[REG1782]], <8 x i16>* [[REG1778]], align 16 // CHECK-NEXT: [[REG1783:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG1778]], align 16 // CHECK-NEXT: [[REG1784:[0-9a-zA-Z_%.]+]] = bitcast <8 x i16> [[REG1783]] to <2 x i64> // CHECK-NEXT: ret <2 x i64> [[REG1784]] -// CHECK: define available_externally <2 x i64> @_mm_srl_epi32(<2 x i64> [[REG1785:[0-9a-zA-Z_%.]+]], <2 x i64> [[REG1786:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x i64> @_mm_srl_epi32(<2 x i64> frozen [[REG1785:[0-9a-zA-Z_%.]+]], <2 x i64> frozen [[REG1786:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x i64> [[REG1785]], <2 x i64>* [[REG1787:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <2 x i64> [[REG1786]], <2 x i64>* [[REG1788:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <4 x i32> , <4 x i32>* [[REG1789:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG1790:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG1788]], align 16 // CHECK-NEXT: [[REG1791:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG1790]] to <4 x i32> -// CHECK-LE-NEXT: [[REG1792:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_splat(unsigned int vector[4], unsigned int)(<4 x i32> [[REG1791]], i32 zeroext 0) -// CHECK-BE-NEXT: [[REG1792:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_splat(unsigned int vector[4], unsigned int)(<4 x i32> [[REG1791]], i32 zeroext 1) +// CHECK-LE-NEXT: [[REG1792:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_splat(unsigned int vector[4], unsigned int)(<4 x i32> frozen [[REG1791]], i32 frozen zeroext 0) +// CHECK-BE-NEXT: [[REG1792:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_splat(unsigned int vector[4], unsigned int)(<4 x i32> frozen [[REG1791]], i32 frozen zeroext 1) // CHECK-NEXT: store <4 x i32> [[REG1792]], <4 x i32>* [[REG1793:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG1794:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG1793]], align 16 -// CHECK-NEXT: [[REG1795:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_cmplt(unsigned int vector[4], unsigned int vector[4])(<4 x i32> [[REG1794]], <4 x i32> ) +// CHECK-NEXT: [[REG1795:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_cmplt(unsigned int vector[4], unsigned int vector[4])(<4 x i32> frozen [[REG1794]], <4 x i32> frozen ) // CHECK-NEXT: store <4 x i32> [[REG1795]], <4 x i32>* [[REG1796:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG1797:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG1787]], align 16 // CHECK-NEXT: [[REG1798:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG1797]] to <4 x i32> // CHECK-NEXT: [[REG1799:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG1793]], align 16 -// CHECK-NEXT: [[REG1800:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_sr(unsigned int vector[4], unsigned int vector[4])(<4 x i32> [[REG1798]], <4 x i32> [[REG1799]]) +// CHECK-NEXT: [[REG1800:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_sr(unsigned int vector[4], unsigned int vector[4])(<4 x i32> frozen [[REG1798]], <4 x i32> frozen [[REG1799]]) // CHECK-NEXT: store <4 x i32> [[REG1800]], <4 x i32>* [[REG1801:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG1802:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG1796]], align 16 // CHECK-NEXT: [[REG1803:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG1801]], align 16 // CHECK-NEXT: [[REG1804:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG1796]], align 16 -// CHECK-NEXT: [[REG1805:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_sel(unsigned int vector[4], unsigned int vector[4], bool vector[4])(<4 x i32> [[REG1802]], <4 x i32> [[REG1803]], <4 x i32> [[REG1804]]) +// CHECK-NEXT: [[REG1805:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_sel(unsigned int vector[4], unsigned int vector[4], bool vector[4])(<4 x i32> frozen [[REG1802]], <4 x i32> frozen [[REG1803]], <4 x i32> frozen [[REG1804]]) // CHECK-NEXT: store <4 x i32> [[REG1805]], <4 x i32>* [[REG1801]], align 16 // CHECK-NEXT: [[REG1806:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG1801]], align 16 // CHECK-NEXT: [[REG1807:[0-9a-zA-Z_%.]+]] = bitcast <4 x i32> [[REG1806]] to <2 x i64> // CHECK-NEXT: ret <2 x i64> [[REG1807]] -// CHECK: define available_externally <2 x i64> @_mm_srl_epi64(<2 x i64> [[REG1808:[0-9a-zA-Z_%.]+]], <2 x i64> [[REG1809:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x i64> @_mm_srl_epi64(<2 x i64> frozen [[REG1808:[0-9a-zA-Z_%.]+]], <2 x i64> frozen [[REG1809:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x i64> [[REG1808]], <2 x i64>* [[REG1810:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <2 x i64> [[REG1809]], <2 x i64>* [[REG1811:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <2 x i64> , <2 x i64>* [[REG1812:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG1813:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG1811]], align 16 -// CHECK-NEXT: [[REG1814:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_splat(unsigned long long vector[2], unsigned int)(<2 x i64> [[REG1813]], i32 zeroext 0) +// CHECK-NEXT: [[REG1814:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_splat(unsigned long long vector[2], unsigned int)(<2 x i64> frozen [[REG1813]], i32 frozen zeroext 0) // CHECK-NEXT: store <2 x i64> [[REG1814]], <2 x i64>* [[REG1815:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG1816:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG1815]], align 16 -// CHECK-NEXT: [[REG1817:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_cmplt(unsigned long long vector[2], unsigned long long vector[2])(<2 x i64> [[REG1816]], <2 x i64> ) +// CHECK-NEXT: [[REG1817:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_cmplt(unsigned long long vector[2], unsigned long long vector[2])(<2 x i64> frozen [[REG1816]], <2 x i64> frozen ) // CHECK-NEXT: store <2 x i64> [[REG1817]], <2 x i64>* [[REG1818:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG1819:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG1810]], align 16 // CHECK-NEXT: [[REG1820:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG1815]], align 16 -// CHECK-NEXT: [[REG1821:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_sr(unsigned long long vector[2], unsigned long long vector[2])(<2 x i64> [[REG1819]], <2 x i64> [[REG1820]]) +// CHECK-NEXT: [[REG1821:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_sr(unsigned long long vector[2], unsigned long long vector[2])(<2 x i64> frozen [[REG1819]], <2 x i64> frozen [[REG1820]]) // CHECK-NEXT: store <2 x i64> [[REG1821]], <2 x i64>* [[REG1822:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG1823:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG1818]], align 16 // CHECK-NEXT: [[REG1824:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG1823]] to <2 x double> // CHECK-NEXT: [[REG1825:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG1822]], align 16 // CHECK-NEXT: [[REG1826:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG1825]] to <2 x double> // CHECK-NEXT: [[REG1827:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG1818]], align 16 -// CHECK-NEXT: [[REG1828:[0-9a-zA-Z_%.]+]] = call <2 x double> @vec_sel(double vector[2], double vector[2], bool vector[2])(<2 x double> [[REG1824]], <2 x double> [[REG1826]], <2 x i64> [[REG1827]]) +// CHECK-NEXT: [[REG1828:[0-9a-zA-Z_%.]+]] = call frozen <2 x double> @vec_sel(double vector[2], double vector[2], bool vector[2])(<2 x double> frozen [[REG1824]], <2 x double> frozen [[REG1826]], <2 x i64> frozen [[REG1827]]) // CHECK-NEXT: [[REG1829:[0-9a-zA-Z_%.]+]] = bitcast <2 x double> [[REG1828]] to <2 x i64> // CHECK-NEXT: store <2 x i64> [[REG1829]], <2 x i64>* [[REG1822]], align 16 // CHECK-NEXT: [[REG1830:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG1822]], align 16 // CHECK-NEXT: ret <2 x i64> [[REG1830]] -// CHECK: define available_externally <2 x i64> @_mm_srli_epi16(<2 x i64> [[REG1831:[0-9a-zA-Z_%.]+]], i32 signext [[REG1832:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x i64> @_mm_srli_epi16(<2 x i64> frozen [[REG1831:[0-9a-zA-Z_%.]+]], i32 frozen signext [[REG1832:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x i64> [[REG1831]], <2 x i64>* [[REG1833:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store i32 [[REG1832]], i32* [[REG1834:[0-9a-zA-Z_%.]+]], align 4 // CHECK-NEXT: store <8 x i16> zeroinitializer, <8 x i16>* [[REG1835:[0-9a-zA-Z_%.]+]], align 16 @@ -2759,20 +2759,20 @@ // CHECK: [[REG1840]]: // CHECK-NEXT: [[REG1842:[0-9a-zA-Z_%.]+]] = load i32, i32* [[REG1834]], align 4 // CHECK-NEXT: [[REG1843:[0-9a-zA-Z_%.]+]] = trunc i32 [[REG1842]] to i8 -// CHECK-NEXT: [[REG1844:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_splat_s16(signed char)(i8 signext [[REG1843]]) +// CHECK-NEXT: [[REG1844:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_splat_s16(signed char)(i8 frozen signext [[REG1843]]) // CHECK-NEXT: store <8 x i16> [[REG1844]], <8 x i16>* [[REG1845:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: br label %[[REG1846:[0-9a-zA-Z_%.]+]] // CHECK: [[REG1841]]: // CHECK-NEXT: [[REG1847:[0-9a-zA-Z_%.]+]] = load i32, i32* [[REG1834]], align 4 // CHECK-NEXT: [[REG1848:[0-9a-zA-Z_%.]+]] = trunc i32 [[REG1847]] to i16 -// CHECK-NEXT: [[REG1849:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_splats(unsigned short)(i16 zeroext [[REG1848]]) +// CHECK-NEXT: [[REG1849:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_splats(unsigned short)(i16 frozen zeroext [[REG1848]]) // CHECK-NEXT: store <8 x i16> [[REG1849]], <8 x i16>* [[REG1845]], align 16 // CHECK-NEXT: br label %[[REG1846:[0-9a-zA-Z_%.]+]] // CHECK: [[REG1846]]: // CHECK-NEXT: [[REG1850:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG1833]], align 16 // CHECK-NEXT: [[REG1851:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG1850]] to <8 x i16> // CHECK-NEXT: [[REG1852:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG1845]], align 16 -// CHECK-NEXT: [[REG1853:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_sr(short vector[8], unsigned short vector[8])(<8 x i16> [[REG1851]], <8 x i16> [[REG1852]]) +// CHECK-NEXT: [[REG1853:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_sr(short vector[8], unsigned short vector[8])(<8 x i16> frozen [[REG1851]], <8 x i16> frozen [[REG1852]]) // CHECK-NEXT: store <8 x i16> [[REG1853]], <8 x i16>* [[REG1835]], align 16 // CHECK-NEXT: br label %[[REG1839:[0-9a-zA-Z_%.]+]] // CHECK: [[REG1839]]: @@ -2780,7 +2780,7 @@ // CHECK-NEXT: [[REG1855:[0-9a-zA-Z_%.]+]] = bitcast <8 x i16> [[REG1854]] to <2 x i64> // CHECK-NEXT: ret <2 x i64> [[REG1855]] -// CHECK: define available_externally <2 x i64> @_mm_srli_epi32(<2 x i64> [[REG1856:[0-9a-zA-Z_%.]+]], i32 signext [[REG1857:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x i64> @_mm_srli_epi32(<2 x i64> frozen [[REG1856:[0-9a-zA-Z_%.]+]], i32 frozen signext [[REG1857:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x i64> [[REG1856]], <2 x i64>* [[REG1858:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store i32 [[REG1857]], i32* [[REG1859:[0-9a-zA-Z_%.]+]], align 4 // CHECK-NEXT: store <4 x i32> zeroinitializer, <4 x i32>* [[REG1860:[0-9a-zA-Z_%.]+]], align 16 @@ -2801,13 +2801,13 @@ // CHECK: [[REG1869]]: // CHECK-NEXT: [[REG1871:[0-9a-zA-Z_%.]+]] = load i32, i32* [[REG1859]], align 4 // CHECK-NEXT: [[REG1872:[0-9a-zA-Z_%.]+]] = trunc i32 [[REG1871]] to i8 -// CHECK-NEXT: [[REG1873:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_splat_s32(signed char)(i8 signext [[REG1872]]) +// CHECK-NEXT: [[REG1873:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_splat_s32(signed char)(i8 frozen signext [[REG1872]]) // CHECK-NEXT: store <4 x i32> [[REG1873]], <4 x i32>* [[REG1874:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: br label %[[REG1875:[0-9a-zA-Z_%.]+]] // CHECK: [[REG1870]]: // CHECK-NEXT: [[REG1876:[0-9a-zA-Z_%.]+]] = load i32, i32* [[REG1859]], align 4 -// CHECK-NEXT: [[REG1877:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_splats(unsigned int)(i32 zeroext [[REG1876]]) +// CHECK-NEXT: [[REG1877:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_splats(unsigned int)(i32 frozen zeroext [[REG1876]]) // CHECK-NEXT: store <4 x i32> [[REG1877]], <4 x i32>* [[REG1874]], align 16 // CHECK-NEXT: br label %[[REG1875:[0-9a-zA-Z_%.]+]] @@ -2816,7 +2816,7 @@ // CHECK: [[REG1866]]: // CHECK-NEXT: [[REG1879:[0-9a-zA-Z_%.]+]] = load i32, i32* [[REG1859]], align 4 -// CHECK-NEXT: [[REG1880:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_splats(unsigned int)(i32 zeroext [[REG1879]]) +// CHECK-NEXT: [[REG1880:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_splats(unsigned int)(i32 frozen zeroext [[REG1879]]) // CHECK-NEXT: store <4 x i32> [[REG1880]], <4 x i32>* [[REG1874]], align 16 // CHECK-NEXT: br label %[[REG1878:[0-9a-zA-Z_%.]+]] @@ -2824,7 +2824,7 @@ // CHECK-NEXT: [[REG1881:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG1858]], align 16 // CHECK-NEXT: [[REG1882:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG1881]] to <4 x i32> // CHECK-NEXT: [[REG1883:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG1874]], align 16 -// CHECK-NEXT: [[REG1884:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_sr(int vector[4], unsigned int vector[4])(<4 x i32> [[REG1882]], <4 x i32> [[REG1883]]) +// CHECK-NEXT: [[REG1884:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_sr(int vector[4], unsigned int vector[4])(<4 x i32> frozen [[REG1882]], <4 x i32> frozen [[REG1883]]) // CHECK-NEXT: store <4 x i32> [[REG1884]], <4 x i32>* [[REG1860]], align 16 // CHECK-NEXT: br label %[[REG1864:[0-9a-zA-Z_%.]+]] @@ -2833,7 +2833,7 @@ // CHECK-NEXT: [[REG1886:[0-9a-zA-Z_%.]+]] = bitcast <4 x i32> [[REG1885]] to <2 x i64> // CHECK-NEXT: ret <2 x i64> [[REG1886]] -// CHECK: define available_externally <2 x i64> @_mm_srli_epi64(<2 x i64> [[REG1887:[0-9a-zA-Z_%.]+]], i32 signext [[REG1888:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x i64> @_mm_srli_epi64(<2 x i64> frozen [[REG1887:[0-9a-zA-Z_%.]+]], i32 frozen signext [[REG1888:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x i64> [[REG1887]], <2 x i64>* [[REG1889:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store i32 [[REG1888]], i32* [[REG1890:[0-9a-zA-Z_%.]+]], align 4 // CHECK-NEXT: store <2 x i64> zeroinitializer, <2 x i64>* [[REG1891:[0-9a-zA-Z_%.]+]], align 16 @@ -2854,7 +2854,7 @@ // CHECK: [[REG1900]]: // CHECK-NEXT: [[REG1902:[0-9a-zA-Z_%.]+]] = load i32, i32* [[REG1890]], align 4 // CHECK-NEXT: [[REG1903:[0-9a-zA-Z_%.]+]] = trunc i32 [[REG1902]] to i8 -// CHECK-NEXT: [[REG1904:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_splat_s32(signed char)(i8 signext [[REG1903]]) +// CHECK-NEXT: [[REG1904:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_splat_s32(signed char)(i8 frozen signext [[REG1903]]) // CHECK-NEXT: [[REG1905:[0-9a-zA-Z_%.]+]] = bitcast <4 x i32> [[REG1904]] to <2 x i64> // CHECK-NEXT: store <2 x i64> [[REG1905]], <2 x i64>* [[REG1906:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: br label %[[REG1907:[0-9a-zA-Z_%.]+]] @@ -2862,7 +2862,7 @@ // CHECK: [[REG1901]]: // CHECK-NEXT: [[REG1908:[0-9a-zA-Z_%.]+]] = load i32, i32* [[REG1890]], align 4 // CHECK-NEXT: [[REG1909:[0-9a-zA-Z_%.]+]] = sext i32 [[REG1908]] to i64 -// CHECK-NEXT: [[REG1910:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_splats(unsigned long long)(i64 [[REG1909]]) +// CHECK-NEXT: [[REG1910:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_splats(unsigned long long)(i64 frozen [[REG1909]]) // CHECK-NEXT: store <2 x i64> [[REG1910]], <2 x i64>* [[REG1906]], align 16 // CHECK-NEXT: br label %[[REG1907:[0-9a-zA-Z_%.]+]] @@ -2871,7 +2871,7 @@ // CHECK: [[REG1897]]: // CHECK-NEXT: [[REG1912:[0-9a-zA-Z_%.]+]] = load i32, i32* [[REG1890]], align 4 -// CHECK-NEXT: [[REG1913:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_splats(unsigned int)(i32 zeroext [[REG1912]]) +// CHECK-NEXT: [[REG1913:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_splats(unsigned int)(i32 frozen zeroext [[REG1912]]) // CHECK-NEXT: [[REG1914:[0-9a-zA-Z_%.]+]] = bitcast <4 x i32> [[REG1913]] to <2 x i64> // CHECK-NEXT: store <2 x i64> [[REG1914]], <2 x i64>* [[REG1906]], align 16 // CHECK-NEXT: br label %[[REG1911:[0-9a-zA-Z_%.]+]] @@ -2879,7 +2879,7 @@ // CHECK: [[REG1911]]: // CHECK-NEXT: [[REG1915:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG1889]], align 16 // CHECK-NEXT: [[REG1916:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG1906]], align 16 -// CHECK-NEXT: [[REG1917:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_sr(long long vector[2], unsigned long long vector[2])(<2 x i64> [[REG1915]], <2 x i64> [[REG1916]]) +// CHECK-NEXT: [[REG1917:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_sr(long long vector[2], unsigned long long vector[2])(<2 x i64> frozen [[REG1915]], <2 x i64> frozen [[REG1916]]) // CHECK-NEXT: store <2 x i64> [[REG1917]], <2 x i64>* [[REG1891]], align 16 // CHECK-NEXT: br label %[[REG1895:[0-9a-zA-Z_%.]+]] @@ -2887,8 +2887,8 @@ // CHECK-NEXT: [[REG1918:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG1891]], align 16 // CHECK-NEXT: ret <2 x i64> [[REG1918]] -// CHECK: define available_externally <2 x i64> @_mm_srli_si128 -// CHECK: [[REG1919:[0-9a-zA-Z_%.]+]] = call <2 x i64> @_mm_bsrli_si128 +// CHECK: define available_externally frozen <2 x i64> @_mm_srli_si128 +// CHECK: [[REG1919:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @_mm_bsrli_si128 // CHECK-NEXT: ret <2 x i64> [[REG1919]] void __attribute__((noinline)) @@ -2908,25 +2908,25 @@ // CHECK-LABEL: @test_store -// CHECK: define available_externally void @_mm_store_pd(double* [[REG1920:[0-9a-zA-Z_%.]+]], <2 x double> [[REG1921:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally void @_mm_store_pd(double* frozen [[REG1920:[0-9a-zA-Z_%.]+]], <2 x double> frozen [[REG1921:[0-9a-zA-Z_%.]+]]) // CHECK: store double* [[REG1920]], double** [[REG1922:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: store <2 x double> [[REG1921]], <2 x double>* [[REG1923:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG1924:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG1923]], align 16 // CHECK-NEXT: [[REG1925:[0-9a-zA-Z_%.]+]] = bitcast <2 x double> [[REG1924]] to <16 x i8> // CHECK-NEXT: [[REG1926:[0-9a-zA-Z_%.]+]] = load double*, double** [[REG1922]], align 8 // CHECK-NEXT: [[REG1927:[0-9a-zA-Z_%.]+]] = bitcast double* [[REG1926]] to <16 x i8>* -// CHECK-NEXT: call void @vec_st(unsigned char vector[16], int, unsigned char vector[16]*)(<16 x i8> [[REG1925]], i32 signext 0, <16 x i8>* [[REG1927]]) +// CHECK-NEXT: call void @vec_st(unsigned char vector[16], int, unsigned char vector[16]*)(<16 x i8> frozen [[REG1925]], i32 frozen signext 0, <16 x i8>* frozen [[REG1927]]) // CHECK-NEXT: ret void -// CHECK: define available_externally void @_mm_store_pd1(double* [[REG1928:[0-9a-zA-Z_%.]+]], <2 x double> [[REG1929:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally void @_mm_store_pd1(double* frozen [[REG1928:[0-9a-zA-Z_%.]+]], <2 x double> frozen [[REG1929:[0-9a-zA-Z_%.]+]]) // CHECK: store double* [[REG1928]], double** [[REG1930:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: store <2 x double> [[REG1929]], <2 x double>* [[REG1931:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG1932:[0-9a-zA-Z_%.]+]] = load double*, double** [[REG1930]], align 8 // CHECK-NEXT: [[REG1933:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG1931]], align 16 -// CHECK-NEXT: call void @_mm_store1_pd(double* [[REG1932]], <2 x double> [[REG1933]]) +// CHECK-NEXT: call void @_mm_store1_pd(double* frozen [[REG1932]], <2 x double> frozen [[REG1933]]) // CHECK-NEXT: ret void -// CHECK: define available_externally void @_mm_store_sd(double* [[REG1934:[0-9a-zA-Z_%.]+]], <2 x double> [[REG1935:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally void @_mm_store_sd(double* frozen [[REG1934:[0-9a-zA-Z_%.]+]], <2 x double> frozen [[REG1935:[0-9a-zA-Z_%.]+]]) // CHECK: store double* [[REG1934]], double** [[REG1936:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: store <2 x double> [[REG1935]], <2 x double>* [[REG1937:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG1938:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG1937]], align 16 @@ -2935,26 +2935,26 @@ // CHECK-NEXT: store double [[REG1939]], double* [[REG1940]], align 8 // CHECK-NEXT: ret void -// CHECK: define available_externally void @_mm_store_si128(<2 x i64>* [[REG1941:[0-9a-zA-Z_%.]+]], <2 x i64> [[REG1942:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally void @_mm_store_si128(<2 x i64>* frozen [[REG1941:[0-9a-zA-Z_%.]+]], <2 x i64> frozen [[REG1942:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x i64>* [[REG1941]], <2 x i64>** [[REG1943:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: store <2 x i64> [[REG1942]], <2 x i64>* [[REG1944:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG1945:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG1944]], align 16 // CHECK-NEXT: [[REG1946:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG1945]] to <16 x i8> // CHECK-NEXT: [[REG1947:[0-9a-zA-Z_%.]+]] = load <2 x i64>*, <2 x i64>** [[REG1943]], align 8 // CHECK-NEXT: [[REG1948:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64>* [[REG1947]] to <16 x i8>* -// CHECK-NEXT: call void @vec_st(unsigned char vector[16], int, unsigned char vector[16]*)(<16 x i8> [[REG1946]], i32 signext 0, <16 x i8>* [[REG1948]]) +// CHECK-NEXT: call void @vec_st(unsigned char vector[16], int, unsigned char vector[16]*)(<16 x i8> frozen [[REG1946]], i32 frozen signext 0, <16 x i8>* frozen [[REG1948]]) // CHECK-NEXT: ret void -// CHECK: define available_externally void @_mm_store1_pd(double* [[REG1949:[0-9a-zA-Z_%.]+]], <2 x double> [[REG1950:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally void @_mm_store1_pd(double* frozen [[REG1949:[0-9a-zA-Z_%.]+]], <2 x double> frozen [[REG1950:[0-9a-zA-Z_%.]+]]) // CHECK: store double* [[REG1949]], double** [[REG1951:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: store <2 x double> [[REG1950]], <2 x double>* [[REG1952:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG1953:[0-9a-zA-Z_%.]+]] = load double*, double** [[REG1951]], align 8 // CHECK-NEXT: [[REG1954:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG1952]], align 16 -// CHECK-NEXT: [[REG1955:[0-9a-zA-Z_%.]+]] = call <2 x double> @vec_splat(double vector[2], unsigned int)(<2 x double> [[REG1954]], i32 zeroext 0) -// CHECK-NEXT: call void @_mm_store_pd(double* [[REG1953]], <2 x double> [[REG1955]]) +// CHECK-NEXT: [[REG1955:[0-9a-zA-Z_%.]+]] = call frozen <2 x double> @vec_splat(double vector[2], unsigned int)(<2 x double> frozen [[REG1954]], i32 frozen zeroext 0) +// CHECK-NEXT: call void @_mm_store_pd(double* frozen [[REG1953]], <2 x double> frozen [[REG1955]]) // CHECK-NEXT: ret void -// CHECK: define available_externally void @_mm_storeh_pd(double* [[REG1956:[0-9a-zA-Z_%.]+]], <2 x double> [[REG1957:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally void @_mm_storeh_pd(double* frozen [[REG1956:[0-9a-zA-Z_%.]+]], <2 x double> frozen [[REG1957:[0-9a-zA-Z_%.]+]]) // CHECK: store double* [[REG1956]], double** [[REG1958:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: store <2 x double> [[REG1957]], <2 x double>* [[REG1959:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG1960:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG1959]], align 16 @@ -2963,7 +2963,7 @@ // CHECK-NEXT: store double [[REG1961]], double* [[REG1962]], align 8 // CHECK-NEXT: ret void -// CHECK: define available_externally void @_mm_storel_epi64(<2 x i64>* [[REG1963:[0-9a-zA-Z_%.]+]], <2 x i64> [[REG1964:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally void @_mm_storel_epi64(<2 x i64>* frozen [[REG1963:[0-9a-zA-Z_%.]+]], <2 x i64> frozen [[REG1964:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x i64>* [[REG1963]], <2 x i64>** [[REG1965:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: store <2 x i64> [[REG1964]], <2 x i64>* [[REG1966:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG1967:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG1966]], align 16 @@ -2973,15 +2973,15 @@ // CHECK-NEXT: store i64 [[REG1968]], i64* [[REG1970]], align 8 // CHECK-NEXT: ret void -// CHECK: define available_externally void @_mm_storel_pd(double* [[REG1971:[0-9a-zA-Z_%.]+]], <2 x double> [[REG1972:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally void @_mm_storel_pd(double* frozen [[REG1971:[0-9a-zA-Z_%.]+]], <2 x double> frozen [[REG1972:[0-9a-zA-Z_%.]+]]) // CHECK: store double* [[REG1971]], double** [[REG1973:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: store <2 x double> [[REG1972]], <2 x double>* [[REG1974:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG1975:[0-9a-zA-Z_%.]+]] = load double*, double** [[REG1973]], align 8 // CHECK-NEXT: [[REG1976:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG1974]], align 16 -// CHECK-NEXT: call void @_mm_store_sd(double* [[REG1975]], <2 x double> [[REG1976]]) +// CHECK-NEXT: call void @_mm_store_sd(double* frozen [[REG1975]], <2 x double> frozen [[REG1976]]) // CHECK-NEXT: ret void -// CHECK: define available_externally void @_mm_storer_pd(double* [[REG1977:[0-9a-zA-Z_%.]+]], <2 x double> [[REG1978:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally void @_mm_storer_pd(double* frozen [[REG1977:[0-9a-zA-Z_%.]+]], <2 x double> frozen [[REG1978:[0-9a-zA-Z_%.]+]]) // CHECK: store double* [[REG1977]], double** [[REG1979:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: store <2 x double> [[REG1978]], <2 x double>* [[REG1980:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG1981:[0-9a-zA-Z_%.]+]] = load double*, double** [[REG1979]], align 8 @@ -2991,10 +2991,10 @@ // CHECK-NEXT: [[REG1985:[0-9a-zA-Z_%.]+]] = bitcast <2 x double> [[REG1983]] to <2 x i64> // CHECK-NEXT: [[REG1986:[0-9a-zA-Z_%.]+]] = shufflevector <2 x i64> [[REG1984]], <2 x i64> [[REG1985]], <2 x i32> // CHECK-NEXT: [[REG1987:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG1986]] to <2 x double> -// CHECK-NEXT: call void @_mm_store_pd(double* [[REG1981]], <2 x double> [[REG1987]]) +// CHECK-NEXT: call void @_mm_store_pd(double* frozen [[REG1981]], <2 x double> frozen [[REG1987]]) // CHECK-NEXT: ret void -// CHECK: define available_externally void @_mm_storeu_pd(double* [[REG1988:[0-9a-zA-Z_%.]+]], <2 x double> [[REG1989:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally void @_mm_storeu_pd(double* frozen [[REG1988:[0-9a-zA-Z_%.]+]], <2 x double> frozen [[REG1989:[0-9a-zA-Z_%.]+]]) // CHECK: store double* [[REG1988]], double** [[REG1990:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: store <2 x double> [[REG1989]], <2 x double>* [[REG1991:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG1992:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG1991]], align 16 @@ -3003,7 +3003,7 @@ // CHECK-NEXT: store <2 x double> [[REG1992]], <2 x double>* [[REG1994]], align 1 // CHECK-NEXT: ret void -// CHECK: define available_externally void @_mm_storeu_si128(<2 x i64>* [[REG1995:[0-9a-zA-Z_%.]+]], <2 x i64> [[REG1996:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally void @_mm_storeu_si128(<2 x i64>* frozen [[REG1995:[0-9a-zA-Z_%.]+]], <2 x i64> frozen [[REG1996:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x i64>* [[REG1995]], <2 x i64>** [[REG1997:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: store <2 x i64> [[REG1996]], <2 x i64>* [[REG1998:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG1999:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG1998]], align 16 @@ -3021,42 +3021,42 @@ // CHECK-LABEL: @test_stream -// CHECK: define available_externally void @_mm_stream_pd(double* [[REG2001:[0-9a-zA-Z_%.]+]], <2 x double> [[REG2002:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally void @_mm_stream_pd(double* frozen [[REG2001:[0-9a-zA-Z_%.]+]], <2 x double> frozen [[REG2002:[0-9a-zA-Z_%.]+]]) // CHECK: store double* [[REG2001]], double** [[REG2003:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: store <2 x double> [[REG2002]], <2 x double>* [[REG2004:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG2005:[0-9a-zA-Z_%.]+]] = load double*, double** [[REG2003]], align 8 -// CHECK-NEXT: call void asm sideeffect "dcbtstt 0,$0", "b,~{memory}"(double* [[REG2005]]) +// CHECK-NEXT: call void asm sideeffect "dcbtstt 0,$0", "b,~{memory}"(double* [[REG2005]]) // CHECK-NEXT: [[REG2006:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG2004]], align 16 // CHECK-NEXT: [[REG2007:[0-9a-zA-Z_%.]+]] = load double*, double** [[REG2003]], align 8 // CHECK-NEXT: [[REG2008:[0-9a-zA-Z_%.]+]] = bitcast double* [[REG2007]] to <2 x double>* // CHECK-NEXT: store <2 x double> [[REG2006]], <2 x double>* [[REG2008]], align 16 // CHECK-NEXT: ret void -// CHECK: define available_externally void @_mm_stream_si128(<2 x i64>* [[REG2009:[0-9a-zA-Z_%.]+]], <2 x i64> [[REG2010:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally void @_mm_stream_si128(<2 x i64>* frozen [[REG2009:[0-9a-zA-Z_%.]+]], <2 x i64> frozen [[REG2010:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x i64>* [[REG2009]], <2 x i64>** [[REG2011:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: store <2 x i64> [[REG2010]], <2 x i64>* [[REG2012:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG2013:[0-9a-zA-Z_%.]+]] = load <2 x i64>*, <2 x i64>** [[REG2011]], align 8 -// CHECK-NEXT: call void asm sideeffect "dcbtstt 0,$0", "b,~{memory}"(<2 x i64>* [[REG2013]]) +// CHECK-NEXT: call void asm sideeffect "dcbtstt 0,$0", "b,~{memory}"(<2 x i64>* [[REG2013]]) // CHECK-NEXT: [[REG2014:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG2012]], align 16 // CHECK-NEXT: [[REG2015:[0-9a-zA-Z_%.]+]] = load <2 x i64>*, <2 x i64>** [[REG2011]], align 8 // CHECK-NEXT: store <2 x i64> [[REG2014]], <2 x i64>* [[REG2015]], align 16 // CHECK-NEXT: ret void -// CHECK: define available_externally void @_mm_stream_si32(i32* [[REG2016:[0-9a-zA-Z_%.]+]], i32 signext [[REG2017:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally void @_mm_stream_si32(i32* frozen [[REG2016:[0-9a-zA-Z_%.]+]], i32 frozen signext [[REG2017:[0-9a-zA-Z_%.]+]]) // CHECK: store i32* [[REG2016]], i32** [[REG2018:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: store i32 [[REG2017]], i32* [[REG2019:[0-9a-zA-Z_%.]+]], align 4 // CHECK-NEXT: [[REG2020:[0-9a-zA-Z_%.]+]] = load i32*, i32** [[REG2018]], align 8 -// CHECK-NEXT: call void asm sideeffect "dcbtstt 0,$0", "b,~{memory}"(i32* [[REG2020]]) +// CHECK-NEXT: call void asm sideeffect "dcbtstt 0,$0", "b,~{memory}"(i32* [[REG2020]]) // CHECK-NEXT: [[REG2021:[0-9a-zA-Z_%.]+]] = load i32, i32* [[REG2019]], align 4 // CHECK-NEXT: [[REG2022:[0-9a-zA-Z_%.]+]] = load i32*, i32** [[REG2018]], align 8 // CHECK-NEXT: store i32 [[REG2021]], i32* [[REG2022]], align 4 // CHECK-NEXT: ret void -// CHECK: define available_externally void @_mm_stream_si64(i64* [[REG2023:[0-9a-zA-Z_%.]+]], i64 [[REG2024:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally void @_mm_stream_si64(i64* frozen [[REG2023:[0-9a-zA-Z_%.]+]], i64 frozen [[REG2024:[0-9a-zA-Z_%.]+]]) // CHECK: store i64* [[REG2023]], i64** [[REG2025:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: store i64 [[REG2024]], i64* [[REG2026:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: [[REG2027:[0-9a-zA-Z_%.]+]] = load i64*, i64** [[REG2025]], align 8 -// CHECK-NEXT: call void asm sideeffect "\09dcbtstt\090,$0", "b,~{memory}"(i64* [[REG2027]]) +// CHECK-NEXT: call void asm sideeffect "\09dcbtstt\090,$0", "b,~{memory}"(i64* [[REG2027]]) // CHECK-NEXT: [[REG2028:[0-9a-zA-Z_%.]+]] = load i64, i64* [[REG2026]], align 8 // CHECK-NEXT: [[REG2029:[0-9a-zA-Z_%.]+]] = load i64*, i64** [[REG2025]], align 8 // CHECK-NEXT: store i64 [[REG2028]], i64* [[REG2029]], align 8 @@ -3079,30 +3079,30 @@ // CHECK-LABEL: @test_sub -// CHECK: define available_externally <2 x i64> @_mm_sub_epi64 +// CHECK: define available_externally frozen <2 x i64> @_mm_sub_epi64 // CHECK: [[REG2030:[0-9a-zA-Z_%.]+]] = sub <2 x i64> {{[0-9a-zA-Z_%.]+}}, {{[0-9a-zA-Z_%.]+}} // CHECK-NEXT: ret <2 x i64> [[REG2030]] -// CHECK: define available_externally <2 x i64> @_mm_sub_epi32 +// CHECK: define available_externally frozen <2 x i64> @_mm_sub_epi32 // CHECK: [[REG2031:[0-9a-zA-Z_%.]+]] = sub <4 x i32> {{[0-9a-zA-Z_%.]+}}, {{[0-9a-zA-Z_%.]+}} // CHECK-NEXT: [[REG2032:[0-9a-zA-Z_%.]+]] = bitcast <4 x i32> [[REG2031]] to <2 x i64> // CHECK-NEXT: ret <2 x i64> [[REG2032]] -// CHECK: define available_externally <2 x i64> @_mm_sub_epi16 +// CHECK: define available_externally frozen <2 x i64> @_mm_sub_epi16 // CHECK: [[REG2033:[0-9a-zA-Z_%.]+]] = sub <8 x i16> {{[0-9a-zA-Z_%.]+}}, {{[0-9a-zA-Z_%.]+}} // CHECK-NEXT: [[REG2034:[0-9a-zA-Z_%.]+]] = bitcast <8 x i16> [[REG2033]] to <2 x i64> // CHECK-NEXT: ret <2 x i64> [[REG2034]] -// CHECK: define available_externally <2 x i64> @_mm_sub_epi8 +// CHECK: define available_externally frozen <2 x i64> @_mm_sub_epi8 // CHECK: [[REG2035:[0-9a-zA-Z_%.]+]] = sub <16 x i8> {{[0-9a-zA-Z_%.]+}}, {{[0-9a-zA-Z_%.]+}} // CHECK-NEXT: [[REG2036:[0-9a-zA-Z_%.]+]] = bitcast <16 x i8> [[REG2035]] to <2 x i64> // CHECK-NEXT: ret <2 x i64> [[REG2036]] -// CHECK: define available_externally <2 x double> @_mm_sub_pd +// CHECK: define available_externally frozen <2 x double> @_mm_sub_pd // CHECK: [[REG2037:[0-9a-zA-Z_%.]+]] = fsub <2 x double> {{[0-9a-zA-Z_%.]+}}, {{[0-9a-zA-Z_%.]+}} // CHECK-NEXT: ret <2 x double> [[REG2037]] -// CHECK: define available_externally <2 x double> @_mm_sub_sd(<2 x double> [[REG2038:[0-9a-zA-Z_%.]+]], <2 x double> [[REG2039:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x double> @_mm_sub_sd(<2 x double> frozen [[REG2038:[0-9a-zA-Z_%.]+]], <2 x double> frozen [[REG2039:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x double> [[REG2038]], <2 x double>* [[REG2040:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <2 x double> [[REG2039]], <2 x double>* [[REG2041:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG2042:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG2040]], align 16 @@ -3116,27 +3116,27 @@ // CHECK-NEXT: [[REG2049:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG2040]], align 16 // CHECK-NEXT: ret <2 x double> [[REG2049]] -// CHECK: define available_externally i64 @_mm_sub_si64 +// CHECK: define available_externally frozen i64 @_mm_sub_si64 // CHECK: [[REG2050:[0-9a-zA-Z_%.]+]] = sub i64 {{[0-9a-zA-Z_%.]+}}, {{[0-9a-zA-Z_%.]+}} // CHECK-NEXT: ret i64 [[REG2050]] -// CHECK: define available_externally <2 x i64> @_mm_subs_epi16 -// CHECK: [[REG2051:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_subs(short vector[8], short vector[8]) +// CHECK: define available_externally frozen <2 x i64> @_mm_subs_epi16 +// CHECK: [[REG2051:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_subs(short vector[8], short vector[8]) // CHECK-NEXT: [[REG2052:[0-9a-zA-Z_%.]+]] = bitcast <8 x i16> [[REG2051]] to <2 x i64> // CHECK-NEXT: ret <2 x i64> [[REG2052]] -// CHECK: define available_externally <2 x i64> @_mm_subs_epi8 -// CHECK: [[REG2053:[0-9a-zA-Z_%.]+]] = call <16 x i8> @vec_subs(signed char vector[16], signed char vector[16]) +// CHECK: define available_externally frozen <2 x i64> @_mm_subs_epi8 +// CHECK: [[REG2053:[0-9a-zA-Z_%.]+]] = call frozen <16 x i8> @vec_subs(signed char vector[16], signed char vector[16]) // CHECK-NEXT: [[REG2054:[0-9a-zA-Z_%.]+]] = bitcast <16 x i8> [[REG2053]] to <2 x i64> // CHECK-NEXT: ret <2 x i64> [[REG2054]] -// CHECK: define available_externally <2 x i64> @_mm_subs_epu16 -// CHECK: [[REG2055:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_subs(unsigned short vector[8], unsigned short vector[8]) +// CHECK: define available_externally frozen <2 x i64> @_mm_subs_epu16 +// CHECK: [[REG2055:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_subs(unsigned short vector[8], unsigned short vector[8]) // CHECK-NEXT: [[REG2056:[0-9a-zA-Z_%.]+]] = bitcast <8 x i16> [[REG2055]] to <2 x i64> // CHECK-NEXT: ret <2 x i64> [[REG2056]] -// CHECK: define available_externally <2 x i64> @_mm_subs_epu8 -// CHECK: [[REG2057:[0-9a-zA-Z_%.]+]] = call <16 x i8> @vec_subs(unsigned char vector[16], unsigned char vector[16]) +// CHECK: define available_externally frozen <2 x i64> @_mm_subs_epu8 +// CHECK: [[REG2057:[0-9a-zA-Z_%.]+]] = call frozen <16 x i8> @vec_subs(unsigned char vector[16], unsigned char vector[16]) // CHECK-NEXT: [[REG2058:[0-9a-zA-Z_%.]+]] = bitcast <16 x i8> [[REG2057]] to <2 x i64> // CHECK-NEXT: ret <2 x i64> [[REG2058]] @@ -3152,7 +3152,7 @@ // CHECK-LABEL: @test_ucomi -// CHECK: define available_externally signext i32 @_mm_ucomieq_sd(<2 x double> [[REG2059:[0-9a-zA-Z_%.]+]], <2 x double> [[REG2060:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen signext i32 @_mm_ucomieq_sd(<2 x double> frozen [[REG2059:[0-9a-zA-Z_%.]+]], <2 x double> frozen [[REG2060:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x double> [[REG2059]], <2 x double>* [[REG2061:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <2 x double> [[REG2060]], <2 x double>* [[REG2062:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG2063:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG2061]], align 16 @@ -3163,27 +3163,27 @@ // CHECK-NEXT: [[REG2068:[0-9a-zA-Z_%.]+]] = zext i1 [[REG2067]] to i32 // CHECK-NEXT: ret i32 [[REG2068]] -// CHECK: define available_externally signext i32 @_mm_ucomige_sd +// CHECK: define available_externally frozen signext i32 @_mm_ucomige_sd // CHECK: [[REG2069:[0-9a-zA-Z_%.]+]] = fcmp oge double {{[0-9a-zA-Z_%.]+}}, {{[0-9a-zA-Z_%.]+}} // CHECK-NEXT: [[REG2070:[0-9a-zA-Z_%.]+]] = zext i1 [[REG2069]] to i32 // CHECK-NEXT: ret i32 [[REG2070]] -// CHECK: define available_externally signext i32 @_mm_ucomigt_sd +// CHECK: define available_externally frozen signext i32 @_mm_ucomigt_sd // CHECK: [[REG2071:[0-9a-zA-Z_%.]+]] = fcmp ogt double {{[0-9a-zA-Z_%.]+}}, {{[0-9a-zA-Z_%.]+}} // CHECK-NEXT: [[REG2072:[0-9a-zA-Z_%.]+]] = zext i1 [[REG2071]] to i32 // CHECK-NEXT: ret i32 [[REG2072]] -// CHECK: define available_externally signext i32 @_mm_ucomile_sd +// CHECK: define available_externally frozen signext i32 @_mm_ucomile_sd // CHECK: [[REG2073:[0-9a-zA-Z_%.]+]] = fcmp ole double {{[0-9a-zA-Z_%.]+}}, {{[0-9a-zA-Z_%.]+}} // CHECK-NEXT: [[REG2074:[0-9a-zA-Z_%.]+]] = zext i1 [[REG2073]] to i32 // CHECK-NEXT: ret i32 [[REG2074]] -// CHECK: define available_externally signext i32 @_mm_ucomilt_sd +// CHECK: define available_externally frozen signext i32 @_mm_ucomilt_sd // CHECK: [[REG2075:[0-9a-zA-Z_%.]+]] = fcmp olt double {{[0-9a-zA-Z_%.]+}}, {{[0-9a-zA-Z_%.]+}} // CHECK-NEXT: [[REG2076:[0-9a-zA-Z_%.]+]] = zext i1 [[REG2075]] to i32 // CHECK-NEXT: ret i32 [[REG2076]] -// CHECK: define available_externally signext i32 @_mm_ucomineq_sd +// CHECK: define available_externally frozen signext i32 @_mm_ucomineq_sd // CHECK: [[REG2077:[0-9a-zA-Z_%.]+]] = fcmp une double {{[0-9a-zA-Z_%.]+}}, {{[0-9a-zA-Z_%.]+}} // CHECK-NEXT: [[REG2078:[0-9a-zA-Z_%.]+]] = zext i1 [[REG2077]] to i32 // CHECK-NEXT: ret i32 [[REG2078]] @@ -3196,13 +3196,13 @@ // CHECK-LABEL: @test_undefined -// CHECK: define available_externally <2 x double> @_mm_undefined_pd() +// CHECK: define available_externally frozen <2 x double> @_mm_undefined_pd() // CHECK: [[REG2079:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG2080:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <2 x double> [[REG2079]], <2 x double>* [[REG2080]], align 16 // CHECK-NEXT: [[REG2081:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG2080]], align 16 // CHECK-NEXT: ret <2 x double> [[REG2081]] -// CHECK: define available_externally <2 x i64> @_mm_undefined_si128() +// CHECK: define available_externally frozen <2 x i64> @_mm_undefined_si128() // CHECK: [[REG2082:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG2083:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <2 x i64> [[REG2082]], <2 x i64>* [[REG2083]], align 16 // CHECK-NEXT: [[REG2084:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG2083]], align 16 @@ -3224,48 +3224,48 @@ // CHECK-LABEL: @test_unpack -// CHECK: define available_externally <2 x i64> @_mm_unpackhi_epi16 -// CHECK: [[REG2085:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_mergel(unsigned short vector[8], unsigned short vector[8]) +// CHECK: define available_externally frozen <2 x i64> @_mm_unpackhi_epi16 +// CHECK: [[REG2085:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_mergel(unsigned short vector[8], unsigned short vector[8]) // CHECK-NEXT: [[REG2086:[0-9a-zA-Z_%.]+]] = bitcast <8 x i16> [[REG2085]] to <2 x i64> // CHECK-NEXT: ret <2 x i64> [[REG2086]] -// CHECK: define available_externally <2 x i64> @_mm_unpackhi_epi32 -// CHECK: [[REG2087:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_mergel(unsigned int vector[4], unsigned int vector[4]) +// CHECK: define available_externally frozen <2 x i64> @_mm_unpackhi_epi32 +// CHECK: [[REG2087:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_mergel(unsigned int vector[4], unsigned int vector[4]) // CHECK-NEXT: [[REG2088:[0-9a-zA-Z_%.]+]] = bitcast <4 x i32> [[REG2087]] to <2 x i64> // CHECK-NEXT: ret <2 x i64> [[REG2088]] -// CHECK: define available_externally <2 x i64> @_mm_unpackhi_epi64 -// CHECK: [[REG2089:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_mergel(long long vector[2], long long vector[2]) +// CHECK: define available_externally frozen <2 x i64> @_mm_unpackhi_epi64 +// CHECK: [[REG2089:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_mergel(long long vector[2], long long vector[2]) // CHECK-NEXT: ret <2 x i64> [[REG2089]] -// CHECK: define available_externally <2 x i64> @_mm_unpackhi_epi8 -// CHECK: [[REG2090:[0-9a-zA-Z_%.]+]] = call <16 x i8> @vec_mergel(unsigned char vector[16], unsigned char vector[16]) +// CHECK: define available_externally frozen <2 x i64> @_mm_unpackhi_epi8 +// CHECK: [[REG2090:[0-9a-zA-Z_%.]+]] = call frozen <16 x i8> @vec_mergel(unsigned char vector[16], unsigned char vector[16]) // CHECK-NEXT: [[REG2091:[0-9a-zA-Z_%.]+]] = bitcast <16 x i8> [[REG2090]] to <2 x i64> // CHECK-NEXT: ret <2 x i64> [[REG2091]] -// CHECK: define available_externally <2 x double> @_mm_unpackhi_pd -// CHECK: [[REG2092:[0-9a-zA-Z_%.]+]] = call <2 x double> @vec_mergel(double vector[2], double vector[2]) +// CHECK: define available_externally frozen <2 x double> @_mm_unpackhi_pd +// CHECK: [[REG2092:[0-9a-zA-Z_%.]+]] = call frozen <2 x double> @vec_mergel(double vector[2], double vector[2]) // CHECK-NEXT: ret <2 x double> [[REG2092]] -// CHECK: define available_externally <2 x i64> @_mm_unpacklo_epi16 -// CHECK: [[REG2093:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_mergeh(short vector[8], short vector[8]) +// CHECK: define available_externally frozen <2 x i64> @_mm_unpacklo_epi16 +// CHECK: [[REG2093:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_mergeh(short vector[8], short vector[8]) // CHECK-NEXT: [[REG2094:[0-9a-zA-Z_%.]+]] = bitcast <8 x i16> [[REG2093]] to <2 x i64> // CHECK-NEXT: ret <2 x i64> [[REG2094]] -// CHECK: define available_externally <2 x i64> @_mm_unpacklo_epi32 -// CHECK: [[REG2095:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_mergeh(int vector[4], int vector[4]) +// CHECK: define available_externally frozen <2 x i64> @_mm_unpacklo_epi32 +// CHECK: [[REG2095:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_mergeh(int vector[4], int vector[4]) // CHECK-NEXT: [[REG2096:[0-9a-zA-Z_%.]+]] = bitcast <4 x i32> [[REG2095]] to <2 x i64> // CHECK-NEXT: ret <2 x i64> [[REG2096]] -// CHECK: define available_externally <2 x i64> @_mm_unpacklo_epi64 -// CHECK: [[REG2097:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_mergeh(long long vector[2], long long vector[2]) +// CHECK: define available_externally frozen <2 x i64> @_mm_unpacklo_epi64 +// CHECK: [[REG2097:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_mergeh(long long vector[2], long long vector[2]) // CHECK-NEXT: ret <2 x i64> [[REG2097]] -// CHECK: define available_externally <2 x i64> @_mm_unpacklo_epi8 -// CHECK: [[REG2098:[0-9a-zA-Z_%.]+]] = call <16 x i8> @vec_mergeh(unsigned char vector[16], unsigned char vector[16]) +// CHECK: define available_externally frozen <2 x i64> @_mm_unpacklo_epi8 +// CHECK: [[REG2098:[0-9a-zA-Z_%.]+]] = call frozen <16 x i8> @vec_mergeh(unsigned char vector[16], unsigned char vector[16]) // CHECK-NEXT: [[REG2099:[0-9a-zA-Z_%.]+]] = bitcast <16 x i8> [[REG2098]] to <2 x i64> // CHECK-NEXT: ret <2 x i64> [[REG2099]] -// CHECK: define available_externally <2 x double> @_mm_unpacklo_pd -// CHECK: [[REG2100:[0-9a-zA-Z_%.]+]] = call <2 x double> @vec_mergeh(double vector[2], double vector[2]) +// CHECK: define available_externally frozen <2 x double> @_mm_unpacklo_pd +// CHECK: [[REG2100:[0-9a-zA-Z_%.]+]] = call frozen <2 x double> @vec_mergeh(double vector[2], double vector[2]) // CHECK-NEXT: ret <2 x double> [[REG2100]] diff --git a/clang/test/CodeGen/ppc-mm-malloc-le.c b/clang/test/CodeGen/ppc-mm-malloc-le.c --- a/clang/test/CodeGen/ppc-mm-malloc-le.c +++ b/clang/test/CodeGen/ppc-mm-malloc-le.c @@ -19,7 +19,7 @@ // CHECK-LABEL: @test_mm_malloc -// CHECK: define internal i8* @_mm_malloc(i64 [[REG1:[0-9a-zA-Z_%.]+]], i64 [[REG2:[0-9a-zA-Z_%.]+]]) +// CHECK: define internal frozen i8* @_mm_malloc(i64 frozen [[REG1:[0-9a-zA-Z_%.]+]], i64 frozen [[REG2:[0-9a-zA-Z_%.]+]]) // CHECK: [[REG3:[0-9a-zA-Z_%.]+]] = alloca i8*, align 8 // CHECK: store i64 [[REG1]], i64* [[REG4:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: store i64 [[REG2]], i64* [[REG5:[0-9a-zA-Z_%.]+]], align 8 @@ -35,7 +35,7 @@ // CHECK: [[REG24]]: // CHECK-NEXT: [[REG26:[0-9a-zA-Z_%.]+]] = load i64, i64* [[REG5]], align 8 // CHECK-NEXT: [[REG27:[0-9a-zA-Z_%.]+]] = load i64, i64* [[REG4]], align 8 -// CHECK-NEXT: [[REG28:[0-9a-zA-Z_%.]+]] = call signext i32 @posix_memalign(i8** [[REG29:[0-9a-zA-Z_%.]+]], i64 [[REG26]], i64 [[REG27]]) +// CHECK-NEXT: [[REG28:[0-9a-zA-Z_%.]+]] = call frozen signext i32 @posix_memalign(i8** frozen [[REG29:[0-9a-zA-Z_%.]+]], i64 frozen [[REG26]], i64 frozen [[REG27]]) // CHECK-NEXT: [[REG30:[0-9a-zA-Z_%.]+]] = icmp eq i32 [[REG28]], 0 // CHECK-NEXT: br i1 [[REG30]], label %[[REG31:[0-9a-zA-Z_%.]+]], label %[[REG32:[0-9a-zA-Z_%.]+]] // CHECK: [[REG31]]: @@ -49,8 +49,8 @@ // CHECK-NEXT: [[REG34:[0-9a-zA-Z_%.]+]] = load i8*, i8** [[REG3]], align 8 // CHECK-NEXT: ret i8* [[REG34]] -// CHECK: define internal void @_mm_free(i8* [[REG35:[0-9a-zA-Z_%.]+]]) +// CHECK: define internal void @_mm_free(i8* frozen [[REG35:[0-9a-zA-Z_%.]+]]) // CHECK: store i8* [[REG35]], i8** [[REG36:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: [[REG37:[0-9a-zA-Z_%.]+]] = load i8*, i8** [[REG36]], align 8 -// CHECK-NEXT: call void @free(i8* [[REG37]]) +// CHECK-NEXT: call void @free(i8* frozen [[REG37]]) // CHECK-NEXT: ret void diff --git a/clang/test/CodeGen/ppc-mm-malloc.c b/clang/test/CodeGen/ppc-mm-malloc.c --- a/clang/test/CodeGen/ppc-mm-malloc.c +++ b/clang/test/CodeGen/ppc-mm-malloc.c @@ -19,7 +19,7 @@ // CHECK-LABEL: @test_mm_malloc -// CHECK: define internal i8* @_mm_malloc(i64 [[REG1:[0-9a-zA-Z_%.]+]], i64 [[REG2:[0-9a-zA-Z_%.]+]]) +// CHECK: define internal frozen i8* @_mm_malloc(i64 frozen [[REG1:[0-9a-zA-Z_%.]+]], i64 frozen [[REG2:[0-9a-zA-Z_%.]+]]) // CHECK: [[REG3:[0-9a-zA-Z_%.]+]] = alloca i8*, align 8 // CHECK: store i64 [[REG1]], i64* [[REG4:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: store i64 [[REG2]], i64* [[REG5:[0-9a-zA-Z_%.]+]], align 8 @@ -35,7 +35,7 @@ // CHECK: [[REG24]]: // CHECK-NEXT: [[REG26:[0-9a-zA-Z_%.]+]] = load i64, i64* [[REG5]], align 8 // CHECK-NEXT: [[REG27:[0-9a-zA-Z_%.]+]] = load i64, i64* [[REG4]], align 8 -// CHECK-NEXT: [[REG28:[0-9a-zA-Z_%.]+]] = call signext i32 @posix_memalign(i8** [[REG29:[0-9a-zA-Z_%.]+]], i64 [[REG26]], i64 [[REG27]]) +// CHECK-NEXT: [[REG28:[0-9a-zA-Z_%.]+]] = call frozen signext i32 @posix_memalign(i8** frozen [[REG29:[0-9a-zA-Z_%.]+]], i64 frozen [[REG26]], i64 frozen [[REG27]]) // CHECK-NEXT: [[REG30:[0-9a-zA-Z_%.]+]] = icmp eq i32 [[REG28]], 0 // CHECK-NEXT: br i1 [[REG30]], label %[[REG31:[0-9a-zA-Z_%.]+]], label %[[REG32:[0-9a-zA-Z_%.]+]] // CHECK: [[REG31]]: @@ -49,8 +49,8 @@ // CHECK-NEXT: [[REG34:[0-9a-zA-Z_%.]+]] = load i8*, i8** [[REG3]], align 8 // CHECK-NEXT: ret i8* [[REG34]] -// CHECK: define internal void @_mm_free(i8* [[REG35:[0-9a-zA-Z_%.]+]]) +// CHECK: define internal void @_mm_free(i8* frozen [[REG35:[0-9a-zA-Z_%.]+]]) // CHECK: store i8* [[REG35]], i8** [[REG36:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: [[REG37:[0-9a-zA-Z_%.]+]] = load i8*, i8** [[REG36]], align 8 -// CHECK-NEXT: call void @free(i8* [[REG37]]) +// CHECK-NEXT: call void @free(i8* frozen [[REG37]]) // CHECK-NEXT: ret void diff --git a/clang/test/CodeGen/ppc-mmintrin.c b/clang/test/CodeGen/ppc-mmintrin.c --- a/clang/test/CodeGen/ppc-mmintrin.c +++ b/clang/test/CodeGen/ppc-mmintrin.c @@ -32,18 +32,18 @@ // CHECK-LABEL: @test_add -// CHECK: define available_externally i64 @_mm_add_pi32 +// CHECK: define available_externally frozen i64 @_mm_add_pi32 -// CHECK-P9: [[REG1:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_splats(unsigned long long) +// CHECK-P9: [[REG1:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_splats(unsigned long long) // CHECK-P9-NEXT: [[REG2:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG1]] to <4 x i32> // CHECK-P9-NEXT: store <4 x i32> [[REG2]], <4 x i32>* [[REG3:[0-9a-zA-Z_%.]+]], align 16 // CHECK-P9-NEXT: [[REG4:[0-9a-zA-Z_%.]+]] = load i64, i64* {{[0-9a-zA-Z_%.]+}}, align 8 -// CHECK-P9-NEXT: [[REG5:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_splats(unsigned long long) +// CHECK-P9-NEXT: [[REG5:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_splats(unsigned long long) // CHECK-P9-NEXT: [[REG6:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG5]] to <4 x i32> // CHECK-P9-NEXT: store <4 x i32> [[REG6]], <4 x i32>* [[REG7:[0-9a-zA-Z_%.]+]], align 16 // CHECK-P9-NEXT: [[REG8:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG3]], align 16 // CHECK-P9-NEXT: [[REG9:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG7]], align 16 -// CHECK-P9-NEXT: [[REG10:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_add(int vector[4], int vector[4])(<4 x i32> [[REG8]], <4 x i32> [[REG9]]) +// CHECK-P9-NEXT: [[REG10:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_add(int vector[4], int vector[4])(<4 x i32> frozen [[REG8]], <4 x i32> frozen [[REG9]]) // CHECK-P9-NEXT: store <4 x i32> [[REG10]], <4 x i32>* [[REG11:[0-9a-zA-Z_%.]+]], align 16 // CHECK-P9-NEXT: [[REG12:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG11]], align 16 // CHECK-P9-NEXT: [[REG13:[0-9a-zA-Z_%.]+]] = bitcast <4 x i32> %6 to <2 x i64> @@ -61,71 +61,71 @@ // CHECK-P8-NEXT: [[REG22:[0-9a-zA-Z_%.]+]] = load i32, i32* [[REG21]] // CHECK-P8-NEXT: add nsw i32 [[REG20]], [[REG22]] -// CHECK: define available_externally i64 @_mm_add_pi16 -// CHECK: [[REG23:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_splats +// CHECK: define available_externally frozen i64 @_mm_add_pi16 +// CHECK: [[REG23:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_splats // CHECK-NEXT: [[REG24:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG23]] to <8 x i16> // CHECK-NEXT: store <8 x i16> [[REG24]], <8 x i16>* [[REG25:[0-9a-zA-Z_%.]+]] -// CHECK: [[REG26:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_splats +// CHECK: [[REG26:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_splats // CHECK-NEXT: [[REG27:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG26]] to <8 x i16> // CHECK-NEXT: store <8 x i16> [[REG27]], <8 x i16>* [[REG28:[0-9a-zA-Z_%.]+]] // CHECK-NEXT: [[REG29:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG25]], align 16 // CHECK-NEXT: [[REG30:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG28]], align 16 -// CHECK-NEXT: call <8 x i16> @vec_add(short vector[8], short vector[8])(<8 x i16> [[REG29]], <8 x i16> [[REG30]]) +// CHECK-NEXT: call frozen <8 x i16> @vec_add(short vector[8], short vector[8])(<8 x i16> frozen [[REG29]], <8 x i16> frozen [[REG30]]) -// CHECK: define available_externally i64 @_mm_add_pi8 -// CHECK: [[REG31:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_splats +// CHECK: define available_externally frozen i64 @_mm_add_pi8 +// CHECK: [[REG31:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_splats // CHECK-NEXT: [[REG32:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG31]] to <16 x i8> // CHECK-NEXT: store <16 x i8> [[REG32]], <16 x i8>* [[REG33:[0-9a-zA-Z_%.]+]] -// CHECK: [[REG34:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_splats +// CHECK: [[REG34:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_splats // CHECK-NEXT: [[REG35:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG34]] to <16 x i8> // CHECK-NEXT: store <16 x i8> [[REG35]], <16 x i8>* [[REG36:[0-9a-zA-Z_%.]+]] // CHECK-NEXT: [[REG37:[0-9a-zA-Z_%.]+]] = load <16 x i8>, <16 x i8>* [[REG33]], align 16 // CHECK-NEXT: [[REG38:[0-9a-zA-Z_%.]+]] = load <16 x i8>, <16 x i8>* [[REG36]], align 16 -// CHECK-NEXT: call <16 x i8> @vec_add(signed char vector[16], signed char vector[16])(<16 x i8> [[REG37]], <16 x i8> [[REG38]]) +// CHECK-NEXT: call frozen <16 x i8> @vec_add(signed char vector[16], signed char vector[16])(<16 x i8> frozen [[REG37]], <16 x i8> frozen [[REG38]]) -// CHECK: define available_externally i64 @_mm_adds_pu16 -// CHECK: [[REG39:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_splats +// CHECK: define available_externally frozen i64 @_mm_adds_pu16 +// CHECK: [[REG39:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_splats // CHECK-NEXT: [[REG40:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG39]] to <8 x i16> // CHECK-NEXT: store <8 x i16> [[REG40]], <8 x i16>* [[REG41:[0-9a-zA-Z_%.]+]] -// CHECK: [[REG42:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_splats +// CHECK: [[REG42:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_splats // CHECK-NEXT: [[REG43:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG42]] to <8 x i16> // CHECK-NEXT: store <8 x i16> [[REG43]], <8 x i16>* [[REG44:[0-9a-zA-Z_%.]+]] // CHECK-NEXT: [[REG45:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG41]], align 16 // CHECK-NEXT: [[REG46:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG44]], align 16 -// CHECK-NEXT: call <8 x i16> @vec_adds(unsigned short vector[8], unsigned short vector[8])(<8 x i16> [[REG45]], <8 x i16> [[REG46]]) +// CHECK-NEXT: call frozen <8 x i16> @vec_adds(unsigned short vector[8], unsigned short vector[8])(<8 x i16> frozen [[REG45]], <8 x i16> frozen [[REG46]]) -// CHECK: define available_externally i64 @_mm_adds_pu8 -// CHECK: [[REG47:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_splats +// CHECK: define available_externally frozen i64 @_mm_adds_pu8 +// CHECK: [[REG47:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_splats // CHECK-NEXT: [[REG48:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG47]] to <16 x i8> // CHECK-NEXT: store <16 x i8> [[REG48]], <16 x i8>* [[REG49:[0-9a-zA-Z_%.]+]] -// CHECK: [[REG50:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_splats +// CHECK: [[REG50:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_splats // CHECK-NEXT: [[REG51:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG50]] to <16 x i8> // CHECK-NEXT: store <16 x i8> [[REG51]], <16 x i8>* [[REG52:[0-9a-zA-Z_%.]+]] // CHECK-NEXT: [[REG53:[0-9a-zA-Z_%.]+]] = load <16 x i8>, <16 x i8>* [[REG49]], align 16 // CHECK-NEXT: [[REG54:[0-9a-zA-Z_%.]+]] = load <16 x i8>, <16 x i8>* [[REG52]], align 16 -// CHECK-NEXT: call <16 x i8> @vec_adds(unsigned char vector[16], unsigned char vector[16])(<16 x i8> [[REG53]], <16 x i8> [[REG54]]) +// CHECK-NEXT: call frozen <16 x i8> @vec_adds(unsigned char vector[16], unsigned char vector[16])(<16 x i8> frozen [[REG53]], <16 x i8> frozen [[REG54]]) -// CHECK: define available_externally i64 @_mm_adds_pi16 -// CHECK: [[REG55:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_splats +// CHECK: define available_externally frozen i64 @_mm_adds_pi16 +// CHECK: [[REG55:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_splats // CHECK-NEXT: [[REG56:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG55]] to <8 x i16> // CHECK-NEXT: store <8 x i16> [[REG56]], <8 x i16>* [[REG57:[0-9a-zA-Z_%.]+]] -// CHECK: [[REG58:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_splats +// CHECK: [[REG58:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_splats // CHECK-NEXT: [[REG59:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG58]] to <8 x i16> // CHECK-NEXT: store <8 x i16> [[REG59]], <8 x i16>* [[REG60:[0-9a-zA-Z_%.]+]] // CHECK-NEXT: [[REG61:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG57]], align 16 // CHECK-NEXT: [[REG62:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG60]], align 16 -// CHECK-NEXT: call <8 x i16> @vec_adds(short vector[8], short vector[8])(<8 x i16> [[REG61]], <8 x i16> [[REG62]]) +// CHECK-NEXT: call frozen <8 x i16> @vec_adds(short vector[8], short vector[8])(<8 x i16> frozen [[REG61]], <8 x i16> frozen [[REG62]]) -// CHECK: define available_externally i64 @_mm_adds_pi8 -// CHECK: [[REG63:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_splats +// CHECK: define available_externally frozen i64 @_mm_adds_pi8 +// CHECK: [[REG63:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_splats // CHECK-NEXT: [[REG64:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG63]] to <16 x i8> // CHECK-NEXT: store <16 x i8> [[REG64]], <16 x i8>* [[REG65:[0-9a-zA-Z_%.]+]] -// CHECK: [[REG66:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_splats +// CHECK: [[REG66:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_splats // CHECK-NEXT: [[REG67:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG66]] to <16 x i8> // CHECK-NEXT: store <16 x i8> [[REG67]], <16 x i8>* [[REG68:[0-9a-zA-Z_%.]+]] // CHECK-NEXT: [[REG69:[0-9a-zA-Z_%.]+]] = load <16 x i8>, <16 x i8>* [[REG65]], align 16 // CHECK-NEXT: [[REG70:[0-9a-zA-Z_%.]+]] = load <16 x i8>, <16 x i8>* [[REG68]], align 16 -// CHECK-NEXT: call <16 x i8> @vec_adds(signed char vector[16], signed char vector[16])(<16 x i8> [[REG69]], <16 x i8> [[REG70]]) +// CHECK-NEXT: call frozen <16 x i8> @vec_adds(signed char vector[16], signed char vector[16])(<16 x i8> frozen [[REG69]], <16 x i8> frozen [[REG70]]) void __attribute__((noinline)) test_alt_name_add() { @@ -140,32 +140,32 @@ // CHECK-LABEL: @test_alt_name_add -// CHECK: define available_externally i64 @_m_paddb -// CHECK: [[REG71:[0-9a-zA-Z_%.]+]] = call i64 @_mm_add_pi8 +// CHECK: define available_externally frozen i64 @_m_paddb +// CHECK: [[REG71:[0-9a-zA-Z_%.]+]] = call frozen i64 @_mm_add_pi8 // CHECK-NEXT: ret i64 [[REG71]] -// CHECK: define available_externally i64 @_m_paddd -// CHECK: [[REG72:[0-9a-zA-Z_%.]+]] = call i64 @_mm_add_pi32 +// CHECK: define available_externally frozen i64 @_m_paddd +// CHECK: [[REG72:[0-9a-zA-Z_%.]+]] = call frozen i64 @_mm_add_pi32 // CHECK-NEXT: ret i64 [[REG72]] -// CHECK: define available_externally i64 @_m_paddsb -// CHECK: [[REG73:[0-9a-zA-Z_%.]+]] = call i64 @_mm_adds_pi8 +// CHECK: define available_externally frozen i64 @_m_paddsb +// CHECK: [[REG73:[0-9a-zA-Z_%.]+]] = call frozen i64 @_mm_adds_pi8 // CHECK-NEXT: ret i64 [[REG73]] -// CHECK: define available_externally i64 @_m_paddsw -// CHECK: [[REG74:[0-9a-zA-Z_%.]+]] = call i64 @_mm_adds_pi16 +// CHECK: define available_externally frozen i64 @_m_paddsw +// CHECK: [[REG74:[0-9a-zA-Z_%.]+]] = call frozen i64 @_mm_adds_pi16 // CHECK-NEXT: ret i64 [[REG74]] -// CHECK: define available_externally i64 @_m_paddusb -// CHECK: [[REG75:[0-9a-zA-Z_%.]+]] = call i64 @_mm_adds_pu8 +// CHECK: define available_externally frozen i64 @_m_paddusb +// CHECK: [[REG75:[0-9a-zA-Z_%.]+]] = call frozen i64 @_mm_adds_pu8 // CHECK-NEXT: ret i64 [[REG75]] -// CHECK: define available_externally i64 @_m_paddusw -// CHECK: [[REG76:[0-9a-zA-Z_%.]+]] = call i64 @_mm_adds_pu16 +// CHECK: define available_externally frozen i64 @_m_paddusw +// CHECK: [[REG76:[0-9a-zA-Z_%.]+]] = call frozen i64 @_mm_adds_pu16 // CHECK-NEXT: ret i64 [[REG76]] -// CHECK: define available_externally i64 @_m_paddw -// CHECK: [[REG77:[0-9a-zA-Z_%.]+]] = call i64 @_mm_add_pi16 +// CHECK: define available_externally frozen i64 @_m_paddw +// CHECK: [[REG77:[0-9a-zA-Z_%.]+]] = call frozen i64 @_mm_add_pi16 // CHECK-NEXT: ret i64 [[REG77]] void __attribute__((noinline)) @@ -180,17 +180,17 @@ // CHECK-LABEL: @test_cmp -// CHECK: define available_externally i64 @_mm_cmpeq_pi32 +// CHECK: define available_externally frozen i64 @_mm_cmpeq_pi32 -// CHECK-P9: [[REG78:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_splats(unsigned long long) +// CHECK-P9: [[REG78:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_splats(unsigned long long) // CHECK-P9-NEXT: [[REG79:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG78]] to <4 x i32> // CHECK-P9-NEXT: store <4 x i32> [[REG79]], <4 x i32>* [[REG80:[0-9a-zA-Z_%.]+]] -// CHECK-P9: [[REG81:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_splats(unsigned long long) +// CHECK-P9: [[REG81:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_splats(unsigned long long) // CHECK-P9-NEXT: [[REG82:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG81]] to <4 x i32> // CHECK-P9-NEXT: store <4 x i32> [[REG82]], <4 x i32>* [[REG83:[0-9a-zA-Z_%.]+]] // CHECK-P9-NEXT: [[REG84:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG80]] // CHECK-P9-NEXT: [[REG85:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG83]] -// CHECK-P9-NEXT: call <4 x i32> @vec_cmpeq(int vector[4], int vector[4])(<4 x i32> [[REG84]], <4 x i32> [[REG85]]) +// CHECK-P9-NEXT: call frozen <4 x i32> @vec_cmpeq(int vector[4], int vector[4])(<4 x i32> frozen [[REG84]], <4 x i32> frozen [[REG85]]) // CHECK-P8-COUNT-2: {{[0-9a-zA-Z_%.]+}} = getelementptr inbounds [2 x i32], [2 x i32]* {{[0-9a-zA-Z_%.]+}} // CHECK-P8: [[REG86:[0-9a-zA-Z_%.]+]] = icmp eq i32 {{[0-9a-zA-Z_%.]+}}, {{[0-9a-zA-Z_%.]+}} @@ -200,34 +200,34 @@ // CHECK-P8-COUNT-2: {{[0-9a-zA-Z_%.]+}} = getelementptr inbounds [2 x i32], [2 x i32]* {{[0-9a-zA-Z_%.]+}} // CHECK-P8: store i32 {{[0-9a-zA-Z_%.]+}}, i32* {{[0-9a-zA-Z_%.]+}} -// CHECK: define available_externally i64 @_mm_cmpeq_pi16 -// CHECK: [[REG88:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_splats(unsigned long long) +// CHECK: define available_externally frozen i64 @_mm_cmpeq_pi16 +// CHECK: [[REG88:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_splats(unsigned long long) // CHECK-NEXT: [[REG89:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG88]] to <8 x i16> // CHECK-NEXT: store <8 x i16> [[REG89]], <8 x i16>* [[REG90:[0-9a-zA-Z_%.]+]] -// CHECK: [[REG91:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_splats(unsigned long long) +// CHECK: [[REG91:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_splats(unsigned long long) // CHECK-NEXT: [[REG92:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG91]] to <8 x i16> // CHECK-NEXT: store <8 x i16> [[REG92]], <8 x i16>* [[REG93:[0-9a-zA-Z_%.]+]] // CHECK-NEXT: [[REG94:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG90]], align 16 // CHECK-NEXT: [[REG95:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG93]], align 16 -// CHECK-NEXT: call <8 x i16> @vec_cmpeq(short vector[8], short vector[8])(<8 x i16> [[REG94]], <8 x i16> [[REG95]]) +// CHECK-NEXT: call frozen <8 x i16> @vec_cmpeq(short vector[8], short vector[8])(<8 x i16> frozen [[REG94]], <8 x i16> frozen [[REG95]]) -// CHECK: define available_externally i64 @_mm_cmpeq_pi8 +// CHECK: define available_externally frozen i64 @_mm_cmpeq_pi8 // CHECK: call i64 asm "cmpb $0,$1,$2;\0A", "=r,r,r" // CHECK-NEXT: store i64 {{[0-9a-zA-Z_%.]+}}, i64* [[REG96:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: [[REG97:[0-9a-zA-Z_%.]+]] = load i64, i64* [[REG96]], align 8 // CHECK-NEXT: ret i64 [[REG97]] -// CHECK: define available_externally i64 @_mm_cmpgt_pi32 +// CHECK: define available_externally frozen i64 @_mm_cmpgt_pi32 -// CHECK-P9: [[REG98:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_splats(unsigned long long) +// CHECK-P9: [[REG98:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_splats(unsigned long long) // CHECK-P9-NEXT: [[REG99:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG98]] to <4 x i32> // CHECK-P9-NEXT: store <4 x i32> [[REG99]], <4 x i32>* [[REG100:[0-9a-zA-Z_%.]+]] -// CHECK-P9: [[REG101:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_splats(unsigned long long) +// CHECK-P9: [[REG101:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_splats(unsigned long long) // CHECK-P9-NEXT: [[REG102:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG101]] to <4 x i32> // CHECK-P9-NEXT: store <4 x i32> [[REG102]], <4 x i32>* [[REG103:[0-9a-zA-Z_%.]+]] // CHECK-P9-NEXT: [[REG104:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG100]] // CHECK-P9-NEXT: [[REG105:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG103]] -// CHECK-P9-NEXT: call <4 x i32> @vec_cmpgt(int vector[4], int vector[4])(<4 x i32> [[REG104]], <4 x i32> [[REG85]]) +// CHECK-P9-NEXT: call frozen <4 x i32> @vec_cmpgt(int vector[4], int vector[4])(<4 x i32> frozen [[REG104]], <4 x i32> frozen [[REG85]]) // CHECK-P8-COUNT-2: {{[0-9a-zA-Z_%.]+}} = getelementptr inbounds [2 x i32], [2 x i32]* {{[0-9a-zA-Z_%.]+}} // CHECK-P8: [[REG106:[0-9a-zA-Z_%.]+]] = icmp sgt i32 {{[0-9a-zA-Z_%.]+}}, {{[0-9a-zA-Z_%.]+}} @@ -237,27 +237,27 @@ // CHECK-P8-COUNT-2: {{[0-9a-zA-Z_%.]+}} = getelementptr inbounds [2 x i32], [2 x i32]* {{[0-9a-zA-Z_%.]+}} // CHECK-P8: store i32 {{[0-9a-zA-Z_%.]+}}, i32* {{[0-9a-zA-Z_%.]+}} -// CHECK: define available_externally i64 @_mm_cmpgt_pi16 -// CHECK: [[REG108:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_splats(unsigned long long) +// CHECK: define available_externally frozen i64 @_mm_cmpgt_pi16 +// CHECK: [[REG108:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_splats(unsigned long long) // CHECK-NEXT: [[REG109:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG108]] to <8 x i16> // CHECK-NEXT: store <8 x i16> [[REG109]], <8 x i16>* [[REG110:[0-9a-zA-Z_%.]+]] -// CHECK: [[REG111:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_splats(unsigned long long) +// CHECK: [[REG111:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_splats(unsigned long long) // CHECK-NEXT: [[REG112:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG111]] to <8 x i16> // CHECK-NEXT: store <8 x i16> [[REG112]], <8 x i16>* [[REG113:[0-9a-zA-Z_%.]+]] // CHECK-NEXT: [[REG114:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG110]] // CHECK-NEXT: [[REG115:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG113]] -// CHECK-NEXT: call <8 x i16> @vec_cmpgt(short vector[8], short vector[8])(<8 x i16> [[REG114]], <8 x i16> [[REG115]]) +// CHECK-NEXT: call frozen <8 x i16> @vec_cmpgt(short vector[8], short vector[8])(<8 x i16> frozen [[REG114]], <8 x i16> frozen [[REG115]]) -// CHECK: define available_externally i64 @_mm_cmpgt_pi8 -// CHECK: [[REG116:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_splats(unsigned long long) +// CHECK: define available_externally frozen i64 @_mm_cmpgt_pi8 +// CHECK: [[REG116:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_splats(unsigned long long) // CHECK-NEXT: [[REG117:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG116]] to <16 x i8> // CHECK-NEXT: store <16 x i8> [[REG117]], <16 x i8>* [[REG118:[0-9a-zA-Z_%.]+]] -// CHECK: [[REG119:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_splats(unsigned long long) +// CHECK: [[REG119:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_splats(unsigned long long) // CHECK-NEXT: [[REG120:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG119]] to <16 x i8> // CHECK-NEXT: store <16 x i8> [[REG120]], <16 x i8>* [[REG121:[0-9a-zA-Z_%.]+]] // CHECK-NEXT: [[REG122:[0-9a-zA-Z_%.]+]] = load <16 x i8>, <16 x i8>* [[REG118]] // CHECK-NEXT: [[REG123:[0-9a-zA-Z_%.]+]] = load <16 x i8>, <16 x i8>* [[REG121]] -// CHECK-NEXT: call <16 x i8> @vec_cmpgt(signed char vector[16], signed char vector[16])(<16 x i8> [[REG122]], <16 x i8> [[REG123]]) +// CHECK-NEXT: call frozen <16 x i8> @vec_cmpgt(signed char vector[16], signed char vector[16])(<16 x i8> frozen [[REG122]], <16 x i8> frozen [[REG123]]) void __attribute__((noinline)) test_alt_name_cmp() { @@ -271,28 +271,28 @@ // CHECK-LABEL: @test_alt_name_cmp -// CHECK: define available_externally i64 @_m_pcmpeqb -// CHECK: [[REG124:[0-9a-zA-Z_%.]+]] = call i64 @_mm_cmpeq_pi8 +// CHECK: define available_externally frozen i64 @_m_pcmpeqb +// CHECK: [[REG124:[0-9a-zA-Z_%.]+]] = call frozen i64 @_mm_cmpeq_pi8 // CHECK-NEXT: ret i64 [[REG124]] -// CHECK: define available_externally i64 @_m_pcmpeqd -// CHECK: [[REG125:[0-9a-zA-Z_%.]+]] = call i64 @_mm_cmpeq_pi32 +// CHECK: define available_externally frozen i64 @_m_pcmpeqd +// CHECK: [[REG125:[0-9a-zA-Z_%.]+]] = call frozen i64 @_mm_cmpeq_pi32 // CHECK-NEXT: ret i64 [[REG125]] -// CHECK: define available_externally i64 @_m_pcmpeqw -// CHECK: [[REG126:[0-9a-zA-Z_%.]+]] = call i64 @_mm_cmpeq_pi16 +// CHECK: define available_externally frozen i64 @_m_pcmpeqw +// CHECK: [[REG126:[0-9a-zA-Z_%.]+]] = call frozen i64 @_mm_cmpeq_pi16 // CHECK-NEXT: ret i64 [[REG126]] -// CHECK: define available_externally i64 @_m_pcmpgtb -// CHECK: [[REG127:[0-9a-zA-Z_%.]+]] = call i64 @_mm_cmpgt_pi8 +// CHECK: define available_externally frozen i64 @_m_pcmpgtb +// CHECK: [[REG127:[0-9a-zA-Z_%.]+]] = call frozen i64 @_mm_cmpgt_pi8 // CHECK-NEXT: ret i64 [[REG127]] -// CHECK: define available_externally i64 @_m_pcmpgtd -// CHECK: [[REG128:[0-9a-zA-Z_%.]+]] = call i64 @_mm_cmpgt_pi32 +// CHECK: define available_externally frozen i64 @_m_pcmpgtd +// CHECK: [[REG128:[0-9a-zA-Z_%.]+]] = call frozen i64 @_mm_cmpgt_pi32 // CHECK-NEXT: ret i64 [[REG128]] -// CHECK: define available_externally i64 @_m_pcmpgtw -// CHECK: [[REG129:[0-9a-zA-Z_%.]+]] = call i64 @_mm_cmpgt_pi16 +// CHECK: define available_externally frozen i64 @_m_pcmpgtw +// CHECK: [[REG129:[0-9a-zA-Z_%.]+]] = call frozen i64 @_mm_cmpgt_pi16 // CHECK-NEXT: ret i64 [[REG129]] void __attribute__((noinline)) @@ -305,20 +305,20 @@ // CHECK-LABEL: @test_convert -// CHECK: define available_externally i64 @_mm_cvtm64_si64 +// CHECK: define available_externally frozen i64 @_mm_cvtm64_si64 // CHECK: [[REG130:[0-9a-zA-Z_%.]+]] = load i64, i64* {{[0-9a-zA-Z_%.]+}}, align 8 // CHECK-NEXT: ret i64 [[REG130]] -// CHECK: define available_externally i64 @_mm_cvtsi32_si64 +// CHECK: define available_externally frozen i64 @_mm_cvtsi32_si64 // CHECK: [[REG131:[0-9a-zA-Z_%.]+]] = load i32, i32* {{[0-9a-zA-Z_%.]+}} // CHECK-NEXT: [[REG132:[0-9a-zA-Z_%.]+]] = zext i32 [[REG131]] to i64 // CHECK-NEXT: ret i64 [[REG132]] -// CHECK: define available_externally i64 @_mm_cvtsi64_m64 +// CHECK: define available_externally frozen i64 @_mm_cvtsi64_m64 // CHECK: [[REG133:[0-9a-zA-Z_%.]+]] = load i64, i64* {{[0-9a-zA-Z_%.]+}}, align 8 // CHECK-NEXT: ret i64 [[REG133]] -// CHECK: define available_externally signext i32 @_mm_cvtsi64_si32 +// CHECK: define available_externally frozen signext i32 @_mm_cvtsi64_si32 // CHECK: [[REG134:[0-9a-zA-Z_%.]+]] = load i64, i64* {{[0-9a-zA-Z_%.]+}}, align 8 // CHECK-NEXT: [[REG135:[0-9a-zA-Z_%.]+]] = trunc i64 [[REG134]] to i32 // CHECK-NEXT: ret i32 [[REG135]] @@ -333,19 +333,19 @@ // CHECK-LABEL: @test_alt_name_convert -// CHECK: define available_externally i64 @_m_from_int -// CHECK: [[REG136:[0-9a-zA-Z_%.]+]] = call i64 @_mm_cvtsi32_si64 +// CHECK: define available_externally frozen i64 @_m_from_int +// CHECK: [[REG136:[0-9a-zA-Z_%.]+]] = call frozen i64 @_mm_cvtsi32_si64 // CHECK-NEXT: ret i64 [[REG136]] -// CHECK: define available_externally i64 @_m_from_int64 +// CHECK: define available_externally frozen i64 @_m_from_int64 // CHECK: [[REG137:[0-9a-zA-Z_%.]+]] = load i64, i64* {{[0-9a-zA-Z_%.]+}} // CHECK-NEXT: ret i64 [[REG137]] -// CHECK: define available_externally signext i32 @_m_to_int -// CHECK: [[REG138:[0-9a-zA-Z_%.]+]] = call signext i32 @_mm_cvtsi64_si32 +// CHECK: define available_externally frozen signext i32 @_m_to_int +// CHECK: [[REG138:[0-9a-zA-Z_%.]+]] = call frozen signext i32 @_mm_cvtsi64_si32 // CHECK-NEXT: ret i32 [[REG138]] -// CHECK: define available_externally i64 @_m_to_int64 +// CHECK: define available_externally frozen i64 @_m_to_int64 // CHECK: [[REG139:[0-9a-zA-Z_%.]+]] = load i64, i64* {{[0-9a-zA-Z_%.]+}} // CHECK-NEXT: ret i64 [[REG139]] @@ -375,20 +375,20 @@ // CHECK-LABEL: @test_logic -// CHECK: define available_externally i64 @_mm_and_si64 +// CHECK: define available_externally frozen i64 @_mm_and_si64 // CHECK: [[REG140:[0-9a-zA-Z_%.]+]] = and i64 {{[0-9a-zA-Z_%.]+}}, {{[0-9a-zA-Z_%.]+}} // CHECK-NEXT: ret i64 [[REG140]] -// CHECK: define available_externally i64 @_mm_andnot_si64 +// CHECK: define available_externally frozen i64 @_mm_andnot_si64 // CHECK: [[REG141:[0-9a-zA-Z_%.]+]] = xor i64 {{[0-9a-zA-Z_%.]+}}, -1 // CHECK: [[REG142:[0-9a-zA-Z_%.]+]] = and i64 [[REG141]], {{[0-9a-zA-Z_%.]+}} // CHECK-NEXT: ret i64 [[REG142]] -// CHECK: define available_externally i64 @_mm_or_si64 +// CHECK: define available_externally frozen i64 @_mm_or_si64 // CHECK: [[REG143:[0-9a-zA-Z_%.]+]] = or i64 {{[0-9a-zA-Z_%.]+}}, {{[0-9a-zA-Z_%.]+}} // CHECK-NEXT: ret i64 [[REG143]] -// CHECK: define available_externally i64 @_mm_xor_si64 +// CHECK: define available_externally frozen i64 @_mm_xor_si64 // CHECK: [[REG144:[0-9a-zA-Z_%.]+]] = xor i64 {{[0-9a-zA-Z_%.]+}}, {{[0-9a-zA-Z_%.]+}} // CHECK-NEXT: ret i64 [[REG144]] @@ -402,20 +402,20 @@ // CHECK-LABEL: @test_alt_name_logic -// CHECK: define available_externally i64 @_m_pand -// CHECK: [[REG145:[0-9a-zA-Z_%.]+]] = call i64 @_mm_and_si64 +// CHECK: define available_externally frozen i64 @_m_pand +// CHECK: [[REG145:[0-9a-zA-Z_%.]+]] = call frozen i64 @_mm_and_si64 // CHECK-NEXT: ret i64 [[REG145]] -// CHECK: define available_externally i64 @_m_pandn -// CHECK: [[REG146:[0-9a-zA-Z_%.]+]] = call i64 @_mm_andnot_si64 +// CHECK: define available_externally frozen i64 @_m_pandn +// CHECK: [[REG146:[0-9a-zA-Z_%.]+]] = call frozen i64 @_mm_andnot_si64 // CHECK-NEXT: ret i64 [[REG146]] -// CHECK: define available_externally i64 @_m_por -// CHECK: [[REG147:[0-9a-zA-Z_%.]+]] = call i64 @_mm_or_si64 +// CHECK: define available_externally frozen i64 @_m_por +// CHECK: [[REG147:[0-9a-zA-Z_%.]+]] = call frozen i64 @_mm_or_si64 // CHECK-NEXT: ret i64 [[REG147]] -// CHECK: define available_externally i64 @_m_pxor -// CHECK: [[REG148:[0-9a-zA-Z_%.]+]] = call i64 @_mm_xor_si64 +// CHECK: define available_externally frozen i64 @_m_pxor +// CHECK: [[REG148:[0-9a-zA-Z_%.]+]] = call frozen i64 @_mm_xor_si64 // CHECK-NEXT: ret i64 [[REG148]] void __attribute__((noinline)) @@ -426,22 +426,22 @@ // CHECK-LABEL: @test_madd -// CHECK: define available_externally i64 @_mm_madd_pi16 +// CHECK: define available_externally frozen i64 @_mm_madd_pi16 // CHECK: store <4 x i32> zeroinitializer, <4 x i32>* [[REG149:[0-9a-zA-Z_%.]+]], align 16 -// CHECK: [[REG150:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_splats(unsigned long long)(i64 {{[0-9a-zA-Z_%.]+}}) +// CHECK: [[REG150:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_splats(unsigned long long)(i64 frozen {{[0-9a-zA-Z_%.]+}}) // CHECK-NEXT: [[REG151:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG150]] to <8 x i16> // CHECK-NEXT: store <8 x i16> [[REG151]], <8 x i16>* [[REG152:[0-9a-zA-Z_%.]+]], align 16 -// CHECK: [[REG153:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_splats(unsigned long long)(i64 {{[0-9a-zA-Z_%.]+}}) +// CHECK: [[REG153:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_splats(unsigned long long)(i64 frozen {{[0-9a-zA-Z_%.]+}}) // CHECK-NEXT: [[REG154:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG153]] to <8 x i16> // CHECK-NEXT: store <8 x i16> [[REG154]], <8 x i16>* [[REG155:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG156:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG152]], align 16 // CHECK-NEXT: [[REG157:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG155]], align 16 // CHECK-NEXT: [[REG158:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG149]], align 16 -// CHECK-NEXT: [[REG159:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_vmsumshm(<8 x i16> [[REG156]], <8 x i16> [[REG157]], <4 x i32> [[REG158]]) +// CHECK-NEXT: [[REG159:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_vmsumshm(<8 x i16> frozen [[REG156]], <8 x i16> frozen [[REG157]], <4 x i32> frozen [[REG158]]) // CHECK-NEXT: store <4 x i32> [[REG159]], <4 x i32>* {{[0-9a-zA-Z_%.]+}}, align 16 -// CHECK: define available_externally i64 @_m_pmaddwd -// CHECK: [[REG160:[0-9a-zA-Z_%.]+]] = call i64 @_mm_madd_pi16 +// CHECK: define available_externally frozen i64 @_m_pmaddwd +// CHECK: [[REG160:[0-9a-zA-Z_%.]+]] = call frozen i64 @_mm_madd_pi16 // CHECK-NEXT: ret i64 [[REG160]] void __attribute__((noinline)) @@ -452,34 +452,34 @@ // CHECK-LABEL: @test_mul -// CHECK: define available_externally i64 @_mm_mulhi_pi16 +// CHECK: define available_externally frozen i64 @_mm_mulhi_pi16 // CHECK-BE: store <16 x i8> , <16 x i8>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-LE: store <16 x i8> , <16 x i8>* {{[0-9a-zA-Z_%.]+}}, align 16 -// CHECK: [[REG161:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_splats(unsigned long long) +// CHECK: [[REG161:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_splats(unsigned long long) // CHECK: store <8 x i16> {{[0-9a-zA-Z_%.]+}}, <8 x i16>* [[REG162:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG163:[0-9a-zA-Z_%.]+]] = load i64, i64* {{[0-9a-zA-Z_%.]+}}, align 8 -// CHECK-NEXT: [[REG164:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_splats(unsigned long long) +// CHECK-NEXT: [[REG164:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_splats(unsigned long long) // CHECK-NEXT: [[REG165:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG164]] to <8 x i16> // CHECK-NEXT: store <8 x i16> [[REG165]], <8 x i16>* [[REG166:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG167:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG162]], align 16 // CHECK-NEXT: [[REG168:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG166]], align 16 -// CHECK-NEXT: [[REG169:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_vmulesh(<8 x i16> [[REG167]], <8 x i16> [[REG168]]) +// CHECK-NEXT: [[REG169:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_vmulesh(<8 x i16> frozen [[REG167]], <8 x i16> frozen [[REG168]]) // CHECK-NEXT: store <4 x i32> [[REG169]], <4 x i32>* [[REG170:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG171:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG162]], align 16 // CHECK-NEXT: [[REG172:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG166]], align 16 -// CHECK-NEXT: [[REG173:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_vmulosh(<8 x i16> [[REG171]], <8 x i16> [[REG172]]) +// CHECK-NEXT: [[REG173:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_vmulosh(<8 x i16> frozen [[REG171]], <8 x i16> frozen [[REG172]]) // CHECK-NEXT: store <4 x i32> [[REG173]], <4 x i32>* [[REG174:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG175:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG170]], align 16 // CHECK-NEXT: [[REG176:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG174]], align 16 // CHECK-NEXT: [[REG177:[0-9a-zA-Z_%.]+]] = load <16 x i8>, <16 x i8>* {{[0-9a-zA-Z_%.]+}}, align 16 -// CHECK-NEXT: call <4 x i32> @vec_perm(int vector[4], int vector[4], unsigned char vector[16])(<4 x i32> [[REG175]], <4 x i32> [[REG176]], <16 x i8> [[REG177]]) +// CHECK-NEXT: call frozen <4 x i32> @vec_perm(int vector[4], int vector[4], unsigned char vector[16])(<4 x i32> frozen [[REG175]], <4 x i32> frozen [[REG176]], <16 x i8> frozen [[REG177]]) -// CHECK: define available_externally i64 @_mm_mullo_pi16 -// CHECK: [[REG178:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_splats(unsigned long long) +// CHECK: define available_externally frozen i64 @_mm_mullo_pi16 +// CHECK: [[REG178:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_splats(unsigned long long) // CHECK-NEXT: [[REG179:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG178]] to <8 x i16> // CHECK-NEXT: store <8 x i16> [[REG179]], <8 x i16>* [[REG180:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG181:[0-9a-zA-Z_%.]+]] = load i64, i64* {{[0-9a-zA-Z_%.]+}}, align 8 -// CHECK-NEXT: [[REG182:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_splats(unsigned long long) +// CHECK-NEXT: [[REG182:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_splats(unsigned long long) // CHECK-NEXT: [[REG183:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG182]] to <8 x i16> // CHECK-NEXT: store <8 x i16> [[REG183]], <8 x i16>* [[REG184:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG185:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG180]], align 16 @@ -495,12 +495,12 @@ // CHECK-LABEL: @test_alt_name_mul -// CHECK: define available_externally i64 @_m_pmulhw -// CHECK: [[REG188:[0-9a-zA-Z_%.]+]] = call i64 @_mm_mulhi_pi16 +// CHECK: define available_externally frozen i64 @_m_pmulhw +// CHECK: [[REG188:[0-9a-zA-Z_%.]+]] = call frozen i64 @_mm_mulhi_pi16 // CHECK-NEXT: ret i64 [[REG188]] -// CHECK: define available_externally i64 @_m_pmullw -// CHECK: [[REG189:[0-9a-zA-Z_%.]+]] = call i64 @_mm_mullo_pi16 +// CHECK: define available_externally frozen i64 @_m_pmullw +// CHECK: [[REG189:[0-9a-zA-Z_%.]+]] = call frozen i64 @_mm_mullo_pi16 // CHECK-NEXT: ret i64 [[REG189]] void __attribute__((noinline)) @@ -512,27 +512,27 @@ // CHECK-LABEL: @test_packs -// CHECK: define available_externally i64 @_mm_packs_pu16(i64 [[REG190:[0-9a-zA-Z_%.]+]], i64 [[REG191:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen i64 @_mm_packs_pu16(i64 frozen [[REG190:[0-9a-zA-Z_%.]+]], i64 frozen [[REG191:[0-9a-zA-Z_%.]+]]) // CHECK: store i64 [[REG190]], i64* [[REG192:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: store i64 [[REG191]], i64* [[REG193:[0-9a-zA-Z_%.]+]], align 8 // CHECK-LE: load i64, i64* [[REG192]], align 8 // CHECK: load i64, i64* [[REG193]], align 8 // CHECK-BE: load i64, i64* [[REG192]], align 8 -// CHECK: [[REG194:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_cmplt +// CHECK: [[REG194:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_cmplt // CHECK-NEXT: store <8 x i16> [[REG194]], <8 x i16>* [[REG195:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG196:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG197:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG198:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG197]], align 16 -// CHECK-NEXT: [[REG199:[0-9a-zA-Z_%.]+]] = call <16 x i8> @vec_packs(unsigned short vector[8], unsigned short vector[8])(<8 x i16> [[REG196]], <8 x i16> [[REG198]]) +// CHECK-NEXT: [[REG199:[0-9a-zA-Z_%.]+]] = call frozen <16 x i8> @vec_packs(unsigned short vector[8], unsigned short vector[8])(<8 x i16> frozen [[REG196]], <8 x i16> frozen [[REG198]]) // CHECK-NEXT: store <16 x i8> [[REG199]], <16 x i8>* [[REG200:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG201:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG195]], align 16 // CHECK-NEXT: [[REG202:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG195]], align 16 -// CHECK-NEXT: [[REG203:[0-9a-zA-Z_%.]+]] = call <16 x i8> @vec_pack(bool vector[8], bool vector[8])(<8 x i16> [[REG201]], <8 x i16> [[REG202]]) +// CHECK-NEXT: [[REG203:[0-9a-zA-Z_%.]+]] = call frozen <16 x i8> @vec_pack(bool vector[8], bool vector[8])(<8 x i16> frozen [[REG201]], <8 x i16> frozen [[REG202]]) // CHECK-NEXT: store <16 x i8> [[REG203]], <16 x i8>* [[REG204:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG205:[0-9a-zA-Z_%.]+]] = load <16 x i8>, <16 x i8>* [[REG200]], align 16 // CHECK-NEXT: [[REG206:[0-9a-zA-Z_%.]+]] = load <16 x i8>, <16 x i8>* [[REG204]], align 16 -// CHECK-NEXT: call <16 x i8> @vec_sel(unsigned char vector[16], unsigned char vector[16], bool vector[16])(<16 x i8> [[REG205]], <16 x i8> zeroinitializer, <16 x i8> [[REG206]]) +// CHECK-NEXT: call frozen <16 x i8> @vec_sel(unsigned char vector[16], unsigned char vector[16], bool vector[16])(<16 x i8> frozen [[REG205]], <16 x i8> frozen zeroinitializer, <16 x i8> frozen [[REG206]]) -// CHECK: define available_externally i64 @_mm_packs_pi16(i64 [[REG207:[0-9a-zA-Z_%.]+]], i64 [[REG208:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen i64 @_mm_packs_pi16(i64 frozen [[REG207:[0-9a-zA-Z_%.]+]], i64 frozen [[REG208:[0-9a-zA-Z_%.]+]]) // CHECK: store i64 [[REG207]], i64* [[REG209:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: store i64 [[REG208]], i64* [[REG210:[0-9a-zA-Z_%.]+]], align 8 // CHECK-LE: load i64, i64* [[REG209]], align 8 @@ -540,9 +540,9 @@ // CHECK-BE: load i64, i64* [[REG209]], align 8 // CHECK: [[REG211:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG212:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG213:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG212]], align 16 -// CHECK-NEXT: call <16 x i8> @vec_packs(short vector[8], short vector[8])(<8 x i16> [[REG211]], <8 x i16> [[REG213]]) +// CHECK-NEXT: call frozen <16 x i8> @vec_packs(short vector[8], short vector[8])(<8 x i16> frozen [[REG211]], <8 x i16> frozen [[REG213]]) -// CHECK: define available_externally i64 @_mm_packs_pi32(i64 [[REG214:[0-9a-zA-Z_%.]+]], i64 [[REG215:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen i64 @_mm_packs_pi32(i64 frozen [[REG214:[0-9a-zA-Z_%.]+]], i64 frozen [[REG215:[0-9a-zA-Z_%.]+]]) // CHECK: store i64 [[REG214]], i64* [[REG216:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: store i64 [[REG215]], i64* [[REG217:[0-9a-zA-Z_%.]+]], align 8 // CHECK-LE: load i64, i64* [[REG216]], align 8 @@ -550,7 +550,7 @@ // CHECK-BE: load i64, i64* [[REG216]], align 8 // CHECK: [[REG218:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG219:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG220:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG219]], align 16 -// CHECK-NEXT: call <8 x i16> @vec_packs(int vector[4], int vector[4])(<4 x i32> [[REG218]], <4 x i32> [[REG220]]) +// CHECK-NEXT: call frozen <8 x i16> @vec_packs(int vector[4], int vector[4])(<4 x i32> frozen [[REG218]], <4 x i32> frozen [[REG220]]) void __attribute__((noinline)) test_alt_name_packs() { @@ -561,16 +561,16 @@ // CHECK-LABEL: @test_alt_name_packs -// CHECK: define available_externally i64 @_m_packssdw -// CHECK: [[REG221:[0-9a-zA-Z_%.]+]] = call i64 @_mm_packs_pi32 +// CHECK: define available_externally frozen i64 @_m_packssdw +// CHECK: [[REG221:[0-9a-zA-Z_%.]+]] = call frozen i64 @_mm_packs_pi32 // CHECK-NEXT: ret i64 [[REG221]] -// CHECK: define available_externally i64 @_m_packsswb -// CHECK: [[REG222:[0-9a-zA-Z_%.]+]] = call i64 @_mm_packs_pi16 +// CHECK: define available_externally frozen i64 @_m_packsswb +// CHECK: [[REG222:[0-9a-zA-Z_%.]+]] = call frozen i64 @_mm_packs_pi16 // CHECK-NEXT: ret i64 [[REG222]] -// CHECK: define available_externally i64 @_m_packuswb -// CHECK: [[REG223:[0-9a-zA-Z_%.]+]] = call i64 @_mm_packs_pu16 +// CHECK: define available_externally frozen i64 @_m_packuswb +// CHECK: [[REG223:[0-9a-zA-Z_%.]+]] = call frozen i64 @_mm_packs_pu16 // CHECK-NEXT: ret i64 [[REG223]] void __attribute__((noinline)) @@ -582,13 +582,13 @@ // CHECK-LABEL: @test_set -// CHECK: define available_externally i64 @_mm_set_pi32 +// CHECK: define available_externally frozen i64 @_mm_set_pi32 // CHECK: [[REG224:[0-9a-zA-Z_%.]+]] = getelementptr inbounds [2 x i32], [2 x i32]* {{[0-9a-zA-Z_%.]+}}, i64 0, i64 0 // CHECK-NEXT: store i32 {{[0-9a-zA-Z_%.]+}}, i32* [[REG224]] // CHECK: [[REG225:[0-9a-zA-Z_%.]+]] = getelementptr inbounds [2 x i32], [2 x i32]* {{[0-9a-zA-Z_%.]+}}, i64 0, i64 1 // CHECK-NEXT: store i32 {{[0-9a-zA-Z_%.]+}}, i32* [[REG225]] -// CHECK: define available_externally i64 @_mm_set_pi16 +// CHECK: define available_externally frozen i64 @_mm_set_pi16 // CHECK: [[REG226:[0-9a-zA-Z_%.]+]] = getelementptr inbounds [4 x i16], [4 x i16]* {{[0-9a-zA-Z_%.]+}}, i64 0, i64 0 // CHECK-NEXT: store i16 {{[0-9a-zA-Z_%.]+}}, i16* [[REG226]] // CHECK: [[REG227:[0-9a-zA-Z_%.]+]] = getelementptr inbounds [4 x i16], [4 x i16]* {{[0-9a-zA-Z_%.]+}}, i64 0, i64 1 @@ -598,7 +598,7 @@ // CHECK: [[REG229:[0-9a-zA-Z_%.]+]] = getelementptr inbounds [4 x i16], [4 x i16]* {{[0-9a-zA-Z_%.]+}}, i64 0, i64 3 // CHECK-NEXT: store i16 {{[0-9a-zA-Z_%.]+}}, i16* [[REG229]] -// CHECK: define available_externally i64 @_mm_set_pi8 +// CHECK: define available_externally frozen i64 @_mm_set_pi8 // CHECK: [[REG230:[0-9a-zA-Z_%.]+]] = getelementptr inbounds [8 x i8], [8 x i8]* {{[0-9a-zA-Z_%.]+}}, i64 0, i64 0 // CHECK-NEXT: store i8 {{[0-9a-zA-Z_%.]+}}, i8* [[REG230]] // CHECK: [[REG231:[0-9a-zA-Z_%.]+]] = getelementptr inbounds [8 x i8], [8 x i8]* {{[0-9a-zA-Z_%.]+}}, i64 0, i64 1 @@ -625,17 +625,17 @@ // CHECK-LABEL: @test_set1 -// CHECK: define available_externally i64 @_mm_set1_pi32 +// CHECK: define available_externally frozen i64 @_mm_set1_pi32 // CHECK: [[REG244:[0-9a-zA-Z_%.]+]] = getelementptr inbounds [2 x i32], [2 x i32]* {{[0-9a-zA-Z_%.]+}}, i64 0, i64 0 // CHECK-NEXT: store i32 {{[0-9a-zA-Z_%.]+}}, i32* [[REG244]], align 8 // CHECK-NEXT: [[REG245:[0-9a-zA-Z_%.]+]] = load i32, i32* {{[0-9a-zA-Z_%.]+}}, align 4 // CHECK: [[REG246:[0-9a-zA-Z_%.]+]] = getelementptr inbounds [2 x i32], [2 x i32]* {{[0-9a-zA-Z_%.]+}}, i64 0, i64 1 // CHECK-NEXT: store i32 {{[0-9a-zA-Z_%.]+}}, i32* [[REG246]], align 4 -// CHECK: define available_externally i64 @_mm_set1_pi16 +// CHECK: define available_externally frozen i64 @_mm_set1_pi16 // CHECK-P9: [[REG247:[0-9a-zA-Z_%.]+]] = load i16, i16* {{[0-9a-zA-Z_%.]+}}, align 2 -// CHECK-P9-NEXT: [[REG248:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_splats(short)(i16 signext [[REG247]]) +// CHECK-P9-NEXT: [[REG248:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_splats(short)(i16 frozen signext [[REG247]]) // CHECK-P9-NEXT: store <8 x i16> %call, <8 x i16>* [[REG249:[0-9a-zA-Z_%.]+]], align 16 // CHECK-P9-NEXT: [[REG250:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG249:[0-9a-zA-Z_%.]+]], align 16 // CHECK-P9-NEXT: [[REG251:[0-9a-zA-Z_%.]+]] = bitcast <8 x i16> [[REG250]] to <2 x i64> @@ -655,8 +655,8 @@ // CHECK-P8: [[REG259:[0-9a-zA-Z_%.]+]] = getelementptr inbounds [4 x i16], [4 x i16]* {{[0-9a-zA-Z_%.]+}}, i64 0, i64 3 // CHECK-P8-NEXT: store i16 [[REG258]], i16* [[REG259]], align 2 -// CHECK: define available_externally i64 @_mm_set1_pi8 -// CHECK: [[REG260:[0-9a-zA-Z_%.]+]] = call <16 x i8> @vec_splats(signed char)(i8 signext {{[0-9a-zA-Z_%.]+}}) +// CHECK: define available_externally frozen i64 @_mm_set1_pi8 +// CHECK: [[REG260:[0-9a-zA-Z_%.]+]] = call frozen <16 x i8> @vec_splats(signed char)(i8 frozen signext {{[0-9a-zA-Z_%.]+}}) // CHECK-NEXT: store <16 x i8> [[REG260]], <16 x i8>* [[REG261:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG262:[0-9a-zA-Z_%.]+]] = load <16 x i8>, <16 x i8>* [[REG261:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG263:[0-9a-zA-Z_%.]+]] = bitcast <16 x i8> %1 to <2 x i64> @@ -672,7 +672,7 @@ // CHECK-LABEL: @test_setr -// CHECK: define available_externally i64 @_mm_setr_pi32 +// CHECK: define available_externally frozen i64 @_mm_setr_pi32 // CHECK: [[REG265:[0-9a-zA-Z_%.]+]] = load i32, i32* {{[0-9a-zA-Z_%.]+}}, align 4 // CHECK: [[REG266:[0-9a-zA-Z_%.]+]] = getelementptr inbounds [2 x i32], [2 x i32]* {{[0-9a-zA-Z_%.]+}}, i64 0, i64 0 // CHECK-NEXT: store i32 [[REG265:[0-9a-zA-Z_%.]+]], i32* [[REG266]], align 8 @@ -680,12 +680,12 @@ // CHECK: [[REG268:[0-9a-zA-Z_%.]+]] = getelementptr inbounds [2 x i32], [2 x i32]* {{[0-9a-zA-Z_%.]+}}, i64 0, i64 1 // CHECK-NEXT: store i32 [[REG267]], i32* [[REG268]], align 4 -// CHECK: define available_externally i64 @_mm_setr_pi16 -// CHECK: [[REG269:[0-9a-zA-Z_%.]+]] = call i64 @_mm_set_pi16 +// CHECK: define available_externally frozen i64 @_mm_setr_pi16 +// CHECK: [[REG269:[0-9a-zA-Z_%.]+]] = call frozen i64 @_mm_set_pi16 // CHECK-NEXT: ret i64 [[REG269]] -// CHECK: define available_externally i64 @_mm_setr_pi8 -// CHECK: [[REG270:[0-9a-zA-Z_%.]+]] = call i64 @_mm_set_pi8 +// CHECK: define available_externally frozen i64 @_mm_setr_pi8 +// CHECK: [[REG270:[0-9a-zA-Z_%.]+]] = call frozen i64 @_mm_set_pi8 // CHECK-NEXT: ret i64 [[REG270]] void __attribute__((noinline)) @@ -695,7 +695,7 @@ // CHECK-LABEL: @test_setzero -// CHECK: define available_externally i64 @_mm_setzero_si64 +// CHECK: define available_externally frozen i64 @_mm_setzero_si64 // CHECK: entry // CHECK-NEXT: ret i64 0 @@ -711,14 +711,14 @@ // CHECK-LABEL: @test_sll -// CHECK: define available_externally i64 @_mm_sll_pi16 +// CHECK: define available_externally frozen i64 @_mm_sll_pi16 // CHECK: [[REG271:[0-9a-zA-Z_%.]+]] = icmp ule i64 {{[0-9a-zA-Z_%.]+}}, 15 // CHECK-NEXT: br i1 [[REG271]], label %[[REG272:[0-9a-zA-Z_.]+]], label %[[REG273:[0-9a-zA-Z_.]+]] // CHECK: [[REG272]] -// CHECK: call <2 x i64> @vec_splats(unsigned long long) +// CHECK: call frozen <2 x i64> @vec_splats(unsigned long long) // CHECK: trunc i64 {{[0-9a-zA-Z_%.]+}} to i16 -// CHECK-NEXT: call <8 x i16> @vec_splats(unsigned short) -// CHECK: call <8 x i16> @vec_sl(short vector[8], unsigned short vector[8]) +// CHECK-NEXT: call frozen <8 x i16> @vec_splats(unsigned short) +// CHECK: call frozen <8 x i16> @vec_sl(short vector[8], unsigned short vector[8]) // CHECK: store i64 [[REG274:[0-9a-zA-Z_%.]+]], i64* [[REG275:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: br label %[[REG276:[0-9a-zA-Z_%.]+]] // CHECK: [[REG273]] @@ -728,7 +728,7 @@ // CHECK-NEXT: [[REG277:[0-9a-zA-Z_%.]+]] = load i64, i64* [[REG275]], align 8 // CHECK-NEXT: ret i64 [[REG277]] -// CHECK: define available_externally i64 @_mm_sll_pi32 +// CHECK: define available_externally frozen i64 @_mm_sll_pi32 // CHECK: [[REG278:[0-9a-zA-Z_%.]+]] = getelementptr inbounds [2 x i32], [2 x i32]* {{[0-9a-zA-Z_%.]+}}, i64 0, i64 0 // CHECK-NEXT: [[REG279:[0-9a-zA-Z_%.]+]] = load i32, i32* [[REG278]] // CHECK-NEXT: [[REG280:[0-9a-zA-Z_%.]+]] = load i64, i64* {{[0-9a-zA-Z_%.]+}} @@ -743,21 +743,21 @@ // CHECK: [[REG287:[0-9a-zA-Z_%.]+]] = getelementptr inbounds [2 x i32], [2 x i32]* {{[0-9a-zA-Z_%.]+}}, i64 0, i64 1 // CHECK-NEXT: store i32 [[REG286]], i32* [[REG287]], align 4 -// CHECK: define available_externally i64 @_mm_sll_si64 +// CHECK: define available_externally frozen i64 @_mm_sll_si64 // CHECK: [[REG288:[0-9a-zA-Z_%.]+]] = shl i64 {{[0-9a-zA-Z_%.]+}}, {{[0-9a-zA-Z_%.]+}} // CHECK-NEXT: ret i64 [[REG288]] -// CHECK: define available_externally i64 @_mm_slli_pi16 +// CHECK: define available_externally frozen i64 @_mm_slli_pi16 // CHECK: [[REG289:[0-9a-zA-Z_%.]+]] = sext i32 {{[0-9a-zA-Z_%.]+}} to i64 -// CHECK-NEXT: [[REG290:[0-9a-zA-Z_%.]+]] = call i64 @_mm_sll_pi16(i64 {{[0-9a-zA-Z_%.]+}}, i64 [[REG289]]) +// CHECK-NEXT: [[REG290:[0-9a-zA-Z_%.]+]] = call frozen i64 @_mm_sll_pi16(i64 frozen {{[0-9a-zA-Z_%.]+}}, i64 frozen [[REG289]]) // CHECK-NEXT: ret i64 [[REG290]] -// CHECK: define available_externally i64 @_mm_slli_pi32 +// CHECK: define available_externally frozen i64 @_mm_slli_pi32 // CHECK: [[REG291:[0-9a-zA-Z_%.]+]] = sext i32 {{[0-9a-zA-Z_%.]+}} to i64 -// CHECK-NEXT: [[REG292:[0-9a-zA-Z_%.]+]] = call i64 @_mm_sll_pi32(i64 {{[0-9a-zA-Z_%.]+}}, i64 [[REG291]]) +// CHECK-NEXT: [[REG292:[0-9a-zA-Z_%.]+]] = call frozen i64 @_mm_sll_pi32(i64 frozen {{[0-9a-zA-Z_%.]+}}, i64 frozen [[REG291]]) // CHECK-NEXT: ret i64 [[REG292]] -// CHECK: define available_externally i64 @_mm_slli_si64 +// CHECK: define available_externally frozen i64 @_mm_slli_si64 // CHECK: [[REG293:[0-9a-zA-Z_%.]+]] = zext i32 {{[0-9a-zA-Z_%.]+}} to i64 // CHECK-NEXT: [[REG294:[0-9a-zA-Z_%.]+]] = shl i64 {{[0-9a-zA-Z_%.]+}}, [[REG293]] // CHECK-NEXT: ret i64 [[REG294]] @@ -774,28 +774,28 @@ // CHECK-LABEL: @test_alt_name_sll -// CHECK: define available_externally i64 @_m_pslld -// CHECK: [[REG295:[0-9a-zA-Z_%.]+]] = call i64 @_mm_sll_pi32 +// CHECK: define available_externally frozen i64 @_m_pslld +// CHECK: [[REG295:[0-9a-zA-Z_%.]+]] = call frozen i64 @_mm_sll_pi32 // CHECK-NEXT: ret i64 [[REG295]] -// CHECK: define available_externally i64 @_m_pslldi -// CHECK: [[REG296:[0-9a-zA-Z_%.]+]] = call i64 @_mm_slli_pi32 +// CHECK: define available_externally frozen i64 @_m_pslldi +// CHECK: [[REG296:[0-9a-zA-Z_%.]+]] = call frozen i64 @_mm_slli_pi32 // CHECK-NEXT: ret i64 [[REG296]] -// CHECK: define available_externally i64 @_m_psllq -// CHECK: [[REG297:[0-9a-zA-Z_%.]+]] = call i64 @_mm_sll_si64 +// CHECK: define available_externally frozen i64 @_m_psllq +// CHECK: [[REG297:[0-9a-zA-Z_%.]+]] = call frozen i64 @_mm_sll_si64 // CHECK-NEXT: ret i64 [[REG297]] -// CHECK: define available_externally i64 @_m_psllqi -// CHECK: [[REG298:[0-9a-zA-Z_%.]+]] = call i64 @_mm_slli_si64 +// CHECK: define available_externally frozen i64 @_m_psllqi +// CHECK: [[REG298:[0-9a-zA-Z_%.]+]] = call frozen i64 @_mm_slli_si64 // CHECK-NEXT: ret i64 [[REG298]] -// CHECK: define available_externally i64 @_m_psllw -// CHECK: [[REG299:[0-9a-zA-Z_%.]+]] = call i64 @_mm_sll_pi16 +// CHECK: define available_externally frozen i64 @_m_psllw +// CHECK: [[REG299:[0-9a-zA-Z_%.]+]] = call frozen i64 @_mm_sll_pi16 // CHECK-NEXT: ret i64 [[REG299]] -// CHECK: define available_externally i64 @_m_psllwi -// CHECK: [[REG300:[0-9a-zA-Z_%.]+]] = call i64 @_mm_slli_pi16 +// CHECK: define available_externally frozen i64 @_m_psllwi +// CHECK: [[REG300:[0-9a-zA-Z_%.]+]] = call frozen i64 @_mm_slli_pi16 // CHECK-NEXT: ret i64 [[REG300]] void __attribute__((noinline)) @@ -808,7 +808,7 @@ // CHECK-LABEL: @test_sra -// CHECK: define available_externally i64 @_mm_sra_pi32 +// CHECK: define available_externally frozen i64 @_mm_sra_pi32 // CHECK: [[REG301:[0-9a-zA-Z_%.]+]] = getelementptr inbounds [2 x i32], [2 x i32]* {{[0-9a-zA-Z_%.]+}}, i64 0, i64 0 // CHECK-NEXT: [[REG302:[0-9a-zA-Z_%.]+]] = load i32, i32* [[REG301]], align 8 // CHECK-NEXT: [[REG303:[0-9a-zA-Z_%.]+]] = load i64, i64* {{[0-9a-zA-Z_%.]+}}, align 8 @@ -824,20 +824,20 @@ // CHECK: [[REG312:[0-9a-zA-Z_%.]+]] = getelementptr inbounds [2 x i32], [2 x i32]* {{[0-9a-zA-Z_%.]+}}, i64 0, i64 1 // CHECK-NEXT: store i32 [[REG311]], i32* [[REG312]], align 4 -// CHECK: define available_externally i64 @_mm_sra_pi16 +// CHECK: define available_externally frozen i64 @_mm_sra_pi16 // CHECK: [[REG313:[0-9a-zA-Z_%.]+]] = icmp ule i64 {{[0-9a-zA-Z_%.]+}}, 15 // CHECK-NEXT: br i1 [[REG313]], label %[[REG314:[0-9a-zA-Z_%.]+]], label %[[REG315:[0-9a-zA-Z_%.]+]] // CHECK: [[REG314]] -// CHECK: [[REG316:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_splats(unsigned long long)(i64 {{[0-9a-zA-Z_%.]+}}) +// CHECK: [[REG316:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_splats(unsigned long long)(i64 frozen {{[0-9a-zA-Z_%.]+}}) // CHECK-NEXT: [[REG317:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG316]] to <8 x i16> // CHECK-NEXT: store <8 x i16> [[REG317]], <8 x i16>* [[REG318:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG319:[0-9a-zA-Z_%.]+]] = load i64, i64* {{[0-9a-zA-Z_%.]+}}, align 8 // CHECK-NEXT: [[REG320:[0-9a-zA-Z_%.]+]] = trunc i64 [[REG319]] to i16 -// CHECK-NEXT: [[REG321:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_splats(unsigned short)(i16 zeroext [[REG320]]) +// CHECK-NEXT: [[REG321:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_splats(unsigned short)(i16 frozen zeroext [[REG320]]) // CHECK-NEXT: store <8 x i16> [[REG321]], <8 x i16>* [[REG322:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG323:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG318]], align 16 // CHECK-NEXT: [[REG324:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG322]], align 16 -// CHECK-NEXT: call <8 x i16> @vec_sra(short vector[8], unsigned short vector[8])(<8 x i16> [[REG323]], <8 x i16> [[REG324]]) +// CHECK-NEXT: call frozen <8 x i16> @vec_sra(short vector[8], unsigned short vector[8])(<8 x i16> frozen [[REG323]], <8 x i16> frozen [[REG324]]) // CHECK: store i64 {{[0-9a-zA-Z_%.]+}}, i64* [[REG325:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: br label %[[REG326:[0-9a-zA-Z_%.]+]] // CHECK: [[REG315]] @@ -847,14 +847,14 @@ // CHECK-NEXT: [[REG327:[0-9a-zA-Z_%.]+]] = load i64, i64* [[REG325]], align 8 // CHECK-NEXT: ret i64 [[REG327]] -// CHECK: define available_externally i64 @_mm_srai_pi32 +// CHECK: define available_externally frozen i64 @_mm_srai_pi32 // CHECK: [[REG328:[0-9a-zA-Z_%.]+]] = sext i32 {{[0-9a-zA-Z_%.]+}} to i64 -// CHECK-NEXT: [[REG329:[0-9a-zA-Z_%.]+]] = call i64 @_mm_sra_pi32(i64 {{[0-9a-zA-Z_%.]+}}, i64 [[REG328]]) +// CHECK-NEXT: [[REG329:[0-9a-zA-Z_%.]+]] = call frozen i64 @_mm_sra_pi32(i64 frozen {{[0-9a-zA-Z_%.]+}}, i64 frozen [[REG328]]) // CHECK-NEXT: ret i64 [[REG329]] -// CHECK: define available_externally i64 @_mm_srai_pi16 +// CHECK: define available_externally frozen i64 @_mm_srai_pi16 // CHECK: [[REG330:[0-9a-zA-Z_%.]+]] = sext i32 {{[0-9a-zA-Z_%.]+}} to i64 -// CHECK-NEXT: [[REG331:[0-9a-zA-Z_%.]+]] = call i64 @_mm_sra_pi16(i64 {{[0-9a-zA-Z_%.]+}}, i64 [[REG330]]) +// CHECK-NEXT: [[REG331:[0-9a-zA-Z_%.]+]] = call frozen i64 @_mm_sra_pi16(i64 frozen {{[0-9a-zA-Z_%.]+}}, i64 frozen [[REG330]]) // CHECK-NEXT: ret i64 [[REG331]] void __attribute__((noinline)) @@ -867,20 +867,20 @@ // CHECK-LABEL: @test_alt_name_sra -// CHECK: define available_externally i64 @_m_psrad -// CHECK: [[REG332:[0-9a-zA-Z_%.]+]] = call i64 @_mm_sra_pi32 +// CHECK: define available_externally frozen i64 @_m_psrad +// CHECK: [[REG332:[0-9a-zA-Z_%.]+]] = call frozen i64 @_mm_sra_pi32 // CHECK-NEXT: ret i64 [[REG332]] -// CHECK: define available_externally i64 @_m_psraw -// CHECK: [[REG333:[0-9a-zA-Z_%.]+]] = call i64 @_mm_sra_pi16 +// CHECK: define available_externally frozen i64 @_m_psraw +// CHECK: [[REG333:[0-9a-zA-Z_%.]+]] = call frozen i64 @_mm_sra_pi16 // CHECK-NEXT: ret i64 [[REG333]] -// CHECK: define available_externally i64 @_m_psradi -// CHECK: [[REG334:[0-9a-zA-Z_%.]+]] = call i64 @_mm_srai_pi32 +// CHECK: define available_externally frozen i64 @_m_psradi +// CHECK: [[REG334:[0-9a-zA-Z_%.]+]] = call frozen i64 @_mm_srai_pi32 // CHECK-NEXT: ret i64 [[REG334]] -// CHECK: define available_externally i64 @_m_psrawi -// CHECK: [[REG335:[0-9a-zA-Z_%.]+]] = call i64 @_mm_srai_pi16 +// CHECK: define available_externally frozen i64 @_m_psrawi +// CHECK: [[REG335:[0-9a-zA-Z_%.]+]] = call frozen i64 @_mm_srai_pi16 // CHECK-NEXT: ret i64 [[REG335]] void __attribute__((noinline)) @@ -895,11 +895,11 @@ // CHECK-LABEL: @test_srl -// CHECK: define available_externally i64 @_mm_srl_si64 +// CHECK: define available_externally frozen i64 @_mm_srl_si64 // CHECK: [[REG336:[0-9a-zA-Z_%.]+]] = lshr i64 {{[0-9a-zA-Z_%.]+}}, {{[0-9a-zA-Z_%.]+}} // CHECK-NEXT: ret i64 [[REG336]] -// CHECK: define available_externally i64 @_mm_srl_pi32 +// CHECK: define available_externally frozen i64 @_mm_srl_pi32 // CHECK: [[REG337:[0-9a-zA-Z_%.]+]] = getelementptr inbounds [2 x i32], [2 x i32]* {{[0-9a-zA-Z_%.]+}}, i64 0, i64 0 // CHECK-NEXT: [[REG338:[0-9a-zA-Z_%.]+]] = load i32, i32* [[REG337]], align 8 // CHECK-NEXT: [[REG339:[0-9a-zA-Z_%.]+]] = load i64, i64* {{[0-9a-zA-Z_%.]+}}, align 8 @@ -915,20 +915,20 @@ // CHECK: [[REG348:[0-9a-zA-Z_%.]+]] = getelementptr inbounds [2 x i32], [2 x i32]* {{[0-9a-zA-Z_%.]+}}, i64 0, i64 1 // CHECK-NEXT: store i32 [[REG347]], i32* [[REG348]], align 4 -// CHECK: define available_externally i64 @_mm_srl_pi16 +// CHECK: define available_externally frozen i64 @_mm_srl_pi16 // CHECK: [[REG349:[0-9a-zA-Z_%.]+]] = icmp ule i64 {{[0-9a-zA-Z_%.]+}}, 15 // CHECK-NEXT: br i1 [[REG349]], label %[[REG350:[0-9a-zA-Z_%.]+]], label %[[REG351:[0-9a-zA-Z_%.]+]] // CHECK: [[REG350]] -// CHECK: [[REG352:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_splats(unsigned long long)(i64 {{[0-9a-zA-Z_%.]+}}) +// CHECK: [[REG352:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_splats(unsigned long long)(i64 frozen {{[0-9a-zA-Z_%.]+}}) // CHECK-NEXT: [[REG353:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG352]] to <8 x i16> // CHECK-NEXT: store <8 x i16> [[REG353]], <8 x i16>* [[REG354:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG355:[0-9a-zA-Z_%.]+]] = load i64, i64* {{[0-9a-zA-Z_%.]+}}, align 8 // CHECK-NEXT: [[REG356:[0-9a-zA-Z_%.]+]] = trunc i64 [[REG355]] to i16 -// CHECK-NEXT: [[REG357:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_splats(unsigned short)(i16 zeroext [[REG356]]) +// CHECK-NEXT: [[REG357:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_splats(unsigned short)(i16 frozen zeroext [[REG356]]) // CHECK-NEXT: store <8 x i16> [[REG357]], <8 x i16>* [[REG358:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG359:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG354]], align 16 // CHECK-NEXT: [[REG360:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG358]], align 16 -// CHECK-NEXT: call <8 x i16> @vec_sr(unsigned short vector[8], unsigned short vector[8])(<8 x i16> [[REG359]], <8 x i16> [[REG360]]) +// CHECK-NEXT: call frozen <8 x i16> @vec_sr(unsigned short vector[8], unsigned short vector[8])(<8 x i16> frozen [[REG359]], <8 x i16> frozen [[REG360]]) // CHECK: store i64 {{[0-9a-zA-Z_%.]+}}, i64* [[REG361:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: br label %[[REG362:[0-9a-zA-Z_%.]+]] // CHECK: [[REG351]] @@ -938,19 +938,19 @@ // CHECK-NEXT: [[REG363:[0-9a-zA-Z_%.]+]] = load i64, i64* [[REG361]], align 8 // CHECK-NEXT: ret i64 [[REG363]] -// CHECK: define available_externally i64 @_mm_srli_si64 +// CHECK: define available_externally frozen i64 @_mm_srli_si64 // CHECK: [[REG364:[0-9a-zA-Z_%.]+]] = zext i32 {{[0-9a-zA-Z_%.]+}} to i64 // CHECK-NEXT: [[REG365:[0-9a-zA-Z_%.]+]] = lshr i64 {{[0-9a-zA-Z_%.]+}}, [[REG364]] // CHECK-NEXT: ret i64 [[REG365]] -// CHECK: define available_externally i64 @_mm_srli_pi32 +// CHECK: define available_externally frozen i64 @_mm_srli_pi32 // CHECK: [[REG366:[0-9a-zA-Z_%.]+]] = sext i32 {{[0-9a-zA-Z_%.]+}} to i64 -// CHECK-NEXT: [[REG367:[0-9a-zA-Z_%.]+]] = call i64 @_mm_srl_pi32(i64 {{[0-9a-zA-Z_%.]+}}, i64 [[REG366]]) +// CHECK-NEXT: [[REG367:[0-9a-zA-Z_%.]+]] = call frozen i64 @_mm_srl_pi32(i64 frozen {{[0-9a-zA-Z_%.]+}}, i64 frozen [[REG366]]) // CHECK-NEXT: ret i64 [[REG367]] -// CHECK: define available_externally i64 @_mm_srli_pi16 +// CHECK: define available_externally frozen i64 @_mm_srli_pi16 // CHECK: [[REG366:[0-9a-zA-Z_%.]+]] = sext i32 {{[0-9a-zA-Z_%.]+}} to i64 -// CHECK-NEXT: [[REG368:[0-9a-zA-Z_%.]+]] = call i64 @_mm_srl_pi16(i64 {{[0-9a-zA-Z_%.]+}}, i64 [[REG366]]) +// CHECK-NEXT: [[REG368:[0-9a-zA-Z_%.]+]] = call frozen i64 @_mm_srl_pi16(i64 frozen {{[0-9a-zA-Z_%.]+}}, i64 frozen [[REG366]]) // CHECK-NEXT: ret i64 [[REG368]] void __attribute__((noinline)) @@ -965,28 +965,28 @@ // CHECK-LABEL: @test_alt_name_srl -// CHECK: define available_externally i64 @_m_psrlq -// CHECK: [[REG369:[0-9a-zA-Z_%.]+]] = call i64 @_mm_srl_si64 +// CHECK: define available_externally frozen i64 @_m_psrlq +// CHECK: [[REG369:[0-9a-zA-Z_%.]+]] = call frozen i64 @_mm_srl_si64 // CHECK-NEXT: ret i64 [[REG369]] -// CHECK: define available_externally i64 @_m_psrld -// CHECK: [[REG370:[0-9a-zA-Z_%.]+]] = call i64 @_mm_srl_pi32 +// CHECK: define available_externally frozen i64 @_m_psrld +// CHECK: [[REG370:[0-9a-zA-Z_%.]+]] = call frozen i64 @_mm_srl_pi32 // CHECK-NEXT: ret i64 [[REG370]] -// CHECK: define available_externally i64 @_m_psrlw -// CHECK: [[REG371:[0-9a-zA-Z_%.]+]] = call i64 @_mm_srl_pi16 +// CHECK: define available_externally frozen i64 @_m_psrlw +// CHECK: [[REG371:[0-9a-zA-Z_%.]+]] = call frozen i64 @_mm_srl_pi16 // CHECK-NEXT: ret i64 [[REG371]] -// CHECK: define available_externally i64 @_m_psrlqi -// CHECK: [[REG372:[0-9a-zA-Z_%.]+]] = call i64 @_mm_srli_si64 +// CHECK: define available_externally frozen i64 @_m_psrlqi +// CHECK: [[REG372:[0-9a-zA-Z_%.]+]] = call frozen i64 @_mm_srli_si64 // CHECK-NEXT: ret i64 [[REG372]] -// CHECK: define available_externally i64 @_m_psrldi -// CHECK: [[REG373:[0-9a-zA-Z_%.]+]] = call i64 @_mm_srli_pi32 +// CHECK: define available_externally frozen i64 @_m_psrldi +// CHECK: [[REG373:[0-9a-zA-Z_%.]+]] = call frozen i64 @_mm_srli_pi32 // CHECK-NEXT: ret i64 [[REG373]] -// CHECK: define available_externally i64 @_m_psrlwi -// CHECK: [[REG374:[0-9a-zA-Z_%.]+]] = call i64 @_mm_srli_pi16 +// CHECK: define available_externally frozen i64 @_m_psrlwi +// CHECK: [[REG374:[0-9a-zA-Z_%.]+]] = call frozen i64 @_mm_srli_pi16 // CHECK-NEXT: ret i64 [[REG374]] void __attribute__((noinline)) @@ -1002,7 +1002,7 @@ // CHECK-LABEL: @test_sub -// CHECK: define available_externally i64 @_mm_sub_pi32 +// CHECK: define available_externally frozen i64 @_mm_sub_pi32 // CHECK-P8: [[REG375:[0-9a-zA-Z_%.]+]] = getelementptr inbounds [2 x i32], [2 x i32]* {{[0-9a-zA-Z_%.]+}}, i64 0, i64 0 // CHECK-P8-NEXT: [[REG376:[0-9a-zA-Z_%.]+]] = load i32, i32* [[REG375]], align 8 @@ -1015,81 +1015,81 @@ // CHECK-P8-NEXT: [[REG382:[0-9a-zA-Z_%.]+]] = load i32, i32* [[REG381]], align 4 // CHECK-P8-NEXT: sub nsw i32 [[REG380]], [[REG382]] -// CHECK-P9: [[REG383:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_splats(unsigned long long)(i64 {{[0-9a-zA-Z_%.]+}}) +// CHECK-P9: [[REG383:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_splats(unsigned long long)(i64 frozen {{[0-9a-zA-Z_%.]+}}) // CHECK-P9-NEXT: [[REG384:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG383]] to <4 x i32> // CHECK-P9-NEXT: store <4 x i32> [[REG384]], <4 x i32>* [[REG385:[0-9a-zA-Z_%.]+]], align 16 -// CHECK-P9: [[REG386:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_splats(unsigned long long)(i64 {{[0-9a-zA-Z_%.]+}}) +// CHECK-P9: [[REG386:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_splats(unsigned long long)(i64 frozen {{[0-9a-zA-Z_%.]+}}) // CHECK-P9-NEXT: [[REG387:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG386]] to <4 x i32> // CHECK-P9-NEXT: store <4 x i32> [[REG387]], <4 x i32>* [[REG388:[0-9a-zA-Z_%.]+]], align 16 // CHECK-P9-NEXT: [[REG389:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG385]], align 16 // CHECK-P9-NEXT: [[REG390:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG388]], align 16 -// CHECK-P9-NEXT: call <4 x i32> @vec_sub(int vector[4], int vector[4])(<4 x i32> [[REG389]], <4 x i32> [[REG390]]) +// CHECK-P9-NEXT: call frozen <4 x i32> @vec_sub(int vector[4], int vector[4])(<4 x i32> frozen [[REG389]], <4 x i32> frozen [[REG390]]) -// CHECK: define available_externally i64 @_mm_sub_pi16 -// CHECK: [[REG391:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_splats(unsigned long long)(i64 {{[0-9a-zA-Z_%.]+}}) +// CHECK: define available_externally frozen i64 @_mm_sub_pi16 +// CHECK: [[REG391:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_splats(unsigned long long)(i64 frozen {{[0-9a-zA-Z_%.]+}}) // CHECK-NEXT: [[REG392:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG391]] to <8 x i16> // CHECK-NEXT: store <8 x i16> [[REG392]], <8 x i16>* [[REG393:[0-9a-zA-Z_%.]+]], align 16 -// CHECK: [[REG394:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_splats(unsigned long long)(i64 {{[0-9a-zA-Z_%.]+}}) +// CHECK: [[REG394:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_splats(unsigned long long)(i64 frozen {{[0-9a-zA-Z_%.]+}}) // CHECK-NEXT: [[REG395:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG394]] to <8 x i16> // CHECK-NEXT: store <8 x i16> [[REG395]], <8 x i16>* [[REG396:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG397:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG393]], align 16 // CHECK-NEXT: [[REG398:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG396]], align 16 -// CHECK-NEXT: call <8 x i16> @vec_sub(short vector[8], short vector[8])(<8 x i16> [[REG397]], <8 x i16> [[REG398]]) +// CHECK-NEXT: call frozen <8 x i16> @vec_sub(short vector[8], short vector[8])(<8 x i16> frozen [[REG397]], <8 x i16> frozen [[REG398]]) -// CHECK: define available_externally i64 @_mm_sub_pi8 -// CHECK: [[REG399:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_splats(unsigned long long)(i64 {{[0-9a-zA-Z_%.]+}}) +// CHECK: define available_externally frozen i64 @_mm_sub_pi8 +// CHECK: [[REG399:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_splats(unsigned long long)(i64 frozen {{[0-9a-zA-Z_%.]+}}) // CHECK-NEXT: [[REG400:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG399]] to <16 x i8> // CHECK-NEXT: store <16 x i8> [[REG400]], <16 x i8>* [[REG401:[0-9a-zA-Z_%.]+]], align 16 -// CHECK: [[REG402:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_splats(unsigned long long)(i64 {{[0-9a-zA-Z_%.]+}}) +// CHECK: [[REG402:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_splats(unsigned long long)(i64 frozen {{[0-9a-zA-Z_%.]+}}) // CHECK-NEXT: [[REG403:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG402]] to <16 x i8> // CHECK-NEXT: store <16 x i8> [[REG403]], <16 x i8>* [[REG404:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG405:[0-9a-zA-Z_%.]+]] = load <16 x i8>, <16 x i8>* [[REG401]], align 16 // CHECK-NEXT: [[REG406:[0-9a-zA-Z_%.]+]] = load <16 x i8>, <16 x i8>* [[REG404]], align 16 -// CHECK-NEXT: call <16 x i8> @vec_sub(signed char vector[16], signed char vector[16])(<16 x i8> [[REG405]], <16 x i8> [[REG406]]) +// CHECK-NEXT: call frozen <16 x i8> @vec_sub(signed char vector[16], signed char vector[16])(<16 x i8> frozen [[REG405]], <16 x i8> frozen [[REG406]]) -// CHECK: define available_externally i64 @_mm_subs_pi16 -// CHECK: [[REG407:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_splats(unsigned long long)(i64 {{[0-9a-zA-Z_%.]+}}) +// CHECK: define available_externally frozen i64 @_mm_subs_pi16 +// CHECK: [[REG407:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_splats(unsigned long long)(i64 frozen {{[0-9a-zA-Z_%.]+}}) // CHECK-NEXT: [[REG408:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG407]] to <8 x i16> // CHECK-NEXT: store <8 x i16> [[REG408]], <8 x i16>* [[REG409:[0-9a-zA-Z_%.]+]], align 16 -// CHECK: [[REG410:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_splats(unsigned long long)(i64 {{[0-9a-zA-Z_%.]+}}) +// CHECK: [[REG410:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_splats(unsigned long long)(i64 frozen {{[0-9a-zA-Z_%.]+}}) // CHECK-NEXT: [[REG411:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG410]] to <8 x i16> // CHECK-NEXT: store <8 x i16> [[REG411]], <8 x i16>* [[REG412:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG413:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG409]], align 16 // CHECK-NEXT: [[REG414:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG412]], align 16 -// CHECK-NEXT: call <8 x i16> @vec_subs(short vector[8], short vector[8])(<8 x i16> [[REG413]], <8 x i16> [[REG414]]) +// CHECK-NEXT: call frozen <8 x i16> @vec_subs(short vector[8], short vector[8])(<8 x i16> frozen [[REG413]], <8 x i16> frozen [[REG414]]) -// CHECK: define available_externally i64 @_mm_subs_pi8 -// CHECK: [[REG415:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_splats(unsigned long long)(i64 {{[0-9a-zA-Z_%.]+}}) +// CHECK: define available_externally frozen i64 @_mm_subs_pi8 +// CHECK: [[REG415:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_splats(unsigned long long)(i64 frozen {{[0-9a-zA-Z_%.]+}}) // CHECK-NEXT: [[REG416:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG415]] to <16 x i8> // CHECK-NEXT: store <16 x i8> [[REG416]], <16 x i8>* [[REG417:[0-9a-zA-Z_%.]+]], align 16 -// CHECK: [[REG418:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_splats(unsigned long long)(i64 {{[0-9a-zA-Z_%.]+}}) +// CHECK: [[REG418:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_splats(unsigned long long)(i64 frozen {{[0-9a-zA-Z_%.]+}}) // CHECK-NEXT: [[REG419:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG418]] to <16 x i8> // CHECK-NEXT: store <16 x i8> [[REG419]], <16 x i8>* [[REG420:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG421:[0-9a-zA-Z_%.]+]] = load <16 x i8>, <16 x i8>* [[REG417]], align 16 // CHECK-NEXT: [[REG422:[0-9a-zA-Z_%.]+]] = load <16 x i8>, <16 x i8>* [[REG420]], align 16 -// CHECK-NEXT: call <16 x i8> @vec_subs(signed char vector[16], signed char vector[16])(<16 x i8> [[REG421]], <16 x i8> [[REG422]]) +// CHECK-NEXT: call frozen <16 x i8> @vec_subs(signed char vector[16], signed char vector[16])(<16 x i8> frozen [[REG421]], <16 x i8> frozen [[REG422]]) -// CHECK: define available_externally i64 @_mm_subs_pu16 -// CHECK: [[REG423:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_splats(unsigned long long)(i64 {{[0-9a-zA-Z_%.]+}}) +// CHECK: define available_externally frozen i64 @_mm_subs_pu16 +// CHECK: [[REG423:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_splats(unsigned long long)(i64 frozen {{[0-9a-zA-Z_%.]+}}) // CHECK-NEXT: [[REG424:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG423]] to <8 x i16> // CHECK-NEXT: store <8 x i16> [[REG424]], <8 x i16>* [[REG425:[0-9a-zA-Z_%.]+]], align 16 -// CHECK: [[REG426:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_splats(unsigned long long)(i64 {{[0-9a-zA-Z_%.]+}}) +// CHECK: [[REG426:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_splats(unsigned long long)(i64 frozen {{[0-9a-zA-Z_%.]+}}) // CHECK-NEXT: [[REG427:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG426]] to <8 x i16> // CHECK-NEXT: store <8 x i16> [[REG427]], <8 x i16>* [[REG428:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG429:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG425]], align 16 // CHECK-NEXT: [[REG430:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG428]], align 16 -// CHECK-NEXT: call <8 x i16> @vec_subs(unsigned short vector[8], unsigned short vector[8])(<8 x i16> [[REG429]], <8 x i16> [[REG430]]) +// CHECK-NEXT: call frozen <8 x i16> @vec_subs(unsigned short vector[8], unsigned short vector[8])(<8 x i16> frozen [[REG429]], <8 x i16> frozen [[REG430]]) -// CHECK: define available_externally i64 @_mm_subs_pu8 -// CHECK: [[REG431:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_splats(unsigned long long)(i64 {{[0-9a-zA-Z_%.]+}}) +// CHECK: define available_externally frozen i64 @_mm_subs_pu8 +// CHECK: [[REG431:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_splats(unsigned long long)(i64 frozen {{[0-9a-zA-Z_%.]+}}) // CHECK-NEXT: [[REG432:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG431]] to <16 x i8> // CHECK-NEXT: store <16 x i8> [[REG432]], <16 x i8>* [[REG433:[0-9a-zA-Z_%.]+]], align 16 -// CHECK: [[REG434:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_splats(unsigned long long)(i64 {{[0-9a-zA-Z_%.]+}}) +// CHECK: [[REG434:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_splats(unsigned long long)(i64 frozen {{[0-9a-zA-Z_%.]+}}) // CHECK-NEXT: [[REG435:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG434]] to <16 x i8> // CHECK-NEXT: store <16 x i8> [[REG435]], <16 x i8>* [[REG436:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG437:[0-9a-zA-Z_%.]+]] = load <16 x i8>, <16 x i8>* [[REG433]], align 16 // CHECK-NEXT: [[REG438:[0-9a-zA-Z_%.]+]] = load <16 x i8>, <16 x i8>* [[REG436]], align 16 -// CHECK-NEXT: call <16 x i8> @vec_subs(unsigned char vector[16], unsigned char vector[16])(<16 x i8> [[REG437]], <16 x i8> [[REG438]]) +// CHECK-NEXT: call frozen <16 x i8> @vec_subs(unsigned char vector[16], unsigned char vector[16])(<16 x i8> frozen [[REG437]], <16 x i8> frozen [[REG438]]) void __attribute__((noinline)) test_alt_name_sub() { @@ -1104,32 +1104,32 @@ // CHECK-LABEL: @test_alt_name_sub -// CHECK: define available_externally i64 @_m_psubd -// CHECK: [[REG439:[0-9a-zA-Z_%.]+]] = call i64 @_mm_sub_pi32 +// CHECK: define available_externally frozen i64 @_m_psubd +// CHECK: [[REG439:[0-9a-zA-Z_%.]+]] = call frozen i64 @_mm_sub_pi32 // CHECK-NEXT: ret i64 [[REG439]] -// CHECK: define available_externally i64 @_m_psubw -// CHECK: [[REG440:[0-9a-zA-Z_%.]+]] = call i64 @_mm_sub_pi16 +// CHECK: define available_externally frozen i64 @_m_psubw +// CHECK: [[REG440:[0-9a-zA-Z_%.]+]] = call frozen i64 @_mm_sub_pi16 // CHECK-NEXT: ret i64 [[REG440]] -// CHECK: define available_externally i64 @_m_psubb -// CHECK: [[REG441:[0-9a-zA-Z_%.]+]] = call i64 @_mm_sub_pi8 +// CHECK: define available_externally frozen i64 @_m_psubb +// CHECK: [[REG441:[0-9a-zA-Z_%.]+]] = call frozen i64 @_mm_sub_pi8 // CHECK-NEXT: ret i64 [[REG441]] -// CHECK: define available_externally i64 @_m_psubsw -// CHECK: [[REG442:[0-9a-zA-Z_%.]+]] = call i64 @_mm_subs_pi16 +// CHECK: define available_externally frozen i64 @_m_psubsw +// CHECK: [[REG442:[0-9a-zA-Z_%.]+]] = call frozen i64 @_mm_subs_pi16 // CHECK-NEXT: ret i64 [[REG442]] -// CHECK: define available_externally i64 @_m_psubsb -// CHECK: [[REG443:[0-9a-zA-Z_%.]+]] = call i64 @_mm_subs_pi8 +// CHECK: define available_externally frozen i64 @_m_psubsb +// CHECK: [[REG443:[0-9a-zA-Z_%.]+]] = call frozen i64 @_mm_subs_pi8 // CHECK-NEXT: ret i64 [[REG443]] -// CHECK: define available_externally i64 @_m_psubusw -// CHECK: [[REG444:[0-9a-zA-Z_%.]+]] = call i64 @_mm_subs_pu16 +// CHECK: define available_externally frozen i64 @_m_psubusw +// CHECK: [[REG444:[0-9a-zA-Z_%.]+]] = call frozen i64 @_mm_subs_pu16 // CHECK-NEXT: ret i64 [[REG444]] -// CHECK: define available_externally i64 @_m_psubusb -// CHECK: [[REG445:[0-9a-zA-Z_%.]+]] = call i64 @_mm_subs_pu8 +// CHECK: define available_externally frozen i64 @_m_psubusb +// CHECK: [[REG445:[0-9a-zA-Z_%.]+]] = call frozen i64 @_mm_subs_pu8 // CHECK-NEXT: ret i64 [[REG445]] void __attribute__((noinline)) @@ -1144,7 +1144,7 @@ // CHECK-LABEL: @test_unpack -// CHECK: define available_externally i64 @_mm_unpackhi_pi32 +// CHECK: define available_externally frozen i64 @_mm_unpackhi_pi32 // CHECK: [[REG446:[0-9a-zA-Z_%.]+]] = getelementptr inbounds [2 x i32], [2 x i32]* {{[0-9a-zA-Z_%.]+}}, i64 0, i64 1 // CHECK-NEXT: [[REG447:[0-9a-zA-Z_%.]+]] = load i32, i32* [[REG446]], align 4 // CHECK-NEXT: [[REG448:[0-9a-zA-Z_%.]+]] = bitcast {{[0-9a-zA-Z_%.]+}}* [[REG449:[0-9a-zA-Z_%.]+]] to [2 x i32]* @@ -1156,7 +1156,7 @@ // CHECK-NEXT: [[REG454:[0-9a-zA-Z_%.]+]] = getelementptr inbounds [2 x i32], [2 x i32]* [[REG453]], i64 0, i64 1 // CHECK-NEXT: store i32 [[REG452]], i32* [[REG454]], align 4 -// CHECK: define available_externally i64 @_mm_unpackhi_pi16 +// CHECK: define available_externally frozen i64 @_mm_unpackhi_pi16 // CHECK: [[REG455:[0-9a-zA-Z_%.]+]] = getelementptr inbounds [4 x i16], [4 x i16]* {{[0-9a-zA-Z_%.]+}}, i64 0, i64 2 // CHECK-NEXT: [[REG456:[0-9a-zA-Z_%.]+]] = load i16, i16* [[REG455]], align 4 // CHECK: [[REG457:[0-9a-zA-Z_%.]+]] = getelementptr inbounds [4 x i16], [4 x i16]* {{[0-9a-zA-Z_%.]+}}, i64 0, i64 0 @@ -1174,19 +1174,19 @@ // CHECK: [[REG466:[0-9a-zA-Z_%.]+]] = getelementptr inbounds [4 x i16], [4 x i16]* {{[0-9a-zA-Z_%.]+}}, i64 0, i64 3 // CHECK-NEXT: store i16 [[REG465]], i16* [[REG466]], align 2 -// CHECK: define available_externally i64 @_mm_unpackhi_pi8 -// CHECK: [[REG467:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_splats(unsigned long long) +// CHECK: define available_externally frozen i64 @_mm_unpackhi_pi8 +// CHECK: [[REG467:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_splats(unsigned long long) // CHECK-NEXT: [[REG468:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG467]] to <16 x i8> // CHECK-NEXT: store <16 x i8> [[REG468]], <16 x i8>* [[REG469:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG470:[0-9a-zA-Z_%.]+]] = load i64, i64* {{[0-9a-zA-Z_%.]+}}, align 8 -// CHECK-NEXT: [[REG471:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_splats(unsigned long long) +// CHECK-NEXT: [[REG471:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_splats(unsigned long long) // CHECK-NEXT: [[REG472:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG471]] to <16 x i8> // CHECK-NEXT: store <16 x i8> [[REG472]], <16 x i8>* [[REG473:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG474:[0-9a-zA-Z_%.]+]] = load <16 x i8>, <16 x i8>* [[REG469]], align 16 // CHECK-NEXT: [[REG475:[0-9a-zA-Z_%.]+]] = load <16 x i8>, <16 x i8>* [[REG473]], align 16 -// CHECK-NEXT: call <16 x i8> @vec_mergel(unsigned char vector[16], unsigned char vector[16])(<16 x i8> [[REG474]], <16 x i8> [[REG475]]) +// CHECK-NEXT: call frozen <16 x i8> @vec_mergel(unsigned char vector[16], unsigned char vector[16])(<16 x i8> frozen [[REG474]], <16 x i8> frozen [[REG475]]) -// CHECK: define available_externally i64 @_mm_unpacklo_pi32 +// CHECK: define available_externally frozen i64 @_mm_unpacklo_pi32 // CHECK: [[REG476:[0-9a-zA-Z_%.]+]] = getelementptr inbounds [2 x i32], [2 x i32]* {{[0-9a-zA-Z_%.]+}}, i64 0, i64 0 // CHECK-NEXT: [[REG477:[0-9a-zA-Z_%.]+]] = load i32, i32* [[REG476]], align 8 // CHECK: [[REG478:[0-9a-zA-Z_%.]+]] = getelementptr inbounds [2 x i32], [2 x i32]* {{[0-9a-zA-Z_%.]+}}, i64 0, i64 0 @@ -1196,7 +1196,7 @@ // CHECK: [[REG481:[0-9a-zA-Z_%.]+]] = getelementptr inbounds [2 x i32], [2 x i32]* {{[0-9a-zA-Z_%.]+}}, i64 0, i64 1 // CHECK-NEXT: store i32 [[REG480]], i32* [[REG481]], align 4 -// CHECK: define available_externally i64 @_mm_unpacklo_pi16 +// CHECK: define available_externally frozen i64 @_mm_unpacklo_pi16 // CHECK: [[REG482:[0-9a-zA-Z_%.]+]] = getelementptr inbounds [4 x i16], [4 x i16]* {{[0-9a-zA-Z_%.]+}}, i64 0, i64 0 // CHECK-NEXT: [[REG483:[0-9a-zA-Z_%.]+]] = load i16, i16* [[REG482]], align 8 // CHECK: [[REG484:[0-9a-zA-Z_%.]+]] = getelementptr inbounds [4 x i16], [4 x i16]* {{[0-9a-zA-Z_%.]+}}, i64 0, i64 0 @@ -1214,17 +1214,17 @@ // CHECK: [[REG493:[0-9a-zA-Z_%.]+]] = getelementptr inbounds [4 x i16], [4 x i16]* {{[0-9a-zA-Z_%.]+}}, i64 0, i64 3 // CHECK-NEXT: store i16 [[REG492]], i16* [[REG493]], align 2 -// CHECK: define available_externally i64 @_mm_unpacklo_pi8 -// CHECK: [[REG494:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_splats(unsigned long long) +// CHECK: define available_externally frozen i64 @_mm_unpacklo_pi8 +// CHECK: [[REG494:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_splats(unsigned long long) // CHECK-NEXT: [[REG495:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG494]] to <16 x i8> // CHECK-NEXT: store <16 x i8> [[REG495]], <16 x i8>* [[REG496:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG497:[0-9a-zA-Z_%.]+]] = load i64, i64* {{[0-9a-zA-Z_%.]+}}, align 8 -// CHECK-NEXT: [[REG498:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_splats(unsigned long long) +// CHECK-NEXT: [[REG498:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_splats(unsigned long long) // CHECK-NEXT: [[REG499:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG498]] to <16 x i8> // CHECK-NEXT: store <16 x i8> [[REG499]], <16 x i8>* [[REG500:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG501:[0-9a-zA-Z_%.]+]] = load <16 x i8>, <16 x i8>* [[REG496]], align 16 // CHECK-NEXT: [[REG502:[0-9a-zA-Z_%.]+]] = load <16 x i8>, <16 x i8>* [[REG500]], align 16 -// CHECK-NEXT: [[REG503:[0-9a-zA-Z_%.]+]] = call <16 x i8> @vec_mergel(unsigned char vector[16], unsigned char vector[16]) +// CHECK-NEXT: [[REG503:[0-9a-zA-Z_%.]+]] = call frozen <16 x i8> @vec_mergel(unsigned char vector[16], unsigned char vector[16]) void __attribute__((noinline)) test_alt_name_unpack() { @@ -1238,26 +1238,26 @@ // CHECK-LABEL: @test_alt_name_unpack -// CHECK: define available_externally i64 @_m_punpckhdq -// CHECK: [[REG238:[0-9a-zA-Z_%.]+]] = call i64 @_mm_unpackhi_pi32 +// CHECK: define available_externally frozen i64 @_m_punpckhdq +// CHECK: [[REG238:[0-9a-zA-Z_%.]+]] = call frozen i64 @_mm_unpackhi_pi32 // CHECK-NEXT: ret i64 [[REG238]] -// CHECK: define available_externally i64 @_m_punpckhwd -// CHECK: [[REG239:[0-9a-zA-Z_%.]+]] = call i64 @_mm_unpackhi_pi16 +// CHECK: define available_externally frozen i64 @_m_punpckhwd +// CHECK: [[REG239:[0-9a-zA-Z_%.]+]] = call frozen i64 @_mm_unpackhi_pi16 // CHECK-NEXT: ret i64 [[REG239]] -// CHECK: define available_externally i64 @_m_punpckhbw -// CHECK: [[REG240:[0-9a-zA-Z_%.]+]] = call i64 @_mm_unpackhi_pi8 +// CHECK: define available_externally frozen i64 @_m_punpckhbw +// CHECK: [[REG240:[0-9a-zA-Z_%.]+]] = call frozen i64 @_mm_unpackhi_pi8 // CHECK-NEXT: ret i64 [[REG240]] -// CHECK: define available_externally i64 @_m_punpckldq -// CHECK: [[REG241:[0-9a-zA-Z_%.]+]] = call i64 @_mm_unpacklo_pi32 +// CHECK: define available_externally frozen i64 @_m_punpckldq +// CHECK: [[REG241:[0-9a-zA-Z_%.]+]] = call frozen i64 @_mm_unpacklo_pi32 // CHECK-NEXT: ret i64 [[REG241]] -// CHECK: define available_externally i64 @_m_punpcklwd -// CHECK: [[REG242:[0-9a-zA-Z_%.]+]] = call i64 @_mm_unpacklo_pi16 +// CHECK: define available_externally frozen i64 @_m_punpcklwd +// CHECK: [[REG242:[0-9a-zA-Z_%.]+]] = call frozen i64 @_mm_unpacklo_pi16 // CHECK-NEXT: ret i64 [[REG242]] -// CHECK: define available_externally i64 @_m_punpcklbw -// CHECK: [[REG243:[0-9a-zA-Z_%.]+]] = call i64 @_mm_unpacklo_pi8 +// CHECK: define available_externally frozen i64 @_m_punpcklbw +// CHECK: [[REG243:[0-9a-zA-Z_%.]+]] = call frozen i64 @_mm_unpacklo_pi8 // CHECK-NEXT: ret i64 [[REG243]] diff --git a/clang/test/CodeGen/ppc-pmmintrin.c b/clang/test/CodeGen/ppc-pmmintrin.c --- a/clang/test/CodeGen/ppc-pmmintrin.c +++ b/clang/test/CodeGen/ppc-pmmintrin.c @@ -30,43 +30,43 @@ // CHECK-LABEL: @test_pmmintrin -// CHECK: define available_externally <2 x double> @_mm_addsub_pd(<2 x double> [[REG1:[0-9a-zA-Z_%.]+]], <2 x double> [[REG2:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x double> @_mm_addsub_pd(<2 x double> frozen [[REG1:[0-9a-zA-Z_%.]+]], <2 x double> frozen [[REG2:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x double> [[REG1]], <2 x double>* [[REG3:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <2 x double> [[REG2]], <2 x double>* [[REG4:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <2 x double> , <2 x double>* [[REG5:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG7:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG4]], align 16 -// CHECK-NEXT: [[REG8:[0-9a-zA-Z_%.]+]] = call <2 x double> @vec_xor(double vector[2], double vector[2])(<2 x double> [[REG7]], <2 x double> ) +// CHECK-NEXT: [[REG8:[0-9a-zA-Z_%.]+]] = call frozen <2 x double> @vec_xor(double vector[2], double vector[2])(<2 x double> frozen [[REG7]], <2 x double> frozen ) // CHECK-NEXT: store <2 x double> [[REG8]], <2 x double>* [[REG6:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG9:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG3]], align 16 // CHECK-NEXT: [[REG10:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG6]], align 16 -// CHECK-NEXT: [[REG11:[0-9a-zA-Z_%.]+]] = call <2 x double> @vec_add(double vector[2], double vector[2])(<2 x double> [[REG9]], <2 x double> [[REG10]]) +// CHECK-NEXT: [[REG11:[0-9a-zA-Z_%.]+]] = call frozen <2 x double> @vec_add(double vector[2], double vector[2])(<2 x double> frozen [[REG9]], <2 x double> frozen [[REG10]]) // CHECK-NEXT: ret <2 x double> [[REG11]] -// CHECK: define available_externally <4 x float> @_mm_addsub_ps(<4 x float> [[REG12:[0-9a-zA-Z_%.]+]], <4 x float> [[REG13:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <4 x float> @_mm_addsub_ps(<4 x float> frozen [[REG12:[0-9a-zA-Z_%.]+]], <4 x float> frozen [[REG13:[0-9a-zA-Z_%.]+]]) // CHECK: store <4 x float> [[REG12]], <4 x float>* [[REG14:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <4 x float> [[REG13]], <4 x float>* [[REG15:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <4 x float> , <4 x float>* [[REG16:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG18:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG15]], align 16 -// CHECK-NEXT: [[REG19:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_xor(float vector[4], float vector[4])(<4 x float> [[REG18]], <4 x float> ) +// CHECK-NEXT: [[REG19:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_xor(float vector[4], float vector[4])(<4 x float> frozen [[REG18]], <4 x float> frozen ) // CHECK-NEXT: store <4 x float> [[REG19]], <4 x float>* [[REG17:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG20:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG14]], align 16 // CHECK-NEXT: [[REG21:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG17]], align 16 -// CHECK-NEXT: [[REG22:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_add(float vector[4], float vector[4])(<4 x float> [[REG20]], <4 x float> [[REG21]]) +// CHECK-NEXT: [[REG22:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_add(float vector[4], float vector[4])(<4 x float> frozen [[REG20]], <4 x float> frozen [[REG21]]) // CHECK-NEXT: ret <4 x float> [[REG22]] -// CHECK: define available_externally <2 x double> @_mm_hadd_pd(<2 x double> [[REG23:[0-9a-zA-Z_%.]+]], <2 x double> [[REG24:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x double> @_mm_hadd_pd(<2 x double> frozen [[REG23:[0-9a-zA-Z_%.]+]], <2 x double> frozen [[REG24:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x double> [[REG23]], <2 x double>* [[REG25:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <2 x double> [[REG24]], <2 x double>* [[REG26:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG27:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG25]], align 16 // CHECK-NEXT: [[REG28:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG26]], align 16 -// CHECK-NEXT: [[REG29:[0-9a-zA-Z_%.]+]] = call <2 x double> @vec_mergeh(double vector[2], double vector[2])(<2 x double> [[REG27]], <2 x double> [[REG28]]) +// CHECK-NEXT: [[REG29:[0-9a-zA-Z_%.]+]] = call frozen <2 x double> @vec_mergeh(double vector[2], double vector[2])(<2 x double> frozen [[REG27]], <2 x double> frozen [[REG28]]) // CHECK-NEXT: [[REG30:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG25]], align 16 // CHECK-NEXT: [[REG31:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG26]], align 16 -// CHECK-NEXT: [[REG32:[0-9a-zA-Z_%.]+]] = call <2 x double> @vec_mergel(double vector[2], double vector[2])(<2 x double> [[REG30]], <2 x double> [[REG31]]) -// CHECK-NEXT: [[REG33:[0-9a-zA-Z_%.]+]] = call <2 x double> @vec_add(double vector[2], double vector[2])(<2 x double> [[REG29]], <2 x double> [[REG32]]) +// CHECK-NEXT: [[REG32:[0-9a-zA-Z_%.]+]] = call frozen <2 x double> @vec_mergel(double vector[2], double vector[2])(<2 x double> frozen [[REG30]], <2 x double> frozen [[REG31]]) +// CHECK-NEXT: [[REG33:[0-9a-zA-Z_%.]+]] = call frozen <2 x double> @vec_add(double vector[2], double vector[2])(<2 x double> frozen [[REG29]], <2 x double> frozen [[REG32]]) // CHECK-NEXT: ret <2 x double> [[REG33]] -// CHECK: define available_externally <4 x float> @_mm_hadd_ps(<4 x float> [[REG34:[0-9a-zA-Z_%.]+]], <4 x float> [[REG35:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <4 x float> @_mm_hadd_ps(<4 x float> frozen [[REG34:[0-9a-zA-Z_%.]+]], <4 x float> frozen [[REG35:[0-9a-zA-Z_%.]+]]) // CHECK: store <4 x float> [[REG34]], <4 x float>* [[REG36:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <4 x float> [[REG35]], <4 x float>* [[REG37:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <16 x i8> , <16 x i8>* [[REG38:[0-9a-zA-Z_%.]+]], align 16 @@ -74,27 +74,27 @@ // CHECK-NEXT: [[REG40:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG36]], align 16 // CHECK-NEXT: [[REG41:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG37]], align 16 // CHECK-NEXT: [[REG42:[0-9a-zA-Z_%.]+]] = load <16 x i8>, <16 x i8>* [[REG38:[0-9a-zA-Z_%.]+]], align 16 -// CHECK-NEXT: [[REG43:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_perm(float vector[4], float vector[4], unsigned char vector[16])(<4 x float> [[REG40]], <4 x float> [[REG41]], <16 x i8> [[REG42]]) +// CHECK-NEXT: [[REG43:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_perm(float vector[4], float vector[4], unsigned char vector[16])(<4 x float> frozen [[REG40]], <4 x float> frozen [[REG41]], <16 x i8> frozen [[REG42]]) // CHECK-NEXT: [[REG44:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG36]], align 16 // CHECK-NEXT: [[REG45:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG37]], align 16 // CHECK-NEXT: [[REG46:[0-9a-zA-Z_%.]+]] = load <16 x i8>, <16 x i8>* [[REG39:[0-9a-zA-Z_%.]+]], align 16 -// CHECK-NEXT: [[REG47:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_perm(float vector[4], float vector[4], unsigned char vector[16])(<4 x float> [[REG44]], <4 x float> [[REG45]], <16 x i8> [[REG46]]) -// CHECK-NEXT: [[REG48:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_add(float vector[4], float vector[4])(<4 x float> [[REG43]], <4 x float> [[REG47]]) +// CHECK-NEXT: [[REG47:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_perm(float vector[4], float vector[4], unsigned char vector[16])(<4 x float> frozen [[REG44]], <4 x float> frozen [[REG45]], <16 x i8> frozen [[REG46]]) +// CHECK-NEXT: [[REG48:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_add(float vector[4], float vector[4])(<4 x float> frozen [[REG43]], <4 x float> frozen [[REG47]]) // CHECK-NEXT: ret <4 x float> [[REG48]] -// CHECK: define available_externally <2 x double> @_mm_hsub_pd(<2 x double> [[REG49:[0-9a-zA-Z_%.]+]], <2 x double> [[REG50:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x double> @_mm_hsub_pd(<2 x double> frozen [[REG49:[0-9a-zA-Z_%.]+]], <2 x double> frozen [[REG50:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x double> [[REG49]], <2 x double>* [[REG51:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <2 x double> [[REG50]], <2 x double>* [[REG52:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG53:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG51]], align 16 // CHECK-NEXT: [[REG54:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG52]], align 16 -// CHECK-NEXT: [[REG55:[0-9a-zA-Z_%.]+]] = call <2 x double> @vec_mergeh(double vector[2], double vector[2])(<2 x double> [[REG53]], <2 x double> [[REG54]]) +// CHECK-NEXT: [[REG55:[0-9a-zA-Z_%.]+]] = call frozen <2 x double> @vec_mergeh(double vector[2], double vector[2])(<2 x double> frozen [[REG53]], <2 x double> frozen [[REG54]]) // CHECK-NEXT: [[REG56:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG51]], align 16 // CHECK-NEXT: [[REG57:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG52]], align 16 -// CHECK-NEXT: [[REG58:[0-9a-zA-Z_%.]+]] = call <2 x double> @vec_mergel(double vector[2], double vector[2])(<2 x double> [[REG56]], <2 x double> [[REG57]]) -// CHECK-NEXT: [[REG59:[0-9a-zA-Z_%.]+]] = call <2 x double> @vec_sub(double vector[2], double vector[2])(<2 x double> [[REG55]], <2 x double> [[REG58]]) +// CHECK-NEXT: [[REG58:[0-9a-zA-Z_%.]+]] = call frozen <2 x double> @vec_mergel(double vector[2], double vector[2])(<2 x double> frozen [[REG56]], <2 x double> frozen [[REG57]]) +// CHECK-NEXT: [[REG59:[0-9a-zA-Z_%.]+]] = call frozen <2 x double> @vec_sub(double vector[2], double vector[2])(<2 x double> frozen [[REG55]], <2 x double> frozen [[REG58]]) // CHECK-NEXT: ret <2 x double> [[REG59]] -// CHECK: define available_externally <4 x float> @_mm_hsub_ps(<4 x float> [[REG60:[0-9a-zA-Z_%.]+]], <4 x float> [[REG61:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <4 x float> @_mm_hsub_ps(<4 x float> frozen [[REG60:[0-9a-zA-Z_%.]+]], <4 x float> frozen [[REG61:[0-9a-zA-Z_%.]+]]) // CHECK: store <4 x float> [[REG60]], <4 x float>* [[REG62:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <4 x float> [[REG61]], <4 x float>* [[REG63:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <16 x i8> , <16 x i8>* [[REG64:[0-9a-zA-Z_%.]+]], align 16 @@ -102,52 +102,52 @@ // CHECK-NEXT: [[REG66:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG62]], align 16 // CHECK-NEXT: [[REG67:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG63]], align 16 // CHECK-NEXT: [[REG68:[0-9a-zA-Z_%.]+]] = load <16 x i8>, <16 x i8>* [[REG64]], align 16 -// CHECK-NEXT: [[REG69:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_perm(float vector[4], float vector[4], unsigned char vector[16])(<4 x float> [[REG66]], <4 x float> [[REG67]], <16 x i8> [[REG68]]) +// CHECK-NEXT: [[REG69:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_perm(float vector[4], float vector[4], unsigned char vector[16])(<4 x float> frozen [[REG66]], <4 x float> frozen [[REG67]], <16 x i8> frozen [[REG68]]) // CHECK-NEXT: [[REG70:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG62]], align 16 // CHECK-NEXT: [[REG71:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG63]], align 16 // CHECK-NEXT: [[REG72:[0-9a-zA-Z_%.]+]] = load <16 x i8>, <16 x i8>* [[REG65]], align 16 -// CHECK-NEXT: [[REG73:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_perm(float vector[4], float vector[4], unsigned char vector[16])(<4 x float> [[REG70]], <4 x float> [[REG71]], <16 x i8> [[REG72]]) -// CHECK-NEXT: [[REG74:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_sub(float vector[4], float vector[4])(<4 x float> [[REG69]], <4 x float> [[REG73]]) +// CHECK-NEXT: [[REG73:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_perm(float vector[4], float vector[4], unsigned char vector[16])(<4 x float> frozen [[REG70]], <4 x float> frozen [[REG71]], <16 x i8> frozen [[REG72]]) +// CHECK-NEXT: [[REG74:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_sub(float vector[4], float vector[4])(<4 x float> frozen [[REG69]], <4 x float> frozen [[REG73]]) // CHECK-NEXT: ret <4 x float> [[REG74]] -// CHECK: define available_externally <2 x i64> @_mm_lddqu_si128(<2 x i64>* [[REG75:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x i64> @_mm_lddqu_si128(<2 x i64>* frozen [[REG75:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x i64>* [[REG75]], <2 x i64>** [[REG76:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: [[REG77:[0-9a-zA-Z_%.]+]] = load <2 x i64>*, <2 x i64>** [[REG76]], align 8 // CHECK-NEXT: [[REG78:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64>* [[REG77]] to i32* -// CHECK-NEXT: [[REG79:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_vsx_ld(int, int const*)(i32 signext 0, i32* [[REG78]]) +// CHECK-NEXT: [[REG79:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_vsx_ld(int, int const*)(i32 frozen signext 0, i32* frozen [[REG78]]) // CHECK-NEXT: [[REG80:[0-9a-zA-Z_%.]+]] = bitcast <4 x i32> [[REG79]] to <2 x i64> // CHECK-NEXT: ret <2 x i64> [[REG80]] -// CHECK: define available_externally <2 x double> @_mm_loaddup_pd(double* [[REG81:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x double> @_mm_loaddup_pd(double* frozen [[REG81:[0-9a-zA-Z_%.]+]]) // CHECK: store double* [[REG81]], double** [[REG82:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: [[REG83:[0-9a-zA-Z_%.]+]] = load double*, double** [[REG82]], align 8 // CHECK-NEXT: [[REG84:[0-9a-zA-Z_%.]+]] = load double, double* [[REG83]], align 8 -// CHECK-NEXT: [[REG85:[0-9a-zA-Z_%.]+]] = call <2 x double> @vec_splats(double)(double [[REG84]]) +// CHECK-NEXT: [[REG85:[0-9a-zA-Z_%.]+]] = call frozen <2 x double> @vec_splats(double)(double frozen [[REG84]]) // CHECK-NEXT: ret <2 x double> [[REG85]] -// CHECK: define available_externally <2 x double> @_mm_movedup_pd(<2 x double> [[REG86:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x double> @_mm_movedup_pd(<2 x double> frozen [[REG86:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x double> [[REG86]], <2 x double>* [[REG87:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG88:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG87]], align 16 // CHECK-NEXT: [[REG89:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG87]], align 16 -// CHECK-NEXT: [[REG90:[0-9a-zA-Z_%.]+]] = call <2 x double> @_mm_shuffle_pd(<2 x double> [[REG88]], <2 x double> [[REG89]], i32 signext 0) +// CHECK-NEXT: [[REG90:[0-9a-zA-Z_%.]+]] = call frozen <2 x double> @_mm_shuffle_pd(<2 x double> frozen [[REG88]], <2 x double> frozen [[REG89]], i32 frozen signext 0) // CHECK-NEXT: ret <2 x double> [[REG90]] -// CHECK: define available_externally <4 x float> @_mm_movehdup_ps(<4 x float> [[REG91:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <4 x float> @_mm_movehdup_ps(<4 x float> frozen [[REG91:[0-9a-zA-Z_%.]+]]) // CHECK: store <4 x float> [[REG91]], <4 x float>* [[REG92:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG93:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG92]], align 16 // CHECK-NEXT: [[REG94:[0-9a-zA-Z_%.]+]] = bitcast <4 x float> [[REG93]] to <4 x i32> // CHECK-NEXT: [[REG95:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG92]], align 16 // CHECK-NEXT: [[REG96:[0-9a-zA-Z_%.]+]] = bitcast <4 x float> [[REG95]] to <4 x i32> -// CHECK-NEXT: [[REG97:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_mergeo(unsigned int vector[4], unsigned int vector[4])(<4 x i32> [[REG94]], <4 x i32> [[REG96]]) +// CHECK-NEXT: [[REG97:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_mergeo(unsigned int vector[4], unsigned int vector[4])(<4 x i32> frozen [[REG94]], <4 x i32> frozen [[REG96]]) // CHECK-NEXT: [[REG98:[0-9a-zA-Z_%.]+]] = bitcast <4 x i32> [[REG97]] to <4 x float> // CHECK-NEXT: ret <4 x float> [[REG98]] -// CHECK: define available_externally <4 x float> @_mm_moveldup_ps(<4 x float> [[REG99:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <4 x float> @_mm_moveldup_ps(<4 x float> frozen [[REG99:[0-9a-zA-Z_%.]+]]) // CHECK: store <4 x float> [[REG99]], <4 x float>* [[REG100:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG101:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG100]], align 16 // CHECK-NEXT: [[REG102:[0-9a-zA-Z_%.]+]] = bitcast <4 x float> [[REG101]] to <4 x i32> // CHECK-NEXT: [[REG103:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG100]], align 16 // CHECK-NEXT: [[REG104:[0-9a-zA-Z_%.]+]] = bitcast <4 x float> [[REG103]] to <4 x i32> -// CHECK-NEXT: [[REG105:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_mergee(unsigned int vector[4], unsigned int vector[4])(<4 x i32> [[REG102]], <4 x i32> [[REG104]]) +// CHECK-NEXT: [[REG105:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_mergee(unsigned int vector[4], unsigned int vector[4])(<4 x i32> frozen [[REG102]], <4 x i32> frozen [[REG104]]) // CHECK-NEXT: [[REG106:[0-9a-zA-Z_%.]+]] = bitcast <4 x i32> [[REG105]] to <4 x float> // CHECK-NEXT: ret <4 x float> [[REG106]] diff --git a/clang/test/CodeGen/ppc-signbit.c b/clang/test/CodeGen/ppc-signbit.c --- a/clang/test/CodeGen/ppc-signbit.c +++ b/clang/test/CodeGen/ppc-signbit.c @@ -3,7 +3,7 @@ int test(long double x) { return __builtin_signbitl(x); } -// CHECK-LABEL: define signext i32 @test(ppc_fp128 %x) +// CHECK-LABEL: define frozen signext i32 @test(ppc_fp128 frozen %x) // CHECK: bitcast ppc_fp128 %{{.*}} to i128 // CHECK: trunc i128 %{{.*}} to i64 // CHECK: icmp slt i64 %{{.*}}, 0 diff --git a/clang/test/CodeGen/ppc-smmintrin.c b/clang/test/CodeGen/ppc-smmintrin.c --- a/clang/test/CodeGen/ppc-smmintrin.c +++ b/clang/test/CodeGen/ppc-smmintrin.c @@ -20,7 +20,7 @@ // CHECK-LABEL: @test_extract -// CHECK: define available_externally signext i32 @_mm_extract_epi8(<2 x i64> [[REG1:[0-9a-zA-Z_%.]+]], i32 signext [[REG2:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen signext i32 @_mm_extract_epi8(<2 x i64> frozen [[REG1:[0-9a-zA-Z_%.]+]], i32 frozen signext [[REG2:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x i64> [[REG1]], <2 x i64>* [[REG3:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store i32 [[REG2]], i32* [[REG4:[0-9a-zA-Z_%.]+]], align 4 // CHECK-NEXT: [[REG5:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG3]], align 16 @@ -31,7 +31,7 @@ // CHECK-NEXT: [[REG10:[0-9a-zA-Z_%.]+]] = zext i8 [[REG9]] to i32 // CHECK-NEXT: ret i32 [[REG10]] -// CHECK: define available_externally signext i32 @_mm_extract_epi32(<2 x i64> [[REG11:[0-9a-zA-Z_%.]+]], i32 signext [[REG12:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen signext i32 @_mm_extract_epi32(<2 x i64> frozen [[REG11:[0-9a-zA-Z_%.]+]], i32 frozen signext [[REG12:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x i64> [[REG11]], <2 x i64>* [[REG13:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store i32 [[REG12]], i32* [[REG14:[0-9a-zA-Z_%.]+]], align 4 // CHECK-NEXT: [[REG15:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG13]], align 16 @@ -41,7 +41,7 @@ // CHECK-NEXT: [[REG19:[0-9a-zA-Z_%.]+]] = extractelement <4 x i32> [[REG16]], i32 [[REG18]] // CHECK-NEXT: ret i32 [[REG19]] -// CHECK: define available_externally signext i32 @_mm_extract_epi64(<2 x i64> [[REG20:[0-9a-zA-Z_%.]+]], i32 signext [[REG21:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen signext i32 @_mm_extract_epi64(<2 x i64> frozen [[REG20:[0-9a-zA-Z_%.]+]], i32 frozen signext [[REG21:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x i64> [[REG20]], <2 x i64>* [[REG22:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store i32 [[REG21]], i32* [[REG23:[0-9a-zA-Z_%.]+]], align 4 // CHECK-NEXT: [[REG24:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG22]], align 16 @@ -51,7 +51,7 @@ // CHECK-NEXT: [[REG28:[0-9a-zA-Z_%.]+]] = trunc i64 [[REG27]] to i32 // CHECK-NEXT: ret i32 [[REG28]] -// CHECK: define available_externally signext i32 @_mm_extract_ps(<4 x float> [[REG29:[0-9a-zA-Z_%.]+]], i32 signext [[REG30:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen signext i32 @_mm_extract_ps(<4 x float> frozen [[REG29:[0-9a-zA-Z_%.]+]], i32 frozen signext [[REG30:[0-9a-zA-Z_%.]+]]) // CHECK: store <4 x float> [[REG29]], <4 x float>* [[REG31:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store i32 [[REG30]], i32* [[REG32:[0-9a-zA-Z_%.]+]], align 4 // CHECK-NEXT: [[REG33:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG31]], align 16 @@ -69,23 +69,23 @@ // CHECK-LABEL: @test_blend -// CHECK: define available_externally <2 x i64> @_mm_blend_epi16(<2 x i64> [[REG38:[0-9a-zA-Z_%.]+]], <2 x i64> [[REG39:[0-9a-zA-Z_%.]+]], i32 signext [[REG40:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x i64> @_mm_blend_epi16(<2 x i64> frozen [[REG38:[0-9a-zA-Z_%.]+]], <2 x i64> frozen [[REG39:[0-9a-zA-Z_%.]+]], i32 frozen signext [[REG40:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x i64> [[REG38]], <2 x i64>* [[REG41:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <2 x i64> [[REG39]], <2 x i64>* [[REG42:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store i32 [[REG40]], i32* [[REG43:[0-9a-zA-Z_%.]+]], align 4 // CHECK-NEXT: [[REG44:[0-9a-zA-Z_%.]+]] = load i32, i32* [[REG43]], align 4 // CHECK-NEXT: [[REG45:[0-9a-zA-Z_%.]+]] = trunc i32 [[REG44]] to i8 -// CHECK-NEXT: [[REG46:[0-9a-zA-Z_%.]+]] = call <16 x i8> @vec_splats(signed char)(i8 signext [[REG45]]) +// CHECK-NEXT: [[REG46:[0-9a-zA-Z_%.]+]] = call frozen <16 x i8> @vec_splats(signed char)(i8 frozen signext [[REG45]]) // CHECK-NEXT: store <16 x i8> [[REG46]], <16 x i8>* [[REG47:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG48:[0-9a-zA-Z_%.]+]] = load <16 x i8>, <16 x i8>* [[REG47]], align 16 // CHECK-NEXT: [[REG49:[0-9a-zA-Z_%.]+]] = call <16 x i8> @llvm.ppc.altivec.vgbbd(<16 x i8> [[REG48]]) // CHECK-NEXT: store <16 x i8> [[REG49]], <16 x i8>* [[REG47]], align 16 // CHECK-NEXT: [[REG50:[0-9a-zA-Z_%.]+]] = load <16 x i8>, <16 x i8>* [[REG47]], align 16 -// CHECK-NEXT: [[REG51:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_unpackh(signed char vector[16])(<16 x i8> [[REG50]]) +// CHECK-NEXT: [[REG51:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_unpackh(signed char vector[16])(<16 x i8> frozen [[REG50]]) // CHECK-NEXT: store <8 x i16> [[REG51]], <8 x i16>* [[REG52:[0-9a-zA-Z_%.]+]], align 16 // BE: [[REG53:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG52]], align 16 -// BE-NEXT: [[REG54:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_reve(unsigned short vector[8])(<8 x i16> [[REG53]]) +// BE-NEXT: [[REG54:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_reve(unsigned short vector[8])(<8 x i16> frozen [[REG53]]) // BE-NEXT: store <8 x i16> [[REG54]], <8 x i16>* [[REG52]], align 16 // CHECK: [[REG55:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG41]], align 16 @@ -93,26 +93,26 @@ // CHECK-NEXT: [[REG57:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG42]], align 16 // CHECK-NEXT: [[REG58:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG57]] to <8 x i16> // CHECK-NEXT: [[REG59:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG52]], align 16 -// CHECK-NEXT: [[REG60:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_sel(unsigned short vector[8], unsigned short vector[8], unsigned short vector[8])(<8 x i16> [[REG56]], <8 x i16> [[REG58]], <8 x i16> [[REG59]]) +// CHECK-NEXT: [[REG60:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_sel(unsigned short vector[8], unsigned short vector[8], unsigned short vector[8])(<8 x i16> frozen [[REG56]], <8 x i16> frozen [[REG58]], <8 x i16> frozen [[REG59]]) // CHECK-NEXT: [[REG61:[0-9a-zA-Z_%.]+]] = bitcast <8 x i16> [[REG60]] to <2 x i64> // CHECK-NEXT: ret <2 x i64> [[REG61]] -// CHECK: define available_externally <2 x i64> @_mm_blendv_epi8(<2 x i64> [[REG62:[0-9a-zA-Z_%.]+]], <2 x i64> [[REG63:[0-9a-zA-Z_%.]+]], <2 x i64> [[REG64:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x i64> @_mm_blendv_epi8(<2 x i64> frozen [[REG62:[0-9a-zA-Z_%.]+]], <2 x i64> frozen [[REG63:[0-9a-zA-Z_%.]+]], <2 x i64> frozen [[REG64:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x i64> [[REG62]], <2 x i64>* [[REG65:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <2 x i64> [[REG63]], <2 x i64>* [[REG66:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <2 x i64> [[REG64]], <2 x i64>* [[REG67:[0-9a-zA-Z_%.]+]], align 16 -// CHECK-NEXT: [[REG68:[0-9a-zA-Z_%.]+]] = call <16 x i8> @vec_splats(unsigned char)(i8 zeroext 7) +// CHECK-NEXT: [[REG68:[0-9a-zA-Z_%.]+]] = call frozen <16 x i8> @vec_splats(unsigned char)(i8 frozen zeroext 7) // CHECK-NEXT: store <16 x i8> [[REG68]], <16 x i8>* [[REG69:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG70:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG67]], align 16 // CHECK-NEXT: [[REG71:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG70]] to <16 x i8> // CHECK-NEXT: [[REG72:[0-9a-zA-Z_%.]+]] = load <16 x i8>, <16 x i8>* [[REG69]], align 16 -// CHECK-NEXT: [[REG73:[0-9a-zA-Z_%.]+]] = call <16 x i8> @vec_sra(unsigned char vector[16], unsigned char vector[16])(<16 x i8> [[REG71]], <16 x i8> [[REG72]]) +// CHECK-NEXT: [[REG73:[0-9a-zA-Z_%.]+]] = call frozen <16 x i8> @vec_sra(unsigned char vector[16], unsigned char vector[16])(<16 x i8> frozen [[REG71]], <16 x i8> frozen [[REG72]]) // CHECK-NEXT: store <16 x i8> [[REG73]], <16 x i8>* [[REG74:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG75:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG65]], align 16 // CHECK-NEXT: [[REG76:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG75]] to <16 x i8> // CHECK-NEXT: [[REG77:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG66]], align 16 // CHECK-NEXT: [[REG78:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG77]] to <16 x i8> // CHECK-NEXT: [[REG79:[0-9a-zA-Z_%.]+]] = load <16 x i8>, <16 x i8>* [[REG74]], align 16 -// CHECK-NEXT: [[REG80:[0-9a-zA-Z_%.]+]] = call <16 x i8> @vec_sel(unsigned char vector[16], unsigned char vector[16], unsigned char vector[16])(<16 x i8> [[REG76]], <16 x i8> [[REG78]], <16 x i8> [[REG79]]) +// CHECK-NEXT: [[REG80:[0-9a-zA-Z_%.]+]] = call frozen <16 x i8> @vec_sel(unsigned char vector[16], unsigned char vector[16], unsigned char vector[16])(<16 x i8> frozen [[REG76]], <16 x i8> frozen [[REG78]], <16 x i8> frozen [[REG79]]) // CHECK-NEXT: [[REG81:[0-9a-zA-Z_%.]+]] = bitcast <16 x i8> [[REG80]] to <2 x i64> // CHECK-NEXT: ret <2 x i64> [[REG81]] diff --git a/clang/test/CodeGen/ppc-tmmintrin.c b/clang/test/CodeGen/ppc-tmmintrin.c --- a/clang/test/CodeGen/ppc-tmmintrin.c +++ b/clang/test/CodeGen/ppc-tmmintrin.c @@ -23,31 +23,31 @@ // CHECK-LABEL: @test_abs -// CHECK: define available_externally <2 x i64> @_mm_abs_epi16(<2 x i64> [[REG1:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x i64> @_mm_abs_epi16(<2 x i64> frozen [[REG1:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x i64> [[REG1]], <2 x i64>* [[REG2:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG3:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG2]], align 16 // CHECK-NEXT: [[REG4:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG3]] to <8 x i16> -// CHECK-NEXT: [[REG5:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_abs(short vector[8])(<8 x i16> [[REG4]]) +// CHECK-NEXT: [[REG5:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_abs(short vector[8])(<8 x i16> frozen [[REG4]]) // CHECK-NEXT: [[REG6:[0-9a-zA-Z_%.]+]] = bitcast <8 x i16> [[REG5]] to <2 x i64> // CHECK-NEXT: ret <2 x i64> [[REG6]] -// CHECK: define available_externally <2 x i64> @_mm_abs_epi32(<2 x i64> [[REG7:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x i64> @_mm_abs_epi32(<2 x i64> frozen [[REG7:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x i64> [[REG7]], <2 x i64>* [[REG8:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG9:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG8]], align 16 // CHECK-NEXT: [[REG10:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG9]] to <4 x i32> -// CHECK-NEXT: [[REG11:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_abs(int vector[4])(<4 x i32> [[REG10]]) +// CHECK-NEXT: [[REG11:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_abs(int vector[4])(<4 x i32> frozen [[REG10]]) // CHECK-NEXT: [[REG12:[0-9a-zA-Z_%.]+]] = bitcast <4 x i32> [[REG11]] to <2 x i64> // CHECK-NEXT: ret <2 x i64> [[REG12]] -// CHECK: define available_externally <2 x i64> @_mm_abs_epi8(<2 x i64> [[REG13:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x i64> @_mm_abs_epi8(<2 x i64> frozen [[REG13:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x i64> [[REG13]], <2 x i64>* [[REG14:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG15:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG14]], align 16 // CHECK-NEXT: [[REG16:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG15]] to <16 x i8> -// CHECK-NEXT: [[REG17:[0-9a-zA-Z_%.]+]] = call <16 x i8> @vec_abs(signed char vector[16])(<16 x i8> [[REG16]]) +// CHECK-NEXT: [[REG17:[0-9a-zA-Z_%.]+]] = call frozen <16 x i8> @vec_abs(signed char vector[16])(<16 x i8> frozen [[REG16]]) // CHECK-NEXT: [[REG18:[0-9a-zA-Z_%.]+]] = bitcast <16 x i8> [[REG17]] to <2 x i64> // CHECK-NEXT: ret <2 x i64> [[REG18]] -// CHECK: define available_externally i64 @_mm_abs_pi16(i64 [[REG19:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen i64 @_mm_abs_pi16(i64 frozen [[REG19:[0-9a-zA-Z_%.]+]]) // CHECK: store i64 [[REG19]], i64* [[REG20:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: [[REG21:[0-9a-zA-Z_%.]+]] = load i64, i64* [[REG20]], align 8 // CHECK-NEXT: [[REG22:[0-9a-zA-Z_%.]+]] = insertelement <2 x i64> undef, i64 [[REG21]], i32 0 @@ -58,12 +58,12 @@ // CHECK-NEXT: [[REG27:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG26]] to <8 x i16> // CHECK-NEXT: store <8 x i16> [[REG27]], <8 x i16>* [[REG28:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG29:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG28]], align 16 -// CHECK-NEXT: [[REG30:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_abs(short vector[8])(<8 x i16> [[REG29]]) +// CHECK-NEXT: [[REG30:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_abs(short vector[8])(<8 x i16> frozen [[REG29]]) // CHECK-NEXT: [[REG31:[0-9a-zA-Z_%.]+]] = bitcast <8 x i16> [[REG30]] to <2 x i64> // CHECK-NEXT: [[REG32:[0-9a-zA-Z_%.]+]] = extractelement <2 x i64> [[REG31]], i32 0 // CHECK-NEXT: ret i64 [[REG32]] -// CHECK: define available_externally i64 @_mm_abs_pi32(i64 [[REG33:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen i64 @_mm_abs_pi32(i64 frozen [[REG33:[0-9a-zA-Z_%.]+]]) // CHECK: store i64 [[REG33]], i64* [[REG34:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: [[REG35:[0-9a-zA-Z_%.]+]] = load i64, i64* [[REG34]], align 8 // CHECK-NEXT: [[REG36:[0-9a-zA-Z_%.]+]] = insertelement <2 x i64> undef, i64 [[REG35]], i32 0 @@ -74,12 +74,12 @@ // CHECK-NEXT: [[REG41:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG40]] to <4 x i32> // CHECK-NEXT: store <4 x i32> [[REG41]], <4 x i32>* [[REG42:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG43:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG42]], align 16 -// CHECK-NEXT: [[REG44:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_abs(int vector[4])(<4 x i32> [[REG43]]) +// CHECK-NEXT: [[REG44:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_abs(int vector[4])(<4 x i32> frozen [[REG43]]) // CHECK-NEXT: [[REG45:[0-9a-zA-Z_%.]+]] = bitcast <4 x i32> [[REG44]] to <2 x i64> // CHECK-NEXT: [[REG46:[0-9a-zA-Z_%.]+]] = extractelement <2 x i64> [[REG45]], i32 0 // CHECK-NEXT: ret i64 [[REG46]] -// CHECK: define available_externally i64 @_mm_abs_pi8(i64 [[REG47:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen i64 @_mm_abs_pi8(i64 frozen [[REG47:[0-9a-zA-Z_%.]+]]) // CHECK: store i64 [[REG47]], i64* [[REG48:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: [[REG49:[0-9a-zA-Z_%.]+]] = load i64, i64* [[REG48]], align 8 // CHECK-NEXT: [[REG50:[0-9a-zA-Z_%.]+]] = insertelement <2 x i64> undef, i64 [[REG49]], i32 0 @@ -90,7 +90,7 @@ // CHECK-NEXT: [[REG55:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG54]] to <16 x i8> // CHECK-NEXT: store <16 x i8> [[REG55]], <16 x i8>* [[REG56:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG57:[0-9a-zA-Z_%.]+]] = load <16 x i8>, <16 x i8>* [[REG56]], align 16 -// CHECK-NEXT: [[REG58:[0-9a-zA-Z_%.]+]] = call <16 x i8> @vec_abs(signed char vector[16])(<16 x i8> [[REG57]]) +// CHECK-NEXT: [[REG58:[0-9a-zA-Z_%.]+]] = call frozen <16 x i8> @vec_abs(signed char vector[16])(<16 x i8> frozen [[REG57]]) // CHECK-NEXT: [[REG59:[0-9a-zA-Z_%.]+]] = bitcast <16 x i8> [[REG58]] to <2 x i64> // CHECK-NEXT: [[REG60:[0-9a-zA-Z_%.]+]] = extractelement <2 x i64> [[REG59]], i32 0 // CHECK-NEXT: ret i64 [[REG60]] @@ -103,7 +103,7 @@ // CHECK-LABEL: @test_alignr -// CHECK: define available_externally <2 x i64> @_mm_alignr_epi8(<2 x i64> [[REG61:[0-9a-zA-Z_%.]+]], <2 x i64> [[REG62:[0-9a-zA-Z_%.]+]], i32 zeroext [[REG63:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x i64> @_mm_alignr_epi8(<2 x i64> frozen [[REG61:[0-9a-zA-Z_%.]+]], <2 x i64> frozen [[REG62:[0-9a-zA-Z_%.]+]], i32 frozen zeroext [[REG63:[0-9a-zA-Z_%.]+]]) // CHECK: [[REG64:[0-9a-zA-Z_%.]+]] = alloca i32, align 4 // CHECK: store <2 x i64> [[REG61]], <2 x i64>* [[REG65:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <2 x i64> [[REG62]], <2 x i64>* [[REG66:[0-9a-zA-Z_%.]+]], align 16 @@ -118,12 +118,12 @@ // CHECK: [[REG71]]: // CHECK-BE-NEXT: load <2 x i64>, <2 x i64>* [[REG66]], align 16 -// CHECK-BE: call <16 x i8> @vec_sld(unsigned char vector[16], unsigned char vector[16], unsigned int) +// CHECK-BE: call frozen <16 x i8> @vec_sld(unsigned char vector[16], unsigned char vector[16], unsigned int) // CHECK-LE-NEXT: load <2 x i64>, <2 x i64>* [[REG65]], align 16 -// CHECK-LE: call <16 x i8> @vec_reve(unsigned char vector[16]) -// CHECK-LE: call <16 x i8> @vec_reve(unsigned char vector[16]) -// CHECk-LE: call <16 x i8> @vec_sld(unsigned char vector[16], unsigned char vector[16], unsigned int) -// CHECK-LE: call <16 x i8> @vec_reve(unsigned char vector[16]) +// CHECK-LE: call frozen <16 x i8> @vec_reve(unsigned char vector[16]) +// CHECK-LE: call frozen <16 x i8> @vec_reve(unsigned char vector[16]) +// CHECk-LE: call frozen <16 x i8> @vec_sld(unsigned char vector[16], unsigned char vector[16], unsigned int) +// CHECK-LE: call frozen <16 x i8> @vec_reve(unsigned char vector[16]) // CHECK: br label %[[REG72:[0-9a-zA-Z_%.]+]] // CHECK: [[REG68]]: @@ -156,13 +156,13 @@ // CHECK-NEXT: [[REG88:[0-9a-zA-Z_%.]+]] = sub i32 [[REG87]], 16 // CHECK-NEXT: [[REG89:[0-9a-zA-Z_%.]+]] = mul i32 [[REG88]], 8 // CHECK-NEXT: [[REG90:[0-9a-zA-Z_%.]+]] = trunc i32 [[REG89]] to i8 -// CHECK-NEXT: [[REG91:[0-9a-zA-Z_%.]+]] = call <16 x i8> @vec_splats(unsigned char)(i8 zeroext [[REG90]]) +// CHECK-NEXT: [[REG91:[0-9a-zA-Z_%.]+]] = call frozen <16 x i8> @vec_splats(unsigned char)(i8 frozen zeroext [[REG90]]) // CHECK-NEXT: store <16 x i8> [[REG91]], <16 x i8>* [[REG92:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG93:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG65]], align 16 // CHECK-NEXT: [[REG94:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG93]] to <16 x i8> // CHECK-NEXT: [[REG95:[0-9a-zA-Z_%.]+]] = load <16 x i8>, <16 x i8>* [[REG92]], align 16 -// CHECK-BE-NEXT: [[REG96:[0-9a-zA-Z_%.]+]] = call <16 x i8> @vec_slo(unsigned char vector[16], unsigned char vector[16]) -// CHECK-LE-NEXT: [[REG96:[0-9a-zA-Z_%.]+]] = call <16 x i8> @vec_sro(unsigned char vector[16], unsigned char vector[16]) +// CHECK-BE-NEXT: [[REG96:[0-9a-zA-Z_%.]+]] = call frozen <16 x i8> @vec_slo(unsigned char vector[16], unsigned char vector[16]) +// CHECK-LE-NEXT: [[REG96:[0-9a-zA-Z_%.]+]] = call frozen <16 x i8> @vec_sro(unsigned char vector[16], unsigned char vector[16]) // CHECK-NEXT: [[REG97:[0-9a-zA-Z_%.]+]] = bitcast <16 x i8> [[REG96]] to <2 x i64> // CHECK-NEXT: store <2 x i64> [[REG97]], <2 x i64>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: br label %[[REG72:[0-9a-zA-Z_%.]+]] @@ -173,21 +173,21 @@ // CHECK-NEXT: [[REG100:[0-9a-zA-Z_%.]+]] = mul i32 [[REG99]], 8 // CHECK-BE: [[REG101:[0-9a-zA-Z_%.]+]] = trunc i32 [[REG100]] to i8 -// CHECK-BE: [[REG102:[0-9a-zA-Z_%.]+]] = call <16 x i8> @vec_splats(unsigned char)(i8 zeroext [[REG101]]) +// CHECK-BE: [[REG102:[0-9a-zA-Z_%.]+]] = call frozen <16 x i8> @vec_splats(unsigned char)(i8 frozen zeroext [[REG101]]) // CHECK-BE: mul i32 {{[0-9a-zA-Z_%.]+}}, 8 -// CHECK-BE: call <16 x i8> @vec_sro(unsigned char vector[16], unsigned char vector[16]) -// CHECK-BE: call <16 x i8> @vec_slo(unsigned char vector[16], unsigned char vector[16]) -// CHECK-BE: [[REG103:[0-9a-zA-Z_%.]+]] = call <16 x i8> @vec_or(unsigned char vector[16], unsigned char vector[16]) +// CHECK-BE: call frozen <16 x i8> @vec_sro(unsigned char vector[16], unsigned char vector[16]) +// CHECK-BE: call frozen <16 x i8> @vec_slo(unsigned char vector[16], unsigned char vector[16]) +// CHECK-BE: [[REG103:[0-9a-zA-Z_%.]+]] = call frozen <16 x i8> @vec_or(unsigned char vector[16], unsigned char vector[16]) // CHECK-BE-NEXT: [[REG104:[0-9a-zA-Z_%.]+]] = bitcast <16 x i8> [[REG103]] to <2 x i64> // CHECK-BE-NEXT: store <2 x i64> [[REG104]], <2 x i64>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-BE-NEXT: br label %[[REG72:[0-9a-zA-Z_%.]+]] // CHECK-LE: [[REG105:[0-9a-zA-Z_%.]+]] = mul i32 {{[0-9a-zA-Z_%.]+}}, 8 // CHECK-LE-NEXT: trunc i32 [[REG105]] to i8 -// CHECK-LE: call <16 x i8> @vec_splats(unsigned char) -// CHECK-LE: call <16 x i8> @vec_slo(unsigned char vector[16], unsigned char vector[16]) -// CHECK-LE: call <16 x i8> @vec_sro(unsigned char vector[16], unsigned char vector[16]) -// CHECK-LE: [[REG106:[0-9a-zA-Z_%.]+]] = call <16 x i8> @vec_or(unsigned char vector[16], unsigned char vector[16]) +// CHECK-LE: call frozen <16 x i8> @vec_splats(unsigned char) +// CHECK-LE: call frozen <16 x i8> @vec_slo(unsigned char vector[16], unsigned char vector[16]) +// CHECK-LE: call frozen <16 x i8> @vec_sro(unsigned char vector[16], unsigned char vector[16]) +// CHECK-LE: [[REG106:[0-9a-zA-Z_%.]+]] = call frozen <16 x i8> @vec_or(unsigned char vector[16], unsigned char vector[16]) // CHECK-LE-NEXT: [[REG107:[0-9a-zA-Z_%.]+]] = bitcast <16 x i8> [[REG106]] to <2 x i64> // CHECK-LE-NEXT: store <2 x i64> [[REG107]], <2 x i64>* {{[0-9a-zA-Z_%.]+}}, align 16 @@ -195,7 +195,7 @@ // CHECK-NEXT: [[REG108:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: ret <2 x i64> [[REG108]] -// CHECK: define available_externally i64 @_mm_alignr_pi8(i64 [[REG109:[0-9a-zA-Z_%.]+]], i64 [[REG110:[0-9a-zA-Z_%.]+]], i32 zeroext [[REG111:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen i64 @_mm_alignr_pi8(i64 frozen [[REG109:[0-9a-zA-Z_%.]+]], i64 frozen [[REG110:[0-9a-zA-Z_%.]+]], i32 frozen zeroext [[REG111:[0-9a-zA-Z_%.]+]]) // CHECK: store i64 [[REG109]], i64* [[REG112:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: store i64 [[REG110]], i64* [[REG113:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: store i32 [[REG111]], i32* [[REG114:[0-9a-zA-Z_%.]+]], align 4 @@ -221,8 +221,8 @@ // CHECK-NEXT: [[REG132:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG131]] to <16 x i8> // CHECK-NEXT: [[REG133:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG130]], align 16 // CHECK-NEXT: [[REG134:[0-9a-zA-Z_%.]+]] = bitcast <4 x i32> [[REG133]] to <16 x i8> -// CHECK-BE-NEXT: [[REG135:[0-9a-zA-Z_%.]+]] = call <16 x i8> @vec_slo(unsigned char vector[16], unsigned char vector[16])(<16 x i8> [[REG132]], <16 x i8> [[REG134]]) -// CHECK-LE-NEXT: [[REG135:[0-9a-zA-Z_%.]+]] = call <16 x i8> @vec_sro(unsigned char vector[16], unsigned char vector[16])(<16 x i8> [[REG132]], <16 x i8> [[REG134]]) +// CHECK-BE-NEXT: [[REG135:[0-9a-zA-Z_%.]+]] = call frozen <16 x i8> @vec_slo(unsigned char vector[16], unsigned char vector[16])(<16 x i8> frozen [[REG132]], <16 x i8> frozen [[REG134]]) +// CHECK-LE-NEXT: [[REG135:[0-9a-zA-Z_%.]+]] = call frozen <16 x i8> @vec_sro(unsigned char vector[16], unsigned char vector[16])(<16 x i8> frozen [[REG132]], <16 x i8> frozen [[REG134]]) // CHECK-NEXT: [[REG136:[0-9a-zA-Z_%.]+]] = bitcast <16 x i8> [[REG135]] to <2 x i64> // CHECK-NEXT: store <2 x i64> [[REG136]], <2 x i64>* [[REG123]], align 16 // CHECK-NEXT: [[REG137:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG123]], align 16 @@ -251,7 +251,7 @@ // CHECK-LABEL: @test_hadd -// CHECK: define available_externally <2 x i64> @_mm_hadd_epi16(<2 x i64> [[REG143:[0-9a-zA-Z_%.]+]], <2 x i64> [[REG144:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x i64> @_mm_hadd_epi16(<2 x i64> frozen [[REG143:[0-9a-zA-Z_%.]+]], <2 x i64> frozen [[REG144:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x i64> [[REG143]], <2 x i64>* [[REG145:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <2 x i64> [[REG144]], <2 x i64>* [[REG146:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <16 x i8> , <16 x i8>* [[REG147:[0-9a-zA-Z_%.]+]], align 16 @@ -260,21 +260,21 @@ // CHECK-NEXT: [[REG150:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG149]] to <8 x i16> // CHECK-NEXT: [[REG151:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG146]], align 16 // CHECK-NEXT: [[REG152:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG151]] to <8 x i16> -// CHECK-NEXT: [[REG153:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_perm(short vector[8], short vector[8], unsigned char vector[16])(<8 x i16> [[REG150]], <8 x i16> [[REG152]], <16 x i8> ) +// CHECK-NEXT: [[REG153:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_perm(short vector[8], short vector[8], unsigned char vector[16])(<8 x i16> frozen [[REG150]], <8 x i16> frozen [[REG152]], <16 x i8> frozen ) // CHECK-NEXT: store <8 x i16> [[REG153]], <8 x i16>* [[REG154:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG155:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG145]], align 16 // CHECK-NEXT: [[REG156:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG155]] to <8 x i16> // CHECK-NEXT: [[REG157:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG146]], align 16 // CHECK-NEXT: [[REG158:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG157]] to <8 x i16> -// CHECK-NEXT: [[REG159:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_perm(short vector[8], short vector[8], unsigned char vector[16])(<8 x i16> [[REG156]], <8 x i16> [[REG158]], <16 x i8> ) +// CHECK-NEXT: [[REG159:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_perm(short vector[8], short vector[8], unsigned char vector[16])(<8 x i16> frozen [[REG156]], <8 x i16> frozen [[REG158]], <16 x i8> frozen ) // CHECK-NEXT: store <8 x i16> [[REG159]], <8 x i16>* [[REG160:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG161:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG154]], align 16 // CHECK-NEXT: [[REG162:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG160]], align 16 -// CHECK-NEXT: [[REG163:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_add(short vector[8], short vector[8])(<8 x i16> [[REG161]], <8 x i16> [[REG162]]) +// CHECK-NEXT: [[REG163:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_add(short vector[8], short vector[8])(<8 x i16> frozen [[REG161]], <8 x i16> frozen [[REG162]]) // CHECK-NEXT: [[REG164:[0-9a-zA-Z_%.]+]] = bitcast <8 x i16> [[REG163]] to <2 x i64> // CHECK-NEXT: ret <2 x i64> [[REG164]] -// CHECK: define available_externally <2 x i64> @_mm_hadd_epi32(<2 x i64> [[REG165:[0-9a-zA-Z_%.]+]], <2 x i64> [[REG166:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x i64> @_mm_hadd_epi32(<2 x i64> frozen [[REG165:[0-9a-zA-Z_%.]+]], <2 x i64> frozen [[REG166:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x i64> [[REG165]], <2 x i64>* [[REG167:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <2 x i64> [[REG166]], <2 x i64>* [[REG168:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <16 x i8> , <16 x i8>* [[REG169:[0-9a-zA-Z_%.]+]], align 16 @@ -283,21 +283,21 @@ // CHECK-NEXT: [[REG172:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG171]] to <4 x i32> // CHECK-NEXT: [[REG173:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG168]], align 16 // CHECK-NEXT: [[REG174:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG173]] to <4 x i32> -// CHECK-NEXT: [[REG175:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_perm(int vector[4], int vector[4], unsigned char vector[16])(<4 x i32> [[REG172]], <4 x i32> [[REG174]], <16 x i8> ) +// CHECK-NEXT: [[REG175:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_perm(int vector[4], int vector[4], unsigned char vector[16])(<4 x i32> frozen [[REG172]], <4 x i32> frozen [[REG174]], <16 x i8> frozen ) // CHECK-NEXT: store <4 x i32> [[REG175]], <4 x i32>* [[REG176:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG177:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG167]], align 16 // CHECK-NEXT: [[REG178:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG177]] to <4 x i32> // CHECK-NEXT: [[REG179:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG168]], align 16 // CHECK-NEXT: [[REG180:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG179]] to <4 x i32> -// CHECK-NEXT: [[REG181:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_perm(int vector[4], int vector[4], unsigned char vector[16])(<4 x i32> [[REG178]], <4 x i32> [[REG180]], <16 x i8> ) +// CHECK-NEXT: [[REG181:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_perm(int vector[4], int vector[4], unsigned char vector[16])(<4 x i32> frozen [[REG178]], <4 x i32> frozen [[REG180]], <16 x i8> frozen ) // CHECK-NEXT: store <4 x i32> [[REG181]], <4 x i32>* [[REG182:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG183:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG176]], align 16 // CHECK-NEXT: [[REG184:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG182]], align 16 -// CHECK-NEXT: [[REG185:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_add(int vector[4], int vector[4])(<4 x i32> [[REG183]], <4 x i32> [[REG184]]) +// CHECK-NEXT: [[REG185:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_add(int vector[4], int vector[4])(<4 x i32> frozen [[REG183]], <4 x i32> frozen [[REG184]]) // CHECK-NEXT: [[REG186:[0-9a-zA-Z_%.]+]] = bitcast <4 x i32> [[REG185]] to <2 x i64> // CHECK-NEXT: ret <2 x i64> [[REG186]] -// CHECK: define available_externally i64 @_mm_hadd_pi16(i64 [[REG187:[0-9a-zA-Z_%.]+]], i64 [[REG188:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen i64 @_mm_hadd_pi16(i64 frozen [[REG187:[0-9a-zA-Z_%.]+]], i64 frozen [[REG188:[0-9a-zA-Z_%.]+]]) // CHECK: store i64 [[REG187]], i64* [[REG189:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: store i64 [[REG188]], i64* [[REG190:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: [[REG191:[0-9a-zA-Z_%.]+]] = load i64, i64* [[REG189]], align 8 @@ -312,22 +312,22 @@ // CHECK-NEXT: store <16 x i8> , <16 x i8>* [[REG200:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG201:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG198]], align 16 // CHECK-NEXT: [[REG202:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG198]], align 16 -// CHECK-NEXT: [[REG203:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_perm(short vector[8], short vector[8], unsigned char vector[16])(<8 x i16> [[REG201]], <8 x i16> [[REG202]], <16 x i8> ) +// CHECK-NEXT: [[REG203:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_perm(short vector[8], short vector[8], unsigned char vector[16])(<8 x i16> frozen [[REG201]], <8 x i16> frozen [[REG202]], <16 x i8> frozen ) // CHECK-NEXT: store <8 x i16> [[REG203]], <8 x i16>* [[REG204:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG205:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG198]], align 16 // CHECK-NEXT: [[REG206:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG198]], align 16 -// CHECK-NEXT: [[REG207:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_perm(short vector[8], short vector[8], unsigned char vector[16])(<8 x i16> [[REG205]], <8 x i16> [[REG206]], <16 x i8> ) +// CHECK-NEXT: [[REG207:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_perm(short vector[8], short vector[8], unsigned char vector[16])(<8 x i16> frozen [[REG205]], <8 x i16> frozen [[REG206]], <16 x i8> frozen ) // CHECK-NEXT: store <8 x i16> [[REG207]], <8 x i16>* [[REG198]], align 16 // CHECK-NEXT: [[REG208:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG198]], align 16 // CHECK-NEXT: [[REG209:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG204]], align 16 -// CHECK-NEXT: [[REG210:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_add(short vector[8], short vector[8])(<8 x i16> [[REG208]], <8 x i16> [[REG209]]) +// CHECK-NEXT: [[REG210:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_add(short vector[8], short vector[8])(<8 x i16> frozen [[REG208]], <8 x i16> frozen [[REG209]]) // CHECK-NEXT: store <8 x i16> [[REG210]], <8 x i16>* [[REG198]], align 16 // CHECK-NEXT: [[REG211:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG198]], align 16 // CHECK-NEXT: [[REG212:[0-9a-zA-Z_%.]+]] = bitcast <8 x i16> [[REG211]] to <2 x i64> // CHECK-NEXT: [[REG213:[0-9a-zA-Z_%.]+]] = extractelement <2 x i64> [[REG212]], i32 1 // CHECK-NEXT: ret i64 [[REG213]] -// CHECK: define available_externally i64 @_mm_hadd_pi32(i64 [[REG214:[0-9a-zA-Z_%.]+]], i64 [[REG215:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen i64 @_mm_hadd_pi32(i64 frozen [[REG214:[0-9a-zA-Z_%.]+]], i64 frozen [[REG215:[0-9a-zA-Z_%.]+]]) // CHECK: store i64 [[REG214]], i64* [[REG216:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: store i64 [[REG215]], i64* [[REG217:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: [[REG218:[0-9a-zA-Z_%.]+]] = load i64, i64* [[REG216]], align 8 @@ -342,22 +342,22 @@ // CHECK-NEXT: store <16 x i8> , <16 x i8>* [[REG227:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG228:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG225]], align 16 // CHECK-NEXT: [[REG229:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG225]], align 16 -// CHECK-NEXT: [[REG230:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_perm(int vector[4], int vector[4], unsigned char vector[16])(<4 x i32> [[REG228]], <4 x i32> [[REG229]], <16 x i8> ) +// CHECK-NEXT: [[REG230:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_perm(int vector[4], int vector[4], unsigned char vector[16])(<4 x i32> frozen [[REG228]], <4 x i32> frozen [[REG229]], <16 x i8> frozen ) // CHECK-NEXT: store <4 x i32> [[REG230]], <4 x i32>* [[REG231:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG232:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG225]], align 16 // CHECK-NEXT: [[REG233:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG225]], align 16 -// CHECK-NEXT: [[REG234:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_perm(int vector[4], int vector[4], unsigned char vector[16])(<4 x i32> [[REG232]], <4 x i32> [[REG233]], <16 x i8> ) +// CHECK-NEXT: [[REG234:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_perm(int vector[4], int vector[4], unsigned char vector[16])(<4 x i32> frozen [[REG232]], <4 x i32> frozen [[REG233]], <16 x i8> frozen ) // CHECK-NEXT: store <4 x i32> [[REG234]], <4 x i32>* [[REG225]], align 16 // CHECK-NEXT: [[REG235:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG225]], align 16 // CHECK-NEXT: [[REG236:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG231]], align 16 -// CHECK-NEXT: [[REG237:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_add(int vector[4], int vector[4])(<4 x i32> [[REG235]], <4 x i32> [[REG236]]) +// CHECK-NEXT: [[REG237:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_add(int vector[4], int vector[4])(<4 x i32> frozen [[REG235]], <4 x i32> frozen [[REG236]]) // CHECK-NEXT: store <4 x i32> [[REG237]], <4 x i32>* [[REG225]], align 16 // CHECK-NEXT: [[REG238:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG225]], align 16 // CHECK-NEXT: [[REG239:[0-9a-zA-Z_%.]+]] = bitcast <4 x i32> [[REG238]] to <2 x i64> // CHECK-NEXT: [[REG240:[0-9a-zA-Z_%.]+]] = extractelement <2 x i64> [[REG239]], i32 1 // CHECK-NEXT: ret i64 [[REG240]] -// CHECK: define available_externally <2 x i64> @_mm_hadds_epi16(<2 x i64> [[REG241:[0-9a-zA-Z_%.]+]], <2 x i64> [[REG242:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x i64> @_mm_hadds_epi16(<2 x i64> frozen [[REG241:[0-9a-zA-Z_%.]+]], <2 x i64> frozen [[REG242:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x i64> [[REG241]], <2 x i64>* [[REG243:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <2 x i64> [[REG242]], <2 x i64>* [[REG244:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <4 x i32> zeroinitializer, <4 x i32>* [[REG245:[0-9a-zA-Z_%.]+]], align 16 @@ -365,23 +365,23 @@ // CHECK-NEXT: [[REG247:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG243]], align 16 // CHECK-NEXT: [[REG248:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG247]] to <8 x i16> // CHECK-NEXT: [[REG249:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG245]], align 16 -// CHECK-NEXT: [[REG250:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_sum4s(short vector[8], int vector[4])(<8 x i16> [[REG248]], <4 x i32> [[REG249]]) +// CHECK-NEXT: [[REG250:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_sum4s(short vector[8], int vector[4])(<8 x i16> frozen [[REG248]], <4 x i32> frozen [[REG249]]) // CHECK-NEXT: store <4 x i32> [[REG250]], <4 x i32>* [[REG245]], align 16 // CHECK-NEXT: [[REG251:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG244]], align 16 // CHECK-NEXT: [[REG252:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG251]] to <8 x i16> // CHECK-NEXT: [[REG253:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG246]], align 16 -// CHECK-NEXT: [[REG254:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_sum4s(short vector[8], int vector[4])(<8 x i16> [[REG252]], <4 x i32> [[REG253]]) +// CHECK-NEXT: [[REG254:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_sum4s(short vector[8], int vector[4])(<8 x i16> frozen [[REG252]], <4 x i32> frozen [[REG253]]) // CHECK-NEXT: store <4 x i32> [[REG254]], <4 x i32>* [[REG246]], align 16 // CHECK-NEXT: [[REG255:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG245]], align 16 // CHECK-NEXT: [[REG256:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG246]], align 16 -// CHECK-NEXT: [[REG257:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_packs(int vector[4], int vector[4])(<4 x i32> [[REG255]], <4 x i32> [[REG256]]) +// CHECK-NEXT: [[REG257:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_packs(int vector[4], int vector[4])(<4 x i32> frozen [[REG255]], <4 x i32> frozen [[REG256]]) // CHECK-NEXT: [[REG258:[0-9a-zA-Z_%.]+]] = bitcast <8 x i16> [[REG257]] to <4 x i32> // CHECK-NEXT: store <4 x i32> [[REG258]], <4 x i32>* [[REG245]], align 16 // CHECK-NEXT: [[REG259:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG245]], align 16 // CHECK-NEXT: [[REG260:[0-9a-zA-Z_%.]+]] = bitcast <4 x i32> [[REG259]] to <2 x i64> // CHECK-NEXT: ret <2 x i64> [[REG260]] -// CHECK: define available_externally i64 @_mm_hadds_pi16(i64 [[REG261:[0-9a-zA-Z_%.]+]], i64 [[REG262:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen i64 @_mm_hadds_pi16(i64 frozen [[REG261:[0-9a-zA-Z_%.]+]], i64 frozen [[REG262:[0-9a-zA-Z_%.]+]]) // CHECK: store i64 [[REG261]], i64* [[REG263:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: store i64 [[REG262]], i64* [[REG264:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: store <4 x i32> zeroinitializer, <4 x i32>* [[REG265:[0-9a-zA-Z_%.]+]], align 16 @@ -394,11 +394,11 @@ // CHECK-NEXT: [[REG272:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG271]] to <8 x i16> // CHECK-NEXT: store <8 x i16> [[REG272]], <8 x i16>* [[REG273:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG274:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG273]], align 16 -// CHECK-NEXT: [[REG275:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_sum4s(short vector[8], int vector[4])(<8 x i16> [[REG274]], <4 x i32> zeroinitializer) +// CHECK-NEXT: [[REG275:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_sum4s(short vector[8], int vector[4])(<8 x i16> frozen [[REG274]], <4 x i32> frozen zeroinitializer) // CHECK-NEXT: store <4 x i32> [[REG275]], <4 x i32>* [[REG276:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG277:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG276]], align 16 // CHECK-NEXT: [[REG278:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG276]], align 16 -// CHECK-NEXT: [[REG279:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_packs(int vector[4], int vector[4])(<4 x i32> [[REG277]], <4 x i32> [[REG278]]) +// CHECK-NEXT: [[REG279:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_packs(int vector[4], int vector[4])(<4 x i32> frozen [[REG277]], <4 x i32> frozen [[REG278]]) // CHECK-NEXT: store <8 x i16> [[REG279]], <8 x i16>* [[REG273]], align 16 // CHECK-NEXT: [[REG280:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG273]], align 16 // CHECK-NEXT: [[REG281:[0-9a-zA-Z_%.]+]] = bitcast <8 x i16> [[REG280]] to <2 x i64> @@ -417,7 +417,7 @@ // CHECK-LABEL: @test_hsub -// CHECK: define available_externally <2 x i64> @_mm_hsub_epi16(<2 x i64> [[REG283:[0-9a-zA-Z_%.]+]], <2 x i64> [[REG284:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x i64> @_mm_hsub_epi16(<2 x i64> frozen [[REG283:[0-9a-zA-Z_%.]+]], <2 x i64> frozen [[REG284:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x i64> [[REG283]], <2 x i64>* [[REG285:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <2 x i64> [[REG284]], <2 x i64>* [[REG286:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <16 x i8> , <16 x i8>* [[REG287:[0-9a-zA-Z_%.]+]], align 16 @@ -426,21 +426,21 @@ // CHECK-NEXT: [[REG290:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG289]] to <8 x i16> // CHECK-NEXT: [[REG291:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG286]], align 16 // CHECK-NEXT: [[REG292:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG291]] to <8 x i16> -// CHECK-NEXT: [[REG293:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_perm(short vector[8], short vector[8], unsigned char vector[16])(<8 x i16> [[REG290]], <8 x i16> [[REG292]], <16 x i8> ) +// CHECK-NEXT: [[REG293:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_perm(short vector[8], short vector[8], unsigned char vector[16])(<8 x i16> frozen [[REG290]], <8 x i16> frozen [[REG292]], <16 x i8> frozen ) // CHECK-NEXT: store <8 x i16> [[REG293]], <8 x i16>* [[REG294:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG295:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG285]], align 16 // CHECK-NEXT: [[REG296:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG295]] to <8 x i16> // CHECK-NEXT: [[REG297:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG286]], align 16 // CHECK-NEXT: [[REG298:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG297]] to <8 x i16> -// CHECK-NEXT: [[REG299:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_perm(short vector[8], short vector[8], unsigned char vector[16])(<8 x i16> [[REG296]], <8 x i16> [[REG298]], <16 x i8> ) +// CHECK-NEXT: [[REG299:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_perm(short vector[8], short vector[8], unsigned char vector[16])(<8 x i16> frozen [[REG296]], <8 x i16> frozen [[REG298]], <16 x i8> frozen ) // CHECK-NEXT: store <8 x i16> [[REG299]], <8 x i16>* [[REG300:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG301:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG294]], align 16 // CHECK-NEXT: [[REG302:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG300]], align 16 -// CHECK-NEXT: [[REG303:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_sub(short vector[8], short vector[8])(<8 x i16> [[REG301]], <8 x i16> [[REG302]]) +// CHECK-NEXT: [[REG303:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_sub(short vector[8], short vector[8])(<8 x i16> frozen [[REG301]], <8 x i16> frozen [[REG302]]) // CHECK-NEXT: [[REG304:[0-9a-zA-Z_%.]+]] = bitcast <8 x i16> [[REG303]] to <2 x i64> // CHECK-NEXT: ret <2 x i64> [[REG304]] -// CHECK: define available_externally <2 x i64> @_mm_hsub_epi32(<2 x i64> [[REG305:[0-9a-zA-Z_%.]+]], <2 x i64> [[REG306:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x i64> @_mm_hsub_epi32(<2 x i64> frozen [[REG305:[0-9a-zA-Z_%.]+]], <2 x i64> frozen [[REG306:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x i64> [[REG305]], <2 x i64>* [[REG307:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <2 x i64> [[REG306]], <2 x i64>* [[REG308:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <16 x i8> , <16 x i8>* [[REG309:[0-9a-zA-Z_%.]+]], align 16 @@ -449,21 +449,21 @@ // CHECK-NEXT: [[REG312:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG311]] to <4 x i32> // CHECK-NEXT: [[REG313:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG308]], align 16 // CHECK-NEXT: [[REG314:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG313]] to <4 x i32> -// CHECK-NEXT: [[REG315:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_perm(int vector[4], int vector[4], unsigned char vector[16])(<4 x i32> [[REG312]], <4 x i32> [[REG314]], <16 x i8> ) +// CHECK-NEXT: [[REG315:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_perm(int vector[4], int vector[4], unsigned char vector[16])(<4 x i32> frozen [[REG312]], <4 x i32> frozen [[REG314]], <16 x i8> frozen ) // CHECK-NEXT: store <4 x i32> [[REG315]], <4 x i32>* [[REG316:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG317:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG307]], align 16 // CHECK-NEXT: [[REG318:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG317]] to <4 x i32> // CHECK-NEXT: [[REG319:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG308]], align 16 // CHECK-NEXT: [[REG320:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG319]] to <4 x i32> -// CHECK-NEXT: [[REG321:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_perm(int vector[4], int vector[4], unsigned char vector[16])(<4 x i32> [[REG318]], <4 x i32> [[REG320]], <16 x i8> ) +// CHECK-NEXT: [[REG321:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_perm(int vector[4], int vector[4], unsigned char vector[16])(<4 x i32> frozen [[REG318]], <4 x i32> frozen [[REG320]], <16 x i8> frozen ) // CHECK-NEXT: store <4 x i32> [[REG321]], <4 x i32>* [[REG322:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG323:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG316]], align 16 // CHECK-NEXT: [[REG324:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG322]], align 16 -// CHECK-NEXT: [[REG325:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_sub(int vector[4], int vector[4])(<4 x i32> [[REG323]], <4 x i32> [[REG324]]) +// CHECK-NEXT: [[REG325:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_sub(int vector[4], int vector[4])(<4 x i32> frozen [[REG323]], <4 x i32> frozen [[REG324]]) // CHECK-NEXT: [[REG326:[0-9a-zA-Z_%.]+]] = bitcast <4 x i32> [[REG325]] to <2 x i64> // CHECK-NEXT: ret <2 x i64> [[REG326]] -// CHECK: define available_externally i64 @_mm_hsub_pi16(i64 [[REG327:[0-9a-zA-Z_%.]+]], i64 [[REG328:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen i64 @_mm_hsub_pi16(i64 frozen [[REG327:[0-9a-zA-Z_%.]+]], i64 frozen [[REG328:[0-9a-zA-Z_%.]+]]) // CHECK: store i64 [[REG327]], i64* [[REG329:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: store i64 [[REG328]], i64* [[REG330:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: store <16 x i8> , <16 x i8>* [[REG331:[0-9a-zA-Z_%.]+]], align 16 @@ -478,22 +478,22 @@ // CHECK-NEXT: store <8 x i16> [[REG339]], <8 x i16>* [[REG340:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG341:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG340]], align 16 // CHECK-NEXT: [[REG342:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG340]], align 16 -// CHECK-NEXT: [[REG343:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_perm(short vector[8], short vector[8], unsigned char vector[16])(<8 x i16> [[REG341]], <8 x i16> [[REG342]], <16 x i8> ) +// CHECK-NEXT: [[REG343:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_perm(short vector[8], short vector[8], unsigned char vector[16])(<8 x i16> frozen [[REG341]], <8 x i16> frozen [[REG342]], <16 x i8> frozen ) // CHECK-NEXT: store <8 x i16> [[REG343]], <8 x i16>* [[REG344:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG345:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG340]], align 16 // CHECK-NEXT: [[REG346:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG340]], align 16 -// CHECK-NEXT: [[REG347:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_perm(short vector[8], short vector[8], unsigned char vector[16])(<8 x i16> [[REG345]], <8 x i16> [[REG346]], <16 x i8> ) +// CHECK-NEXT: [[REG347:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_perm(short vector[8], short vector[8], unsigned char vector[16])(<8 x i16> frozen [[REG345]], <8 x i16> frozen [[REG346]], <16 x i8> frozen ) // CHECK-NEXT: store <8 x i16> [[REG347]], <8 x i16>* [[REG340]], align 16 // CHECK-NEXT: [[REG348:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG340]], align 16 // CHECK-NEXT: [[REG349:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG344]], align 16 -// CHECK-NEXT: [[REG350:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_sub(short vector[8], short vector[8])(<8 x i16> [[REG348]], <8 x i16> [[REG349]]) +// CHECK-NEXT: [[REG350:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_sub(short vector[8], short vector[8])(<8 x i16> frozen [[REG348]], <8 x i16> frozen [[REG349]]) // CHECK-NEXT: store <8 x i16> [[REG350]], <8 x i16>* [[REG340]], align 16 // CHECK-NEXT: [[REG351:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG340]], align 16 // CHECK-NEXT: [[REG352:[0-9a-zA-Z_%.]+]] = bitcast <8 x i16> [[REG351]] to <2 x i64> // CHECK-NEXT: [[REG353:[0-9a-zA-Z_%.]+]] = extractelement <2 x i64> [[REG352]], i32 1 // CHECK-NEXT: ret i64 [[REG353]] -// CHECK: define available_externally i64 @_mm_hsub_pi32(i64 [[REG354:[0-9a-zA-Z_%.]+]], i64 [[REG355:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen i64 @_mm_hsub_pi32(i64 frozen [[REG354:[0-9a-zA-Z_%.]+]], i64 frozen [[REG355:[0-9a-zA-Z_%.]+]]) // CHECK: store i64 [[REG354]], i64* [[REG356:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: store i64 [[REG355]], i64* [[REG357:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: store <16 x i8> , <16 x i8>* [[REG358:[0-9a-zA-Z_%.]+]], align 16 @@ -508,22 +508,22 @@ // CHECK-NEXT: store <4 x i32> [[REG366]], <4 x i32>* [[REG367:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG368:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG367]], align 16 // CHECK-NEXT: [[REG369:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG367]], align 16 -// CHECK-NEXT: [[REG370:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_perm(int vector[4], int vector[4], unsigned char vector[16])(<4 x i32> [[REG368]], <4 x i32> [[REG369]], <16 x i8> ) +// CHECK-NEXT: [[REG370:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_perm(int vector[4], int vector[4], unsigned char vector[16])(<4 x i32> frozen [[REG368]], <4 x i32> frozen [[REG369]], <16 x i8> frozen ) // CHECK-NEXT: store <4 x i32> [[REG370]], <4 x i32>* [[REG371:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG372:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG367]], align 16 // CHECK-NEXT: [[REG373:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG367]], align 16 -// CHECK-NEXT: [[REG374:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_perm(int vector[4], int vector[4], unsigned char vector[16])(<4 x i32> [[REG372]], <4 x i32> [[REG373]], <16 x i8> ) +// CHECK-NEXT: [[REG374:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_perm(int vector[4], int vector[4], unsigned char vector[16])(<4 x i32> frozen [[REG372]], <4 x i32> frozen [[REG373]], <16 x i8> frozen ) // CHECK-NEXT: store <4 x i32> [[REG374]], <4 x i32>* [[REG367]], align 16 // CHECK-NEXT: [[REG375:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG367]], align 16 // CHECK-NEXT: [[REG376:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG371]], align 16 -// CHECK-NEXT: [[REG377:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_sub(int vector[4], int vector[4])(<4 x i32> [[REG375]], <4 x i32> [[REG376]]) +// CHECK-NEXT: [[REG377:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_sub(int vector[4], int vector[4])(<4 x i32> frozen [[REG375]], <4 x i32> frozen [[REG376]]) // CHECK-NEXT: store <4 x i32> [[REG377]], <4 x i32>* [[REG367]], align 16 // CHECK-NEXT: [[REG378:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG367]], align 16 // CHECK-NEXT: [[REG379:[0-9a-zA-Z_%.]+]] = bitcast <4 x i32> [[REG378]] to <2 x i64> // CHECK-NEXT: [[REG380:[0-9a-zA-Z_%.]+]] = extractelement <2 x i64> [[REG379]], i32 1 // CHECK-NEXT: ret i64 [[REG380]] -// CHECK: define available_externally <2 x i64> @_mm_hsubs_epi16(<2 x i64> [[REG381:[0-9a-zA-Z_%.]+]], <2 x i64> [[REG382:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x i64> @_mm_hsubs_epi16(<2 x i64> frozen [[REG381:[0-9a-zA-Z_%.]+]], <2 x i64> frozen [[REG382:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x i64> [[REG381]], <2 x i64>* [[REG383:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <2 x i64> [[REG382]], <2 x i64>* [[REG384:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <16 x i8> , <16 x i8>* [[REG385:[0-9a-zA-Z_%.]+]], align 16 @@ -532,21 +532,21 @@ // CHECK-NEXT: [[REG388:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG387]] to <8 x i16> // CHECK-NEXT: [[REG389:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG384]], align 16 // CHECK-NEXT: [[REG390:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG389]] to <8 x i16> -// CHECK-NEXT: [[REG391:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_perm(short vector[8], short vector[8], unsigned char vector[16])(<8 x i16> [[REG388]], <8 x i16> [[REG390]], <16 x i8> ) +// CHECK-NEXT: [[REG391:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_perm(short vector[8], short vector[8], unsigned char vector[16])(<8 x i16> frozen [[REG388]], <8 x i16> frozen [[REG390]], <16 x i8> frozen ) // CHECK-NEXT: store <8 x i16> [[REG391]], <8 x i16>* [[REG392:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG393:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG383]], align 16 // CHECK-NEXT: [[REG394:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG393]] to <8 x i16> // CHECK-NEXT: [[REG395:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG384]], align 16 // CHECK-NEXT: [[REG396:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG395]] to <8 x i16> -// CHECK-NEXT: [[REG397:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_perm(short vector[8], short vector[8], unsigned char vector[16])(<8 x i16> [[REG394]], <8 x i16> [[REG396]], <16 x i8> ) +// CHECK-NEXT: [[REG397:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_perm(short vector[8], short vector[8], unsigned char vector[16])(<8 x i16> frozen [[REG394]], <8 x i16> frozen [[REG396]], <16 x i8> frozen ) // CHECK-NEXT: store <8 x i16> [[REG397]], <8 x i16>* [[REG398:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG399:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG392]], align 16 // CHECK-NEXT: [[REG400:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG398]], align 16 -// CHECK-NEXT: [[REG401:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_subs(short vector[8], short vector[8])(<8 x i16> [[REG399]], <8 x i16> [[REG400]]) +// CHECK-NEXT: [[REG401:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_subs(short vector[8], short vector[8])(<8 x i16> frozen [[REG399]], <8 x i16> frozen [[REG400]]) // CHECK-NEXT: [[REG402:[0-9a-zA-Z_%.]+]] = bitcast <8 x i16> [[REG401]] to <2 x i64> // CHECK-NEXT: ret <2 x i64> [[REG402]] -// CHECK: define available_externally i64 @_mm_hsubs_pi16(i64 [[REG403:[0-9a-zA-Z_%.]+]], i64 [[REG404:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen i64 @_mm_hsubs_pi16(i64 frozen [[REG403:[0-9a-zA-Z_%.]+]], i64 frozen [[REG404:[0-9a-zA-Z_%.]+]]) // CHECK: store i64 [[REG403]], i64* [[REG405:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: store i64 [[REG404]], i64* [[REG406:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: store <16 x i8> , <16 x i8>* [[REG407:[0-9a-zA-Z_%.]+]], align 16 @@ -561,15 +561,15 @@ // CHECK-NEXT: store <8 x i16> [[REG415]], <8 x i16>* [[REG416:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG417:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG416]], align 16 // CHECK-NEXT: [[REG418:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG416]], align 16 -// CHECK-NEXT: [[REG419:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_perm(short vector[8], short vector[8], unsigned char vector[16])(<8 x i16> [[REG417]], <8 x i16> [[REG418]], <16 x i8> ) +// CHECK-NEXT: [[REG419:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_perm(short vector[8], short vector[8], unsigned char vector[16])(<8 x i16> frozen [[REG417]], <8 x i16> frozen [[REG418]], <16 x i8> frozen ) // CHECK-NEXT: store <8 x i16> [[REG419]], <8 x i16>* [[REG420:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG421:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG416]], align 16 // CHECK-NEXT: [[REG422:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG416]], align 16 -// CHECK-NEXT: [[REG423:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_perm(short vector[8], short vector[8], unsigned char vector[16])(<8 x i16> [[REG421]], <8 x i16> [[REG422]], <16 x i8> ) +// CHECK-NEXT: [[REG423:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_perm(short vector[8], short vector[8], unsigned char vector[16])(<8 x i16> frozen [[REG421]], <8 x i16> frozen [[REG422]], <16 x i8> frozen ) // CHECK-NEXT: store <8 x i16> [[REG423]], <8 x i16>* [[REG424:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG425:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG420]], align 16 // CHECK-NEXT: [[REG426:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG424]], align 16 -// CHECK-NEXT: [[REG427:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_subs(short vector[8], short vector[8])(<8 x i16> [[REG425]], <8 x i16> [[REG426]]) +// CHECK-NEXT: [[REG427:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_subs(short vector[8], short vector[8])(<8 x i16> frozen [[REG425]], <8 x i16> frozen [[REG426]]) // CHECK-NEXT: store <8 x i16> [[REG427]], <8 x i16>* [[REG416]], align 16 // CHECK-NEXT: [[REG428:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG416]], align 16 // CHECK-NEXT: [[REG429:[0-9a-zA-Z_%.]+]] = bitcast <8 x i16> [[REG428]] to <2 x i64> @@ -584,13 +584,13 @@ // CHECK-LABEL: @test_shuffle -// CHECK: define available_externally <2 x i64> @_mm_shuffle_epi8(<2 x i64> [[REG431:[0-9a-zA-Z_%.]+]], <2 x i64> [[REG432:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x i64> @_mm_shuffle_epi8(<2 x i64> frozen [[REG431:[0-9a-zA-Z_%.]+]], <2 x i64> frozen [[REG432:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x i64> [[REG431]], <2 x i64>* [[REG433:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <2 x i64> [[REG432]], <2 x i64>* [[REG434:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <16 x i8> zeroinitializer, <16 x i8>* [[REG435:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG436:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG434]], align 16 // CHECK-NEXT: [[REG437:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG436]] to <16 x i8> -// CHECK-NEXT: [[REG438:[0-9a-zA-Z_%.]+]] = call <16 x i8> @vec_cmplt(signed char vector[16], signed char vector[16])(<16 x i8> [[REG437]], <16 x i8> zeroinitializer) +// CHECK-NEXT: [[REG438:[0-9a-zA-Z_%.]+]] = call frozen <16 x i8> @vec_cmplt(signed char vector[16], signed char vector[16])(<16 x i8> frozen [[REG437]], <16 x i8> frozen zeroinitializer) // CHECK-NEXT: store <16 x i8> [[REG438]], <16 x i8>* [[REG439:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG440:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG433]], align 16 // CHECK-NEXT: [[REG441:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG440]] to <16 x i8> @@ -598,15 +598,15 @@ // CHECK-NEXT: [[REG443:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG442]] to <16 x i8> // CHECK-NEXT: [[REG444:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG434]], align 16 // CHECK-NEXT: [[REG445:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG444]] to <16 x i8> -// CHECK-NEXT: [[REG446:[0-9a-zA-Z_%.]+]] = call <16 x i8> @vec_perm(signed char vector[16], signed char vector[16], unsigned char vector[16])(<16 x i8> [[REG441]], <16 x i8> [[REG443]], <16 x i8> [[REG445]]) +// CHECK-NEXT: [[REG446:[0-9a-zA-Z_%.]+]] = call frozen <16 x i8> @vec_perm(signed char vector[16], signed char vector[16], unsigned char vector[16])(<16 x i8> frozen [[REG441]], <16 x i8> frozen [[REG443]], <16 x i8> frozen [[REG445]]) // CHECK-NEXT: store <16 x i8> [[REG446]], <16 x i8>* [[REG447:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG448:[0-9a-zA-Z_%.]+]] = load <16 x i8>, <16 x i8>* [[REG447]], align 16 // CHECK-NEXT: [[REG449:[0-9a-zA-Z_%.]+]] = load <16 x i8>, <16 x i8>* [[REG439]], align 16 -// CHECK-NEXT: [[REG450:[0-9a-zA-Z_%.]+]] = call <16 x i8> @vec_sel(signed char vector[16], signed char vector[16], bool vector[16])(<16 x i8> [[REG448]], <16 x i8> zeroinitializer, <16 x i8> [[REG449]]) +// CHECK-NEXT: [[REG450:[0-9a-zA-Z_%.]+]] = call frozen <16 x i8> @vec_sel(signed char vector[16], signed char vector[16], bool vector[16])(<16 x i8> frozen [[REG448]], <16 x i8> frozen zeroinitializer, <16 x i8> frozen [[REG449]]) // CHECK-NEXT: [[REG451:[0-9a-zA-Z_%.]+]] = bitcast <16 x i8> [[REG450]] to <2 x i64> // CHECK-NEXT: ret <2 x i64> [[REG451]] -// CHECK: define available_externally i64 @_mm_shuffle_pi8(i64 [[REG452:[0-9a-zA-Z_%.]+]], i64 [[REG453:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen i64 @_mm_shuffle_pi8(i64 frozen [[REG452:[0-9a-zA-Z_%.]+]], i64 frozen [[REG453:[0-9a-zA-Z_%.]+]]) // CHECK: store i64 [[REG452]], i64* [[REG454:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: store i64 [[REG453]], i64* [[REG455:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: store <16 x i8> zeroinitializer, <16 x i8>* [[REG456:[0-9a-zA-Z_%.]+]], align 16 @@ -627,16 +627,16 @@ // CHECK-NEXT: [[REG471:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG470]] to <16 x i8> // CHECK-NEXT: store <16 x i8> [[REG471]], <16 x i8>* [[REG472:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG473:[0-9a-zA-Z_%.]+]] = load <16 x i8>, <16 x i8>* [[REG472]], align 16 -// CHECK-NEXT: [[REG474:[0-9a-zA-Z_%.]+]] = call <16 x i8> @vec_cmplt(signed char vector[16], signed char vector[16])(<16 x i8> [[REG473]], <16 x i8> zeroinitializer) +// CHECK-NEXT: [[REG474:[0-9a-zA-Z_%.]+]] = call frozen <16 x i8> @vec_cmplt(signed char vector[16], signed char vector[16])(<16 x i8> frozen [[REG473]], <16 x i8> frozen zeroinitializer) // CHECK-NEXT: store <16 x i8> [[REG474]], <16 x i8>* [[REG475:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG476:[0-9a-zA-Z_%.]+]] = load <16 x i8>, <16 x i8>* [[REG464]], align 16 // CHECK-NEXT: [[REG477:[0-9a-zA-Z_%.]+]] = load <16 x i8>, <16 x i8>* [[REG464]], align 16 // CHECK-NEXT: [[REG478:[0-9a-zA-Z_%.]+]] = load <16 x i8>, <16 x i8>* [[REG472]], align 16 -// CHECK-NEXT: [[REG479:[0-9a-zA-Z_%.]+]] = call <16 x i8> @vec_perm(signed char vector[16], signed char vector[16], unsigned char vector[16])(<16 x i8> [[REG476]], <16 x i8> [[REG477]], <16 x i8> [[REG478]]) +// CHECK-NEXT: [[REG479:[0-9a-zA-Z_%.]+]] = call frozen <16 x i8> @vec_perm(signed char vector[16], signed char vector[16], unsigned char vector[16])(<16 x i8> frozen [[REG476]], <16 x i8> frozen [[REG477]], <16 x i8> frozen [[REG478]]) // CHECK-NEXT: store <16 x i8> [[REG479]], <16 x i8>* [[REG464]], align 16 // CHECK-NEXT: [[REG480:[0-9a-zA-Z_%.]+]] = load <16 x i8>, <16 x i8>* [[REG464]], align 16 // CHECK-NEXT: [[REG481:[0-9a-zA-Z_%.]+]] = load <16 x i8>, <16 x i8>* [[REG475]], align 16 -// CHECK-NEXT: [[REG482:[0-9a-zA-Z_%.]+]] = call <16 x i8> @vec_sel(signed char vector[16], signed char vector[16], bool vector[16])(<16 x i8> [[REG480]], <16 x i8> zeroinitializer, <16 x i8> [[REG481]]) +// CHECK-NEXT: [[REG482:[0-9a-zA-Z_%.]+]] = call frozen <16 x i8> @vec_sel(signed char vector[16], signed char vector[16], bool vector[16])(<16 x i8> frozen [[REG480]], <16 x i8> frozen zeroinitializer, <16 x i8> frozen [[REG481]]) // CHECK-NEXT: store <16 x i8> [[REG482]], <16 x i8>* [[REG464]], align 16 // CHECK-NEXT: [[REG483:[0-9a-zA-Z_%.]+]] = load <16 x i8>, <16 x i8>* [[REG464]], align 16 // CHECK-NEXT: [[REG484:[0-9a-zA-Z_%.]+]] = bitcast <16 x i8> [[REG483]] to <2 x i64> @@ -655,79 +655,79 @@ // CHECK-LABEL: @test_sign -// CHECK: define available_externally <2 x i64> @_mm_sign_epi8(<2 x i64> [[REG486:[0-9a-zA-Z_%.]+]], <2 x i64> [[REG487:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x i64> @_mm_sign_epi8(<2 x i64> frozen [[REG486:[0-9a-zA-Z_%.]+]], <2 x i64> frozen [[REG487:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x i64> [[REG486]], <2 x i64>* [[REG488:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <2 x i64> [[REG487]], <2 x i64>* [[REG489:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <16 x i8> zeroinitializer, <16 x i8>* [[REG490:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG491:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG489]], align 16 // CHECK-NEXT: [[REG492:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG491]] to <16 x i8> -// CHECK-NEXT: [[REG493:[0-9a-zA-Z_%.]+]] = call <16 x i8> @vec_cmplt(signed char vector[16], signed char vector[16])(<16 x i8> [[REG492]], <16 x i8> zeroinitializer) +// CHECK-NEXT: [[REG493:[0-9a-zA-Z_%.]+]] = call frozen <16 x i8> @vec_cmplt(signed char vector[16], signed char vector[16])(<16 x i8> frozen [[REG492]], <16 x i8> frozen zeroinitializer) // CHECK-NEXT: store <16 x i8> [[REG493]], <16 x i8>* [[REG494:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG495:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG489]], align 16 // CHECK-NEXT: [[REG496:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG495]] to <16 x i8> -// CHECK-NEXT: [[REG497:[0-9a-zA-Z_%.]+]] = call <16 x i8> @vec_cmpgt(signed char vector[16], signed char vector[16])(<16 x i8> [[REG496]], <16 x i8> zeroinitializer) -// CHECK-NEXT: [[REG498:[0-9a-zA-Z_%.]+]] = call <16 x i8> @vec_neg(signed char vector[16])(<16 x i8> [[REG497]]) +// CHECK-NEXT: [[REG497:[0-9a-zA-Z_%.]+]] = call frozen <16 x i8> @vec_cmpgt(signed char vector[16], signed char vector[16])(<16 x i8> frozen [[REG496]], <16 x i8> frozen zeroinitializer) +// CHECK-NEXT: [[REG498:[0-9a-zA-Z_%.]+]] = call frozen <16 x i8> @vec_neg(signed char vector[16])(<16 x i8> frozen [[REG497]]) // CHECK-NEXT: store <16 x i8> [[REG498]], <16 x i8>* [[REG499:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG500:[0-9a-zA-Z_%.]+]] = load <16 x i8>, <16 x i8>* [[REG494]], align 16 // CHECK-NEXT: [[REG501:[0-9a-zA-Z_%.]+]] = load <16 x i8>, <16 x i8>* [[REG499]], align 16 -// CHECK-NEXT: [[REG502:[0-9a-zA-Z_%.]+]] = call <16 x i8> @vec_add(signed char vector[16], signed char vector[16])(<16 x i8> [[REG500]], <16 x i8> [[REG501]]) +// CHECK-NEXT: [[REG502:[0-9a-zA-Z_%.]+]] = call frozen <16 x i8> @vec_add(signed char vector[16], signed char vector[16])(<16 x i8> frozen [[REG500]], <16 x i8> frozen [[REG501]]) // CHECK-NEXT: store <16 x i8> [[REG502]], <16 x i8>* [[REG503:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG504:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG488]], align 16 // CHECK-NEXT: [[REG505:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG504]] to <16 x i8> // CHECK-NEXT: [[REG506:[0-9a-zA-Z_%.]+]] = load <16 x i8>, <16 x i8>* [[REG503]], align 16 -// CHECK-NEXT: [[REG507:[0-9a-zA-Z_%.]+]] = call <16 x i8> @vec_mul(signed char vector[16], signed char vector[16])(<16 x i8> [[REG505]], <16 x i8> [[REG506]]) +// CHECK-NEXT: [[REG507:[0-9a-zA-Z_%.]+]] = call frozen <16 x i8> @vec_mul(signed char vector[16], signed char vector[16])(<16 x i8> frozen [[REG505]], <16 x i8> frozen [[REG506]]) // CHECK-NEXT: [[REG508:[0-9a-zA-Z_%.]+]] = bitcast <16 x i8> [[REG507]] to <2 x i64> // CHECK-NEXT: ret <2 x i64> [[REG508]] -// CHECK: define available_externally <2 x i64> @_mm_sign_epi16(<2 x i64> [[REG509:[0-9a-zA-Z_%.]+]], <2 x i64> [[REG510:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x i64> @_mm_sign_epi16(<2 x i64> frozen [[REG509:[0-9a-zA-Z_%.]+]], <2 x i64> frozen [[REG510:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x i64> [[REG509]], <2 x i64>* [[REG511:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <2 x i64> [[REG510]], <2 x i64>* [[REG512:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <8 x i16> zeroinitializer, <8 x i16>* [[REG513:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG514:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG512]], align 16 // CHECK-NEXT: [[REG515:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG514]] to <8 x i16> -// CHECK-NEXT: [[REG516:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_cmplt(short vector[8], short vector[8])(<8 x i16> [[REG515]], <8 x i16> zeroinitializer) +// CHECK-NEXT: [[REG516:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_cmplt(short vector[8], short vector[8])(<8 x i16> frozen [[REG515]], <8 x i16> frozen zeroinitializer) // CHECK-NEXT: store <8 x i16> [[REG516]], <8 x i16>* [[REG517:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG518:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG512]], align 16 // CHECK-NEXT: [[REG519:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG518]] to <8 x i16> -// CHECK-NEXT: [[REG520:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_cmpgt(short vector[8], short vector[8])(<8 x i16> [[REG519]], <8 x i16> zeroinitializer) -// CHECK-NEXT: [[REG521:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_neg(short vector[8])(<8 x i16> [[REG520]]) +// CHECK-NEXT: [[REG520:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_cmpgt(short vector[8], short vector[8])(<8 x i16> frozen [[REG519]], <8 x i16> frozen zeroinitializer) +// CHECK-NEXT: [[REG521:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_neg(short vector[8])(<8 x i16> frozen [[REG520]]) // CHECK-NEXT: store <8 x i16> [[REG521]], <8 x i16>* [[REG522:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG523:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG517]], align 16 // CHECK-NEXT: [[REG524:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG522]], align 16 -// CHECK-NEXT: [[REG525:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_add(short vector[8], short vector[8])(<8 x i16> [[REG523]], <8 x i16> [[REG524]]) +// CHECK-NEXT: [[REG525:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_add(short vector[8], short vector[8])(<8 x i16> frozen [[REG523]], <8 x i16> frozen [[REG524]]) // CHECK-NEXT: store <8 x i16> [[REG525]], <8 x i16>* [[REG526:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG527:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG511]], align 16 // CHECK-NEXT: [[REG528:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG527]] to <8 x i16> // CHECK-NEXT: [[REG529:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG526]], align 16 -// CHECK-NEXT: [[REG530:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_mul(short vector[8], short vector[8])(<8 x i16> [[REG528]], <8 x i16> [[REG529]]) +// CHECK-NEXT: [[REG530:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_mul(short vector[8], short vector[8])(<8 x i16> frozen [[REG528]], <8 x i16> frozen [[REG529]]) // CHECK-NEXT: [[REG531:[0-9a-zA-Z_%.]+]] = bitcast <8 x i16> [[REG530]] to <2 x i64> // CHECK-NEXT: ret <2 x i64> [[REG531]] -// CHECK: define available_externally <2 x i64> @_mm_sign_epi32(<2 x i64> [[REG532:[0-9a-zA-Z_%.]+]], <2 x i64> [[REG533:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x i64> @_mm_sign_epi32(<2 x i64> frozen [[REG532:[0-9a-zA-Z_%.]+]], <2 x i64> frozen [[REG533:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x i64> [[REG532]], <2 x i64>* [[REG534:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <2 x i64> [[REG533]], <2 x i64>* [[REG535:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <4 x i32> zeroinitializer, <4 x i32>* [[REG536:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG537:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG535]], align 16 // CHECK-NEXT: [[REG538:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG537]] to <4 x i32> -// CHECK-NEXT: [[REG539:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_cmplt(int vector[4], int vector[4])(<4 x i32> [[REG538]], <4 x i32> zeroinitializer) +// CHECK-NEXT: [[REG539:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_cmplt(int vector[4], int vector[4])(<4 x i32> frozen [[REG538]], <4 x i32> frozen zeroinitializer) // CHECK-NEXT: store <4 x i32> [[REG539]], <4 x i32>* [[REG540:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG541:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG535]], align 16 // CHECK-NEXT: [[REG542:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG541]] to <4 x i32> -// CHECK-NEXT: [[REG543:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_cmpgt(int vector[4], int vector[4])(<4 x i32> [[REG542]], <4 x i32> zeroinitializer) -// CHECK-NEXT: [[REG544:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_neg(int vector[4])(<4 x i32> [[REG543]]) +// CHECK-NEXT: [[REG543:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_cmpgt(int vector[4], int vector[4])(<4 x i32> frozen [[REG542]], <4 x i32> frozen zeroinitializer) +// CHECK-NEXT: [[REG544:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_neg(int vector[4])(<4 x i32> frozen [[REG543]]) // CHECK-NEXT: store <4 x i32> [[REG544]], <4 x i32>* [[REG545:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG546:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG540]], align 16 // CHECK-NEXT: [[REG547:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG545]], align 16 -// CHECK-NEXT: [[REG548:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_add(int vector[4], int vector[4])(<4 x i32> [[REG546]], <4 x i32> [[REG547]]) +// CHECK-NEXT: [[REG548:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_add(int vector[4], int vector[4])(<4 x i32> frozen [[REG546]], <4 x i32> frozen [[REG547]]) // CHECK-NEXT: store <4 x i32> [[REG548]], <4 x i32>* [[REG549:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG550:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG534]], align 16 // CHECK-NEXT: [[REG551:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG550]] to <4 x i32> // CHECK-NEXT: [[REG552:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG549]], align 16 -// CHECK-NEXT: [[REG553:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_mul(int vector[4], int vector[4])(<4 x i32> [[REG551]], <4 x i32> [[REG552]]) +// CHECK-NEXT: [[REG553:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_mul(int vector[4], int vector[4])(<4 x i32> frozen [[REG551]], <4 x i32> frozen [[REG552]]) // CHECK-NEXT: [[REG554:[0-9a-zA-Z_%.]+]] = bitcast <4 x i32> [[REG553]] to <2 x i64> // CHECK-NEXT: ret <2 x i64> [[REG554]] -// CHECK: define available_externally i64 @_mm_sign_pi8(i64 [[REG555:[0-9a-zA-Z_%.]+]], i64 [[REG556:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen i64 @_mm_sign_pi8(i64 frozen [[REG555:[0-9a-zA-Z_%.]+]], i64 frozen [[REG556:[0-9a-zA-Z_%.]+]]) // CHECK: store i64 [[REG555]], i64* [[REG557:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: store i64 [[REG556]], i64* [[REG558:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: store <16 x i8> zeroinitializer, <16 x i8>* [[REG559:[0-9a-zA-Z_%.]+]], align 16 @@ -751,7 +751,7 @@ // CHECK-NEXT: [[REG577:[0-9a-zA-Z_%.]+]] = bitcast <16 x i8> [[REG576]] to <2 x i64> // CHECK-NEXT: [[REG578:[0-9a-zA-Z_%.]+]] = load <16 x i8>, <16 x i8>* [[REG575]], align 16 // CHECK-NEXT: [[REG579:[0-9a-zA-Z_%.]+]] = bitcast <16 x i8> [[REG578]] to <2 x i64> -// CHECK-NEXT: [[REG580:[0-9a-zA-Z_%.]+]] = call <2 x i64> @_mm_sign_epi8(<2 x i64> [[REG577]], <2 x i64> [[REG579]]) +// CHECK-NEXT: [[REG580:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @_mm_sign_epi8(<2 x i64> frozen [[REG577]], <2 x i64> frozen [[REG579]]) // CHECK-NEXT: [[REG581:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG580]] to <16 x i8> // CHECK-NEXT: store <16 x i8> [[REG581]], <16 x i8>* [[REG567]], align 16 // CHECK-NEXT: [[REG582:[0-9a-zA-Z_%.]+]] = load <16 x i8>, <16 x i8>* [[REG567]], align 16 @@ -759,7 +759,7 @@ // CHECK-NEXT: [[REG584:[0-9a-zA-Z_%.]+]] = extractelement <2 x i64> [[REG583]], i32 0 // CHECK-NEXT: ret i64 [[REG584]] -// CHECK: define available_externally i64 @_mm_sign_pi16(i64 [[REG585:[0-9a-zA-Z_%.]+]], i64 [[REG586:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen i64 @_mm_sign_pi16(i64 frozen [[REG585:[0-9a-zA-Z_%.]+]], i64 frozen [[REG586:[0-9a-zA-Z_%.]+]]) // CHECK: store i64 [[REG585]], i64* [[REG587:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: store i64 [[REG586]], i64* [[REG588:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: store <8 x i16> zeroinitializer, <8 x i16>* [[REG589:[0-9a-zA-Z_%.]+]], align 16 @@ -783,7 +783,7 @@ // CHECK-NEXT: [[REG607:[0-9a-zA-Z_%.]+]] = bitcast <8 x i16> [[REG606]] to <2 x i64> // CHECK-NEXT: [[REG608:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG605]], align 16 // CHECK-NEXT: [[REG609:[0-9a-zA-Z_%.]+]] = bitcast <8 x i16> [[REG608]] to <2 x i64> -// CHECK-NEXT: [[REG610:[0-9a-zA-Z_%.]+]] = call <2 x i64> @_mm_sign_epi16(<2 x i64> [[REG607]], <2 x i64> [[REG609]]) +// CHECK-NEXT: [[REG610:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @_mm_sign_epi16(<2 x i64> frozen [[REG607]], <2 x i64> frozen [[REG609]]) // CHECK-NEXT: [[REG611:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG610]] to <8 x i16> // CHECK-NEXT: store <8 x i16> [[REG611]], <8 x i16>* [[REG597]], align 16 // CHECK-NEXT: [[REG612:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG597]], align 16 @@ -791,7 +791,7 @@ // CHECK-NEXT: [[REG614:[0-9a-zA-Z_%.]+]] = extractelement <2 x i64> [[REG613]], i32 0 // CHECK-NEXT: ret i64 [[REG614]] -// CHECK: define available_externally i64 @_mm_sign_pi32(i64 [[REG615:[0-9a-zA-Z_%.]+]], i64 [[REG616:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen i64 @_mm_sign_pi32(i64 frozen [[REG615:[0-9a-zA-Z_%.]+]], i64 frozen [[REG616:[0-9a-zA-Z_%.]+]]) // CHECK: store i64 [[REG615]], i64* [[REG617:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: store i64 [[REG616]], i64* [[REG618:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: store <4 x i32> zeroinitializer, <4 x i32>* [[REG619:[0-9a-zA-Z_%.]+]], align 16 @@ -815,7 +815,7 @@ // CHECK-NEXT: [[REG637:[0-9a-zA-Z_%.]+]] = bitcast <4 x i32> [[REG636]] to <2 x i64> // CHECK-NEXT: [[REG638:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG635]], align 16 // CHECK-NEXT: [[REG639:[0-9a-zA-Z_%.]+]] = bitcast <4 x i32> [[REG638]] to <2 x i64> -// CHECK-NEXT: [[REG640:[0-9a-zA-Z_%.]+]] = call <2 x i64> @_mm_sign_epi32(<2 x i64> [[REG637]], <2 x i64> [[REG639]]) +// CHECK-NEXT: [[REG640:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @_mm_sign_epi32(<2 x i64> frozen [[REG637]], <2 x i64> frozen [[REG639]]) // CHECK-NEXT: [[REG641:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG640]] to <4 x i32> // CHECK-NEXT: store <4 x i32> [[REG641]], <4 x i32>* [[REG627]], align 16 // CHECK-NEXT: [[REG642:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG627]], align 16 @@ -831,56 +831,56 @@ // CHECK-LABEL: @test_maddubs -// CHECK: define available_externally <2 x i64> @_mm_maddubs_epi16(<2 x i64> [[REG645:[0-9a-zA-Z_%.]+]], <2 x i64> [[REG646:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x i64> @_mm_maddubs_epi16(<2 x i64> frozen [[REG645:[0-9a-zA-Z_%.]+]], <2 x i64> frozen [[REG646:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x i64> [[REG645]], <2 x i64>* [[REG647:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <2 x i64> [[REG646]], <2 x i64>* [[REG648:[0-9a-zA-Z_%.]+]], align 16 -// CHECK-NEXT: [[REG649:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_splats(short)(i16 signext 255) +// CHECK-NEXT: [[REG649:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_splats(short)(i16 frozen signext 255) // CHECK-NEXT: store <8 x i16> [[REG649]], <8 x i16>* [[REG650:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG651:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG647]], align 16 // CHECK-NEXT: [[REG652:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG651]] to <16 x i8> -// CHECK-NEXT: [[REG653:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_unpackh(signed char vector[16])(<16 x i8> [[REG652]]) +// CHECK-NEXT: [[REG653:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_unpackh(signed char vector[16])(<16 x i8> frozen [[REG652]]) // CHECK-NEXT: [[REG654:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG650]], align 16 -// CHECK-NEXT: [[REG655:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_and(short vector[8], short vector[8])(<8 x i16> [[REG653]], <8 x i16> [[REG654]]) +// CHECK-NEXT: [[REG655:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_and(short vector[8], short vector[8])(<8 x i16> frozen [[REG653]], <8 x i16> frozen [[REG654]]) // CHECK-NEXT: store <8 x i16> [[REG655]], <8 x i16>* [[REG656:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG657:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG647]], align 16 // CHECK-NEXT: [[REG658:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG657]] to <16 x i8> -// CHECK-NEXT: [[REG659:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_unpackl(signed char vector[16])(<16 x i8> [[REG658]]) +// CHECK-NEXT: [[REG659:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_unpackl(signed char vector[16])(<16 x i8> frozen [[REG658]]) // CHECK-NEXT: [[REG660:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG650]], align 16 -// CHECK-NEXT: [[REG661:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_and(short vector[8], short vector[8])(<8 x i16> [[REG659]], <8 x i16> [[REG660]]) +// CHECK-NEXT: [[REG661:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_and(short vector[8], short vector[8])(<8 x i16> frozen [[REG659]], <8 x i16> frozen [[REG660]]) // CHECK-NEXT: store <8 x i16> [[REG661]], <8 x i16>* [[REG662:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG663:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG648]], align 16 // CHECK-NEXT: [[REG664:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG663]] to <16 x i8> -// CHECK-NEXT: [[REG76:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_unpackh(signed char vector[16])(<16 x i8> [[REG664]]) +// CHECK-NEXT: [[REG76:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_unpackh(signed char vector[16])(<16 x i8> frozen [[REG664]]) // CHECK-NEXT: store <8 x i16> [[REG76]], <8 x i16>* [[REG665:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG666:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG648]], align 16 // CHECK-NEXT: [[REG667:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG666]] to <16 x i8> -// CHECK-NEXT: [[REG668:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_unpackl(signed char vector[16])(<16 x i8> [[REG667]]) +// CHECK-NEXT: [[REG668:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_unpackl(signed char vector[16])(<16 x i8> frozen [[REG667]]) // CHECK-NEXT: store <8 x i16> [[REG668]], <8 x i16>* [[REG669:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG670:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG656]], align 16 // CHECK-NEXT: [[REG671:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG665]], align 16 -// CHECK-NEXT: [[REG672:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_mul(short vector[8], short vector[8])(<8 x i16> [[REG670]], <8 x i16> [[REG671]]) +// CHECK-NEXT: [[REG672:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_mul(short vector[8], short vector[8])(<8 x i16> frozen [[REG670]], <8 x i16> frozen [[REG671]]) // CHECK-NEXT: store <8 x i16> [[REG672]], <8 x i16>* [[REG656]], align 16 // CHECK-NEXT: [[REG673:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG662]], align 16 // CHECK-NEXT: [[REG674:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG669]], align 16 -// CHECK-NEXT: [[REG675:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_mul(short vector[8], short vector[8])(<8 x i16> [[REG673]], <8 x i16> [[REG674]]) +// CHECK-NEXT: [[REG675:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_mul(short vector[8], short vector[8])(<8 x i16> frozen [[REG673]], <8 x i16> frozen [[REG674]]) // CHECK-NEXT: store <8 x i16> [[REG675]], <8 x i16>* [[REG662]], align 16 // CHECK-NEXT: store <16 x i8> , <16 x i8>* [[REG676:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <16 x i8> , <16 x i8>* [[REG677:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG678:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG656]], align 16 // CHECK-NEXT: [[REG679:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG662]], align 16 -// CHECK-NEXT: [[REG680:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_perm(short vector[8], short vector[8], unsigned char vector[16])(<8 x i16> [[REG678]], <8 x i16> [[REG679]], <16 x i8> ) +// CHECK-NEXT: [[REG680:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_perm(short vector[8], short vector[8], unsigned char vector[16])(<8 x i16> frozen [[REG678]], <8 x i16> frozen [[REG679]], <16 x i8> frozen ) // CHECK-NEXT: store <8 x i16> [[REG680]], <8 x i16>* [[REG665]], align 16 // CHECK-NEXT: [[REG681:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG656]], align 16 // CHECK-NEXT: [[REG682:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG662]], align 16 -// CHECK-NEXT: [[REG683:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_perm(short vector[8], short vector[8], unsigned char vector[16])(<8 x i16> [[REG681]], <8 x i16> [[REG682]], <16 x i8> ) +// CHECK-NEXT: [[REG683:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_perm(short vector[8], short vector[8], unsigned char vector[16])(<8 x i16> frozen [[REG681]], <8 x i16> frozen [[REG682]], <16 x i8> frozen ) // CHECK-NEXT: store <8 x i16> [[REG683]], <8 x i16>* [[REG669]], align 16 // CHECK-NEXT: [[REG684:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG665]], align 16 // CHECK-NEXT: [[REG685:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG669]], align 16 -// CHECK-NEXT: [[REG686:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_adds(short vector[8], short vector[8])(<8 x i16> [[REG684]], <8 x i16> [[REG685]]) +// CHECK-NEXT: [[REG686:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_adds(short vector[8], short vector[8])(<8 x i16> frozen [[REG684]], <8 x i16> frozen [[REG685]]) // CHECK-NEXT: [[REG687:[0-9a-zA-Z_%.]+]] = bitcast <8 x i16> [[REG686]] to <2 x i64> // CHECK-NEXT: ret <2 x i64> [[REG687]] -// CHECK: define available_externally i64 @_mm_maddubs_pi16(i64 [[REG688:[0-9a-zA-Z_%.]+]], i64 [[REG689:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen i64 @_mm_maddubs_pi16(i64 frozen [[REG688:[0-9a-zA-Z_%.]+]], i64 frozen [[REG689:[0-9a-zA-Z_%.]+]]) // CHECK: store i64 [[REG688]], i64* [[REG690:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: store i64 [[REG689]], i64* [[REG691:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: [[REG692:[0-9a-zA-Z_%.]+]] = load i64, i64* [[REG690]], align 8 @@ -893,13 +893,13 @@ // CHECK-NEXT: store <8 x i16> [[REG84]], <8 x i16>* [[REG696:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG697:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG696]], align 16 // CHECK-NEXT: [[REG698:[0-9a-zA-Z_%.]+]] = bitcast <8 x i16> [[REG697]] to <16 x i8> -// CHECK-NEXT: [[REG699:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_unpackl(signed char vector[16])(<16 x i8> [[REG698]]) +// CHECK-NEXT: [[REG699:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_unpackl(signed char vector[16])(<16 x i8> frozen [[REG698]]) // CHECK-NEXT: store <8 x i16> [[REG699]], <8 x i16>* [[REG696]], align 16 -// CHECK-NEXT: [[REG700:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_splats(short)(i16 signext 255) +// CHECK-NEXT: [[REG700:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_splats(short)(i16 frozen signext 255) // CHECK-NEXT: store <8 x i16> [[REG700]], <8 x i16>* [[REG701:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG702:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG696]], align 16 // CHECK-NEXT: [[REG703:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG701]], align 16 -// CHECK-NEXT: [[REG704:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_and(short vector[8], short vector[8])(<8 x i16> [[REG702]], <8 x i16> [[REG703]]) +// CHECK-NEXT: [[REG704:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_and(short vector[8], short vector[8])(<8 x i16> frozen [[REG702]], <8 x i16> frozen [[REG703]]) // CHECK-NEXT: store <8 x i16> [[REG704]], <8 x i16>* [[REG696]], align 16 // CHECK-NEXT: [[REG705:[0-9a-zA-Z_%.]+]] = load i64, i64* [[REG691]], align 8 // CHECK-NEXT: [[REG706:[0-9a-zA-Z_%.]+]] = insertelement <2 x i64> undef, i64 [[REG705]], i32 0 @@ -911,25 +911,25 @@ // CHECK-NEXT: store <8 x i16> [[REG711]], <8 x i16>* [[REG712:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG713:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG712]], align 16 // CHECK-NEXT: [[REG714:[0-9a-zA-Z_%.]+]] = bitcast <8 x i16> [[REG713]] to <16 x i8> -// CHECK-NEXT: [[REG715:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_unpackl(signed char vector[16])(<16 x i8> [[REG714]]) +// CHECK-NEXT: [[REG715:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_unpackl(signed char vector[16])(<16 x i8> frozen [[REG714]]) // CHECK-NEXT: store <8 x i16> [[REG715]], <8 x i16>* [[REG712]], align 16 // CHECK-NEXT: [[REG716:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG696]], align 16 // CHECK-NEXT: [[REG717:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG712]], align 16 -// CHECK-NEXT: [[REG718:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_mul(short vector[8], short vector[8])(<8 x i16> [[REG716]], <8 x i16> [[REG717]]) +// CHECK-NEXT: [[REG718:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_mul(short vector[8], short vector[8])(<8 x i16> frozen [[REG716]], <8 x i16> frozen [[REG717]]) // CHECK-NEXT: store <8 x i16> [[REG718]], <8 x i16>* [[REG712]], align 16 // CHECK-NEXT: store <16 x i8> , <16 x i8>* [[REG719:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <16 x i8> , <16 x i8>* [[REG720:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG721:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG712]], align 16 // CHECK-NEXT: [[REG722:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG712]], align 16 -// CHECK-NEXT: [[REG723:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_perm(short vector[8], short vector[8], unsigned char vector[16])(<8 x i16> [[REG721]], <8 x i16> [[REG722]], <16 x i8> ) +// CHECK-NEXT: [[REG723:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_perm(short vector[8], short vector[8], unsigned char vector[16])(<8 x i16> frozen [[REG721]], <8 x i16> frozen [[REG722]], <16 x i8> frozen ) // CHECK-NEXT: store <8 x i16> [[REG723]], <8 x i16>* [[REG696]], align 16 // CHECK-NEXT: [[REG724:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG712]], align 16 // CHECK-NEXT: [[REG725:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG712]], align 16 -// CHECK-NEXT: [[REG726:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_perm(short vector[8], short vector[8], unsigned char vector[16])(<8 x i16> [[REG724]], <8 x i16> [[REG725]], <16 x i8> ) +// CHECK-NEXT: [[REG726:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_perm(short vector[8], short vector[8], unsigned char vector[16])(<8 x i16> frozen [[REG724]], <8 x i16> frozen [[REG725]], <16 x i8> frozen ) // CHECK-NEXT: store <8 x i16> [[REG726]], <8 x i16>* [[REG712]], align 16 // CHECK-NEXT: [[REG727:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG696]], align 16 // CHECK-NEXT: [[REG728:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG712]], align 16 -// CHECK-NEXT: [[REG729:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_adds(short vector[8], short vector[8])(<8 x i16> [[REG727]], <8 x i16> [[REG728]]) +// CHECK-NEXT: [[REG729:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_adds(short vector[8], short vector[8])(<8 x i16> frozen [[REG727]], <8 x i16> frozen [[REG728]]) // CHECK-NEXT: store <8 x i16> [[REG729]], <8 x i16>* [[REG696]], align 16 // CHECK-NEXT: [[REG730:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG696]], align 16 // CHECK-NEXT: [[REG731:[0-9a-zA-Z_%.]+]] = bitcast <8 x i16> [[REG730]] to <2 x i64> @@ -944,68 +944,68 @@ // CHECK-LABEL: @test_mulhrs -// CHECK: define available_externally <2 x i64> @_mm_mulhrs_epi16(<2 x i64> [[REG733:[0-9a-zA-Z_%.]+]], <2 x i64> [[REG734:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <2 x i64> @_mm_mulhrs_epi16(<2 x i64> frozen [[REG733:[0-9a-zA-Z_%.]+]], <2 x i64> frozen [[REG734:[0-9a-zA-Z_%.]+]]) // CHECK: store <2 x i64> [[REG733]], <2 x i64>* [[REG735:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <2 x i64> [[REG734]], <2 x i64>* [[REG736:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG737:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG735]], align 16 // CHECK-NEXT: [[REG738:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG737]] to <8 x i16> -// CHECK-NEXT: [[REG739:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_unpackh(short vector[8])(<8 x i16> [[REG738]]) +// CHECK-NEXT: [[REG739:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_unpackh(short vector[8])(<8 x i16> frozen [[REG738]]) // CHECK-NEXT: store <4 x i32> [[REG739]], <4 x i32>* [[REG740:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG741:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG736]], align 16 // CHECK-NEXT: [[REG742:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG741]] to <8 x i16> -// CHECK-NEXT: [[REG743:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_unpackh(short vector[8])(<8 x i16> [[REG742]]) +// CHECK-NEXT: [[REG743:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_unpackh(short vector[8])(<8 x i16> frozen [[REG742]]) // CHECK-NEXT: store <4 x i32> [[REG743]], <4 x i32>* [[REG744:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG745:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG740]], align 16 // CHECK-NEXT: [[REG746:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG744]], align 16 -// CHECK-NEXT: [[REG747:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_mul(int vector[4], int vector[4])(<4 x i32> [[REG745]], <4 x i32> [[REG746]]) +// CHECK-NEXT: [[REG747:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_mul(int vector[4], int vector[4])(<4 x i32> frozen [[REG745]], <4 x i32> frozen [[REG746]]) // CHECK-NEXT: store <4 x i32> [[REG747]], <4 x i32>* [[REG740]], align 16 // CHECK-NEXT: [[REG748:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG735]], align 16 // CHECK-NEXT: [[REG749:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG748]] to <8 x i16> -// CHECK-NEXT: [[REG750:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_unpackl(short vector[8])(<8 x i16> [[REG749]]) +// CHECK-NEXT: [[REG750:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_unpackl(short vector[8])(<8 x i16> frozen [[REG749]]) // CHECK-NEXT: store <4 x i32> [[REG750]], <4 x i32>* [[REG744]], align 16 // CHECK-NEXT: [[REG751:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG736]], align 16 // CHECK-NEXT: [[REG752:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG751]] to <8 x i16> -// CHECK-NEXT: [[REG753:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_unpackl(short vector[8])(<8 x i16> [[REG752]]) +// CHECK-NEXT: [[REG753:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_unpackl(short vector[8])(<8 x i16> frozen [[REG752]]) // CHECK-NEXT: store <4 x i32> [[REG753]], <4 x i32>* [[REG754:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG755:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG744]], align 16 // CHECK-NEXT: [[REG756:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG754]], align 16 -// CHECK-NEXT: [[REG757:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_mul(int vector[4], int vector[4])(<4 x i32> [[REG755]], <4 x i32> [[REG756]]) +// CHECK-NEXT: [[REG757:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_mul(int vector[4], int vector[4])(<4 x i32> frozen [[REG755]], <4 x i32> frozen [[REG756]]) // CHECK-NEXT: store <4 x i32> [[REG757]], <4 x i32>* [[REG744]], align 16 -// CHECK-NEXT: [[REG758:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_splats(unsigned int)(i32 zeroext 14) +// CHECK-NEXT: [[REG758:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_splats(unsigned int)(i32 frozen zeroext 14) // CHECK-NEXT: store <4 x i32> [[REG758]], <4 x i32>* [[REG759:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG760:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG740]], align 16 // CHECK-NEXT: [[REG761:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG759]], align 16 -// CHECK-NEXT: [[REG762:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_sr(int vector[4], unsigned int vector[4])(<4 x i32> [[REG760]], <4 x i32> [[REG761]]) +// CHECK-NEXT: [[REG762:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_sr(int vector[4], unsigned int vector[4])(<4 x i32> frozen [[REG760]], <4 x i32> frozen [[REG761]]) // CHECK-NEXT: store <4 x i32> [[REG762]], <4 x i32>* [[REG740]], align 16 // CHECK-NEXT: [[REG763:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG744]], align 16 // CHECK-NEXT: [[REG764:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG759]], align 16 -// CHECK-NEXT: [[REG765:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_sr(int vector[4], unsigned int vector[4])(<4 x i32> [[REG763]], <4 x i32> [[REG764]]) +// CHECK-NEXT: [[REG765:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_sr(int vector[4], unsigned int vector[4])(<4 x i32> frozen [[REG763]], <4 x i32> frozen [[REG764]]) // CHECK-NEXT: store <4 x i32> [[REG765]], <4 x i32>* [[REG744]], align 16 -// CHECK-NEXT: [[REG766:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_splats(int)(i32 signext 1) +// CHECK-NEXT: [[REG766:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_splats(int)(i32 frozen signext 1) // CHECK-NEXT: store <4 x i32> [[REG766]], <4 x i32>* [[REG767:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG768:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG740]], align 16 // CHECK-NEXT: [[REG769:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG767]], align 16 -// CHECK-NEXT: [[REG770:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_add(int vector[4], int vector[4])(<4 x i32> [[REG768]], <4 x i32> [[REG769]]) +// CHECK-NEXT: [[REG770:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_add(int vector[4], int vector[4])(<4 x i32> frozen [[REG768]], <4 x i32> frozen [[REG769]]) // CHECK-NEXT: store <4 x i32> [[REG770]], <4 x i32>* [[REG740]], align 16 // CHECK-NEXT: [[REG771:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG740]], align 16 // CHECK-NEXT: [[REG772:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG767]], align 16 -// CHECK-NEXT: [[REG773:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_sr(int vector[4], unsigned int vector[4])(<4 x i32> [[REG771]], <4 x i32> [[REG772]]) +// CHECK-NEXT: [[REG773:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_sr(int vector[4], unsigned int vector[4])(<4 x i32> frozen [[REG771]], <4 x i32> frozen [[REG772]]) // CHECK-NEXT: store <4 x i32> [[REG773]], <4 x i32>* [[REG740]], align 16 // CHECK-NEXT: [[REG774:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG744]], align 16 // CHECK-NEXT: [[REG775:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG767]], align 16 -// CHECK-NEXT: [[REG776:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_add(int vector[4], int vector[4])(<4 x i32> [[REG774]], <4 x i32> [[REG775]]) +// CHECK-NEXT: [[REG776:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_add(int vector[4], int vector[4])(<4 x i32> frozen [[REG774]], <4 x i32> frozen [[REG775]]) // CHECK-NEXT: store <4 x i32> [[REG776]], <4 x i32>* [[REG744]], align 16 // CHECK-NEXT: [[REG777:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG744]], align 16 // CHECK-NEXT: [[REG778:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG767]], align 16 -// CHECK-NEXT: [[REG779:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_sr(int vector[4], unsigned int vector[4])(<4 x i32> [[REG777]], <4 x i32> [[REG778]]) +// CHECK-NEXT: [[REG779:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_sr(int vector[4], unsigned int vector[4])(<4 x i32> frozen [[REG777]], <4 x i32> frozen [[REG778]]) // CHECK-NEXT: store <4 x i32> [[REG779]], <4 x i32>* [[REG744]], align 16 // CHECK-NEXT: [[REG780:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG740]], align 16 // CHECK-NEXT: [[REG781:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG744]], align 16 -// CHECK-NEXT: [[REG782:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_pack(int vector[4], int vector[4])(<4 x i32> [[REG780]], <4 x i32> [[REG781]]) +// CHECK-NEXT: [[REG782:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_pack(int vector[4], int vector[4])(<4 x i32> frozen [[REG780]], <4 x i32> frozen [[REG781]]) // CHECK-NEXT: [[REG783:[0-9a-zA-Z_%.]+]] = bitcast <8 x i16> [[REG782]] to <2 x i64> // CHECK-NEXT: ret <2 x i64> [[REG783]] -// CHECK: define available_externally i64 @_mm_mulhrs_pi16(i64 [[REG784:[0-9a-zA-Z_%.]+]], i64 [[REG785:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen i64 @_mm_mulhrs_pi16(i64 frozen [[REG784:[0-9a-zA-Z_%.]+]], i64 frozen [[REG785:[0-9a-zA-Z_%.]+]]) // CHECK: store i64 [[REG784]], i64* [[REG786:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: store i64 [[REG785]], i64* [[REG787:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: [[REG788:[0-9a-zA-Z_%.]+]] = load i64, i64* [[REG786]], align 8 @@ -1018,7 +1018,7 @@ // CHECK-NEXT: store <4 x i32> [[REG794]], <4 x i32>* [[REG795:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG796:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG795]], align 16 // CHECK-NEXT: [[REG797:[0-9a-zA-Z_%.]+]] = bitcast <4 x i32> [[REG796]] to <8 x i16> -// CHECK-NEXT: [[REG798:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_unpackh(short vector[8])(<8 x i16> [[REG797]]) +// CHECK-NEXT: [[REG798:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_unpackh(short vector[8])(<8 x i16> frozen [[REG797]]) // CHECK-NEXT: store <4 x i32> [[REG798]], <4 x i32>* [[REG795]], align 16 // CHECK-NEXT: [[REG799:[0-9a-zA-Z_%.]+]] = load i64, i64* [[REG787]], align 8 // CHECK-NEXT: [[REG800:[0-9a-zA-Z_%.]+]] = insertelement <2 x i64> undef, i64 [[REG799]], i32 0 @@ -1030,31 +1030,31 @@ // CHECK-NEXT: store <4 x i32> [[REG805]], <4 x i32>* [[REG806:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG807:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG806]], align 16 // CHECK-NEXT: [[REG808:[0-9a-zA-Z_%.]+]] = bitcast <4 x i32> [[REG807]] to <8 x i16> -// CHECK-NEXT: [[REG809:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_unpackh(short vector[8])(<8 x i16> [[REG808]]) +// CHECK-NEXT: [[REG809:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_unpackh(short vector[8])(<8 x i16> frozen [[REG808]]) // CHECK-NEXT: store <4 x i32> [[REG809]], <4 x i32>* [[REG806]], align 16 // CHECK-NEXT: [[REG810:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG795]], align 16 // CHECK-NEXT: [[REG811:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG806]], align 16 -// CHECK-NEXT: [[REG812:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_mul(int vector[4], int vector[4])(<4 x i32> [[REG810]], <4 x i32> [[REG811]]) +// CHECK-NEXT: [[REG812:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_mul(int vector[4], int vector[4])(<4 x i32> frozen [[REG810]], <4 x i32> frozen [[REG811]]) // CHECK-NEXT: store <4 x i32> [[REG812]], <4 x i32>* [[REG795]], align 16 -// CHECK-NEXT: [[REG813:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_splats(unsigned int)(i32 zeroext 14) +// CHECK-NEXT: [[REG813:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_splats(unsigned int)(i32 frozen zeroext 14) // CHECK-NEXT: store <4 x i32> [[REG813]], <4 x i32>* [[REG814:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG815:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG795]], align 16 // CHECK-NEXT: [[REG816:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG814]], align 16 -// CHECK-NEXT: [[REG817:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_sr(int vector[4], unsigned int vector[4])(<4 x i32> [[REG815]], <4 x i32> [[REG816]]) +// CHECK-NEXT: [[REG817:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_sr(int vector[4], unsigned int vector[4])(<4 x i32> frozen [[REG815]], <4 x i32> frozen [[REG816]]) // CHECK-NEXT: store <4 x i32> [[REG817]], <4 x i32>* [[REG795]], align 16 -// CHECK-NEXT: [[REG818:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_splats(int)(i32 signext 1) +// CHECK-NEXT: [[REG818:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_splats(int)(i32 frozen signext 1) // CHECK-NEXT: store <4 x i32> [[REG818]], <4 x i32>* [[REG819:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG820:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG795]], align 16 // CHECK-NEXT: [[REG821:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG819]], align 16 -// CHECK-NEXT: [[REG822:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_add(int vector[4], int vector[4])(<4 x i32> [[REG820]], <4 x i32> [[REG821]]) +// CHECK-NEXT: [[REG822:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_add(int vector[4], int vector[4])(<4 x i32> frozen [[REG820]], <4 x i32> frozen [[REG821]]) // CHECK-NEXT: store <4 x i32> [[REG822]], <4 x i32>* [[REG795]], align 16 // CHECK-NEXT: [[REG823:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG795]], align 16 // CHECK-NEXT: [[REG824:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG819]], align 16 -// CHECK-NEXT: [[REG825:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_sr(int vector[4], unsigned int vector[4])(<4 x i32> [[REG823]], <4 x i32> [[REG824]]) +// CHECK-NEXT: [[REG825:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_sr(int vector[4], unsigned int vector[4])(<4 x i32> frozen [[REG823]], <4 x i32> frozen [[REG824]]) // CHECK-NEXT: store <4 x i32> [[REG825]], <4 x i32>* [[REG795]], align 16 // CHECK-NEXT: [[REG826:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG795]], align 16 // CHECK-NEXT: [[REG827:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG806]], align 16 -// CHECK-NEXT: [[REG828:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_pack(int vector[4], int vector[4])(<4 x i32> [[REG826]], <4 x i32> [[REG827]]) +// CHECK-NEXT: [[REG828:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_pack(int vector[4], int vector[4])(<4 x i32> frozen [[REG826]], <4 x i32> frozen [[REG827]]) // CHECK-NEXT: store <8 x i16> [[REG828]], <8 x i16>* [[REG829:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG830:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* [[REG829]], align 16 // CHECK-NEXT: [[REG831:[0-9a-zA-Z_%.]+]] = bitcast <8 x i16> [[REG830]] to <2 x i64> diff --git a/clang/test/CodeGen/ppc-xmmintrin.c b/clang/test/CodeGen/ppc-xmmintrin.c --- a/clang/test/CodeGen/ppc-xmmintrin.c +++ b/clang/test/CodeGen/ppc-xmmintrin.c @@ -28,7 +28,7 @@ // CHECK-LABEL: @test_add -// CHECK: define available_externally <4 x float> @_mm_add_ps(<4 x float> [[REG1:[0-9a-zA-Z_%.]+]], <4 x float> [[REG2:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <4 x float> @_mm_add_ps(<4 x float> frozen [[REG1:[0-9a-zA-Z_%.]+]], <4 x float> frozen [[REG2:[0-9a-zA-Z_%.]+]]) // CHECK: store <4 x float> [[REG1]], <4 x float>* [[REG3:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <4 x float> [[REG2]], <4 x float>* [[REG4:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG5:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG3]], align 16 @@ -36,14 +36,14 @@ // CHECK-NEXT: [[REG7:[0-9a-zA-Z_%.]+]] = fadd <4 x float> [[REG5]], [[REG6]] // CHECK-NEXT: ret <4 x float> [[REG7]] -// CHECK: define available_externally <4 x float> @_mm_add_ss(<4 x float> [[REG8:[0-9a-zA-Z_%.]+]], <4 x float> [[REG9:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <4 x float> @_mm_add_ss(<4 x float> frozen [[REG8:[0-9a-zA-Z_%.]+]], <4 x float> frozen [[REG9:[0-9a-zA-Z_%.]+]]) // CHECK: store <4 x float> [[REG8]], <4 x float>* [[REG10:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <4 x float> [[REG9]], <4 x float>* [[REG11:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG12:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG10]], align 16 -// CHECK-NEXT: [[REG13:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_splat(float vector[4], unsigned int)(<4 x float> [[REG12]], i32 zeroext 0) +// CHECK-NEXT: [[REG13:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_splat(float vector[4], unsigned int)(<4 x float> frozen [[REG12]], i32 frozen zeroext 0) // CHECK-NEXT: store <4 x float> [[REG13]], <4 x float>* [[REG14:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG15:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG11]], align 16 -// CHECK-NEXT: [[REG16:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_splat(float vector[4], unsigned int)(<4 x float> [[REG15]], i32 zeroext 0) +// CHECK-NEXT: [[REG16:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_splat(float vector[4], unsigned int)(<4 x float> frozen [[REG15]], i32 frozen zeroext 0) // CHECK-NEXT: store <4 x float> [[REG16]], <4 x float>* [[REG17:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG18:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG14]], align 16 // CHECK-NEXT: [[REG19:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG17]], align 16 @@ -51,7 +51,7 @@ // CHECK-NEXT: store <4 x float> [[REG20]], <4 x float>* [[REG21:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG22:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG10]], align 16 // CHECK-NEXT: [[REG23:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG21]], align 16 -// CHECK-NEXT: [[REG24:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_sel(float vector[4], float vector[4], unsigned int vector[4])(<4 x float> [[REG22]], <4 x float> [[REG23]], <4 x i32> ) +// CHECK-NEXT: [[REG24:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_sel(float vector[4], float vector[4], unsigned int vector[4])(<4 x float> frozen [[REG22]], <4 x float> frozen [[REG23]], <4 x i32> frozen ) // CHECK-NEXT: ret <4 x float> [[REG24]] void __attribute__((noinline)) @@ -62,40 +62,40 @@ // CHECK-LABEL: @test_avg -// CHECK: define available_externally i64 @_mm_avg_pu16 +// CHECK: define available_externally frozen i64 @_mm_avg_pu16 // CHECK: store i64 {{[0-9a-zA-Z_%.]+}}, i64* {{[0-9a-zA-Z_%.]+}}, align 8 // CHECK-NEXT: store i64 {{[0-9a-zA-Z_%.]+}}, i64* {{[0-9a-zA-Z_%.]+}}, align 8 // CHECK-NEXT: [[REG25:[0-9a-zA-Z_%.]+]] = load i64, i64* {{[0-9a-zA-Z_%.]+}}, align 8 -// CHECK-NEXT: [[REG26:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_splats(unsigned long long)(i64 [[REG25]]) +// CHECK-NEXT: [[REG26:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_splats(unsigned long long)(i64 frozen [[REG25]]) // CHECK-NEXT: [[REG27:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG26]] to <8 x i16> // CHECK-NEXT: store <8 x i16> [[REG27]], <8 x i16>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG28:[0-9a-zA-Z_%.]+]] = load i64, i64* {{[0-9a-zA-Z_%.]+}}, align 8 -// CHECK-NEXT: [[REG29:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_splats(unsigned long long)(i64 [[REG28]]) +// CHECK-NEXT: [[REG29:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_splats(unsigned long long)(i64 frozen [[REG28]]) // CHECK-NEXT: [[REG30:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG29]] to <8 x i16> // CHECK-NEXT: store <8 x i16> [[REG30]], <8 x i16>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG31:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG32:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* {{[0-9a-zA-Z_%.]+}}, align 16 -// CHECK-NEXT: [[REG33:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_avg(unsigned short vector[8], unsigned short vector[8])(<8 x i16> [[REG31]], <8 x i16> [[REG32]]) +// CHECK-NEXT: [[REG33:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_avg(unsigned short vector[8], unsigned short vector[8])(<8 x i16> frozen [[REG31]], <8 x i16> frozen [[REG32]]) // CHECK-NEXT: store <8 x i16> [[REG33]], <8 x i16>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG34:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG35:[0-9a-zA-Z_%.]+]] = bitcast <8 x i16> [[REG34]] to <2 x i64> // CHECK-NEXT: [[REG36:[0-9a-zA-Z_%.]+]] = extractelement <2 x i64> [[REG35]], i32 0 // CHECK-NEXT: ret i64 [[REG36]] -// CHECK: define available_externally i64 @_mm_avg_pu8 +// CHECK: define available_externally frozen i64 @_mm_avg_pu8 // CHECK: store i64 {{[0-9a-zA-Z_%.]+}}, i64* {{[0-9a-zA-Z_%.]+}}, align 8 // CHECK-NEXT: store i64 {{[0-9a-zA-Z_%.]+}}, i64* {{[0-9a-zA-Z_%.]+}}, align 8 // CHECK-NEXT: [[REG37:[0-9a-zA-Z_%.]+]] = load i64, i64* {{[0-9a-zA-Z_%.]+}}, align 8 -// CHECK-NEXT: [[REG38:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_splats(unsigned long long)(i64 [[REG37]]) +// CHECK-NEXT: [[REG38:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_splats(unsigned long long)(i64 frozen [[REG37]]) // CHECK-NEXT: [[REG39:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG38]] to <16 x i8> // CHECK-NEXT: store <16 x i8> [[REG39]], <16 x i8>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG40:[0-9a-zA-Z_%.]+]] = load i64, i64* {{[0-9a-zA-Z_%.]+}}, align 8 -// CHECK-NEXT: [[REG41:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_splats(unsigned long long)(i64 [[REG40]]) +// CHECK-NEXT: [[REG41:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_splats(unsigned long long)(i64 frozen [[REG40]]) // CHECK-NEXT: [[REG42:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG41]] to <16 x i8> // CHECK-NEXT: store <16 x i8> [[REG42]], <16 x i8>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG43:[0-9a-zA-Z_%.]+]] = load <16 x i8>, <16 x i8>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG44:[0-9a-zA-Z_%.]+]] = load <16 x i8>, <16 x i8>* {{[0-9a-zA-Z_%.]+}}, align 16 -// CHECK-NEXT: [[REG45:[0-9a-zA-Z_%.]+]] = call <16 x i8> @vec_avg(unsigned char vector[16], unsigned char vector[16])(<16 x i8> [[REG43]], <16 x i8> [[REG44]]) +// CHECK-NEXT: [[REG45:[0-9a-zA-Z_%.]+]] = call frozen <16 x i8> @vec_avg(unsigned char vector[16], unsigned char vector[16])(<16 x i8> frozen [[REG43]], <16 x i8> frozen [[REG44]]) // CHECK-NEXT: store <16 x i8> [[REG45]], <16 x i8>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG46:[0-9a-zA-Z_%.]+]] = load <16 x i8>, <16 x i8>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG47:[0-9a-zA-Z_%.]+]] = bitcast <16 x i8> [[REG46]] to <2 x i64> @@ -110,12 +110,12 @@ // CHECK-LABEL: @test_alt_name_avg -// CHECK: define available_externally i64 @_m_pavgw -// CHECK: [[REG49:[0-9a-zA-Z_%.]+]] = call i64 @_mm_avg_pu16 +// CHECK: define available_externally frozen i64 @_m_pavgw +// CHECK: [[REG49:[0-9a-zA-Z_%.]+]] = call frozen i64 @_mm_avg_pu16 // CHECK-NEXT: ret i64 [[REG49]] -// CHECK: define available_externally i64 @_m_pavgb -// CHECK: [[REG50:[0-9a-zA-Z_%.]+]] = call i64 @_mm_avg_pu8 +// CHECK: define available_externally frozen i64 @_m_pavgb +// CHECK: [[REG50:[0-9a-zA-Z_%.]+]] = call frozen i64 @_mm_avg_pu8 // CHECK-NEXT: ret i64 [[REG50]] void __attribute__((noinline)) @@ -148,256 +148,256 @@ // CHECK-LABEL: @test_cmp -// CHECK: define available_externally <4 x float> @_mm_cmpeq_ps -// CHECK: [[REG51:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_cmpeq(float vector[4], float vector[4]) +// CHECK: define available_externally frozen <4 x float> @_mm_cmpeq_ps +// CHECK: [[REG51:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_cmpeq(float vector[4], float vector[4]) // CHECK-NEXT: [[REG52:[0-9a-zA-Z_%.]+]] = bitcast <4 x i32> [[REG51]] to <4 x float> // CHECK-NEXT: ret <4 x float> [[REG52]] -// CHECK: define available_externally <4 x float> @_mm_cmpeq_ss -// CHECK: [[REG53:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_splat(float vector[4], unsigned int)(<4 x float> {{[0-9a-zA-Z_%.]+}}, {{i32|i32 zeroext}} 0) +// CHECK: define available_externally frozen <4 x float> @_mm_cmpeq_ss +// CHECK: [[REG53:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_splat(float vector[4], unsigned int)(<4 x float> frozen {{[0-9a-zA-Z_%.]+}}, i32 frozen {{(zeroext )?}}0) // CHECK-NEXT: store <4 x float> [[REG53]], <4 x float>* [[REG54:[0-9a-zA-Z_%.]+]], align 16 -// CHECK: [[REG55:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_splat(float vector[4], unsigned int)(<4 x float> {{[0-9a-zA-Z_%.]+}}, {{i32|i32 zeroext}} 0) +// CHECK: [[REG55:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_splat(float vector[4], unsigned int)(<4 x float> frozen {{[0-9a-zA-Z_%.]+}}, i32 frozen {{(zeroext )?}}0) // CHECK-NEXT: store <4 x float> [[REG55]], <4 x float>* [[REG56:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG57:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG54]], align 16 // CHECK-NEXT: [[REG58:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG56]], align 16 -// CHECK-NEXT: call <4 x i32> @vec_cmpeq(float vector[4], float vector[4])(<4 x float> [[REG57]], <4 x float> [[REG58]]) -// CHECK: [[REG59:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_sel(float vector[4], float vector[4], unsigned int vector[4])(<4 x float> {{[0-9a-zA-Z_%.]+}}, <4 x float> {{[0-9a-zA-Z_%.]+}}, <4 x i32> ) +// CHECK-NEXT: call frozen <4 x i32> @vec_cmpeq(float vector[4], float vector[4])(<4 x float> frozen [[REG57]], <4 x float> frozen [[REG58]]) +// CHECK: [[REG59:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_sel(float vector[4], float vector[4], unsigned int vector[4])(<4 x float> frozen {{[0-9a-zA-Z_%.]+}}, <4 x float> frozen {{[0-9a-zA-Z_%.]+}}, <4 x i32> frozen ) // CHECK-NEXT: ret <4 x float> [[REG59]] -// CHECK: define available_externally <4 x float> @_mm_cmpge_ps -// CHECK: [[REG60:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_cmpge(float vector[4], float vector[4]) +// CHECK: define available_externally frozen <4 x float> @_mm_cmpge_ps +// CHECK: [[REG60:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_cmpge(float vector[4], float vector[4]) // CHECK-NEXT: [[REG61:[0-9a-zA-Z_%.]+]] = bitcast <4 x i32> [[REG60]] to <4 x float> // CHECK-NEXT: ret <4 x float> [[REG61]] -// CHECK: define available_externally <4 x float> @_mm_cmpge_ss -// CHECK: [[REG62:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_splat(float vector[4], unsigned int)(<4 x float> {{[0-9a-zA-Z_%.]+}}, {{i32|i32 zeroext}} 0) +// CHECK: define available_externally frozen <4 x float> @_mm_cmpge_ss +// CHECK: [[REG62:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_splat(float vector[4], unsigned int)(<4 x float> frozen {{[0-9a-zA-Z_%.]+}}, i32 frozen {{(zeroext )?}}0) // CHECK-NEXT: store <4 x float> [[REG62]], <4 x float>* [[REG63:[0-9a-zA-Z_%.]+]], align 16 -// CHECK: [[REG64:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_splat(float vector[4], unsigned int)(<4 x float> {{[0-9a-zA-Z_%.]+}}, {{i32|i32 zeroext}} 0) +// CHECK: [[REG64:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_splat(float vector[4], unsigned int)(<4 x float> frozen {{[0-9a-zA-Z_%.]+}}, i32 frozen {{(zeroext )?}}0) // CHECK-NEXT: store <4 x float> [[REG64]], <4 x float>* [[REG65:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG66:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG63]], align 16 // CHECK-NEXT: [[REG67:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG65]], align 16 -// CHECK-NEXT: call <4 x i32> @vec_cmpge(float vector[4], float vector[4])(<4 x float> [[REG66]], <4 x float> [[REG67]]) -// CHECK: [[REG68:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_sel(float vector[4], float vector[4], unsigned int vector[4])(<4 x float> {{[0-9a-zA-Z_%.]+}}, <4 x float> {{[0-9a-zA-Z_%.]+}}, <4 x i32> ) +// CHECK-NEXT: call frozen <4 x i32> @vec_cmpge(float vector[4], float vector[4])(<4 x float> frozen [[REG66]], <4 x float> frozen [[REG67]]) +// CHECK: [[REG68:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_sel(float vector[4], float vector[4], unsigned int vector[4])(<4 x float> frozen {{[0-9a-zA-Z_%.]+}}, <4 x float> frozen {{[0-9a-zA-Z_%.]+}}, <4 x i32> frozen ) // CHECK-NEXT: ret <4 x float> [[REG68]] -// CHECK: define available_externally <4 x float> @_mm_cmpgt_ps -// CHECK: [[REG69:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_cmpgt(float vector[4], float vector[4]) +// CHECK: define available_externally frozen <4 x float> @_mm_cmpgt_ps +// CHECK: [[REG69:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_cmpgt(float vector[4], float vector[4]) // CHECK-NEXT: [[REG70:[0-9a-zA-Z_%.]+]] = bitcast <4 x i32> [[REG69]] to <4 x float> // CHECK-NEXT: ret <4 x float> [[REG70]] -// CHECK: define available_externally <4 x float> @_mm_cmpgt_ss -// CHECK: [[REG71:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_splat(float vector[4], unsigned int)(<4 x float> {{[0-9a-zA-Z_%.]+}}, {{i32|i32 zeroext}} 0) +// CHECK: define available_externally frozen <4 x float> @_mm_cmpgt_ss +// CHECK: [[REG71:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_splat(float vector[4], unsigned int)(<4 x float> frozen {{[0-9a-zA-Z_%.]+}}, i32 frozen {{(zeroext )?}}0) // CHECK-NEXT: store <4 x float> [[REG71]], <4 x float>* [[REG72:[0-9a-zA-Z_%.]+]], align 16 -// CHECK: [[REG73:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_splat(float vector[4], unsigned int)(<4 x float> {{[0-9a-zA-Z_%.]+}}, {{i32|i32 zeroext}} 0) +// CHECK: [[REG73:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_splat(float vector[4], unsigned int)(<4 x float> frozen {{[0-9a-zA-Z_%.]+}}, i32 frozen {{(zeroext )?}}0) // CHECK-NEXT: store <4 x float> [[REG73]], <4 x float>* [[REG74:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG75:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG72]], align 16 // CHECK-NEXT: [[REG76:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG74]], align 16 -// CHECK-NEXT: call <4 x i32> @vec_cmpgt(float vector[4], float vector[4])(<4 x float> [[REG75]], <4 x float> [[REG76]]) -// CHECK: [[REG77:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_sel(float vector[4], float vector[4], unsigned int vector[4])(<4 x float> {{[0-9a-zA-Z_%.]+}}, <4 x float> {{[0-9a-zA-Z_%.]+}}, <4 x i32> ) +// CHECK-NEXT: call frozen <4 x i32> @vec_cmpgt(float vector[4], float vector[4])(<4 x float> frozen [[REG75]], <4 x float> frozen [[REG76]]) +// CHECK: [[REG77:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_sel(float vector[4], float vector[4], unsigned int vector[4])(<4 x float> frozen {{[0-9a-zA-Z_%.]+}}, <4 x float> frozen {{[0-9a-zA-Z_%.]+}}, <4 x i32> frozen ) // CHECK-NEXT: ret <4 x float> [[REG77]] -// CHECK: define available_externally <4 x float> @_mm_cmple_ps -// CHECK: [[REG78:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_cmple(float vector[4], float vector[4]) +// CHECK: define available_externally frozen <4 x float> @_mm_cmple_ps +// CHECK: [[REG78:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_cmple(float vector[4], float vector[4]) // CHECK-NEXT: [[REG79:[0-9a-zA-Z_%.]+]] = bitcast <4 x i32> [[REG78]] to <4 x float> // CHECK-NEXT: ret <4 x float> [[REG79]] -// CHECK: define available_externally <4 x float> @_mm_cmple_ss -// CHECK: [[REG80:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_splat(float vector[4], unsigned int)(<4 x float> {{[0-9a-zA-Z_%.]+}}, {{i32|i32 zeroext}} 0) +// CHECK: define available_externally frozen <4 x float> @_mm_cmple_ss +// CHECK: [[REG80:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_splat(float vector[4], unsigned int)(<4 x float> frozen {{[0-9a-zA-Z_%.]+}}, i32 frozen {{(zeroext )?}}0) // CHECK-NEXT: store <4 x float> [[REG80]], <4 x float>* [[REG81:[0-9a-zA-Z_%.]+]], align 16 -// CHECK: [[REG82:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_splat(float vector[4], unsigned int)(<4 x float> {{[0-9a-zA-Z_%.]+}}, {{i32|i32 zeroext}} 0) +// CHECK: [[REG82:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_splat(float vector[4], unsigned int)(<4 x float> frozen {{[0-9a-zA-Z_%.]+}}, i32 frozen {{(zeroext )?}}0) // CHECK-NEXT: store <4 x float> [[REG82]], <4 x float>* [[REG83:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG84:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG81]], align 16 // CHECK-NEXT: [[REG85:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG83]], align 16 -// CHECK-NEXT: call <4 x i32> @vec_cmple(float vector[4], float vector[4])(<4 x float> [[REG84]], <4 x float> [[REG85]]) -// CHECK: [[REG86:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_sel(float vector[4], float vector[4], unsigned int vector[4])(<4 x float> {{[0-9a-zA-Z_%.]+}}, <4 x float> {{[0-9a-zA-Z_%.]+}}, <4 x i32> ) +// CHECK-NEXT: call frozen <4 x i32> @vec_cmple(float vector[4], float vector[4])(<4 x float> frozen [[REG84]], <4 x float> frozen [[REG85]]) +// CHECK: [[REG86:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_sel(float vector[4], float vector[4], unsigned int vector[4])(<4 x float> frozen {{[0-9a-zA-Z_%.]+}}, <4 x float> frozen {{[0-9a-zA-Z_%.]+}}, <4 x i32> frozen ) // CHECK-NEXT: ret <4 x float> [[REG86]] -// CHECK: define available_externally <4 x float> @_mm_cmplt_ps -// CHECK: [[REG87:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_cmplt(float vector[4], float vector[4]) +// CHECK: define available_externally frozen <4 x float> @_mm_cmplt_ps +// CHECK: [[REG87:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_cmplt(float vector[4], float vector[4]) // CHECK-NEXT: [[REG88:[0-9a-zA-Z_%.]+]] = bitcast <4 x i32> [[REG87]] to <4 x float> // CHECK-NEXT: ret <4 x float> [[REG88]] // CHECK: @_mm_cmplt_ss -// CHECK: [[REG89:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_splat(float vector[4], unsigned int)(<4 x float> {{[0-9a-zA-Z_%.]+}}, i32 zeroext 0) +// CHECK: [[REG89:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_splat(float vector[4], unsigned int)(<4 x float> frozen {{[0-9a-zA-Z_%.]+}}, i32 frozen zeroext 0) // CHECK-NEXT: store <4 x float> [[REG89]], <4 x float>* [[REG90:[0-9a-zA-Z_%.]+]], align 16 -// CHECK: [[REG91:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_splat(float vector[4], unsigned int)(<4 x float> {{[0-9a-zA-Z_%.]+}}, i32 zeroext 0) +// CHECK: [[REG91:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_splat(float vector[4], unsigned int)(<4 x float> frozen {{[0-9a-zA-Z_%.]+}}, i32 frozen zeroext 0) // CHECK-NEXT: store <4 x float> [[REG91]], <4 x float>* [[REG92:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG93:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG90]], align 16 // CHECK-NEXT: [[REG94:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG92]], align 16 -// CHECK-NEXT: call <4 x i32> @vec_cmplt(float vector[4], float vector[4])(<4 x float> [[REG93]], <4 x float> [[REG94]]) -// CHECK: [[REG95:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_sel(float vector[4], float vector[4], unsigned int vector[4])(<4 x float> {{[0-9a-zA-Z_%.]+}}, <4 x float> {{[0-9a-zA-Z_%.]+}}, <4 x i32> ) +// CHECK-NEXT: call frozen <4 x i32> @vec_cmplt(float vector[4], float vector[4])(<4 x float> frozen [[REG93]], <4 x float> frozen [[REG94]]) +// CHECK: [[REG95:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_sel(float vector[4], float vector[4], unsigned int vector[4])(<4 x float> frozen {{[0-9a-zA-Z_%.]+}}, <4 x float> frozen {{[0-9a-zA-Z_%.]+}}, <4 x i32> frozen ) // CHECK-NEXT: ret <4 x float> [[REG95]] -// CHECK: define available_externally <4 x float> @_mm_cmpneq_ps -// CHECK: [[REG96:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_cmpeq(float vector[4], float vector[4]) +// CHECK: define available_externally frozen <4 x float> @_mm_cmpneq_ps +// CHECK: [[REG96:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_cmpeq(float vector[4], float vector[4]) // CHECK-NEXT: [[REG97:[0-9a-zA-Z_%.]+]] = bitcast <4 x i32> [[REG96]] to <4 x float> // CHECK-NEXT: store <4 x float> [[REG97]], <4 x float>* [[REG98:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG99:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG98]], align 16 // CHECK-NEXT: [[REG100:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG98]], align 16 -// CHECK-NEXT: [[REG101:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_nor(float vector[4], float vector[4])(<4 x float> [[REG99]], <4 x float> [[REG100]]) +// CHECK-NEXT: [[REG101:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_nor(float vector[4], float vector[4])(<4 x float> frozen [[REG99]], <4 x float> frozen [[REG100]]) // CHECK-NEXT: ret <4 x float> [[REG101]] -// CHECK: define available_externally <4 x float> @_mm_cmpneq_ss -// CHECK: [[REG102:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_splat(float vector[4], unsigned int)(<4 x float> {{[0-9a-zA-Z_%.]+}}, {{i32|i32 zeroext}} 0) +// CHECK: define available_externally frozen <4 x float> @_mm_cmpneq_ss +// CHECK: [[REG102:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_splat(float vector[4], unsigned int)(<4 x float> frozen {{[0-9a-zA-Z_%.]+}}, i32 frozen {{(zeroext )?}}0) // CHECK-NEXT: store <4 x float> [[REG102]], <4 x float>* [[REG103:[0-9a-zA-Z_%.]+]], align 16 -// CHECK: [[REG104:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_splat(float vector[4], unsigned int)(<4 x float> {{[0-9a-zA-Z_%.]+}}, {{i32|i32 zeroext}} 0) +// CHECK: [[REG104:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_splat(float vector[4], unsigned int)(<4 x float> frozen {{[0-9a-zA-Z_%.]+}}, i32 frozen {{(zeroext )?}}0) // CHECK-NEXT: store <4 x float> [[REG104]], <4 x float>* [[REG105:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG106:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG103]], align 16 // CHECK-NEXT: [[REG107:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG105]], align 16 -// CHECK-NEXT: call <4 x i32> @vec_cmpeq(float vector[4], float vector[4])(<4 x float> [[REG106]], <4 x float> [[REG107]]) -// CHECK: call <4 x float> @vec_nor(float vector[4], float vector[4]) -// CHECK: [[REG108:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_sel(float vector[4], float vector[4], unsigned int vector[4])(<4 x float> {{[0-9a-zA-Z_%.]+}}, <4 x float> {{[0-9a-zA-Z_%.]+}}, <4 x i32> ) +// CHECK-NEXT: call frozen <4 x i32> @vec_cmpeq(float vector[4], float vector[4])(<4 x float> frozen [[REG106]], <4 x float> frozen [[REG107]]) +// CHECK: call frozen <4 x float> @vec_nor(float vector[4], float vector[4]) +// CHECK: [[REG108:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_sel(float vector[4], float vector[4], unsigned int vector[4])(<4 x float> frozen {{[0-9a-zA-Z_%.]+}}, <4 x float> frozen {{[0-9a-zA-Z_%.]+}}, <4 x i32> frozen ) // CHECK-NEXT: ret <4 x float> [[REG108]] -// CHECK: define available_externally <4 x float> @_mm_cmpnge_ps -// CHECK: [[REG109:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_cmplt(float vector[4], float vector[4]) +// CHECK: define available_externally frozen <4 x float> @_mm_cmpnge_ps +// CHECK: [[REG109:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_cmplt(float vector[4], float vector[4]) // CHECK-NEXT: [[REG110:[0-9a-zA-Z_%.]+]] = bitcast <4 x i32> [[REG109]] to <4 x float> // CHECK-NEXT: ret <4 x float> [[REG110]] -// CHECK: define available_externally <4 x float> @_mm_cmpnge_ss -// CHECK: [[REG111:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_splat(float vector[4], unsigned int)(<4 x float> {{[0-9a-zA-Z_%.]+}}, {{i32|i32 zeroext}} 0) +// CHECK: define available_externally frozen <4 x float> @_mm_cmpnge_ss +// CHECK: [[REG111:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_splat(float vector[4], unsigned int)(<4 x float> frozen {{[0-9a-zA-Z_%.]+}}, i32 frozen {{(zeroext )?}}0) // CHECK-NEXT: store <4 x float> [[REG111]], <4 x float>* [[REG112:[0-9a-zA-Z_%.]+]], align 16 -// CHECK: [[REG113:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_splat(float vector[4], unsigned int)(<4 x float> {{[0-9a-zA-Z_%.]+}}, {{i32|i32 zeroext}} 0) +// CHECK: [[REG113:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_splat(float vector[4], unsigned int)(<4 x float> frozen {{[0-9a-zA-Z_%.]+}}, i32 frozen {{(zeroext )?}}0) // CHECK-NEXT: store <4 x float> [[REG113]], <4 x float>* [[REG114:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG115:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG112]], align 16 // CHECK-NEXT: [[REG116:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG114]], align 16 -// CHECK-NEXT: call <4 x i32> @vec_cmplt(float vector[4], float vector[4])(<4 x float> [[REG115]], <4 x float> [[REG116]]) -// CHECK: [[REG117:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_sel(float vector[4], float vector[4], unsigned int vector[4])(<4 x float> {{[0-9a-zA-Z_%.]+}}, <4 x float> {{[0-9a-zA-Z_%.]+}}, <4 x i32> ) +// CHECK-NEXT: call frozen <4 x i32> @vec_cmplt(float vector[4], float vector[4])(<4 x float> frozen [[REG115]], <4 x float> frozen [[REG116]]) +// CHECK: [[REG117:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_sel(float vector[4], float vector[4], unsigned int vector[4])(<4 x float> frozen {{[0-9a-zA-Z_%.]+}}, <4 x float> frozen {{[0-9a-zA-Z_%.]+}}, <4 x i32> frozen ) // CHECK-NEXT: ret <4 x float> [[REG117]] -// CHECK: define available_externally <4 x float> @_mm_cmpngt_ps -// CHECK: [[REG118:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_cmple(float vector[4], float vector[4]) +// CHECK: define available_externally frozen <4 x float> @_mm_cmpngt_ps +// CHECK: [[REG118:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_cmple(float vector[4], float vector[4]) // CHECK-NEXT: [[REG119:[0-9a-zA-Z_%.]+]] = bitcast <4 x i32> [[REG118]] to <4 x float> // CHECK-NEXT: ret <4 x float> [[REG119]] -// CHECK: define available_externally <4 x float> @_mm_cmpngt_ss -// CHECK: [[REG120:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_splat(float vector[4], unsigned int)(<4 x float> {{[0-9a-zA-Z_%.]+}}, {{i32|i32 zeroext}} 0) +// CHECK: define available_externally frozen <4 x float> @_mm_cmpngt_ss +// CHECK: [[REG120:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_splat(float vector[4], unsigned int)(<4 x float> frozen {{[0-9a-zA-Z_%.]+}}, i32 frozen {{(zeroext )?}}0) // CHECK-NEXT: store <4 x float> [[REG120]], <4 x float>* [[REG121:[0-9a-zA-Z_%.]+]], align 16 -// CHECK: [[REG122:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_splat(float vector[4], unsigned int)(<4 x float> {{[0-9a-zA-Z_%.]+}}, {{i32|i32 zeroext}} 0) +// CHECK: [[REG122:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_splat(float vector[4], unsigned int)(<4 x float> frozen {{[0-9a-zA-Z_%.]+}}, i32 frozen {{(zeroext )?}}0) // CHECK-NEXT: store <4 x float> [[REG122]], <4 x float>* [[REG123:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG124:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG121]], align 16 // CHECK-NEXT: [[REG125:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG123]], align 16 -// CHECK-NEXT: call <4 x i32> @vec_cmple(float vector[4], float vector[4])(<4 x float> [[REG124]], <4 x float> [[REG125]]) -// CHECK: [[REG126:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_sel(float vector[4], float vector[4], unsigned int vector[4])(<4 x float> {{[0-9a-zA-Z_%.]+}}, <4 x float> {{[0-9a-zA-Z_%.]+}}, <4 x i32> ) +// CHECK-NEXT: call frozen <4 x i32> @vec_cmple(float vector[4], float vector[4])(<4 x float> frozen [[REG124]], <4 x float> frozen [[REG125]]) +// CHECK: [[REG126:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_sel(float vector[4], float vector[4], unsigned int vector[4])(<4 x float> frozen {{[0-9a-zA-Z_%.]+}}, <4 x float> frozen {{[0-9a-zA-Z_%.]+}}, <4 x i32> frozen ) // CHECK-NEXT: ret <4 x float> [[REG126]] -// CHECK: define available_externally <4 x float> @_mm_cmpnle_ps -// CHECK: [[REG127:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_cmpgt(float vector[4], float vector[4]) +// CHECK: define available_externally frozen <4 x float> @_mm_cmpnle_ps +// CHECK: [[REG127:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_cmpgt(float vector[4], float vector[4]) // CHECK-NEXT: [[REG128:[0-9a-zA-Z_%.]+]] = bitcast <4 x i32> [[REG127]] to <4 x float> // CHECK-NEXT: ret <4 x float> [[REG128]] -// CHECK: define available_externally <4 x float> @_mm_cmpnle_ss -// CHECK: [[REG129:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_splat(float vector[4], unsigned int)(<4 x float> {{[0-9a-zA-Z_%.]+}}, {{i32|i32 zeroext}} 0) +// CHECK: define available_externally frozen <4 x float> @_mm_cmpnle_ss +// CHECK: [[REG129:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_splat(float vector[4], unsigned int)(<4 x float> frozen {{[0-9a-zA-Z_%.]+}}, i32 frozen {{(zeroext )?}}0) // CHECK-NEXT: store <4 x float> [[REG129]], <4 x float>* [[REG130:[0-9a-zA-Z_%.]+]], align 16 -// CHECK: [[REG131:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_splat(float vector[4], unsigned int)(<4 x float> {{[0-9a-zA-Z_%.]+}}, {{i32|i32 zeroext}} 0) +// CHECK: [[REG131:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_splat(float vector[4], unsigned int)(<4 x float> frozen {{[0-9a-zA-Z_%.]+}}, i32 frozen {{(zeroext )?}}0) // CHECK-NEXT: store <4 x float> [[REG131]], <4 x float>* [[REG132:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG133:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG130]], align 16 // CHECK-NEXT: [[REG134:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG132]], align 16 -// CHECK-NEXT: call <4 x i32> @vec_cmpgt(float vector[4], float vector[4])(<4 x float> [[REG133]], <4 x float> [[REG134]]) -// CHECK: [[REG135:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_sel(float vector[4], float vector[4], unsigned int vector[4])(<4 x float> {{[0-9a-zA-Z_%.]+}}, <4 x float> {{[0-9a-zA-Z_%.]+}}, <4 x i32> ) +// CHECK-NEXT: call frozen <4 x i32> @vec_cmpgt(float vector[4], float vector[4])(<4 x float> frozen [[REG133]], <4 x float> frozen [[REG134]]) +// CHECK: [[REG135:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_sel(float vector[4], float vector[4], unsigned int vector[4])(<4 x float> frozen {{[0-9a-zA-Z_%.]+}}, <4 x float> frozen {{[0-9a-zA-Z_%.]+}}, <4 x i32> frozen ) // CHECK-NEXT: ret <4 x float> [[REG135]] -// CHECK: define available_externally <4 x float> @_mm_cmpnlt_ps -// CHECK: [[REG136:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_cmpge(float vector[4], float vector[4]) +// CHECK: define available_externally frozen <4 x float> @_mm_cmpnlt_ps +// CHECK: [[REG136:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_cmpge(float vector[4], float vector[4]) // CHECK-NEXT: [[REG137:[0-9a-zA-Z_%.]+]] = bitcast <4 x i32> [[REG136]] to <4 x float> // CHECK-NEXT: ret <4 x float> [[REG137]] -// CHECK: define available_externally <4 x float> @_mm_cmpnlt_ss -// CHECK: [[REG138:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_splat(float vector[4], unsigned int)(<4 x float> {{[0-9a-zA-Z_%.]+}}, {{i32|i32 zeroext}} 0) +// CHECK: define available_externally frozen <4 x float> @_mm_cmpnlt_ss +// CHECK: [[REG138:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_splat(float vector[4], unsigned int)(<4 x float> frozen {{[0-9a-zA-Z_%.]+}}, i32 frozen {{(zeroext )?}}0) // CHECK-NEXT: store <4 x float> [[REG138]], <4 x float>* [[REG139:[0-9a-zA-Z_%.]+]], align 16 -// CHECK: [[REG140:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_splat(float vector[4], unsigned int)(<4 x float> {{[0-9a-zA-Z_%.]+}}, {{i32|i32 zeroext}} 0) +// CHECK: [[REG140:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_splat(float vector[4], unsigned int)(<4 x float> frozen {{[0-9a-zA-Z_%.]+}}, i32 frozen {{(zeroext )?}}0) // CHECK-NEXT: store <4 x float> [[REG140]], <4 x float>* [[REG141:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG142:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG139]], align 16 // CHECK-NEXT: [[REG143:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG141]], align 16 -// CHECK-NEXT: call <4 x i32> @vec_cmpge(float vector[4], float vector[4])(<4 x float> [[REG142]], <4 x float> [[REG143]]) -// CHECK: [[REG144:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_sel(float vector[4], float vector[4], unsigned int vector[4])(<4 x float> {{[0-9a-zA-Z_%.]+}}, <4 x float> {{[0-9a-zA-Z_%.]+}}, <4 x i32> ) +// CHECK-NEXT: call frozen <4 x i32> @vec_cmpge(float vector[4], float vector[4])(<4 x float> frozen [[REG142]], <4 x float> frozen [[REG143]]) +// CHECK: [[REG144:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_sel(float vector[4], float vector[4], unsigned int vector[4])(<4 x float> frozen {{[0-9a-zA-Z_%.]+}}, <4 x float> frozen {{[0-9a-zA-Z_%.]+}}, <4 x i32> frozen ) // CHECK-NEXT: ret <4 x float> [[REG144]] -// CHECK: define available_externally <4 x float> @_mm_cmpord_ps -// CHECK: [[REG145:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_abs(float vector[4])(<4 x float> {{[0-9a-zA-Z_%.]+}}) +// CHECK: define available_externally frozen <4 x float> @_mm_cmpord_ps +// CHECK: [[REG145:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_abs(float vector[4])(<4 x float> frozen {{[0-9a-zA-Z_%.]+}}) // CHECK-NEXT: [[REG146:[0-9a-zA-Z_%.]+]] = bitcast <4 x float> [[REG145]] to <4 x i32> // CHECK-NEXT: store <4 x i32> [[REG146]], <4 x i32>* [[REG147:[0-9a-zA-Z_%.]+]], align 16 -// CHECK: [[REG148:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_abs(float vector[4])(<4 x float> {{[0-9a-zA-Z_%.]+}}) +// CHECK: [[REG148:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_abs(float vector[4])(<4 x float> frozen {{[0-9a-zA-Z_%.]+}}) // CHECK-NEXT: [[REG149:[0-9a-zA-Z_%.]+]] = bitcast <4 x float> [[REG148]] to <4 x i32> // CHECK-NEXT: store <4 x i32> [[REG149]], <4 x i32>* [[REG150:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG151:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG147]], align 16 -// CHECK-NEXT: [[REG152:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_cmpgt(unsigned int vector[4], unsigned int vector[4])(<4 x i32> , <4 x i32> [[REG151]]) +// CHECK-NEXT: [[REG152:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_cmpgt(unsigned int vector[4], unsigned int vector[4])(<4 x i32> frozen , <4 x i32> frozen [[REG151]]) // CHECK-NEXT: store <4 x i32> [[REG152]], <4 x i32>* [[REG153:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG154:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG150]], align 16 -// CHECK-NEXT: [[REG155:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_cmpgt(unsigned int vector[4], unsigned int vector[4])(<4 x i32> , <4 x i32> [[REG154]]) +// CHECK-NEXT: [[REG155:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_cmpgt(unsigned int vector[4], unsigned int vector[4])(<4 x i32> frozen , <4 x i32> frozen [[REG154]]) // CHECK-NEXT: store <4 x i32> [[REG155]], <4 x i32>* [[REG156:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG157:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG153]], align 16 // CHECK-NEXT: [[REG158:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG156]], align 16 -// CHECK-NEXT: [[REG159:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_and(unsigned int vector[4], unsigned int vector[4])(<4 x i32> {{[0-9a-zA-Z_%.]+}}, <4 x i32> {{[0-9a-zA-Z_%.]+}}) +// CHECK-NEXT: [[REG159:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_and(unsigned int vector[4], unsigned int vector[4])(<4 x i32> frozen {{[0-9a-zA-Z_%.]+}}, <4 x i32> frozen {{[0-9a-zA-Z_%.]+}}) // CHECK-NEXT: [[REG160:[0-9a-zA-Z_%.]+]] = bitcast <4 x i32> [[REG159]] to <4 x float> // CHECK-NEXT: ret <4 x float> [[REG160]] -// CHECK: define available_externally <4 x float> @_mm_cmpord_ss -// CHECK: [[REG161:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_abs(float vector[4]) +// CHECK: define available_externally frozen <4 x float> @_mm_cmpord_ss +// CHECK: [[REG161:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_abs(float vector[4]) // CHECK-NEXT: [[REG162:[0-9a-zA-Z_%.]+]] = bitcast <4 x float> [[REG161]] to <4 x i32> // CHECK-NEXT: store <4 x i32> [[REG162]], <4 x i32>* [[REG163:[0-9a-zA-Z_%.]+]], align 16 -// CHECK: [[REG164:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_abs(float vector[4]) +// CHECK: [[REG164:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_abs(float vector[4]) // CHECK-NEXT: [[REG165:[0-9a-zA-Z_%.]+]] = bitcast <4 x float> [[REG164]] to <4 x i32> // CHECK-NEXT: store <4 x i32> [[REG165]], <4 x i32>* [[REG166:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG167:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG163]], align 16 -// CHECK-NEXT: [[REG168:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_cmpgt(unsigned int vector[4], unsigned int vector[4])(<4 x i32> , <4 x i32> [[REG167]]) +// CHECK-NEXT: [[REG168:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_cmpgt(unsigned int vector[4], unsigned int vector[4])(<4 x i32> frozen , <4 x i32> frozen [[REG167]]) // CHECK-NEXT: store <4 x i32> [[REG168]], <4 x i32>* [[REG161:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG169:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG166]], align 16 -// CHECK-NEXT: [[REG170:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_cmpgt(unsigned int vector[4], unsigned int vector[4])(<4 x i32> , <4 x i32> [[REG169]]) +// CHECK-NEXT: [[REG170:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_cmpgt(unsigned int vector[4], unsigned int vector[4])(<4 x i32> frozen , <4 x i32> frozen [[REG169]]) // CHECK-NEXT: store <4 x i32> [[REG170]], <4 x i32>* [[REG171:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG172:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG161]], align 16 // CHECK-NEXT: [[REG173:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG171]], align 16 -// CHECK-NEXT: [[REG174:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_and(unsigned int vector[4], unsigned int vector[4])(<4 x i32> [[REG172]], <4 x i32> [[REG173]]) +// CHECK-NEXT: [[REG174:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_and(unsigned int vector[4], unsigned int vector[4])(<4 x i32> frozen [[REG172]], <4 x i32> frozen [[REG173]]) // CHECK-NEXT: store <4 x i32> [[REG174]], <4 x i32>* [[REG161]], align 16 // CHECK: [[REG175:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG161]], align 16 // CHECK-NEXT: [[REG176:[0-9a-zA-Z_%.]+]] = bitcast <4 x i32> [[REG175]] to <4 x float> -// CHECK-NEXT: [[REG177:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_sel(float vector[4], float vector[4], unsigned int vector[4])(<4 x float> {{[0-9a-zA-Z_%.]+}}, <4 x float> [[REG176]], <4 x i32> ) +// CHECK-NEXT: [[REG177:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_sel(float vector[4], float vector[4], unsigned int vector[4])(<4 x float> frozen {{[0-9a-zA-Z_%.]+}}, <4 x float> frozen [[REG176]], <4 x i32> frozen ) // CHECK-NEXT: ret <4 x float> [[REG177]] -// CHECK: define available_externally <4 x float> @_mm_cmpunord_ps +// CHECK: define available_externally frozen <4 x float> @_mm_cmpunord_ps // CHECK: [[REG178:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 -// CHECK-NEXT: [[REG179:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_abs(float vector[4])(<4 x float> [[REG178]]) +// CHECK-NEXT: [[REG179:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_abs(float vector[4])(<4 x float> frozen [[REG178]]) // CHECK-NEXT: [[REG180:[0-9a-zA-Z_%.]+]] = bitcast <4 x float> [[REG179]] to <4 x i32> // CHECK-NEXT: store <4 x i32> [[REG180]], <4 x i32>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG181:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 -// CHECK-NEXT: [[REG182:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_abs(float vector[4])(<4 x float> [[REG181]]) +// CHECK-NEXT: [[REG182:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_abs(float vector[4])(<4 x float> frozen [[REG181]]) // CHECK-NEXT: [[REG183:[0-9a-zA-Z_%.]+]] = bitcast <4 x float> [[REG182]] to <4 x i32> // CHECK-NEXT: store <4 x i32> [[REG183]], <4 x i32>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG184:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* {{[0-9a-zA-Z_%.]+}}, align 16 -// CHECK-NEXT: [[REG185:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_cmpgt(unsigned int vector[4], unsigned int vector[4])(<4 x i32> [[REG184]], <4 x i32> ) +// CHECK-NEXT: [[REG185:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_cmpgt(unsigned int vector[4], unsigned int vector[4])(<4 x i32> frozen [[REG184]], <4 x i32> frozen ) // CHECK-NEXT: store <4 x i32> [[REG185]], <4 x i32>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG186:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* {{[0-9a-zA-Z_%.]+}}, align 16 -// CHECK-NEXT: [[REG187:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_cmpgt(unsigned int vector[4], unsigned int vector[4])(<4 x i32> [[REG186]], <4 x i32> ) +// CHECK-NEXT: [[REG187:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_cmpgt(unsigned int vector[4], unsigned int vector[4])(<4 x i32> frozen [[REG186]], <4 x i32> frozen ) // CHECK-NEXT: store <4 x i32> [[REG187]], <4 x i32>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG188:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG189:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* {{[0-9a-zA-Z_%.]+}}, align 16 -// CHECK-NEXT: [[REG190:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_or(unsigned int vector[4], unsigned int vector[4])(<4 x i32> [[REG188]], <4 x i32> [[REG189]]) +// CHECK-NEXT: [[REG190:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_or(unsigned int vector[4], unsigned int vector[4])(<4 x i32> frozen [[REG188]], <4 x i32> frozen [[REG189]]) // CHECK-NEXT: [[REG191:[0-9a-zA-Z_%.]+]] = bitcast <4 x i32> [[REG190]] to <4 x float> // CHECK-NEXT: ret <4 x float> [[REG191]] -// CHECK: define available_externally <4 x float> @_mm_cmpunord_ss +// CHECK: define available_externally frozen <4 x float> @_mm_cmpunord_ss // CHECK: [[REG192:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 -// CHECK-NEXT: [[REG193:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_abs(float vector[4])(<4 x float> [[REG192]]) +// CHECK-NEXT: [[REG193:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_abs(float vector[4])(<4 x float> frozen [[REG192]]) // CHECK-NEXT: [[REG194:[0-9a-zA-Z_%.]+]] = bitcast <4 x float> [[REG193]] to <4 x i32> // CHECK-NEXT: store <4 x i32> [[REG194]], <4 x i32>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG195:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 -// CHECK-NEXT: [[REG196:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_abs(float vector[4])(<4 x float> [[REG195]]) +// CHECK-NEXT: [[REG196:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_abs(float vector[4])(<4 x float> frozen [[REG195]]) // CHECK-NEXT: [[REG197:[0-9a-zA-Z_%.]+]] = bitcast <4 x float> [[REG196]] to <4 x i32> // CHECK-NEXT: store <4 x i32> [[REG197]], <4 x i32>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG198:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* {{[0-9a-zA-Z_%.]+}}, align 16 -// CHECK-NEXT: [[REG199:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_cmpgt(unsigned int vector[4], unsigned int vector[4])(<4 x i32> [[REG198]], <4 x i32> ) +// CHECK-NEXT: [[REG199:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_cmpgt(unsigned int vector[4], unsigned int vector[4])(<4 x i32> frozen [[REG198]], <4 x i32> frozen ) // CHECK-NEXT: store <4 x i32> [[REG199]], <4 x i32>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG200:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* {{[0-9a-zA-Z_%.]+}}, align 16 -// CHECK-NEXT: [[REG201:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_cmpgt(unsigned int vector[4], unsigned int vector[4])(<4 x i32> [[REG200]], <4 x i32> ) +// CHECK-NEXT: [[REG201:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_cmpgt(unsigned int vector[4], unsigned int vector[4])(<4 x i32> frozen [[REG200]], <4 x i32> frozen ) // CHECK-NEXT: store <4 x i32> [[REG201]], <4 x i32>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG202:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG203:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* {{[0-9a-zA-Z_%.]+}}, align 16 -// CHECK-NEXT: [[REG204:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_or(unsigned int vector[4], unsigned int vector[4])(<4 x i32> [[REG202]], <4 x i32> [[REG203]]) +// CHECK-NEXT: [[REG204:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_or(unsigned int vector[4], unsigned int vector[4])(<4 x i32> frozen [[REG202]], <4 x i32> frozen [[REG203]]) // CHECK-NEXT: store <4 x i32> [[REG204]], <4 x i32>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG205:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG206:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG207:[0-9a-zA-Z_%.]+]] = bitcast <4 x i32> [[REG206]] to <4 x float> -// CHECK-NEXT: [[REG208:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_sel(float vector[4], float vector[4], unsigned int vector[4])(<4 x float> [[REG205]], <4 x float> [[REG207]], <4 x i32> ) +// CHECK-NEXT: [[REG208:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_sel(float vector[4], float vector[4], unsigned int vector[4])(<4 x float> frozen [[REG205]], <4 x float> frozen [[REG207]], <4 x i32> frozen ) // CHECK-NEXT: ret <4 x float> [[REG208]] void __attribute__((noinline)) @@ -412,7 +412,7 @@ // CHECK-LABEL: @test_comi -// CHECK: define available_externally signext i32 @_mm_comieq_ss +// CHECK: define available_externally frozen signext i32 @_mm_comieq_ss // CHECK: store <4 x float> {{[0-9a-zA-Z_%.]+}}, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: store <4 x float> {{[0-9a-zA-Z_%.]+}}, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG209:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 @@ -423,7 +423,7 @@ // CHECK-NEXT: [[REG214:[0-9a-zA-Z_%.]+]] = zext i1 [[REG213]] to i32 // CHECK-NEXT: ret i32 [[REG214]] -// CHECK: define available_externally signext i32 @_mm_comige_ss +// CHECK: define available_externally frozen signext i32 @_mm_comige_ss // CHECK: store <4 x float> {{[0-9a-zA-Z_%.]+}}, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: store <4 x float> {{[0-9a-zA-Z_%.]+}}, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG215:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 @@ -434,7 +434,7 @@ // CHECK-NEXT: [[REG220:[0-9a-zA-Z_%.]+]] = zext i1 [[REG219]] to i32 // CHECK-NEXT: ret i32 [[REG220]] -// CHECK: define available_externally signext i32 @_mm_comigt_ss +// CHECK: define available_externally frozen signext i32 @_mm_comigt_ss // CHECK: store <4 x float> {{[0-9a-zA-Z_%.]+}}, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: store <4 x float> {{[0-9a-zA-Z_%.]+}}, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG221:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 @@ -445,7 +445,7 @@ // CHECK-NEXT: [[REG226:[0-9a-zA-Z_%.]+]] = zext i1 [[REG225]] to i32 // CHECK-NEXT: ret i32 [[REG226]] -// CHECK: define available_externally signext i32 @_mm_comile_ss +// CHECK: define available_externally frozen signext i32 @_mm_comile_ss // CHECK: store <4 x float> {{[0-9a-zA-Z_%.]+}}, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: store <4 x float> {{[0-9a-zA-Z_%.]+}}, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG227:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 @@ -456,7 +456,7 @@ // CHECK-NEXT: [[REG232:[0-9a-zA-Z_%.]+]] = zext i1 [[REG231]] to i32 // CHECK-NEXT: ret i32 [[REG232]] -// CHECK: define available_externally signext i32 @_mm_comilt_ss +// CHECK: define available_externally frozen signext i32 @_mm_comilt_ss // CHECK: store <4 x float> {{[0-9a-zA-Z_%.]+}}, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: store <4 x float> {{[0-9a-zA-Z_%.]+}}, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG233:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 @@ -467,7 +467,7 @@ // CHECK-NEXT: [[REG238:[0-9a-zA-Z_%.]+]] = zext i1 [[REG237]] to i32 // CHECK-NEXT: ret i32 [[REG238]] -// CHECK: define available_externally signext i32 @_mm_comineq_ss +// CHECK: define available_externally frozen signext i32 @_mm_comineq_ss // CHECK: store <4 x float> {{[0-9a-zA-Z_%.]+}}, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: store <4 x float> {{[0-9a-zA-Z_%.]+}}, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG239:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 @@ -507,35 +507,35 @@ // CHECK-LABEL: @test_convert -// CHECK: define available_externally <4 x float> @_mm_cvt_pi2ps +// CHECK: define available_externally frozen <4 x float> @_mm_cvt_pi2ps // CHECK: store <4 x float> {{[0-9a-zA-Z_%.]+}}, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: store i64 {{[0-9a-zA-Z_%.]+}}, i64* {{[0-9a-zA-Z_%.]+}}, align 8 // CHECK-NEXT: [[REG245:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG246:[0-9a-zA-Z_%.]+]] = load i64, i64* {{[0-9a-zA-Z_%.]+}}, align 8 -// CHECK-NEXT: [[REG247:[0-9a-zA-Z_%.]+]] = call <4 x float> @_mm_cvtpi32_ps(<4 x float> [[REG245]], i64 [[REG246]]) +// CHECK-NEXT: [[REG247:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @_mm_cvtpi32_ps(<4 x float> frozen [[REG245]], i64 frozen [[REG246]]) // CHECK-NEXT: ret <4 x float> [[REG247]] -// CHECK: define available_externally i64 @_mm_cvt_ps2pi +// CHECK: define available_externally frozen i64 @_mm_cvt_ps2pi // CHECK: store <4 x float> {{[0-9a-zA-Z_%.]+}}, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG248:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 -// CHECK-NEXT: [[REG249:[0-9a-zA-Z_%.]+]] = call i64 @_mm_cvtps_pi32(<4 x float> [[REG248]]) +// CHECK-NEXT: [[REG249:[0-9a-zA-Z_%.]+]] = call frozen i64 @_mm_cvtps_pi32(<4 x float> frozen [[REG248]]) // CHECK-NEXT: ret i64 [[REG249]] -// CHECK: define available_externally <4 x float> @_mm_cvt_si2ss +// CHECK: define available_externally frozen <4 x float> @_mm_cvt_si2ss // CHECK: store <4 x float> {{[0-9a-zA-Z_%.]+}}, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: store i32 {{[0-9a-zA-Z_%.]+}}, i32* {{[0-9a-zA-Z_%.]+}}, align 4 // CHECK-NEXT: [[REG250:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG251:[0-9a-zA-Z_%.]+]] = load i32, i32* {{[0-9a-zA-Z_%.]+}}, align 4 -// CHECK-NEXT: [[REG252:[0-9a-zA-Z_%.]+]] = call <4 x float> @_mm_cvtsi32_ss(<4 x float> [[REG250]], i32 signext [[REG251]]) +// CHECK-NEXT: [[REG252:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @_mm_cvtsi32_ss(<4 x float> frozen [[REG250]], i32 frozen signext [[REG251]]) // CHECK-NEXT: ret <4 x float> [[REG252]] -// CHECK: define available_externally signext i32 @_mm_cvt_ss2si +// CHECK: define available_externally frozen signext i32 @_mm_cvt_ss2si // CHECK: store <4 x float> {{[0-9a-zA-Z_%.]+}}, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG253:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 -// CHECK-NEXT: [[REG254:[0-9a-zA-Z_%.]+]] = call signext i32 @_mm_cvtss_si32(<4 x float> [[REG253]]) +// CHECK-NEXT: [[REG254:[0-9a-zA-Z_%.]+]] = call frozen signext i32 @_mm_cvtss_si32(<4 x float> frozen [[REG253]]) // CHECK-NEXT: ret i32 [[REG254]] -// CHECK: define available_externally <4 x float> @_mm_cvtpi16_ps +// CHECK: define available_externally frozen <4 x float> @_mm_cvtpi16_ps // CHECK: store i64 {{[0-9a-zA-Z_%.]+}}, i64* {{[0-9a-zA-Z_%.]+}}, align 8 // CHECK-NEXT: [[REG255:[0-9a-zA-Z_%.]+]] = load i64, i64* {{[0-9a-zA-Z_%.]+}}, align 8 // CHECK-NEXT: [[REG256:[0-9a-zA-Z_%.]+]] = insertelement <2 x i64> undef, i64 [[REG255]], i32 0 @@ -546,7 +546,7 @@ // CHECK-NEXT: [[REG260:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG259]] to <8 x i16> // CHECK-NEXT: store <8 x i16> [[REG260]], <8 x i16>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG261:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* {{[0-9a-zA-Z_%.]+}}, align 16 -// CHECK-NEXT: [[REG262:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_vupklsh(short vector[8])(<8 x i16> [[REG261]]) +// CHECK-NEXT: [[REG262:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_vupklsh(short vector[8])(<8 x i16> frozen [[REG261]]) // CHECK-NEXT: store <4 x i32> [[REG262]], <4 x i32>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG263:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG264:[0-9a-zA-Z_%.]+]] = call <4 x float> @llvm.ppc.altivec.vcfsx(<4 x i32> [[REG263]], i32 0) @@ -554,7 +554,7 @@ // CHECK-NEXT: [[REG265:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: ret <4 x float> [[REG265]] -// CHECK: define available_externally <4 x float> @_mm_cvtpi32_ps +// CHECK: define available_externally frozen <4 x float> @_mm_cvtpi32_ps // CHECK: store <4 x float> {{[0-9a-zA-Z_%.]+}}, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: store i64 {{[0-9a-zA-Z_%.]+}}, i64* {{[0-9a-zA-Z_%.]+}}, align 8 // CHECK-NEXT: [[REG266:[0-9a-zA-Z_%.]+]] = load i64, i64* {{[0-9a-zA-Z_%.]+}}, align 8 @@ -581,7 +581,7 @@ // CHECK-NEXT: [[REG283:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG282]] to <4 x float> // CHECK-NEXT: ret <4 x float> [[REG283]] -// CHECK: define available_externally <4 x float> @_mm_cvtpi32x2_ps +// CHECK: define available_externally frozen <4 x float> @_mm_cvtpi32x2_ps // CHECK: store i64 {{[0-9a-zA-Z_%.]+}}, i64* {{[0-9a-zA-Z_%.]+}}, align 8 // CHECK-NEXT: store i64 {{[0-9a-zA-Z_%.]+}}, i64* {{[0-9a-zA-Z_%.]+}}, align 8 // CHECK-NEXT: [[REG284:[0-9a-zA-Z_%.]+]] = load i64, i64* {{[0-9a-zA-Z_%.]+}}, align 8 @@ -598,7 +598,7 @@ // CHECK-NEXT: [[REG292:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: ret <4 x float> [[REG292]] -// CHECK: define available_externally <4 x float> @_mm_cvtpi8_ps +// CHECK: define available_externally frozen <4 x float> @_mm_cvtpi8_ps // CHECK: store i64 {{[0-9a-zA-Z_%.]+}}, i64* {{[0-9a-zA-Z_%.]+}}, align 8 // CHECK-NEXT: [[REG293:[0-9a-zA-Z_%.]+]] = load i64, i64* {{[0-9a-zA-Z_%.]+}}, align 8 // CHECK-NEXT: [[REG294:[0-9a-zA-Z_%.]+]] = insertelement <2 x i64> undef, i64 [[REG293]], i32 0 @@ -609,10 +609,10 @@ // CHECK-NEXT: [[REG298:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG297]] to <16 x i8> // CHECK-NEXT: store <16 x i8> [[REG298]], <16 x i8>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG299:[0-9a-zA-Z_%.]+]] = load <16 x i8>, <16 x i8>* {{[0-9a-zA-Z_%.]+}}, align 16 -// CHECK-NEXT: [[REG300:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_vupkhsb(signed char vector[16])(<16 x i8> [[REG299]]) +// CHECK-NEXT: [[REG300:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_vupkhsb(signed char vector[16])(<16 x i8> frozen [[REG299]]) // CHECK-NEXT: store <8 x i16> [[REG300]], <8 x i16>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG301:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* {{[0-9a-zA-Z_%.]+}}, align 16 -// CHECK-NEXT: [[REG302:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_vupkhsh(short vector[8])(<8 x i16> [[REG301]]) +// CHECK-NEXT: [[REG302:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_vupkhsh(short vector[8])(<8 x i16> frozen [[REG301]]) // CHECK-NEXT: store <4 x i32> [[REG302]], <4 x i32>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG303:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG304:[0-9a-zA-Z_%.]+]] = call <4 x float> @llvm.ppc.altivec.vcfsx(<4 x i32> [[REG303]], i32 0) @@ -620,32 +620,32 @@ // CHECK-NEXT: [[REG305:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: ret <4 x float> [[REG305]] -// CHECK: define available_externally i64 @_mm_cvtps_pi16 +// CHECK: define available_externally frozen i64 @_mm_cvtps_pi16 // CHECK: store <4 x float> {{[0-9a-zA-Z_%.]+}}, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG306:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 -// CHECK-NEXT: [[REG307:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_rint(float vector[4])(<4 x float> [[REG306]]) +// CHECK-NEXT: [[REG307:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_rint(float vector[4])(<4 x float> frozen [[REG306]]) // CHECK-NEXT: store <4 x float> [[REG307]], <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG308:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG309:[0-9a-zA-Z_%.]+]] = call <4 x i32> @llvm.ppc.altivec.vctsxs(<4 x float> [[REG308]], i32 0) // CHECK-NEXT: store <4 x i32> [[REG309]], <4 x i32>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG310:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG311:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* {{[0-9a-zA-Z_%.]+}}, align 16 -// CHECK-NEXT: [[REG312:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_pack(int vector[4], int vector[4])(<4 x i32> [[REG310]], <4 x i32> [[REG311]]) +// CHECK-NEXT: [[REG312:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_pack(int vector[4], int vector[4])(<4 x i32> frozen [[REG310]], <4 x i32> frozen [[REG311]]) // CHECK-NEXT: [[REG313:[0-9a-zA-Z_%.]+]] = bitcast <8 x i16> [[REG312]] to <2 x i64> // CHECK-NEXT: store <2 x i64> [[REG313]], <2 x i64>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG314:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG315:[0-9a-zA-Z_%.]+]] = extractelement <2 x i64> [[REG314]], i32 0 // CHECK-NEXT: ret i64 [[REG315]] -// CHECK: define available_externally i64 @_mm_cvtps_pi32 +// CHECK: define available_externally frozen i64 @_mm_cvtps_pi32 // CHECK: store <4 x float> {{[0-9a-zA-Z_%.]+}}, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG316:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG317:[0-9a-zA-Z_%.]+]] = bitcast <4 x float> [[REG316]] to <2 x i64> -// CHECK-NEXT: [[REG318:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_splat(long long vector[2], unsigned int)(<2 x i64> [[REG317]], i32 zeroext 0) +// CHECK-NEXT: [[REG318:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_splat(long long vector[2], unsigned int)(<2 x i64> frozen [[REG317]], i32 frozen zeroext 0) // CHECK-NEXT: [[REG319:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG318]] to <4 x float> // CHECK-NEXT: store <4 x float> [[REG319]], <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG320:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 -// CHECK-NEXT: [[REG321:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_rint(float vector[4])(<4 x float> [[REG320]]) +// CHECK-NEXT: [[REG321:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_rint(float vector[4])(<4 x float> frozen [[REG320]]) // CHECK-NEXT: store <4 x float> [[REG321]], <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG322:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG323:[0-9a-zA-Z_%.]+]] = call <4 x i32> @llvm.ppc.altivec.vctsxs(<4 x float> [[REG322]], i32 0) @@ -655,27 +655,27 @@ // CHECK-NEXT: [[REG326:[0-9a-zA-Z_%.]+]] = extractelement <2 x i64> [[REG325]], i32 0 // CHECK-NEXT: ret i64 [[REG326]] -// CHECK: define available_externally i64 @_mm_cvtps_pi8 +// CHECK: define available_externally frozen i64 @_mm_cvtps_pi8 // CHECK: store <4 x float> {{[0-9a-zA-Z_%.]+}}, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG327:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 -// CHECK-NEXT: [[REG328:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_rint(float vector[4])(<4 x float> [[REG327]]) +// CHECK-NEXT: [[REG328:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_rint(float vector[4])(<4 x float> frozen [[REG327]]) // CHECK-NEXT: store <4 x float> [[REG328]], <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG329:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG330:[0-9a-zA-Z_%.]+]] = call <4 x i32> @llvm.ppc.altivec.vctsxs(<4 x float> [[REG329]], i32 0) // CHECK-NEXT: store <4 x i32> [[REG330]], <4 x i32>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG331:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* {{[0-9a-zA-Z_%.]+}}, align 16 -// CHECK-NEXT: [[REG332:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_pack(int vector[4], int vector[4])(<4 x i32> [[REG331]], <4 x i32> zeroinitializer) +// CHECK-NEXT: [[REG332:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_pack(int vector[4], int vector[4])(<4 x i32> frozen [[REG331]], <4 x i32> frozen zeroinitializer) // CHECK-NEXT: store <8 x i16> [[REG332]], <8 x i16>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG333:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG334:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* {{[0-9a-zA-Z_%.]+}}, align 16 -// CHECK-NEXT: [[REG335:[0-9a-zA-Z_%.]+]] = call <16 x i8> @vec_pack(short vector[8], short vector[8])(<8 x i16> [[REG333]], <8 x i16> [[REG334]]) +// CHECK-NEXT: [[REG335:[0-9a-zA-Z_%.]+]] = call frozen <16 x i8> @vec_pack(short vector[8], short vector[8])(<8 x i16> frozen [[REG333]], <8 x i16> frozen [[REG334]]) // CHECK-NEXT: store <16 x i8> [[REG335]], <16 x i8>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG336:[0-9a-zA-Z_%.]+]] = load <16 x i8>, <16 x i8>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG337:[0-9a-zA-Z_%.]+]] = bitcast <16 x i8> [[REG336]] to <2 x i64> // CHECK-NEXT: [[REG338:[0-9a-zA-Z_%.]+]] = extractelement <2 x i64> [[REG337]], i32 0 // CHECK-NEXT: ret i64 [[REG338]] -// CHECK: define available_externally <4 x float> @_mm_cvtpu16_ps +// CHECK: define available_externally frozen <4 x float> @_mm_cvtpu16_ps // CHECK: store i64 {{[0-9a-zA-Z_%.]+}}, i64* {{[0-9a-zA-Z_%.]+}}, align 8 // CHECK-NEXT: store <8 x i16> zeroinitializer, <8 x i16>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG339:[0-9a-zA-Z_%.]+]] = load i64, i64* {{[0-9a-zA-Z_%.]+}}, align 8 @@ -687,8 +687,8 @@ // CHECK-NEXT: [[REG344:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG343]] to <8 x i16> // CHECK-NEXT: store <8 x i16> [[REG344]], <8 x i16>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG345:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* {{[0-9a-zA-Z_%.]+}}, align 16 -// CHECK-LE-NEXT: [[REG346:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_mergel(unsigned short vector[8], unsigned short vector[8])(<8 x i16> [[REG345]], <8 x i16> zeroinitializer) -// CHECK-BE-NEXT: [[REG346:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_mergel(unsigned short vector[8], unsigned short vector[8])(<8 x i16> zeroinitializer, <8 x i16> [[REG345]]) +// CHECK-LE-NEXT: [[REG346:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_mergel(unsigned short vector[8], unsigned short vector[8])(<8 x i16> frozen [[REG345]], <8 x i16> frozen zeroinitializer) +// CHECK-BE-NEXT: [[REG346:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_mergel(unsigned short vector[8], unsigned short vector[8])(<8 x i16> frozen zeroinitializer, <8 x i16> frozen [[REG345]]) // CHECK-NEXT: [[REG347:[0-9a-zA-Z_%.]+]] = bitcast <8 x i16> [[REG346]] to <4 x i32> // CHECK-NEXT: store <4 x i32> [[REG347]], <4 x i32>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG348:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* {{[0-9a-zA-Z_%.]+}}, align 16 @@ -697,7 +697,7 @@ // CHECK-NEXT: [[REG350:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: ret <4 x float> [[REG350]] -// CHECK: define available_externally <4 x float> @_mm_cvtpu8_ps +// CHECK: define available_externally frozen <4 x float> @_mm_cvtpu8_ps // CHECK: store i64 {{[0-9a-zA-Z_%.]+}}, i64* {{[0-9a-zA-Z_%.]+}}, align 8 // CHECK-NEXT: store <16 x i8> zeroinitializer, <16 x i8>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG351:[0-9a-zA-Z_%.]+]] = load i64, i64* {{[0-9a-zA-Z_%.]+}}, align 8 @@ -709,13 +709,13 @@ // CHECK-NEXT: [[REG356:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG355]] to <16 x i8> // CHECK-NEXT: store <16 x i8> [[REG356]], <16 x i8>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG357:[0-9a-zA-Z_%.]+]] = load <16 x i8>, <16 x i8>* {{[0-9a-zA-Z_%.]+}}, align 16 -// CHECK-LE-NEXT: [[REG358:[0-9a-zA-Z_%.]+]] = call <16 x i8> @vec_mergel(unsigned char vector[16], unsigned char vector[16])(<16 x i8> [[REG357]], <16 x i8> zeroinitializer) -// CHECK-BE-NEXT: [[REG358:[0-9a-zA-Z_%.]+]] = call <16 x i8> @vec_mergel(unsigned char vector[16], unsigned char vector[16])(<16 x i8> zeroinitializer, <16 x i8> [[REG357]]) +// CHECK-LE-NEXT: [[REG358:[0-9a-zA-Z_%.]+]] = call frozen <16 x i8> @vec_mergel(unsigned char vector[16], unsigned char vector[16])(<16 x i8> frozen [[REG357]], <16 x i8> frozen zeroinitializer) +// CHECK-BE-NEXT: [[REG358:[0-9a-zA-Z_%.]+]] = call frozen <16 x i8> @vec_mergel(unsigned char vector[16], unsigned char vector[16])(<16 x i8> frozen zeroinitializer, <16 x i8> frozen [[REG357]]) // CHECK-NEXT: [[REG359:[0-9a-zA-Z_%.]+]] = bitcast <16 x i8> [[REG358]] to <8 x i16> // CHECK-NEXT: store <8 x i16> [[REG359]], <8 x i16>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG360:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* {{[0-9a-zA-Z_%.]+}}, align 16 -// CHECK-LE-NEXT: [[REG361:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_mergeh(unsigned short vector[8], unsigned short vector[8])(<8 x i16> [[REG360]], <8 x i16> zeroinitializer) -// CHECK-BE-NEXT: [[REG361:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_mergeh(unsigned short vector[8], unsigned short vector[8])(<8 x i16> zeroinitializer, <8 x i16> [[REG360]]) +// CHECK-LE-NEXT: [[REG361:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_mergeh(unsigned short vector[8], unsigned short vector[8])(<8 x i16> frozen [[REG360]], <8 x i16> frozen zeroinitializer) +// CHECK-BE-NEXT: [[REG361:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_mergeh(unsigned short vector[8], unsigned short vector[8])(<8 x i16> frozen zeroinitializer, <8 x i16> frozen [[REG360]]) // CHECK-NEXT: [[REG362:[0-9a-zA-Z_%.]+]] = bitcast <8 x i16> [[REG361]] to <4 x i32> // CHECK-NEXT: store <4 x i32> [[REG362]], <4 x i32>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG363:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* {{[0-9a-zA-Z_%.]+}}, align 16 @@ -724,7 +724,7 @@ // CHECK-NEXT: [[REG365:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: ret <4 x float> [[REG365]] -// CHECK: define available_externally <4 x float> @_mm_cvtsi32_ss +// CHECK: define available_externally frozen <4 x float> @_mm_cvtsi32_ss // CHECK: store <4 x float> {{[0-9a-zA-Z_%.]+}}, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: store i32 {{[0-9a-zA-Z_%.]+}}, i32* {{[0-9a-zA-Z_%.]+}}, align 4 // CHECK-NEXT: [[REG366:[0-9a-zA-Z_%.]+]] = load i32, i32* {{[0-9a-zA-Z_%.]+}}, align 4 @@ -737,7 +737,7 @@ // CHECK-NEXT: [[REG371:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: ret <4 x float> [[REG371]] -// CHECK: define available_externally <4 x float> @_mm_cvtsi64_ss +// CHECK: define available_externally frozen <4 x float> @_mm_cvtsi64_ss // CHECK: store <4 x float> {{[0-9a-zA-Z_%.]+}}, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: store i64 {{[0-9a-zA-Z_%.]+}}, i64* {{[0-9a-zA-Z_%.]+}}, align 8 // CHECK-NEXT: [[REG372:[0-9a-zA-Z_%.]+]] = load i64, i64* {{[0-9a-zA-Z_%.]+}}, align 8 @@ -750,18 +750,18 @@ // CHECK-NEXT: [[REG377:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: ret <4 x float> [[REG377]] -// CHECK: define available_externally float @_mm_cvtss_f32 +// CHECK: define available_externally frozen float @_mm_cvtss_f32 // CHECK: store <4 x float> {{[0-9a-zA-Z_%.]+}}, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG378:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG379:[0-9a-zA-Z_%.]+]] = extractelement <4 x float> [[REG378]], i32 0 // CHECK-NEXT: ret float [[REG379]] -// CHECK: define available_externally signext i32 @_mm_cvtss_si32 +// CHECK: define available_externally frozen signext i32 @_mm_cvtss_si32 // CHECK: store <4 x float> {{[0-9a-zA-Z_%.]+}}, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: store i64 0, i64* {{[0-9a-zA-Z_%.]+}}, align 8 // CHECK-NEXT: [[REG380:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 -// CHECK-LE-NEXT: [[REG381:[0-9a-zA-Z_%.]+]] = call { <4 x float>, i64, double } asm "xxsldwi ${0:x},${0:x},${0:x},3;\0Axscvspdp ${2:x},${0:x};\0Afctiw $2,$2;\0Amfvsrd $1,${2:x};\0A", "=^wa,=r,=f,0"(<4 x float> [[REG380]]) -// CHECK-BE-NEXT: [[REG381:[0-9a-zA-Z_%.]+]] = call { <4 x float>, i64, double } asm "xscvspdp ${2:x},${0:x};\0Afctiw $2,$2;\0Amfvsrd $1,${2:x};\0A", "=^wa,=r,=f,0"(<4 x float> [[REG380]]) +// CHECK-LE-NEXT: [[REG381:[0-9a-zA-Z_%.]+]] = call { <4 x float>, i64, double } asm "xxsldwi ${0:x},${0:x},${0:x},3;\0Axscvspdp ${2:x},${0:x};\0Afctiw $2,$2;\0Amfvsrd $1,${2:x};\0A", "=^wa,=r,=f,0"(<4 x float> [[REG380]]) +// CHECK-BE-NEXT: [[REG381:[0-9a-zA-Z_%.]+]] = call { <4 x float>, i64, double } asm "xscvspdp ${2:x},${0:x};\0Afctiw $2,$2;\0Amfvsrd $1,${2:x};\0A", "=^wa,=r,=f,0"(<4 x float> [[REG380]]) // CHECK-NEXT: [[REG382:[0-9a-zA-Z_%.]+]] = extractvalue { <4 x float>, i64, double } [[REG381]], 0 // CHECK-NEXT: [[REG383:[0-9a-zA-Z_%.]+]] = extractvalue { <4 x float>, i64, double } [[REG381]], 1 // CHECK-NEXT: [[REG384:[0-9a-zA-Z_%.]+]] = extractvalue { <4 x float>, i64, double } [[REG381]], 2 @@ -772,12 +772,12 @@ // CHECK-NEXT: [[REG386:[0-9a-zA-Z_%.]+]] = trunc i64 [[REG385]] to i32 // CHECK-NEXT: ret i32 [[REG386]] -// CHECK: define available_externally i64 @_mm_cvtss_si64 +// CHECK: define available_externally frozen i64 @_mm_cvtss_si64 // CHECK: store <4 x float> {{[0-9a-zA-Z_%.]+}}, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: store i64 0, i64* {{[0-9a-zA-Z_%.]+}}, align 8 // CHECK-NEXT: [[REG387:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 -// CHECK-LE-NEXT: [[REG388:[0-9a-zA-Z_%.]+]] = call { <4 x float>, i64, double } asm "xxsldwi ${0:x},${0:x},${0:x},3;\0Axscvspdp ${2:x},${0:x};\0Afctid $2,$2;\0Amfvsrd $1,${2:x};\0A", "=^wa,=r,=f,0"(<4 x float> [[REG387]]) -// CHECK-BE-NEXT: [[REG388:[0-9a-zA-Z_%.]+]] = call { <4 x float>, i64, double } asm "xscvspdp ${2:x},${0:x};\0Afctid $2,$2;\0Amfvsrd $1,${2:x};\0A", "=^wa,=r,=f,0"(<4 x float> [[REG387]]) +// CHECK-LE-NEXT: [[REG388:[0-9a-zA-Z_%.]+]] = call { <4 x float>, i64, double } asm "xxsldwi ${0:x},${0:x},${0:x},3;\0Axscvspdp ${2:x},${0:x};\0Afctid $2,$2;\0Amfvsrd $1,${2:x};\0A", "=^wa,=r,=f,0"(<4 x float> [[REG387]]) +// CHECK-BE-NEXT: [[REG388:[0-9a-zA-Z_%.]+]] = call { <4 x float>, i64, double } asm "xscvspdp ${2:x},${0:x};\0Afctid $2,$2;\0Amfvsrd $1,${2:x};\0A", "=^wa,=r,=f,0"(<4 x float> [[REG387]]) // CHECK-NEXT: [[REG389:[0-9a-zA-Z_%.]+]] = extractvalue { <4 x float>, i64, double } [[REG388]], 0 // CHECK-NEXT: [[REG390:[0-9a-zA-Z_%.]+]] = extractvalue { <4 x float>, i64, double } [[REG388]], 1 // CHECK-NEXT: [[REG391:[0-9a-zA-Z_%.]+]] = extractvalue { <4 x float>, i64, double } [[REG388]], 2 @@ -787,23 +787,23 @@ // CHECK-NEXT: [[REG392:[0-9a-zA-Z_%.]+]] = load i64, i64* {{[0-9a-zA-Z_%.]+}}, align 8 // CHECK-NEXT: ret i64 [[REG392]] -// CHECK: define available_externally i64 @_mm_cvtt_ps2pi +// CHECK: define available_externally frozen i64 @_mm_cvtt_ps2pi // CHECK: store <4 x float> {{[0-9a-zA-Z_%.]+}}, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK: [[REG393:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 -// CHECK-NEXT: [[REG394:[0-9a-zA-Z_%.]+]] = call i64 @_mm_cvttps_pi32(<4 x float> [[REG393]]) +// CHECK-NEXT: [[REG394:[0-9a-zA-Z_%.]+]] = call frozen i64 @_mm_cvttps_pi32(<4 x float> frozen [[REG393]]) // CHECK-NEXT: ret i64 [[REG394]] -// CHECK: define available_externally signext i32 @_mm_cvtt_ss2si +// CHECK: define available_externally frozen signext i32 @_mm_cvtt_ss2si // CHECK: store <4 x float> {{[0-9a-zA-Z_%.]+}}, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG395:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 -// CHECK-NEXT: [[REG396:[0-9a-zA-Z_%.]+]] = call signext i32 @_mm_cvttss_si32(<4 x float> [[REG395]]) +// CHECK-NEXT: [[REG396:[0-9a-zA-Z_%.]+]] = call frozen signext i32 @_mm_cvttss_si32(<4 x float> frozen [[REG395]]) // CHECK-NEXT: ret i32 [[REG396]] -// CHECK: define available_externally i64 @_mm_cvttps_pi32 +// CHECK: define available_externally frozen i64 @_mm_cvttps_pi32 // CHECK: store <4 x float> {{[0-9a-zA-Z_%.]+}}, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG397:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG398:[0-9a-zA-Z_%.]+]] = bitcast <4 x float> [[REG397]] to <2 x i64> -// CHECK-NEXT: [[REG399:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_splat(long long vector[2], unsigned int)(<2 x i64> [[REG398]], i32 zeroext 0) +// CHECK-NEXT: [[REG399:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_splat(long long vector[2], unsigned int)(<2 x i64> frozen [[REG398]], i32 frozen zeroext 0) // CHECK-NEXT: [[REG400:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG399]] to <4 x float> // CHECK-NEXT: store <4 x float> [[REG400]], <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG401:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 @@ -814,7 +814,7 @@ // CHECK-NEXT: [[REG405:[0-9a-zA-Z_%.]+]] = extractelement <2 x i64> [[REG404]], i32 0 // CHECK-NEXT: ret i64 [[REG405]] -// CHECK: define available_externally signext i32 @_mm_cvttss_si32 +// CHECK: define available_externally frozen signext i32 @_mm_cvttss_si32 // CHECK: store <4 x float> {{[0-9a-zA-Z_%.]+}}, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG406:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG407:[0-9a-zA-Z_%.]+]] = extractelement <4 x float> [[REG406]], i32 0 @@ -823,7 +823,7 @@ // CHECK-NEXT: [[REG409:[0-9a-zA-Z_%.]+]] = fptosi float [[REG408]] to i32 // CHECK-NEXT: ret i32 [[REG409]] -// CHECK: define available_externally i64 @_mm_cvttss_si64 +// CHECK: define available_externally frozen i64 @_mm_cvttss_si64 // CHECK: store <4 x float> {{[0-9a-zA-Z_%.]+}}, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG410:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG411:[0-9a-zA-Z_%.]+]] = extractelement <4 x float> [[REG410]], i32 0 @@ -840,7 +840,7 @@ // CHECK-LABEL: @test_div -// CHECK: define available_externally <4 x float> @_mm_div_ps(<4 x float> [[REG414:[0-9a-zA-Z_%.]+]], <4 x float> [[REG415:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <4 x float> @_mm_div_ps(<4 x float> frozen [[REG414:[0-9a-zA-Z_%.]+]], <4 x float> frozen [[REG415:[0-9a-zA-Z_%.]+]]) // CHECK: store <4 x float> [[REG414]], <4 x float>* [[REG416:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <4 x float> [[REG415]], <4 x float>* [[REG417:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG418:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG416]], align 16 @@ -848,14 +848,14 @@ // CHECK-NEXT: [[REG420:[0-9a-zA-Z_%.]+]] = fdiv <4 x float> [[REG418]], [[REG419]] // CHECK-NEXT: ret <4 x float> [[REG420]] -// CHECK: define available_externally <4 x float> @_mm_div_ss(<4 x float> [[REG421:[0-9a-zA-Z_%.]+]], <4 x float> [[REG422:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <4 x float> @_mm_div_ss(<4 x float> frozen [[REG421:[0-9a-zA-Z_%.]+]], <4 x float> frozen [[REG422:[0-9a-zA-Z_%.]+]]) // CHECK: store <4 x float> [[REG421]], <4 x float>* [[REG423:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <4 x float> [[REG422]], <4 x float>* [[REG424:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG425:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG423]], align 16 -// CHECK-NEXT: [[REG426:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_splat(float vector[4], unsigned int)(<4 x float> [[REG425]], i32 zeroext 0) +// CHECK-NEXT: [[REG426:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_splat(float vector[4], unsigned int)(<4 x float> frozen [[REG425]], i32 frozen zeroext 0) // CHECK-NEXT: store <4 x float> [[REG426]], <4 x float>* [[REG427:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG428:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG424]], align 16 -// CHECK-NEXT: [[REG429:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_splat(float vector[4], unsigned int)(<4 x float> [[REG428]], i32 zeroext 0) +// CHECK-NEXT: [[REG429:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_splat(float vector[4], unsigned int)(<4 x float> frozen [[REG428]], i32 frozen zeroext 0) // CHECK-NEXT: store <4 x float> [[REG429]], <4 x float>* [[REG430:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG431:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG427]], align 16 // CHECK-NEXT: [[REG432:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG430]], align 16 @@ -863,7 +863,7 @@ // CHECK-NEXT: store <4 x float> [[REG433]], <4 x float>* [[REG434:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG435:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG423]], align 16 // CHECK-NEXT: [[REG436:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG434]], align 16 -// CHECK-NEXT: [[REG437:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_sel(float vector[4], float vector[4], unsigned int vector[4])(<4 x float> [[REG435]], <4 x float> [[REG436]], <4 x i32> ) +// CHECK-NEXT: [[REG437:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_sel(float vector[4], float vector[4], unsigned int vector[4])(<4 x float> frozen [[REG435]], <4 x float> frozen [[REG436]], <4 x i32> frozen ) // CHECK-NEXT: ret <4 x float> [[REG437]] void __attribute__((noinline)) @@ -874,7 +874,7 @@ // CHECK-LABEL: @test_extract -// CHECK: define available_externally signext i32 @_mm_extract_pi16 +// CHECK: define available_externally frozen signext i32 @_mm_extract_pi16 // CHECK: [[REG438:[0-9a-zA-Z_%.]+]] = load i32, i32* {{[0-9a-zA-Z_%.]+}}, align 4 // CHECK-NEXT: [[REG439:[0-9a-zA-Z_%.]+]] = and i32 [[REG438]], 3 // CHECK-NEXT: store i32 [[REG439]], i32* {{[0-9a-zA-Z_%.]+}}, align 4 @@ -888,8 +888,8 @@ // CHECK-NEXT: [[REG446:[0-9a-zA-Z_%.]+]] = trunc i64 [[REG445]] to i32 // CHECK-NEXT: ret i32 [[REG446]] -// CHECK: define available_externally signext i32 @_m_pextrw -// CHECK: [[REG447:[0-9a-zA-Z_%.]+]] = call signext i32 @_mm_extract_pi16 +// CHECK: define available_externally frozen signext i32 @_m_pextrw +// CHECK: [[REG447:[0-9a-zA-Z_%.]+]] = call frozen signext i32 @_mm_extract_pi16 // CHECK-NEXT: ret i32 [[REG447]] void __attribute__((noinline)) @@ -900,7 +900,7 @@ // CHECK-LABEL: @test_insert -// CHECK: define available_externally i64 @_mm_insert_pi16 +// CHECK: define available_externally frozen i64 @_mm_insert_pi16 // CHECK: store i64 {{[0-9a-zA-Z_%.]+}}, i64* {{[0-9a-zA-Z_%.]+}}, align 8 // CHECK-NEXT: store i32 {{[0-9a-zA-Z_%.]+}}, i32* {{[0-9a-zA-Z_%.]+}}, align 4 // CHECK-NEXT: store i32 {{[0-9a-zA-Z_%.]+}}, i32* {{[0-9a-zA-Z_%.]+}}, align 4 @@ -930,8 +930,8 @@ // CHECK-NEXT: [[REG467:[0-9a-zA-Z_%.]+]] = load i64, i64* {{[0-9a-zA-Z_%.]+}}, align 8 // CHECK-NEXT: ret i64 [[REG467]] -// CHECK: define available_externally i64 @_m_pinsrw -// CHECK: [[REG468:[0-9a-zA-Z_%.]+]] = call i64 @_mm_insert_pi16 +// CHECK: define available_externally frozen i64 @_m_pinsrw +// CHECK: [[REG468:[0-9a-zA-Z_%.]+]] = call frozen i64 @_mm_insert_pi16 // CHECK-NEXT: ret i64 [[REG468]] void __attribute__((noinline)) @@ -948,24 +948,24 @@ // CHECK-LABEL: @test_load -// CHECK: define available_externally <4 x float> @_mm_load_ps -// CHECK: [[REG469:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_ld(int, float vector[4] const*) +// CHECK: define available_externally frozen <4 x float> @_mm_load_ps +// CHECK: [[REG469:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_ld(int, float vector[4] const*) // CHECK-NEXT: ret <4 x float> [[REG469]] -// CHECK: define available_externally <4 x float> @_mm_load_ps1 -// CHECK: [[REG470:[0-9a-zA-Z_%.]+]] = call <4 x float> @_mm_load1_ps +// CHECK: define available_externally frozen <4 x float> @_mm_load_ps1 +// CHECK: [[REG470:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @_mm_load1_ps // CHECK-NEXT: ret <4 x float> [[REG470]] -// CHECK: define available_externally <4 x float> @_mm_load_ss -// CHECK: [[REG471:[0-9a-zA-Z_%.]+]] = call <4 x float> @_mm_set_ss +// CHECK: define available_externally frozen <4 x float> @_mm_load_ss +// CHECK: [[REG471:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @_mm_set_ss // CHECK-NEXT: ret <4 x float> [[REG471]] -// CHECK: define available_externally <4 x float> @_mm_load1_ps -// CHECK: [[REG472:[0-9a-zA-Z_%.]+]] = call <4 x float> @_mm_set1_ps +// CHECK: define available_externally frozen <4 x float> @_mm_load1_ps +// CHECK: [[REG472:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @_mm_set1_ps // CHECK-NEXT: ret <4 x float> [[REG472]] -// CHECK: define available_externally <4 x float> @_mm_loadh_pi -// CHECK: [[REG473:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_splats(unsigned long long) +// CHECK: define available_externally frozen <4 x float> @_mm_loadh_pi +// CHECK: [[REG473:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_splats(unsigned long long) // CHECK-NEXT: store <2 x i64> [[REG473]], <2 x i64>* [[REG474:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG475:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG474]], align 16 // CHECK-NEXT: [[REG476:[0-9a-zA-Z_%.]+]] = extractelement <2 x i64> [[REG475]], i32 1 @@ -976,8 +976,8 @@ // CHECK-NEXT: [[REG481:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG480]] to <4 x float> // CHECK-NEXT: ret <4 x float> [[REG481]] -// CHECK: define available_externally <4 x float> @_mm_loadl_pi -// CHECK: [[REG482:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_splats(unsigned long long) +// CHECK: define available_externally frozen <4 x float> @_mm_loadl_pi +// CHECK: [[REG482:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_splats(unsigned long long) // CHECK-NEXT: store <2 x i64> [[REG482]], <2 x i64>* [[REG483:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG484:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG483]], align 16 // CHECK-NEXT: [[REG485:[0-9a-zA-Z_%.]+]] = extractelement <2 x i64> [[REG484]], i32 0 @@ -988,18 +988,18 @@ // CHECK-NEXT: [[REG490:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG489]] to <4 x float> // CHECK-NEXT: ret <4 x float> [[REG490]] -// CHECK: define available_externally <4 x float> @_mm_loadr_ps -// CHECK: [[REG491:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_ld(int, float vector[4] const*) +// CHECK: define available_externally frozen <4 x float> @_mm_loadr_ps +// CHECK: [[REG491:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_ld(int, float vector[4] const*) // CHECK-NEXT: store <4 x float> [[REG491]], <4 x float>* [[REG492:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG493:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG492]], align 16 // CHECK-NEXT: [[REG494:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG492]], align 16 -// CHECK-NEXT: [[REG495:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_perm(float vector[4], float vector[4], unsigned char vector[16])(<4 x float> [[REG493]], <4 x float> [[REG494]], <16 x i8> ) +// CHECK-NEXT: [[REG495:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_perm(float vector[4], float vector[4], unsigned char vector[16])(<4 x float> frozen [[REG493]], <4 x float> frozen [[REG494]], <16 x i8> frozen ) // CHECK-NEXT: store <4 x float> [[REG495]], <4 x float>* [[REG496:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG497:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG496]], align 16 // CHECK-NEXT: ret <4 x float> [[REG497]] -// CHECK: define available_externally <4 x float> @_mm_loadu_ps -// CHECK: [[REG498:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_vsx_ld(int, float const*) +// CHECK: define available_externally frozen <4 x float> @_mm_loadu_ps +// CHECK: [[REG498:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_vsx_ld(int, float const*) // CHECK-NEXT: ret <4 x float> [[REG498]] void __attribute__((noinline)) @@ -1012,36 +1012,36 @@ // CHECK-LABEL: @test_logic -// CHECK: define available_externally <4 x float> @_mm_or_ps +// CHECK: define available_externally frozen <4 x float> @_mm_or_ps // CHECK: store <4 x float> {{[0-9a-zA-Z_%.]+}}, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: store <4 x float> {{[0-9a-zA-Z_%.]+}}, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG499:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG500:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 -// CHECK-NEXT: [[REG501:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_or(float vector[4], float vector[4])(<4 x float> [[REG499]], <4 x float> [[REG500]]) +// CHECK-NEXT: [[REG501:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_or(float vector[4], float vector[4])(<4 x float> frozen [[REG499]], <4 x float> frozen [[REG500]]) // CHECK-NEXT: ret <4 x float> [[REG501]] -// CHECK: define available_externally <4 x float> @_mm_and_ps +// CHECK: define available_externally frozen <4 x float> @_mm_and_ps // CHECK: store <4 x float> {{[0-9a-zA-Z_%.]+}}, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: store <4 x float> {{[0-9a-zA-Z_%.]+}}, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG502:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG503:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 -// CHECK-NEXT: [[REG504:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_and(float vector[4], float vector[4])(<4 x float> [[REG502]], <4 x float> [[REG503]]) +// CHECK-NEXT: [[REG504:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_and(float vector[4], float vector[4])(<4 x float> frozen [[REG502]], <4 x float> frozen [[REG503]]) // CHECK-NEXT: ret <4 x float> [[REG504]] -// CHECK: define available_externally <4 x float> @_mm_andnot_ps +// CHECK: define available_externally frozen <4 x float> @_mm_andnot_ps // CHECK: store <4 x float> {{[0-9a-zA-Z_%.]+}}, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: store <4 x float> {{[0-9a-zA-Z_%.]+}}, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG505:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG506:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 -// CHECK-NEXT: [[REG507:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_andc(float vector[4], float vector[4])(<4 x float> [[REG505]], <4 x float> [[REG506]]) +// CHECK-NEXT: [[REG507:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_andc(float vector[4], float vector[4])(<4 x float> frozen [[REG505]], <4 x float> frozen [[REG506]]) // CHECK-NEXT: ret <4 x float> [[REG507]] -// CHECK: define available_externally <4 x float> @_mm_xor_ps +// CHECK: define available_externally frozen <4 x float> @_mm_xor_ps // CHECK: store <4 x float> {{[0-9a-zA-Z_%.]+}}, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: store <4 x float> {{[0-9a-zA-Z_%.]+}}, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG508:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG509:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 -// CHECK-NEXT: [[REG510:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_xor(float vector[4], float vector[4])(<4 x float> [[REG508]], <4 x float> [[REG509]]) +// CHECK-NEXT: [[REG510:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_xor(float vector[4], float vector[4])(<4 x float> frozen [[REG508]], <4 x float> frozen [[REG509]]) // CHECK-NEXT: ret <4 x float> [[REG510]] void __attribute__((noinline)) @@ -1054,70 +1054,70 @@ // CHECK-LABEL: @test_max -// CHECK: define available_externally <4 x float> @_mm_max_ps(<4 x float> [[REG511:[0-9a-zA-Z_%.]+]], <4 x float> [[REG512:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <4 x float> @_mm_max_ps(<4 x float> frozen [[REG511:[0-9a-zA-Z_%.]+]], <4 x float> frozen [[REG512:[0-9a-zA-Z_%.]+]]) // CHECK: store <4 x float> [[REG511]], <4 x float>* [[REG513:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <4 x float> [[REG512]], <4 x float>* [[REG514:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG515:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG513]], align 16 // CHECK-NEXT: [[REG516:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG514]], align 16 -// CHECK-NEXT: [[REG517:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_cmpgt(float vector[4], float vector[4])(<4 x float> [[REG515]], <4 x float> [[REG516]]) +// CHECK-NEXT: [[REG517:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_cmpgt(float vector[4], float vector[4])(<4 x float> frozen [[REG515]], <4 x float> frozen [[REG516]]) // CHECK-NEXT: store <4 x i32> [[REG517]], <4 x i32>* [[REG518:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG519:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG514]], align 16 // CHECK-NEXT: [[REG520:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG513]], align 16 // CHECK-NEXT: [[REG521:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG518]], align 16 -// CHECK-NEXT: [[REG522:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_sel(float vector[4], float vector[4], bool vector[4])(<4 x float> [[REG519]], <4 x float> [[REG520]], <4 x i32> [[REG521]]) +// CHECK-NEXT: [[REG522:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_sel(float vector[4], float vector[4], bool vector[4])(<4 x float> frozen [[REG519]], <4 x float> frozen [[REG520]], <4 x i32> frozen [[REG521]]) // CHECK-NEXT: ret <4 x float> [[REG522]] -// CHECK: define available_externally <4 x float> @_mm_max_ss -// CHECK: [[REG523:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_splat(float vector[4], unsigned int)(<4 x float> {{[0-9a-zA-Z_%.]+}}, {{i32|i32 zeroext}} 0) +// CHECK: define available_externally frozen <4 x float> @_mm_max_ss +// CHECK: [[REG523:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_splat(float vector[4], unsigned int)(<4 x float> frozen {{[0-9a-zA-Z_%.]+}}, i32 frozen {{(zeroext )?}}0) // CHECK-NEXT: store <4 x float> [[REG523]], <4 x float>* [[REG524:[0-9a-zA-Z_%.]+]], align 16 -// CHECK: [[REG525:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_splat(float vector[4], unsigned int)(<4 x float> {{[0-9a-zA-Z_%.]+}}, {{i32|i32 zeroext}} 0) +// CHECK: [[REG525:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_splat(float vector[4], unsigned int)(<4 x float> frozen {{[0-9a-zA-Z_%.]+}}, i32 frozen {{(zeroext )?}}0) // CHECK-NEXT: store <4 x float> [[REG525]], <4 x float>* [[REG526:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG527:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG524]], align 16 // CHECK-NEXT: [[REG528:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG526]], align 16 -// CHECK-NEXT: call <4 x float> @vec_max(float vector[4], float vector[4])(<4 x float> [[REG527]], <4 x float> [[REG528]]) -// CHECK: [[REG529:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_sel(float vector[4], float vector[4], unsigned int vector[4])(<4 x float> {{[0-9a-zA-Z_%.]+}}, <4 x float> {{[0-9a-zA-Z_%.]+}}, <4 x i32> ) +// CHECK-NEXT: call frozen <4 x float> @vec_max(float vector[4], float vector[4])(<4 x float> frozen [[REG527]], <4 x float> frozen [[REG528]]) +// CHECK: [[REG529:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_sel(float vector[4], float vector[4], unsigned int vector[4])(<4 x float> frozen {{[0-9a-zA-Z_%.]+}}, <4 x float> frozen {{[0-9a-zA-Z_%.]+}}, <4 x i32> frozen ) // CHECK-NEXT: ret <4 x float> [[REG529]] -// CHECK: define available_externally i64 @_mm_max_pi16 +// CHECK: define available_externally frozen i64 @_mm_max_pi16 // CHECK: [[REG530:[0-9a-zA-Z_%.]+]] = load i64, i64* {{[0-9a-zA-Z_%.]+}}, align 8 -// CHECK-NEXT: [[REG531:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_splats(unsigned long long)(i64 [[REG530]]) +// CHECK-NEXT: [[REG531:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_splats(unsigned long long)(i64 frozen [[REG530]]) // CHECK-NEXT: [[REG532:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG531]] to <8 x i16> // CHECK-NEXT: store <8 x i16> [[REG532]], <8 x i16>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG533:[0-9a-zA-Z_%.]+]] = load i64, i64* {{[0-9a-zA-Z_%.]+}}, align 8 -// CHECK-NEXT: [[REG534:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_splats(unsigned long long)(i64 [[REG533]]) +// CHECK-NEXT: [[REG534:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_splats(unsigned long long)(i64 frozen [[REG533]]) // CHECK-NEXT: [[REG535:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG534]] to <8 x i16> // CHECK-NEXT: store <8 x i16> [[REG535]], <8 x i16>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG536:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG537:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* {{[0-9a-zA-Z_%.]+}}, align 16 -// CHECK-NEXT: [[REG538:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_cmpgt(short vector[8], short vector[8])(<8 x i16> [[REG536]], <8 x i16> [[REG537]]) +// CHECK-NEXT: [[REG538:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_cmpgt(short vector[8], short vector[8])(<8 x i16> frozen [[REG536]], <8 x i16> frozen [[REG537]]) // CHECK-NEXT: store <8 x i16> [[REG538]], <8 x i16>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG539:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG540:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG541:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* {{[0-9a-zA-Z_%.]+}}, align 16 -// CHECK-NEXT: [[REG542:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_sel(short vector[8], short vector[8], bool vector[8])(<8 x i16> [[REG539]], <8 x i16> [[REG540]], <8 x i16> [[REG541]]) +// CHECK-NEXT: [[REG542:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_sel(short vector[8], short vector[8], bool vector[8])(<8 x i16> frozen [[REG539]], <8 x i16> frozen [[REG540]], <8 x i16> frozen [[REG541]]) // CHECK-NEXT: store <8 x i16> [[REG542]], <8 x i16>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG543:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG544:[0-9a-zA-Z_%.]+]] = bitcast <8 x i16> [[REG543]] to <2 x i64> // CHECK-NEXT: [[REG545:[0-9a-zA-Z_%.]+]] = extractelement <2 x i64> [[REG544]], i32 0 // CHECK-NEXT: ret i64 [[REG545]] -// CHECK: define available_externally i64 @_mm_max_pu8 +// CHECK: define available_externally frozen i64 @_mm_max_pu8 // CHECK: [[REG546:[0-9a-zA-Z_%.]+]] = load i64, i64* {{[0-9a-zA-Z_%.]+}}, align 8 -// CHECK-NEXT: [[REG547:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_splats(unsigned long long)(i64 [[REG546]]) +// CHECK-NEXT: [[REG547:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_splats(unsigned long long)(i64 frozen [[REG546]]) // CHECK-NEXT: [[REG548:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG547]] to <16 x i8> // CHECK-NEXT: store <16 x i8> [[REG548]], <16 x i8>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG549:[0-9a-zA-Z_%.]+]] = load i64, i64* {{[0-9a-zA-Z_%.]+}}, align 8 -// CHECK-NEXT: [[REG550:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_splats(unsigned long long)(i64 [[REG549]]) +// CHECK-NEXT: [[REG550:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_splats(unsigned long long)(i64 frozen [[REG549]]) // CHECK-NEXT: [[REG551:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG550]] to <16 x i8> // CHECK-NEXT: store <16 x i8> [[REG551]], <16 x i8>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG552:[0-9a-zA-Z_%.]+]] = load <16 x i8>, <16 x i8>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG553:[0-9a-zA-Z_%.]+]] = load <16 x i8>, <16 x i8>* {{[0-9a-zA-Z_%.]+}}, align 16 -// CHECK-NEXT: [[REG554:[0-9a-zA-Z_%.]+]] = call <16 x i8> @vec_cmpgt(unsigned char vector[16], unsigned char vector[16])(<16 x i8> [[REG552]], <16 x i8> [[REG553]]) +// CHECK-NEXT: [[REG554:[0-9a-zA-Z_%.]+]] = call frozen <16 x i8> @vec_cmpgt(unsigned char vector[16], unsigned char vector[16])(<16 x i8> frozen [[REG552]], <16 x i8> frozen [[REG553]]) // CHECK-NEXT: store <16 x i8> [[REG554]], <16 x i8>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG555:[0-9a-zA-Z_%.]+]] = load <16 x i8>, <16 x i8>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG556:[0-9a-zA-Z_%.]+]] = load <16 x i8>, <16 x i8>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG557:[0-9a-zA-Z_%.]+]] = load <16 x i8>, <16 x i8>* {{[0-9a-zA-Z_%.]+}}, align 16 -// CHECK-NEXT: [[REG558:[0-9a-zA-Z_%.]+]] = call <16 x i8> @vec_sel(unsigned char vector[16], unsigned char vector[16], bool vector[16])(<16 x i8> [[REG555]], <16 x i8> [[REG556]], <16 x i8> [[REG557]]) +// CHECK-NEXT: [[REG558:[0-9a-zA-Z_%.]+]] = call frozen <16 x i8> @vec_sel(unsigned char vector[16], unsigned char vector[16], bool vector[16])(<16 x i8> frozen [[REG555]], <16 x i8> frozen [[REG556]], <16 x i8> frozen [[REG557]]) // CHECK-NEXT: store <16 x i8> [[REG558]], <16 x i8>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG559:[0-9a-zA-Z_%.]+]] = load <16 x i8>, <16 x i8>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG560:[0-9a-zA-Z_%.]+]] = bitcast <16 x i8> [[REG559]] to <2 x i64> @@ -1132,12 +1132,12 @@ // CHECK-LABEL: @test_alt_name_max -// CHECK: define available_externally i64 @_m_pmaxsw -// CHECK: [[REG562:[0-9a-zA-Z_%.]+]] = call i64 @_mm_max_pi16 +// CHECK: define available_externally frozen i64 @_m_pmaxsw +// CHECK: [[REG562:[0-9a-zA-Z_%.]+]] = call frozen i64 @_mm_max_pi16 // CHECK-NEXT: ret i64 [[REG562]] -// CHECK: define available_externally i64 @_m_pmaxub -// CHECK: [[REG563:[0-9a-zA-Z_%.]+]] = call i64 @_mm_max_pu8 +// CHECK: define available_externally frozen i64 @_m_pmaxub +// CHECK: [[REG563:[0-9a-zA-Z_%.]+]] = call frozen i64 @_mm_max_pu8 // CHECK-NEXT: ret i64 [[REG563]] void __attribute__((noinline)) @@ -1150,70 +1150,70 @@ // CHECK-LABEL: @test_min -// CHECK: define available_externally <4 x float> @_mm_min_ps(<4 x float> [[REG517:[0-9a-zA-Z_%.]+]], <4 x float> [[REG518:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <4 x float> @_mm_min_ps(<4 x float> frozen [[REG517:[0-9a-zA-Z_%.]+]], <4 x float> frozen [[REG518:[0-9a-zA-Z_%.]+]]) // CHECK: store <4 x float> [[REG517]], <4 x float>* [[REG564:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <4 x float> [[REG518]], <4 x float>* [[REG565:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG566:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG565]], align 16 // CHECK-NEXT: [[REG567:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG564]], align 16 -// CHECK-NEXT: [[REG568:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_cmpgt(float vector[4], float vector[4])(<4 x float> [[REG566]], <4 x float> [[REG567]]) +// CHECK-NEXT: [[REG568:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_cmpgt(float vector[4], float vector[4])(<4 x float> frozen [[REG566]], <4 x float> frozen [[REG567]]) // CHECK-NEXT: store <4 x i32> [[REG568]], <4 x i32>* [[REG569:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG570:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG565]], align 16 // CHECK-NEXT: [[REG571:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG564]], align 16 // CHECK-NEXT: [[REG572:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* [[REG569]], align 16 -// CHECK-NEXT: [[REG573:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_sel(float vector[4], float vector[4], bool vector[4])(<4 x float> [[REG570]], <4 x float> [[REG571]], <4 x i32> [[REG572]]) +// CHECK-NEXT: [[REG573:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_sel(float vector[4], float vector[4], bool vector[4])(<4 x float> frozen [[REG570]], <4 x float> frozen [[REG571]], <4 x i32> frozen [[REG572]]) // CHECK-NEXT: ret <4 x float> [[REG573]] -// CHECK: define available_externally <4 x float> @_mm_min_ss -// CHECK: [[REG574:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_splat(float vector[4], unsigned int)(<4 x float> {{[0-9a-zA-Z_%.]+}}, {{i32|i32 zeroext}} 0) +// CHECK: define available_externally frozen <4 x float> @_mm_min_ss +// CHECK: [[REG574:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_splat(float vector[4], unsigned int)(<4 x float> frozen {{[0-9a-zA-Z_%.]+}}, i32 frozen {{(zeroext )?}}0) // CHECK-NEXT: store <4 x float> [[REG574]], <4 x float>* [[REG575:[0-9a-zA-Z_%.]+]], align 16 -// CHECK: [[REG576:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_splat(float vector[4], unsigned int)(<4 x float> {{[0-9a-zA-Z_%.]+}}, {{i32|i32 zeroext}} 0) +// CHECK: [[REG576:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_splat(float vector[4], unsigned int)(<4 x float> frozen {{[0-9a-zA-Z_%.]+}}, i32 frozen {{(zeroext )?}}0) // CHECK-NEXT: store <4 x float> [[REG576]], <4 x float>* [[REG577:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG578:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG575]], align 16 // CHECK-NEXT: [[REG579:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG577]], align 16 -// CHECK-NEXT: call <4 x float> @vec_min(float vector[4], float vector[4])(<4 x float> [[REG578]], <4 x float> [[REG579]]) -// CHECK: [[REG580:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_sel(float vector[4], float vector[4], unsigned int vector[4])(<4 x float> {{[0-9a-zA-Z_%.]+}}, <4 x float> {{[0-9a-zA-Z_%.]+}}, <4 x i32> ) +// CHECK-NEXT: call frozen <4 x float> @vec_min(float vector[4], float vector[4])(<4 x float> frozen [[REG578]], <4 x float> frozen [[REG579]]) +// CHECK: [[REG580:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_sel(float vector[4], float vector[4], unsigned int vector[4])(<4 x float> frozen {{[0-9a-zA-Z_%.]+}}, <4 x float> frozen {{[0-9a-zA-Z_%.]+}}, <4 x i32> frozen ) // CHECK-NEXT: ret <4 x float> [[REG580]] -// CHECK: define available_externally i64 @_mm_min_pi16 +// CHECK: define available_externally frozen i64 @_mm_min_pi16 // CHECK: [[REG581:[0-9a-zA-Z_%.]+]] = load i64, i64* {{[0-9a-zA-Z_%.]+}}, align 8 -// CHECK-NEXT: [[REG582:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_splats(unsigned long long)(i64 [[REG581]]) +// CHECK-NEXT: [[REG582:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_splats(unsigned long long)(i64 frozen [[REG581]]) // CHECK-NEXT: [[REG583:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG582]] to <8 x i16> // CHECK-NEXT: store <8 x i16> [[REG583]], <8 x i16>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG584:[0-9a-zA-Z_%.]+]] = load i64, i64* {{[0-9a-zA-Z_%.]+}}, align 8 -// CHECK-NEXT: [[REG585:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_splats(unsigned long long)(i64 [[REG584]]) +// CHECK-NEXT: [[REG585:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_splats(unsigned long long)(i64 frozen [[REG584]]) // CHECK-NEXT: [[REG586:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG585]] to <8 x i16> // CHECK-NEXT: store <8 x i16> [[REG586]], <8 x i16>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG587:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG588:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* {{[0-9a-zA-Z_%.]+}}, align 16 -// CHECK-NEXT: [[REG589:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_cmplt(short vector[8], short vector[8])(<8 x i16> [[REG587]], <8 x i16> [[REG588]]) +// CHECK-NEXT: [[REG589:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_cmplt(short vector[8], short vector[8])(<8 x i16> frozen [[REG587]], <8 x i16> frozen [[REG588]]) // CHECK-NEXT: store <8 x i16> [[REG589]], <8 x i16>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG590:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG591:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG592:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* {{[0-9a-zA-Z_%.]+}}, align 16 -// CHECK-NEXT: [[REG593:[0-9a-zA-Z_%.]+]] = call <8 x i16> @vec_sel(short vector[8], short vector[8], bool vector[8])(<8 x i16> [[REG590]], <8 x i16> [[REG591]], <8 x i16> [[REG592]]) +// CHECK-NEXT: [[REG593:[0-9a-zA-Z_%.]+]] = call frozen <8 x i16> @vec_sel(short vector[8], short vector[8], bool vector[8])(<8 x i16> frozen [[REG590]], <8 x i16> frozen [[REG591]], <8 x i16> frozen [[REG592]]) // CHECK-NEXT: store <8 x i16> [[REG593]], <8 x i16>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG594:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG595:[0-9a-zA-Z_%.]+]] = bitcast <8 x i16> [[REG594]] to <2 x i64> // CHECK-NEXT: [[REG596:[0-9a-zA-Z_%.]+]] = extractelement <2 x i64> [[REG595]], i32 0 // CHECK-NEXT: ret i64 [[REG596]] -// CHECK: define available_externally i64 @_mm_min_pu8 +// CHECK: define available_externally frozen i64 @_mm_min_pu8 // CHECK: [[REG597:[0-9a-zA-Z_%.]+]] = load i64, i64* {{[0-9a-zA-Z_%.]+}}, align 8 -// CHECK-NEXT: [[REG598:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_splats(unsigned long long)(i64 [[REG597]]) +// CHECK-NEXT: [[REG598:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_splats(unsigned long long)(i64 frozen [[REG597]]) // CHECK-NEXT: [[REG599:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG598]] to <16 x i8> // CHECK-NEXT: store <16 x i8> [[REG599]], <16 x i8>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG600:[0-9a-zA-Z_%.]+]] = load i64, i64* {{[0-9a-zA-Z_%.]+}}, align 8 -// CHECK-NEXT: [[REG601:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_splats(unsigned long long)(i64 [[REG600]]) +// CHECK-NEXT: [[REG601:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_splats(unsigned long long)(i64 frozen [[REG600]]) // CHECK-NEXT: [[REG602:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG601]] to <16 x i8> // CHECK-NEXT: store <16 x i8> [[REG602]], <16 x i8>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG603:[0-9a-zA-Z_%.]+]] = load <16 x i8>, <16 x i8>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG604:[0-9a-zA-Z_%.]+]] = load <16 x i8>, <16 x i8>* {{[0-9a-zA-Z_%.]+}}, align 16 -// CHECK-NEXT: [[REG605:[0-9a-zA-Z_%.]+]] = call <16 x i8> @vec_cmplt(unsigned char vector[16], unsigned char vector[16])(<16 x i8> [[REG603]], <16 x i8> [[REG604]]) +// CHECK-NEXT: [[REG605:[0-9a-zA-Z_%.]+]] = call frozen <16 x i8> @vec_cmplt(unsigned char vector[16], unsigned char vector[16])(<16 x i8> frozen [[REG603]], <16 x i8> frozen [[REG604]]) // CHECK-NEXT: store <16 x i8> [[REG605]], <16 x i8>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG606:[0-9a-zA-Z_%.]+]] = load <16 x i8>, <16 x i8>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG607:[0-9a-zA-Z_%.]+]] = load <16 x i8>, <16 x i8>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG608:[0-9a-zA-Z_%.]+]] = load <16 x i8>, <16 x i8>* {{[0-9a-zA-Z_%.]+}}, align 16 -// CHECK-NEXT: [[REG609:[0-9a-zA-Z_%.]+]] = call <16 x i8> @vec_sel(unsigned char vector[16], unsigned char vector[16], bool vector[16])(<16 x i8> [[REG606]], <16 x i8> [[REG607]], <16 x i8> [[REG608]]) +// CHECK-NEXT: [[REG609:[0-9a-zA-Z_%.]+]] = call frozen <16 x i8> @vec_sel(unsigned char vector[16], unsigned char vector[16], bool vector[16])(<16 x i8> frozen [[REG606]], <16 x i8> frozen [[REG607]], <16 x i8> frozen [[REG608]]) // CHECK-NEXT: store <16 x i8> [[REG609]], <16 x i8>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG610:[0-9a-zA-Z_%.]+]] = load <16 x i8>, <16 x i8>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG611:[0-9a-zA-Z_%.]+]] = bitcast <16 x i8> [[REG610]] to <2 x i64> @@ -1228,12 +1228,12 @@ // CHECK-LABEL: @test_alt_name_min -// CHECK: define available_externally i64 @_m_pminsw -// CHECK: [[REG613:[0-9a-zA-Z_%.]+]] = call i64 @_mm_min_pi16 +// CHECK: define available_externally frozen i64 @_m_pminsw +// CHECK: [[REG613:[0-9a-zA-Z_%.]+]] = call frozen i64 @_mm_min_pi16 // CHECK-NEXT: ret i64 [[REG613]] -// CHECK: define available_externally i64 @_m_pminub -// CHECK: [[REG614:[0-9a-zA-Z_%.]+]] = call i64 @_mm_min_pu8 +// CHECK: define available_externally frozen i64 @_m_pminub +// CHECK: [[REG614:[0-9a-zA-Z_%.]+]] = call frozen i64 @_mm_min_pu8 // CHECK-NEXT: ret i64 [[REG614]] void __attribute__((noinline)) @@ -1263,7 +1263,7 @@ // CHECK-NEXT: [[REG620:[0-9a-zA-Z_%.]+]] = load i64, i64* {{[0-9a-zA-Z_%.]+}}, align 8 // CHECK-NEXT: [[REG621:[0-9a-zA-Z_%.]+]] = and i64 [[REG619]], [[REG620]] // CHECK-NEXT: [[REG622:[0-9a-zA-Z_%.]+]] = load i64, i64* {{[0-9a-zA-Z_%.]+}}, align 8 -// CHECK-NEXT: [[REG623:[0-9a-zA-Z_%.]+]] = call i64 @_mm_cmpeq_pi8(i64 [[REG621]], i64 [[REG622]]) +// CHECK-NEXT: [[REG623:[0-9a-zA-Z_%.]+]] = call frozen i64 @_mm_cmpeq_pi8(i64 frozen [[REG621]], i64 frozen [[REG622]]) // CHECK-NEXT: store i64 [[REG623]], i64* {{[0-9a-zA-Z_%.]+}}, align 8 // CHECK-NEXT: [[REG624:[0-9a-zA-Z_%.]+]] = load i64, i64* {{[0-9a-zA-Z_%.]+}}, align 8 // CHECK-NEXT: [[REG625:[0-9a-zA-Z_%.]+]] = load i64, i64* {{[0-9a-zA-Z_%.]+}}, align 8 @@ -1279,37 +1279,37 @@ // CHECK-NEXT: store i64 [[REG632]], i64* [[REG633]], align 8 // CHECK-NEXT: ret void -// CHECK: define available_externally <4 x float> @_mm_move_ss +// CHECK: define available_externally frozen <4 x float> @_mm_move_ss // CHECK: store <4 x float> {{[0-9a-zA-Z_%.]+}}, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: store <4 x float> {{[0-9a-zA-Z_%.]+}}, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG634:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG635:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 -// CHECK-NEXT: [[REG636:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_sel(float vector[4], float vector[4], unsigned int vector[4])(<4 x float> [[REG634]], <4 x float> [[REG635]], <4 x i32> ) +// CHECK-NEXT: [[REG636:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_sel(float vector[4], float vector[4], unsigned int vector[4])(<4 x float> frozen [[REG634]], <4 x float> frozen [[REG635]], <4 x i32> frozen ) // CHECK-NEXT: ret <4 x float> [[REG636]] -// CHECK: define available_externally <4 x float> @_mm_movehl_ps +// CHECK: define available_externally frozen <4 x float> @_mm_movehl_ps // CHECK: store <4 x float> {{[0-9a-zA-Z_%.]+}}, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: store <4 x float> {{[0-9a-zA-Z_%.]+}}, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG637:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG638:[0-9a-zA-Z_%.]+]] = bitcast <4 x float> [[REG637]] to <2 x i64> // CHECK-NEXT: [[REG639:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG640:[0-9a-zA-Z_%.]+]] = bitcast <4 x float> [[REG639]] to <2 x i64> -// CHECK-NEXT: [[REG641:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_mergel(unsigned long long vector[2], unsigned long long vector[2])(<2 x i64> [[REG638]], <2 x i64> [[REG640]]) +// CHECK-NEXT: [[REG641:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_mergel(unsigned long long vector[2], unsigned long long vector[2])(<2 x i64> frozen [[REG638]], <2 x i64> frozen [[REG640]]) // CHECK-NEXT: [[REG642:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG641]] to <4 x float> // CHECK-NEXT: ret <4 x float> [[REG642]] -// CHECK: define available_externally <4 x float> @_mm_movelh_ps +// CHECK: define available_externally frozen <4 x float> @_mm_movelh_ps // CHECK: store <4 x float> {{[0-9a-zA-Z_%.]+}}, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: store <4 x float> {{[0-9a-zA-Z_%.]+}}, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG643:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG644:[0-9a-zA-Z_%.]+]] = bitcast <4 x float> [[REG643]] to <2 x i64> // CHECK-NEXT: [[REG645:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG646:[0-9a-zA-Z_%.]+]] = bitcast <4 x float> [[REG645]] to <2 x i64> -// CHECK-NEXT: [[REG647:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_mergeh(unsigned long long vector[2], unsigned long long vector[2])(<2 x i64> [[REG644]], <2 x i64> [[REG646]]) +// CHECK-NEXT: [[REG647:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_mergeh(unsigned long long vector[2], unsigned long long vector[2])(<2 x i64> frozen [[REG644]], <2 x i64> frozen [[REG646]]) // CHECK-NEXT: [[REG648:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG647]] to <4 x float> // CHECK-NEXT: ret <4 x float> [[REG648]] -// CHECK: define available_externally signext i32 @_mm_movemask_pi8 +// CHECK: define available_externally frozen signext i32 @_mm_movemask_pi8 // CHECK: store i64 {{[0-9a-zA-Z_%.]+}}, i64* {{[0-9a-zA-Z_%.]+}}, align 8 // CHECK-LE-NEXT: store i64 2269495618449464, i64* {{[0-9a-zA-Z_%.]+}}, align 8 // CHECK-BE-NEXT: store i64 4048780183313844224, i64* {{[0-9a-zA-Z_%.]+}}, align 8 @@ -1319,12 +1319,12 @@ // CHECK-NEXT: [[REG652:[0-9a-zA-Z_%.]+]] = trunc i64 [[REG651]] to i32 // CHECK-NEXT: ret i32 [[REG652]] -// CHECK: define available_externally signext i32 @_mm_movemask_ps +// CHECK: define available_externally frozen signext i32 @_mm_movemask_ps // CHECK: store <4 x float> {{[0-9a-zA-Z_%.]+}}, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG653:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG654:[0-9a-zA-Z_%.]+]] = bitcast <4 x float> [[REG653]] to <16 x i8> -// CHECK-LE-NEXT: [[REG655:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_vbpermq(unsigned char vector[16], unsigned char vector[16])(<16 x i8> [[REG654]], <16 x i8> bitcast (<4 x i32> to <16 x i8>)) -// CHECK-BE-NEXT: [[REG655:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_vbpermq(unsigned char vector[16], unsigned char vector[16])(<16 x i8> [[REG654]], <16 x i8> bitcast (<4 x i32> to <16 x i8>)) +// CHECK-LE-NEXT: [[REG655:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_vbpermq(unsigned char vector[16], unsigned char vector[16])(<16 x i8> frozen [[REG654]], <16 x i8> frozen bitcast (<4 x i32> to <16 x i8>)) +// CHECK-BE-NEXT: [[REG655:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_vbpermq(unsigned char vector[16], unsigned char vector[16])(<16 x i8> frozen [[REG654]], <16 x i8> frozen bitcast (<4 x i32> to <16 x i8>)) // CHECK-NEXT: store <2 x i64> [[REG655]], <2 x i64>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG656:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-LE-NEXT: [[REG657:[0-9a-zA-Z_%.]+]] = extractelement <2 x i64> [[REG656]], i32 1 @@ -1340,8 +1340,8 @@ // CHECK-LABEL: @test_alt_name_move -// CHECK: define available_externally signext i32 @_m_pmovmskb -// CHECK: [[REG659:[0-9a-zA-Z_%.]+]] = call signext i32 @_mm_movemask_pi8 +// CHECK: define available_externally frozen signext i32 @_m_pmovmskb +// CHECK: [[REG659:[0-9a-zA-Z_%.]+]] = call frozen signext i32 @_mm_movemask_pi8 // CHECK-NEXT: ret i32 [[REG659]] // CHECK: define available_externally void @_m_maskmovq @@ -1358,7 +1358,7 @@ // CHECK-LABEL: @test_mul -// CHECK: define available_externally <4 x float> @_mm_mul_ps(<4 x float> [[REG660:[0-9a-zA-Z_%.]+]], <4 x float> [[REG661:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <4 x float> @_mm_mul_ps(<4 x float> frozen [[REG660:[0-9a-zA-Z_%.]+]], <4 x float> frozen [[REG661:[0-9a-zA-Z_%.]+]]) // CHECK: store <4 x float> [[REG660]], <4 x float>* [[REG662:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <4 x float> [[REG661]], <4 x float>* [[REG663:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG664:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG662]], align 16 @@ -1366,14 +1366,14 @@ // CHECK-NEXT: [[REG666:[0-9a-zA-Z_%.]+]] = fmul <4 x float> [[REG664]], [[REG665]] // CHECK-NEXT: ret <4 x float> [[REG666]] -// CHECK: define available_externally <4 x float> @_mm_mul_ss(<4 x float> [[REG667:[0-9a-zA-Z_%.]+]], <4 x float> [[REG668:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <4 x float> @_mm_mul_ss(<4 x float> frozen [[REG667:[0-9a-zA-Z_%.]+]], <4 x float> frozen [[REG668:[0-9a-zA-Z_%.]+]]) // CHECK: store <4 x float> [[REG667]], <4 x float>* [[REG669:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <4 x float> [[REG668]], <4 x float>* [[REG670:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG671:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG669]], align 16 -// CHECK-NEXT: [[REG672:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_splat(float vector[4], unsigned int)(<4 x float> [[REG671]], i32 zeroext 0) +// CHECK-NEXT: [[REG672:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_splat(float vector[4], unsigned int)(<4 x float> frozen [[REG671]], i32 frozen zeroext 0) // CHECK-NEXT: store <4 x float> [[REG672]], <4 x float>* [[REG673:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG674:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG670]], align 16 -// CHECK-NEXT: [[REG675:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_splat(float vector[4], unsigned int)(<4 x float> [[REG674]], i32 zeroext 0) +// CHECK-NEXT: [[REG675:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_splat(float vector[4], unsigned int)(<4 x float> frozen [[REG674]], i32 frozen zeroext 0) // CHECK-NEXT: store <4 x float> [[REG675]], <4 x float>* [[REG676:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG677:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG673]], align 16 // CHECK-NEXT: [[REG678:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG676]], align 16 @@ -1381,34 +1381,34 @@ // CHECK-NEXT: store <4 x float> [[REG679]], <4 x float>* [[REG680:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG681:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG669]], align 16 // CHECK-NEXT: [[REG682:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG680]], align 16 -// CHECK-NEXT: [[REG683:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_sel(float vector[4], float vector[4], unsigned int vector[4])(<4 x float> [[REG681]], <4 x float> [[REG682]], <4 x i32> ) +// CHECK-NEXT: [[REG683:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_sel(float vector[4], float vector[4], unsigned int vector[4])(<4 x float> frozen [[REG681]], <4 x float> frozen [[REG682]], <4 x i32> frozen ) // CHECK-NEXT: ret <4 x float> [[REG683]] -// CHECK: define available_externally i64 @_mm_mulhi_pu16(i64 [[REG684:[0-9a-zA-Z_%.]+]], i64 [[REG685:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen i64 @_mm_mulhi_pu16(i64 frozen [[REG684:[0-9a-zA-Z_%.]+]], i64 frozen [[REG685:[0-9a-zA-Z_%.]+]]) // CHECK: store i64 [[REG684]], i64* [[REG686:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: store i64 [[REG685]], i64* [[REG687:[0-9a-zA-Z_%.]+]], align 8 // CHECK-LE-NEXT: store <16 x i8> , <16 x i8>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-BE-NEXT: store <16 x i8> , <16 x i8>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG688:[0-9a-zA-Z_%.]+]] = load i64, i64* [[REG686]], align 8 -// CHECK-NEXT: [[REG689:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_splats(unsigned long long)(i64 [[REG688]]) +// CHECK-NEXT: [[REG689:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_splats(unsigned long long)(i64 frozen [[REG688]]) // CHECK-NEXT: [[REG690:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG689]] to <8 x i16> // CHECK-NEXT: store <8 x i16> [[REG690]], <8 x i16>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG691:[0-9a-zA-Z_%.]+]] = load i64, i64* [[REG687]], align 8 -// CHECK-NEXT: [[REG692:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_splats(unsigned long long)(i64 [[REG691]]) +// CHECK-NEXT: [[REG692:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_splats(unsigned long long)(i64 frozen [[REG691]]) // CHECK-NEXT: [[REG693:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG692]] to <8 x i16> // CHECK-NEXT: store <8 x i16> [[REG693]], <8 x i16>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG694:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG695:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* {{[0-9a-zA-Z_%.]+}}, align 16 -// CHECK-NEXT: [[REG696:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_vmuleuh(<8 x i16> [[REG694]], <8 x i16> [[REG695]]) +// CHECK-NEXT: [[REG696:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_vmuleuh(<8 x i16> frozen [[REG694]], <8 x i16> frozen [[REG695]]) // CHECK-NEXT: store <4 x i32> [[REG696]], <4 x i32>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG697:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG698:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* {{[0-9a-zA-Z_%.]+}}, align 16 -// CHECK-NEXT: [[REG699:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_vmulouh(<8 x i16> [[REG697]], <8 x i16> [[REG698]]) +// CHECK-NEXT: [[REG699:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_vmulouh(<8 x i16> frozen [[REG697]], <8 x i16> frozen [[REG698]]) // CHECK-NEXT: store <4 x i32> [[REG699]], <4 x i32>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG700:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG701:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG702:[0-9a-zA-Z_%.]+]] = load <16 x i8>, <16 x i8>* {{[0-9a-zA-Z_%.]+}}, align 16 -// CHECK-NEXT: [[REG703:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_perm(unsigned int vector[4], unsigned int vector[4], unsigned char vector[16])(<4 x i32> [[REG700]], <4 x i32> [[REG701]], <16 x i8> [[REG702]]) +// CHECK-NEXT: [[REG703:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_perm(unsigned int vector[4], unsigned int vector[4], unsigned char vector[16])(<4 x i32> frozen [[REG700]], <4 x i32> frozen [[REG701]], <16 x i8> frozen [[REG702]]) // CHECK-NEXT: [[REG704:[0-9a-zA-Z_%.]+]] = bitcast <4 x i32> [[REG703]] to <8 x i16> // CHECK-NEXT: store <8 x i16> [[REG704]], <8 x i16>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG705:[0-9a-zA-Z_%.]+]] = load <8 x i16>, <8 x i16>* {{[0-9a-zA-Z_%.]+}}, align 16 @@ -1416,12 +1416,12 @@ // CHECK-NEXT: [[REG707:[0-9a-zA-Z_%.]+]] = extractelement <2 x i64> [[REG706]], i32 0 // CHECK-NEXT: ret i64 [[REG707]] -// CHECK: define available_externally i64 @_m_pmulhuw(i64 [[REG708:[0-9a-zA-Z_%.]+]], i64 [[REG709:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen i64 @_m_pmulhuw(i64 frozen [[REG708:[0-9a-zA-Z_%.]+]], i64 frozen [[REG709:[0-9a-zA-Z_%.]+]]) // CHECK: store i64 [[REG708]], i64* [[REG710:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: store i64 [[REG709]], i64* [[REG711:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: [[REG712:[0-9a-zA-Z_%.]+]] = load i64, i64* [[REG710]], align 8 // CHECK-NEXT: [[REG713:[0-9a-zA-Z_%.]+]] = load i64, i64* [[REG711]], align 8 -// CHECK-NEXT: [[REG714:[0-9a-zA-Z_%.]+]] = call i64 @_mm_mulhi_pu16(i64 [[REG712]], i64 [[REG713]]) +// CHECK-NEXT: [[REG714:[0-9a-zA-Z_%.]+]] = call frozen i64 @_mm_mulhi_pu16(i64 frozen [[REG712]], i64 frozen [[REG713]]) // CHECK-NEXT: ret i64 [[REG714]] void __attribute__((noinline)) @@ -1446,23 +1446,23 @@ // CHECK-LABEL: @test_rcp -// CHECK: define available_externally <4 x float> @_mm_rcp_ps +// CHECK: define available_externally frozen <4 x float> @_mm_rcp_ps // CHECK: store <4 x float> {{[0-9a-zA-Z_%.]+}}, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG716:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 -// CHECK-NEXT: [[REG717:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_re(float vector[4])(<4 x float> [[REG716]]) +// CHECK-NEXT: [[REG717:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_re(float vector[4])(<4 x float> frozen [[REG716]]) // CHECK-NEXT: ret <4 x float> [[REG717]] -// CHECK: define available_externally <4 x float> @_mm_rcp_ss +// CHECK: define available_externally frozen <4 x float> @_mm_rcp_ss // CHECK: store <4 x float> {{[0-9a-zA-Z_%.]+}}, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG718:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 -// CHECK-NEXT: [[REG719:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_splat(float vector[4], unsigned int)(<4 x float> [[REG718]], i32 zeroext 0) +// CHECK-NEXT: [[REG719:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_splat(float vector[4], unsigned int)(<4 x float> frozen [[REG718]], i32 frozen zeroext 0) // CHECK-NEXT: store <4 x float> [[REG719]], <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG720:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 -// CHECK-NEXT: [[REG721:[0-9a-zA-Z_%.]+]] = call <4 x float> @_mm_rcp_ps(<4 x float> [[REG720]]) +// CHECK-NEXT: [[REG721:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @_mm_rcp_ps(<4 x float> frozen [[REG720]]) // CHECK-NEXT: store <4 x float> [[REG721]], <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG722:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG723:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 -// CHECK-NEXT: [[REG724:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_sel(float vector[4], float vector[4], unsigned int vector[4])(<4 x float> [[REG722]], <4 x float> [[REG723]], <4 x i32> ) +// CHECK-NEXT: [[REG724:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_sel(float vector[4], float vector[4], unsigned int vector[4])(<4 x float> frozen [[REG722]], <4 x float> frozen [[REG723]], <4 x i32> frozen ) // CHECK-NEXT: ret <4 x float> [[REG724]] void __attribute__((noinline)) @@ -1473,19 +1473,19 @@ // CHECK-LABEL: @test_rsqrt -// CHECK: define available_externally <4 x float> @_mm_rsqrt_ps -// CHECK: [[REG725:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_rsqrte(float vector[4])(<4 x float> {{[0-9a-zA-Z_%.]+}}) +// CHECK: define available_externally frozen <4 x float> @_mm_rsqrt_ps +// CHECK: [[REG725:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_rsqrte(float vector[4])(<4 x float> frozen {{[0-9a-zA-Z_%.]+}}) // CHECK-NEXT: ret <4 x float> [[REG725]] -// CHECK: define available_externally <4 x float> @_mm_rsqrt_ss -// CHECK: [[REG726:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_splat(float vector[4], unsigned int)(<4 x float> {{[0-9a-zA-Z_%.]+}}, i32 zeroext 0) +// CHECK: define available_externally frozen <4 x float> @_mm_rsqrt_ss +// CHECK: [[REG726:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_splat(float vector[4], unsigned int)(<4 x float> frozen {{[0-9a-zA-Z_%.]+}}, i32 frozen zeroext 0) // CHECK-NEXT: store <4 x float> [[REG726]], <4 x float>* [[REG727:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG728:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG727]], align 16 -// CHECK-NEXT: [[REG729:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_rsqrte(float vector[4])(<4 x float> [[REG728]]) +// CHECK-NEXT: [[REG729:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_rsqrte(float vector[4])(<4 x float> frozen [[REG728]]) // CHECK-NEXT: store <4 x float> [[REG729]], <4 x float>* [[REG730:[0-9a-zA_Z_%.]+]], align 16 // CHECK-NEXT: [[REG731:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG732:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG730]], align 16 -// CHECK-NEXT: [[REG733:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_sel(float vector[4], float vector[4], unsigned int vector[4])(<4 x float> [[REG731]], <4 x float> [[REG732]], <4 x i32> ) +// CHECK-NEXT: [[REG733:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_sel(float vector[4], float vector[4], unsigned int vector[4])(<4 x float> frozen [[REG731]], <4 x float> frozen [[REG732]], <4 x i32> frozen ) // CHECK-NEXT: ret <4 x float> [[REG733]] void __attribute__((noinline)) @@ -1496,7 +1496,7 @@ // CHECK-LABEL: @test_sad -// CHECK: define available_externally i64 @_mm_sad_pu8(i64 [[REG734:[0-9a-zA-Z_%.]+]], i64 [[REG735:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen i64 @_mm_sad_pu8(i64 frozen [[REG734:[0-9a-zA-Z_%.]+]], i64 frozen [[REG735:[0-9a-zA-Z_%.]+]]) // CHECK: store i64 [[REG734]], i64* [[REG736:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: store i64 [[REG735]], i64* [[REG737:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: store <4 x i32> zeroinitializer, <4 x i32>* {{[0-9a-zA-Z_%.]+}}, align 16 @@ -1516,21 +1516,21 @@ // CHECK-NEXT: store <16 x i8> [[REG746]], <16 x i8>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG747:[0-9a-zA-Z_%.]+]] = load <16 x i8>, <16 x i8>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG748:[0-9a-zA-Z_%.]+]] = load <16 x i8>, <16 x i8>* {{[0-9a-zA-Z_%.]+}}, align 16 -// CHECK-NEXT: [[REG749:[0-9a-zA-Z_%.]+]] = call <16 x i8> @vec_min(unsigned char vector[16], unsigned char vector[16])(<16 x i8> [[REG747]], <16 x i8> [[REG748]]) +// CHECK-NEXT: [[REG749:[0-9a-zA-Z_%.]+]] = call frozen <16 x i8> @vec_min(unsigned char vector[16], unsigned char vector[16])(<16 x i8> frozen [[REG747]], <16 x i8> frozen [[REG748]]) // CHECK-NEXT: store <16 x i8> [[REG749]], <16 x i8>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG750:[0-9a-zA-Z_%.]+]] = load <16 x i8>, <16 x i8>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG751:[0-9a-zA-Z_%.]+]] = load <16 x i8>, <16 x i8>* {{[0-9a-zA-Z_%.]+}}, align 16 -// CHECK-NEXT: [[REG752:[0-9a-zA-Z_%.]+]] = call <16 x i8> @vec_max(unsigned char vector[16], unsigned char vector[16])(<16 x i8> [[REG750]], <16 x i8> [[REG751]]) +// CHECK-NEXT: [[REG752:[0-9a-zA-Z_%.]+]] = call frozen <16 x i8> @vec_max(unsigned char vector[16], unsigned char vector[16])(<16 x i8> frozen [[REG750]], <16 x i8> frozen [[REG751]]) // CHECK-NEXT: store <16 x i8> [[REG752]], <16 x i8>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG753:[0-9a-zA-Z_%.]+]] = load <16 x i8>, <16 x i8>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG754:[0-9a-zA-Z_%.]+]] = load <16 x i8>, <16 x i8>* {{[0-9a-zA-Z_%.]+}}, align 16 -// CHECK-NEXT: [[REG755:[0-9a-zA-Z_%.]+]] = call <16 x i8> @vec_sub(unsigned char vector[16], unsigned char vector[16])(<16 x i8> [[REG753]], <16 x i8> [[REG754]]) +// CHECK-NEXT: [[REG755:[0-9a-zA-Z_%.]+]] = call frozen <16 x i8> @vec_sub(unsigned char vector[16], unsigned char vector[16])(<16 x i8> frozen [[REG753]], <16 x i8> frozen [[REG754]]) // CHECK-NEXT: store <16 x i8> [[REG755]], <16 x i8>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG756:[0-9a-zA-Z_%.]+]] = load <16 x i8>, <16 x i8>* {{[0-9a-zA-Z_%.]+}}, align 16 -// CHECK-NEXT: [[REG757:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_sum4s(unsigned char vector[16], unsigned int vector[4])(<16 x i8> [[REG756]], <4 x i32> zeroinitializer) +// CHECK-NEXT: [[REG757:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_sum4s(unsigned char vector[16], unsigned int vector[4])(<16 x i8> frozen [[REG756]], <4 x i32> frozen zeroinitializer) // CHECK-NEXT: store <4 x i32> [[REG757]], <4 x i32>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG758:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* {{[0-9a-zA-Z_%.]+}}, align 16 -// CHECK-NEXT: [[REG759:[0-9a-zA-Z_%.]+]] = call <4 x i32> @vec_sums(<4 x i32> [[REG758]], <4 x i32> zeroinitializer) +// CHECK-NEXT: [[REG759:[0-9a-zA-Z_%.]+]] = call frozen <4 x i32> @vec_sums(<4 x i32> frozen [[REG758]], <4 x i32> frozen zeroinitializer) // CHECK-NEXT: store <4 x i32> [[REG759]], <4 x i32>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG760:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG761:[0-9a-zA-Z_%.]+]] = extractelement <4 x i32> [[REG760]], i32 3 @@ -1542,8 +1542,8 @@ // CHECK-NEXT: [[REG766:[0-9a-zA-Z_%.]+]] = load i64, i64* [[REG765]], align 8 // CHECK-NEXT: ret i64 [[REG766]] -// CHECK: define available_externally i64 @_m_psadbw -// CHECK: [[REG767:[0-9a-zA-Z_%.]+]] = call i64 @_mm_sad_pu8 +// CHECK: define available_externally frozen i64 @_m_psadbw +// CHECK: [[REG767:[0-9a-zA-Z_%.]+]] = call frozen i64 @_mm_sad_pu8 // CHECK-NEXT: ret i64 [[REG767]] void __attribute__((noinline)) @@ -1557,7 +1557,7 @@ // CHECK-LABEL: @test_set -// CHECK: define available_externally <4 x float> @_mm_set_ps(float [[REG768:[0-9a-zA-Z_%.]+]], float [[REG769:[0-9a-zA-Z_%.]+]], float [[REG770:[0-9a-zA-Z_%.]+]], float [[REG771:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <4 x float> @_mm_set_ps(float frozen [[REG768:[0-9a-zA-Z_%.]+]], float frozen [[REG769:[0-9a-zA-Z_%.]+]], float frozen [[REG770:[0-9a-zA-Z_%.]+]], float frozen [[REG771:[0-9a-zA-Z_%.]+]]) // CHECK: store float [[REG768]], float* [[REG772:[0-9a-zA-Z_%.]+]], align 4 // CHECK-NEXT: store float [[REG769]], float* [[REG773:[0-9a-zA-Z_%.]+]], align 4 // CHECK-NEXT: store float [[REG770]], float* [[REG774:[0-9a-zA-Z_%.]+]], align 4 @@ -1574,13 +1574,13 @@ // CHECK-NEXT: [[REG784:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: ret <4 x float> [[REG784]] -// CHECK: define available_externally <4 x float> @_mm_set_ps1(float [[REG785:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <4 x float> @_mm_set_ps1(float frozen [[REG785:[0-9a-zA-Z_%.]+]]) // CHECK: store float [[REG785]], float* [[REG786:[0-9a-zA-Z_%.]+]], align 4 // CHECK-NEXT: [[REG787:[0-9a-zA-Z_%.]+]] = load float, float* [[REG786]], align 4 -// CHECK-NEXT: [[REG788:[0-9a-zA-Z_%.]+]] = call <4 x float> @_mm_set1_ps(float [[REG787]]) +// CHECK-NEXT: [[REG788:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @_mm_set1_ps(float frozen [[REG787]]) // CHECK-NEXT: ret <4 x float> [[REG788]] -// CHECK: define available_externally <4 x float> @_mm_set_ss(float [[REG789:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <4 x float> @_mm_set_ss(float frozen [[REG789:[0-9a-zA-Z_%.]+]]) // CHECK: store float [[REG789:[0-9a-zA-Z_%.]+]], float* [[REG790:[0-9a-zA-Z_%.]+]], align 4 // CHECK-NEXT: [[REG791:[0-9a-zA-Z_%.]+]] = load float, float* [[REG790]], align 4 // CHECK-NEXT: [[REG792:[0-9a-zA-Z_%.]+]] = insertelement <4 x float> undef, float [[REG791]], i32 0 @@ -1591,7 +1591,7 @@ // CHECK-NEXT: [[REG797:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG796]], align 16 // CHECK-NEXT: ret <4 x float> [[REG797]] -// CHECK: define available_externally <4 x float> @_mm_set1_ps(float [[REG798:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <4 x float> @_mm_set1_ps(float frozen [[REG798:[0-9a-zA-Z_%.]+]]) // CHECK: store float [[REG798]], float* [[REG799:[0-9a-zA-Z_%.]+]], align 4 // CHECK-NEXT: [[REG800:[0-9a-zA-Z_%.]+]] = load float, float* [[REG799]], align 4 // CHECK-NEXT: [[REG801:[0-9a-zA-Z_%.]+]] = insertelement <4 x float> undef, float [[REG800]], i32 0 @@ -1605,7 +1605,7 @@ // CHECK-NEXT: [[REG809:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG808]], align 16 // CHECK-NEXT: ret <4 x float> [[REG809]] -// CHECK: define available_externally <4 x float> @_mm_setr_ps(float [[REG810:[0-9a-zA-Z_%.]+]], float [[REG811:[0-9a-zA-Z_%.]+]], float [[REG812:[0-9a-zA-Z_%.]+]], float [[REG813:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <4 x float> @_mm_setr_ps(float frozen [[REG810:[0-9a-zA-Z_%.]+]], float frozen [[REG811:[0-9a-zA-Z_%.]+]], float frozen [[REG812:[0-9a-zA-Z_%.]+]], float frozen [[REG813:[0-9a-zA-Z_%.]+]]) // CHECK: store float [[REG810]], float* [[REG814:[0-9a-zA-Z_%.]+]], align 4 // CHECK-NEXT: store float [[REG811]], float* [[REG815:[0-9a-zA-Z_%.]+]], align 4 // CHECK-NEXT: store float [[REG812]], float* [[REG816:[0-9a-zA-Z_%.]+]], align 4 @@ -1629,7 +1629,7 @@ // CHECK-LABEL: @test_setzero -// CHECK: define available_externally <4 x float> @_mm_setzero_ps +// CHECK: define available_externally frozen <4 x float> @_mm_setzero_ps // CHECK: store <4 x float> zeroinitializer, <4 x float>* [[REG827:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG828:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG827]], align 16 // CHECK-NEXT: ret <4 x float> [[REG828]] @@ -1654,7 +1654,7 @@ // CHECK-LABEL: @test_shuffle -// CHECK: define available_externally i64 @_mm_shuffle_pi16(i64 [[REG829:[0-9a-zA-Z_%.]+]], i32 signext [[REG830:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen i64 @_mm_shuffle_pi16(i64 frozen [[REG829:[0-9a-zA-Z_%.]+]], i32 frozen signext [[REG830:[0-9a-zA-Z_%.]+]]) // CHECK: store i64 [[REG829]], i64* [[REG831:[0-9a-zA-Z_%.]+]], align 8 // CHECK-NEXT: store i32 [[REG830]], i32* [[REG832:[0-9a-zA-Z_%.]+]], align 4 // CHECK-NEXT: [[REG833:[0-9a-zA-Z_%.]+]] = load i32, i32* [[REG832]], align 4 @@ -1706,22 +1706,22 @@ // CHECK-NEXT: store i16 [[REG865]], i16* [[REG867]] // CHECK-NEXT: [[REG868:[0-9a-zA-Z_%.]+]] = bitcast {{[0-9a-zA-Z_%.]+}}* {{[0-9a-zA-Z_%.]+}} to i64* // CHECK-NEXT: [[REG869:[0-9a-zA-Z_%.]+]] = load i64, i64* [[REG868]], align 8 -// CHECK-NEXT: [[REG870:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_splats(unsigned long long)(i64 [[REG869]]) +// CHECK-NEXT: [[REG870:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_splats(unsigned long long)(i64 frozen [[REG869]]) // CHECK-NEXT: store <2 x i64> [[REG870]], <2 x i64>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG871:[0-9a-zA-Z_%.]+]] = load i64, i64* [[REG831]], align 8 -// CHECK-NEXT: [[REG872:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_splats(unsigned long long)(i64 [[REG871]]) +// CHECK-NEXT: [[REG872:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_splats(unsigned long long)(i64 frozen [[REG871]]) // CHECK-NEXT: store <2 x i64> [[REG872]], <2 x i64>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG873:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG874:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG875:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG876:[0-9a-zA-Z_%.]+]] = bitcast <2 x i64> [[REG875]] to <16 x i8> -// CHECK-NEXT: [[REG877:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_perm(unsigned long long vector[2], unsigned long long vector[2], unsigned char vector[16])(<2 x i64> [[REG873]], <2 x i64> [[REG874]], <16 x i8> [[REG876]]) +// CHECK-NEXT: [[REG877:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_perm(unsigned long long vector[2], unsigned long long vector[2], unsigned char vector[16])(<2 x i64> frozen [[REG873]], <2 x i64> frozen [[REG874]], <16 x i8> frozen [[REG876]]) // CHECK-NEXT: store <2 x i64> [[REG877]], <2 x i64>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG878:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG879:[0-9a-zA-Z_%.]+]] = extractelement <2 x i64> [[REG878]], i32 0 // CHECK-NEXT: ret i64 [[REG879]] -// CHECK: define available_externally <4 x float> @_mm_shuffle_ps(<4 x float> [[REG880:[0-9a-zA-Z_%.]+]], <4 x float> [[REG881:[0-9a-zA-Z_%.]+]], i32 signext [[REG882:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <4 x float> @_mm_shuffle_ps(<4 x float> frozen [[REG880:[0-9a-zA-Z_%.]+]], <4 x float> frozen [[REG881:[0-9a-zA-Z_%.]+]], i32 frozen signext [[REG882:[0-9a-zA-Z_%.]+]]) // CHECK: store <4 x float> [[REG880]], <4 x float>* [[REG883:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <4 x float> [[REG881]], <4 x float>* [[REG884:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store i32 [[REG882]], i32* [[REG885:[0-9a-zA-Z_%.]+]], align 4 @@ -1774,11 +1774,11 @@ // CHECK-NEXT: [[REG924:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG925:[0-9a-zA-Z_%.]+]] = load <4 x i32>, <4 x i32>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG926:[0-9a-zA-Z_%.]+]] = bitcast <4 x i32> [[REG925]] to <16 x i8> -// CHECK-NEXT: [[REG927:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_perm(float vector[4], float vector[4], unsigned char vector[16])(<4 x float> [[REG923]], <4 x float> [[REG924]], <16 x i8> [[REG926]]) +// CHECK-NEXT: [[REG927:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_perm(float vector[4], float vector[4], unsigned char vector[16])(<4 x float> frozen [[REG923]], <4 x float> frozen [[REG924]], <16 x i8> frozen [[REG926]]) // CHECK-NEXT: ret <4 x float> [[REG927]] -// CHECK: define available_externally i64 @_m_pshufw -// CHECK: [[REG928:[0-9a-zA-Z_%.]+]] = call i64 @_mm_shuffle_pi16 +// CHECK: define available_externally frozen i64 @_m_pshufw +// CHECK: [[REG928:[0-9a-zA-Z_%.]+]] = call frozen i64 @_mm_shuffle_pi16 // CHECK-NEXT: ret i64 [[REG928]] void __attribute__((noinline)) @@ -1789,20 +1789,20 @@ // CHECK-LABEL: @test_sqrt -// CHECK: define available_externally <4 x float> @_mm_sqrt_ps -// CHECK: [[REG929:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_sqrt(float vector[4])(<4 x float> {{[0-9a-zA-Z_%.]+}}) +// CHECK: define available_externally frozen <4 x float> @_mm_sqrt_ps +// CHECK: [[REG929:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_sqrt(float vector[4])(<4 x float> frozen {{[0-9a-zA-Z_%.]+}}) // CHECK-NEXT: ret <4 x float> [[REG929]] -// CHECK: define available_externally <4 x float> @_mm_sqrt_ss +// CHECK: define available_externally frozen <4 x float> @_mm_sqrt_ss // CHECK: [[REG930:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 -// CHECK-NEXT: [[REG931:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_splat(float vector[4], unsigned int)(<4 x float> [[REG930]], i32 zeroext 0) +// CHECK-NEXT: [[REG931:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_splat(float vector[4], unsigned int)(<4 x float> frozen [[REG930]], i32 frozen zeroext 0) // CHECK-NEXT: store <4 x float> [[REG931]], <4 x float>* [[REG932:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG933:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG932]], align 16 -// CHECK-NEXT: [[REG934:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_sqrt(float vector[4])(<4 x float> [[REG933]]) +// CHECK-NEXT: [[REG934:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_sqrt(float vector[4])(<4 x float> frozen [[REG933]]) // CHECK-NEXT: store <4 x float> [[REG934]], <4 x float>* [[REG935:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG936:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG937:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG935]], align 16 -// CHECK-NEXT: [[REG938:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_sel(float vector[4], float vector[4], unsigned int vector[4])(<4 x float> [[REG936]], <4 x float> [[REG937]], <4 x i32> ) +// CHECK-NEXT: [[REG938:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_sel(float vector[4], float vector[4], unsigned int vector[4])(<4 x float> frozen [[REG936]], <4 x float> frozen [[REG937]], <4 x i32> frozen ) // CHECK-NEXT: ret <4 x float> [[REG938]] void __attribute__((noinline)) @@ -1824,7 +1824,7 @@ // CHECK-NEXT: [[REG939:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG940:[0-9a-zA-Z_%.]+]] = load float*, float** {{[0-9a-zA-Z_%.]+}}, align 8 // CHECK-NEXT: [[REG941:[0-9a-zA-Z_%.]+]] = bitcast float* [[REG940]] to <4 x float>* -// CHECK-NEXT: call void @vec_st(float vector[4], int, float vector[4]*)(<4 x float> [[REG939]], i32 signext 0, <4 x float>* [[REG941]]) +// CHECK-NEXT: call void @vec_st(float vector[4], int, float vector[4]*)(<4 x float> frozen [[REG939]], i32 frozen signext 0, <4 x float>* frozen [[REG941]]) // CHECK-NEXT: ret void // CHECK: define available_externally void @_mm_store_ps1 @@ -1832,7 +1832,7 @@ // CHECK-NEXT: store <4 x float> {{[0-9a-zA-Z_%.]+}}, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG942:[0-9a-zA-Z_%.]+]] = load float*, float** {{[0-9a-zA-Z_%.]+}}, align 8 // CHECK-NEXT: [[REG943:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 -// CHECK-NEXT: call void @_mm_store1_ps(float* [[REG942]], <4 x float> [[REG943]]) +// CHECK-NEXT: call void @_mm_store1_ps(float* frozen [[REG942]], <4 x float> frozen [[REG943]]) // CHECK-NEXT: ret void // CHECK: define available_externally void @_mm_store_ss @@ -1848,11 +1848,11 @@ // CHECK: store float* {{[0-9a-zA-Z_%.]+}}, float** {{[0-9a-zA-Z_%.]+}}, align 8 // CHECK-NEXT: store <4 x float> {{[0-9a-zA-Z_%.]+}}, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG947:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 -// CHECK-NEXT: [[REG948:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_splat(float vector[4], unsigned int)(<4 x float> [[REG947]], i32 zeroext 0) +// CHECK-NEXT: [[REG948:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_splat(float vector[4], unsigned int)(<4 x float> frozen [[REG947]], i32 frozen zeroext 0) // CHECK-NEXT: store <4 x float> [[REG948]], <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG949:[0-9a-zA-Z_%.]+]] = load float*, float** {{[0-9a-zA-Z_%.]+}}, align 8 // CHECK-NEXT: [[REG950:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 -// CHECK-NEXT: call void @_mm_store_ps(float* [[REG949]], <4 x float> [[REG950]]) +// CHECK-NEXT: call void @_mm_store_ps(float* frozen [[REG949]], <4 x float> frozen [[REG950]]) // CHECK-NEXT: ret void // CHECK: define available_externally void @_mm_storeh_pi @@ -1884,11 +1884,11 @@ // CHECK-NEXT: store <4 x float> {{[0-9a-zA-Z_%.]+}}, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG961:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG962:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 -// CHECK-NEXT: [[REG963:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_perm(float vector[4], float vector[4], unsigned char vector[16])(<4 x float> [[REG961]], <4 x float> [[REG962]], <16 x i8> ) +// CHECK-NEXT: [[REG963:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_perm(float vector[4], float vector[4], unsigned char vector[16])(<4 x float> frozen [[REG961]], <4 x float> frozen [[REG962]], <16 x i8> frozen ) // CHECK-NEXT: store <4 x float> [[REG963]], <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG964:[0-9a-zA-Z_%.]+]] = load float*, float** {{[0-9a-zA-Z_%.]+}}, align 8 // CHECK-NEXT: [[REG965:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 -// CHECK-NEXT: call void @_mm_store_ps(float* [[REG964]], <4 x float> [[REG965]]) +// CHECK-NEXT: call void @_mm_store_ps(float* frozen [[REG964]], <4 x float> frozen [[REG965]]) // CHECK-NEXT: ret void void __attribute__((noinline)) @@ -1903,7 +1903,7 @@ // CHECK: store i64* {{[0-9a-zA-Z_%.]+}}, i64** {{[0-9a-zA-Z_%.]+}}, align 8 // CHECK-NEXT: store i64 {{[0-9a-zA-Z_%.]+}}, i64* {{[0-9a-zA-Z_%.]+}}, align 8 // CHECK-NEXT: [[REG966:[0-9a-zA-Z_%.]+]] = load i64*, i64** {{[0-9a-zA-Z_%.]+}}, align 8 -// CHECK-NEXT: call void asm sideeffect "\09dcbtstt\090,$0", "b,~{memory}"(i64* [[REG966]]) +// CHECK-NEXT: call void asm sideeffect "\09dcbtstt\090,$0", "b,~{memory}"(i64* [[REG966]]) // CHECK-NEXT: [[REG967:[0-9a-zA-Z_%.]+]] = load i64, i64* {{[0-9a-zA-Z_%.]+}}, align 8 // CHECK-NEXT: [[REG968:[0-9a-zA-Z_%.]+]] = load i64*, i64** {{[0-9a-zA-Z_%.]+}}, align 8 // CHECK-NEXT: store i64 [[REG967]], i64* [[REG968]], align 8 @@ -1913,10 +1913,10 @@ // CHECK: store float* {{[0-9a-zA-Z_%.]+}}, float** {{[0-9a-zA-Z_%.]+}}, align 8 // CHECK-NEXT: store <4 x float> {{[0-9a-zA-Z_%.]+}}, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG969:[0-9a-zA-Z_%.]+]] = load float*, float** {{[0-9a-zA-Z_%.]+}}, align 8 -// CHECK-NEXT: call void asm sideeffect "\09dcbtstt\090,$0", "b,~{memory}"(float* [[REG969]]) +// CHECK-NEXT: call void asm sideeffect "\09dcbtstt\090,$0", "b,~{memory}"(float* [[REG969]]) // CHECK-NEXT: [[REG970:[0-9a-zA-Z_%.]+]] = load float*, float** {{[0-9a-zA-Z_%.]+}}, align 8 // CHECK-NEXT: [[REG971:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 -// CHECK-NEXT: call void @_mm_store_ps(float* [[REG970]], <4 x float> [[REG971]]) +// CHECK-NEXT: call void @_mm_store_ps(float* frozen [[REG970]], <4 x float> frozen [[REG971]]) // CHECK-NEXT: ret void void __attribute__((noinline)) @@ -1927,7 +1927,7 @@ // CHECK-LABEL: @test_sub -// CHECK: define available_externally <4 x float> @_mm_sub_ps(<4 x float> [[REG972:[0-9a-zA-Z_%.]+]], <4 x float> [[REG973:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <4 x float> @_mm_sub_ps(<4 x float> frozen [[REG972:[0-9a-zA-Z_%.]+]], <4 x float> frozen [[REG973:[0-9a-zA-Z_%.]+]]) // CHECK: store <4 x float> [[REG972]], <4 x float>* [[REG974:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <4 x float> [[REG973]], <4 x float>* [[REG975:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG976:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG974]], align 16 @@ -1935,14 +1935,14 @@ // CHECK-NEXT: [[REG978:[0-9a-zA-Z_%.]+]] = fsub <4 x float> [[REG976]], [[REG977]] // CHECK-NEXT: ret <4 x float> [[REG978]] -// CHECK: define available_externally <4 x float> @_mm_sub_ss(<4 x float> [[REG979:[0-9a-zA-Z_%.]+]], <4 x float> [[REG980:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <4 x float> @_mm_sub_ss(<4 x float> frozen [[REG979:[0-9a-zA-Z_%.]+]], <4 x float> frozen [[REG980:[0-9a-zA-Z_%.]+]]) // CHECK: store <4 x float> [[REG979]], <4 x float>* [[REG981:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <4 x float> [[REG980]], <4 x float>* [[REG982:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG983:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG981]], align 16 -// CHECK-NEXT: [[REG984:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_splat(float vector[4], unsigned int)(<4 x float> [[REG983]], i32 zeroext 0) +// CHECK-NEXT: [[REG984:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_splat(float vector[4], unsigned int)(<4 x float> frozen [[REG983]], i32 frozen zeroext 0) // CHECK-NEXT: store <4 x float> [[REG984]], <4 x float>* [[REG985:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG986:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG982]], align 16 -// CHECK-NEXT: [[REG987:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_splat(float vector[4], unsigned int)(<4 x float> [[REG986]], i32 zeroext 0) +// CHECK-NEXT: [[REG987:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_splat(float vector[4], unsigned int)(<4 x float> frozen [[REG986]], i32 frozen zeroext 0) // CHECK-NEXT: store <4 x float> [[REG987]], <4 x float>* [[REG988:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG989:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG985:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG990:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG988:[0-9a-zA-Z_%.]+]], align 16 @@ -1950,7 +1950,7 @@ // CHECK-NEXT: store <4 x float> [[REG991]], <4 x float>* [[REG992:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG993:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG981]], align 16 // CHECK-NEXT: [[REG994:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG992]], align 16 -// CHECK-NEXT: [[REG995:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_sel(float vector[4], float vector[4], unsigned int vector[4])(<4 x float> [[REG993]], <4 x float> [[REG994]], <4 x i32> ) +// CHECK-NEXT: [[REG995:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_sel(float vector[4], float vector[4], unsigned int vector[4])(<4 x float> frozen [[REG993]], <4 x float> frozen [[REG994]], <4 x i32> frozen ) // CHECK-NEXT: ret <4 x float> [[REG995]] void __attribute__((noinline)) @@ -1963,14 +1963,14 @@ // CHECK: br label %[[REG996:[0-9a-zA-Z_%.]+]] // CHECK: [[REG996]]: -// CHECK: [[REG997:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_vmrghw(float vector[4], float vector[4]) -// CHECK: [[REG998:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_vmrghw(float vector[4], float vector[4]) -// CHECK: [[REG999:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_vmrglw(float vector[4], float vector[4]) -// CHECK: [[REG1000:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_vmrglw(float vector[4], float vector[4]) -// CHECK: [[REG1001:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_mergeh(long long vector[2], long long vector[2]) -// CHECK: [[REG1002:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_mergel(long long vector[2], long long vector[2]) -// CHECK: [[REG1003:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_mergeh(long long vector[2], long long vector[2]) -// CHECK: [[REG1004:[0-9a-zA-Z_%.]+]] = call <2 x i64> @vec_mergel(long long vector[2], long long vector[2]) +// CHECK: [[REG997:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_vmrghw(float vector[4], float vector[4]) +// CHECK: [[REG998:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_vmrghw(float vector[4], float vector[4]) +// CHECK: [[REG999:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_vmrglw(float vector[4], float vector[4]) +// CHECK: [[REG1000:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_vmrglw(float vector[4], float vector[4]) +// CHECK: [[REG1001:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_mergeh(long long vector[2], long long vector[2]) +// CHECK: [[REG1002:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_mergel(long long vector[2], long long vector[2]) +// CHECK: [[REG1003:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_mergeh(long long vector[2], long long vector[2]) +// CHECK: [[REG1004:[0-9a-zA-Z_%.]+]] = call frozen <2 x i64> @vec_mergel(long long vector[2], long long vector[2]) // CHECK: ret void void __attribute__((noinline)) @@ -1985,7 +1985,7 @@ // CHECK-LABEL: @test_ucomi -// CHECK: define available_externally signext i32 @_mm_ucomieq_ss +// CHECK: define available_externally frozen signext i32 @_mm_ucomieq_ss // CHECK: store <4 x float> {{[0-9a-zA-Z_%.]+}}, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: store <4 x float> {{[0-9a-zA-Z_%.]+}}, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG1005:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 @@ -1996,7 +1996,7 @@ // CHECK-NEXT: [[REG1010:[0-9a-zA-Z_%.]+]] = zext i1 [[REG1009]] to i32 // CHECK-NEXT: ret i32 [[REG1010]] -// CHECK: define available_externally signext i32 @_mm_ucomige_ss +// CHECK: define available_externally frozen signext i32 @_mm_ucomige_ss // CHECK: store <4 x float> {{[0-9a-zA-Z_%.]+}}, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: store <4 x float> {{[0-9a-zA-Z_%.]+}}, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG1011:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 @@ -2007,7 +2007,7 @@ // CHECK-NEXT: [[REG1016:[0-9a-zA-Z_%.]+]] = zext i1 [[REG1015]] to i32 // CHECK-NEXT: ret i32 [[REG1016]] -// CHECK: define available_externally signext i32 @_mm_ucomigt_ss +// CHECK: define available_externally frozen signext i32 @_mm_ucomigt_ss // CHECK: store <4 x float> {{[0-9a-zA-Z_%.]+}}, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: store <4 x float> {{[0-9a-zA-Z_%.]+}}, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG1017:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 @@ -2018,7 +2018,7 @@ // CHECK-NEXT: [[REG1022:[0-9a-zA-Z_%.]+]] = zext i1 [[REG1021]] to i32 // CHECK-NEXT: ret i32 [[REG1022]] -// CHECK: define available_externally signext i32 @_mm_ucomile_ss +// CHECK: define available_externally frozen signext i32 @_mm_ucomile_ss // CHECK: store <4 x float> {{[0-9a-zA-Z_%.]+}}, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: store <4 x float> {{[0-9a-zA-Z_%.]+}}, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG1023:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 @@ -2029,7 +2029,7 @@ // CHECK-NEXT: [[REG1028:[0-9a-zA-Z_%.]+]] = zext i1 [[REG1027]] to i32 // CHECK-NEXT: ret i32 [[REG1028]] -// CHECK: define available_externally signext i32 @_mm_ucomilt_ss +// CHECK: define available_externally frozen signext i32 @_mm_ucomilt_ss // CHECK: store <4 x float> {{[0-9a-zA-Z_%.]+}}, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: store <4 x float> {{[0-9a-zA-Z_%.]+}}, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG1029:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 @@ -2040,7 +2040,7 @@ // CHECK-NEXT: [[REG1034:[0-9a-zA-Z_%.]+]] = zext i1 [[REG1033]] to i32 // CHECK-NEXT: ret i32 [[REG1034]] -// CHECK: define available_externally signext i32 @_mm_ucomineq_ss +// CHECK: define available_externally frozen signext i32 @_mm_ucomineq_ss // CHECK: store <4 x float> {{[0-9a-zA-Z_%.]+}}, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: store <4 x float> {{[0-9a-zA-Z_%.]+}}, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 // CHECK-NEXT: [[REG1035:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* {{[0-9a-zA-Z_%.]+}}, align 16 @@ -2058,7 +2058,7 @@ // CHECK-LABEL: @test_undefined -// CHECK: define available_externally <4 x float> @_mm_undefined_ps +// CHECK: define available_externally frozen <4 x float> @_mm_undefined_ps // CHECK: [[REG1041:[0-9a-zA-Z_%.]+]] = alloca <4 x float>, align 16 // CHECK-NEXT: [[REG1042:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG1041]], align 16 // CHECK-NEXT: store <4 x float> [[REG1042]], <4 x float>* [[REG1041]], align 16 @@ -2073,18 +2073,18 @@ // CHECK-LABEL: @test_unpack -// CHECK: define available_externally <4 x float> @_mm_unpackhi_ps(<4 x float> [[REG1044:[0-9a-zA-Z_%.]+]], <4 x float> [[REG1045:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <4 x float> @_mm_unpackhi_ps(<4 x float> frozen [[REG1044:[0-9a-zA-Z_%.]+]], <4 x float> frozen [[REG1045:[0-9a-zA-Z_%.]+]]) // CHECK: store <4 x float> [[REG1044]], <4 x float>* [[REG1046:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <4 x float> [[REG1045]], <4 x float>* [[REG1047:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG1048:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG1046]], align 16 // CHECK-NEXT: [[REG1049:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG1047]], align 16 -// CHECK-NEXT: [[REG1050:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_vmrglw(float vector[4], float vector[4])(<4 x float> [[REG1048]], <4 x float> [[REG1049]]) +// CHECK-NEXT: [[REG1050:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_vmrglw(float vector[4], float vector[4])(<4 x float> frozen [[REG1048]], <4 x float> frozen [[REG1049]]) // CHECK-NEXT: ret <4 x float> [[REG1050]] -// CHECK: define available_externally <4 x float> @_mm_unpacklo_ps(<4 x float> [[REG1051:[0-9a-zA-Z_%.]+]], <4 x float> [[REG1052:[0-9a-zA-Z_%.]+]]) +// CHECK: define available_externally frozen <4 x float> @_mm_unpacklo_ps(<4 x float> frozen [[REG1051:[0-9a-zA-Z_%.]+]], <4 x float> frozen [[REG1052:[0-9a-zA-Z_%.]+]]) // CHECK: store <4 x float> [[REG1051]], <4 x float>* [[REG1053:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: store <4 x float> [[REG1052]], <4 x float>* [[REG1054:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG1055:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG1053]], align 16 // CHECK-NEXT: [[REG1056:[0-9a-zA-Z_%.]+]] = load <4 x float>, <4 x float>* [[REG1054]], align 16 -// CHECK-NEXT: [[REG1057:[0-9a-zA-Z_%.]+]] = call <4 x float> @vec_vmrghw(float vector[4], float vector[4])(<4 x float> [[REG1055]], <4 x float> [[REG1056]]) +// CHECK-NEXT: [[REG1057:[0-9a-zA-Z_%.]+]] = call frozen <4 x float> @vec_vmrghw(float vector[4], float vector[4])(<4 x float> frozen [[REG1055]], <4 x float> frozen [[REG1056]]) // CHECK-NEXT: ret <4 x float> [[REG1057]] diff --git a/clang/test/CodeGen/ppc32-dwarf.c b/clang/test/CodeGen/ppc32-dwarf.c --- a/clang/test/CodeGen/ppc32-dwarf.c +++ b/clang/test/CodeGen/ppc32-dwarf.c @@ -8,7 +8,7 @@ return __builtin_dwarf_sp_column(); } -// CHECK-LABEL: define i32 @test() +// CHECK-LABEL: define frozen i32 @test() // CHECK: store i8 4, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i32 0, i32 0), align 1 // CHECK-NEXT: store i8 4, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i32 0, i32 1), align 1 // CHECK-NEXT: store i8 4, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i32 0, i32 2), align 1 diff --git a/clang/test/CodeGen/ppc64-align-struct.c b/clang/test/CodeGen/ppc64-align-struct.c --- a/clang/test/CodeGen/ppc64-align-struct.c +++ b/clang/test/CodeGen/ppc64-align-struct.c @@ -10,45 +10,45 @@ struct test6 { int x[17]; } __attribute__((aligned (16))); struct test7 { int x[17]; } __attribute__((aligned (32))); -// CHECK: define void @test1(i32 signext %x, i64 %y.coerce) +// CHECK: define void @test1(i32 frozen signext %x, i64 %y.coerce) void test1 (int x, struct test1 y) { } -// CHECK: define void @test2(i32 signext %x, [1 x i128] %y.coerce) +// CHECK: define void @test2(i32 frozen signext %x, [1 x i128] %y.coerce) void test2 (int x, struct test2 y) { } -// CHECK: define void @test3(i32 signext %x, [2 x i128] %y.coerce) +// CHECK: define void @test3(i32 frozen signext %x, [2 x i128] %y.coerce) void test3 (int x, struct test3 y) { } -// CHECK: define void @test4(i32 signext %x, [2 x i64] %y.coerce) +// CHECK: define void @test4(i32 frozen signext %x, [2 x i64] %y.coerce) void test4 (int x, struct test4 y) { } -// CHECK: define void @test5(i32 signext %x, %struct.test5* byval(%struct.test5) align 8 %y) +// CHECK: define void @test5(i32 frozen signext %x, %struct.test5* frozen byval(%struct.test5) align 8 %y) void test5 (int x, struct test5 y) { } -// CHECK: define void @test6(i32 signext %x, %struct.test6* byval(%struct.test6) align 16 %y) +// CHECK: define void @test6(i32 frozen signext %x, %struct.test6* frozen byval(%struct.test6) align 16 %y) void test6 (int x, struct test6 y) { } // This case requires run-time realignment of the incoming struct -// CHECK-LABEL: define void @test7(i32 signext %x, %struct.test7* byval(%struct.test7) align 16 %0) +// CHECK-LABEL: define void @test7(i32 frozen signext %x, %struct.test7* frozen byval(%struct.test7) align 16 %0) // CHECK: %y = alloca %struct.test7, align 32 // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64 void test7 (int x, struct test7 y) { } -// CHECK: define void @test1va(%struct.test1* noalias sret align 4 %[[AGG_RESULT:.*]], i32 signext %x, ...) +// CHECK: define void @test1va(%struct.test1* noalias sret align 4 %[[AGG_RESULT:.*]], i32 frozen signext %x, ...) // CHECK: %[[CUR:[^ ]+]] = load i8*, i8** %ap // CHECK: %[[NEXT:[^ ]+]] = getelementptr inbounds i8, i8* %[[CUR]], i64 8 // CHECK: store i8* %[[NEXT]], i8** %ap @@ -66,7 +66,7 @@ return y; } -// CHECK: define void @test2va(%struct.test2* noalias sret align 16 %[[AGG_RESULT:.*]], i32 signext %x, ...) +// CHECK: define void @test2va(%struct.test2* noalias sret align 16 %[[AGG_RESULT:.*]], i32 frozen signext %x, ...) // CHECK: %[[CUR:[^ ]+]] = load i8*, i8** %ap // CHECK: %[[TMP0:[^ ]+]] = ptrtoint i8* %[[CUR]] to i64 // CHECK: %[[TMP1:[^ ]+]] = add i64 %[[TMP0]], 15 @@ -88,7 +88,7 @@ return y; } -// CHECK: define void @test3va(%struct.test3* noalias sret align 32 %[[AGG_RESULT:.*]], i32 signext %x, ...) +// CHECK: define void @test3va(%struct.test3* noalias sret align 32 %[[AGG_RESULT:.*]], i32 frozen signext %x, ...) // CHECK: %[[CUR:[^ ]+]] = load i8*, i8** %ap // CHECK: %[[TMP0:[^ ]+]] = ptrtoint i8* %[[CUR]] to i64 // CHECK: %[[TMP1:[^ ]+]] = add i64 %[[TMP0]], 15 @@ -110,7 +110,7 @@ return y; } -// CHECK: define void @test4va(%struct.test4* noalias sret align 4 %[[AGG_RESULT:.*]], i32 signext %x, ...) +// CHECK: define void @test4va(%struct.test4* noalias sret align 4 %[[AGG_RESULT:.*]], i32 frozen signext %x, ...) // CHECK: %[[CUR:[^ ]+]] = load i8*, i8** %ap // CHECK: %[[NEXT:[^ ]+]] = getelementptr inbounds i8, i8* %[[CUR]], i64 16 // CHECK: store i8* %[[NEXT]], i8** %ap @@ -128,7 +128,7 @@ return y; } -// CHECK: define void @testva_longdouble(%struct.test_longdouble* noalias sret align 16 %[[AGG_RESULT:.*]], i32 signext %x, ...) +// CHECK: define void @testva_longdouble(%struct.test_longdouble* noalias sret align 16 %[[AGG_RESULT:.*]], i32 frozen signext %x, ...) // CHECK: %[[CUR:[^ ]+]] = load i8*, i8** %ap // CHECK: %[[NEXT:[^ ]+]] = getelementptr inbounds i8, i8* %[[CUR]], i64 16 // CHECK: store i8* %[[NEXT]], i8** %ap @@ -147,7 +147,7 @@ return y; } -// CHECK: define void @testva_vector(%struct.test_vector* noalias sret align 16 %[[AGG_RESULT:.*]], i32 signext %x, ...) +// CHECK: define void @testva_vector(%struct.test_vector* noalias sret align 16 %[[AGG_RESULT:.*]], i32 frozen signext %x, ...) // CHECK: %[[CUR:[^ ]+]] = load i8*, i8** %ap // CHECK: %[[TMP0:[^ ]+]] = ptrtoint i8* %[[CUR]] to i64 // CHECK: %[[TMP1:[^ ]+]] = add i64 %[[TMP0]], 15 diff --git a/clang/test/CodeGen/ppc64-complex-parms.c b/clang/test/CodeGen/ppc64-complex-parms.c --- a/clang/test/CodeGen/ppc64-complex-parms.c +++ b/clang/test/CodeGen/ppc64-complex-parms.c @@ -12,56 +12,56 @@ __float128 foo_f128(_Complex __float128 x) { return crealf128(x); } -// CHECK-F128: define fp128 @foo_f128(fp128 {{[%A-Za-z0-9.]+}}, fp128 {{[%A-Za-z0-9.]+}}) +// CHECK-F128: define frozen fp128 @foo_f128(fp128 frozen {{[%A-Za-z0-9.]+}}, fp128 frozen {{[%A-Za-z0-9.]+}}) #endif float foo_float(_Complex float x) { return crealf(x); } -// CHECK: define float @foo_float(float {{[%A-Za-z0-9.]+}}, float {{[%A-Za-z0-9.]+}}) [[NUW:#[0-9]+]] { +// CHECK: define frozen float @foo_float(float frozen {{[%A-Za-z0-9.]+}}, float frozen {{[%A-Za-z0-9.]+}}) [[NUW:#[0-9]+]] { double foo_double(_Complex double x) { return creal(x); } -// CHECK: define double @foo_double(double {{[%A-Za-z0-9.]+}}, double {{[%A-Za-z0-9.]+}}) [[NUW]] { +// CHECK: define frozen double @foo_double(double frozen {{[%A-Za-z0-9.]+}}, double frozen {{[%A-Za-z0-9.]+}}) [[NUW]] { long double foo_long_double(_Complex long double x) { return creall(x); } -// CHECK: define ppc_fp128 @foo_long_double(ppc_fp128 {{[%A-Za-z0-9.]+}}, ppc_fp128 {{[%A-Za-z0-9.]+}}) [[NUW]] { +// CHECK: define frozen ppc_fp128 @foo_long_double(ppc_fp128 frozen {{[%A-Za-z0-9.]+}}, ppc_fp128 frozen {{[%A-Za-z0-9.]+}}) [[NUW]] { int foo_int(_Complex int x) { return __real__ x; } -// CHECK: define signext i32 @foo_int(i32 {{[%A-Za-z0-9.]+}}, i32 {{[%A-Za-z0-9.]+}}) [[NUW]] { +// CHECK: define frozen signext i32 @foo_int(i32 frozen {{[%A-Za-z0-9.]+}}, i32 frozen {{[%A-Za-z0-9.]+}}) [[NUW]] { short foo_short(_Complex short x) { return __real__ x; } -// CHECK: define signext i16 @foo_short(i16 {{[%A-Za-z0-9.]+}}, i16 {{[%A-Za-z0-9.]+}}) [[NUW]] { +// CHECK: define frozen signext i16 @foo_short(i16 frozen {{[%A-Za-z0-9.]+}}, i16 frozen {{[%A-Za-z0-9.]+}}) [[NUW]] { signed char foo_char(_Complex signed char x) { return __real__ x; } -// CHECK: define signext i8 @foo_char(i8 {{[%A-Za-z0-9.]+}}, i8 {{[%A-Za-z0-9.]+}}) [[NUW]] { +// CHECK: define frozen signext i8 @foo_char(i8 frozen {{[%A-Za-z0-9.]+}}, i8 frozen {{[%A-Za-z0-9.]+}}) [[NUW]] { long foo_long(_Complex long x) { return __real__ x; } -// CHECK: define i64 @foo_long(i64 {{[%A-Za-z0-9.]+}}, i64 {{[%A-Za-z0-9.]+}}) [[NUW]] { +// CHECK: define frozen i64 @foo_long(i64 frozen {{[%A-Za-z0-9.]+}}, i64 frozen {{[%A-Za-z0-9.]+}}) [[NUW]] { long long foo_long_long(_Complex long long x) { return __real__ x; } -// CHECK: define i64 @foo_long_long(i64 {{[%A-Za-z0-9.]+}}, i64 {{[%A-Za-z0-9.]+}}) [[NUW]] { +// CHECK: define frozen i64 @foo_long_long(i64 frozen {{[%A-Za-z0-9.]+}}, i64 frozen {{[%A-Za-z0-9.]+}}) [[NUW]] { void bar_float(void) { foo_float(2.0f - 2.5fi); @@ -77,7 +77,7 @@ // CHECK: %[[VAR5:[A-Za-z0-9.]+]] = load float, float* %[[VAR4]], align 4 // CHECK: %[[VAR6:[A-Za-z0-9.]+]] = getelementptr inbounds { float, float }, { float, float }* %[[VAR1]], i32 0, i32 1 // CHECK: %[[VAR7:[A-Za-z0-9.]+]] = load float, float* %[[VAR6]], align 4 -// CHECK: %{{[A-Za-z0-9.]+}} = call float @foo_float(float %[[VAR5]], float %[[VAR7]]) +// CHECK: %{{[A-Za-z0-9.]+}} = call frozen float @foo_float(float frozen %[[VAR5]], float frozen %[[VAR7]]) void bar_double(void) { foo_double(2.0 - 2.5i); @@ -93,7 +93,7 @@ // CHECK: %[[VAR15:[A-Za-z0-9.]+]] = load double, double* %[[VAR14]], align 8 // CHECK: %[[VAR16:[A-Za-z0-9.]+]] = getelementptr inbounds { double, double }, { double, double }* %[[VAR11]], i32 0, i32 1 // CHECK: %[[VAR17:[A-Za-z0-9.]+]] = load double, double* %[[VAR16]], align 8 -// CHECK: %{{[A-Za-z0-9.]+}} = call double @foo_double(double %[[VAR15]], double %[[VAR17]]) +// CHECK: %{{[A-Za-z0-9.]+}} = call frozen double @foo_double(double frozen %[[VAR15]], double frozen %[[VAR17]]) void bar_long_double(void) { foo_long_double(2.0L - 2.5Li); @@ -109,7 +109,7 @@ // CHECK: %[[VAR25:[A-Za-z0-9.]+]] = load ppc_fp128, ppc_fp128* %[[VAR24]], align 16 // CHECK: %[[VAR26:[A-Za-z0-9.]+]] = getelementptr inbounds { ppc_fp128, ppc_fp128 }, { ppc_fp128, ppc_fp128 }* %[[VAR21]], i32 0, i32 1 // CHECK: %[[VAR27:[A-Za-z0-9.]+]] = load ppc_fp128, ppc_fp128* %[[VAR26]], align 16 -// CHECK: %{{[A-Za-z0-9.]+}} = call ppc_fp128 @foo_long_double(ppc_fp128 %[[VAR25]], ppc_fp128 %[[VAR27]]) +// CHECK: %{{[A-Za-z0-9.]+}} = call frozen ppc_fp128 @foo_long_double(ppc_fp128 frozen %[[VAR25]], ppc_fp128 frozen %[[VAR27]]) void bar_int(void) { foo_int(2 - 3i); @@ -125,7 +125,7 @@ // CHECK: %[[VAR35:[A-Za-z0-9.]+]] = load i32, i32* %[[VAR34]], align 4 // CHECK: %[[VAR36:[A-Za-z0-9.]+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* %[[VAR31]], i32 0, i32 1 // CHECK: %[[VAR37:[A-Za-z0-9.]+]] = load i32, i32* %[[VAR36]], align 4 -// CHECK: %{{[A-Za-z0-9.]+}} = call signext i32 @foo_int(i32 %[[VAR35]], i32 %[[VAR37]]) +// CHECK: %{{[A-Za-z0-9.]+}} = call frozen signext i32 @foo_int(i32 frozen %[[VAR35]], i32 frozen %[[VAR37]]) void bar_short(void) { foo_short(2 - 3i); @@ -141,7 +141,7 @@ // CHECK: %[[VAR45:[A-Za-z0-9.]+]] = load i16, i16* %[[VAR44]], align 2 // CHECK: %[[VAR46:[A-Za-z0-9.]+]] = getelementptr inbounds { i16, i16 }, { i16, i16 }* %[[VAR41]], i32 0, i32 1 // CHECK: %[[VAR47:[A-Za-z0-9.]+]] = load i16, i16* %[[VAR46]], align 2 -// CHECK: %{{[A-Za-z0-9.]+}} = call signext i16 @foo_short(i16 %[[VAR45]], i16 %[[VAR47]]) +// CHECK: %{{[A-Za-z0-9.]+}} = call frozen signext i16 @foo_short(i16 frozen %[[VAR45]], i16 frozen %[[VAR47]]) void bar_char(void) { foo_char(2 - 3i); @@ -157,7 +157,7 @@ // CHECK: %[[VAR55:[A-Za-z0-9.]+]] = load i8, i8* %[[VAR54]], align 1 // CHECK: %[[VAR56:[A-Za-z0-9.]+]] = getelementptr inbounds { i8, i8 }, { i8, i8 }* %[[VAR51]], i32 0, i32 1 // CHECK: %[[VAR57:[A-Za-z0-9.]+]] = load i8, i8* %[[VAR56]], align 1 -// CHECK: %{{[A-Za-z0-9.]+}} = call signext i8 @foo_char(i8 %[[VAR55]], i8 %[[VAR57]]) +// CHECK: %{{[A-Za-z0-9.]+}} = call frozen signext i8 @foo_char(i8 frozen %[[VAR55]], i8 frozen %[[VAR57]]) void bar_long(void) { foo_long(2L - 3Li); @@ -173,7 +173,7 @@ // CHECK: %[[VAR65:[A-Za-z0-9.]+]] = load i64, i64* %[[VAR64]], align 8 // CHECK: %[[VAR66:[A-Za-z0-9.]+]] = getelementptr inbounds { i64, i64 }, { i64, i64 }* %[[VAR61]], i32 0, i32 1 // CHECK: %[[VAR67:[A-Za-z0-9.]+]] = load i64, i64* %[[VAR66]], align 8 -// CHECK: %{{[A-Za-z0-9.]+}} = call i64 @foo_long(i64 %[[VAR65]], i64 %[[VAR67]]) +// CHECK: %{{[A-Za-z0-9.]+}} = call frozen i64 @foo_long(i64 frozen %[[VAR65]], i64 frozen %[[VAR67]]) void bar_long_long(void) { foo_long_long(2LL - 3LLi); @@ -189,6 +189,6 @@ // CHECK: %[[VAR75:[A-Za-z0-9.]+]] = load i64, i64* %[[VAR74]], align 8 // CHECK: %[[VAR76:[A-Za-z0-9.]+]] = getelementptr inbounds { i64, i64 }, { i64, i64 }* %[[VAR71]], i32 0, i32 1 // CHECK: %[[VAR77:[A-Za-z0-9.]+]] = load i64, i64* %[[VAR76]], align 8 -// CHECK: %{{[A-Za-z0-9.]+}} = call i64 @foo_long_long(i64 %[[VAR75]], i64 %[[VAR77]]) +// CHECK: %{{[A-Za-z0-9.]+}} = call frozen i64 @foo_long_long(i64 frozen %[[VAR75]], i64 frozen %[[VAR77]]) // CHECK: attributes [[NUW]] = { noinline nounwind{{.*}} } diff --git a/clang/test/CodeGen/ppc64-complex-return.c b/clang/test/CodeGen/ppc64-complex-return.c --- a/clang/test/CodeGen/ppc64-complex-return.c +++ b/clang/test/CodeGen/ppc64-complex-return.c @@ -13,63 +13,63 @@ return x; } -// CHECK-F128: define { fp128, fp128 } @foo_f128(fp128 {{[%A-Za-z0-9.]+}}, fp128 {{[%A-Za-z0-9.]+}}) [[NUW:#[0-9]+]] { +// CHECK-F128: define frozen { fp128, fp128 } @foo_f128(fp128 frozen {{[%A-Za-z0-9.]+}}, fp128 frozen {{[%A-Za-z0-9.]+}}) [[NUW:#[0-9]+]] { #endif _Complex float foo_float(_Complex float x) { return x; } -// CHECK: define { float, float } @foo_float(float {{[%A-Za-z0-9.]+}}, float {{[%A-Za-z0-9.]+}}) [[NUW:#[0-9]+]] { +// CHECK: define frozen { float, float } @foo_float(float frozen {{[%A-Za-z0-9.]+}}, float frozen {{[%A-Za-z0-9.]+}}) [[NUW:#[0-9]+]] { _Complex double foo_double(_Complex double x) { return x; } -// CHECK: define { double, double } @foo_double(double {{[%A-Za-z0-9.]+}}, double {{[%A-Za-z0-9.]+}}) [[NUW]] { +// CHECK: define frozen { double, double } @foo_double(double frozen {{[%A-Za-z0-9.]+}}, double frozen {{[%A-Za-z0-9.]+}}) [[NUW]] { _Complex long double foo_long_double(_Complex long double x) { return x; } -// CHECK: define { ppc_fp128, ppc_fp128 } @foo_long_double(ppc_fp128 {{[%A-Za-z0-9.]+}}, ppc_fp128 {{[%A-Za-z0-9.]+}}) [[NUW]] { +// CHECK: define frozen { ppc_fp128, ppc_fp128 } @foo_long_double(ppc_fp128 frozen {{[%A-Za-z0-9.]+}}, ppc_fp128 frozen {{[%A-Za-z0-9.]+}}) [[NUW]] { _Complex int foo_int(_Complex int x) { return x; } -// CHECK: define { i32, i32 } @foo_int(i32 {{[%A-Za-z0-9.]+}}, i32 {{[%A-Za-z0-9.]+}}) [[NUW]] { +// CHECK: define frozen { i32, i32 } @foo_int(i32 frozen {{[%A-Za-z0-9.]+}}, i32 frozen {{[%A-Za-z0-9.]+}}) [[NUW]] { _Complex short foo_short(_Complex short x) { return x; } -// CHECK: define { i16, i16 } @foo_short(i16 {{[%A-Za-z0-9.]+}}, i16 {{[%A-Za-z0-9.]+}}) [[NUW]] { +// CHECK: define frozen { i16, i16 } @foo_short(i16 frozen {{[%A-Za-z0-9.]+}}, i16 frozen {{[%A-Za-z0-9.]+}}) [[NUW]] { _Complex signed char foo_char(_Complex signed char x) { return x; } -// CHECK: define { i8, i8 } @foo_char(i8 {{[%A-Za-z0-9.]+}}, i8 {{[%A-Za-z0-9.]+}}) [[NUW]] { +// CHECK: define frozen { i8, i8 } @foo_char(i8 frozen {{[%A-Za-z0-9.]+}}, i8 frozen {{[%A-Za-z0-9.]+}}) [[NUW]] { _Complex long foo_long(_Complex long x) { return x; } -// CHECK: define { i64, i64 } @foo_long(i64 {{[%A-Za-z0-9.]+}}, i64 {{[%A-Za-z0-9.]+}}) [[NUW]] { +// CHECK: define frozen { i64, i64 } @foo_long(i64 frozen {{[%A-Za-z0-9.]+}}, i64 frozen {{[%A-Za-z0-9.]+}}) [[NUW]] { _Complex long long foo_long_long(_Complex long long x) { return x; } -// CHECK: define { i64, i64 } @foo_long_long(i64 {{[%A-Za-z0-9.]+}}, i64 {{[%A-Za-z0-9.]+}}) [[NUW]] { +// CHECK: define frozen { i64, i64 } @foo_long_long(i64 frozen {{[%A-Za-z0-9.]+}}, i64 frozen {{[%A-Za-z0-9.]+}}) [[NUW]] { float bar_float(void) { return crealf(foo_float(2.0f - 2.5fi)); } -// CHECK: define float @bar_float() [[NUW]] { -// CHECK: [[VAR1:[%A-Za-z0-9.]+]] = call { float, float } @foo_float +// CHECK: define frozen float @bar_float() [[NUW]] { +// CHECK: [[VAR1:[%A-Za-z0-9.]+]] = call frozen { float, float } @foo_float // CHECK: extractvalue { float, float } [[VAR1]], 0 // CHECK: extractvalue { float, float } [[VAR1]], 1 @@ -77,8 +77,8 @@ return creal(foo_double(2.0 - 2.5i)); } -// CHECK: define double @bar_double() [[NUW]] { -// CHECK: [[VAR2:[%A-Za-z0-9.]+]] = call { double, double } @foo_double +// CHECK: define frozen double @bar_double() [[NUW]] { +// CHECK: [[VAR2:[%A-Za-z0-9.]+]] = call frozen { double, double } @foo_double // CHECK: extractvalue { double, double } [[VAR2]], 0 // CHECK: extractvalue { double, double } [[VAR2]], 1 @@ -86,8 +86,8 @@ return creall(foo_long_double(2.0L - 2.5Li)); } -// CHECK: define ppc_fp128 @bar_long_double() [[NUW]] { -// CHECK: [[VAR3:[%A-Za-z0-9.]+]] = call { ppc_fp128, ppc_fp128 } @foo_long_double +// CHECK: define frozen ppc_fp128 @bar_long_double() [[NUW]] { +// CHECK: [[VAR3:[%A-Za-z0-9.]+]] = call frozen { ppc_fp128, ppc_fp128 } @foo_long_double // CHECK: extractvalue { ppc_fp128, ppc_fp128 } [[VAR3]], 0 // CHECK: extractvalue { ppc_fp128, ppc_fp128 } [[VAR3]], 1 @@ -96,8 +96,8 @@ return crealf128(foo_f128(2.0Q - 2.5Qi)); } -// CHECK-F128: define fp128 @bar_f128() [[NUW]] { -// CHECK-F128: [[VAR3:[%A-Za-z0-9.]+]] = call { fp128, fp128 } @foo_f128 +// CHECK-F128: define frozen fp128 @bar_f128() [[NUW]] { +// CHECK-F128: [[VAR3:[%A-Za-z0-9.]+]] = call frozen { fp128, fp128 } @foo_f128 // CHECK-F128: extractvalue { fp128, fp128 } [[VAR3]], 0 // CHECK-F128: extractvalue { fp128, fp128 } [[VAR3]], 1 #endif @@ -106,8 +106,8 @@ return __real__(foo_int(2 - 3i)); } -// CHECK: define signext i32 @bar_int() [[NUW]] { -// CHECK: [[VAR4:[%A-Za-z0-9.]+]] = call { i32, i32 } @foo_int +// CHECK: define frozen signext i32 @bar_int() [[NUW]] { +// CHECK: [[VAR4:[%A-Za-z0-9.]+]] = call frozen { i32, i32 } @foo_int // CHECK: extractvalue { i32, i32 } [[VAR4]], 0 // CHECK: extractvalue { i32, i32 } [[VAR4]], 1 @@ -115,8 +115,8 @@ return __real__(foo_short(2 - 3i)); } -// CHECK: define signext i16 @bar_short() [[NUW]] { -// CHECK: [[VAR5:[%A-Za-z0-9.]+]] = call { i16, i16 } @foo_short +// CHECK: define frozen signext i16 @bar_short() [[NUW]] { +// CHECK: [[VAR5:[%A-Za-z0-9.]+]] = call frozen { i16, i16 } @foo_short // CHECK: extractvalue { i16, i16 } [[VAR5]], 0 // CHECK: extractvalue { i16, i16 } [[VAR5]], 1 @@ -124,8 +124,8 @@ return __real__(foo_char(2 - 3i)); } -// CHECK: define signext i8 @bar_char() [[NUW]] { -// CHECK: [[VAR6:[%A-Za-z0-9.]+]] = call { i8, i8 } @foo_char +// CHECK: define frozen signext i8 @bar_char() [[NUW]] { +// CHECK: [[VAR6:[%A-Za-z0-9.]+]] = call frozen { i8, i8 } @foo_char // CHECK: extractvalue { i8, i8 } [[VAR6]], 0 // CHECK: extractvalue { i8, i8 } [[VAR6]], 1 @@ -133,8 +133,8 @@ return __real__(foo_long(2L - 3Li)); } -// CHECK: define i64 @bar_long() [[NUW]] { -// CHECK: [[VAR7:[%A-Za-z0-9.]+]] = call { i64, i64 } @foo_long +// CHECK: define frozen i64 @bar_long() [[NUW]] { +// CHECK: [[VAR7:[%A-Za-z0-9.]+]] = call frozen { i64, i64 } @foo_long // CHECK: extractvalue { i64, i64 } [[VAR7]], 0 // CHECK: extractvalue { i64, i64 } [[VAR7]], 1 @@ -142,8 +142,8 @@ return __real__(foo_long_long(2LL - 3LLi)); } -// CHECK: define i64 @bar_long_long() [[NUW]] { -// CHECK: [[VAR8:[%A-Za-z0-9.]+]] = call { i64, i64 } @foo_long_long +// CHECK: define frozen i64 @bar_long_long() [[NUW]] { +// CHECK: [[VAR8:[%A-Za-z0-9.]+]] = call frozen { i64, i64 } @foo_long_long // CHECK: extractvalue { i64, i64 } [[VAR8]], 0 // CHECK: extractvalue { i64, i64 } [[VAR8]], 1 diff --git a/clang/test/CodeGen/ppc64-dwarf.c b/clang/test/CodeGen/ppc64-dwarf.c --- a/clang/test/CodeGen/ppc64-dwarf.c +++ b/clang/test/CodeGen/ppc64-dwarf.c @@ -8,7 +8,7 @@ return __builtin_dwarf_sp_column(); } -// CHECK-LABEL: define signext i32 @test() +// CHECK-LABEL: define frozen signext i32 @test() // CHECK: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 0), align 1 // CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 1), align 1 // CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 2), align 1 diff --git a/clang/test/CodeGen/ppc64-extend.c b/clang/test/CodeGen/ppc64-extend.c --- a/clang/test/CodeGen/ppc64-extend.c +++ b/clang/test/CodeGen/ppc64-extend.c @@ -2,15 +2,15 @@ // RUN: %clang_cc1 -triple powerpc64-unknown-linux-gnu -emit-llvm -o - %s | FileCheck %s void f1(int x) { return; } -// CHECK: define void @f1(i32 signext %x) [[NUW:#[0-9]+]] +// CHECK: define void @f1(i32 frozen signext %x) [[NUW:#[0-9]+]] void f2(unsigned int x) { return; } -// CHECK: define void @f2(i32 zeroext %x) [[NUW]] +// CHECK: define void @f2(i32 frozen zeroext %x) [[NUW]] int f3(void) { return 0; } -// CHECK: define signext i32 @f3() [[NUW]] +// CHECK: define frozen signext i32 @f3() [[NUW]] unsigned int f4(void) { return 0; } -// CHECK: define zeroext i32 @f4() [[NUW]] +// CHECK: define frozen zeroext i32 @f4() [[NUW]] // CHECK: attributes [[NUW]] = { noinline nounwind{{.*}} } diff --git a/clang/test/CodeGen/ppc64-inline-asm.c b/clang/test/CodeGen/ppc64-inline-asm.c --- a/clang/test/CodeGen/ppc64-inline-asm.c +++ b/clang/test/CodeGen/ppc64-inline-asm.c @@ -4,7 +4,7 @@ _Bool o; asm("crand %0, %1, %2" : "=wc"(o) : "wc"(b1), "wc"(b2) : ); return o; -// CHECK-LABEL: define zeroext i1 @test_wc_i1(i1 zeroext %b1, i1 zeroext %b2) +// CHECK-LABEL: define frozen zeroext i1 @test_wc_i1(i1 frozen zeroext %b1, i1 frozen zeroext %b2) // CHECK: call i8 asm "crand $0, $1, $2", "=^wc,^wc,^wc"(i1 %b1, i1 %b2) } @@ -12,7 +12,7 @@ int o; asm("crand %0, %1, %2" : "=wc"(o) : "wc"(b1), "wc"(b2) : ); return o; -// CHECK-LABEL: signext i32 @test_wc_i32(i32 signext %b1, i32 signext %b2) +// CHECK-LABEL: signext i32 @test_wc_i32(i32 frozen signext %b1, i32 frozen signext %b2) // CHECK: call i32 asm "crand $0, $1, $2", "=^wc,^wc,^wc"(i32 %b1, i32 %b2) } @@ -20,33 +20,33 @@ unsigned char o; asm("crand %0, %1, %2" : "=wc"(o) : "wc"(b1), "wc"(b2) : ); return o; -// CHECK-LABEL: zeroext i8 @test_wc_i8(i8 zeroext %b1, i8 zeroext %b2) +// CHECK-LABEL: zeroext i8 @test_wc_i8(i8 frozen zeroext %b1, i8 frozen zeroext %b2) // CHECK: call i8 asm "crand $0, $1, $2", "=^wc,^wc,^wc"(i8 %b1, i8 %b2) } float test_fmaxf(float x, float y) { asm("xsmaxdp %x0, %x1, %x2" : "=ww"(x) : "ww"(x), "ww"(y)); return x; -// CHECK-LABEL: float @test_fmaxf(float %x, float %y) +// CHECK-LABEL: float @test_fmaxf(float frozen %x, float frozen %y) // CHECK: call float asm "xsmaxdp ${0:x}, ${1:x}, ${2:x}", "=^ww,^ww,^ww"(float %x, float %y) } double test_fmax(double x, double y) { asm("xsmaxdp %x0, %x1, %x2" : "=ws"(x) : "ws"(x), "ws"(y)); return x; -// CHECK-LABEL: double @test_fmax(double %x, double %y) +// CHECK-LABEL: double @test_fmax(double frozen %x, double frozen %y) // CHECK: call double asm "xsmaxdp ${0:x}, ${1:x}, ${2:x}", "=^ws,^ws,^ws"(double %x, double %y) } void testZ(void *addr) { asm volatile ("dcbz %y0\n" :: "Z"(*(unsigned char *)addr) : "memory"); -// CHECK-LABEL: void @testZ(i8* %addr) +// CHECK-LABEL: void @testZ(i8* frozen %addr) // CHECK: call void asm sideeffect "dcbz ${0:y}\0A", "*Z,~{memory}"(i8* %addr) } void testZwOff(void *addr, long long off) { asm volatile ("dcbz %y0\n" :: "Z"(*(unsigned char *)(addr + off)) : "memory"); -// CHECK-LABEL: void @testZwOff(i8* %addr, i64 %off) +// CHECK-LABEL: void @testZwOff(i8* frozen %addr, i64 frozen %off) // CHECK: %[[VAL:[^ ]+]] = getelementptr i8, i8* %addr, i64 %off // CHECK: call void asm sideeffect "dcbz ${0:y}\0A", "*Z,~{memory}"(i8* %[[VAL]]) } diff --git a/clang/test/CodeGen/ppc64-long-double.cpp b/clang/test/CodeGen/ppc64-long-double.cpp --- a/clang/test/CodeGen/ppc64-long-double.cpp +++ b/clang/test/CodeGen/ppc64-long-double.cpp @@ -28,6 +28,6 @@ long double foo(long double d) { return d; } -// FP64: double @_Z3fooe(double %d) -// FP128: fp128 @_Z3foou9__ieee128(fp128 %d) -// IBM128: ppc_fp128 @_Z3foog(ppc_fp128 %d) +// FP64: double @_Z3fooe(double frozen %d) +// FP128: fp128 @_Z3foou9__ieee128(fp128 frozen %d) +// IBM128: ppc_fp128 @_Z3foog(ppc_fp128 frozen %d) diff --git a/clang/test/CodeGen/ppc64-qpx-vector.c b/clang/test/CodeGen/ppc64-qpx-vector.c --- a/clang/test/CodeGen/ppc64-qpx-vector.c +++ b/clang/test/CodeGen/ppc64-qpx-vector.c @@ -14,16 +14,16 @@ return a.v + b; } -// ALL-LABEL: define <4 x float> @foo1(<4 x float> inreg %a.coerce, <4 x float> %b, [2 x i128] %c.coerce) +// ALL-LABEL: define frozen <4 x float> @foo1(<4 x float> inreg %a.coerce, <4 x float> frozen %b, [2 x i128] %c.coerce) // ALL: ret <4 x float> v4df foo2(struct sdf a, v4df b, struct sdf2 c) { return a.v + b; } -// QPX-LABEL: define <4 x double> @foo2(<4 x double> inreg %a.coerce, <4 x double> %b, [2 x i256] %c.coerce) +// QPX-LABEL: define frozen <4 x double> @foo2(<4 x double> inreg %a.coerce, <4 x double> frozen %b, [2 x i256] %c.coerce) // QPX: ret <4 x double> -// NORMAL-LABEL: define void @foo2(<4 x double>* noalias sret align 32 %agg.result, [2 x i128] %a.coerce, <4 x double>* %0, [4 x i128] %c.coerce) +// NORMAL-LABEL: define void @foo2(<4 x double>* noalias sret align 32 %agg.result, [2 x i128] %a.coerce, <4 x double>* frozen %0, [4 x i128] %c.coerce) // NORMAL: ret void diff --git a/clang/test/CodeGen/ppc64-soft-float.c b/clang/test/CodeGen/ppc64-soft-float.c --- a/clang/test/CodeGen/ppc64-soft-float.c +++ b/clang/test/CodeGen/ppc64-soft-float.c @@ -1,15 +1,15 @@ -// RUN: %clang_cc1 -msoft-float -mfloat-abi soft -triple powerpc64le-unknown-linux-gnu -emit-llvm -o - %s | FileCheck -check-prefix=CHECK -check-prefix=CHECK-LE %s -// RUN: %clang_cc1 -msoft-float -mfloat-abi soft -triple powerpc64-unknown-linux-gnu -emit-llvm -o - %s | FileCheck -check-prefix=CHECK -check-prefix=CHECK-BE %s +// RUN: %clang_cc1 -disable-frozen-args -msoft-float -mfloat-abi soft -triple powerpc64le-unknown-linux-gnu -emit-llvm -o - %s | FileCheck -check-prefix=CHECK -check-prefix=CHECK-LE %s +// RUN: %clang_cc1 -disable-frozen-args -msoft-float -mfloat-abi soft -triple powerpc64-unknown-linux-gnu -emit-llvm -o - %s | FileCheck -check-prefix=CHECK -check-prefix=CHECK-BE %s // Test float returns and params. -// CHECK: define float @func_p1(float %x) +// CHECK: define frozen float @func_p1(float %x) float func_p1(float x) { return x; } -// CHECK: define double @func_p2(double %x) +// CHECK: define frozen double @func_p2(double %x) double func_p2(double x) { return x; } -// CHECK: define ppc_fp128 @func_p3(ppc_fp128 %x) +// CHECK: define frozen ppc_fp128 @func_p3(ppc_fp128 %x) long double func_p3(long double x) { return x; } // Test homogeneous float aggregate passing and returning. diff --git a/clang/test/CodeGen/ppc64-struct-onefloat.c b/clang/test/CodeGen/ppc64-struct-onefloat.c --- a/clang/test/CodeGen/ppc64-struct-onefloat.c +++ b/clang/test/CodeGen/ppc64-struct-onefloat.c @@ -1,5 +1,5 @@ // REQUIRES: powerpc-registered-target -// RUN: %clang_cc1 -triple powerpc64-unknown-linux-gnu -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args -triple powerpc64-unknown-linux-gnu -emit-llvm -o - %s | FileCheck %s typedef struct s1 { float f; } Sf; typedef struct s2 { double d; } Sd; diff --git a/clang/test/CodeGen/ppc64-struct-onevect.c b/clang/test/CodeGen/ppc64-struct-onevect.c --- a/clang/test/CodeGen/ppc64-struct-onevect.c +++ b/clang/test/CodeGen/ppc64-struct-onevect.c @@ -9,5 +9,5 @@ return a.v; } -// CHECK-LABEL: define <4 x float> @foo(<4 x float> inreg returned %a.coerce) +// CHECK-LABEL: define frozen <4 x float> @foo(<4 x float> inreg returned %a.coerce) // CHECK: ret <4 x float> %a.coerce diff --git a/clang/test/CodeGen/ppc64-vector.c b/clang/test/CodeGen/ppc64-vector.c --- a/clang/test/CodeGen/ppc64-vector.c +++ b/clang/test/CodeGen/ppc64-vector.c @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -target-feature +altivec -triple powerpc64-unknown-linux-gnu -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args -target-feature +altivec -triple powerpc64-unknown-linux-gnu -emit-llvm -o - %s | FileCheck %s typedef short v2i16 __attribute__((vector_size (4))); typedef short v3i16 __attribute__((vector_size (6))); @@ -9,31 +9,31 @@ struct v16i16 { v16i16 x; }; -// CHECK: define i32 @test_v2i16(i32 %x.coerce) +// CHECK: define frozen i32 @test_v2i16(i32 %x.coerce) v2i16 test_v2i16(v2i16 x) { return x; } -// CHECK: define i64 @test_v3i16(i64 %x.coerce) +// CHECK: define frozen i64 @test_v3i16(i64 %x.coerce) v3i16 test_v3i16(v3i16 x) { return x; } -// CHECK: define i64 @test_v4i16(i64 %x.coerce) +// CHECK: define frozen i64 @test_v4i16(i64 %x.coerce) v4i16 test_v4i16(v4i16 x) { return x; } -// CHECK: define <6 x i16> @test_v6i16(<6 x i16> %x) +// CHECK: define frozen <6 x i16> @test_v6i16(<6 x i16> %x) v6i16 test_v6i16(v6i16 x) { return x; } -// CHECK: define <8 x i16> @test_v8i16(<8 x i16> %x) +// CHECK: define frozen <8 x i16> @test_v8i16(<8 x i16> %x) v8i16 test_v8i16(v8i16 x) { return x; diff --git a/clang/test/CodeGen/ppc64le-aggregates.c b/clang/test/CodeGen/ppc64le-aggregates.c --- a/clang/test/CodeGen/ppc64le-aggregates.c +++ b/clang/test/CodeGen/ppc64le-aggregates.c @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -target-feature +altivec -triple powerpc64le-unknown-linux-gnu -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args -target-feature +altivec -triple powerpc64le-unknown-linux-gnu -emit-llvm -o - %s | FileCheck %s // Test homogeneous float aggregate passing and returning. diff --git a/clang/test/CodeGen/ppc64le-f128Aggregates.c b/clang/test/CodeGen/ppc64le-f128Aggregates.c --- a/clang/test/CodeGen/ppc64le-f128Aggregates.c +++ b/clang/test/CodeGen/ppc64le-f128Aggregates.c @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -triple powerpc64le-unknown-linux-gnu -emit-llvm \ +// RUN: %clang_cc1 -disable-frozen-args -triple powerpc64le-unknown-linux-gnu -emit-llvm \ // RUN: -target-cpu pwr9 -target-feature +float128 -o - %s | FileCheck %s // Test homogeneous fp128 aggregate passing and returning. diff --git a/clang/test/CodeGen/pr12251.c b/clang/test/CodeGen/pr12251.c --- a/clang/test/CodeGen/pr12251.c +++ b/clang/test/CodeGen/pr12251.c @@ -5,7 +5,7 @@ return *x; } -// CHECK-LABEL: define i32 @g1 +// CHECK-LABEL: define frozen i32 @g1 // CHECK: load i32, i32* %x, align 4 // CHECK-NOT: range // CHECK: ret diff --git a/clang/test/CodeGen/pr25786.c b/clang/test/CodeGen/pr25786.c --- a/clang/test/CodeGen/pr25786.c +++ b/clang/test/CodeGen/pr25786.c @@ -5,7 +5,7 @@ void (__attribute__((regparm(2), stdcall)) foo)(int a) { } // CHECK: @pf = global void (...)* null -// CHECK: define void @foo(i32 %a) +// CHECK: define void @foo(i32 frozen %a) // CHECK-OK: @pf = global void (...)* null -// CHECK-OK: define x86_stdcallcc void @foo(i32 inreg %a) +// CHECK-OK: define x86_stdcallcc void @foo(i32 frozen inreg %a) diff --git a/clang/test/CodeGen/pr34021.c b/clang/test/CodeGen/pr34021.c --- a/clang/test/CodeGen/pr34021.c +++ b/clang/test/CodeGen/pr34021.c @@ -4,7 +4,7 @@ typedef int v4si __attribute__ ((vector_size (16))); v4si rep() { -// X86-LABEL: define <4 x i32> @rep +// X86-LABEL: define frozen <4 x i32> @rep // X86: %[[ALLOCA0:.*]] = alloca <4 x i32>, align 16 // X86: %[[ALLOCA1:.*]] = alloca <4 x i32>, align 16 // X86: %[[BITCAST:.*]] = bitcast <4 x i32>* %[[ALLOCA0]] to i128* @@ -14,7 +14,7 @@ // X86: %[[LOAD:.*]] = load <4 x i32>, <4 x i32>* %[[ALLOCA1]], align 16 // X86: ret <4 x i32> %[[LOAD]] // -// X64-LABEL: define <4 x i32> @rep +// X64-LABEL: define frozen <4 x i32> @rep // X64: %[[ALLOCA:.*]] = alloca <4 x i32>, align 16 // X64: call void asm sideeffect inteldialect "", "~{dirflag},~{fpsr},~{flags}"() // X64: %[[LOAD:.*]] = load <4 x i32>, <4 x i32>* %[[ALLOCA]], align 16 diff --git a/clang/test/CodeGen/pr5406.c b/clang/test/CodeGen/pr5406.c --- a/clang/test/CodeGen/pr5406.c +++ b/clang/test/CodeGen/pr5406.c @@ -6,7 +6,7 @@ void foo (int i, ...); -// CHECK: call void (i32, ...) @foo(i32 1, [1 x i32] {{.*}}) +// CHECK: call void (i32, ...) @foo(i32 frozen 1, [1 x i32] {{.*}}) int main (void) { A0 a3; diff --git a/clang/test/CodeGen/pr9614.c b/clang/test/CodeGen/pr9614.c --- a/clang/test/CodeGen/pr9614.c +++ b/clang/test/CodeGen/pr9614.c @@ -32,14 +32,14 @@ // CHECK-LABEL: define void @f() // CHECK: call void @foo() -// CHECK: call i32 @abs(i32 0) -// CHECK: call i8* @strrchr( +// CHECK: call frozen i32 @abs(i32 frozen 0) +// CHECK: call frozen i8* @strrchr( // CHECK: call void @llvm.prefetch.p0i8( -// CHECK: call i8* @memchr( +// CHECK: call frozen i8* @memchr( // CHECK: ret void // CHECK: declare void @foo() -// CHECK: declare i32 @abs(i32 -// CHECK: declare i8* @strrchr(i8*, i32) -// CHECK: declare i8* @memchr( +// CHECK: declare frozen i32 @abs(i32 frozen +// CHECK: declare frozen i8* @strrchr(i8* frozen, i32 frozen) +// CHECK: declare frozen i8* @memchr( // CHECK: declare void @llvm.prefetch.p0i8( diff --git a/clang/test/CodeGen/pragma-weak.c b/clang/test/CodeGen/pragma-weak.c --- a/clang/test/CodeGen/pragma-weak.c +++ b/clang/test/CodeGen/pragma-weak.c @@ -140,7 +140,7 @@ void SHA512Pad(void *context) {} #pragma weak SHA384Pad = SHA512Pad void PR10878() { SHA384Pad(0); } -// CHECK: call void @SHA384Pad(i8* null) +// CHECK: call void @SHA384Pad(i8* frozen null) // PR14046: Parse #pragma weak in function-local context @@ -149,7 +149,7 @@ #pragma weak PR14046e PR14046e(); } -// CHECK: declare extern_weak i32 @PR14046e() +// CHECK: declare extern_weak frozen i32 @PR14046e() // Parse #pragma weak after a label or case statement extern int PR16705a(void); @@ -169,9 +169,9 @@ PR16705c(); } -// CHECK: declare extern_weak i32 @PR16705a() -// CHECK: declare extern_weak i32 @PR16705b() -// CHECK: declare extern_weak i32 @PR16705c() +// CHECK: declare extern_weak frozen i32 @PR16705a() +// CHECK: declare extern_weak frozen i32 @PR16705b() +// CHECK: declare extern_weak frozen i32 @PR16705c() ///////////// TODO: stuff that still doesn't work diff --git a/clang/test/CodeGen/redefine_extname.c b/clang/test/CodeGen/redefine_extname.c --- a/clang/test/CodeGen/redefine_extname.c +++ b/clang/test/CodeGen/redefine_extname.c @@ -10,7 +10,7 @@ // __PRAGMA_REDEFINE_EXTNAME should be defined. This will fail if it isn't... int fish() { return fake() + __PRAGMA_REDEFINE_EXTNAME + name; } // Check that the call to fake() is emitted as a call to real() -// CHECK: call i32 @real() +// CHECK: call frozen i32 @real() // Check that this also works with variables names // CHECK: load i32, i32* @alias @@ -22,11 +22,11 @@ return foo; } extern int foo() { return 1; } -// CHECK: define i32 @bar() +// CHECK: define frozen i32 @bar() // Check that pragma redefine_extname applies to external declarations only. #pragma redefine_extname foo_static bar_static static int foo_static() { return 1; } int baz() { return foo_static(); } -// CHECK-NOT: call i32 @bar_static() +// CHECK-NOT: call frozen i32 @bar_static() diff --git a/clang/test/CodeGen/regcall.c b/clang/test/CodeGen/regcall.c --- a/clang/test/CodeGen/regcall.c +++ b/clang/test/CodeGen/regcall.c @@ -1,7 +1,7 @@ -// RUN: %clang_cc1 -emit-llvm %s -o - -ffreestanding -triple=i386-pc-win32 | FileCheck %s --check-prefix=Win32 -// RUN: %clang_cc1 -emit-llvm %s -o - -ffreestanding -triple=x86_64-pc-win32 | FileCheck %s --check-prefix=Win64 -// RUN: %clang_cc1 -emit-llvm %s -o - -ffreestanding -triple=i386-pc-linux-gnu | FileCheck %s --check-prefix=Lin32 -// RUN: %clang_cc1 -emit-llvm %s -o - -ffreestanding -triple=x86_64-pc-linux-gnu | FileCheck %s --check-prefix=Lin64 +// RUN: %clang_cc1 -disable-frozen-args -emit-llvm %s -o - -ffreestanding -triple=i386-pc-win32 | FileCheck %s --check-prefix=Win32 +// RUN: %clang_cc1 -disable-frozen-args -emit-llvm %s -o - -ffreestanding -triple=x86_64-pc-win32 | FileCheck %s --check-prefix=Win64 +// RUN: %clang_cc1 -disable-frozen-args -emit-llvm %s -o - -ffreestanding -triple=i386-pc-linux-gnu | FileCheck %s --check-prefix=Lin32 +// RUN: %clang_cc1 -disable-frozen-args -emit-llvm %s -o - -ffreestanding -triple=x86_64-pc-linux-gnu | FileCheck %s --check-prefix=Lin64 #include diff --git a/clang/test/CodeGen/regparm-flag.c b/clang/test/CodeGen/regparm-flag.c --- a/clang/test/CodeGen/regparm-flag.c +++ b/clang/test/CodeGen/regparm-flag.c @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -triple i386-unknown-unknown -mregparm 4 %s -emit-llvm -o - | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args -triple i386-unknown-unknown -mregparm 4 %s -emit-llvm -o - | FileCheck %s void f1(int a, int b, int c, int d, int e, int f, int g, int h); diff --git a/clang/test/CodeGen/regparm-struct.c b/clang/test/CodeGen/regparm-struct.c --- a/clang/test/CodeGen/regparm-struct.c +++ b/clang/test/CodeGen/regparm-struct.c @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -triple i386-unknown-unknown %s -emit-llvm -o - | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args -triple i386-unknown-unknown %s -emit-llvm -o - | FileCheck %s __attribute__((regparm(3))) void f1(int a, int b, int c, int d); // CHECK: declare void @f1(i32 inreg, i32 inreg, i32 inreg, i32) diff --git a/clang/test/CodeGen/regparm.c b/clang/test/CodeGen/regparm.c --- a/clang/test/CodeGen/regparm.c +++ b/clang/test/CodeGen/regparm.c @@ -15,13 +15,13 @@ // PR7025 void FASTCALL f1(int i, int j, int k); -// CHECK-LABEL: define void @f1(i32 inreg %i, i32 inreg %j, i32 %k) +// CHECK-LABEL: define void @f1(i32 frozen inreg %i, i32 frozen inreg %j, i32 frozen %k) void f1(int i, int j, int k) { } int main(void) { - // CHECK: call void @reduced(i8 inreg signext 0, {{.*}} %struct.foo* inreg null + // CHECK: call void @reduced(i8 frozen inreg signext 0, {{.*}} %struct.foo* frozen inreg null reduced(0, 0.0, 0, 0.0, 0); - // CHECK: call x86_stdcallcc void {{.*}}(i32 inreg 1, i32 inreg 2) + // CHECK: call x86_stdcallcc void {{.*}}(i32 frozen inreg 1, i32 frozen inreg 2) bar(1,2); } diff --git a/clang/test/CodeGen/renderscript.c b/clang/test/CodeGen/renderscript.c --- a/clang/test/CodeGen/renderscript.c +++ b/clang/test/CodeGen/renderscript.c @@ -17,9 +17,9 @@ _Static_assert(sizeof(long) == LONG_WIDTH_AND_ALIGN, "sizeof long is wrong"); _Static_assert(_Alignof(long) == LONG_WIDTH_AND_ALIGN, "sizeof long is wrong"); -// CHECK-RS32: i64 @test_long(i64 %v) -// CHECK-RS64: i64 @test_long(i64 %v) -// CHECK-ARM: i32 @test_long(i32 %v) +// CHECK-RS32: i64 @test_long(i64 frozen %v) +// CHECK-RS64: i64 @test_long(i64 frozen %v) +// CHECK-ARM: i32 @test_long(i32 frozen %v) long test_long(long v) { return v + 1; } @@ -104,11 +104,11 @@ typedef struct {long l1, l2; char c; } sLong2Char; // CHECK-RS32: void @argInt5([5 x i32] %s.coerce) -// CHECK-RS64: void @argInt5(%struct.sInt5* %s) +// CHECK-RS64: void @argInt5(%struct.sInt5* frozen %s) void argInt5(sInt5 s) {} // CHECK-RS32: void @argLong2Char([3 x i64] %s.coerce) -// CHECK-RS64: void @argLong2Char(%struct.sLong2Char* %s) +// CHECK-RS64: void @argLong2Char(%struct.sLong2Char* frozen %s) void argLong2Char(sLong2Char s) {} // ============================================================================= @@ -131,8 +131,8 @@ typedef struct {long l1, l2, l3, l4, l5, l6, l7, l8, l9; } sLong9; -// CHECK-RS32: void @argLong9(%struct.sLong9* byval(%struct.sLong9) align 8 %s) -// CHECK-RS64: void @argLong9(%struct.sLong9* %s) +// CHECK-RS32: void @argLong9(%struct.sLong9* frozen byval(%struct.sLong9) align 8 %s) +// CHECK-RS64: void @argLong9(%struct.sLong9* frozen %s) void argLong9(sLong9 s) {} // CHECK-RS32: void @retLong9(%struct.sLong9* noalias sret align 8 %agg.result) diff --git a/clang/test/CodeGen/restrict.c b/clang/test/CodeGen/restrict.c --- a/clang/test/CodeGen/restrict.c +++ b/clang/test/CodeGen/restrict.c @@ -2,25 +2,25 @@ // PR6695 -// CHECK: define void @test0(i32* %{{.*}}, i32 %{{.*}}) +// CHECK: define void @test0(i32* frozen %{{.*}}, i32 frozen %{{.*}}) void test0(int *x, int y) { } -// CHECK: define void @test1(i32* noalias %{{.*}}, i32 %{{.*}}) +// CHECK: define void @test1(i32* frozen noalias %{{.*}}, i32 frozen %{{.*}}) void test1(int * restrict x, int y) { } -// CHECK: define void @test2(i32* %{{.*}}, i32* noalias %{{.*}}) +// CHECK: define void @test2(i32* frozen %{{.*}}, i32* frozen noalias %{{.*}}) void test2(int *x, int * restrict y) { } typedef int * restrict rp; -// CHECK: define void @test3(i32* noalias %{{.*}}, i32 %{{.*}}) +// CHECK: define void @test3(i32* frozen noalias %{{.*}}, i32 frozen %{{.*}}) void test3(rp x, int y) { } -// CHECK: define void @test4(i32* %{{.*}}, i32* noalias %{{.*}}) +// CHECK: define void @test4(i32* frozen %{{.*}}, i32* frozen noalias %{{.*}}) void test4(int *x, rp y) { } diff --git a/clang/test/CodeGen/riscv-atomics.c b/clang/test/CodeGen/riscv-atomics.c --- a/clang/test/CodeGen/riscv-atomics.c +++ b/clang/test/CodeGen/riscv-atomics.c @@ -14,15 +14,15 @@ #include void test_i8_atomics(_Atomic(int8_t) * a, int8_t b) { - // RV32I: call zeroext i8 @__atomic_load_1 + // RV32I: call frozen zeroext i8 @__atomic_load_1 // RV32I: call void @__atomic_store_1 - // RV32I: call zeroext i8 @__atomic_fetch_add_1 + // RV32I: call frozen zeroext i8 @__atomic_fetch_add_1 // RV32IA: load atomic i8, i8* %a seq_cst, align 1 // RV32IA: store atomic i8 %b, i8* %a seq_cst, align 1 // RV32IA: atomicrmw add i8* %a, i8 %b seq_cst - // RV64I: call zeroext i8 @__atomic_load_1 + // RV64I: call frozen zeroext i8 @__atomic_load_1 // RV64I: call void @__atomic_store_1 - // RV64I: call zeroext i8 @__atomic_fetch_add_1 + // RV64I: call frozen zeroext i8 @__atomic_fetch_add_1 // RV64IA: load atomic i8, i8* %a seq_cst, align 1 // RV64IA: store atomic i8 %b, i8* %a seq_cst, align 1 // RV64IA: atomicrmw add i8* %a, i8 %b seq_cst @@ -32,15 +32,15 @@ } void test_i32_atomics(_Atomic(int32_t) * a, int32_t b) { - // RV32I: call i32 @__atomic_load_4 + // RV32I: call frozen i32 @__atomic_load_4 // RV32I: call void @__atomic_store_4 - // RV32I: call i32 @__atomic_fetch_add_4 + // RV32I: call frozen i32 @__atomic_fetch_add_4 // RV32IA: load atomic i32, i32* %a seq_cst, align 4 // RV32IA: store atomic i32 %b, i32* %a seq_cst, align 4 // RV32IA: atomicrmw add i32* %a, i32 %b seq_cst - // RV64I: call signext i32 @__atomic_load_4 + // RV64I: call frozen signext i32 @__atomic_load_4 // RV64I: call void @__atomic_store_4 - // RV64I: call signext i32 @__atomic_fetch_add_4 + // RV64I: call frozen signext i32 @__atomic_fetch_add_4 // RV64IA: load atomic i32, i32* %a seq_cst, align 4 // RV64IA: store atomic i32 %b, i32* %a seq_cst, align 4 // RV64IA: atomicrmw add i32* %a, i32 %b seq_cst @@ -50,15 +50,15 @@ } void test_i64_atomics(_Atomic(int64_t) * a, int64_t b) { - // RV32I: call i64 @__atomic_load_8 + // RV32I: call frozen i64 @__atomic_load_8 // RV32I: call void @__atomic_store_8 - // RV32I: call i64 @__atomic_fetch_add_8 - // RV32IA: call i64 @__atomic_load_8 + // RV32I: call frozen i64 @__atomic_fetch_add_8 + // RV32IA: call frozen i64 @__atomic_load_8 // RV32IA: call void @__atomic_store_8 - // RV32IA: call i64 @__atomic_fetch_add_8 - // RV64I: call i64 @__atomic_load_8 + // RV32IA: call frozen i64 @__atomic_fetch_add_8 + // RV64I: call frozen i64 @__atomic_load_8 // RV64I: call void @__atomic_store_8 - // RV64I: call i64 @__atomic_fetch_add_8 + // RV64I: call frozen i64 @__atomic_fetch_add_8 // RV64IA: load atomic i64, i64* %a seq_cst, align 8 // RV64IA: store atomic i64 %b, i64* %a seq_cst, align 8 // RV64IA: atomicrmw add i64* %a, i64 %b seq_cst diff --git a/clang/test/CodeGen/riscv-inline-asm.c b/clang/test/CodeGen/riscv-inline-asm.c --- a/clang/test/CodeGen/riscv-inline-asm.c +++ b/clang/test/CodeGen/riscv-inline-asm.c @@ -40,7 +40,7 @@ } void test_A(int *p) { -// CHECK-LABEL: define void @test_A(i32* %p) +// CHECK-LABEL: define void @test_A(i32* frozen %p) // CHECK: call void asm sideeffect "", "*A"(i32* %p) asm volatile("" :: "A"(*p)); } diff --git a/clang/test/CodeGen/riscv32-ilp32-abi.c b/clang/test/CodeGen/riscv32-ilp32-abi.c --- a/clang/test/CodeGen/riscv32-ilp32-abi.c +++ b/clang/test/CodeGen/riscv32-ilp32-abi.c @@ -25,7 +25,7 @@ // Scalars passed on the stack should not have signext/zeroext attributes // (they are anyext). -// CHECK-LABEL: define i32 @f_scalar_stack_1(i32 %a, i64 %b, float %c, double %d, fp128 %e, i8 zeroext %f, i8 %g, i8 %h) +// CHECK-LABEL: define frozen i32 @f_scalar_stack_1(i32 frozen %a, i64 frozen %b, float frozen %c, double frozen %d, fp128 frozen %e, i8 frozen zeroext %f, i8 frozen %g, i8 frozen %h) int f_scalar_stack_1(int32_t a, int64_t b, float c, double d, long double e, uint8_t f, int8_t g, uint8_t h) { return g + h; @@ -35,7 +35,7 @@ // the presence of large return values that consume a register due to the need // to pass a pointer. -// CHECK-LABEL: define void @f_scalar_stack_2(%struct.large* noalias sret align 4 %agg.result, float %a, i64 %b, double %c, fp128 %d, i8 zeroext %e, i8 %f, i8 %g) +// CHECK-LABEL: define void @f_scalar_stack_2(%struct.large* noalias sret align 4 %agg.result, float frozen %a, i64 frozen %b, double frozen %c, fp128 frozen %d, i8 frozen zeroext %e, i8 frozen %f, i8 frozen %g) struct large f_scalar_stack_2(float a, int64_t b, double c, long double d, uint8_t e, int8_t f, uint8_t g) { return (struct large){a, e, f, g}; @@ -44,10 +44,10 @@ // Aggregates and >=XLen scalars passed on the stack should be lowered just as // they would be if passed via registers. -// CHECK-LABEL: define void @f_scalar_stack_3(double %a, i64 %b, double %c, i64 %d, i32 %e, i64 %f, float %g, double %h, fp128 %i) +// CHECK-LABEL: define void @f_scalar_stack_3(double frozen %a, i64 frozen %b, double frozen %c, i64 frozen %d, i32 frozen %e, i64 frozen %f, float frozen %g, double frozen %h, fp128 frozen %i) void f_scalar_stack_3(double a, int64_t b, double c, int64_t d, int e, int64_t f, float g, double h, long double i) {} -// CHECK-LABEL: define void @f_agg_stack(double %a, i64 %b, double %c, i64 %d, i32 %e.coerce, [2 x i32] %f.coerce, i64 %g.coerce, %struct.large* %h) +// CHECK-LABEL: define void @f_agg_stack(double frozen %a, i64 frozen %b, double frozen %c, i64 frozen %d, i32 %e.coerce, [2 x i32] %f.coerce, i64 %g.coerce, %struct.large* frozen %h) void f_agg_stack(double a, int64_t b, double c, int64_t d, struct tiny e, struct small f, struct small_aligned g, struct large h) {} diff --git a/clang/test/CodeGen/riscv32-ilp32-ilp32f-abi.c b/clang/test/CodeGen/riscv32-ilp32-ilp32f-abi.c --- a/clang/test/CodeGen/riscv32-ilp32-ilp32f-abi.c +++ b/clang/test/CodeGen/riscv32-ilp32-ilp32f-abi.c @@ -27,7 +27,7 @@ // Scalars passed on the stack should not have signext/zeroext attributes // (they are anyext). -// CHECK-LABEL: define i32 @f_scalar_stack_1(i32 %a, i64 %b, i32 %c, double %d, fp128 %e, i8 zeroext %f, i8 %g, i8 %h) +// CHECK-LABEL: define frozen i32 @f_scalar_stack_1(i32 frozen %a, i64 frozen %b, i32 frozen %c, double frozen %d, fp128 frozen %e, i8 frozen zeroext %f, i8 frozen %g, i8 frozen %h) int f_scalar_stack_1(int32_t a, int64_t b, int32_t c, double d, long double e, uint8_t f, int8_t g, uint8_t h) { return g + h; @@ -37,7 +37,7 @@ // the presence of large return values that consume a register due to the need // to pass a pointer. -// CHECK-LABEL: define void @f_scalar_stack_2(%struct.large* noalias sret align 4 %agg.result, i32 %a, i64 %b, double %c, fp128 %d, i8 zeroext %e, i8 %f, i8 %g) +// CHECK-LABEL: define void @f_scalar_stack_2(%struct.large* noalias sret align 4 %agg.result, i32 frozen %a, i64 frozen %b, double frozen %c, fp128 frozen %d, i8 frozen zeroext %e, i8 frozen %f, i8 frozen %g) struct large f_scalar_stack_2(int32_t a, int64_t b, double c, long double d, uint8_t e, int8_t f, uint8_t g) { return (struct large){a, e, f, g}; @@ -46,10 +46,10 @@ // Aggregates and >=XLen scalars passed on the stack should be lowered just as // they would be if passed via registers. -// CHECK-LABEL: define void @f_scalar_stack_3(double %a, i64 %b, double %c, i64 %d, i32 %e, i64 %f, i32 %g, double %h, fp128 %i) +// CHECK-LABEL: define void @f_scalar_stack_3(double frozen %a, i64 frozen %b, double frozen %c, i64 frozen %d, i32 frozen %e, i64 frozen %f, i32 frozen %g, double frozen %h, fp128 frozen %i) void f_scalar_stack_3(double a, int64_t b, double c, int64_t d, int e, int64_t f, int32_t g, double h, long double i) {} -// CHECK-LABEL: define void @f_agg_stack(double %a, i64 %b, double %c, i64 %d, i32 %e.coerce, [2 x i32] %f.coerce, i64 %g.coerce, %struct.large* %h) +// CHECK-LABEL: define void @f_agg_stack(double frozen %a, i64 frozen %b, double frozen %c, i64 frozen %d, i32 %e.coerce, [2 x i32] %f.coerce, i64 %g.coerce, %struct.large* frozen %h) void f_agg_stack(double a, int64_t b, double c, int64_t d, struct tiny e, struct small f, struct small_aligned g, struct large h) {} diff --git a/clang/test/CodeGen/riscv32-ilp32-ilp32f-ilp32d-abi.c b/clang/test/CodeGen/riscv32-ilp32-ilp32f-ilp32d-abi.c --- a/clang/test/CodeGen/riscv32-ilp32-ilp32f-ilp32d-abi.c +++ b/clang/test/CodeGen/riscv32-ilp32-ilp32f-ilp32d-abi.c @@ -18,37 +18,37 @@ // Scalar arguments and return values smaller than the word size are extended // according to the sign of their type, up to 32 bits -// CHECK-LABEL: define zeroext i1 @f_scalar_0(i1 zeroext %x) +// CHECK-LABEL: define frozen zeroext i1 @f_scalar_0(i1 frozen zeroext %x) _Bool f_scalar_0(_Bool x) { return x; } -// CHECK-LABEL: define signext i8 @f_scalar_1(i8 signext %x) +// CHECK-LABEL: define frozen signext i8 @f_scalar_1(i8 frozen signext %x) int8_t f_scalar_1(int8_t x) { return x; } -// CHECK-LABEL: define zeroext i8 @f_scalar_2(i8 zeroext %x) +// CHECK-LABEL: define frozen zeroext i8 @f_scalar_2(i8 frozen zeroext %x) uint8_t f_scalar_2(uint8_t x) { return x; } -// CHECK-LABEL: define i32 @f_scalar_3(i32 %x) +// CHECK-LABEL: define frozen i32 @f_scalar_3(i32 frozen %x) int32_t f_scalar_3(int32_t x) { return x; } -// CHECK-LABEL: define i64 @f_scalar_4(i64 %x) +// CHECK-LABEL: define frozen i64 @f_scalar_4(i64 frozen %x) int64_t f_scalar_4(int64_t x) { return x; } #ifdef __SIZEOF_INT128__ -// CHECK-FORCEINT128-LABEL: define i128 @f_scalar_5(i128 %x) +// CHECK-FORCEINT128-LABEL: define frozen i128 @f_scalar_5(i128 frozen %x) __int128_t f_scalar_5(__int128_t x) { return x; } #endif -// CHECK-LABEL: define float @f_fp_scalar_1(float %x) +// CHECK-LABEL: define frozen float @f_fp_scalar_1(float frozen %x) float f_fp_scalar_1(float x) { return x; } -// CHECK-LABEL: define double @f_fp_scalar_2(double %x) +// CHECK-LABEL: define frozen double @f_fp_scalar_2(double frozen %x) double f_fp_scalar_2(double x) { return x; } // Scalars larger than 2*xlen are passed/returned indirect. However, the // RISC-V LLVM backend can handle this fine, so the function doesn't need to // be modified. -// CHECK-LABEL: define fp128 @f_fp_scalar_3(fp128 %x) +// CHECK-LABEL: define frozen fp128 @f_fp_scalar_3(fp128 frozen %x) long double f_fp_scalar_3(long double x) { return x; } // Empty structs or unions are ignored. @@ -88,23 +88,23 @@ typedef uint8_t v4i8 __attribute__((vector_size(4))); typedef int32_t v1i32 __attribute__((vector_size(4))); -// CHECK-LABEL: define void @f_vec_tiny_v4i8(i32 %x.coerce) +// CHECK-LABEL: define void @f_vec_tiny_v4i8(i32 frozen %x.coerce) void f_vec_tiny_v4i8(v4i8 x) { x[0] = x[1]; x[2] = x[3]; } -// CHECK-LABEL: define i32 @f_vec_tiny_v4i8_ret() +// CHECK-LABEL: define frozen i32 @f_vec_tiny_v4i8_ret() v4i8 f_vec_tiny_v4i8_ret() { return (v4i8){1, 2, 3, 4}; } -// CHECK-LABEL: define void @f_vec_tiny_v1i32(i32 %x.coerce) +// CHECK-LABEL: define void @f_vec_tiny_v1i32(i32 frozen %x.coerce) void f_vec_tiny_v1i32(v1i32 x) { x[0] = 114; } -// CHECK-LABEL: define i32 @f_vec_tiny_v1i32_ret() +// CHECK-LABEL: define frozen i32 @f_vec_tiny_v1i32_ret() v1i32 f_vec_tiny_v1i32_ret() { return (v1i32){1}; } @@ -127,22 +127,22 @@ typedef uint8_t v8i8 __attribute__((vector_size(8))); typedef int64_t v1i64 __attribute__((vector_size(8))); -// CHECK-LABEL: define void @f_vec_small_v8i8(i64 %x.coerce) +// CHECK-LABEL: define void @f_vec_small_v8i8(i64 frozen %x.coerce) void f_vec_small_v8i8(v8i8 x) { x[0] = x[7]; } -// CHECK-LABEL: define i64 @f_vec_small_v8i8_ret() +// CHECK-LABEL: define frozen i64 @f_vec_small_v8i8_ret() v8i8 f_vec_small_v8i8_ret() { return (v8i8){1, 2, 3, 4, 5, 6, 7, 8}; } -// CHECK-LABEL: define void @f_vec_small_v1i64(i64 %x.coerce) +// CHECK-LABEL: define void @f_vec_small_v1i64(i64 frozen %x.coerce) void f_vec_small_v1i64(v1i64 x) { x[0] = 114; } -// CHECK-LABEL: define i64 @f_vec_small_v1i64_ret() +// CHECK-LABEL: define frozen i64 @f_vec_small_v1i64_ret() v1i64 f_vec_small_v1i64_ret() { return (v1i64){1}; } @@ -170,21 +170,21 @@ int32_t a, b, c, d; }; -// CHECK-LABEL: define void @f_agg_large(%struct.large* %x) +// CHECK-LABEL: define void @f_agg_large(%struct.large* frozen %x) void f_agg_large(struct large x) { x.a = x.b + x.c + x.d; } // The address where the struct should be written to will be the first // argument -// CHECK-LABEL: define void @f_agg_large_ret(%struct.large* noalias sret align 4 %agg.result, i32 %i, i8 signext %j) +// CHECK-LABEL: define void @f_agg_large_ret(%struct.large* noalias sret align 4 %agg.result, i32 frozen %i, i8 frozen signext %j) struct large f_agg_large_ret(int32_t i, int8_t j) { return (struct large){1, 2, 3, 4}; } typedef unsigned char v16i8 __attribute__((vector_size(16))); -// CHECK-LABEL: define void @f_vec_large_v16i8(<16 x i8>* %0) +// CHECK-LABEL: define void @f_vec_large_v16i8(<16 x i8>* frozen %0) void f_vec_large_v16i8(v16i8 x) { x[0] = x[7]; } @@ -197,7 +197,7 @@ // Scalars passed on the stack should not have signext/zeroext attributes // (they are anyext). -// CHECK-LABEL: define i32 @f_scalar_stack_1(i32 %a.coerce, [2 x i32] %b.coerce, i64 %c.coerce, %struct.large* %d, i8 zeroext %e, i8 signext %f, i8 %g, i8 %h) +// CHECK-LABEL: define frozen i32 @f_scalar_stack_1(i32 %a.coerce, [2 x i32] %b.coerce, i64 %c.coerce, %struct.large* frozen %d, i8 frozen zeroext %e, i8 frozen signext %f, i8 frozen %g, i8 frozen %h) int f_scalar_stack_1(struct tiny a, struct small b, struct small_aligned c, struct large d, uint8_t e, int8_t f, uint8_t g, int8_t h) { return g + h; @@ -207,13 +207,13 @@ // the presence of large return values that consume a register due to the need // to pass a pointer. -// CHECK-LABEL: define void @f_scalar_stack_2(%struct.large* noalias sret align 4 %agg.result, i32 %a, i64 %b, i64 %c, fp128 %d, i8 zeroext %e, i8 %f, i8 %g) +// CHECK-LABEL: define void @f_scalar_stack_2(%struct.large* noalias sret align 4 %agg.result, i32 frozen %a, i64 frozen %b, i64 frozen %c, fp128 frozen %d, i8 frozen zeroext %e, i8 frozen %f, i8 frozen %g) struct large f_scalar_stack_2(int32_t a, int64_t b, int64_t c, long double d, uint8_t e, int8_t f, uint8_t g) { return (struct large){a, e, f, g}; } -// CHECK-LABEL: define fp128 @f_scalar_stack_4(i32 %a, i64 %b, i64 %c, fp128 %d, i8 zeroext %e, i8 %f, i8 %g) +// CHECK-LABEL: define frozen fp128 @f_scalar_stack_4(i32 frozen %a, i64 frozen %b, i64 frozen %c, fp128 frozen %d, i8 frozen zeroext %e, i8 frozen %f, i8 frozen %g) long double f_scalar_stack_4(int32_t a, int64_t b, int64_t c, long double d, uint8_t e, int8_t f, uint8_t g) { return d; @@ -222,11 +222,11 @@ // Aggregates and >=XLen scalars passed on the stack should be lowered just as // they would be if passed via registers. -// CHECK-LABEL: define void @f_scalar_stack_5(double %a, i64 %b, double %c, i64 %d, i32 %e, i64 %f, float %g, double %h, fp128 %i) +// CHECK-LABEL: define void @f_scalar_stack_5(double frozen %a, i64 frozen %b, double frozen %c, i64 frozen %d, i32 frozen %e, i64 frozen %f, float frozen %g, double frozen %h, fp128 frozen %i) void f_scalar_stack_5(double a, int64_t b, double c, int64_t d, int e, int64_t f, float g, double h, long double i) {} -// CHECK-LABEL: define void @f_agg_stack(double %a, i64 %b, double %c, i64 %d, i32 %e.coerce, [2 x i32] %f.coerce, i64 %g.coerce, %struct.large* %h) +// CHECK-LABEL: define void @f_agg_stack(double frozen %a, i64 frozen %b, double frozen %c, i64 frozen %d, i32 %e.coerce, [2 x i32] %f.coerce, i64 %g.coerce, %struct.large* frozen %h) void f_agg_stack(double a, int64_t b, double c, int64_t d, struct tiny e, struct small f, struct small_aligned g, struct large h) {} @@ -237,14 +237,14 @@ int f_va_callee(int, ...); // CHECK-LABEL: define void @f_va_caller() -// CHECK: call i32 (i32, ...) @f_va_callee(i32 1, i32 2, i64 3, double 4.000000e+00, double 5.000000e+00, i32 {{%.*}}, [2 x i32] {{%.*}}, i64 {{%.*}}, %struct.large* {{%.*}}) +// CHECK: call frozen i32 (i32, ...) @f_va_callee(i32 frozen 1, i32 frozen 2, i64 frozen 3, double frozen 4.000000e+00, double frozen 5.000000e+00, i32 {{%.*}}, [2 x i32] {{%.*}}, i64 {{%.*}}, %struct.large* frozen {{%.*}}) void f_va_caller() { f_va_callee(1, 2, 3LL, 4.0f, 5.0, (struct tiny){6, 7, 8, 9}, (struct small){10, NULL}, (struct small_aligned){11}, (struct large){12, 13, 14, 15}); } -// CHECK-LABEL: define i32 @f_va_1(i8* %fmt, ...) {{.*}} { +// CHECK-LABEL: define frozen i32 @f_va_1(i8* frozen %fmt, ...) {{.*}} { // CHECK: [[FMT_ADDR:%.*]] = alloca i8*, align 4 // CHECK: [[VA:%.*]] = alloca i8*, align 4 // CHECK: [[V:%.*]] = alloca i32, align 4 @@ -362,7 +362,7 @@ return v + x; } -// CHECK-LABEL: define i32 @f_va_4(i8* %fmt, ...) {{.*}} { +// CHECK-LABEL: define frozen i32 @f_va_4(i8* frozen %fmt, ...) {{.*}} { // CHECK: [[FMT_ADDR:%.*]] = alloca i8*, align 4 // CHECK-NEXT: [[VA:%.*]] = alloca i8*, align 4 // CHECK-NEXT: [[V:%.*]] = alloca i32, align 4 diff --git a/clang/test/CodeGen/riscv32-ilp32d-abi.c b/clang/test/CodeGen/riscv32-ilp32d-abi.c --- a/clang/test/CodeGen/riscv32-ilp32d-abi.c +++ b/clang/test/CodeGen/riscv32-ilp32d-abi.c @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -triple riscv32 -target-feature +d -target-abi ilp32d -emit-llvm %s -o - \ +// RUN: %clang_cc1 -disable-frozen-args -triple riscv32 -target-feature +d -target-abi ilp32d -emit-llvm %s -o - \ // RUN: | FileCheck %s #include @@ -157,7 +157,7 @@ // CHECK: define void @f_doublecomplex(double %a.coerce0, double %a.coerce1) void f_doublecomplex(double __complex__ a) {} -// CHECK: define { double, double } @f_ret_doublecomplex() +// CHECK: define frozen { double, double } @f_ret_doublecomplex() double __complex__ f_ret_doublecomplex() { return 1.0; } @@ -299,7 +299,7 @@ return (struct double_double_s){1.0, 2.0}; } -// CHECK: define { double, double } @f_ret_doublecomplex_double_int32_s_just_sufficient_gprs(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, i32 %g, double %0, i32 %1) +// CHECK: define frozen { double, double } @f_ret_doublecomplex_double_int32_s_just_sufficient_gprs(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, i32 %g, double %0, i32 %1) double __complex__ f_ret_doublecomplex_double_int32_s_just_sufficient_gprs( int a, int b, int c, int d, int e, int f, int g, struct double_int32_s h) { return 1.0; diff --git a/clang/test/CodeGen/riscv32-ilp32f-abi.c b/clang/test/CodeGen/riscv32-ilp32f-abi.c --- a/clang/test/CodeGen/riscv32-ilp32f-abi.c +++ b/clang/test/CodeGen/riscv32-ilp32f-abi.c @@ -6,7 +6,7 @@ // Doubles are still passed in GPRs, so the 'e' argument will be anyext as // GPRs are exhausted. -// CHECK: define void @f_fpr_tracking(double %a, double %b, double %c, double %d, i8 %e) +// CHECK: define void @f_fpr_tracking(double frozen %a, double frozen %b, double frozen %c, double frozen %d, i8 frozen %e) void f_fpr_tracking(double a, double b, double c, double d, int8_t e) {} // Lowering for doubles is unnmodified, as 64 > FLEN. @@ -23,7 +23,7 @@ struct double_double_s { double d; double e; }; -// CHECK: define void @f_double_double_s_arg(%struct.double_double_s* %a) +// CHECK: define void @f_double_double_s_arg(%struct.double_double_s* frozen %a) void f_double_double_s_arg(struct double_double_s a) {} // CHECK: define void @f_ret_double_double_s(%struct.double_double_s* noalias sret align 8 %agg.result) @@ -35,7 +35,7 @@ struct int_double_s { int a; double b; }; -// CHECK: define void @f_int_double_s_arg(%struct.int_double_s* %a) +// CHECK: define void @f_int_double_s_arg(%struct.int_double_s* frozen %a) void f_int_double_s_arg(struct int_double_s a) {} // CHECK: define void @f_ret_int_double_s(%struct.int_double_s* noalias sret align 8 %agg.result) diff --git a/clang/test/CodeGen/riscv32-ilp32f-ilp32d-abi.c b/clang/test/CodeGen/riscv32-ilp32f-ilp32d-abi.c --- a/clang/test/CodeGen/riscv32-ilp32f-ilp32d-abi.c +++ b/clang/test/CodeGen/riscv32-ilp32f-ilp32d-abi.c @@ -1,6 +1,6 @@ -// RUN: %clang_cc1 -triple riscv32 -target-feature +f -target-abi ilp32f -emit-llvm %s -o - \ +// RUN: %clang_cc1 -disable-frozen-args -triple riscv32 -target-feature +f -target-abi ilp32f -emit-llvm %s -o - \ // RUN: | FileCheck %s -// RUN: %clang_cc1 -triple riscv32 -target-feature +d -target-abi ilp32d -emit-llvm %s -o - \ +// RUN: %clang_cc1 -disable-frozen-args -triple riscv32 -target-feature +d -target-abi ilp32d -emit-llvm %s -o - \ // RUN: | FileCheck %s #include @@ -150,7 +150,7 @@ // CHECK: define void @f_floatcomplex(float %a.coerce0, float %a.coerce1) void f_floatcomplex(float __complex__ a) {} -// CHECK: define { float, float } @f_ret_floatcomplex() +// CHECK: define frozen { float, float } @f_ret_floatcomplex() float __complex__ f_ret_floatcomplex() { return 1.0; } diff --git a/clang/test/CodeGen/riscv64-lp64-abi.c b/clang/test/CodeGen/riscv64-lp64-abi.c --- a/clang/test/CodeGen/riscv64-lp64-abi.c +++ b/clang/test/CodeGen/riscv64-lp64-abi.c @@ -15,7 +15,7 @@ // Scalars passed on the stack should not have signext/zeroext attributes // (they are anyext). -// CHECK-LABEL: define signext i32 @f_scalar_stack_1(i32 signext %a, i128 %b, float %c, fp128 %d, <32 x i8>* %0, i8 zeroext %f, i8 %g, i8 %h) +// CHECK-LABEL: define frozen signext i32 @f_scalar_stack_1(i32 frozen signext %a, i128 frozen %b, float frozen %c, fp128 frozen %d, <32 x i8>* frozen %0, i8 frozen zeroext %f, i8 frozen %g, i8 frozen %h) int f_scalar_stack_1(int32_t a, __int128_t b, float c, long double d, v32i8 e, uint8_t f, int8_t g, uint8_t h) { return g + h; @@ -25,7 +25,7 @@ // the presence of large return values that consume a register due to the need // to pass a pointer. -// CHECK-LABEL: define void @f_scalar_stack_2(%struct.large* noalias sret align 8 %agg.result, double %a, i128 %b, fp128 %c, <32 x i8>* %0, i8 zeroext %e, i8 %f, i8 %g) +// CHECK-LABEL: define void @f_scalar_stack_2(%struct.large* noalias sret align 8 %agg.result, double frozen %a, i128 frozen %b, fp128 frozen %c, <32 x i8>* frozen %0, i8 frozen zeroext %e, i8 frozen %f, i8 frozen %g) struct large f_scalar_stack_2(double a, __int128_t b, long double c, v32i8 d, uint8_t e, int8_t f, uint8_t g) { return (struct large){a, e, f, g}; @@ -34,10 +34,10 @@ // Complex floating-point values or structs containing a single complex // floating-point value should be passed in a GPR. -// CHECK: define void @f_floatcomplex(i64 %a.coerce) +// CHECK: define void @f_floatcomplex(i64 frozen %a.coerce) void f_floatcomplex(float __complex__ a) {} -// CHECK: define i64 @f_ret_floatcomplex() +// CHECK: define frozen i64 @f_ret_floatcomplex() float __complex__ f_ret_floatcomplex() { return 1.0; } diff --git a/clang/test/CodeGen/riscv64-lp64-lp64f-abi.c b/clang/test/CodeGen/riscv64-lp64-lp64f-abi.c --- a/clang/test/CodeGen/riscv64-lp64-lp64f-abi.c +++ b/clang/test/CodeGen/riscv64-lp64-lp64f-abi.c @@ -17,7 +17,7 @@ // Scalars passed on the stack should not have signext/zeroext attributes // (they are anyext). -// CHECK-LABEL: define signext i32 @f_scalar_stack_1(i32 signext %a, i128 %b, double %c, fp128 %d, <32 x i8>* %0, i8 zeroext %f, i8 %g, i8 %h) +// CHECK-LABEL: define frozen signext i32 @f_scalar_stack_1(i32 frozen signext %a, i128 frozen %b, double frozen %c, fp128 frozen %d, <32 x i8>* frozen %0, i8 frozen zeroext %f, i8 frozen %g, i8 frozen %h) int f_scalar_stack_1(int32_t a, __int128_t b, double c, long double d, v32i8 e, uint8_t f, int8_t g, uint8_t h) { return g + h; @@ -27,7 +27,7 @@ // the presence of large return values that consume a register due to the need // to pass a pointer. -// CHECK-LABEL: define void @f_scalar_stack_2(%struct.large* noalias sret align 8 %agg.result, double %a, i128 %b, fp128 %c, <32 x i8>* %0, i8 zeroext %e, i8 %f, i8 %g) +// CHECK-LABEL: define void @f_scalar_stack_2(%struct.large* noalias sret align 8 %agg.result, double frozen %a, i128 frozen %b, fp128 frozen %c, <32 x i8>* frozen %0, i8 frozen zeroext %e, i8 frozen %f, i8 frozen %g) struct large f_scalar_stack_2(double a, __int128_t b, long double c, v32i8 d, uint8_t e, int8_t f, uint8_t g) { return (struct large){a, e, f, g}; diff --git a/clang/test/CodeGen/riscv64-lp64-lp64f-lp64d-abi.c b/clang/test/CodeGen/riscv64-lp64-lp64f-lp64d-abi.c --- a/clang/test/CodeGen/riscv64-lp64-lp64f-lp64d-abi.c +++ b/clang/test/CodeGen/riscv64-lp64-lp64f-lp64d-abi.c @@ -16,28 +16,28 @@ // Scalar arguments and return values smaller than the word size are extended // according to the sign of their type, up to 32 bits -// CHECK-LABEL: define zeroext i1 @f_scalar_0(i1 zeroext %x) +// CHECK-LABEL: define frozen zeroext i1 @f_scalar_0(i1 frozen zeroext %x) _Bool f_scalar_0(_Bool x) { return x; } -// CHECK-LABEL: define signext i8 @f_scalar_1(i8 signext %x) +// CHECK-LABEL: define frozen signext i8 @f_scalar_1(i8 frozen signext %x) int8_t f_scalar_1(int8_t x) { return x; } -// CHECK-LABEL: define zeroext i8 @f_scalar_2(i8 zeroext %x) +// CHECK-LABEL: define frozen zeroext i8 @f_scalar_2(i8 frozen zeroext %x) uint8_t f_scalar_2(uint8_t x) { return x; } -// CHECK-LABEL: define signext i32 @f_scalar_3(i32 signext %x) +// CHECK-LABEL: define frozen signext i32 @f_scalar_3(i32 frozen signext %x) uint32_t f_scalar_3(int32_t x) { return x; } -// CHECK-LABEL: define i64 @f_scalar_4(i64 %x) +// CHECK-LABEL: define frozen i64 @f_scalar_4(i64 frozen %x) int64_t f_scalar_4(int64_t x) { return x; } -// CHECK-LABEL: define float @f_fp_scalar_1(float %x) +// CHECK-LABEL: define frozen float @f_fp_scalar_1(float frozen %x) float f_fp_scalar_1(float x) { return x; } -// CHECK-LABEL: define double @f_fp_scalar_2(double %x) +// CHECK-LABEL: define frozen double @f_fp_scalar_2(double frozen %x) double f_fp_scalar_2(double x) { return x; } -// CHECK-LABEL: define fp128 @f_fp_scalar_3(fp128 %x) +// CHECK-LABEL: define frozen fp128 @f_fp_scalar_3(fp128 frozen %x) long double f_fp_scalar_3(long double x) { return x; } // Empty structs or unions are ignored. @@ -77,23 +77,23 @@ typedef uint16_t v4i16 __attribute__((vector_size(8))); typedef int64_t v1i64 __attribute__((vector_size(8))); -// CHECK-LABEL: define void @f_vec_tiny_v4i16(i64 %x.coerce) +// CHECK-LABEL: define void @f_vec_tiny_v4i16(i64 frozen %x.coerce) void f_vec_tiny_v4i16(v4i16 x) { x[0] = x[1]; x[2] = x[3]; } -// CHECK-LABEL: define i64 @f_vec_tiny_v4i16_ret() +// CHECK-LABEL: define frozen i64 @f_vec_tiny_v4i16_ret() v4i16 f_vec_tiny_v4i16_ret() { return (v4i16){1, 2, 3, 4}; } -// CHECK-LABEL: define void @f_vec_tiny_v1i64(i64 %x.coerce) +// CHECK-LABEL: define void @f_vec_tiny_v1i64(i64 frozen %x.coerce) void f_vec_tiny_v1i64(v1i64 x) { x[0] = 114; } -// CHECK-LABEL: define i64 @f_vec_tiny_v1i64_ret() +// CHECK-LABEL: define frozen i64 @f_vec_tiny_v1i64_ret() v1i64 f_vec_tiny_v1i64_ret() { return (v1i64){1}; } @@ -116,22 +116,22 @@ typedef uint16_t v8i16 __attribute__((vector_size(16))); typedef __int128_t v1i128 __attribute__((vector_size(16))); -// CHECK-LABEL: define void @f_vec_small_v8i16(i128 %x.coerce) +// CHECK-LABEL: define void @f_vec_small_v8i16(i128 frozen %x.coerce) void f_vec_small_v8i16(v8i16 x) { x[0] = x[7]; } -// CHECK-LABEL: define i128 @f_vec_small_v8i16_ret() +// CHECK-LABEL: define frozen i128 @f_vec_small_v8i16_ret() v8i16 f_vec_small_v8i16_ret() { return (v8i16){1, 2, 3, 4, 5, 6, 7, 8}; } -// CHECK-LABEL: define void @f_vec_small_v1i128(i128 %x.coerce) +// CHECK-LABEL: define void @f_vec_small_v1i128(i128 frozen %x.coerce) void f_vec_small_v1i128(v1i128 x) { x[0] = 114; } -// CHECK-LABEL: define i128 @f_vec_small_v1i128_ret() +// CHECK-LABEL: define frozen i128 @f_vec_small_v1i128_ret() v1i128 f_vec_small_v1i128_ret() { return (v1i128){1}; } @@ -159,21 +159,21 @@ int64_t a, b, c, d; }; -// CHECK-LABEL: define void @f_agg_large(%struct.large* %x) +// CHECK-LABEL: define void @f_agg_large(%struct.large* frozen %x) void f_agg_large(struct large x) { x.a = x.b + x.c + x.d; } // The address where the struct should be written to will be the first // argument -// CHECK-LABEL: define void @f_agg_large_ret(%struct.large* noalias sret align 8 %agg.result, i32 signext %i, i8 signext %j) +// CHECK-LABEL: define void @f_agg_large_ret(%struct.large* noalias sret align 8 %agg.result, i32 frozen signext %i, i8 frozen signext %j) struct large f_agg_large_ret(int32_t i, int8_t j) { return (struct large){1, 2, 3, 4}; } typedef unsigned char v32i8 __attribute__((vector_size(32))); -// CHECK-LABEL: define void @f_vec_large_v32i8(<32 x i8>* %0) +// CHECK-LABEL: define void @f_vec_large_v32i8(<32 x i8>* frozen %0) void f_vec_large_v32i8(v32i8 x) { x[0] = x[7]; } @@ -186,13 +186,13 @@ // Scalars passed on the stack should not have signext/zeroext attributes // (they are anyext). -// CHECK-LABEL: define signext i32 @f_scalar_stack_1(i64 %a.coerce, [2 x i64] %b.coerce, i128 %c.coerce, %struct.large* %d, i8 zeroext %e, i8 signext %f, i8 %g, i8 %h) +// CHECK-LABEL: define frozen signext i32 @f_scalar_stack_1(i64 %a.coerce, [2 x i64] %b.coerce, i128 %c.coerce, %struct.large* frozen %d, i8 frozen zeroext %e, i8 frozen signext %f, i8 frozen %g, i8 frozen %h) int f_scalar_stack_1(struct tiny a, struct small b, struct small_aligned c, struct large d, uint8_t e, int8_t f, uint8_t g, int8_t h) { return g + h; } -// CHECK-LABEL: define signext i32 @f_scalar_stack_2(i32 signext %a, i128 %b, i64 %c, fp128 %d, <32 x i8>* %0, i8 zeroext %f, i8 %g, i8 %h) +// CHECK-LABEL: define frozen signext i32 @f_scalar_stack_2(i32 frozen signext %a, i128 frozen %b, i64 frozen %c, fp128 frozen %d, <32 x i8>* frozen %0, i8 frozen zeroext %f, i8 frozen %g, i8 frozen %h) int f_scalar_stack_2(int32_t a, __int128_t b, int64_t c, long double d, v32i8 e, uint8_t f, int8_t g, uint8_t h) { return g + h; @@ -202,7 +202,7 @@ // the presence of large return values that consume a register due to the need // to pass a pointer. -// CHECK-LABEL: define void @f_scalar_stack_3(%struct.large* noalias sret align 8 %agg.result, i32 signext %a, i128 %b, fp128 %c, <32 x i8>* %0, i8 zeroext %e, i8 %f, i8 %g) +// CHECK-LABEL: define void @f_scalar_stack_3(%struct.large* noalias sret align 8 %agg.result, i32 frozen signext %a, i128 frozen %b, fp128 frozen %c, <32 x i8>* frozen %0, i8 frozen zeroext %e, i8 frozen %f, i8 frozen %g) struct large f_scalar_stack_3(uint32_t a, __int128_t b, long double c, v32i8 d, uint8_t e, int8_t f, uint8_t g) { return (struct large){a, e, f, g}; @@ -217,31 +217,31 @@ // CHECK-LABEL: define void @f_va_caller() void f_va_caller() { - // CHECK: call signext i32 (i32, ...) @f_va_callee(i32 signext 1, i32 signext 2, i64 3, double 4.000000e+00, double 5.000000e+00, i64 {{%.*}}, [2 x i64] {{%.*}}, i128 {{%.*}}, %struct.large* {{%.*}}) + // CHECK: call frozen signext i32 (i32, ...) @f_va_callee(i32 frozen signext 1, i32 frozen signext 2, i64 frozen 3, double frozen 4.000000e+00, double frozen 5.000000e+00, i64 {{%.*}}, [2 x i64] {{%.*}}, i128 {{%.*}}, %struct.large* frozen {{%.*}}) f_va_callee(1, 2, 3LL, 4.0f, 5.0, (struct tiny){6, 7, 8, 9}, (struct small){10, NULL}, (struct small_aligned){11}, (struct large){12, 13, 14, 15}); - // CHECK: call signext i32 (i32, ...) @f_va_callee(i32 signext 1, i32 signext 2, i32 signext 3, i32 signext 4, fp128 0xL00000000000000004001400000000000, i32 signext 6, i32 signext 7, i32 8, i32 9) + // CHECK: call frozen signext i32 (i32, ...) @f_va_callee(i32 frozen signext 1, i32 frozen signext 2, i32 frozen signext 3, i32 frozen signext 4, fp128 frozen 0xL00000000000000004001400000000000, i32 frozen signext 6, i32 frozen signext 7, i32 frozen 8, i32 frozen 9) f_va_callee(1, 2, 3, 4, 5.0L, 6, 7, 8, 9); - // CHECK: call signext i32 (i32, ...) @f_va_callee(i32 signext 1, i32 signext 2, i32 signext 3, i32 signext 4, i128 {{%.*}}, i32 signext 6, i32 signext 7, i32 8, i32 9) + // CHECK: call frozen signext i32 (i32, ...) @f_va_callee(i32 frozen signext 1, i32 frozen signext 2, i32 frozen signext 3, i32 frozen signext 4, i128 {{%.*}}, i32 frozen signext 6, i32 frozen signext 7, i32 frozen 8, i32 frozen 9) f_va_callee(1, 2, 3, 4, (struct small_aligned){5}, 6, 7, 8, 9); - // CHECK: call signext i32 (i32, ...) @f_va_callee(i32 signext 1, i32 signext 2, i32 signext 3, i32 signext 4, [2 x i64] {{%.*}}, i32 signext 6, i32 signext 7, i32 8, i32 9) + // CHECK: call frozen signext i32 (i32, ...) @f_va_callee(i32 frozen signext 1, i32 frozen signext 2, i32 frozen signext 3, i32 frozen signext 4, [2 x i64] {{%.*}}, i32 frozen signext 6, i32 frozen signext 7, i32 frozen 8, i32 frozen 9) f_va_callee(1, 2, 3, 4, (struct small){5, NULL}, 6, 7, 8, 9); - // CHECK: call signext i32 (i32, ...) @f_va_callee(i32 signext 1, i32 signext 2, i32 signext 3, i32 signext 4, i32 signext 5, fp128 0xL00000000000000004001800000000000, i32 7, i32 8, i32 9) + // CHECK: call frozen signext i32 (i32, ...) @f_va_callee(i32 frozen signext 1, i32 frozen signext 2, i32 frozen signext 3, i32 frozen signext 4, i32 frozen signext 5, fp128 frozen 0xL00000000000000004001800000000000, i32 frozen 7, i32 frozen 8, i32 frozen 9) f_va_callee(1, 2, 3, 4, 5, 6.0L, 7, 8, 9); - // CHECK: call signext i32 (i32, ...) @f_va_callee(i32 signext 1, i32 signext 2, i32 signext 3, i32 signext 4, i32 signext 5, i128 {{%.*}}, i32 7, i32 8, i32 9) + // CHECK: call frozen signext i32 (i32, ...) @f_va_callee(i32 frozen signext 1, i32 frozen signext 2, i32 frozen signext 3, i32 frozen signext 4, i32 frozen signext 5, i128 {{%.*}}, i32 frozen 7, i32 frozen 8, i32 frozen 9) f_va_callee(1, 2, 3, 4, 5, (struct small_aligned){6}, 7, 8, 9); - // CHECK: call signext i32 (i32, ...) @f_va_callee(i32 signext 1, i32 signext 2, i32 signext 3, i32 signext 4, i32 signext 5, [2 x i64] {{%.*}}, i32 signext 7, i32 8, i32 9) + // CHECK: call frozen signext i32 (i32, ...) @f_va_callee(i32 frozen signext 1, i32 frozen signext 2, i32 frozen signext 3, i32 frozen signext 4, i32 frozen signext 5, [2 x i64] {{%.*}}, i32 frozen signext 7, i32 frozen 8, i32 frozen 9) f_va_callee(1, 2, 3, 4, 5, (struct small){6, NULL}, 7, 8, 9); - // CHECK: call signext i32 (i32, ...) @f_va_callee(i32 signext 1, i32 signext 2, i32 signext 3, i32 signext 4, i32 signext 5, i32 signext 6, fp128 0xL00000000000000004001C00000000000, i32 8, i32 9) + // CHECK: call frozen signext i32 (i32, ...) @f_va_callee(i32 frozen signext 1, i32 frozen signext 2, i32 frozen signext 3, i32 frozen signext 4, i32 frozen signext 5, i32 frozen signext 6, fp128 frozen 0xL00000000000000004001C00000000000, i32 frozen 8, i32 frozen 9) f_va_callee(1, 2, 3, 4, 5, 6, 7.0L, 8, 9); - // CHECK: call signext i32 (i32, ...) @f_va_callee(i32 signext 1, i32 signext 2, i32 signext 3, i32 signext 4, i32 signext 5, i32 signext 6, i128 {{%.*}}, i32 8, i32 9) + // CHECK: call frozen signext i32 (i32, ...) @f_va_callee(i32 frozen signext 1, i32 frozen signext 2, i32 frozen signext 3, i32 frozen signext 4, i32 frozen signext 5, i32 frozen signext 6, i128 {{%.*}}, i32 frozen 8, i32 frozen 9) f_va_callee(1, 2, 3, 4, 5, 6, (struct small_aligned){7}, 8, 9); - // CHECK: call signext i32 (i32, ...) @f_va_callee(i32 signext 1, i32 signext 2, i32 signext 3, i32 signext 4, i32 signext 5, i32 signext 6, [2 x i64] {{.*}}, i32 8, i32 9) + // CHECK: call frozen signext i32 (i32, ...) @f_va_callee(i32 frozen signext 1, i32 frozen signext 2, i32 frozen signext 3, i32 frozen signext 4, i32 frozen signext 5, i32 frozen signext 6, [2 x i64] {{.*}}, i32 frozen 8, i32 frozen 9) f_va_callee(1, 2, 3, 4, 5, 6, (struct small){7, NULL}, 8, 9); } -// CHECK-LABEL: define signext i32 @f_va_1(i8* %fmt, ...) {{.*}} { +// CHECK-LABEL: define frozen signext i32 @f_va_1(i8* frozen %fmt, ...) {{.*}} // CHECK: [[FMT_ADDR:%.*]] = alloca i8*, align 8 // CHECK: [[VA:%.*]] = alloca i8*, align 8 // CHECK: [[V:%.*]] = alloca i32, align 4 diff --git a/clang/test/CodeGen/riscv64-lp64d-abi.c b/clang/test/CodeGen/riscv64-lp64d-abi.c --- a/clang/test/CodeGen/riscv64-lp64d-abi.c +++ b/clang/test/CodeGen/riscv64-lp64d-abi.c @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -triple riscv64 -target-feature +d -target-abi lp64d -emit-llvm %s -o - \ +// RUN: %clang_cc1 -disable-frozen-args -triple riscv64 -target-feature +d -target-abi lp64d -emit-llvm %s -o - \ // RUN: | FileCheck %s #include @@ -157,7 +157,7 @@ // CHECK: define void @f_doublecomplex(double %a.coerce0, double %a.coerce1) void f_doublecomplex(double __complex__ a) {} -// CHECK: define { double, double } @f_ret_doublecomplex() +// CHECK: define frozen { double, double } @f_ret_doublecomplex() double __complex__ f_ret_doublecomplex() { return 1.0; } diff --git a/clang/test/CodeGen/riscv64-lp64f-lp64d-abi.c b/clang/test/CodeGen/riscv64-lp64f-lp64d-abi.c --- a/clang/test/CodeGen/riscv64-lp64f-lp64d-abi.c +++ b/clang/test/CodeGen/riscv64-lp64f-lp64d-abi.c @@ -1,6 +1,6 @@ -// RUN: %clang_cc1 -triple riscv64 -target-feature +f -target-abi lp64f -emit-llvm %s -o - \ +// RUN: %clang_cc1 -disable-frozen-args -triple riscv64 -target-feature +f -target-abi lp64f -emit-llvm %s -o - \ // RUN: | FileCheck %s -// RUN: %clang_cc1 -triple riscv64 -target-feature +d -target-abi lp64d -emit-llvm %s -o - \ +// RUN: %clang_cc1 -disable-frozen-args -triple riscv64 -target-feature +d -target-abi lp64d -emit-llvm %s -o - \ // RUN: | FileCheck %s #include @@ -150,7 +150,7 @@ // CHECK: define void @f_floatcomplex(float %a.coerce0, float %a.coerce1) void f_floatcomplex(float __complex__ a) {} -// CHECK: define { float, float } @f_ret_floatcomplex() +// CHECK: define frozen { float, float } @f_ret_floatcomplex() float __complex__ f_ret_floatcomplex() { return 1.0; } diff --git a/clang/test/CodeGen/sanitize-blocks.c b/clang/test/CodeGen/sanitize-blocks.c --- a/clang/test/CodeGen/sanitize-blocks.c +++ b/clang/test/CodeGen/sanitize-blocks.c @@ -8,6 +8,6 @@ return TheString; }; -// CHECK-LABEL: define internal i8* @getString_block_invoke +// CHECK-LABEL: define {{.*}} i8* @getString_block_invoke // TODO: Actually support returns_nonnull on blocks. diff --git a/clang/test/CodeGen/sanitize-thread-no-checking-at-run-time.m b/clang/test/CodeGen/sanitize-thread-no-checking-at-run-time.m --- a/clang/test/CodeGen/sanitize-thread-no-checking-at-run-time.m +++ b/clang/test/CodeGen/sanitize-thread-no-checking-at-run-time.m @@ -35,7 +35,7 @@ void test2(id x) { extern void test2_helper(id (^)(void)); test2_helper(^{ return x; }); -// TSAN: define linkonce_odr hidden void @__destroy_helper_block_8_32o(i8* %0) unnamed_addr [[ATTR:#[0-9]+]] +// TSAN: define linkonce_odr hidden void @__destroy_helper_block_8_32o(i8* frozen %0) unnamed_addr [[ATTR:#[0-9]+]] } // TSAN: attributes [[ATTR]] = { noinline nounwind {{.*}} "sanitize_thread_no_checking_at_run_time" {{.*}} } diff --git a/clang/test/CodeGen/set-visibility-for-decls.c b/clang/test/CodeGen/set-visibility-for-decls.c --- a/clang/test/CodeGen/set-visibility-for-decls.c +++ b/clang/test/CodeGen/set-visibility-for-decls.c @@ -19,21 +19,21 @@ // CHECK-DEFAULT: @var = external global extern int var; -// CHECK-HIDDEN: declare hidden i32 @func_hidden() -// CHECK-PROTECTED: declare hidden i32 @func_hidden() -// CHECK-DEFAULT: declare hidden i32 @func_hidden() +// CHECK-HIDDEN: declare hidden frozen i32 @func_hidden() +// CHECK-PROTECTED: declare hidden frozen i32 @func_hidden() +// CHECK-DEFAULT: declare hidden frozen i32 @func_hidden() __attribute__((visibility("hidden"))) int func_hidden(void); -// CHECK-HIDDEN: declare protected i32 @func_protected() -// CHECK-PROTECTED: declare protected i32 @func_protected() -// CHECK-DEFAULT: declare protected i32 @func_protected() +// CHECK-HIDDEN: declare protected frozen i32 @func_protected() +// CHECK-PROTECTED: declare protected frozen i32 @func_protected() +// CHECK-DEFAULT: declare protected frozen i32 @func_protected() __attribute__((visibility("protected"))) int func_protected(void); -// CHECK-HIDDEN: declare i32 @func_default() -// CHECK-PROTECTED: declare i32 @func_default() -// CHECK-DEFAULT: declare i32 @func_default() +// CHECK-HIDDEN: declare frozen i32 @func_default() +// CHECK-PROTECTED: declare frozen i32 @func_default() +// CHECK-DEFAULT: declare frozen i32 @func_default() __attribute__((visibility("default"))) int func_default(void); -// CHECK-HIDDEN: declare hidden i32 @func() -// CHECK-PROTECTED: declare protected i32 @func() -// CHECK-DEFAULT: declare i32 @func() +// CHECK-HIDDEN: declare hidden frozen i32 @func() +// CHECK-PROTECTED: declare protected frozen i32 @func() +// CHECK-DEFAULT: declare frozen i32 @func() int func(void); int use() { diff --git a/clang/test/CodeGen/shadowcallstack-attr.c b/clang/test/CodeGen/shadowcallstack-attr.c --- a/clang/test/CodeGen/shadowcallstack-attr.c +++ b/clang/test/CodeGen/shadowcallstack-attr.c @@ -10,7 +10,7 @@ #endif int foo(int *a) { return *a; } -// CHECK: define i32 @foo(i32* %a) +// CHECK: define frozen i32 @foo(i32* frozen %a) // BLACKLISTED-NOT: attributes {{.*}}shadowcallstack{{.*}} // UNBLACKLISTED: attributes {{.*}}shadowcallstack{{.*}} diff --git a/clang/test/CodeGen/sparc-arguments.c b/clang/test/CodeGen/sparc-arguments.c --- a/clang/test/CodeGen/sparc-arguments.c +++ b/clang/test/CodeGen/sparc-arguments.c @@ -17,9 +17,9 @@ // Ensure the align 8 is passed through: // CHECK-LABEL: define void @f1() -// CHECK: call void @f1_helper(%struct.s1* byval(%struct.s1) align 8 @x1) +// CHECK: call void @f1_helper(%struct.s1* frozen byval(%struct.s1) align 8 @x1) // Also ensure the declaration of f1_helper includes it -// CHECK: declare void @f1_helper(%struct.s1* byval(%struct.s1) align 8) +// CHECK: declare void @f1_helper(%struct.s1* frozen byval(%struct.s1) align 8) void f1_helper(struct s1); void f1() { diff --git a/clang/test/CodeGen/sparc-vaarg.c b/clang/test/CodeGen/sparc-vaarg.c --- a/clang/test/CodeGen/sparc-vaarg.c +++ b/clang/test/CodeGen/sparc-vaarg.c @@ -1,7 +1,7 @@ // RUN: %clang_cc1 -triple sparc -emit-llvm -o - %s | FileCheck %s #include -// CHECK-LABEL: define i32 @get_int +// CHECK-LABEL: define frozen i32 @get_int // CHECK: [[RESULT:%[a-z_0-9]+]] = va_arg {{.*}}, i32{{$}} // CHECK: store i32 [[RESULT]], i32* [[LOC:%[a-z_0-9]+]] // CHECK: [[RESULT2:%[a-z_0-9]+]] = load i32, i32* [[LOC]] diff --git a/clang/test/CodeGen/sparcv8-abi.c b/clang/test/CodeGen/sparcv8-abi.c --- a/clang/test/CodeGen/sparcv8-abi.c +++ b/clang/test/CodeGen/sparcv8-abi.c @@ -1,18 +1,18 @@ // RUN: %clang_cc1 -triple sparc-unknown-unknown -emit-llvm %s -o - | FileCheck %s -// CHECK-LABEL: define { float, float } @p({ float, float }* byval({ float, float }) align 4 %a, { float, float }* byval({ float, float }) align 4 %b) #0 { +// CHECK-LABEL: define frozen { float, float } @p({ float, float }* frozen byval({ float, float }) align 4 %a, { float, float }* frozen byval({ float, float }) align 4 %b) #0 { float __complex__ p (float __complex__ a, float __complex__ b) { } -// CHECK-LABEL: define { double, double } @q({ double, double }* byval({ double, double }) align 8 %a, { double, double }* byval({ double, double }) align 8 %b) #0 { +// CHECK-LABEL: define frozen { double, double } @q({ double, double }* frozen byval({ double, double }) align 8 %a, { double, double }* frozen byval({ double, double }) align 8 %b) #0 { double __complex__ q (double __complex__ a, double __complex__ b) { } -// CHECK-LABEL: define { i64, i64 } @r({ i64, i64 }* byval({ i64, i64 }) align 8 %a, { i64, i64 }* byval({ i64, i64 }) align 8 %b) #0 { +// CHECK-LABEL: define frozen { i64, i64 } @r({ i64, i64 }* frozen byval({ i64, i64 }) align 8 %a, { i64, i64 }* frozen byval({ i64, i64 }) align 8 %b) #0 { long long __complex__ r (long long __complex__ a, long long __complex__ b) { diff --git a/clang/test/CodeGen/sparcv8-inline-asm.c b/clang/test/CodeGen/sparcv8-inline-asm.c --- a/clang/test/CodeGen/sparcv8-inline-asm.c +++ b/clang/test/CodeGen/sparcv8-inline-asm.c @@ -1,6 +1,6 @@ // RUN: %clang_cc1 -triple sparc-unknown-unknown -emit-llvm %s -o - | FileCheck %s -// CHECK: define float @fabsf(float %a) +// CHECK: define frozen float @fabsf(float frozen %a) // CHECK: %{{.*}} = call float asm sideeffect "fabss $1, $0;", "=e,f"(float %{{.*}}) float fabsf(float a) { float res; diff --git a/clang/test/CodeGen/sparcv9-abi.c b/clang/test/CodeGen/sparcv9-abi.c --- a/clang/test/CodeGen/sparcv9-abi.c +++ b/clang/test/CodeGen/sparcv9-abi.c @@ -6,19 +6,19 @@ // Arguments and return values smaller than the word size are extended. -// CHECK-LABEL: define signext i32 @f_int_1(i32 signext %x) +// CHECK-LABEL: define frozen signext i32 @f_int_1(i32 frozen signext %x) int f_int_1(int x) { return x; } -// CHECK-LABEL: define zeroext i32 @f_int_2(i32 zeroext %x) +// CHECK-LABEL: define frozen zeroext i32 @f_int_2(i32 frozen zeroext %x) unsigned f_int_2(unsigned x) { return x; } -// CHECK-LABEL: define i64 @f_int_3(i64 %x) +// CHECK-LABEL: define frozen i64 @f_int_3(i64 frozen %x) long long f_int_3(long long x) { return x; } -// CHECK-LABEL: define signext i8 @f_int_4(i8 signext %x) +// CHECK-LABEL: define frozen signext i8 @f_int_4(i8 frozen signext %x) char f_int_4(char x) { return x; } -// CHECK-LABEL: define fp128 @f_ld(fp128 %x) +// CHECK-LABEL: define frozen fp128 @f_ld(fp128 frozen %x) long double f_ld(long double x) { return x; } // Small structs are passed in registers. @@ -39,7 +39,7 @@ int *c, *d; }; -// CHECK-LABEL: define %struct.medium @f_medium(%struct.medium* %x) +// CHECK-LABEL: define %struct.medium @f_medium(%struct.medium* frozen %x) struct medium f_medium(struct medium x) { x.a += *x.b; x.b = 0; @@ -53,7 +53,7 @@ int x; }; -// CHECK-LABEL: define void @f_large(%struct.large* noalias sret align 8 %agg.result, %struct.large* %x) +// CHECK-LABEL: define void @f_large(%struct.large* noalias sret align 8 %agg.result, %struct.large* frozen %x) struct large f_large(struct large x) { x.a += *x.b; x.b = 0; @@ -120,7 +120,7 @@ f_tiny(x); } -// CHECK-LABEL: define signext i32 @f_variable(i8* %f, ...) +// CHECK-LABEL: define frozen signext i32 @f_variable(i8* frozen %f, ...) // CHECK: %ap = alloca i8* // CHECK: call void @llvm.va_start // diff --git a/clang/test/CodeGen/sparcv9-dwarf.c b/clang/test/CodeGen/sparcv9-dwarf.c --- a/clang/test/CodeGen/sparcv9-dwarf.c +++ b/clang/test/CodeGen/sparcv9-dwarf.c @@ -7,7 +7,7 @@ return __builtin_dwarf_sp_column(); } -// CHECK-LABEL: define signext i32 @test() +// CHECK-LABEL: define frozen signext i32 @test() // CHECK: store i8 8, i8* getelementptr inbounds ([103 x i8], [103 x i8]* @dwarf_reg_size_table, i64 0, i64 0) // CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([103 x i8], [103 x i8]* @dwarf_reg_size_table, i64 0, i64 1) // CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([103 x i8], [103 x i8]* @dwarf_reg_size_table, i64 0, i64 2) diff --git a/clang/test/CodeGen/spir-half-type.cpp b/clang/test/CodeGen/spir-half-type.cpp --- a/clang/test/CodeGen/spir-half-type.cpp +++ b/clang/test/CodeGen/spir-half-type.cpp @@ -116,7 +116,7 @@ return a - b - 3.0f16; } -// CHECK: define spir_func half @_Z4fmulDF16_(half %arg) +// CHECK: define spir_func frozen half @_Z4fmulDF16_(half frozen %arg) _Float16 fmul(_Float16 arg) { _Float16 a = 1.0f16; const _Float16 b = 2.0f16; diff --git a/clang/test/CodeGen/split-stacks.c b/clang/test/CodeGen/split-stacks.c --- a/clang/test/CodeGen/split-stacks.c +++ b/clang/test/CodeGen/split-stacks.c @@ -14,13 +14,13 @@ return foo(); } -// CHECK-SEGSTK: define dso_local i32 @foo() [[SS:#[0-9]+]] { -// CHECK-SEGSTK: define dso_local i32 @nosplit() [[NSS:#[0-9]+]] { -// CHECK-SEGSTK: define dso_local i32 @main() [[SS]] { +// CHECK-SEGSTK: define dso_local frozen i32 @foo() [[SS:#[0-9]+]] { +// CHECK-SEGSTK: define dso_local frozen i32 @nosplit() [[NSS:#[0-9]+]] { +// CHECK-SEGSTK: define dso_local frozen i32 @main() [[SS]] { // CHECK-SEGSTK-NOT: [[NSS]] = { {{.*}} "split-stack" {{.*}} } // CHECK-SEGSTK: [[SS]] = { {{.*}} "split-stack" {{.*}} } // CHECK-SEGSTK-NOT: [[NSS]] = { {{.*}} "split-stack" {{.*}} } -// CHECK-NOSEGSTK: define dso_local i32 @foo() #0 { -// CHECK-NOSEGSTK: define dso_local i32 @main() #0 { +// CHECK-NOSEGSTK: define dso_local frozen i32 @foo() #0 { +// CHECK-NOSEGSTK: define dso_local frozen i32 @main() #0 { // CHECK-NOSEGSTK-NOT: #0 = { {{.*}} "split-stack" {{.*}} } diff --git a/clang/test/CodeGen/stack-protector.c b/clang/test/CodeGen/stack-protector.c --- a/clang/test/CodeGen/stack-protector.c +++ b/clang/test/CodeGen/stack-protector.c @@ -15,14 +15,14 @@ size_t strlen(const char *s); char *strcpy(char *s1, const char *s2); -// DEF: define {{.*}}void @test1(i8* %msg) #[[A:.*]] { +// DEF: define {{.*}}void @test1(i8* frozen %msg) #[[A:.*]] { void test1(const char *msg) { char a[strlen(msg) + 1]; strcpy(a, msg); printf("%s\n", a); } -// DEF: define {{.*}}void @test2(i8* %msg) #[[B:.*]] { +// DEF: define {{.*}}void @test2(i8* frozen %msg) #[[B:.*]] { __attribute__((no_stack_protector)) void test2(const char *msg) { char a[strlen(msg) + 1]; diff --git a/clang/test/CodeGen/stackrealign-main.c b/clang/test/CodeGen/stackrealign-main.c --- a/clang/test/CodeGen/stackrealign-main.c +++ b/clang/test/CodeGen/stackrealign-main.c @@ -5,7 +5,7 @@ // CHECK: { void other(void) {} -// CHECK-LABEL: define i32 @main( +// CHECK-LABEL: define frozen i32 @main( // CHECK: [[MAIN:#[0-9]+]] // CHECK: { int main(int argc, char **argv) { diff --git a/clang/test/CodeGen/stdcall-fastcall.c b/clang/test/CodeGen/stdcall-fastcall.c --- a/clang/test/CodeGen/stdcall-fastcall.c +++ b/clang/test/CodeGen/stdcall-fastcall.c @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -triple i386-unknown-unknown -emit-llvm < %s | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args -triple i386-unknown-unknown -emit-llvm < %s | FileCheck %s void __attribute__((fastcall)) f1(void); void __attribute__((stdcall)) f2(void); diff --git a/clang/test/CodeGen/struct-passing.c b/clang/test/CodeGen/struct-passing.c --- a/clang/test/CodeGen/struct-passing.c +++ b/clang/test/CodeGen/struct-passing.c @@ -16,12 +16,12 @@ void *ps[] = { f0, f1, f2, f3, f4, f5 }; -// CHECK: declare i32 @f0() [[RN:#[0-9]+]] -// CHECK: declare i32 @f1() [[RO:#[0-9]+]] +// CHECK: declare frozen i32 @f0() [[RN:#[0-9]+]] +// CHECK: declare frozen i32 @f1() [[RO:#[0-9]+]] // CHECK: declare void @f2({{.*}} sret align 4) // CHECK: declare void @f3({{.*}} sret align 4) -// CHECK: declare void @f4({{.*}} byval({{.*}}) align 4) -// CHECK: declare void @f5({{.*}} byval({{.*}}) align 4) +// CHECK: declare void @f4({{.*}} frozen byval({{.*}}) align 4) +// CHECK: declare void @f5({{.*}} frozen byval({{.*}}) align 4) // CHECK: attributes [[RN]] = { nounwind readnone{{.*}} } // CHECK: attributes [[RO]] = { nounwind readonly{{.*}} } diff --git a/clang/test/CodeGen/switch-dce.c b/clang/test/CodeGen/switch-dce.c --- a/clang/test/CodeGen/switch-dce.c +++ b/clang/test/CodeGen/switch-dce.c @@ -218,11 +218,11 @@ // Verify that case 42 only calls test14 once. // CHECK: @test13 -// CHECK: call void @test13(i32 97) +// CHECK: call void @test13(i32 frozen 97) // CHECK-NEXT: br label %[[EPILOG2:[0-9.a-z]+]] // CHECK: [[EPILOG2]] // CHECK-NEXT: br label [[EPILOG:%[0-9.a-z]+]] -// CHECK: call void @test13(i32 42) +// CHECK: call void @test13(i32 frozen 42) // CHECK-NEXT: br label [[EPILOG]] void test13(int x) { switch (x) { diff --git a/clang/test/CodeGen/switch.c b/clang/test/CodeGen/switch.c --- a/clang/test/CodeGen/switch.c +++ b/clang/test/CodeGen/switch.c @@ -63,7 +63,7 @@ return j; } -// CHECK-LABEL: define i32 @foo4t() +// CHECK-LABEL: define frozen i32 @foo4t() // CHECK: ret i32 376 // CHECK: } int foo4t() { @@ -101,7 +101,7 @@ } -// CHECK-LABEL: define i32 @f8( +// CHECK-LABEL: define frozen i32 @f8( // CHECK: ret i32 3 // CHECK: } int f8(unsigned x) { @@ -115,7 +115,7 @@ // Ensure that default after a case range is not ignored. // -// CHECK-LABEL: define i32 @f9() +// CHECK-LABEL: define frozen i32 @f9() // CHECK: ret i32 10 // CHECK: } static int f9_0(unsigned x) { @@ -134,7 +134,7 @@ // miscompilation of fallthrough from default to a (tested) case // range. // -// CHECK-LABEL: define i32 @f10() +// CHECK-LABEL: define frozen i32 @f10() // CHECK: ret i32 10 // CHECK: } static int f10_0(unsigned x) { @@ -153,7 +153,7 @@ // This generated incorrect code because of poor switch chaining. // -// CHECK-LABEL: define i32 @f11( +// CHECK-LABEL: define frozen i32 @f11( // CHECK: ret i32 3 // CHECK: } int f11(int x) { @@ -167,7 +167,7 @@ // This just asserted because of the way case ranges were calculated. // -// CHECK-LABEL: define i32 @f12( +// CHECK-LABEL: define frozen i32 @f12( // CHECK: ret i32 3 // CHECK: } int f12(int x) { @@ -181,7 +181,7 @@ // Make sure return is not constant (if empty range is skipped or miscompiled) // -// CHECK-LABEL: define i32 @f13( +// CHECK-LABEL: define frozen i32 @f13( // CHECK: ret i32 % // CHECK: } int f13(unsigned x) { diff --git a/clang/test/CodeGen/systemz-abi-vector.c b/clang/test/CodeGen/systemz-abi-vector.c --- a/clang/test/CodeGen/systemz-abi-vector.c +++ b/clang/test/CodeGen/systemz-abi-vector.c @@ -1,18 +1,18 @@ -// RUN: %clang_cc1 -triple s390x-linux-gnu \ +// RUN: %clang_cc1 -disable-frozen-args -triple s390x-linux-gnu \ // RUN: -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple s390x-linux-gnu -target-feature +vector \ +// RUN: %clang_cc1 -disable-frozen-args -triple s390x-linux-gnu -target-feature +vector \ // RUN: -emit-llvm -o - %s | FileCheck --check-prefix=CHECK-VECTOR %s -// RUN: %clang_cc1 -triple s390x-linux-gnu -target-cpu z13 \ +// RUN: %clang_cc1 -disable-frozen-args -triple s390x-linux-gnu -target-cpu z13 \ // RUN: -emit-llvm -o - %s | FileCheck --check-prefix=CHECK-VECTOR %s -// RUN: %clang_cc1 -triple s390x-linux-gnu -target-cpu arch11 \ +// RUN: %clang_cc1 -disable-frozen-args -triple s390x-linux-gnu -target-cpu arch11 \ // RUN: -emit-llvm -o - %s | FileCheck --check-prefix=CHECK-VECTOR %s -// RUN: %clang_cc1 -triple s390x-linux-gnu -target-cpu z14 \ +// RUN: %clang_cc1 -disable-frozen-args -triple s390x-linux-gnu -target-cpu z14 \ // RUN: -emit-llvm -o - %s | FileCheck --check-prefix=CHECK-VECTOR %s -// RUN: %clang_cc1 -triple s390x-linux-gnu -target-cpu arch12 \ +// RUN: %clang_cc1 -disable-frozen-args -triple s390x-linux-gnu -target-cpu arch12 \ // RUN: -emit-llvm -o - %s | FileCheck --check-prefix=CHECK-VECTOR %s -// RUN: %clang_cc1 -triple s390x-linux-gnu -target-cpu z15 \ +// RUN: %clang_cc1 -disable-frozen-args -triple s390x-linux-gnu -target-cpu z15 \ // RUN: -emit-llvm -o - %s | FileCheck --check-prefix=CHECK-VECTOR %s -// RUN: %clang_cc1 -triple s390x-linux-gnu -target-cpu arch13 \ +// RUN: %clang_cc1 -disable-frozen-args -triple s390x-linux-gnu -target-cpu arch13 \ // RUN: -emit-llvm -o - %s | FileCheck --check-prefix=CHECK-VECTOR %s // Vector types @@ -51,23 +51,23 @@ v1i8 pass_v1i8(v1i8 arg) { return arg; } // CHECK-LABEL: define void @pass_v1i8(<1 x i8>* noalias sret align 1 %{{.*}}, <1 x i8>* %0) -// CHECK-VECTOR-LABEL: define <1 x i8> @pass_v1i8(<1 x i8> %{{.*}}) +// CHECK-VECTOR-LABEL: define frozen <1 x i8> @pass_v1i8(<1 x i8> %{{.*}}) v2i8 pass_v2i8(v2i8 arg) { return arg; } // CHECK-LABEL: define void @pass_v2i8(<2 x i8>* noalias sret align 2 %{{.*}}, <2 x i8>* %0) -// CHECK-VECTOR-LABEL: define <2 x i8> @pass_v2i8(<2 x i8> %{{.*}}) +// CHECK-VECTOR-LABEL: define frozen <2 x i8> @pass_v2i8(<2 x i8> %{{.*}}) v4i8 pass_v4i8(v4i8 arg) { return arg; } // CHECK-LABEL: define void @pass_v4i8(<4 x i8>* noalias sret align 4 %{{.*}}, <4 x i8>* %0) -// CHECK-VECTOR-LABEL: define <4 x i8> @pass_v4i8(<4 x i8> %{{.*}}) +// CHECK-VECTOR-LABEL: define frozen <4 x i8> @pass_v4i8(<4 x i8> %{{.*}}) v8i8 pass_v8i8(v8i8 arg) { return arg; } // CHECK-LABEL: define void @pass_v8i8(<8 x i8>* noalias sret align 8 %{{.*}}, <8 x i8>* %0) -// CHECK-VECTOR-LABEL: define <8 x i8> @pass_v8i8(<8 x i8> %{{.*}}) +// CHECK-VECTOR-LABEL: define frozen <8 x i8> @pass_v8i8(<8 x i8> %{{.*}}) v16i8 pass_v16i8(v16i8 arg) { return arg; } // CHECK-LABEL: define void @pass_v16i8(<16 x i8>* noalias sret align 16 %{{.*}}, <16 x i8>* %0) -// CHECK-VECTOR-LABEL: define <16 x i8> @pass_v16i8(<16 x i8> %{{.*}}) +// CHECK-VECTOR-LABEL: define frozen <16 x i8> @pass_v16i8(<16 x i8> %{{.*}}) v32i8 pass_v32i8(v32i8 arg) { return arg; } // CHECK-LABEL: define void @pass_v32i8(<32 x i8>* noalias sret align 32 %{{.*}}, <32 x i8>* %0) @@ -75,67 +75,67 @@ v1i16 pass_v1i16(v1i16 arg) { return arg; } // CHECK-LABEL: define void @pass_v1i16(<1 x i16>* noalias sret align 2 %{{.*}}, <1 x i16>* %0) -// CHECK-VECTOR-LABEL: define <1 x i16> @pass_v1i16(<1 x i16> %{{.*}}) +// CHECK-VECTOR-LABEL: define frozen <1 x i16> @pass_v1i16(<1 x i16> %{{.*}}) v2i16 pass_v2i16(v2i16 arg) { return arg; } // CHECK-LABEL: define void @pass_v2i16(<2 x i16>* noalias sret align 4 %{{.*}}, <2 x i16>* %0) -// CHECK-VECTOR-LABEL: define <2 x i16> @pass_v2i16(<2 x i16> %{{.*}}) +// CHECK-VECTOR-LABEL: define frozen <2 x i16> @pass_v2i16(<2 x i16> %{{.*}}) v4i16 pass_v4i16(v4i16 arg) { return arg; } // CHECK-LABEL: define void @pass_v4i16(<4 x i16>* noalias sret align 8 %{{.*}}, <4 x i16>* %0) -// CHECK-VECTOR-LABEL: define <4 x i16> @pass_v4i16(<4 x i16> %{{.*}}) +// CHECK-VECTOR-LABEL: define frozen <4 x i16> @pass_v4i16(<4 x i16> %{{.*}}) v8i16 pass_v8i16(v8i16 arg) { return arg; } // CHECK-LABEL: define void @pass_v8i16(<8 x i16>* noalias sret align 16 %{{.*}}, <8 x i16>* %0) -// CHECK-VECTOR-LABEL: define <8 x i16> @pass_v8i16(<8 x i16> %{{.*}}) +// CHECK-VECTOR-LABEL: define frozen <8 x i16> @pass_v8i16(<8 x i16> %{{.*}}) v1i32 pass_v1i32(v1i32 arg) { return arg; } // CHECK-LABEL: define void @pass_v1i32(<1 x i32>* noalias sret align 4 %{{.*}}, <1 x i32>* %0) -// CHECK-VECTOR-LABEL: define <1 x i32> @pass_v1i32(<1 x i32> %{{.*}}) +// CHECK-VECTOR-LABEL: define frozen <1 x i32> @pass_v1i32(<1 x i32> %{{.*}}) v2i32 pass_v2i32(v2i32 arg) { return arg; } // CHECK-LABEL: define void @pass_v2i32(<2 x i32>* noalias sret align 8 %{{.*}}, <2 x i32>* %0) -// CHECK-VECTOR-LABEL: define <2 x i32> @pass_v2i32(<2 x i32> %{{.*}}) +// CHECK-VECTOR-LABEL: define frozen <2 x i32> @pass_v2i32(<2 x i32> %{{.*}}) v4i32 pass_v4i32(v4i32 arg) { return arg; } // CHECK-LABEL: define void @pass_v4i32(<4 x i32>* noalias sret align 16 %{{.*}}, <4 x i32>* %0) -// CHECK-VECTOR-LABEL: define <4 x i32> @pass_v4i32(<4 x i32> %{{.*}}) +// CHECK-VECTOR-LABEL: define frozen <4 x i32> @pass_v4i32(<4 x i32> %{{.*}}) v1i64 pass_v1i64(v1i64 arg) { return arg; } // CHECK-LABEL: define void @pass_v1i64(<1 x i64>* noalias sret align 8 %{{.*}}, <1 x i64>* %0) -// CHECK-VECTOR-LABEL: define <1 x i64> @pass_v1i64(<1 x i64> %{{.*}}) +// CHECK-VECTOR-LABEL: define frozen <1 x i64> @pass_v1i64(<1 x i64> %{{.*}}) v2i64 pass_v2i64(v2i64 arg) { return arg; } // CHECK-LABEL: define void @pass_v2i64(<2 x i64>* noalias sret align 16 %{{.*}}, <2 x i64>* %0) -// CHECK-VECTOR-LABEL: define <2 x i64> @pass_v2i64(<2 x i64> %{{.*}}) +// CHECK-VECTOR-LABEL: define frozen <2 x i64> @pass_v2i64(<2 x i64> %{{.*}}) v1i128 pass_v1i128(v1i128 arg) { return arg; } // CHECK-LABEL: define void @pass_v1i128(<1 x i128>* noalias sret align 16 %{{.*}}, <1 x i128>* %0) -// CHECK-VECTOR-LABEL: define <1 x i128> @pass_v1i128(<1 x i128> %{{.*}}) +// CHECK-VECTOR-LABEL: define frozen <1 x i128> @pass_v1i128(<1 x i128> %{{.*}}) v1f32 pass_v1f32(v1f32 arg) { return arg; } // CHECK-LABEL: define void @pass_v1f32(<1 x float>* noalias sret align 4 %{{.*}}, <1 x float>* %0) -// CHECK-VECTOR-LABEL: define <1 x float> @pass_v1f32(<1 x float> %{{.*}}) +// CHECK-VECTOR-LABEL: define frozen <1 x float> @pass_v1f32(<1 x float> %{{.*}}) v2f32 pass_v2f32(v2f32 arg) { return arg; } // CHECK-LABEL: define void @pass_v2f32(<2 x float>* noalias sret align 8 %{{.*}}, <2 x float>* %0) -// CHECK-VECTOR-LABEL: define <2 x float> @pass_v2f32(<2 x float> %{{.*}}) +// CHECK-VECTOR-LABEL: define frozen <2 x float> @pass_v2f32(<2 x float> %{{.*}}) v4f32 pass_v4f32(v4f32 arg) { return arg; } // CHECK-LABEL: define void @pass_v4f32(<4 x float>* noalias sret align 16 %{{.*}}, <4 x float>* %0) -// CHECK-VECTOR-LABEL: define <4 x float> @pass_v4f32(<4 x float> %{{.*}}) +// CHECK-VECTOR-LABEL: define frozen <4 x float> @pass_v4f32(<4 x float> %{{.*}}) v1f64 pass_v1f64(v1f64 arg) { return arg; } // CHECK-LABEL: define void @pass_v1f64(<1 x double>* noalias sret align 8 %{{.*}}, <1 x double>* %0) -// CHECK-VECTOR-LABEL: define <1 x double> @pass_v1f64(<1 x double> %{{.*}}) +// CHECK-VECTOR-LABEL: define frozen <1 x double> @pass_v1f64(<1 x double> %{{.*}}) v2f64 pass_v2f64(v2f64 arg) { return arg; } // CHECK-LABEL: define void @pass_v2f64(<2 x double>* noalias sret align 16 %{{.*}}, <2 x double>* %0) -// CHECK-VECTOR-LABEL: define <2 x double> @pass_v2f64(<2 x double> %{{.*}}) +// CHECK-VECTOR-LABEL: define frozen <2 x double> @pass_v2f64(<2 x double> %{{.*}}) v1f128 pass_v1f128(v1f128 arg) { return arg; } // CHECK-LABEL: define void @pass_v1f128(<1 x fp128>* noalias sret align 16 %{{.*}}, <1 x fp128>* %0) -// CHECK-VECTOR-LABEL: define <1 x fp128> @pass_v1f128(<1 x fp128> %{{.*}}) +// CHECK-VECTOR-LABEL: define frozen <1 x fp128> @pass_v1f128(<1 x fp128> %{{.*}}) // Vector-like aggregate types @@ -219,7 +219,7 @@ // CHECK: [[VA_ARG_ADDR:%[^ ]+]] = phi <1 x i8>** [ [[REG_ADDR]], %{{.*}} ], [ [[MEM_ADDR]], %{{.*}} ] // CHECK: [[INDIRECT_ARG:%[^ ]+]] = load <1 x i8>*, <1 x i8>** [[VA_ARG_ADDR]] // CHECK: ret void -// CHECK-VECTOR-LABEL: define <1 x i8> @va_v1i8(%struct.__va_list_tag* %{{.*}}) +// CHECK-VECTOR-LABEL: define frozen <1 x i8> @va_v1i8(%struct.__va_list_tag* %{{.*}}) // CHECK-VECTOR: [[OVERFLOW_ARG_AREA_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 2 // CHECK-VECTOR: [[OVERFLOW_ARG_AREA:%[^ ]+]] = load i8*, i8** [[OVERFLOW_ARG_AREA_PTR]] // CHECK-VECTOR: [[MEM_ADDR:%[^ ]+]] = bitcast i8* [[OVERFLOW_ARG_AREA]] to <1 x i8>* @@ -251,7 +251,7 @@ // CHECK: [[VA_ARG_ADDR:%[^ ]+]] = phi <2 x i8>** [ [[REG_ADDR]], %{{.*}} ], [ [[MEM_ADDR]], %{{.*}} ] // CHECK: [[INDIRECT_ARG:%[^ ]+]] = load <2 x i8>*, <2 x i8>** [[VA_ARG_ADDR]] // CHECK: ret void -// CHECK-VECTOR-LABEL: define <2 x i8> @va_v2i8(%struct.__va_list_tag* %{{.*}}) +// CHECK-VECTOR-LABEL: define frozen <2 x i8> @va_v2i8(%struct.__va_list_tag* %{{.*}}) // CHECK-VECTOR: [[OVERFLOW_ARG_AREA_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 2 // CHECK-VECTOR: [[OVERFLOW_ARG_AREA:%[^ ]+]] = load i8*, i8** [[OVERFLOW_ARG_AREA_PTR]] // CHECK-VECTOR: [[MEM_ADDR:%[^ ]+]] = bitcast i8* [[OVERFLOW_ARG_AREA]] to <2 x i8>* @@ -283,7 +283,7 @@ // CHECK: [[VA_ARG_ADDR:%[^ ]+]] = phi <4 x i8>** [ [[REG_ADDR]], %{{.*}} ], [ [[MEM_ADDR]], %{{.*}} ] // CHECK: [[INDIRECT_ARG:%[^ ]+]] = load <4 x i8>*, <4 x i8>** [[VA_ARG_ADDR]] // CHECK: ret void -// CHECK-VECTOR-LABEL: define <4 x i8> @va_v4i8(%struct.__va_list_tag* %{{.*}}) +// CHECK-VECTOR-LABEL: define frozen <4 x i8> @va_v4i8(%struct.__va_list_tag* %{{.*}}) // CHECK-VECTOR: [[OVERFLOW_ARG_AREA_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 2 // CHECK-VECTOR: [[OVERFLOW_ARG_AREA:%[^ ]+]] = load i8*, i8** [[OVERFLOW_ARG_AREA_PTR]] // CHECK-VECTOR: [[MEM_ADDR:%[^ ]+]] = bitcast i8* [[OVERFLOW_ARG_AREA]] to <4 x i8>* @@ -315,7 +315,7 @@ // CHECK: [[VA_ARG_ADDR:%[^ ]+]] = phi <8 x i8>** [ [[REG_ADDR]], %{{.*}} ], [ [[MEM_ADDR]], %{{.*}} ] // CHECK: [[INDIRECT_ARG:%[^ ]+]] = load <8 x i8>*, <8 x i8>** [[VA_ARG_ADDR]] // CHECK: ret void -// CHECK-VECTOR-LABEL: define <8 x i8> @va_v8i8(%struct.__va_list_tag* %{{.*}}) +// CHECK-VECTOR-LABEL: define frozen <8 x i8> @va_v8i8(%struct.__va_list_tag* %{{.*}}) // CHECK-VECTOR: [[OVERFLOW_ARG_AREA_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 2 // CHECK-VECTOR: [[OVERFLOW_ARG_AREA:%[^ ]+]] = load i8*, i8** [[OVERFLOW_ARG_AREA_PTR]] // CHECK-VECTOR: [[MEM_ADDR:%[^ ]+]] = bitcast i8* [[OVERFLOW_ARG_AREA]] to <8 x i8>* @@ -347,7 +347,7 @@ // CHECK: [[VA_ARG_ADDR:%[^ ]+]] = phi <16 x i8>** [ [[REG_ADDR]], %{{.*}} ], [ [[MEM_ADDR]], %{{.*}} ] // CHECK: [[INDIRECT_ARG:%[^ ]+]] = load <16 x i8>*, <16 x i8>** [[VA_ARG_ADDR]] // CHECK: ret void -// CHECK-VECTOR-LABEL: define <16 x i8> @va_v16i8(%struct.__va_list_tag* %{{.*}}) +// CHECK-VECTOR-LABEL: define frozen <16 x i8> @va_v16i8(%struct.__va_list_tag* %{{.*}}) // CHECK-VECTOR: [[OVERFLOW_ARG_AREA_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 2 // CHECK-VECTOR: [[OVERFLOW_ARG_AREA:%[^ ]+]] = load i8*, i8** [[OVERFLOW_ARG_AREA_PTR]] // CHECK-VECTOR: [[MEM_ADDR:%[^ ]+]] = bitcast i8* [[OVERFLOW_ARG_AREA]] to <16 x i8>* diff --git a/clang/test/CodeGen/systemz-abi.c b/clang/test/CodeGen/systemz-abi.c --- a/clang/test/CodeGen/systemz-abi.c +++ b/clang/test/CodeGen/systemz-abi.c @@ -1,48 +1,48 @@ -// RUN: %clang_cc1 -triple s390x-linux-gnu \ +// RUN: %clang_cc1 -disable-frozen-args -triple s390x-linux-gnu \ // RUN: -emit-llvm -o - %s | FileCheck %s --check-prefixes=CHECK,HARD-FLOAT -// RUN: %clang_cc1 -triple s390x-linux-gnu -target-feature +vector \ +// RUN: %clang_cc1 -disable-frozen-args -triple s390x-linux-gnu -target-feature +vector \ // RUN: -emit-llvm -o - %s | FileCheck %s --check-prefixes=CHECK,HARD-FLOAT -// RUN: %clang_cc1 -triple s390x-linux-gnu -target-cpu z13 \ +// RUN: %clang_cc1 -disable-frozen-args -triple s390x-linux-gnu -target-cpu z13 \ // RUN: -emit-llvm -o - %s | FileCheck %s --check-prefixes=CHECK,HARD-FLOAT -// RUN: %clang_cc1 -triple s390x-linux-gnu -target-cpu arch11 \ +// RUN: %clang_cc1 -disable-frozen-args -triple s390x-linux-gnu -target-cpu arch11 \ // RUN: -emit-llvm -o - %s | FileCheck %s --check-prefixes=CHECK,HARD-FLOAT -// RUN: %clang_cc1 -triple s390x-linux-gnu -target-cpu z14 \ +// RUN: %clang_cc1 -disable-frozen-args -triple s390x-linux-gnu -target-cpu z14 \ // RUN: -emit-llvm -o - %s | FileCheck %s --check-prefixes=CHECK,HARD-FLOAT -// RUN: %clang_cc1 -triple s390x-linux-gnu -target-cpu arch12 \ +// RUN: %clang_cc1 -disable-frozen-args -triple s390x-linux-gnu -target-cpu arch12 \ // RUN: -emit-llvm -o - %s | FileCheck %s --check-prefixes=CHECK,HARD-FLOAT -// RUN: %clang_cc1 -triple s390x-linux-gnu -target-cpu z15 \ +// RUN: %clang_cc1 -disable-frozen-args -triple s390x-linux-gnu -target-cpu z15 \ // RUN: -emit-llvm -o - %s | FileCheck %s --check-prefixes=CHECK,HARD-FLOAT -// RUN: %clang_cc1 -triple s390x-linux-gnu -target-cpu arch13 \ +// RUN: %clang_cc1 -disable-frozen-args -triple s390x-linux-gnu -target-cpu arch13 \ // RUN: -emit-llvm -o - %s | FileCheck %s --check-prefixes=CHECK,HARD-FLOAT -// RUN: %clang_cc1 -triple s390x-linux-gnu -target-cpu arch13 \ +// RUN: %clang_cc1 -disable-frozen-args -triple s390x-linux-gnu -target-cpu arch13 \ // RUN: -emit-llvm -o - %s -mfloat-abi soft | FileCheck %s \ // RUN: --check-prefixes=CHECK,SOFT-FLOAT // Scalar types char pass_char(char arg) { return arg; } -// CHECK-LABEL: define signext i8 @pass_char(i8 signext %{{.*}}) +// CHECK-LABEL: define frozen signext i8 @pass_char(i8 signext %{{.*}}) short pass_short(short arg) { return arg; } -// CHECK-LABEL: define signext i16 @pass_short(i16 signext %{{.*}}) +// CHECK-LABEL: define frozen signext i16 @pass_short(i16 signext %{{.*}}) int pass_int(int arg) { return arg; } -// CHECK-LABEL: define signext i32 @pass_int(i32 signext %{{.*}}) +// CHECK-LABEL: define frozen signext i32 @pass_int(i32 signext %{{.*}}) long pass_long(long arg) { return arg; } -// CHECK-LABEL: define i64 @pass_long(i64 %{{.*}}) +// CHECK-LABEL: define frozen i64 @pass_long(i64 %{{.*}}) long long pass_longlong(long long arg) { return arg; } -// CHECK-LABEL: define i64 @pass_longlong(i64 %{{.*}}) +// CHECK-LABEL: define frozen i64 @pass_longlong(i64 %{{.*}}) __int128 pass_int128(__int128 arg) { return arg; } // CHECK-LABEL: define void @pass_int128(i128* noalias sret align 16 %{{.*}}, i128* %0) float pass_float(float arg) { return arg; } -// CHECK-LABEL: define float @pass_float(float %{{.*}}) +// CHECK-LABEL: define frozen float @pass_float(float %{{.*}}) double pass_double(double arg) { return arg; } -// CHECK-LABEL: define double @pass_double(double %{{.*}}) +// CHECK-LABEL: define frozen double @pass_double(double %{{.*}}) long double pass_longdouble(long double arg) { return arg; } // CHECK-LABEL: define void @pass_longdouble(fp128* noalias sret align 8 %{{.*}}, fp128* %0) @@ -158,7 +158,7 @@ // Accessing variable argument lists int va_int(__builtin_va_list l) { return __builtin_va_arg(l, int); } -// CHECK-LABEL: define signext i32 @va_int(%struct.__va_list_tag* %{{.*}}) +// CHECK-LABEL: define frozen signext i32 @va_int(%struct.__va_list_tag* %{{.*}}) // CHECK: [[REG_COUNT_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 0 // CHECK: [[REG_COUNT:%[^ ]+]] = load i64, i64* [[REG_COUNT_PTR]] // CHECK: [[FITS_IN_REGS:%[^ ]+]] = icmp ult i64 [[REG_COUNT]], 5 @@ -182,7 +182,7 @@ // CHECK: ret i32 [[RET]] long va_long(__builtin_va_list l) { return __builtin_va_arg(l, long); } -// CHECK-LABEL: define i64 @va_long(%struct.__va_list_tag* %{{.*}}) +// CHECK-LABEL: define frozen i64 @va_long(%struct.__va_list_tag* %{{.*}}) // CHECK: [[REG_COUNT_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 0 // CHECK: [[REG_COUNT:%[^ ]+]] = load i64, i64* [[REG_COUNT_PTR]] // CHECK: [[FITS_IN_REGS:%[^ ]+]] = icmp ult i64 [[REG_COUNT]], 5 @@ -206,7 +206,7 @@ // CHECK: ret i64 [[RET]] long long va_longlong(__builtin_va_list l) { return __builtin_va_arg(l, long long); } -// CHECK-LABEL: define i64 @va_longlong(%struct.__va_list_tag* %{{.*}}) +// CHECK-LABEL: define frozen i64 @va_longlong(%struct.__va_list_tag* %{{.*}}) // CHECK: [[REG_COUNT_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 0 // CHECK: [[REG_COUNT:%[^ ]+]] = load i64, i64* [[REG_COUNT_PTR]] // CHECK: [[FITS_IN_REGS:%[^ ]+]] = icmp ult i64 [[REG_COUNT]], 5 @@ -230,7 +230,7 @@ // CHECK: ret i64 [[RET]] double va_double(__builtin_va_list l) { return __builtin_va_arg(l, double); } -// CHECK-LABEL: define double @va_double(%struct.__va_list_tag* %{{.*}}) +// CHECK-LABEL: define frozen double @va_double(%struct.__va_list_tag* %{{.*}}) // HARD-FLOAT: [[REG_COUNT_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 1 // SOFT-FLOAT: [[REG_COUNT_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 0 // CHECK: [[REG_COUNT:%[^ ]+]] = load i64, i64* [[REG_COUNT_PTR]] diff --git a/clang/test/CodeGen/systemz-abi.cpp b/clang/test/CodeGen/systemz-abi.cpp --- a/clang/test/CodeGen/systemz-abi.cpp +++ b/clang/test/CodeGen/systemz-abi.cpp @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -triple s390x-linux-gnu -emit-llvm -x c++ -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple s390x-linux-gnu -emit-llvm -x c++ -o - %s -mfloat-abi soft \ +// RUN: %clang_cc1 -disable-frozen-args -triple s390x-linux-gnu -emit-llvm -x c++ -o - %s | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args -triple s390x-linux-gnu -emit-llvm -x c++ -o - %s -mfloat-abi soft \ // RUN: | FileCheck %s --check-prefix=SOFT-FLOAT // For compatibility with GCC, this structure is passed in an FPR in C++, diff --git a/clang/test/CodeGen/systemz-inline-asm.c b/clang/test/CodeGen/systemz-inline-asm.c --- a/clang/test/CodeGen/systemz-inline-asm.c +++ b/clang/test/CodeGen/systemz-inline-asm.c @@ -5,31 +5,31 @@ void test_store_m(unsigned int i) { asm("st %1, %0" : "=m" (gi) : "r" (i)); -// CHECK-LABEL: define void @test_store_m(i32 zeroext %i) +// CHECK-LABEL: define void @test_store_m(i32 frozen zeroext %i) // CHECK: call void asm "st $1, $0", "=*m,r"(i32* nonnull @gi, i32 %i) } void test_store_Q(unsigned int i) { asm("st %1, %0" : "=Q" (gi) : "r" (i)); -// CHECK-LABEL: define void @test_store_Q(i32 zeroext %i) +// CHECK-LABEL: define void @test_store_Q(i32 frozen zeroext %i) // CHECK: call void asm "st $1, $0", "=*Q,r"(i32* nonnull @gi, i32 %i) } void test_store_R(unsigned int i) { asm("st %1, %0" : "=R" (gi) : "r" (i)); -// CHECK-LABEL: define void @test_store_R(i32 zeroext %i) +// CHECK-LABEL: define void @test_store_R(i32 frozen zeroext %i) // CHECK: call void asm "st $1, $0", "=*R,r"(i32* nonnull @gi, i32 %i) } void test_store_S(unsigned int i) { asm("st %1, %0" : "=S" (gi) : "r" (i)); -// CHECK-LABEL: define void @test_store_S(i32 zeroext %i) +// CHECK-LABEL: define void @test_store_S(i32 frozen zeroext %i) // CHECK: call void asm "st $1, $0", "=*S,r"(i32* nonnull @gi, i32 %i) } void test_store_T(unsigned int i) { asm("st %1, %0" : "=T" (gi) : "r" (i)); -// CHECK-LABEL: define void @test_store_T(i32 zeroext %i) +// CHECK-LABEL: define void @test_store_T(i32 frozen zeroext %i) // CHECK: call void asm "st $1, $0", "=*T,r"(i32* nonnull @gi, i32 %i) } @@ -37,7 +37,7 @@ unsigned int i; asm("l %0, %1" : "=r" (i) : "m" (gi)); return i; -// CHECK-LABEL: define signext i32 @test_load_m() +// CHECK-LABEL: define frozen signext i32 @test_load_m() // CHECK: call i32 asm "l $0, $1", "=r,*m"(i32* nonnull @gi) } @@ -45,7 +45,7 @@ unsigned int i; asm("l %0, %1" : "=r" (i) : "Q" (gi)); return i; -// CHECK-LABEL: define signext i32 @test_load_Q() +// CHECK-LABEL: define frozen signext i32 @test_load_Q() // CHECK: call i32 asm "l $0, $1", "=r,*Q"(i32* nonnull @gi) } @@ -53,7 +53,7 @@ unsigned int i; asm("l %0, %1" : "=r" (i) : "R" (gi)); return i; -// CHECK-LABEL: define signext i32 @test_load_R() +// CHECK-LABEL: define frozen signext i32 @test_load_R() // CHECK: call i32 asm "l $0, $1", "=r,*R"(i32* nonnull @gi) } @@ -61,7 +61,7 @@ unsigned int i; asm("l %0, %1" : "=r" (i) : "S" (gi)); return i; -// CHECK-LABEL: define signext i32 @test_load_S() +// CHECK-LABEL: define frozen signext i32 @test_load_S() // CHECK: call i32 asm "l $0, $1", "=r,*S"(i32* nonnull @gi) } @@ -69,34 +69,34 @@ unsigned int i; asm("l %0, %1" : "=r" (i) : "T" (gi)); return i; -// CHECK-LABEL: define signext i32 @test_load_T() +// CHECK-LABEL: define frozen signext i32 @test_load_T() // CHECK: call i32 asm "l $0, $1", "=r,*T"(i32* nonnull @gi) } void test_mI(unsigned char *c) { asm volatile("cli %0, %1" :: "Q" (*c), "I" (100)); -// CHECK-LABEL: define void @test_mI(i8* %c) +// CHECK-LABEL: define void @test_mI(i8* frozen %c) // CHECK: call void asm sideeffect "cli $0, $1", "*Q,I"(i8* %c, i32 100) } unsigned int test_dJa(unsigned int i, unsigned int j) { asm("sll %0, %2(%3)" : "=d" (i) : "0" (i), "J" (1000), "a" (j)); return i; -// CHECK-LABEL: define zeroext i32 @test_dJa(i32 zeroext %i, i32 zeroext %j) +// CHECK-LABEL: define frozen zeroext i32 @test_dJa(i32 frozen zeroext %i, i32 frozen zeroext %j) // CHECK: call i32 asm "sll $0, $2($3)", "=d,0,J,a"(i32 %i, i32 1000, i32 %j) } unsigned long test_rK(unsigned long i) { asm("aghi %0, %2" : "=r" (i) : "0" (i), "K" (-30000)); return i; -// CHECK-LABEL: define i64 @test_rK(i64 %i) +// CHECK-LABEL: define frozen i64 @test_rK(i64 frozen %i) // CHECK: call i64 asm "aghi $0, $2", "=r,0,K"(i64 %i, i32 -30000) } unsigned long test_rL(unsigned long i) { asm("sllg %0, %1, %2" : "=r" (i) : "r" (i), "L" (500000)); return i; -// CHECK-LABEL: define i64 @test_rL(i64 %i) +// CHECK-LABEL: define frozen i64 @test_rL(i64 frozen %i) // CHECK: call i64 asm "sllg $0, $1, $2", "=r,r,L"(i64 %i, i32 500000) } @@ -109,21 +109,21 @@ float test_f32(float f, float g) { asm("aebr %0, %2" : "=f" (f) : "0" (f), "f" (g)); return f; -// CHECK-LABEL: define float @test_f32(float %f, float %g) +// CHECK-LABEL: define frozen float @test_f32(float frozen %f, float frozen %g) // CHECK: call float asm "aebr $0, $2", "=f,0,f"(float %f, float %g) } double test_f64(double f, double g) { asm("adbr %0, %2" : "=f" (f) : "0" (f), "f" (g)); return f; -// CHECK-LABEL: define double @test_f64(double %f, double %g) +// CHECK-LABEL: define frozen double @test_f64(double frozen %f, double frozen %g) // CHECK: call double asm "adbr $0, $2", "=f,0,f"(double %f, double %g) } long double test_f128(long double f, long double g) { asm("axbr %0, %2" : "=f" (f) : "0" (f), "f" (g)); return f; -// CHECK: define void @test_f128(fp128* noalias nocapture sret align 8 [[DEST:%.*]], fp128* nocapture readonly %0, fp128* nocapture readonly %1) +// CHECK: define void @test_f128(fp128* noalias nocapture sret align 8 [[DEST:%.*]], fp128* frozen nocapture readonly %0, fp128* frozen nocapture readonly %1) // CHECK: %f = load fp128, fp128* %0 // CHECK: %g = load fp128, fp128* %1 // CHECK: [[RESULT:%.*]] = tail call fp128 asm "axbr $0, $2", "=f,0,f"(fp128 %f, fp128 %g) diff --git a/clang/test/CodeGen/sysv_abi.c b/clang/test/CodeGen/sysv_abi.c --- a/clang/test/CodeGen/sysv_abi.c +++ b/clang/test/CodeGen/sysv_abi.c @@ -1,7 +1,7 @@ -// RUN: %clang_cc1 -triple x86_64-pc-win32 -emit-llvm -target-cpu skylake-avx512 < %s | FileCheck %s --check-prefixes=CHECK,AVX -// RUN: %clang_cc1 -triple x86_64-linux -emit-llvm -target-cpu skylake-avx512 < %s | FileCheck %s --check-prefixes=CHECK,AVX -// RUN: %clang_cc1 -triple x86_64-pc-win32 -emit-llvm < %s | FileCheck %s --check-prefixes=CHECK,NOAVX -// RUN: %clang_cc1 -triple x86_64-linux -emit-llvm < %s | FileCheck %s --check-prefixes=CHECK,NOAVX +// RUN: %clang_cc1 -disable-frozen-args -triple x86_64-pc-win32 -emit-llvm -target-cpu skylake-avx512 < %s | FileCheck %s --check-prefixes=CHECK,AVX +// RUN: %clang_cc1 -disable-frozen-args -triple x86_64-linux -emit-llvm -target-cpu skylake-avx512 < %s | FileCheck %s --check-prefixes=CHECK,AVX +// RUN: %clang_cc1 -disable-frozen-args -triple x86_64-pc-win32 -emit-llvm < %s | FileCheck %s --check-prefixes=CHECK,NOAVX +// RUN: %clang_cc1 -disable-frozen-args -triple x86_64-linux -emit-llvm < %s | FileCheck %s --check-prefixes=CHECK,NOAVX #define SYSV_CC __attribute__((sysv_abi)) @@ -39,11 +39,11 @@ } // CHECK: define {{(dso_local )?}}void @use_vectors() -// AVX: call {{(x86_64_sysvcc )?}}<8 x float> @get_m256() +// AVX: call {{(x86_64_sysvcc )?}}frozen <8 x float> @get_m256() // AVX: call {{(x86_64_sysvcc )?}}void @take_m256(<8 x float> %{{.*}}) -// AVX: call {{(x86_64_sysvcc )?}}<16 x float> @get_m512() +// AVX: call {{(x86_64_sysvcc )?}}frozen <16 x float> @get_m512() // AVX: call {{(x86_64_sysvcc )?}}void @take_m512(<16 x float> %{{.*}}) -// NOAVX: call {{(x86_64_sysvcc )?}}<8 x float> @get_m256() +// NOAVX: call {{(x86_64_sysvcc )?}}frozen <8 x float> @get_m256() // NOAVX: call {{(x86_64_sysvcc )?}}void @take_m256(<8 x float>* byval(<8 x float>) align 32 %{{.*}}) -// NOAVX: call {{(x86_64_sysvcc )?}}<16 x float> @get_m512() +// NOAVX: call {{(x86_64_sysvcc )?}}frozen <16 x float> @get_m512() // NOAVX: call {{(x86_64_sysvcc )?}}void @take_m512(<16 x float>* byval(<16 x float>) align 64 %{{.*}}) diff --git a/clang/test/CodeGen/tbaa-class.cpp b/clang/test/CodeGen/tbaa-class.cpp --- a/clang/test/CodeGen/tbaa-class.cpp +++ b/clang/test/CodeGen/tbaa-class.cpp @@ -52,10 +52,10 @@ }; uint32_t g(uint32_t *s, StructA *A, uint64_t count) { -// CHECK-LABEL: define i32 @_Z1g +// CHECK-LABEL: define frozen i32 @_Z1g // CHECK: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_i32:!.*]] // CHECK: store i32 4, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]] -// PATH-LABEL: define i32 @_Z1g +// PATH-LABEL: define frozen i32 @_Z1g // PATH: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_i32:!.*]] // PATH: store i32 4, i32* %{{.*}}, align 4, !tbaa [[TAG_A_f32:!.*]] *s = 1; @@ -64,10 +64,10 @@ } uint32_t g2(uint32_t *s, StructA *A, uint64_t count) { -// CHECK-LABEL: define i32 @_Z2g2 +// CHECK-LABEL: define frozen i32 @_Z2g2 // CHECK: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]] // CHECK: store i16 4, i16* %{{.*}}, align 4, !tbaa [[TAG_i16:!.*]] -// PATH-LABEL: define i32 @_Z2g2 +// PATH-LABEL: define frozen i32 @_Z2g2 // PATH: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]] // PATH: store i16 4, i16* %{{.*}}, align 4, !tbaa [[TAG_A_f16:!.*]] *s = 1; @@ -76,10 +76,10 @@ } uint32_t g3(StructA *A, StructB *B, uint64_t count) { -// CHECK-LABEL: define i32 @_Z2g3 +// CHECK-LABEL: define frozen i32 @_Z2g3 // CHECK: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]] // CHECK: store i32 4, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]] -// PATH-LABEL: define i32 @_Z2g3 +// PATH-LABEL: define frozen i32 @_Z2g3 // PATH: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_A_f32]] // PATH: store i32 4, i32* %{{.*}}, align 4, !tbaa [[TAG_B_a_f32:!.*]] A->f32 = 1; @@ -88,10 +88,10 @@ } uint32_t g4(StructA *A, StructB *B, uint64_t count) { -// CHECK-LABEL: define i32 @_Z2g4 +// CHECK-LABEL: define frozen i32 @_Z2g4 // CHECK: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]] // CHECK: store i16 4, i16* %{{.*}}, align 4, !tbaa [[TAG_i16]] -// PATH-LABEL: define i32 @_Z2g4 +// PATH-LABEL: define frozen i32 @_Z2g4 // PATH: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_A_f32]] // PATH: store i16 4, i16* %{{.*}}, align 4, !tbaa [[TAG_B_a_f16:!.*]] A->f32 = 1; @@ -100,10 +100,10 @@ } uint32_t g5(StructA *A, StructB *B, uint64_t count) { -// CHECK-LABEL: define i32 @_Z2g5 +// CHECK-LABEL: define frozen i32 @_Z2g5 // CHECK: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]] // CHECK: store i32 4, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]] -// PATH-LABEL: define i32 @_Z2g5 +// PATH-LABEL: define frozen i32 @_Z2g5 // PATH: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_A_f32]] // PATH: store i32 4, i32* %{{.*}}, align 4, !tbaa [[TAG_B_f32:!.*]] A->f32 = 1; @@ -112,10 +112,10 @@ } uint32_t g6(StructA *A, StructB *B, uint64_t count) { -// CHECK-LABEL: define i32 @_Z2g6 +// CHECK-LABEL: define frozen i32 @_Z2g6 // CHECK: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]] // CHECK: store i32 4, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]] -// PATH-LABEL: define i32 @_Z2g6 +// PATH-LABEL: define frozen i32 @_Z2g6 // PATH: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_A_f32]] // PATH: store i32 4, i32* %{{.*}}, align 4, !tbaa [[TAG_B_a_f32_2:!.*]] A->f32 = 1; @@ -124,10 +124,10 @@ } uint32_t g7(StructA *A, StructS *S, uint64_t count) { -// CHECK-LABEL: define i32 @_Z2g7 +// CHECK-LABEL: define frozen i32 @_Z2g7 // CHECK: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]] // CHECK: store i32 4, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]] -// PATH-LABEL: define i32 @_Z2g7 +// PATH-LABEL: define frozen i32 @_Z2g7 // PATH: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_A_f32]] // PATH: store i32 4, i32* %{{.*}}, align 4, !tbaa [[TAG_S_f32:!.*]] A->f32 = 1; @@ -136,10 +136,10 @@ } uint32_t g8(StructA *A, StructS *S, uint64_t count) { -// CHECK-LABEL: define i32 @_Z2g8 +// CHECK-LABEL: define frozen i32 @_Z2g8 // CHECK: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]] // CHECK: store i16 4, i16* %{{.*}}, align 4, !tbaa [[TAG_i16]] -// PATH-LABEL: define i32 @_Z2g8 +// PATH-LABEL: define frozen i32 @_Z2g8 // PATH: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_A_f32]] // PATH: store i16 4, i16* %{{.*}}, align 4, !tbaa [[TAG_S_f16:!.*]] A->f32 = 1; @@ -148,10 +148,10 @@ } uint32_t g9(StructS *S, StructS2 *S2, uint64_t count) { -// CHECK-LABEL: define i32 @_Z2g9 +// CHECK-LABEL: define frozen i32 @_Z2g9 // CHECK: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]] // CHECK: store i32 4, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]] -// PATH-LABEL: define i32 @_Z2g9 +// PATH-LABEL: define frozen i32 @_Z2g9 // PATH: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_S_f32]] // PATH: store i32 4, i32* %{{.*}}, align 4, !tbaa [[TAG_S_f32:!.*]] S->f32 = 1; @@ -160,10 +160,10 @@ } uint32_t g10(StructS *S, StructS2 *S2, uint64_t count) { -// CHECK-LABEL: define i32 @_Z3g10 +// CHECK-LABEL: define frozen i32 @_Z3g10 // CHECK: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]] // CHECK: store i32 4, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]] -// PATH-LABEL: define i32 @_Z3g10 +// PATH-LABEL: define frozen i32 @_Z3g10 // PATH: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_S_f32]] // PATH: store i32 4, i32* %{{.*}}, align 4, !tbaa [[TAG_S2_f32_2:!.*]] S->f32 = 1; @@ -172,10 +172,10 @@ } uint32_t g11(StructC *C, StructD *D, uint64_t count) { -// CHECK-LABEL: define i32 @_Z3g11 +// CHECK-LABEL: define frozen i32 @_Z3g11 // CHECK: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]] // CHECK: store i32 4, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]] -// PATH-LABEL: define i32 @_Z3g11 +// PATH-LABEL: define frozen i32 @_Z3g11 // PATH: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_C_b_a_f32:!.*]] // PATH: store i32 4, i32* %{{.*}}, align 4, !tbaa [[TAG_D_b_a_f32:!.*]] C->b.a.f32 = 1; @@ -184,11 +184,11 @@ } uint32_t g12(StructC *C, StructD *D, uint64_t count) { -// CHECK-LABEL: define i32 @_Z3g12 +// CHECK-LABEL: define frozen i32 @_Z3g12 // CHECK: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]] // CHECK: store i32 4, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]] // TODO: differentiate the two accesses. -// PATH-LABEL: define i32 @_Z3g12 +// PATH-LABEL: define frozen i32 @_Z3g12 // PATH: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_B_a_f32]] // PATH: store i32 4, i32* %{{.*}}, align 4, !tbaa [[TAG_B_a_f32]] StructB *b1 = &(C->b); diff --git a/clang/test/CodeGen/tbaa.cpp b/clang/test/CodeGen/tbaa.cpp --- a/clang/test/CodeGen/tbaa.cpp +++ b/clang/test/CodeGen/tbaa.cpp @@ -50,10 +50,10 @@ } StructS2; uint32_t g(uint32_t *s, StructA *A, uint64_t count) { -// CHECK-LABEL: define i32 @_Z1g +// CHECK-LABEL: define frozen i32 @_Z1g // CHECK: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_i32:!.*]] // CHECK: store i32 4, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]] -// PATH-LABEL: define i32 @_Z1g +// PATH-LABEL: define frozen i32 @_Z1g // PATH: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_i32:!.*]] // PATH: store i32 4, i32* %{{.*}}, align 4, !tbaa [[TAG_A_f32:!.*]] *s = 1; @@ -62,10 +62,10 @@ } uint32_t g2(uint32_t *s, StructA *A, uint64_t count) { -// CHECK-LABEL: define i32 @_Z2g2 +// CHECK-LABEL: define frozen i32 @_Z2g2 // CHECK: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]] // CHECK: store i16 4, i16* %{{.*}}, align 4, !tbaa [[TAG_i16:!.*]] -// PATH-LABEL: define i32 @_Z2g2 +// PATH-LABEL: define frozen i32 @_Z2g2 // PATH: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]] // PATH: store i16 4, i16* %{{.*}}, align 4, !tbaa [[TAG_A_f16:!.*]] *s = 1; @@ -74,10 +74,10 @@ } uint32_t g3(StructA *A, StructB *B, uint64_t count) { -// CHECK-LABEL: define i32 @_Z2g3 +// CHECK-LABEL: define frozen i32 @_Z2g3 // CHECK: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]] // CHECK: store i32 4, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]] -// PATH-LABEL: define i32 @_Z2g3 +// PATH-LABEL: define frozen i32 @_Z2g3 // PATH: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_A_f32]] // PATH: store i32 4, i32* %{{.*}}, align 4, !tbaa [[TAG_B_a_f32:!.*]] A->f32 = 1; @@ -86,10 +86,10 @@ } uint32_t g4(StructA *A, StructB *B, uint64_t count) { -// CHECK-LABEL: define i32 @_Z2g4 +// CHECK-LABEL: define frozen i32 @_Z2g4 // CHECK: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]] // CHECK: store i16 4, i16* %{{.*}}, align 4, !tbaa [[TAG_i16]] -// PATH-LABEL: define i32 @_Z2g4 +// PATH-LABEL: define frozen i32 @_Z2g4 // PATH: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_A_f32]] // PATH: store i16 4, i16* %{{.*}}, align 4, !tbaa [[TAG_B_a_f16:!.*]] A->f32 = 1; @@ -98,10 +98,10 @@ } uint32_t g5(StructA *A, StructB *B, uint64_t count) { -// CHECK-LABEL: define i32 @_Z2g5 +// CHECK-LABEL: define frozen i32 @_Z2g5 // CHECK: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]] // CHECK: store i32 4, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]] -// PATH-LABEL: define i32 @_Z2g5 +// PATH-LABEL: define frozen i32 @_Z2g5 // PATH: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_A_f32]] // PATH: store i32 4, i32* %{{.*}}, align 4, !tbaa [[TAG_B_f32:!.*]] A->f32 = 1; @@ -110,10 +110,10 @@ } uint32_t g6(StructA *A, StructB *B, uint64_t count) { -// CHECK-LABEL: define i32 @_Z2g6 +// CHECK-LABEL: define frozen i32 @_Z2g6 // CHECK: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]] // CHECK: store i32 4, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]] -// PATH-LABEL: define i32 @_Z2g6 +// PATH-LABEL: define frozen i32 @_Z2g6 // PATH: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_A_f32]] // PATH: store i32 4, i32* %{{.*}}, align 4, !tbaa [[TAG_B_a_f32_2:!.*]] A->f32 = 1; @@ -122,10 +122,10 @@ } uint32_t g7(StructA *A, StructS *S, uint64_t count) { -// CHECK-LABEL: define i32 @_Z2g7 +// CHECK-LABEL: define frozen i32 @_Z2g7 // CHECK: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]] // CHECK: store i32 4, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]] -// PATH-LABEL: define i32 @_Z2g7 +// PATH-LABEL: define frozen i32 @_Z2g7 // PATH: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_A_f32]] // PATH: store i32 4, i32* %{{.*}}, align 4, !tbaa [[TAG_S_f32:!.*]] A->f32 = 1; @@ -134,10 +134,10 @@ } uint32_t g8(StructA *A, StructS *S, uint64_t count) { -// CHECK-LABEL: define i32 @_Z2g8 +// CHECK-LABEL: define frozen i32 @_Z2g8 // CHECK: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]] // CHECK: store i16 4, i16* %{{.*}}, align 4, !tbaa [[TAG_i16]] -// PATH-LABEL: define i32 @_Z2g8 +// PATH-LABEL: define frozen i32 @_Z2g8 // PATH: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_A_f32]] // PATH: store i16 4, i16* %{{.*}}, align 4, !tbaa [[TAG_S_f16:!.*]] A->f32 = 1; @@ -146,10 +146,10 @@ } uint32_t g9(StructS *S, StructS2 *S2, uint64_t count) { -// CHECK-LABEL: define i32 @_Z2g9 +// CHECK-LABEL: define frozen i32 @_Z2g9 // CHECK: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]] // CHECK: store i32 4, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]] -// PATH-LABEL: define i32 @_Z2g9 +// PATH-LABEL: define frozen i32 @_Z2g9 // PATH: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_S_f32]] // PATH: store i32 4, i32* %{{.*}}, align 4, !tbaa [[TAG_S2_f32:!.*]] S->f32 = 1; @@ -158,10 +158,10 @@ } uint32_t g10(StructS *S, StructS2 *S2, uint64_t count) { -// CHECK-LABEL: define i32 @_Z3g10 +// CHECK-LABEL: define frozen i32 @_Z3g10 // CHECK: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]] // CHECK: store i16 4, i16* %{{.*}}, align 4, !tbaa [[TAG_i16]] -// PATH-LABEL: define i32 @_Z3g10 +// PATH-LABEL: define frozen i32 @_Z3g10 // PATH: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_S_f32]] // PATH: store i16 4, i16* %{{.*}}, align 4, !tbaa [[TAG_S2_f16:!.*]] S->f32 = 1; @@ -170,10 +170,10 @@ } uint32_t g11(StructC *C, StructD *D, uint64_t count) { -// CHECK-LABEL: define i32 @_Z3g11 +// CHECK-LABEL: define frozen i32 @_Z3g11 // CHECK: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]] // CHECK: store i32 4, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]] -// PATH-LABEL: define i32 @_Z3g11 +// PATH-LABEL: define frozen i32 @_Z3g11 // PATH: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_C_b_a_f32:!.*]] // PATH: store i32 4, i32* %{{.*}}, align 4, !tbaa [[TAG_D_b_a_f32:!.*]] C->b.a.f32 = 1; @@ -182,11 +182,11 @@ } uint32_t g12(StructC *C, StructD *D, uint64_t count) { -// CHECK-LABEL: define i32 @_Z3g12 +// CHECK-LABEL: define frozen i32 @_Z3g12 // CHECK: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]] // CHECK: store i32 4, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]] // TODO: differentiate the two accesses. -// PATH-LABEL: define i32 @_Z3g12 +// PATH-LABEL: define frozen i32 @_Z3g12 // PATH: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_B_a_f32]] // PATH: store i32 4, i32* %{{.*}}, align 4, !tbaa [[TAG_B_a_f32]] StructB *b1 = &(C->b); @@ -207,9 +207,9 @@ } ATTR; char g13(struct five *a, struct five *b) { return a->b; -// CHECK-LABEL: define signext i8 @_Z3g13 +// CHECK-LABEL: define frozen signext i8 @_Z3g13 // CHECK: load i8, i8* %{{.*}}, align 1, !tbaa [[TAG_char:!.*]] -// PATH-LABEL: define signext i8 @_Z3g13 +// PATH-LABEL: define frozen signext i8 @_Z3g13 // PATH: load i8, i8* %{{.*}}, align 1, !tbaa [[TAG_five_b:!.*]] } @@ -220,9 +220,9 @@ char c; }; char g14(struct six *a, struct six *b) { -// CHECK-LABEL: define signext i8 @_Z3g14 +// CHECK-LABEL: define frozen signext i8 @_Z3g14 // CHECK: load i8, i8* %{{.*}}, align 1, !tbaa [[TAG_char]] -// PATH-LABEL: define signext i8 @_Z3g14 +// PATH-LABEL: define frozen signext i8 @_Z3g14 // PATH: load i8, i8* %{{.*}}, align 1, !tbaa [[TAG_six_b:!.*]] return a->b; } @@ -230,10 +230,10 @@ // Types that differ only by name may alias. typedef StructS StructS3; uint32_t g15(StructS *S, StructS3 *S3, uint64_t count) { -// CHECK-LABEL: define i32 @_Z3g15 +// CHECK-LABEL: define frozen i32 @_Z3g15 // CHECK: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]] // CHECK: store i32 4, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]] -// PATH-LABEL: define i32 @_Z3g15 +// PATH-LABEL: define frozen i32 @_Z3g15 // PATH: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_S_f32]] // PATH: store i32 4, i32* %{{.*}}, align 4, !tbaa [[TAG_S_f32]] S->f32 = 1; @@ -281,7 +281,7 @@ // NEW-PATH-DAG: [[TYPE_short:!.*]] = !{[[TYPE_char]], i64 2, !"short"} // NEW-PATH-DAG: [[TYPE_int:!.*]] = !{[[TYPE_char]], i64 4, !"int"} // NEW-PATH-DAG: [[TAG_i32:!.*]] = !{[[TYPE_int]], [[TYPE_int]], i64 0, i64 4} -// NEW-PATH-DAG: [[TYPE_A:!.*]] = !{[[TYPE_char]], i64 16, !"_ZTS7StructA", [[TYPE_short]], i64 0, i64 2, [[TYPE_int]], i64 4, i64 4, !12, i64 8, i64 2, [[TYPE_int]], i64 12, i64 4} +// NEW-PATH-DAG: [[TYPE_A:!.*]] = !{[[TYPE_char]], i64 16, !"_ZTS7StructA", [[TYPE_short]], i64 0, i64 2, [[TYPE_int]], i64 4, i64 4, [[TYPE_short]], i64 8, i64 2, [[TYPE_int]], i64 12, i64 4} // NEW-PATH-DAG: [[TAG_A_f16]] = !{[[TYPE_A]], [[TYPE_short]], i64 0, i64 2} // NEW-PATH-DAG: [[TAG_A_f32]] = !{[[TYPE_A]], [[TYPE_int]], i64 4, i64 4} // NEW-PATH-DAG: [[TYPE_B:!.*]] = !{[[TYPE_char]], i64 24, !"_ZTS7StructB", [[TYPE_short]], i64 0, i64 2, [[TYPE_A]], i64 4, i64 16, [[TYPE_int]], i64 20, i64 4} diff --git a/clang/test/CodeGen/temporary-lifetime.cpp b/clang/test/CodeGen/temporary-lifetime.cpp --- a/clang/test/CodeGen/temporary-lifetime.cpp +++ b/clang/test/CodeGen/temporary-lifetime.cpp @@ -22,24 +22,24 @@ void Test1() { // CHECK-DTOR-LABEL: Test1 // CHECK-DTOR: call void @llvm.lifetime.start.p0i8(i64 1024, i8* nonnull %[[ADDR:[0-9]+]]) - // CHECK-DTOR: call void @_ZN1AC1Ev(%struct.A* nonnull %[[VAR:[^ ]+]]) + // CHECK-DTOR: call void @_ZN1AC1Ev(%struct.A* frozen nonnull %[[VAR:[^ ]+]]) // CHECK-DTOR: call void @_Z3FooIRK1AEvOT_ - // CHECK-DTOR: call void @_ZN1AD1Ev(%struct.A* nonnull %[[VAR]]) + // CHECK-DTOR: call void @_ZN1AD1Ev(%struct.A* frozen nonnull %[[VAR]]) // CHECK-DTOR: call void @llvm.lifetime.end.p0i8(i64 1024, i8* nonnull %[[ADDR]]) // CHECK-DTOR: call void @llvm.lifetime.start.p0i8(i64 1024, i8* nonnull %[[ADDR:[0-9]+]]) - // CHECK-DTOR: call void @_ZN1AC1Ev(%struct.A* nonnull %[[VAR:[^ ]+]]) + // CHECK-DTOR: call void @_ZN1AC1Ev(%struct.A* frozen nonnull %[[VAR:[^ ]+]]) // CHECK-DTOR: call void @_Z3FooIRK1AEvOT_ - // CHECK-DTOR: call void @_ZN1AD1Ev(%struct.A* nonnull %[[VAR]]) + // CHECK-DTOR: call void @_ZN1AD1Ev(%struct.A* frozen nonnull %[[VAR]]) // CHECK-DTOR: call void @llvm.lifetime.end.p0i8(i64 1024, i8* nonnull %[[ADDR]]) // CHECK-DTOR: } // CHECK-NO-DTOR-LABEL: Test1 // CHECK-NO-DTOR: call void @llvm.lifetime.start.p0i8(i64 1024, i8* nonnull %[[ADDR:[0-9]+]]) - // CHECK-NO-DTOR: call void @_ZN1AC1Ev(%struct.A* nonnull %[[VAR:[^ ]+]]) + // CHECK-NO-DTOR: call void @_ZN1AC1Ev(%struct.A* frozen nonnull %[[VAR:[^ ]+]]) // CHECK-NO-DTOR: call void @_Z3FooIRK1AEvOT_ // CHECK-NO-DTOR: call void @llvm.lifetime.end.p0i8(i64 1024, i8* nonnull %[[ADDR]]) // CHECK-NO-DTOR: call void @llvm.lifetime.start.p0i8(i64 1024, i8* nonnull %[[ADDR:[0-9]+]]) - // CHECK-NO-DTOR: call void @_ZN1AC1Ev(%struct.A* nonnull %[[VAR:[^ ]+]]) + // CHECK-NO-DTOR: call void @_ZN1AC1Ev(%struct.A* frozen nonnull %[[VAR:[^ ]+]]) // CHECK-NO-DTOR: call void @_Z3FooIRK1AEvOT_ // CHECK-NO-DTOR: call void @llvm.lifetime.end.p0i8(i64 1024, i8* nonnull %[[ADDR]]) // CHECK-NO-DTOR: } @@ -56,23 +56,23 @@ void Test2() { // CHECK-DTOR-LABEL: Test2 // CHECK-DTOR: call void @llvm.lifetime.start.p0i8(i64 1024, i8* nonnull %[[ADDR1:[0-9]+]]) - // CHECK-DTOR: call void @_ZN1AC1Ev(%struct.A* nonnull %[[VAR1:[^ ]+]]) + // CHECK-DTOR: call void @_ZN1AC1Ev(%struct.A* frozen nonnull %[[VAR1:[^ ]+]]) // CHECK-DTOR: call void @_Z3FooIRK1AEvOT_ // CHECK-DTOR: call void @llvm.lifetime.start.p0i8(i64 1024, i8* nonnull %[[ADDR2:[0-9]+]]) - // CHECK-DTOR: call void @_ZN1AC1Ev(%struct.A* nonnull %[[VAR2:[^ ]+]]) + // CHECK-DTOR: call void @_ZN1AC1Ev(%struct.A* frozen nonnull %[[VAR2:[^ ]+]]) // CHECK-DTOR: call void @_Z3FooIRK1AEvOT_ - // CHECK-DTOR: call void @_ZN1AD1Ev(%struct.A* nonnull %[[VAR2]]) + // CHECK-DTOR: call void @_ZN1AD1Ev(%struct.A* frozen nonnull %[[VAR2]]) // CHECK-DTOR: call void @llvm.lifetime.end.p0i8(i64 1024, i8* nonnull %[[ADDR2]]) - // CHECK-DTOR: call void @_ZN1AD1Ev(%struct.A* nonnull %[[VAR1]]) + // CHECK-DTOR: call void @_ZN1AD1Ev(%struct.A* frozen nonnull %[[VAR1]]) // CHECK-DTOR: call void @llvm.lifetime.end.p0i8(i64 1024, i8* nonnull %[[ADDR1]]) // CHECK-DTOR: } // CHECK-NO-DTOR-LABEL: Test2 // CHECK-NO-DTOR: call void @llvm.lifetime.start.p0i8(i64 1024, i8* nonnull %[[ADDR1:[0-9]+]]) - // CHECK-NO-DTOR: call void @_ZN1AC1Ev(%struct.A* nonnull %[[VAR1:[^ ]+]]) + // CHECK-NO-DTOR: call void @_ZN1AC1Ev(%struct.A* frozen nonnull %[[VAR1:[^ ]+]]) // CHECK-NO-DTOR: call void @_Z3FooIRK1AEvOT_ // CHECK-NO-DTOR: call void @llvm.lifetime.start.p0i8(i64 1024, i8* nonnull %[[ADDR2:[0-9]+]]) - // CHECK-NO-DTOR: call void @_ZN1AC1Ev(%struct.A* nonnull %[[VAR2:[^ ]+]]) + // CHECK-NO-DTOR: call void @_ZN1AC1Ev(%struct.A* frozen nonnull %[[VAR2:[^ ]+]]) // CHECK-NO-DTOR: call void @_Z3FooIRK1AEvOT_ // CHECK-NO-DTOR: call void @llvm.lifetime.end.p0i8(i64 1024, i8* nonnull %[[ADDR2]]) // CHECK-NO-DTOR: call void @llvm.lifetime.end.p0i8(i64 1024, i8* nonnull %[[ADDR1]]) @@ -122,7 +122,7 @@ int Test5() { // CHECK-DTOR-LABEL: Test5 // CHECK-DTOR: call void @llvm.lifetime.start - // CHECK-DTOR: call i32 @_Z3BazIiET_v() + // CHECK-DTOR: call frozen i32 @_Z3BazIiET_v() // CHECK-DTOR: store // CHECK-DTOR: call void @_Z3FooIRKiEvOT_ // CHECK-DTOR: load @@ -136,12 +136,12 @@ void Test6() { // CHECK-DTOR-LABEL: Test6 // CHECK-DTOR: call void @llvm.lifetime.start.p0i8(i64 {{[0-9]+}}, i8* nonnull %[[ADDR:[0-9]+]]) - // CHECK-DTOR: call i32 @_Z3BazIiET_v() + // CHECK-DTOR: call frozen i32 @_Z3BazIiET_v() // CHECK-DTOR: store // CHECK-DTOR: call void @_Z3FooIiEvOT_ // CHECK-DTOR: call void @llvm.lifetime.end.p0i8(i64 {{[0-9]+}}, i8* nonnull %[[ADDR]]) // CHECK-DTOR: call void @llvm.lifetime.start.p0i8(i64 {{[0-9]+}}, i8* nonnull %[[ADDR:[0-9]+]]) - // CHECK-DTOR: call i32 @_Z3BazIiET_v() + // CHECK-DTOR: call frozen i32 @_Z3BazIiET_v() // CHECK-DTOR: store // CHECK-DTOR: call void @_Z3FooIiEvOT_ // CHECK-DTOR: call void @llvm.lifetime.end.p0i8(i64 {{[0-9]+}}, i8* nonnull %[[ADDR]]) @@ -155,12 +155,12 @@ // CHECK-DTOR: call void @llvm.lifetime.start.p0i8(i64 1024, i8* nonnull %[[ADDR:[0-9]+]]) // CHECK-DTOR: call void @_Z3BazI1AET_v({{.*}} %[[SLOT:[^ ]+]]) // CHECK-DTOR: call void @_Z3FooI1AEvOT_({{.*}} %[[SLOT]]) - // CHECK-DTOR: call void @_ZN1AD1Ev(%struct.A* nonnull %[[SLOT]]) + // CHECK-DTOR: call void @_ZN1AD1Ev(%struct.A* frozen nonnull %[[SLOT]]) // CHECK-DTOR: call void @llvm.lifetime.end.p0i8(i64 1024, i8* nonnull %[[ADDR]]) // CHECK-DTOR: call void @llvm.lifetime.start.p0i8(i64 1024, i8* nonnull %[[ADDR:[0-9]+]]) // CHECK-DTOR: call void @_Z3BazI1AET_v({{.*}} %[[SLOT:[^ ]+]]) // CHECK-DTOR: call void @_Z3FooI1AEvOT_({{.*}} %[[SLOT]]) - // CHECK-DTOR: call void @_ZN1AD1Ev(%struct.A* nonnull %[[SLOT]]) + // CHECK-DTOR: call void @_ZN1AD1Ev(%struct.A* frozen nonnull %[[SLOT]]) // CHECK-DTOR: call void @llvm.lifetime.end.p0i8(i64 1024, i8* nonnull %[[ADDR]]) // CHECK-DTOR: } Foo(Baz()); diff --git a/clang/test/CodeGen/transparent-union-redecl.c b/clang/test/CodeGen/transparent-union-redecl.c --- a/clang/test/CodeGen/transparent-union-redecl.c +++ b/clang/test/CodeGen/transparent-union-redecl.c @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -Werror -triple i386-linux -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args -Werror -triple i386-linux -emit-llvm -o - %s | FileCheck %s // Test that different order of declarations is acceptable and that // implementing different redeclarations is acceptable. diff --git a/clang/test/CodeGen/transparent-union.c b/clang/test/CodeGen/transparent-union.c --- a/clang/test/CodeGen/transparent-union.c +++ b/clang/test/CodeGen/transparent-union.c @@ -1,13 +1,13 @@ -// RUN: %clang_cc1 -Werror -triple x86_64-linux -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -Werror -triple i386-linux -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -Werror -triple armv7-linux -emit-llvm -o - %s | FileCheck %s --check-prefix=ARM -// RUN: %clang_cc1 -Werror -triple powerpc64le-linux -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -Werror -triple aarch64-linux -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DINFRONT -Werror -triple x86_64-linux -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DINFRONT -Werror -triple i386-linux -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DINFRONT -Werror -triple armv7-linux -emit-llvm -o - %s | FileCheck %s --check-prefix=ARM -// RUN: %clang_cc1 -DINFRONT -Werror -triple powerpc64le-linux -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DINFRONT -Werror -triple aarch64-linux -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args -Werror -triple x86_64-linux -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args -Werror -triple i386-linux -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args -Werror -triple armv7-linux -emit-llvm -o - %s | FileCheck %s --check-prefix=ARM +// RUN: %clang_cc1 -disable-frozen-args -Werror -triple powerpc64le-linux -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args -Werror -triple aarch64-linux -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args -DINFRONT -Werror -triple x86_64-linux -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args -DINFRONT -Werror -triple i386-linux -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args -DINFRONT -Werror -triple armv7-linux -emit-llvm -o - %s | FileCheck %s --check-prefix=ARM +// RUN: %clang_cc1 -disable-frozen-args -DINFRONT -Werror -triple powerpc64le-linux -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args -DINFRONT -Werror -triple aarch64-linux -emit-llvm -o - %s | FileCheck %s #ifdef INFRONT typedef union __attribute__((transparent_union)) { diff --git a/clang/test/CodeGen/ubsan-function.cpp b/clang/test/CodeGen/ubsan-function.cpp --- a/clang/test/CodeGen/ubsan-function.cpp +++ b/clang/test/CodeGen/ubsan-function.cpp @@ -3,7 +3,7 @@ // CHECK-LABEL: define void @_Z3funv() #0 prologue <{ i32, i32 }> <{ i32 846595819, i32 trunc (i64 sub (i64 ptrtoint (i8** @0 to i64), i64 ptrtoint (void ()* @_Z3funv to i64)) to i32) }> { void fun() {} -// CHECK-LABEL: define void @_Z6callerPFvvE(void ()* %f) +// CHECK-LABEL: define void @_Z6callerPFvvE(void ()* frozen %f) // CHECK: getelementptr <{ i32, i32 }>, <{ i32, i32 }>* {{.*}}, i32 0, i32 0, !nosanitize // CHECK: load i32, i32* {{.*}}, align {{.*}}, !nosanitize // CHECK: icmp eq i32 {{.*}}, 846595819, !nosanitize diff --git a/clang/test/CodeGen/ubsan-pass-object-size.c b/clang/test/CodeGen/ubsan-pass-object-size.c --- a/clang/test/CodeGen/ubsan-pass-object-size.c +++ b/clang/test/CodeGen/ubsan-pass-object-size.c @@ -1,6 +1,6 @@ // RUN: %clang_cc1 %s -emit-llvm -w -triple x86_64-apple-darwin10 -fsanitize=array-bounds -o - | FileCheck %s -// CHECK-LABEL: define i32 @foo( +// CHECK-LABEL: define frozen i32 @foo( int foo(int *const p __attribute__((pass_object_size(0))), int n) { int x = (p)[n]; @@ -32,35 +32,35 @@ return p[n]; } -// CHECK-LABEL: define i32 @baz( +// CHECK-LABEL: define frozen i32 @baz( int baz(int *const p __attribute__((pass_object_size(1))), int n) { // CHECK: __ubsan_handle_out_of_bounds // CHECK: ret i32 return p[n]; } -// CHECK-LABEL: define i32 @mat( +// CHECK-LABEL: define frozen i32 @mat( int mat(int *const p __attribute__((pass_object_size(2))), int n) { // CHECK-NOT: __ubsan_handle_out_of_bounds // CHECK: ret i32 return p[n]; } -// CHECK-LABEL: define i32 @pat( +// CHECK-LABEL: define frozen i32 @pat( int pat(int *const p __attribute__((pass_object_size(3))), int n) { // CHECK-NOT: __ubsan_handle_out_of_bounds // CHECK: ret i32 return p[n]; } -// CHECK-LABEL: define i32 @cat( +// CHECK-LABEL: define frozen i32 @cat( int cat(int p[static 10], int n) { // CHECK-NOT: __ubsan_handle_out_of_bounds // CHECK: ret i32 return p[n]; } -// CHECK-LABEL: define i32 @bat( +// CHECK-LABEL: define frozen i32 @bat( int bat(int n, int p[n]) { // CHECK-NOT: __ubsan_handle_out_of_bounds // CHECK: ret i32 diff --git a/clang/test/CodeGen/ubsan-promoted-arith.cpp b/clang/test/CodeGen/ubsan-promoted-arith.cpp --- a/clang/test/CodeGen/ubsan-promoted-arith.cpp +++ b/clang/test/CodeGen/ubsan-promoted-arith.cpp @@ -12,109 +12,109 @@ b }; -// CHECK-LABEL: define signext i8 @_Z4add1 +// CHECK-LABEL: define frozen signext i8 @_Z4add1 // CHECK-NOT: sadd.with.overflow char add1(char c) { return c + c; } -// CHECK-LABEL: define zeroext i8 @_Z4add2 +// CHECK-LABEL: define frozen zeroext i8 @_Z4add2 // CHECK-NOT: uadd.with.overflow uchar add2(uchar uc) { return uc + uc; } -// CHECK-LABEL: define i32 @_Z4add3 +// CHECK-LABEL: define frozen i32 @_Z4add3 // CHECK: sadd.with.overflow int add3(E1 e) { return e + a; } -// CHECK-LABEL: define signext i8 @_Z4add4 +// CHECK-LABEL: define frozen signext i8 @_Z4add4 // CHECK-NOT: sadd.with.overflow char add4(E2 e) { return e + b; } -// CHECK-LABEL: define signext i8 @_Z4sub1 +// CHECK-LABEL: define frozen signext i8 @_Z4sub1 // CHECK-NOT: ssub.with.overflow char sub1(char c) { return c - c; } -// CHECK-LABEL: define zeroext i8 @_Z4sub2 +// CHECK-LABEL: define frozen zeroext i8 @_Z4sub2 // CHECK-NOT: usub.with.overflow uchar sub2(uchar uc) { return uc - uc; } -// CHECK-LABEL: define signext i8 @_Z4sub3 +// CHECK-LABEL: define frozen signext i8 @_Z4sub3 // CHECK-NOT: ssub.with.overflow char sub3(char c) { return -c; } // Note: -INT_MIN can overflow. // -// CHECK-LABEL: define i32 @_Z4sub4 +// CHECK-LABEL: define frozen i32 @_Z4sub4 // CHECK: ssub.with.overflow int sub4(int i) { return -i; } -// CHECK-LABEL: define signext i8 @_Z4mul1 +// CHECK-LABEL: define frozen signext i8 @_Z4mul1 // CHECK-NOT: smul.with.overflow char mul1(char c) { return c * c; } -// CHECK-LABEL: define zeroext i8 @_Z4mul2 +// CHECK-LABEL: define frozen zeroext i8 @_Z4mul2 // CHECK-NOT: smul.with.overflow uchar mul2(uchar uc) { return uc * uc; } // Note: USHRT_MAX * USHRT_MAX can overflow. // -// CHECK-LABEL: define zeroext i16 @_Z4mul3 +// CHECK-LABEL: define frozen zeroext i16 @_Z4mul3 // CHECK: smul.with.overflow ushort mul3(ushort us) { return us * us; } -// CHECK-LABEL: define i32 @_Z4mul4 +// CHECK-LABEL: define frozen i32 @_Z4mul4 // CHECK: smul.with.overflow int mul4(int i, char c) { return i * c; } -// CHECK-LABEL: define i32 @_Z4mul5 +// CHECK-LABEL: define frozen i32 @_Z4mul5 // CHECK: smul.with.overflow int mul5(int i, char c) { return c * i; } -// CHECK-LABEL: define signext i16 @_Z4mul6 +// CHECK-LABEL: define frozen signext i16 @_Z4mul6 // CHECK-NOT: smul.with.overflow short mul6(short s) { return s * s; } -// CHECK-LABEL: define signext i8 @_Z4div1 +// CHECK-LABEL: define frozen signext i8 @_Z4div1 // CHECK-NOT: ubsan_handle_divrem_overflow char div1(char c) { return c / c; } -// CHECK-LABEL: define zeroext i8 @_Z4div2 +// CHECK-LABEL: define frozen zeroext i8 @_Z4div2 // CHECK-NOT: ubsan_handle_divrem_overflow uchar div2(uchar uc) { return uc / uc; } -// CHECK-LABEL: define signext i8 @_Z4div3 +// CHECK-LABEL: define frozen signext i8 @_Z4div3 // CHECK-NOT: ubsan_handle_divrem_overflow char div3(char c, int i) { return c / i; } -// CHECK-LABEL: define signext i8 @_Z4div4 +// CHECK-LABEL: define frozen signext i8 @_Z4div4 // CHECK: ubsan_handle_divrem_overflow char div4(int i, char c) { return i / c; } // Note: INT_MIN / -1 can overflow. // -// CHECK-LABEL: define signext i8 @_Z4div5 +// CHECK-LABEL: define frozen signext i8 @_Z4div5 // CHECK: ubsan_handle_divrem_overflow char div5(int i, char c) { return i / c; } -// CHECK-LABEL: define signext i8 @_Z4rem1 +// CHECK-LABEL: define frozen signext i8 @_Z4rem1 // CHECK-NOT: ubsan_handle_divrem_overflow char rem1(char c) { return c % c; } -// CHECK-LABEL: define zeroext i8 @_Z4rem2 +// CHECK-LABEL: define frozen zeroext i8 @_Z4rem2 // CHECK-NOT: ubsan_handle_divrem_overflow uchar rem2(uchar uc) { return uc % uc; } -// CHECK-LABEL: define signext i8 @_Z4rem3 +// CHECK-LABEL: define frozen signext i8 @_Z4rem3 // CHECK: ubsan_handle_divrem_overflow char rem3(int i, char c) { return i % c; } -// CHECK-LABEL: define signext i8 @_Z4rem4 +// CHECK-LABEL: define frozen signext i8 @_Z4rem4 // CHECK-NOT: ubsan_handle_divrem_overflow char rem4(char c, int i) { return c % i; } -// CHECK-LABEL: define signext i8 @_Z4inc1 +// CHECK-LABEL: define frozen signext i8 @_Z4inc1 // CHECK-NOT: sadd.with.overflow char inc1(char c) { return c++ + (char)0; } -// CHECK-LABEL: define zeroext i8 @_Z4inc2 +// CHECK-LABEL: define frozen zeroext i8 @_Z4inc2 // CHECK-NOT: uadd.with.overflow uchar inc2(uchar uc) { return uc++ + (uchar)0; } @@ -126,6 +126,6 @@ // CHECK-NOT: uadd.with.overflow void inc4(uchar uc) { uc++; } -// CHECK-LABEL: define <4 x i32> @_Z4vremDv4_iS_ +// CHECK-LABEL: define frozen <4 x i32> @_Z4vremDv4_iS_ // CHECK-NOT: ubsan_handle_divrem_overflow int4 vrem(int4 a, int4 b) { return a % b; } diff --git a/clang/test/CodeGen/ubsan-shift.c b/clang/test/CodeGen/ubsan-shift.c --- a/clang/test/CodeGen/ubsan-shift.c +++ b/clang/test/CodeGen/ubsan-shift.c @@ -1,34 +1,34 @@ // RUN: %clang_cc1 -triple=x86_64-apple-darwin -fsanitize=shift-exponent,shift-base -emit-llvm %s -o - | FileCheck %s -// CHECK-LABEL: define i32 @f1 +// CHECK-LABEL: define frozen i32 @f1 int f1(int c, int shamt) { // CHECK: icmp ule i32 %{{.*}}, 31, !nosanitize // CHECK: icmp ule i32 %{{.*}}, 31, !nosanitize return 1 << (c << shamt); } -// CHECK-LABEL: define i32 @f2 +// CHECK-LABEL: define frozen i32 @f2 int f2(long c, int shamt) { // CHECK: icmp ule i32 %{{.*}}, 63, !nosanitize // CHECK: icmp ule i64 %{{.*}}, 31, !nosanitize return 1 << (c << shamt); } -// CHECK-LABEL: define i32 @f3 +// CHECK-LABEL: define frozen i32 @f3 unsigned f3(unsigned c, int shamt) { // CHECK: icmp ule i32 %{{.*}}, 31, !nosanitize // CHECK: icmp ule i32 %{{.*}}, 31, !nosanitize return 1U << (c << shamt); } -// CHECK-LABEL: define i32 @f4 +// CHECK-LABEL: define frozen i32 @f4 unsigned f4(unsigned long c, int shamt) { // CHECK: icmp ule i32 %{{.*}}, 63, !nosanitize // CHECK: icmp ule i64 %{{.*}}, 31, !nosanitize return 1U << (c << shamt); } -// CHECK-LABEL: define i32 @f5 +// CHECK-LABEL: define frozen i32 @f5 int f5(int c, long long shamt) { // CHECK: icmp ule i64 %{{[0-9]+}}, 31, !nosanitize // @@ -37,7 +37,7 @@ return c << shamt; } -// CHECK-LABEL: define i32 @f6 +// CHECK-LABEL: define frozen i32 @f6 int f6(int c, int shamt) { // CHECK: icmp ule i32 %[[WIDTH:.*]], 31, !nosanitize // diff --git a/clang/test/CodeGen/unique-internal-linkage-names.cpp b/clang/test/CodeGen/unique-internal-linkage-names.cpp --- a/clang/test/CodeGen/unique-internal-linkage-names.cpp +++ b/clang/test/CodeGen/unique-internal-linkage-names.cpp @@ -46,16 +46,16 @@ // PLAIN: @_ZL4glob = internal global // PLAIN: @_ZZ8retAnonMvE5fGlob = internal global // PLAIN: @_ZN12_GLOBAL__N_16anon_mE = internal global -// PLAIN: define internal i32 @_ZL3foov() -// PLAIN: define internal i32 @_ZN12_GLOBAL__N_14getMEv +// PLAIN: define internal frozen i32 @_ZL3foov() +// PLAIN: define internal frozen i32 @_ZN12_GLOBAL__N_14getMEv // PLAIN: define weak_odr i32 ()* @_ZL4mverv.resolver() -// PLAIN: define internal i32 @_ZL4mverv() -// PLAIN: define internal i32 @_ZL4mverv.sse4.2() +// PLAIN: define internal frozen i32 @_ZL4mverv() +// PLAIN: define internal frozen i32 @_ZL4mverv.sse4.2() // UNIQUE: @_ZL4glob.{{[0-9a-f]+}} = internal global // UNIQUE: @_ZZ8retAnonMvE5fGlob.{{[0-9a-f]+}} = internal global // UNIQUE: @_ZN12_GLOBAL__N_16anon_mE.{{[0-9a-f]+}} = internal global -// UNIQUE: define internal i32 @_ZL3foov.{{[0-9a-f]+}}() -// UNIQUE: define internal i32 @_ZN12_GLOBAL__N_14getMEv.{{[0-9a-f]+}} +// UNIQUE: define internal frozen i32 @_ZL3foov.{{[0-9a-f]+}}() +// UNIQUE: define internal frozen i32 @_ZN12_GLOBAL__N_14getMEv.{{[0-9a-f]+}} // UNIQUE: define weak_odr i32 ()* @_ZL4mverv.resolver() -// UNIQUE: define internal i32 @_ZL4mverv.{{[0-9a-f]+}}() -// UNIQUE: define internal i32 @_ZL4mverv.sse4.2.{{[0-9a-f]+}} +// UNIQUE: define internal frozen i32 @_ZL4mverv.{{[0-9a-f]+}}() +// UNIQUE: define internal frozen i32 @_ZL4mverv.sse4.2.{{[0-9a-f]+}} diff --git a/clang/test/CodeGen/unwind-attr.c b/clang/test/CodeGen/unwind-attr.c --- a/clang/test/CodeGen/unwind-attr.c +++ b/clang/test/CodeGen/unwind-attr.c @@ -3,22 +3,22 @@ int opaque(); -// CHECK: define [[INT:i.*]] @test0() [[TF:#[0-9]+]] { -// CHECK-NOEXC: define [[INT:i.*]] @test0() [[NUW:#[0-9]+]] { +// CHECK: define frozen [[INT:i.*]] @test0() [[TF:#[0-9]+]] { +// CHECK-NOEXC: define frozen [[INT:i.*]] @test0() [[NUW:#[0-9]+]] { int test0(void) { return opaque(); } // : locally infer nounwind at -O0 -// CHECK: define [[INT:i.*]] @test1() [[NUW:#[0-9]+]] { -// CHECK-NOEXC: define [[INT:i.*]] @test1() [[NUW]] { +// CHECK: define frozen [[INT:i.*]] @test1() [[NUW:#[0-9]+]] { +// CHECK-NOEXC: define frozen [[INT:i.*]] @test1() [[NUW]] { int test1(void) { return 0; } // : not for weak functions -// CHECK: define weak [[INT:i.*]] @test2() [[TF]] { -// CHECK-NOEXC: define weak [[INT:i.*]] @test2() [[NUW]] { +// CHECK: define weak frozen [[INT:i.*]] @test2() [[TF]] { +// CHECK-NOEXC: define weak frozen [[INT:i.*]] @test2() [[NUW]] { __attribute__((weak)) int test2(void) { return 0; } diff --git a/clang/test/CodeGen/variadic-null-win64.c b/clang/test/CodeGen/variadic-null-win64.c --- a/clang/test/CodeGen/variadic-null-win64.c +++ b/clang/test/CodeGen/variadic-null-win64.c @@ -15,9 +15,9 @@ v(f, 1, 2, 3, NULL); kr(f, 1, 2, 3, 0); } -// WINDOWS: define dso_local void @f(i8* %f) -// WINDOWS: call void (i8*, ...) @v(i8* {{.*}}, i32 1, i32 2, i32 3, i64 0) -// WINDOWS: call void bitcast (void (...)* @kr to void (i8*, i32, i32, i32, i32)*)(i8* {{.*}}, i32 1, i32 2, i32 3, i32 0) -// LINUX: define void @f(i8* %f) -// LINUX: call void (i8*, ...) @v(i8* {{.*}}, i32 1, i32 2, i32 3, i32 0) -// LINUX: call void (i8*, i32, i32, i32, i32, ...) bitcast (void (...)* @kr to void (i8*, i32, i32, i32, i32, ...)*)(i8* {{.*}}, i32 1, i32 2, i32 3, i32 0) +// WINDOWS: define dso_local void @f(i8* frozen %f) +// WINDOWS: call void (i8*, ...) @v(i8* {{.*}}, i32 frozen 1, i32 frozen 2, i32 frozen 3, i64 frozen 0) +// WINDOWS: call void bitcast (void (...)* @kr to void (i8*, i32, i32, i32, i32)*)(i8* {{.*}}, i32 frozen 1, i32 frozen 2, i32 frozen 3, i32 frozen 0) +// LINUX: define void @f(i8* frozen %f) +// LINUX: call void (i8*, ...) @v(i8* {{.*}}, i32 frozen 1, i32 frozen 2, i32 frozen 3, i32 frozen 0) +// LINUX: call void (i8*, i32, i32, i32, i32, ...) bitcast (void (...)* @kr to void (i8*, i32, i32, i32, i32, ...)*)(i8* {{.*}}, i32 frozen 1, i32 frozen 2, i32 frozen 3, i32 frozen 0) diff --git a/clang/test/CodeGen/vector.c b/clang/test/CodeGen/vector.c --- a/clang/test/CodeGen/vector.c +++ b/clang/test/CodeGen/vector.c @@ -69,7 +69,7 @@ return y; } -// CHECK: define i32 @lax_vector_compare1(i32 {{.*}}, i32 {{.*}}) +// CHECK: define frozen i32 @lax_vector_compare1(i32 {{.*}}, i32 {{.*}}) // CHECK: icmp eq i32 typedef int vec_int2 __attribute__((vector_size(8))); diff --git a/clang/test/CodeGen/vectorcall.c b/clang/test/CodeGen/vectorcall.c --- a/clang/test/CodeGen/vectorcall.c +++ b/clang/test/CodeGen/vectorcall.c @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -emit-llvm %s -o - -ffreestanding -triple=i386-pc-win32 | FileCheck %s --check-prefix=X32 -// RUN: %clang_cc1 -emit-llvm %s -o - -ffreestanding -triple=x86_64-pc-win32 | FileCheck %s --check-prefix=X64 +// RUN: %clang_cc1 -disable-frozen-args -emit-llvm %s -o - -ffreestanding -triple=i386-pc-win32 | FileCheck %s --check-prefix=X32 +// RUN: %clang_cc1 -disable-frozen-args -emit-llvm %s -o - -ffreestanding -triple=x86_64-pc-win32 | FileCheck %s --check-prefix=X64 void __vectorcall v1(int a, int b) {} // X32: define dso_local x86_vectorcallcc void @"\01v1@@8"(i32 inreg %a, i32 inreg %b) @@ -60,26 +60,26 @@ struct HVA5 { v4f32 w, x, y, z, p; }; v4f32 __vectorcall hva1(int a, struct HVA4 b, int c) {return b.w;} -// X32: define dso_local x86_vectorcallcc <4 x float> @"\01hva1@@72"(i32 inreg %a, %struct.HVA4 inreg %b.coerce, i32 inreg %c) -// X64: define dso_local x86_vectorcallcc <4 x float> @"\01hva1@@80"(i32 %a, %struct.HVA4 inreg %b.coerce, i32 %c) +// X32: define dso_local x86_vectorcallcc frozen <4 x float> @"\01hva1@@72"(i32 inreg %a, %struct.HVA4 inreg %b.coerce, i32 inreg %c) +// X64: define dso_local x86_vectorcallcc frozen <4 x float> @"\01hva1@@80"(i32 %a, %struct.HVA4 inreg %b.coerce, i32 %c) v4f32 __vectorcall hva2(struct HVA4 a, struct HVA4 b, v4f32 c) {return c;} -// X32: define dso_local x86_vectorcallcc <4 x float> @"\01hva2@@144"(%struct.HVA4 inreg %a.coerce, %struct.HVA4* inreg %b, <4 x float> inreg %c) -// X64: define dso_local x86_vectorcallcc <4 x float> @"\01hva2@@144"(%struct.HVA4 inreg %a.coerce, %struct.HVA4* %b, <4 x float> %c) +// X32: define dso_local x86_vectorcallcc frozen <4 x float> @"\01hva2@@144"(%struct.HVA4 inreg %a.coerce, %struct.HVA4* inreg %b, <4 x float> inreg %c) +// X64: define dso_local x86_vectorcallcc frozen <4 x float> @"\01hva2@@144"(%struct.HVA4 inreg %a.coerce, %struct.HVA4* %b, <4 x float> %c) v4f32 __vectorcall hva3(v4f32 a, v4f32 b, v4f32 c, v4f32 d, v4f32 e, struct HVA2 f) {return f.x;} -// X32: define dso_local x86_vectorcallcc <4 x float> @"\01hva3@@112"(<4 x float> inreg %a, <4 x float> inreg %b, <4 x float> inreg %c, <4 x float> inreg %d, <4 x float> inreg %e, %struct.HVA2* inreg %f) -// X64: define dso_local x86_vectorcallcc <4 x float> @"\01hva3@@112"(<4 x float> %a, <4 x float> %b, <4 x float> %c, <4 x float> %d, <4 x float> %e, %struct.HVA2* %f) +// X32: define dso_local x86_vectorcallcc frozen <4 x float> @"\01hva3@@112"(<4 x float> inreg %a, <4 x float> inreg %b, <4 x float> inreg %c, <4 x float> inreg %d, <4 x float> inreg %e, %struct.HVA2* inreg %f) +// X64: define dso_local x86_vectorcallcc frozen <4 x float> @"\01hva3@@112"(<4 x float> %a, <4 x float> %b, <4 x float> %c, <4 x float> %d, <4 x float> %e, %struct.HVA2* %f) // vector types have higher priority then HVA structures, So vector types are allocated first // and HVAs are allocated if enough registers are available v4f32 __vectorcall hva4(struct HVA4 a, struct HVA2 b, v4f32 c) {return b.y;} -// X32: define dso_local x86_vectorcallcc <4 x float> @"\01hva4@@112"(%struct.HVA4 inreg %a.coerce, %struct.HVA2* inreg %b, <4 x float> inreg %c) -// X64: define dso_local x86_vectorcallcc <4 x float> @"\01hva4@@112"(%struct.HVA4 inreg %a.coerce, %struct.HVA2* %b, <4 x float> %c) +// X32: define dso_local x86_vectorcallcc frozen <4 x float> @"\01hva4@@112"(%struct.HVA4 inreg %a.coerce, %struct.HVA2* inreg %b, <4 x float> inreg %c) +// X64: define dso_local x86_vectorcallcc frozen <4 x float> @"\01hva4@@112"(%struct.HVA4 inreg %a.coerce, %struct.HVA2* %b, <4 x float> %c) v4f32 __vectorcall hva5(struct HVA3 a, struct HVA3 b, v4f32 c, struct HVA2 d) {return d.y;} -// X32: define dso_local x86_vectorcallcc <4 x float> @"\01hva5@@144"(%struct.HVA3 inreg %a.coerce, %struct.HVA3* inreg %b, <4 x float> inreg %c, %struct.HVA2 inreg %d.coerce) -// X64: define dso_local x86_vectorcallcc <4 x float> @"\01hva5@@144"(%struct.HVA3 inreg %a.coerce, %struct.HVA3* %b, <4 x float> %c, %struct.HVA2 inreg %d.coerce) +// X32: define dso_local x86_vectorcallcc frozen <4 x float> @"\01hva5@@144"(%struct.HVA3 inreg %a.coerce, %struct.HVA3* inreg %b, <4 x float> inreg %c, %struct.HVA2 inreg %d.coerce) +// X64: define dso_local x86_vectorcallcc frozen <4 x float> @"\01hva5@@144"(%struct.HVA3 inreg %a.coerce, %struct.HVA3* %b, <4 x float> %c, %struct.HVA2 inreg %d.coerce) struct HVA4 __vectorcall hva6(struct HVA4 a, struct HVA4 b) { return b;} // X32: define dso_local x86_vectorcallcc %struct.HVA4 @"\01hva6@@128"(%struct.HVA4 inreg %a.coerce, %struct.HVA4* inreg %b) @@ -90,8 +90,8 @@ // X64: define dso_local x86_vectorcallcc void @"\01hva7@@0"(%struct.HVA5* noalias sret align 16 %agg.result) v4f32 __vectorcall hva8(v4f32 a, v4f32 b, v4f32 c, v4f32 d, int e, v4f32 f) {return f;} -// X32: define dso_local x86_vectorcallcc <4 x float> @"\01hva8@@84"(<4 x float> inreg %a, <4 x float> inreg %b, <4 x float> inreg %c, <4 x float> inreg %d, i32 inreg %e, <4 x float> inreg %f) -// X64: define dso_local x86_vectorcallcc <4 x float> @"\01hva8@@88"(<4 x float> %a, <4 x float> %b, <4 x float> %c, <4 x float> %d, i32 %e, <4 x float> %f) +// X32: define dso_local x86_vectorcallcc frozen <4 x float> @"\01hva8@@84"(<4 x float> inreg %a, <4 x float> inreg %b, <4 x float> inreg %c, <4 x float> inreg %d, i32 inreg %e, <4 x float> inreg %f) +// X64: define dso_local x86_vectorcallcc frozen <4 x float> @"\01hva8@@88"(<4 x float> %a, <4 x float> %b, <4 x float> %c, <4 x float> %d, i32 %e, <4 x float> %f) typedef float __attribute__((ext_vector_type(3))) v3f32; struct OddSizeHVA { v3f32 x, y; }; diff --git a/clang/test/CodeGen/visibility.c b/clang/test/CodeGen/visibility.c --- a/clang/test/CodeGen/visibility.c +++ b/clang/test/CodeGen/visibility.c @@ -23,13 +23,13 @@ // CHECK-PROTECTED: @test4 = hidden global i32 10 // CHECK-HIDDEN: @test4 = hidden global i32 10 -// CHECK-DEFAULT-LABEL: define i32 @f_def() +// CHECK-DEFAULT-LABEL: define frozen i32 @f_def() // CHECK-DEFAULT: declare void @f_ext() // CHECK-DEFAULT-LABEL: define internal void @f_deferred() -// CHECK-PROTECTED-LABEL: define protected i32 @f_def() +// CHECK-PROTECTED-LABEL: define protected frozen i32 @f_def() // CHECK-PROTECTED: declare void @f_ext() // CHECK-PROTECTED-LABEL: define internal void @f_deferred() -// CHECK-HIDDEN-LABEL: define hidden i32 @f_def() +// CHECK-HIDDEN-LABEL: define hidden frozen i32 @f_def() // CHECK-HIDDEN: declare void @f_ext() // CHECK-HIDDEN-LABEL: define internal void @f_deferred() diff --git a/clang/test/CodeGen/vla-4.c b/clang/test/CodeGen/vla-4.c --- a/clang/test/CodeGen/vla-4.c +++ b/clang/test/CodeGen/vla-4.c @@ -6,19 +6,19 @@ void t1() { _Atomic(typeof((int (*)[f()]) h())) v; // CHECK: [[N:%.*]] = alloca i32*, align 4 - // CHECK-NEXT: [[P:%.*]] = call i32 bitcast (i32 (...)* @f to i32 ()*)() - // CHECK-NEXT: [[P:%.*]] = call i32 bitcast (i32 (...)* @h to i32 ()*)() + // CHECK-NEXT: [[P:%.*]] = call frozen i32 bitcast (i32 (...)* @f to i32 ()*)() + // CHECK-NEXT: [[P:%.*]] = call frozen i32 bitcast (i32 (...)* @h to i32 ()*)() } void t2() { typeof(typeof((int (*)[f()]) h())) v; // CHECK: [[N:%.*]] = alloca i32*, align 4 - // CHECK-NEXT: [[P:%.*]] = call i32 bitcast (i32 (...)* @f to i32 ()*)() - // CHECK-NEXT: [[P:%.*]] = call i32 bitcast (i32 (...)* @h to i32 ()*)() + // CHECK-NEXT: [[P:%.*]] = call frozen i32 bitcast (i32 (...)* @f to i32 ()*)() + // CHECK-NEXT: [[P:%.*]] = call frozen i32 bitcast (i32 (...)* @h to i32 ()*)() } void t3(typeof((int (*)[f()]) h()) v) { // CHECK: store i32* %v, i32** %{{[.0-9A-Za-z]+}}, align 4 - // CHECK-NEXT: [[P:%.*]] = call i32 bitcast (i32 (...)* @f to i32 ()*)() - // CHECK-NEXT: [[P:%.*]] = call i32 bitcast (i32 (...)* @h to i32 ()*)() + // CHECK-NEXT: [[P:%.*]] = call frozen i32 bitcast (i32 (...)* @f to i32 ()*)() + // CHECK-NEXT: [[P:%.*]] = call frozen i32 bitcast (i32 (...)* @h to i32 ()*)() } diff --git a/clang/test/CodeGen/vla.c b/clang/test/CodeGen/vla.c --- a/clang/test/CodeGen/vla.c +++ b/clang/test/CodeGen/vla.c @@ -57,20 +57,20 @@ void test() { int bork[4][13]; - // CHECK: call void @function(i16 signext 1, i32* null) + // CHECK: call void @function(i16 frozen signext 1, i32* frozen null) function(1, 0); - // CHECK: call void @function(i16 signext 1, i32* inttoptr + // CHECK: call void @function(i16 frozen signext 1, i32* frozen inttoptr function(1, 0xbadbeef); // expected-warning {{incompatible integer to pointer conversion passing}} - // CHECK: call void @function(i16 signext 1, i32* {{.*}}) + // CHECK: call void @function(i16 frozen signext 1, i32* {{.*}}) function(1, bork); } void function1(short width, int data[][width][width]) {} void test1() { int bork[4][13][15]; - // CHECK: call void @function1(i16 signext 1, i32* {{.*}}) + // CHECK: call void @function1(i16 frozen signext 1, i32* {{.*}}) function1(1, bork); - // CHECK: call void @function(i16 signext 1, i32* {{.*}}) + // CHECK: call void @function(i16 frozen signext 1, i32* {{.*}}) function(1, bork[2]); } @@ -87,7 +87,7 @@ } // http://llvm.org/PR8567 -// CHECK-LABEL: define double @test_PR8567 +// CHECK-LABEL: define frozen double @test_PR8567 double test_PR8567(int n, double (*p)[n][5]) { // CHECK: [[NV:%.*]] = alloca i32, align 4 // CHECK-NEXT: [[PV:%.*]] = alloca [5 x double]*, align 4 @@ -105,7 +105,7 @@ } int test4(unsigned n, char (*p)[n][n+1][6]) { - // CHECK-LABEL: define i32 @test4( + // CHECK-LABEL: define frozen i32 @test4( // CHECK: [[N:%.*]] = alloca i32, align 4 // CHECK-NEXT: [[P:%.*]] = alloca [6 x i8]*, align 4 // CHECK-NEXT: [[P2:%.*]] = alloca [6 x i8]*, align 4 @@ -194,15 +194,15 @@ // Follow gcc's behavior for VLAs in parameter lists. PR9559. void test7(int a[b(0)]) { // CHECK-LABEL: define void @test7( - // CHECK: call i32 @b(i8* null) + // CHECK: call frozen i32 @b(i8* frozen null) } // Make sure we emit dereferenceable or nonnull when the static keyword is // provided. void test8(int a[static 3]) { } -// CHECK: define void @test8(i32* dereferenceable(12) %a) +// CHECK: define void @test8(i32* frozen dereferenceable(12) %a) void test9(int n, int a[static n]) { } -// NULL-INVALID: define void @test9(i32 %n, i32* nonnull %a) -// NULL-VALID: define void @test9(i32 %n, i32* %a) +// NULL-INVALID: define void @test9(i32 frozen %n, i32* frozen nonnull %a) +// NULL-VALID: define void @test9(i32 frozen %n, i32* frozen %a) diff --git a/clang/test/CodeGen/wasm-arguments.c b/clang/test/CodeGen/wasm-arguments.c --- a/clang/test/CodeGen/wasm-arguments.c +++ b/clang/test/CodeGen/wasm-arguments.c @@ -7,8 +7,8 @@ // Basic argument/attribute and return tests for WebAssembly -// WEBASSEMBLY32: define void @misc_args(i32 %i, i32 %j, i64 %k, double %l, fp128 %m) -// WEBASSEMBLY64: define void @misc_args(i32 %i, i64 %j, i64 %k, double %l, fp128 %m) +// WEBASSEMBLY32: define void @misc_args(i32 frozen %i, i32 frozen %j, i64 frozen %k, double frozen %l, fp128 frozen %m) +// WEBASSEMBLY64: define void @misc_args(i32 frozen %i, i64 frozen %j, i64 frozen %k, double frozen %l, fp128 frozen %m) void misc_args(int i, long j, long long k, double l, long double m) {} typedef struct { @@ -17,8 +17,8 @@ } s1; // Structs should be passed byval and not split up. -// WEBASSEMBLY32: define void @struct_arg(%struct.s1* byval(%struct.s1) align 4 %i) -// WEBASSEMBLY64: define void @struct_arg(%struct.s1* byval(%struct.s1) align 4 %i) +// WEBASSEMBLY32: define void @struct_arg(%struct.s1* frozen byval(%struct.s1) align 4 %i) +// WEBASSEMBLY64: define void @struct_arg(%struct.s1* frozen byval(%struct.s1) align 4 %i) // Except in the experimental multivalue ABI, where structs are passed in args // EXPERIMENTAL-MV: define void @struct_arg(i32 %i.0, i32 %i.1) @@ -58,17 +58,17 @@ return foo; } -// WEBASSEMBLY32: define void @long_long_arg(i64 %i) -// WEBASSEMBLY64: define void @long_long_arg(i64 %i) +// WEBASSEMBLY32: define void @long_long_arg(i64 frozen %i) +// WEBASSEMBLY64: define void @long_long_arg(i64 frozen %i) void long_long_arg(long long i) {} // i8/i16 should be signext, i32 and higher should not. -// WEBASSEMBLY32: define void @char_short_arg(i8 signext %a, i16 signext %b) -// WEBASSEMBLY64: define void @char_short_arg(i8 signext %a, i16 signext %b) +// WEBASSEMBLY32: define void @char_short_arg(i8 frozen signext %a, i16 frozen signext %b) +// WEBASSEMBLY64: define void @char_short_arg(i8 frozen signext %a, i16 frozen signext %b) void char_short_arg(char a, short b) {} -// WEBASSEMBLY32: define void @uchar_ushort_arg(i8 zeroext %a, i16 zeroext %b) -// WEBASSEMBLY64: define void @uchar_ushort_arg(i8 zeroext %a, i16 zeroext %b) +// WEBASSEMBLY32: define void @uchar_ushort_arg(i8 frozen zeroext %a, i16 frozen zeroext %b) +// WEBASSEMBLY64: define void @uchar_ushort_arg(i8 frozen zeroext %a, i16 frozen zeroext %b) void uchar_ushort_arg(unsigned char a, unsigned short b) {} enum my_enum { @@ -78,8 +78,8 @@ }; // Enums should be treated as the underlying i32. -// WEBASSEMBLY32: define void @enum_arg(i32 %a) -// WEBASSEMBLY64: define void @enum_arg(i32 %a) +// WEBASSEMBLY32: define void @enum_arg(i32 frozen %a) +// WEBASSEMBLY64: define void @enum_arg(i32 frozen %a) void enum_arg(enum my_enum a) {} enum my_big_enum { @@ -87,8 +87,8 @@ }; // Big enums should be treated as the underlying i64. -// WEBASSEMBLY32: define void @big_enum_arg(i64 %a) -// WEBASSEMBLY64: define void @big_enum_arg(i64 %a) +// WEBASSEMBLY32: define void @big_enum_arg(i64 frozen %a) +// WEBASSEMBLY64: define void @big_enum_arg(i64 frozen %a) void big_enum_arg(enum my_big_enum a) {} union simple_union { @@ -97,8 +97,8 @@ }; // Unions should be passed as byval structs. -// WEBASSEMBLY32: define void @union_arg(%union.simple_union* byval(%union.simple_union) align 4 %s) -// WEBASSEMBLY64: define void @union_arg(%union.simple_union* byval(%union.simple_union) align 4 %s) +// WEBASSEMBLY32: define void @union_arg(%union.simple_union* frozen byval(%union.simple_union) align 4 %s) +// WEBASSEMBLY64: define void @union_arg(%union.simple_union* frozen byval(%union.simple_union) align 4 %s) // EXPERIMENTAL-MV: define void @union_arg(i32 %s.0) void union_arg(union simple_union s) {} @@ -123,9 +123,9 @@ } bitfield1; // Bitfields should be passed as byval structs. -// WEBASSEMBLY32: define void @bitfield_arg(%struct.bitfield1* byval(%struct.bitfield1) align 4 %bf1) -// WEBASSEMBLY64: define void @bitfield_arg(%struct.bitfield1* byval(%struct.bitfield1) align 4 %bf1) -// EXPERIMENTAL-MV: define void @bitfield_arg(%struct.bitfield1* byval(%struct.bitfield1) align 4 %bf1) +// WEBASSEMBLY32: define void @bitfield_arg(%struct.bitfield1* frozen byval(%struct.bitfield1) align 4 %bf1) +// WEBASSEMBLY64: define void @bitfield_arg(%struct.bitfield1* frozen byval(%struct.bitfield1) align 4 %bf1) +// EXPERIMENTAL-MV: define void @bitfield_arg(%struct.bitfield1* frozen byval(%struct.bitfield1) align 4 %bf1) void bitfield_arg(bitfield1 bf1) {} // And returned via sret pointers. diff --git a/clang/test/CodeGen/wasm-call-main.c b/clang/test/CodeGen/wasm-call-main.c --- a/clang/test/CodeGen/wasm-call-main.c +++ b/clang/test/CodeGen/wasm-call-main.c @@ -10,4 +10,4 @@ return main(0, NULL); } -// CHECK: call i32 @__main_argc_argv( +// CHECK: call frozen i32 @__main_argc_argv( diff --git a/clang/test/CodeGen/wasm-export-name.c b/clang/test/CodeGen/wasm-export-name.c --- a/clang/test/CodeGen/wasm-export-name.c +++ b/clang/test/CodeGen/wasm-export-name.c @@ -8,6 +8,6 @@ // CHECK: @llvm.used = appending global [1 x i8*] [i8* bitcast (i32 ()* @foo to i8*)] -// CHECK: define i32 @foo() [[A:#[0-9]+]] +// CHECK: define frozen i32 @foo() [[A:#[0-9]+]] // CHECK: attributes [[A]] = {{{.*}} "wasm-export-name"="bar" {{.*}}} diff --git a/clang/test/CodeGen/wasm-main.c b/clang/test/CodeGen/wasm-main.c --- a/clang/test/CodeGen/wasm-main.c +++ b/clang/test/CodeGen/wasm-main.c @@ -6,4 +6,4 @@ return 0; } -// CHECK-LABEL: define i32 @main() +// CHECK-LABEL: define frozen i32 @main() diff --git a/clang/test/CodeGen/wasm-main_argc_argv.c b/clang/test/CodeGen/wasm-main_argc_argv.c --- a/clang/test/CodeGen/wasm-main_argc_argv.c +++ b/clang/test/CodeGen/wasm-main_argc_argv.c @@ -6,4 +6,4 @@ return 0; } -// CHECK-LABEL: define i32 @__main_argc_argv(i32 %argc, i8** %argv) +// CHECK-LABEL: define frozen i32 @__main_argc_argv(i32 frozen %argc, i8** frozen %argv) diff --git a/clang/test/CodeGen/wasm-varargs.c b/clang/test/CodeGen/wasm-varargs.c --- a/clang/test/CodeGen/wasm-varargs.c +++ b/clang/test/CodeGen/wasm-varargs.c @@ -12,7 +12,7 @@ return v; } -// CHECK-LABEL: define i32 @test_i32(i8*{{.*}} %fmt, ...) {{.*}} { +// CHECK-LABEL: define frozen i32 @test_i32(i8*{{.*}} %fmt, ...) {{.*}} { // CHECK: [[FMT_ADDR:%[^,=]+]] = alloca i8*, align 4 // CHECK: [[VA:%[^,=]+]] = alloca i8*, align 4 // CHECK: [[V:%[^,=]+]] = alloca i32, align 4 @@ -41,7 +41,7 @@ return v; } -// CHECK-LABEL: define i64 @test_i64(i8*{{.*}} %fmt, ...) {{.*}} { +// CHECK-LABEL: define frozen i64 @test_i64(i8*{{.*}} %fmt, ...) {{.*}} { // CHECK: [[FMT_ADDR:%[^,=]+]] = alloca i8*, align 4 // CHECK: [[VA:%[^,=]+]] = alloca i8*, align 4 // CHECK: [[V:%[^,=]+]] = alloca i64, align 8 diff --git a/clang/test/CodeGen/win64-i128.c b/clang/test/CodeGen/win64-i128.c --- a/clang/test/CodeGen/win64-i128.c +++ b/clang/test/CodeGen/win64-i128.c @@ -7,10 +7,10 @@ int128_t foo() { return 0; } -// GNU64: define dso_local <2 x i64> @foo() -// MSC64: define dso_local <2 x i64> @foo() +// GNU64: define dso_local frozen <2 x i64> @foo() +// MSC64: define dso_local frozen <2 x i64> @foo() int128_t bar(int128_t a, int128_t b) { return a * b; } -// GNU64: define dso_local <2 x i64> @bar(i128* %0, i128* %1) -// MSC64: define dso_local <2 x i64> @bar(i128* %0, i128* %1) +// GNU64: define dso_local frozen <2 x i64> @bar(i128* frozen %0, i128* frozen %1) +// MSC64: define dso_local frozen <2 x i64> @bar(i128* frozen %0, i128* frozen %1) diff --git a/clang/test/CodeGen/windows-itanium.c b/clang/test/CodeGen/windows-itanium.c --- a/clang/test/CodeGen/windows-itanium.c +++ b/clang/test/CodeGen/windows-itanium.c @@ -8,8 +8,8 @@ return 32; } -// CHECK-C: define dso_local i32 @function() {{.*}} { -// CHECK-CXX: define dso_local i32 @_Z8functionv() {{.*}} { +// CHECK-C: define dso_local frozen i32 @function() {{.*}} { +// CHECK-CXX: define dso_local frozen i32 @_Z8functionv() {{.*}} { // CHECK: ret i32 32 // CHECK: } diff --git a/clang/test/CodeGen/windows-on-arm-dllimport-dllexport.c b/clang/test/CodeGen/windows-on-arm-dllimport-dllexport.c --- a/clang/test/CodeGen/windows-on-arm-dllimport-dllexport.c +++ b/clang/test/CodeGen/windows-on-arm-dllimport-dllexport.c @@ -21,5 +21,5 @@ // CHECK: define dso_local dllexport arm_aapcs_vfpcc void @export_implemented_function() -// CHECK: declare dllimport arm_aapcs_vfpcc void @import_function(i32) +// CHECK: declare dllimport arm_aapcs_vfpcc void @import_function(i32 frozen) diff --git a/clang/test/CodeGen/windows-seh-abnormal-exits.c b/clang/test/CodeGen/windows-seh-abnormal-exits.c --- a/clang/test/CodeGen/windows-seh-abnormal-exits.c +++ b/clang/test/CodeGen/windows-seh-abnormal-exits.c @@ -4,7 +4,7 @@ // CHECK-NEXT: %cleanup.dest = load i32, i32* %cleanup.dest.slot, align 4 // CHECK-NEXT: %[[src2:[0-9-]+]] = icmp ne i32 %cleanup.dest, 0 // CHECK-NEXT: %[[src3:[0-9-]+]] = zext i1 %[[src2]] to i8 -// CHECK-NEXT: call void @"?fin$0@0@seh_abnormal_exits@@"(i8 %[[src3]], i8* %[[src]]) +// CHECK-NEXT: call void @"?fin$0@0@seh_abnormal_exits@@"(i8 frozen %[[src3]], i8* frozen %[[src]]) void seh_abnormal_exits(int *Counter) { for (int i = 0; i < 5; i++) { diff --git a/clang/test/CodeGen/windows-swiftcall.c b/clang/test/CodeGen/windows-swiftcall.c --- a/clang/test/CodeGen/windows-swiftcall.c +++ b/clang/test/CodeGen/windows-swiftcall.c @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -triple x86_64-unknown-windows -emit-llvm -target-cpu core2 -o - %s | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args -triple x86_64-unknown-windows -emit-llvm -target-cpu core2 -o - %s | FileCheck %s #define SWIFTCALL __attribute__((swiftcall)) #define OUT __attribute__((swift_indirect_result)) @@ -389,7 +389,7 @@ // CHECK-LABEL: define dso_local void @test_int8() // CHECK: [[TMP1:%.*]] = alloca [[REC]], align // CHECK: [[TMP2:%.*]] = alloca [[REC]], align -// CHECK: [[CALL:%.*]] = call [[SWIFTCC]] [[UAGG]] @return_int8() +// CHECK: [[CALL:%.*]] = call [[SWIFTCC]] frozen [[UAGG]] @return_int8() // CHECK: [[CAST_TMP:%.*]] = bitcast [[REC]]* [[TMP1]] to [[AGG]]* // CHECK: [[T0:%.*]] = getelementptr inbounds [[AGG]], [[AGG]]* [[CAST_TMP]], i32 0, i32 0 // CHECK: [[T1:%.*]] = extractvalue [[UAGG]] [[CALL]], 0 @@ -433,7 +433,7 @@ // CHECK-LABEL: define dso_local void @test_int5() // CHECK: [[TMP1:%.*]] = alloca [[REC]], align // CHECK: [[TMP2:%.*]] = alloca [[REC]], align -// CHECK: [[CALL:%.*]] = call [[SWIFTCC]] [[UAGG]] @return_int5() +// CHECK: [[CALL:%.*]] = call [[SWIFTCC]] frozen [[UAGG]] @return_int5() // CHECK: [[CAST_TMP:%.*]] = bitcast [[REC]]* [[TMP1]] to [[AGG]]* // CHECK: [[T0:%.*]] = getelementptr inbounds [[AGG]], [[AGG]]* [[CAST_TMP]], i32 0, i32 0 // CHECK: [[T1:%.*]] = extractvalue [[UAGG]] [[CALL]], 0 diff --git a/clang/test/CodeGen/x86-atomic-long_double.c b/clang/test/CodeGen/x86-atomic-long_double.c --- a/clang/test/CodeGen/x86-atomic-long_double.c +++ b/clang/test/CodeGen/x86-atomic-long_double.c @@ -39,7 +39,7 @@ // CHECK32: [[ADDR:%.+]] = load x86_fp80*, x86_fp80** [[ADDR_ADDR]], align 4 // CHECK32: [[VOID_PTR:%.+]] = bitcast x86_fp80* [[ADDR]] to i8* // CHECK32: [[TEMP_LD_PTR:%.+]] = bitcast x86_fp80* [[TEMP_LD_ADDR:%.+]] to i8* - // CHECK32: call void @__atomic_load(i32 12, i8* [[VOID_PTR]], i8* [[TEMP_LD_PTR]], i32 5) + // CHECK32: call void @__atomic_load(i32 frozen 12, i8* frozen [[VOID_PTR]], i8* frozen [[TEMP_LD_PTR]], i32 frozen 5) // CHECK32: [[LD_VALUE:%.+]] = load x86_fp80, x86_fp80* [[TEMP_LD_ADDR]], align 4 // CHECK32: br label %[[ATOMIC_OP:.+]] // CHECK32: [[ATOMIC_OP]] @@ -54,7 +54,7 @@ // CHECK32: [[OBJ:%.+]] = bitcast x86_fp80* [[ADDR]] to i8* // CHECK32: [[EXPECTED:%.+]] = bitcast x86_fp80* [[OLD_VALUE_ADDR]] to i8* // CHECK32: [[DESIRED:%.+]] = bitcast x86_fp80* [[DESIRED_VALUE_ADDR]] to i8* - // CHECK32: [[FAIL_SUCCESS:%.+]] = call zeroext i1 @__atomic_compare_exchange(i32 12, i8* [[OBJ]], i8* [[EXPECTED]], i8* [[DESIRED]], i32 5, i32 5) + // CHECK32: [[FAIL_SUCCESS:%.+]] = call frozen zeroext i1 @__atomic_compare_exchange(i32 frozen 12, i8* frozen [[OBJ]], i8* frozen [[EXPECTED]], i8* frozen [[DESIRED]], i32 frozen 5, i32 frozen 5) // CHECK32: [[LD_VALUE:%.+]] = load x86_fp80, x86_fp80* [[OLD_VALUE_ADDR]], align 4 // CHECK32: br i1 [[FAIL_SUCCESS]], label %[[ATOMIC_CONT:.+]], label %[[ATOMIC_OP]] // CHECK32: [[ATOMIC_CONT]] @@ -101,7 +101,7 @@ // CHECK32: [[ADDR:%.+]] = load x86_fp80*, x86_fp80** [[ADDR_ADDR]], align 4 // CHECK32: [[VOID_PTR:%.+]] = bitcast x86_fp80* [[ADDR]] to i8* // CHECK32: [[TEMP_LD_PTR:%.+]] = bitcast x86_fp80* [[TEMP_LD_ADDR:%.+]] to i8* - // CHECK32: call void @__atomic_load(i32 12, i8* [[VOID_PTR]], i8* [[TEMP_LD_PTR]], i32 5) + // CHECK32: call void @__atomic_load(i32 frozen 12, i8* frozen [[VOID_PTR]], i8* frozen [[TEMP_LD_PTR]], i32 frozen 5) // CHECK32: [[ORIG_LD_VALUE:%.+]] = load x86_fp80, x86_fp80* [[TEMP_LD_ADDR]], align 4 // CHECK32: br label %[[ATOMIC_OP:.+]] // CHECK32: [[ATOMIC_OP]] @@ -116,7 +116,7 @@ // CHECK32: [[OBJ:%.+]] = bitcast x86_fp80* [[ADDR]] to i8* // CHECK32: [[EXPECTED:%.+]] = bitcast x86_fp80* [[OLD_VALUE_ADDR]] to i8* // CHECK32: [[DESIRED:%.+]] = bitcast x86_fp80* [[DESIRED_VALUE_ADDR]] to i8* - // CHECK32: [[FAIL_SUCCESS:%.+]] = call zeroext i1 @__atomic_compare_exchange(i32 12, i8* [[OBJ]], i8* [[EXPECTED]], i8* [[DESIRED]], i32 5, i32 5) + // CHECK32: [[FAIL_SUCCESS:%.+]] = call frozen zeroext i1 @__atomic_compare_exchange(i32 frozen 12, i8* frozen [[OBJ]], i8* frozen [[EXPECTED]], i8* frozen [[DESIRED]], i32 frozen 5, i32 frozen 5) // CHECK32: [[LD_VALUE]] = load x86_fp80, x86_fp80* [[OLD_VALUE_ADDR]], align 4 // CHECK32: br i1 [[FAIL_SUCCESS]], label %[[ATOMIC_CONT:.+]], label %[[ATOMIC_OP]] // CHECK32: [[ATOMIC_CONT]] @@ -170,7 +170,7 @@ // CHECK32: [[ADDR:%.+]] = load x86_fp80*, x86_fp80** [[ADDR_ADDR]], align 4 // CHECK32: [[VOID_PTR:%.+]] = bitcast x86_fp80* [[ADDR]] to i8* // CHECK32: [[TEMP_LD_PTR:%.+]] = bitcast x86_fp80* [[TEMP_LD_ADDR:%.+]] to i8* - // CHECK32: call void @__atomic_load(i32 12, i8* [[VOID_PTR]], i8* [[TEMP_LD_PTR]], i32 5) + // CHECK32: call void @__atomic_load(i32 frozen 12, i8* frozen [[VOID_PTR]], i8* frozen [[TEMP_LD_PTR]], i32 frozen 5) // CHECK32: [[LD_VALUE:%.+]] = load x86_fp80, x86_fp80* [[TEMP_LD_ADDR]], align 4 // CHECK32: br label %[[ATOMIC_OP:.+]] // CHECK32: [[ATOMIC_OP]] @@ -185,14 +185,14 @@ // CHECK32: [[OBJ:%.+]] = bitcast x86_fp80* [[ADDR]] to i8* // CHECK32: [[EXPECTED:%.+]] = bitcast x86_fp80* [[OLD_VALUE_ADDR]] to i8* // CHECK32: [[DESIRED:%.+]] = bitcast x86_fp80* [[DESIRED_VALUE_ADDR]] to i8* - // CHECK32: [[FAIL_SUCCESS:%.+]] = call zeroext i1 @__atomic_compare_exchange(i32 12, i8* [[OBJ]], i8* [[EXPECTED]], i8* [[DESIRED]], i32 5, i32 5) + // CHECK32: [[FAIL_SUCCESS:%.+]] = call frozen zeroext i1 @__atomic_compare_exchange(i32 frozen 12, i8* frozen [[OBJ]], i8* frozen [[EXPECTED]], i8* frozen [[DESIRED]], i32 frozen 5, i32 frozen 5) // CHECK32: [[LD_VALUE]] = load x86_fp80, x86_fp80* [[OLD_VALUE_ADDR]], align 4 // CHECK32: br i1 [[FAIL_SUCCESS]], label %[[ATOMIC_CONT:.+]], label %[[ATOMIC_OP]] // CHECK32: [[ATOMIC_CONT]] // CHECK32: [[ADDR:%.+]] = load x86_fp80*, x86_fp80** %{{.+}}, align 4 // CHECK32: [[VOID_ADDR:%.+]] = bitcast x86_fp80* [[ADDR]] to i8* // CHECK32: [[VOID_GET_ADDR:%.+]] = bitcast x86_fp80* [[GET_ADDR:%.+]] to i8* - // CHECK32: call void @__atomic_load(i32 12, i8* [[VOID_ADDR]], i8* [[VOID_GET_ADDR]], i32 5) + // CHECK32: call void @__atomic_load(i32 frozen 12, i8* frozen [[VOID_ADDR]], i8* frozen [[VOID_GET_ADDR]], i32 frozen 5) // CHECK32: [[RET_VAL:%.+]] = load x86_fp80, x86_fp80* [[GET_ADDR]], align 4 // CHECK32: ret x86_fp80 [[RET_VAL]] return *addr; @@ -217,7 +217,7 @@ // CHECK32: store x86_fp80 {{.+}}, x86_fp80* [[STORE_TEMP_PTR]], align 4 // CHECK32: [[ADDR_VOID:%.+]] = bitcast x86_fp80* [[ADDR]] to i8* // CHECK32: [[STORE_TEMP_VOID_PTR:%.+]] = bitcast x86_fp80* [[STORE_TEMP_PTR]] to i8* - // CHECK32: call void @__atomic_store(i32 12, i8* [[ADDR_VOID]], i8* [[STORE_TEMP_VOID_PTR]], i32 5) + // CHECK32: call void @__atomic_store(i32 frozen 12, i8* frozen [[ADDR_VOID]], i8* frozen [[STORE_TEMP_VOID_PTR]], i32 frozen 5) *addr = 115; // CHECK: [[ADDR:%.+]] = load x86_fp80*, x86_fp80** %{{.+}}, align 8 // CHECK: [[ADDR_INT:%.+]] = bitcast x86_fp80* [[ADDR]] to i128* @@ -229,7 +229,7 @@ // CHECK32: [[ADDR:%.+]] = load x86_fp80*, x86_fp80** %{{.+}}, align 4 // CHECK32: [[VOID_ADDR:%.+]] = bitcast x86_fp80* [[ADDR]] to i8* // CHECK32: [[VOID_LD_TEMP:%.+]] = bitcast x86_fp80* [[LD_TEMP:%.+]] to i8* - // CHECK32: call void @__atomic_load(i32 12, i8* [[VOID_ADDR]], i8* [[VOID_LD_TEMP]], i32 5) + // CHECK32: call void @__atomic_load(i32 frozen 12, i8* frozen [[VOID_ADDR]], i8* frozen [[VOID_LD_TEMP]], i32 frozen 5) // CHECK32: [[RET_VAL:%.+]] = load x86_fp80, x86_fp80* [[LD_TEMP]], align 4 // CHECK32: ret x86_fp80 [[RET_VAL]] @@ -274,7 +274,7 @@ // CHECK32: [[ADDR:%.+]] = load x86_fp80*, x86_fp80** [[ADDR_ADDR]], align 4 // CHECK32: [[VOID_PTR:%.+]] = bitcast x86_fp80* [[ADDR]] to i8* // CHECK32: [[TEMP_LD_PTR:%.+]] = bitcast x86_fp80* [[TEMP_LD_ADDR:%.+]] to i8* - // CHECK32: call void @__atomic_load(i32 12, i8* [[VOID_PTR]], i8* [[TEMP_LD_PTR]], i32 5) + // CHECK32: call void @__atomic_load(i32 frozen 12, i8* frozen [[VOID_PTR]], i8* frozen [[TEMP_LD_PTR]], i32 frozen 5) // CHECK32: [[LD_VALUE:%.+]] = load x86_fp80, x86_fp80* [[TEMP_LD_ADDR]], align 4 // CHECK32: br label %[[ATOMIC_OP:.+]] // CHECK32: [[ATOMIC_OP]] @@ -289,7 +289,7 @@ // CHECK32: [[OBJ:%.+]] = bitcast x86_fp80* [[ADDR]] to i8* // CHECK32: [[EXPECTED:%.+]] = bitcast x86_fp80* [[OLD_VALUE_ADDR]] to i8* // CHECK32: [[DESIRED:%.+]] = bitcast x86_fp80* [[DESIRED_VALUE_ADDR]] to i8* - // CHECK32: [[FAIL_SUCCESS:%.+]] = call zeroext i1 @__atomic_compare_exchange(i32 12, i8* [[OBJ]], i8* [[EXPECTED]], i8* [[DESIRED]], i32 5, i32 5) + // CHECK32: [[FAIL_SUCCESS:%.+]] = call frozen zeroext i1 @__atomic_compare_exchange(i32 frozen 12, i8* frozen [[OBJ]], i8* frozen [[EXPECTED]], i8* frozen [[DESIRED]], i32 frozen 5, i32 frozen 5) // CHECK32: [[LD_VALUE]] = load x86_fp80, x86_fp80* [[OLD_VALUE_ADDR]], align 4 // CHECK32: br i1 [[FAIL_SUCCESS]], label %[[ATOMIC_CONT:.+]], label %[[ATOMIC_OP]] // CHECK32: [[ATOMIC_CONT]] @@ -335,7 +335,7 @@ // CHECK32: [[ADDR:%.+]] = load x86_fp80*, x86_fp80** [[ADDR_ADDR]], align 4 // CHECK32: [[VOID_PTR:%.+]] = bitcast x86_fp80* [[ADDR]] to i8* // CHECK32: [[TEMP_LD_PTR:%.+]] = bitcast x86_fp80* [[TEMP_LD_ADDR:%.+]] to i8* - // CHECK32: call void @__atomic_load(i32 12, i8* [[VOID_PTR]], i8* [[TEMP_LD_PTR]], i32 5) + // CHECK32: call void @__atomic_load(i32 frozen 12, i8* frozen [[VOID_PTR]], i8* frozen [[TEMP_LD_PTR]], i32 frozen 5) // CHECK32: [[ORIG_LD_VALUE:%.+]] = load x86_fp80, x86_fp80* [[TEMP_LD_ADDR]], align 4 // CHECK32: br label %[[ATOMIC_OP:.+]] // CHECK32: [[ATOMIC_OP]] @@ -350,7 +350,7 @@ // CHECK32: [[OBJ:%.+]] = bitcast x86_fp80* [[ADDR]] to i8* // CHECK32: [[EXPECTED:%.+]] = bitcast x86_fp80* [[OLD_VALUE_ADDR]] to i8* // CHECK32: [[DESIRED:%.+]] = bitcast x86_fp80* [[DESIRED_VALUE_ADDR]] to i8* - // CHECK32: [[FAIL_SUCCESS:%.+]] = call zeroext i1 @__atomic_compare_exchange(i32 12, i8* [[OBJ]], i8* [[EXPECTED]], i8* [[DESIRED]], i32 5, i32 5) + // CHECK32: [[FAIL_SUCCESS:%.+]] = call frozen zeroext i1 @__atomic_compare_exchange(i32 frozen 12, i8* frozen [[OBJ]], i8* frozen [[EXPECTED]], i8* frozen [[DESIRED]], i32 frozen 5, i32 frozen 5) // CHECK32: [[LD_VALUE]] = load x86_fp80, x86_fp80* [[OLD_VALUE_ADDR]], align 4 // CHECK32: br i1 [[FAIL_SUCCESS]], label %[[ATOMIC_CONT:.+]], label %[[ATOMIC_OP]] // CHECK32: [[ATOMIC_CONT]] @@ -402,7 +402,7 @@ // CHECK32: [[ADDR:%.+]] = load x86_fp80*, x86_fp80** [[ADDR_ADDR]], align 4 // CHECK32: [[VOID_PTR:%.+]] = bitcast x86_fp80* [[ADDR]] to i8* // CHECK32: [[TEMP_LD_PTR:%.+]] = bitcast x86_fp80* [[TEMP_LD_ADDR:%.+]] to i8* - // CHECK32: call void @__atomic_load(i32 12, i8* [[VOID_PTR]], i8* [[TEMP_LD_PTR]], i32 5) + // CHECK32: call void @__atomic_load(i32 frozen 12, i8* frozen [[VOID_PTR]], i8* frozen [[TEMP_LD_PTR]], i32 frozen 5) // CHECK32: [[LD_VALUE:%.+]] = load x86_fp80, x86_fp80* [[TEMP_LD_ADDR]], align 4 // CHECK32: br label %[[ATOMIC_OP:.+]] // CHECK32: [[ATOMIC_OP]] @@ -417,14 +417,14 @@ // CHECK32: [[OBJ:%.+]] = bitcast x86_fp80* [[ADDR]] to i8* // CHECK32: [[EXPECTED:%.+]] = bitcast x86_fp80* [[OLD_VALUE_ADDR]] to i8* // CHECK32: [[DESIRED:%.+]] = bitcast x86_fp80* [[DESIRED_VALUE_ADDR]] to i8* - // CHECK32: [[FAIL_SUCCESS:%.+]] = call zeroext i1 @__atomic_compare_exchange(i32 12, i8* [[OBJ]], i8* [[EXPECTED]], i8* [[DESIRED]], i32 5, i32 5) + // CHECK32: [[FAIL_SUCCESS:%.+]] = call frozen zeroext i1 @__atomic_compare_exchange(i32 frozen 12, i8* frozen [[OBJ]], i8* frozen [[EXPECTED]], i8* frozen [[DESIRED]], i32 frozen 5, i32 frozen 5) // CHECK32: [[LD_VALUE]] = load x86_fp80, x86_fp80* [[OLD_VALUE_ADDR]], align 4 // CHECK32: br i1 [[FAIL_SUCCESS]], label %[[ATOMIC_CONT:.+]], label %[[ATOMIC_OP]] // CHECK32: [[ATOMIC_CONT]] // CHECK32: [[ADDR:%.+]] = load x86_fp80*, x86_fp80** %{{.+}}, align 4 // CHECK32: [[VOID_ADDR:%.+]] = bitcast x86_fp80* [[ADDR]] to i8* // CHECK32: [[VOID_GET_ADDR:%.+]] = bitcast x86_fp80* [[GET_ADDR:%.+]] to i8* - // CHECK32: call void @__atomic_load(i32 12, i8* [[VOID_ADDR]], i8* [[VOID_GET_ADDR]], i32 5) + // CHECK32: call void @__atomic_load(i32 frozen 12, i8* frozen [[VOID_ADDR]], i8* frozen [[VOID_GET_ADDR]], i32 frozen 5) // CHECK32: [[RET_VAL:%.+]] = load x86_fp80, x86_fp80* [[GET_ADDR]], align 4 // CHECK32: ret x86_fp80 [[RET_VAL]] return *addr; @@ -449,7 +449,7 @@ // CHECK32: store x86_fp80 {{.+}}, x86_fp80* [[STORE_TEMP_PTR]], align 4 // CHECK32: [[ADDR_VOID:%.+]] = bitcast x86_fp80* [[ADDR]] to i8* // CHECK32: [[STORE_TEMP_VOID_PTR:%.+]] = bitcast x86_fp80* [[STORE_TEMP_PTR]] to i8* - // CHECK32: call void @__atomic_store(i32 12, i8* [[ADDR_VOID]], i8* [[STORE_TEMP_VOID_PTR]], i32 5) + // CHECK32: call void @__atomic_store(i32 frozen 12, i8* frozen [[ADDR_VOID]], i8* frozen [[STORE_TEMP_VOID_PTR]], i32 frozen 5) *addr = 115; // CHECK: [[ADDR:%.+]] = load x86_fp80*, x86_fp80** %{{.+}}, align 8 // CHECK: [[ADDR_INT:%.+]] = bitcast x86_fp80* [[ADDR]] to i128* @@ -461,7 +461,7 @@ // CHECK32: [[ADDR:%.+]] = load x86_fp80*, x86_fp80** %{{.+}}, align 4 // CHECK32: [[VOID_ADDR:%.+]] = bitcast x86_fp80* [[ADDR]] to i8* // CHECK32: [[VOID_LD_TEMP:%.+]] = bitcast x86_fp80* [[LD_TEMP:%.+]] to i8* - // CHECK32: call void @__atomic_load(i32 12, i8* [[VOID_ADDR]], i8* [[VOID_LD_TEMP]], i32 5) + // CHECK32: call void @__atomic_load(i32 frozen 12, i8* frozen [[VOID_ADDR]], i8* frozen [[VOID_LD_TEMP]], i32 frozen 5) // CHECK32: [[RET_VAL:%.+]] = load x86_fp80, x86_fp80* [[LD_TEMP]], align 4 // CHECK32: ret x86_fp80 [[RET_VAL]] diff --git a/clang/test/CodeGen/x86-inline-asm-min-vector-width.c b/clang/test/CodeGen/x86-inline-asm-min-vector-width.c --- a/clang/test/CodeGen/x86-inline-asm-min-vector-width.c +++ b/clang/test/CodeGen/x86-inline-asm-min-vector-width.c @@ -4,38 +4,38 @@ typedef long long __m256i __attribute__ ((vector_size (32))); typedef long long __m512i __attribute__ ((vector_size (64))); -// CHECK: define <2 x i64> @testXMMout(<2 x i64>* %p) #0 +// CHECK: define frozen <2 x i64> @testXMMout(<2 x i64>* frozen %p) #0 __m128i testXMMout(__m128i *p) { __m128i xmm0; __asm__("vmovdqu %1, %0" :"=v"(xmm0) : "m"(*(__m128i*)p)); return xmm0; } -// CHECK: define <4 x i64> @testYMMout(<4 x i64>* %p) #1 +// CHECK: define frozen <4 x i64> @testYMMout(<4 x i64>* frozen %p) #1 __m256i testYMMout(__m256i *p) { __m256i ymm0; __asm__("vmovdqu %1, %0" :"=v"(ymm0) : "m"(*(__m256i*)p)); return ymm0; } -// CHECK: define <8 x i64> @testZMMout(<8 x i64>* %p) #2 +// CHECK: define frozen <8 x i64> @testZMMout(<8 x i64>* frozen %p) #2 __m512i testZMMout(__m512i *p) { __m512i zmm0; __asm__("vmovdqu64 %1, %0" :"=v"(zmm0) : "m"(*(__m512i*)p)); return zmm0; } -// CHECK: define void @testXMMin(<2 x i64> %xmm0, <2 x i64>* %p) #0 +// CHECK: define void @testXMMin(<2 x i64> frozen %xmm0, <2 x i64>* frozen %p) #0 void testXMMin(__m128i xmm0, __m128i *p) { __asm__("vmovdqu %0, %1" : : "v"(xmm0), "m"(*(__m128i*)p)); } -// CHECK: define void @testYMMin(<4 x i64> %ymm0, <4 x i64>* %p) #1 +// CHECK: define void @testYMMin(<4 x i64> frozen %ymm0, <4 x i64>* frozen %p) #1 void testYMMin(__m256i ymm0, __m256i *p) { __asm__("vmovdqu %0, %1" : : "v"(ymm0), "m"(*(__m256i*)p)); } -// CHECK: define void @testZMMin(<8 x i64> %zmm0, <8 x i64>* %p) #2 +// CHECK: define void @testZMMin(<8 x i64> frozen %zmm0, <8 x i64>* frozen %p) #2 void testZMMin(__m512i zmm0, __m512i *p) { __asm__("vmovdqu64 %0, %1" : : "v"(zmm0), "m"(*(__m512i*)p)); } diff --git a/clang/test/CodeGen/x86-long-double.cpp b/clang/test/CodeGen/x86-long-double.cpp --- a/clang/test/CodeGen/x86-long-double.cpp +++ b/clang/test/CodeGen/x86-long-double.cpp @@ -51,6 +51,6 @@ long double foo(long double d) { return d; } -// FP64: double @_Z3fooe(double %d) -// FP80: x86_fp80 @_Z3fooe(x86_fp80 %d) -// FP128: fp128 @_Z3foog(fp128 %d) +// FP64: double @_Z3fooe(double frozen %d) +// FP80: x86_fp80 @_Z3fooe(x86_fp80 frozen %d) +// FP128: fp128 @_Z3foog(fp128 frozen %d) diff --git a/clang/test/CodeGen/x86-soft-float.c b/clang/test/CodeGen/x86-soft-float.c --- a/clang/test/CodeGen/x86-soft-float.c +++ b/clang/test/CodeGen/x86-soft-float.c @@ -1,6 +1,6 @@ // RUN: %clang_cc1 -triple i386-unknown-unknown -mregparm 3 -emit-llvm %s -o - | FileCheck %s -check-prefix=HARD // RUN: %clang_cc1 -triple i386-unknown-unknown -mregparm 3 -mfloat-abi soft -emit-llvm %s -o - | FileCheck %s -check-prefix=SOFT -// HARD: define void @f1(float %a) -// SOFT: define void @f1(float inreg %a) +// HARD: define void @f1(float frozen %a) +// SOFT: define void @f1(float frozen inreg %a) void f1(float a) {} diff --git a/clang/test/CodeGen/x86-vec-i128.c b/clang/test/CodeGen/x86-vec-i128.c --- a/clang/test/CodeGen/x86-vec-i128.c +++ b/clang/test/CodeGen/x86-vec-i128.c @@ -23,8 +23,8 @@ typedef unsigned __int128 v16u128 __attribute__((vector_size(16))); v16u64 test_v16u128(v16u64 a, v16u128 b) { -// CLANG10ABI128: define <2 x i64> @test_v16u128(<2 x i64> %{{.*}}, <2 x i64> %{{.*}}) -// CLANG9ABI128: define <2 x i64> @test_v16u128(<2 x i64> %{{.*}}, <1 x i128> %{{.*}}) +// CLANG10ABI128: define frozen <2 x i64> @test_v16u128(<2 x i64> frozen %{{.*}}, <2 x i64> frozen %{{.*}}) +// CLANG9ABI128: define frozen <2 x i64> @test_v16u128(<2 x i64> frozen %{{.*}}, <1 x i128> frozen %{{.*}}) return a + (v16u64)b; } @@ -32,10 +32,10 @@ typedef unsigned __int128 v32u128 __attribute__((vector_size(32))); v32u64 test_v32u128(v32u64 a, v32u128 b) { -// MEM256ALIGN16: define <4 x i64> @test_v32u128(<4 x i64>* byval(<4 x i64>) align 16 %{{.*}}, <2 x i128>* byval(<2 x i128>) align 16 %{{.*}}) -// MEM256ALIGN32: define <4 x i64> @test_v32u128(<4 x i64>* byval(<4 x i64>) align 32 %{{.*}}, <2 x i128>* byval(<2 x i128>) align 32 %{{.*}}) -// CLANG10ABI256: define <4 x i64> @test_v32u128(<4 x i64> %{{.*}}, <2 x i128>* byval(<2 x i128>) align 32 %{{.*}}) -// CLANG9ABI256: define <4 x i64> @test_v32u128(<4 x i64> %{{.*}}, <2 x i128> %{{.*}}) +// MEM256ALIGN16: define frozen <4 x i64> @test_v32u128(<4 x i64>* frozen byval(<4 x i64>) align 16 %{{.*}}, <2 x i128>* frozen byval(<2 x i128>) align 16 %{{.*}}) +// MEM256ALIGN32: define frozen <4 x i64> @test_v32u128(<4 x i64>* frozen byval(<4 x i64>) align 32 %{{.*}}, <2 x i128>* frozen byval(<2 x i128>) align 32 %{{.*}}) +// CLANG10ABI256: define frozen <4 x i64> @test_v32u128(<4 x i64> frozen %{{.*}}, <2 x i128>* frozen byval(<2 x i128>) align 32 %{{.*}}) +// CLANG9ABI256: define frozen <4 x i64> @test_v32u128(<4 x i64> frozen %{{.*}}, <2 x i128> frozen %{{.*}}) return a + (v32u64)b; } @@ -43,10 +43,10 @@ typedef unsigned __int128 v64u128 __attribute__((vector_size(64))); v64u64 test_v64u128(v64u64 a, v64u128 b) { -// MEM512ALIGN16: define <8 x i64> @test_v64u128(<8 x i64>* byval(<8 x i64>) align 16 %{{.*}}, <4 x i128>* byval(<4 x i128>) align 16 %{{.*}}) -// MEM512ALIGN32: define <8 x i64> @test_v64u128(<8 x i64>* byval(<8 x i64>) align 32 %{{.*}}, <4 x i128>* byval(<4 x i128>) align 32 %{{.*}}) -// MEM512ALIGN64: define <8 x i64> @test_v64u128(<8 x i64>* byval(<8 x i64>) align 64 %{{.*}}, <4 x i128>* byval(<4 x i128>) align 64 %{{.*}}) -// CLANG10ABI512: define <8 x i64> @test_v64u128(<8 x i64> %{{.*}}, <4 x i128>* byval(<4 x i128>) align 64 %{{.*}}) -// CLANG9ABI512: define <8 x i64> @test_v64u128(<8 x i64> %{{.*}}, <4 x i128> %{{.*}}) +// MEM512ALIGN16: define frozen <8 x i64> @test_v64u128(<8 x i64>* frozen byval(<8 x i64>) align 16 %{{.*}}, <4 x i128>* frozen byval(<4 x i128>) align 16 %{{.*}}) +// MEM512ALIGN32: define frozen <8 x i64> @test_v64u128(<8 x i64>* frozen byval(<8 x i64>) align 32 %{{.*}}, <4 x i128>* frozen byval(<4 x i128>) align 32 %{{.*}}) +// MEM512ALIGN64: define frozen <8 x i64> @test_v64u128(<8 x i64>* frozen byval(<8 x i64>) align 64 %{{.*}}, <4 x i128>* frozen byval(<4 x i128>) align 64 %{{.*}}) +// CLANG10ABI512: define frozen <8 x i64> @test_v64u128(<8 x i64> frozen %{{.*}}, <4 x i128>* frozen byval(<4 x i128>) align 64 %{{.*}}) +// CLANG9ABI512: define frozen <8 x i64> @test_v64u128(<8 x i64> frozen %{{.*}}, <4 x i128> frozen %{{.*}}) return a + (v64u64)b; } diff --git a/clang/test/CodeGen/x86_32-arguments-darwin.c b/clang/test/CodeGen/x86_32-arguments-darwin.c --- a/clang/test/CodeGen/x86_32-arguments-darwin.c +++ b/clang/test/CodeGen/x86_32-arguments-darwin.c @@ -1,31 +1,31 @@ -// RUN: %clang_cc1 -w -fblocks -triple i386-apple-darwin9 -target-cpu yonah -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args -w -fblocks -triple i386-apple-darwin9 -target-cpu yonah -emit-llvm -o - %s | FileCheck %s -// CHECK-LABEL: define signext i8 @f0() +// CHECK-LABEL: define frozen signext i8 @f0() char f0(void) { return 0; } -// CHECK-LABEL: define signext i16 @f1() +// CHECK-LABEL: define frozen signext i16 @f1() short f1(void) { return 0; } -// CHECK-LABEL: define i32 @f2() +// CHECK-LABEL: define frozen i32 @f2() int f2(void) { return 0; } -// CHECK-LABEL: define float @f3() +// CHECK-LABEL: define frozen float @f3() float f3(void) { return 0; } -// CHECK-LABEL: define double @f4() +// CHECK-LABEL: define frozen double @f4() double f4(void) { return 0; } -// CHECK-LABEL: define x86_fp80 @f5() +// CHECK-LABEL: define frozen x86_fp80 @f5() long double f5(void) { return 0; } @@ -159,11 +159,11 @@ void f39(struct s39 x) {} // -// CHECK-LABEL: define i32 @f40() +// CHECK-LABEL: define frozen i32 @f40() enum e40 { ec0 = 0 }; enum e40 f40(void) { } -// CHECK-LABEL: define void ()* @f41() +// CHECK-LABEL: define frozen void ()* @f41() typedef void (^vvbp)(void); vvbp f41(void) { } @@ -216,14 +216,14 @@ typedef unsigned short v2i16 __attribute__((__vector_size__(4))); -// CHECK-LABEL: define i32 @f54(i32 %arg.coerce) +// CHECK-LABEL: define frozen i32 @f54(i32 %arg.coerce) // rdar://8359483 v2i16 f54(v2i16 arg) { return arg+arg; } typedef int v4i32 __attribute__((__vector_size__(16))); -// CHECK-LABEL: define <2 x i64> @f55(<4 x i32> %arg) +// CHECK-LABEL: define frozen <2 x i64> @f55(<4 x i32> %arg) // PR8029 v4i32 f55(v4i32 arg) { return arg+arg; } @@ -303,7 +303,7 @@ struct s62 { T62 x; int y; } __attribute((packed, aligned(8))); void f62(int x, struct s62 y) {} -// CHECK-LABEL: define i32 @f63 +// CHECK-LABEL: define frozen i32 @f63 // CHECK: ptrtoint // CHECK: and {{.*}}, -16 // CHECK: inttoptr @@ -325,7 +325,7 @@ struct s65 { signed char a[0]; float b; }; struct s65 f65() { return (struct s65){{},2}; } -// CHECK-LABEL: define <2 x i64> @f66 +// CHECK-LABEL: define frozen <2 x i64> @f66 // CHECK: ptrtoint // CHECK: and {{.*}}, -16 // CHECK: inttoptr diff --git a/clang/test/CodeGen/x86_32-arguments-iamcu.c b/clang/test/CodeGen/x86_32-arguments-iamcu.c --- a/clang/test/CodeGen/x86_32-arguments-iamcu.c +++ b/clang/test/CodeGen/x86_32-arguments-iamcu.c @@ -1,18 +1,18 @@ // RUN: %clang_cc1 -w -triple i386-pc-elfiamcu -mfloat-abi soft -emit-llvm -o - %s | FileCheck %s -// CHECK-LABEL: define void @ints(i32 %a, i32 %b, i32 %c, i32 %d) +// CHECK-LABEL: define void @ints(i32 frozen %a, i32 frozen %b, i32 frozen %c, i32 frozen %d) void ints(int a, int b, int c, int d) {} -// CHECK-LABEL: define void @floats(float %a, float %b, float %c, float %d) +// CHECK-LABEL: define void @floats(float frozen %a, float frozen %b, float frozen %c, float frozen %d) void floats(float a, float b, float c, float d) {} -// CHECK-LABEL: define void @mixed(i32 %a, float %b, i32 %c, float %d) +// CHECK-LABEL: define void @mixed(i32 frozen %a, float frozen %b, i32 frozen %c, float frozen %d) void mixed(int a, float b, int c, float d) {} -// CHECK-LABEL: define void @doubles(double %d1, double %d2) +// CHECK-LABEL: define void @doubles(double frozen %d1, double frozen %d2) void doubles(double d1, double d2) {} -// CHECK-LABEL: define void @mixedDoubles(i32 %a, double %d1) +// CHECK-LABEL: define void @mixedDoubles(i32 frozen %a, double frozen %d1) void mixedDoubles(int a, double d1) {} typedef struct st3_t { @@ -37,16 +37,16 @@ // CHECK-LABEL: define void @smallStructs(i32 %st1.coerce, i32 %st2.coerce, i32 %st3.coerce) void smallStructs(st4_t st1, st4_t st2, st4_t st3) {} -// CHECK-LABEL: define void @paddedStruct(i32 %i1, i32 %st.coerce0, i32 %st.coerce1, i32 %st4.0) +// CHECK-LABEL: define void @paddedStruct(i32 frozen %i1, i32 %st.coerce0, i32 %st.coerce1, i32 %st4.0) void paddedStruct(int i1, st5_t st, st4_t st4) {} -// CHECK-LABEL: define void @largeStructBegin(%struct.st12_t* byval(%struct.st12_t) align 4 %st) +// CHECK-LABEL: define void @largeStructBegin(%struct.st12_t* frozen byval(%struct.st12_t) align 4 %st) void largeStructBegin(st12_t st) {} -// CHECK-LABEL: define void @largeStructMiddle(i32 %i1, %struct.st12_t* byval(%struct.st12_t) align 4 %st, i32 %i2, i32 %i3) +// CHECK-LABEL: define void @largeStructMiddle(i32 frozen %i1, %struct.st12_t* frozen byval(%struct.st12_t) align 4 %st, i32 frozen %i2, i32 frozen %i3) void largeStructMiddle(int i1, st12_t st, int i2, int i3) {} -// CHECK-LABEL: define void @largeStructEnd(i32 %i1, i32 %i2, i32 %i3, i32 %st.0, i32 %st.1, i32 %st.2) +// CHECK-LABEL: define void @largeStructEnd(i32 frozen %i1, i32 frozen %i2, i32 frozen %i3, i32 %st.0, i32 %st.1, i32 %st.2) void largeStructEnd(int i1, int i2, int i3, st12_t st) {} // CHECK-LABEL: define i24 @retNonPow2Struct(i32 %r.coerce) @@ -58,12 +58,12 @@ // CHECK-LABEL: define i64 @retPaddedStruct(i32 %r.coerce0, i32 %r.coerce1) st5_t retPaddedStruct(st5_t r) { return r; } -// CHECK-LABEL: define void @retLargeStruct(%struct.st12_t* noalias sret align 4 %agg.result, i32 %i1, %struct.st12_t* byval(%struct.st12_t) align 4 %r) +// CHECK-LABEL: define void @retLargeStruct(%struct.st12_t* noalias sret align 4 %agg.result, i32 frozen %i1, %struct.st12_t* frozen byval(%struct.st12_t) align 4 %r) st12_t retLargeStruct(int i1, st12_t r) { return r; } -// CHECK-LABEL: define i32 @varArgs(i32 %i1, ...) +// CHECK-LABEL: define frozen i32 @varArgs(i32 frozen %i1, ...) int varArgs(int i1, ...) { return i1; } -// CHECK-LABEL: define double @longDoubleArg(double %ld1) +// CHECK-LABEL: define frozen double @longDoubleArg(double frozen %ld1) long double longDoubleArg(long double ld1) { return ld1; } diff --git a/clang/test/CodeGen/x86_32-arguments-linux.c b/clang/test/CodeGen/x86_32-arguments-linux.c --- a/clang/test/CodeGen/x86_32-arguments-linux.c +++ b/clang/test/CodeGen/x86_32-arguments-linux.c @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -w -fblocks -triple i386-pc-linux-gnu -target-cpu pentium4 -emit-llvm -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -w -fblocks -triple i386-pc-linux-gnu -target-cpu pentium4 -emit-llvm -o %t %s // RUN: FileCheck < %t %s // CHECK-LABEL: define void @f56( diff --git a/clang/test/CodeGen/x86_32-arguments-nommx.c b/clang/test/CodeGen/x86_32-arguments-nommx.c --- a/clang/test/CodeGen/x86_32-arguments-nommx.c +++ b/clang/test/CodeGen/x86_32-arguments-nommx.c @@ -3,9 +3,9 @@ // no-mmx should put mmx into memory typedef int __attribute__((vector_size (8))) i32v2; int a(i32v2 x) { return x[0]; } -// CHECK-LABEL: define i32 @a(i64 %x.coerce) +// CHECK-LABEL: define frozen i32 @a(i64 frozen %x.coerce) // but SSE2 vectors should still go into an SSE2 register typedef int __attribute__((vector_size (16))) i32v4; int b(i32v4 x) { return x[0]; } -// CHECK-LABEL: define i32 @b(<4 x i32> %x) +// CHECK-LABEL: define frozen i32 @b(<4 x i32> frozen %x) diff --git a/clang/test/CodeGen/x86_32-arguments-realign.c b/clang/test/CodeGen/x86_32-arguments-realign.c --- a/clang/test/CodeGen/x86_32-arguments-realign.c +++ b/clang/test/CodeGen/x86_32-arguments-realign.c @@ -1,7 +1,7 @@ // RUN: %clang_cc1 -w -fblocks -triple i386-apple-darwin9 -emit-llvm -o %t %s // RUN: FileCheck < %t %s -// CHECK-LABEL: define void @f0(%struct.s0* byval(%struct.s0) align 4 %0) +// CHECK-LABEL: define void @f0(%struct.s0* frozen byval(%struct.s0) align 4 %0) // CHECK: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 16 %{{.*}}, i8* align 4 %{{.*}}, i32 16, i1 false) // CHECK: } struct s0 { long double a; }; diff --git a/clang/test/CodeGen/x86_32-arguments-win32.c b/clang/test/CodeGen/x86_32-arguments-win32.c --- a/clang/test/CodeGen/x86_32-arguments-win32.c +++ b/clang/test/CodeGen/x86_32-arguments-win32.c @@ -72,10 +72,10 @@ void receive_vec_1024(__m1024 x, __m1024 y, __m1024 z, __m1024 w, __m1024 q) { gv1024 = x + y + z + w + q; } -// CHECK-LABEL: define dso_local void @receive_vec_128(<4 x float> inreg %x, <4 x float> inreg %y, <4 x float> inreg %z, <4 x float>* %0, <4 x float>* %1) -// CHECK-LABEL: define dso_local void @receive_vec_256(<8 x float> inreg %x, <8 x float> inreg %y, <8 x float> inreg %z, <8 x float>* %0, <8 x float>* %1) -// CHECK-LABEL: define dso_local void @receive_vec_512(<16 x float> inreg %x, <16 x float> inreg %y, <16 x float> inreg %z, <16 x float>* %0, <16 x float>* %1) -// CHECK-LABEL: define dso_local void @receive_vec_1024(<32 x float>* %0, <32 x float>* %1, <32 x float>* %2, <32 x float>* %3, <32 x float>* %4) +// CHECK-LABEL: define dso_local void @receive_vec_128(<4 x float> frozen inreg %x, <4 x float> frozen inreg %y, <4 x float> frozen inreg %z, <4 x float>* frozen %0, <4 x float>* frozen %1) +// CHECK-LABEL: define dso_local void @receive_vec_256(<8 x float> frozen inreg %x, <8 x float> frozen inreg %y, <8 x float> frozen inreg %z, <8 x float>* frozen %0, <8 x float>* frozen %1) +// CHECK-LABEL: define dso_local void @receive_vec_512(<16 x float> frozen inreg %x, <16 x float> frozen inreg %y, <16 x float> frozen inreg %z, <16 x float>* frozen %0, <16 x float>* frozen %1) +// CHECK-LABEL: define dso_local void @receive_vec_1024(<32 x float>* frozen %0, <32 x float>* frozen %1, <32 x float>* frozen %2, <32 x float>* frozen %3, <32 x float>* frozen %4) void pass_vec_128() { __m128 z = {0}; @@ -83,10 +83,10 @@ } // CHECK-LABEL: define dso_local void @pass_vec_128() -// CHECK: call void @receive_vec_128(<4 x float> inreg %{{[^,)]*}}, <4 x float> inreg %{{[^,)]*}}, <4 x float> inreg %{{[^,)]*}}, <4 x float>* %{{[^,)]*}}, <4 x float>* %{{[^,)]*}}) +// CHECK: call void @receive_vec_128(<4 x float> frozen inreg %{{[^,)]*}}, <4 x float> frozen inreg %{{[^,)]*}}, <4 x float> frozen inreg %{{[^,)]*}}, <4 x float>* frozen %{{[^,)]*}}, <4 x float>* frozen %{{[^,)]*}}) void __fastcall fastcall_indirect_vec(__m128 x, __m128 y, __m128 z, __m128 w, int edx, __m128 q) { gv128 = x + y + z + w + q; } -// CHECK-LABEL: define dso_local x86_fastcallcc void @"\01@fastcall_indirect_vec@84"(<4 x float> inreg %x, <4 x float> inreg %y, <4 x float> inreg %z, <4 x float>* inreg %0, i32 inreg %edx, <4 x float>* %1) +// CHECK-LABEL: define dso_local x86_fastcallcc void @"\01@fastcall_indirect_vec@84"(<4 x float> frozen inreg %x, <4 x float> frozen inreg %y, <4 x float> frozen inreg %z, <4 x float>* frozen inreg %0, i32 frozen inreg %edx, <4 x float>* frozen %1) diff --git a/clang/test/CodeGen/x86_64-arguments-nacl.c b/clang/test/CodeGen/x86_64-arguments-nacl.c --- a/clang/test/CodeGen/x86_64-arguments-nacl.c +++ b/clang/test/CodeGen/x86_64-arguments-nacl.c @@ -25,12 +25,12 @@ void f1(struct PP_Var p1) { while(1) {} } // long doubles are 64 bits on NaCl -// CHECK-LABEL: define double @f5() +// CHECK-LABEL: define frozen double @f5() long double f5(void) { return 0; } -// CHECK-LABEL: define void @f6(i8 signext %a0, i16 signext %a1, i32 %a2, i64 %a3, i8* %a4) +// CHECK-LABEL: define void @f6(i8 frozen signext %a0, i16 frozen signext %a1, i32 frozen %a2, i64 frozen %a3, i8* frozen %a4) void f6(char a0, short a1, int a2, long long a3, void *a4) { } @@ -61,14 +61,14 @@ // Check that sret parameter is accounted for when checking available integer // registers. -// CHECK: define void @f13(%struct.s13_0* noalias sret align 8 %agg.result, i32 %a, i32 %b, i32 %c, i32 %d, {{.*}}* byval({{.*}}) align 8 %e, i32 %f) +// CHECK: define void @f13(%struct.s13_0* noalias sret align 8 %agg.result, i32 frozen %a, i32 frozen %b, i32 frozen %c, i32 frozen %d, {{.*}}* frozen byval({{.*}}) align 8 %e, i32 frozen %f) struct s13_0 { long long f0[3]; }; struct s13_1 { long long f0[2]; }; struct s13_0 f13(int a, int b, int c, int d, struct s13_1 e, int f) { while (1) {} } -// CHECK-LABEL: define void @f20(%struct.s20* byval(%struct.s20) align 32 %x) +// CHECK-LABEL: define void @f20(%struct.s20* frozen byval(%struct.s20) align 32 %x) struct __attribute__((aligned(32))) s20 { int x; int y; diff --git a/clang/test/CodeGen/x86_64-arguments-win32.c b/clang/test/CodeGen/x86_64-arguments-win32.c --- a/clang/test/CodeGen/x86_64-arguments-win32.c +++ b/clang/test/CodeGen/x86_64-arguments-win32.c @@ -3,28 +3,28 @@ // To be ABI compatible with code generated by MSVC, there shouldn't be any // sign/zero extensions on types smaller than 64bit. -// CHECK-LABEL: define dso_local void @f1(i8 %a) +// CHECK-LABEL: define dso_local void @f1(i8 frozen %a) void f1(char a) {} -// CHECK-LABEL: define dso_local void @f2(i8 %a) +// CHECK-LABEL: define dso_local void @f2(i8 frozen %a) void f2(unsigned char a) {} -// CHECK-LABEL: define dso_local void @f3(i16 %a) +// CHECK-LABEL: define dso_local void @f3(i16 frozen %a) void f3(short a) {} -// CHECK-LABEL: define dso_local void @f4(i16 %a) +// CHECK-LABEL: define dso_local void @f4(i16 frozen %a) void f4(unsigned short a) {} // For ABI compatibility with ICC, _Complex should be passed/returned // as if it were a struct with two elements. -// CHECK-LABEL: define dso_local void @f5(i64 %a.coerce) +// CHECK-LABEL: define dso_local void @f5(i64 frozen %a.coerce) void f5(_Complex float a) {} -// CHECK-LABEL: define dso_local void @f6({ double, double }* %a) +// CHECK-LABEL: define dso_local void @f6({ double, double }* frozen %a) void f6(_Complex double a) {} -// CHECK-LABEL: define dso_local i64 @f7() +// CHECK-LABEL: define dso_local frozen i64 @f7() _Complex float f7() { return 1.0; } // CHECK-LABEL: define dso_local void @f8({ double, double }* noalias sret align 8 %agg.result) diff --git a/clang/test/CodeGen/x86_64-arguments.c b/clang/test/CodeGen/x86_64-arguments.c --- a/clang/test/CodeGen/x86_64-arguments.c +++ b/clang/test/CodeGen/x86_64-arguments.c @@ -6,41 +6,41 @@ // RUN: FileCheck %s -check-prefix=CHECK -check-prefix=AVX -check-prefix=AVX512 #include -// CHECK-LABEL: define signext i8 @f0() +// CHECK-LABEL: define frozen signext i8 @f0() char f0(void) { return 0; } -// CHECK-LABEL: define signext i16 @f1() +// CHECK-LABEL: define frozen signext i16 @f1() short f1(void) { return 0; } -// CHECK-LABEL: define i32 @f2() +// CHECK-LABEL: define frozen i32 @f2() int f2(void) { return 0; } -// CHECK-LABEL: define float @f3() +// CHECK-LABEL: define frozen float @f3() float f3(void) { return 0; } -// CHECK-LABEL: define double @f4() +// CHECK-LABEL: define frozen double @f4() double f4(void) { return 0; } -// CHECK-LABEL: define x86_fp80 @f5() +// CHECK-LABEL: define frozen x86_fp80 @f5() long double f5(void) { return 0; } -// CHECK-LABEL: define void @f6(i8 signext %a0, i16 signext %a1, i32 %a2, i64 %a3, i8* %a4) +// CHECK-LABEL: define void @f6(i8 frozen signext %a0, i16 frozen signext %a1, i32 frozen %a2, i64 frozen %a3, i8* frozen %a4) void f6(char a0, short a1, int a2, long long a3, void *a4) { } -// CHECK-LABEL: define void @f7(i32 %a0) +// CHECK-LABEL: define void @f7(i32 frozen %a0) typedef enum { A, B, C } e7; void f7(e7 a0) { } @@ -48,7 +48,7 @@ // Test merging/passing of upper eightbyte with X87 class. // // CHECK-LABEL: define void @f8_1(%union.u8* noalias sret align 16 %agg.result) -// CHECK-LABEL: define void @f8_2(%union.u8* byval(%union.u8) align 16 %a0) +// CHECK-LABEL: define void @f8_2(%union.u8* frozen byval(%union.u8) align 16 %a0) union u8 { long double a; int b; @@ -74,43 +74,43 @@ // Check that sret parameter is accounted for when checking available integer // registers. -// CHECK: define void @f13(%struct.s13_0* noalias sret align 8 %agg.result, i32 %a, i32 %b, i32 %c, i32 %d, {{.*}}* byval({{.*}}) align 8 %e, i32 %f) +// CHECK: define void @f13(%struct.s13_0* noalias sret align 8 %agg.result, i32 frozen %a, i32 frozen %b, i32 frozen %c, i32 frozen %d, {{.*}}* frozen byval({{.*}}) align 8 %e, i32 frozen %f) struct s13_0 { long long f0[3]; }; struct s13_1 { long long f0[2]; }; struct s13_0 f13(int a, int b, int c, int d, struct s13_1 e, int f) { while (1) {} } -// CHECK: define void @f14({{.*}}, i8 signext %X) +// CHECK: define void @f14({{.*}}, i8 frozen signext %X) void f14(int a, int b, int c, int d, int e, int f, char X) {} -// CHECK: define void @f15({{.*}}, i8* %X) +// CHECK: define void @f15({{.*}}, i8* frozen %X) void f15(int a, int b, int c, int d, int e, int f, void *X) {} -// CHECK: define void @f16({{.*}}, float %X) +// CHECK: define void @f16({{.*}}, float frozen %X) void f16(float a, float b, float c, float d, float e, float f, float g, float h, float X) {} -// CHECK: define void @f17({{.*}}, x86_fp80 %X) +// CHECK: define void @f17({{.*}}, x86_fp80 frozen %X) void f17(float a, float b, float c, float d, float e, float f, float g, float h, long double X) {} // Check for valid coercion. The struct should be passed/returned as i32, not // as i64 for better code quality. // rdar://8135035 -// CHECK-LABEL: define void @f18(i32 %a, i32 %f18_arg1.coerce) +// CHECK-LABEL: define void @f18(i32 frozen %a, i32 %f18_arg1.coerce) struct f18_s0 { int f0; }; void f18(int a, struct f18_s0 f18_arg1) { while (1) {} } // Check byval alignment. -// CHECK-LABEL: define void @f19(%struct.s19* byval(%struct.s19) align 16 %x) +// CHECK-LABEL: define void @f19(%struct.s19* frozen byval(%struct.s19) align 16 %x) struct s19 { long double a; }; void f19(struct s19 x) {} -// CHECK-LABEL: define void @f20(%struct.s20* byval(%struct.s20) align 32 %x) +// CHECK-LABEL: define void @f20(%struct.s20* frozen byval(%struct.s20) align 32 %x) struct __attribute__((aligned(32))) s20 { int x; int y; @@ -123,7 +123,7 @@ }; // rdar://7375902 -// CHECK-LABEL: define i8* @f21(i64 %S.coerce0, i8* %S.coerce1) +// CHECK-LABEL: define frozen i8* @f21(i64 %S.coerce0, i8* %S.coerce1) const char *f21(struct StringRef S) { return S.x+S.Ptr; } // PR7567 @@ -144,7 +144,7 @@ void f23(int A, struct f23S B) { - // CHECK-LABEL: define void @f23(i32 %A, i64 %B.coerce0, i32 %B.coerce1) + // CHECK-LABEL: define void @f23(i32 frozen %A, i64 %B.coerce0, i32 %B.coerce1) } struct f24s { long a; int b; }; @@ -152,13 +152,13 @@ struct f23S f24(struct f23S *X, struct f24s *P2) { return *X; - // CHECK: define { i64, i32 } @f24(%struct.f23S* %X, %struct.f24s* %P2) + // CHECK: define { i64, i32 } @f24(%struct.f23S* frozen %X, %struct.f24s* frozen %P2) } // rdar://8248065 typedef float v4f32 __attribute__((__vector_size__(16))); v4f32 f25(v4f32 X) { - // CHECK-LABEL: define <4 x float> @f25(<4 x float> %X) + // CHECK-LABEL: define frozen <4 x float> @f25(<4 x float> frozen %X) // CHECK-NOT: alloca // CHECK: alloca <4 x float> // CHECK-NOT: alloca @@ -174,7 +174,7 @@ }; struct foo26 f26(struct foo26 *P) { - // CHECK: define { i32*, float* } @f26(%struct.foo26* %P) + // CHECK: define { i32*, float* } @f26(%struct.foo26* frozen %P) return *P; } @@ -240,13 +240,13 @@ // rdar://8251384 struct f31foo { float a, b, c; }; float f31(struct f31foo X) { - // CHECK-LABEL: define float @f31(<2 x float> %X.coerce0, float %X.coerce1) + // CHECK-LABEL: define frozen float @f31(<2 x float> %X.coerce0, float %X.coerce1) return X.c; } _Complex float f32(_Complex float A, _Complex float B) { // rdar://6379669 - // CHECK-LABEL: define <2 x float> @f32(<2 x float> %A.coerce, <2 x float> %B.coerce) + // CHECK-LABEL: define frozen <2 x float> @f32(<2 x float> frozen %A.coerce, <2 x float> frozen %B.coerce) return A+B; } @@ -261,17 +261,17 @@ typedef unsigned long long v1i64 __attribute__((__vector_size__(8))); // rdar://8359248 -// CHECK-LABEL: define double @f34(double %arg.coerce) +// CHECK-LABEL: define frozen double @f34(double frozen %arg.coerce) v1i64 f34(v1i64 arg) { return arg; } // rdar://8358475 -// CHECK-LABEL: define double @f35(double %arg.coerce) +// CHECK-LABEL: define frozen double @f35(double frozen %arg.coerce) typedef unsigned long v1i64_2 __attribute__((__vector_size__(8))); v1i64_2 f35(v1i64_2 arg) { return arg+arg; } // rdar://9122143 -// CHECK: declare void @func(%struct._str* byval(%struct._str) align 16) +// CHECK: declare void @func(%struct._str* frozen byval(%struct._str) align 16) typedef struct _str { union { long double a; @@ -286,14 +286,14 @@ func(ss); } -// CHECK-LABEL: define double @f36(double %arg.coerce) +// CHECK-LABEL: define frozen double @f36(double frozen %arg.coerce) typedef unsigned v2i32 __attribute((__vector_size__(8))); v2i32 f36(v2i32 arg) { return arg; } // AVX: declare void @f38(<8 x float>) -// AVX: declare void @f37(<8 x float>) -// SSE: declare void @f38(%struct.s256* byval(%struct.s256) align 32) -// SSE: declare void @f37(<8 x float>* byval(<8 x float>) align 32) +// AVX: declare void @f37(<8 x float> frozen) +// SSE: declare void @f38(%struct.s256* frozen byval(%struct.s256) align 32) +// SSE: declare void @f37(<8 x float>* frozen byval(<8 x float>) align 32) typedef float __m256 __attribute__ ((__vector_size__ (32))); typedef struct { __m256 m; @@ -309,7 +309,7 @@ // The two next tests make sure that the struct below is passed // in the same way regardless of avx being used -// CHECK: declare void @func40(%struct.t128* byval(%struct.t128) align 16) +// CHECK: declare void @func40(%struct.t128* frozen byval(%struct.t128) align 16) typedef float __m128 __attribute__ ((__vector_size__ (16))); typedef struct t128 { __m128 m; @@ -321,7 +321,7 @@ func40(s); } -// CHECK: declare void @func42(%struct.t128_2* byval(%struct.t128_2) align 16) +// CHECK: declare void @func42(%struct.t128_2* frozen byval(%struct.t128_2) align 16) typedef struct xxx { __m128 array[2]; } Atwo128; @@ -334,7 +334,7 @@ func42(s); } -// CHECK-LABEL: define i32 @f44 +// CHECK-LABEL: define frozen i32 @f44 // CHECK: ptrtoint // CHECK-NEXT: add i64 %{{[0-9]+}}, 31 // CHECK-NEXT: and i64 %{{[0-9]+}}, -32 @@ -350,7 +350,7 @@ } // Text that vec3 returns the correct LLVM IR type. -// AVX-LABEL: define i32 @foo(<3 x i64> %X) +// AVX-LABEL: define frozen i32 @foo(<3 x i64> frozen %X) typedef long long3 __attribute((ext_vector_type(3))); int foo(long3 X) { @@ -360,7 +360,7 @@ // Make sure we don't use a varargs convention for a function without a // prototype where AVX types are involved. // AVX: @test45 -// AVX: call i32 bitcast (i32 (...)* @f45 to i32 (<8 x float>)*) +// AVX: call frozen i32 bitcast (i32 (...)* @f45 to i32 (<8 x float>)*) int f45(); __m256 x45; void test45() { f45(x45); } @@ -368,7 +368,7 @@ // Make sure we use byval to pass 64-bit vectors in memory; the LLVM call // lowering can't handle this case correctly because it runs after legalization. // CHECK: @test46 -// CHECK: call void @f46({{.*}}<2 x float>* byval(<2 x float>) align 8 {{.*}}, <2 x float>* byval(<2 x float>) align 8 {{.*}}) +// CHECK: call void @f46({{.*}}<2 x float>* frozen byval(<2 x float>) align 8 {{.*}}, <2 x float>* frozen byval(<2 x float>) align 8 {{.*}}) typedef float v46 __attribute((vector_size(8))); void f46(v46,v46,v46,v46,v46,v46,v46,v46,v46,v46); void test46() { v46 x = {1,2}; f46(x,x,x,x,x,x,x,x,x,x); } @@ -409,7 +409,7 @@ // CHECK-LABEL: define void @test49( // CHECK: [[T0:%.*]] = load double, double* // CHECK-NEXT: [[T1:%.*]] = load double, double* -// CHECK-NEXT: call void (double, ...) @test49_helper(double [[T0]], double [[T1]]) +// CHECK-NEXT: call void (double, ...) @test49_helper(double frozen [[T0]], double frozen [[T1]]) void test50_helper(); void test50(double d, double e) { @@ -418,7 +418,7 @@ // CHECK-LABEL: define void @test50( // CHECK: [[T0:%.*]] = load double, double* // CHECK-NEXT: [[T1:%.*]] = load double, double* -// CHECK-NEXT: call void (double, double, ...) bitcast (void (...)* @test50_helper to void (double, double, ...)*)(double [[T0]], double [[T1]]) +// CHECK-NEXT: call void (double, double, ...) bitcast (void (...)* @test50_helper to void (double, double, ...)*)(double frozen [[T0]], double frozen [[T1]]) struct test51_s { __uint128_t intval; }; void test51(struct test51_s *s, __builtin_va_list argList) { @@ -444,7 +444,7 @@ void test52() { test52_helper(0, x52, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0i); } -// AVX: @test52_helper(i32 0, <8 x float> {{%[a-zA-Z0-9]+}}, double 1.000000e+00, double 1.000000e+00, double 1.000000e+00, double 1.000000e+00, double 1.000000e+00, double 1.000000e+00, double {{%[a-zA-Z0-9]+}}, double {{%[a-zA-Z0-9]+}}) +// AVX: @test52_helper(i32 frozen 0, <8 x float> frozen {{%[a-zA-Z0-9]+}}, double frozen 1.000000e+00, double frozen 1.000000e+00, double frozen 1.000000e+00, double frozen 1.000000e+00, double frozen 1.000000e+00, double frozen 1.000000e+00, double frozen {{%[a-zA-Z0-9]+}}, double frozen {{%[a-zA-Z0-9]+}}) void test53(__m256 *m, __builtin_va_list argList) { *m = __builtin_va_arg(argList, __m256); @@ -459,8 +459,8 @@ test54_helper(x54, x54, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0i); test54_helper(x54, x54, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0i); } -// AVX: @test54_helper(<8 x float> {{%[a-zA-Z0-9]+}}, <8 x float> {{%[a-zA-Z0-9]+}}, double 1.000000e+00, double 1.000000e+00, double 1.000000e+00, double 1.000000e+00, double 1.000000e+00, double {{%[a-zA-Z0-9]+}}, double {{%[a-zA-Z0-9]+}}) -// AVX: @test54_helper(<8 x float> {{%[a-zA-Z0-9]+}}, <8 x float> {{%[a-zA-Z0-9]+}}, double 1.000000e+00, double 1.000000e+00, double 1.000000e+00, double 1.000000e+00, double 1.000000e+00, double 1.000000e+00, { double, double }* byval({ double, double }) align 8 {{%[^)]+}}) +// AVX: @test54_helper(<8 x float> frozen {{%[a-zA-Z0-9]+}}, <8 x float> frozen {{%[a-zA-Z0-9]+}}, double frozen 1.000000e+00, double frozen 1.000000e+00, double frozen 1.000000e+00, double frozen 1.000000e+00, double frozen 1.000000e+00, double frozen {{%[a-zA-Z0-9]+}}, double frozen {{%[a-zA-Z0-9]+}}) +// AVX: @test54_helper(<8 x float> frozen {{%[a-zA-Z0-9]+}}, <8 x float> frozen {{%[a-zA-Z0-9]+}}, double frozen 1.000000e+00, double frozen 1.000000e+00, double frozen 1.000000e+00, double frozen 1.000000e+00, double frozen 1.000000e+00, double frozen 1.000000e+00, { double, double }* frozen byval({ double, double }) align 8 {{%[^)]+}}) typedef float __m512 __attribute__ ((__vector_size__ (64))); typedef struct { @@ -474,20 +474,20 @@ // as per https://github.com/hjl-tools/x86-psABI/commit/30f9c9 3.2.3p2 Rule 1 // // AVX512: declare void @f55(<16 x float>) -// NO-AVX512: declare void @f55(%struct.s512* byval(%struct.s512) align 64) +// NO-AVX512: declare void @f55(%struct.s512* frozen byval(%struct.s512) align 64) void f55(s512 x); // __m512 has type SSE/SSEUP on AVX512. // -// AVX512: declare void @f56(<16 x float>) -// NO-AVX512: declare void @f56(<16 x float>* byval(<16 x float>) align 64) +// AVX512: declare void @f56(<16 x float> frozen) +// NO-AVX512: declare void @f56(<16 x float>* frozen byval(<16 x float>) align 64) void f56(__m512 x); void f57() { f55(x55); f56(x56); } // Like for __m128 on AVX, check that the struct below is passed // in the same way regardless of AVX512 being used. // -// CHECK: declare void @f58(%struct.t256* byval(%struct.t256) align 32) +// CHECK: declare void @f58(%struct.t256* frozen byval(%struct.t256) align 32) typedef struct t256 { __m256 m; __m256 n; @@ -498,7 +498,7 @@ f58(s); } -// CHECK: declare void @f60(%struct.sat256* byval(%struct.sat256) align 32) +// CHECK: declare void @f60(%struct.sat256* frozen byval(%struct.sat256) align 32) typedef struct at256 { __m256 array[2]; } Atwo256; @@ -511,7 +511,7 @@ f60(s); } -// AVX512: @f62_helper(i32 0, <16 x float> {{%[a-zA-Z0-9]+}}, double 1.000000e+00, double 1.000000e+00, double 1.000000e+00, double 1.000000e+00, double 1.000000e+00, double 1.000000e+00, double {{%[a-zA-Z0-9]+}}, double {{%[a-zA-Z0-9]+}}) +// AVX512: @f62_helper(i32 frozen 0, <16 x float> frozen {{%[a-zA-Z0-9]+}}, double frozen 1.000000e+00, double frozen 1.000000e+00, double frozen 1.000000e+00, double frozen 1.000000e+00, double frozen 1.000000e+00, double frozen 1.000000e+00, double frozen {{%[a-zA-Z0-9]+}}, double frozen {{%[a-zA-Z0-9]+}}) void f62_helper(int, ...); __m512 x62; void f62() { @@ -528,8 +528,8 @@ *m = __builtin_va_arg(argList, __m512); } -// AVX512: @f64_helper(<16 x float> {{%[a-zA-Z0-9]+}}, <16 x float> {{%[a-zA-Z0-9]+}}, double 1.000000e+00, double 1.000000e+00, double 1.000000e+00, double 1.000000e+00, double 1.000000e+00, double {{%[a-zA-Z0-9]+}}, double {{%[a-zA-Z0-9]+}}) -// AVX512: @f64_helper(<16 x float> {{%[a-zA-Z0-9]+}}, <16 x float> {{%[a-zA-Z0-9]+}}, double 1.000000e+00, double 1.000000e+00, double 1.000000e+00, double 1.000000e+00, double 1.000000e+00, double 1.000000e+00, { double, double }* byval({ double, double }) align 8 {{%[^)]+}}) +// AVX512: @f64_helper(<16 x float> frozen {{%[a-zA-Z0-9]+}}, <16 x float> frozen {{%[a-zA-Z0-9]+}}, double frozen 1.000000e+00, double frozen 1.000000e+00, double frozen 1.000000e+00, double frozen 1.000000e+00, double frozen 1.000000e+00, double frozen {{%[a-zA-Z0-9]+}}, double frozen {{%[a-zA-Z0-9]+}}) +// AVX512: @f64_helper(<16 x float> frozen {{%[a-zA-Z0-9]+}}, <16 x float> frozen {{%[a-zA-Z0-9]+}}, double frozen 1.000000e+00, double frozen 1.000000e+00, double frozen 1.000000e+00, double frozen 1.000000e+00, double frozen 1.000000e+00, double frozen 1.000000e+00, { double, double }* frozen byval({ double, double }) align 8 {{%[^)]+}}) void f64_helper(__m512, ...); __m512 x64; void f64() { @@ -541,7 +541,7 @@ __m256 m; int : 0; }; -// SSE-LABEL: @f65(%struct.t65* byval(%struct.t65) align 32 %{{[^,)]+}}) +// SSE-LABEL: @f65(%struct.t65* frozen byval(%struct.t65) align 32 %{{[^,)]+}}) // AVX: @f65(<8 x float> %{{[^,)]+}}) void f65(struct t65 a0) { } diff --git a/clang/test/CodeGen/x86_64-atomic-128.c b/clang/test/CodeGen/x86_64-atomic-128.c --- a/clang/test/CodeGen/x86_64-atomic-128.c +++ b/clang/test/CodeGen/x86_64-atomic-128.c @@ -1,7 +1,7 @@ // RUN: %clang_cc1 -triple x86_64-linux-gnu -target-cpu core2 %s -S -emit-llvm -o - | FileCheck %s // All atomics up to 16 bytes should be emitted inline on x86_64. The -// backend can reform __sync_whatever calls if necessary (e.g. the CPU +// backend can reform __sync_whatever calls if necessary (e.g. CPU the // doesn't have cmpxchg16b). __int128 test_sync_call(__int128 *addr, __int128 val) { diff --git a/clang/test/CodeGen/x86_64-floatvectors.c b/clang/test/CodeGen/x86_64-floatvectors.c --- a/clang/test/CodeGen/x86_64-floatvectors.c +++ b/clang/test/CodeGen/x86_64-floatvectors.c @@ -11,7 +11,7 @@ vec3f vec = __builtin_va_arg(ap, vec3f); return vec.x + vec.y + vec.z; } -// CHECK: define double @Vec3FTest +// CHECK: define frozen double @Vec3FTest // CHECK: vaarg.in_reg: // CHECK: [[Vec3FLoad1:%.*]] = load <2 x float>, <2 x float>* // CHECK: [[Vec3FGEP1:%.*]] = getelementptr inbounds { <2 x float>, float }, { <2 x float>, float }* {{%.*}}, i32 0, i32 0 @@ -28,7 +28,7 @@ vec4f vec = __builtin_va_arg(ap, vec4f); return vec.x + vec.y + vec.z + vec.q; } -// CHECK: define double @Vec4FTest +// CHECK: define frozen double @Vec4FTest // CHECK: vaarg.in_reg: // CHECK: [[Vec4FLoad1:%.*]] = load <2 x float>, <2 x float>* // CHECK: [[Vec4FGEP1:%.*]] = getelementptr inbounds { <2 x float>, <2 x float> }, { <2 x float>, <2 x float> }* {{%.*}}, i32 0, i32 0 @@ -44,7 +44,7 @@ vec2d vec = __builtin_va_arg(ap, vec2d); return vec.x + vec.y; } -// CHECK: define double @Vec2DTest +// CHECK: define frozen double @Vec2DTest // CHECK: vaarg.in_reg: // CHECK: [[Vec2DLoad1:%.*]] = load double, double* // CHECK: [[Vec2DGEP1:%.*]] = getelementptr inbounds { double, double }, { double, double }* {{%.*}}, i32 0, i32 0 @@ -63,7 +63,7 @@ vec2f1d vec = __builtin_va_arg(ap, vec2f1d); return vec.x + vec.y + vec.z; } -// CHECK: define double @Vec2F1DTest +// CHECK: define frozen double @Vec2F1DTest // CHECK: vaarg.in_reg: // CHECK: [[Vec2F1DLoad1:%.*]] = load <2 x float>, <2 x float>* // CHECK: [[Vec2F1DGEP1:%.*]] = getelementptr inbounds { <2 x float>, double }, { <2 x float>, double }* {{%.*}}, i32 0, i32 0 @@ -82,7 +82,7 @@ vec1d2f vec = __builtin_va_arg(ap, vec1d2f); return vec.x + vec.y + vec.z; } -// CHECK: define double @Vec1D2FTest +// CHECK: define frozen double @Vec1D2FTest // CHECK: vaarg.in_reg: // CHECK: [[Vec1D2FLoad1:%.*]] = load double, double* // CHECK: [[Vec1D2FGEP1:%.*]] = getelementptr inbounds { double, <2 x float> }, { double, <2 x float> }* {{%.*}}, i32 0, i32 0 @@ -101,7 +101,7 @@ vec1f1d vec = __builtin_va_arg(ap, vec1f1d); return vec.x + vec.z; } -// CHECK: define double @Vec1F1DTest +// CHECK: define frozen double @Vec1F1DTest // CHECK: vaarg.in_reg: // CHECK: [[Vec1F1DLoad1:%.*]] = load float, float* // CHECK: [[Vec1F1DGEP1:%.*]] = getelementptr inbounds { float, double }, { float, double }* {{%.*}}, i32 0, i32 0 @@ -120,7 +120,7 @@ vec1d1f vec = __builtin_va_arg(ap, vec1d1f); return vec.x + vec.z; } -// CHECK: define double @Vec1D1FTest +// CHECK: define frozen double @Vec1D1FTest // CHECK: vaarg.in_reg: // CHECK: [[Vec1D1FLoad1:%.*]] = load double, double* // CHECK: [[Vec1D1FGEP1:%.*]] = getelementptr inbounds { double, float }, { double, float }* {{%.*}}, i32 0, i32 0 diff --git a/clang/test/CodeGen/x86_64-longdouble.c b/clang/test/CodeGen/x86_64-longdouble.c --- a/clang/test/CodeGen/x86_64-longdouble.c +++ b/clang/test/CodeGen/x86_64-longdouble.c @@ -20,16 +20,16 @@ long double TestLD(long double x) { return x * x; -// ANDROID: define fp128 @TestLD(fp128 %x) -// GNU: define x86_fp80 @TestLD(x86_fp80 %x) -// NACL: define double @TestLD(double %x) +// ANDROID: define frozen fp128 @TestLD(fp128 frozen %x) +// GNU: define frozen x86_fp80 @TestLD(x86_fp80 frozen %x) +// NACL: define frozen double @TestLD(double frozen %x) } long double _Complex TestLDC(long double _Complex x) { return x * x; // ANDROID: define void @TestLDC({ fp128, fp128 }* {{.*}}, { fp128, fp128 }* {{.*}} %x) -// GNU: define { x86_fp80, x86_fp80 } @TestLDC({ x86_fp80, x86_fp80 }* {{.*}} %x) -// NACL: define { double, double } @TestLDC(double %x{{.*}}, double %x{{.*}}) +// GNU: define frozen { x86_fp80, x86_fp80 } @TestLDC({ x86_fp80, x86_fp80 }* {{.*}} %x) +// NACL: define frozen { double, double } @TestLDC(double frozen %x{{.*}}, double frozen %x{{.*}}) } typedef __builtin_va_list va_list; @@ -37,7 +37,7 @@ int TestGetVarInt(va_list ap) { return __builtin_va_arg(ap, int); // Since int can be passed in memory or register there are two branches. -// CHECK: define i32 @TestGetVarInt( +// CHECK: define frozen i32 @TestGetVarInt( // CHECK: br label // CHECK: br label // CHECK: = phi @@ -47,7 +47,7 @@ double TestGetVarDouble(va_list ap) { return __builtin_va_arg(ap, double); // Since double can be passed in memory or register there are two branches. -// CHECK: define double @TestGetVarDouble( +// CHECK: define frozen double @TestGetVarDouble( // CHECK: br label // CHECK: br label // CHECK: = phi @@ -58,9 +58,9 @@ return __builtin_va_arg(ap, long double); // fp128 and double can be passed in memory or in register, but x86_fp80 is in // memory. -// ANDROID: define fp128 @TestGetVarLD( -// GNU: define x86_fp80 @TestGetVarLD( -// NACL: define double @TestGetVarLD( +// ANDROID: define frozen fp128 @TestGetVarLD( +// GNU: define frozen x86_fp80 @TestGetVarLD( +// NACL: define frozen double @TestGetVarLD( // ANDROID: br label // ANDROID: br label // NACL: br @@ -76,9 +76,9 @@ return __builtin_va_arg(ap, long double _Complex); // Pair of fp128 or x86_fp80 are passed as struct in memory. // ANDROID: define void @TestGetVarLDC({ fp128, fp128 }* {{.*}}, %struct.__va_list_tag* -// GNU: define { x86_fp80, x86_fp80 } @TestGetVarLDC( +// GNU: define frozen { x86_fp80, x86_fp80 } @TestGetVarLDC( // Pair of double can go in SSE registers or memory -// NACL: define { double, double } @TestGetVarLDC( +// NACL: define frozen { double, double } @TestGetVarLDC( // ANDROID-NOT: br // GNU-NOT: br // NACL: br @@ -94,30 +94,30 @@ void TestPassVarInt(int x) { TestVarArg("A", x); -// CHECK: define void @TestPassVarInt(i32 %x) -// CHECK: call {{.*}} @TestVarArg(i8* {{.*}}, i32 %x) +// CHECK: define void @TestPassVarInt(i32 frozen %x) +// CHECK: call {{.*}} @TestVarArg(i8* {{.*}}, i32 frozen %x) } void TestPassVarFloat(float x) { TestVarArg("A", x); -// CHECK: define void @TestPassVarFloat(float %x) -// CHECK: call {{.*}} @TestVarArg(i8* {{.*}}, double % +// CHECK: define void @TestPassVarFloat(float frozen %x) +// CHECK: call {{.*}} @TestVarArg(i8* {{.*}}, double frozen % } void TestPassVarDouble(double x) { TestVarArg("A", x); -// CHECK: define void @TestPassVarDouble(double %x) -// CHECK: call {{.*}} @TestVarArg(i8* {{.*}}, double %x +// CHECK: define void @TestPassVarDouble(double frozen %x) +// CHECK: call {{.*}} @TestVarArg(i8* {{.*}}, double frozen %x } void TestPassVarLD(long double x) { TestVarArg("A", x); -// ANDROID: define void @TestPassVarLD(fp128 %x) -// ANDROID: call {{.*}} @TestVarArg(i8* {{.*}}, fp128 %x -// GNU: define void @TestPassVarLD(x86_fp80 %x) -// GNU: call {{.*}} @TestVarArg(i8* {{.*}}, x86_fp80 %x -// NACL: define void @TestPassVarLD(double %x) -// NACL: call {{.*}} @TestVarArg(i8* {{.*}}, double %x +// ANDROID: define void @TestPassVarLD(fp128 frozen %x) +// ANDROID: call {{.*}} @TestVarArg(i8* {{.*}}, fp128 frozen %x +// GNU: define void @TestPassVarLD(x86_fp80 frozen %x) +// GNU: call {{.*}} @TestVarArg(i8* {{.*}}, x86_fp80 frozen %x +// NACL: define void @TestPassVarLD(double frozen %x) +// NACL: call {{.*}} @TestVarArg(i8* {{.*}}, double frozen %x } void TestPassVarLDC(long double _Complex x) { @@ -130,6 +130,6 @@ // GNU: store x86_fp80 %{{.*}}, x86_fp80* % // GNU-NEXT: store x86_fp80 %{{.*}}, x86_fp80* % // GNU-NEXT: call {{.*}} @TestVarArg(i8* {{.*}}, { x86_fp80, x86_fp80 }* {{.*}} % -// NACL: define void @TestPassVarLDC(double %x{{.*}}, double %x{{.*}}) -// NACL: call {{.*}} @TestVarArg(i8* {{.*}}, double %x{{.*}}, double %x{{.*}}) +// NACL: define void @TestPassVarLDC(double frozen %x{{.*}}, double frozen %x{{.*}}) +// NACL: call {{.*}} @TestVarArg(i8* {{.*}}, double frozen %x{{.*}}, double frozen %x{{.*}}) } diff --git a/clang/test/CodeGen/xcore-abi.c b/clang/test/CodeGen/xcore-abi.c --- a/clang/test/CodeGen/xcore-abi.c +++ b/clang/test/CodeGen/xcore-abi.c @@ -38,7 +38,7 @@ // CHECK: [[V1:%[a-z0-9]+]] = load i8*, i8** [[P]] // CHECK: store i8* [[V1]], i8** [[V:%[a-z0-9]+]], align 4 // CHECK: [[V2:%[a-z0-9]+]] = load i8*, i8** [[V]], align 4 - // CHECK: call void @f(i8* [[V2]]) + // CHECK: call void @f(i8* frozen [[V2]]) char v2 = va_arg (ap, char); // expected-warning{{second argument to 'va_arg' is of promotable type 'char'}} f(&v2); @@ -47,7 +47,7 @@ // CHECK: store i8* [[IN]], i8** [[AP]] // CHECK: [[V1:%[a-z0-9]+]] = load i8, i8* [[I]] // CHECK: store i8 [[V1]], i8* [[V:%[a-z0-9]+]], align 1 - // CHECK: call void @f(i8* [[V]]) + // CHECK: call void @f(i8* frozen [[V]]) int v3 = va_arg (ap, int); f(&v3); @@ -58,7 +58,7 @@ // CHECK: [[V1:%[a-z0-9]+]] = load i32, i32* [[P]] // CHECK: store i32 [[V1]], i32* [[V:%[a-z0-9]+]], align 4 // CHECK: [[V2:%[a-z0-9]+]] = bitcast i32* [[V]] to i8* - // CHECK: call void @f(i8* [[V2]]) + // CHECK: call void @f(i8* frozen [[V2]]) long long int v4 = va_arg (ap, long long int); f(&v4); @@ -69,7 +69,7 @@ // CHECK: [[V1:%[a-z0-9]+]] = load i64, i64* [[P]] // CHECK: store i64 [[V1]], i64* [[V:%[a-z0-9]+]], align 4 // CHECK:[[V2:%[a-z0-9]+]] = bitcast i64* [[V]] to i8* - // CHECK: call void @f(i8* [[V2]]) + // CHECK: call void @f(i8* frozen [[V2]]) struct x v5 = va_arg (ap, struct x); // typical aggregate type f(&v5); @@ -82,7 +82,7 @@ // CHECK: [[P1:%[a-z0-9]+]] = bitcast %struct.x* [[P]] to i8* // CHECK: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[V1]], i8* align 4 [[P1]], i32 20, i1 false) // CHECK: [[V2:%[a-z0-9]+]] = bitcast %struct.x* [[V]] to i8* - // CHECK: call void @f(i8* [[V2]]) + // CHECK: call void @f(i8* frozen [[V2]]) int* v6 = va_arg (ap, int[4]); // an unusual aggregate type f(v6); @@ -98,7 +98,7 @@ // CHECK: store i32* [[V2]], i32** [[V:%[a-z0-9]+]], align 4 // CHECK: [[V3:%[a-z0-9]+]] = load i32*, i32** [[V]], align 4 // CHECK: [[V4:%[a-z0-9]+]] = bitcast i32* [[V3]] to i8* - // CHECK: call void @f(i8* [[V4]]) + // CHECK: call void @f(i8* frozen [[V4]]) double v7 = va_arg (ap, double); f(&v7); @@ -109,7 +109,7 @@ // CHECK: [[V1:%[a-z0-9]+]] = load double, double* [[P]] // CHECK: store double [[V1]], double* [[V:%[a-z0-9]+]], align 4 // CHECK: [[V2:%[a-z0-9]+]] = bitcast double* [[V]] to i8* - // CHECK: call void @f(i8* [[V2]]) + // CHECK: call void @f(i8* frozen [[V2]]) } void testbuiltin (void) { @@ -132,7 +132,7 @@ res = __builtin_eh_return_data_regno(2); } -// CHECK-LABEL: define zeroext i8 @testchar() +// CHECK-LABEL: define frozen zeroext i8 @testchar() // CHECK: ret i8 -1 char testchar (void) { return (char)-1; diff --git a/clang/test/CodeGen/xray-instruction-threshold.cpp b/clang/test/CodeGen/xray-instruction-threshold.cpp --- a/clang/test/CodeGen/xray-instruction-threshold.cpp +++ b/clang/test/CodeGen/xray-instruction-threshold.cpp @@ -8,7 +8,7 @@ return 2; } -// CHECK: define i32 @_Z3foov() #[[THRESHOLD:[0-9]+]] { -// CHECK: define i32 @_Z3barv() #[[NEVERATTR:[0-9]+]] { +// CHECK: define frozen i32 @_Z3foov() #[[THRESHOLD:[0-9]+]] { +// CHECK: define frozen i32 @_Z3barv() #[[NEVERATTR:[0-9]+]] { // CHECK-DAG: attributes #[[THRESHOLD]] = {{.*}} "xray-instruction-threshold"="1" {{.*}} // CHECK-DAG: attributes #[[NEVERATTR]] = {{.*}} "function-instrument"="xray-never" {{.*}} diff --git a/clang/test/CodeGen/xray-log-args.cpp b/clang/test/CodeGen/xray-log-args.cpp --- a/clang/test/CodeGen/xray-log-args.cpp +++ b/clang/test/CodeGen/xray-log-args.cpp @@ -2,11 +2,11 @@ // Make sure that the LLVM attribute for XRay-annotated functions do show up. [[clang::xray_always_instrument,clang::xray_log_args(1)]] void foo(int a) { -// CHECK: define void @_Z3fooi(i32 %a) #0 +// CHECK: define void @_Z3fooi(i32 frozen %a) #0 }; [[clang::xray_log_args(1)]] void bar(int a) { -// CHECK: define void @_Z3bari(i32 %a) #1 +// CHECK: define void @_Z3bari(i32 frozen %a) #1 }; // CHECK: #0 = {{.*}}"function-instrument"="xray-always"{{.*}}"xray-log-args"="1" diff --git a/clang/test/CodeGenCUDA/address-spaces.cu b/clang/test/CodeGenCUDA/address-spaces.cu --- a/clang/test/CodeGenCUDA/address-spaces.cu +++ b/clang/test/CodeGenCUDA/address-spaces.cu @@ -60,7 +60,7 @@ callee(&a); // implicit cast from parameters } // CHECK: define void @_Z5func1v() -// CHECK: call void @_Z6calleePf(float* addrspacecast (float addrspace(3)* @_ZZ5func1vE1a to float*)) +// CHECK: call void @_Z6calleePf(float* frozen addrspacecast (float addrspace(3)* @_ZZ5func1vE1a to float*)) __device__ void func2() { __shared__ float a[256]; @@ -91,5 +91,5 @@ __device__ float *func5() { return &b; // implicit cast from a return value } -// CHECK: define float* @_Z5func5v() +// CHECK: define frozen float* @_Z5func5v() // CHECK: ret float* addrspacecast (float addrspace(3)* @b to float*) diff --git a/clang/test/CodeGenCUDA/amdgpu-kernel-arg-pointer-type.cu b/clang/test/CodeGenCUDA/amdgpu-kernel-arg-pointer-type.cu --- a/clang/test/CodeGenCUDA/amdgpu-kernel-arg-pointer-type.cu +++ b/clang/test/CodeGenCUDA/amdgpu-kernel-arg-pointer-type.cu @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -fcuda-is-device -emit-llvm -x hip %s -o - | FileCheck %s -// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -emit-llvm -x hip %s -o - | FileCheck -check-prefix=HOST %s +// RUN: %clang_cc1 -disable-frozen-args -triple amdgcn-amd-amdhsa -fcuda-is-device -emit-llvm -x hip %s -o - | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args -triple x86_64-unknown-linux-gnu -emit-llvm -x hip %s -o - | FileCheck -check-prefix=HOST %s #include "Inputs/cuda.h" diff --git a/clang/test/CodeGenCUDA/cuda-builtin-vars.cu b/clang/test/CodeGenCUDA/cuda-builtin-vars.cu --- a/clang/test/CodeGenCUDA/cuda-builtin-vars.cu +++ b/clang/test/CodeGenCUDA/cuda-builtin-vars.cu @@ -2,7 +2,7 @@ #include "__clang_cuda_builtin_vars.h" -// CHECK: define void @_Z6kernelPi(i32* %out) +// CHECK: define void @_Z6kernelPi(i32* frozen %out) __attribute__((global)) void kernel(int *out) { int i = 0; diff --git a/clang/test/CodeGenCUDA/device-var-init.cu b/clang/test/CodeGenCUDA/device-var-init.cu --- a/clang/test/CodeGenCUDA/device-var-init.cu +++ b/clang/test/CodeGenCUDA/device-var-init.cu @@ -220,41 +220,41 @@ T t; // DEVICE-NOT: call EC ec; - // DEVICE: call void @_ZN2ECC1Ev(%struct.EC* %[[ec]]) + // DEVICE: call void @_ZN2ECC1Ev(%struct.EC* frozen %[[ec]]) ED ed; // DEVICE-NOT: call ECD ecd; - // DEVICE: call void @_ZN3ECDC1Ev(%struct.ECD* %[[ecd]]) + // DEVICE: call void @_ZN3ECDC1Ev(%struct.ECD* frozen %[[ecd]]) ETC etc; - // DEVICE: call void @_ZN3ETCC1IJEEEDpT_(%struct.ETC* %[[etc]]) + // DEVICE: call void @_ZN3ETCC1IJEEEDpT_(%struct.ETC* frozen %[[etc]]) UC uc; // undefined constructor -- not allowed - // DEVICE: call void @_ZN2UCC1Ev(%struct.UC* %[[uc]]) + // DEVICE: call void @_ZN2UCC1Ev(%struct.UC* frozen %[[uc]]) UD ud; // undefined destructor -- not allowed // DEVICE-NOT: call ECI eci; // empty constructor w/ initializer list -- not allowed - // DEVICE: call void @_ZN3ECIC1Ev(%struct.ECI* %[[eci]]) + // DEVICE: call void @_ZN3ECIC1Ev(%struct.ECI* frozen %[[eci]]) NEC nec; // non-empty constructor -- not allowed - // DEVICE: call void @_ZN3NECC1Ev(%struct.NEC* %[[nec]]) + // DEVICE: call void @_ZN3NECC1Ev(%struct.NEC* frozen %[[nec]]) // non-empty destructor -- not allowed NED ned; // no-constructor, virtual method -- not allowed - // DEVICE: call void @_ZN3NCVC1Ev(%struct.NCV* %[[ncv]]) + // DEVICE: call void @_ZN3NCVC1Ev(%struct.NCV* frozen %[[ncv]]) NCV ncv; // DEVICE-NOT: call VD vd; - // DEVICE: call void @_ZN2VDC1Ev(%struct.VD* %[[vd]]) + // DEVICE: call void @_ZN2VDC1Ev(%struct.VD* frozen %[[vd]]) NCF ncf; - // DEVICE: call void @_ZN3NCFC1Ev(%struct.NCF* %[[ncf]]) + // DEVICE: call void @_ZN3NCFC1Ev(%struct.NCF* frozen %[[ncf]]) NCFS ncfs; - // DEVICE: call void @_ZN4NCFSC1Ev(%struct.NCFS* %[[ncfs]]) + // DEVICE: call void @_ZN4NCFSC1Ev(%struct.NCFS* frozen %[[ncfs]]) UTC utc; - // DEVICE: call void @_ZN3UTCC1IJEEEDpT_(%struct.UTC* %[[utc]]) + // DEVICE: call void @_ZN3UTCC1IJEEEDpT_(%struct.UTC* frozen %[[utc]]) NETC netc; - // DEVICE: call void @_ZN4NETCC1IJEEEDpT_(%struct.NETC* %[[netc]]) + // DEVICE: call void @_ZN4NETCC1IJEEEDpT_(%struct.NETC* frozen %[[netc]]) T_B_T t_b_t; // DEVICE-NOT: call T_F_T t_f_t; @@ -262,17 +262,17 @@ T_FA_T t_fa_t; // DEVICE-NOT: call EC_I_EC ec_i_ec; - // DEVICE: call void @_ZN7EC_I_ECC1Ev(%struct.EC_I_EC* %[[ec_i_ec]]) + // DEVICE: call void @_ZN7EC_I_ECC1Ev(%struct.EC_I_EC* frozen %[[ec_i_ec]]) EC_I_EC1 ec_i_ec1; - // DEVICE: call void @_ZN8EC_I_EC1C1Ev(%struct.EC_I_EC1* %[[ec_i_ec1]]) + // DEVICE: call void @_ZN8EC_I_EC1C1Ev(%struct.EC_I_EC1* frozen %[[ec_i_ec1]]) T_V_T t_v_t; - // DEVICE: call void @_ZN5T_V_TC1Ev(%struct.T_V_T* %[[t_v_t]]) + // DEVICE: call void @_ZN5T_V_TC1Ev(%struct.T_V_T* frozen %[[t_v_t]]) T_B_NEC t_b_nec; - // DEVICE: call void @_ZN7T_B_NECC1Ev(%struct.T_B_NEC* %[[t_b_nec]]) + // DEVICE: call void @_ZN7T_B_NECC1Ev(%struct.T_B_NEC* frozen %[[t_b_nec]]) T_F_NEC t_f_nec; - // DEVICE: call void @_ZN7T_F_NECC1Ev(%struct.T_F_NEC* %[[t_f_nec]]) + // DEVICE: call void @_ZN7T_F_NECC1Ev(%struct.T_F_NEC* frozen %[[t_f_nec]]) T_FA_NEC t_fa_nec; - // DEVICE: call void @_ZN8T_FA_NECC1Ev(%struct.T_FA_NEC* %[[t_fa_nec]]) + // DEVICE: call void @_ZN8T_FA_NECC1Ev(%struct.T_FA_NEC* frozen %[[t_fa_nec]]) T_B_NED t_b_ned; // DEVICE-NOT: call T_F_NED t_f_ned; @@ -280,9 +280,9 @@ T_FA_NED t_fa_ned; // DEVICE-NOT: call static __shared__ EC s_ec; - // DEVICE-NOT: call void @_ZN2ECC1Ev(%struct.EC* addrspacecast (%struct.EC addrspace(3)* @_ZZ2dfvE4s_ec to %struct.EC*)) + // DEVICE-NOT: call void @_ZN2ECC1Ev(%struct.EC* addrspacecast (%struct.EC addrspace(3)* @_ZZ2dfvE4s_ec frozen to %struct.EC*)) static __shared__ ETC s_etc; - // DEVICE-NOT: call void @_ZN3ETCC1IJEEEDpT_(%struct.ETC* addrspacecast (%struct.ETC addrspace(3)* @_ZZ2dfvE5s_etc to %struct.ETC*)) + // DEVICE-NOT: call void @_ZN3ETCC1IJEEEDpT_(%struct.ETC* addrspacecast (%struct.ETC addrspace(3)* @_ZZ2dfvE5s_etc frozen to %struct.ETC*)) static const int const_array[] = {1, 2, 3, 4, 5}; static const int const_int = 123; @@ -291,14 +291,14 @@ df(); // DEVICE: call void @_Z2dfv() // Verify that we only call non-empty destructors - // DEVICE-NEXT: call void @_ZN8T_FA_NEDD1Ev(%struct.T_FA_NED* %[[t_fa_ned]]) - // DEVICE-NEXT: call void @_ZN7T_F_NEDD1Ev(%struct.T_F_NED* %[[t_f_ned]]) - // DEVICE-NEXT: call void @_ZN7T_B_NEDD1Ev(%struct.T_B_NED* %[[t_b_ned]]) - // DEVICE-NEXT: call void @_ZN2VDD1Ev(%struct.VD* %[[vd]]) - // DEVICE-NEXT: call void @_ZN3NEDD1Ev(%struct.NED* %[[ned]]) - // DEVICE-NEXT: call void @_ZN2UDD1Ev(%struct.UD* %[[ud]]) - // DEVICE-NEXT: call void @_ZN3ECDD1Ev(%struct.ECD* %[[ecd]]) - // DEVICE-NEXT: call void @_ZN2EDD1Ev(%struct.ED* %[[ed]]) + // DEVICE-NEXT: call void @_ZN8T_FA_NEDD1Ev(%struct.T_FA_NED* frozen %[[t_fa_ned]]) + // DEVICE-NEXT: call void @_ZN7T_F_NEDD1Ev(%struct.T_F_NED* frozen %[[t_f_ned]]) + // DEVICE-NEXT: call void @_ZN7T_B_NEDD1Ev(%struct.T_B_NED* frozen %[[t_b_ned]]) + // DEVICE-NEXT: call void @_ZN2VDD1Ev(%struct.VD* frozen %[[vd]]) + // DEVICE-NEXT: call void @_ZN3NEDD1Ev(%struct.NED* frozen %[[ned]]) + // DEVICE-NEXT: call void @_ZN2UDD1Ev(%struct.UD* frozen %[[ud]]) + // DEVICE-NEXT: call void @_ZN3ECDD1Ev(%struct.ECD* frozen %[[ecd]]) + // DEVICE-NEXT: call void @_ZN2EDD1Ev(%struct.ED* frozen %[[ed]]) // DEVICE-NEXT: ret void } diff --git a/clang/test/CodeGenCUDA/flush-denormals.cu b/clang/test/CodeGenCUDA/flush-denormals.cu --- a/clang/test/CodeGenCUDA/flush-denormals.cu +++ b/clang/test/CodeGenCUDA/flush-denormals.cu @@ -44,8 +44,8 @@ // FTZ: attributes #0 = {{.*}} "denormal-fp-math-f32"="preserve-sign,preserve-sign" // NOFTZ-NOT: "denormal-fp-math-f32" -// PTXFTZ:!llvm.module.flags = !{{{.*}}[[MODFLAG:![0-9]+]]} -// PTXFTZ:[[MODFLAG]] = !{i32 4, !"nvvm-reflect-ftz", i32 1} +// PTXFTZ:!llvm.module.flags = !{ +// PTXFTZ:[[MODFLAG:![0-9]+]] = !{i32 4, !"nvvm-reflect-ftz", i32 1} -// PTXNOFTZ:!llvm.module.flags = !{{{.*}}[[MODFLAG:![0-9]+]]} -// PTXNOFTZ:[[MODFLAG]] = !{i32 4, !"nvvm-reflect-ftz", i32 0} +// PTXNOFTZ:!llvm.module.flags = !{ +// PTXNOFTZ:[[MODFLAG:![0-9]+]] = !{i32 4, !"nvvm-reflect-ftz", i32 0} diff --git a/clang/test/CodeGenCUDA/kernel-args-alignment.cu b/clang/test/CodeGenCUDA/kernel-args-alignment.cu --- a/clang/test/CodeGenCUDA/kernel-args-alignment.cu +++ b/clang/test/CodeGenCUDA/kernel-args-alignment.cu @@ -1,11 +1,11 @@ // New CUDA kernel launch sequence does not require explicit specification of // size/offset for each argument, so only the old way is tested. // -// RUN: %clang_cc1 --std=c++11 -triple x86_64-unknown-linux-gnu -emit-llvm \ +// RUN: %clang_cc1 -disable-frozen-args --std=c++11 -triple x86_64-unknown-linux-gnu -emit-llvm \ // RUN: -target-sdk-version=8.0 -o - %s \ // RUN: | FileCheck -check-prefixes=HOST-OLD,CHECK %s -// RUN: %clang_cc1 --std=c++11 -fcuda-is-device -triple nvptx64-nvidia-cuda \ +// RUN: %clang_cc1 -disable-frozen-args --std=c++11 -fcuda-is-device -triple nvptx64-nvidia-cuda \ // RUN: -emit-llvm -o - %s | FileCheck -check-prefixes=DEVICE,CHECK %s #include "Inputs/cuda.h" diff --git a/clang/test/CodeGenCUDA/kernel-args.cu b/clang/test/CodeGenCUDA/kernel-args.cu --- a/clang/test/CodeGenCUDA/kernel-args.cu +++ b/clang/test/CodeGenCUDA/kernel-args.cu @@ -1,6 +1,6 @@ -// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -fcuda-is-device \ +// RUN: %clang_cc1 -disable-frozen-args -triple amdgcn-amd-amdhsa -fcuda-is-device \ // RUN: -emit-llvm %s -o - | FileCheck -check-prefix=AMDGCN %s -// RUN: %clang_cc1 -triple nvptx64-nvidia-cuda- -fcuda-is-device \ +// RUN: %clang_cc1 -disable-frozen-args -triple nvptx64-nvidia-cuda- -fcuda-is-device \ // RUN: -emit-llvm %s -o - | FileCheck -check-prefix=NVPTX %s #include "Inputs/cuda.h" diff --git a/clang/test/CodeGenCUDA/library-builtin.cu b/clang/test/CodeGenCUDA/library-builtin.cu --- a/clang/test/CodeGenCUDA/library-builtin.cu +++ b/clang/test/CodeGenCUDA/library-builtin.cu @@ -6,11 +6,11 @@ // RUN: %clang_cc1 -fcuda-is-device -triple nvptx64-nvidia-cuda \ // RUN: -emit-llvm -o - %s | FileCheck %s --check-prefixes=DEVICE,BOTH -// BOTH-LABEL: define float @logf(float +// BOTH-LABEL: define frozen float @logf(float // logf() should be calling itself recursively as we don't have any standard // library on device side. -// DEVICE: call contract float @logf(float +// DEVICE: call contract frozen float @logf(float extern "C" __attribute__((device)) float logf(float __x) { return logf(__x); } // NOTE: this case is to illustrate the expected differences in behavior between diff --git a/clang/test/CodeGenCUDA/surface.cu b/clang/test/CodeGenCUDA/surface.cu --- a/clang/test/CodeGenCUDA/surface.cu +++ b/clang/test/CodeGenCUDA/surface.cu @@ -1,9 +1,9 @@ // REQUIRES: x86-registered-target // REQUIRES: nvptx-registered-target -// RUN: %clang_cc1 -std=c++11 -fcuda-is-device -triple nvptx64-nvidia-cuda -emit-llvm -o - %s | FileCheck --check-prefix=DEVICE %s +// RUN: %clang_cc1 -disable-frozen-args -std=c++11 -fcuda-is-device -triple nvptx64-nvidia-cuda -emit-llvm -o - %s | FileCheck --check-prefix=DEVICE %s // RUN: echo "GPU binary would be here" > %t -// RUN: %clang_cc1 -std=c++11 -triple x86_64-unknown-linux-gnu -target-sdk-version=8.0 -fcuda-include-gpubinary %t -emit-llvm -o - %s | FileCheck --check-prefix=HOST %s +// RUN: %clang_cc1 -disable-frozen-args -std=c++11 -triple x86_64-unknown-linux-gnu -target-sdk-version=8.0 -fcuda-include-gpubinary %t -emit-llvm -o - %s | FileCheck --check-prefix=HOST %s struct surfaceReference { int desc; @@ -29,7 +29,7 @@ // DEVICE-LABEL: i32 @_Z3fooii(i32 %x, i32 %y) // DEVICE: call i64 @llvm.nvvm.texsurf.handle.internal.p1i64(i64 addrspace(1)* @surf) -// DEVICE: call i32 @llvm.nvvm.suld.2d.i32.zero(i64 %{{.*}}, i32 %{{.*}}, i32 %{{.*}}) +// DEVICE: call frozen i32 @llvm.nvvm.suld.2d.i32.zero(i64 %{{.*}}, i32 %{{.*}}, i32 %{{.*}}) __attribute__((device)) int foo(int x, int y) { return suld_2d_zero(surf, x, y); } diff --git a/clang/test/CodeGenCUDA/texture.cu b/clang/test/CodeGenCUDA/texture.cu --- a/clang/test/CodeGenCUDA/texture.cu +++ b/clang/test/CodeGenCUDA/texture.cu @@ -1,9 +1,9 @@ // REQUIRES: x86-registered-target // REQUIRES: nvptx-registered-target -// RUN: %clang_cc1 -std=c++11 -fcuda-is-device -triple nvptx64-nvidia-cuda -emit-llvm -o - %s | FileCheck --check-prefix=DEVICE %s +// RUN: %clang_cc1 -disable-frozen-args -std=c++11 -fcuda-is-device -triple nvptx64-nvidia-cuda -emit-llvm -o - %s | FileCheck --check-prefix=DEVICE %s // RUN: echo "GPU binary would be here" > %t -// RUN: %clang_cc1 -std=c++11 -triple x86_64-unknown-linux-gnu -target-sdk-version=8.0 -fcuda-include-gpubinary %t -emit-llvm -o - %s | FileCheck --check-prefix=HOST %s +// RUN: %clang_cc1 -disable-frozen-args -std=c++11 -triple x86_64-unknown-linux-gnu -target-sdk-version=8.0 -fcuda-include-gpubinary %t -emit-llvm -o - %s | FileCheck --check-prefix=HOST %s struct textureReference { int desc; diff --git a/clang/test/CodeGenCUDA/unnamed-types.cu b/clang/test/CodeGenCUDA/unnamed-types.cu --- a/clang/test/CodeGenCUDA/unnamed-types.cu +++ b/clang/test/CodeGenCUDA/unnamed-types.cu @@ -29,7 +29,7 @@ // linkages are still required to keep the original `internal` linkage. // HOST: define internal void @_ZZ2f1PfENKUlS_E_clES_( -// DEVICE: define internal float @_ZZZ2f1PfENKUlS_E_clES_ENKUlfE_clEf( +// DEVICE: define internal frozen float @_ZZZ2f1PfENKUlS_E_clES_ENKUlfE_clEf( void f1(float *p) { [](float *p) { k0<<<1,1>>>(p, [] __device__ (float x) { return x + 1.f; }); diff --git a/clang/test/CodeGenCUDA/usual-deallocators.cu b/clang/test/CodeGenCUDA/usual-deallocators.cu --- a/clang/test/CodeGenCUDA/usual-deallocators.cu +++ b/clang/test/CodeGenCUDA/usual-deallocators.cu @@ -70,24 +70,24 @@ // COMMON: call void @_ZN4H1D1dlEPv test_hd(t); // COMMON-LABEL: define linkonce_odr void @_Z7test_hdI4H1D2EvPv - // DEVICE: call void @_ZN4H1D2dlEPvj(i8* {{.*}}, i32 1) + // DEVICE: call void @_ZN4H1D2dlEPvj(i8* {{.*}}, i32 frozen 1) // HOST: call void @_ZN4H1D2dlEPv(i8* {{.*}}) test_hd(t); // COMMON-LABEL: define linkonce_odr void @_Z7test_hdI4H2D1EvPv // DEVICE: call void @_ZN4H2D1dlEPv(i8* {{.*}}) - // HOST: call void @_ZN4H2D1dlEPvj(i8* %3, i32 1) + // HOST: call void @_ZN4H2D1dlEPvj(i8* frozen %3, i32 frozen 1) test_hd(t); // COMMON-LABEL: define linkonce_odr void @_Z7test_hdI4H2D2EvPv - // COMMON: call void @_ZN4H2D2dlEPvj(i8* {{.*}}, i32 1) + // COMMON: call void @_ZN4H2D2dlEPvj(i8* {{.*}}, i32 frozen 1) test_hd(t); // COMMON-LABEL: define linkonce_odr void @_Z7test_hdI6H1D1D2EvPv - // COMMON: call void @_ZN6H1D1D2dlEPv(i8* %3) + // COMMON: call void @_ZN6H1D1D2dlEPv(i8* frozen %3) test_hd(t); // COMMON-LABEL: define linkonce_odr void @_Z7test_hdI6H1H2D1EvPv // COMMON: call void @_ZN6H1H2D1dlEPv(i8* {{.*}}) test_hd(t); // COMMON-LABEL: define linkonce_odr void @_Z7test_hdI6H1H2D2EvPv - // DEVICE: call void @_ZN6H1H2D2dlEPvj(i8* {{.*}}, i32 1) + // DEVICE: call void @_ZN6H1H2D2dlEPvj(i8* {{.*}}, i32 frozen 1) // HOST: call void @_ZN6H1H2D2dlEPv(i8* {{.*}}) test_hd(t); // COMMON-LABEL: define linkonce_odr void @_Z7test_hdI8H1H2D1D2EvPv @@ -97,37 +97,37 @@ // Make sure we've picked deallocator for the correct side of compilation. -// COMMON-LABEL: define linkonce_odr void @_ZN4H1D1dlEPv(i8* %0) +// COMMON-LABEL: define linkonce_odr void @_ZN4H1D1dlEPv(i8* frozen %0) // DEVICE: call void @dev_fn() // HOST: call void @host_fn() -// DEVICE-LABEL: define linkonce_odr void @_ZN4H1D2dlEPvj(i8* %0, i32 %1) +// DEVICE-LABEL: define linkonce_odr void @_ZN4H1D2dlEPvj(i8* frozen %0, i32 frozen %1) // DEVICE: call void @dev_fn() -// HOST-LABEL: define linkonce_odr void @_ZN4H1D2dlEPv(i8* %0) +// HOST-LABEL: define linkonce_odr void @_ZN4H1D2dlEPv(i8* frozen %0) // HOST: call void @host_fn() -// DEVICE-LABEL: define linkonce_odr void @_ZN4H2D1dlEPv(i8* %0) +// DEVICE-LABEL: define linkonce_odr void @_ZN4H2D1dlEPv(i8* frozen %0) // DEVICE: call void @dev_fn() -// HOST-LABEL: define linkonce_odr void @_ZN4H2D1dlEPvj(i8* %0, i32 %1) +// HOST-LABEL: define linkonce_odr void @_ZN4H2D1dlEPvj(i8* frozen %0, i32 frozen %1) // HOST: call void @host_fn() -// COMMON-LABEL: define linkonce_odr void @_ZN4H2D2dlEPvj(i8* %0, i32 %1) +// COMMON-LABEL: define linkonce_odr void @_ZN4H2D2dlEPvj(i8* frozen %0, i32 frozen %1) // DEVICE: call void @dev_fn() // HOST: call void @host_fn() -// COMMON-LABEL: define linkonce_odr void @_ZN6H1D1D2dlEPv(i8* %0) +// COMMON-LABEL: define linkonce_odr void @_ZN6H1D1D2dlEPv(i8* frozen %0) // DEVICE: call void @dev_fn() // HOST: call void @host_fn() -// COMMON-LABEL: define linkonce_odr void @_ZN6H1H2D1dlEPv(i8* %0) +// COMMON-LABEL: define linkonce_odr void @_ZN6H1H2D1dlEPv(i8* frozen %0) // DEVICE: call void @dev_fn() // HOST: call void @host_fn() -// DEVICE-LABEL: define linkonce_odr void @_ZN6H1H2D2dlEPvj(i8* %0, i32 %1) +// DEVICE-LABEL: define linkonce_odr void @_ZN6H1H2D2dlEPvj(i8* frozen %0, i32 frozen %1) // DEVICE: call void @dev_fn() -// HOST-LABEL: define linkonce_odr void @_ZN6H1H2D2dlEPv(i8* %0) +// HOST-LABEL: define linkonce_odr void @_ZN6H1H2D2dlEPv(i8* frozen %0) // HOST: call void @host_fn() -// COMMON-LABEL: define linkonce_odr void @_ZN8H1H2D1D2dlEPv(i8* %0) +// COMMON-LABEL: define linkonce_odr void @_ZN8H1H2D1D2dlEPv(i8* frozen %0) // DEVICE: call void @dev_fn() // HOST: call void @host_fn() diff --git a/clang/test/CodeGenCXX/2009-05-04-PureConstNounwind.cpp b/clang/test/CodeGenCXX/2009-05-04-PureConstNounwind.cpp --- a/clang/test/CodeGenCXX/2009-05-04-PureConstNounwind.cpp +++ b/clang/test/CodeGenCXX/2009-05-04-PureConstNounwind.cpp @@ -3,16 +3,16 @@ int p(void) __attribute__((pure)); int t(void); -// CHECK: define i32 @_Z1fv() [[TF:#[0-9]+]] { +// CHECK: define frozen i32 @_Z1fv() [[TF:#[0-9]+]] { int f(void) { - // CHECK: call i32 @_Z1cv() [[NUW_RN_CALL:#[0-9]+]] - // CHECK: call i32 @_Z1pv() [[NUW_RO_CALL:#[0-9]+]] + // CHECK: call frozen i32 @_Z1cv() [[NUW_RN_CALL:#[0-9]+]] + // CHECK: call frozen i32 @_Z1pv() [[NUW_RO_CALL:#[0-9]+]] return c() + p() + t(); } -// CHECK: declare i32 @_Z1cv() [[NUW_RN:#[0-9]+]] -// CHECK: declare i32 @_Z1pv() [[NUW_RO:#[0-9]+]] -// CHECK: declare i32 @_Z1tv() [[TF2:#[0-9]+]] +// CHECK: declare frozen i32 @_Z1cv() [[NUW_RN:#[0-9]+]] +// CHECK: declare frozen i32 @_Z1pv() [[NUW_RO:#[0-9]+]] +// CHECK: declare frozen i32 @_Z1tv() [[TF2:#[0-9]+]] // CHECK: attributes [[TF]] = { {{.*}} } // CHECK: attributes [[NUW_RN]] = { nounwind readnone{{.*}} } diff --git a/clang/test/CodeGenCXX/2011-12-19-init-list-ctor.cpp b/clang/test/CodeGenCXX/2011-12-19-init-list-ctor.cpp --- a/clang/test/CodeGenCXX/2011-12-19-init-list-ctor.cpp +++ b/clang/test/CodeGenCXX/2011-12-19-init-list-ctor.cpp @@ -19,8 +19,8 @@ }; // CHECK: store i32 0, i32* getelementptr inbounds ([3 x %struct.S], [3 x %struct.S]* @arr, i64 0, i64 0, i32 0) -// CHECK: call void @_ZN1AC1EPKc(%struct.A* getelementptr inbounds ([3 x %struct.S], [3 x %struct.S]* @arr, i64 0, i64 0, i32 1), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0)) +// CHECK: call void @_ZN1AC1EPKc(%struct.A* frozen getelementptr inbounds ([3 x %struct.S], [3 x %struct.S]* @arr, i64 0, i64 0, i32 1), i8* frozen getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0)) // CHECK: store i32 1, i32* getelementptr inbounds ([3 x %struct.S], [3 x %struct.S]* @arr, i64 0, i64 1, i32 0) -// CHECK: call void @_ZN1AC1EPKc(%struct.A* getelementptr inbounds ([3 x %struct.S], [3 x %struct.S]* @arr, i64 0, i64 1, i32 1), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0)) +// CHECK: call void @_ZN1AC1EPKc(%struct.A* frozen getelementptr inbounds ([3 x %struct.S], [3 x %struct.S]* @arr, i64 0, i64 1, i32 1), i8* frozen getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0)) // CHECK: store i32 2, i32* getelementptr inbounds ([3 x %struct.S], [3 x %struct.S]* @arr, i64 0, i64 2, i32 0) -// CHECK: call void @_ZN1AC1EPKc(%struct.A* getelementptr inbounds ([3 x %struct.S], [3 x %struct.S]* @arr, i64 0, i64 2, i32 1), i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.2, i64 0, i64 0)) +// CHECK: call void @_ZN1AC1EPKc(%struct.A* frozen getelementptr inbounds ([3 x %struct.S], [3 x %struct.S]* @arr, i64 0, i64 2, i32 1), i8* frozen getelementptr inbounds ([8 x i8], [8 x i8]* @.str.2, i64 0, i64 0)) diff --git a/clang/test/CodeGenCXX/DynArrayInit.cpp b/clang/test/CodeGenCXX/DynArrayInit.cpp --- a/clang/test/CodeGenCXX/DynArrayInit.cpp +++ b/clang/test/CodeGenCXX/DynArrayInit.cpp @@ -1,7 +1,7 @@ // RUN: %clang_cc1 -triple x86_64-apple-darwin10 -O3 -emit-llvm -o - %s | FileCheck %s // PR7490 -// CHECK-LABEL: define signext i8 @_Z2f0v +// CHECK-LABEL: define frozen signext i8 @_Z2f0v // CHECK: ret i8 0 // CHECK: } inline void* operator new[](unsigned long, void* __p) { return __p; } diff --git a/clang/test/CodeGenCXX/RelativeVTablesABI/child-inheritted-from-parent-in-comdat.cpp b/clang/test/CodeGenCXX/RelativeVTablesABI/child-inheritted-from-parent-in-comdat.cpp --- a/clang/test/CodeGenCXX/RelativeVTablesABI/child-inheritted-from-parent-in-comdat.cpp +++ b/clang/test/CodeGenCXX/RelativeVTablesABI/child-inheritted-from-parent-in-comdat.cpp @@ -24,12 +24,12 @@ // CHECK: @_ZTV1B = unnamed_addr alias { [3 x i32] }, { [3 x i32] }* @_ZTV1B.local // CHECK: @_ZTV1A = linkonce_odr unnamed_addr alias { [3 x i32] }, { [3 x i32] }* @_ZTV1A.local -// CHECK: define void @_ZN1B3fooEv(%class.B* nocapture %this) unnamed_addr +// CHECK: define void @_ZN1B3fooEv(%class.B* frozen nocapture %this) unnamed_addr // CHECK-NEXT: entry: // CHECK-NEXT: ret void // CHECK-NEXT: } -// CHECK: define hidden void @_ZN1B3fooEv.stub(%class.B* nocapture %0) unnamed_addr #{{[0-9]+}} comdat +// CHECK: define hidden void @_ZN1B3fooEv.stub(%class.B* frozen nocapture %0) unnamed_addr #{{[0-9]+}} comdat // CHECK-NEXT: entry: // CHECK-NEXT: ret void // CHECK-NEXT: } diff --git a/clang/test/CodeGenCXX/RelativeVTablesABI/child-vtable-in-comdat.cpp b/clang/test/CodeGenCXX/RelativeVTablesABI/child-vtable-in-comdat.cpp --- a/clang/test/CodeGenCXX/RelativeVTablesABI/child-vtable-in-comdat.cpp +++ b/clang/test/CodeGenCXX/RelativeVTablesABI/child-vtable-in-comdat.cpp @@ -30,11 +30,11 @@ // CHECK: define hidden void @_ZN1B3fooEv.stub(%class.B* {{.*}}%0) unnamed_addr #{{[0-9]+}} comdat -// CHECK: declare void @_ZN1A3fooEv(%class.A*) unnamed_addr +// CHECK: declare void @_ZN1A3fooEv(%class.A* frozen) unnamed_addr -// CHECK: define hidden void @_ZN1A3fooEv.stub(%class.A* %0) unnamed_addr #{{[0-9]+}} comdat +// CHECK: define hidden void @_ZN1A3fooEv.stub(%class.A* frozen %0) unnamed_addr #{{[0-9]+}} comdat // CHECK-NEXT: entry: -// CHECK-NEXT: tail call void @_ZN1A3fooEv(%class.A* %0) +// CHECK-NEXT: tail call void @_ZN1A3fooEv(%class.A* frozen %0) // CHECK-NEXT: ret void // CHECK-NEXT: } diff --git a/clang/test/CodeGenCXX/RelativeVTablesABI/cross-translation-unit-1.cpp b/clang/test/CodeGenCXX/RelativeVTablesABI/cross-translation-unit-1.cpp --- a/clang/test/CodeGenCXX/RelativeVTablesABI/cross-translation-unit-1.cpp +++ b/clang/test/CodeGenCXX/RelativeVTablesABI/cross-translation-unit-1.cpp @@ -13,24 +13,24 @@ // @_ZTV1A = unnamed_addr alias { [4 x i32] }, { [4 x i32] }* @_ZTV1A.local // A::foo() is still available for other modules to use since it is not marked with private or internal linkage. -// CHECK: define void @_ZN1A3fooEv(%class.A* nocapture %this) unnamed_addr +// CHECK: define void @_ZN1A3fooEv(%class.A* frozen nocapture %this) unnamed_addr // CHECK-NEXT: entry: // CHECK-NEXT: ret void // CHECK-NEXT: } // The proxy that we take a reference to in the vtable has hidden visibility and external linkage so it can be used only by other modules in the same DSO. A::foo() is inlined into this stub since it is defined in the same module. -// CHECK: define hidden void @_ZN1A3fooEv.stub(%class.A* nocapture %0) unnamed_addr #{{[0-9]+}} comdat +// CHECK: define hidden void @_ZN1A3fooEv.stub(%class.A* frozen nocapture %0) unnamed_addr #{{[0-9]+}} comdat // CHECK-NEXT: entry: // CHECK-NEXT: ret void // CHECK-NEXT: } // A::bar() is called within the module but not defined, even though the VTable for A is emitted here -// CHECK: declare void @_ZN1A3barEv(%class.A*) unnamed_addr +// CHECK: declare void @_ZN1A3barEv(%class.A* frozen) unnamed_addr // The stub for A::bar() is made private, so it will not appear in the symbol table and is only used in this module. We tail call here because A::bar() is not defined in the same module. -// CHECK: define hidden void @_ZN1A3barEv.stub(%class.A* %0) unnamed_addr {{#[0-9]+}} comdat { +// CHECK: define hidden void @_ZN1A3barEv.stub(%class.A* frozen %0) unnamed_addr {{#[0-9]+}} comdat { // CHECK-NEXT: entry: -// CHECK-NEXT: tail call void @_ZN1A3barEv(%class.A* %0) +// CHECK-NEXT: tail call void @_ZN1A3barEv(%class.A* frozen %0) // CHECK-NEXT: ret void // CHECK-NEXT: } diff --git a/clang/test/CodeGenCXX/RelativeVTablesABI/cross-translation-unit-2.cpp b/clang/test/CodeGenCXX/RelativeVTablesABI/cross-translation-unit-2.cpp --- a/clang/test/CodeGenCXX/RelativeVTablesABI/cross-translation-unit-2.cpp +++ b/clang/test/CodeGenCXX/RelativeVTablesABI/cross-translation-unit-2.cpp @@ -13,23 +13,23 @@ // CHECK: @_ZTV1B = unnamed_addr alias { [4 x i32] }, { [4 x i32] }* @_ZTV1B.local // A::bar() is defined outside of the module that defines the vtable for A -// CHECK: define void @_ZN1A3barEv(%class.A* nocapture %this) unnamed_addr +// CHECK: define void @_ZN1A3barEv(%class.A* frozen nocapture %this) unnamed_addr // CHECK-NEXT: entry: // CHECK-NEXT: ret void // CHECK-NEXT: } -// CHECK: define void @_ZN1B3fooEv(%class.B* nocapture %this) unnamed_addr +// CHECK: define void @_ZN1B3fooEv(%class.B* frozen nocapture %this) unnamed_addr // CHECK-NEXT: entry: // CHECK-NEXT: ret void // CHECK-NEXT: } // The stubs for B::foo() and A::bar() are hidden -// CHECK: define hidden void @_ZN1B3fooEv.stub(%class.B* nocapture %0) unnamed_addr #{{[0-9]+}} comdat +// CHECK: define hidden void @_ZN1B3fooEv.stub(%class.B* frozen nocapture %0) unnamed_addr #{{[0-9]+}} comdat // CHECK-NEXT: entry: // CHECK-NEXT: ret void // CHECK-NEXT: } -// CHECK: define hidden void @_ZN1A3barEv.stub(%class.A* nocapture %0) unnamed_addr #{{[0-9]+}} comdat +// CHECK: define hidden void @_ZN1A3barEv.stub(%class.A* frozen nocapture %0) unnamed_addr #{{[0-9]+}} comdat // CHECK-NEXT: entry: // CHECK-NEXT: ret void // CHECK-NEXT: } diff --git a/clang/test/CodeGenCXX/RelativeVTablesABI/diamond-virtual-inheritance.cpp b/clang/test/CodeGenCXX/RelativeVTablesABI/diamond-virtual-inheritance.cpp --- a/clang/test/CodeGenCXX/RelativeVTablesABI/diamond-virtual-inheritance.cpp +++ b/clang/test/CodeGenCXX/RelativeVTablesABI/diamond-virtual-inheritance.cpp @@ -43,7 +43,7 @@ // CHECK: @_ZTC1D8_1C = unnamed_addr alias { [4 x i32], [4 x i32] }, { [4 x i32], [4 x i32] }* @_ZTC1D8_1C.local // CHECK: @_ZTV1D = unnamed_addr alias { [5 x i32], [4 x i32], [4 x i32] }, { [5 x i32], [4 x i32], [4 x i32] }* @_ZTV1D.local -// CHECK: define void @_Z5D_fooP1D(%class.D* %d) local_unnamed_addr +// CHECK: define void @_Z5D_fooP1D(%class.D* frozen %d) local_unnamed_addr // CHECK-NEXT: entry: // CHECK-NEXT: [[d:%[0-9]+]] = bitcast %class.D* %d to i8** // CHECK-NEXT: [[vtable:%[a-z0-9]+]] = load i8*, i8** [[d]], align 8 @@ -63,7 +63,7 @@ // CHECK-NEXT: [[vtable:%[a-z0-9]+]] = load i8*, i8** [[a_i8_ptr]], align 8 // CHECK-NEXT: [[ptr:%[0-9]+]] = call i8* @llvm.load.relative.i32(i8* [[vtable]], i32 0) // CHECK-NEXT: [[method:%[0-9]+]] = bitcast i8* [[ptr]] to void (%class.A*)* -// CHECK-NEXT: call void [[method]](%class.A* [[a]]) +// CHECK-NEXT: call void [[method]](%class.A* frozen [[a]]) // CHECK-NEXT: ret void // CHECK-NEXT: } diff --git a/clang/test/CodeGenCXX/RelativeVTablesABI/dynamic-cast.cpp b/clang/test/CodeGenCXX/RelativeVTablesABI/dynamic-cast.cpp --- a/clang/test/CodeGenCXX/RelativeVTablesABI/dynamic-cast.cpp +++ b/clang/test/CodeGenCXX/RelativeVTablesABI/dynamic-cast.cpp @@ -1,15 +1,15 @@ // dynamic_cast // Ensure that dynamic casting works normally -// RUN: %clang_cc1 %s -triple=aarch64-unknown-fuchsia -O3 -S -o - -emit-llvm -fexperimental-relative-c++-abi-vtables | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args %s -triple=aarch64-unknown-fuchsia -O3 -S -o - -emit-llvm -fexperimental-relative-c++-abi-vtables | FileCheck %s -// CHECK: define %class.A* @_Z6upcastP1B(%class.B* readnone %b) local_unnamed_addr +// CHECK: define frozen %class.A* @_Z6upcastP1B(%class.B* readnone %b) local_unnamed_addr // CHECK-NEXT: entry: // CHECK-NEXT: [[a:%[0-9]+]] = getelementptr %class.B, %class.B* %b, i64 0, i32 0 // CHECK-NEXT: ret %class.A* [[a]] // CHECK-NEXT: } -// CHECK: define %class.B* @_Z8downcastP1A(%class.A* readonly %a) local_unnamed_addr +// CHECK: define frozen %class.B* @_Z8downcastP1A(%class.A* readonly %a) local_unnamed_addr // CHECK-NEXT: entry: // CHECK-NEXT: [[isnull:%[0-9]+]] = icmp eq %class.A* %a, null // CHECK-NEXT: br i1 [[isnull]], label %[[dynamic_cast_end:[a-z0-9._]+]], label %[[dynamic_cast_notnull:[a-z0-9._]+]] @@ -25,12 +25,12 @@ // CHECK: declare i8* @__dynamic_cast(i8*, i8*, i8*, i64) local_unnamed_addr -// CHECK: define %class.B* @_Z8selfcastP1B(%class.B* readnone returned %b) local_unnamed_addr +// CHECK: define frozen %class.B* @_Z8selfcastP1B(%class.B* readnone returned %b) local_unnamed_addr // CHECK-NEXT: entry // CHECK-NEXT: ret %class.B* %b // CHECK-NEXT: } -// CHECK: define i8* @_Z9void_castP1B(%class.B* readonly %b) local_unnamed_addr +// CHECK: define frozen i8* @_Z9void_castP1B(%class.B* readonly %b) local_unnamed_addr // CHECK-NEXT: entry: // CHECK-NEXT: [[isnull:%[0-9]+]] = icmp eq %class.B* %b, null // CHECK-NEXT: br i1 [[isnull]], label %[[dynamic_cast_end:[a-z0-9._]+]], label %[[dynamic_cast_notnull:[a-z0-9._]+]] diff --git a/clang/test/CodeGenCXX/RelativeVTablesABI/member-function-pointer.cpp b/clang/test/CodeGenCXX/RelativeVTablesABI/member-function-pointer.cpp --- a/clang/test/CodeGenCXX/RelativeVTablesABI/member-function-pointer.cpp +++ b/clang/test/CodeGenCXX/RelativeVTablesABI/member-function-pointer.cpp @@ -2,7 +2,7 @@ // RUN: %clang_cc1 %s -triple=aarch64-unknown-fuchsia -O3 -S -o - -emit-llvm -fexperimental-relative-c++-abi-vtables | FileCheck %s -// CHECK: define void @_Z4funcP1AMS_FvvE(%class.A* %a, [2 x i64] %fn.coerce) local_unnamed_addr +// CHECK: define void @_Z4funcP1AMS_FvvE(%class.A* frozen %a, [2 x i64] frozen %fn.coerce) local_unnamed_addr // CHECK-NEXT: entry: // CHECK-NEXT: [[fn_ptr:%.+]] = extractvalue [2 x i64] %fn.coerce, 0 // CHECK-NEXT: [[adjust:%.+]] = extractvalue [2 x i64] %fn.coerce, 1 @@ -26,7 +26,7 @@ // CHECK: [[memptr_end]]: // CHECK-NEXT: [[method3:%.+]] = phi void (%class.A*)* [ [[method]], %[[virt]] ], [ [[method2]], %[[nonvirt]] ] // CHECK-NEXT: [[a:%.+]] = bitcast i8* [[this_adj]] to %class.A* -// CHECK-NEXT: tail call void [[method3]](%class.A* [[a]]) +// CHECK-NEXT: tail call void [[method3]](%class.A* frozen [[a]]) // CHECK-NEXT: ret void // CHECK-NEXT: } diff --git a/clang/test/CodeGenCXX/RelativeVTablesABI/multiple-inheritance.cpp b/clang/test/CodeGenCXX/RelativeVTablesABI/multiple-inheritance.cpp --- a/clang/test/CodeGenCXX/RelativeVTablesABI/multiple-inheritance.cpp +++ b/clang/test/CodeGenCXX/RelativeVTablesABI/multiple-inheritance.cpp @@ -13,7 +13,7 @@ // CHECK: @_ZTV1C = unnamed_addr alias { [4 x i32], [3 x i32] }, { [4 x i32], [3 x i32] }* @_ZTV1C.local -// CHECK: define void @_Z8C_foobarP1C(%class.C* %c) local_unnamed_addr +// CHECK: define void @_Z8C_foobarP1C(%class.C* frozen %c) local_unnamed_addr // CHECK-NEXT: entry: // CHECK-NEXT: [[c:%[0-9]+]] = bitcast %class.C* %c to i8** // CHECK-NEXT: [[vtable:%[a-z0-9]+]] = load i8*, i8** [[c]], align 8 @@ -21,13 +21,13 @@ // Offset 0 to get first method // CHECK-NEXT: [[ptr1:%[0-9]+]] = call i8* @llvm.load.relative.i32(i8* [[vtable]], i32 0) // CHECK-NEXT: [[method1:%[0-9]+]] = bitcast i8* [[ptr1]] to void (%class.C*)* -// CHECK-NEXT: call void [[method1]](%class.C* %c) +// CHECK-NEXT: call void [[method1]](%class.C* frozen %c) // CHECK-NEXT: [[vtable:%[a-z0-9]+]] = load i8*, i8** [[c]], align 8 // Offset by 4 to get the next bar() // CHECK-NEXT: [[ptr2:%[0-9]+]] = call i8* @llvm.load.relative.i32(i8* [[vtable]], i32 4) // CHECK-NEXT: [[method2:%[0-9]+]] = bitcast i8* [[ptr2]] to void (%class.C*)* -// CHECK-NEXT: call void [[method2]](%class.C* %c) +// CHECK-NEXT: call void [[method2]](%class.C* frozen %c) // CHECK-NEXT: ret void // CHECK-NEXT: } diff --git a/clang/test/CodeGenCXX/RelativeVTablesABI/no-stub-when-dso-local.cpp b/clang/test/CodeGenCXX/RelativeVTablesABI/no-stub-when-dso-local.cpp --- a/clang/test/CodeGenCXX/RelativeVTablesABI/no-stub-when-dso-local.cpp +++ b/clang/test/CodeGenCXX/RelativeVTablesABI/no-stub-when-dso-local.cpp @@ -21,7 +21,7 @@ // CHECK-NOT: @_ZN1A3fooEv.stub // The complete object destructor is hidden. -// NO-OPT: define linkonce_odr hidden %class.B* @_ZN1BD1Ev +// NO-OPT: define linkonce_odr hidden frozen %class.B* @_ZN1BD1Ev // OPT-NOT: @_ZN1BD1Ev // CHECK: @_ZN1BD1Ev.stub diff --git a/clang/test/CodeGenCXX/RelativeVTablesABI/parent-and-child-in-comdats.cpp b/clang/test/CodeGenCXX/RelativeVTablesABI/parent-and-child-in-comdats.cpp --- a/clang/test/CodeGenCXX/RelativeVTablesABI/parent-and-child-in-comdats.cpp +++ b/clang/test/CodeGenCXX/RelativeVTablesABI/parent-and-child-in-comdats.cpp @@ -24,22 +24,22 @@ // CHECK: @_ZTV1A = linkonce_odr unnamed_addr alias { [3 x i32] }, { [3 x i32] }* @_ZTV1A.local // CHECK: @_ZTV1B = linkonce_odr unnamed_addr alias { [3 x i32] }, { [3 x i32] }* @_ZTV1B.local -// CHECK: declare void @_Z5A_fooP1A(%class.A*) +// CHECK: declare void @_Z5A_fooP1A(%class.A* frozen) // The stubs and implementations for foo() are in their own comdat sections. -// CHECK: define linkonce_odr void @_ZN1A3fooEv(%class.A* %this) unnamed_addr #{{[0-9]+}} comdat +// CHECK: define linkonce_odr void @_ZN1A3fooEv(%class.A* frozen %this) unnamed_addr #{{[0-9]+}} comdat -// CHECK: define hidden void @_ZN1A3fooEv.stub(%class.A* %0) unnamed_addr #{{[0-9]+}} comdat +// CHECK: define hidden void @_ZN1A3fooEv.stub(%class.A* frozen %0) unnamed_addr #{{[0-9]+}} comdat // CHECK-NEXT: entry: -// CHECK-NEXT: tail call void @_ZN1A3fooEv(%class.A* %0) +// CHECK-NEXT: tail call void @_ZN1A3fooEv(%class.A* frozen %0) // CHECK-NEXT: ret void // CHECK-NEXT: } -// CHECK: define linkonce_odr void @_ZN1B3fooEv(%class.B* %this) unnamed_addr #{{[0-9]+}} comdat +// CHECK: define linkonce_odr void @_ZN1B3fooEv(%class.B* frozen %this) unnamed_addr #{{[0-9]+}} comdat -// CHECK: define hidden void @_ZN1B3fooEv.stub(%class.B* %0) unnamed_addr #{{[0-9]+}} comdat +// CHECK: define hidden void @_ZN1B3fooEv.stub(%class.B* frozen %0) unnamed_addr #{{[0-9]+}} comdat // CHECK-NEXT: entry: -// CHECK-NEXT: tail call void @_ZN1B3fooEv(%class.B* %0) +// CHECK-NEXT: tail call void @_ZN1B3fooEv(%class.B* frozen %0) // CHECK-NEXT: ret void // CHECK-NEXT: } diff --git a/clang/test/CodeGenCXX/RelativeVTablesABI/parent-vtable-in-comdat.cpp b/clang/test/CodeGenCXX/RelativeVTablesABI/parent-vtable-in-comdat.cpp --- a/clang/test/CodeGenCXX/RelativeVTablesABI/parent-vtable-in-comdat.cpp +++ b/clang/test/CodeGenCXX/RelativeVTablesABI/parent-vtable-in-comdat.cpp @@ -21,11 +21,11 @@ // CHECK: @_ZTI1A.rtti_proxy = hidden unnamed_addr constant { i8*, i8* }* @_ZTI1A, comdat // CHECK: @_ZTV1A = linkonce_odr unnamed_addr alias { [3 x i32] }, { [3 x i32] }* @_ZTV1A.local -// CHECK: define linkonce_odr void @_ZN1A3fooEv(%class.A* %this) unnamed_addr #{{[0-9]+}} comdat +// CHECK: define linkonce_odr void @_ZN1A3fooEv(%class.A* frozen %this) unnamed_addr #{{[0-9]+}} comdat -// CHECK: define hidden void @_ZN1A3fooEv.stub(%class.A* %0) unnamed_addr #{{[0-9]+}} comdat { +// CHECK: define hidden void @_ZN1A3fooEv.stub(%class.A* frozen %0) unnamed_addr #{{[0-9]+}} comdat { // CHECK-NEXT: entry: -// CHECK-NEXT: tail call void @_ZN1A3fooEv(%class.A* %0) +// CHECK-NEXT: tail call void @_ZN1A3fooEv(%class.A* frozen %0) // CHECK-NEXT: ret void // CHECK-NEXT: } diff --git a/clang/test/CodeGenCXX/RelativeVTablesABI/pass-byval-attributes.cpp b/clang/test/CodeGenCXX/RelativeVTablesABI/pass-byval-attributes.cpp --- a/clang/test/CodeGenCXX/RelativeVTablesABI/pass-byval-attributes.cpp +++ b/clang/test/CodeGenCXX/RelativeVTablesABI/pass-byval-attributes.cpp @@ -1,7 +1,7 @@ // ByVal attributes should propogate through to produce proper assembly and // avoid "unpacking" structs within the stubs on x86_64. -// RUN: %clang_cc1 %s -triple=x86_64-unknown-fuchsia -S -o - -emit-llvm -fexperimental-relative-c++-abi-vtables | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args %s -triple=x86_64-unknown-fuchsia -S -o - -emit-llvm -fexperimental-relative-c++-abi-vtables | FileCheck %s struct LargeStruct { char x[24]; diff --git a/clang/test/CodeGenCXX/RelativeVTablesABI/simple-vtable-definition.cpp b/clang/test/CodeGenCXX/RelativeVTablesABI/simple-vtable-definition.cpp --- a/clang/test/CodeGenCXX/RelativeVTablesABI/simple-vtable-definition.cpp +++ b/clang/test/CodeGenCXX/RelativeVTablesABI/simple-vtable-definition.cpp @@ -20,13 +20,13 @@ // The vtable symbol is exposed through an alias. // @_ZTV1A = dso_local unnamed_addr alias { [3 x i32] }, { [3 x i32] }* @_ZTV1A.local -// CHECK: define void @_ZN1A3fooEv(%class.A* nocapture %this) unnamed_addr +// CHECK: define void @_ZN1A3fooEv(%class.A* frozen nocapture %this) unnamed_addr // CHECK-NEXT: entry: // CHECK-NEXT: ret void // CHECK-NEXT: } // This function should be in a comdat -// CHECK: define hidden void @_ZN1A3fooEv.stub(%class.A* nocapture %0) unnamed_addr #{{[0-9]+}} comdat +// CHECK: define hidden void @_ZN1A3fooEv.stub(%class.A* frozen nocapture %0) unnamed_addr #{{[0-9]+}} comdat // CHECK-NEXT: entry: // CHECK-NEXT: ret void // CHECK-NEXT: } diff --git a/clang/test/CodeGenCXX/RelativeVTablesABI/type-info.cpp b/clang/test/CodeGenCXX/RelativeVTablesABI/type-info.cpp --- a/clang/test/CodeGenCXX/RelativeVTablesABI/type-info.cpp +++ b/clang/test/CodeGenCXX/RelativeVTablesABI/type-info.cpp @@ -25,12 +25,12 @@ // CHECK-NEXT: ret %"class.std::type_info"* bitcast ({ i8*, i8* }* @_ZTI1A to %"class.std::type_info"*) // CHECK-NEXT: } -// CHECK: define i8* @_Z7getNamev() local_unnamed_addr +// CHECK: define frozen i8* @_Z7getNamev() local_unnamed_addr // CHECK-NEXT: entry: // CHECK-NEXT: ret i8* getelementptr inbounds ([3 x i8], [3 x i8]* @_ZTS1A, i64 0, i64 0) // CHECK-NEXT: } -// CHECK: define i1 @_Z5equalP1A(%class.A* readonly %a) local_unnamed_addr +// CHECK: define frozen i1 @_Z5equalP1A(%class.A* frozen readonly %a) local_unnamed_addr // CHECK-NEXT: entry: // CHECK-NEXT: [[isnull:%[0-9]+]] = icmp eq %class.A* %a, null // CHECK-NEXT: br i1 [[isnull]], label %[[bad_typeid:[a-z0-9._]+]], label %[[end:[a-z0-9.+]+]] diff --git a/clang/test/CodeGenCXX/RelativeVTablesABI/vbase-offset.cpp b/clang/test/CodeGenCXX/RelativeVTablesABI/vbase-offset.cpp --- a/clang/test/CodeGenCXX/RelativeVTablesABI/vbase-offset.cpp +++ b/clang/test/CodeGenCXX/RelativeVTablesABI/vbase-offset.cpp @@ -13,7 +13,7 @@ // CHECK-NEXT: [[vbase_offset:%.+]] = load i32, i32* [[vbase_offset_ptr2]], align 4 // CHECK-NEXT: [[adj_this:%.+]] = getelementptr inbounds i8, i8* [[this]], i32 [[vbase_offset]] // CHECK-NEXT: [[adj_this2:%.+]] = bitcast i8* [[adj_this]] to %class.Derived* -// CHECK: [[call:%.+]] = tail call i32 @_ZN7Derived1fEi(%class.Derived* [[adj_this2]], i32 {{.*}}) +// CHECK: [[call:%.+]] = tail call frozen i32 @_ZN7Derived1fEi(%class.Derived* frozen [[adj_this2]], i32 {{.*}}) // CHECK: ret i32 [[call]] class Base { diff --git a/clang/test/CodeGenCXX/RelativeVTablesABI/virtual-function-call.cpp b/clang/test/CodeGenCXX/RelativeVTablesABI/virtual-function-call.cpp --- a/clang/test/CodeGenCXX/RelativeVTablesABI/virtual-function-call.cpp +++ b/clang/test/CodeGenCXX/RelativeVTablesABI/virtual-function-call.cpp @@ -2,13 +2,13 @@ // RUN: %clang_cc1 %s -triple=aarch64-unknown-fuchsia -O3 -S -o - -emit-llvm -fexperimental-relative-c++-abi-vtables | FileCheck %s -// CHECK: define void @_Z5A_fooP1A(%class.A* %a) local_unnamed_addr +// CHECK: define void @_Z5A_fooP1A(%class.A* frozen %a) local_unnamed_addr // CHECK-NEXT: entry: // CHECK-NEXT: [[this:%[0-9]+]] = bitcast %class.A* %a to i8** // CHECK-NEXT: %vtable1 = load i8*, i8** [[this]] // CHECK-NEXT: [[func_ptr:%[0-9]+]] = tail call i8* @llvm.load.relative.i32(i8* %vtable1, i32 0) // CHECK-NEXT: [[func:%[0-9]+]] = bitcast i8* [[func_ptr]] to void (%class.A*)* -// CHECK-NEXT: tail call void [[func]](%class.A* %a) +// CHECK-NEXT: tail call void [[func]](%class.A* frozen %a) // CHECK-NEXT: ret void // CHECK-NEXT: } diff --git a/clang/test/CodeGenCXX/address-space-cast.cpp b/clang/test/CodeGenCXX/address-space-cast.cpp --- a/clang/test/CodeGenCXX/address-space-cast.cpp +++ b/clang/test/CodeGenCXX/address-space-cast.cpp @@ -36,30 +36,30 @@ __private__ int *priv_int_ptr = (__private__ int *)gen_void_ptr; // CHECK: %[[cast:.*]] = addrspacecast i8* %{{.*}} to i8 addrspace(5)* - // CHECK-NEXT: call void @_Z10func_pcharPU3AS5c(i8 addrspace(5)* %[[cast]]) + // CHECK-NEXT: call void @_Z10func_pcharPU3AS5c(i8 addrspace(5)* frozen %[[cast]]) func_pchar((__private__ char *)gen_char_ptr); // CHECK: %[[cast:.*]] = addrspacecast i8* %{{.*}} to i8 addrspace(5)* - // CHECK-NEXT: call void @_Z10func_pcharPU3AS5c(i8 addrspace(5)* %[[cast]]) + // CHECK-NEXT: call void @_Z10func_pcharPU3AS5c(i8 addrspace(5)* frozen %[[cast]]) func_pchar((__private__ char *)gen_void_ptr); // CHECK: %[[cast:.*]] = addrspacecast i32* %{{.*}} to i8 addrspace(5)* - // CHECK-NEXT: call void @_Z10func_pcharPU3AS5c(i8 addrspace(5)* %[[cast]]) + // CHECK-NEXT: call void @_Z10func_pcharPU3AS5c(i8 addrspace(5)* frozen %[[cast]]) func_pchar((__private__ char *)gen_int_ptr); // CHECK: %[[cast:.*]] = addrspacecast i8* %{{.*}} to i8 addrspace(5)* - // CHECK-NEXT: call void @_Z10func_pvoidPU3AS5v(i8 addrspace(5)* %[[cast]]) + // CHECK-NEXT: call void @_Z10func_pvoidPU3AS5v(i8 addrspace(5)* frozen %[[cast]]) func_pvoid((__private__ void *)gen_char_ptr); // CHECK: %[[cast:.*]] = addrspacecast i8* %{{.*}} to i8 addrspace(5)* - // CHECK-NEXT: call void @_Z10func_pvoidPU3AS5v(i8 addrspace(5)* %[[cast]]) + // CHECK-NEXT: call void @_Z10func_pvoidPU3AS5v(i8 addrspace(5)* frozen %[[cast]]) func_pvoid((__private__ void *)gen_void_ptr); // CHECK: %[[cast:.*]] = addrspacecast i32* %{{.*}} to i8 addrspace(5)* - // CHECK-NEXT: call void @_Z10func_pvoidPU3AS5v(i8 addrspace(5)* %[[cast]]) + // CHECK-NEXT: call void @_Z10func_pvoidPU3AS5v(i8 addrspace(5)* frozen %[[cast]]) func_pvoid((__private__ void *)gen_int_ptr); // CHECK: %[[cast:.*]] = addrspacecast i8* %{{.*}} to i32 addrspace(5)* - // CHECK-NEXT: call void @_Z9func_pintPU3AS5i(i32 addrspace(5)* %[[cast]]) + // CHECK-NEXT: call void @_Z9func_pintPU3AS5i(i32 addrspace(5)* frozen %[[cast]]) func_pint((__private__ int *)gen_void_ptr); } diff --git a/clang/test/CodeGenCXX/address-space-of-this.cpp b/clang/test/CodeGenCXX/address-space-of-this.cpp --- a/clang/test/CodeGenCXX/address-space-of-this.cpp +++ b/clang/test/CodeGenCXX/address-space-of-this.cpp @@ -8,5 +8,5 @@ MyType(int i) __attribute__((address_space(10))) : i(i) {} int i; }; -//CHECK: call void @_ZN6MyTypeC1Ei(%struct.MyType* addrspacecast (%struct.MyType addrspace(10)* @m to %struct.MyType*), i32 123) +//CHECK: call void @_ZN6MyTypeC1Ei(%struct.MyType* addrspacecast (%struct.MyType addrspace(10)* @m frozen to %struct.MyType*), i32 frozen 123) MyType __attribute__((address_space(10))) m = 123; diff --git a/clang/test/CodeGenCXX/address-space-ref.cpp b/clang/test/CodeGenCXX/address-space-ref.cpp --- a/clang/test/CodeGenCXX/address-space-ref.cpp +++ b/clang/test/CodeGenCXX/address-space-ref.cpp @@ -10,7 +10,7 @@ return x; } -// CHECK: define align 4 dereferenceable(4) i32 addrspace(1)* @_Z3fooRU3AS1iS0_(i32 addrspace(1)* align 4 dereferenceable(4) %x, i32 addrspace(1)* align 4 dereferenceable(4) %y) +// CHECK: define frozen align 4 dereferenceable(4) i32 addrspace(1)* @_Z3fooRU3AS1iS0_(i32 addrspace(1)* frozen align 4 dereferenceable(4) %x, i32 addrspace(1)* frozen align 4 dereferenceable(4) %y) // For a reference to an incomplete type in an alternate address space, output // neither dereferenceable nor nonnull. @@ -22,7 +22,7 @@ return x; } -// CHECK: define align 1 %class.bc addrspace(1)* @_Z3barRU3AS12bcS1_(%class.bc addrspace(1)* align 1 %x, %class.bc addrspace(1)* align 1 %y) +// CHECK: define frozen align 1 %class.bc addrspace(1)* @_Z3barRU3AS12bcS1_(%class.bc addrspace(1)* frozen align 1 %x, %class.bc addrspace(1)* frozen align 1 %y) // For a reference to an incomplete type in addrspace(0), output nonnull. @@ -30,7 +30,7 @@ return x; } -// NULL-INVALID: define nonnull align 1 %class.bc* @_Z4bar2R2bcS0_(%class.bc* nonnull align 1 %x, %class.bc* nonnull align 1 %y) -// NULL-VALID: define align 1 %class.bc* @_Z4bar2R2bcS0_(%class.bc* align 1 %x, %class.bc* align 1 %y) +// NULL-INVALID: define frozen nonnull align 1 %class.bc* @_Z4bar2R2bcS0_(%class.bc* frozen nonnull align 1 %x, %class.bc* frozen nonnull align 1 %y) +// NULL-VALID: define frozen align 1 %class.bc* @_Z4bar2R2bcS0_(%class.bc* frozen align 1 %x, %class.bc* frozen align 1 %y) diff --git a/clang/test/CodeGenCXX/align-avx-complete-objects.cpp b/clang/test/CodeGenCXX/align-avx-complete-objects.cpp --- a/clang/test/CodeGenCXX/align-avx-complete-objects.cpp +++ b/clang/test/CodeGenCXX/align-avx-complete-objects.cpp @@ -13,7 +13,7 @@ } // CHECK: [[R:%.*]] = alloca <8 x float>, align 32 -// CHECK-NEXT: [[CALL:%.*]] = call noalias nonnull i8* @_Znwm(i64 32) +// CHECK-NEXT: [[CALL:%.*]] = call frozen noalias nonnull i8* @_Znwm(i64 frozen 32) // CHECK-NEXT: [[ZERO:%.*]] = bitcast i8* [[CALL]] to <8 x float>* // CHECK-NEXT: store <8 x float>* [[ZERO]], <8 x float>** [[P:%.*]], align 8 // CHECK-NEXT: [[ONE:%.*]] = load <8 x float>*, <8 x float>** [[P]], align 8 @@ -42,7 +42,7 @@ } // CHECK: [[R:%.*]] = alloca <8 x float>, align 32 -// CHECK-NEXT: [[CALL:%.*]] = call noalias nonnull i8* @_Znwm(i64 32) +// CHECK-NEXT: [[CALL:%.*]] = call frozen noalias nonnull i8* @_Znwm(i64 frozen 32) // CHECK-NEXT: [[ZERO:%.*]] = bitcast i8* [[CALL]] to <8 x float>* // CHECK-NEXT: store <8 x float>* [[ZERO]], <8 x float>** [[P:%.*]], align 8 // CHECK-NEXT: [[ONE:%.*]] = load <8 x float>*, <8 x float>** [[P]], align 8 diff --git a/clang/test/CodeGenCXX/alignment.cpp b/clang/test/CodeGenCXX/alignment.cpp --- a/clang/test/CodeGenCXX/alignment.cpp +++ b/clang/test/CodeGenCXX/alignment.cpp @@ -24,7 +24,7 @@ // in a reference with an assumed alignment of 4. // CHECK-LABEL: @_ZN5test01aERNS_1BE void a(B &b) { - // CHECK: [[CALL:%.*]] = call i32 @_Z10int_sourcev() + // CHECK: [[CALL:%.*]] = call frozen i32 @_Z10int_sourcev() // CHECK: [[B_P:%.*]] = load [[B:%.*]]*, [[B]]** // CHECK: [[FIELD_P:%.*]] = bitcast [[B]]* [[B_P]] to i8* // CHECK: [[TRUNC:%.*]] = trunc i32 [[CALL]] to i8 @@ -41,7 +41,7 @@ // CHECK: [[T0:%.*]] = shl i8 [[VALUE]], 6 // CHECK: [[T1:%.*]] = ashr i8 [[T0]], 6 // CHECK: [[T2:%.*]] = sext i8 [[T1]] to i32 - // CHECK: call void @_Z8int_sinki(i32 [[T2]]) + // CHECK: call void @_Z8int_sinki(i32 frozen [[T2]]) int_sink(b.onebit); } @@ -49,7 +49,7 @@ // in a reference/pointer with an assumed alignment of 2. // CHECK-LABEL: @_ZN5test01bERNS_1CE void b(C &c) { - // CHECK: [[CALL:%.*]] = call i32 @_Z10int_sourcev() + // CHECK: [[CALL:%.*]] = call frozen i32 @_Z10int_sourcev() // CHECK: [[C_P:%.*]] = load [[C:%.*]]*, [[C]]** // CHECK: [[T0:%.*]] = bitcast [[C]]* [[C_P]] to i8* // CHECK: [[T1:%.*]] = getelementptr inbounds i8, i8* [[T0]], i64 8 @@ -75,13 +75,13 @@ // CHECK: [[T0:%.*]] = shl i8 [[VALUE]], 6 // CHECK: [[T1:%.*]] = ashr i8 [[T0]], 6 // CHECK: [[T2:%.*]] = sext i8 [[T1]] to i32 - // CHECK: call void @_Z8int_sinki(i32 [[T2]]) + // CHECK: call void @_Z8int_sinki(i32 frozen [[T2]]) int_sink(c.onebit); } // CHECK-LABEL: @_ZN5test01cEPNS_1CE void c(C *c) { - // CHECK: [[CALL:%.*]] = call i32 @_Z10int_sourcev() + // CHECK: [[CALL:%.*]] = call frozen i32 @_Z10int_sourcev() // CHECK: [[C_P:%.*]] = load [[C]]*, [[C]]** // CHECK: [[T0:%.*]] = bitcast [[C]]* [[C_P]] to i8* // CHECK: [[T1:%.*]] = getelementptr inbounds i8, i8* [[T0]], i64 8 @@ -107,7 +107,7 @@ // CHECK: [[T0:%.*]] = shl i8 [[VALUE]], 6 // CHECK: [[T1:%.*]] = ashr i8 [[T0]], 6 // CHECK: [[T2:%.*]] = sext i8 [[T1]] to i32 - // CHECK: call void @_Z8int_sinki(i32 [[T2]]) + // CHECK: call void @_Z8int_sinki(i32 frozen [[T2]]) int_sink(c->onebit); } @@ -119,7 +119,7 @@ // CHECK-NOCOMPAT: [[C_P:%.*]] = alloca [[C:%.*]], align 4 C c; - // CHECK: [[CALL:%.*]] = call i32 @_Z10int_sourcev() + // CHECK: [[CALL:%.*]] = call frozen i32 @_Z10int_sourcev() // CHECK: [[T0:%.*]] = bitcast [[C]]* [[C_P]] to i8* // CHECK: [[T1:%.*]] = getelementptr inbounds i8, i8* [[T0]], i64 8 // CHECK: [[B_P:%.*]] = bitcast i8* [[T1]] to [[B]]* @@ -143,7 +143,7 @@ // CHECK: [[T0:%.*]] = shl i8 [[VALUE]], 6 // CHECK: [[T1:%.*]] = ashr i8 [[T0]], 6 // CHECK: [[T2:%.*]] = sext i8 [[T1]] to i32 - // CHECK: call void @_Z8int_sinki(i32 [[T2]]) + // CHECK: call void @_Z8int_sinki(i32 frozen [[T2]]) int_sink(c.onebit); } @@ -154,7 +154,7 @@ // CHECK: [[C_P:%.*]] = alloca [[C:%.*]], align 16 __attribute__((aligned(16))) C c; - // CHECK: [[CALL:%.*]] = call i32 @_Z10int_sourcev() + // CHECK: [[CALL:%.*]] = call frozen i32 @_Z10int_sourcev() // CHECK: [[T0:%.*]] = bitcast [[C]]* [[C_P]] to i8* // CHECK: [[T1:%.*]] = getelementptr inbounds i8, i8* [[T0]], i64 8 // CHECK: [[B_P:%.*]] = bitcast i8* [[T1]] to [[B]]* @@ -175,7 +175,7 @@ // CHECK: [[T0:%.*]] = shl i8 [[VALUE]], 6 // CHECK: [[T1:%.*]] = ashr i8 [[T0]], 6 // CHECK: [[T2:%.*]] = sext i8 [[T1]] to i32 - // CHECK: call void @_Z8int_sinki(i32 [[T2]]) + // CHECK: call void @_Z8int_sinki(i32 frozen [[T2]]) int_sink(c.onebit); } } diff --git a/clang/test/CodeGenCXX/alloc-size.cpp b/clang/test/CodeGenCXX/alloc-size.cpp --- a/clang/test/CodeGenCXX/alloc-size.cpp +++ b/clang/test/CodeGenCXX/alloc-size.cpp @@ -12,14 +12,14 @@ template int callCalloc(); -// CHECK-LABEL: define i32 @_ZN9templates6testItEv() +// CHECK-LABEL: define frozen i32 @_ZN9templates6testItEv() int testIt() { - // CHECK: call i32 @_ZN9templates10callMallocINS_6MyTypeEEEiv - // CHECK: call i32 @_ZN9templates10callCallocINS_6MyTypeELi4EEEiv + // CHECK: call frozen i32 @_ZN9templates10callMallocINS_6MyTypeEEEiv + // CHECK: call frozen i32 @_ZN9templates10callCallocINS_6MyTypeELi4EEEiv return callMalloc() + callCalloc(); } -// CHECK-LABEL: define linkonce_odr i32 +// CHECK-LABEL: define linkonce_odr frozen i32 // @_ZN9templates10callMallocINS_6MyTypeEEEiv template int callMalloc() { static_assert(sizeof(T) == 16, ""); @@ -27,7 +27,7 @@ return __builtin_object_size(my_malloc(sizeof(T)), 0); } -// CHECK-LABEL: define linkonce_odr i32 +// CHECK-LABEL: define linkonce_odr frozen i32 // @_ZN9templates10callCallocINS_6MyTypeELi4EEEiv template int callCalloc() { static_assert(sizeof(T) * N == 64, ""); @@ -59,7 +59,7 @@ void *dependent_calloc2(size_t NT = sizeof(T), size_t MT = M) __attribute__((alloc_size(1, 2))); -// CHECK-LABEL: define i32 @_ZN20templated_alloc_size6testItEv +// CHECK-LABEL: define frozen i32 @_ZN20templated_alloc_size6testItEv int testIt() { // 122 = 4 + 5*4 + 6 + 7*8 + 4*9 // CHECK: ret i32 122 @@ -79,7 +79,7 @@ void *my_malloc(const Foo &, int N) __attribute__((alloc_size(2))); -// CHECK-LABEL: define i32 @_ZN24alloc_size_with_cleanups6testItEv +// CHECK-LABEL: define frozen i32 @_ZN24alloc_size_with_cleanups6testItEv int testIt() { int *const p = (int *)my_malloc(Foo{}, 3); // CHECK: ret i32 3 @@ -93,13 +93,13 @@ void *my_calloc(int N, int M) __attribute__((alloc_size(2, 3))); }; -// CHECK-LABEL: define i32 @_Z16callMemberMallocv +// CHECK-LABEL: define frozen i32 @_Z16callMemberMallocv int callMemberMalloc() { // CHECK: ret i32 16 return __builtin_object_size(C().my_malloc(16), 0); } -// CHECK-LABEL: define i32 @_Z16callMemberCallocv +// CHECK-LABEL: define frozen i32 @_Z16callMemberCallocv int callMemberCalloc() { // CHECK: ret i32 32 return __builtin_object_size(C().my_calloc(16, 2), 0); diff --git a/clang/test/CodeGenCXX/amdgcn-automatic-variable.cpp b/clang/test/CodeGenCXX/amdgcn-automatic-variable.cpp --- a/clang/test/CodeGenCXX/amdgcn-automatic-variable.cpp +++ b/clang/test/CodeGenCXX/amdgcn-automatic-variable.cpp @@ -1,6 +1,6 @@ // RUN: %clang_cc1 -O0 -triple amdgcn---amdgiz -emit-llvm %s -o - | FileCheck %s -// CHECK-LABEL: define void @_Z5func1Pi(i32* %x) +// CHECK-LABEL: define void @_Z5func1Pi(i32* frozen %x) void func1(int *x) { // CHECK: %[[x_addr:.*]] = alloca i32*{{.*}}addrspace(5) // CHECK: %[[r0:.*]] = addrspacecast i32* addrspace(5)* %[[x_addr]] to i32** @@ -43,7 +43,7 @@ // CHECK: store i32* %[[arraydecay]], i32** %[[r4]], align 8 int *lp2 = la; - // CHECK: call void @_Z5func1Pi(i32* %[[r0]]) + // CHECK: call void @_Z5func1Pi(i32* frozen %[[r0]]) func1(&lv1); // CHECK: store i32 4, i32* %[[r5]] @@ -67,8 +67,8 @@ void func3() { // CHECK: %[[a:.*]] = alloca %class.A, align 4, addrspace(5) // CHECK: %[[r0:.*]] = addrspacecast %class.A addrspace(5)* %[[a]] to %class.A* - // CHECK: call void @_ZN1AC1Ev(%class.A* %[[r0]]) - // CHECK: call void @_ZN1AD1Ev(%class.A* %[[r0]]) + // CHECK: call void @_ZN1AC1Ev(%class.A* frozen %[[r0]]) + // CHECK: call void @_ZN1AD1Ev(%class.A* frozen %[[r0]]) A a; } @@ -77,7 +77,7 @@ // CHECK: %[[x_addr:.*]] = alloca i32, align 4, addrspace(5) // CHECK: %[[r0:.*]] = addrspacecast i32 addrspace(5)* %[[x_addr]] to i32* // CHECK: store i32 %x, i32* %[[r0]], align 4 - // CHECK: call void @_Z5func1Pi(i32* %[[r0]]) + // CHECK: call void @_Z5func1Pi(i32* frozen %[[r0]]) func1(&x); } diff --git a/clang/test/CodeGenCXX/amdgcn-func-arg.cpp b/clang/test/CodeGenCXX/amdgcn-func-arg.cpp --- a/clang/test/CodeGenCXX/amdgcn-func-arg.cpp +++ b/clang/test/CodeGenCXX/amdgcn-func-arg.cpp @@ -17,7 +17,7 @@ void func_with_ref_arg(A &a); void func_with_ref_arg(B &b); -// CHECK-LABEL: define void @_Z22func_with_indirect_arg1A(%class.A addrspace(5)* %a) +// CHECK-LABEL: define void @_Z22func_with_indirect_arg1A(%class.A addrspace(5)* frozen %a) // CHECK: %p = alloca %class.A*, align 8, addrspace(5) // CHECK: %[[r1:.+]] = addrspacecast %class.A* addrspace(5)* %p to %class.A** // CHECK: %[[r0:.+]] = addrspacecast %class.A addrspace(5)* %a to %class.A* @@ -31,13 +31,13 @@ // CHECK: %[[r0:.+]] = addrspacecast %class.A addrspace(5)* %a to %class.A* // CHECK: %agg.tmp = alloca %class.A, align 4, addrspace(5) // CHECK: %[[r1:.+]] = addrspacecast %class.A addrspace(5)* %agg.tmp to %class.A* -// CHECK: call void @_ZN1AC1Ev(%class.A* %[[r0]]) +// CHECK: call void @_ZN1AC1Ev(%class.A* frozen %[[r0]]) // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64 // CHECK: %[[r4:.+]] = addrspacecast %class.A* %[[r1]] to %class.A addrspace(5)* -// CHECK: call void @_Z22func_with_indirect_arg1A(%class.A addrspace(5)* %[[r4]]) -// CHECK: call void @_ZN1AD1Ev(%class.A* %[[r1]]) -// CHECK: call void @_Z17func_with_ref_argR1A(%class.A* nonnull align 4 dereferenceable(4) %[[r0]]) -// CHECK: call void @_ZN1AD1Ev(%class.A* %[[r0]]) +// CHECK: call void @_Z22func_with_indirect_arg1A(%class.A addrspace(5)* frozen %[[r4]]) +// CHECK: call void @_ZN1AD1Ev(%class.A* frozen %[[r1]]) +// CHECK: call void @_Z17func_with_ref_argR1A(%class.A* frozen nonnull align 4 dereferenceable(4) %[[r0]]) +// CHECK: call void @_ZN1AD1Ev(%class.A* frozen %[[r0]]) void test_indirect_arg_auto() { A a; func_with_indirect_arg(a); @@ -49,15 +49,15 @@ // CHECK: %[[r0:.+]] = addrspacecast %class.A addrspace(5)* %agg.tmp to %class.A* // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64 // CHECK: %[[r2:.+]] = addrspacecast %class.A* %[[r0]] to %class.A addrspace(5)* -// CHECK: call void @_Z22func_with_indirect_arg1A(%class.A addrspace(5)* %[[r2]]) -// CHECK: call void @_ZN1AD1Ev(%class.A* %[[r0]]) -// CHECK: call void @_Z17func_with_ref_argR1A(%class.A* nonnull align 4 dereferenceable(4) addrspacecast (%class.A addrspace(1)* @g_a to %class.A*)) +// CHECK: call void @_Z22func_with_indirect_arg1A(%class.A addrspace(5)* frozen %[[r2]]) +// CHECK: call void @_ZN1AD1Ev(%class.A* frozen %[[r0]]) +// CHECK: call void @_Z17func_with_ref_argR1A(%class.A* frozen nonnull align 4 dereferenceable(4) addrspacecast (%class.A addrspace(1)* @g_a to %class.A*)) void test_indirect_arg_global() { func_with_indirect_arg(g_a); func_with_ref_arg(g_a); } -// CHECK-LABEL: define void @_Z19func_with_byval_arg1B(%class.B addrspace(5)* byval(%class.B) align 4 %b) +// CHECK-LABEL: define void @_Z19func_with_byval_arg1B(%class.B addrspace(5)* frozen byval(%class.B) align 4 %b) // CHECK: %p = alloca %class.B*, align 8, addrspace(5) // CHECK: %[[r1:.+]] = addrspacecast %class.B* addrspace(5)* %p to %class.B** // CHECK: %[[r0:.+]] = addrspacecast %class.B addrspace(5)* %b to %class.B* @@ -73,8 +73,8 @@ // CHECK: %[[r1:.+]] = addrspacecast %class.B addrspace(5)* %agg.tmp to %class.B* // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64 // CHECK: %[[r4:.+]] = addrspacecast %class.B* %[[r1]] to %class.B addrspace(5)* -// CHECK: call void @_Z19func_with_byval_arg1B(%class.B addrspace(5)* byval(%class.B) align 4 %[[r4]]) -// CHECK: call void @_Z17func_with_ref_argR1B(%class.B* nonnull align 4 dereferenceable(400) %[[r0]]) +// CHECK: call void @_Z19func_with_byval_arg1B(%class.B addrspace(5)* frozen byval(%class.B) align 4 %[[r4]]) +// CHECK: call void @_Z17func_with_ref_argR1B(%class.B* frozen nonnull align 4 dereferenceable(400) %[[r0]]) void test_byval_arg_auto() { B b; func_with_byval_arg(b); @@ -86,8 +86,8 @@ // CHECK: %[[r0:.+]] = addrspacecast %class.B addrspace(5)* %agg.tmp to %class.B* // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64 // CHECK: %[[r2:.+]] = addrspacecast %class.B* %[[r0]] to %class.B addrspace(5)* -// CHECK: call void @_Z19func_with_byval_arg1B(%class.B addrspace(5)* byval(%class.B) align 4 %[[r2]]) -// CHECK: call void @_Z17func_with_ref_argR1B(%class.B* nonnull align 4 dereferenceable(400) addrspacecast (%class.B addrspace(1)* @g_b to %class.B*)) +// CHECK: call void @_Z19func_with_byval_arg1B(%class.B addrspace(5)* frozen byval(%class.B) align 4 %[[r2]]) +// CHECK: call void @_Z17func_with_ref_argR1B(%class.B* frozen nonnull align 4 dereferenceable(400) addrspacecast (%class.B addrspace(1)* @g_b to %class.B*)) void test_byval_arg_global() { func_with_byval_arg(g_b); func_with_ref_arg(g_b); diff --git a/clang/test/CodeGenCXX/amdgcn_declspec_get.cpp b/clang/test/CodeGenCXX/amdgcn_declspec_get.cpp --- a/clang/test/CodeGenCXX/amdgcn_declspec_get.cpp +++ b/clang/test/CodeGenCXX/amdgcn_declspec_get.cpp @@ -17,7 +17,7 @@ // CHECK: %[[ii:.*]] = addrspacecast i32 addrspace(5)* %i to i32* // CHECK: %[[cast:.*]] = bitcast i32 addrspace(5)* %i to i8 addrspace(5)* // CHECK: call void @llvm.lifetime.start.p5i8(i64 4, i8 addrspace(5)* %[[cast]]) -// CHECK: %call = call i32 @_ZN1A6_get_xEv() +// CHECK: %call = call frozen i32 @_ZN1A6_get_xEv() // CHECK: store i32 %call, i32* %[[ii]] // CHECK: %[[cast2:.*]] = bitcast i32 addrspace(5)* %i to i8 addrspace(5)* // CHECK: call void @llvm.lifetime.end.p5i8(i64 4, i8 addrspace(5)* %[[cast2]]) diff --git a/clang/test/CodeGenCXX/anonymous-namespaces.cpp b/clang/test/CodeGenCXX/anonymous-namespaces.cpp --- a/clang/test/CodeGenCXX/anonymous-namespaces.cpp +++ b/clang/test/CodeGenCXX/anonymous-namespaces.cpp @@ -35,12 +35,12 @@ struct E : public virtual EBase { virtual ~E() {} }; }; - // CHECK-1-LABEL: define internal i32 @_ZN12_GLOBAL__N_13fooEv() + // CHECK-1-LABEL: define internal frozen i32 @_ZN12_GLOBAL__N_13fooEv() int foo() { return 32; } - // CHECK-1-LABEL: define internal i32 @_ZN12_GLOBAL__N_11A3fooEv() + // CHECK-1-LABEL: define internal frozen i32 @_ZN12_GLOBAL__N_11A3fooEv() namespace A { int foo() { return 45; diff --git a/clang/test/CodeGenCXX/apple-kext-indirect-call-2.cpp b/clang/test/CodeGenCXX/apple-kext-indirect-call-2.cpp --- a/clang/test/CodeGenCXX/apple-kext-indirect-call-2.cpp +++ b/clang/test/CodeGenCXX/apple-kext-indirect-call-2.cpp @@ -19,7 +19,7 @@ void FUNC(B* p) { // CHECK: [[T1:%.*]] = load i8* (%struct.A*)*, i8* (%struct.A*)** getelementptr inbounds (i8* (%struct.A*)*, i8* (%struct.A*)** bitcast ({ [4 x i8*] }* @_ZTV1A to i8* (%struct.A*)**), i64 2) -// CHECK-NEXT: [[T2:%.*]] = call i8* [[T1]] +// CHECK-NEXT: [[T2:%.*]] = call frozen i8* [[T1]] const char* c = p->A::abc(); } @@ -34,7 +34,7 @@ void FUNC1(Derived* p) { // CHECK: [[U1:%.*]] = load i8* (%struct.Base*)*, i8* (%struct.Base*)** getelementptr inbounds (i8* (%struct.Base*)*, i8* (%struct.Base*)** bitcast ({ [4 x i8*] }* @_ZTV4Base to i8* (%struct.Base*)**), i64 2) -// CHECK-NEXT: [[U2:%.*]] = call i8* [[U1]] +// CHECK-NEXT: [[U2:%.*]] = call frozen i8* [[U1]] char* c = p->Base::abc(); } @@ -50,7 +50,7 @@ void FUNC2(Derived2* p) { // CHECK: [[V1:%.*]] = load i8* (%struct.Derived2*)*, i8* (%struct.Derived2*)** getelementptr inbounds (i8* (%struct.Derived2*)*, i8* (%struct.Derived2*)** bitcast ({ [5 x i8*] }* @_ZTV8Derived2 to i8* (%struct.Derived2*)**), i64 3) -// CHECK-NEXT: [[V2:%.*]] = call i8* [[V1]] +// CHECK-NEXT: [[V2:%.*]] = call frozen i8* [[V1]] char* c = p->Derived2::efg(); } @@ -71,7 +71,7 @@ void FUNC3(Sub* p) { // CHECK: [[W1:%.*]] = load i8* (%struct.D2*)*, i8* (%struct.D2*)** getelementptr inbounds (i8* (%struct.D2*)*, i8* (%struct.D2*)** bitcast ({ [5 x i8*] }* @_ZTV2D2 to i8* (%struct.D2*)**), i64 3) -// CHECK-NEXT: [[W2:%.*]] = call i8* [[W1]] +// CHECK-NEXT: [[W2:%.*]] = call frozen i8* [[W1]] char* c = p->D2::abc(); } diff --git a/clang/test/CodeGenCXX/apple-kext-indirect-call.cpp b/clang/test/CodeGenCXX/apple-kext-indirect-call.cpp --- a/clang/test/CodeGenCXX/apple-kext-indirect-call.cpp +++ b/clang/test/CodeGenCXX/apple-kext-indirect-call.cpp @@ -38,5 +38,5 @@ } // CHECK: getelementptr inbounds (void (%struct.Templ*)*, void (%struct.Templ*)** bitcast ({ [5 x i8*] }* @_ZTV5TemplIiE to void (%struct.Templ*)**), i64 2) -// CHECK: define internal void @_ZN5TemplIiE1fEv(%struct.Templ* %this) -// CHECK: define internal void @_ZN5TemplIiE1gEv(%struct.Templ* %this) +// CHECK: define internal void @_ZN5TemplIiE1fEv(%struct.Templ* frozen %this) +// CHECK: define internal void @_ZN5TemplIiE1gEv(%struct.Templ* frozen %this) diff --git a/clang/test/CodeGenCXX/apple-kext-indirect-virtual-dtor-call.cpp b/clang/test/CodeGenCXX/apple-kext-indirect-virtual-dtor-call.cpp --- a/clang/test/CodeGenCXX/apple-kext-indirect-virtual-dtor-call.cpp +++ b/clang/test/CodeGenCXX/apple-kext-indirect-virtual-dtor-call.cpp @@ -13,10 +13,10 @@ } // CHECK-LABEL: define void @_ZN2B1D0Ev // CHECK: [[T1:%.*]] = load void (%struct.B1*)*, void (%struct.B1*)** getelementptr inbounds (void (%struct.B1*)*, void (%struct.B1*)** bitcast ({ [5 x i8*] }* @_ZTV2B1 to void (%struct.B1*)**), i64 2) -// CHECK-NEXT: call void [[T1]](%struct.B1* [[T2:%.*]]) +// CHECK-NEXT: call void [[T1]](%struct.B1* frozen [[T2:%.*]]) // CHECK-LABEL: define void @_Z6DELETEP2B1 // CHECK: [[T3:%.*]] = load void (%struct.B1*)*, void (%struct.B1*)** getelementptr inbounds (void (%struct.B1*)*, void (%struct.B1*)** bitcast ({ [5 x i8*] }* @_ZTV2B1 to void (%struct.B1*)**), i64 2) -// CHECK-NEXT: call void [[T3]](%struct.B1* [[T4:%.*]]) +// CHECK-NEXT: call void [[T3]](%struct.B1* frozen [[T4:%.*]]) template struct Templ { @@ -43,6 +43,6 @@ } // CHECK: getelementptr inbounds (void (%struct.Templ*)*, void (%struct.Templ*)** bitcast ({ [7 x i8*] }* @_ZTV5TemplIiE to void (%struct.Templ*)**), i64 2) -// CHECK: declare void @_ZN5TemplIiED0Ev(%struct.Templ*) -// CHECK: define internal void @_ZN5TemplIiE1fEv(%struct.Templ* %this) -// CHECK: define internal void @_ZN5TemplIiE1gEv(%struct.Templ* %this) +// CHECK: declare void @_ZN5TemplIiED0Ev(%struct.Templ* frozen) +// CHECK: define internal void @_ZN5TemplIiE1fEv(%struct.Templ* frozen %this) +// CHECK: define internal void @_ZN5TemplIiE1gEv(%struct.Templ* frozen %this) diff --git a/clang/test/CodeGenCXX/apple-kext-linkage.cpp b/clang/test/CodeGenCXX/apple-kext-linkage.cpp --- a/clang/test/CodeGenCXX/apple-kext-linkage.cpp +++ b/clang/test/CodeGenCXX/apple-kext-linkage.cpp @@ -13,7 +13,7 @@ Derived d1; // ok } -// CHECK-LABEL: define internal i32 @_Z1fj( +// CHECK-LABEL: define internal frozen i32 @_Z1fj( inline unsigned f(unsigned n) { return n == 0 ? 0 : n + f(n-1); } unsigned g(unsigned n) { return f(n); } @@ -23,7 +23,7 @@ template void bar() {} template void bar(); -// CHECK-LABEL: define internal i32 @_Z5identIiET_S0_( +// CHECK-LABEL: define internal frozen i32 @_Z5identIiET_S0_( template X ident(X x) { return x; } int foo(int n) { return ident(n); } diff --git a/clang/test/CodeGenCXX/apple-kext.cpp b/clang/test/CodeGenCXX/apple-kext.cpp --- a/clang/test/CodeGenCXX/apple-kext.cpp +++ b/clang/test/CodeGenCXX/apple-kext.cpp @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -triple x86_64-apple-darwin10 -fno-use-cxa-atexit -fapple-kext -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args -triple x86_64-apple-darwin10 -fno-use-cxa-atexit -fapple-kext -emit-llvm -o - %s | FileCheck %s // CHECK: @_ZN5test01aE = global [[A:%.*]] zeroinitializer // CHECK: @llvm.global_ctors = appending global {{.*}} { i32 65535, void ()* [[CTOR0:@.*]], i8* null } diff --git a/clang/test/CodeGenCXX/arm-cc.cpp b/clang/test/CodeGenCXX/arm-cc.cpp --- a/clang/test/CodeGenCXX/arm-cc.cpp +++ b/clang/test/CodeGenCXX/arm-cc.cpp @@ -16,5 +16,5 @@ zed(a); } -// CHECK: declare void @_Z3fooPv(%class.SMLoc* sret align 4, i8*) -// CHECK: declare void @_Z3zed5SMLoc(%class.SMLoc*) +// CHECK: declare void @_Z3fooPv(%class.SMLoc* sret align 4, i8* frozen) +// CHECK: declare void @_Z3zed5SMLoc(%class.SMLoc* frozen) diff --git a/clang/test/CodeGenCXX/arm-swiftcall.cpp b/clang/test/CodeGenCXX/arm-swiftcall.cpp --- a/clang/test/CodeGenCXX/arm-swiftcall.cpp +++ b/clang/test/CodeGenCXX/arm-swiftcall.cpp @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -triple armv7-apple-darwin9 -emit-llvm -o - %s -Wno-return-type-c-linkage -std=c++03 | FileCheck %s -check-prefixes=CHECK +// RUN: %clang_cc1 -disable-frozen-args -triple armv7-apple-darwin9 -emit-llvm -o - %s -Wno-return-type-c-linkage -std=c++03 | FileCheck %s -check-prefixes=CHECK // This isn't really testing anything ARM-specific; it's just a convenient // 32-bit platform. diff --git a/clang/test/CodeGenCXX/arm.cpp b/clang/test/CodeGenCXX/arm.cpp --- a/clang/test/CodeGenCXX/arm.cpp +++ b/clang/test/CodeGenCXX/arm.cpp @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 %s -triple=thumbv7-apple-ios6.0 -fno-use-cxa-atexit -target-abi apcs-gnu -emit-llvm -std=gnu++98 -o - -fexceptions | FileCheck -check-prefix=CHECK -check-prefix=CHECK98 %s -// RUN: %clang_cc1 %s -triple=thumbv7-apple-ios6.0 -fno-use-cxa-atexit -target-abi apcs-gnu -emit-llvm -std=gnu++11 -o - -fexceptions | FileCheck -check-prefix=CHECK -check-prefix=CHECK11 %s +// RUN: %clang_cc1 -disable-frozen-args %s -triple=thumbv7-apple-ios6.0 -fno-use-cxa-atexit -target-abi apcs-gnu -emit-llvm -std=gnu++98 -o - -fexceptions | FileCheck -check-prefix=CHECK -check-prefix=CHECK98 %s +// RUN: %clang_cc1 -disable-frozen-args %s -triple=thumbv7-apple-ios6.0 -fno-use-cxa-atexit -target-abi apcs-gnu -emit-llvm -std=gnu++11 -o - -fexceptions | FileCheck -check-prefix=CHECK -check-prefix=CHECK11 %s // CHECK: @_ZZN5test74testEvE1x = internal global i32 0, align 4 // CHECK: @_ZGVZN5test74testEvE1x = internal global i32 0 @@ -26,7 +26,7 @@ // PR9593 // Make sure atexit(3) is used for global dtors. -// CHECK: call [[BAR:%.*]]* @_ZN3barC1Ev( +// CHECK: call frozen [[BAR:%.*]]* @_ZN3barC1Ev( // CHECK-NEXT: call i32 @atexit(void ()* @__dtor_baz) // CHECK-NOT: @_GLOBAL__D_a() @@ -46,26 +46,26 @@ // CHECK-LABEL: define void @_ZN5test14testEv() void test() { // CHECK: [[AV:%.*]] = alloca [[A:%.*]], align 1 - // CHECK: call [[A]]* @_ZN5test11AC1Ei([[A]]* [[AV]], i32 10) + // CHECK: call frozen [[A]]* @_ZN5test11AC1Ei([[A]]* [[AV]], i32 10) // CHECK: invoke void @_ZN5test11A3barEv([[A]]* [[AV]]) - // CHECK: call [[A]]* @_ZN5test11AD1Ev([[A]]* [[AV]]) + // CHECK: call frozen [[A]]* @_ZN5test11AD1Ev([[A]]* [[AV]]) // CHECK: ret void A a = 10; a.bar(); } - // CHECK: define linkonce_odr [[A]]* @_ZN5test11AC1Ei([[A]]* returned %this, i32 %i) unnamed_addr + // CHECK: define linkonce_odr frozen [[A]]* @_ZN5test11AC1Ei([[A]]* returned %this, i32 %i) unnamed_addr // CHECK: [[THIS:%.*]] = alloca [[A]]*, align 4 // CHECK: store [[A]]* {{.*}}, [[A]]** [[THIS]] // CHECK: [[THIS1:%.*]] = load [[A]]*, [[A]]** [[THIS]] - // CHECK: {{%.*}} = call [[A]]* @_ZN5test11AC2Ei( + // CHECK: {{%.*}} = call frozen [[A]]* @_ZN5test11AC2Ei( // CHECK: ret [[A]]* [[THIS1]] - // CHECK: define linkonce_odr [[A]]* @_ZN5test11AD1Ev([[A]]* returned %this) unnamed_addr + // CHECK: define linkonce_odr frozen [[A]]* @_ZN5test11AD1Ev([[A]]* returned %this) unnamed_addr // CHECK: [[THIS:%.*]] = alloca [[A]]*, align 4 // CHECK: store [[A]]* {{.*}}, [[A]]** [[THIS]] // CHECK: [[THIS1:%.*]] = load [[A]]*, [[A]]** [[THIS]] - // CHECK: {{%.*}} = call [[A]]* @_ZN5test11AD2Ev( + // CHECK: {{%.*}} = call frozen [[A]]* @_ZN5test11AD2Ev( // CHECK: ret [[A]]* [[THIS1]] } @@ -110,7 +110,7 @@ void a() { // CHECK-LABEL: define void @_ZN5test31aEv() - // CHECK: call noalias nonnull i8* @_Znam(i32 48) + // CHECK: call frozen noalias nonnull i8* @_Znam(i32 48) // CHECK: store i32 4 // CHECK: store i32 10 A *x = new A[10]; @@ -123,7 +123,7 @@ // CHECK: @llvm.uadd.with.overflow.i32(i32 {{.*}}, i32 8) // CHECK: [[OR:%.*]] = or i1 // CHECK: [[SZ:%.*]] = select i1 [[OR]] - // CHECK: call noalias nonnull i8* @_Znam(i32 [[SZ]]) + // CHECK: call frozen noalias nonnull i8* @_Znam(i32 [[SZ]]) // CHECK: store i32 4 // CHECK: store i32 [[N]] A *x = new A[n]; @@ -131,7 +131,7 @@ void c() { // CHECK-LABEL: define void @_ZN5test31cEv() - // CHECK: call noalias nonnull i8* @_Znam(i32 808) + // CHECK: call frozen noalias nonnull i8* @_Znam(i32 808) // CHECK: store i32 4 // CHECK: store i32 200 A (*x)[20] = new A[10][20]; @@ -144,7 +144,7 @@ // CHECK: [[NE:%.*]] = mul i32 [[N]], 20 // CHECK: @llvm.uadd.with.overflow.i32(i32 {{.*}}, i32 8) // CHECK: [[SZ:%.*]] = select - // CHECK: call noalias nonnull i8* @_Znam(i32 [[SZ]]) + // CHECK: call frozen noalias nonnull i8* @_Znam(i32 [[SZ]]) // CHECK: store i32 4 // CHECK: store i32 [[NE]] A (*x)[20] = new A[n][20]; @@ -185,7 +185,7 @@ void a() { // CHECK-LABEL: define void @_ZN5test41aEv() - // CHECK: call noalias nonnull i8* @_Znam(i32 48) + // CHECK: call frozen noalias nonnull i8* @_Znam(i32 48) // CHECK: store i32 4 // CHECK: store i32 10 A *x = new A[10]; @@ -197,7 +197,7 @@ // CHECK: @llvm.umul.with.overflow.i32(i32 [[N]], i32 4) // CHECK: @llvm.uadd.with.overflow.i32(i32 {{.*}}, i32 8) // CHECK: [[SZ:%.*]] = select - // CHECK: call noalias nonnull i8* @_Znam(i32 [[SZ]]) + // CHECK: call frozen noalias nonnull i8* @_Znam(i32 [[SZ]]) // CHECK: store i32 4 // CHECK: store i32 [[N]] A *x = new A[n]; @@ -205,7 +205,7 @@ void c() { // CHECK-LABEL: define void @_ZN5test41cEv() - // CHECK: call noalias nonnull i8* @_Znam(i32 808) + // CHECK: call frozen noalias nonnull i8* @_Znam(i32 808) // CHECK: store i32 4 // CHECK: store i32 200 A (*x)[20] = new A[10][20]; @@ -218,7 +218,7 @@ // CHECK: [[NE:%.*]] = mul i32 [[N]], 20 // CHECK: @llvm.uadd.with.overflow.i32(i32 {{.*}}, i32 8) // CHECK: [[SZ:%.*]] = select - // CHECK: call noalias nonnull i8* @_Znam(i32 [[SZ]]) + // CHECK: call frozen noalias nonnull i8* @_Znam(i32 [[SZ]]) // CHECK: store i32 4 // CHECK: store i32 [[NE]] A (*x)[20] = new A[n][20]; @@ -260,7 +260,7 @@ // CHECK: [[PTR:%.*]] = alloca [[A:%.*]]*, align 4 // CHECK-NEXT: store [[A]]* {{.*}}, [[A]]** [[PTR]], align 4 // CHECK-NEXT: [[TMP:%.*]] = load [[A]]*, [[A]]** [[PTR]], align 4 - // CHECK-NEXT: call [[A]]* @_ZN5test51AD1Ev([[A]]* [[TMP]]) + // CHECK-NEXT: call frozen [[A]]* @_ZN5test51AD1Ev([[A]]* [[TMP]]) // CHECK-NEXT: ret void a->~A(); } @@ -305,7 +305,7 @@ // CHECK-NEXT: [[T4:%.*]] = icmp ne i32 [[T3]], 0 // CHECK-NEXT: br i1 [[T4]] // -> fallthrough, end - // CHECK: [[INIT:%.*]] = invoke i32 @_ZN5test73fooEv() + // CHECK: [[INIT:%.*]] = invoke frozen i32 @_ZN5test73fooEv() // CHECK: store i32 [[INIT]], i32* @_ZZN5test74testEvE1x, align 4 // CHECK-NEXT: call void @__cxa_guard_release(i32* @_ZGVZN5test74testEvE1x) // CHECK-NEXT: br label @@ -340,7 +340,7 @@ // CHECK-NEXT: [[T4:%.*]] = icmp ne i32 [[T3]], 0 // CHECK-NEXT: br i1 [[T4]] // -> fallthrough, end - // CHECK: [[INIT:%.*]] = invoke [[TEST8A]]* @_ZN5test81AC1Ev([[TEST8A]]* @_ZZN5test84testEvE1x) + // CHECK: [[INIT:%.*]] = invoke frozen [[TEST8A]]* @_ZN5test81AC1Ev([[TEST8A]]* @_ZZN5test84testEvE1x) // FIXME: Here we register a global destructor that // unconditionally calls the destructor. That's what we've always @@ -375,7 +375,7 @@ A *testNew(unsigned n) { return new A[n]; } -// CHECK: define [[TEST9:%.*]]* @_ZN5test97testNewEj(i32 +// CHECK: define frozen [[TEST9:%.*]]* @_ZN5test97testNewEj(i32 // CHECK: [[N_VAR:%.*]] = alloca i32, align 4 // CHECK: [[N:%.*]] = load i32, i32* [[N_VAR]], align 4 // CHECK-NEXT: [[T0:%.*]] = call { i32, i1 } @llvm.umul.with.overflow.i32(i32 [[N]], i32 16) @@ -386,7 +386,7 @@ // CHECK-NEXT: [[OVERFLOW:%.*]] = or i1 [[O0]], [[O1]] // CHECK-NEXT: [[T3:%.*]] = extractvalue { i32, i1 } [[T2]], 0 // CHECK-NEXT: [[T4:%.*]] = select i1 [[OVERFLOW]], i32 -1, i32 [[T3]] -// CHECK-NEXT: [[ALLOC:%.*]] = call noalias nonnull i8* @_Znam(i32 [[T4]]) +// CHECK-NEXT: [[ALLOC:%.*]] = call frozen noalias nonnull i8* @_Znam(i32 [[T4]]) // CHECK-NEXT: [[T0:%.*]] = bitcast i8* [[ALLOC]] to i32* // CHECK-NEXT: store i32 16, i32* [[T0]] // CHECK-NEXT: [[T1:%.*]] = getelementptr inbounds i32, i32* [[T0]], i32 1 @@ -413,8 +413,8 @@ // Array deallocation follows. } - // CHECK: define linkonce_odr [[C:%.*]]* @_ZTv0_n12_N5test21CD1Ev( - // CHECK: call [[C]]* @_ZN5test21CD1Ev( + // CHECK: define linkonce_odr frozen [[C:%.*]]* @_ZTv0_n12_N5test21CD1Ev( + // CHECK: call frozen [[C]]* @_ZN5test21CD1Ev( // CHECK: ret [[C]]* undef // CHECK-LABEL: define linkonce_odr void @_ZTv0_n12_N5test21CD0Ev( diff --git a/clang/test/CodeGenCXX/arm64-constructor-return.cpp b/clang/test/CodeGenCXX/arm64-constructor-return.cpp --- a/clang/test/CodeGenCXX/arm64-constructor-return.cpp +++ b/clang/test/CodeGenCXX/arm64-constructor-return.cpp @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 %s -triple=arm64-apple-ios7.0.0 -emit-llvm -o - | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args %s -triple=arm64-apple-ios7.0.0 -emit-llvm -o - | FileCheck %s // rdar://12162905 struct S { diff --git a/clang/test/CodeGenCXX/arm64-darwinpcs.cpp b/clang/test/CodeGenCXX/arm64-darwinpcs.cpp --- a/clang/test/CodeGenCXX/arm64-darwinpcs.cpp +++ b/clang/test/CodeGenCXX/arm64-darwinpcs.cpp @@ -2,8 +2,8 @@ // RUN: %clang_cc1 -triple arm64-linux-gnu -emit-llvm -o - %s -target-abi darwinpcs | FileCheck %s --check-prefix=CHECK-DARWIN void test_extensions(bool a, char b, short c) {} -// CHECK: define void @_Z15test_extensionsbcs(i1 %a, i8 %b, i16 %c) -// CHECK-DARWIN: define void @_Z15test_extensionsbcs(i1 zeroext %a, i8 signext %b, i16 signext %c) +// CHECK: define void @_Z15test_extensionsbcs(i1 frozen %a, i8 frozen %b, i16 frozen %c) +// CHECK-DARWIN: define void @_Z15test_extensionsbcs(i1 frozen zeroext %a, i8 frozen signext %b, i16 frozen signext %c) struct Empty {}; void test_empty(Empty e) {} diff --git a/clang/test/CodeGenCXX/arm64.cpp b/clang/test/CodeGenCXX/arm64.cpp --- a/clang/test/CodeGenCXX/arm64.cpp +++ b/clang/test/CodeGenCXX/arm64.cpp @@ -30,7 +30,7 @@ int test() { return sizeof(B); } - // CHECK: define i32 @_ZN5test14testEv() + // CHECK: define frozen i32 @_ZN5test14testEv() // CHECK: ret i32 12 } diff --git a/clang/test/CodeGenCXX/armv7k.cpp b/clang/test/CodeGenCXX/armv7k.cpp --- a/clang/test/CodeGenCXX/armv7k.cpp +++ b/clang/test/CodeGenCXX/armv7k.cpp @@ -33,7 +33,7 @@ int test() { return sizeof(B); } - // CHECK: define i32 @_ZN5test14testEv() + // CHECK: define frozen i32 @_ZN5test14testEv() // CHECK: ret i32 12 } diff --git a/clang/test/CodeGenCXX/atomic-dllexport.cpp b/clang/test/CodeGenCXX/atomic-dllexport.cpp --- a/clang/test/CodeGenCXX/atomic-dllexport.cpp +++ b/clang/test/CodeGenCXX/atomic-dllexport.cpp @@ -3,7 +3,7 @@ struct __declspec(dllexport) SomeStruct { // Copy assignment operator should be produced, and exported: - // M32: define weak_odr dso_local dllexport x86_thiscallcc nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.SomeStruct* @"??4SomeStruct@@QAEAAU0@ABU0@@Z" - // M64: define weak_odr dso_local dllexport nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.SomeStruct* @"??4SomeStruct@@QEAAAEAU0@AEBU0@@Z" + // M32: define weak_odr dso_local dllexport x86_thiscallcc frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.SomeStruct* @"??4SomeStruct@@QAEAAU0@ABU0@@Z" + // M64: define weak_odr dso_local dllexport frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.SomeStruct* @"??4SomeStruct@@QEAAAEAU0@AEBU0@@Z" _Atomic(int) mData; }; diff --git a/clang/test/CodeGenCXX/atomic-inline.cpp b/clang/test/CodeGenCXX/atomic-inline.cpp --- a/clang/test/CodeGenCXX/atomic-inline.cpp +++ b/clang/test/CodeGenCXX/atomic-inline.cpp @@ -61,7 +61,7 @@ bool cmpxchg16() { AM16 am; // CHECK-LABEL: @_Z9cmpxchg16v - // CHECK: call zeroext i1 @__atomic_compare_exchange + // CHECK: call frozen zeroext i1 @__atomic_compare_exchange // CORE2-LABEL: @_Z9cmpxchg16v // CORE2: cmpxchg i128* {{.*}} monotonic return __atomic_compare_exchange(&m16, &s16, &am, 0, 0, 0); diff --git a/clang/test/CodeGenCXX/atomicinit.cpp b/clang/test/CodeGenCXX/atomicinit.cpp --- a/clang/test/CodeGenCXX/atomicinit.cpp +++ b/clang/test/CodeGenCXX/atomicinit.cpp @@ -65,15 +65,15 @@ }; // CHECK-LABEL: define {{.*}} @__cxx_global_var_init - // CHECK: call void @_ZN7PR180977dynamic1XC1Ei({{.*}}* nonnull @_ZN7PR180977dynamic1aE, i32 1) + // CHECK: call void @_ZN7PR180977dynamic1XC1Ei({{.*}}* frozen nonnull @_ZN7PR180977dynamic1aE, i32 frozen 1) _Atomic(X) a = X(1); // CHECK-LABEL: define {{.*}} @__cxx_global_var_init - // CHECK: call void @_ZN7PR180977dynamic1XC1Ei({{.*}}* nonnull @_ZN7PR180977dynamic1bE, i32 2) + // CHECK: call void @_ZN7PR180977dynamic1XC1Ei({{.*}}* frozen nonnull @_ZN7PR180977dynamic1bE, i32 frozen 2) _Atomic(X) b(X(2)); // CHECK-LABEL: define {{.*}} @__cxx_global_var_init - // CHECK: call void @_ZN7PR180977dynamic1XC1Ei({{.*}}* nonnull @_ZN7PR180977dynamic1cE, i32 3) + // CHECK: call void @_ZN7PR180977dynamic1XC1Ei({{.*}}* frozen nonnull @_ZN7PR180977dynamic1cE, i32 frozen 3) _Atomic(X) c{X(3)}; struct Y { @@ -81,7 +81,7 @@ _Atomic(int) b; }; // CHECK-LABEL: define {{.*}} @__cxx_global_var_init - // CHECK: call void @_ZN7PR180977dynamic1XC1Ei({{.*}}* getelementptr inbounds ({{.*}}, {{.*}}* @_ZN7PR180977dynamic1yE, i32 0, i32 0), i32 4) + // CHECK: call void @_ZN7PR180977dynamic1XC1Ei({{.*}}* frozen getelementptr inbounds ({{.*}}, {{.*}}* @_ZN7PR180977dynamic1yE, i32 0, i32 0), i32 frozen 4) // CHECK: store i32 5, i32* getelementptr inbounds ({{.*}}, {{.*}}* @_ZN7PR180977dynamic1yE, i32 0, i32 1) Y y = { X(4), 5 }; } diff --git a/clang/test/CodeGenCXX/attr-disable-tail-calls.cpp b/clang/test/CodeGenCXX/attr-disable-tail-calls.cpp --- a/clang/test/CodeGenCXX/attr-disable-tail-calls.cpp +++ b/clang/test/CodeGenCXX/attr-disable-tail-calls.cpp @@ -23,12 +23,12 @@ return t; } -// CHECK: define linkonce_odr i32 @_ZN1B2m3Ev(%class.B* %this) [[ATTRFALSE:#[0-9]+]] -// CHECK: declare i32 @_ZN1B2m4Ev(%class.B*) [[ATTRTRUE0:#[0-9]+]] -// CHECK: define linkonce_odr i32 @_ZN1B2m1Ev(%class.B* %this) unnamed_addr [[ATTRTRUE1:#[0-9]+]] -// CHECK: define linkonce_odr i32 @_ZN1B2m2Ev(%class.B* %this) unnamed_addr [[ATTRFALSE:#[0-9]+]] -// CHECK: define linkonce_odr i32 @_ZN1D2m1Ev(%class.D* %this) unnamed_addr [[ATTRFALSE:#[0-9]+]] -// CHECK: define linkonce_odr i32 @_ZN1D2m2Ev(%class.D* %this) unnamed_addr [[ATTRTRUE1:#[0-9]+]] +// CHECK: define linkonce_odr frozen i32 @_ZN1B2m3Ev(%class.B* frozen %this) [[ATTRFALSE:#[0-9]+]] +// CHECK: declare frozen i32 @_ZN1B2m4Ev(%class.B* frozen) [[ATTRTRUE0:#[0-9]+]] +// CHECK: define linkonce_odr frozen i32 @_ZN1B2m1Ev(%class.B* frozen %this) unnamed_addr [[ATTRTRUE1:#[0-9]+]] +// CHECK: define linkonce_odr frozen i32 @_ZN1B2m2Ev(%class.B* frozen %this) unnamed_addr [[ATTRFALSE:#[0-9]+]] +// CHECK: define linkonce_odr frozen i32 @_ZN1D2m1Ev(%class.D* frozen %this) unnamed_addr [[ATTRFALSE:#[0-9]+]] +// CHECK: define linkonce_odr frozen i32 @_ZN1D2m2Ev(%class.D* frozen %this) unnamed_addr [[ATTRTRUE1:#[0-9]+]] // CHECK: attributes [[ATTRFALSE]] = { {{.*}}"disable-tail-calls"="false"{{.*}} } // CHECK: attributes [[ATTRTRUE0]] = { {{.*}}"disable-tail-calls"="true"{{.*}} } diff --git a/clang/test/CodeGenCXX/attr-notail.cpp b/clang/test/CodeGenCXX/attr-notail.cpp --- a/clang/test/CodeGenCXX/attr-notail.cpp +++ b/clang/test/CodeGenCXX/attr-notail.cpp @@ -12,6 +12,6 @@ return c1->m2(); } -// CHECK-LABEL: define i32 @_Z4foo1iP6Class1( -// CHECK: %{{[a-z0-9]+}} = notail call i32 @_ZN6Class12m1Ev(%class.Class1* -// CHECK: %{{[a-z0-9]+}} = call i32 @_ZN6Class12m2Ev(%class.Class1* +// CHECK-LABEL: define frozen i32 @_Z4foo1iP6Class1( +// CHECK: %{{[a-z0-9]+}} = notail call frozen i32 @_ZN6Class12m1Ev(%class.Class1* +// CHECK: %{{[a-z0-9]+}} = call frozen i32 @_ZN6Class12m2Ev(%class.Class1* diff --git a/clang/test/CodeGenCXX/attr-target-mv-diff-ns.cpp b/clang/test/CodeGenCXX/attr-target-mv-diff-ns.cpp --- a/clang/test/CodeGenCXX/attr-target-mv-diff-ns.cpp +++ b/clang/test/CodeGenCXX/attr-target-mv-diff-ns.cpp @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -std=c++11 -triple x86_64-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=LINUX -// RUN: %clang_cc1 -std=c++11 -triple x86_64-windows-pc -emit-llvm %s -o - | FileCheck %s --check-prefix=WINDOWS +// RUN: %clang_cc1 -disable-frozen-args -std=c++11 -triple x86_64-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=LINUX +// RUN: %clang_cc1 -disable-frozen-args -std=c++11 -triple x86_64-windows-pc -emit-llvm %s -o - | FileCheck %s --check-prefix=WINDOWS // Test ensures that this properly differentiates between types in different // namespaces. int __attribute__((target("sse4.2"))) foo(int) { return 0; } @@ -21,41 +21,41 @@ // LINUX: @_Z3fooi.ifunc = weak_odr ifunc i32 (i32), i32 (i32)* ()* @_Z3fooi.resolver // LINUX: @_ZN2ns3fooEi.ifunc = weak_odr ifunc i32 (i32), i32 (i32)* ()* @_ZN2ns3fooEi.resolver -// LINUX: define i32 @_Z3fooi.sse4.2(i32 %0) +// LINUX: define frozen i32 @_Z3fooi.sse4.2(i32 %0) // LINUX: ret i32 0 -// LINUX: define i32 @_Z3fooi.arch_ivybridge(i32 %0) +// LINUX: define frozen i32 @_Z3fooi.arch_ivybridge(i32 %0) // LINUX: ret i32 1 -// LINUX: define i32 @_Z3fooi(i32 %0) +// LINUX: define frozen i32 @_Z3fooi(i32 %0) // LINUX: ret i32 2 -// WINDOWS: define dso_local i32 @"?foo@@YAHH@Z.sse4.2"(i32 %0) +// WINDOWS: define dso_local frozen i32 @"?foo@@YAHH@Z.sse4.2"(i32 %0) // WINDOWS: ret i32 0 -// WINDOWS: define dso_local i32 @"?foo@@YAHH@Z.arch_ivybridge"(i32 %0) +// WINDOWS: define dso_local frozen i32 @"?foo@@YAHH@Z.arch_ivybridge"(i32 %0) // WINDOWS: ret i32 1 -// WINDOWS: define dso_local i32 @"?foo@@YAHH@Z"(i32 %0) +// WINDOWS: define dso_local frozen i32 @"?foo@@YAHH@Z"(i32 %0) // WINDOWS: ret i32 2 -// LINUX: define i32 @_ZN2ns3fooEi.sse4.2(i32 %0) +// LINUX: define frozen i32 @_ZN2ns3fooEi.sse4.2(i32 %0) // LINUX: ret i32 0 -// LINUX: define i32 @_ZN2ns3fooEi.arch_ivybridge(i32 %0) +// LINUX: define frozen i32 @_ZN2ns3fooEi.arch_ivybridge(i32 %0) // LINUX: ret i32 1 -// LINUX: define i32 @_ZN2ns3fooEi(i32 %0) +// LINUX: define frozen i32 @_ZN2ns3fooEi(i32 %0) // LINUX: ret i32 2 -// WINDOWS: define dso_local i32 @"?foo@ns@@YAHH@Z.sse4.2"(i32 %0) +// WINDOWS: define dso_local frozen i32 @"?foo@ns@@YAHH@Z.sse4.2"(i32 %0) // WINDOWS: ret i32 0 -// WINDOWS: define dso_local i32 @"?foo@ns@@YAHH@Z.arch_ivybridge"(i32 %0) +// WINDOWS: define dso_local frozen i32 @"?foo@ns@@YAHH@Z.arch_ivybridge"(i32 %0) // WINDOWS: ret i32 1 -// WINDOWS: define dso_local i32 @"?foo@ns@@YAHH@Z"(i32 %0) +// WINDOWS: define dso_local frozen i32 @"?foo@ns@@YAHH@Z"(i32 %0) // WINDOWS: ret i32 2 -// LINUX: define i32 @_Z3barv() -// LINUX: call i32 @_Z3fooi.ifunc(i32 1) -// LINUX: call i32 @_ZN2ns3fooEi.ifunc(i32 2) +// LINUX: define frozen i32 @_Z3barv() +// LINUX: call frozen i32 @_Z3fooi.ifunc(i32 1) +// LINUX: call frozen i32 @_ZN2ns3fooEi.ifunc(i32 2) -// WINDOWS: define dso_local i32 @"?bar@@YAHXZ"() -// WINDOWS: call i32 @"?foo@@YAHH@Z.resolver"(i32 1) -// WINDOWS: call i32 @"?foo@ns@@YAHH@Z.resolver"(i32 2) +// WINDOWS: define dso_local frozen i32 @"?bar@@YAHXZ"() +// WINDOWS: call frozen i32 @"?foo@@YAHH@Z.resolver"(i32 1) +// WINDOWS: call frozen i32 @"?foo@ns@@YAHH@Z.resolver"(i32 2) // LINUX: define weak_odr i32 (i32)* @_Z3fooi.resolver() comdat // LINUX: ret i32 (i32)* @_Z3fooi.arch_sandybridge @@ -81,8 +81,8 @@ // WINDOWS: call i32 @"?foo@ns@@YAHH@Z.sse4.2"(i32 %0) // WINDOWS: call i32 @"?foo@ns@@YAHH@Z"(i32 %0) -// LINUX: declare i32 @_Z3fooi.arch_sandybridge(i32) -// LINUX: declare i32 @_ZN2ns3fooEi.arch_sandybridge(i32) +// LINUX: declare frozen i32 @_Z3fooi.arch_sandybridge(i32) +// LINUX: declare frozen i32 @_ZN2ns3fooEi.arch_sandybridge(i32) -// WINDOWS: declare dso_local i32 @"?foo@@YAHH@Z.arch_sandybridge"(i32) -// WINDOWS: declare dso_local i32 @"?foo@ns@@YAHH@Z.arch_sandybridge"(i32) +// WINDOWS: declare dso_local frozen i32 @"?foo@@YAHH@Z.arch_sandybridge"(i32) +// WINDOWS: declare dso_local frozen i32 @"?foo@ns@@YAHH@Z.arch_sandybridge"(i32) diff --git a/clang/test/CodeGenCXX/attr-target-mv-func-ptrs.cpp b/clang/test/CodeGenCXX/attr-target-mv-func-ptrs.cpp --- a/clang/test/CodeGenCXX/attr-target-mv-func-ptrs.cpp +++ b/clang/test/CodeGenCXX/attr-target-mv-func-ptrs.cpp @@ -35,20 +35,20 @@ // LINUX: @_Z3fooi.ifunc // LINUX: @_ZN1S3fooEi.ifunc -// LINUX: define i32 @_Z3barv() +// LINUX: define frozen i32 @_Z3barv() // Store to Free of ifunc // LINUX: store i32 (i32)* @_Z3fooi.ifunc // Store to Member of ifunc // LINUX: store { i64, i64 } { i64 ptrtoint (i32 (%struct.S*, i32)* @_ZN1S3fooEi.ifunc to i64), i64 0 }, { i64, i64 }* [[MEMBER:%[a-z]+]] // Call to 'f' with the ifunc -// LINUX: call void @_Z1fPFiiEM1SFiiE(i32 (i32)* @_Z3fooi.ifunc +// LINUX: call void @_Z1fPFiiEM1SFiiE(i32 (i32)* frozen @_Z3fooi.ifunc -// WINDOWS: define dso_local i32 @"?bar@@YAHXZ"() +// WINDOWS: define dso_local frozen i32 @"?bar@@YAHXZ"() // Store to Free // WINDOWS: store i32 (i32)* @"?foo@@YAHH@Z.resolver", i32 (i32)** // Store to Member // WINDOWS: store i8* bitcast (i32 (%struct.S*, i32)* @"?foo@S@@QEAAHH@Z.resolver" to i8*), i8** // Call to 'f' -// WINDOWS: call void @"?f@@YAXP6AHH@ZP8S@@EAAHH@Z@Z"(i32 (i32)* @"?foo@@YAHH@Z.resolver", i8* bitcast (i32 (%struct.S*, i32)* @"?foo@S@@QEAAHH@Z.resolver" to i8*)) +// WINDOWS: call void @"?f@@YAXP6AHH@ZP8S@@EAAHH@Z@Z"(i32 (i32)* frozen @"?foo@@YAHH@Z.resolver", i8* frozen bitcast (i32 (%struct.S*, i32)* @"?foo@S@@QEAAHH@Z.resolver" to i8*)) diff --git a/clang/test/CodeGenCXX/attr-target-mv-inalloca.cpp b/clang/test/CodeGenCXX/attr-target-mv-inalloca.cpp --- a/clang/test/CodeGenCXX/attr-target-mv-inalloca.cpp +++ b/clang/test/CodeGenCXX/attr-target-mv-inalloca.cpp @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -std=c++11 -triple i686-windows-msvc -emit-llvm %s -o - | FileCheck %s --check-prefix=WINDOWS -// RUN: %clang_cc1 -std=c++11 -triple x86_64-windows-msvc -emit-llvm %s -o - | FileCheck %s --check-prefix=WINDOWS64 +// RUN: %clang_cc1 -disable-frozen-args -std=c++11 -triple i686-windows-msvc -emit-llvm %s -o - | FileCheck %s --check-prefix=WINDOWS +// RUN: %clang_cc1 -disable-frozen-args -std=c++11 -triple x86_64-windows-msvc -emit-llvm %s -o - | FileCheck %s --check-prefix=WINDOWS64 struct Foo { Foo(); @@ -16,20 +16,20 @@ bar(f); } -// WINDOWS: define dso_local i32 @"?bar@@YAHUFoo@@@Z"(<{ %struct.Foo }>* inalloca %0) +// WINDOWS: define dso_local frozen i32 @"?bar@@YAHUFoo@@@Z"(<{ %struct.Foo }>* inalloca %0) // WINDOWS: %[[O:[0-9a-zA-Z]+]] = getelementptr inbounds <{ %struct.Foo }>, <{ %struct.Foo }>* %0, i32 0, i32 0 // WINDOWS: %[[X:[0-9a-zA-Z]+]] = getelementptr inbounds %struct.Foo, %struct.Foo* %[[O]], i32 0, i32 0 // WINDOWS: %[[LOAD:[0-9a-zA-Z]+]] = load i32, i32* %[[X]] // WINDOWS: ret i32 %[[LOAD]] -// WINDOWS: define dso_local i32 @"?bar@@YAHUFoo@@@Z.sse4.2"(<{ %struct.Foo }>* inalloca %0) +// WINDOWS: define dso_local frozen i32 @"?bar@@YAHUFoo@@@Z.sse4.2"(<{ %struct.Foo }>* inalloca %0) // WINDOWS: %[[O:[0-9a-zA-Z]+]] = getelementptr inbounds <{ %struct.Foo }>, <{ %struct.Foo }>* %0, i32 0, i32 0 // WINDOWS: %[[X:[0-9a-zA-Z]+]] = getelementptr inbounds %struct.Foo, %struct.Foo* %[[O]], i32 0, i32 0 // WINDOWS: %[[LOAD:[0-9a-zA-Z]+]] = load i32, i32* %[[X]] // WINDOWS: %[[ADD:[0-9a-zA-Z]+]] = add nsw i32 %[[LOAD]], 1 // WINDOWS: ret i32 %[[ADD]] -// WINDOWS: define dso_local i32 @"?bar@@YAHUFoo@@@Z.arch_ivybridge"(<{ %struct.Foo }>* inalloca %0) +// WINDOWS: define dso_local frozen i32 @"?bar@@YAHUFoo@@@Z.arch_ivybridge"(<{ %struct.Foo }>* inalloca %0) // WINDOWS: %[[O:[0-9a-zA-Z]+]] = getelementptr inbounds <{ %struct.Foo }>, <{ %struct.Foo }>* %0, i32 0, i32 0 // WINDOWS: %[[X:[0-9a-zA-Z]+]] = getelementptr inbounds %struct.Foo, %struct.Foo* %[[O]], i32 0, i32 0 // WINDOWS: %[[LOAD:[0-9a-zA-Z]+]] = load i32, i32* %[[X]] @@ -39,7 +39,7 @@ // WINDOWS: define dso_local void @"?usage@@YAXXZ"() // WINDOWS: %[[F:[0-9a-zA-Z]+]] = alloca %struct.Foo // WINDOWS: %[[ARGMEM:[0-9a-zA-Z]+]] = alloca inalloca <{ %struct.Foo }> -// WINDOWS: %[[CALL:[0-9a-zA-Z]+]] = call i32 @"?bar@@YAHUFoo@@@Z.resolver"(<{ %struct.Foo }>* inalloca %[[ARGMEM]]) +// WINDOWS: %[[CALL:[0-9a-zA-Z]+]] = call frozen i32 @"?bar@@YAHUFoo@@@Z.resolver"(<{ %struct.Foo }>* inalloca %[[ARGMEM]]) // WINDOWS: define weak_odr dso_local i32 @"?bar@@YAHUFoo@@@Z.resolver"(<{ %struct.Foo }>* %0) // WINDOWS: %[[RET:[0-9a-zA-Z]+]] = musttail call i32 @"?bar@@YAHUFoo@@@Z.arch_ivybridge"(<{ %struct.Foo }>* %0) @@ -50,18 +50,18 @@ // WINDOWS-NEXT: ret i32 %[[RET]] -// WINDOWS64: define dso_local i32 @"?bar@@YAHUFoo@@@Z"(%struct.Foo* %[[O:[0-9a-zA-Z]+]]) +// WINDOWS64: define dso_local frozen i32 @"?bar@@YAHUFoo@@@Z"(%struct.Foo* %[[O:[0-9a-zA-Z]+]]) // WINDOWS64: %[[X:[0-9a-zA-Z]+]] = getelementptr inbounds %struct.Foo, %struct.Foo* %[[O]], i32 0, i32 0 // WINDOWS64: %[[LOAD:[0-9a-zA-Z]+]] = load i32, i32* %[[X]] // WINDOWS64: ret i32 %[[LOAD]] -// WINDOWS64: define dso_local i32 @"?bar@@YAHUFoo@@@Z.sse4.2"(%struct.Foo* %[[O:[0-9a-zA-Z]+]]) +// WINDOWS64: define dso_local frozen i32 @"?bar@@YAHUFoo@@@Z.sse4.2"(%struct.Foo* %[[O:[0-9a-zA-Z]+]]) // WINDOWS64: %[[X:[0-9a-zA-Z]+]] = getelementptr inbounds %struct.Foo, %struct.Foo* %[[O]], i32 0, i32 0 // WINDOWS64: %[[LOAD:[0-9a-zA-Z]+]] = load i32, i32* %[[X]] // WINDOWS64: %[[ADD:[0-9a-zA-Z]+]] = add nsw i32 %[[LOAD]], 1 // WINDOWS64: ret i32 %[[ADD]] -// WINDOWS64: define dso_local i32 @"?bar@@YAHUFoo@@@Z.arch_ivybridge"(%struct.Foo* %[[O:[0-9a-zA-Z]+]]) +// WINDOWS64: define dso_local frozen i32 @"?bar@@YAHUFoo@@@Z.arch_ivybridge"(%struct.Foo* %[[O:[0-9a-zA-Z]+]]) // WINDOWS64: %[[X:[0-9a-zA-Z]+]] = getelementptr inbounds %struct.Foo, %struct.Foo* %[[O]], i32 0, i32 0 // WINDOWS64: %[[LOAD:[0-9a-zA-Z]+]] = load i32, i32* %[[X]] // WINDOWS64: %[[ADD:[0-9a-zA-Z]+]] = add nsw i32 %[[LOAD]], 2 @@ -70,7 +70,7 @@ // WINDOWS64: define dso_local void @"?usage@@YAXXZ"() // WINDOWS64: %[[F:[0-9a-zA-Z]+]] = alloca %struct.Foo // WINDOWS64: %[[ARG:[0-9a-zA-Z.]+]] = alloca %struct.Foo -// WINDOWS64: %[[CALL:[0-9a-zA-Z]+]] = call i32 @"?bar@@YAHUFoo@@@Z.resolver"(%struct.Foo* %[[ARG]]) +// WINDOWS64: %[[CALL:[0-9a-zA-Z]+]] = call frozen i32 @"?bar@@YAHUFoo@@@Z.resolver"(%struct.Foo* %[[ARG]]) // WINDOWS64: define weak_odr dso_local i32 @"?bar@@YAHUFoo@@@Z.resolver"(%struct.Foo* %0) // WINDOWS64: %[[RET:[0-9a-zA-Z]+]] = musttail call i32 @"?bar@@YAHUFoo@@@Z.arch_ivybridge"(%struct.Foo* %0) diff --git a/clang/test/CodeGenCXX/attr-target-mv-member-funcs.cpp b/clang/test/CodeGenCXX/attr-target-mv-member-funcs.cpp --- a/clang/test/CodeGenCXX/attr-target-mv-member-funcs.cpp +++ b/clang/test/CodeGenCXX/attr-target-mv-member-funcs.cpp @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -std=c++11 -triple x86_64-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=LINUX -// RUN: %clang_cc1 -std=c++11 -triple x86_64-windows-pc -emit-llvm %s -o - | FileCheck %s --check-prefix=WINDOWS +// RUN: %clang_cc1 -disable-frozen-args -std=c++11 -triple x86_64-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=LINUX +// RUN: %clang_cc1 -disable-frozen-args -std=c++11 -triple x86_64-windows-pc -emit-llvm %s -o - | FileCheck %s --check-prefix=WINDOWS struct S { int __attribute__((target("sse4.2"))) foo(int) { return 0; } @@ -73,23 +73,23 @@ // LINUX: @_ZN5templIiE3fooEi.ifunc = weak_odr ifunc i32 (%struct.templ*, i32), i32 (%struct.templ*, i32)* ()* @_ZN5templIiE3fooEi.resolver // LINUX: @_ZN5templIdE3fooEi.ifunc = weak_odr ifunc i32 (%struct.templ.0*, i32), i32 (%struct.templ.0*, i32)* ()* @_ZN5templIdE3fooEi.resolver -// LINUX: define i32 @_Z3barv() +// LINUX: define frozen i32 @_Z3barv() // LINUX: %s = alloca %struct.S, align 1 // LINUX: %s2 = alloca %struct.S, align 1 // LINUX: %C = alloca %struct.ConvertTo, align 1 -// LINUX: call nonnull align 1 dereferenceable(1) %struct.S* @_ZN1SaSERKS_.ifunc(%struct.S* %s2 +// LINUX: call frozen nonnull align 1 dereferenceable(1) %struct.S* @_ZN1SaSERKS_.ifunc(%struct.S* %s2 // LINUX: call void @_ZNK9ConvertTocv1SEv.ifunc(%struct.ConvertTo* %C) -// LINUX: call nonnull align 1 dereferenceable(1) %struct.S* @_ZN1SaSERKS_.ifunc(%struct.S* %s2 -// LINUX: call i32 @_ZN1S3fooEi.ifunc(%struct.S* %s, i32 0) +// LINUX: call frozen nonnull align 1 dereferenceable(1) %struct.S* @_ZN1SaSERKS_.ifunc(%struct.S* %s2 +// LINUX: call frozen i32 @_ZN1S3fooEi.ifunc(%struct.S* %s, i32 0) -// WINDOWS: define dso_local i32 @"?bar@@YAHXZ"() +// WINDOWS: define dso_local frozen i32 @"?bar@@YAHXZ"() // WINDOWS: %s = alloca %struct.S, align 1 // WINDOWS: %s2 = alloca %struct.S, align 1 // WINDOWS: %C = alloca %struct.ConvertTo, align 1 -// WINDOWS: call nonnull align 1 dereferenceable(1) %struct.S* @"??4S@@QEAAAEAU0@AEBU0@@Z.resolver"(%struct.S* %s2 +// WINDOWS: call frozen nonnull align 1 dereferenceable(1) %struct.S* @"??4S@@QEAAAEAU0@AEBU0@@Z.resolver"(%struct.S* %s2 // WINDOWS: call void @"??BConvertTo@@QEBA?AUS@@XZ.resolver"(%struct.ConvertTo* %C -// WINDOWS: call nonnull align 1 dereferenceable(1) %struct.S* @"??4S@@QEAAAEAU0@AEBU0@@Z.resolver"(%struct.S* %s2 -// WINDOWS: call i32 @"?foo@S@@QEAAHH@Z.resolver"(%struct.S* %s, i32 0) +// WINDOWS: call frozen nonnull align 1 dereferenceable(1) %struct.S* @"??4S@@QEAAAEAU0@AEBU0@@Z.resolver"(%struct.S* %s2 +// WINDOWS: call frozen i32 @"?foo@S@@QEAAHH@Z.resolver"(%struct.S* %s, i32 0) // LINUX: define weak_odr %struct.S* (%struct.S*, %struct.S*)* @_ZN1SaSERKS_.resolver() comdat // LINUX: ret %struct.S* (%struct.S*, %struct.S*)* @_ZN1SaSERKS_.arch_ivybridge @@ -119,11 +119,11 @@ // WINDOWS: call i32 @"?foo@S@@QEAAHH@Z.sse4.2" // WINDOWS: call i32 @"?foo@S@@QEAAHH@Z" -// LINUX: define i32 @_Z4bar2v() -// LINUX: call i32 @_ZN2S23fooEi.ifunc +// LINUX: define frozen i32 @_Z4bar2v() +// LINUX: call frozen i32 @_ZN2S23fooEi.ifunc -// WINDOWS: define dso_local i32 @"?bar2@@YAHXZ"() -// WINDOWS: call i32 @"?foo@S2@@QEAAHH@Z.resolver" +// WINDOWS: define dso_local frozen i32 @"?bar2@@YAHXZ"() +// WINDOWS: call frozen i32 @"?foo@S2@@QEAAHH@Z.resolver" // LINUX: define weak_odr i32 (%struct.S2*, i32)* @_ZN2S23fooEi.resolver() comdat // LINUX: ret i32 (%struct.S2*, i32)* @_ZN2S23fooEi.arch_sandybridge @@ -137,21 +137,21 @@ // WINDOWS: call i32 @"?foo@S2@@QEAAHH@Z.sse4.2" // WINDOWS: call i32 @"?foo@S2@@QEAAHH@Z" -// LINUX: define i32 @_ZN2S23fooEi.sse4.2(%struct.S2* %this, i32 %0) -// LINUX: define i32 @_ZN2S23fooEi.arch_ivybridge(%struct.S2* %this, i32 %0) -// LINUX: define i32 @_ZN2S23fooEi(%struct.S2* %this, i32 %0) +// LINUX: define frozen i32 @_ZN2S23fooEi.sse4.2(%struct.S2* %this, i32 %0) +// LINUX: define frozen i32 @_ZN2S23fooEi.arch_ivybridge(%struct.S2* %this, i32 %0) +// LINUX: define frozen i32 @_ZN2S23fooEi(%struct.S2* %this, i32 %0) -// WINDOWS: define dso_local i32 @"?foo@S2@@QEAAHH@Z.sse4.2"(%struct.S2* %this, i32 %0) -// WINDOWS: define dso_local i32 @"?foo@S2@@QEAAHH@Z.arch_ivybridge"(%struct.S2* %this, i32 %0) -// WINDOWS: define dso_local i32 @"?foo@S2@@QEAAHH@Z"(%struct.S2* %this, i32 %0) +// WINDOWS: define dso_local frozen i32 @"?foo@S2@@QEAAHH@Z.sse4.2"(%struct.S2* %this, i32 %0) +// WINDOWS: define dso_local frozen i32 @"?foo@S2@@QEAAHH@Z.arch_ivybridge"(%struct.S2* %this, i32 %0) +// WINDOWS: define dso_local frozen i32 @"?foo@S2@@QEAAHH@Z"(%struct.S2* %this, i32 %0) -// LINUX: define i32 @_Z9templ_usev() -// LINUX: call i32 @_ZN5templIiE3fooEi.ifunc -// LINUX: call i32 @_ZN5templIdE3fooEi.ifunc +// LINUX: define frozen i32 @_Z9templ_usev() +// LINUX: call frozen i32 @_ZN5templIiE3fooEi.ifunc +// LINUX: call frozen i32 @_ZN5templIdE3fooEi.ifunc -// WINDOWS: define dso_local i32 @"?templ_use@@YAHXZ"() -// WINDOWS: call i32 @"?foo@?$templ@H@@QEAAHH@Z.resolver" -// WINDOWS: call i32 @"?foo@?$templ@N@@QEAAHH@Z.resolver" +// WINDOWS: define dso_local frozen i32 @"?templ_use@@YAHXZ"() +// WINDOWS: call frozen i32 @"?foo@?$templ@H@@QEAAHH@Z.resolver" +// WINDOWS: call frozen i32 @"?foo@?$templ@N@@QEAAHH@Z.resolver" // LINUX: define weak_odr i32 (%struct.templ*, i32)* @_ZN5templIiE3fooEi.resolver() comdat // LINUX: ret i32 (%struct.templ*, i32)* @_ZN5templIiE3fooEi.arch_sandybridge @@ -177,44 +177,44 @@ // WINDOWS: call i32 @"?foo@?$templ@N@@QEAAHH@Z.sse4.2" // WINDOWS: call i32 @"?foo@?$templ@N@@QEAAHH@Z" -// LINUX: define linkonce_odr i32 @_ZN1S3fooEi.sse4.2(%struct.S* %this, i32 %0) +// LINUX: define linkonce_odr frozen i32 @_ZN1S3fooEi.sse4.2(%struct.S* %this, i32 %0) // LINUX: ret i32 0 -// WINDOWS: define linkonce_odr dso_local i32 @"?foo@S@@QEAAHH@Z.sse4.2"(%struct.S* %this, i32 %0) +// WINDOWS: define linkonce_odr dso_local frozen i32 @"?foo@S@@QEAAHH@Z.sse4.2"(%struct.S* %this, i32 %0) // WINDOWS: ret i32 0 -// LINUX: declare i32 @_ZN1S3fooEi.arch_sandybridge(%struct.S*, i32) +// LINUX: declare frozen i32 @_ZN1S3fooEi.arch_sandybridge(%struct.S*, i32) -// WINDOWS: declare dso_local i32 @"?foo@S@@QEAAHH@Z.arch_sandybridge"(%struct.S*, i32) +// WINDOWS: declare dso_local frozen i32 @"?foo@S@@QEAAHH@Z.arch_sandybridge"(%struct.S*, i32) -// LINUX: define linkonce_odr i32 @_ZN1S3fooEi.arch_ivybridge(%struct.S* %this, i32 %0) +// LINUX: define linkonce_odr frozen i32 @_ZN1S3fooEi.arch_ivybridge(%struct.S* %this, i32 %0) // LINUX: ret i32 1 -// WINDOWS: define linkonce_odr dso_local i32 @"?foo@S@@QEAAHH@Z.arch_ivybridge"(%struct.S* %this, i32 %0) +// WINDOWS: define linkonce_odr dso_local frozen i32 @"?foo@S@@QEAAHH@Z.arch_ivybridge"(%struct.S* %this, i32 %0) // WINDOWS: ret i32 1 -// LINUX: define linkonce_odr i32 @_ZN1S3fooEi(%struct.S* %this, i32 %0) +// LINUX: define linkonce_odr frozen i32 @_ZN1S3fooEi(%struct.S* %this, i32 %0) // LINUX: ret i32 2 -// WINDOWS: define linkonce_odr dso_local i32 @"?foo@S@@QEAAHH@Z"(%struct.S* %this, i32 %0) +// WINDOWS: define linkonce_odr dso_local frozen i32 @"?foo@S@@QEAAHH@Z"(%struct.S* %this, i32 %0) // WINDOWS: ret i32 2 -// LINUX: define linkonce_odr i32 @_ZN5templIiE3fooEi.sse4.2 -// LINUX: declare i32 @_ZN5templIiE3fooEi.arch_sandybridge -// LINUX: define linkonce_odr i32 @_ZN5templIiE3fooEi.arch_ivybridge -// LINUX: define linkonce_odr i32 @_ZN5templIiE3fooEi - -// WINDOWS: define linkonce_odr dso_local i32 @"?foo@?$templ@H@@QEAAHH@Z.sse4.2" -// WINDOWS: declare dso_local i32 @"?foo@?$templ@H@@QEAAHH@Z.arch_sandybridge" -// WINDOWS: define linkonce_odr dso_local i32 @"?foo@?$templ@H@@QEAAHH@Z.arch_ivybridge" -// WINDOWS: define linkonce_odr dso_local i32 @"?foo@?$templ@H@@QEAAHH@Z" - -// LINUX: define linkonce_odr i32 @_ZN5templIdE3fooEi.sse4.2 -// LINUX: declare i32 @_ZN5templIdE3fooEi.arch_sandybridge -// LINUX: define linkonce_odr i32 @_ZN5templIdE3fooEi.arch_ivybridge -// LINUX: define linkonce_odr i32 @_ZN5templIdE3fooEi - -// WINDOWS: define linkonce_odr dso_local i32 @"?foo@?$templ@N@@QEAAHH@Z.sse4.2" -// WINDOWS: declare dso_local i32 @"?foo@?$templ@N@@QEAAHH@Z.arch_sandybridge" -// WINDOWS: define linkonce_odr dso_local i32 @"?foo@?$templ@N@@QEAAHH@Z.arch_ivybridge" -// WINDOWS: define linkonce_odr dso_local i32 @"?foo@?$templ@N@@QEAAHH@Z" +// LINUX: define linkonce_odr frozen i32 @_ZN5templIiE3fooEi.sse4.2 +// LINUX: declare frozen i32 @_ZN5templIiE3fooEi.arch_sandybridge +// LINUX: define linkonce_odr frozen i32 @_ZN5templIiE3fooEi.arch_ivybridge +// LINUX: define linkonce_odr frozen i32 @_ZN5templIiE3fooEi + +// WINDOWS: define linkonce_odr dso_local frozen i32 @"?foo@?$templ@H@@QEAAHH@Z.sse4.2" +// WINDOWS: declare dso_local frozen i32 @"?foo@?$templ@H@@QEAAHH@Z.arch_sandybridge" +// WINDOWS: define linkonce_odr dso_local frozen i32 @"?foo@?$templ@H@@QEAAHH@Z.arch_ivybridge" +// WINDOWS: define linkonce_odr dso_local frozen i32 @"?foo@?$templ@H@@QEAAHH@Z" + +// LINUX: define linkonce_odr frozen i32 @_ZN5templIdE3fooEi.sse4.2 +// LINUX: declare frozen i32 @_ZN5templIdE3fooEi.arch_sandybridge +// LINUX: define linkonce_odr frozen i32 @_ZN5templIdE3fooEi.arch_ivybridge +// LINUX: define linkonce_odr frozen i32 @_ZN5templIdE3fooEi + +// WINDOWS: define linkonce_odr dso_local frozen i32 @"?foo@?$templ@N@@QEAAHH@Z.sse4.2" +// WINDOWS: declare dso_local frozen i32 @"?foo@?$templ@N@@QEAAHH@Z.arch_sandybridge" +// WINDOWS: define linkonce_odr dso_local frozen i32 @"?foo@?$templ@N@@QEAAHH@Z.arch_ivybridge" +// WINDOWS: define linkonce_odr dso_local frozen i32 @"?foo@?$templ@N@@QEAAHH@Z" diff --git a/clang/test/CodeGenCXX/attr-target-mv-out-of-line-defs.cpp b/clang/test/CodeGenCXX/attr-target-mv-out-of-line-defs.cpp --- a/clang/test/CodeGenCXX/attr-target-mv-out-of-line-defs.cpp +++ b/clang/test/CodeGenCXX/attr-target-mv-out-of-line-defs.cpp @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -std=c++11 -triple x86_64-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=LINUX -// RUN: %clang_cc1 -std=c++11 -triple x86_64-windows-pc -emit-llvm %s -o - | FileCheck %s --check-prefix=WINDOWS +// RUN: %clang_cc1 -disable-frozen-args -std=c++11 -triple x86_64-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=LINUX +// RUN: %clang_cc1 -disable-frozen-args -std=c++11 -triple x86_64-windows-pc -emit-llvm %s -o - | FileCheck %s --check-prefix=WINDOWS struct S { int __attribute__((target("sse4.2"))) foo(int); int __attribute__((target("arch=sandybridge"))) foo(int); @@ -18,31 +18,31 @@ // LINUX: @_ZN1S3fooEi.ifunc = weak_odr ifunc i32 (%struct.S*, i32), i32 (%struct.S*, i32)* ()* @_ZN1S3fooEi.resolver -// LINUX: define i32 @_ZN1S3fooEi(%struct.S* %this, i32 %0) +// LINUX: define frozen i32 @_ZN1S3fooEi(%struct.S* %this, i32 %0) // LINUX: ret i32 2 -// WINDOWS: define dso_local i32 @"?foo@S@@QEAAHH@Z"(%struct.S* %this, i32 %0) +// WINDOWS: define dso_local frozen i32 @"?foo@S@@QEAAHH@Z"(%struct.S* %this, i32 %0) // WINDOWS: ret i32 2 -// LINUX: define i32 @_ZN1S3fooEi.sse4.2(%struct.S* %this, i32 %0) +// LINUX: define frozen i32 @_ZN1S3fooEi.sse4.2(%struct.S* %this, i32 %0) // LINUX: ret i32 0 -// WINDOWS: define dso_local i32 @"?foo@S@@QEAAHH@Z.sse4.2"(%struct.S* %this, i32 %0) +// WINDOWS: define dso_local frozen i32 @"?foo@S@@QEAAHH@Z.sse4.2"(%struct.S* %this, i32 %0) // WINDOWS: ret i32 0 -// LINUX: define i32 @_ZN1S3fooEi.arch_ivybridge(%struct.S* %this, i32 %0) +// LINUX: define frozen i32 @_ZN1S3fooEi.arch_ivybridge(%struct.S* %this, i32 %0) // LINUX: ret i32 1 -// WINDOWS: define dso_local i32 @"?foo@S@@QEAAHH@Z.arch_ivybridge"(%struct.S* %this, i32 %0) +// WINDOWS: define dso_local frozen i32 @"?foo@S@@QEAAHH@Z.arch_ivybridge"(%struct.S* %this, i32 %0) // WINDOWS: ret i32 1 -// LINUX: define i32 @_Z3barv() +// LINUX: define frozen i32 @_Z3barv() // LINUX: %s = alloca %struct.S, align 1 -// LINUX: %call = call i32 @_ZN1S3fooEi.ifunc(%struct.S* %s, i32 0) +// LINUX: %call = call frozen i32 @_ZN1S3fooEi.ifunc(%struct.S* %s, i32 0) -// WINDOWS: define dso_local i32 @"?bar@@YAHXZ"() +// WINDOWS: define dso_local frozen i32 @"?bar@@YAHXZ"() // WINDOWS: %s = alloca %struct.S, align 1 -// WINDOWS: %call = call i32 @"?foo@S@@QEAAHH@Z.resolver"(%struct.S* %s, i32 0) +// WINDOWS: %call = call frozen i32 @"?foo@S@@QEAAHH@Z.resolver"(%struct.S* %s, i32 0) // LINUX: define weak_odr i32 (%struct.S*, i32)* @_ZN1S3fooEi.resolver() comdat // LINUX: ret i32 (%struct.S*, i32)* @_ZN1S3fooEi.arch_sandybridge @@ -56,6 +56,6 @@ // WINDOWS: call i32 @"?foo@S@@QEAAHH@Z.sse4.2"(%struct.S* %0, i32 %1) // WINDOWS: call i32 @"?foo@S@@QEAAHH@Z"(%struct.S* %0, i32 %1) -// LINUX: declare i32 @_ZN1S3fooEi.arch_sandybridge(%struct.S*, i32) +// LINUX: declare frozen i32 @_ZN1S3fooEi.arch_sandybridge(%struct.S*, i32) -// WINDOWS: declare dso_local i32 @"?foo@S@@QEAAHH@Z.arch_sandybridge"(%struct.S*, i32) +// WINDOWS: declare dso_local frozen i32 @"?foo@S@@QEAAHH@Z.arch_sandybridge"(%struct.S*, i32) diff --git a/clang/test/CodeGenCXX/attr-target-mv-overloads.cpp b/clang/test/CodeGenCXX/attr-target-mv-overloads.cpp --- a/clang/test/CodeGenCXX/attr-target-mv-overloads.cpp +++ b/clang/test/CodeGenCXX/attr-target-mv-overloads.cpp @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -std=c++11 -triple x86_64-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=LINUX -// RUN: %clang_cc1 -std=c++11 -triple x86_64-windows-pc -emit-llvm %s -o - | FileCheck %s --check-prefix=WINDOWS +// RUN: %clang_cc1 -disable-frozen-args -std=c++11 -triple x86_64-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=LINUX +// RUN: %clang_cc1 -disable-frozen-args -std=c++11 -triple x86_64-windows-pc -emit-llvm %s -o - | FileCheck %s --check-prefix=WINDOWS int __attribute__((target("sse4.2"))) foo_overload(int) { return 0; } int __attribute__((target("arch=sandybridge"))) foo_overload(int); @@ -17,39 +17,39 @@ // LINUX: @_Z12foo_overloadv.ifunc = weak_odr ifunc i32 (), i32 ()* ()* @_Z12foo_overloadv.resolver // LINUX: @_Z12foo_overloadi.ifunc = weak_odr ifunc i32 (i32), i32 (i32)* ()* @_Z12foo_overloadi.resolver -// LINUX: define i32 @_Z12foo_overloadi.sse4.2(i32 %0) +// LINUX: define frozen i32 @_Z12foo_overloadi.sse4.2(i32 %0) // LINUX: ret i32 0 -// LINUX: define i32 @_Z12foo_overloadi.arch_ivybridge(i32 %0) +// LINUX: define frozen i32 @_Z12foo_overloadi.arch_ivybridge(i32 %0) // LINUX: ret i32 1 -// LINUX: define i32 @_Z12foo_overloadi(i32 %0) +// LINUX: define frozen i32 @_Z12foo_overloadi(i32 %0) // LINUX: ret i32 2 -// LINUX: define i32 @_Z12foo_overloadv.sse4.2() +// LINUX: define frozen i32 @_Z12foo_overloadv.sse4.2() // LINUX: ret i32 0 -// LINUX: define i32 @_Z12foo_overloadv.arch_ivybridge() +// LINUX: define frozen i32 @_Z12foo_overloadv.arch_ivybridge() // LINUX: ret i32 1 -// LINUX: define i32 @_Z12foo_overloadv() +// LINUX: define frozen i32 @_Z12foo_overloadv() // LINUX: ret i32 2 -// WINDOWS: define dso_local i32 @"?foo_overload@@YAHH@Z.sse4.2"(i32 %0) +// WINDOWS: define dso_local frozen i32 @"?foo_overload@@YAHH@Z.sse4.2"(i32 %0) // WINDOWS: ret i32 0 -// WINDOWS: define dso_local i32 @"?foo_overload@@YAHH@Z.arch_ivybridge"(i32 %0) +// WINDOWS: define dso_local frozen i32 @"?foo_overload@@YAHH@Z.arch_ivybridge"(i32 %0) // WINDOWS: ret i32 1 -// WINDOWS: define dso_local i32 @"?foo_overload@@YAHH@Z"(i32 %0) +// WINDOWS: define dso_local frozen i32 @"?foo_overload@@YAHH@Z"(i32 %0) // WINDOWS: ret i32 2 -// WINDOWS: define dso_local i32 @"?foo_overload@@YAHXZ.sse4.2"() +// WINDOWS: define dso_local frozen i32 @"?foo_overload@@YAHXZ.sse4.2"() // WINDOWS: ret i32 0 -// WINDOWS: define dso_local i32 @"?foo_overload@@YAHXZ.arch_ivybridge"() +// WINDOWS: define dso_local frozen i32 @"?foo_overload@@YAHXZ.arch_ivybridge"() // WINDOWS: ret i32 1 -// WINDOWS: define dso_local i32 @"?foo_overload@@YAHXZ"() +// WINDOWS: define dso_local frozen i32 @"?foo_overload@@YAHXZ"() // WINDOWS: ret i32 2 -// LINUX: define i32 @_Z4bar2v() -// LINUX: call i32 @_Z12foo_overloadv.ifunc() -// LINUX: call i32 @_Z12foo_overloadi.ifunc(i32 1) +// LINUX: define frozen i32 @_Z4bar2v() +// LINUX: call frozen i32 @_Z12foo_overloadv.ifunc() +// LINUX: call frozen i32 @_Z12foo_overloadi.ifunc(i32 1) -// WINDOWS: define dso_local i32 @"?bar2@@YAHXZ"() -// WINDOWS: call i32 @"?foo_overload@@YAHXZ.resolver"() -// WINDOWS: call i32 @"?foo_overload@@YAHH@Z.resolver"(i32 1) +// WINDOWS: define dso_local frozen i32 @"?bar2@@YAHXZ"() +// WINDOWS: call frozen i32 @"?foo_overload@@YAHXZ.resolver"() +// WINDOWS: call frozen i32 @"?foo_overload@@YAHH@Z.resolver"(i32 1) // LINUX: define weak_odr i32 ()* @_Z12foo_overloadv.resolver() comdat // LINUX: ret i32 ()* @_Z12foo_overloadv.arch_sandybridge @@ -75,8 +75,8 @@ // WINDOWS: call i32 @"?foo_overload@@YAHH@Z.sse4.2" // WINDOWS: call i32 @"?foo_overload@@YAHH@Z" -// LINUX: declare i32 @_Z12foo_overloadv.arch_sandybridge() -// LINUX: declare i32 @_Z12foo_overloadi.arch_sandybridge(i32) +// LINUX: declare frozen i32 @_Z12foo_overloadv.arch_sandybridge() +// LINUX: declare frozen i32 @_Z12foo_overloadi.arch_sandybridge(i32) -// WINDOWS: declare dso_local i32 @"?foo_overload@@YAHXZ.arch_sandybridge"() -// WINDOWS: declare dso_local i32 @"?foo_overload@@YAHH@Z.arch_sandybridge"(i32) +// WINDOWS: declare dso_local frozen i32 @"?foo_overload@@YAHXZ.arch_sandybridge"() +// WINDOWS: declare dso_local frozen i32 @"?foo_overload@@YAHH@Z.arch_sandybridge"(i32) diff --git a/clang/test/CodeGenCXX/attr-used-member-function-implicit-instantiation.cpp b/clang/test/CodeGenCXX/attr-used-member-function-implicit-instantiation.cpp --- a/clang/test/CodeGenCXX/attr-used-member-function-implicit-instantiation.cpp +++ b/clang/test/CodeGenCXX/attr-used-member-function-implicit-instantiation.cpp @@ -13,7 +13,7 @@ void test() { // Check that InstantiateUsedMemberDefinition::S::f() is defined // as a result of the S class template implicit instantiation - // CHECK: define linkonce_odr i32 @_ZN31InstantiateUsedMemberDefinition1SIiE1fEv + // CHECK: define linkonce_odr frozen i32 @_ZN31InstantiateUsedMemberDefinition1SIiE1fEv S inst; } } // namespace InstantiateUsedMemberDefinition diff --git a/clang/test/CodeGenCXX/attr-x86-interrupt.cpp b/clang/test/CodeGenCXX/attr-x86-interrupt.cpp --- a/clang/test/CodeGenCXX/attr-x86-interrupt.cpp +++ b/clang/test/CodeGenCXX/attr-x86-interrupt.cpp @@ -18,18 +18,18 @@ static void foo9(int *a) __attribute__((interrupt)) {} }; // X86_64_LINUX: @llvm.used = appending global [3 x i8*] [i8* bitcast (void (i32*, i64)* @{{.*}}foo7{{.*}} to i8*), i8* bitcast (void (i32*)* @{{.*}}foo8{{.*}} to i8*), i8* bitcast (void (i32*)* @{{.*}}foo9{{.*}} to i8*)], section "llvm.metadata" -// X86_64_LINUX: define x86_intrcc void @{{.*}}foo7{{.*}}(i32* %{{.+}}, i64 %{{.+}}) -// X86_64_LINUX: define x86_intrcc void @{{.*}}foo8{{.*}}(i32* %{{.+}}) -// X86_64_LINUX: define linkonce_odr x86_intrcc void @{{.*}}foo9{{.*}}(i32* %{{.+}}) +// X86_64_LINUX: define x86_intrcc void @{{.*}}foo7{{.*}}(i32* frozen %{{.+}}, i64 frozen %{{.+}}) +// X86_64_LINUX: define x86_intrcc void @{{.*}}foo8{{.*}}(i32* frozen %{{.+}}) +// X86_64_LINUX: define linkonce_odr x86_intrcc void @{{.*}}foo9{{.*}}(i32* frozen %{{.+}}) // X86_LINUX: @llvm.used = appending global [3 x i8*] [i8* bitcast (void (i32*, i32)* @{{.*}}foo7{{.*}} to i8*), i8* bitcast (void (i32*)* @{{.*}}foo8{{.*}} to i8*), i8* bitcast (void (i32*)* @{{.*}}foo9{{.*}} to i8*)], section "llvm.metadata" -// X86_LINUX: define x86_intrcc void @{{.*}}foo7{{.*}}(i32* %{{.+}}, i32 %{{.+}}) -// X86_LINUX: define x86_intrcc void @{{.*}}foo8{{.*}}(i32* %{{.+}}) -// X86_LINUX: define linkonce_odr x86_intrcc void @{{.*}}foo9{{.*}}(i32* %{{.+}}) +// X86_LINUX: define x86_intrcc void @{{.*}}foo7{{.*}}(i32* frozen %{{.+}}, i32 frozen %{{.+}}) +// X86_LINUX: define x86_intrcc void @{{.*}}foo8{{.*}}(i32* frozen %{{.+}}) +// X86_LINUX: define linkonce_odr x86_intrcc void @{{.*}}foo9{{.*}}(i32* frozen %{{.+}}) // X86_64_WIN: @llvm.used = appending global [3 x i8*] [i8* bitcast (void (i32*, i64)* @{{.*}}foo7{{.*}} to i8*), i8* bitcast (void (i32*)* @{{.*}}foo8{{.*}} to i8*), i8* bitcast (void (i32*)* @{{.*}}foo9{{.*}} to i8*)], section "llvm.metadata" -// X86_64_WIN: define dso_local x86_intrcc void @{{.*}}foo7{{.*}}(i32* %{{.+}}, i64 %{{.+}}) -// X86_64_WIN: define dso_local x86_intrcc void @{{.*}}foo8{{.*}}(i32* %{{.+}}) -// X86_64_WIN: define linkonce_odr dso_local x86_intrcc void @{{.*}}foo9{{.*}}(i32* %{{.+}}) +// X86_64_WIN: define dso_local x86_intrcc void @{{.*}}foo7{{.*}}(i32* frozen %{{.+}}, i64 frozen %{{.+}}) +// X86_64_WIN: define dso_local x86_intrcc void @{{.*}}foo8{{.*}}(i32* frozen %{{.+}}) +// X86_64_WIN: define linkonce_odr dso_local x86_intrcc void @{{.*}}foo9{{.*}}(i32* frozen %{{.+}}) // X86_WIN: @llvm.used = appending global [3 x i8*] [i8* bitcast (void (i32*, i32)* @{{.*}}foo7{{.*}} to i8*), i8* bitcast (void (i32*)* @{{.*}}foo8{{.*}} to i8*), i8* bitcast (void (i32*)* @{{.*}}foo9{{.*}} to i8*)], section "llvm.metadata" -// X86_WIN: define dso_local x86_intrcc void @{{.*}}foo7{{.*}}(i32* %{{.+}}, i32 %{{.+}}) -// X86_WIN: define dso_local x86_intrcc void @{{.*}}foo8{{.*}}(i32* %{{.+}}) -// X86_WIN: define linkonce_odr dso_local x86_intrcc void @{{.*}}foo9{{.*}}(i32* %{{.+}}) +// X86_WIN: define dso_local x86_intrcc void @{{.*}}foo7{{.*}}(i32* frozen %{{.+}}, i32 frozen %{{.+}}) +// X86_WIN: define dso_local x86_intrcc void @{{.*}}foo8{{.*}}(i32* frozen %{{.+}}) +// X86_WIN: define linkonce_odr dso_local x86_intrcc void @{{.*}}foo9{{.*}}(i32* frozen %{{.+}}) diff --git a/clang/test/CodeGenCXX/attr.cpp b/clang/test/CodeGenCXX/attr.cpp --- a/clang/test/CodeGenCXX/attr.cpp +++ b/clang/test/CodeGenCXX/attr.cpp @@ -2,7 +2,7 @@ // CHECK: @test2 = alias i32 (), i32 ()* @_Z5test1v -// CHECK: define i32 @_Z3foov() [[NUW:#[0-9]+]] align 1024 +// CHECK: define frozen i32 @_Z3foov() [[NUW:#[0-9]+]] align 1024 int foo() __attribute__((aligned(1024))); int foo() { } @@ -13,20 +13,20 @@ void bar4() __attribute__((aligned(1024))); } c; -// CHECK: define void @_ZN1C4bar1Ev(%class.C* %this) unnamed_addr [[NUW]] align 2 +// CHECK: define void @_ZN1C4bar1Ev(%class.C* frozen %this) unnamed_addr [[NUW]] align 2 void C::bar1() { } -// CHECK: define void @_ZN1C4bar2Ev(%class.C* %this) unnamed_addr [[NUW]] align 2 +// CHECK: define void @_ZN1C4bar2Ev(%class.C* frozen %this) unnamed_addr [[NUW]] align 2 void C::bar2() { } -// CHECK: define void @_ZN1C4bar3Ev(%class.C* %this) unnamed_addr [[NUW]] align 1024 +// CHECK: define void @_ZN1C4bar3Ev(%class.C* frozen %this) unnamed_addr [[NUW]] align 1024 void C::bar3() { } -// CHECK: define void @_ZN1C4bar4Ev(%class.C* %this) [[NUW]] align 1024 +// CHECK: define void @_ZN1C4bar4Ev(%class.C* frozen %this) [[NUW]] align 1024 void C::bar4() { } // PR6635 -// CHECK-LABEL: define i32 @_Z5test1v() +// CHECK-LABEL: define frozen i32 @_Z5test1v() int test1() { return 10; } // CHECK at top of file extern "C" int test2() __attribute__((alias("_Z5test1v"))); diff --git a/clang/test/CodeGenCXX/auto-var-init-stop-after.cpp b/clang/test/CodeGenCXX/auto-var-init-stop-after.cpp --- a/clang/test/CodeGenCXX/auto-var-init-stop-after.cpp +++ b/clang/test/CodeGenCXX/auto-var-init-stop-after.cpp @@ -34,7 +34,7 @@ // PATTERN-STOP-AFTER-2-ARRAY-NOT: vla-init.loop: // PATTERN-STOP-AFTER-3-VLA: vla-init.loop: // PATTERN-STOP-AFTER-3-VLA-NEXT: %vla.cur = phi i8* [ %vla.begin, %vla-setup.loop ], [ %vla.next, %vla-init.loop ] - // PATTERN-STOP-AFTER-3-VLA-NEXT-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 %vla.cur, i8* align 4 bitcast ({ i32, i8, [3 x i8] }* @__const._Z3fooj.vla to i8*), i64 8, i1 false) + // PATTERN-STOP-AFTER-3-VLA-NEXT-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 %vla.cur, i8* align 4 bitcast ({ i32, i8, [3 x i8] }* @__const._Z3fooj.vla frozen i8*) to, i64 frozen 8, i1 frozen false) // PATTERN-STOP-AFTER-3-VLA-NOT: store i8* inttoptr (i64 -6148914691236517206 to i8*), i8** %p, align 8 // PATTERN-STOP-AFTER-4-POINTER: store i8* inttoptr (i64 -6148914691236517206 to i8*), i8** %p, align 8 // PATTERN-STOP-AFTER-4-POINTER-NOT: call void @llvm.memset.p0i8.i64(i8* align 16 %6, i8 -86, i64 %mul, i1 false) diff --git a/clang/test/CodeGenCXX/auto-variable-template.cpp b/clang/test/CodeGenCXX/auto-variable-template.cpp --- a/clang/test/CodeGenCXX/auto-variable-template.cpp +++ b/clang/test/CodeGenCXX/auto-variable-template.cpp @@ -10,5 +10,5 @@ // CHECK: @_Z9vtemplateIiE = linkonce_odr global %struct.f undef, comdat -// CHECK: define i32 @main() -// CHECK: call void @_ZNK1fclEv(%struct.f* @_Z9vtemplateIiE) +// CHECK: define frozen i32 @main() +// CHECK: call void @_ZNK1fclEv(%struct.f* frozen @_Z9vtemplateIiE) diff --git a/clang/test/CodeGenCXX/bitfield-layout.cpp b/clang/test/CodeGenCXX/bitfield-layout.cpp --- a/clang/test/CodeGenCXX/bitfield-layout.cpp +++ b/clang/test/CodeGenCXX/bitfield-layout.cpp @@ -28,7 +28,7 @@ #define CHECK(x) if (!(x)) return __LINE__ -// CHECK: define i32 @_Z11test_assignv() +// CHECK: define frozen i32 @_Z11test_assignv() int test_assign() { struct { int a; @@ -59,7 +59,7 @@ return 0; } -// CHECK: define i32 @_Z9test_initv() +// CHECK: define frozen i32 @_Z9test_initv() int test_init() { struct S { int a; diff --git a/clang/test/CodeGenCXX/bitfield.cpp b/clang/test/CodeGenCXX/bitfield.cpp --- a/clang/test/CodeGenCXX/bitfield.cpp +++ b/clang/test/CodeGenCXX/bitfield.cpp @@ -20,13 +20,13 @@ unsigned b71 : 2; }; unsigned read00(S* s) { - // CHECK-X86-64-LABEL: define i32 @_ZN2N06read00 + // CHECK-X86-64-LABEL: define frozen i32 @_ZN2N06read00 // CHECK-X86-64: %[[ptr:.*]] = bitcast %{{.*}}* %{{.*}} to i64* // CHECK-X86-64: %[[val:.*]] = load i64, i64* %[[ptr]] // CHECK-X86-64: %[[and:.*]] = and i64 %[[val]], 16383 // CHECK-X86-64: %[[trunc:.*]] = trunc i64 %[[and]] to i32 // CHECK-X86-64: ret i32 %[[trunc]] - // CHECK-PPC64-LABEL: define zeroext i32 @_ZN2N06read00 + // CHECK-PPC64-LABEL: define frozen zeroext i32 @_ZN2N06read00 // CHECK-PPC64: %[[ptr:.*]] = bitcast %{{.*}}* %{{.*}} to i64* // CHECK-PPC64: %[[val:.*]] = load i64, i64* %[[ptr]] // CHECK-PPC64: %[[shr:.*]] = lshr i64 %[[val]], 50 @@ -35,14 +35,14 @@ return s->b00; } unsigned read01(S* s) { - // CHECK-X86-64-LABEL: define i32 @_ZN2N06read01 + // CHECK-X86-64-LABEL: define frozen i32 @_ZN2N06read01 // CHECK-X86-64: %[[ptr:.*]] = bitcast %{{.*}}* %{{.*}} to i64* // CHECK-X86-64: %[[val:.*]] = load i64, i64* %[[ptr]] // CHECK-X86-64: %[[shr:.*]] = lshr i64 %[[val]], 14 // CHECK-X86-64: %[[and:.*]] = and i64 %[[shr]], 3 // CHECK-X86-64: %[[trunc:.*]] = trunc i64 %[[and]] to i32 // CHECK-X86-64: ret i32 %[[trunc]] - // CHECK-PPC64-LABEL: define zeroext i32 @_ZN2N06read01 + // CHECK-PPC64-LABEL: define frozen zeroext i32 @_ZN2N06read01 // CHECK-PPC64: %[[ptr:.*]] = bitcast %{{.*}}* %{{.*}} to i64* // CHECK-PPC64: %[[val:.*]] = load i64, i64* %[[ptr]] // CHECK-PPC64: %[[shr:.*]] = lshr i64 %[[val]], 48 @@ -52,14 +52,14 @@ return s->b01; } unsigned read20(S* s) { - // CHECK-X86-64-LABEL: define i32 @_ZN2N06read20 + // CHECK-X86-64-LABEL: define frozen i32 @_ZN2N06read20 // CHECK-X86-64: %[[ptr:.*]] = bitcast %{{.*}}* %{{.*}} to i64* // CHECK-X86-64: %[[val:.*]] = load i64, i64* %[[ptr]] // CHECK-X86-64: %[[shr:.*]] = lshr i64 %[[val]], 16 // CHECK-X86-64: %[[and:.*]] = and i64 %[[shr]], 63 // CHECK-X86-64: %[[trunc:.*]] = trunc i64 %[[and]] to i32 // CHECK-X86-64: ret i32 %[[trunc]] - // CHECK-PPC64-LABEL: define zeroext i32 @_ZN2N06read20 + // CHECK-PPC64-LABEL: define frozen zeroext i32 @_ZN2N06read20 // CHECK-PPC64: %[[ptr:.*]] = bitcast %{{.*}}* %{{.*}} to i64* // CHECK-PPC64: %[[val:.*]] = load i64, i64* %[[ptr]] // CHECK-PPC64: %[[shr:.*]] = lshr i64 %[[val]], 42 @@ -69,14 +69,14 @@ return s->b20; } unsigned read21(S* s) { - // CHECK-X86-64-LABEL: define i32 @_ZN2N06read21 + // CHECK-X86-64-LABEL: define frozen i32 @_ZN2N06read21 // CHECK-X86-64: %[[ptr:.*]] = bitcast %{{.*}}* %{{.*}} to i64* // CHECK-X86-64: %[[val:.*]] = load i64, i64* %[[ptr]] // CHECK-X86-64: %[[shr:.*]] = lshr i64 %[[val]], 22 // CHECK-X86-64: %[[and:.*]] = and i64 %[[shr]], 3 // CHECK-X86-64: %[[trunc:.*]] = trunc i64 %[[and]] to i32 // CHECK-X86-64: ret i32 %[[trunc]] - // CHECK-PPC64-LABEL: define zeroext i32 @_ZN2N06read21 + // CHECK-PPC64-LABEL: define frozen zeroext i32 @_ZN2N06read21 // CHECK-PPC64: %[[ptr:.*]] = bitcast %{{.*}}* %{{.*}} to i64* // CHECK-PPC64: %[[val:.*]] = load i64, i64* %[[ptr]] // CHECK-PPC64: %[[shr:.*]] = lshr i64 %[[val]], 40 @@ -86,14 +86,14 @@ return s->b21; } unsigned read30(S* s) { - // CHECK-X86-64-LABEL: define i32 @_ZN2N06read30 + // CHECK-X86-64-LABEL: define frozen i32 @_ZN2N06read30 // CHECK-X86-64: %[[ptr:.*]] = bitcast %{{.*}}* %{{.*}} to i64* // CHECK-X86-64: %[[val:.*]] = load i64, i64* %[[ptr]] // CHECK-X86-64: %[[shr:.*]] = lshr i64 %[[val]], 24 // CHECK-X86-64: %[[and:.*]] = and i64 %[[shr]], 1073741823 // CHECK-X86-64: %[[trunc:.*]] = trunc i64 %[[and]] to i32 // CHECK-X86-64: ret i32 %[[trunc]] - // CHECK-PPC64-LABEL: define zeroext i32 @_ZN2N06read30 + // CHECK-PPC64-LABEL: define frozen zeroext i32 @_ZN2N06read30 // CHECK-PPC64: %[[ptr:.*]] = bitcast %{{.*}}* %{{.*}} to i64* // CHECK-PPC64: %[[val:.*]] = load i64, i64* %[[ptr]] // CHECK-PPC64: %[[shr:.*]] = lshr i64 %[[val]], 10 @@ -103,14 +103,14 @@ return s->b30; } unsigned read31(S* s) { - // CHECK-X86-64-LABEL: define i32 @_ZN2N06read31 + // CHECK-X86-64-LABEL: define frozen i32 @_ZN2N06read31 // CHECK-X86-64: %[[ptr:.*]] = bitcast %{{.*}}* %{{.*}} to i64* // CHECK-X86-64: %[[val:.*]] = load i64, i64* %[[ptr]] // CHECK-X86-64: %[[shr:.*]] = lshr i64 %[[val]], 54 // CHECK-X86-64: %[[and:.*]] = and i64 %[[shr]], 3 // CHECK-X86-64: %[[trunc:.*]] = trunc i64 %[[and]] to i32 // CHECK-X86-64: ret i32 %[[trunc]] - // CHECK-PPC64-LABEL: define zeroext i32 @_ZN2N06read31 + // CHECK-PPC64-LABEL: define frozen zeroext i32 @_ZN2N06read31 // CHECK-PPC64: %[[ptr:.*]] = bitcast %{{.*}}* %{{.*}} to i64* // CHECK-PPC64: %[[val:.*]] = load i64, i64* %[[ptr]] // CHECK-PPC64: %[[shr:.*]] = lshr i64 %[[val]], 8 @@ -120,14 +120,14 @@ return s->b31; } unsigned read70(S* s) { - // CHECK-X86-64-LABEL: define i32 @_ZN2N06read70 + // CHECK-X86-64-LABEL: define frozen i32 @_ZN2N06read70 // CHECK-X86-64: %[[ptr:.*]] = bitcast %{{.*}}* %{{.*}} to i64* // CHECK-X86-64: %[[val:.*]] = load i64, i64* %[[ptr]] // CHECK-X86-64: %[[shr:.*]] = lshr i64 %[[val]], 56 // CHECK-X86-64: %[[and:.*]] = and i64 %[[shr]], 63 // CHECK-X86-64: %[[trunc:.*]] = trunc i64 %[[and]] to i32 // CHECK-X86-64: ret i32 %[[trunc]] - // CHECK-PPC64-LABEL: define zeroext i32 @_ZN2N06read70 + // CHECK-PPC64-LABEL: define frozen zeroext i32 @_ZN2N06read70 // CHECK-PPC64: %[[ptr:.*]] = bitcast %{{.*}}* %{{.*}} to i64* // CHECK-PPC64: %[[val:.*]] = load i64, i64* %[[ptr]] // CHECK-PPC64: %[[shr:.*]] = lshr i64 %[[val]], 2 @@ -137,13 +137,13 @@ return s->b70; } unsigned read71(S* s) { - // CHECK-X86-64-LABEL: define i32 @_ZN2N06read71 + // CHECK-X86-64-LABEL: define frozen i32 @_ZN2N06read71 // CHECK-X86-64: %[[ptr:.*]] = bitcast %{{.*}}* %{{.*}} to i64* // CHECK-X86-64: %[[val:.*]] = load i64, i64* %[[ptr]] // CHECK-X86-64: %[[shr:.*]] = lshr i64 %[[val]], 62 // CHECK-X86-64: %[[trunc:.*]] = trunc i64 %[[shr]] to i32 // CHECK-X86-64: ret i32 %[[trunc]] - // CHECK-PPC64-LABEL: define zeroext i32 @_ZN2N06read71 + // CHECK-PPC64-LABEL: define frozen zeroext i32 @_ZN2N06read71 // CHECK-PPC64: %[[ptr:.*]] = bitcast %{{.*}}* %{{.*}} to i64* // CHECK-PPC64: %[[val:.*]] = load i64, i64* %[[ptr]] // CHECK-PPC64: %[[and:.*]] = and i64 %[[val]], 3 @@ -166,13 +166,13 @@ char c; }; unsigned read(S* s) { - // CHECK-X86-64-LABEL: define i32 @_ZN2N14read + // CHECK-X86-64-LABEL: define frozen i32 @_ZN2N14read // CHECK-X86-64: %[[ptr:.*]] = getelementptr inbounds %{{.*}}, %{{.*}}* %{{.*}}, i32 0, i32 1 // CHECK-X86-64: %[[val:.*]] = load i8, i8* %[[ptr]] // CHECK-X86-64: %[[and:.*]] = and i8 %[[val]], 1 // CHECK-X86-64: %[[ext:.*]] = zext i8 %[[and]] to i32 // CHECK-X86-64: ret i32 %[[ext]] - // CHECK-PPC64-LABEL: define zeroext i32 @_ZN2N14read + // CHECK-PPC64-LABEL: define frozen zeroext i32 @_ZN2N14read // CHECK-PPC64: %[[ptr:.*]] = getelementptr inbounds %{{.*}}, %{{.*}}* %{{.*}}, i32 0, i32 1 // CHECK-PPC64: %[[val:.*]] = load i8, i8* %[[ptr]] // CHECK-PPC64: %[[shr:.*]] = lshr i8 %[[val]], 7 @@ -210,12 +210,12 @@ void *p; }; unsigned read(S* s) { - // CHECK-X86-64-LABEL: define i32 @_ZN2N24read + // CHECK-X86-64-LABEL: define frozen i32 @_ZN2N24read // CHECK-X86-64: %[[ptr:.*]] = bitcast %{{.*}}* %{{.*}} to i32* // CHECK-X86-64: %[[val:.*]] = load i32, i32* %[[ptr]] // CHECK-X86-64: %[[and:.*]] = and i32 %[[val]], 16777215 // CHECK-X86-64: ret i32 %[[and]] - // CHECK-PPC64-LABEL: define zeroext i32 @_ZN2N24read + // CHECK-PPC64-LABEL: define frozen zeroext i32 @_ZN2N24read // CHECK-PPC64: %[[ptr:.*]] = bitcast %{{.*}}* %{{.*}} to i32* // CHECK-PPC64: %[[val:.*]] = load i32, i32* %[[ptr]] // CHECK-PPC64: %[[shr:.*]] = lshr i32 %[[val]], 8 @@ -249,12 +249,12 @@ unsigned b : 24; }; unsigned read(S* s) { - // CHECK-X86-64-LABEL: define i32 @_ZN2N34read + // CHECK-X86-64-LABEL: define frozen i32 @_ZN2N34read // CHECK-X86-64: %[[ptr:.*]] = bitcast %{{.*}}* %{{.*}} to i32* // CHECK-X86-64: %[[val:.*]] = load i32, i32* %[[ptr]] // CHECK-X86-64: %[[and:.*]] = and i32 %[[val]], 16777215 // CHECK-X86-64: ret i32 %[[and]] - // CHECK-PPC64-LABEL: define zeroext i32 @_ZN2N34read + // CHECK-PPC64-LABEL: define frozen zeroext i32 @_ZN2N34read // CHECK-PPC64: %[[ptr:.*]] = bitcast %{{.*}}* %{{.*}} to i32* // CHECK-PPC64: %[[val:.*]] = load i32, i32* %[[ptr]] // CHECK-PPC64: %[[shr:.*]] = lshr i32 %[[val]], 8 @@ -300,13 +300,13 @@ // FIXME: We should widen this load as long as the function isn't being // instrumented by ThreadSanitizer. // - // CHECK-X86-64-LABEL: define i32 @_ZN2N44read + // CHECK-X86-64-LABEL: define frozen i32 @_ZN2N44read // CHECK-X86-64: %[[gep:.*]] = getelementptr inbounds {{.*}}, {{.*}}* %{{.*}}, i32 0, i32 1 // CHECK-X86-64: %[[ptr:.*]] = bitcast [3 x i8]* %[[gep]] to i24* // CHECK-X86-64: %[[val:.*]] = load i24, i24* %[[ptr]] // CHECK-X86-64: %[[ext:.*]] = zext i24 %[[val]] to i32 // CHECK-X86-64: ret i32 %[[ext]] - // CHECK-PPC64-LABEL: define zeroext i32 @_ZN2N44read + // CHECK-PPC64-LABEL: define frozen zeroext i32 @_ZN2N44read // CHECK-PPC64: %[[gep:.*]] = getelementptr inbounds {{.*}}, {{.*}}* %{{.*}}, i32 0, i32 1 // CHECK-PPC64: %[[ptr:.*]] = bitcast [3 x i8]* %[[gep]] to i24* // CHECK-PPC64: %[[val:.*]] = load i24, i24* %[[ptr]] @@ -342,12 +342,12 @@ struct Y { unsigned b : 24; } y; }; unsigned read(U* u) { - // CHECK-X86-64-LABEL: define i32 @_ZN2N54read + // CHECK-X86-64-LABEL: define frozen i32 @_ZN2N54read // CHECK-X86-64: %[[ptr:.*]] = bitcast %{{.*}}* %{{.*}} to i32* // CHECK-X86-64: %[[val:.*]] = load i32, i32* %[[ptr]] // CHECK-X86-64: %[[and:.*]] = and i32 %[[val]], 16777215 // CHECK-X86-64: ret i32 %[[and]] - // CHECK-PPC64-LABEL: define zeroext i32 @_ZN2N54read + // CHECK-PPC64-LABEL: define frozen zeroext i32 @_ZN2N54read // CHECK-PPC64: %[[ptr:.*]] = bitcast %{{.*}}* %{{.*}} to i32* // CHECK-PPC64: %[[val:.*]] = load i32, i32* %[[ptr]] // CHECK-PPC64: %[[shr:.*]] = lshr i32 %[[val]], 8 @@ -387,7 +387,7 @@ unsigned char b2 : 8; }; unsigned read(S* s) { - // CHECK-X86-64-LABEL: define i32 @_ZN2N64read + // CHECK-X86-64-LABEL: define frozen i32 @_ZN2N64read // CHECK-X86-64: %[[ptr1:.*]] = bitcast {{.*}}* %{{.*}} to i24* // CHECK-X86-64: %[[val1:.*]] = load i24, i24* %[[ptr1]] // CHECK-X86-64: %[[ext1:.*]] = zext i24 %[[val1]] to i32 @@ -396,7 +396,7 @@ // CHECK-X86-64: %[[ext2:.*]] = zext i8 %[[val2]] to i32 // CHECK-X86-64: %[[add:.*]] = add nsw i32 %[[ext1]], %[[ext2]] // CHECK-X86-64: ret i32 %[[add]] - // CHECK-PPC64-LABEL: define zeroext i32 @_ZN2N64read + // CHECK-PPC64-LABEL: define frozen zeroext i32 @_ZN2N64read // CHECK-PPC64: %[[ptr1:.*]] = bitcast {{.*}}* %{{.*}} to i24* // CHECK-PPC64: %[[val1:.*]] = load i24, i24* %[[ptr1]] // CHECK-PPC64: %[[ext1:.*]] = zext i24 %[[val1]] to i32 @@ -450,13 +450,13 @@ // FIXME: We should widen this load as long as the function isn't being // instrumented by ThreadSanitizer. // - // CHECK-X86-64-LABEL: define i32 @_ZN2N74read + // CHECK-X86-64-LABEL: define frozen i32 @_ZN2N74read // CHECK-X86-64: %[[gep:.*]] = getelementptr inbounds {{.*}}, {{.*}}* %{{.*}}, i32 0, i32 1 // CHECK-X86-64: %[[ptr:.*]] = bitcast [3 x i8]* %[[gep]] to i24* // CHECK-X86-64: %[[val:.*]] = load i24, i24* %[[ptr]] // CHECK-X86-64: %[[ext:.*]] = zext i24 %[[val]] to i32 // CHECK-X86-64: ret i32 %[[ext]] - // CHECK-PPC64-LABEL: define zeroext i32 @_ZN2N74read + // CHECK-PPC64-LABEL: define frozen zeroext i32 @_ZN2N74read // CHECK-PPC64: %[[gep:.*]] = getelementptr inbounds {{.*}}, {{.*}}* %{{.*}}, i32 0, i32 1 // CHECK-PPC64: %[[ptr:.*]] = bitcast [3 x i8]* %[[gep]] to i24* // CHECK-PPC64: %[[val:.*]] = load i24, i24* %[[ptr]] diff --git a/clang/test/CodeGenCXX/blocks-cxx11.cpp b/clang/test/CodeGenCXX/blocks-cxx11.cpp --- a/clang/test/CodeGenCXX/blocks-cxx11.cpp +++ b/clang/test/CodeGenCXX/blocks-cxx11.cpp @@ -8,7 +8,7 @@ void test() { const int x = 100; takeABlock(^{ takeItByValue(x); }); - // CHECK: call void @_Z13takeItByValueIiEvT_(i32 100) + // CHECK: call void @_Z13takeItByValueIiEvT_(i32 frozen 100) } } @@ -19,7 +19,7 @@ takeABlock(^{ takeItByValue(x); }); // TODO: there's no good reason that this isn't foldable. - // CHECK: call void @_Z13takeItByValueIiEvT_(i32 {{%.*}}) + // CHECK: call void @_Z13takeItByValueIiEvT_(i32 frozen {{%.*}}) } } @@ -27,7 +27,7 @@ void test() { const float x = 1; takeABlock(^{ takeItByValue(x); }); - // CHECK: call void @_Z13takeItByValueIfEvT_(float 1.0 + // CHECK: call void @_Z13takeItByValueIfEvT_(float frozen 1.0 } } @@ -38,7 +38,7 @@ takeABlock(^{ takeItByValue(x); }); // TODO: there's no good reason that this isn't foldable. - // CHECK: call void @_Z13takeItByValueIfEvT_(float {{%.*}}) + // CHECK: call void @_Z13takeItByValueIfEvT_(float frozen {{%.*}}) } } @@ -52,7 +52,7 @@ // CHECK-NEXT: store i32 0, // CHECK-NEXT: [[COERCE:%.*]] = bitcast // CHECK-NEXT: [[CVAL:%.*]] = load i64, i64* [[COERCE]] - // CHECK-NEXT: call void @_Z13takeItByValueICiEvT_(i64 [[CVAL]]) + // CHECK-NEXT: call void @_Z13takeItByValueICiEvT_(i64 frozen [[CVAL]]) } } @@ -78,7 +78,7 @@ // CHECK-NEXT: store i32 [[I]], i32* [[ISLOT]] // CHECK-NEXT: [[COERCE:%.*]] = bitcast { i32, i32 }* [[CSLOT]] to i64* // CHECK-NEXT: [[CVAL:%.*]] = load i64, i64* [[COERCE]], - // CHECK-NEXT: call void @_Z13takeItByValueICiEvT_(i64 [[CVAL]]) + // CHECK-NEXT: call void @_Z13takeItByValueICiEvT_(i64 frozen [[CVAL]]) } } @@ -105,9 +105,9 @@ // CHECK: [[THIS:%.*]] = load [[LAMBDA_T:%.*]]*, [[LAMBDA_T:%.*]]** // CHECK: [[BLOCK_CAPTURED:%.*]] = getelementptr inbounds [[BLOCK_T]], [[BLOCK_T]]* [[BLOCK]], i32 0, i32 5 // CHECK-NEXT: [[T1:%.*]] = getelementptr inbounds [[LAMBDA_T]], [[LAMBDA_T]]* [[THIS]], i32 0, i32 0 - // CHECK-NEXT: call void @_ZN20test_block_in_lambda1AC1ERKS0_({{.*}}* [[BLOCK_CAPTURED]], {{.*}}* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[T1]]) + // CHECK-NEXT: call void @_ZN20test_block_in_lambda1AC1ERKS0_({{.*}}* frozen [[BLOCK_CAPTURED]], {{.*}}* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[T1]]) // CHECK-NEXT: [[T0:%.*]] = bitcast [[BLOCK_T]]* [[BLOCK]] to void ()* - // CHECK-NEXT: call void @_ZN20test_block_in_lambda9takeBlockEU13block_pointerFvvE(void ()* [[T0]]) - // CHECK-NEXT: call void @_ZN20test_block_in_lambda1AD1Ev({{.*}}* [[BLOCK_CAPTURED]]) + // CHECK-NEXT: call void @_ZN20test_block_in_lambda9takeBlockEU13block_pointerFvvE(void ()* frozen [[T0]]) + // CHECK-NEXT: call void @_ZN20test_block_in_lambda1AD1Ev({{.*}}* frozen [[BLOCK_CAPTURED]]) // CHECK-NEXT: ret void } diff --git a/clang/test/CodeGenCXX/blocks.cpp b/clang/test/CodeGenCXX/blocks.cpp --- a/clang/test/CodeGenCXX/blocks.cpp +++ b/clang/test/CodeGenCXX/blocks.cpp @@ -127,9 +127,9 @@ // CHECK: [[TMP:%.*]] = alloca [[A:%.*]], align 1 // CHECK-NEXT: store i8* [[BLOCKDESC:%.*]], i8** {{.*}}, align 8 // CHECK-NEXT: bitcast i8* [[BLOCKDESC]] to <{ i8*, i32, i32, i8*, %[[STRUCT_BLOCK_DESCRIPTOR]]* }>* - // CHECK: call void @_ZN5test41AC1Ev([[A]]* [[TMP]]) - // CHECK-NEXT: call void @_ZN5test43fooENS_1AE([[A]]* [[TMP]]) - // CHECK-NEXT: call void @_ZN5test41AD1Ev([[A]]* [[TMP]]) + // CHECK: call void @_ZN5test41AC1Ev([[A]]* frozen [[TMP]]) + // CHECK-NEXT: call void @_ZN5test43fooENS_1AE([[A]]* frozen [[TMP]]) + // CHECK-NEXT: call void @_ZN5test41AD1Ev([[A]]* frozen [[TMP]]) // CHECK-NEXT: ret void } @@ -159,7 +159,7 @@ // CHECK-NEXT: [[COND_CLEANUP_SAVE:%.*]] = alloca [[A]]*, align 8 // CHECK-NEXT: [[T0:%.*]] = zext i1 // CHECK-NEXT: store i8 [[T0]], i8* [[COND]], align 1 - // CHECK-NEXT: call void @_ZN5test51AC1Ev([[A]]* [[X]]) + // CHECK-NEXT: call void @_ZN5test51AC1Ev([[A]]* frozen [[X]]) // CHECK-NEXT: [[T0:%.*]] = load i8, i8* [[COND]], align 1 // CHECK-NEXT: [[T1:%.*]] = trunc i8 [[T0]] to i1 // CHECK-NEXT: store i1 false, i1* [[CLEANUP_ACTIVE]] @@ -167,7 +167,7 @@ // CHECK-NOT: br // CHECK: [[CAPTURE:%.*]] = getelementptr inbounds [[BLOCK_T]], [[BLOCK_T]]* [[BLOCK]], i32 0, i32 5 - // CHECK-NEXT: call void @_ZN5test51AC1ERKS0_([[A]]* [[CAPTURE]], [[A]]* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[X]]) + // CHECK-NEXT: call void @_ZN5test51AC1ERKS0_([[A]]* frozen [[CAPTURE]], [[A]]* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[X]]) // CHECK-NEXT: store i1 true, i1* [[CLEANUP_ACTIVE]] // CHECK-NEXT: store [[A]]* [[CAPTURE]], [[A]]** [[COND_CLEANUP_SAVE]], align 8 // CHECK-NEXT: bitcast [[BLOCK_T]]* [[BLOCK]] to void ()* @@ -180,9 +180,9 @@ // CHECK-NEXT: [[T0:%.*]] = load i1, i1* [[CLEANUP_ACTIVE]] // CHECK-NEXT: br i1 [[T0]] // CHECK: [[T3:%.*]] = load [[A]]*, [[A]]** [[COND_CLEANUP_SAVE]], align 8 - // CHECK-NEXT: call void @_ZN5test51AD1Ev([[A]]* [[T3]]) + // CHECK-NEXT: call void @_ZN5test51AD1Ev([[A]]* frozen [[T3]]) // CHECK-NEXT: br label - // CHECK: call void @_ZN5test51AD1Ev([[A]]* [[X]]) + // CHECK: call void @_ZN5test51AD1Ev([[A]]* frozen [[X]]) // CHECK-NEXT: ret void } @@ -204,9 +204,9 @@ // CHECK-LABEL: define void @_ZN5test64testEv() // CHECK: [[TEMP:%.*]] = alloca [[A:%.*]], align 1 - // CHECK-NEXT: call void @_ZN5test61AC1Ev([[A]]* [[TEMP]]) + // CHECK-NEXT: call void @_ZN5test61AC1Ev([[A]]* frozen [[TEMP]]) // CHECK-NEXT: call void @_ZN5test63fooERKNS_1AEU13block_pointerFvvE( - // CHECK-NEXT: call void @_ZN5test61AD1Ev([[A]]* [[TEMP]]) + // CHECK-NEXT: call void @_ZN5test61AD1Ev([[A]]* frozen [[TEMP]]) // CHECK-NEXT: call void @_ZN5test63barEv() // CHECK-NEXT: ret void } diff --git a/clang/test/CodeGenCXX/builtin-bit-cast.cpp b/clang/test/CodeGenCXX/builtin-bit-cast.cpp --- a/clang/test/CodeGenCXX/builtin-bit-cast.cpp +++ b/clang/test/CodeGenCXX/builtin-bit-cast.cpp @@ -16,7 +16,7 @@ }; unsigned long test_aggregate_to_scalar(two_ints &ti) { - // CHECK-LABEL: define i64 @_Z24test_aggregate_to_scalarR8two_ints + // CHECK-LABEL: define frozen i64 @_Z24test_aggregate_to_scalarR8two_ints return __builtin_bit_cast(unsigned long, ti); // CHECK: [[TI_ADDR:%.*]] = alloca %struct.two_ints*, align 8 @@ -66,7 +66,7 @@ } unsigned long test_complex(_Complex unsigned &cu) { - // CHECK-LABEL: define i64 @_Z12test_complexRCj + // CHECK-LABEL: define frozen i64 @_Z12test_complexRCj return __builtin_bit_cast(unsigned long, cu); // CHECK: [[REF_ALLOCA:%.*]] = alloca { i32, i32 }*, align 8 @@ -77,7 +77,7 @@ } _Complex unsigned test_to_complex(unsigned long &ul) { - // CHECK-LABEL: define i64 @_Z15test_to_complexRm + // CHECK-LABEL: define frozen i64 @_Z15test_to_complexRm return __builtin_bit_cast(_Complex unsigned, ul); @@ -87,7 +87,7 @@ } unsigned long test_array(int (&ary)[2]) { - // CHECK-LABEL: define i64 @_Z10test_arrayRA2_i + // CHECK-LABEL: define frozen i64 @_Z10test_arrayRA2_i return __builtin_bit_cast(unsigned long, ary); // CHECK: [[REF_ALLOCA:%.*]] = alloca [2 x i32]* diff --git a/clang/test/CodeGenCXX/builtin-calling-conv.cpp b/clang/test/CodeGenCXX/builtin-calling-conv.cpp --- a/clang/test/CodeGenCXX/builtin-calling-conv.cpp +++ b/clang/test/CodeGenCXX/builtin-calling-conv.cpp @@ -27,27 +27,27 @@ } // LINUX: define void @_Z4userv() -// LINUX: call noalias nonnull i8* @_Znwm -// LINUX: call float @atan2f +// LINUX: call frozen noalias nonnull i8* @_Znwm +// LINUX: call frozen float @atan2f // LINUX: call void @_Z3foov -// LINUX: declare nonnull i8* @_Znwm(i64) -// LINUX: declare float @atan2f(float, float) +// LINUX: declare frozen nonnull i8* @_Znwm(i64 frozen) +// LINUX: declare frozen float @atan2f(float frozen, float frozen) // LINUX: declare void @_Z3foov() // SPIR: define spir_func void @_Z4userv() -// SPIR: call spir_func noalias nonnull i8* @_Znwj -// SPIR: call spir_func float @atan2f +// SPIR: call spir_func frozen noalias nonnull i8* @_Znwj +// SPIR: call spir_func frozen float @atan2f // SPIR: call spir_func void @_Z3foov -// SPIR: declare spir_func nonnull i8* @_Znwj(i32) -// SPIR: declare spir_func float @atan2f(float, float) +// SPIR: declare spir_func frozen nonnull i8* @_Znwj(i32 frozen) +// SPIR: declare spir_func frozen float @atan2f(float frozen, float frozen) // SPIR: declare spir_func void @_Z3foov() // Note: Windows /G options should not change the platform default calling // convention of builtins. // WIN32: define dso_local x86_stdcallcc void @"?user@@YGXXZ"() -// WIN32: call noalias nonnull i8* @"??2@YAPAXI@Z" -// WIN32: call float @atan2f +// WIN32: call frozen noalias nonnull i8* @"??2@YAPAXI@Z" +// WIN32: call frozen float @atan2f // WIN32: call x86_stdcallcc void @"?foo@@YGXXZ" -// WIN32: declare dso_local nonnull i8* @"??2@YAPAXI@Z"( -// WIN32: declare dso_local float @atan2f(float, float) +// WIN32: declare dso_local frozen nonnull i8* @"??2@YAPAXI@Z"( +// WIN32: declare dso_local frozen float @atan2f(float frozen, float frozen) // WIN32: declare dso_local x86_stdcallcc void @"?foo@@YGXXZ"() diff --git a/clang/test/CodeGenCXX/builtin-is-constant-evaluated.cpp b/clang/test/CodeGenCXX/builtin-is-constant-evaluated.cpp --- a/clang/test/CodeGenCXX/builtin-is-constant-evaluated.cpp +++ b/clang/test/CodeGenCXX/builtin-is-constant-evaluated.cpp @@ -19,13 +19,13 @@ } } // namespace std -// CHECK-FN-CG-LABEL: define zeroext i1 @_Z3foov() +// CHECK-FN-CG-LABEL: define frozen zeroext i1 @_Z3foov() // CHECK-FN-CG: ret i1 false bool foo() { return __builtin_is_constant_evaluated(); } -// CHECK-FN-CG-LABEL: define linkonce_odr i32 @_Z1fv() +// CHECK-FN-CG-LABEL: define linkonce_odr frozen i32 @_Z1fv() constexpr int f() { // CHECK-FN-CG: store i32 13, i32* %n, align 4 // CHECK-FN-CG: store i32 17, i32* %m, align 4 @@ -45,7 +45,7 @@ // CHECK-DYN-LABEL: define internal void @__cxx_global_var_init() // CHECK-DYN: %0 = load i32, i32* @p, align 4 -// CHECK-DYN-NEXT: %call = call i32 @_Z1fv() +// CHECK-DYN-NEXT: %call = call frozen i32 @_Z1fv() // CHECK-DYN-NEXT: %add = add nsw i32 %0, %call // CHECK-DYN-NEXT: store i32 %add, i32* @q, align 4 // CHECK-DYN-NEXT: ret void @@ -84,7 +84,7 @@ // CHECK-ARR-LABEL: define void @_Z17test_new_arr_exprv void test_new_arr_expr() { - // CHECK-ARR: call noalias nonnull i8* @_Znam(i64 17) + // CHECK-ARR: call frozen noalias nonnull i8* @_Znam(i64 frozen 17) new char[std::is_constant_evaluated() || __builtin_is_constant_evaluated() ? 1 : 17]; } diff --git a/clang/test/CodeGenCXX/builtin-operator-new-delete.cpp b/clang/test/CodeGenCXX/builtin-operator-new-delete.cpp --- a/clang/test/CodeGenCXX/builtin-operator-new-delete.cpp +++ b/clang/test/CodeGenCXX/builtin-operator-new-delete.cpp @@ -37,30 +37,30 @@ // CHECK-LABEL: define void @test_basic( extern "C" void test_basic() { - // CHECK: call noalias nonnull i8* @_Znwm(i64 4) [[ATTR_BUILTIN_NEW:#[^ ]*]] + // CHECK: call frozen noalias nonnull i8* @_Znwm(i64 frozen 4) [[ATTR_BUILTIN_NEW:#[^ ]*]] // CHECK: call void @_ZdlPv({{.*}}) [[ATTR_BUILTIN_DELETE:#[^ ]*]] // CHECK: ret void __builtin_operator_delete(__builtin_operator_new(4)); } -// CHECK: declare nonnull i8* @_Znwm(i64) [[ATTR_NOBUILTIN:#[^ ]*]] -// CHECK: declare void @_ZdlPv(i8*) [[ATTR_NOBUILTIN_NOUNWIND:#[^ ]*]] +// CHECK: declare frozen nonnull i8* @_Znwm(i64 frozen) [[ATTR_NOBUILTIN:#[^ ]*]] +// CHECK: declare void @_ZdlPv(i8* frozen) [[ATTR_NOBUILTIN_NOUNWIND:#[^ ]*]] // CHECK-LABEL: define void @test_aligned_alloc( extern "C" void test_aligned_alloc() { - // CHECK: call noalias nonnull align 4 i8* @_ZnwmSt11align_val_t(i64 4, i64 4) [[ATTR_BUILTIN_NEW:#[^ ]*]] - // CHECK: call void @_ZdlPvSt11align_val_t({{.*}}, i64 4) [[ATTR_BUILTIN_DELETE:#[^ ]*]] + // CHECK: call frozen noalias nonnull align 4 i8* @_ZnwmSt11align_val_t(i64 frozen 4, i64 frozen 4) [[ATTR_BUILTIN_NEW:#[^ ]*]] + // CHECK: call void @_ZdlPvSt11align_val_t({{.*}}, i64 frozen 4) [[ATTR_BUILTIN_DELETE:#[^ ]*]] __builtin_operator_delete(__builtin_operator_new(4, std::align_val_t(4)), std::align_val_t(4)); } -// CHECK: declare nonnull i8* @_ZnwmSt11align_val_t(i64, i64) [[ATTR_NOBUILTIN:#[^ ]*]] -// CHECK: declare void @_ZdlPvSt11align_val_t(i8*, i64) [[ATTR_NOBUILTIN_NOUNWIND:#[^ ]*]] +// CHECK: declare frozen nonnull i8* @_ZnwmSt11align_val_t(i64 frozen, i64 frozen) [[ATTR_NOBUILTIN:#[^ ]*]] +// CHECK: declare void @_ZdlPvSt11align_val_t(i8* frozen, i64 frozen) [[ATTR_NOBUILTIN_NOUNWIND:#[^ ]*]] // CHECK-LABEL: define void @test_sized_delete( extern "C" void test_sized_delete() { - // CHECK: call noalias nonnull i8* @_Znwm(i64 4) [[ATTR_BUILTIN_NEW:#[^ ]*]] - // CHECK: call void @_ZdlPvm({{.*}}, i64 4) [[ATTR_BUILTIN_DELETE:#[^ ]*]] + // CHECK: call frozen noalias nonnull i8* @_Znwm(i64 frozen 4) [[ATTR_BUILTIN_NEW:#[^ ]*]] + // CHECK: call void @_ZdlPvm({{.*}}, i64 frozen 4) [[ATTR_BUILTIN_DELETE:#[^ ]*]] __builtin_operator_delete(__builtin_operator_new(4), 4); } -// CHECK: declare void @_ZdlPvm(i8*, i64) [[ATTR_NOBUILTIN_UNWIND:#[^ ]*]] +// CHECK: declare void @_ZdlPvm(i8* frozen, i64 frozen) [[ATTR_NOBUILTIN_UNWIND:#[^ ]*]] // CHECK-DAG: attributes [[ATTR_NOBUILTIN]] = {{[{].*}} nobuiltin {{.*[}]}} diff --git a/clang/test/CodeGenCXX/builtin-source-location.cpp b/clang/test/CodeGenCXX/builtin-source-location.cpp --- a/clang/test/CodeGenCXX/builtin-source-location.cpp +++ b/clang/test/CodeGenCXX/builtin-source-location.cpp @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -std=c++2a -fblocks %s -triple x86_64-unknown-unknown -emit-llvm -o %t.ll +// RUN: %clang_cc1 -disable-frozen-args -std=c++2a -fblocks %s -triple x86_64-unknown-unknown -emit-llvm -o %t.ll #line 8 "builtin-source-location.cpp" diff --git a/clang/test/CodeGenCXX/builtin_FUNCTION.cpp b/clang/test/CodeGenCXX/builtin_FUNCTION.cpp --- a/clang/test/CodeGenCXX/builtin_FUNCTION.cpp +++ b/clang/test/CodeGenCXX/builtin_FUNCTION.cpp @@ -20,20 +20,20 @@ // CHECK: @[[STR_TWO:.+]] = private unnamed_addr constant [14 x i8] c"test_func_two\00" // CHECK: @[[STR_THREE:.+]] = private unnamed_addr constant [20 x i8] c"do_default_arg_test\00" -// CHECK: define {{(dso_local )?}}i8* @_ZN9test_func13test_func_oneEv() +// CHECK: define {{(dso_local )?}}frozen i8* @_ZN9test_func13test_func_oneEv() // CHECK: ret i8* getelementptr inbounds ([14 x i8], [14 x i8]* @[[STR_ONE]], i32 0, i32 0) const char *test_func_one() { return __builtin_FUNCTION(); } -// CHECK: define {{(dso_local )?}}i8* @_ZN9test_func13test_func_twoEv() +// CHECK: define {{(dso_local )?}}frozen i8* @_ZN9test_func13test_func_twoEv() // CHECK: ret i8* getelementptr inbounds ([14 x i8], [14 x i8]* @[[STR_TWO]], i32 0, i32 0) const char *test_func_two() { return __builtin_FUNCTION(); } // CHECK: define {{(dso_local )?}}void @_ZN9test_func19do_default_arg_testEv() -// CHECK: %call = call i8* @_ZN9test_func16test_default_argEPKc(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @[[STR_THREE]], i32 0, i32 0)) +// CHECK: %call = call frozen i8* @_ZN9test_func16test_default_argEPKc(i8* frozen getelementptr inbounds ([20 x i8], [20 x i8]* @[[STR_THREE]], i32 0, i32 0)) void do_default_arg_test() { test_default_arg(); } diff --git a/clang/test/CodeGenCXX/builtin_LINE.cpp b/clang/test/CodeGenCXX/builtin_LINE.cpp --- a/clang/test/CodeGenCXX/builtin_LINE.cpp +++ b/clang/test/CodeGenCXX/builtin_LINE.cpp @@ -32,7 +32,7 @@ const int global_three(get_line_constexpr()); // CHECK-LABEL: define internal void @__cxx_global_var_init -// CHECK: %call = call i32 @_Z21get_line_nonconstexpri(i32 [[@LINE+2]]) +// CHECK: %call = call frozen i32 @_Z21get_line_nonconstexpri(i32 frozen [[@LINE+2]]) // CHECK-NEXT: store i32 %call, i32* @global_four, align 4 int global_four = get_line_nonconstexpr(); @@ -49,40 +49,40 @@ }; // CHECK-LABEL: define void @_ZN11InClassInit10test_classEv() void InClassInit::test_class() { - // CHECK: call void @_ZN11InClassInitC1Ev(%struct.InClassInit* %test_one) + // CHECK: call void @_ZN11InClassInitC1Ev(%struct.InClassInit* frozen %test_one) InClassInit test_one; - // CHECK-NEXT: call void @_ZN11InClassInitC1E4Tag1i(%struct.InClassInit* %test_two, i32 [[@LINE+1]]) + // CHECK-NEXT: call void @_ZN11InClassInitC1E4Tag1i(%struct.InClassInit* frozen %test_two, i32 frozen [[@LINE+1]]) InClassInit test_two{Tag1{}}; - // CHECK-NEXT: call void @_ZN11InClassInitC1E4Tag2(%struct.InClassInit* %test_three) + // CHECK-NEXT: call void @_ZN11InClassInitC1E4Tag2(%struct.InClassInit* frozen %test_three) InClassInit test_three{Tag2{}}; - // CHECK-NEXT: call void @_ZN11InClassInitC1E4Tag3i(%struct.InClassInit* %test_four, i32 [[@LINE+1]]) + // CHECK-NEXT: call void @_ZN11InClassInitC1E4Tag3i(%struct.InClassInit* frozen %test_four, i32 frozen [[@LINE+1]]) InClassInit test_four(Tag3{}); - // CHECK-NEXT: %[[CALL:.+]] = call i32 @_Z8get_linei(i32 [[@LINE+3]]) - // CHECK-NEXT: %[[CALL2:.+]] = call i32 @_Z9get_line2i(i32 %[[CALL]]) - // CHECK-NEXT: call void @_ZN11InClassInitC1E4Tag4i(%struct.InClassInit* %test_five, i32 %[[CALL2]]) + // CHECK-NEXT: %[[CALL:.+]] = call frozen i32 @_Z8get_linei(i32 frozen [[@LINE+3]]) + // CHECK-NEXT: %[[CALL2:.+]] = call frozen i32 @_Z9get_line2i(i32 frozen %[[CALL]]) + // CHECK-NEXT: call void @_ZN11InClassInitC1E4Tag4i(%struct.InClassInit* frozen %test_five, i32 frozen %[[CALL2]]) InClassInit test_five(Tag4{}); } // CHECK-LABEL: define void @_ZN11InClassInitC2Ev // CHECK: store i32 [[@LINE+4]], i32* %Init, align 4 -// CHECK: %call = call i32 @_Z8get_linei(i32 [[@LINE+3]]) -// CHECK-NEXT: %call2 = call i32 @_Z9get_line2i(i32 %call) +// CHECK: %call = call frozen i32 @_Z8get_linei(i32 frozen [[@LINE+3]]) +// CHECK-NEXT: %call2 = call frozen i32 @_Z9get_line2i(i32 frozen %call) // CHECK-NEXT: store i32 %call2, i32* %Init2, align 4 InClassInit::InClassInit() = default; InClassInit::InClassInit(Tag3, int l) : Init(l) {} -// CHECK-LABEL: define void @_ZN11InClassInitC2E4Tag4i(%struct.InClassInit* %this, i32 %arg) +// CHECK-LABEL: define void @_ZN11InClassInitC2E4Tag4i(%struct.InClassInit* frozen %this, i32 frozen %arg) // CHECK: %[[TEMP:.+]] = load i32, i32* %arg.addr, align 4 // CHECK-NEXT: store i32 %[[TEMP]], i32* %Init, align 4 -// CHECK: %[[CALL:.+]] = call i32 @_Z8get_linei(i32 [[@LINE+3]]) -// CHECK-NEXT: %[[CALL2:.+]] = call i32 @_Z9get_line2i(i32 %[[CALL]]) +// CHECK: %[[CALL:.+]] = call frozen i32 @_Z8get_linei(i32 frozen [[@LINE+3]]) +// CHECK-NEXT: %[[CALL2:.+]] = call frozen i32 @_Z9get_line2i(i32 frozen %[[CALL]]) // CHECK-NEXT: store i32 %[[CALL2]], i32* %Init2, align 4 InClassInit::InClassInit(Tag4, int arg) : Init(arg) {} // CHECK-LABEL: define void @_Z13get_line_testv() void get_line_test() { - // CHECK: %[[CALL:.+]] = call i32 @_Z8get_linei(i32 [[@LINE+2]]) + // CHECK: %[[CALL:.+]] = call frozen i32 @_Z8get_linei(i32 frozen [[@LINE+2]]) // CHECK-NEXT: store i32 %[[CALL]], i32* @sink, align 4 sink = get_line(); // CHECK-NEXT: store i32 [[@LINE+1]], i32* @sink, align 4 diff --git a/clang/test/CodeGenCXX/builtins.cpp b/clang/test/CodeGenCXX/builtins.cpp --- a/clang/test/CodeGenCXX/builtins.cpp +++ b/clang/test/CodeGenCXX/builtins.cpp @@ -4,7 +4,7 @@ extern "C" char memmove(); int main() { - // CHECK: call {{signext i8|i8}} @memmove() + // CHECK: call frozen {{signext i8|i8}} @memmove() return memmove(); } @@ -24,12 +24,12 @@ // CHECK: store i32 2, i32* @x, align 4 long y = __builtin_abs(-2l); -// CHECK: [[Y:%.+]] = call i64 @_Z13__builtin_absl(i64 -2) +// CHECK: [[Y:%.+]] = call frozen i64 @_Z13__builtin_absl(i64 frozen -2) // CHECK: store i64 [[Y]], i64* @y, align 8 extern const char char_memchr_arg[32]; char *memchr_result = __builtin_char_memchr(char_memchr_arg, 123, 32); -// CHECK: call i8* @memchr(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @char_memchr_arg, i64 0, i64 0), i32 123, i64 32) +// CHECK: call frozen i8* @memchr(i8* frozen getelementptr inbounds ([32 x i8], [32 x i8]* @char_memchr_arg, i64 0, i64 0), i32 frozen 123, i64 frozen 32) int constexpr_overflow_result() { constexpr int x = 1; diff --git a/clang/test/CodeGenCXX/call-with-static-chain.cpp b/clang/test/CodeGenCXX/call-with-static-chain.cpp --- a/clang/test/CodeGenCXX/call-with-static-chain.cpp +++ b/clang/test/CodeGenCXX/call-with-static-chain.cpp @@ -21,19 +21,19 @@ void test() { A a; - // CHECK32: call i32 bitcast (i32 (i32, i32, i32, i32, i32, i32, i32, i32)* @f1 to i32 (i8*, i32, i32, i32, i32, i32, i32, i32, i32)*)(i8* nest bitcast (i32 (i32, i32, i32, i32, i32, i32, i32, i32)* @f1 to i8*) - // CHECK64: call i32 bitcast (i32 (i64, i64, i64, i64, i64, i64, %struct.A*)* @f1 to i32 (i8*, i64, i64, i64, i64, i64, i64, %struct.A*)*)(i8* nest bitcast (i32 (i64, i64, i64, i64, i64, i64, %struct.A*)* @f1 to i8*) + // CHECK32: call frozen i32 bitcast (i32 (i32, i32, i32, i32, i32, i32, i32, i32)* @f1 to i32 (i8*, i32, i32, i32, i32, i32, i32, i32, i32)*)(i8* frozen nest bitcast (i32 (i32, i32, i32, i32, i32, i32, i32, i32)* @f1 to i8*) + // CHECK64: call frozen i32 bitcast (i32 (i64, i64, i64, i64, i64, i64, %struct.A*)* @f1 to i32 (i8*, i64, i64, i64, i64, i64, i64, %struct.A*)*)(i8* frozen nest bitcast (i32 (i64, i64, i64, i64, i64, i64, %struct.A*)* @f1 to i8*) __builtin_call_with_static_chain(f1(a, a, a, a), f1); - // CHECK32: call void bitcast (void (%struct.B*)* @f2 to void (%struct.B*, i8*)*)(%struct.B* sret align 4 %{{[0-9a-z]+}}, i8* nest bitcast (void (%struct.B*)* @f2 to i8*)) - // CHECK64: call void bitcast (void (%struct.B*)* @f2 to void (%struct.B*, i8*)*)(%struct.B* sret align 8 %{{[0-9a-z]+}}, i8* nest bitcast (void (%struct.B*)* @f2 to i8*)) + // CHECK32: call void bitcast (void (%struct.B*)* @f2 to void (%struct.B*, i8*)*)(%struct.B* sret align 4 %{{[0-9a-z]+}}, i8* frozen nest bitcast (void (%struct.B*)* @f2 to i8*)) + // CHECK64: call void bitcast (void (%struct.B*)* @f2 to void (%struct.B*, i8*)*)(%struct.B* sret align 8 %{{[0-9a-z]+}}, i8* frozen nest bitcast (void (%struct.B*)* @f2 to i8*)) __builtin_call_with_static_chain(f2(), f2); - // CHECK32: call i64 bitcast (i64 ()* @f3 to i64 (i8*)*)(i8* nest bitcast (i64 ()* @f3 to i8*)) - // CHECK64: call <2 x float> bitcast (<2 x float> ()* @f3 to <2 x float> (i8*)*)(i8* nest bitcast (<2 x float> ()* @f3 to i8*)) + // CHECK32: call frozen i64 bitcast (i64 ()* @f3 to i64 (i8*)*)(i8* frozen nest bitcast (i64 ()* @f3 to i8*)) + // CHECK64: call frozen <2 x float> bitcast (<2 x float> ()* @f3 to <2 x float> (i8*)*)(i8* frozen nest bitcast (<2 x float> ()* @f3 to i8*)) __builtin_call_with_static_chain(f3(), f3); - // CHECK32: call nonnull align 4 dereferenceable(8) %struct.A* bitcast (%struct.A* ()* @f4 to %struct.A* (i8*)*)(i8* nest bitcast (%struct.A* ()* @f4 to i8*)) - // CHECK64: call nonnull align 8 dereferenceable(16) %struct.A* bitcast (%struct.A* ()* @f4 to %struct.A* (i8*)*)(i8* nest bitcast (%struct.A* ()* @f4 to i8*)) + // CHECK32: call frozen nonnull align 4 dereferenceable(8) %struct.A* bitcast (%struct.A* ()* @f4 to %struct.A* (i8*)*)(i8* frozen nest bitcast (%struct.A* ()* @f4 to i8*)) + // CHECK64: call frozen nonnull align 8 dereferenceable(16) %struct.A* bitcast (%struct.A* ()* @f4 to %struct.A* (i8*)*)(i8* frozen nest bitcast (%struct.A* ()* @f4 to i8*)) __builtin_call_with_static_chain(f4(), f4); } diff --git a/clang/test/CodeGenCXX/catch-nullptr-and-nonzero-offset-in-offsetof-idiom.cpp b/clang/test/CodeGenCXX/catch-nullptr-and-nonzero-offset-in-offsetof-idiom.cpp --- a/clang/test/CodeGenCXX/catch-nullptr-and-nonzero-offset-in-offsetof-idiom.cpp +++ b/clang/test/CodeGenCXX/catch-nullptr-and-nonzero-offset-in-offsetof-idiom.cpp @@ -7,7 +7,7 @@ int x, y; }; -// CHECK-LABEL: define i64 @{{.*}}get_offset_of_y_naively{{.*}}( +// CHECK-LABEL: define frozen i64 @{{.*}}get_offset_of_y_naively{{.*}}( uintptr_t get_offset_of_y_naively() { // CHECK: [[ENTRY:.*]]: // CHECK-NEXT: ret i64 ptrtoint (i32* getelementptr (i32, i32* null, i32 1) to i64) @@ -15,7 +15,7 @@ return ((uintptr_t)(&(((S *)nullptr)->y))); } -// CHECK-LABEL: define i64 @{{.*}}get_offset_of_y_via_builtin{{.*}}( +// CHECK-LABEL: define frozen i64 @{{.*}}get_offset_of_y_via_builtin{{.*}}( uintptr_t get_offset_of_y_via_builtin() { // CHECK: [[ENTRY:.*]]: // CHECK-NEXT: ret i64 4 diff --git a/clang/test/CodeGenCXX/catch-undef-behavior.cpp b/clang/test/CodeGenCXX/catch-undef-behavior.cpp --- a/clang/test/CodeGenCXX/catch-undef-behavior.cpp +++ b/clang/test/CodeGenCXX/catch-undef-behavior.cpp @@ -1,8 +1,8 @@ -// RUN: %clang_cc1 -std=c++11 -fsanitize=signed-integer-overflow,integer-divide-by-zero,float-divide-by-zero,shift-base,shift-exponent,unreachable,return,vla-bound,alignment,null,vptr,object-size,float-cast-overflow,bool,enum,array-bounds,function -fsanitize-recover=signed-integer-overflow,integer-divide-by-zero,float-divide-by-zero,shift-base,shift-exponent,vla-bound,alignment,null,vptr,object-size,float-cast-overflow,bool,enum,array-bounds,function -emit-llvm %s -o - -triple x86_64-linux-gnu | opt -instnamer -S | FileCheck %s -// RUN: %clang_cc1 -std=c++11 -fsanitize=vptr,address -fsanitize-recover=vptr,address -emit-llvm %s -o - -triple x86_64-linux-gnu | FileCheck %s --check-prefix=CHECK-ASAN -// RUN: %clang_cc1 -std=c++11 -fsanitize=vptr -fsanitize-recover=vptr -emit-llvm %s -o - -triple x86_64-linux-gnu | FileCheck %s --check-prefix=DOWNCAST-NULL -// RUN: %clang_cc1 -std=c++11 -fsanitize=function -emit-llvm %s -o - -triple x86_64-linux-gnux32 | FileCheck %s --check-prefix=CHECK-X32 -// RUN: %clang_cc1 -std=c++11 -fsanitize=function -emit-llvm %s -o - -triple i386-linux-gnu | FileCheck %s --check-prefix=CHECK-X86 +// RUN: %clang_cc1 -disable-frozen-args -std=c++11 -fsanitize=signed-integer-overflow,integer-divide-by-zero,float-divide-by-zero,shift-base,shift-exponent,unreachable,return,vla-bound,alignment,null,vptr,object-size,float-cast-overflow,bool,enum,array-bounds,function -fsanitize-recover=signed-integer-overflow,integer-divide-by-zero,float-divide-by-zero,shift-base,shift-exponent,vla-bound,alignment,null,vptr,object-size,float-cast-overflow,bool,enum,array-bounds,function -emit-llvm %s -o - -triple x86_64-linux-gnu | opt -instnamer -S | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args -std=c++11 -fsanitize=vptr,address -fsanitize-recover=vptr,address -emit-llvm %s -o - -triple x86_64-linux-gnu | FileCheck %s --check-prefix=CHECK-ASAN +// RUN: %clang_cc1 -disable-frozen-args -std=c++11 -fsanitize=vptr -fsanitize-recover=vptr -emit-llvm %s -o - -triple x86_64-linux-gnu | FileCheck %s --check-prefix=DOWNCAST-NULL +// RUN: %clang_cc1 -disable-frozen-args -std=c++11 -fsanitize=function -emit-llvm %s -o - -triple x86_64-linux-gnux32 | FileCheck %s --check-prefix=CHECK-X32 +// RUN: %clang_cc1 -disable-frozen-args -std=c++11 -fsanitize=function -emit-llvm %s -o - -triple i386-linux-gnu | FileCheck %s --check-prefix=CHECK-X86 struct S { double d; @@ -630,7 +630,7 @@ void this_align_lambda_2(); }; void ThisAlign::this_align_lambda() { - // CHECK-LABEL: define internal %struct.ThisAlign* @"_ZZN9ThisAlign17this_align_lambdaEvENK3$_0clEv" + // CHECK-LABEL: define internal frozen %struct.ThisAlign* @"_ZZN9ThisAlign17this_align_lambdaEvENK3$_0clEv" // CHECK-SAME: (%{{.*}}* %[[this:[^)]*]]) // CHECK: %[[this_addr:.*]] = alloca // CHECK: store %{{.*}}* %[[this]], %{{.*}}** %[[this_addr]], diff --git a/clang/test/CodeGenCXX/cfi-cast.cpp b/clang/test/CodeGenCXX/cfi-cast.cpp --- a/clang/test/CodeGenCXX/cfi-cast.cpp +++ b/clang/test/CodeGenCXX/cfi-cast.cpp @@ -125,8 +125,8 @@ ((C *)p)->f(); } -// CHECK-UCAST-LABEL: define hidden i32 @_Z6a_callP1A -// CHECK-UCAST-STRICT-LABEL: define hidden i32 @_Z6a_callP1A +// CHECK-UCAST-LABEL: define hidden frozen i32 @_Z6a_callP1A +// CHECK-UCAST-STRICT-LABEL: define hidden frozen i32 @_Z6a_callP1A int a_call(A *a) { // CHECK-UCAST-NOT: @llvm.type.test // CHECK-UCAST-STRICT-NOT: @llvm.type.test diff --git a/clang/test/CodeGenCXX/cfi-cross-dso.cpp b/clang/test/CodeGenCXX/cfi-cross-dso.cpp --- a/clang/test/CodeGenCXX/cfi-cross-dso.cpp +++ b/clang/test/CodeGenCXX/cfi-cross-dso.cpp @@ -38,7 +38,7 @@ // MS: call void @__cfi_slowpath_diag(i64 -8005289897957287421, i8* %[[VT2]], {{.*}}) {{.*}} !nosanitize // CHECK: br label %[[CONT]], !nosanitize // CHECK: [[CONT]] -// CHECK: call void %{{.*}}(%struct.A* %{{.*}}) +// CHECK: call void %{{.*}}(%struct.A* frozen %{{.*}}) // No hash-based bit set entry for (anonymous namespace)::B // ITANIUM-NOT: !{i64 {{.*}}, [3 x i8*]* @_ZTVN12_GLOBAL__N_11BE, diff --git a/clang/test/CodeGenCXX/cfi-multiple-inheritance.cpp b/clang/test/CodeGenCXX/cfi-multiple-inheritance.cpp --- a/clang/test/CodeGenCXX/cfi-multiple-inheritance.cpp +++ b/clang/test/CodeGenCXX/cfi-multiple-inheritance.cpp @@ -20,7 +20,7 @@ int f1() final { return 2; } }; -// CHECK-LABEL: define hidden i32 @_Z3foov +// CHECK-LABEL: define hidden frozen i32 @_Z3foov int foo() { B b; return static_cast(&b)->f2(); diff --git a/clang/test/CodeGenCXX/cfi-vcall-check-after-args.cpp b/clang/test/CodeGenCXX/cfi-vcall-check-after-args.cpp --- a/clang/test/CodeGenCXX/cfi-vcall-check-after-args.cpp +++ b/clang/test/CodeGenCXX/cfi-vcall-check-after-args.cpp @@ -6,7 +6,7 @@ int g(); void f(A *a) { - // CHECK: call i32 @_Z1gv() + // CHECK: call frozen i32 @_Z1gv() // CHECK: call i1 @llvm.type.test a->f(g()); } diff --git a/clang/test/CodeGenCXX/clang-sections.cpp b/clang/test/CodeGenCXX/clang-sections.cpp --- a/clang/test/CodeGenCXX/clang-sections.cpp +++ b/clang/test/CodeGenCXX/clang-sections.cpp @@ -67,10 +67,10 @@ //CHECK: @p = constant i32 7, align 4 //CHECK: @_ZL5fptrs = internal constant [2 x i32 ()*] [i32 ()* @foo, i32 ()* @goo], align 4 #3 -//CHECK: define i32 @foo() #5 { -//CHECK: define i32 @goo() #6 { -//CHECK: declare i32 @zoo(i32*, i32*) #7 -//CHECK: define i32 @hoo() #8 { +//CHECK: define frozen i32 @foo() #5 { +//CHECK: define frozen i32 @goo() #6 { +//CHECK: declare frozen i32 @zoo(i32* frozen, i32* frozen) #7 +//CHECK: define frozen i32 @hoo() #8 { //CHECK: attributes #0 = { "bss-section"="my_bss.1" "data-section"="my_data.1" "rodata-section"="my_rodata.1" } //CHECK: attributes #1 = { "data-section"="my_data.1" "rodata-section"="my_rodata.1" } diff --git a/clang/test/CodeGenCXX/compound-literals.cpp b/clang/test/CodeGenCXX/compound-literals.cpp --- a/clang/test/CodeGenCXX/compound-literals.cpp +++ b/clang/test/CodeGenCXX/compound-literals.cpp @@ -15,21 +15,21 @@ // CHECK: @.compoundliteral = internal global [5 x i32] [i32 1, i32 2, i32 3, i32 4, i32 5], align 4 // CHECK: @q = global i32* getelementptr inbounds ([5 x i32], [5 x i32]* @.compoundliteral, i32 0, i32 0), align 4 -// CHECK-LABEL: define i32 @_Z1fv() +// CHECK-LABEL: define frozen i32 @_Z1fv() int f() { // CHECK: [[LVALUE:%[a-z0-9.]+]] = alloca // CHECK-NEXT: [[I:%[a-z0-9]+]] = getelementptr inbounds {{.*}}, {{.*}}* [[LVALUE]], i32 0, i32 0 // CHECK-NEXT: store i32 17, i32* [[I]] // CHECK-NEXT: [[X:%[a-z0-9]+]] = getelementptr inbounds {{.*}} [[LVALUE]], i32 0, i32 1 - // CHECK-NEXT: call %struct.X* @_ZN1XC1EPKc({{.*}}[[X]] + // CHECK-NEXT: call frozen %struct.X* @_ZN1XC1EPKc({{.*}}[[X]] // CHECK-NEXT: [[I:%[a-z0-9]+]] = getelementptr inbounds {{.*}} [[LVALUE]], i32 0, i32 0 // CHECK-NEXT: [[RESULT:%[a-z0-9]+]] = load i32, i32* - // CHECK-NEXT: call %struct.Y* @_ZN1YD1Ev + // CHECK-NEXT: call frozen %struct.Y* @_ZN1YD1Ev // CHECK-NEXT: ret i32 [[RESULT]] return ((Y){17, "seventeen"}).i; } -// CHECK-LABEL: define i32 @_Z1gv() +// CHECK-LABEL: define frozen i32 @_Z1gv() int g() { // CHECK: store [2 x i32]* %{{[a-z0-9.]+}}, [2 x i32]** [[V:%[a-z0-9.]+]] const int (&v)[2] = (int [2]) {1,2}; @@ -81,5 +81,5 @@ int *array = (int[]) { 1, 3, 5, 7 }; return array[0]; }(); -// CHECK-LABEL: define internal i32 @{{.*}}clEv +// CHECK-LABEL: define internal frozen i32 @{{.*}}clEv // CHECK: alloca [4 x i32] diff --git a/clang/test/CodeGenCXX/condition.cpp b/clang/test/CodeGenCXX/condition.cpp --- a/clang/test/CodeGenCXX/condition.cpp +++ b/clang/test/CodeGenCXX/condition.cpp @@ -31,7 +31,7 @@ // Verify that the condition variable is destroyed at the end of the // "if" statement. // CHECK: call void @_ZN1XC1Ev - // CHECK: call zeroext i1 @_ZN1XcvbEv + // CHECK: call frozen zeroext i1 @_ZN1XcvbEv if (X x = X()) { // CHECK: store i32 18 z = 18; @@ -44,13 +44,13 @@ if (X x = X()) Y y; // CHECK: br - // CHECK: call void @_ZN1YC1Ev - // CHECK: call void @_ZN1YD1Ev + // CHECK: call void @_ZN1YC1Ev + // CHECK: call void @_ZN1YD1Ev // CHECK: br - // CHECK: call void @_ZN1XD1Ev + // CHECK: call void @_ZN1XD1Ev // CHECK: call void @_Z4getXv - // CHECK: call zeroext i1 @_ZN1XcvbEv + // CHECK: call frozen zeroext i1 @_ZN1XcvbEv // CHECK: call void @_ZN1XD1Ev // CHECK: br if (getX()) { } @@ -82,7 +82,7 @@ z = 20; // CHECK: call void @_Z12getConvToIntv - // CHECK: call i32 @_ZN16ConvertibleToIntcviEv + // CHECK: call frozen i32 @_ZN16ConvertibleToIntcviEv // CHECK: call void @_ZN16ConvertibleToIntD1Ev switch(getConvToInt()) { case 0: @@ -101,7 +101,7 @@ // CHECK: [[CLEANUPDEST:%.*]] = alloca i32 while (X x = X()) { // CHECK: call void @_ZN1XC1Ev - // CHECK-NEXT: [[COND:%.*]] = call zeroext i1 @_ZN1XcvbEv + // CHECK-NEXT: [[COND:%.*]] = call frozen zeroext i1 @_ZN1XcvbEv // CHECK-NEXT: br i1 [[COND]] // Loop-exit staging block. @@ -124,7 +124,7 @@ z = 22; // CHECK: call void @_Z4getXv - // CHECK-NEXT: call zeroext i1 @_ZN1XcvbEv + // CHECK-NEXT: call frozen zeroext i1 @_ZN1XcvbEv // CHECK-NEXT: call void @_ZN1XD1Ev // CHECK-NEXT: br while(getX()) { } @@ -147,7 +147,7 @@ for(Y y = Y(); X x = X(); ++z) { // %for.cond: The loop condition. // CHECK: call void @_ZN1XC1Ev - // CHECK-NEXT: [[COND:%.*]] = call zeroext i1 @_ZN1XcvbEv( + // CHECK-NEXT: [[COND:%.*]] = call frozen zeroext i1 @_ZN1XcvbEv( // CHECK-NEXT: br i1 [[COND]] // -> %for.body, %for.cond.cleanup @@ -196,7 +196,7 @@ // %for.cond6: // CHECK: call void @_Z4getXv - // CHECK-NEXT: call zeroext i1 @_ZN1XcvbEv + // CHECK-NEXT: call frozen zeroext i1 @_ZN1XcvbEv // CHECK-NEXT: call void @_ZN1XD1Ev // CHECK-NEXT: br // -> %for.body10, %for.end16 @@ -229,7 +229,7 @@ // CHECK: store i32 77 z = 77; // CHECK: call void @_Z4getXv - // CHECK: call zeroext i1 @_ZN1XcvbEv + // CHECK: call frozen zeroext i1 @_ZN1XcvbEv // CHECK: call void @_ZN1XD1Ev // CHECK: br } while (getX()); @@ -245,7 +245,7 @@ int result; // CHECK: call void @_ZN1XC1ERKS_ - // CHECK: call i32 @_Z1f1X + // CHECK: call frozen i32 @_Z1f1X // CHECK: call void @_ZN1XD1Ev // CHECK: br // CHECK: store i32 2 @@ -254,7 +254,7 @@ if (f(x)) { result = 2; } else { result = 3; } // CHECK: call void @_ZN1XC1ERKS_ - // CHECK: call i32 @_Z1f1X + // CHECK: call frozen i32 @_Z1f1X // CHECK: call void @_ZN1XD1Ev // CHECK: br // CHECK: store i32 4 @@ -262,13 +262,13 @@ while (f(x)) { result = 4; } // CHECK: call void @_ZN1XC1ERKS_ - // CHECK: call i32 @_Z1f1X + // CHECK: call frozen i32 @_Z1f1X // CHECK: call void @_ZN1XD1Ev // CHECK: br // CHECK: store i32 6 // CHECK: br // CHECK: call void @_ZN1XC1ERKS_ - // CHECK: call i32 @_Z1f1X + // CHECK: call frozen i32 @_Z1f1X // CHECK: store i32 5 // CHECK: call void @_ZN1XD1Ev // CHECK: br @@ -277,7 +277,7 @@ } // CHECK: call void @_ZN1XC1ERKS_ - // CHECK: call i32 @_Z1f1X + // CHECK: call frozen i32 @_Z1f1X // CHECK: call void @_ZN1XD1Ev // CHECK: switch i32 // CHECK: store i32 7 @@ -294,7 +294,7 @@ // CHECK: store i32 9 // CHECK: br // CHECK: call void @_ZN1XC1ERKS_ - // CHECK: call i32 @_Z1f1X + // CHECK: call frozen i32 @_Z1f1X // CHECK: call void @_ZN1XD1Ev // CHECK: br do { @@ -303,7 +303,7 @@ // CHECK: store i32 10 // CHECK: call void @_ZN1XC1ERKS_ - // CHECK: call zeroext i1 @_ZN1XcvbEv + // CHECK: call frozen zeroext i1 @_ZN1XcvbEv // CHECK: call void @_ZN1XD1Ev // CHECK: br do { diff --git a/clang/test/CodeGenCXX/conditional-gnu-ext.cpp b/clang/test/CodeGenCXX/conditional-gnu-ext.cpp --- a/clang/test/CodeGenCXX/conditional-gnu-ext.cpp +++ b/clang/test/CodeGenCXX/conditional-gnu-ext.cpp @@ -5,7 +5,7 @@ extern "C" int printf(...); void test0() { -// CHECK: call i32 (...) @printf({{.*}}, i8* inttoptr (i64 3735928559 to i8*)) +// CHECK: call frozen i32 (...) @printf({{.*}}, i8* frozen inttoptr (i64 3735928559 to i8*)) printf("%p\n", (void *)0xdeadbeef ? : (void *)0xaaaaaa); } @@ -81,11 +81,11 @@ // CHECK: [[X:%.*]] = alloca [[B:%.*]]*, // CHECK: store [[B]]* {{%.*}}, [[B]]** [[X]] // CHECK-NEXT: [[T0:%.*]] = load [[B]]*, [[B]]** [[X]] - // CHECK-NEXT: [[BOOL:%.*]] = call zeroext i1 @_ZN5test31BcvbEv([[B]]* [[T0]]) + // CHECK-NEXT: [[BOOL:%.*]] = call frozen zeroext i1 @_ZN5test31BcvbEv([[B]]* frozen [[T0]]) // CHECK-NEXT: br i1 [[BOOL]] - // CHECK: call void @_ZN5test31BC1ERKS0_([[B]]* [[RESULT:%.*]], [[B]]* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[T0]]) + // CHECK: call void @_ZN5test31BC1ERKS0_([[B]]* frozen [[RESULT:%.*]], [[B]]* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[T0]]) // CHECK-NEXT: br label - // CHECK: call void @_ZN5test31BC1Ev([[B]]* [[RESULT]]) + // CHECK: call void @_ZN5test31BC1Ev([[B]]* frozen [[RESULT]]) // CHECK-NEXT: br label // CHECK: ret void return x ?: B(); @@ -95,13 +95,13 @@ // CHECK-LABEL: define void @_ZN5test35test1Ev( // CHECK: [[TEMP:%.*]] = alloca [[B]], // CHECK: call void @_ZN5test312test1_helperEv([[B]]* sret align 1 [[TEMP]]) - // CHECK-NEXT: [[BOOL:%.*]] = call zeroext i1 @_ZN5test31BcvbEv([[B]]* [[TEMP]]) + // CHECK-NEXT: [[BOOL:%.*]] = call frozen zeroext i1 @_ZN5test31BcvbEv([[B]]* frozen [[TEMP]]) // CHECK-NEXT: br i1 [[BOOL]] - // CHECK: call void @_ZN5test31BC1ERKS0_([[B]]* [[RESULT:%.*]], [[B]]* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[TEMP]]) + // CHECK: call void @_ZN5test31BC1ERKS0_([[B]]* frozen [[RESULT:%.*]], [[B]]* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[TEMP]]) // CHECK-NEXT: br label - // CHECK: call void @_ZN5test31BC1Ev([[B]]* [[RESULT]]) + // CHECK: call void @_ZN5test31BC1Ev([[B]]* frozen [[RESULT]]) // CHECK-NEXT: br label - // CHECK: call void @_ZN5test31BD1Ev([[B]]* [[TEMP]]) + // CHECK: call void @_ZN5test31BD1Ev([[B]]* frozen [[TEMP]]) // CHECK-NEXT: ret void extern B test1_helper(); return test1_helper() ?: B(); @@ -113,11 +113,11 @@ // CHECK: [[X:%.*]] = alloca [[B]]*, // CHECK: store [[B]]* {{%.*}}, [[B]]** [[X]] // CHECK-NEXT: [[T0:%.*]] = load [[B]]*, [[B]]** [[X]] - // CHECK-NEXT: [[BOOL:%.*]] = call zeroext i1 @_ZN5test31BcvbEv([[B]]* [[T0]]) + // CHECK-NEXT: [[BOOL:%.*]] = call frozen zeroext i1 @_ZN5test31BcvbEv([[B]]* frozen [[T0]]) // CHECK-NEXT: br i1 [[BOOL]] - // CHECK: call void @_ZN5test31BcvNS_1AEEv([[A:%.*]]* sret align 1 [[RESULT:%.*]], [[B]]* [[T0]]) + // CHECK: call void @_ZN5test31BcvNS_1AEEv([[A:%.*]]* sret align 1 [[RESULT:%.*]], [[B]]* frozen [[T0]]) // CHECK-NEXT: br label - // CHECK: call void @_ZN5test31AC1Ev([[A]]* [[RESULT]]) + // CHECK: call void @_ZN5test31AC1Ev([[A]]* frozen [[RESULT]]) // CHECK-NEXT: br label // CHECK: ret void return x ?: A(); @@ -127,13 +127,13 @@ // CHECK-LABEL: define void @_ZN5test35test3Ev( // CHECK: [[TEMP:%.*]] = alloca [[B]], // CHECK: call void @_ZN5test312test3_helperEv([[B]]* sret align 1 [[TEMP]]) - // CHECK-NEXT: [[BOOL:%.*]] = call zeroext i1 @_ZN5test31BcvbEv([[B]]* [[TEMP]]) + // CHECK-NEXT: [[BOOL:%.*]] = call frozen zeroext i1 @_ZN5test31BcvbEv([[B]]* frozen [[TEMP]]) // CHECK-NEXT: br i1 [[BOOL]] - // CHECK: call void @_ZN5test31BcvNS_1AEEv([[A]]* sret align 1 [[RESULT:%.*]], [[B]]* [[TEMP]]) + // CHECK: call void @_ZN5test31BcvNS_1AEEv([[A]]* sret align 1 [[RESULT:%.*]], [[B]]* frozen [[TEMP]]) // CHECK-NEXT: br label - // CHECK: call void @_ZN5test31AC1Ev([[A]]* [[RESULT]]) + // CHECK: call void @_ZN5test31AC1Ev([[A]]* frozen [[RESULT]]) // CHECK-NEXT: br label - // CHECK: call void @_ZN5test31BD1Ev([[B]]* [[TEMP]]) + // CHECK: call void @_ZN5test31BD1Ev([[B]]* frozen [[TEMP]]) // CHECK-NEXT: ret void extern B test3_helper(); return test3_helper() ?: A(); diff --git a/clang/test/CodeGenCXX/conditional-temporaries.cpp b/clang/test/CodeGenCXX/conditional-temporaries.cpp --- a/clang/test/CodeGenCXX/conditional-temporaries.cpp +++ b/clang/test/CodeGenCXX/conditional-temporaries.cpp @@ -42,7 +42,7 @@ } -// CHECK-OPT-LABEL: define i32 @_Z12getCtorCallsv() +// CHECK-OPT-LABEL: define frozen i32 @_Z12getCtorCallsv() int getCtorCalls() { // CHECK-LEGACY-OPT: ret i32 5 // X64-NEWPM-OPT: ret i32 5 @@ -51,7 +51,7 @@ return ctorcalls; } -// CHECK-OPT-LABEL: define i32 @_Z12getDtorCallsv() +// CHECK-OPT-LABEL: define frozen i32 @_Z12getDtorCallsv() int getDtorCalls() { // CHECK-LEGACY-OPT: ret i32 5 // X64-NEWPM-OPT: ret i32 5 @@ -60,12 +60,12 @@ return dtorcalls; } -// CHECK-OPT-LABEL: define zeroext i1 @_Z7successv() +// CHECK-OPT-LABEL: define frozen zeroext i1 @_Z7successv() bool success() { // CHECK-LEGACY-OPT: ret i1 true // X64-NEWPM-OPT: ret i1 true - // AMDGCN-NEWPM-OPT: [[CTORS:%.*]] = load i32, i32* addrspacecast (i32 addrspace(1)* @_ZN12_GLOBAL__N_19ctorcallsE to i32*), align 4, !tbaa !2 - // AMDGCN-NEWPM-OPT: [[DTORS:%.*]] = load i32, i32* addrspacecast (i32 addrspace(1)* @_ZN12_GLOBAL__N_19dtorcallsE to i32*), align 4, !tbaa !2 + // AMDGCN-NEWPM-OPT: [[CTORS:%.*]] = load i32, i32* addrspacecast (i32 addrspace(1)* @_ZN12_GLOBAL__N_19ctorcallsE to i32*), align 4, !tbaa + // AMDGCN-NEWPM-OPT: [[DTORS:%.*]] = load i32, i32* addrspacecast (i32 addrspace(1)* @_ZN12_GLOBAL__N_19dtorcallsE to i32*), align 4, !tbaa // AMDGCN-NEWPM-OPT: %cmp = icmp eq i32 [[CTORS]], [[DTORS]] // AMDGCN-NEWPM-OPT: ret i1 %cmp return ctorcalls == dtorcalls; @@ -86,19 +86,19 @@ // CHECK-NOOPT: call void @llvm.lifetime.start // CHECK-NOOPT: store i1 true, // CHECK-NOOPT: store i1 true, - // CHECK-NOOPT: call i32 @_ZN1X1fEv( + // CHECK-NOOPT: call frozen i32 @_ZN1X1fEv( // CHECK-NOOPT: call void @llvm.lifetime.start // CHECK-NOOPT: store i1 true, // CHECK-NOOPT: store i1 true, - // CHECK-NOOPT: call i32 @_ZN1X1fEv( + // CHECK-NOOPT: call frozen i32 @_ZN1X1fEv( // CHECK-NOOPT: call void @llvm.lifetime.start // CHECK-NOOPT: store i1 true, // CHECK-NOOPT: store i1 true, - // CHECK-NOOPT: call i32 @_ZN1X1fEv( - // CHECK-NOOPT: call i32 @_Z1giii( + // CHECK-NOOPT: call frozen i32 @_ZN1X1fEv( + // CHECK-NOOPT: call frozen i32 @_Z1giii( // CHECK-NOOPT: br label // - // CHECK-NOOPT: call i32 @_Z1giii(i32 1, i32 2, i32 3) + // CHECK-NOOPT: call frozen i32 @_Z1giii(i32 frozen 1, i32 frozen 2, i32 frozen 3) // CHECK-NOOPT: br label // // CHECK-NOOPT: load i1, @@ -136,12 +136,12 @@ // CHECK-OPT: br i1 // // CHECK-OPT: call void @llvm.lifetime.start - // CHECK-OPT: call i32 @_ZN1X1fEv( + // CHECK-OPT: call frozen i32 @_ZN1X1fEv( // CHECK-OPT: call void @llvm.lifetime.start - // CHECK-OPT: call i32 @_ZN1X1fEv( + // CHECK-OPT: call frozen i32 @_ZN1X1fEv( // CHECK-OPT: call void @llvm.lifetime.start - // CHECK-OPT: call i32 @_ZN1X1fEv( - // CHECK-OPT: call i32 @_Z1giii( + // CHECK-OPT: call frozen i32 @_ZN1X1fEv( + // CHECK-OPT: call frozen i32 @_Z1giii( // CHECK-OPT: call void @_ZN1XD1Ev( // CHECK-OPT: call void @llvm.lifetime.end // CHECK-OPT: call void @_ZN1XD1Ev( @@ -161,13 +161,13 @@ // CHECK-NOOPT: call void @llvm.lifetime.start // CHECK-NOOPT: br i1 // - // CHECK-NOOPT: call i32 @_ZN1Y1fEv( - // CHECK-NOOPT: call i32 @_ZN1Y1fEv( - // CHECK-NOOPT: call i32 @_ZN1Y1fEv( - // CHECK-NOOPT: call i32 @_Z1giii( + // CHECK-NOOPT: call frozen i32 @_ZN1Y1fEv( + // CHECK-NOOPT: call frozen i32 @_ZN1Y1fEv( + // CHECK-NOOPT: call frozen i32 @_ZN1Y1fEv( + // CHECK-NOOPT: call frozen i32 @_Z1giii( // CHECK-NOOPT: br label // - // CHECK-NOOPT: call i32 @_Z1giii(i32 1, i32 2, i32 3) + // CHECK-NOOPT: call frozen i32 @_Z1giii(i32 frozen 1, i32 frozen 2, i32 frozen 3) // CHECK-NOOPT: br label // // CHECK-NOOPT: call void @llvm.lifetime.end @@ -186,10 +186,10 @@ // CHECK-OPT: call void @llvm.lifetime.start // CHECK-OPT: br i1 // - // CHECK-OPT: call i32 @_ZN1Y1fEv( - // CHECK-OPT: call i32 @_ZN1Y1fEv( - // CHECK-OPT: call i32 @_ZN1Y1fEv( - // CHECK-OPT: call i32 @_Z1giii( + // CHECK-OPT: call frozen i32 @_ZN1Y1fEv( + // CHECK-OPT: call frozen i32 @_ZN1Y1fEv( + // CHECK-OPT: call frozen i32 @_ZN1Y1fEv( + // CHECK-OPT: call frozen i32 @_Z1giii( // CHECK-OPT: br label // // CHECK-OPT: call void @llvm.lifetime.end @@ -205,12 +205,12 @@ // CHECK-OPT: br i1 // // CHECK-OPT: call void @llvm.lifetime.start - // CHECK-OPT: call i32 @_ZN1Z1fEv( + // CHECK-OPT: call frozen i32 @_ZN1Z1fEv( // CHECK-OPT: call void @llvm.lifetime.start - // CHECK-OPT: call i32 @_ZN1Z1fEv( + // CHECK-OPT: call frozen i32 @_ZN1Z1fEv( // CHECK-OPT: call void @llvm.lifetime.start - // CHECK-OPT: call i32 @_ZN1Z1fEv( - // CHECK-OPT: call i32 @_Z1giii( + // CHECK-OPT: call frozen i32 @_ZN1Z1fEv( + // CHECK-OPT: call frozen i32 @_Z1giii( // CHECK-OPT: call void @llvm.lifetime.end // CHECK-OPT: call void @llvm.lifetime.end // CHECK-OPT: call void @llvm.lifetime.end diff --git a/clang/test/CodeGenCXX/const-init-cxx11.cpp b/clang/test/CodeGenCXX/const-init-cxx11.cpp --- a/clang/test/CodeGenCXX/const-init-cxx11.cpp +++ b/clang/test/CodeGenCXX/const-init-cxx11.cpp @@ -515,7 +515,7 @@ const int &rt = t; int f(int); int u = f(rt); - // CHECK: call i32 @_ZN12Unreferenced1fEi(i32 1) + // CHECK: call frozen i32 @_ZN12Unreferenced1fEi(i32 frozen 1) } namespace InitFromConst { @@ -533,28 +533,28 @@ constexpr int a[3] = { 1, 4, 9 }; void test() { - // CHECK: call void @_ZN13InitFromConst7consumeIbEEvT_(i1 zeroext true) + // CHECK: call void @_ZN13InitFromConst7consumeIbEEvT_(i1 frozen zeroext true) consume(b); - // CHECK: call void @_ZN13InitFromConst7consumeIiEEvT_(i32 5) + // CHECK: call void @_ZN13InitFromConst7consumeIiEEvT_(i32 frozen 5) consume(n); - // CHECK: call void @_ZN13InitFromConst7consumeIdEEvT_(double 4.300000e+00) + // CHECK: call void @_ZN13InitFromConst7consumeIdEEvT_(double frozen 4.300000e+00) consume(d); - // CHECK: call void @_ZN13InitFromConst7consumeIRKNS_1SEEEvT_(%"struct.InitFromConst::S"* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) @_ZN13InitFromConstL1sE) + // CHECK: call void @_ZN13InitFromConst7consumeIRKNS_1SEEEvT_(%"struct.InitFromConst::S"* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) @_ZN13InitFromConstL1sE) consume(s); - // CHECK: call void @_ZN13InitFromConst7consumeIRKNS_1SEEEvT_(%"struct.InitFromConst::S"* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) @_ZN13InitFromConstL1sE) + // CHECK: call void @_ZN13InitFromConst7consumeIRKNS_1SEEEvT_(%"struct.InitFromConst::S"* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) @_ZN13InitFromConstL1sE) consume(r); - // CHECK: call void @_ZN13InitFromConst7consumeIPKNS_1SEEEvT_(%"struct.InitFromConst::S"* @_ZN13InitFromConstL1sE) + // CHECK: call void @_ZN13InitFromConst7consumeIPKNS_1SEEEvT_(%"struct.InitFromConst::S"* frozen @_ZN13InitFromConstL1sE) consume(p); - // CHECK: call void @_ZN13InitFromConst7consumeIMNS_1SEiEEvT_(i64 0) + // CHECK: call void @_ZN13InitFromConst7consumeIMNS_1SEiEEvT_(i64 frozen 0) consume(mp); - // CHECK: call void @_ZN13InitFromConst7consumeIPKiEEvT_(i32* getelementptr inbounds ([3 x i32], [3 x i32]* @_ZN13InitFromConstL1aE, i64 0, i64 0)) + // CHECK: call void @_ZN13InitFromConst7consumeIPKiEEvT_(i32* frozen getelementptr inbounds ([3 x i32], [3 x i32]* @_ZN13InitFromConstL1aE, i64 0, i64 0)) consume(a); } } @@ -608,4 +608,4 @@ // VirtualMembers::TemplateClass::templateMethod() must be defined in this TU, // not just declared. -// CHECK: define linkonce_odr void @_ZN14VirtualMembers13TemplateClassIiE14templateMethodEv(%"struct.VirtualMembers::TemplateClass"* %this) +// CHECK: define linkonce_odr void @_ZN14VirtualMembers13TemplateClassIiE14templateMethodEv(%"struct.VirtualMembers::TemplateClass"* frozen %this) diff --git a/clang/test/CodeGenCXX/constructor-destructor-return-this.cpp b/clang/test/CodeGenCXX/constructor-destructor-return-this.cpp --- a/clang/test/CodeGenCXX/constructor-destructor-return-this.cpp +++ b/clang/test/CodeGenCXX/constructor-destructor-return-this.cpp @@ -32,28 +32,28 @@ B::B(int *i) : i_(i) { } B::~B() { } -// CHECKGEN-LABEL: define void @_ZN1BC2EPi(%class.B* %this, i32* %i) -// CHECKGEN-LABEL: define void @_ZN1BC1EPi(%class.B* %this, i32* %i) -// CHECKGEN-LABEL: define void @_ZN1BD2Ev(%class.B* %this) -// CHECKGEN-LABEL: define void @_ZN1BD1Ev(%class.B* %this) +// CHECKGEN-LABEL: define void @_ZN1BC2EPi(%class.B* frozen %this, i32* frozen %i) +// CHECKGEN-LABEL: define void @_ZN1BC1EPi(%class.B* frozen %this, i32* frozen %i) +// CHECKGEN-LABEL: define void @_ZN1BD2Ev(%class.B* frozen %this) +// CHECKGEN-LABEL: define void @_ZN1BD1Ev(%class.B* frozen %this) -// CHECKARM-LABEL: define %class.B* @_ZN1BC2EPi(%class.B* returned %this, i32* %i) -// CHECKARM-LABEL: define %class.B* @_ZN1BC1EPi(%class.B* returned %this, i32* %i) -// CHECKARM-LABEL: define %class.B* @_ZN1BD2Ev(%class.B* returned %this) -// CHECKARM-LABEL: define %class.B* @_ZN1BD1Ev(%class.B* returned %this) +// CHECKARM-LABEL: define frozen %class.B* @_ZN1BC2EPi(%class.B* frozen returned %this, i32* frozen %i) +// CHECKARM-LABEL: define frozen %class.B* @_ZN1BC1EPi(%class.B* frozen returned %this, i32* frozen %i) +// CHECKARM-LABEL: define frozen %class.B* @_ZN1BD2Ev(%class.B* frozen returned %this) +// CHECKARM-LABEL: define frozen %class.B* @_ZN1BD1Ev(%class.B* frozen returned %this) -// CHECKIOS5-LABEL: define %class.B* @_ZN1BC2EPi(%class.B* %this, i32* %i) -// CHECKIOS5-LABEL: define %class.B* @_ZN1BC1EPi(%class.B* %this, i32* %i) -// CHECKIOS5-LABEL: define %class.B* @_ZN1BD2Ev(%class.B* %this) -// CHECKIOS5-LABEL: define %class.B* @_ZN1BD1Ev(%class.B* %this) +// CHECKIOS5-LABEL: define frozen %class.B* @_ZN1BC2EPi(%class.B* frozen %this, i32* frozen %i) +// CHECKIOS5-LABEL: define frozen %class.B* @_ZN1BC1EPi(%class.B* frozen %this, i32* frozen %i) +// CHECKIOS5-LABEL: define frozen %class.B* @_ZN1BD2Ev(%class.B* frozen %this) +// CHECKIOS5-LABEL: define frozen %class.B* @_ZN1BD1Ev(%class.B* frozen %this) -// CHECKFUCHSIA-LABEL: define %class.B* @_ZN1BC2EPi(%class.B* returned %this, i32* %i) -// CHECKFUCHSIA-LABEL: define %class.B* @_ZN1BC1EPi(%class.B* returned %this, i32* %i) -// CHECKFUCHSIA-LABEL: define %class.B* @_ZN1BD2Ev(%class.B* returned %this) -// CHECKFUCHSIA-LABEL: define %class.B* @_ZN1BD1Ev(%class.B* returned %this) +// CHECKFUCHSIA-LABEL: define frozen %class.B* @_ZN1BC2EPi(%class.B* frozen returned %this, i32* frozen %i) +// CHECKFUCHSIA-LABEL: define frozen %class.B* @_ZN1BC1EPi(%class.B* frozen returned %this, i32* frozen %i) +// CHECKFUCHSIA-LABEL: define frozen %class.B* @_ZN1BD2Ev(%class.B* frozen returned %this) +// CHECKFUCHSIA-LABEL: define frozen %class.B* @_ZN1BD1Ev(%class.B* frozen returned %this) -// CHECKMS-LABEL: define dso_local x86_thiscallcc %class.B* @"??0B@@QAE@PAH@Z"(%class.B* returned %this, i32* %i) -// CHECKMS-LABEL: define dso_local x86_thiscallcc void @"??1B@@UAE@XZ"(%class.B* %this) +// CHECKMS-LABEL: define dso_local x86_thiscallcc frozen %class.B* @"??0B@@QAE@PAH@Z"(%class.B* frozen returned %this, i32* frozen %i) +// CHECKMS-LABEL: define dso_local x86_thiscallcc void @"??1B@@UAE@XZ"(%class.B* frozen %this) class C : public A, public B { public: @@ -66,40 +66,40 @@ C::C(int *i, char *c) : B(i), c_(c) { } C::~C() { } -// CHECKGEN-LABEL: define void @_ZN1CC2EPiPc(%class.C* %this, i32* %i, i8* %c) -// CHECKGEN-LABEL: define void @_ZN1CC1EPiPc(%class.C* %this, i32* %i, i8* %c) -// CHECKGEN-LABEL: define void @_ZN1CD2Ev(%class.C* %this) -// CHECKGEN-LABEL: define void @_ZN1CD1Ev(%class.C* %this) -// CHECKGEN-LABEL: define void @_ZThn8_N1CD1Ev(%class.C* %this) -// CHECKGEN-LABEL: define void @_ZN1CD0Ev(%class.C* %this) -// CHECKGEN-LABEL: define void @_ZThn8_N1CD0Ev(%class.C* %this) - -// CHECKARM-LABEL: define %class.C* @_ZN1CC2EPiPc(%class.C* returned %this, i32* %i, i8* %c) -// CHECKARM-LABEL: define %class.C* @_ZN1CC1EPiPc(%class.C* returned %this, i32* %i, i8* %c) -// CHECKARM-LABEL: define %class.C* @_ZN1CD2Ev(%class.C* returned %this) -// CHECKARM-LABEL: define %class.C* @_ZN1CD1Ev(%class.C* returned %this) -// CHECKARM-LABEL: define %class.C* @_ZThn8_N1CD1Ev(%class.C* %this) -// CHECKARM-LABEL: define void @_ZN1CD0Ev(%class.C* %this) -// CHECKARM-LABEL: define void @_ZThn8_N1CD0Ev(%class.C* %this) - -// CHECKIOS5-LABEL: define %class.C* @_ZN1CC2EPiPc(%class.C* %this, i32* %i, i8* %c) -// CHECKIOS5-LABEL: define %class.C* @_ZN1CC1EPiPc(%class.C* %this, i32* %i, i8* %c) -// CHECKIOS5-LABEL: define %class.C* @_ZN1CD2Ev(%class.C* %this) -// CHECKIOS5-LABEL: define %class.C* @_ZN1CD1Ev(%class.C* %this) -// CHECKIOS5-LABEL: define %class.C* @_ZThn8_N1CD1Ev(%class.C* %this) -// CHECKIOS5-LABEL: define void @_ZN1CD0Ev(%class.C* %this) -// CHECKIOS5-LABEL: define void @_ZThn8_N1CD0Ev(%class.C* %this) - -// CHECKFUCHSIA-LABEL: define %class.C* @_ZN1CC2EPiPc(%class.C* returned %this, i32* %i, i8* %c) -// CHECKFUCHSIA-LABEL: define %class.C* @_ZN1CC1EPiPc(%class.C* returned %this, i32* %i, i8* %c) -// CHECKFUCHSIA-LABEL: define %class.C* @_ZN1CD2Ev(%class.C* returned %this) -// CHECKFUCHSIA-LABEL: define %class.C* @_ZN1CD1Ev(%class.C* returned %this) -// CHECKFUCHSIA-LABEL: define %class.C* @_ZThn16_N1CD1Ev(%class.C* %this) -// CHECKFUCHSIA-LABEL: define void @_ZN1CD0Ev(%class.C* %this) -// CHECKFUCHSIA-LABEL: define void @_ZThn16_N1CD0Ev(%class.C* %this) - -// CHECKMS-LABEL: define dso_local x86_thiscallcc %class.C* @"??0C@@QAE@PAHPAD@Z"(%class.C* returned %this, i32* %i, i8* %c) -// CHECKMS-LABEL: define dso_local x86_thiscallcc void @"??1C@@UAE@XZ"(%class.C* %this) +// CHECKGEN-LABEL: define void @_ZN1CC2EPiPc(%class.C* frozen %this, i32* frozen %i, i8* frozen %c) +// CHECKGEN-LABEL: define void @_ZN1CC1EPiPc(%class.C* frozen %this, i32* frozen %i, i8* frozen %c) +// CHECKGEN-LABEL: define void @_ZN1CD2Ev(%class.C* frozen %this) +// CHECKGEN-LABEL: define void @_ZN1CD1Ev(%class.C* frozen %this) +// CHECKGEN-LABEL: define void @_ZThn8_N1CD1Ev(%class.C* frozen %this) +// CHECKGEN-LABEL: define void @_ZN1CD0Ev(%class.C* frozen %this) +// CHECKGEN-LABEL: define void @_ZThn8_N1CD0Ev(%class.C* frozen %this) + +// CHECKARM-LABEL: define frozen %class.C* @_ZN1CC2EPiPc(%class.C* frozen returned %this, i32* frozen %i, i8* frozen %c) +// CHECKARM-LABEL: define frozen %class.C* @_ZN1CC1EPiPc(%class.C* frozen returned %this, i32* frozen %i, i8* frozen %c) +// CHECKARM-LABEL: define frozen %class.C* @_ZN1CD2Ev(%class.C* frozen returned %this) +// CHECKARM-LABEL: define frozen %class.C* @_ZN1CD1Ev(%class.C* frozen returned %this) +// CHECKARM-LABEL: define frozen %class.C* @_ZThn8_N1CD1Ev(%class.C* frozen %this) +// CHECKARM-LABEL: define void @_ZN1CD0Ev(%class.C* frozen %this) +// CHECKARM-LABEL: define void @_ZThn8_N1CD0Ev(%class.C* frozen %this) + +// CHECKIOS5-LABEL: define frozen %class.C* @_ZN1CC2EPiPc(%class.C* frozen %this, i32* frozen %i, i8* frozen %c) +// CHECKIOS5-LABEL: define frozen %class.C* @_ZN1CC1EPiPc(%class.C* frozen %this, i32* frozen %i, i8* frozen %c) +// CHECKIOS5-LABEL: define frozen %class.C* @_ZN1CD2Ev(%class.C* frozen %this) +// CHECKIOS5-LABEL: define frozen %class.C* @_ZN1CD1Ev(%class.C* frozen %this) +// CHECKIOS5-LABEL: define frozen %class.C* @_ZThn8_N1CD1Ev(%class.C* frozen %this) +// CHECKIOS5-LABEL: define void @_ZN1CD0Ev(%class.C* frozen %this) +// CHECKIOS5-LABEL: define void @_ZThn8_N1CD0Ev(%class.C* frozen %this) + +// CHECKFUCHSIA-LABEL: define frozen %class.C* @_ZN1CC2EPiPc(%class.C* frozen returned %this, i32* frozen %i, i8* frozen %c) +// CHECKFUCHSIA-LABEL: define frozen %class.C* @_ZN1CC1EPiPc(%class.C* frozen returned %this, i32* frozen %i, i8* frozen %c) +// CHECKFUCHSIA-LABEL: define frozen %class.C* @_ZN1CD2Ev(%class.C* frozen returned %this) +// CHECKFUCHSIA-LABEL: define frozen %class.C* @_ZN1CD1Ev(%class.C* frozen returned %this) +// CHECKFUCHSIA-LABEL: define frozen %class.C* @_ZThn16_N1CD1Ev(%class.C* frozen %this) +// CHECKFUCHSIA-LABEL: define void @_ZN1CD0Ev(%class.C* frozen %this) +// CHECKFUCHSIA-LABEL: define void @_ZThn16_N1CD0Ev(%class.C* frozen %this) + +// CHECKMS-LABEL: define dso_local x86_thiscallcc frozen %class.C* @"??0C@@QAE@PAHPAD@Z"(%class.C* frozen returned %this, i32* frozen %i, i8* frozen %c) +// CHECKMS-LABEL: define dso_local x86_thiscallcc void @"??1C@@UAE@XZ"(%class.C* frozen %this) class D : public virtual A { public: @@ -110,28 +110,28 @@ D::D() { } D::~D() { } -// CHECKGEN-LABEL: define void @_ZN1DC2Ev(%class.D* %this, i8** %vtt) -// CHECKGEN-LABEL: define void @_ZN1DC1Ev(%class.D* %this) -// CHECKGEN-LABEL: define void @_ZN1DD2Ev(%class.D* %this, i8** %vtt) -// CHECKGEN-LABEL: define void @_ZN1DD1Ev(%class.D* %this) +// CHECKGEN-LABEL: define void @_ZN1DC2Ev(%class.D* frozen %this, i8** frozen %vtt) +// CHECKGEN-LABEL: define void @_ZN1DC1Ev(%class.D* frozen %this) +// CHECKGEN-LABEL: define void @_ZN1DD2Ev(%class.D* frozen %this, i8** frozen %vtt) +// CHECKGEN-LABEL: define void @_ZN1DD1Ev(%class.D* frozen %this) -// CHECKARM-LABEL: define %class.D* @_ZN1DC2Ev(%class.D* returned %this, i8** %vtt) -// CHECKARM-LABEL: define %class.D* @_ZN1DC1Ev(%class.D* returned %this) -// CHECKARM-LABEL: define %class.D* @_ZN1DD2Ev(%class.D* returned %this, i8** %vtt) -// CHECKARM-LABEL: define %class.D* @_ZN1DD1Ev(%class.D* returned %this) +// CHECKARM-LABEL: define frozen %class.D* @_ZN1DC2Ev(%class.D* frozen returned %this, i8** frozen %vtt) +// CHECKARM-LABEL: define frozen %class.D* @_ZN1DC1Ev(%class.D* frozen returned %this) +// CHECKARM-LABEL: define frozen %class.D* @_ZN1DD2Ev(%class.D* frozen returned %this, i8** frozen %vtt) +// CHECKARM-LABEL: define frozen %class.D* @_ZN1DD1Ev(%class.D* frozen returned %this) -// CHECKIOS5-LABEL: define %class.D* @_ZN1DC2Ev(%class.D* %this, i8** %vtt) -// CHECKIOS5-LABEL: define %class.D* @_ZN1DC1Ev(%class.D* %this) -// CHECKIOS5-LABEL: define %class.D* @_ZN1DD2Ev(%class.D* %this, i8** %vtt) -// CHECKIOS5-LABEL: define %class.D* @_ZN1DD1Ev(%class.D* %this) +// CHECKIOS5-LABEL: define frozen %class.D* @_ZN1DC2Ev(%class.D* frozen %this, i8** frozen %vtt) +// CHECKIOS5-LABEL: define frozen %class.D* @_ZN1DC1Ev(%class.D* frozen %this) +// CHECKIOS5-LABEL: define frozen %class.D* @_ZN1DD2Ev(%class.D* frozen %this, i8** frozen %vtt) +// CHECKIOS5-LABEL: define frozen %class.D* @_ZN1DD1Ev(%class.D* frozen %this) -// CHECKFUCHSIA-LABEL: define %class.D* @_ZN1DC2Ev(%class.D* returned %this, i8** %vtt) -// CHECKFUCHSIA-LABEL: define %class.D* @_ZN1DC1Ev(%class.D* returned %this) -// CHECKFUCHSIA-LABEL: define %class.D* @_ZN1DD2Ev(%class.D* returned %this, i8** %vtt) -// CHECKFUCHSIA-LABEL: define %class.D* @_ZN1DD1Ev(%class.D* returned %this) +// CHECKFUCHSIA-LABEL: define frozen %class.D* @_ZN1DC2Ev(%class.D* frozen returned %this, i8** frozen %vtt) +// CHECKFUCHSIA-LABEL: define frozen %class.D* @_ZN1DC1Ev(%class.D* frozen returned %this) +// CHECKFUCHSIA-LABEL: define frozen %class.D* @_ZN1DD2Ev(%class.D* frozen returned %this, i8** frozen %vtt) +// CHECKFUCHSIA-LABEL: define frozen %class.D* @_ZN1DD1Ev(%class.D* frozen returned %this) -// CHECKMS-LABEL: define dso_local x86_thiscallcc %class.D* @"??0D@@QAE@XZ"(%class.D* returned %this, i32 %is_most_derived) -// CHECKMS-LABEL: define dso_local x86_thiscallcc void @"??1D@@UAE@XZ"(%class.D* %this) +// CHECKMS-LABEL: define dso_local x86_thiscallcc frozen %class.D* @"??0D@@QAE@XZ"(%class.D* frozen returned %this, i32 frozen %is_most_derived) +// CHECKMS-LABEL: define dso_local x86_thiscallcc void @"??1D@@UAE@XZ"(%class.D* frozen %this) class E { public: @@ -153,9 +153,9 @@ // this parameter at the call site... // CHECKARM,CHECKFUCHSIA: [[VFN:%.*]] = getelementptr inbounds %class.E* (%class.E*)*, %class.E* (%class.E*)** // CHECKARM,CHECKFUCHSIA: [[THUNK:%.*]] = load %class.E* (%class.E*)*, %class.E* (%class.E*)** [[VFN]] -// CHECKARM,CHECKFUCHSIA: call %class.E* [[THUNK]](%class.E* % +// CHECKARM,CHECKFUCHSIA: call frozen %class.E* [[THUNK]](%class.E* frozen % // ...but static calls create declarations with 'returned' this -// CHECKARM,CHECKFUCHSIA: {{%.*}} = call %class.E* @_ZN1ED1Ev(%class.E* % +// CHECKARM,CHECKFUCHSIA: {{%.*}} = call frozen %class.E* @_ZN1ED1Ev(%class.E* frozen % -// CHECKARM,CHECKFUCHSIA: declare %class.E* @_ZN1ED1Ev(%class.E* returned) +// CHECKARM,CHECKFUCHSIA: declare frozen %class.E* @_ZN1ED1Ev(%class.E* frozen returned) diff --git a/clang/test/CodeGenCXX/constructor-direct-call.cpp b/clang/test/CodeGenCXX/constructor-direct-call.cpp --- a/clang/test/CodeGenCXX/constructor-direct-call.cpp +++ b/clang/test/CodeGenCXX/constructor-direct-call.cpp @@ -24,12 +24,12 @@ void f2() { // CHECK: %var = alloca %class.Test2, align 4 - // CHECK32-NEXT: call x86_thiscallcc void @_ZN5Test2C1Ev(%class.Test2* %var) - // CHECK64-NEXT: %call = call %class.Test2* @"??0Test2@@QEAA@XZ"(%class.Test2* %var) + // CHECK32-NEXT: call x86_thiscallcc void @_ZN5Test2C1Ev(%class.Test2* frozen %var) + // CHECK64-NEXT: %call = call frozen %class.Test2* @"??0Test2@@QEAA@XZ"(%class.Test2* frozen %var) Test2 var; - // CHECK32-NEXT: call x86_thiscallcc void @_ZN5Test2C1Ev(%class.Test2* %var) - // CHECK64-NEXT: %call1 = call %class.Test2* @"??0Test2@@QEAA@XZ"(%class.Test2* %var) + // CHECK32-NEXT: call x86_thiscallcc void @_ZN5Test2C1Ev(%class.Test2* frozen %var) + // CHECK64-NEXT: %call1 = call frozen %class.Test2* @"??0Test2@@QEAA@XZ"(%class.Test2* frozen %var) var.Test2::Test2(); // CHECK32: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 %{{.*}}, i8* align 4 %{{.*}}, i32 8, i1 false) @@ -50,19 +50,19 @@ }; void f3() { - // CHECK32: call x86_thiscallcc void @_ZN5Test3C1Ev(%class.Test3* %var) - // CHECK64: %call = call %class.Test3* @"??0Test3@@QEAA@XZ"(%class.Test3* %var) + // CHECK32: call x86_thiscallcc void @_ZN5Test3C1Ev(%class.Test3* frozen %var) + // CHECK64: %call = call frozen %class.Test3* @"??0Test3@@QEAA@XZ"(%class.Test3* frozen %var) Test3 var; - // CHECK32-NEXT: call x86_thiscallcc void @_ZN5Test3C1Ev(%class.Test3* %var2) - // CHECK64-NEXT: %call1 = call %class.Test3* @"??0Test3@@QEAA@XZ"(%class.Test3* %var2) + // CHECK32-NEXT: call x86_thiscallcc void @_ZN5Test3C1Ev(%class.Test3* frozen %var2) + // CHECK64-NEXT: %call1 = call frozen %class.Test3* @"??0Test3@@QEAA@XZ"(%class.Test3* frozen %var2) Test3 var2; - // CHECK32-NEXT: call x86_thiscallcc void @_ZN5Test3C1Ev(%class.Test3* %var) - // CHECK64-NEXT: %call2 = call %class.Test3* @"??0Test3@@QEAA@XZ"(%class.Test3* %var) + // CHECK32-NEXT: call x86_thiscallcc void @_ZN5Test3C1Ev(%class.Test3* frozen %var) + // CHECK64-NEXT: %call2 = call frozen %class.Test3* @"??0Test3@@QEAA@XZ"(%class.Test3* frozen %var) var.Test3::Test3(); - // CHECK32-NEXT: call x86_thiscallcc void @_ZN5Test3C1ERKS_(%class.Test3* %var, %class.Test3* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %var2) - // CHECK64-NEXT: %call3 = call %class.Test3* @"??0Test3@@QEAA@AEBV0@@Z"(%class.Test3* %var, %class.Test3* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %var2) + // CHECK32-NEXT: call x86_thiscallcc void @_ZN5Test3C1ERKS_(%class.Test3* frozen %var, %class.Test3* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %var2) + // CHECK64-NEXT: %call3 = call frozen %class.Test3* @"??0Test3@@QEAA@AEBV0@@Z"(%class.Test3* frozen %var, %class.Test3* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %var2) var.Test3::Test3(var2); } diff --git a/clang/test/CodeGenCXX/constructor-init.cpp b/clang/test/CodeGenCXX/constructor-init.cpp --- a/clang/test/CodeGenCXX/constructor-init.cpp +++ b/clang/test/CodeGenCXX/constructor-init.cpp @@ -93,22 +93,22 @@ B(int); }; - // CHECK-LABEL: define void @_ZN10InitVTable1BC2Ev(%"struct.InitVTable::B"* %this) unnamed_addr + // CHECK-LABEL: define void @_ZN10InitVTable1BC2Ev(%"struct.InitVTable::B"* frozen %this) unnamed_addr // CHECK: [[T0:%.*]] = bitcast [[B:%.*]]* [[THIS:%.*]] to i32 (...)*** // CHECK-NEXT: store i32 (...)** bitcast (i8** getelementptr inbounds ({ [3 x i8*] }, { [3 x i8*] }* @_ZTVN10InitVTable1BE, i32 0, inrange i32 0, i32 2) to i32 (...)**), i32 (...)*** [[T0]] // CHECK: [[VTBL:%.*]] = load i32 ([[B]]*)**, i32 ([[B]]*)*** {{%.*}} // CHECK-NEXT: [[FNP:%.*]] = getelementptr inbounds i32 ([[B]]*)*, i32 ([[B]]*)** [[VTBL]], i64 0 // CHECK-NEXT: [[FN:%.*]] = load i32 ([[B]]*)*, i32 ([[B]]*)** [[FNP]] - // CHECK-NEXT: [[ARG:%.*]] = call i32 [[FN]]([[B]]* [[THIS]]) - // CHECK-NEXT: call void @_ZN10InitVTable1AC2Ei({{.*}}* {{%.*}}, i32 [[ARG]]) + // CHECK-NEXT: [[ARG:%.*]] = call frozen i32 [[FN]]([[B]]* frozen [[THIS]]) + // CHECK-NEXT: call void @_ZN10InitVTable1AC2Ei({{.*}}* frozen {{%.*}}, i32 frozen [[ARG]]) // CHECK-NEXT: [[T0:%.*]] = bitcast [[B]]* [[THIS]] to i32 (...)*** // CHECK-NEXT: store i32 (...)** bitcast (i8** getelementptr inbounds ({ [3 x i8*] }, { [3 x i8*] }* @_ZTVN10InitVTable1BE, i32 0, inrange i32 0, i32 2) to i32 (...)**), i32 (...)*** [[T0]] // CHECK-NEXT: ret void B::B() : A(foo()) {} - // CHECK-LABEL: define void @_ZN10InitVTable1BC2Ei(%"struct.InitVTable::B"* %this, i32 %x) unnamed_addr + // CHECK-LABEL: define void @_ZN10InitVTable1BC2Ei(%"struct.InitVTable::B"* frozen %this, i32 frozen %x) unnamed_addr // CHECK: [[ARG:%.*]] = add nsw i32 {{%.*}}, 5 - // CHECK-NEXT: call void @_ZN10InitVTable1AC2Ei({{.*}}* {{%.*}}, i32 [[ARG]]) + // CHECK-NEXT: call void @_ZN10InitVTable1AC2Ei({{.*}}* frozen {{%.*}}, i32 frozen [[ARG]]) // CHECK-NEXT: [[T0:%.*]] = bitcast [[B]]* {{%.*}} to i32 (...)*** // CHECK-NEXT: store i32 (...)** bitcast (i8** getelementptr inbounds ({ [3 x i8*] }, { [3 x i8*] }* @_ZTVN10InitVTable1BE, i32 0, inrange i32 0, i32 2) to i32 (...)**), i32 (...)*** [[T0]] // CHECK-NEXT: ret void @@ -163,7 +163,7 @@ // Make sure that the instantiated constructor initializes start and // end properly. -// CHECK-LABEL: define linkonce_odr void @_ZN1XIiEC2ERKS0_(%struct.X* %this, %struct.X* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %other) unnamed_addr +// CHECK-LABEL: define linkonce_odr void @_ZN1XIiEC2ERKS0_(%struct.X* frozen %this, %struct.X* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %other) unnamed_addr // CHECK: {{store.*null}} // CHECK: {{store.*null}} // CHECK: ret diff --git a/clang/test/CodeGenCXX/constructors.cpp b/clang/test/CodeGenCXX/constructors.cpp --- a/clang/test/CodeGenCXX/constructors.cpp +++ b/clang/test/CodeGenCXX/constructors.cpp @@ -22,20 +22,20 @@ A::A(struct Undeclared &ref) : mem(0) {} // Check that delegation works. -// NULL-INVALID-LABEL: define void @_ZN1AC2ER10Undeclared(%struct.A* %this, %struct.Undeclared* nonnull align 1 %ref) unnamed_addr -// NULL-VALID-LABEL: define void @_ZN1AC2ER10Undeclared(%struct.A* %this, %struct.Undeclared* align 1 %ref) unnamed_addr +// NULL-INVALID-LABEL: define void @_ZN1AC2ER10Undeclared(%struct.A* frozen %this, %struct.Undeclared* frozen nonnull align 1 %ref) unnamed_addr +// NULL-VALID-LABEL: define void @_ZN1AC2ER10Undeclared(%struct.A* frozen %this, %struct.Undeclared* frozen align 1 %ref) unnamed_addr // CHECK: call void @_ZN6MemberC1Ei( -// NULL-INVALID-LABEL: define void @_ZN1AC1ER10Undeclared(%struct.A* %this, %struct.Undeclared* nonnull align 1 %ref) unnamed_addr -// NULL-VALID-LABEL: define void @_ZN1AC1ER10Undeclared(%struct.A* %this, %struct.Undeclared* align 1 %ref) unnamed_addr +// NULL-INVALID-LABEL: define void @_ZN1AC1ER10Undeclared(%struct.A* frozen %this, %struct.Undeclared* frozen nonnull align 1 %ref) unnamed_addr +// NULL-VALID-LABEL: define void @_ZN1AC1ER10Undeclared(%struct.A* frozen %this, %struct.Undeclared* frozen align 1 %ref) unnamed_addr // CHECK: call void @_ZN1AC2ER10Undeclared( A::A(ValueClass v) : mem(v.y - v.x) {} -// CHECK-LABEL: define void @_ZN1AC2E10ValueClass(%struct.A* %this, i64 %v.coerce) unnamed_addr +// CHECK-LABEL: define void @_ZN1AC2E10ValueClass(%struct.A* frozen %this, i64 %v.coerce) unnamed_addr // CHECK: call void @_ZN6MemberC1Ei( -// CHECK-LABEL: define void @_ZN1AC1E10ValueClass(%struct.A* %this, i64 %v.coerce) unnamed_addr +// CHECK-LABEL: define void @_ZN1AC1E10ValueClass(%struct.A* frozen %this, i64 %v.coerce) unnamed_addr // CHECK: call void @_ZN1AC2E10ValueClass( /* Test that things work for inheritance. */ @@ -46,13 +46,13 @@ B::B(struct Undeclared &ref) : A(ref), mem(1) {} -// NULL-INVALID-LABEL: define void @_ZN1BC2ER10Undeclared(%struct.B* %this, %struct.Undeclared* nonnull align 1 %ref) unnamed_addr -// NULL-VALID-LABEL: define void @_ZN1BC2ER10Undeclared(%struct.B* %this, %struct.Undeclared* align 1 %ref) unnamed_addr +// NULL-INVALID-LABEL: define void @_ZN1BC2ER10Undeclared(%struct.B* frozen %this, %struct.Undeclared* frozen nonnull align 1 %ref) unnamed_addr +// NULL-VALID-LABEL: define void @_ZN1BC2ER10Undeclared(%struct.B* frozen %this, %struct.Undeclared* frozen align 1 %ref) unnamed_addr // CHECK: call void @_ZN1AC2ER10Undeclared( // CHECK: call void @_ZN6MemberC1Ei( -// NULL-INVALID-LABEL: define void @_ZN1BC1ER10Undeclared(%struct.B* %this, %struct.Undeclared* nonnull align 1 %ref) unnamed_addr -// NULL-VALID-LABEL: define void @_ZN1BC1ER10Undeclared(%struct.B* %this, %struct.Undeclared* align 1 %ref) unnamed_addr +// NULL-INVALID-LABEL: define void @_ZN1BC1ER10Undeclared(%struct.B* frozen %this, %struct.Undeclared* frozen nonnull align 1 %ref) unnamed_addr +// NULL-VALID-LABEL: define void @_ZN1BC1ER10Undeclared(%struct.B* frozen %this, %struct.Undeclared* frozen align 1 %ref) unnamed_addr // CHECK: call void @_ZN1BC2ER10Undeclared( @@ -67,10 +67,10 @@ }; C::C(int x) : A(ValueClass(x, x+1)), mem(x * x) {} -// CHECK-LABEL: define void @_ZN1CC2Ei(%struct.C* %this, i8** %vtt, i32 %x) unnamed_addr +// CHECK-LABEL: define void @_ZN1CC2Ei(%struct.C* frozen %this, i8** frozen %vtt, i32 frozen %x) unnamed_addr // CHECK: call void @_ZN6MemberC1Ei( -// CHECK-LABEL: define void @_ZN1CC1Ei(%struct.C* %this, i32 %x) unnamed_addr +// CHECK-LABEL: define void @_ZN1CC1Ei(%struct.C* frozen %this, i32 frozen %x) unnamed_addr // CHECK: call void @_ZN10ValueClassC1Eii( // CHECK: call void @_ZN1AC2E10ValueClass( // CHECK: call void @_ZN6MemberC1Ei( @@ -85,12 +85,12 @@ D::D(int x, ...) : A(ValueClass(x, x+1)), mem(x*x) {} -// CHECK-LABEL: define void @_ZN1DC2Eiz(%struct.D* %this, i32 %x, ...) unnamed_addr +// CHECK-LABEL: define void @_ZN1DC2Eiz(%struct.D* frozen %this, i32 frozen %x, ...) unnamed_addr // CHECK: call void @_ZN10ValueClassC1Eii( // CHECK: call void @_ZN1AC2E10ValueClass( // CHECK: call void @_ZN6MemberC1Ei( -// CHECK-LABEL: define void @_ZN1DC1Eiz(%struct.D* %this, i32 %x, ...) unnamed_addr +// CHECK-LABEL: define void @_ZN1DC1Eiz(%struct.D* frozen %this, i32 frozen %x, ...) unnamed_addr // CHECK: call void @_ZN10ValueClassC1Eii( // CHECK: call void @_ZN1AC2E10ValueClass( // CHECK: call void @_ZN6MemberC1Ei( diff --git a/clang/test/CodeGenCXX/conversion-function.cpp b/clang/test/CodeGenCXX/conversion-function.cpp --- a/clang/test/CodeGenCXX/conversion-function.cpp +++ b/clang/test/CodeGenCXX/conversion-function.cpp @@ -112,9 +112,9 @@ // CHECK-LP32: .globl __ZN1ScviEv // CHECK-LP32-NEXT: __ZN1ScviEv: -// CHECK-LP32: call L__ZN1Ycv1ZEv -// CHECK-LP32: call L__ZN1Zcv1XEv -// CHECK-LP32: call L__ZN1XcviEv -// CHECK-LP32: call L__ZN1XcvfEv -// CHECK-LP32: call L__ZN2XBcviEv -// CHECK-LP32: call L__ZN2YbcvcEv +// CHECK-LP32: call frozen L__ZN1Ycv1ZEv +// CHECK-LP32: call frozen L__ZN1Zcv1XEv +// CHECK-LP32: call frozen L__ZN1XcviEv +// CHECK-LP32: call frozen L__ZN1XcvfEv +// CHECK-LP32: call frozen L__ZN2XBcviEv +// CHECK-LP32: call frozen L__ZN2YbcvcEv diff --git a/clang/test/CodeGenCXX/convert-to-fptr.cpp b/clang/test/CodeGenCXX/convert-to-fptr.cpp --- a/clang/test/CodeGenCXX/convert-to-fptr.cpp +++ b/clang/test/CodeGenCXX/convert-to-fptr.cpp @@ -38,5 +38,5 @@ return 0; } -// CHECK: call i32 (i32)* @_ZN1AcvPFiiEEv -// CHECK: call nonnull i32 (i32)* @_ZN1BcvRFiiEEv +// CHECK: call frozen i32 (i32)* @_ZN1AcvPFiiEEv +// CHECK: call frozen nonnull i32 (i32)* @_ZN1BcvRFiiEEv diff --git a/clang/test/CodeGenCXX/copy-assign-synthesis-1.cpp b/clang/test/CodeGenCXX/copy-assign-synthesis-1.cpp --- a/clang/test/CodeGenCXX/copy-assign-synthesis-1.cpp +++ b/clang/test/CodeGenCXX/copy-assign-synthesis-1.cpp @@ -92,4 +92,4 @@ dstY.pr(); } -// CHECK: define linkonce_odr nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.X* @_ZN1XaSERKS_ +// CHECK: define linkonce_odr frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.X* @_ZN1XaSERKS_ diff --git a/clang/test/CodeGenCXX/copy-constructor-elim-2.cpp b/clang/test/CodeGenCXX/copy-constructor-elim-2.cpp --- a/clang/test/CodeGenCXX/copy-constructor-elim-2.cpp +++ b/clang/test/CodeGenCXX/copy-constructor-elim-2.cpp @@ -21,7 +21,7 @@ Derived(const Other &O); }; - // CHECK: define {{.*}} @_ZN13no_elide_base7DerivedC1ERKNS_5OtherE(%"struct.no_elide_base::Derived"* returned %this, %"struct.no_elide_base::Other"* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %O) unnamed_addr + // CHECK: define {{.*}} @_ZN13no_elide_base7DerivedC1ERKNS_5OtherE(%"struct.no_elide_base::Derived"* frozen returned %this, %"struct.no_elide_base::Other"* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %O) unnamed_addr Derived::Derived(const Other &O) // CHECK: call {{.*}} @_ZNK13no_elide_base5OthercvNS_4BaseEEv // CHECK: call {{.*}} @_ZN13no_elide_base4BaseC2ERKS0_ @@ -63,10 +63,10 @@ static A makeA() { A a; a.value = 2; return a; } }; - // CHECK-LABEL: define i32 @_ZN7PR121394testEv + // CHECK-LABEL: define frozen i32 @_ZN7PR121394testEv int test() { // CHECK: call void @_ZN7PR121391A5makeAEv - // CHECK-NEXT: call %"struct.PR12139::A"* @_ZN7PR121391AC1ERKS0_i + // CHECK-NEXT: call frozen %"struct.PR12139::A"* @_ZN7PR121391AC1ERKS0_i A a(A::makeA(), 3); // CHECK-NEXT: getelementptr inbounds // CHECK-NEXT: load diff --git a/clang/test/CodeGenCXX/copy-constructor-synthesis-2.cpp b/clang/test/CodeGenCXX/copy-constructor-synthesis-2.cpp --- a/clang/test/CodeGenCXX/copy-constructor-synthesis-2.cpp +++ b/clang/test/CodeGenCXX/copy-constructor-synthesis-2.cpp @@ -23,5 +23,5 @@ struct A { virtual void a(); }; A x(A& y) { return y; } -// CHECK: define linkonce_odr {{.*}} @_ZN1AC1ERKS_(%struct.A* {{.*}}%this, %struct.A* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) unnamed_addr +// CHECK: define linkonce_odr {{.*}} @_ZN1AC1ERKS_(%struct.A* {{.*}}%this, %struct.A* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) unnamed_addr // CHECK: store i32 (...)** bitcast (i8** getelementptr inbounds ({ [3 x i8*] }, { [3 x i8*] }* @_ZTV1A, i32 0, inrange i32 0, i32 2) to i32 (...)**) diff --git a/clang/test/CodeGenCXX/copy-constructor-synthesis.cpp b/clang/test/CodeGenCXX/copy-constructor-synthesis.cpp --- a/clang/test/CodeGenCXX/copy-constructor-synthesis.cpp +++ b/clang/test/CodeGenCXX/copy-constructor-synthesis.cpp @@ -21,7 +21,7 @@ }; -// CHECK-LABEL: define linkonce_odr void @_ZN1XC1ERKS_(%struct.X* %this, %struct.X* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) unnamed_addr +// CHECK-LABEL: define linkonce_odr void @_ZN1XC1ERKS_(%struct.X* frozen %this, %struct.X* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) unnamed_addr struct X : M, N, P { // ... X() : f1(1.0), d1(2.0), i1(3), name("HELLO"), bf1(0xff), bf2(0xabcd), au_i1(1234), au1_4("MASKED") {} @@ -136,7 +136,7 @@ B b2 = b1; } -// CHECK: define linkonce_odr nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[A:%.*]]* @_ZN12rdar138169401AaSERKS0_( +// CHECK: define linkonce_odr frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[A:%.*]]* @_ZN12rdar138169401AaSERKS0_( // CHECK: [[THIS:%.*]] = load [[A]]*, [[A]]** // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds [[A]], [[A]]* [[THIS]], i32 0, i32 1 // CHECK-NEXT: [[OTHER:%.*]] = load [[A]]*, [[A]]** @@ -146,7 +146,7 @@ // CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[T4]], i8* align 8 [[T5]], i64 8, i1 false) // CHECK-NEXT: ret [[A]]* [[THIS]] -// CHECK-LABEL: define linkonce_odr void @_ZN6PR66281BC2ERKS0_(%"struct.PR6628::B"* %this, %"struct.PR6628::B"* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) unnamed_addr +// CHECK-LABEL: define linkonce_odr void @_ZN6PR66281BC2ERKS0_(%"struct.PR6628::B"* frozen %this, %"struct.PR6628::B"* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) unnamed_addr // CHECK: call void @_ZN6PR66281TC1Ev // CHECK: call void @_ZN6PR66281TC1Ev // CHECK: call void @_ZN6PR66281AC2ERKS0_RKNS_1TES5_ diff --git a/clang/test/CodeGenCXX/copy-initialization.cpp b/clang/test/CodeGenCXX/copy-initialization.cpp --- a/clang/test/CodeGenCXX/copy-initialization.cpp +++ b/clang/test/CodeGenCXX/copy-initialization.cpp @@ -12,7 +12,7 @@ void f(Foo); -// CHECK-LABEL: define void @_Z1g3Foo(%struct.Foo* %foo) +// CHECK-LABEL: define void @_Z1g3Foo(%struct.Foo* frozen %foo) void g(Foo foo) { // CHECK: call void @_ZN3BarC1Ev // CHECK: @_ZNK3BarcvRK3FooEv diff --git a/clang/test/CodeGenCXX/cxx0x-delegating-ctors.cpp b/clang/test/CodeGenCXX/cxx0x-delegating-ctors.cpp --- a/clang/test/CodeGenCXX/cxx0x-delegating-ctors.cpp +++ b/clang/test/CodeGenCXX/cxx0x-delegating-ctors.cpp @@ -65,7 +65,7 @@ }; X::X(int) : X() {} } -// CHECK: define {{.*}} @_ZN7PR128901XC1Ei(%"class.PR12890::X"* %this, i32 %0) +// CHECK: define {{.*}} @_ZN7PR128901XC1Ei(%"class.PR12890::X"* frozen %this, i32 frozen %0) // CHECK: call void @llvm.memset.p0i8.{{i32|i64}}(i8* align 4 {{.*}}, i8 0, {{i32|i64}} 4, i1 false) namespace PR14588 { diff --git a/clang/test/CodeGenCXX/cxx0x-initializer-array.cpp b/clang/test/CodeGenCXX/cxx0x-initializer-array.cpp --- a/clang/test/CodeGenCXX/cxx0x-initializer-array.cpp +++ b/clang/test/CodeGenCXX/cxx0x-initializer-array.cpp @@ -6,7 +6,7 @@ typedef A x[]; int f() { x{{{1}}}; - // CHECK-LABEL: define i32 @_Z1fv + // CHECK-LABEL: define frozen i32 @_Z1fv // CHECK: store i32 1 // (It's okay if the output changes here, as long as we don't crash.) return 0; diff --git a/clang/test/CodeGenCXX/cxx0x-initializer-constructors.cpp b/clang/test/CodeGenCXX/cxx0x-initializer-constructors.cpp --- a/clang/test/CodeGenCXX/cxx0x-initializer-constructors.cpp +++ b/clang/test/CodeGenCXX/cxx0x-initializer-constructors.cpp @@ -9,31 +9,31 @@ // CHECK-LABEL: define void @_Z3fn1v S s { 1 }; // CHECK: alloca %struct.S, align 1 - // CHECK: call void @_ZN1SC1Ei(%struct.S* %s, i32 1) + // CHECK: call void @_ZN1SC1Ei(%struct.S* frozen %s, i32 frozen 1) } void fn2() { // CHECK-LABEL: define void @_Z3fn2v S s { 1, 2.0, 3.0 }; // CHECK: alloca %struct.S, align 1 - // CHECK: call void @_ZN1SC1Eidd(%struct.S* %s, i32 1, double 2.000000e+00, double 3.000000e+00) + // CHECK: call void @_ZN1SC1Eidd(%struct.S* frozen %s, i32 frozen 1, double frozen 2.000000e+00, double frozen 3.000000e+00) } void fn3() { // CHECK-LABEL: define void @_Z3fn3v S sa[] { { 1 }, { 2 }, { 3 } }; // CHECK: alloca [3 x %struct.S], align 1 - // CHECK: call void @_ZN1SC1Ei(%struct.S* %{{.+}}, i32 1) - // CHECK: call void @_ZN1SC1Ei(%struct.S* %{{.+}}, i32 2) - // CHECK: call void @_ZN1SC1Ei(%struct.S* %{{.+}}, i32 3) + // CHECK: call void @_ZN1SC1Ei(%struct.S* frozen %{{.+}}, i32 frozen 1) + // CHECK: call void @_ZN1SC1Ei(%struct.S* frozen %{{.+}}, i32 frozen 2) + // CHECK: call void @_ZN1SC1Ei(%struct.S* frozen %{{.+}}, i32 frozen 3) } void fn4() { // CHECK-LABEL: define void @_Z3fn4v S sa[] { { 1, 2.0, 3.0 }, { 4, 5.0, 6.0 } }; // CHECK: alloca [2 x %struct.S], align 1 - // CHECK: call void @_ZN1SC1Eidd(%struct.S* %{{.+}}, i32 1, double 2.000000e+00, double 3.000000e+00) - // CHECK: call void @_ZN1SC1Eidd(%struct.S* %{{.+}}, i32 4, double 5.000000e+00, double 6.000000e+00) + // CHECK: call void @_ZN1SC1Eidd(%struct.S* frozen %{{.+}}, i32 frozen 1, double frozen 2.000000e+00, double frozen 3.000000e+00) + // CHECK: call void @_ZN1SC1Eidd(%struct.S* frozen %{{.+}}, i32 frozen 4, double frozen 5.000000e+00, double frozen 6.000000e+00) } namespace TreeTransformBracedInit { diff --git a/clang/test/CodeGenCXX/cxx0x-initializer-references.cpp b/clang/test/CodeGenCXX/cxx0x-initializer-references.cpp --- a/clang/test/CodeGenCXX/cxx0x-initializer-references.cpp +++ b/clang/test/CodeGenCXX/cxx0x-initializer-references.cpp @@ -72,10 +72,10 @@ { // Ensure lifetime extension. - // CHECK: call %"struct.reference::B"* @_ZN9reference1BC1Ev + // CHECK: call frozen %"struct.reference::B"* @_ZN9reference1BC1Ev // CHECK-NEXT: store %{{.*}}* %{{.*}}, %{{.*}}** % const B &rb{ B() }; - // CHECK: call %"struct.reference::B"* @_ZN9reference1BD1Ev + // CHECK: call frozen %"struct.reference::B"* @_ZN9reference1BD1Ev } } diff --git a/clang/test/CodeGenCXX/cxx0x-initializer-stdinitializerlist.cpp b/clang/test/CodeGenCXX/cxx0x-initializer-stdinitializerlist.cpp --- a/clang/test/CodeGenCXX/cxx0x-initializer-stdinitializerlist.cpp +++ b/clang/test/CodeGenCXX/cxx0x-initializer-stdinitializerlist.cpp @@ -99,10 +99,10 @@ // X86: store i64 4, i64* getelementptr inbounds ({{.*}}, {{.*}}* @_ZN25thread_local_global_array1xE, i32 0, i32 1), align 8 // CHECK-LABEL: define internal void @__cxx_global_var_init -// X86: call void @_ZN8witharg1C1ERK10destroyme1(%[[WITHARG]]* getelementptr inbounds ([2 x %[[WITHARG]]], [2 x %[[WITHARG]]]* @_ZGR15globalInitList2_, i{{32|64}} 0, i{{32|64}} 0 -// X86: call void @_ZN8witharg1C1ERK10destroyme1(%[[WITHARG]]* getelementptr inbounds ([2 x %[[WITHARG]]], [2 x %[[WITHARG]]]* @_ZGR15globalInitList2_, i{{32|64}} 0, i{{32|64}} 1 -// AMDGCN: call void @_ZN8witharg1C1ERK10destroyme1(%[[WITHARG]]* getelementptr inbounds ([2 x %[[WITHARG]]], [2 x %[[WITHARG]]]* addrspacecast ({{[^@]+}} @_ZGR15globalInitList2_ {{[^)]+}}), i{{32|64}} 0, i{{32|64}} 0 -// AMDGCN: call void @_ZN8witharg1C1ERK10destroyme1(%[[WITHARG]]* getelementptr inbounds ([2 x %[[WITHARG]]], [2 x %[[WITHARG]]]* addrspacecast ({{[^@]+}} @_ZGR15globalInitList2_ {{[^)]+}}), i{{32|64}} 0, i{{32|64}} 1 +// X86: call void @_ZN8witharg1C1ERK10destroyme1(%[[WITHARG]]* frozen getelementptr inbounds ([2 x %[[WITHARG]]], [2 x %[[WITHARG]]]* @_ZGR15globalInitList2_, i{{32|64}} 0, i{{32|64}} 0 +// X86: call void @_ZN8witharg1C1ERK10destroyme1(%[[WITHARG]]* frozen getelementptr inbounds ([2 x %[[WITHARG]]], [2 x %[[WITHARG]]]* @_ZGR15globalInitList2_, i{{32|64}} 0, i{{32|64}} 1 +// AMDGCN: call void @_ZN8witharg1C1ERK10destroyme1(%[[WITHARG]]* frozen getelementptr inbounds ([2 x %[[WITHARG]]], [2 x %[[WITHARG]]]* addrspacecast ({{[^@]+}} @_ZGR15globalInitList2_ {{[^)]+}}), i{{32|64}} 0, i{{32|64}} 0 +// AMDGCN: call void @_ZN8witharg1C1ERK10destroyme1(%[[WITHARG]]* frozen getelementptr inbounds ([2 x %[[WITHARG]]], [2 x %[[WITHARG]]]* addrspacecast ({{[^@]+}} @_ZGR15globalInitList2_ {{[^)]+}}), i{{32|64}} 0, i{{32|64}} 1 // CHECK: call i32 @__cxa_atexit // X86: store %[[WITHARG]]* getelementptr inbounds ([2 x %[[WITHARG]]], [2 x %[[WITHARG]]]* @_ZGR15globalInitList2_, i64 0, i64 0), // X86: %[[WITHARG]]** getelementptr inbounds (%{{.*}}, %{{.*}}* @globalInitList2, i32 0, i32 0), align 8 diff --git a/clang/test/CodeGenCXX/cxx11-initializer-aggregate.cpp b/clang/test/CodeGenCXX/cxx11-initializer-aggregate.cpp --- a/clang/test/CodeGenCXX/cxx11-initializer-aggregate.cpp +++ b/clang/test/CodeGenCXX/cxx11-initializer-aggregate.cpp @@ -54,7 +54,7 @@ // CHECK: store i32 %{{.*}}, i32* %[[A]], align 4 // CHECK: %[[B:.*]] = getelementptr inbounds %struct.A, %struct.A* %[[INITLIST]], i32 0, i32 1 // CHECK: store i32 5, i32* %[[B]], align 4 - // CHECK: call i32 @_ZN1A1fEv(%struct.A* %[[INITLIST]]) + // CHECK: call frozen i32 @_ZN1A1fEv(%struct.A* frozen %[[INITLIST]]) return A{x, 5}.f(); } @@ -65,7 +65,7 @@ // CHECK: %[[INITLIST2:.*]] = alloca %struct.B, align 8 // CHECK: %[[R:.*]] = getelementptr inbounds %struct.B, %struct.B* %[[INITLIST2:.*]], i32 0, i32 0 // CHECK: store i32* %{{.*}}, i32** %[[R]], align 8 - // CHECK: call nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) i32* @_ZN1B1fEv(%struct.B* %[[INITLIST2:.*]]) + // CHECK: call frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) i32* @_ZN1B1fEv(%struct.B* frozen %[[INITLIST2:.*]]) return B{v}.f(); } diff --git a/clang/test/CodeGenCXX/cxx11-initializer-array-new.cpp b/clang/test/CodeGenCXX/cxx11-initializer-array-new.cpp --- a/clang/test/CodeGenCXX/cxx11-initializer-array-new.cpp +++ b/clang/test/CodeGenCXX/cxx11-initializer-array-new.cpp @@ -7,7 +7,7 @@ void *p = new S[2][3]{ { 1, 2, 3 }, { 4, 5, 6 } }; // CHECK-LABEL: define -// CHECK: %[[ALLOC:.*]] = call noalias nonnull i8* @_Znam(i64 32) +// CHECK: %[[ALLOC:.*]] = call frozen noalias nonnull i8* @_Znam(i64 frozen 32) // CHECK: %[[COOKIE:.*]] = bitcast i8* %[[ALLOC]] to i64* // CHECK: store i64 6, i64* %[[COOKIE]] // CHECK: %[[START_AS_i8:.*]] = getelementptr inbounds i8, i8* %[[ALLOC]], i64 8 @@ -20,22 +20,22 @@ // CHECK: %[[S_0:.*]] = bitcast %[[S]]* %[[START_AS_S]] to [3 x %[[S]]]* // // CHECK: %[[S_0_0:.*]] = getelementptr inbounds [3 x %[[S]]], [3 x %[[S]]]* %[[S_0]], i64 0, i64 0 -// CHECK: call void @_ZN1SC1Ei(%[[S]]* %[[S_0_0]], i32 1) +// CHECK: call void @_ZN1SC1Ei(%[[S]]* frozen %[[S_0_0]], i32 frozen 1) // CHECK: %[[S_0_1:.*]] = getelementptr inbounds %[[S]], %[[S]]* %[[S_0_0]], i64 1 -// CHECK: call void @_ZN1SC1Ei(%[[S]]* %[[S_0_1]], i32 2) +// CHECK: call void @_ZN1SC1Ei(%[[S]]* frozen %[[S_0_1]], i32 frozen 2) // CHECK: %[[S_0_2:.*]] = getelementptr inbounds %[[S]], %[[S]]* %[[S_0_1]], i64 1 -// CHECK: call void @_ZN1SC1Ei(%[[S]]* %[[S_0_2]], i32 3) +// CHECK: call void @_ZN1SC1Ei(%[[S]]* frozen %[[S_0_2]], i32 frozen 3) // // { 4, 5, 6 } // // CHECK: %[[S_1:.*]] = getelementptr inbounds [3 x %[[S]]], [3 x %[[S]]]* %[[S_0]], i64 1 // // CHECK: %[[S_1_0:.*]] = getelementptr inbounds [3 x %[[S]]], [3 x %[[S]]]* %[[S_1]], i64 0, i64 0 -// CHECK: call void @_ZN1SC1Ei(%[[S]]* %[[S_1_0]], i32 4) +// CHECK: call void @_ZN1SC1Ei(%[[S]]* frozen %[[S_1_0]], i32 frozen 4) // CHECK: %[[S_1_1:.*]] = getelementptr inbounds %[[S]], %[[S]]* %[[S_1_0]], i64 1 -// CHECK: call void @_ZN1SC1Ei(%[[S]]* %[[S_1_1]], i32 5) +// CHECK: call void @_ZN1SC1Ei(%[[S]]* frozen %[[S_1_1]], i32 frozen 5) // CHECK: %[[S_1_2:.*]] = getelementptr inbounds %[[S]], %[[S]]* %[[S_1_1]], i64 1 -// CHECK: call void @_ZN1SC1Ei(%[[S]]* %[[S_1_2]], i32 6) +// CHECK: call void @_ZN1SC1Ei(%[[S]]* frozen %[[S_1_2]], i32 frozen 6) // // CHECK-NOT: br i1 // CHECK-NOT: call @@ -50,7 +50,7 @@ // CHECK: call {{.*}} @llvm.umul.with.overflow.i64(i64 %[[N:.*]], i64 12) // CHECK: %[[ELTS:.*]] = mul i64 %[[N]], 3 // CHECK: call {{.*}} @llvm.uadd.with.overflow.i64(i64 %{{.*}}, i64 8) -// CHECK: %[[ALLOC:.*]] = call noalias nonnull i8* @_Znam(i64 %{{.*}}) +// CHECK: %[[ALLOC:.*]] = call frozen noalias nonnull i8* @_Znam(i64 frozen %{{.*}}) // // CHECK: %[[COOKIE:.*]] = bitcast i8* %[[ALLOC]] to i64* // CHECK: store i64 %[[ELTS]], i64* %[[COOKIE]] @@ -64,22 +64,22 @@ // CHECK: %[[S_0:.*]] = bitcast %[[S]]* %[[START_AS_S]] to [3 x %[[S]]]* // // CHECK: %[[S_0_0:.*]] = getelementptr inbounds [3 x %[[S]]], [3 x %[[S]]]* %[[S_0]], i64 0, i64 0 -// CHECK: call void @_ZN1SC1Ei(%[[S]]* %[[S_0_0]], i32 1) +// CHECK: call void @_ZN1SC1Ei(%[[S]]* frozen %[[S_0_0]], i32 frozen 1) // CHECK: %[[S_0_1:.*]] = getelementptr inbounds %[[S]], %[[S]]* %[[S_0_0]], i64 1 -// CHECK: call void @_ZN1SC1Ei(%[[S]]* %[[S_0_1]], i32 2) +// CHECK: call void @_ZN1SC1Ei(%[[S]]* frozen %[[S_0_1]], i32 frozen 2) // CHECK: %[[S_0_2:.*]] = getelementptr inbounds %[[S]], %[[S]]* %[[S_0_1]], i64 1 -// CHECK: call void @_ZN1SC1Ei(%[[S]]* %[[S_0_2]], i32 3) +// CHECK: call void @_ZN1SC1Ei(%[[S]]* frozen %[[S_0_2]], i32 frozen 3) // // { 4, 5, 6 } // // CHECK: %[[S_1:.*]] = getelementptr inbounds [3 x %[[S]]], [3 x %[[S]]]* %[[S_0]], i64 1 // // CHECK: %[[S_1_0:.*]] = getelementptr inbounds [3 x %[[S]]], [3 x %[[S]]]* %[[S_1]], i64 0, i64 0 -// CHECK: call void @_ZN1SC1Ei(%[[S]]* %[[S_1_0]], i32 4) +// CHECK: call void @_ZN1SC1Ei(%[[S]]* frozen %[[S_1_0]], i32 frozen 4) // CHECK: %[[S_1_1:.*]] = getelementptr inbounds %[[S]], %[[S]]* %[[S_1_0]], i64 1 -// CHECK: call void @_ZN1SC1Ei(%[[S]]* %[[S_1_1]], i32 5) +// CHECK: call void @_ZN1SC1Ei(%[[S]]* frozen %[[S_1_1]], i32 frozen 5) // CHECK: %[[S_1_2:.*]] = getelementptr inbounds %[[S]], %[[S]]* %[[S_1_1]], i64 1 -// CHECK: call void @_ZN1SC1Ei(%[[S]]* %[[S_1_2]], i32 6) +// CHECK: call void @_ZN1SC1Ei(%[[S]]* frozen %[[S_1_2]], i32 frozen 6) // // And the rest. // @@ -94,7 +94,7 @@ // CHECK: br label // // CHECK: %[[CUR:.*]] = phi %[[S]]* [ %[[S_2_AS_S]], {{.*}} ], [ %[[NEXT:.*]], {{.*}} ] -// CHECK: call void @_ZN1SC1Ev(%[[S]]* %[[CUR]]) +// CHECK: call void @_ZN1SC1Ev(%[[S]]* frozen %[[CUR]]) // CHECK: %[[NEXT]] = getelementptr inbounds %[[S]], %[[S]]* %[[CUR]], i64 1 // CHECK: icmp eq %[[S]]* %[[NEXT]], %[[END]] // CHECK: br i1 @@ -113,7 +113,7 @@ // No cookie. // CHECK-NOT: @llvm.uadd.with.overflow // -// CHECK: %[[ALLOC:.*]] = call noalias nonnull i8* @_Znam(i64 %{{.*}}) +// CHECK: %[[ALLOC:.*]] = call frozen noalias nonnull i8* @_Znam(i64 frozen %{{.*}}) // // CHECK: %[[START_AS_T:.*]] = bitcast i8* %[[ALLOC]] to %[[T:.*]]* // diff --git a/clang/test/CodeGenCXX/cxx11-thread-local-reference.cpp b/clang/test/CodeGenCXX/cxx11-thread-local-reference.cpp --- a/clang/test/CodeGenCXX/cxx11-thread-local-reference.cpp +++ b/clang/test/CodeGenCXX/cxx11-thread-local-reference.cpp @@ -13,16 +13,16 @@ int &g() { return r; } // CHECK: define {{.*}} @[[R_INIT:.*]]() -// CHECK: call nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) i32* @_Z1fv() +// CHECK: call frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) i32* @_Z1fv() // CHECK: store i32* %{{.*}}, i32** @r, align 8 -// CHECK-LABEL: define nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) i32* @_Z1gv() +// CHECK-LABEL: define frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) i32* @_Z1gv() // LINUX: call i32* @_ZTW1r() // DARWIN: call cxx_fast_tlscc i32* @_ZTW1r() // CHECK: ret i32* %{{.*}} -// LINUX: define weak_odr hidden i32* @_ZTW1r() [[ATTR0:#[0-9]+]] comdat { -// DARWIN: define cxx_fast_tlscc i32* @_ZTW1r() [[ATTR1:#[0-9]+]] { +// LINUX: define weak_odr hidden frozen i32* @_ZTW1r() [[ATTR0:#[0-9]+]] comdat { +// DARWIN: define cxx_fast_tlscc frozen i32* @_ZTW1r() [[ATTR1:#[0-9]+]] { // LINUX: call void @_ZTH1r() // DARWIN: call cxx_fast_tlscc void @_ZTH1r() // CHECK: load i32*, i32** @r, align 8 diff --git a/clang/test/CodeGenCXX/cxx11-thread-local-visibility.cpp b/clang/test/CodeGenCXX/cxx11-thread-local-visibility.cpp --- a/clang/test/CodeGenCXX/cxx11-thread-local-visibility.cpp +++ b/clang/test/CodeGenCXX/cxx11-thread-local-visibility.cpp @@ -5,13 +5,13 @@ // LINUX: @default_tls = thread_local global i32 // LINUX: @hidden_tls = hidden thread_local global i32 -// LINUX: define weak_odr hidden i32* @_ZTW11default_tls() -// LINUX: define weak_odr hidden i32* @_ZTW10hidden_tls() +// LINUX: define weak_odr hidden frozen i32* @_ZTW11default_tls() +// LINUX: define weak_odr hidden frozen i32* @_ZTW10hidden_tls() // // DARWIN: @default_tls = internal thread_local global i32 // DARWIN: @hidden_tls = internal thread_local global i32 -// DARWIN: define cxx_fast_tlscc i32* @_ZTW11default_tls() -// DARWIN: define hidden cxx_fast_tlscc i32* @_ZTW10hidden_tls() +// DARWIN: define cxx_fast_tlscc frozen i32* @_ZTW11default_tls() +// DARWIN: define hidden cxx_fast_tlscc frozen i32* @_ZTW10hidden_tls() __attribute__((visibility("default"))) thread_local int default_tls; __attribute__((visibility("hidden"))) thread_local int hidden_tls; diff --git a/clang/test/CodeGenCXX/cxx11-thread-local.cpp b/clang/test/CodeGenCXX/cxx11-thread-local.cpp --- a/clang/test/CodeGenCXX/cxx11-thread-local.cpp +++ b/clang/test/CodeGenCXX/cxx11-thread-local.cpp @@ -106,16 +106,16 @@ // Individual variable initialization functions: // CHECK: define {{.*}} @[[A_INIT:.*]]() -// CHECK: call i32 @_Z1fv() +// CHECK: call frozen i32 @_Z1fv() // CHECK-NEXT: store i32 {{.*}}, i32* @a, align 4 -// CHECK-LABEL: define i32 @_Z1fv() +// CHECK-LABEL: define frozen i32 @_Z1fv() int f() { // CHECK: %[[GUARD:.*]] = load i8, i8* @_ZGVZ1fvE1n, align 1 // CHECK: %[[NEED_INIT:.*]] = icmp eq i8 %[[GUARD]], 0 // CHECK: br i1 %[[NEED_INIT]] - // CHECK: %[[CALL:.*]] = call i32 @_Z1gv() + // CHECK: %[[CALL:.*]] = call frozen i32 @_Z1gv() // CHECK: store i32 %[[CALL]], i32* @_ZZ1fvE1n, align 4 // CHECK: store i8 1, i8* @_ZGVZ1fvE1n // CHECK: br label @@ -131,22 +131,22 @@ // CHECK-NEXT: load i32, i32* %{{.*}}, align 4 // CHECK-NEXT: store i32 %{{.*}}, i32* @c, align 4 -// LINUX-LABEL: define linkonce_odr hidden i32* @_ZTW1b() +// LINUX-LABEL: define linkonce_odr hidden frozen i32* @_ZTW1b() // LINUX: br i1 icmp ne (void ()* @_ZTH1b, void ()* null), // not null: // LINUX: call void @_ZTH1b() // LINUX: br label // finally: // LINUX: ret i32* @b -// DARWIN-LABEL: declare cxx_fast_tlscc i32* @_ZTW1b() +// DARWIN-LABEL: declare cxx_fast_tlscc frozen i32* @_ZTW1b() // There is no definition of the thread wrapper on Darwin for external TLV. // CHECK: define {{.*}} @[[D_INIT:.*]]() -// CHECK: call i32 @_Z1gv() +// CHECK: call frozen i32 @_Z1gv() // CHECK-NEXT: store i32 %{{.*}}, i32* @_ZL1d, align 4 // CHECK: define {{.*}} @[[U_M_INIT:.*]]() -// CHECK: call i32 @_Z1fv() +// CHECK: call frozen i32 @_Z1fv() // CHECK-NEXT: store i32 %{{.*}}, i32* @_ZN1U1mE, align 4 // CHECK: define {{.*}} @[[E_INIT:.*]]() @@ -157,18 +157,18 @@ // DARWIN: call cxx_fast_tlscc {{.*}}* @_ZTWN1XIiE1mE() // CHECK: store {{.*}} @e -// LINUX-LABEL: define weak_odr hidden i32* @_ZTWN1VIiE1mE() -// DARWIN-LABEL: define weak_odr hidden cxx_fast_tlscc i32* @_ZTWN1VIiE1mE() +// LINUX-LABEL: define weak_odr hidden frozen i32* @_ZTWN1VIiE1mE() +// DARWIN-LABEL: define weak_odr hidden cxx_fast_tlscc frozen i32* @_ZTWN1VIiE1mE() // LINUX: call void @_ZTHN1VIiE1mE() // DARWIN: call cxx_fast_tlscc void @_ZTHN1VIiE1mE() // CHECK: ret i32* @_ZN1VIiE1mE -// LINUX-LABEL: define weak_odr hidden i32* @_ZTWN1WIiE1mE() -// DARWIN-LABEL: define weak_odr hidden cxx_fast_tlscc i32* @_ZTWN1WIiE1mE() +// LINUX-LABEL: define weak_odr hidden frozen i32* @_ZTWN1WIiE1mE() +// DARWIN-LABEL: define weak_odr hidden cxx_fast_tlscc frozen i32* @_ZTWN1WIiE1mE() // CHECK-NOT: call // CHECK: ret i32* @_ZN1WIiE1mE -// LINUX-LABEL: define weak_odr hidden {{.*}}* @_ZTWN1XIiE1mE() +// LINUX-LABEL: define weak_odr hidden frozen {{.*}}* @_ZTWN1XIiE1mE() // DARWIN-LABEL: define weak_odr hidden cxx_fast_tlscc {{.*}}* @_ZTWN1XIiE1mE() // LINUX: call void @_ZTHN1XIiE1mE() // DARWIN: call cxx_fast_tlscc void @_ZTHN1XIiE1mE() @@ -182,7 +182,7 @@ // CHECK: %[[VF_M_INITIALIZED:.*]] = icmp eq i8 %{{.*}}, 0 // CHECK: br i1 %[[VF_M_INITIALIZED]], // need init: -// CHECK: call i32 @_Z1gv() +// CHECK: call frozen i32 @_Z1gv() // CHECK: store i32 %{{.*}}, i32* @_ZN1VIfE1mE, align 4 // CHECK: store i64 1, i64* @_ZGVN1VIfE1mE // CHECK: br label @@ -203,20 +203,20 @@ // LINUX: declare i32 @__cxa_thread_atexit(void (i8*)*, i8*, i8*) // DARWIN: declare i32 @_tlv_atexit(void (i8*)*, i8*, i8*) -// DARWIN: declare cxx_fast_tlscc i32* @_ZTWN1VIcE1mE() -// LINUX: define linkonce_odr hidden i32* @_ZTWN1VIcE1mE() {{#[0-9]+}} comdat { +// DARWIN: declare cxx_fast_tlscc frozen i32* @_ZTWN1VIcE1mE() +// LINUX: define linkonce_odr hidden frozen i32* @_ZTWN1VIcE1mE() {{#[0-9]+}} comdat // LINUX: br i1 icmp ne (void ()* @_ZTHN1VIcE1mE, // LINUX: call void @_ZTHN1VIcE1mE() // LINUX: ret i32* @_ZN1VIcE1mE -// DARWIN: declare cxx_fast_tlscc i32* @_ZTWN1WIcE1mE() -// LINUX: define linkonce_odr hidden i32* @_ZTWN1WIcE1mE() {{#[0-9]+}} comdat { +// DARWIN: declare cxx_fast_tlscc frozen i32* @_ZTWN1WIcE1mE() +// LINUX: define linkonce_odr hidden frozen i32* @_ZTWN1WIcE1mE() {{#[0-9]+}} comdat // LINUX: br i1 icmp ne (void ()* @_ZTHN1WIcE1mE, // LINUX: call void @_ZTHN1WIcE1mE() // LINUX: ret i32* @_ZN1WIcE1mE // DARWIN: declare cxx_fast_tlscc {{.*}}* @_ZTWN1XIcE1mE() -// LINUX: define linkonce_odr hidden {{.*}}* @_ZTWN1XIcE1mE() {{#[0-9]+}} comdat { +// LINUX: define linkonce_odr hidden {{.*}}* @_ZTWN1XIcE1mE() {{#[0-9]+}} comdat // LINUX: br i1 icmp ne (void ()* @_ZTHN1XIcE1mE, // LINUX: call void @_ZTHN1XIcE1mE() // LINUX: ret {{.*}}* @_ZN1XIcE1mE @@ -227,7 +227,7 @@ // CHECK-LABEL: define void @_Z8tls_dtorv() void tls_dtor() { // CHECK: load i8, i8* @_ZGVZ8tls_dtorvE1s - // CHECK: call void @_ZN1SC1Ev(%struct.S* @_ZZ8tls_dtorvE1s) + // CHECK: call void @_ZN1SC1Ev(%struct.S* frozen @_ZZ8tls_dtorvE1s) // LINUX: call i32 @__cxa_thread_atexit({{.*}}@_ZN1SD1Ev {{.*}} @_ZZ8tls_dtorvE1s{{.*}} @__dso_handle // DARWIN: call i32 @_tlv_atexit({{.*}}@_ZN1SD1Ev {{.*}} @_ZZ8tls_dtorvE1s{{.*}} @__dso_handle // CHECK: store i8 1, i8* @_ZGVZ8tls_dtorvE1s @@ -241,7 +241,7 @@ static thread_local T t; // CHECK: load i8, i8* @_ZGVZ8tls_dtorvE1u - // CHECK: call void @_ZN1SC1Ev(%struct.S* @_ZGRZ8tls_dtorvE1u_) + // CHECK: call void @_ZN1SC1Ev(%struct.S* frozen @_ZGRZ8tls_dtorvE1u_) // LINUX: call i32 @__cxa_thread_atexit({{.*}}@_ZN1SD1Ev {{.*}} @_ZGRZ8tls_dtorvE1u_{{.*}} @__dso_handle // DARWIN: call i32 @_tlv_atexit({{.*}}@_ZN1SD1Ev {{.*}} @_ZGRZ8tls_dtorvE1u_{{.*}} @__dso_handle // CHECK: store i8 1, i8* @_ZGVZ8tls_dtorvE1u @@ -272,8 +272,8 @@ void set_anon_i() { anon_i = 2; } -// LINUX-LABEL: define internal i32* @_ZTWN12_GLOBAL__N_16anon_iE() -// DARWIN-LABEL: define internal cxx_fast_tlscc i32* @_ZTWN12_GLOBAL__N_16anon_iE() +// LINUX-LABEL: define internal frozen i32* @_ZTWN12_GLOBAL__N_16anon_iE() +// DARWIN-LABEL: define internal cxx_fast_tlscc frozen i32* @_ZTWN12_GLOBAL__N_16anon_iE() // LINUX: define internal void @[[V_M_INIT]]() // DARWIN: define internal cxx_fast_tlscc void @[[V_M_INIT]]() @@ -283,7 +283,7 @@ // CHECK: %[[V_M_INITIALIZED:.*]] = icmp eq i8 %{{.*}}, 0 // CHECK: br i1 %[[V_M_INITIALIZED]], // need init: -// CHECK: call i32 @_Z1gv() +// CHECK: call frozen i32 @_Z1gv() // CHECK: store i32 %{{.*}}, i32* @_ZN1VIiE1mE, align 4 // CHECK: store i64 1, i64* @_ZGVN1VIiE1mE // CHECK: br label @@ -322,8 +322,8 @@ // CHECK-NOT: call void @[[V_M_INIT]]() -// LINUX: define weak_odr hidden i32* @_ZTW1a() -// DARWIN: define cxx_fast_tlscc i32* @_ZTW1a() +// LINUX: define weak_odr hidden frozen i32* @_ZTW1a() +// DARWIN: define cxx_fast_tlscc frozen i32* @_ZTW1a() // LINUX: call void @_ZTH1a() // DARWIN: call cxx_fast_tlscc void @_ZTH1a() // CHECK: ret i32* @a @@ -335,8 +335,8 @@ // thread-local variables in this TU. // CHECK-NOT: define {{.*}} @_ZTWL1d() -// LINUX-LABEL: define weak_odr hidden i32* @_ZTWN1U1mE() -// DARWIN-LABEL: define cxx_fast_tlscc i32* @_ZTWN1U1mE() +// LINUX-LABEL: define weak_odr hidden frozen i32* @_ZTWN1U1mE() +// DARWIN-LABEL: define cxx_fast_tlscc frozen i32* @_ZTWN1U1mE() // LINUX: call void @_ZTHN1U1mE() // DARWIN: call cxx_fast_tlscc void @_ZTHN1U1mE() // CHECK: ret i32* @_ZN1U1mE diff --git a/clang/test/CodeGenCXX/cxx11-user-defined-literal.cpp b/clang/test/CodeGenCXX/cxx11-user-defined-literal.cpp --- a/clang/test/CodeGenCXX/cxx11-user-defined-literal.cpp +++ b/clang/test/CodeGenCXX/cxx11-user-defined-literal.cpp @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -std=c++11 -triple x86_64-linux-gnu -emit-llvm %s -o - | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args -std=c++11 -triple x86_64-linux-gnu -emit-llvm %s -o - | FileCheck %s struct S { S(); ~S(); S(const S &); void operator()(int); }; using size_t = decltype(sizeof(int)); diff --git a/clang/test/CodeGenCXX/cxx1y-init-captures.cpp b/clang/test/CodeGenCXX/cxx1y-init-captures.cpp --- a/clang/test/CodeGenCXX/cxx1y-init-captures.cpp +++ b/clang/test/CodeGenCXX/cxx1y-init-captures.cpp @@ -28,9 +28,9 @@ // CHECK: store i32 1, i32* // CHECK: getelementptr inbounds {{.*}}, i32 0, i32 1 // CHECK: store i32 2, i32* -// CHECK: call i32 @"_ZZ1gvENK3$_1clEv"( +// CHECK: call frozen i32 @"_ZZ1gvENK3$_1clEv"( -// CHECK-LABEL: define internal i32 @"_ZZ1gvENK3$_1clEv"( +// CHECK-LABEL: define internal frozen i32 @"_ZZ1gvENK3$_1clEv"( // CHECK: getelementptr inbounds {{.*}}, i32 0, i32 0 // CHECK: load i32, i32* // CHECK: getelementptr inbounds {{.*}}, i32 0, i32 1 @@ -52,7 +52,7 @@ } int h(int a) { - // CHECK-LABEL: define i32 @_Z1hi( + // CHECK-LABEL: define frozen i32 @_Z1hi( // CHECK: %[[A_ADDR:.*]] = alloca i32, // CHECK: %[[OUTER:.*]] = alloca // CHECK: store i32 {{.*}}, i32* %[[A_ADDR]], @@ -66,9 +66,9 @@ // CHECK: load i32, i32* %[[A_ADDR]], // CHECK: store i32 // - // CHECK: call i32 @"_ZZ1hiENK3$_2clEv"({{.*}}* %[[OUTER]]) + // CHECK: call frozen i32 @"_ZZ1hiENK3$_2clEv"({{.*}}* frozen %[[OUTER]]) return [&b(a), c(a)] { - // CHECK-LABEL: define internal i32 @"_ZZ1hiENK3$_2clEv"( + // CHECK-LABEL: define internal frozen i32 @"_ZZ1hiENK3$_2clEv"( // CHECK: %[[OUTER_ADDR:.*]] = alloca // CHECK: %[[INNER:.*]] = alloca // CHECK: store {{.*}}, {{.*}}** %[[OUTER_ADDR]], @@ -86,12 +86,12 @@ // CHECK-NEXT: load i32, i32* % // CHECK-NEXT: store i32 // - // CHECK: call i32 @"_ZZZ1hiENK3$_2clEvENKUlvE_clEv"({{.*}}* %[[INNER]]) + // CHECK: call frozen i32 @"_ZZZ1hiENK3$_2clEvENKUlvE_clEv"({{.*}}* frozen %[[INNER]]) return [=, &c] { // CHECK-LABEL: define internal void @"_ZZ1fvEN3$_0D2Ev"( // CHECK: call void @_ZN1SD1Ev( - // CHECK-LABEL: define internal i32 @"_ZZZ1hiENK3$_2clEvENKUlvE_clEv"( + // CHECK-LABEL: define internal frozen i32 @"_ZZZ1hiENK3$_2clEvENKUlvE_clEv"( // CHECK: %[[INNER_ADDR:.*]] = alloca // CHECK: store {{.*}}, {{.*}}** %[[INNER_ADDR]], // CHECK: %[[INNER:.*]] = load {{.*}}*, {{.*}}** %[[INNER_ADDR]] diff --git a/clang/test/CodeGenCXX/cxx1y-initializer-aggregate.cpp b/clang/test/CodeGenCXX/cxx1y-initializer-aggregate.cpp --- a/clang/test/CodeGenCXX/cxx1y-initializer-aggregate.cpp +++ b/clang/test/CodeGenCXX/cxx1y-initializer-aggregate.cpp @@ -55,7 +55,7 @@ // CHECK: load i32, i32* getelementptr inbounds ({{.*}} @a, i32 0, i32 0) // CHECK: getelementptr inbounds i8, i8* %{{.*}}, {{.*}} %{{.*}} // CHECK: store i8 %{{.*}}, i8* getelementptr inbounds ({{.*}} @a, i32 0, i32 2) -// CHECK: call i32 @_ZN1A1fEv({{.*}} @a) +// CHECK: call frozen i32 @_ZN1A1fEv({{.*}} @a) // CHECK: store i32 %{{.*}}, i32* getelementptr inbounds ({{.*}}, {{.*}}* @a, i32 0, i32 3) // CHECK: store double 1.000000e+00, double* getelementptr inbounds ({{.*}} @a, i32 0, i32 4, i32 0) @@ -69,12 +69,12 @@ // CHECK: store i8* null, i8** getelementptr inbounds ({{.*}} @c, i32 0, i32 1) // CHECK-NOT: load // CHECK: store i8 65, i8* getelementptr inbounds ({{.*}} @c, i32 0, i32 2) -// CHECK: call i32 @_Z1fv() +// CHECK: call frozen i32 @_Z1fv() // CHECK: store i32 %{{.*}}, i32* getelementptr inbounds ({{.*}}, {{.*}}* @c, i32 0, i32 3) // CHECK-NOT: C1Ev // CHECK: store i8 3, i8* {{.*}} @c, i32 0, i32 4) // CHECK: call void @_ZN1BC1Ev({{.*}} @x) -// CHECK: call i32 @_ZN1B1fEv({{.*}} @y) +// CHECK: call frozen i32 @_ZN1B1fEv({{.*}} @y) // CHECK: store i32 %{{.*}}, i32* getelementptr inbounds ({{.*}} @y, i32 0, i32 0) diff --git a/clang/test/CodeGenCXX/cxx1y-sized-deallocation.cpp b/clang/test/CodeGenCXX/cxx1y-sized-deallocation.cpp --- a/clang/test/CodeGenCXX/cxx1y-sized-deallocation.cpp +++ b/clang/test/CodeGenCXX/cxx1y-sized-deallocation.cpp @@ -50,65 +50,65 @@ D::D() {} // CHECK-LABEL: define weak_odr void @_Z3delIiEvv() -// CHECK: call void @_ZdlPvm(i8* %{{[^ ]*}}, i64 4) -// CHECK: call void @_ZdaPv(i8* %{{[^ ]*}}) +// CHECK: call void @_ZdlPvm(i8* frozen %{{[^ ]*}}, i64 frozen 4) +// CHECK: call void @_ZdaPv(i8* frozen %{{[^ ]*}}) // -// CHECK: call void @_ZdlPvm(i8* %{{[^ ]*}}, i64 4) -// CHECK: call void @_ZdaPv(i8* %{{[^ ]*}}) +// CHECK: call void @_ZdlPvm(i8* frozen %{{[^ ]*}}, i64 frozen 4) +// CHECK: call void @_ZdaPv(i8* frozen %{{[^ ]*}}) -// CHECK-LABEL: declare void @_ZdlPvm(i8* +// CHECK-LABEL: declare void @_ZdlPvm(i8* frozen // CHECK-LABEL: define weak_odr void @_Z3delI1BEvv() -// CHECK: call void @_ZdlPvm(i8* %{{[^ ]*}}, i64 4) -// CHECK: call void @_ZdaPv(i8* %{{[^ ]*}}) +// CHECK: call void @_ZdlPvm(i8* frozen %{{[^ ]*}}, i64 frozen 4) +// CHECK: call void @_ZdaPv(i8* frozen %{{[^ ]*}}) // -// CHECK: call void @_ZdlPvm(i8* %{{[^ ]*}}, i64 4) -// CHECK: call void @_ZdaPv(i8* %{{[^ ]*}}) +// CHECK: call void @_ZdlPvm(i8* frozen %{{[^ ]*}}, i64 frozen 4) +// CHECK: call void @_ZdaPv(i8* frozen %{{[^ ]*}}) // CHECK-LABEL: define weak_odr void @_Z3delI1CEvv() -// CHECK: call void @_ZdlPvm(i8* %{{[^ ]*}}, i64 1) +// CHECK: call void @_ZdlPvm(i8* frozen %{{[^ ]*}}, i64 frozen 1) // CHECK: mul i64 1, %{{[^ ]*}} // CHECK: add i64 %{{[^ ]*}}, 8 -// CHECK: call void @_ZdaPvm(i8* %{{[^ ]*}}, i64 %{{[^ ]*}}) +// CHECK: call void @_ZdaPvm(i8* frozen %{{[^ ]*}}, i64 frozen %{{[^ ]*}}) // -// CHECK: call void @_ZdlPvm(i8* %{{[^ ]*}}, i64 1) +// CHECK: call void @_ZdlPvm(i8* frozen %{{[^ ]*}}, i64 frozen 1) // CHECK: mul i64 1, %{{[^ ]*}} // CHECK: add i64 %{{[^ ]*}}, 8 -// CHECK: call void @_ZdaPvm(i8* %{{[^ ]*}}, i64 %{{[^ ]*}}) +// CHECK: call void @_ZdaPvm(i8* frozen %{{[^ ]*}}, i64 frozen %{{[^ ]*}}) -// CHECK-LABEL: declare void @_ZdaPvm(i8* +// CHECK-LABEL: declare void @_ZdaPvm(i8* frozen // CHECK-LABEL: define weak_odr void @_Z3delI1DEvv() -// CHECK: call void @_ZdlPvm(i8* %{{[^ ]*}}, i64 8) +// CHECK: call void @_ZdlPvm(i8* frozen %{{[^ ]*}}, i64 frozen 8) // CHECK: mul i64 8, %{{[^ ]*}} // CHECK: add i64 %{{[^ ]*}}, 8 -// CHECK: call void @_ZdaPvm(i8* %{{[^ ]*}}, i64 %{{[^ ]*}}) +// CHECK: call void @_ZdaPvm(i8* frozen %{{[^ ]*}}, i64 frozen %{{[^ ]*}}) // // CHECK-NOT: Zdl // CHECK: call void %{{.*}} // CHECK-NOT: Zdl // CHECK: mul i64 8, %{{[^ ]*}} // CHECK: add i64 %{{[^ ]*}}, 8 -// CHECK: call void @_ZdaPvm(i8* %{{[^ ]*}}, i64 %{{[^ ]*}}) +// CHECK: call void @_ZdaPvm(i8* frozen %{{[^ ]*}}, i64 frozen %{{[^ ]*}}) // CHECK-LABEL: define weak_odr void @_Z3delI1EEvv() -// CHECK: call void @_ZdlPvm(i8* %{{[^ ]*}}, i64 1) -// CHECK: call void @_ZdaPv(i8* %{{[^ ]*}}) +// CHECK: call void @_ZdlPvm(i8* frozen %{{[^ ]*}}, i64 frozen 1) +// CHECK: call void @_ZdaPv(i8* frozen %{{[^ ]*}}) // -// CHECK: call void @_ZN1EdlEPv(i8* %{{[^ ]*}}) -// CHECK: call void @_ZN1EdaEPv(i8* %{{[^ ]*}}) +// CHECK: call void @_ZN1EdlEPv(i8* frozen %{{[^ ]*}}) +// CHECK: call void @_ZN1EdaEPv(i8* frozen %{{[^ ]*}}) // CHECK-LABEL: define weak_odr void @_Z3delI1FEvv() -// CHECK: call void @_ZdlPvm(i8* %{{[^ ]*}}, i64 1) +// CHECK: call void @_ZdlPvm(i8* frozen %{{[^ ]*}}, i64 frozen 1) // CHECK: mul i64 1, %{{[^ ]*}} // CHECK: add i64 %{{[^ ]*}}, 8 -// CHECK: call void @_ZdaPvm(i8* %{{[^ ]*}}, i64 %{{[^ ]*}}) +// CHECK: call void @_ZdaPvm(i8* frozen %{{[^ ]*}}, i64 frozen %{{[^ ]*}}) // -// CHECK: call void @_ZN1FdlEPvm(i8* %{{[^ ]*}}, i64 1) +// CHECK: call void @_ZN1FdlEPvm(i8* frozen %{{[^ ]*}}, i64 frozen 1) // CHECK: mul i64 1, %{{[^ ]*}} // CHECK: add i64 %{{[^ ]*}}, 8 -// CHECK: call void @_ZN1FdaEPvm(i8* %{{[^ ]*}}, i64 %{{[^ ]*}}) +// CHECK: call void @_ZN1FdaEPvm(i8* frozen %{{[^ ]*}}, i64 frozen %{{[^ ]*}}) -// CHECK-LABEL: define linkonce_odr void @_ZN1DD0Ev(%{{[^ ]*}}* %this) -// CHECK: call void @_ZdlPvm(i8* %{{[^ ]*}}, i64 8) +// CHECK-LABEL: define linkonce_odr void @_ZN1DD0Ev(%{{[^ ]*}}* frozen %this) +// CHECK: call void @_ZdlPvm(i8* frozen %{{[^ ]*}}, i64 frozen 8) diff --git a/clang/test/CodeGenCXX/cxx1y-variable-template-linkage.cpp b/clang/test/CodeGenCXX/cxx1y-variable-template-linkage.cpp --- a/clang/test/CodeGenCXX/cxx1y-variable-template-linkage.cpp +++ b/clang/test/CodeGenCXX/cxx1y-variable-template-linkage.cpp @@ -25,7 +25,7 @@ int mode; -// CHECK-DAG: define internal nonnull align 4 dereferenceable(4) i32* @_ZL3foov( +// CHECK-DAG: define internal frozen nonnull align 4 dereferenceable(4) i32* @_ZL3foov( static const int &foo() { struct Foo { }; @@ -59,20 +59,20 @@ #if !__has_feature(cxx_exceptions) // File A -// CHECKA-DAG: define nonnull align 4 dereferenceable(4) i32* @_Z3barv( +// CHECKA-DAG: define frozen nonnull align 4 dereferenceable(4) i32* @_Z3barv( const int &bar() { - // CHECKA-DAG: call nonnull align 4 dereferenceable(4) i32* @_ZL3foov() + // CHECKA-DAG: call frozen nonnull align 4 dereferenceable(4) i32* @_ZL3foov() return foo(); } #else // File B -// CHECKB-DAG: declare nonnull align 4 dereferenceable(4) i32* @_Z3barv( +// CHECKB-DAG: declare frozen nonnull align 4 dereferenceable(4) i32* @_Z3barv( const int &bar(); int main() { - // CHECKB-DAG: call nonnull align 4 dereferenceable(4) i32* @_Z3barv() - // CHECKB-DAG: call nonnull align 4 dereferenceable(4) i32* @_ZL3foov() + // CHECKB-DAG: call frozen nonnull align 4 dereferenceable(4) i32* @_Z3barv() + // CHECKB-DAG: call frozen nonnull align 4 dereferenceable(4) i32* @_ZL3foov() &bar() == &foo() ? throw 0 : (void)0; // Should not throw exception at runtime. } diff --git a/clang/test/CodeGenCXX/cxx1y-variable-template.cpp b/clang/test/CodeGenCXX/cxx1y-variable-template.cpp --- a/clang/test/CodeGenCXX/cxx1y-variable-template.cpp +++ b/clang/test/CodeGenCXX/cxx1y-variable-template.cpp @@ -40,7 +40,7 @@ // CHECK: load {{.*}} @_ZGVN7PR4211112_GLOBAL__N_11nILi0EEE // CHECK: icmp eq i8 {{.*}}, 0 // CHECK: br i1 - // CHECK: call i32 @_ZN7PR421111fEv( + // CHECK: call frozen i32 @_ZN7PR421111fEv( // CHECK: store i32 {{.*}}, i32* @_ZN7PR4211112_GLOBAL__N_11nILi0EEE // CHECK: store i8 1, i8* @_ZGVN7PR4211112_GLOBAL__N_11nILi0EEE int g() { return n<> + n<>; } diff --git a/clang/test/CodeGenCXX/cxx1z-aligned-allocation.cpp b/clang/test/CodeGenCXX/cxx1z-aligned-allocation.cpp --- a/clang/test/CodeGenCXX/cxx1z-aligned-allocation.cpp +++ b/clang/test/CodeGenCXX/cxx1z-aligned-allocation.cpp @@ -1,14 +1,14 @@ // Check that delete exprs call aligned (de)allocation functions if // -faligned-allocation is passed in both C++11 and C++14. -// RUN: %clang_cc1 -std=c++11 -fexceptions -fsized-deallocation -faligned-allocation %s -emit-llvm -triple x86_64-linux-gnu -o - | FileCheck %s -// RUN: %clang_cc1 -std=c++14 -fexceptions -fsized-deallocation -faligned-allocation %s -emit-llvm -triple x86_64-linux-gnu -o - | FileCheck %s -// RUN: %clang_cc1 -std=c++1z -fexceptions -fsized-deallocation %s -emit-llvm -triple x86_64-linux-gnu -o - | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args -std=c++11 -fexceptions -fsized-deallocation -faligned-allocation %s -emit-llvm -triple x86_64-linux-gnu -o - | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args -std=c++14 -fexceptions -fsized-deallocation -faligned-allocation %s -emit-llvm -triple x86_64-linux-gnu -o - | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args -std=c++1z -fexceptions -fsized-deallocation %s -emit-llvm -triple x86_64-linux-gnu -o - | FileCheck %s -// RUN: %clang_cc1 -std=c++1z -fexceptions -fsized-deallocation %s -emit-llvm -triple x86_64-windows-msvc -o - | FileCheck %s --check-prefix=CHECK-MS +// RUN: %clang_cc1 -disable-frozen-args -std=c++1z -fexceptions -fsized-deallocation %s -emit-llvm -triple x86_64-windows-msvc -o - | FileCheck %s --check-prefix=CHECK-MS // Check that we don't used aligned (de)allocation without -faligned-allocation or C++1z. -// RUN: %clang_cc1 -std=c++14 -DUNALIGNED -fexceptions %s -emit-llvm -triple x86_64-linux-gnu -o - | FileCheck %s --check-prefix=CHECK-UNALIGNED -// RUN: %clang_cc1 -std=c++1z -DUNALIGNED -fexceptions -fno-aligned-allocation %s -emit-llvm -triple x86_64-linux-gnu -o - | FileCheck %s --check-prefix=CHECK-UNALIGNED +// RUN: %clang_cc1 -disable-frozen-args -std=c++14 -DUNALIGNED -fexceptions %s -emit-llvm -triple x86_64-linux-gnu -o - | FileCheck %s --check-prefix=CHECK-UNALIGNED +// RUN: %clang_cc1 -disable-frozen-args -std=c++1z -DUNALIGNED -fexceptions -fno-aligned-allocation %s -emit-llvm -triple x86_64-linux-gnu -o - | FileCheck %s --check-prefix=CHECK-UNALIGNED // CHECK-UNALIGNED-NOT: _Znwm_St11align_val_t // CHECK-UNALIGNED-NOT: _Znam_St11align_val_t @@ -27,28 +27,28 @@ struct OVERALIGNED A { A(); int n[128]; }; // CHECK-LABEL: define {{.*}} @_Z2a0v() -// CHECK: %[[ALLOC:.*]] = call noalias nonnull align 32 i8* @_ZnwmSt11align_val_t(i64 512, i64 32) +// CHECK: %[[ALLOC:.*]] = call frozen noalias nonnull align 32 i8* @_ZnwmSt11align_val_t(i64 512, i64 32) // CHECK: call void @_ZdlPvSt11align_val_t(i8* %[[ALLOC]], i64 32) // CHECK-MS-LABEL: define {{.*}} @"?a0@@YAPEAXXZ"() -// CHECK-MS: %[[ALLOC:.*]] = call noalias nonnull align 32 i8* @"??2@YAPEAX_KW4align_val_t@std@@@Z"(i64 512, i64 32) +// CHECK-MS: %[[ALLOC:.*]] = call frozen noalias nonnull align 32 i8* @"??2@YAPEAX_KW4align_val_t@std@@@Z"(i64 512, i64 32) // CHECK-MS: cleanuppad // CHECK-MS: call void @"??3@YAXPEAXW4align_val_t@std@@@Z"(i8* %[[ALLOC]], i64 32) void *a0() { return new A; } -// FIXME: Why don't we call the sized array deallocation overload in this case? +// FIXME: Why don't we call the sized array deallocation overload in this case? // The size is known. // // CHECK-LABEL: define {{.*}} @_Z2a1l( -// CHECK: %[[ALLOC:.*]] = call noalias nonnull align 32 i8* @_ZnamSt11align_val_t(i64 %{{.*}}, i64 32) +// CHECK: %[[ALLOC:.*]] = call frozen noalias nonnull align 32 i8* @_ZnamSt11align_val_t(i64 %{{.*}}, i64 32) // No array cookie. // CHECK-NOT: store // CHECK: invoke void @_ZN1AC1Ev( // CHECK: call void @_ZdaPvSt11align_val_t(i8* %[[ALLOC]], i64 32) // CHECK-MS-LABEL: define {{.*}} @"?a1@@YAPEAXJ@Z"( -// CHECK-MS: %[[ALLOC:.*]] = call noalias nonnull align 32 i8* @"??_U@YAPEAX_KW4align_val_t@std@@@Z"(i64 %{{.*}}, i64 32) +// CHECK-MS: %[[ALLOC:.*]] = call frozen noalias nonnull align 32 i8* @"??_U@YAPEAX_KW4align_val_t@std@@@Z"(i64 %{{.*}}, i64 32) // No array cookie. // CHECK-MS-NOT: store -// CHECK-MS: invoke %struct.A* @"??0A@@QEAA@XZ"( +// CHECK-MS: invoke frozen %struct.A* @"??0A@@QEAA@XZ"( // CHECK-MS: cleanuppad // CHECK-MS: call void @"??_V@YAXPEAXW4align_val_t@std@@@Z"(i8* %[[ALLOC]], i64 32) void *a1(long n) { return new A[n]; } @@ -79,12 +79,12 @@ }; // CHECK-LABEL: define {{.*}} @_Z2b0v() -// CHECK: %[[ALLOC:.*]] = call i8* @_ZN1BnwEmSt11align_val_t(i64 512, i64 32) +// CHECK: %[[ALLOC:.*]] = call frozen i8* @_ZN1BnwEmSt11align_val_t(i64 512, i64 32) // CHECK: call void @_ZN1BdlEPvSt11align_val_t(i8* %[[ALLOC]], i64 32) void *b0() { return new B; } // CHECK-LABEL: define {{.*}} @_Z2b1l( -// CHECK: %[[ALLOC:.*]] = call noalias nonnull align 32 i8* @_ZnamSt11align_val_t(i64 %{{.*}}, i64 32) +// CHECK: %[[ALLOC:.*]] = call frozen noalias nonnull align 32 i8* @_ZnamSt11align_val_t(i64 %{{.*}}, i64 32) // No array cookie. // CHECK-NOT: store // CHECK: invoke void @_ZN1BC1Ev( @@ -113,7 +113,7 @@ // CHECK-LABEL: define {{.*}} @_Z2b4l( // CHECK: call {{.*}} @llvm.umul.with.overflow{{.*}}i64 32 // CHECK: call {{.*}} @llvm.uadd.with.overflow{{.*}}i64 32 -// CHECK: %[[ALLOC:.*]] = call i8* @_ZN1CnaEmSt11align_val_t(i64 %{{.*}}, i64 32) +// CHECK: %[[ALLOC:.*]] = call frozen i8* @_ZN1CnaEmSt11align_val_t(i64 %{{.*}}, i64 32) // CHECK: store // CHECK: call void @_ZN1CC1Ev( // @@ -142,7 +142,7 @@ void operator delete(void*, std::align_val_t, Q); // CHECK-LABEL: define {{.*}} @_Z2c0v( -// CHECK: %[[ALLOC:.*]] = call i8* @_ZnwmSt11align_val_t1Q(i64 512, i64 32, i32 % +// CHECK: %[[ALLOC:.*]] = call frozen i8* @_ZnwmSt11align_val_t1Q(i64 512, i64 32, i32 % // CHECK: call void @_ZdlPvSt11align_val_t1Q(i8* %[[ALLOC]], i64 32, i32 % void *c0() { return new (q) A; } @@ -159,7 +159,7 @@ }; // CHECK-LABEL: define {{.*}} @_Z2d0v( -// CHECK: %[[ALLOC:.*]] = call i8* @_ZN1DnwEmSt11align_val_t1Q(i64 32, i64 32, i32 % +// CHECK: %[[ALLOC:.*]] = call frozen i8* @_ZN1DnwEmSt11align_val_t1Q(i64 32, i64 32, i32 % // CHECK: call void @_ZN1DdlEPvSt11align_val_t1Q(i8* %[[ALLOC]], i64 32, i32 % void *d0() { return new (q) D; } @@ -169,12 +169,12 @@ #ifndef UNALIGNED // CHECK-LABEL: define {{.*}} @_Z2e0v( -// CHECK: %[[ALLOC:.*]] = call noalias nonnull align 4 i8* @_ZnwmSt11align_val_t(i64 512, i64 4) +// CHECK: %[[ALLOC:.*]] = call frozen noalias nonnull align 4 i8* @_ZnwmSt11align_val_t(i64 512, i64 4) // CHECK: call void @_ZdlPvSt11align_val_t(i8* %[[ALLOC]], i64 4) void *e0() { return new (std::align_val_t(4)) A; } // CHECK-LABEL: define {{.*}} @_Z2e1v( -// CHECK: %[[ALLOC:.*]] = call i8* @_ZN1BnwEmSt11align_val_t(i64 512, i64 4) +// CHECK: %[[ALLOC:.*]] = call frozen i8* @_ZN1BnwEmSt11align_val_t(i64 512, i64 4) // CHECK: call void @_ZN1BdlEPvSt11align_val_t(i8* %[[ALLOC]], i64 4) void *e1() { return new (std::align_val_t(4)) B; } #endif @@ -190,14 +190,14 @@ }; // CHECK-LABEL: define {{.*}} @_Z2f0v( -// CHECK: %[[ALLOC:.*]] = call i8* (i64, ...) @_ZN1FnwEmz(i64 512, i64 32) +// CHECK: %[[ALLOC:.*]] = call frozen i8* (i64, ...) @_ZN1FnwEmz(i64 512, i64 32) // Non-placement allocation function, uses normal deallocation lookup which // cares about whether a parameter has type std::align_val_t. // CHECK: call void (i8*, ...) @_ZN1FdlEPvz(i8* %[[ALLOC]]) void *f0() { return new F; } // CHECK-LABEL: define {{.*}} @_Z2f1v( -// CHECK: %[[ALLOC:.*]] = call i8* (i64, ...) @_ZN1FnwEmz(i64 512, i64 32, i32 % +// CHECK: %[[ALLOC:.*]] = call frozen i8* (i64, ...) @_ZN1FnwEmz(i64 512, i64 32, i32 % // Placement allocation function, uses placement deallocation matching, which // passes same arguments and therefore includes alignment. // CHECK: call void (i8*, ...) @_ZN1FdlEPvz(i8* %[[ALLOC]], i64 32, i32 % @@ -211,12 +211,12 @@ }; #ifndef UNALIGNED // CHECK-LABEL: define {{.*}} @_Z2g0v -// CHECK: %[[ALLOC:.*]] = call i8* (i64, i64, ...) @_ZN1GnwEmSt11align_val_tz(i64 512, i64 32) +// CHECK: %[[ALLOC:.*]] = call frozen i8* (i64, i64, ...) @_ZN1GnwEmSt11align_val_tz(i64 512, i64 32) // CHECK: call void (i8*, i64, ...) @_ZN1GdlEPvSt11align_val_tz(i8* %[[ALLOC]], i64 32) void *g0() { return new G; } // CHECK-LABEL: define {{.*}} @_Z2g1v -// CHECK: %[[ALLOC:.*]] = call i8* (i64, i64, ...) @_ZN1GnwEmSt11align_val_tz(i64 512, i64 32, i32 % +// CHECK: %[[ALLOC:.*]] = call frozen i8* (i64, i64, ...) @_ZN1GnwEmSt11align_val_tz(i64 512, i64 32, i32 % // CHECK: call void (i8*, i64, ...) @_ZN1GdlEPvSt11align_val_tz(i8* %[[ALLOC]], i64 32, i32 % void *g1() { return new (q) G; } #endif diff --git a/clang/test/CodeGenCXX/cxx1z-copy-omission.cpp b/clang/test/CodeGenCXX/cxx1z-copy-omission.cpp --- a/clang/test/CodeGenCXX/cxx1z-copy-omission.cpp +++ b/clang/test/CodeGenCXX/cxx1z-copy-omission.cpp @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -std=c++1z -emit-llvm -triple x86_64-linux-gnu -o - %s | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args -std=c++1z -emit-llvm -triple x86_64-linux-gnu -o - %s | FileCheck %s struct A { A(int); @@ -88,7 +88,7 @@ // CHECK: %[[OUTERTEMP:.*]] = alloca %{{.*}} // CHECK: %[[INNERTEMP:.*]] = alloca %{{.*}} // CHECK: call void @_ZN1AC1Ei(%{{.*}} %[[INNERTEMP]], i32 1) - // CHECK: call zeroext i1 @_ZN1AcvbEv(%{{.*}} %[[INNERTEMP]]) + // CHECK: call frozen zeroext i1 @_ZN1AcvbEv(%{{.*}} %[[INNERTEMP]]) // CHECK: br i1 // // CHECK: call void @_ZN1AC1EOS_(%{{.*}} %[[OUTERTEMP]], %{{.*}} %[[INNERTEMP]]) diff --git a/clang/test/CodeGenCXX/cxx1z-decomposition.cpp b/clang/test/CodeGenCXX/cxx1z-decomposition.cpp --- a/clang/test/CodeGenCXX/cxx1z-decomposition.cpp +++ b/clang/test/CodeGenCXX/cxx1z-decomposition.cpp @@ -50,11 +50,11 @@ // CHECK: @_Z4makeI1BERT_v() // CHECK: call i32 @_Z3getILi0EEDa1B() -// CHECK: call void @_ZN1XC1E1Y({{.*}}* @_ZGR2b1_, i32 +// CHECK: call void @_ZN1XC1E1Y({{.*}}* frozen @_ZGR2b1_, i32 // CHECK: call i32 @__cxa_atexit({{.*}}@_ZN1XD1Ev{{.*}}@_ZGR2b1_ // CHECK: store {{.*}}* @_ZGR2b1_, // -// CHECK: call double @_Z3getILi1EEDa1B() +// CHECK: call frozen double @_Z3getILi1EEDa1B() // CHECK: fptosi double %{{.*}} to i32 // CHECK: store i32 %{{.*}}, i32* @_ZGR2b2_ // CHECK: store i32* @_ZGR2b2_, i32** @b2 @@ -69,7 +69,7 @@ // CHECK: store i32 %{{.*}}, i32* getelementptr inbounds ({ i32, i32 }, { i32, i32 }* @_ZDC2e12e2E, i32 0, i32 0) // CHECK: store i32 %{{.*}}, i32* getelementptr inbounds ({ i32, i32 }, { i32, i32 }* @_ZDC2e12e2E, i32 0, i32 1) -// CHECK: define i32 @_Z12test_globalsv() +// CHECK: define frozen i32 @_Z12test_globalsv() int test_globals() { return a2 + b2 + c2 + d2 + e2; // CHECK: load i8, i8* getelementptr inbounds (%struct.A, %struct.A* @_ZDC2a12a2E, i32 0, i32 1) @@ -87,15 +87,15 @@ // CHECK: load i32, i32* getelementptr inbounds ({ i32, i32 }, { i32, i32 }* @_ZDC2e12e2E, i32 0, i32 1) } -// CHECK: define i32 @_Z11test_localsv() +// CHECK: define frozen i32 @_Z11test_localsv() int test_locals() { auto [b1, b2] = make(); // CHECK: @_Z4makeI1BERT_v() // CHECK: call i32 @_Z3getILi0EEDa1B() - // CHECK: call void @_ZN1XC1E1Y({{.*}}* %[[b1:.*]], i32 + // CHECK: call void @_ZN1XC1E1Y({{.*}}* frozen %[[b1:.*]], i32 // - // CHECK: call double @_Z3getILi1EEDa1B() + // CHECK: call frozen double @_Z3getILi1EEDa1B() // CHECK: %[[cvt:.*]] = fptosi double %{{.*}} to i32 // CHECK: store i32 %[[cvt]], i32* %[[b2:.*]], // CHECK: store i32* %[[b2]], i32** %[[b2ref:.*]], @@ -149,7 +149,7 @@ // CHECK: br i1 // CHECK: @__cxa_guard_acquire({{.*}} @_ZGVZ17test_static_tuplevE2x1) // CHECK: call {{.*}} @_Z3getILi0EEDa1B( - // CHECK: call {{.*}} @_ZN1XC1E1Y({{.*}} @_ZGRZ17test_static_tuplevE2x1_, + // CHECK: call {{.*}} @_ZN1XC1E1Y({{.*}} @_ZGRZ17test_static_tuplevE2x1_ // CHECK: call {{.*}} @__cxa_atexit({{.*}} @_ZN1XD1Ev {{.*}} @_ZGRZ17test_static_tuplevE2x1_ // CHECK: store {{.*}} @_ZGRZ17test_static_tuplevE2x1_, {{.*}} @_ZZ17test_static_tuplevE2x1 // CHECK: call void @__cxa_guard_release({{.*}} @_ZGVZ17test_static_tuplevE2x1) diff --git a/clang/test/CodeGenCXX/cxx1z-init-statement.cpp b/clang/test/CodeGenCXX/cxx1z-init-statement.cpp --- a/clang/test/CodeGenCXX/cxx1z-init-statement.cpp +++ b/clang/test/CodeGenCXX/cxx1z-init-statement.cpp @@ -22,7 +22,7 @@ int f2() { // CHECK: %[[A:.*]] = alloca i32, align 4 - // CHECK-NEXT: %[[B:.*]] = call i32 @_Z2f2v() + // CHECK-NEXT: %[[B:.*]] = call frozen i32 @_Z2f2v() // CHECK-NEXT: store i32 7, i32* %[[A]], align 4 // CHECK-NEXT: %[[C:.*]] = load i32, i32* %[[A]], align 4 // CHECK-NEXT: %[[D:.*]] = icmp ne i32 %[[C]], 0 @@ -58,7 +58,7 @@ int g2() { // CHECK: %[[A:.*]] = alloca i32, align 4 - // CHECK-NEXT: %[[B:.*]] = call i32 @_Z2f2v() + // CHECK-NEXT: %[[B:.*]] = call frozen i32 @_Z2f2v() // CHECK-NEXT: store i32 7, i32* %[[A]], align 4 // CHECK-NEXT: %[[C:.*]] = load i32, i32* %[[A]], align 4 // CHECK-NEXT: switch i32 %[[C]], label %[[E:.*]] [ diff --git a/clang/test/CodeGenCXX/cxx1z-initializer-aggregate.cpp b/clang/test/CodeGenCXX/cxx1z-initializer-aggregate.cpp --- a/clang/test/CodeGenCXX/cxx1z-initializer-aggregate.cpp +++ b/clang/test/CodeGenCXX/cxx1z-initializer-aggregate.cpp @@ -65,9 +65,9 @@ // CHECK-LABEL: define {{.*}}global_var_init // CHECK: call void @_ZN7Dynamic1AC2Ev({{.*}} @_ZN7Dynamic2d1E // CHECK: store i32 5, {{.*}}i8* getelementptr inbounds {{.*}} @_ZN7Dynamic2d1E{{.*}}, i64 8 - // CHECK: invoke void @_ZN7Dynamic1CC2Eb({{.*}} @_ZN7Dynamic2d1E{{.*}}, i1 zeroext true) + // CHECK: invoke void @_ZN7Dynamic1CC2Eb({{.*}} @_ZN7Dynamic2d1E{{.*}}, i1 frozen zeroext true) // CHECK: unwind label %[[UNWIND:.*]] - // CHECK: invoke i32 @_ZN7Dynamic1fEv() + // CHECK: invoke frozen i32 @_ZN7Dynamic1fEv() // CHECK: unwind label %[[UNWIND:.*]] // CHECK: store i32 {{.*}}, i32* getelementptr {{.*}} @_ZN7Dynamic2d1E, i32 0, i32 2 // CHECK: call {{.*}} @__cxa_atexit({{.*}} @_ZN7Dynamic1DD1Ev {{.*}} @_ZN7Dynamic2d1E @@ -79,24 +79,24 @@ D d2 = {1, 2, false}; // CHECK-LABEL: define {{.*}}global_var_init - // CHECK: call void @_ZN7Dynamic1AC1Ei({{.*}} @_ZN7Dynamic2d2E{{.*}}, i32 1) + // CHECK: call void @_ZN7Dynamic1AC1Ei({{.*}} @_ZN7Dynamic2d2E{{.*}}, i32 frozen 1) // CHECK: store i32 2, {{.*}}i8* getelementptr inbounds {{.*}}@_ZN7Dynamic2d2E{{.*}}, i64 8 - // CHECK: invoke void @_ZN7Dynamic1CC1Eb({{.*}} @_ZN7Dynamic2d2E{{.*}}, i1 zeroext false) - // CHECK: invoke i32 @_ZN7Dynamic1fEv() + // CHECK: invoke void @_ZN7Dynamic1CC1Eb({{.*}} @_ZN7Dynamic2d2E{{.*}}, i1 frozen zeroext false) + // CHECK: invoke frozen i32 @_ZN7Dynamic1fEv() // CHECK: store i32 {{.*}}, i32* getelementptr {{.*}} @_ZN7Dynamic2d2E, i32 0, i32 2 // CHECK: call {{.*}} @__cxa_atexit({{.*}} @_ZN7Dynamic1DD1Ev {{.*}} @_ZN7Dynamic2d2E // CHECK: ret void D d3 = {g(), h(), {}, i()}; // CHECK-LABEL: define {{.*}}global_var_init - // CHECK: %[[G_CALL:.*]] = call i32 @_ZN7Dynamic1gEv() - // CHECK: call void @_ZN7Dynamic1AC1Ei({{.*}} @_ZN7Dynamic2d3E{{.*}}, i32 %[[G_CALL]]) - // CHECK: %[[H_CALL:.*]] = invoke i32 @_ZN7Dynamic1hEv() + // CHECK: %[[G_CALL:.*]] = call frozen i32 @_ZN7Dynamic1gEv() + // CHECK: call void @_ZN7Dynamic1AC1Ei({{.*}} @_ZN7Dynamic2d3E{{.*}}, i32 frozen %[[G_CALL]]) + // CHECK: %[[H_CALL:.*]] = invoke frozen i32 @_ZN7Dynamic1hEv() // CHECK: unwind label %[[DESTROY_A_LPAD:.*]] // CHECK: store i32 %[[H_CALL]], {{.*}}i8* getelementptr inbounds {{.*}} @_ZN7Dynamic2d3E{{.*}}, i64 8 - // CHECK: invoke void @_ZN7Dynamic1CC2Eb({{.*}} @_ZN7Dynamic2d3E{{.*}}, i1 zeroext true) + // CHECK: invoke void @_ZN7Dynamic1CC2Eb({{.*}} @_ZN7Dynamic2d3E{{.*}}, i1 frozen zeroext true) // CHECK: unwind label %[[DESTROY_AB_LPAD:.*]] - // CHECK: %[[I_CALL:.*]] = invoke i32 @_ZN7Dynamic1iEv() + // CHECK: %[[I_CALL:.*]] = invoke frozen i32 @_ZN7Dynamic1iEv() // CHECK: unwind label %[[DESTROY_AB_LPAD:.*]] // CHECK: store i32 %[[I_CALL]], i32* getelementptr {{.*}} @_ZN7Dynamic2d3E, i32 0, i32 2 // CHECK: call {{.*}} @__cxa_atexit({{.*}} @_ZN7Dynamic1DD1Ev {{.*}} @_ZN7Dynamic2d3E to i8* @@ -118,8 +118,8 @@ struct B : A { using A::A; }; template B v({}); template B v<0>; - // CHECK-LABEL: define {{.*}}global_var_init{{.*}} comdat($_ZN13Instantiated11vILi0EEE) { - // CHECK: call void @_ZN13Instantiated11BC1Ev(%{{.*}}* @_ZN13Instantiated11vILi0EEE) + // CHECK-LABEL: define {{.*}}global_var_init{{.*}} comdat($_ZN13Instantiated11vILi0EEE) + // CHECK: call void @_ZN13Instantiated11BC1Ev(%{{.*}}* frozen @_ZN13Instantiated11vILi0EEE) } namespace Instantiated2 { @@ -127,6 +127,6 @@ struct B : A {}; template B v({}); template B v<0>; - // CHECK-LABEL: define {{.*}}global_var_init{{.*}} comdat($_ZN13Instantiated21vILi0EEE) { + // CHECK-LABEL: define {{.*}}global_var_init{{.*}} comdat($_ZN13Instantiated21vILi0EEE) // CHECK: call void @_ZN13Instantiated21AC2Ev( } diff --git a/clang/test/CodeGenCXX/cxx1z-inline-variables.cpp b/clang/test/CodeGenCXX/cxx1z-inline-variables.cpp --- a/clang/test/CodeGenCXX/cxx1z-inline-variables.cpp +++ b/clang/test/CodeGenCXX/cxx1z-inline-variables.cpp @@ -88,7 +88,7 @@ // CHECK-NOT: @_ZN1YIiE1cE // CHECK-LABEL: define {{.*}}global_var_init -// CHECK: call i32 @_Z1fv +// CHECK: call frozen i32 @_Z1fv // CHECK-LABEL: define {{.*}}global_var_init // CHECK-NOT: comdat @@ -97,11 +97,11 @@ // CHECK: br // CHECK: __cxa_guard_acquire(i64* @_ZGV1b) // CHECK: br -// CHECK: call i32 @_Z1fv +// CHECK: call frozen i32 @_Z1fv // CHECK: __cxa_guard_release(i64* @_ZGV1b) // CHECK-LABEL: define {{.*}}global_var_init -// CHECK: call i32 @_Z1fv +// CHECK: call frozen i32 @_Z1fv template inline int d = f(); int e = d; @@ -109,7 +109,7 @@ // CHECK-LABEL: define {{.*}}global_var_init{{.*}}comdat // CHECK: _ZGV1dIiE // CHECK-NOT: __cxa_guard_acquire(i64* @_ZGV1b) -// CHECK: call i32 @_Z1fv +// CHECK: call frozen i32 @_Z1fv // CHECK-NOT: __cxa_guard_release(i64* @_ZGV1b) namespace PR35599 { diff --git a/clang/test/CodeGenCXX/cxx1z-lambda-star-this.cpp b/clang/test/CodeGenCXX/cxx1z-lambda-star-this.cpp --- a/clang/test/CodeGenCXX/cxx1z-lambda-star-this.cpp +++ b/clang/test/CodeGenCXX/cxx1z-lambda-star-this.cpp @@ -10,7 +10,7 @@ int X = A{}.foo()(); } //end ns1 -//CHECK: @"?foo@A@@QAE?A?@@XZ"(%struct.A* %this, %class.anon* noalias sret align 8 %[[A_LAMBDA_RETVAL:.*]]) +//CHECK: @"?foo@A@@QAE?A?@@XZ"(%struct.A* frozen %this, %class.anon* noalias sret align 8 %[[A_LAMBDA_RETVAL:.*]]) // get the first object with the closure type, which is of type 'struct.A' //CHECK: %[[I0:.+]] = getelementptr inbounds %[[A_LAMBDA]], %[[A_LAMBDA]]* %[[A_LAMBDA_RETVAL]], i32 0, i32 0 //CHECK: %[[I1:.+]] = bitcast %struct.A* %[[I0]] to i8* @@ -26,6 +26,6 @@ namespace ns2 { int X = B{}.bar()(); } -//CHECK: @"?bar@B@@QAE?A?@@XZ"(%struct.B* %this, %class.anon.0* noalias sret align 4 %agg.result) +//CHECK: @"?bar@B@@QAE?A?@@XZ"(%struct.B* frozen %this, %class.anon.0* noalias sret align 4 %agg.result) //CHECK: %[[I20:.+]] = getelementptr inbounds %class.anon.0, %class.anon.0* %agg.result, i32 0, i32 0 //CHECK: store %struct.B* %this1, %struct.B** %[[I20]], align 4 diff --git a/clang/test/CodeGenCXX/cxx2a-destroying-delete.cpp b/clang/test/CodeGenCXX/cxx2a-destroying-delete.cpp --- a/clang/test/CodeGenCXX/cxx2a-destroying-delete.cpp +++ b/clang/test/CodeGenCXX/cxx2a-destroying-delete.cpp @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -std=c++2a -emit-llvm %s -triple x86_64-linux-gnu -o - | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-ITANIUM -// RUN: %clang_cc1 -std=c++2a -emit-llvm %s -triple x86_64-windows -o - | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-MSABI +// RUN: %clang_cc1 -disable-frozen-args -std=c++2a -emit-llvm %s -triple x86_64-linux-gnu -o - | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-ITANIUM +// RUN: %clang_cc1 -disable-frozen-args -std=c++2a -emit-llvm %s -triple x86_64-windows -o - | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-MSABI namespace std { using size_t = decltype(sizeof(0)); @@ -39,7 +39,7 @@ // CHECK-NOT: call // CHECK: %[[VTABLE:.*]] = load // CHECK: %[[DTOR:.*]] = load -// CHECK: call {{void|i8\*}} %[[DTOR]](%{{.*}}* %[[b]] +// CHECK: call {{void|frozen i8\*}} %[[DTOR]](%{{.*}}* %[[b]] // CHECK-MSABI-SAME: , i32 1) // CHECK-NOT: call // CHECK: } @@ -87,7 +87,7 @@ // CHECK: %[[VTABLE:.*]] = load // CHECK: %[[DTOR:.*]] = load // -// CHECK: call {{void|i8\*}} %[[DTOR]](%{{.*}}* %[[d]] +// CHECK: call {{void|frozen i8\*}} %[[DTOR]](%{{.*}}* %[[d]] // CHECK-MSABI-SAME: , i32 1) // CHECK-NOT: call // CHECK: } @@ -117,14 +117,14 @@ // CHECK-ITANIUM: } // CHECK-MSABI: define {{.*}} @"??_GH@@UEAAPEAXI@Z"( -// CHECK-MSABI-NOT: call{{ }} +// CHECK-MSABI-NOT: call frozen{{ }} // CHECK-MSABI: load i32 // CHECK-MSABI: icmp eq i32 {{.*}}, 0 // CHECK-MSABI: br i1 // -// CHECK-MSABI-NOT: call{{ }} +// CHECK-MSABI-NOT: call frozen{{ }} // CHECK-MSABI: getelementptr {{.*}}, i64 24 -// CHECK-MSABI-NOT: call{{ }} +// CHECK-MSABI-NOT: call frozen{{ }} // CHECK-MSABI: call void @"??3F@@SAXPEAU0@Udestroying_delete_t@std@@_KW4align_val_t@2@@Z"({{.*}}, i64 48, i64 16) // CHECK-MSABI: br label %[[RETURN:.*]] // @@ -144,14 +144,14 @@ // CHECK-ITANIUM: } // CHECK-MSABI: define {{.*}} @"??_GI@@UEAAPEAXI@Z"( -// CHECK-MSABI-NOT: call{{ }} +// CHECK-MSABI-NOT: call frozen{{ }} // CHECK-MSABI: load i32 // CHECK-MSABI: icmp eq i32 {{.*}}, 0 // CHECK-MSABI: br i1 // -// CHECK-MSABI-NOT: call{{ }} +// CHECK-MSABI-NOT: call frozen{{ }} // CHECK-MSABI: getelementptr {{.*}}, i64 24 -// CHECK-MSABI-NOT: call{{ }} +// CHECK-MSABI-NOT: call frozen{{ }} // CHECK-MSABI: call void @"??3F@@SAXPEAU0@Udestroying_delete_t@std@@_KW4align_val_t@2@@Z"({{.*}}, i64 96, i64 32) // CHECK-MSABI: br label %[[RETURN:.*]] // diff --git a/clang/test/CodeGenCXX/cxx2a-thread-local-constinit.cpp b/clang/test/CodeGenCXX/cxx2a-thread-local-constinit.cpp --- a/clang/test/CodeGenCXX/cxx2a-thread-local-constinit.cpp +++ b/clang/test/CodeGenCXX/cxx2a-thread-local-constinit.cpp @@ -18,7 +18,7 @@ extern thread_local int a; extern thread_local constinit int b; -// CHECK-LABEL: define i32 @_Z5get_av() +// CHECK-LABEL: define frozen i32 @_Z5get_av() // CHECK: call {{(cxx_fast_tlscc )?}}i32* @_ZTW1a() // CHECK: } int get_a() { return a; } @@ -29,7 +29,7 @@ // LINUX: } // DARWIN-NOT: define {{.*}}@_ZTW1a() -// CHECK-LABEL: define i32 @_Z5get_bv() +// CHECK-LABEL: define frozen i32 @_Z5get_bv() // CHECK-NOT: call // CHECK: load i32, i32* @b // CHECK-NOT: call @@ -40,7 +40,7 @@ extern thread_local int c; -// CHECK-LABEL: define i32 @_Z5get_cv() +// CHECK-LABEL: define frozen i32 @_Z5get_cv() // LINUX: call {{(cxx_fast_tlscc )?}}i32* @_ZTW1c() // CHECK: load i32, i32* % // CHECK: } @@ -69,7 +69,7 @@ }; extern thread_local constinit Destructed e; -// CHECK-LABEL: define i32 @_Z5get_ev() +// CHECK-LABEL: define frozen i32 @_Z5get_ev() // CHECK: call {{.*}}* @_ZTW1e() // CHECK: } int get_e() { return e.n; } diff --git a/clang/test/CodeGenCXX/debug-info-class.cpp b/clang/test/CodeGenCXX/debug-info-class.cpp --- a/clang/test/CodeGenCXX/debug-info-class.cpp +++ b/clang/test/CodeGenCXX/debug-info-class.cpp @@ -97,9 +97,9 @@ // RUN: %clang_cc1 -triple i686-cygwin -emit-llvm -debug-info-kind=limited -fexceptions -std=c++11 %s -o - | FileCheck -check-prefix=CHECK11 -check-prefix=CHECK %s // RUN: %clang_cc1 -triple armv7l-unknown-linux-gnueabihf -emit-llvm -debug-info-kind=limited -fexceptions -std=c++11 %s -o - | FileCheck -check-prefix=CHECK11 -check-prefix=CHECK %s -// CHECK98: invoke {{.+}} @_ZN1BD1Ev(%class.B* %b) +// CHECK98: invoke {{.+}} @_ZN1BD1Ev(%class.B* frozen %b) // CHECK98-NEXT: unwind label %{{.+}}, !dbg ![[EXCEPTLOC:.*]] -// CHECK11: call {{.+}} @_ZN1BD1Ev(%class.B* %b){{.*}}, !dbg ![[EXCEPTLOC:.*]] +// CHECK11: call {{.+}} @_ZN1BD1Ev(%class.B* frozen %b){{.*}}, !dbg ![[EXCEPTLOC:.*]] // CHECK: store i32 0, i32* %{{.+}}, !dbg ![[RETLOC:.*]] diff --git a/clang/test/CodeGenCXX/debug-info-codeview-heapallocsite.cpp b/clang/test/CodeGenCXX/debug-info-codeview-heapallocsite.cpp --- a/clang/test/CodeGenCXX/debug-info-codeview-heapallocsite.cpp +++ b/clang/test/CodeGenCXX/debug-info-codeview-heapallocsite.cpp @@ -14,8 +14,8 @@ } // CHECK-LABEL: define {{.*}}void @doit -// CHECK: call {{.*}} i8* {{.*}}@"??2@YAPEAX_K@Z"(i64 4) {{.*}} !heapallocsite [[DBG_FOO:!.*]] -// CHECK: call {{.*}} i8* {{.*}}@"??2@YAPEAX_K@Z"(i64 4) {{.*}} !heapallocsite [[DBG_BAR:!.*]] +// CHECK: call {{.*}} i8* {{.*}}@"??2@YAPEAX_K@Z"(i64 frozen 4) {{.*}} !heapallocsite [[DBG_FOO:!.*]] +// CHECK: call {{.*}} i8* {{.*}}@"??2@YAPEAX_K@Z"(i64 frozen 4) {{.*}} !heapallocsite [[DBG_BAR:!.*]] extern "C" void useinvoke() { struct HasDtor { @@ -25,7 +25,7 @@ } // CHECK-LABEL: define {{.*}}void @useinvoke -// CHECK: invoke {{.*}} i8* {{.*}}@"??2@YAPEAX_K@Z"(i64 4) +// CHECK: invoke {{.*}} i8* {{.*}}@"??2@YAPEAX_K@Z"(i64 frozen 4) // CHECK-NEXT: to label {{.*}} unwind label {{.*}} !heapallocsite [[DBG_FOO]] // CHECK: [[DBG_FOO]] = distinct !DICompositeType(tag: DW_TAG_structure_type, diff --git a/clang/test/CodeGenCXX/debug-info-ctor.cpp b/clang/test/CodeGenCXX/debug-info-ctor.cpp --- a/clang/test/CodeGenCXX/debug-info-ctor.cpp +++ b/clang/test/CodeGenCXX/debug-info-ctor.cpp @@ -7,7 +7,7 @@ }; X::X(int v) { - // CHECK_TEMPORARILY_DISABLED: call void @_ZN1XC2Ei(%struct.X* %this1, i32 %tmp), !dbg + // CHECK_TEMPORARILY_DISABLED: call void @_ZN1XC2Ei(%struct.X* %this1, i32 frozen %tmp), !dbg // TEMPORARY CHECK: X value = v; } diff --git a/clang/test/CodeGenCXX/debug-info-globalinit.cpp b/clang/test/CodeGenCXX/debug-info-globalinit.cpp --- a/clang/test/CodeGenCXX/debug-info-globalinit.cpp +++ b/clang/test/CodeGenCXX/debug-info-globalinit.cpp @@ -18,19 +18,19 @@ // CHECK-LABEL: define internal void @__cxx_global_var_init() // CHECK-NOT: __cxx_global_var_init -// CHECK: %[[C0:.+]] = call i32 @_Z4testv(), !dbg ![[LINE:.*]] +// CHECK: %[[C0:.+]] = call frozen i32 @_Z4testv(), !dbg ![[LINE:.*]] // CHECK-NOT: __cxx_global_var_init // CHECK: store i32 %[[C0]], i32* @_ZL1i, align 4, !dbg // // CHECK-LABEL: define internal void @__cxx_global_var_init.1() // CHECK-NOT: dbg -// CHECK: %[[C1:.+]] = call i32 @_Z4testv() +// CHECK: %[[C1:.+]] = call frozen i32 @_Z4testv() // CHECK-NOT: dbg // CHECK: store i32 %[[C1]], i32* @_ZL1j, align 4 // // CHECK-LABEL: define internal void @__cxx_global_var_init.2() // CHECK-NOT: __cxx_global_var_init -// CHECK: %[[C2:.+]] = call i32 @_Z4testv(), !dbg ![[LINE2:.*]] +// CHECK: %[[C2:.+]] = call frozen i32 @_Z4testv(), !dbg ![[LINE2:.*]] // CHECK-NOT: __cxx_global_var_init // CHECK: store i32 %[[C2]], i32* @_ZL1k, align 4, !dbg // diff --git a/clang/test/CodeGenCXX/debug-info-line.cpp b/clang/test/CodeGenCXX/debug-info-line.cpp --- a/clang/test/CodeGenCXX/debug-info-line.cpp +++ b/clang/test/CodeGenCXX/debug-info-line.cpp @@ -296,7 +296,7 @@ // CHECK-LABEL: define void f25_a(int x = __builtin_LINE()) {} void f25() { - // CHECK: call void @_Z5f25_ai(i32 {{(signext )?}}2700) + // CHECK: call void @_Z5f25_ai(i32 frozen {{(signext )?}}2700) #line 2700 f25_a(); } diff --git a/clang/test/CodeGenCXX/debug-info-ms-dtor-thunks.cpp b/clang/test/CodeGenCXX/debug-info-ms-dtor-thunks.cpp --- a/clang/test/CodeGenCXX/debug-info-ms-dtor-thunks.cpp +++ b/clang/test/CodeGenCXX/debug-info-ms-dtor-thunks.cpp @@ -6,10 +6,10 @@ struct __declspec(dllexport) U : S, T { virtual ~U(); }; // CHECK-LABEL: define {{.*}} @"??_GS@@UAEPAXI@Z" -// CHECK: call x86_thiscallcc void @"??1S@@UAE@XZ"(%struct.S* %this1){{.*}}!dbg !{{[0-9]+}} +// CHECK: call x86_thiscallcc void @"??1S@@UAE@XZ"(%struct.S* frozen %this1){{.*}}!dbg !{{[0-9]+}} // CHECK-LABEL: define {{.*}} @"??_GT@@UAEPAXI@Z" -// CHECK: call x86_thiscallcc void @"??1T@@UAE@XZ"(%struct.T* %this1){{.*}}!dbg !{{[0-9]+}} +// CHECK: call x86_thiscallcc void @"??1T@@UAE@XZ"(%struct.T* frozen %this1){{.*}}!dbg !{{[0-9]+}} // CHECK-LABEL: define {{.*}} @"??_GU@@UAEPAXI@Z" -// CHECK: call x86_thiscallcc void @"??1U@@UAE@XZ"(%struct.U* %this1){{.*}}!dbg !{{[0-9]+}} +// CHECK: call x86_thiscallcc void @"??1U@@UAE@XZ"(%struct.U* frozen %this1){{.*}}!dbg !{{[0-9]+}} diff --git a/clang/test/CodeGenCXX/debug-info-nested-exprs.cpp b/clang/test/CodeGenCXX/debug-info-nested-exprs.cpp --- a/clang/test/CodeGenCXX/debug-info-nested-exprs.cpp +++ b/clang/test/CodeGenCXX/debug-info-nested-exprs.cpp @@ -30,17 +30,17 @@ int a = bar(x, y) + baz(x, z) + qux(y, z); - // NONEST: call i32 @{{.*}}bar{{.*}}, !dbg ![[LOC:[0-9]+]] - // NONEST: call i32 @{{.*}}baz{{.*}}, !dbg ![[LOC]] - // NONEST: call i32 @{{.*}}qux{{.*}}, !dbg ![[LOC]] + // NONEST: call frozen i32 @{{.*}}bar{{.*}}, !dbg ![[LOC:[0-9]+]] + // NONEST: call frozen i32 @{{.*}}baz{{.*}}, !dbg ![[LOC]] + // NONEST: call frozen i32 @{{.*}}qux{{.*}}, !dbg ![[LOC]] // NONEST: store i32 {{.*}}, i32* %a,{{.*}} !dbg ![[LOC]] - // NESTED: call i32 @{{.*}}bar{{.*}}, !dbg ![[BAR:[0-9]+]] - // NESTED: call i32 @{{.*}}baz{{.*}}, !dbg ![[BAZ:[0-9]+]] - // NESTED: call i32 @{{.*}}qux{{.*}}, !dbg ![[QUX:[0-9]+]] + // NESTED: call frozen i32 @{{.*}}bar{{.*}}, !dbg ![[BAR:[0-9]+]] + // NESTED: call frozen i32 @{{.*}}baz{{.*}}, !dbg ![[BAZ:[0-9]+]] + // NESTED: call frozen i32 @{{.*}}qux{{.*}}, !dbg ![[QUX:[0-9]+]] // NESTED: store i32 {{.*}}, i32* %a,{{.*}} !dbg ![[BAR]] - // COLUMNS: call i32 @{{.*}}bar{{.*}}, !dbg ![[BAR:[0-9]+]] - // COLUMNS: call i32 @{{.*}}baz{{.*}}, !dbg ![[BAZ:[0-9]+]] - // COLUMNS: call i32 @{{.*}}qux{{.*}}, !dbg ![[QUX:[0-9]+]] + // COLUMNS: call frozen i32 @{{.*}}bar{{.*}}, !dbg ![[BAR:[0-9]+]] + // COLUMNS: call frozen i32 @{{.*}}baz{{.*}}, !dbg ![[BAZ:[0-9]+]] + // COLUMNS: call frozen i32 @{{.*}}qux{{.*}}, !dbg ![[QUX:[0-9]+]] // COLUMNS: store i32 {{.*}}, i32* %a,{{.*}} !dbg ![[DECLA:[0-9]+]] int i = 1, b = 0, c = 0; @@ -58,23 +58,23 @@ b = bar(a, b); --i; } - // NONEST: call i32 @{{.*}}bar{{.*}}, !dbg ![[WHILE1:[0-9]+]] + // NONEST: call frozen i32 @{{.*}}bar{{.*}}, !dbg ![[WHILE1:[0-9]+]] // NONEST: store i32 %{{[^,]+}}, i32* %i,{{.*}} !dbg ![[WHILE2:[0-9]+]] - // NESTED: call i32 @{{.*}}bar{{.*}}, !dbg ![[WHILE1:[0-9]+]] + // NESTED: call frozen i32 @{{.*}}bar{{.*}}, !dbg ![[WHILE1:[0-9]+]] // NESTED: store i32 %{{[^,]+}}, i32* %i,{{.*}} !dbg ![[WHILE2:[0-9]+]] - // COLUMNS: call i32 @{{.*}}bar{{.*}}, !dbg ![[WHILE1:[0-9]+]] + // COLUMNS: call frozen i32 @{{.*}}bar{{.*}}, !dbg ![[WHILE1:[0-9]+]] // COLUMNS: store i32 %{{[^,]+}}, i32* %i,{{.*}} !dbg ![[WHILE2:[0-9]+]] for (i = 0; i < 1; i++) { b = bar(a, b); c = qux(a, c); } - // NONEST: call i32 @{{.*}}bar{{.*}}, !dbg ![[FOR1:[0-9]+]] - // NONEST: call i32 @{{.*}}qux{{.*}}, !dbg ![[FOR2:[0-9]+]] - // NESTED: call i32 @{{.*}}bar{{.*}}, !dbg ![[FOR1:[0-9]+]] - // NESTED: call i32 @{{.*}}qux{{.*}}, !dbg ![[FOR2:[0-9]+]] - // COLUMNS: call i32 @{{.*}}bar{{.*}}, !dbg ![[FOR1:[0-9]+]] - // COLUMNS: call i32 @{{.*}}qux{{.*}}, !dbg ![[FOR2:[0-9]+]] + // NONEST: call frozen i32 @{{.*}}bar{{.*}}, !dbg ![[FOR1:[0-9]+]] + // NONEST: call frozen i32 @{{.*}}qux{{.*}}, !dbg ![[FOR2:[0-9]+]] + // NESTED: call frozen i32 @{{.*}}bar{{.*}}, !dbg ![[FOR1:[0-9]+]] + // NESTED: call frozen i32 @{{.*}}qux{{.*}}, !dbg ![[FOR2:[0-9]+]] + // COLUMNS: call frozen i32 @{{.*}}bar{{.*}}, !dbg ![[FOR1:[0-9]+]] + // COLUMNS: call frozen i32 @{{.*}}qux{{.*}}, !dbg ![[FOR2:[0-9]+]] if (a < b) { int t = a; @@ -93,51 +93,51 @@ int d = onearg( noargs()); - // NONEST: call i32 @{{.*}}noargs{{.*}}, !dbg ![[DECLD:[0-9]+]] - // NONEST: call i32 @{{.*}}onearg{{.*}}, !dbg ![[DECLD]] + // NONEST: call frozen i32 @{{.*}}noargs{{.*}}, !dbg ![[DECLD:[0-9]+]] + // NONEST: call frozen i32 @{{.*}}onearg{{.*}}, !dbg ![[DECLD]] // NONEST: store i32 %{{[^,]+}}, i32* %d,{{.*}} !dbg ![[DECLD]] - // NESTED: call i32 @{{.*}}noargs{{.*}}, !dbg ![[DNOARGS:[0-9]+]] - // NESTED: call i32 @{{.*}}onearg{{.*}}, !dbg ![[DECLD:[0-9]+]] + // NESTED: call frozen i32 @{{.*}}noargs{{.*}}, !dbg ![[DNOARGS:[0-9]+]] + // NESTED: call frozen i32 @{{.*}}onearg{{.*}}, !dbg ![[DECLD:[0-9]+]] // NESTED: store i32 %{{[^,]+}}, i32* %d,{{.*}} !dbg ![[DECLD]] - // COLUMNS: call i32 @{{.*}}noargs{{.*}}, !dbg ![[DNOARGS:[0-9]+]] - // COLUMNS: call i32 @{{.*}}onearg{{.*}}, !dbg ![[DONEARG:[0-9]+]] + // COLUMNS: call frozen i32 @{{.*}}noargs{{.*}}, !dbg ![[DNOARGS:[0-9]+]] + // COLUMNS: call frozen i32 @{{.*}}onearg{{.*}}, !dbg ![[DONEARG:[0-9]+]] // COLUMNS: store i32 %{{[^,]+}}, i32* %d,{{.*}} !dbg ![[DECLD:[0-9]+]] d = onearg(noargs()); - // NONEST: call i32 @{{.*}}noargs{{.*}}, !dbg ![[SETD:[0-9]+]] - // NONEST: call i32 @{{.*}}onearg{{.*}}, !dbg ![[SETD]] + // NONEST: call frozen i32 @{{.*}}noargs{{.*}}, !dbg ![[SETD:[0-9]+]] + // NONEST: call frozen i32 @{{.*}}onearg{{.*}}, !dbg ![[SETD]] // NONEST: store i32 %{{[^,]+}}, i32* %d,{{.*}} !dbg ![[SETD]] - // NESTED: call i32 @{{.*}}noargs{{.*}}, !dbg ![[SETD:[0-9]+]] - // NESTED: call i32 @{{.*}}onearg{{.*}}, !dbg ![[SETD]] + // NESTED: call frozen i32 @{{.*}}noargs{{.*}}, !dbg ![[SETD:[0-9]+]] + // NESTED: call frozen i32 @{{.*}}onearg{{.*}}, !dbg ![[SETD]] // NESTED: store i32 %{{[^,]+}}, i32* %d,{{.*}} !dbg ![[SETD]] - // COLUMNS: call i32 @{{.*}}noargs{{.*}}, !dbg ![[SETDNOARGS:[0-9]+]] - // COLUMNS: call i32 @{{.*}}onearg{{.*}}, !dbg ![[SETDONEARG:[0-9]+]] + // COLUMNS: call frozen i32 @{{.*}}noargs{{.*}}, !dbg ![[SETDNOARGS:[0-9]+]] + // COLUMNS: call frozen i32 @{{.*}}onearg{{.*}}, !dbg ![[SETDONEARG:[0-9]+]] // COLUMNS: store i32 %{{[^,]+}}, i32* %d,{{.*}} !dbg ![[SETD:[0-9]+]] for (const auto x : range(noargs())) noargs1(); - // NONEST: call i32 @{{.*}}noargs{{.*}}, !dbg ![[RANGEFOR:[0-9]+]] + // NONEST: call frozen i32 @{{.*}}noargs{{.*}}, !dbg ![[RANGEFOR:[0-9]+]] // NONEST: call {{.+}} @{{.*}}range{{.*}}, !dbg ![[RANGEFOR]] - // NONEST: call i32 @{{.*}}noargs1{{.*}}, !dbg ![[RANGEFOR_BODY:[0-9]+]] - // NESTED: call i32 @{{.*}}noargs{{.*}}, !dbg ![[RANGEFOR:[0-9]+]] + // NONEST: call frozen i32 @{{.*}}noargs1{{.*}}, !dbg ![[RANGEFOR_BODY:[0-9]+]] + // NESTED: call frozen i32 @{{.*}}noargs{{.*}}, !dbg ![[RANGEFOR:[0-9]+]] // NESTED: call {{.+}} @{{.*}}range{{.*}}, !dbg ![[RANGEFOR]] - // NESTED: call i32 @{{.*}}noargs1{{.*}}, !dbg ![[RANGEFOR_BODY:[0-9]+]] - // COLUMNS: call i32 @{{.*}}noargs{{.*}}, !dbg ![[RANGEFOR_NOARGS:[0-9]+]] + // NESTED: call frozen i32 @{{.*}}noargs1{{.*}}, !dbg ![[RANGEFOR_BODY:[0-9]+]] + // COLUMNS: call frozen i32 @{{.*}}noargs{{.*}}, !dbg ![[RANGEFOR_NOARGS:[0-9]+]] // COLUMNS: call {{.+}} @{{.*}}range{{.*}}, !dbg ![[RANGEFOR_RANGE:[0-9]+]] - // COLUMNS: call i32 @{{.*}}noargs1{{.*}}, !dbg ![[RANGEFOR_BODY:[0-9]+]] + // COLUMNS: call frozen i32 @{{.*}}noargs1{{.*}}, !dbg ![[RANGEFOR_BODY:[0-9]+]] if (noargs() && noargs1()) { Foo::create().func(); } - // NONEST: call i32 @{{.*}}noargs{{.*}}, !dbg ![[AND:[0-9]+]] - // NONEST: call i32 @{{.*}}noargs1{{.*}}, !dbg ![[AND]] + // NONEST: call frozen i32 @{{.*}}noargs{{.*}}, !dbg ![[AND:[0-9]+]] + // NONEST: call frozen i32 @{{.*}}noargs1{{.*}}, !dbg ![[AND]] // NONEST: call {{.+}} @{{.*}}create{{.*}}, !dbg ![[AND_BODY:[0-9]+]] // NONEST: call void @{{.*}}func{{.*}}, !dbg ![[AND_BODY]] - // NESTED: call i32 @{{.*}}noargs{{.*}}, !dbg ![[AND:[0-9]+]] - // NESTED: call i32 @{{.*}}noargs1{{.*}}, !dbg ![[AND]] + // NESTED: call frozen i32 @{{.*}}noargs{{.*}}, !dbg ![[AND:[0-9]+]] + // NESTED: call frozen i32 @{{.*}}noargs1{{.*}}, !dbg ![[AND]] // NESTED: call {{.+}} @{{.*}}create{{.*}}, !dbg ![[AND_BODY:[0-9]+]] // NESTED: call void @{{.*}}func{{.*}}, !dbg ![[AND_BODY]] - // COLUMNS: call i32 @{{.*}}noargs{{.*}}, !dbg ![[ANDLHS:[0-9]+]] - // COLUMNS: call i32 @{{.*}}noargs1{{.*}}, !dbg ![[ANDRHS:[0-9]+]] + // COLUMNS: call frozen i32 @{{.*}}noargs{{.*}}, !dbg ![[ANDLHS:[0-9]+]] + // COLUMNS: call frozen i32 @{{.*}}noargs1{{.*}}, !dbg ![[ANDRHS:[0-9]+]] // COLUMNS: call {{.+}} @{{.*}}create{{.*}}, !dbg ![[AND_CREATE:[0-9]+]] // COLUMNS: call void @{{.*}}func{{.*}}, !dbg ![[AND_FUNC:[0-9]+]] diff --git a/clang/test/CodeGenCXX/debug-info-scope.cpp b/clang/test/CodeGenCXX/debug-info-scope.cpp --- a/clang/test/CodeGenCXX/debug-info-scope.cpp +++ b/clang/test/CodeGenCXX/debug-info-scope.cpp @@ -46,7 +46,7 @@ // CHECK-SAME: line: [[@LINE+2]] // CHECK: [[FOR]] = distinct !DILexicalBlock({{.*}}line: [[@LINE+1]]) for (int i = 0; i != 10; ++i) { - // FIXME: Do not include scopes that have only other scopes (and no variables + // FIXME: Do not include scopes that have only other scopes (and no variables // or using declarations) as direct children, they just waste // space/relocations/etc. // CHECK: [[FOR_LOOP_INCLUDING_COND:!.*]] = distinct !DILexicalBlock(scope: [[FOR]],{{.*}} line: [[@LINE-4]]) diff --git a/clang/test/CodeGenCXX/debug-info-static-fns.cpp b/clang/test/CodeGenCXX/debug-info-static-fns.cpp --- a/clang/test/CodeGenCXX/debug-info-static-fns.cpp +++ b/clang/test/CodeGenCXX/debug-info-static-fns.cpp @@ -7,7 +7,7 @@ } // Verify that a is present and mangled. -// CHECK: define internal i32 @_ZN1AL1aEi({{.*}} !dbg [[DBG:![0-9]+]] +// CHECK: define internal frozen i32 @_ZN1AL1aEi({{.*}} !dbg [[DBG:![0-9]+]] // CHECK: [[DBG]] = distinct !DISubprogram(name: "a", linkageName: "_ZN1AL1aEi", // CHECK-SAME: line: 4 // CHECK-SAME: DISPFlagDefinition diff --git a/clang/test/CodeGenCXX/debug-info-thunk-msabi.cpp b/clang/test/CodeGenCXX/debug-info-thunk-msabi.cpp --- a/clang/test/CodeGenCXX/debug-info-thunk-msabi.cpp +++ b/clang/test/CodeGenCXX/debug-info-thunk-msabi.cpp @@ -6,7 +6,7 @@ // CHECK: define {{.*}}void @"??_FA@@AAEXXZ" // CHECK-SAME: !dbg ![[SP:[0-9]+]] // CHECK-NOT: {{ret }} -// CHECK: call x86_thiscallcc %class.A* @"??0A@@AAE@PAH@Z" +// CHECK: call x86_thiscallcc frozen %class.A* @"??0A@@AAE@PAH@Z" // CHECK-SAME: !dbg ![[DBG:[0-9]+]] // CHECK: ret void, !dbg // diff --git a/clang/test/CodeGenCXX/decl-ref-init.cpp b/clang/test/CodeGenCXX/decl-ref-init.cpp --- a/clang/test/CodeGenCXX/decl-ref-init.cpp +++ b/clang/test/CodeGenCXX/decl-ref-init.cpp @@ -23,5 +23,5 @@ const A& rca2 = d(); } -// CHECK: call nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.A* @_ZN1BcvR1AEv -// CHECK: call nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.A* @_ZN1BcvR1AEv +// CHECK: call frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.A* @_ZN1BcvR1AEv +// CHECK: call frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.A* @_ZN1BcvR1AEv diff --git a/clang/test/CodeGenCXX/default-arg-temps.cpp b/clang/test/CodeGenCXX/default-arg-temps.cpp --- a/clang/test/CodeGenCXX/default-arg-temps.cpp +++ b/clang/test/CodeGenCXX/default-arg-temps.cpp @@ -15,14 +15,14 @@ // CHECK-LABEL: define void @_Z1gv() void g() { - // CHECK: call void @_ZN1TC1Ev([[T:%.*]]* [[AGG1:%.*]]) - // CHECK-NEXT: call void @_Z1fRK1T([[T]]* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[AGG1]]) - // CHECK-NEXT: call void @_ZN1TD1Ev([[T]]* [[AGG1]]) + // CHECK: call void @_ZN1TC1Ev([[T:%.*]]* frozen [[AGG1:%.*]]) + // CHECK-NEXT: call void @_Z1fRK1T([[T]]* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[AGG1]]) + // CHECK-NEXT: call void @_ZN1TD1Ev([[T]]* frozen [[AGG1]]) f(); - // CHECK-NEXT: call void @_ZN1TC1Ev([[T:%.*]]* [[AGG2:%.*]]) - // CHECK-NEXT: call void @_Z1fRK1T([[T]]* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[AGG2]]) - // CHECK-NEXT: call void @_ZN1TD1Ev([[T]]* [[AGG2]]) + // CHECK-NEXT: call void @_ZN1TC1Ev([[T:%.*]]* frozen [[AGG2:%.*]]) + // CHECK-NEXT: call void @_Z1fRK1T([[T]]* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[AGG2]]) + // CHECK-NEXT: call void @_ZN1TD1Ev([[T]]* frozen [[AGG2]]) f(); // CHECK-NEXT: call void @_ZN1XC1Ev( @@ -61,7 +61,7 @@ C c; A a; - // CHECK-LABEL: define linkonce_odr void @_ZN5test11DC2Ev(%"struct.test1::D"* %this) unnamed_addr + // CHECK-LABEL: define linkonce_odr void @_ZN5test11DC2Ev(%"struct.test1::D"* frozen %this) unnamed_addr // CHECK: call void @_ZN5test11BC1Ev( // CHECK-NEXT: call void @_ZN5test11CC1ERKNS_1BE( // CHECK-NEXT: call void @_ZN5test11BD1Ev( diff --git a/clang/test/CodeGenCXX/default-arguments.cpp b/clang/test/CodeGenCXX/default-arguments.cpp --- a/clang/test/CodeGenCXX/default-arguments.cpp +++ b/clang/test/CodeGenCXX/default-arguments.cpp @@ -42,14 +42,14 @@ C(); }; -// CHECK-LABEL: define void @_ZN1CC2Ev(%struct.C* %this) unnamed_addr +// CHECK-LABEL: define void @_ZN1CC2Ev(%struct.C* frozen %this) unnamed_addr // CHECK: call void @_ZN2A1C1Ev( // CHECK: call void @_ZN2A2C1Ev( // CHECK: call void @_ZN1BC1ERK2A1RK2A2( // CHECK: call void @_ZN2A2D1Ev // CHECK: call void @_ZN2A1D1Ev -// CHECK-LABEL: define void @_ZN1CC1Ev(%struct.C* %this) unnamed_addr +// CHECK-LABEL: define void @_ZN1CC1Ev(%struct.C* frozen %this) unnamed_addr // CHECK: call void @_ZN1CC2Ev( C::C() { } @@ -71,6 +71,6 @@ } void g4(int a = 5, int b); - // CHECK: call void @_Z2g4ii(i32 5, i32 7) + // CHECK: call void @_Z2g4ii(i32 frozen 5, i32 frozen 7) g4(); } diff --git a/clang/test/CodeGenCXX/default_calling_conv.cpp b/clang/test/CodeGenCXX/default_calling_conv.cpp --- a/clang/test/CodeGenCXX/default_calling_conv.cpp +++ b/clang/test/CodeGenCXX/default_calling_conv.cpp @@ -46,7 +46,7 @@ a.test_member(); } -// ALL: define i32 @main +// ALL: define frozen i32 @main int main() { return 1; } diff --git a/clang/test/CodeGenCXX/delete-two-arg.cpp b/clang/test/CodeGenCXX/delete-two-arg.cpp --- a/clang/test/CodeGenCXX/delete-two-arg.cpp +++ b/clang/test/CodeGenCXX/delete-two-arg.cpp @@ -11,7 +11,7 @@ // CHECK: load // CHECK-NEXT: icmp eq {{.*}}, null // CHECK-NEXT: br i1 - // CHECK: call void @_ZN5test11AdlEPvj(i8* %{{.*}}, i32 4) + // CHECK: call void @_ZN5test11AdlEPvj(i8* frozen %{{.*}}, i32 frozen 4) delete x; } } @@ -25,9 +25,9 @@ void operator delete[](void *, size_t); }; - // CHECK: define [[A:%.*]]* @_ZN5test24testEv() + // CHECK: define frozen [[A:%.*]]* @_ZN5test24testEv() A *test() { - // CHECK: [[NEW:%.*]] = call noalias nonnull i8* @_Znaj(i32 44) + // CHECK: [[NEW:%.*]] = call frozen noalias nonnull i8* @_Znaj(i32 frozen 44) // CHECK-NEXT: [[T0:%.*]] = bitcast i8* [[NEW]] to i32* // CHECK-NEXT: store i32 10, i32* [[T0]] // CHECK-NEXT: [[T1:%.*]] = getelementptr inbounds i8, i8* [[NEW]], i32 4 @@ -47,7 +47,7 @@ // CHECK-NEXT: [[T3:%.*]] = getelementptr inbounds i8, i8* [[T2]], i32 -4 // CHECK-NEXT: [[T4:%.*]] = bitcast i8* [[T3]] to i32* // CHECK-NEXT: [[T5:%.*]] = load i32, i32* [[T4]] - // CHECK-NEXT: call void @_ZdaPv(i8* [[T3]]) + // CHECK-NEXT: call void @_ZdaPv(i8* frozen [[T3]]) // CHECK-NEXT: br label ::delete[] p; } @@ -63,7 +63,7 @@ // CHECK-LABEL: define void @_ZN5test34testEv() void test() { - // CHECK: [[CALL:%.*]] = call noalias nonnull i8* @_Znaj(i32 24) + // CHECK: [[CALL:%.*]] = call frozen noalias nonnull i8* @_Znaj(i32 frozen 24) // CHECK-NEXT: bitcast i8* [[CALL]] to i32* // CHECK-NEXT: store i32 5 (void) new B[5]; diff --git a/clang/test/CodeGenCXX/delete.cpp b/clang/test/CodeGenCXX/delete.cpp --- a/clang/test/CodeGenCXX/delete.cpp +++ b/clang/test/CodeGenCXX/delete.cpp @@ -71,7 +71,7 @@ delete a; } - // CHECK-LABEL: define linkonce_odr void @_ZN5test01AD1Ev(%"struct.test0::A"* %this) unnamed_addr + // CHECK-LABEL: define linkonce_odr void @_ZN5test01AD1Ev(%"struct.test0::A"* frozen %this) unnamed_addr // CHECK-LABEL: define linkonce_odr void @_ZN5test01AdlEPv } @@ -97,10 +97,10 @@ // CHECK-NEXT: br i1 [[ISEMPTY]], // CHECK: [[PAST:%.*]] = phi [[A]]* [ [[END]], {{%.*}} ], [ [[CUR:%.*]], {{%.*}} ] // CHECK-NEXT: [[CUR:%.*]] = getelementptr inbounds [[A]], [[A]]* [[PAST]], i64 -1 - // CHECK-NEXT: call void @_ZN5test11AD1Ev([[A]]* [[CUR]]) + // CHECK-NEXT: call void @_ZN5test11AD1Ev([[A]]* frozen [[CUR]]) // CHECK-NEXT: [[ISDONE:%.*]] = icmp eq [[A]]* [[CUR]], [[BEGIN]] // CHECK-NEXT: br i1 [[ISDONE]] - // CHECK: call void @_ZdaPv(i8* [[ALLOC]]) + // CHECK: call void @_ZdaPv(i8* frozen [[ALLOC]]) } } @@ -144,9 +144,9 @@ // CHECK-NEXT: [[VTABLE:%.*]] = load void ([[X]]*)**, void ([[X]]*)*** [[T0]] // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds void ([[X]]*)*, void ([[X]]*)** [[VTABLE]], i64 0 // CHECK-NEXT: [[DTOR:%.*]] = load void ([[X]]*)*, void ([[X]]*)** [[T0]] - // CHECK-NEXT: call void [[DTOR]]([[X]]* [[OBJ:%.*]]) + // CHECK-NEXT: call void [[DTOR]]([[X]]* frozen [[OBJ:%.*]]) // Call the global operator delete. - // CHECK-NEXT: call void @_ZdlPv(i8* [[ALLOCATED]]) [[NUW:#[0-9]+]] + // CHECK-NEXT: call void @_ZdlPv(i8* frozen [[ALLOCATED]]) [[NUW:#[0-9]+]] ::delete xp; } } diff --git a/clang/test/CodeGenCXX/dereferenceable.cpp b/clang/test/CodeGenCXX/dereferenceable.cpp --- a/clang/test/CodeGenCXX/dereferenceable.cpp +++ b/clang/test/CodeGenCXX/dereferenceable.cpp @@ -5,11 +5,11 @@ struct B : A {}; static_assert(sizeof(B) == 24); -// CHECK: define nonnull align 8 dereferenceable(24) {{.*}} @_Z1fR1B({{.*}} nonnull align 8 dereferenceable(24) +// CHECK: define frozen nonnull align 8 dereferenceable(24) {{.*}} @_Z1fR1B({{.*}} frozen nonnull align 8 dereferenceable(24) B &f(B &b) { return b; } struct C : virtual A {}; static_assert(sizeof(C) == 32); -// CHECK: define nonnull align 8 dereferenceable(8) {{.*}} @_Z1fR1C({{.*}} nonnull align 8 dereferenceable(8) +// CHECK: define frozen nonnull align 8 dereferenceable(8) {{.*}} @_Z1fR1C({{.*}} frozen nonnull align 8 dereferenceable(8) C &f(C &c) { return c; } diff --git a/clang/test/CodeGenCXX/derived-cast.cpp b/clang/test/CodeGenCXX/derived-cast.cpp --- a/clang/test/CodeGenCXX/derived-cast.cpp +++ b/clang/test/CodeGenCXX/derived-cast.cpp @@ -19,7 +19,7 @@ A *B::getAsA() { return static_cast(this); - // CHECK-LABEL: define %class.A* @_ZN1B6getAsAEv + // CHECK-LABEL: define frozen %class.A* @_ZN1B6getAsAEv // CHECK: %[[THIS:.*]] = load %class.B*, %class.B** // CHECK-NEXT: %[[BC:.*]] = bitcast %class.B* %[[THIS]] to i8* // CHECK-NEXT: getelementptr inbounds i8, i8* %[[BC]], i64 -4 diff --git a/clang/test/CodeGenCXX/derived-to-base-conv.cpp b/clang/test/CodeGenCXX/derived-to-base-conv.cpp --- a/clang/test/CodeGenCXX/derived-to-base-conv.cpp +++ b/clang/test/CodeGenCXX/derived-to-base-conv.cpp @@ -33,11 +33,11 @@ test0_helper(x); // CHECK-LABEL: define void @_Z5test01X( // CHECK: [[TMP:%.*]] = alloca [[A:%.*]], align - // CHECK-NEXT: [[T0:%.*]] = call nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[B:%.*]]* @_ZN1XcvR1BEv( + // CHECK-NEXT: [[T0:%.*]] = call frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[B:%.*]]* @_ZN1XcvR1BEv( // CHECK-NEXT: [[T1:%.*]] = bitcast [[B]]* [[T0]] to [[A]]* - // CHECK-NEXT: call void @_ZN1AC1ERKS_([[A]]* [[TMP]], [[A]]* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[T1]]) - // CHECK-NEXT: call void @_Z12test0_helper1A([[A]]* [[TMP]]) - // CHECK-NEXT: call void @_ZN1AD1Ev([[A]]* [[TMP]]) + // CHECK-NEXT: call void @_ZN1AC1ERKS_([[A]]* frozen [[TMP]], [[A]]* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[T1]]) + // CHECK-NEXT: call void @_Z12test0_helper1A([[A]]* frozen [[TMP]]) + // CHECK-NEXT: call void @_ZN1AD1Ev([[A]]* frozen [[TMP]]) // CHECK-NEXT: ret void } diff --git a/clang/test/CodeGenCXX/derived-to-base.cpp b/clang/test/CodeGenCXX/derived-to-base.cpp --- a/clang/test/CodeGenCXX/derived-to-base.cpp +++ b/clang/test/CodeGenCXX/derived-to-base.cpp @@ -15,7 +15,7 @@ b.f(); } -// CHECK: define %struct.B* @_Z1fP1A(%struct.A* %a) [[NUW:#[0-9]+]] +// CHECK: define frozen %struct.B* @_Z1fP1A(%struct.A* frozen %a) [[NUW:#[0-9]+]] B *f(A *a) { // CHECK-NOT: br label // CHECK: ret %struct.B* @@ -25,7 +25,7 @@ // PR5965 namespace PR5965 { -// CHECK: define %struct.A* @_ZN6PR59651fEP1B(%struct.B* %b) [[NUW]] +// CHECK: define frozen %struct.A* @_ZN6PR59651fEP1B(%struct.B* frozen %b) [[NUW]] A *f(B* b) { // CHECK-NOT: br label // CHECK: ret %struct.A* diff --git a/clang/test/CodeGenCXX/destructors.cpp b/clang/test/CodeGenCXX/destructors.cpp --- a/clang/test/CodeGenCXX/destructors.cpp +++ b/clang/test/CodeGenCXX/destructors.cpp @@ -46,7 +46,7 @@ // CHECK1-LABEL: define void @_ZN6PR75263fooEv() // CHECK1: call void {{.*}} @_ZN6PR75269allocatorD2Ev - // CHECK1-LABEL: define void @_ZN6PR75269allocatorD2Ev(%"struct.PR7526::allocator"* %this) unnamed_addr + // CHECK1-LABEL: define void @_ZN6PR75269allocatorD2Ev(%"struct.PR7526::allocator"* frozen %this) unnamed_addr // CHECK1: call void @__cxa_call_unexpected allocator::~allocator() throw() { foo(); } @@ -97,7 +97,7 @@ // complete destructor alias tested above // CHECK2-LABEL: @_ZN5test01AD1Ev = unnamed_addr alias {{.*}} @_ZN5test01AD2Ev -// CHECK2-LABEL: define void @_ZN5test01AD2Ev(%"struct.test0::A"* %this) unnamed_addr +// CHECK2-LABEL: define void @_ZN5test01AD2Ev(%"struct.test0::A"* frozen %this) unnamed_addr // CHECK2: invoke void @_ZN5test06MemberD1Ev // CHECK2: unwind label [[MEM_UNWIND:%[a-zA-Z0-9.]+]] // CHECK2: invoke void @_ZN5test04BaseD2Ev @@ -105,7 +105,7 @@ // In C++11, the destructors are often known not to throw. // CHECK2v11-LABEL: @_ZN5test01AD1Ev = unnamed_addr alias {{.*}} @_ZN5test01AD2Ev -// CHECK2v11-LABEL: define void @_ZN5test01AD2Ev(%"struct.test0::A"* %this) unnamed_addr +// CHECK2v11-LABEL: define void @_ZN5test01AD2Ev(%"struct.test0::A"* frozen %this) unnamed_addr // CHECK2v11: call void @_ZN5test06MemberD1Ev // CHECK2v11: call void @_ZN5test04BaseD2Ev @@ -116,17 +116,17 @@ B::~B() try { } catch (int i) {} // It will suppress the delegation optimization here, though. -// CHECK2-LABEL: define void @_ZN5test01BD2Ev(%"struct.test0::B"* %this, i8** %vtt) unnamed_addr +// CHECK2-LABEL: define void @_ZN5test01BD2Ev(%"struct.test0::B"* frozen %this, i8** frozen %vtt) unnamed_addr // CHECK2: invoke void @_ZN5test06MemberD1Ev // CHECK2: unwind label [[MEM_UNWIND:%[a-zA-Z0-9.]+]] // CHECK2: invoke void @_ZN5test04BaseD2Ev // CHECK2: unwind label [[BASE_UNWIND:%[a-zA-Z0-9.]+]] -// CHECK2v11-LABEL: define void @_ZN5test01BD2Ev(%"struct.test0::B"* %this, i8** %vtt) unnamed_addr +// CHECK2v11-LABEL: define void @_ZN5test01BD2Ev(%"struct.test0::B"* frozen %this, i8** frozen %vtt) unnamed_addr // CHECK2v11: call void @_ZN5test06MemberD1Ev // CHECK2v11: call void @_ZN5test04BaseD2Ev -// CHECK2-LABEL: define void @_ZN5test01BD1Ev(%"struct.test0::B"* %this) unnamed_addr +// CHECK2-LABEL: define void @_ZN5test01BD1Ev(%"struct.test0::B"* frozen %this) unnamed_addr // CHECK2: invoke void @_ZN5test06MemberD1Ev // CHECK2: unwind label [[MEM_UNWIND:%[a-zA-Z0-9.]+]] // CHECK2: invoke void @_ZN5test04BaseD2Ev @@ -134,7 +134,7 @@ // CHECK2: invoke void @_ZN5test05VBaseD2Ev // CHECK2: unwind label [[VBASE_UNWIND:%[a-zA-Z0-9.]+]] -// CHECK2v11-LABEL: define void @_ZN5test01BD1Ev(%"struct.test0::B"* %this) unnamed_addr +// CHECK2v11-LABEL: define void @_ZN5test01BD1Ev(%"struct.test0::B"* frozen %this) unnamed_addr // CHECK2v11: call void @_ZN5test06MemberD1Ev // CHECK2v11: call void @_ZN5test04BaseD2Ev // CHECK2v11: call void @_ZN5test05VBaseD2Ev @@ -164,25 +164,25 @@ // CHECK3: @_ZN5test11OD2Ev = unnamed_addr alias {{.*}} @_ZN5test11AD2Ev struct P : NonEmpty, A { ~P(); }; - P::~P() {} // CHECK3-LABEL: define void @_ZN5test11PD2Ev(%"struct.test1::P"* %this) unnamed_addr + P::~P() {} // CHECK3-LABEL: define void @_ZN5test11PD2Ev(%"struct.test1::P"* frozen %this) unnamed_addr struct Q : A, B { ~Q(); }; - Q::~Q() {} // CHECK3-LABEL: define void @_ZN5test11QD2Ev(%"struct.test1::Q"* %this) unnamed_addr + Q::~Q() {} // CHECK3-LABEL: define void @_ZN5test11QD2Ev(%"struct.test1::Q"* frozen %this) unnamed_addr struct R : A { ~R(); }; - R::~R() { A a; } // CHECK3-LABEL: define void @_ZN5test11RD2Ev(%"struct.test1::R"* %this) unnamed_addr + R::~R() { A a; } // CHECK3-LABEL: define void @_ZN5test11RD2Ev(%"struct.test1::R"* frozen %this) unnamed_addr struct S : A { ~S(); int x; }; S::~S() {} // CHECK4: @_ZN5test11SD2Ev = unnamed_addr alias {{.*}}, bitcast {{.*}} @_ZN5test11AD2Ev struct T : A { ~T(); B x; }; - T::~T() {} // CHECK4-LABEL: define void @_ZN5test11TD2Ev(%"struct.test1::T"* %this) unnamed_addr + T::~T() {} // CHECK4-LABEL: define void @_ZN5test11TD2Ev(%"struct.test1::T"* frozen %this) unnamed_addr // The VTT parameter prevents this. We could still make this work // for calling conventions that are safe against extra parameters. struct U : A, virtual B { ~U(); }; - U::~U() {} // CHECK4-LABEL: define void @_ZN5test11UD2Ev(%"struct.test1::U"* %this, i8** %vtt) unnamed_addr + U::~U() {} // CHECK4-LABEL: define void @_ZN5test11UD2Ev(%"struct.test1::U"* frozen %this, i8** frozen %vtt) unnamed_addr } // PR6471 @@ -191,7 +191,7 @@ struct B : A { ~B(); }; B::~B() {} - // CHECK4-LABEL: define void @_ZN5test21BD2Ev(%"struct.test2::B"* %this) unnamed_addr + // CHECK4-LABEL: define void @_ZN5test21BD2Ev(%"struct.test2::B"* frozen %this) unnamed_addr // CHECK4: call void @_ZN5test21AD2Ev } @@ -208,13 +208,13 @@ new D; // Force emission of D's vtable } - // CHECK4-LABEL: define internal void @_ZN5test312_GLOBAL__N_11CD2Ev(%"struct.test3::(anonymous namespace)::C"* %this) unnamed_addr + // CHECK4-LABEL: define internal void @_ZN5test312_GLOBAL__N_11CD2Ev(%"struct.test3::(anonymous namespace)::C"* frozen %this) unnamed_addr // CHECK4v03: invoke void @_ZN5test31BD2Ev( // CHECK4v11: call void @_ZN5test31BD2Ev( // CHECK4: call void @_ZN5test31AD2Ev( // CHECK4: ret void - // CHECK4-LABEL: define internal void @_ZN5test312_GLOBAL__N_11DD0Ev(%"struct.test3::(anonymous namespace)::D"* %this) unnamed_addr + // CHECK4-LABEL: define internal void @_ZN5test312_GLOBAL__N_11DD0Ev(%"struct.test3::(anonymous namespace)::D"* frozen %this) unnamed_addr // CHECK4v03-SAME: personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) // CHECK4v03: invoke void {{.*}} @_ZN5test312_GLOBAL__N_11CD2Ev // CHECK4v11: call void {{.*}} @_ZN5test312_GLOBAL__N_11CD2Ev @@ -236,7 +236,7 @@ // CHECK4: call void @_ZN5test312_GLOBAL__N_11DD0Ev( // CHECK4: ret void - // CHECK4-LABEL: define internal void @_ZN5test312_GLOBAL__N_11CD0Ev(%"struct.test3::(anonymous namespace)::C"* %this) unnamed_addr + // CHECK4-LABEL: define internal void @_ZN5test312_GLOBAL__N_11CD0Ev(%"struct.test3::(anonymous namespace)::C"* frozen %this) unnamed_addr // CHECK4v03-SAME: personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) // CHECK4v03: invoke void @_ZN5test312_GLOBAL__N_11CD2Ev( // CHECK4v11: call void @_ZN5test312_GLOBAL__N_11CD2Ev( @@ -315,8 +315,8 @@ // CHECK5-NEXT: br label // CHECK5: [[POST:%.*]] = phi [[A]]* [ [[END]], {{%.*}} ], [ [[ELT:%.*]], {{%.*}} ] // CHECK5-NEXT: [[ELT]] = getelementptr inbounds [[A]], [[A]]* [[POST]], i64 -1 - // CHECK5v03-NEXT: invoke void @_ZN5test51AD1Ev([[A]]* [[ELT]]) - // CHECK5v11-NEXT: call void @_ZN5test51AD1Ev([[A]]* [[ELT]]) + // CHECK5v03-NEXT: invoke void @_ZN5test51AD1Ev([[A]]* frozen [[ELT]]) + // CHECK5v11-NEXT: call void @_ZN5test51AD1Ev([[A]]* frozen [[ELT]]) // CHECK5: [[T0:%.*]] = icmp eq [[A]]* [[ELT]], [[BEGIN]] // CHECK5-NEXT: br i1 [[T0]], // CHECK5: call void @llvm.lifetime.end @@ -326,7 +326,7 @@ // CHECK5v03-NEXT: br i1 [[EMPTY]] // CHECK5v03: [[AFTER:%.*]] = phi [[A]]* [ [[ELT]], {{%.*}} ], [ [[CUR:%.*]], {{%.*}} ] // CHECK5v03-NEXT: [[CUR:%.*]] = getelementptr inbounds [[A]], [[A]]* [[AFTER]], i64 -1 - // CHECK5v03-NEXT: invoke void @_ZN5test51AD1Ev([[A]]* [[CUR]]) + // CHECK5v03-NEXT: invoke void @_ZN5test51AD1Ev([[A]]* frozen [[CUR]]) // CHECK5v03: [[DONE:%.*]] = icmp eq [[A]]* [[CUR]], [[BEGIN]] // CHECK5v03-NEXT: br i1 [[DONE]], // CHECK5v11-NOT: landingpad @@ -349,7 +349,7 @@ }; C::C() { opaque(); } - // CHECK5-LABEL: define void @_ZN5test61CC1Ev(%"struct.test6::C"* %this) unnamed_addr + // CHECK5-LABEL: define void @_ZN5test61CC1Ev(%"struct.test6::C"* frozen %this) unnamed_addr // CHECK5: call void @_ZN5test61BILj2EEC2Ev // CHECK5: invoke void @_ZN5test61BILj3EEC2Ev // CHECK5: invoke void @_ZN5test61BILj0EEC2Ev @@ -359,7 +359,7 @@ // FIXME: way too much EH cleanup code follows C::~C() { opaque(); } - // CHECK5-LABEL: define void @_ZN5test61CD2Ev(%"struct.test6::C"* %this, i8** %vtt) unnamed_addr + // CHECK5-LABEL: define void @_ZN5test61CD2Ev(%"struct.test6::C"* frozen %this, i8** frozen %vtt) unnamed_addr // CHECK5: invoke void @_ZN5test66opaqueEv // CHECK5v03: invoke void @_ZN5test61AD1Ev // CHECK5v03: invoke void @_ZN5test61AD1Ev @@ -377,7 +377,7 @@ // CHECK5v03: invoke void @_ZN5test61BILj1EED2Ev // CHECK5v03: invoke void @_ZN5test61BILj0EED2Ev - // CHECK5-LABEL: define void @_ZN5test61CD1Ev(%"struct.test6::C"* %this) unnamed_addr + // CHECK5-LABEL: define void @_ZN5test61CD1Ev(%"struct.test6::C"* frozen %this) unnamed_addr // CHECK5v03: invoke void @_ZN5test61CD2Ev // CHECK5v03: invoke void @_ZN5test61BILj3EED2Ev // CHECK5v03: call void @_ZN5test61BILj2EED2Ev @@ -428,11 +428,11 @@ // CHECK5-LABEL: define void @_ZN5test84testEv() // CHECK5: [[X:%.*]] = alloca [[A:%.*]], align 1 // CHECK5-NEXT: [[Y:%.*]] = alloca [[A:%.*]], align 1 - // CHECK5: call void @_ZN5test81AC1Ev([[A]]* [[X]]) + // CHECK5: call void @_ZN5test81AC1Ev([[A]]* frozen [[X]]) // CHECK5-NEXT: br label - // CHECK5: invoke void @_ZN5test81AC1Ev([[A]]* [[Y]]) - // CHECK5v03: invoke void @_ZN5test81AD1Ev([[A]]* [[Y]]) - // CHECK5v11: call void @_ZN5test81AD1Ev([[A]]* [[Y]]) + // CHECK5: invoke void @_ZN5test81AC1Ev([[A]]* frozen [[Y]]) + // CHECK5v03: invoke void @_ZN5test81AD1Ev([[A]]* frozen [[Y]]) + // CHECK5v11: call void @_ZN5test81AD1Ev([[A]]* frozen [[Y]]) // CHECK5-NOT: switch // CHECK5: invoke void @_ZN5test83dieEv() // CHECK5: unreachable @@ -450,7 +450,7 @@ f1(); f2(); } - // CHECK5: call void @_ZN5test97ArgTypeD1Ev(%"struct.test9::ArgType"* % + // CHECK5: call void @_ZN5test97ArgTypeD1Ev(%"struct.test9::ArgType"* frozen % // CHECK5: call void @_ZN5test92f2Ev() } @@ -462,7 +462,7 @@ }; template class opt : public Option {}; template class opt; - // CHECK5-LABEL: define zeroext i1 @_ZN6test1016handleOccurrenceEv( + // CHECK5-LABEL: define frozen zeroext i1 @_ZN6test1016handleOccurrenceEv( bool handleOccurrence() { // CHECK5: call void @_ZN6test106OptionD2Ev( Option x; @@ -482,29 +482,29 @@ // CHECK6: [[T3:%[a-z0-9]+]] = alloca %"struct.test11::S1" // CHECK6: {{^}}invoke.cont -// CHECK6: call void @_ZN6test112S1D1Ev(%"struct.test11::S1"* [[T1]]) +// CHECK6: call void @_ZN6test112S1D1Ev(%"struct.test11::S1"* frozen [[T1]]) // CHECK6: [[BC1:%[a-z0-9]+]] = bitcast %"struct.test11::S1"* [[T1]] to i8* // CHECK6: call void @llvm.lifetime.end.p0i8(i64 32, i8* [[BC1]]) // CHECK6: {{^}}lpad -// CHECK6: call void @_ZN6test112S1D1Ev(%"struct.test11::S1"* [[T1]]) +// CHECK6: call void @_ZN6test112S1D1Ev(%"struct.test11::S1"* frozen [[T1]]) // CHECK6: [[BC2:%[a-z0-9]+]] = bitcast %"struct.test11::S1"* [[T1]] to i8* // CHECK6: call void @llvm.lifetime.end.p0i8(i64 32, i8* [[BC2]]) // CHECK6: {{^}}invoke.cont -// CHECK6: call void @_ZN6test112S1D1Ev(%"struct.test11::S1"* [[T2]]) +// CHECK6: call void @_ZN6test112S1D1Ev(%"struct.test11::S1"* frozen [[T2]]) // CHECK6: [[BC3:%[a-z0-9]+]] = bitcast %"struct.test11::S1"* [[T2]] to i8* // CHECK6: call void @llvm.lifetime.end.p0i8(i64 32, i8* [[BC3]]) // CHECK6: {{^}}lpad -// CHECK6: call void @_ZN6test112S1D1Ev(%"struct.test11::S1"* [[T2]]) +// CHECK6: call void @_ZN6test112S1D1Ev(%"struct.test11::S1"* frozen [[T2]]) // CHECK6: [[BC4:%[a-z0-9]+]] = bitcast %"struct.test11::S1"* [[T2]] to i8* // CHECK6: call void @llvm.lifetime.end.p0i8(i64 32, i8* [[BC4]]) // CHECK6: {{^}}invoke.cont -// CHECK6: call void @_ZN6test112S1D1Ev(%"struct.test11::S1"* [[T3]]) +// CHECK6: call void @_ZN6test112S1D1Ev(%"struct.test11::S1"* frozen [[T3]]) // CHECK6: [[BC5:%[a-z0-9]+]] = bitcast %"struct.test11::S1"* [[T3]] to i8* // CHECK6: call void @llvm.lifetime.end.p0i8(i64 32, i8* [[BC5]]) // CHECK6: {{^}}lpad -// CHECK6: call void @_ZN6test112S1D1Ev(%"struct.test11::S1"* [[T3]]) +// CHECK6: call void @_ZN6test112S1D1Ev(%"struct.test11::S1"* frozen [[T3]]) // CHECK6: [[BC6:%[a-z0-9]+]] = bitcast %"struct.test11::S1"* [[T3]] to i8* // CHECK6: call void @llvm.lifetime.end.p0i8(i64 32, i8* [[BC6]]) diff --git a/clang/test/CodeGenCXX/devirtualize-ms-dtor.cpp b/clang/test/CodeGenCXX/devirtualize-ms-dtor.cpp --- a/clang/test/CodeGenCXX/devirtualize-ms-dtor.cpp +++ b/clang/test/CodeGenCXX/devirtualize-ms-dtor.cpp @@ -11,6 +11,6 @@ p->~Foo(); } -// CHECK-LABEL: define{{.*}} void @"?f@@YAXPEAUFoo@@@Z"(%struct.Foo* %p) +// CHECK-LABEL: define{{.*}} void @"?f@@YAXPEAUFoo@@@Z"(%struct.Foo* frozen %p) // CHECK: call void @"??1Foo@@UEAA@XZ" // CHECK: ret void diff --git a/clang/test/CodeGenCXX/devirtualize-virtual-function-calls-final.cpp b/clang/test/CodeGenCXX/devirtualize-virtual-function-calls-final.cpp --- a/clang/test/CodeGenCXX/devirtualize-virtual-function-calls-final.cpp +++ b/clang/test/CodeGenCXX/devirtualize-virtual-function-calls-final.cpp @@ -5,9 +5,9 @@ virtual int f() final; }; - // CHECK-LABEL: define i32 @_ZN5Test11fEPNS_1AE + // CHECK-LABEL: define frozen i32 @_ZN5Test11fEPNS_1AE int f(A *a) { - // CHECK: call i32 @_ZN5Test11A1fEv + // CHECK: call frozen i32 @_ZN5Test11A1fEv return a->f(); } } @@ -17,9 +17,9 @@ virtual int f(); }; - // CHECK-LABEL: define i32 @_ZN5Test21fEPNS_1AE + // CHECK-LABEL: define frozen i32 @_ZN5Test21fEPNS_1AE int f(A *a) { - // CHECK: call i32 @_ZN5Test21A1fEv + // CHECK: call frozen i32 @_ZN5Test21A1fEv return a->f(); } } @@ -30,9 +30,9 @@ virtual int f(); }; - // CHECK-LABEL: define i32 @_ZN6Test2a1fEPNS_1AE + // CHECK-LABEL: define frozen i32 @_ZN6Test2a1fEPNS_1AE int f(A *a) { - // CHECK: call i32 @_ZN6Test2a1A1fEv + // CHECK: call frozen i32 @_ZN6Test2a1A1fEv return a->f(); } } @@ -44,21 +44,21 @@ struct B final : A { }; - // CHECK-LABEL: define i32 @_ZN5Test31fEPNS_1BE + // CHECK-LABEL: define frozen i32 @_ZN5Test31fEPNS_1BE int f(B *b) { - // CHECK: call i32 @_ZN5Test31A1fEv + // CHECK: call frozen i32 @_ZN5Test31A1fEv return b->f(); } - // CHECK-LABEL: define i32 @_ZN5Test31fERNS_1BE + // CHECK-LABEL: define frozen i32 @_ZN5Test31fERNS_1BE int f(B &b) { - // CHECK: call i32 @_ZN5Test31A1fEv + // CHECK: call frozen i32 @_ZN5Test31A1fEv return b.f(); } - // CHECK-LABEL: define i32 @_ZN5Test31fEPv + // CHECK-LABEL: define frozen i32 @_ZN5Test31fEPv int f(void *v) { - // CHECK: call i32 @_ZN5Test31A1fEv + // CHECK: call frozen i32 @_ZN5Test31A1fEv return static_cast(v)->f(); } } @@ -78,7 +78,7 @@ void f(B* d) { // CHECK: call void @_ZN5Test41B1fEv static_cast(d)->f(); - // CHECK: call i32 @_ZN5Test41BngEv + // CHECK: call frozen i32 @_ZN5Test41BngEv -static_cast(*d); } } @@ -112,7 +112,7 @@ // not implemented yet. // CHECK: getelementptr // CHECK-NEXT: %[[FUNC:.*]] = load - // CHECK-NEXT: call i32 %[[FUNC]] + // CHECK-NEXT: call frozen i32 %[[FUNC]] -static_cast(*d); } } @@ -154,12 +154,12 @@ virtual int f() {return z;} }; - // CHECK-LABEL: define i32 @_ZN5Test71fEPNS_3zedE + // CHECK-LABEL: define frozen i32 @_ZN5Test71fEPNS_3zedE int f(zed *z) { // CHECK: alloca // CHECK-NEXT: store // CHECK-NEXT: load - // CHECK-NEXT: call i32 @_ZN5Test73zed1fEv + // CHECK-NEXT: call frozen i32 @_ZN5Test73zed1fEv // CHECK-NEXT: ret return static_cast(z)->f(); } @@ -172,10 +172,10 @@ virtual int foo() { return b; } }; struct C final : A, B { }; - // CHECK-LABEL: define i32 @_ZN5Test84testEPNS_1CE + // CHECK-LABEL: define frozen i32 @_ZN5Test84testEPNS_1CE int test(C *c) { // CHECK: %[[THIS:.*]] = phi - // CHECK-NEXT: call i32 @_ZN5Test81B3fooEv(%"struct.Test8::B"* %[[THIS]]) + // CHECK-NEXT: call frozen i32 @_ZN5Test81B3fooEv(%"struct.Test8::B"* frozen %[[THIS]]) return static_cast(c)->foo(); } } @@ -248,9 +248,9 @@ int f() final; }; - // CHECK-LABEL: define i32 @_ZN6Test101fEPNS_1BE + // CHECK-LABEL: define frozen i32 @_ZN6Test101fEPNS_1BE int f(B *b) { - // CHECK: call i32 @_ZN6Test101B1fEv + // CHECK: call frozen i32 @_ZN6Test101B1fEv return static_cast(b)->f(); } } @@ -272,7 +272,7 @@ // CHECK-LABEL: @_ZN9TestVBase4testEv( void test() { - // FIXME: The 'using A' case can be devirtualized to call A's virtual + // FIXME: The 'using A' case can be devirtualized to call A's virtual // adjustment thunk for C::f. // FIXME: The 'using B' case can be devirtualized, but requires us to emit // a derived-to-base or base-to-derived conversion as part of @@ -303,13 +303,13 @@ // CHECK-LABEL: define linkonce_odr void @_ZN6Test111SIiE4foo1Ev( // CHECK: call void @_ZN6Test111SIiE7DerivedclEv( - // CHECK: call zeroext i1 @_ZN6Test111SIiE7DerivedeqERKNS_4BaseE( - // CHECK: call zeroext i1 @_ZN6Test111SIiE7DerivedntEv( - // CHECK: call nonnull align 4 dereferenceable(4) %"class.Test11::Base"* @_ZN6Test111SIiE7DerivedixEi( + // CHECK: call frozen zeroext i1 @_ZN6Test111SIiE7DerivedeqERKNS_4BaseE( + // CHECK: call frozen zeroext i1 @_ZN6Test111SIiE7DerivedntEv( + // CHECK: call frozen nonnull align 4 dereferenceable(4) %"class.Test11::Base"* @_ZN6Test111SIiE7DerivedixEi( // CHECK: define linkonce_odr void @_ZN6Test111SIiE7DerivedclEv( - // CHECK: define linkonce_odr zeroext i1 @_ZN6Test111SIiE7DerivedeqERKNS_4BaseE( - // CHECK: define linkonce_odr zeroext i1 @_ZN6Test111SIiE7DerivedntEv( - // CHECK: define linkonce_odr nonnull align 4 dereferenceable(4) %"class.Test11::Base"* @_ZN6Test111SIiE7DerivedixEi( + // CHECK: define linkonce_odr frozen zeroext i1 @_ZN6Test111SIiE7DerivedeqERKNS_4BaseE( + // CHECK: define linkonce_odr frozen zeroext i1 @_ZN6Test111SIiE7DerivedntEv( + // CHECK: define linkonce_odr frozen nonnull align 4 dereferenceable(4) %"class.Test11::Base"* @_ZN6Test111SIiE7DerivedixEi( class Base { public: virtual void operator()() {} diff --git a/clang/test/CodeGenCXX/devirtualize-virtual-function-calls.cpp b/clang/test/CodeGenCXX/devirtualize-virtual-function-calls.cpp --- a/clang/test/CodeGenCXX/devirtualize-virtual-function-calls.cpp +++ b/clang/test/CodeGenCXX/devirtualize-virtual-function-calls.cpp @@ -15,7 +15,7 @@ void f(A a, A *ap, A& ar) { // This should not be a virtual function call. - // CHECK: call void @_ZN1A1fEv(%struct.A* %a) + // CHECK: call void @_ZN1A1fEv(%struct.A* frozen %a) a.f(); // CHECK: call void % @@ -127,7 +127,7 @@ void f(bar *b) { // CHECK: call void @_ZN5test23foo1fEv - // CHECK: call %"struct.test2::foo"* @_ZN5test23fooD1Ev + // CHECK: call frozen %"struct.test2::foo"* @_ZN5test23fooD1Ev b->foo::f(); b->foo::~foo(); } diff --git a/clang/test/CodeGenCXX/dllexport-ctor-closure.cpp b/clang/test/CodeGenCXX/dllexport-ctor-closure.cpp --- a/clang/test/CodeGenCXX/dllexport-ctor-closure.cpp +++ b/clang/test/CodeGenCXX/dllexport-ctor-closure.cpp @@ -9,7 +9,7 @@ // CHECK: %[[this_addr:.*]] = alloca %struct.CtorWithClosure*, align 4 // CHECK: store %struct.CtorWithClosure* %this, %struct.CtorWithClosure** %[[this_addr]], align 4 // CHECK: %[[this:.*]] = load %struct.CtorWithClosure*, %struct.CtorWithClosure** %[[this_addr]] -// CHECK: call %struct.CtorWithClosure* (%struct.CtorWithClosure*, ...) @"??0CtorWithClosure@@QAA@ZZ"(%struct.CtorWithClosure* %[[this]]) +// CHECK: call frozen %struct.CtorWithClosure* (%struct.CtorWithClosure*, ...) @"??0CtorWithClosure@@QAA@ZZ"(%struct.CtorWithClosure* frozen %[[this]]) // CHECK: ret void }; @@ -32,7 +32,7 @@ // CHECK: %[[this_addr:.*]] = alloca %struct.ClassWithClosure*, align 4 // CHECK: store %struct.ClassWithClosure* %this, %struct.ClassWithClosure** %[[this_addr]], align 4 // CHECK: %[[this:.*]] = load %struct.ClassWithClosure*, %struct.ClassWithClosure** %[[this_addr]] -// CHECK: call %struct.ClassWithClosure* (%struct.ClassWithClosure*, ...) @"??0ClassWithClosure@@QAA@ZZ"(%struct.ClassWithClosure* %[[this]]) +// CHECK: call frozen %struct.ClassWithClosure* (%struct.ClassWithClosure*, ...) @"??0ClassWithClosure@@QAA@ZZ"(%struct.ClassWithClosure* frozen %[[this]]) // CHECK: ret void }; @@ -45,10 +45,10 @@ template struct __declspec(dllexport) TemplateWithClosure; // CHECK-LABEL: define weak_odr dso_local dllexport x86_thiscallcc void @"??_F?$TemplateWithClosure@D@@QAEXXZ"({{.*}}) {{#[0-9]+}} comdat -// CHECK: call {{.*}} @"??0?$TemplateWithClosure@D@@QAE@H@Z"({{.*}}, i32 1) +// CHECK: call {{.*}} @"??0?$TemplateWithClosure@D@@QAE@H@Z"({{.*}}, i32 frozen 1) // CHECK-LABEL: define weak_odr dso_local dllexport x86_thiscallcc void @"??_F?$TemplateWithClosure@H@@QAEXXZ"({{.*}}) {{#[0-9]+}} comdat -// CHECK: call {{.*}} @"??0?$TemplateWithClosure@H@@QAE@H@Z"({{.*}}, i32 4) +// CHECK: call {{.*}} @"??0?$TemplateWithClosure@H@@QAE@H@Z"({{.*}}, i32 frozen 4) struct __declspec(dllexport) NestedOuter { DELETE_IMPLICIT_MEMBERS(NestedOuter); diff --git a/clang/test/CodeGenCXX/dllexport-dtor-thunks.cpp b/clang/test/CodeGenCXX/dllexport-dtor-thunks.cpp --- a/clang/test/CodeGenCXX/dllexport-dtor-thunks.cpp +++ b/clang/test/CodeGenCXX/dllexport-dtor-thunks.cpp @@ -14,4 +14,4 @@ // CHECK: define dso_local dllexport void @"??1C@@UEAA@XZ" // This thunk should *not* be dllexport. -// CHECK: define linkonce_odr dso_local i8* @"??_EC@@W7EAAPEAXI@Z" +// CHECK: define linkonce_odr dso_local frozen i8* @"??_EC@@W7EAAPEAXI@Z" diff --git a/clang/test/CodeGenCXX/dllexport-members.cpp b/clang/test/CodeGenCXX/dllexport-members.cpp --- a/clang/test/CodeGenCXX/dllexport-members.cpp +++ b/clang/test/CodeGenCXX/dllexport-members.cpp @@ -26,22 +26,22 @@ struct ExportMembers { struct Nested; - // M32-DAG: define dso_local dllexport x86_thiscallcc void @"?normalDef@ExportMembers@@QAEXXZ"(%struct.ExportMembers* %this) - // M64-DAG: define dso_local dllexport void @"?normalDef@ExportMembers@@QEAAXXZ"(%struct.ExportMembers* %this) - // M32-DAG: define weak_odr dso_local dllexport x86_thiscallcc void @"?normalInclass@ExportMembers@@QAEXXZ"(%struct.ExportMembers* %this) - // M64-DAG: define weak_odr dso_local dllexport void @"?normalInclass@ExportMembers@@QEAAXXZ"(%struct.ExportMembers* %this) - // M32-DAG: define weak_odr dso_local dllexport x86_thiscallcc void @"?normalInlineDef@ExportMembers@@QAEXXZ"(%struct.ExportMembers* %this) - // M64-DAG: define weak_odr dso_local dllexport void @"?normalInlineDef@ExportMembers@@QEAAXXZ"(%struct.ExportMembers* %this) - // M32-DAG: define weak_odr dso_local dllexport x86_thiscallcc void @"?normalInlineDecl@ExportMembers@@QAEXXZ"(%struct.ExportMembers* %this) - // M64-DAG: define weak_odr dso_local dllexport void @"?normalInlineDecl@ExportMembers@@QEAAXXZ"(%struct.ExportMembers* %this) - // G32-DAG: define dso_local dllexport x86_thiscallcc void @_ZN13ExportMembers9normalDefEv(%struct.ExportMembers* %this) - // G64-DAG: define dso_local dllexport void @_ZN13ExportMembers9normalDefEv(%struct.ExportMembers* %this) - // G32-DAG: define weak_odr dso_local dllexport x86_thiscallcc void @_ZN13ExportMembers13normalInclassEv(%struct.ExportMembers* %this) - // G64-DAG: define weak_odr dso_local dllexport void @_ZN13ExportMembers13normalInclassEv(%struct.ExportMembers* %this) - // G32-DAG: define weak_odr dso_local dllexport x86_thiscallcc void @_ZN13ExportMembers15normalInlineDefEv(%struct.ExportMembers* %this) - // G64-DAG: define weak_odr dso_local dllexport void @_ZN13ExportMembers15normalInlineDefEv(%struct.ExportMembers* %this) - // G32-DAG: define weak_odr dso_local dllexport x86_thiscallcc void @_ZN13ExportMembers16normalInlineDeclEv(%struct.ExportMembers* %this) - // G64-DAG: define weak_odr dso_local dllexport void @_ZN13ExportMembers16normalInlineDeclEv(%struct.ExportMembers* %this) + // M32-DAG: define dso_local dllexport x86_thiscallcc void @"?normalDef@ExportMembers@@QAEXXZ"(%struct.ExportMembers* frozen %this) + // M64-DAG: define dso_local dllexport void @"?normalDef@ExportMembers@@QEAAXXZ"(%struct.ExportMembers* frozen %this) + // M32-DAG: define weak_odr dso_local dllexport x86_thiscallcc void @"?normalInclass@ExportMembers@@QAEXXZ"(%struct.ExportMembers* frozen %this) + // M64-DAG: define weak_odr dso_local dllexport void @"?normalInclass@ExportMembers@@QEAAXXZ"(%struct.ExportMembers* frozen %this) + // M32-DAG: define weak_odr dso_local dllexport x86_thiscallcc void @"?normalInlineDef@ExportMembers@@QAEXXZ"(%struct.ExportMembers* frozen %this) + // M64-DAG: define weak_odr dso_local dllexport void @"?normalInlineDef@ExportMembers@@QEAAXXZ"(%struct.ExportMembers* frozen %this) + // M32-DAG: define weak_odr dso_local dllexport x86_thiscallcc void @"?normalInlineDecl@ExportMembers@@QAEXXZ"(%struct.ExportMembers* frozen %this) + // M64-DAG: define weak_odr dso_local dllexport void @"?normalInlineDecl@ExportMembers@@QEAAXXZ"(%struct.ExportMembers* frozen %this) + // G32-DAG: define dso_local dllexport x86_thiscallcc void @_ZN13ExportMembers9normalDefEv(%struct.ExportMembers* frozen %this) + // G64-DAG: define dso_local dllexport void @_ZN13ExportMembers9normalDefEv(%struct.ExportMembers* frozen %this) + // G32-DAG: define weak_odr dso_local dllexport x86_thiscallcc void @_ZN13ExportMembers13normalInclassEv(%struct.ExportMembers* frozen %this) + // G64-DAG: define weak_odr dso_local dllexport void @_ZN13ExportMembers13normalInclassEv(%struct.ExportMembers* frozen %this) + // G32-DAG: define weak_odr dso_local dllexport x86_thiscallcc void @_ZN13ExportMembers15normalInlineDefEv(%struct.ExportMembers* frozen %this) + // G64-DAG: define weak_odr dso_local dllexport void @_ZN13ExportMembers15normalInlineDefEv(%struct.ExportMembers* frozen %this) + // G32-DAG: define weak_odr dso_local dllexport x86_thiscallcc void @_ZN13ExportMembers16normalInlineDeclEv(%struct.ExportMembers* frozen %this) + // G64-DAG: define weak_odr dso_local dllexport void @_ZN13ExportMembers16normalInlineDeclEv(%struct.ExportMembers* frozen %this) // M32-DAG: define linkonce_odr dso_local x86_thiscallcc void @"?referencedNonExportedInClass@ExportMembers@@QAEXXZ" __declspec(dllexport) void normalDef(); __declspec(dllexport) void normalInclass() { referencedNonExportedInClass(); } @@ -49,22 +49,22 @@ __declspec(dllexport) inline void normalInlineDecl(); void referencedNonExportedInClass() {} - // M32-DAG: define dso_local dllexport x86_thiscallcc void @"?virtualDef@ExportMembers@@UAEXXZ"(%struct.ExportMembers* %this) - // M64-DAG: define dso_local dllexport void @"?virtualDef@ExportMembers@@UEAAXXZ"(%struct.ExportMembers* %this) - // M32-DAG: define weak_odr dso_local dllexport x86_thiscallcc void @"?virtualInclass@ExportMembers@@UAEXXZ"(%struct.ExportMembers* %this) - // M64-DAG: define weak_odr dso_local dllexport void @"?virtualInclass@ExportMembers@@UEAAXXZ"(%struct.ExportMembers* %this) - // M32-DAG: define weak_odr dso_local dllexport x86_thiscallcc void @"?virtualInlineDef@ExportMembers@@UAEXXZ"(%struct.ExportMembers* %this) - // M64-DAG: define weak_odr dso_local dllexport void @"?virtualInlineDef@ExportMembers@@UEAAXXZ"(%struct.ExportMembers* %this) - // M32-DAG: define weak_odr dso_local dllexport x86_thiscallcc void @"?virtualInlineDecl@ExportMembers@@UAEXXZ"(%struct.ExportMembers* %this) - // M64-DAG: define weak_odr dso_local dllexport void @"?virtualInlineDecl@ExportMembers@@UEAAXXZ"(%struct.ExportMembers* %this) - // G32-DAG: define dso_local dllexport x86_thiscallcc void @_ZN13ExportMembers10virtualDefEv(%struct.ExportMembers* %this) - // G64-DAG: define dso_local dllexport void @_ZN13ExportMembers10virtualDefEv(%struct.ExportMembers* %this) - // G32-DAG: define weak_odr dso_local dllexport x86_thiscallcc void @_ZN13ExportMembers14virtualInclassEv(%struct.ExportMembers* %this) - // G64-DAG: define weak_odr dso_local dllexport void @_ZN13ExportMembers14virtualInclassEv(%struct.ExportMembers* %this) - // G32-DAG: define weak_odr dso_local dllexport x86_thiscallcc void @_ZN13ExportMembers16virtualInlineDefEv(%struct.ExportMembers* %this) - // G64-DAG: define weak_odr dso_local dllexport void @_ZN13ExportMembers16virtualInlineDefEv(%struct.ExportMembers* %this) - // G32-DAG: define weak_odr dso_local dllexport x86_thiscallcc void @_ZN13ExportMembers17virtualInlineDeclEv(%struct.ExportMembers* %this) - // G64-DAG: define weak_odr dso_local dllexport void @_ZN13ExportMembers17virtualInlineDeclEv(%struct.ExportMembers* %this) + // M32-DAG: define dso_local dllexport x86_thiscallcc void @"?virtualDef@ExportMembers@@UAEXXZ"(%struct.ExportMembers* frozen %this) + // M64-DAG: define dso_local dllexport void @"?virtualDef@ExportMembers@@UEAAXXZ"(%struct.ExportMembers* frozen %this) + // M32-DAG: define weak_odr dso_local dllexport x86_thiscallcc void @"?virtualInclass@ExportMembers@@UAEXXZ"(%struct.ExportMembers* frozen %this) + // M64-DAG: define weak_odr dso_local dllexport void @"?virtualInclass@ExportMembers@@UEAAXXZ"(%struct.ExportMembers* frozen %this) + // M32-DAG: define weak_odr dso_local dllexport x86_thiscallcc void @"?virtualInlineDef@ExportMembers@@UAEXXZ"(%struct.ExportMembers* frozen %this) + // M64-DAG: define weak_odr dso_local dllexport void @"?virtualInlineDef@ExportMembers@@UEAAXXZ"(%struct.ExportMembers* frozen %this) + // M32-DAG: define weak_odr dso_local dllexport x86_thiscallcc void @"?virtualInlineDecl@ExportMembers@@UAEXXZ"(%struct.ExportMembers* frozen %this) + // M64-DAG: define weak_odr dso_local dllexport void @"?virtualInlineDecl@ExportMembers@@UEAAXXZ"(%struct.ExportMembers* frozen %this) + // G32-DAG: define dso_local dllexport x86_thiscallcc void @_ZN13ExportMembers10virtualDefEv(%struct.ExportMembers* frozen %this) + // G64-DAG: define dso_local dllexport void @_ZN13ExportMembers10virtualDefEv(%struct.ExportMembers* frozen %this) + // G32-DAG: define weak_odr dso_local dllexport x86_thiscallcc void @_ZN13ExportMembers14virtualInclassEv(%struct.ExportMembers* frozen %this) + // G64-DAG: define weak_odr dso_local dllexport void @_ZN13ExportMembers14virtualInclassEv(%struct.ExportMembers* frozen %this) + // G32-DAG: define weak_odr dso_local dllexport x86_thiscallcc void @_ZN13ExportMembers16virtualInlineDefEv(%struct.ExportMembers* frozen %this) + // G64-DAG: define weak_odr dso_local dllexport void @_ZN13ExportMembers16virtualInlineDefEv(%struct.ExportMembers* frozen %this) + // G32-DAG: define weak_odr dso_local dllexport x86_thiscallcc void @_ZN13ExportMembers17virtualInlineDeclEv(%struct.ExportMembers* frozen %this) + // G64-DAG: define weak_odr dso_local dllexport void @_ZN13ExportMembers17virtualInlineDeclEv(%struct.ExportMembers* frozen %this) __declspec(dllexport) virtual void virtualDef(); __declspec(dllexport) virtual void virtualInclass() {} __declspec(dllexport) virtual void virtualInlineDef(); @@ -83,30 +83,30 @@ __declspec(dllexport) static void staticInlineDef(); __declspec(dllexport) static inline void staticInlineDecl(); - // M32-DAG: define dso_local dllexport x86_thiscallcc void @"?protectedDef@ExportMembers@@IAEXXZ"(%struct.ExportMembers* %this) - // M64-DAG: define dso_local dllexport void @"?protectedDef@ExportMembers@@IEAAXXZ"(%struct.ExportMembers* %this) - // G32-DAG: define dso_local dllexport x86_thiscallcc void @_ZN13ExportMembers12protectedDefEv(%struct.ExportMembers* %this) - // G64-DAG: define dso_local dllexport void @_ZN13ExportMembers12protectedDefEv(%struct.ExportMembers* %this) + // M32-DAG: define dso_local dllexport x86_thiscallcc void @"?protectedDef@ExportMembers@@IAEXXZ"(%struct.ExportMembers* frozen %this) + // M64-DAG: define dso_local dllexport void @"?protectedDef@ExportMembers@@IEAAXXZ"(%struct.ExportMembers* frozen %this) + // G32-DAG: define dso_local dllexport x86_thiscallcc void @_ZN13ExportMembers12protectedDefEv(%struct.ExportMembers* frozen %this) + // G64-DAG: define dso_local dllexport void @_ZN13ExportMembers12protectedDefEv(%struct.ExportMembers* frozen %this) // MSC-DAG: define dso_local dllexport void @"?protectedStaticDef@ExportMembers@@KAXXZ"() // GNU-DAG: define dso_local dllexport void @_ZN13ExportMembers18protectedStaticDefEv() protected: __declspec(dllexport) void protectedDef(); __declspec(dllexport) static void protectedStaticDef(); - // M32-DAG: define dso_local dllexport x86_thiscallcc void @"?privateDef@ExportMembers@@AAEXXZ"(%struct.ExportMembers* %this) - // M64-DAG: define dso_local dllexport void @"?privateDef@ExportMembers@@AEAAXXZ"(%struct.ExportMembers* %this) - // G32-DAG: define dso_local dllexport x86_thiscallcc void @_ZN13ExportMembers10privateDefEv(%struct.ExportMembers* %this) - // G64-DAG: define dso_local dllexport void @_ZN13ExportMembers10privateDefEv(%struct.ExportMembers* %this) + // M32-DAG: define dso_local dllexport x86_thiscallcc void @"?privateDef@ExportMembers@@AAEXXZ"(%struct.ExportMembers* frozen %this) + // M64-DAG: define dso_local dllexport void @"?privateDef@ExportMembers@@AEAAXXZ"(%struct.ExportMembers* frozen %this) + // G32-DAG: define dso_local dllexport x86_thiscallcc void @_ZN13ExportMembers10privateDefEv(%struct.ExportMembers* frozen %this) + // G64-DAG: define dso_local dllexport void @_ZN13ExportMembers10privateDefEv(%struct.ExportMembers* frozen %this) // MSC-DAG: define dso_local dllexport void @"?privateStaticDef@ExportMembers@@CAXXZ"() // GNU-DAG: define dso_local dllexport void @_ZN13ExportMembers16privateStaticDefEv() private: __declspec(dllexport) void privateDef(); __declspec(dllexport) static void privateStaticDef(); - // M32-DAG: define dso_local x86_thiscallcc void @"?ignored@ExportMembers@@QAEXXZ"(%struct.ExportMembers* %this) - // M64-DAG: define dso_local void @"?ignored@ExportMembers@@QEAAXXZ"(%struct.ExportMembers* %this) - // G32-DAG: define dso_local x86_thiscallcc void @_ZN13ExportMembers7ignoredEv(%struct.ExportMembers* %this) - // G64-DAG: define dso_local void @_ZN13ExportMembers7ignoredEv(%struct.ExportMembers* %this) + // M32-DAG: define dso_local x86_thiscallcc void @"?ignored@ExportMembers@@QAEXXZ"(%struct.ExportMembers* frozen %this) + // M64-DAG: define dso_local void @"?ignored@ExportMembers@@QEAAXXZ"(%struct.ExportMembers* frozen %this) + // G32-DAG: define dso_local x86_thiscallcc void @_ZN13ExportMembers7ignoredEv(%struct.ExportMembers* frozen %this) + // G64-DAG: define dso_local void @_ZN13ExportMembers7ignoredEv(%struct.ExportMembers* frozen %this) public: void ignored(); @@ -154,43 +154,43 @@ // Export individual members of a nested class. struct ExportMembers::Nested { - // M32-DAG: define dso_local dllexport x86_thiscallcc void @"?normalDef@Nested@ExportMembers@@QAEXXZ"(%"struct.ExportMembers::Nested"* %this) - // M64-DAG: define dso_local dllexport void @"?normalDef@Nested@ExportMembers@@QEAAXXZ"(%"struct.ExportMembers::Nested"* %this) - // M32-DAG: define weak_odr dso_local dllexport x86_thiscallcc void @"?normalInclass@Nested@ExportMembers@@QAEXXZ"(%"struct.ExportMembers::Nested"* %this) - // M64-DAG: define weak_odr dso_local dllexport void @"?normalInclass@Nested@ExportMembers@@QEAAXXZ"(%"struct.ExportMembers::Nested"* %this) - // M32-DAG: define weak_odr dso_local dllexport x86_thiscallcc void @"?normalInlineDef@Nested@ExportMembers@@QAEXXZ"(%"struct.ExportMembers::Nested"* %this) - // M64-DAG: define weak_odr dso_local dllexport void @"?normalInlineDef@Nested@ExportMembers@@QEAAXXZ"(%"struct.ExportMembers::Nested"* %this) - // M32-DAG: define weak_odr dso_local dllexport x86_thiscallcc void @"?normalInlineDecl@Nested@ExportMembers@@QAEXXZ"(%"struct.ExportMembers::Nested"* %this) - // M64-DAG: define weak_odr dso_local dllexport void @"?normalInlineDecl@Nested@ExportMembers@@QEAAXXZ"(%"struct.ExportMembers::Nested"* %this) - // G32-DAG: define dso_local dllexport x86_thiscallcc void @_ZN13ExportMembers6Nested9normalDefEv(%"struct.ExportMembers::Nested"* %this) - // G64-DAG: define dso_local dllexport void @_ZN13ExportMembers6Nested9normalDefEv(%"struct.ExportMembers::Nested"* %this) - // G32-DAG: define weak_odr dso_local dllexport x86_thiscallcc void @_ZN13ExportMembers6Nested13normalInclassEv(%"struct.ExportMembers::Nested"* %this) - // G64-DAG: define weak_odr dso_local dllexport void @_ZN13ExportMembers6Nested13normalInclassEv(%"struct.ExportMembers::Nested"* %this) - // G32-DAG: define weak_odr dso_local dllexport x86_thiscallcc void @_ZN13ExportMembers6Nested15normalInlineDefEv(%"struct.ExportMembers::Nested"* %this) - // G64-DAG: define weak_odr dso_local dllexport void @_ZN13ExportMembers6Nested15normalInlineDefEv(%"struct.ExportMembers::Nested"* %this) - // G32-DAG: define weak_odr dso_local dllexport x86_thiscallcc void @_ZN13ExportMembers6Nested16normalInlineDeclEv(%"struct.ExportMembers::Nested"* %this) - // G64-DAG: define weak_odr dso_local dllexport void @_ZN13ExportMembers6Nested16normalInlineDeclEv(%"struct.ExportMembers::Nested"* %this) + // M32-DAG: define dso_local dllexport x86_thiscallcc void @"?normalDef@Nested@ExportMembers@@QAEXXZ"(%"struct.ExportMembers::Nested"* frozen %this) + // M64-DAG: define dso_local dllexport void @"?normalDef@Nested@ExportMembers@@QEAAXXZ"(%"struct.ExportMembers::Nested"* frozen %this) + // M32-DAG: define weak_odr dso_local dllexport x86_thiscallcc void @"?normalInclass@Nested@ExportMembers@@QAEXXZ"(%"struct.ExportMembers::Nested"* frozen %this) + // M64-DAG: define weak_odr dso_local dllexport void @"?normalInclass@Nested@ExportMembers@@QEAAXXZ"(%"struct.ExportMembers::Nested"* frozen %this) + // M32-DAG: define weak_odr dso_local dllexport x86_thiscallcc void @"?normalInlineDef@Nested@ExportMembers@@QAEXXZ"(%"struct.ExportMembers::Nested"* frozen %this) + // M64-DAG: define weak_odr dso_local dllexport void @"?normalInlineDef@Nested@ExportMembers@@QEAAXXZ"(%"struct.ExportMembers::Nested"* frozen %this) + // M32-DAG: define weak_odr dso_local dllexport x86_thiscallcc void @"?normalInlineDecl@Nested@ExportMembers@@QAEXXZ"(%"struct.ExportMembers::Nested"* frozen %this) + // M64-DAG: define weak_odr dso_local dllexport void @"?normalInlineDecl@Nested@ExportMembers@@QEAAXXZ"(%"struct.ExportMembers::Nested"* frozen %this) + // G32-DAG: define dso_local dllexport x86_thiscallcc void @_ZN13ExportMembers6Nested9normalDefEv(%"struct.ExportMembers::Nested"* frozen %this) + // G64-DAG: define dso_local dllexport void @_ZN13ExportMembers6Nested9normalDefEv(%"struct.ExportMembers::Nested"* frozen %this) + // G32-DAG: define weak_odr dso_local dllexport x86_thiscallcc void @_ZN13ExportMembers6Nested13normalInclassEv(%"struct.ExportMembers::Nested"* frozen %this) + // G64-DAG: define weak_odr dso_local dllexport void @_ZN13ExportMembers6Nested13normalInclassEv(%"struct.ExportMembers::Nested"* frozen %this) + // G32-DAG: define weak_odr dso_local dllexport x86_thiscallcc void @_ZN13ExportMembers6Nested15normalInlineDefEv(%"struct.ExportMembers::Nested"* frozen %this) + // G64-DAG: define weak_odr dso_local dllexport void @_ZN13ExportMembers6Nested15normalInlineDefEv(%"struct.ExportMembers::Nested"* frozen %this) + // G32-DAG: define weak_odr dso_local dllexport x86_thiscallcc void @_ZN13ExportMembers6Nested16normalInlineDeclEv(%"struct.ExportMembers::Nested"* frozen %this) + // G64-DAG: define weak_odr dso_local dllexport void @_ZN13ExportMembers6Nested16normalInlineDeclEv(%"struct.ExportMembers::Nested"* frozen %this) __declspec(dllexport) void normalDef(); __declspec(dllexport) void normalInclass() {} __declspec(dllexport) void normalInlineDef(); __declspec(dllexport) inline void normalInlineDecl(); - // M32-DAG: define dso_local dllexport x86_thiscallcc void @"?virtualDef@Nested@ExportMembers@@UAEXXZ"(%"struct.ExportMembers::Nested"* %this) - // M64-DAG: define dso_local dllexport void @"?virtualDef@Nested@ExportMembers@@UEAAXXZ"(%"struct.ExportMembers::Nested"* %this) - // M32-DAG: define weak_odr dso_local dllexport x86_thiscallcc void @"?virtualInclass@Nested@ExportMembers@@UAEXXZ"(%"struct.ExportMembers::Nested"* %this) - // M64-DAG: define weak_odr dso_local dllexport void @"?virtualInclass@Nested@ExportMembers@@UEAAXXZ"(%"struct.ExportMembers::Nested"* %this) - // M32-DAG: define weak_odr dso_local dllexport x86_thiscallcc void @"?virtualInlineDef@Nested@ExportMembers@@UAEXXZ"(%"struct.ExportMembers::Nested"* %this) - // M64-DAG: define weak_odr dso_local dllexport void @"?virtualInlineDef@Nested@ExportMembers@@UEAAXXZ"(%"struct.ExportMembers::Nested"* %this) - // M32-DAG: define weak_odr dso_local dllexport x86_thiscallcc void @"?virtualInlineDecl@Nested@ExportMembers@@UAEXXZ"(%"struct.ExportMembers::Nested"* %this) - // M64-DAG: define weak_odr dso_local dllexport void @"?virtualInlineDecl@Nested@ExportMembers@@UEAAXXZ"(%"struct.ExportMembers::Nested"* %this) - // G32-DAG: define dso_local dllexport x86_thiscallcc void @_ZN13ExportMembers6Nested10virtualDefEv(%"struct.ExportMembers::Nested"* %this) - // G64-DAG: define dso_local dllexport void @_ZN13ExportMembers6Nested10virtualDefEv(%"struct.ExportMembers::Nested"* %this) - // G32-DAG: define weak_odr dso_local dllexport x86_thiscallcc void @_ZN13ExportMembers6Nested14virtualInclassEv(%"struct.ExportMembers::Nested"* %this) - // G64-DAG: define weak_odr dso_local dllexport void @_ZN13ExportMembers6Nested14virtualInclassEv(%"struct.ExportMembers::Nested"* %this) - // G32-DAG: define weak_odr dso_local dllexport x86_thiscallcc void @_ZN13ExportMembers6Nested16virtualInlineDefEv(%"struct.ExportMembers::Nested"* %this) - // G64-DAG: define weak_odr dso_local dllexport void @_ZN13ExportMembers6Nested16virtualInlineDefEv(%"struct.ExportMembers::Nested"* %this) - // G32-DAG: define weak_odr dso_local dllexport x86_thiscallcc void @_ZN13ExportMembers6Nested17virtualInlineDeclEv(%"struct.ExportMembers::Nested"* %this) - // G64-DAG: define weak_odr dso_local dllexport void @_ZN13ExportMembers6Nested17virtualInlineDeclEv(%"struct.ExportMembers::Nested"* %this) + // M32-DAG: define dso_local dllexport x86_thiscallcc void @"?virtualDef@Nested@ExportMembers@@UAEXXZ"(%"struct.ExportMembers::Nested"* frozen %this) + // M64-DAG: define dso_local dllexport void @"?virtualDef@Nested@ExportMembers@@UEAAXXZ"(%"struct.ExportMembers::Nested"* frozen %this) + // M32-DAG: define weak_odr dso_local dllexport x86_thiscallcc void @"?virtualInclass@Nested@ExportMembers@@UAEXXZ"(%"struct.ExportMembers::Nested"* frozen %this) + // M64-DAG: define weak_odr dso_local dllexport void @"?virtualInclass@Nested@ExportMembers@@UEAAXXZ"(%"struct.ExportMembers::Nested"* frozen %this) + // M32-DAG: define weak_odr dso_local dllexport x86_thiscallcc void @"?virtualInlineDef@Nested@ExportMembers@@UAEXXZ"(%"struct.ExportMembers::Nested"* frozen %this) + // M64-DAG: define weak_odr dso_local dllexport void @"?virtualInlineDef@Nested@ExportMembers@@UEAAXXZ"(%"struct.ExportMembers::Nested"* frozen %this) + // M32-DAG: define weak_odr dso_local dllexport x86_thiscallcc void @"?virtualInlineDecl@Nested@ExportMembers@@UAEXXZ"(%"struct.ExportMembers::Nested"* frozen %this) + // M64-DAG: define weak_odr dso_local dllexport void @"?virtualInlineDecl@Nested@ExportMembers@@UEAAXXZ"(%"struct.ExportMembers::Nested"* frozen %this) + // G32-DAG: define dso_local dllexport x86_thiscallcc void @_ZN13ExportMembers6Nested10virtualDefEv(%"struct.ExportMembers::Nested"* frozen %this) + // G64-DAG: define dso_local dllexport void @_ZN13ExportMembers6Nested10virtualDefEv(%"struct.ExportMembers::Nested"* frozen %this) + // G32-DAG: define weak_odr dso_local dllexport x86_thiscallcc void @_ZN13ExportMembers6Nested14virtualInclassEv(%"struct.ExportMembers::Nested"* frozen %this) + // G64-DAG: define weak_odr dso_local dllexport void @_ZN13ExportMembers6Nested14virtualInclassEv(%"struct.ExportMembers::Nested"* frozen %this) + // G32-DAG: define weak_odr dso_local dllexport x86_thiscallcc void @_ZN13ExportMembers6Nested16virtualInlineDefEv(%"struct.ExportMembers::Nested"* frozen %this) + // G64-DAG: define weak_odr dso_local dllexport void @_ZN13ExportMembers6Nested16virtualInlineDefEv(%"struct.ExportMembers::Nested"* frozen %this) + // G32-DAG: define weak_odr dso_local dllexport x86_thiscallcc void @_ZN13ExportMembers6Nested17virtualInlineDeclEv(%"struct.ExportMembers::Nested"* frozen %this) + // G64-DAG: define weak_odr dso_local dllexport void @_ZN13ExportMembers6Nested17virtualInlineDeclEv(%"struct.ExportMembers::Nested"* frozen %this) __declspec(dllexport) virtual void virtualDef(); __declspec(dllexport) virtual void virtualInclass() {} __declspec(dllexport) virtual void virtualInlineDef(); @@ -209,30 +209,30 @@ __declspec(dllexport) static void staticInlineDef(); __declspec(dllexport) static inline void staticInlineDecl(); - // M32-DAG: define dso_local dllexport x86_thiscallcc void @"?protectedDef@Nested@ExportMembers@@IAEXXZ"(%"struct.ExportMembers::Nested"* %this) - // M64-DAG: define dso_local dllexport void @"?protectedDef@Nested@ExportMembers@@IEAAXXZ"(%"struct.ExportMembers::Nested"* %this) - // G32-DAG: define dso_local dllexport x86_thiscallcc void @_ZN13ExportMembers6Nested12protectedDefEv(%"struct.ExportMembers::Nested"* %this) - // G64-DAG: define dso_local dllexport void @_ZN13ExportMembers6Nested12protectedDefEv(%"struct.ExportMembers::Nested"* %this) + // M32-DAG: define dso_local dllexport x86_thiscallcc void @"?protectedDef@Nested@ExportMembers@@IAEXXZ"(%"struct.ExportMembers::Nested"* frozen %this) + // M64-DAG: define dso_local dllexport void @"?protectedDef@Nested@ExportMembers@@IEAAXXZ"(%"struct.ExportMembers::Nested"* frozen %this) + // G32-DAG: define dso_local dllexport x86_thiscallcc void @_ZN13ExportMembers6Nested12protectedDefEv(%"struct.ExportMembers::Nested"* frozen %this) + // G64-DAG: define dso_local dllexport void @_ZN13ExportMembers6Nested12protectedDefEv(%"struct.ExportMembers::Nested"* frozen %this) // MSC-DAG: define dso_local dllexport void @"?protectedStaticDef@Nested@ExportMembers@@KAXXZ"() // GNU-DAG: define dso_local dllexport void @_ZN13ExportMembers6Nested18protectedStaticDefEv() protected: __declspec(dllexport) void protectedDef(); __declspec(dllexport) static void protectedStaticDef(); - // M32-DAG: define dso_local dllexport x86_thiscallcc void @"?privateDef@Nested@ExportMembers@@AAEXXZ"(%"struct.ExportMembers::Nested"* %this) - // M64-DAG: define dso_local dllexport void @"?privateDef@Nested@ExportMembers@@AEAAXXZ"(%"struct.ExportMembers::Nested"* %this) - // G32-DAG: define dso_local dllexport x86_thiscallcc void @_ZN13ExportMembers6Nested10privateDefEv(%"struct.ExportMembers::Nested"* %this) - // G64-DAG: define dso_local dllexport void @_ZN13ExportMembers6Nested10privateDefEv(%"struct.ExportMembers::Nested"* %this) + // M32-DAG: define dso_local dllexport x86_thiscallcc void @"?privateDef@Nested@ExportMembers@@AAEXXZ"(%"struct.ExportMembers::Nested"* frozen %this) + // M64-DAG: define dso_local dllexport void @"?privateDef@Nested@ExportMembers@@AEAAXXZ"(%"struct.ExportMembers::Nested"* frozen %this) + // G32-DAG: define dso_local dllexport x86_thiscallcc void @_ZN13ExportMembers6Nested10privateDefEv(%"struct.ExportMembers::Nested"* frozen %this) + // G64-DAG: define dso_local dllexport void @_ZN13ExportMembers6Nested10privateDefEv(%"struct.ExportMembers::Nested"* frozen %this) // MSC-DAG: define dso_local dllexport void @"?privateStaticDef@Nested@ExportMembers@@CAXXZ"() // GNU-DAG: define dso_local dllexport void @_ZN13ExportMembers6Nested16privateStaticDefEv() private: __declspec(dllexport) void privateDef(); __declspec(dllexport) static void privateStaticDef(); - // M32-DAG: define dso_local x86_thiscallcc void @"?ignored@Nested@ExportMembers@@QAEXXZ"(%"struct.ExportMembers::Nested"* %this) - // M64-DAG: define dso_local void @"?ignored@Nested@ExportMembers@@QEAAXXZ"(%"struct.ExportMembers::Nested"* %this) - // G32-DAG: define dso_local x86_thiscallcc void @_ZN13ExportMembers6Nested7ignoredEv(%"struct.ExportMembers::Nested"* %this) - // G64-DAG: define dso_local void @_ZN13ExportMembers6Nested7ignoredEv(%"struct.ExportMembers::Nested"* %this) + // M32-DAG: define dso_local x86_thiscallcc void @"?ignored@Nested@ExportMembers@@QAEXXZ"(%"struct.ExportMembers::Nested"* frozen %this) + // M64-DAG: define dso_local void @"?ignored@Nested@ExportMembers@@QEAAXXZ"(%"struct.ExportMembers::Nested"* frozen %this) + // G32-DAG: define dso_local x86_thiscallcc void @_ZN13ExportMembers6Nested7ignoredEv(%"struct.ExportMembers::Nested"* frozen %this) + // G64-DAG: define dso_local void @_ZN13ExportMembers6Nested7ignoredEv(%"struct.ExportMembers::Nested"* frozen %this) public: void ignored(); @@ -280,48 +280,48 @@ // Export special member functions. struct ExportSpecials { - // M32-DAG: define dso_local dllexport x86_thiscallcc %struct.ExportSpecials* @"??0ExportSpecials@@QAE@XZ"(%struct.ExportSpecials* returned %this) - // M64-DAG: define dso_local dllexport %struct.ExportSpecials* @"??0ExportSpecials@@QEAA@XZ"(%struct.ExportSpecials* returned %this) - // G32-DAG: define dso_local dllexport x86_thiscallcc void @_ZN14ExportSpecialsC1Ev(%struct.ExportSpecials* %this) - // G64-DAG: define dso_local dllexport void @_ZN14ExportSpecialsC1Ev(%struct.ExportSpecials* %this) - // G32-DAG: define dso_local dllexport x86_thiscallcc void @_ZN14ExportSpecialsC2Ev(%struct.ExportSpecials* %this) - // G64-DAG: define dso_local dllexport void @_ZN14ExportSpecialsC2Ev(%struct.ExportSpecials* %this) + // M32-DAG: define dso_local dllexport x86_thiscallcc frozen %struct.ExportSpecials* @"??0ExportSpecials@@QAE@XZ"(%struct.ExportSpecials* frozen returned %this) + // M64-DAG: define dso_local dllexport frozen %struct.ExportSpecials* @"??0ExportSpecials@@QEAA@XZ"(%struct.ExportSpecials* frozen returned %this) + // G32-DAG: define dso_local dllexport x86_thiscallcc void @_ZN14ExportSpecialsC1Ev(%struct.ExportSpecials* frozen %this) + // G64-DAG: define dso_local dllexport void @_ZN14ExportSpecialsC1Ev(%struct.ExportSpecials* frozen %this) + // G32-DAG: define dso_local dllexport x86_thiscallcc void @_ZN14ExportSpecialsC2Ev(%struct.ExportSpecials* frozen %this) + // G64-DAG: define dso_local dllexport void @_ZN14ExportSpecialsC2Ev(%struct.ExportSpecials* frozen %this) __declspec(dllexport) ExportSpecials(); - // M32-DAG: define dso_local dllexport x86_thiscallcc void @"??1ExportSpecials@@QAE@XZ"(%struct.ExportSpecials* %this) - // M64-DAG: define dso_local dllexport void @"??1ExportSpecials@@QEAA@XZ"(%struct.ExportSpecials* %this) - // G32-DAG: define dso_local dllexport x86_thiscallcc void @_ZN14ExportSpecialsD1Ev(%struct.ExportSpecials* %this) - // G64-DAG: define dso_local dllexport void @_ZN14ExportSpecialsD1Ev(%struct.ExportSpecials* %this) - // G32-DAG: define dso_local dllexport x86_thiscallcc void @_ZN14ExportSpecialsD2Ev(%struct.ExportSpecials* %this) - // G64-DAG: define dso_local dllexport void @_ZN14ExportSpecialsD2Ev(%struct.ExportSpecials* %this) + // M32-DAG: define dso_local dllexport x86_thiscallcc void @"??1ExportSpecials@@QAE@XZ"(%struct.ExportSpecials* frozen %this) + // M64-DAG: define dso_local dllexport void @"??1ExportSpecials@@QEAA@XZ"(%struct.ExportSpecials* frozen %this) + // G32-DAG: define dso_local dllexport x86_thiscallcc void @_ZN14ExportSpecialsD1Ev(%struct.ExportSpecials* frozen %this) + // G64-DAG: define dso_local dllexport void @_ZN14ExportSpecialsD1Ev(%struct.ExportSpecials* frozen %this) + // G32-DAG: define dso_local dllexport x86_thiscallcc void @_ZN14ExportSpecialsD2Ev(%struct.ExportSpecials* frozen %this) + // G64-DAG: define dso_local dllexport void @_ZN14ExportSpecialsD2Ev(%struct.ExportSpecials* frozen %this) __declspec(dllexport) ~ExportSpecials(); - // M32-DAG: define dso_local dllexport x86_thiscallcc %struct.ExportSpecials* @"??0ExportSpecials@@QAE@ABU0@@Z"(%struct.ExportSpecials* returned %this, %struct.ExportSpecials* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) - // M64-DAG: define dso_local dllexport %struct.ExportSpecials* @"??0ExportSpecials@@QEAA@AEBU0@@Z"(%struct.ExportSpecials* returned %this, %struct.ExportSpecials* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) - // G32-DAG: define dso_local dllexport x86_thiscallcc void @_ZN14ExportSpecialsC1ERKS_(%struct.ExportSpecials* %this, %struct.ExportSpecials* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) - // G64-DAG: define dso_local dllexport void @_ZN14ExportSpecialsC1ERKS_(%struct.ExportSpecials* %this, %struct.ExportSpecials* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) - // G32-DAG: define dso_local dllexport x86_thiscallcc void @_ZN14ExportSpecialsC2ERKS_(%struct.ExportSpecials* %this, %struct.ExportSpecials* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) - // G64-DAG: define dso_local dllexport void @_ZN14ExportSpecialsC2ERKS_(%struct.ExportSpecials* %this, %struct.ExportSpecials* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) + // M32-DAG: define dso_local dllexport x86_thiscallcc frozen %struct.ExportSpecials* @"??0ExportSpecials@@QAE@ABU0@@Z"(%struct.ExportSpecials* frozen returned %this, %struct.ExportSpecials* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) + // M64-DAG: define dso_local dllexport frozen %struct.ExportSpecials* @"??0ExportSpecials@@QEAA@AEBU0@@Z"(%struct.ExportSpecials* frozen returned %this, %struct.ExportSpecials* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) + // G32-DAG: define dso_local dllexport x86_thiscallcc void @_ZN14ExportSpecialsC1ERKS_(%struct.ExportSpecials* frozen %this, %struct.ExportSpecials* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) + // G64-DAG: define dso_local dllexport void @_ZN14ExportSpecialsC1ERKS_(%struct.ExportSpecials* frozen %this, %struct.ExportSpecials* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) + // G32-DAG: define dso_local dllexport x86_thiscallcc void @_ZN14ExportSpecialsC2ERKS_(%struct.ExportSpecials* frozen %this, %struct.ExportSpecials* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) + // G64-DAG: define dso_local dllexport void @_ZN14ExportSpecialsC2ERKS_(%struct.ExportSpecials* frozen %this, %struct.ExportSpecials* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) __declspec(dllexport) ExportSpecials(const ExportSpecials&); - // M32-DAG: define dso_local dllexport x86_thiscallcc nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ExportSpecials* @"??4ExportSpecials@@QAEAAU0@ABU0@@Z"(%struct.ExportSpecials* %this, %struct.ExportSpecials* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) - // M64-DAG: define dso_local dllexport nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ExportSpecials* @"??4ExportSpecials@@QEAAAEAU0@AEBU0@@Z"(%struct.ExportSpecials* %this, %struct.ExportSpecials* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) - // G32-DAG: define dso_local dllexport x86_thiscallcc nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ExportSpecials* @_ZN14ExportSpecialsaSERKS_(%struct.ExportSpecials* %this, %struct.ExportSpecials* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) - // G64-DAG: define dso_local dllexport nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ExportSpecials* @_ZN14ExportSpecialsaSERKS_(%struct.ExportSpecials* %this, %struct.ExportSpecials* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) + // M32-DAG: define dso_local dllexport x86_thiscallcc frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ExportSpecials* @"??4ExportSpecials@@QAEAAU0@ABU0@@Z"(%struct.ExportSpecials* frozen %this, %struct.ExportSpecials* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) + // M64-DAG: define dso_local dllexport frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ExportSpecials* @"??4ExportSpecials@@QEAAAEAU0@AEBU0@@Z"(%struct.ExportSpecials* frozen %this, %struct.ExportSpecials* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) + // G32-DAG: define dso_local dllexport x86_thiscallcc frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ExportSpecials* @_ZN14ExportSpecialsaSERKS_(%struct.ExportSpecials* frozen %this, %struct.ExportSpecials* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) + // G64-DAG: define dso_local dllexport frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ExportSpecials* @_ZN14ExportSpecialsaSERKS_(%struct.ExportSpecials* frozen %this, %struct.ExportSpecials* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) __declspec(dllexport) ExportSpecials& operator=(const ExportSpecials&); - // M32-DAG: define dso_local dllexport x86_thiscallcc %struct.ExportSpecials* @"??0ExportSpecials@@QAE@$$QAU0@@Z"(%struct.ExportSpecials* returned %this, %struct.ExportSpecials* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) - // M64-DAG: define dso_local dllexport %struct.ExportSpecials* @"??0ExportSpecials@@QEAA@$$QEAU0@@Z"(%struct.ExportSpecials* returned %this, %struct.ExportSpecials* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) - // G32-DAG: define dso_local dllexport x86_thiscallcc void @_ZN14ExportSpecialsC1EOS_(%struct.ExportSpecials* %this, %struct.ExportSpecials* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) - // G64-DAG: define dso_local dllexport void @_ZN14ExportSpecialsC1EOS_(%struct.ExportSpecials* %this, %struct.ExportSpecials* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) - // G32-DAG: define dso_local dllexport x86_thiscallcc void @_ZN14ExportSpecialsC2EOS_(%struct.ExportSpecials* %this, %struct.ExportSpecials* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) - // G64-DAG: define dso_local dllexport void @_ZN14ExportSpecialsC2EOS_(%struct.ExportSpecials* %this, %struct.ExportSpecials* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) + // M32-DAG: define dso_local dllexport x86_thiscallcc frozen %struct.ExportSpecials* @"??0ExportSpecials@@QAE@$$QAU0@@Z"(%struct.ExportSpecials* frozen returned %this, %struct.ExportSpecials* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) + // M64-DAG: define dso_local dllexport frozen %struct.ExportSpecials* @"??0ExportSpecials@@QEAA@$$QEAU0@@Z"(%struct.ExportSpecials* frozen returned %this, %struct.ExportSpecials* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) + // G32-DAG: define dso_local dllexport x86_thiscallcc void @_ZN14ExportSpecialsC1EOS_(%struct.ExportSpecials* frozen %this, %struct.ExportSpecials* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) + // G64-DAG: define dso_local dllexport void @_ZN14ExportSpecialsC1EOS_(%struct.ExportSpecials* frozen %this, %struct.ExportSpecials* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) + // G32-DAG: define dso_local dllexport x86_thiscallcc void @_ZN14ExportSpecialsC2EOS_(%struct.ExportSpecials* frozen %this, %struct.ExportSpecials* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) + // G64-DAG: define dso_local dllexport void @_ZN14ExportSpecialsC2EOS_(%struct.ExportSpecials* frozen %this, %struct.ExportSpecials* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) __declspec(dllexport) ExportSpecials(ExportSpecials&&); - // M32-DAG: define dso_local dllexport x86_thiscallcc nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ExportSpecials* @"??4ExportSpecials@@QAEAAU0@$$QAU0@@Z"(%struct.ExportSpecials* %this, %struct.ExportSpecials* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) - // M64-DAG: define dso_local dllexport nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ExportSpecials* @"??4ExportSpecials@@QEAAAEAU0@$$QEAU0@@Z"(%struct.ExportSpecials* %this, %struct.ExportSpecials* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) - // G32-DAG: define dso_local dllexport x86_thiscallcc nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ExportSpecials* @_ZN14ExportSpecialsaSEOS_(%struct.ExportSpecials* %this, %struct.ExportSpecials* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) - // G64-DAG: define dso_local dllexport nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ExportSpecials* @_ZN14ExportSpecialsaSEOS_(%struct.ExportSpecials* %this, %struct.ExportSpecials* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) + // M32-DAG: define dso_local dllexport x86_thiscallcc frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ExportSpecials* @"??4ExportSpecials@@QAEAAU0@$$QAU0@@Z"(%struct.ExportSpecials* frozen %this, %struct.ExportSpecials* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) + // M64-DAG: define dso_local dllexport frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ExportSpecials* @"??4ExportSpecials@@QEAAAEAU0@$$QEAU0@@Z"(%struct.ExportSpecials* frozen %this, %struct.ExportSpecials* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) + // G32-DAG: define dso_local dllexport x86_thiscallcc frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ExportSpecials* @_ZN14ExportSpecialsaSEOS_(%struct.ExportSpecials* frozen %this, %struct.ExportSpecials* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) + // G64-DAG: define dso_local dllexport frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ExportSpecials* @_ZN14ExportSpecialsaSEOS_(%struct.ExportSpecials* frozen %this, %struct.ExportSpecials* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) __declspec(dllexport) ExportSpecials& operator=(ExportSpecials&&); }; ExportSpecials::ExportSpecials() {} @@ -334,8 +334,8 @@ // Export class with inline special member functions. struct ExportInlineSpecials { - // M32-DAG: define weak_odr dso_local dllexport x86_thiscallcc %struct.ExportInlineSpecials* @"??0ExportInlineSpecials@@QAE@XZ"(%struct.ExportInlineSpecials* returned %this) - // M64-DAG: define weak_odr dso_local dllexport %struct.ExportInlineSpecials* @"??0ExportInlineSpecials@@QEAA@XZ"( + // M32-DAG: define weak_odr dso_local dllexport x86_thiscallcc frozen %struct.ExportInlineSpecials* @"??0ExportInlineSpecials@@QAE@XZ"(%struct.ExportInlineSpecials* frozen returned %this) + // M64-DAG: define weak_odr dso_local dllexport frozen %struct.ExportInlineSpecials* @"??0ExportInlineSpecials@@QEAA@XZ"( // G32-DAG: define weak_odr dso_local dllexport x86_thiscallcc void @_ZN20ExportInlineSpecialsC1Ev( // G64-DAG: define weak_odr dso_local dllexport void @_ZN20ExportInlineSpecialsC1Ev( __declspec(dllexport) ExportInlineSpecials() {} @@ -346,28 +346,28 @@ // G64-DAG: define weak_odr dso_local dllexport void @_ZN20ExportInlineSpecialsD1Ev( __declspec(dllexport) ~ExportInlineSpecials() {} - // M32-DAG: define weak_odr dso_local dllexport x86_thiscallcc %struct.ExportInlineSpecials* @"??0ExportInlineSpecials@@QAE@ABU0@@Z"( - // M64-DAG: define weak_odr dso_local dllexport %struct.ExportInlineSpecials* @"??0ExportInlineSpecials@@QEAA@AEBU0@@Z"( + // M32-DAG: define weak_odr dso_local dllexport x86_thiscallcc frozen %struct.ExportInlineSpecials* @"??0ExportInlineSpecials@@QAE@ABU0@@Z"( + // M64-DAG: define weak_odr dso_local dllexport frozen %struct.ExportInlineSpecials* @"??0ExportInlineSpecials@@QEAA@AEBU0@@Z"( // G32-DAG: define weak_odr dso_local dllexport x86_thiscallcc void @_ZN20ExportInlineSpecialsC1ERKS_( // G64-DAG: define weak_odr dso_local dllexport void @_ZN20ExportInlineSpecialsC1ERKS_( __declspec(dllexport) inline ExportInlineSpecials(const ExportInlineSpecials&); - // M32-DAG: define weak_odr dso_local dllexport x86_thiscallcc nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ExportInlineSpecials* @"??4ExportInlineSpecials@@QAEAAU0@ABU0@@Z"( - // M64-DAG: define weak_odr dso_local dllexport nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ExportInlineSpecials* @"??4ExportInlineSpecials@@QEAAAEAU0@AEBU0@@Z"( - // G32-DAG: define weak_odr dso_local dllexport x86_thiscallcc nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ExportInlineSpecials* @_ZN20ExportInlineSpecialsaSERKS_( - // G64-DAG: define weak_odr dso_local dllexport nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ExportInlineSpecials* @_ZN20ExportInlineSpecialsaSERKS_( + // M32-DAG: define weak_odr dso_local dllexport x86_thiscallcc frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ExportInlineSpecials* @"??4ExportInlineSpecials@@QAEAAU0@ABU0@@Z"( + // M64-DAG: define weak_odr dso_local dllexport frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ExportInlineSpecials* @"??4ExportInlineSpecials@@QEAAAEAU0@AEBU0@@Z"( + // G32-DAG: define weak_odr dso_local dllexport x86_thiscallcc frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ExportInlineSpecials* @_ZN20ExportInlineSpecialsaSERKS_( + // G64-DAG: define weak_odr dso_local dllexport frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ExportInlineSpecials* @_ZN20ExportInlineSpecialsaSERKS_( __declspec(dllexport) ExportInlineSpecials& operator=(const ExportInlineSpecials&); - // M32-DAG: define weak_odr dso_local dllexport x86_thiscallcc %struct.ExportInlineSpecials* @"??0ExportInlineSpecials@@QAE@$$QAU0@@Z"( - // M64-DAG: define weak_odr dso_local dllexport %struct.ExportInlineSpecials* @"??0ExportInlineSpecials@@QEAA@$$QEAU0@@Z"( + // M32-DAG: define weak_odr dso_local dllexport x86_thiscallcc frozen %struct.ExportInlineSpecials* @"??0ExportInlineSpecials@@QAE@$$QAU0@@Z"( + // M64-DAG: define weak_odr dso_local dllexport frozen %struct.ExportInlineSpecials* @"??0ExportInlineSpecials@@QEAA@$$QEAU0@@Z"( // G32-DAG: define weak_odr dso_local dllexport x86_thiscallcc void @_ZN20ExportInlineSpecialsC1EOS_( // G64-DAG: define weak_odr dso_local dllexport void @_ZN20ExportInlineSpecialsC1EOS_( __declspec(dllexport) ExportInlineSpecials(ExportInlineSpecials&&) {} - // M32-DAG: define weak_odr dso_local dllexport x86_thiscallcc nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ExportInlineSpecials* @"??4ExportInlineSpecials@@QAEAAU0@$$QAU0@@Z"( - // M64-DAG: define weak_odr dso_local dllexport nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ExportInlineSpecials* @"??4ExportInlineSpecials@@QEAAAEAU0@$$QEAU0@@Z"( - // G32-DAG: define weak_odr dso_local dllexport x86_thiscallcc nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ExportInlineSpecials* @_ZN20ExportInlineSpecialsaSEOS_( - // G64-DAG: define weak_odr dso_local dllexport nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ExportInlineSpecials* @_ZN20ExportInlineSpecialsaSEOS_( + // M32-DAG: define weak_odr dso_local dllexport x86_thiscallcc frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ExportInlineSpecials* @"??4ExportInlineSpecials@@QAEAAU0@$$QAU0@@Z"( + // M64-DAG: define weak_odr dso_local dllexport frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ExportInlineSpecials* @"??4ExportInlineSpecials@@QEAAAEAU0@$$QEAU0@@Z"( + // G32-DAG: define weak_odr dso_local dllexport x86_thiscallcc frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ExportInlineSpecials* @_ZN20ExportInlineSpecialsaSEOS_( + // G64-DAG: define weak_odr dso_local dllexport frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ExportInlineSpecials* @_ZN20ExportInlineSpecialsaSEOS_( __declspec(dllexport) ExportInlineSpecials& operator=(ExportInlineSpecials&&) { return *this; } }; ExportInlineSpecials::ExportInlineSpecials(const ExportInlineSpecials&) {} @@ -384,74 +384,74 @@ __declspec(dllexport) ExportDefaultedDefs& operator=(ExportDefaultedDefs&&); }; -// M32-DAG: define dso_local dllexport x86_thiscallcc %struct.ExportDefaultedDefs* @"??0ExportDefaultedDefs@@QAE@XZ"(%struct.ExportDefaultedDefs* returned %this) -// M64-DAG: define dso_local dllexport %struct.ExportDefaultedDefs* @"??0ExportDefaultedDefs@@QEAA@XZ"(%struct.ExportDefaultedDefs* returned %this) -// G32-DAG: define dso_local dllexport x86_thiscallcc void @_ZN19ExportDefaultedDefsC1Ev(%struct.ExportDefaultedDefs* %this) -// G64-DAG: define dso_local dllexport void @_ZN19ExportDefaultedDefsC1Ev(%struct.ExportDefaultedDefs* %this) -// G32-DAG: define dso_local dllexport x86_thiscallcc void @_ZN19ExportDefaultedDefsC2Ev(%struct.ExportDefaultedDefs* %this) -// G64-DAG: define dso_local dllexport void @_ZN19ExportDefaultedDefsC2Ev(%struct.ExportDefaultedDefs* %this) +// M32-DAG: define dso_local dllexport x86_thiscallcc frozen %struct.ExportDefaultedDefs* @"??0ExportDefaultedDefs@@QAE@XZ"(%struct.ExportDefaultedDefs* frozen returned %this) +// M64-DAG: define dso_local dllexport frozen %struct.ExportDefaultedDefs* @"??0ExportDefaultedDefs@@QEAA@XZ"(%struct.ExportDefaultedDefs* frozen returned %this) +// G32-DAG: define dso_local dllexport x86_thiscallcc void @_ZN19ExportDefaultedDefsC1Ev(%struct.ExportDefaultedDefs* frozen %this) +// G64-DAG: define dso_local dllexport void @_ZN19ExportDefaultedDefsC1Ev(%struct.ExportDefaultedDefs* frozen %this) +// G32-DAG: define dso_local dllexport x86_thiscallcc void @_ZN19ExportDefaultedDefsC2Ev(%struct.ExportDefaultedDefs* frozen %this) +// G64-DAG: define dso_local dllexport void @_ZN19ExportDefaultedDefsC2Ev(%struct.ExportDefaultedDefs* frozen %this) __declspec(dllexport) ExportDefaultedDefs::ExportDefaultedDefs() = default; -// M32-DAG: define dso_local dllexport x86_thiscallcc void @"??1ExportDefaultedDefs@@QAE@XZ"(%struct.ExportDefaultedDefs* %this) -// M64-DAG: define dso_local dllexport void @"??1ExportDefaultedDefs@@QEAA@XZ"(%struct.ExportDefaultedDefs* %this) -// G32-DAG: define dso_local dllexport x86_thiscallcc void @_ZN19ExportDefaultedDefsD1Ev(%struct.ExportDefaultedDefs* %this) -// G64-DAG: define dso_local dllexport void @_ZN19ExportDefaultedDefsD1Ev(%struct.ExportDefaultedDefs* %this) -// G32-DAG: define dso_local dllexport x86_thiscallcc void @_ZN19ExportDefaultedDefsD2Ev(%struct.ExportDefaultedDefs* %this) -// G64-DAG: define dso_local dllexport void @_ZN19ExportDefaultedDefsD2Ev(%struct.ExportDefaultedDefs* %this) +// M32-DAG: define dso_local dllexport x86_thiscallcc void @"??1ExportDefaultedDefs@@QAE@XZ"(%struct.ExportDefaultedDefs* frozen %this) +// M64-DAG: define dso_local dllexport void @"??1ExportDefaultedDefs@@QEAA@XZ"(%struct.ExportDefaultedDefs* frozen %this) +// G32-DAG: define dso_local dllexport x86_thiscallcc void @_ZN19ExportDefaultedDefsD1Ev(%struct.ExportDefaultedDefs* frozen %this) +// G64-DAG: define dso_local dllexport void @_ZN19ExportDefaultedDefsD1Ev(%struct.ExportDefaultedDefs* frozen %this) +// G32-DAG: define dso_local dllexport x86_thiscallcc void @_ZN19ExportDefaultedDefsD2Ev(%struct.ExportDefaultedDefs* frozen %this) +// G64-DAG: define dso_local dllexport void @_ZN19ExportDefaultedDefsD2Ev(%struct.ExportDefaultedDefs* frozen %this) ExportDefaultedDefs::~ExportDefaultedDefs() = default; -// M32-DAG: define weak_odr dso_local dllexport x86_thiscallcc %struct.ExportDefaultedDefs* @"??0ExportDefaultedDefs@@QAE@ABU0@@Z"(%struct.ExportDefaultedDefs* returned %this, %struct.ExportDefaultedDefs* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) -// M64-DAG: define weak_odr dso_local dllexport %struct.ExportDefaultedDefs* @"??0ExportDefaultedDefs@@QEAA@AEBU0@@Z"(%struct.ExportDefaultedDefs* returned %this, %struct.ExportDefaultedDefs* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) -// G32-DAG: define weak_odr dso_local dllexport x86_thiscallcc void @_ZN19ExportDefaultedDefsC1ERKS_(%struct.ExportDefaultedDefs* %this, %struct.ExportDefaultedDefs* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) -// G64-DAG: define weak_odr dso_local dllexport void @_ZN19ExportDefaultedDefsC1ERKS_(%struct.ExportDefaultedDefs* %this, %struct.ExportDefaultedDefs* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) -// G32-DAG: define weak_odr dso_local dllexport x86_thiscallcc void @_ZN19ExportDefaultedDefsC2ERKS_(%struct.ExportDefaultedDefs* %this, %struct.ExportDefaultedDefs* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) -// G64-DAG: define weak_odr dso_local dllexport void @_ZN19ExportDefaultedDefsC2ERKS_(%struct.ExportDefaultedDefs* %this, %struct.ExportDefaultedDefs* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) +// M32-DAG: define weak_odr dso_local dllexport x86_thiscallcc frozen %struct.ExportDefaultedDefs* @"??0ExportDefaultedDefs@@QAE@ABU0@@Z"(%struct.ExportDefaultedDefs* frozen returned %this, %struct.ExportDefaultedDefs* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) +// M64-DAG: define weak_odr dso_local dllexport frozen %struct.ExportDefaultedDefs* @"??0ExportDefaultedDefs@@QEAA@AEBU0@@Z"(%struct.ExportDefaultedDefs* frozen returned %this, %struct.ExportDefaultedDefs* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) +// G32-DAG: define weak_odr dso_local dllexport x86_thiscallcc void @_ZN19ExportDefaultedDefsC1ERKS_(%struct.ExportDefaultedDefs* frozen %this, %struct.ExportDefaultedDefs* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) +// G64-DAG: define weak_odr dso_local dllexport void @_ZN19ExportDefaultedDefsC1ERKS_(%struct.ExportDefaultedDefs* frozen %this, %struct.ExportDefaultedDefs* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) +// G32-DAG: define weak_odr dso_local dllexport x86_thiscallcc void @_ZN19ExportDefaultedDefsC2ERKS_(%struct.ExportDefaultedDefs* frozen %this, %struct.ExportDefaultedDefs* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) +// G64-DAG: define weak_odr dso_local dllexport void @_ZN19ExportDefaultedDefsC2ERKS_(%struct.ExportDefaultedDefs* frozen %this, %struct.ExportDefaultedDefs* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) __declspec(dllexport) ExportDefaultedDefs::ExportDefaultedDefs(const ExportDefaultedDefs&) = default; -// M32-DAG: define weak_odr dso_local dllexport x86_thiscallcc nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ExportDefaultedDefs* @"??4ExportDefaultedDefs@@QAEAAU0@ABU0@@Z"(%struct.ExportDefaultedDefs* %this, %struct.ExportDefaultedDefs* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) -// M64-DAG: define weak_odr dso_local dllexport nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ExportDefaultedDefs* @"??4ExportDefaultedDefs@@QEAAAEAU0@AEBU0@@Z"(%struct.ExportDefaultedDefs* %this, %struct.ExportDefaultedDefs* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) -// G32-DAG: define weak_odr dso_local dllexport x86_thiscallcc nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ExportDefaultedDefs* @_ZN19ExportDefaultedDefsaSERKS_(%struct.ExportDefaultedDefs* %this, %struct.ExportDefaultedDefs* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) -// G64-DAG: define weak_odr dso_local dllexport nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ExportDefaultedDefs* @_ZN19ExportDefaultedDefsaSERKS_(%struct.ExportDefaultedDefs* %this, %struct.ExportDefaultedDefs* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) +// M32-DAG: define weak_odr dso_local dllexport x86_thiscallcc frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ExportDefaultedDefs* @"??4ExportDefaultedDefs@@QAEAAU0@ABU0@@Z"(%struct.ExportDefaultedDefs* frozen %this, %struct.ExportDefaultedDefs* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) +// M64-DAG: define weak_odr dso_local dllexport frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ExportDefaultedDefs* @"??4ExportDefaultedDefs@@QEAAAEAU0@AEBU0@@Z"(%struct.ExportDefaultedDefs* frozen %this, %struct.ExportDefaultedDefs* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) +// G32-DAG: define weak_odr dso_local dllexport x86_thiscallcc frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ExportDefaultedDefs* @_ZN19ExportDefaultedDefsaSERKS_(%struct.ExportDefaultedDefs* frozen %this, %struct.ExportDefaultedDefs* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) +// G64-DAG: define weak_odr dso_local dllexport frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ExportDefaultedDefs* @_ZN19ExportDefaultedDefsaSERKS_(%struct.ExportDefaultedDefs* frozen %this, %struct.ExportDefaultedDefs* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) inline ExportDefaultedDefs& ExportDefaultedDefs::operator=(const ExportDefaultedDefs&) = default; -// M32-DAG: define dso_local dllexport x86_thiscallcc %struct.ExportDefaultedDefs* @"??0ExportDefaultedDefs@@QAE@$$QAU0@@Z"(%struct.ExportDefaultedDefs* returned %this, %struct.ExportDefaultedDefs* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) -// M64-DAG: define dso_local dllexport %struct.ExportDefaultedDefs* @"??0ExportDefaultedDefs@@QEAA@$$QEAU0@@Z"(%struct.ExportDefaultedDefs* returned %this, %struct.ExportDefaultedDefs* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) -// G32-DAG: define dso_local dllexport x86_thiscallcc void @_ZN19ExportDefaultedDefsC1EOS_(%struct.ExportDefaultedDefs* %this, %struct.ExportDefaultedDefs* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) -// G64-DAG: define dso_local dllexport void @_ZN19ExportDefaultedDefsC1EOS_(%struct.ExportDefaultedDefs* %this, %struct.ExportDefaultedDefs* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) -// G32-DAG: define dso_local dllexport x86_thiscallcc void @_ZN19ExportDefaultedDefsC2EOS_(%struct.ExportDefaultedDefs* %this, %struct.ExportDefaultedDefs* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) -// G64-DAG: define dso_local dllexport void @_ZN19ExportDefaultedDefsC2EOS_(%struct.ExportDefaultedDefs* %this, %struct.ExportDefaultedDefs* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) +// M32-DAG: define dso_local dllexport x86_thiscallcc frozen %struct.ExportDefaultedDefs* @"??0ExportDefaultedDefs@@QAE@$$QAU0@@Z"(%struct.ExportDefaultedDefs* frozen returned %this, %struct.ExportDefaultedDefs* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) +// M64-DAG: define dso_local dllexport frozen %struct.ExportDefaultedDefs* @"??0ExportDefaultedDefs@@QEAA@$$QEAU0@@Z"(%struct.ExportDefaultedDefs* frozen returned %this, %struct.ExportDefaultedDefs* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) +// G32-DAG: define dso_local dllexport x86_thiscallcc void @_ZN19ExportDefaultedDefsC1EOS_(%struct.ExportDefaultedDefs* frozen %this, %struct.ExportDefaultedDefs* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) +// G64-DAG: define dso_local dllexport void @_ZN19ExportDefaultedDefsC1EOS_(%struct.ExportDefaultedDefs* frozen %this, %struct.ExportDefaultedDefs* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) +// G32-DAG: define dso_local dllexport x86_thiscallcc void @_ZN19ExportDefaultedDefsC2EOS_(%struct.ExportDefaultedDefs* frozen %this, %struct.ExportDefaultedDefs* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) +// G64-DAG: define dso_local dllexport void @_ZN19ExportDefaultedDefsC2EOS_(%struct.ExportDefaultedDefs* frozen %this, %struct.ExportDefaultedDefs* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) __declspec(dllexport) ExportDefaultedDefs::ExportDefaultedDefs(ExportDefaultedDefs&&) = default; -// M32-DAG: define dso_local dllexport x86_thiscallcc nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ExportDefaultedDefs* @"??4ExportDefaultedDefs@@QAEAAU0@$$QAU0@@Z"(%struct.ExportDefaultedDefs* %this, %struct.ExportDefaultedDefs* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) -// M64-DAG: define dso_local dllexport nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ExportDefaultedDefs* @"??4ExportDefaultedDefs@@QEAAAEAU0@$$QEAU0@@Z"(%struct.ExportDefaultedDefs* %this, %struct.ExportDefaultedDefs* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) -// G32-DAG: define dso_local dllexport x86_thiscallcc nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ExportDefaultedDefs* @_ZN19ExportDefaultedDefsaSEOS_(%struct.ExportDefaultedDefs* %this, %struct.ExportDefaultedDefs* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) -// G64-DAG: define dso_local dllexport nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ExportDefaultedDefs* @_ZN19ExportDefaultedDefsaSEOS_(%struct.ExportDefaultedDefs* %this, %struct.ExportDefaultedDefs* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) +// M32-DAG: define dso_local dllexport x86_thiscallcc frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ExportDefaultedDefs* @"??4ExportDefaultedDefs@@QAEAAU0@$$QAU0@@Z"(%struct.ExportDefaultedDefs* frozen %this, %struct.ExportDefaultedDefs* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) +// M64-DAG: define dso_local dllexport frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ExportDefaultedDefs* @"??4ExportDefaultedDefs@@QEAAAEAU0@$$QEAU0@@Z"(%struct.ExportDefaultedDefs* frozen %this, %struct.ExportDefaultedDefs* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) +// G32-DAG: define dso_local dllexport x86_thiscallcc frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ExportDefaultedDefs* @_ZN19ExportDefaultedDefsaSEOS_(%struct.ExportDefaultedDefs* frozen %this, %struct.ExportDefaultedDefs* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) +// G64-DAG: define dso_local dllexport frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ExportDefaultedDefs* @_ZN19ExportDefaultedDefsaSEOS_(%struct.ExportDefaultedDefs* frozen %this, %struct.ExportDefaultedDefs* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) ExportDefaultedDefs& ExportDefaultedDefs::operator=(ExportDefaultedDefs&&) = default; // Export defaulted member function definitions declared inside class. struct ExportDefaultedInclassDefs { __declspec(dllexport) ExportDefaultedInclassDefs() = default; - // M32VS2013-DAG: define weak_odr dso_local dllexport x86_thiscallcc %struct.ExportDefaultedInclassDefs* @"??0ExportDefaultedInclassDefs@@QAE@XZ"(%struct.ExportDefaultedInclassDefs* returned %this) - // M64VS2013-DAG: define weak_odr dso_local dllexport %struct.ExportDefaultedInclassDefs* @"??0ExportDefaultedInclassDefs@@QEAA@XZ"(%struct.ExportDefaultedInclassDefs* returned %this) - // M32VS2015-NOT: define weak_odr dso_local dllexport x86_thiscallcc %struct.ExportDefaultedInclassDefs* @"??0ExportDefaultedInclassDefs@@QAE@XZ"(%struct.ExportDefaultedInclassDefs* returned %this) - // M64VS2015-NOT: define weak_odr dso_local dllexport %struct.ExportDefaultedInclassDefs* @"??0ExportDefaultedInclassDefs@@QEAA@XZ"(%struct.ExportDefaultedInclassDefs* returned %this) + // M32VS2013-DAG: define weak_odr dso_local dllexport x86_thiscallcc frozen %struct.ExportDefaultedInclassDefs* @"??0ExportDefaultedInclassDefs@@QAE@XZ"(%struct.ExportDefaultedInclassDefs* frozen returned %this) + // M64VS2013-DAG: define weak_odr dso_local dllexport frozen %struct.ExportDefaultedInclassDefs* @"??0ExportDefaultedInclassDefs@@QEAA@XZ"(%struct.ExportDefaultedInclassDefs* frozen returned %this) + // M32VS2015-NOT: define weak_odr dso_local dllexport x86_thiscallcc frozen %struct.ExportDefaultedInclassDefs* @"??0ExportDefaultedInclassDefs@@QAE@XZ"(%struct.ExportDefaultedInclassDefs* frozen returned %this) + // M64VS2015-NOT: define weak_odr dso_local dllexport frozen %struct.ExportDefaultedInclassDefs* @"??0ExportDefaultedInclassDefs@@QEAA@XZ"(%struct.ExportDefaultedInclassDefs* frozen returned %this) __declspec(dllexport) ~ExportDefaultedInclassDefs() = default; - // M32VS2013-DAG: define weak_odr dso_local dllexport x86_thiscallcc void @"??1ExportDefaultedInclassDefs@@QAE@XZ"(%struct.ExportDefaultedInclassDefs* %this) - // M64VS2013-DAG: define weak_odr dso_local dllexport void @"??1ExportDefaultedInclassDefs@@QEAA@XZ"(%struct.ExportDefaultedInclassDefs* %this) - // M32VS2015-NOT: define weak_odr dso_local dllexport x86_thiscallcc void @"??1ExportDefaultedInclassDefs@@QAE@XZ"(%struct.ExportDefaultedInclassDefs* %this) - // M64VS2015-NOT: define weak_odr dso_local dllexport void @"??1ExportDefaultedInclassDefs@@QEAA@XZ"(%struct.ExportDefaultedInclassDefs* %this) + // M32VS2013-DAG: define weak_odr dso_local dllexport x86_thiscallcc void @"??1ExportDefaultedInclassDefs@@QAE@XZ"(%struct.ExportDefaultedInclassDefs* frozen %this) + // M64VS2013-DAG: define weak_odr dso_local dllexport void @"??1ExportDefaultedInclassDefs@@QEAA@XZ"(%struct.ExportDefaultedInclassDefs* frozen %this) + // M32VS2015-NOT: define weak_odr dso_local dllexport x86_thiscallcc void @"??1ExportDefaultedInclassDefs@@QAE@XZ"(%struct.ExportDefaultedInclassDefs* frozen %this) + // M64VS2015-NOT: define weak_odr dso_local dllexport void @"??1ExportDefaultedInclassDefs@@QEAA@XZ"(%struct.ExportDefaultedInclassDefs* frozen %this) __declspec(dllexport) ExportDefaultedInclassDefs(const ExportDefaultedInclassDefs&) = default; - // M32VS2013-DAG: define weak_odr dso_local dllexport x86_thiscallcc %struct.ExportDefaultedInclassDefs* @"??0ExportDefaultedInclassDefs@@QAE@ABU0@@Z"(%struct.ExportDefaultedInclassDefs* returned %this, %struct.ExportDefaultedInclassDefs* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) - // M64VS2013-DAG: define weak_odr dso_local dllexport %struct.ExportDefaultedInclassDefs* @"??0ExportDefaultedInclassDefs@@QEAA@AEBU0@@Z"(%struct.ExportDefaultedInclassDefs* returned %this, %struct.ExportDefaultedInclassDefs* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) - // M32VS2015-NOT: define weak_odr dso_local dllexport x86_thiscallcc %struct.ExportDefaultedInclassDefs* @"??0ExportDefaultedInclassDefs@@QAE@ABU0@@Z"(%struct.ExportDefaultedInclassDefs* returned %this, %struct.ExportDefaultedInclassDefs* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) - // M64VS2015-NOT: define weak_odr dso_local dllexport %struct.ExportDefaultedInclassDefs* @"??0ExportDefaultedInclassDefs@@QEAA@AEBU0@@Z"(%struct.ExportDefaultedInclassDefs* returned %this, %struct.ExportDefaultedInclassDefs* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) + // M32VS2013-DAG: define weak_odr dso_local dllexport x86_thiscallcc frozen %struct.ExportDefaultedInclassDefs* @"??0ExportDefaultedInclassDefs@@QAE@ABU0@@Z"(%struct.ExportDefaultedInclassDefs* frozen returned %this, %struct.ExportDefaultedInclassDefs* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) + // M64VS2013-DAG: define weak_odr dso_local dllexport frozen %struct.ExportDefaultedInclassDefs* @"??0ExportDefaultedInclassDefs@@QEAA@AEBU0@@Z"(%struct.ExportDefaultedInclassDefs* frozen returned %this, %struct.ExportDefaultedInclassDefs* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) + // M32VS2015-NOT: define weak_odr dso_local dllexport x86_thiscallcc frozen %struct.ExportDefaultedInclassDefs* @"??0ExportDefaultedInclassDefs@@QAE@ABU0@@Z"(%struct.ExportDefaultedInclassDefs* frozen returned %this, %struct.ExportDefaultedInclassDefs* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) + // M64VS2015-NOT: define weak_odr dso_local dllexport frozen %struct.ExportDefaultedInclassDefs* @"??0ExportDefaultedInclassDefs@@QEAA@AEBU0@@Z"(%struct.ExportDefaultedInclassDefs* frozen returned %this, %struct.ExportDefaultedInclassDefs* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) __declspec(dllexport) ExportDefaultedInclassDefs& operator=(const ExportDefaultedInclassDefs&) = default; - // M32-DAG: define weak_odr dso_local dllexport x86_thiscallcc nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ExportDefaultedInclassDefs* @"??4ExportDefaultedInclassDefs@@QAEAAU0@ABU0@@Z"(%struct.ExportDefaultedInclassDefs* %this, %struct.ExportDefaultedInclassDefs* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) - // M64-DAG: define weak_odr dso_local dllexport nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ExportDefaultedInclassDefs* @"??4ExportDefaultedInclassDefs@@QEAAAEAU0@AEBU0@@Z"(%struct.ExportDefaultedInclassDefs* %this, %struct.ExportDefaultedInclassDefs* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) + // M32-DAG: define weak_odr dso_local dllexport x86_thiscallcc frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ExportDefaultedInclassDefs* @"??4ExportDefaultedInclassDefs@@QAEAAU0@ABU0@@Z"(%struct.ExportDefaultedInclassDefs* frozen %this, %struct.ExportDefaultedInclassDefs* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) + // M64-DAG: define weak_odr dso_local dllexport frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ExportDefaultedInclassDefs* @"??4ExportDefaultedInclassDefs@@QEAAAEAU0@AEBU0@@Z"(%struct.ExportDefaultedInclassDefs* frozen %this, %struct.ExportDefaultedInclassDefs* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) }; @@ -463,28 +463,28 @@ __declspec(dllexport) void operator delete[](void*); }; -// M32-DAG: define dso_local dllexport i8* @"??2ExportAlloc@@SAPAXI@Z"(i32 %n) -// M64-DAG: define dso_local dllexport i8* @"??2ExportAlloc@@SAPEAX_K@Z"(i64 %n) -// G32-DAG: define dso_local dllexport i8* @_ZN11ExportAllocnwEj(i32 %n) -// G64-DAG: define dso_local dllexport i8* @_ZN11ExportAllocnwEy(i64 %n) +// M32-DAG: define dso_local dllexport frozen i8* @"??2ExportAlloc@@SAPAXI@Z"(i32 frozen %n) +// M64-DAG: define dso_local dllexport frozen i8* @"??2ExportAlloc@@SAPEAX_K@Z"(i64 frozen %n) +// G32-DAG: define dso_local dllexport frozen i8* @_ZN11ExportAllocnwEj(i32 frozen %n) +// G64-DAG: define dso_local dllexport frozen i8* @_ZN11ExportAllocnwEy(i64 frozen %n) void* ExportAlloc::operator new(__SIZE_TYPE__ n) { return malloc(n); } -// M32-DAG: define dso_local dllexport i8* @"??_UExportAlloc@@SAPAXI@Z"(i32 %n) -// M64-DAG: define dso_local dllexport i8* @"??_UExportAlloc@@SAPEAX_K@Z"(i64 %n) -// G32-DAG: define dso_local dllexport i8* @_ZN11ExportAllocnaEj(i32 %n) -// G64-DAG: define dso_local dllexport i8* @_ZN11ExportAllocnaEy(i64 %n) +// M32-DAG: define dso_local dllexport frozen i8* @"??_UExportAlloc@@SAPAXI@Z"(i32 frozen %n) +// M64-DAG: define dso_local dllexport frozen i8* @"??_UExportAlloc@@SAPEAX_K@Z"(i64 frozen %n) +// G32-DAG: define dso_local dllexport frozen i8* @_ZN11ExportAllocnaEj(i32 frozen %n) +// G64-DAG: define dso_local dllexport frozen i8* @_ZN11ExportAllocnaEy(i64 frozen %n) void* ExportAlloc::operator new[](__SIZE_TYPE__ n) { return malloc(n); } -// M32-DAG: define dso_local dllexport void @"??3ExportAlloc@@SAXPAX@Z"(i8* %p) -// M64-DAG: define dso_local dllexport void @"??3ExportAlloc@@SAXPEAX@Z"(i8* %p) -// G32-DAG: define dso_local dllexport void @_ZN11ExportAllocdlEPv(i8* %p) -// G64-DAG: define dso_local dllexport void @_ZN11ExportAllocdlEPv(i8* %p) +// M32-DAG: define dso_local dllexport void @"??3ExportAlloc@@SAXPAX@Z"(i8* frozen %p) +// M64-DAG: define dso_local dllexport void @"??3ExportAlloc@@SAXPEAX@Z"(i8* frozen %p) +// G32-DAG: define dso_local dllexport void @_ZN11ExportAllocdlEPv(i8* frozen %p) +// G64-DAG: define dso_local dllexport void @_ZN11ExportAllocdlEPv(i8* frozen %p) void ExportAlloc::operator delete(void* p) { free(p); } -// M32-DAG: define dso_local dllexport void @"??_VExportAlloc@@SAXPAX@Z"(i8* %p) -// M64-DAG: define dso_local dllexport void @"??_VExportAlloc@@SAXPEAX@Z"(i8* %p) -// G32-DAG: define dso_local dllexport void @_ZN11ExportAllocdaEPv(i8* %p) -// G64-DAG: define dso_local dllexport void @_ZN11ExportAllocdaEPv(i8* %p) +// M32-DAG: define dso_local dllexport void @"??_VExportAlloc@@SAXPAX@Z"(i8* frozen %p) +// M64-DAG: define dso_local dllexport void @"??_VExportAlloc@@SAXPEAX@Z"(i8* frozen %p) +// G32-DAG: define dso_local dllexport void @_ZN11ExportAllocdaEPv(i8* frozen %p) +// G64-DAG: define dso_local dllexport void @_ZN11ExportAllocdaEPv(i8* frozen %p) void ExportAlloc::operator delete[](void* p) { free(p); } @@ -501,10 +501,10 @@ // Export implicit instantiation of an exported member function template. void useMemFunTmpl() { - // M32-DAG: define weak_odr dso_local dllexport x86_thiscallcc void @"??$exportedNormal@UImplicitInst_Exported@@@MemFunTmpl@@QAEXXZ"(%struct.MemFunTmpl* %this) - // M64-DAG: define weak_odr dso_local dllexport void @"??$exportedNormal@UImplicitInst_Exported@@@MemFunTmpl@@QEAAXXZ"(%struct.MemFunTmpl* %this) - // G32-DAG: define weak_odr dso_local dllexport x86_thiscallcc void @_ZN10MemFunTmpl14exportedNormalI21ImplicitInst_ExportedEEvv(%struct.MemFunTmpl* %this) - // G64-DAG: define weak_odr dso_local dllexport void @_ZN10MemFunTmpl14exportedNormalI21ImplicitInst_ExportedEEvv(%struct.MemFunTmpl* %this) + // M32-DAG: define weak_odr dso_local dllexport x86_thiscallcc void @"??$exportedNormal@UImplicitInst_Exported@@@MemFunTmpl@@QAEXXZ"(%struct.MemFunTmpl* frozen %this) + // M64-DAG: define weak_odr dso_local dllexport void @"??$exportedNormal@UImplicitInst_Exported@@@MemFunTmpl@@QEAAXXZ"(%struct.MemFunTmpl* frozen %this) + // G32-DAG: define weak_odr dso_local dllexport x86_thiscallcc void @_ZN10MemFunTmpl14exportedNormalI21ImplicitInst_ExportedEEvv(%struct.MemFunTmpl* frozen %this) + // G64-DAG: define weak_odr dso_local dllexport void @_ZN10MemFunTmpl14exportedNormalI21ImplicitInst_ExportedEEvv(%struct.MemFunTmpl* frozen %this) MemFunTmpl().exportedNormal(); // MSC-DAG: define weak_odr dso_local dllexport void @"??$exportedStatic@UImplicitInst_Exported@@@MemFunTmpl@@SAXXZ"() @@ -515,10 +515,10 @@ // Export explicit instantiation declaration of an exported member function // template. -// M32-DAG: define weak_odr dso_local dllexport x86_thiscallcc void @"??$exportedNormal@UExplicitDecl_Exported@@@MemFunTmpl@@QAEXXZ"(%struct.MemFunTmpl* %this) -// M64-DAG: define weak_odr dso_local dllexport void @"??$exportedNormal@UExplicitDecl_Exported@@@MemFunTmpl@@QEAAXXZ"(%struct.MemFunTmpl* %this) -// G32-DAG: define weak_odr dso_local dllexport x86_thiscallcc void @_ZN10MemFunTmpl14exportedNormalI21ExplicitDecl_ExportedEEvv(%struct.MemFunTmpl* %this) -// G64-DAG: define weak_odr dso_local dllexport void @_ZN10MemFunTmpl14exportedNormalI21ExplicitDecl_ExportedEEvv(%struct.MemFunTmpl* %this) +// M32-DAG: define weak_odr dso_local dllexport x86_thiscallcc void @"??$exportedNormal@UExplicitDecl_Exported@@@MemFunTmpl@@QAEXXZ"(%struct.MemFunTmpl* frozen %this) +// M64-DAG: define weak_odr dso_local dllexport void @"??$exportedNormal@UExplicitDecl_Exported@@@MemFunTmpl@@QEAAXXZ"(%struct.MemFunTmpl* frozen %this) +// G32-DAG: define weak_odr dso_local dllexport x86_thiscallcc void @_ZN10MemFunTmpl14exportedNormalI21ExplicitDecl_ExportedEEvv(%struct.MemFunTmpl* frozen %this) +// G64-DAG: define weak_odr dso_local dllexport void @_ZN10MemFunTmpl14exportedNormalI21ExplicitDecl_ExportedEEvv(%struct.MemFunTmpl* frozen %this) extern template void MemFunTmpl::exportedNormal(); template void MemFunTmpl::exportedNormal(); @@ -530,10 +530,10 @@ // Export explicit instantiation definition of an exported member function // template. -// M32-DAG: define weak_odr dso_local dllexport x86_thiscallcc void @"??$exportedNormal@UExplicitInst_Exported@@@MemFunTmpl@@QAEXXZ"(%struct.MemFunTmpl* %this) -// M64-DAG: define weak_odr dso_local dllexport void @"??$exportedNormal@UExplicitInst_Exported@@@MemFunTmpl@@QEAAXXZ"(%struct.MemFunTmpl* %this) -// G32-DAG: define weak_odr dso_local dllexport x86_thiscallcc void @_ZN10MemFunTmpl14exportedNormalI21ExplicitInst_ExportedEEvv(%struct.MemFunTmpl* %this) -// G64-DAG: define weak_odr dso_local dllexport void @_ZN10MemFunTmpl14exportedNormalI21ExplicitInst_ExportedEEvv(%struct.MemFunTmpl* %this) +// M32-DAG: define weak_odr dso_local dllexport x86_thiscallcc void @"??$exportedNormal@UExplicitInst_Exported@@@MemFunTmpl@@QAEXXZ"(%struct.MemFunTmpl* frozen %this) +// M64-DAG: define weak_odr dso_local dllexport void @"??$exportedNormal@UExplicitInst_Exported@@@MemFunTmpl@@QEAAXXZ"(%struct.MemFunTmpl* frozen %this) +// G32-DAG: define weak_odr dso_local dllexport x86_thiscallcc void @_ZN10MemFunTmpl14exportedNormalI21ExplicitInst_ExportedEEvv(%struct.MemFunTmpl* frozen %this) +// G64-DAG: define weak_odr dso_local dllexport void @_ZN10MemFunTmpl14exportedNormalI21ExplicitInst_ExportedEEvv(%struct.MemFunTmpl* frozen %this) template void MemFunTmpl::exportedNormal(); // MSC-DAG: define weak_odr dso_local dllexport void @"??$exportedStatic@UExplicitInst_Exported@@@MemFunTmpl@@SAXXZ"() @@ -542,16 +542,16 @@ // Export specialization of an exported member function template. -// M32-DAG: define dso_local dllexport x86_thiscallcc void @"??$exportedNormal@UExplicitSpec_Def_Exported@@@MemFunTmpl@@QAEXXZ"(%struct.MemFunTmpl* %this) -// M64-DAG: define dso_local dllexport void @"??$exportedNormal@UExplicitSpec_Def_Exported@@@MemFunTmpl@@QEAAXXZ"(%struct.MemFunTmpl* %this) -// G32-DAG: define dso_local dllexport x86_thiscallcc void @_ZN10MemFunTmpl14exportedNormalI25ExplicitSpec_Def_ExportedEEvv(%struct.MemFunTmpl* %this) -// G64-DAG: define dso_local dllexport void @_ZN10MemFunTmpl14exportedNormalI25ExplicitSpec_Def_ExportedEEvv(%struct.MemFunTmpl* %this) +// M32-DAG: define dso_local dllexport x86_thiscallcc void @"??$exportedNormal@UExplicitSpec_Def_Exported@@@MemFunTmpl@@QAEXXZ"(%struct.MemFunTmpl* frozen %this) +// M64-DAG: define dso_local dllexport void @"??$exportedNormal@UExplicitSpec_Def_Exported@@@MemFunTmpl@@QEAAXXZ"(%struct.MemFunTmpl* frozen %this) +// G32-DAG: define dso_local dllexport x86_thiscallcc void @_ZN10MemFunTmpl14exportedNormalI25ExplicitSpec_Def_ExportedEEvv(%struct.MemFunTmpl* frozen %this) +// G64-DAG: define dso_local dllexport void @_ZN10MemFunTmpl14exportedNormalI25ExplicitSpec_Def_ExportedEEvv(%struct.MemFunTmpl* frozen %this) template<> __declspec(dllexport) void MemFunTmpl::exportedNormal() {} -// M32-DAG: define weak_odr dso_local dllexport x86_thiscallcc void @"??$exportedNormal@UExplicitSpec_InlineDef_Exported@@@MemFunTmpl@@QAEXXZ"(%struct.MemFunTmpl* %this) -// M64-DAG: define weak_odr dso_local dllexport void @"??$exportedNormal@UExplicitSpec_InlineDef_Exported@@@MemFunTmpl@@QEAAXXZ"(%struct.MemFunTmpl* %this) -// G32-DAG: define weak_odr dso_local dllexport x86_thiscallcc void @_ZN10MemFunTmpl14exportedNormalI31ExplicitSpec_InlineDef_ExportedEEvv(%struct.MemFunTmpl* %this) -// G64-DAG: define weak_odr dso_local dllexport void @_ZN10MemFunTmpl14exportedNormalI31ExplicitSpec_InlineDef_ExportedEEvv(%struct.MemFunTmpl* %this) +// M32-DAG: define weak_odr dso_local dllexport x86_thiscallcc void @"??$exportedNormal@UExplicitSpec_InlineDef_Exported@@@MemFunTmpl@@QAEXXZ"(%struct.MemFunTmpl* frozen %this) +// M64-DAG: define weak_odr dso_local dllexport void @"??$exportedNormal@UExplicitSpec_InlineDef_Exported@@@MemFunTmpl@@QEAAXXZ"(%struct.MemFunTmpl* frozen %this) +// G32-DAG: define weak_odr dso_local dllexport x86_thiscallcc void @_ZN10MemFunTmpl14exportedNormalI31ExplicitSpec_InlineDef_ExportedEEvv(%struct.MemFunTmpl* frozen %this) +// G64-DAG: define weak_odr dso_local dllexport void @_ZN10MemFunTmpl14exportedNormalI31ExplicitSpec_InlineDef_ExportedEEvv(%struct.MemFunTmpl* frozen %this) template<> __declspec(dllexport) inline void MemFunTmpl::exportedNormal() {} // MSC-DAG: define dso_local dllexport void @"??$exportedStatic@UExplicitSpec_Def_Exported@@@MemFunTmpl@@SAXXZ"() @@ -565,10 +565,10 @@ // Not exporting specialization of an exported member function template without // explicit dso_local dllexport. -// M32-DAG: define dso_local x86_thiscallcc void @"??$exportedNormal@UExplicitSpec_NotExported@@@MemFunTmpl@@QAEXXZ"(%struct.MemFunTmpl* %this) -// M64-DAG: define dso_local void @"??$exportedNormal@UExplicitSpec_NotExported@@@MemFunTmpl@@QEAAXXZ"(%struct.MemFunTmpl* %this) -// G32-DAG: define dso_local x86_thiscallcc void @_ZN10MemFunTmpl14exportedNormalI24ExplicitSpec_NotExportedEEvv(%struct.MemFunTmpl* %this) -// G64-DAG: define dso_local void @_ZN10MemFunTmpl14exportedNormalI24ExplicitSpec_NotExportedEEvv(%struct.MemFunTmpl* %this) +// M32-DAG: define dso_local x86_thiscallcc void @"??$exportedNormal@UExplicitSpec_NotExported@@@MemFunTmpl@@QAEXXZ"(%struct.MemFunTmpl* frozen %this) +// M64-DAG: define dso_local void @"??$exportedNormal@UExplicitSpec_NotExported@@@MemFunTmpl@@QEAAXXZ"(%struct.MemFunTmpl* frozen %this) +// G32-DAG: define dso_local x86_thiscallcc void @_ZN10MemFunTmpl14exportedNormalI24ExplicitSpec_NotExportedEEvv(%struct.MemFunTmpl* frozen %this) +// G64-DAG: define dso_local void @_ZN10MemFunTmpl14exportedNormalI24ExplicitSpec_NotExportedEEvv(%struct.MemFunTmpl* frozen %this) template<> void MemFunTmpl::exportedNormal() {} // M32-DAG: define dso_local void @"??$exportedStatic@UExplicitSpec_NotExported@@@MemFunTmpl@@SAXXZ"() @@ -578,10 +578,10 @@ // Export explicit instantiation declaration of a non-exported member function // template. -// M32-DAG: define weak_odr dso_local dllexport x86_thiscallcc void @"??$normalDef@UExplicitDecl_Exported@@@MemFunTmpl@@QAEXXZ"(%struct.MemFunTmpl* %this) -// M64-DAG: define weak_odr dso_local dllexport void @"??$normalDef@UExplicitDecl_Exported@@@MemFunTmpl@@QEAAXXZ"(%struct.MemFunTmpl* %this) -// G32-DAG: define weak_odr dso_local dllexport x86_thiscallcc void @_ZN10MemFunTmpl9normalDefI21ExplicitDecl_ExportedEEvv(%struct.MemFunTmpl* %this) -// G64-DAG: define weak_odr dso_local dllexport void @_ZN10MemFunTmpl9normalDefI21ExplicitDecl_ExportedEEvv(%struct.MemFunTmpl* %this) +// M32-DAG: define weak_odr dso_local dllexport x86_thiscallcc void @"??$normalDef@UExplicitDecl_Exported@@@MemFunTmpl@@QAEXXZ"(%struct.MemFunTmpl* frozen %this) +// M64-DAG: define weak_odr dso_local dllexport void @"??$normalDef@UExplicitDecl_Exported@@@MemFunTmpl@@QEAAXXZ"(%struct.MemFunTmpl* frozen %this) +// G32-DAG: define weak_odr dso_local dllexport x86_thiscallcc void @_ZN10MemFunTmpl9normalDefI21ExplicitDecl_ExportedEEvv(%struct.MemFunTmpl* frozen %this) +// G64-DAG: define weak_odr dso_local dllexport void @_ZN10MemFunTmpl9normalDefI21ExplicitDecl_ExportedEEvv(%struct.MemFunTmpl* frozen %this) extern template __declspec(dllexport) void MemFunTmpl::normalDef(); template __declspec(dllexport) void MemFunTmpl::normalDef(); @@ -593,10 +593,10 @@ // Export explicit instantiation definition of a non-exported member function // template. -// M32-DAG: define weak_odr dso_local dllexport x86_thiscallcc void @"??$normalDef@UExplicitInst_Exported@@@MemFunTmpl@@QAEXXZ"(%struct.MemFunTmpl* %this) -// M64-DAG: define weak_odr dso_local dllexport void @"??$normalDef@UExplicitInst_Exported@@@MemFunTmpl@@QEAAXXZ"(%struct.MemFunTmpl* %this) -// G32-DAG: define weak_odr dso_local dllexport x86_thiscallcc void @_ZN10MemFunTmpl9normalDefI21ExplicitInst_ExportedEEvv(%struct.MemFunTmpl* %this) -// G64-DAG: define weak_odr dso_local dllexport void @_ZN10MemFunTmpl9normalDefI21ExplicitInst_ExportedEEvv(%struct.MemFunTmpl* %this) +// M32-DAG: define weak_odr dso_local dllexport x86_thiscallcc void @"??$normalDef@UExplicitInst_Exported@@@MemFunTmpl@@QAEXXZ"(%struct.MemFunTmpl* frozen %this) +// M64-DAG: define weak_odr dso_local dllexport void @"??$normalDef@UExplicitInst_Exported@@@MemFunTmpl@@QEAAXXZ"(%struct.MemFunTmpl* frozen %this) +// G32-DAG: define weak_odr dso_local dllexport x86_thiscallcc void @_ZN10MemFunTmpl9normalDefI21ExplicitInst_ExportedEEvv(%struct.MemFunTmpl* frozen %this) +// G64-DAG: define weak_odr dso_local dllexport void @_ZN10MemFunTmpl9normalDefI21ExplicitInst_ExportedEEvv(%struct.MemFunTmpl* frozen %this) template __declspec(dllexport) void MemFunTmpl::normalDef(); // MSC-DAG: define weak_odr dso_local dllexport void @"??$staticDef@UExplicitInst_Exported@@@MemFunTmpl@@SAXXZ"() @@ -605,14 +605,14 @@ // Export specialization of a non-exported member function template. -// M32-DAG: define dso_local dllexport x86_thiscallcc void @"??$normalDef@UExplicitSpec_Def_Exported@@@MemFunTmpl@@QAEXXZ"(%struct.MemFunTmpl* %this) -// M64-DAG: define dso_local dllexport void @"??$normalDef@UExplicitSpec_Def_Exported@@@MemFunTmpl@@QEAAXXZ"(%struct.MemFunTmpl* %this) -// M32-DAG: define weak_odr dso_local dllexport x86_thiscallcc void @"??$normalDef@UExplicitSpec_InlineDef_Exported@@@MemFunTmpl@@QAEXXZ"(%struct.MemFunTmpl* %this) -// M64-DAG: define weak_odr dso_local dllexport void @"??$normalDef@UExplicitSpec_InlineDef_Exported@@@MemFunTmpl@@QEAAXXZ"(%struct.MemFunTmpl* %this) -// G32-DAG: define dso_local dllexport x86_thiscallcc void @_ZN10MemFunTmpl9normalDefI25ExplicitSpec_Def_ExportedEEvv(%struct.MemFunTmpl* %this) -// G64-DAG: define dso_local dllexport void @_ZN10MemFunTmpl9normalDefI25ExplicitSpec_Def_ExportedEEvv(%struct.MemFunTmpl* %this) -// G32-DAG: define weak_odr dso_local dllexport x86_thiscallcc void @_ZN10MemFunTmpl9normalDefI31ExplicitSpec_InlineDef_ExportedEEvv(%struct.MemFunTmpl* %this) -// G64-DAG: define weak_odr dso_local dllexport void @_ZN10MemFunTmpl9normalDefI31ExplicitSpec_InlineDef_ExportedEEvv(%struct.MemFunTmpl* %this) +// M32-DAG: define dso_local dllexport x86_thiscallcc void @"??$normalDef@UExplicitSpec_Def_Exported@@@MemFunTmpl@@QAEXXZ"(%struct.MemFunTmpl* frozen %this) +// M64-DAG: define dso_local dllexport void @"??$normalDef@UExplicitSpec_Def_Exported@@@MemFunTmpl@@QEAAXXZ"(%struct.MemFunTmpl* frozen %this) +// M32-DAG: define weak_odr dso_local dllexport x86_thiscallcc void @"??$normalDef@UExplicitSpec_InlineDef_Exported@@@MemFunTmpl@@QAEXXZ"(%struct.MemFunTmpl* frozen %this) +// M64-DAG: define weak_odr dso_local dllexport void @"??$normalDef@UExplicitSpec_InlineDef_Exported@@@MemFunTmpl@@QEAAXXZ"(%struct.MemFunTmpl* frozen %this) +// G32-DAG: define dso_local dllexport x86_thiscallcc void @_ZN10MemFunTmpl9normalDefI25ExplicitSpec_Def_ExportedEEvv(%struct.MemFunTmpl* frozen %this) +// G64-DAG: define dso_local dllexport void @_ZN10MemFunTmpl9normalDefI25ExplicitSpec_Def_ExportedEEvv(%struct.MemFunTmpl* frozen %this) +// G32-DAG: define weak_odr dso_local dllexport x86_thiscallcc void @_ZN10MemFunTmpl9normalDefI31ExplicitSpec_InlineDef_ExportedEEvv(%struct.MemFunTmpl* frozen %this) +// G64-DAG: define weak_odr dso_local dllexport void @_ZN10MemFunTmpl9normalDefI31ExplicitSpec_InlineDef_ExportedEEvv(%struct.MemFunTmpl* frozen %this) template<> __declspec(dllexport) void MemFunTmpl::normalDef() {} template<> __declspec(dllexport) inline void MemFunTmpl::normalDef() {} diff --git a/clang/test/CodeGenCXX/dllexport-no-dllexport-inlines.cpp b/clang/test/CodeGenCXX/dllexport-no-dllexport-inlines.cpp --- a/clang/test/CodeGenCXX/dllexport-no-dllexport-inlines.cpp +++ b/clang/test/CodeGenCXX/dllexport-no-dllexport-inlines.cpp @@ -15,7 +15,7 @@ // EXPORTINLINE-DAG: define weak_odr dso_local dllexport void @"?InclassDefFunc@ExportedClass@@ void InclassDefFunc() {} - // CHECK-DAG: define weak_odr dso_local dllexport i32 @"?InclassDefFuncWithStaticVariable@ExportedClass@@QEAAHXZ" + // CHECK-DAG: define weak_odr dso_local dllexport frozen i32 @"?InclassDefFuncWithStaticVariable@ExportedClass@@QEAAHXZ" int InclassDefFuncWithStaticVariable() { // CHECK-DAG: @"?static_variable@?1??InclassDefFuncWithStaticVariable@ExportedClass@@QEAAHXZ@4HA" = weak_odr dso_local dllexport global i32 0, comdat, align 4 static int static_variable = 0; @@ -23,7 +23,7 @@ return static_variable; } - // CHECK-DAG: define weak_odr dso_local dllexport i32 @"?InclassDefFunctWithLambdaStaticVariable@ExportedClass@@QEAAHXZ" + // CHECK-DAG: define weak_odr dso_local dllexport frozen i32 @"?InclassDefFunctWithLambdaStaticVariable@ExportedClass@@QEAAHXZ" int InclassDefFunctWithLambdaStaticVariable() { // CHECK-DAG: @"?static_x@?2???R@?0??InclassDefFunctWithLambdaStaticVariable@ExportedClass@@QEAAHXZ@QEBA?A?@@XZ@4HA" = weak_odr dso_local dllexport global i32 0, comdat, align 4 return ([]() { static int static_x; return ++static_x; })(); @@ -33,7 +33,7 @@ // EXPORTINLINE-DAG: define weak_odr dso_local dllexport void @"?InlineOutclassDefFunc@ExportedClass@@QEAAXXZ inline void InlineOutclassDefFunc(); - // CHECK-DAG: define weak_odr dso_local dllexport i32 @"?InlineOutclassDefFuncWithStaticVariable@ExportedClass@@QEAAHXZ" + // CHECK-DAG: define weak_odr dso_local dllexport frozen i32 @"?InlineOutclassDefFuncWithStaticVariable@ExportedClass@@QEAAHXZ" inline int InlineOutclassDefFuncWithStaticVariable(); // CHECK-DAG: define dso_local dllexport void @"?OutoflineDefFunc@ExportedClass@@QEAAXXZ" @@ -69,13 +69,13 @@ class B22{}; // CHECK-DAG: define weak_odr dso_local dllexport void @"?InclassDefFunc@?$TemplateExportedClass@VA11@@@@QEAAXXZ" -// CHECK-DAG: define weak_odr dso_local dllexport i32 @"?InclassDefFuncWithStaticVariable@?$TemplateExportedClass@VA11@@@@QEAAHXZ" +// CHECK-DAG: define weak_odr dso_local dllexport frozen i32 @"?InclassDefFuncWithStaticVariable@?$TemplateExportedClass@VA11@@@@QEAAHXZ" // CHECK-DAG: @"?static_x@?2??InclassDefFuncWithStaticVariable@?$TemplateExportedClass@VA11@@@@QEAAHXZ@4HA" = weak_odr dso_local dllexport global i32 0, comdat, align 4 template class TemplateExportedClass; // NOEXPORTINLINE-DAG: define linkonce_odr dso_local void @"?InclassDefFunc@?$TemplateExportedClass@VB22@@@@QEAAXXZ" // EXPORTINLINE-DAG: define weak_odr dso_local dllexport void @"?InclassDefFunc@?$TemplateExportedClass@VB22@@@@QEAAXXZ -// CHECK-DAG: define weak_odr dso_local dllexport i32 @"?InclassDefFuncWithStaticVariable@?$TemplateExportedClass@VB22@@@@QEAAHXZ" +// CHECK-DAG: define weak_odr dso_local dllexport frozen i32 @"?InclassDefFuncWithStaticVariable@?$TemplateExportedClass@VB22@@@@QEAAHXZ" // CHECK-DAG: @"?static_x@?2??InclassDefFuncWithStaticVariable@?$TemplateExportedClass@VB22@@@@QEAAHXZ@4HA" = weak_odr dso_local dllexport global i32 0, comdat, align 4 TemplateExportedClass b22; @@ -95,12 +95,12 @@ }; // CHECK-DAG: define weak_odr dso_local dllexport void @"?InclassDefFunc@?$TemplateNoAttributeClass@VA11@@@@QEAAXXZ" -// CHECK-DAG: define weak_odr dso_local dllexport i32 @"?InclassDefFuncWithStaticLocal@?$TemplateNoAttributeClass@VA11 +// CHECK-DAG: define weak_odr dso_local dllexport frozen i32 @"?InclassDefFuncWithStaticLocal@?$TemplateNoAttributeClass@VA11 // CHECK-DAG: @"?static_x@?2??InclassDefFuncWithStaticLocal@?$TemplateNoAttributeClass@VA11@@@@QEAAHXZ@4HA" = weak_odr dso_local dllexport global i32 0, comdat, align 4 template class __declspec(dllexport) TemplateNoAttributeClass; // CHECK-DAG: define available_externally dllimport void @"?InclassDefFunc@?$TemplateNoAttributeClass@VB22@@@@QEAAXXZ" -// CHECK-DAG: define available_externally dllimport i32 @"?InclassDefFuncWithStaticLocal@?$TemplateNoAttributeClass@VB22@@@@QEAAHXZ" +// CHECK-DAG: define available_externally dllimport frozen i32 @"?InclassDefFuncWithStaticLocal@?$TemplateNoAttributeClass@VB22@@@@QEAAHXZ" // CHECK-DAG: @"?static_x@?2??InclassDefFuncWithStaticLocal@?$TemplateNoAttributeClass@VB22@@@@QEAAHXZ@4HA" = available_externally dllimport global i32 0, align 4 extern template class __declspec(dllimport) TemplateNoAttributeClass; @@ -115,8 +115,8 @@ // EXPORTINLINE-DAG: define available_externally dllimport void @"?InClassDefFunc@ImportedClass@@QEAAXXZ" void InClassDefFunc() {} - // EXPORTINLINE-DAG: define available_externally dllimport i32 @"?InClassDefFuncWithStaticVariable@ImportedClass@@QEAAHXZ" - // NOEXPORTINLINE-DAG: define linkonce_odr dso_local i32 @"?InClassDefFuncWithStaticVariable@ImportedClass@@QEAAHXZ" + // EXPORTINLINE-DAG: define available_externally dllimport frozen i32 @"?InClassDefFuncWithStaticVariable@ImportedClass@@QEAAHXZ" + // NOEXPORTINLINE-DAG: define linkonce_odr dso_local frozen i32 @"?InClassDefFuncWithStaticVariable@ImportedClass@@QEAAHXZ" int InClassDefFuncWithStaticVariable() { // CHECK-DAG: @"?static_variable@?1??InClassDefFuncWithStaticVariable@ImportedClass@@QEAAHXZ@4HA" = available_externally dllimport global i32 0, align 4 static int static_variable = 0; diff --git a/clang/test/CodeGenCXX/dllexport.cpp b/clang/test/CodeGenCXX/dllexport.cpp --- a/clang/test/CodeGenCXX/dllexport.cpp +++ b/clang/test/CodeGenCXX/dllexport.cpp @@ -305,8 +305,8 @@ void Befriended::func() {} // Implicit declarations can be redeclared with dllexport. -// MSC-DAG: define dso_local dllexport nonnull i8* @"??2@{{YAPAXI|YAPEAX_K}}@Z"( -// GNU-DAG: define dso_local dllexport nonnull i8* @_Znw{{[yj]}}( +// MSC-DAG: define dso_local dllexport frozen nonnull i8* @"??2@{{YAPAXI|YAPEAX_K}}@Z"( +// GNU-DAG: define dso_local dllexport frozen nonnull i8* @_Znw{{[yj]}}( void* alloc(__SIZE_TYPE__ n); __declspec(dllexport) void* operator new(__SIZE_TYPE__ n) { return alloc(n); } @@ -556,11 +556,11 @@ struct __declspec(dllexport) T { // Copy assignment operator: - // M32-DAG: define weak_odr dso_local dllexport x86_thiscallcc nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.T* @"??4T@@QAEAAU0@ABU0@@Z" + // M32-DAG: define weak_odr dso_local dllexport x86_thiscallcc frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.T* @"??4T@@QAEAAU0@ABU0@@Z" // Explicitly defaulted copy constructur: T(const T&) = default; - // M32MSVC2013-DAG: define weak_odr dso_local dllexport x86_thiscallcc %struct.T* @"??0T@@QAE@ABU0@@Z" + // M32MSVC2013-DAG: define weak_odr dso_local dllexport x86_thiscallcc frozen %struct.T* @"??0T@@QAE@ABU0@@Z" void a() {} // M32-DAG: define weak_odr dso_local dllexport x86_thiscallcc void @"?a@T@@QAEXXZ" @@ -588,8 +588,8 @@ T TmplClass::StaticClassVarExpTmplClass; // Export a definition of a template function. -// MSC-DAG: define weak_odr dso_local dllexport i32 @"??$TypeFunTmpl@H@@YAHH@Z" -// GNU-DAG: define weak_odr dso_local dllexport i32 @_Z11TypeFunTmplIiET_S0_ +// MSC-DAG: define weak_odr dso_local dllexport frozen i32 @"??$TypeFunTmpl@H@@YAHH@Z" +// GNU-DAG: define weak_odr dso_local dllexport frozen i32 @_Z11TypeFunTmplIiET_S0_ template T __declspec(dllexport) TypeFunTmpl(T t) { return t + t; } @@ -602,14 +602,14 @@ template struct __declspec(dllexport) U { void foo() {} }; struct __declspec(dllexport) V : public U { }; // U's assignment operator is emitted. -// M32-DAG: define weak_odr dso_local dllexport x86_thiscallcc nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.U* @"??4?$U@H@@QAEAAU0@ABU0@@Z" +// M32-DAG: define weak_odr dso_local dllexport x86_thiscallcc frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.U* @"??4?$U@H@@QAEAAU0@ABU0@@Z" struct __declspec(dllexport) W { virtual void foo(); }; void W::foo() {} // Default ctor: -// M32-DAG: define weak_odr dso_local dllexport x86_thiscallcc %struct.W* @"??0W@@QAE@XZ" +// M32-DAG: define weak_odr dso_local dllexport x86_thiscallcc frozen %struct.W* @"??0W@@QAE@XZ" // Copy ctor: -// M32-DAG: define weak_odr dso_local dllexport x86_thiscallcc %struct.W* @"??0W@@QAE@ABU0@@Z" +// M32-DAG: define weak_odr dso_local dllexport x86_thiscallcc frozen %struct.W* @"??0W@@QAE@ABU0@@Z" // vftable: // M32-DAG: [[W_VTABLE:@.*]] = private unnamed_addr constant { [2 x i8*] } { [2 x i8*] [i8* bitcast (%rtti.CompleteObjectLocator* @"??_R4W@@6B@" to i8*), i8* bitcast (void (%struct.W*)* @"?foo@W@@UAEXXZ" to i8*)] }, comdat($"??_7W@@6B@") // M32-DAG: @"??_7W@@6B@" = dllexport unnamed_addr alias i8*, getelementptr inbounds ({ [2 x i8*] }, { [2 x i8*] }* [[W_VTABLE]], i32 0, i32 0, i32 1) @@ -629,7 +629,7 @@ struct __declspec(dllexport) Z { virtual ~Z() {} }; // The scalar deleting dtor does not get exported: -// M32-DAG: define linkonce_odr dso_local x86_thiscallcc i8* @"??_GZ@@UAEPAXI@Z" +// M32-DAG: define linkonce_odr dso_local x86_thiscallcc frozen i8* @"??_GZ@@UAEPAXI@Z" // The user-defined dtor does get exported: @@ -646,7 +646,7 @@ struct __declspec(dllexport) DefaultedCtorsDtors { DefaultedCtorsDtors() = default; - // M32MSVC2013-DAG: define weak_odr dso_local dllexport x86_thiscallcc %struct.DefaultedCtorsDtors* @"??0DefaultedCtorsDtors@@QAE@XZ" + // M32MSVC2013-DAG: define weak_odr dso_local dllexport x86_thiscallcc frozen %struct.DefaultedCtorsDtors* @"??0DefaultedCtorsDtors@@QAE@XZ" ~DefaultedCtorsDtors() = default; // M32MSVC2013-DAG: define weak_odr dso_local dllexport x86_thiscallcc void @"??1DefaultedCtorsDtors@@QAE@XZ" }; @@ -654,26 +654,26 @@ // Export defaulted member function definitions declared inside class. struct __declspec(dllexport) ExportDefaultedInclassDefs { ExportDefaultedInclassDefs() = default; - // M32VS2013-DAG: define weak_odr dso_local dllexport x86_thiscallcc %struct.ExportDefaultedInclassDefs* @"??0ExportDefaultedInclassDefs@@QAE@XZ"(%struct.ExportDefaultedInclassDefs* returned %this) - // M64VS2013-DAG: define weak_odr dso_local dllexport %struct.ExportDefaultedInclassDefs* @"??0ExportDefaultedInclassDefs@@QEAA@XZ"(%struct.ExportDefaultedInclassDefs* returned %this) - // M32VS2015-NOT: define weak_odr dso_local dllexport x86_thiscallcc %struct.ExportDefaultedInclassDefs* @"??0ExportDefaultedInclassDefs@@QAE@XZ"(%struct.ExportDefaultedInclassDefs* returned %this) - // M64VS2015-NOT: define weak_odr dso_local dllexport %struct.ExportDefaultedInclassDefs* @"??0ExportDefaultedInclassDefs@@QEAA@XZ"(%struct.ExportDefaultedInclassDefs* returned %this) + // M32VS2013-DAG: define weak_odr dso_local dllexport x86_thiscallcc frozen %struct.ExportDefaultedInclassDefs* @"??0ExportDefaultedInclassDefs@@QAE@XZ"(%struct.ExportDefaultedInclassDefs* frozen returned %this) + // M64VS2013-DAG: define weak_odr dso_local dllexport frozen %struct.ExportDefaultedInclassDefs* @"??0ExportDefaultedInclassDefs@@QEAA@XZ"(%struct.ExportDefaultedInclassDefs* frozen returned %this) + // M32VS2015-NOT: define weak_odr dso_local dllexport x86_thiscallcc frozen %struct.ExportDefaultedInclassDefs* @"??0ExportDefaultedInclassDefs@@QAE@XZ"(%struct.ExportDefaultedInclassDefs* frozen returned %this) + // M64VS2015-NOT: define weak_odr dso_local dllexport frozen %struct.ExportDefaultedInclassDefs* @"??0ExportDefaultedInclassDefs@@QEAA@XZ"(%struct.ExportDefaultedInclassDefs* frozen returned %this) ~ExportDefaultedInclassDefs() = default; - // M32VS2013-DAG: define weak_odr dso_local dllexport x86_thiscallcc void @"??1ExportDefaultedInclassDefs@@QAE@XZ"(%struct.ExportDefaultedInclassDefs* %this) - // M64VS2013-DAG: define weak_odr dso_local dllexport void @"??1ExportDefaultedInclassDefs@@QEAA@XZ"(%struct.ExportDefaultedInclassDefs* %this) - // M32VS2015-NOT: define weak_odr dso_local dllexport x86_thiscallcc void @"??1ExportDefaultedInclassDefs@@QAE@XZ"(%struct.ExportDefaultedInclassDefs* %this) - // M64VS2015-NOT: define weak_odr dso_local dllexport void @"??1ExportDefaultedInclassDefs@@QEAA@XZ"(%struct.ExportDefaultedInclassDefs* %this) + // M32VS2013-DAG: define weak_odr dso_local dllexport x86_thiscallcc void @"??1ExportDefaultedInclassDefs@@QAE@XZ"(%struct.ExportDefaultedInclassDefs* frozen %this) + // M64VS2013-DAG: define weak_odr dso_local dllexport frozen void @"??1ExportDefaultedInclassDefs@@QEAA@XZ"(%struct.ExportDefaultedInclassDefs* frozen %this) + // M32VS2015-NOT: define weak_odr dso_local dllexport x86_thiscallcc void @"??1ExportDefaultedInclassDefs@@QAE@XZ"(%struct.ExportDefaultedInclassDefs* frozen %this) + // M64VS2015-NOT: define weak_odr dso_local dllexport frozen void @"??1ExportDefaultedInclassDefs@@QEAA@XZ"(%struct.ExportDefaultedInclassDefs* frozen %this) ExportDefaultedInclassDefs(const ExportDefaultedInclassDefs&) = default; - // M32VS2013-DAG: define weak_odr dso_local dllexport x86_thiscallcc %struct.ExportDefaultedInclassDefs* @"??0ExportDefaultedInclassDefs@@QAE@ABU0@@Z"(%struct.ExportDefaultedInclassDefs* returned %this, %struct.ExportDefaultedInclassDefs* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}})) - // M64VS2013-DAG: define weak_odr dso_local dllexport %struct.ExportDefaultedInclassDefs* @"??0ExportDefaultedInclassDefs@@QEAA@AEBU0@@Z"(%struct.ExportDefaultedInclassDefs* returned %this, %struct.ExportDefaultedInclassDefs* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}})) - // M32VS2015-NOT: define weak_odr dso_local dllexport x86_thiscallcc %struct.ExportDefaultedInclassDefs* @"??0ExportDefaultedInclassDefs@@QAE@ABU0@@Z"(%struct.ExportDefaultedInclassDefs* returned %this, %struct.ExportDefaultedInclassDefs* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}})) - // M64VS2015-NOT: define weak_odr dso_local dllexport %struct.ExportDefaultedInclassDefs* @"??0ExportDefaultedInclassDefs@@QEAA@AEBU0@@Z"(%struct.ExportDefaultedInclassDefs* returned %this, %struct.ExportDefaultedInclassDefs* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}})) + // M32VS2013-DAG: define weak_odr dso_local dllexport x86_thiscallcc frozen %struct.ExportDefaultedInclassDefs* @"??0ExportDefaultedInclassDefs@@QAE@ABU0@@Z"(%struct.ExportDefaultedInclassDefs* frozen returned %this, %struct.ExportDefaultedInclassDefs* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}})) + // M64VS2013-DAG: define weak_odr dso_local dllexport frozen %struct.ExportDefaultedInclassDefs* @"??0ExportDefaultedInclassDefs@@QEAA@AEBU0@@Z"(%struct.ExportDefaultedInclassDefs* frozen returned %this, %struct.ExportDefaultedInclassDefs* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}})) + // M32VS2015-NOT: define weak_odr dso_local dllexport x86_thiscallcc frozen %struct.ExportDefaultedInclassDefs* @"??0ExportDefaultedInclassDefs@@QAE@ABU0@@Z"(%struct.ExportDefaultedInclassDefs* frozen returned %this, %struct.ExportDefaultedInclassDefs* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}})) + // M64VS2015-NOT: define weak_odr dso_local dllexport frozen %struct.ExportDefaultedInclassDefs* @"??0ExportDefaultedInclassDefs@@QEAA@AEBU0@@Z"(%struct.ExportDefaultedInclassDefs* frozen returned %this, %struct.ExportDefaultedInclassDefs* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}})) ExportDefaultedInclassDefs& operator=(const ExportDefaultedInclassDefs&) = default; - // M32-DAG: define weak_odr dso_local dllexport x86_thiscallcc nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ExportDefaultedInclassDefs* @"??4ExportDefaultedInclassDefs@@QAEAAU0@ABU0@@Z"(%struct.ExportDefaultedInclassDefs* %this, %struct.ExportDefaultedInclassDefs* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) - // M64-DAG: define weak_odr dso_local dllexport nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ExportDefaultedInclassDefs* @"??4ExportDefaultedInclassDefs@@QEAAAEAU0@AEBU0@@Z"(%struct.ExportDefaultedInclassDefs* %this, %struct.ExportDefaultedInclassDefs* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) + // M32-DAG: define weak_odr dso_local dllexport x86_thiscallcc frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ExportDefaultedInclassDefs* @"??4ExportDefaultedInclassDefs@@QAEAAU0@ABU0@@Z"(%struct.ExportDefaultedInclassDefs* frozen %this, %struct.ExportDefaultedInclassDefs* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) + // M64-DAG: define weak_odr dso_local dllexport frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ExportDefaultedInclassDefs* @"??4ExportDefaultedInclassDefs@@QEAAAEAU0@AEBU0@@Z"(%struct.ExportDefaultedInclassDefs* frozen %this, %struct.ExportDefaultedInclassDefs* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) }; namespace ReferencedInlineMethodInNestedClass { @@ -739,16 +739,16 @@ // Do not assert about generating code for constexpr functions twice during explicit instantiation (PR21718). template struct ExplicitInstConstexprMembers { // Copy assignment operator - // M32-DAG: define weak_odr dso_local dllexport x86_thiscallcc nonnull align 1 dereferenceable(1) %struct.ExplicitInstConstexprMembers* @"??4?$ExplicitInstConstexprMembers@X@@QAEAAU0@ABU0@@Z" + // M32-DAG: define weak_odr dso_local dllexport x86_thiscallcc frozen nonnull align 1 dereferenceable(1) %struct.ExplicitInstConstexprMembers* @"??4?$ExplicitInstConstexprMembers@X@@QAEAAU0@ABU0@@Z" constexpr ExplicitInstConstexprMembers() {} - // M32-DAG: define weak_odr dso_local dllexport x86_thiscallcc %struct.ExplicitInstConstexprMembers* @"??0?$ExplicitInstConstexprMembers@X@@QAE@XZ" + // M32-DAG: define weak_odr dso_local dllexport x86_thiscallcc frozen %struct.ExplicitInstConstexprMembers* @"??0?$ExplicitInstConstexprMembers@X@@QAE@XZ" ExplicitInstConstexprMembers(const ExplicitInstConstexprMembers&) = default; - // M32MSVC2013-DAG: define weak_odr dso_local dllexport x86_thiscallcc %struct.ExplicitInstConstexprMembers* @"??0?$ExplicitInstConstexprMembers@X@@QAE@ABU0@@Z" + // M32MSVC2013-DAG: define weak_odr dso_local dllexport x86_thiscallcc frozen %struct.ExplicitInstConstexprMembers* @"??0?$ExplicitInstConstexprMembers@X@@QAE@ABU0@@Z" constexpr int f() const { return 42; } - // M32-DAG: define weak_odr dso_local dllexport x86_thiscallcc i32 @"?f@?$ExplicitInstConstexprMembers@X@@QBEHXZ" + // M32-DAG: define weak_odr dso_local dllexport x86_thiscallcc frozen i32 @"?f@?$ExplicitInstConstexprMembers@X@@QBEHXZ" }; template struct __declspec(dllexport) ExplicitInstConstexprMembers; @@ -767,7 +767,7 @@ template struct __declspec(dllexport) ExplicitInstantiationDeclExportedDefTemplate; USEMEMFUNC(ExplicitInstantiationDeclExportedDefTemplate, f); // M32-DAG: define weak_odr dso_local dllexport x86_thiscallcc void @"?f@?$ExplicitInstantiationDeclExportedDefTemplate@H@@QAEXXZ" -// M32-DAG: define weak_odr dso_local dllexport x86_thiscallcc %struct.ExplicitInstantiationDeclExportedDefTemplate* @"??0?$ExplicitInstantiationDeclExportedDefTemplate@H@@QAE@XZ" +// M32-DAG: define weak_odr dso_local dllexport x86_thiscallcc frozen %struct.ExplicitInstantiationDeclExportedDefTemplate* @"??0?$ExplicitInstantiationDeclExportedDefTemplate@H@@QAE@XZ" // G32-DAG: define weak_odr dso_local x86_thiscallcc void @_ZN44ExplicitInstantiationDeclExportedDefTemplateIiE1fEv template struct ImplicitInstantiationExportedExplicitInstantiationDefTemplate { virtual void f() {} }; @@ -810,7 +810,7 @@ struct __declspec(dllexport) S { int x = 42; }; -// M32-DAG: define weak_odr dso_local dllexport x86_thiscallcc %"struct.InClassInits::S"* @"??0S@InClassInits@@QAE@XZ" +// M32-DAG: define weak_odr dso_local dllexport x86_thiscallcc frozen %"struct.InClassInits::S"* @"??0S@InClassInits@@QAE@XZ" // dllexport an already instantiated class template. template struct Base { @@ -818,7 +818,7 @@ }; Base base; struct __declspec(dllexport) T : Base { }; -// M32-DAG: define weak_odr dso_local dllexport x86_thiscallcc %"struct.InClassInits::Base"* @"??0?$Base@H@InClassInits@@QAE@XZ" +// M32-DAG: define weak_odr dso_local dllexport x86_thiscallcc frozen %"struct.InClassInits::Base"* @"??0?$Base@H@InClassInits@@QAE@XZ" struct A { A(int); }; struct __declspec(dllexport) U { @@ -826,7 +826,7 @@ U(A = 0) {} int x = 0; }; -// M32-DAG: define weak_odr dso_local dllexport x86_thiscallcc %"struct.InClassInits::U"* @"??0U@InClassInits@@QAE@UA@1@@Z" +// M32-DAG: define weak_odr dso_local dllexport x86_thiscallcc frozen %"struct.InClassInits::U"* @"??0U@InClassInits@@QAE@UA@1@@Z" struct Evil { template struct Base { @@ -838,7 +838,7 @@ // the default ctor must still be delayed. struct __declspec(dllexport) T : Base {}; }; -// M32-DAG: define weak_odr dso_local dllexport x86_thiscallcc %"struct.InClassInits::Evil::Base"* @"??0?$Base@H@Evil@InClassInits@@QAE@XZ" +// M32-DAG: define weak_odr dso_local dllexport x86_thiscallcc frozen %"struct.InClassInits::Evil::Base"* @"??0?$Base@H@Evil@InClassInits@@QAE@XZ" template struct Foo {}; template struct Bar { @@ -850,7 +850,7 @@ // After parsing Baz, in ActOnFinishCXXNonNestedClass we would synthesize // Baz's operator=, causing instantiation of Foo after which // ActOnFinishCXXNonNestedClass is called, and we would bite our own tail. -// M32-DAG: define weak_odr dso_local dllexport x86_thiscallcc nonnull align 1 dereferenceable(1) %"struct.InClassInits::Baz"* @"??4Baz@InClassInits@@QAEAAU01@ABU01@@Z" +// M32-DAG: define weak_odr dso_local dllexport x86_thiscallcc frozen nonnull align 1 dereferenceable(1) %"struct.InClassInits::Baz"* @"??4Baz@InClassInits@@QAEAAU01@ABU01@@Z" // Trying to define the explicitly defaulted ctor must be delayed until the // in-class initializer for x has been processed. @@ -858,7 +858,7 @@ __declspec(dllexport) PR40006() = default; int x = 42; }; -// M32-DAG: define weak_odr dso_local dllexport x86_thiscallcc %"struct.InClassInits::PR40006"* @"??0PR40006@InClassInits@@QAE@XZ" +// M32-DAG: define weak_odr dso_local dllexport x86_thiscallcc frozen %"struct.InClassInits::PR40006"* @"??0PR40006@InClassInits@@QAE@XZ" namespace pr40006 { // Delay emitting the method also past the instantiation of Tmpl, i.e. @@ -871,7 +871,7 @@ }; Tmpl y; }; -// M32-DAG: define weak_odr dso_local dllexport x86_thiscallcc %"struct.InClassInits::pr40006::Outer::Inner"* @"??0Inner@Outer@pr40006@InClassInits@@QAE@XZ" +// M32-DAG: define weak_odr dso_local dllexport x86_thiscallcc frozen %"struct.InClassInits::pr40006::Outer::Inner"* @"??0Inner@Outer@pr40006@InClassInits@@QAE@XZ" } // PR42857: Clang would try to emit the non-trivial explicitly defaulted @@ -879,7 +879,7 @@ struct Qux { Qux(); }; template struct PR42857 { __declspec(dllexport) PR42857() = default; Qux q; }; template struct PR42857; -// M32-DAG: define weak_odr dso_local dllexport x86_thiscallcc %"struct.InClassInits::PR42857"* @"??0?$PR42857@H@InClassInits@@QAE@XZ" +// M32-DAG: define weak_odr dso_local dllexport x86_thiscallcc frozen %"struct.InClassInits::PR42857"* @"??0?$PR42857@H@InClassInits@@QAE@XZ" } @@ -1039,8 +1039,8 @@ }; LayerSelection foo; }; -// M32-DAG: define weak_odr dso_local dllexport x86_thiscallcc %"struct.LayerTreeImpl::ElementLayers"* @"??0ElementLayers@LayerTreeImpl@@QAE@XZ" -// M64-DAG: define weak_odr dso_local dllexport %"struct.LayerTreeImpl::ElementLayers"* @"??0ElementLayers@LayerTreeImpl@@QEAA@XZ" +// M32-DAG: define weak_odr dso_local dllexport x86_thiscallcc frozen %"struct.LayerTreeImpl::ElementLayers"* @"??0ElementLayers@LayerTreeImpl@@QAE@XZ" +// M64-DAG: define weak_odr dso_local dllexport frozen %"struct.LayerTreeImpl::ElementLayers"* @"??0ElementLayers@LayerTreeImpl@@QEAA@XZ" namespace pr39496 { // Make sure dll attribute are inherited by static locals also in template diff --git a/clang/test/CodeGenCXX/dllimport-dtor-thunks.cpp b/clang/test/CodeGenCXX/dllimport-dtor-thunks.cpp --- a/clang/test/CodeGenCXX/dllimport-dtor-thunks.cpp +++ b/clang/test/CodeGenCXX/dllimport-dtor-thunks.cpp @@ -36,9 +36,9 @@ // The destructors are called in reverse order of construction. Only the third // needs the complete destructor (_D). // CHECK-LABEL: define dso_local void @testit() -// CHECK: call void @"??_DImportVBaseOverrideVDtor@@QEAAXXZ"(%struct.ImportVBaseOverrideVDtor* %{{.*}}) -// CHECK: call void @"??1ImportOverrideVDtor@@UEAA@XZ"(%struct.ImportOverrideVDtor* %{{.*}}) -// CHECK: call void @"??1ImportIntroVDtor@@UEAA@XZ"(%struct.ImportIntroVDtor* %{{.*}}) +// CHECK: call void @"??_DImportVBaseOverrideVDtor@@QEAAXXZ"(%struct.ImportVBaseOverrideVDtor* frozen %{{.*}}) +// CHECK: call void @"??1ImportOverrideVDtor@@UEAA@XZ"(%struct.ImportOverrideVDtor* frozen %{{.*}}) +// CHECK: call void @"??1ImportIntroVDtor@@UEAA@XZ"(%struct.ImportIntroVDtor* frozen %{{.*}}) // CHECK-LABEL: declare dllimport void @"??_DImportVBaseOverrideVDtor@@QEAAXXZ" // CHECK-LABEL: declare dllimport void @"??1ImportOverrideVDtor@@UEAA@XZ" diff --git a/clang/test/CodeGenCXX/dllimport-members.cpp b/clang/test/CodeGenCXX/dllimport-members.cpp --- a/clang/test/CodeGenCXX/dllimport-members.cpp +++ b/clang/test/CodeGenCXX/dllimport-members.cpp @@ -1,9 +1,9 @@ -// RUN: %clang_cc1 -triple i686-windows-msvc -fms-compatibility -emit-llvm -std=c++1y -O0 -o - %s -DMSABI | FileCheck --check-prefix=MSC --check-prefix=M32 %s -// RUN: %clang_cc1 -triple x86_64-windows-msvc -fms-compatibility -emit-llvm -std=c++1y -O0 -o - %s -DMSABI | FileCheck --check-prefix=MSC --check-prefix=M64 %s -// RUN: %clang_cc1 -triple i686-windows-gnu -emit-llvm -std=c++1y -O0 -o - %s | FileCheck --check-prefix=GNU --check-prefix=G32 %s -// RUN: %clang_cc1 -triple x86_64-windows-gnu -emit-llvm -std=c++1y -O0 -o - %s | FileCheck --check-prefix=GNU --check-prefix=G64 %s -// RUN: %clang_cc1 -triple i686-windows-msvc -fms-compatibility -emit-llvm -std=c++1y -O1 -fno-experimental-new-pass-manager -o - %s -DMSABI | FileCheck --check-prefix=MO1 %s -// RUN: %clang_cc1 -triple i686-windows-gnu -emit-llvm -std=c++1y -O1 -fno-experimental-new-pass-manager -o - %s | FileCheck --check-prefix=GO1 %s +// RUN: %clang_cc1 -disable-frozen-args -triple i686-windows-msvc -fms-compatibility -emit-llvm -std=c++1y -O0 -o - %s -DMSABI | FileCheck --check-prefix=MSC --check-prefix=M32 %s +// RUN: %clang_cc1 -disable-frozen-args -triple x86_64-windows-msvc -fms-compatibility -emit-llvm -std=c++1y -O0 -o - %s -DMSABI | FileCheck --check-prefix=MSC --check-prefix=M64 %s +// RUN: %clang_cc1 -disable-frozen-args -triple i686-windows-gnu -emit-llvm -std=c++1y -O0 -o - %s | FileCheck --check-prefix=GNU --check-prefix=G32 %s +// RUN: %clang_cc1 -disable-frozen-args -triple x86_64-windows-gnu -emit-llvm -std=c++1y -O0 -o - %s | FileCheck --check-prefix=GNU --check-prefix=G64 %s +// RUN: %clang_cc1 -disable-frozen-args -triple i686-windows-msvc -fms-compatibility -emit-llvm -std=c++1y -O1 -fno-experimental-new-pass-manager -o - %s -DMSABI | FileCheck --check-prefix=MO1 %s +// RUN: %clang_cc1 -disable-frozen-args -triple i686-windows-gnu -emit-llvm -std=c++1y -O1 -fno-experimental-new-pass-manager -o - %s | FileCheck --check-prefix=GO1 %s // Helper structs to make templates more expressive. struct ImplicitInst_Imported {}; @@ -408,8 +408,8 @@ // Import special member functions. struct ImportSpecials { - // M32-DAG: declare dllimport x86_thiscallcc %struct.ImportSpecials* @"??0ImportSpecials@@QAE@XZ"(%struct.ImportSpecials* returned) - // M64-DAG: declare dllimport %struct.ImportSpecials* @"??0ImportSpecials@@QEAA@XZ"(%struct.ImportSpecials* returned) + // M32-DAG: declare dllimport x86_thiscallcc frozen %struct.ImportSpecials* @"??0ImportSpecials@@QAE@XZ"(%struct.ImportSpecials* returned) + // M64-DAG: declare dllimport frozen %struct.ImportSpecials* @"??0ImportSpecials@@QEAA@XZ"(%struct.ImportSpecials* returned) // G32-DAG: declare dllimport x86_thiscallcc void @_ZN14ImportSpecialsC1Ev(%struct.ImportSpecials*) // G64-DAG: declare dllimport void @_ZN14ImportSpecialsC1Ev(%struct.ImportSpecials*) __declspec(dllimport) ImportSpecials(); @@ -420,28 +420,28 @@ // G64-DAG: declare dllimport void @_ZN14ImportSpecialsD1Ev(%struct.ImportSpecials*) __declspec(dllimport) ~ImportSpecials(); - // M32-DAG: declare dllimport x86_thiscallcc %struct.ImportSpecials* @"??0ImportSpecials@@QAE@ABU0@@Z"(%struct.ImportSpecials* returned, %struct.ImportSpecials* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}})) - // M64-DAG: declare dllimport %struct.ImportSpecials* @"??0ImportSpecials@@QEAA@AEBU0@@Z"(%struct.ImportSpecials* returned, %struct.ImportSpecials* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}})) + // M32-DAG: declare dllimport x86_thiscallcc frozen %struct.ImportSpecials* @"??0ImportSpecials@@QAE@ABU0@@Z"(%struct.ImportSpecials* returned, %struct.ImportSpecials* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}})) + // M64-DAG: declare dllimport frozen %struct.ImportSpecials* @"??0ImportSpecials@@QEAA@AEBU0@@Z"(%struct.ImportSpecials* returned, %struct.ImportSpecials* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}})) // G32-DAG: declare dllimport x86_thiscallcc void @_ZN14ImportSpecialsC1ERKS_(%struct.ImportSpecials*, %struct.ImportSpecials* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}})) // G64-DAG: declare dllimport void @_ZN14ImportSpecialsC1ERKS_(%struct.ImportSpecials*, %struct.ImportSpecials* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}})) __declspec(dllimport) ImportSpecials(const ImportSpecials&); - // M32-DAG: declare dllimport x86_thiscallcc nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ImportSpecials* @"??4ImportSpecials@@QAEAAU0@ABU0@@Z"(%struct.ImportSpecials*, %struct.ImportSpecials* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}})) - // M64-DAG: declare dllimport nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ImportSpecials* @"??4ImportSpecials@@QEAAAEAU0@AEBU0@@Z"(%struct.ImportSpecials*, %struct.ImportSpecials* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}})) - // G32-DAG: declare dllimport x86_thiscallcc nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ImportSpecials* @_ZN14ImportSpecialsaSERKS_(%struct.ImportSpecials*, %struct.ImportSpecials* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}})) - // G64-DAG: declare dllimport nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ImportSpecials* @_ZN14ImportSpecialsaSERKS_(%struct.ImportSpecials*, %struct.ImportSpecials* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}})) + // M32-DAG: declare dllimport x86_thiscallcc frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ImportSpecials* @"??4ImportSpecials@@QAEAAU0@ABU0@@Z"(%struct.ImportSpecials*, %struct.ImportSpecials* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}})) + // M64-DAG: declare dllimport frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ImportSpecials* @"??4ImportSpecials@@QEAAAEAU0@AEBU0@@Z"(%struct.ImportSpecials*, %struct.ImportSpecials* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}})) + // G32-DAG: declare dllimport x86_thiscallcc frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ImportSpecials* @_ZN14ImportSpecialsaSERKS_(%struct.ImportSpecials*, %struct.ImportSpecials* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}})) + // G64-DAG: declare dllimport frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ImportSpecials* @_ZN14ImportSpecialsaSERKS_(%struct.ImportSpecials*, %struct.ImportSpecials* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}})) __declspec(dllimport) ImportSpecials& operator=(const ImportSpecials&); - // M32-DAG: declare dllimport x86_thiscallcc %struct.ImportSpecials* @"??0ImportSpecials@@QAE@$$QAU0@@Z"(%struct.ImportSpecials* returned, %struct.ImportSpecials* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}})) - // M64-DAG: declare dllimport %struct.ImportSpecials* @"??0ImportSpecials@@QEAA@$$QEAU0@@Z"(%struct.ImportSpecials* returned, %struct.ImportSpecials* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}})) + // M32-DAG: declare dllimport x86_thiscallcc frozen %struct.ImportSpecials* @"??0ImportSpecials@@QAE@$$QAU0@@Z"(%struct.ImportSpecials* returned, %struct.ImportSpecials* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}})) + // M64-DAG: declare dllimport frozen %struct.ImportSpecials* @"??0ImportSpecials@@QEAA@$$QEAU0@@Z"(%struct.ImportSpecials* returned, %struct.ImportSpecials* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}})) // G32-DAG: declare dllimport x86_thiscallcc void @_ZN14ImportSpecialsC1EOS_(%struct.ImportSpecials*, %struct.ImportSpecials* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}})) // G64-DAG: declare dllimport void @_ZN14ImportSpecialsC1EOS_(%struct.ImportSpecials*, %struct.ImportSpecials* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}})) __declspec(dllimport) ImportSpecials(ImportSpecials&&); - // M32-DAG: declare dllimport x86_thiscallcc nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ImportSpecials* @"??4ImportSpecials@@QAEAAU0@$$QAU0@@Z"(%struct.ImportSpecials*, %struct.ImportSpecials* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}})) - // M64-DAG: declare dllimport nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ImportSpecials* @"??4ImportSpecials@@QEAAAEAU0@$$QEAU0@@Z"(%struct.ImportSpecials*, %struct.ImportSpecials* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}})) - // G32-DAG: declare dllimport x86_thiscallcc nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ImportSpecials* @_ZN14ImportSpecialsaSEOS_(%struct.ImportSpecials*, %struct.ImportSpecials* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}})) - // G64-DAG: declare dllimport nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ImportSpecials* @_ZN14ImportSpecialsaSEOS_(%struct.ImportSpecials*, %struct.ImportSpecials* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}})) + // M32-DAG: declare dllimport x86_thiscallcc frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ImportSpecials* @"??4ImportSpecials@@QAEAAU0@$$QAU0@@Z"(%struct.ImportSpecials*, %struct.ImportSpecials* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}})) + // M64-DAG: declare dllimport frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ImportSpecials* @"??4ImportSpecials@@QEAAAEAU0@$$QEAU0@@Z"(%struct.ImportSpecials*, %struct.ImportSpecials* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}})) + // G32-DAG: declare dllimport x86_thiscallcc frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ImportSpecials* @_ZN14ImportSpecialsaSEOS_(%struct.ImportSpecials*, %struct.ImportSpecials* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}})) + // G64-DAG: declare dllimport frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ImportSpecials* @_ZN14ImportSpecialsaSEOS_(%struct.ImportSpecials*, %struct.ImportSpecials* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}})) __declspec(dllimport) ImportSpecials& operator=(ImportSpecials&&); }; USESPECIALS(ImportSpecials) @@ -449,11 +449,11 @@ // Export inline special member functions. struct ImportInlineSpecials { - // M32-DAG: declare dllimport x86_thiscallcc %struct.ImportInlineSpecials* @"??0ImportInlineSpecials@@QAE@XZ"(%struct.ImportInlineSpecials* returned) - // M64-DAG: declare dllimport %struct.ImportInlineSpecials* @"??0ImportInlineSpecials@@QEAA@XZ"(%struct.ImportInlineSpecials* returned) + // M32-DAG: declare dllimport x86_thiscallcc frozen %struct.ImportInlineSpecials* @"??0ImportInlineSpecials@@QAE@XZ"(%struct.ImportInlineSpecials* returned) + // M64-DAG: declare dllimport frozen %struct.ImportInlineSpecials* @"??0ImportInlineSpecials@@QEAA@XZ"(%struct.ImportInlineSpecials* returned) // G32-DAG: define linkonce_odr dso_local x86_thiscallcc void @_ZN20ImportInlineSpecialsC1Ev(%struct.ImportInlineSpecials* %this) - // G64-DAG: define linkonce_odr dso_local void @_ZN20ImportInlineSpecialsC1Ev(%struct.ImportInlineSpecials* %this) - // MO1-DAG: define available_externally dllimport x86_thiscallcc %struct.ImportInlineSpecials* @"??0ImportInlineSpecials@@QAE@XZ"( + // G64-DAG: define linkonce_odr dso_local void @_ZN20ImportInlineSpecialsC1Ev(%struct.ImportInlineSpecials* %this) + // MO1-DAG: define available_externally dllimport x86_thiscallcc frozen %struct.ImportInlineSpecials* @"??0ImportInlineSpecials@@QAE@XZ"( // GO1-DAG: define linkonce_odr dso_local x86_thiscallcc void @_ZN20ImportInlineSpecialsC1Ev( __declspec(dllimport) ImportInlineSpecials() {} @@ -465,36 +465,36 @@ // GO1-DAG: define linkonce_odr dso_local x86_thiscallcc void @_ZN20ImportInlineSpecialsD1Ev( __declspec(dllimport) ~ImportInlineSpecials() {} - // M32-DAG: declare dllimport x86_thiscallcc %struct.ImportInlineSpecials* @"??0ImportInlineSpecials@@QAE@ABU0@@Z"(%struct.ImportInlineSpecials* returned, %struct.ImportInlineSpecials* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}})) - // M64-DAG: declare dllimport %struct.ImportInlineSpecials* @"??0ImportInlineSpecials@@QEAA@AEBU0@@Z"(%struct.ImportInlineSpecials* returned, %struct.ImportInlineSpecials* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}})) + // M32-DAG: declare dllimport x86_thiscallcc frozen %struct.ImportInlineSpecials* @"??0ImportInlineSpecials@@QAE@ABU0@@Z"(%struct.ImportInlineSpecials* returned, %struct.ImportInlineSpecials* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}})) + // M64-DAG: declare dllimport frozen %struct.ImportInlineSpecials* @"??0ImportInlineSpecials@@QEAA@AEBU0@@Z"(%struct.ImportInlineSpecials* returned, %struct.ImportInlineSpecials* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}})) // G32-DAG: define linkonce_odr dso_local x86_thiscallcc void @_ZN20ImportInlineSpecialsC1ERKS_(%struct.ImportInlineSpecials* %this, %struct.ImportInlineSpecials* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) - // G64-DAG: define linkonce_odr dso_local void @_ZN20ImportInlineSpecialsC1ERKS_(%struct.ImportInlineSpecials* %this, %struct.ImportInlineSpecials* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) - // MO1-DAG: define available_externally dllimport x86_thiscallcc %struct.ImportInlineSpecials* @"??0ImportInlineSpecials@@QAE@ABU0@@Z"( + // G64-DAG: define linkonce_odr dso_local void @_ZN20ImportInlineSpecialsC1ERKS_(%struct.ImportInlineSpecials* %this, %struct.ImportInlineSpecials* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) + // MO1-DAG: define available_externally dllimport x86_thiscallcc frozen %struct.ImportInlineSpecials* @"??0ImportInlineSpecials@@QAE@ABU0@@Z"( // GO1-DAG: define linkonce_odr dso_local x86_thiscallcc void @_ZN20ImportInlineSpecialsC1ERKS_( __declspec(dllimport) inline ImportInlineSpecials(const ImportInlineSpecials&); - // M32-DAG: declare dllimport x86_thiscallcc nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ImportInlineSpecials* @"??4ImportInlineSpecials@@QAEAAU0@ABU0@@Z"(%struct.ImportInlineSpecials*, %struct.ImportInlineSpecials* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}})) - // M64-DAG: declare dllimport nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ImportInlineSpecials* @"??4ImportInlineSpecials@@QEAAAEAU0@AEBU0@@Z"(%struct.ImportInlineSpecials*, %struct.ImportInlineSpecials* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}})) - // G32-DAG: define linkonce_odr dso_local x86_thiscallcc nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ImportInlineSpecials* @_ZN20ImportInlineSpecialsaSERKS_(%struct.ImportInlineSpecials* %this, %struct.ImportInlineSpecials* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) - // G64-DAG: define linkonce_odr dso_local nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ImportInlineSpecials* @_ZN20ImportInlineSpecialsaSERKS_(%struct.ImportInlineSpecials* %this, %struct.ImportInlineSpecials* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) - // MO1-DAG: define available_externally dllimport x86_thiscallcc nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ImportInlineSpecials* @"??4ImportInlineSpecials@@QAEAAU0@ABU0@@Z"( - // GO1-DAG: define linkonce_odr dso_local x86_thiscallcc nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ImportInlineSpecials* @_ZN20ImportInlineSpecialsaSERKS_( + // M32-DAG: declare dllimport x86_thiscallcc frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ImportInlineSpecials* @"??4ImportInlineSpecials@@QAEAAU0@ABU0@@Z"(%struct.ImportInlineSpecials*, %struct.ImportInlineSpecials* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}})) + // M64-DAG: declare dllimport frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ImportInlineSpecials* @"??4ImportInlineSpecials@@QEAAAEAU0@AEBU0@@Z"(%struct.ImportInlineSpecials*, %struct.ImportInlineSpecials* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}})) + // G32-DAG: define linkonce_odr dso_local x86_thiscallcc frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ImportInlineSpecials* @_ZN20ImportInlineSpecialsaSERKS_(%struct.ImportInlineSpecials* %this, %struct.ImportInlineSpecials* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) + // G64-DAG: define linkonce_odr dso_local frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ImportInlineSpecials* @_ZN20ImportInlineSpecialsaSERKS_(%struct.ImportInlineSpecials* %this, %struct.ImportInlineSpecials* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) + // MO1-DAG: define available_externally dllimport x86_thiscallcc frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ImportInlineSpecials* @"??4ImportInlineSpecials@@QAEAAU0@ABU0@@Z"( + // GO1-DAG: define linkonce_odr dso_local x86_thiscallcc frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ImportInlineSpecials* @_ZN20ImportInlineSpecialsaSERKS_( __declspec(dllimport) ImportInlineSpecials& operator=(const ImportInlineSpecials&); - // M32-DAG: declare dllimport x86_thiscallcc %struct.ImportInlineSpecials* @"??0ImportInlineSpecials@@QAE@$$QAU0@@Z"(%struct.ImportInlineSpecials* returned, %struct.ImportInlineSpecials* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}})) - // M64-DAG: declare dllimport %struct.ImportInlineSpecials* @"??0ImportInlineSpecials@@QEAA@$$QEAU0@@Z"(%struct.ImportInlineSpecials* returned, %struct.ImportInlineSpecials* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}})) + // M32-DAG: declare dllimport x86_thiscallcc frozen %struct.ImportInlineSpecials* @"??0ImportInlineSpecials@@QAE@$$QAU0@@Z"(%struct.ImportInlineSpecials* returned, %struct.ImportInlineSpecials* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}})) + // M64-DAG: declare dllimport frozen %struct.ImportInlineSpecials* @"??0ImportInlineSpecials@@QEAA@$$QEAU0@@Z"(%struct.ImportInlineSpecials* returned, %struct.ImportInlineSpecials* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}})) // G32-DAG: define linkonce_odr dso_local x86_thiscallcc void @_ZN20ImportInlineSpecialsC1EOS_(%struct.ImportInlineSpecials* %this, %struct.ImportInlineSpecials* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) - // G64-DAG: define linkonce_odr dso_local void @_ZN20ImportInlineSpecialsC1EOS_(%struct.ImportInlineSpecials* %this, %struct.ImportInlineSpecials* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) - // MO1-DAG: define available_externally dllimport x86_thiscallcc %struct.ImportInlineSpecials* @"??0ImportInlineSpecials@@QAE@$$QAU0@@Z"( + // G64-DAG: define linkonce_odr dso_local void @_ZN20ImportInlineSpecialsC1EOS_(%struct.ImportInlineSpecials* %this, %struct.ImportInlineSpecials* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) + // MO1-DAG: define available_externally dllimport x86_thiscallcc frozen %struct.ImportInlineSpecials* @"??0ImportInlineSpecials@@QAE@$$QAU0@@Z"( // GO1-DAG: define linkonce_odr dso_local x86_thiscallcc void @_ZN20ImportInlineSpecialsC1EOS_( __declspec(dllimport) ImportInlineSpecials(ImportInlineSpecials&&) {} - // M32-DAG: declare dllimport x86_thiscallcc nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ImportInlineSpecials* @"??4ImportInlineSpecials@@QAEAAU0@$$QAU0@@Z"(%struct.ImportInlineSpecials*, %struct.ImportInlineSpecials* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}})) - // M64-DAG: declare dllimport nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ImportInlineSpecials* @"??4ImportInlineSpecials@@QEAAAEAU0@$$QEAU0@@Z"(%struct.ImportInlineSpecials*, %struct.ImportInlineSpecials* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}})) - // G32-DAG: define linkonce_odr dso_local x86_thiscallcc nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ImportInlineSpecials* @_ZN20ImportInlineSpecialsaSEOS_(%struct.ImportInlineSpecials* %this, %struct.ImportInlineSpecials* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) - // G64-DAG: define linkonce_odr dso_local nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ImportInlineSpecials* @_ZN20ImportInlineSpecialsaSEOS_(%struct.ImportInlineSpecials* %this, %struct.ImportInlineSpecials* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) - // MO1-DAG: define available_externally dllimport x86_thiscallcc nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ImportInlineSpecials* @"??4ImportInlineSpecials@@QAEAAU0@$$QAU0@@Z"( - // GO1-DAG: define linkonce_odr dso_local x86_thiscallcc nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ImportInlineSpecials* @_ZN20ImportInlineSpecialsaSEOS_( + // M32-DAG: declare dllimport x86_thiscallcc frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ImportInlineSpecials* @"??4ImportInlineSpecials@@QAEAAU0@$$QAU0@@Z"(%struct.ImportInlineSpecials*, %struct.ImportInlineSpecials* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}})) + // M64-DAG: declare dllimport frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ImportInlineSpecials* @"??4ImportInlineSpecials@@QEAAAEAU0@$$QEAU0@@Z"(%struct.ImportInlineSpecials*, %struct.ImportInlineSpecials* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}})) + // G32-DAG: define linkonce_odr dso_local x86_thiscallcc frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ImportInlineSpecials* @_ZN20ImportInlineSpecialsaSEOS_(%struct.ImportInlineSpecials* %this, %struct.ImportInlineSpecials* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) + // G64-DAG: define linkonce_odr dso_local frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ImportInlineSpecials* @_ZN20ImportInlineSpecialsaSEOS_(%struct.ImportInlineSpecials* %this, %struct.ImportInlineSpecials* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) + // MO1-DAG: define available_externally dllimport x86_thiscallcc frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ImportInlineSpecials* @"??4ImportInlineSpecials@@QAEAAU0@$$QAU0@@Z"( + // GO1-DAG: define linkonce_odr dso_local x86_thiscallcc frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ImportInlineSpecials* @_ZN20ImportInlineSpecialsaSEOS_( __declspec(dllimport) ImportInlineSpecials& operator=(ImportInlineSpecials&&) { return *this; } }; ImportInlineSpecials::ImportInlineSpecials(const ImportInlineSpecials&) {} @@ -504,11 +504,11 @@ // Import defaulted member functions. struct ImportDefaulted { - // M32-DAG: declare dllimport x86_thiscallcc %struct.ImportDefaulted* @"??0ImportDefaulted@@QAE@XZ"(%struct.ImportDefaulted* returned) - // M64-DAG: declare dllimport %struct.ImportDefaulted* @"??0ImportDefaulted@@QEAA@XZ"(%struct.ImportDefaulted* returned) + // M32-DAG: declare dllimport x86_thiscallcc frozen %struct.ImportDefaulted* @"??0ImportDefaulted@@QAE@XZ"(%struct.ImportDefaulted* returned) + // M64-DAG: declare dllimport frozen %struct.ImportDefaulted* @"??0ImportDefaulted@@QEAA@XZ"(%struct.ImportDefaulted* returned) // G32-DAG: define linkonce_odr dso_local x86_thiscallcc void @_ZN15ImportDefaultedC1Ev(%struct.ImportDefaulted* %this) - // G64-DAG: define linkonce_odr dso_local void @_ZN15ImportDefaultedC1Ev(%struct.ImportDefaulted* %this) - // MO1-DAG: define available_externally dllimport x86_thiscallcc %struct.ImportDefaulted* @"??0ImportDefaulted@@QAE@XZ"(%struct.ImportDefaulted* returned %this) + // G64-DAG: define linkonce_odr dso_local void @_ZN15ImportDefaultedC1Ev(%struct.ImportDefaulted* %this) + // MO1-DAG: define available_externally dllimport x86_thiscallcc frozen %struct.ImportDefaulted* @"??0ImportDefaulted@@QAE@XZ"(%struct.ImportDefaulted* returned %this) // GO1-DAG: define linkonce_odr dso_local x86_thiscallcc void @_ZN15ImportDefaultedC1Ev(%struct.ImportDefaulted* %this) __declspec(dllimport) ImportDefaulted() = default; @@ -520,36 +520,36 @@ // GO1-DAG: define linkonce_odr dso_local x86_thiscallcc void @_ZN15ImportDefaultedD1Ev(%struct.ImportDefaulted* %this) __declspec(dllimport) ~ImportDefaulted() = default; - // M32-DAG: declare dllimport x86_thiscallcc %struct.ImportDefaulted* @"??0ImportDefaulted@@QAE@ABU0@@Z"(%struct.ImportDefaulted* returned, %struct.ImportDefaulted* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}})) - // M64-DAG: declare dllimport %struct.ImportDefaulted* @"??0ImportDefaulted@@QEAA@AEBU0@@Z"(%struct.ImportDefaulted* returned, %struct.ImportDefaulted* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}})) + // M32-DAG: declare dllimport x86_thiscallcc frozen %struct.ImportDefaulted* @"??0ImportDefaulted@@QAE@ABU0@@Z"(%struct.ImportDefaulted* returned, %struct.ImportDefaulted* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}})) + // M64-DAG: declare dllimport frozen %struct.ImportDefaulted* @"??0ImportDefaulted@@QEAA@AEBU0@@Z"(%struct.ImportDefaulted* returned, %struct.ImportDefaulted* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}})) // G32-DAG: define linkonce_odr dso_local x86_thiscallcc void @_ZN15ImportDefaultedC1ERKS_(%struct.ImportDefaulted* %this, %struct.ImportDefaulted* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) - // G64-DAG: define linkonce_odr dso_local void @_ZN15ImportDefaultedC1ERKS_(%struct.ImportDefaulted* %this, %struct.ImportDefaulted* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) - // MO1-DAG: define available_externally dllimport x86_thiscallcc %struct.ImportDefaulted* @"??0ImportDefaulted@@QAE@ABU0@@Z"(%struct.ImportDefaulted* returned %this, %struct.ImportDefaulted* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) + // G64-DAG: define linkonce_odr dso_local void @_ZN15ImportDefaultedC1ERKS_(%struct.ImportDefaulted* %this, %struct.ImportDefaulted* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) + // MO1-DAG: define available_externally dllimport x86_thiscallcc frozen %struct.ImportDefaulted* @"??0ImportDefaulted@@QAE@ABU0@@Z"(%struct.ImportDefaulted* returned %this, %struct.ImportDefaulted* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) // GO1-DAG: define linkonce_odr dso_local x86_thiscallcc void @_ZN15ImportDefaultedC1ERKS_(%struct.ImportDefaulted* %this, %struct.ImportDefaulted* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) __declspec(dllimport) ImportDefaulted(const ImportDefaulted&) = default; - // M32-DAG: declare dllimport x86_thiscallcc nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ImportDefaulted* @"??4ImportDefaulted@@QAEAAU0@ABU0@@Z"(%struct.ImportDefaulted*, %struct.ImportDefaulted* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}})) - // M64-DAG: declare dllimport nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ImportDefaulted* @"??4ImportDefaulted@@QEAAAEAU0@AEBU0@@Z"(%struct.ImportDefaulted*, %struct.ImportDefaulted* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}})) - // G32-DAG: define linkonce_odr dso_local x86_thiscallcc nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ImportDefaulted* @_ZN15ImportDefaultedaSERKS_(%struct.ImportDefaulted* %this, %struct.ImportDefaulted* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) - // G64-DAG: define linkonce_odr dso_local nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ImportDefaulted* @_ZN15ImportDefaultedaSERKS_(%struct.ImportDefaulted* %this, %struct.ImportDefaulted* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) - // MO1-DAG: define available_externally dllimport x86_thiscallcc nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ImportDefaulted* @"??4ImportDefaulted@@QAEAAU0@ABU0@@Z"(%struct.ImportDefaulted* %this, %struct.ImportDefaulted* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) - // GO1-DAG: define linkonce_odr dso_local x86_thiscallcc nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ImportDefaulted* @_ZN15ImportDefaultedaSERKS_(%struct.ImportDefaulted* %this, %struct.ImportDefaulted* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) + // M32-DAG: declare dllimport x86_thiscallcc frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ImportDefaulted* @"??4ImportDefaulted@@QAEAAU0@ABU0@@Z"(%struct.ImportDefaulted*, %struct.ImportDefaulted* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}})) + // M64-DAG: declare dllimport frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ImportDefaulted* @"??4ImportDefaulted@@QEAAAEAU0@AEBU0@@Z"(%struct.ImportDefaulted*, %struct.ImportDefaulted* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}})) + // G32-DAG: define linkonce_odr dso_local x86_thiscallcc frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ImportDefaulted* @_ZN15ImportDefaultedaSERKS_(%struct.ImportDefaulted* %this, %struct.ImportDefaulted* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) + // G64-DAG: define linkonce_odr dso_local frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ImportDefaulted* @_ZN15ImportDefaultedaSERKS_(%struct.ImportDefaulted* %this, %struct.ImportDefaulted* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) + // MO1-DAG: define available_externally dllimport x86_thiscallcc frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ImportDefaulted* @"??4ImportDefaulted@@QAEAAU0@ABU0@@Z"(%struct.ImportDefaulted* %this, %struct.ImportDefaulted* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) + // GO1-DAG: define linkonce_odr dso_local x86_thiscallcc frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ImportDefaulted* @_ZN15ImportDefaultedaSERKS_(%struct.ImportDefaulted* %this, %struct.ImportDefaulted* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) __declspec(dllimport) ImportDefaulted& operator=(const ImportDefaulted&) = default; - // M32-DAG: declare dllimport x86_thiscallcc %struct.ImportDefaulted* @"??0ImportDefaulted@@QAE@$$QAU0@@Z"(%struct.ImportDefaulted* returned, %struct.ImportDefaulted* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}})) - // M64-DAG: declare dllimport %struct.ImportDefaulted* @"??0ImportDefaulted@@QEAA@$$QEAU0@@Z"(%struct.ImportDefaulted* returned, %struct.ImportDefaulted* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}})) + // M32-DAG: declare dllimport x86_thiscallcc frozen %struct.ImportDefaulted* @"??0ImportDefaulted@@QAE@$$QAU0@@Z"(%struct.ImportDefaulted* returned, %struct.ImportDefaulted* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}})) + // M64-DAG: declare dllimport frozen %struct.ImportDefaulted* @"??0ImportDefaulted@@QEAA@$$QEAU0@@Z"(%struct.ImportDefaulted* returned, %struct.ImportDefaulted* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}})) // G32-DAG: define linkonce_odr dso_local x86_thiscallcc void @_ZN15ImportDefaultedC1EOS_(%struct.ImportDefaulted* %this, %struct.ImportDefaulted* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) - // G64-DAG: define linkonce_odr dso_local void @_ZN15ImportDefaultedC1EOS_(%struct.ImportDefaulted* %this, %struct.ImportDefaulted* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) - // MO1-DAG: define available_externally dllimport x86_thiscallcc %struct.ImportDefaulted* @"??0ImportDefaulted@@QAE@$$QAU0@@Z"(%struct.ImportDefaulted* returned %this, %struct.ImportDefaulted* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) + // G64-DAG: define linkonce_odr dso_local void @_ZN15ImportDefaultedC1EOS_(%struct.ImportDefaulted* %this, %struct.ImportDefaulted* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) + // MO1-DAG: define available_externally dllimport x86_thiscallcc frozen %struct.ImportDefaulted* @"??0ImportDefaulted@@QAE@$$QAU0@@Z"(%struct.ImportDefaulted* returned %this, %struct.ImportDefaulted* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) // GO1-DAG: define linkonce_odr dso_local x86_thiscallcc void @_ZN15ImportDefaultedC1EOS_(%struct.ImportDefaulted* %this, %struct.ImportDefaulted* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) __declspec(dllimport) ImportDefaulted(ImportDefaulted&&) = default; - // M32-DAG: declare dllimport x86_thiscallcc nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ImportDefaulted* @"??4ImportDefaulted@@QAEAAU0@$$QAU0@@Z"(%struct.ImportDefaulted*, %struct.ImportDefaulted* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}})) - // M64-DAG: declare dllimport nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ImportDefaulted* @"??4ImportDefaulted@@QEAAAEAU0@$$QEAU0@@Z"(%struct.ImportDefaulted*, %struct.ImportDefaulted* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}})) - // G32-DAG: define linkonce_odr dso_local x86_thiscallcc nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ImportDefaulted* @_ZN15ImportDefaultedaSEOS_(%struct.ImportDefaulted* %this, %struct.ImportDefaulted* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) - // G64-DAG: define linkonce_odr dso_local nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ImportDefaulted* @_ZN15ImportDefaultedaSEOS_(%struct.ImportDefaulted* %this, %struct.ImportDefaulted* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) - // MO1-DAG: define available_externally dllimport x86_thiscallcc nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ImportDefaulted* @"??4ImportDefaulted@@QAEAAU0@$$QAU0@@Z"(%struct.ImportDefaulted* %this, %struct.ImportDefaulted* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) - // GO1-DAG: define linkonce_odr dso_local x86_thiscallcc nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ImportDefaulted* @_ZN15ImportDefaultedaSEOS_(%struct.ImportDefaulted* %this, %struct.ImportDefaulted* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) + // M32-DAG: declare dllimport x86_thiscallcc frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ImportDefaulted* @"??4ImportDefaulted@@QAEAAU0@$$QAU0@@Z"(%struct.ImportDefaulted*, %struct.ImportDefaulted* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}})) + // M64-DAG: declare dllimport frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ImportDefaulted* @"??4ImportDefaulted@@QEAAAEAU0@$$QEAU0@@Z"(%struct.ImportDefaulted*, %struct.ImportDefaulted* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}})) + // G32-DAG: define linkonce_odr dso_local x86_thiscallcc frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ImportDefaulted* @_ZN15ImportDefaultedaSEOS_(%struct.ImportDefaulted* %this, %struct.ImportDefaulted* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) + // G64-DAG: define linkonce_odr dso_local frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ImportDefaulted* @_ZN15ImportDefaultedaSEOS_(%struct.ImportDefaulted* %this, %struct.ImportDefaulted* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) + // MO1-DAG: define available_externally dllimport x86_thiscallcc frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ImportDefaulted* @"??4ImportDefaulted@@QAEAAU0@$$QAU0@@Z"(%struct.ImportDefaulted* %this, %struct.ImportDefaulted* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) + // GO1-DAG: define linkonce_odr dso_local x86_thiscallcc frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ImportDefaulted* @_ZN15ImportDefaultedaSEOS_(%struct.ImportDefaulted* %this, %struct.ImportDefaulted* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) __declspec(dllimport) ImportDefaulted& operator=(ImportDefaulted&&) = default; ForceNonTrivial v; // ensure special members are non-trivial @@ -571,8 +571,8 @@ #ifdef MSABI // For MinGW, the function will not be dllimport, and we cannot add the attribute now. -// M32-DAG: declare dllimport x86_thiscallcc %struct.ImportDefaultedDefs* @"??0ImportDefaultedDefs@@QAE@XZ"(%struct.ImportDefaultedDefs* returned) -// M64-DAG: declare dllimport %struct.ImportDefaultedDefs* @"??0ImportDefaultedDefs@@QEAA@XZ"(%struct.ImportDefaultedDefs* returned) +// M32-DAG: declare dllimport x86_thiscallcc frozen %struct.ImportDefaultedDefs* @"??0ImportDefaultedDefs@@QAE@XZ"(%struct.ImportDefaultedDefs* returned) +// M64-DAG: declare dllimport frozen %struct.ImportDefaultedDefs* @"??0ImportDefaultedDefs@@QEAA@XZ"(%struct.ImportDefaultedDefs* returned) __declspec(dllimport) ImportDefaultedDefs::ImportDefaultedDefs() = default; #endif @@ -583,30 +583,30 @@ __declspec(dllimport) ImportDefaultedDefs::~ImportDefaultedDefs() = default; #endif -// M32-DAG: declare dllimport x86_thiscallcc %struct.ImportDefaultedDefs* @"??0ImportDefaultedDefs@@QAE@ABU0@@Z"(%struct.ImportDefaultedDefs* returned, %struct.ImportDefaultedDefs* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}})) -// M64-DAG: declare dllimport %struct.ImportDefaultedDefs* @"??0ImportDefaultedDefs@@QEAA@AEBU0@@Z"(%struct.ImportDefaultedDefs* returned, %struct.ImportDefaultedDefs* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}})) +// M32-DAG: declare dllimport x86_thiscallcc frozen %struct.ImportDefaultedDefs* @"??0ImportDefaultedDefs@@QAE@ABU0@@Z"(%struct.ImportDefaultedDefs* returned, %struct.ImportDefaultedDefs* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}})) +// M64-DAG: declare dllimport frozen %struct.ImportDefaultedDefs* @"??0ImportDefaultedDefs@@QEAA@AEBU0@@Z"(%struct.ImportDefaultedDefs* returned, %struct.ImportDefaultedDefs* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}})) // G32-DAG: define linkonce_odr dso_local x86_thiscallcc void @_ZN19ImportDefaultedDefsC1ERKS_(%struct.ImportDefaultedDefs* %this, %struct.ImportDefaultedDefs* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) -// G64-DAG: define linkonce_odr dso_local void @_ZN19ImportDefaultedDefsC1ERKS_(%struct.ImportDefaultedDefs* %this, %struct.ImportDefaultedDefs* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) +// G64-DAG: define linkonce_odr dso_local void @_ZN19ImportDefaultedDefsC1ERKS_(%struct.ImportDefaultedDefs* %this, %struct.ImportDefaultedDefs* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) inline ImportDefaultedDefs::ImportDefaultedDefs(const ImportDefaultedDefs&) = default; -// M32-DAG: declare dllimport x86_thiscallcc nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ImportDefaultedDefs* @"??4ImportDefaultedDefs@@QAEAAU0@ABU0@@Z"(%struct.ImportDefaultedDefs*, %struct.ImportDefaultedDefs* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}})) -// M64-DAG: declare dllimport nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ImportDefaultedDefs* @"??4ImportDefaultedDefs@@QEAAAEAU0@AEBU0@@Z"(%struct.ImportDefaultedDefs*, %struct.ImportDefaultedDefs* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}})) -// G32-DAG: define linkonce_odr dso_local x86_thiscallcc nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ImportDefaultedDefs* @_ZN19ImportDefaultedDefsaSERKS_(%struct.ImportDefaultedDefs* %this, %struct.ImportDefaultedDefs* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) -// G64-DAG: define linkonce_odr dso_local nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ImportDefaultedDefs* @_ZN19ImportDefaultedDefsaSERKS_(%struct.ImportDefaultedDefs* %this, %struct.ImportDefaultedDefs* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) +// M32-DAG: declare dllimport x86_thiscallcc frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ImportDefaultedDefs* @"??4ImportDefaultedDefs@@QAEAAU0@ABU0@@Z"(%struct.ImportDefaultedDefs*, %struct.ImportDefaultedDefs* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}})) +// M64-DAG: declare dllimport frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ImportDefaultedDefs* @"??4ImportDefaultedDefs@@QEAAAEAU0@AEBU0@@Z"(%struct.ImportDefaultedDefs*, %struct.ImportDefaultedDefs* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}})) +// G32-DAG: define linkonce_odr dso_local x86_thiscallcc frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ImportDefaultedDefs* @_ZN19ImportDefaultedDefsaSERKS_(%struct.ImportDefaultedDefs* %this, %struct.ImportDefaultedDefs* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) +// G64-DAG: define linkonce_odr dso_local frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ImportDefaultedDefs* @_ZN19ImportDefaultedDefsaSERKS_(%struct.ImportDefaultedDefs* %this, %struct.ImportDefaultedDefs* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) inline ImportDefaultedDefs& ImportDefaultedDefs::operator=(const ImportDefaultedDefs&) = default; -// M32-DAG: define dso_local dllexport x86_thiscallcc %struct.ImportDefaultedDefs* @"??0ImportDefaultedDefs@@QAE@$$QAU0@@Z"(%struct.ImportDefaultedDefs* returned %this, %struct.ImportDefaultedDefs* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) -// M64-DAG: define dso_local dllexport %struct.ImportDefaultedDefs* @"??0ImportDefaultedDefs@@QEAA@$$QEAU0@@Z"(%struct.ImportDefaultedDefs* returned %this, %struct.ImportDefaultedDefs* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) +// M32-DAG: define dso_local dllexport x86_thiscallcc frozen %struct.ImportDefaultedDefs* @"??0ImportDefaultedDefs@@QAE@$$QAU0@@Z"(%struct.ImportDefaultedDefs* returned %this, %struct.ImportDefaultedDefs* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) +// M64-DAG: define dso_local dllexport frozen %struct.ImportDefaultedDefs* @"??0ImportDefaultedDefs@@QEAA@$$QEAU0@@Z"(%struct.ImportDefaultedDefs* returned %this, %struct.ImportDefaultedDefs* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) // G32-DAG: define dso_local x86_thiscallcc void @_ZN19ImportDefaultedDefsC1EOS_(%struct.ImportDefaultedDefs* %this, %struct.ImportDefaultedDefs* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) -// G64-DAG: define dso_local void @_ZN19ImportDefaultedDefsC1EOS_(%struct.ImportDefaultedDefs* %this, %struct.ImportDefaultedDefs* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) +// G64-DAG: define dso_local void @_ZN19ImportDefaultedDefsC1EOS_(%struct.ImportDefaultedDefs* %this, %struct.ImportDefaultedDefs* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) // G32-DAG: define dso_local x86_thiscallcc void @_ZN19ImportDefaultedDefsC2EOS_(%struct.ImportDefaultedDefs* %this, %struct.ImportDefaultedDefs* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) -// G64-DAG: define dso_local void @_ZN19ImportDefaultedDefsC2EOS_(%struct.ImportDefaultedDefs* %this, %struct.ImportDefaultedDefs* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) +// G64-DAG: define dso_local void @_ZN19ImportDefaultedDefsC2EOS_(%struct.ImportDefaultedDefs* %this, %struct.ImportDefaultedDefs* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) ImportDefaultedDefs::ImportDefaultedDefs(ImportDefaultedDefs&&) = default; // dllimport ignored -// M32-DAG: define dso_local dllexport x86_thiscallcc nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ImportDefaultedDefs* @"??4ImportDefaultedDefs@@QAEAAU0@$$QAU0@@Z"(%struct.ImportDefaultedDefs* %this, %struct.ImportDefaultedDefs* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) -// M64-DAG: define dso_local dllexport nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ImportDefaultedDefs* @"??4ImportDefaultedDefs@@QEAAAEAU0@$$QEAU0@@Z"(%struct.ImportDefaultedDefs* %this, %struct.ImportDefaultedDefs* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) -// G32-DAG: define dso_local x86_thiscallcc nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ImportDefaultedDefs* @_ZN19ImportDefaultedDefsaSEOS_(%struct.ImportDefaultedDefs* %this, %struct.ImportDefaultedDefs* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) -// G64-DAG: define dso_local nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ImportDefaultedDefs* @_ZN19ImportDefaultedDefsaSEOS_(%struct.ImportDefaultedDefs* %this, %struct.ImportDefaultedDefs* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) +// M32-DAG: define dso_local dllexport x86_thiscallcc frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ImportDefaultedDefs* @"??4ImportDefaultedDefs@@QAEAAU0@$$QAU0@@Z"(%struct.ImportDefaultedDefs* %this, %struct.ImportDefaultedDefs* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) +// M64-DAG: define dso_local dllexport frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ImportDefaultedDefs* @"??4ImportDefaultedDefs@@QEAAAEAU0@$$QEAU0@@Z"(%struct.ImportDefaultedDefs* %this, %struct.ImportDefaultedDefs* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) +// G32-DAG: define dso_local x86_thiscallcc frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ImportDefaultedDefs* @_ZN19ImportDefaultedDefsaSEOS_(%struct.ImportDefaultedDefs* %this, %struct.ImportDefaultedDefs* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) +// G64-DAG: define dso_local frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ImportDefaultedDefs* @_ZN19ImportDefaultedDefsaSEOS_(%struct.ImportDefaultedDefs* %this, %struct.ImportDefaultedDefs* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) ImportDefaultedDefs& ImportDefaultedDefs::operator=(ImportDefaultedDefs&&) = default; // dllimport ignored USESPECIALS(ImportDefaultedDefs) @@ -620,16 +620,16 @@ __declspec(dllimport) void operator delete[](void*); }; -// M32-DAG: declare dllimport i8* @"??2ImportAlloc@@SAPAXI@Z"(i32) -// M64-DAG: declare dllimport i8* @"??2ImportAlloc@@SAPEAX_K@Z"(i64) -// G32-DAG: declare dllimport i8* @_ZN11ImportAllocnwEj(i32) -// G64-DAG: declare dllimport i8* @_ZN11ImportAllocnwEy(i64) +// M32-DAG: declare dllimport frozen i8* @"??2ImportAlloc@@SAPAXI@Z"(i32) +// M64-DAG: declare dllimport frozen i8* @"??2ImportAlloc@@SAPEAX_K@Z"(i64) +// G32-DAG: declare dllimport frozen i8* @_ZN11ImportAllocnwEj(i32) +// G64-DAG: declare dllimport frozen i8* @_ZN11ImportAllocnwEy(i64) void UNIQ(use)() { new ImportAlloc(); } -// M32-DAG: declare dllimport i8* @"??_UImportAlloc@@SAPAXI@Z"(i32) -// M64-DAG: declare dllimport i8* @"??_UImportAlloc@@SAPEAX_K@Z"(i64) -// G32-DAG: declare dllimport i8* @_ZN11ImportAllocnaEj(i32) -// G64-DAG: declare dllimport i8* @_ZN11ImportAllocnaEy(i64) +// M32-DAG: declare dllimport frozen i8* @"??_UImportAlloc@@SAPAXI@Z"(i32) +// M64-DAG: declare dllimport frozen i8* @"??_UImportAlloc@@SAPEAX_K@Z"(i64) +// G32-DAG: declare dllimport frozen i8* @_ZN11ImportAllocnaEj(i32) +// G64-DAG: declare dllimport frozen i8* @_ZN11ImportAllocnaEy(i64) void UNIQ(use)() { new ImportAlloc[1]; } // M32-DAG: declare dllimport void @"??3ImportAlloc@@SAXPAX@Z"(i8*) diff --git a/clang/test/CodeGenCXX/dllimport-runtime-fns.cpp b/clang/test/CodeGenCXX/dllimport-runtime-fns.cpp --- a/clang/test/CodeGenCXX/dllimport-runtime-fns.cpp +++ b/clang/test/CodeGenCXX/dllimport-runtime-fns.cpp @@ -48,16 +48,16 @@ struct T {}; T *foo3() { return dynamic_cast((C *)0); } // __RTDynamicCast should not be marked dllimport. -// MSVC-LABEL: define dso_local %struct.T* @"?foo3@@YAPEAUT@@XZ" +// MSVC-LABEL: define dso_local frozen %struct.T* @"?foo3@@YAPEAUT@@XZ" // MSVC: call i8* @__RTDynamicCast({{.*}}) // MSVC: declare dso_local i8* @__RTDynamicCast(i8*, i32, i8*, i8*, i32) // Again, imported -// ITANIUM-LABEL: define dso_local %struct.T* @_Z4foo3v() +// ITANIUM-LABEL: define dso_local frozen %struct.T* @_Z4foo3v() // ITANIUM: call i8* @__dynamic_cast({{.*}}) // ITANIUM: declare dllimport i8* @__dynamic_cast({{.*}}) // Not imported -// GNU-LABEL: define dso_local %struct.T* @_Z4foo3v() +// GNU-LABEL: define dso_local frozen %struct.T* @_Z4foo3v() // GNU: call i8* @__dynamic_cast({{.*}}) // GNU: declare dso_local i8* @__dynamic_cast({{.*}}) diff --git a/clang/test/CodeGenCXX/dllimport.cpp b/clang/test/CodeGenCXX/dllimport.cpp --- a/clang/test/CodeGenCXX/dllimport.cpp +++ b/clang/test/CodeGenCXX/dllimport.cpp @@ -1,14 +1,14 @@ -// RUN: %clang_cc1 -triple i686-windows-msvc -fno-rtti -fno-threadsafe-statics -fms-extensions -emit-llvm -std=c++1y -O0 -o - %s -DMSABI -w | FileCheck --check-prefix=MSC --check-prefix=M32 %s -// RUN: %clang_cc1 -triple x86_64-windows-msvc -fno-rtti -fno-threadsafe-statics -fms-extensions -emit-llvm -std=c++1y -O0 -o - %s -DMSABI -w | FileCheck --check-prefix=MSC --check-prefix=M64 %s -// RUN: %clang_cc1 -triple i686-windows-gnu -fno-rtti -fno-threadsafe-statics -fms-extensions -emit-llvm -std=c++1y -O0 -o - %s -w | FileCheck --check-prefix=GNU --check-prefix=G32 %s -// RUN: %clang_cc1 -triple x86_64-windows-gnu -fno-rtti -fno-threadsafe-statics -fms-extensions -emit-llvm -std=c++1y -O0 -o - %s -w | FileCheck --check-prefix=GNU --check-prefix=G64 %s -// RUN: %clang_cc1 -triple i686-windows-msvc -fno-rtti -fno-threadsafe-statics -fms-extensions -fms-compatibility-version=18.00 -emit-llvm -std=c++1y -O1 -disable-llvm-passes -o - %s -DMSABI -w | FileCheck --check-prefix=MO1 --check-prefix=M18 %s -// RUN: %clang_cc1 -triple i686-windows-msvc -fno-rtti -fno-threadsafe-statics -fms-extensions -fms-compatibility-version=19.00 -emit-llvm -std=c++1y -O1 -disable-llvm-passes -o - %s -DMSABI -w | FileCheck --check-prefix=MO1 --check-prefix=M19 %s -// RUN: %clang_cc1 -triple i686-windows-gnu -fno-rtti -fno-threadsafe-statics -fms-extensions -emit-llvm -std=c++1y -O1 -fno-experimental-new-pass-manager -o - %s -w | FileCheck --check-prefix=GO1 %s +// RUN: %clang_cc1 -disable-frozen-args -triple i686-windows-msvc -fno-rtti -fno-threadsafe-statics -fms-extensions -emit-llvm -std=c++1y -O0 -o - %s -DMSABI -w | FileCheck --check-prefix=MSC --check-prefix=M32 %s +// RUN: %clang_cc1 -disable-frozen-args -triple x86_64-windows-msvc -fno-rtti -fno-threadsafe-statics -fms-extensions -emit-llvm -std=c++1y -O0 -o - %s -DMSABI -w | FileCheck --check-prefix=MSC --check-prefix=M64 %s +// RUN: %clang_cc1 -disable-frozen-args -triple i686-windows-gnu -fno-rtti -fno-threadsafe-statics -fms-extensions -emit-llvm -std=c++1y -O0 -o - %s -w | FileCheck --check-prefix=GNU --check-prefix=G32 %s +// RUN: %clang_cc1 -disable-frozen-args -triple x86_64-windows-gnu -fno-rtti -fno-threadsafe-statics -fms-extensions -emit-llvm -std=c++1y -O0 -o - %s -w | FileCheck --check-prefix=GNU --check-prefix=G64 %s +// RUN: %clang_cc1 -disable-frozen-args -triple i686-windows-msvc -fno-rtti -fno-threadsafe-statics -fms-extensions -fms-compatibility-version=18.00 -emit-llvm -std=c++1y -O1 -disable-llvm-passes -o - %s -DMSABI -w | FileCheck --check-prefix=MO1 --check-prefix=M18 %s +// RUN: %clang_cc1 -disable-frozen-args -triple i686-windows-msvc -fno-rtti -fno-threadsafe-statics -fms-extensions -fms-compatibility-version=19.00 -emit-llvm -std=c++1y -O1 -disable-llvm-passes -o - %s -DMSABI -w | FileCheck --check-prefix=MO1 --check-prefix=M19 %s +// RUN: %clang_cc1 -disable-frozen-args -triple i686-windows-gnu -fno-rtti -fno-threadsafe-statics -fms-extensions -emit-llvm -std=c++1y -O1 -fno-experimental-new-pass-manager -o - %s -w | FileCheck --check-prefix=GO1 %s // CHECK-NOT doesn't play nice with CHECK-DAG, so use separate run lines. -// RUN: %clang_cc1 -triple i686-windows-msvc -fno-rtti -fno-threadsafe-statics -fms-extensions -emit-llvm -std=c++1y -O0 -o - %s -DMSABI -w | FileCheck --check-prefix=MSC2 %s -// RUN: %clang_cc1 -triple i686-windows-gnu -fno-rtti -fno-threadsafe-statics -fms-extensions -emit-llvm -std=c++1y -O0 -o - %s -w | FileCheck --check-prefix=GNU2 %s +// RUN: %clang_cc1 -disable-frozen-args -triple i686-windows-msvc -fno-rtti -fno-threadsafe-statics -fms-extensions -emit-llvm -std=c++1y -O0 -o - %s -DMSABI -w | FileCheck --check-prefix=MSC2 %s +// RUN: %clang_cc1 -disable-frozen-args -triple i686-windows-gnu -fno-rtti -fno-threadsafe-statics -fms-extensions -emit-llvm -std=c++1y -O0 -o - %s -w | FileCheck --check-prefix=GNU2 %s // Helper structs to make templates more expressive. struct ImplicitInst_Imported {}; @@ -308,8 +308,8 @@ USE(friend5) // Implicit declarations can be redeclared with dllimport. -// MSC-DAG: declare dllimport nonnull i8* @"??2@{{YAPAXI|YAPEAX_K}}@Z"( -// GNU-DAG: declare dllimport nonnull i8* @_Znw{{[yj]}}( +// MSC-DAG: declare dllimport frozen nonnull i8* @"??2@{{YAPAXI|YAPEAX_K}}@Z"( +// GNU-DAG: declare dllimport frozen nonnull i8* @_Znw{{[yj]}}( __declspec(dllimport) void* operator new(__SIZE_TYPE__ n); void UNIQ(use)() { ::operator new(42); } @@ -327,17 +327,17 @@ struct ClassWithNonImportedMethod { int f(); }; __declspec(dllimport) inline int ReferencingImportedVar() { return ImportedVar; } -// MO1-DAG: define available_externally dllimport i32 @"?ReferencingImportedVar@@YAHXZ" +// MO1-DAG: define available_externally dllimport frozen i32 @"?ReferencingImportedVar@@YAHXZ" __declspec(dllimport) inline int ReferencingNonImportedVar() { return NonImportedVar; } -// MO1-DAG: declare dllimport i32 @"?ReferencingNonImportedVar@@YAHXZ"() +// MO1-DAG: declare dllimport frozen i32 @"?ReferencingNonImportedVar@@YAHXZ"() __declspec(dllimport) inline int ReferencingImportedFunc() { return ImportedFunc(); } -// MO1-DAG: define available_externally dllimport i32 @"?ReferencingImportedFunc@@YAHXZ" +// MO1-DAG: define available_externally dllimport frozen i32 @"?ReferencingImportedFunc@@YAHXZ" __declspec(dllimport) inline int ReferencingNonImportedFunc() { return NonImportedFunc(); } -// MO1-DAG: declare dllimport i32 @"?ReferencingNonImportedFunc@@YAHXZ"() +// MO1-DAG: declare dllimport frozen i32 @"?ReferencingNonImportedFunc@@YAHXZ"() __declspec(dllimport) inline int ReferencingNonImportedMethod(ClassWithNonImportedMethod *x) { return x->f(); } -// MO1-DAG: declare dllimport i32 @"?ReferencingNonImportedMethod +// MO1-DAG: declare dllimport frozen i32 @"?ReferencingNonImportedMethod __declspec(dllimport) inline int ReferencingClassMemberPtr(int (ClassWithNonImportedMethod::*p)(), ClassWithNonImportedMethod *x) { return (x->*p)(); } -// MO1-DAG: define available_externally dllimport i32 @"?ReferencingClassMemberPtr@@YAHP8ClassWithNonImportedMethod@@AEHXZPAU1@@Z" +// MO1-DAG: define available_externally dllimport frozen i32 @"?ReferencingClassMemberPtr@@YAHP8ClassWithNonImportedMethod@@AEHXZPAU1@@Z" USE(ReferencingImportedVar) USE(ReferencingNonImportedVar) USE(ReferencingImportedFunc) @@ -346,17 +346,17 @@ void UNIQ(use)() { ReferencingClassMemberPtr(&ClassWithNonImportedMethod::f, nullptr); } // References to operator new and delete count too, despite not being DeclRefExprs. __declspec(dllimport) inline int *ReferencingNonImportedNew() { return new int[2]; } -// MO1-DAG: declare dllimport i32* @"?ReferencingNonImportedNew@@YAPAHXZ" +// MO1-DAG: declare dllimport frozen i32* @"?ReferencingNonImportedNew@@YAPAHXZ" __declspec(dllimport) inline int *ReferencingNonImportedDelete() { delete (int*)nullptr; } -// MO1-DAG: declare dllimport i32* @"?ReferencingNonImportedDelete@@YAPAHXZ" +// MO1-DAG: declare dllimport frozen i32* @"?ReferencingNonImportedDelete@@YAPAHXZ" USE(ReferencingNonImportedNew) USE(ReferencingNonImportedDelete) __declspec(dllimport) void* operator new[](__SIZE_TYPE__); __declspec(dllimport) void operator delete(void*); __declspec(dllimport) inline int *ReferencingImportedNew() { return new int[2]; } -// MO1-DAG: define available_externally dllimport i32* @"?ReferencingImportedNew@@YAPAHXZ" +// MO1-DAG: define available_externally dllimport frozen i32* @"?ReferencingImportedNew@@YAPAHXZ" __declspec(dllimport) inline int *ReferencingImportedDelete() { delete (int*)nullptr; } -// MO1-DAG: define available_externally dllimport i32* @"?ReferencingImportedDelete@@YAPAHXZ" +// MO1-DAG: define available_externally dllimport frozen i32* @"?ReferencingImportedDelete@@YAPAHXZ" USE(ReferencingImportedNew) USE(ReferencingImportedDelete) struct ClassWithDtor { ~ClassWithDtor() {} }; @@ -369,7 +369,7 @@ struct ClassWithCtor { ClassWithCtor() {} }; struct __declspec(dllimport) ClassWithNonDllImportFieldWithCtor { ClassWithCtor t; }; USECLASS(ClassWithNonDllImportFieldWithCtor); -// MO1-DAG: declare dllimport x86_thiscallcc %struct.ClassWithNonDllImportFieldWithCtor* @"??0ClassWithNonDllImportFieldWithCtor@@QAE@XZ"(%struct.ClassWithNonDllImportFieldWithCtor* returned) +// MO1-DAG: declare dllimport x86_thiscallcc frozen %struct.ClassWithNonDllImportFieldWithCtor* @"??0ClassWithNonDllImportFieldWithCtor@@QAE@XZ"(%struct.ClassWithNonDllImportFieldWithCtor* returned) struct ClassWithImplicitDtor { __declspec(dllimport) ClassWithImplicitDtor(); ClassWithDtor member; }; __declspec(dllimport) inline void ReferencingDtorThroughDefinition() { ClassWithImplicitDtor x; }; USE(ReferencingDtorThroughDefinition) @@ -638,12 +638,12 @@ // MO1-DAG: @"?b@T@@2HA" = external dllimport global i32 T& operator=(T&) = default; - // MO1-DAG: define available_externally dllimport x86_thiscallcc nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.T* @"??4T@@QAEAAU0@AAU0@@Z" + // MO1-DAG: define available_externally dllimport x86_thiscallcc frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.T* @"??4T@@QAEAAU0@AAU0@@Z" T& operator=(T&&) = default; // Note: Don't mark inline move operators dllimport because current MSVC versions don't export them. - // M18-DAG: define linkonce_odr dso_local x86_thiscallcc nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.T* @"??4T@@QAEAAU0@$$QAU0@@Z" - // M19-DAG: define available_externally dllimport x86_thiscallcc nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.T* @"??4T@@QAEAAU0@$$QAU0@@Z" + // M18-DAG: define linkonce_odr dso_local x86_thiscallcc frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.T* @"??4T@@QAEAAU0@$$QAU0@@Z" + // M19-DAG: define available_externally dllimport x86_thiscallcc frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.T* @"??4T@@QAEAAU0@$$QAU0@@Z" }; USEMEMFUNC(T, a) USESTATICMEMFUNC(T, StaticMethod) @@ -831,7 +831,7 @@ USECLASS(ExplicitInstantiationDeclImportedDefTemplate); USEMEMFUNC(ExplicitInstantiationDeclImportedDefTemplate, f); // M32-DAG: {{declare|define available_externally}} dllimport x86_thiscallcc void @"?f@?$ExplicitInstantiationDeclImportedDefTemplate@H@@QAEXXZ" -// M32-DAG: {{declare|define available_externally}} dllimport x86_thiscallcc %struct.ExplicitInstantiationDeclImportedDefTemplate* @"??0?$ExplicitInstantiationDeclImportedDefTemplate@H@@QAE@XZ" +// M32-DAG: {{declare|define available_externally}} dllimport x86_thiscallcc frozen %struct.ExplicitInstantiationDeclImportedDefTemplate* @"??0?$ExplicitInstantiationDeclImportedDefTemplate@H@@QAE@XZ" // G32-DAG: define weak_odr dso_local x86_thiscallcc void @_ZN44ExplicitInstantiationDeclImportedDefTemplateIiE1fEv template struct __declspec(dllimport) ExplicitInstantiationDeclExportedDefImportedTemplate { void f() {} ExplicitInstantiationDeclExportedDefImportedTemplate() {} }; @@ -840,7 +840,7 @@ USECLASS(ExplicitInstantiationDeclExportedDefImportedTemplate); USEMEMFUNC(ExplicitInstantiationDeclExportedDefImportedTemplate, f); // M32-DAG: {{declare|define available_externally}} dllimport x86_thiscallcc void @"?f@?$ExplicitInstantiationDeclExportedDefImportedTemplate@H@@QAEXXZ" -// M32-DAG: {{declare|define available_externally}} dllimport x86_thiscallcc %struct.ExplicitInstantiationDeclExportedDefImportedTemplate* @"??0?$ExplicitInstantiationDeclExportedDefImportedTemplate@H@@QAE@XZ" +// M32-DAG: {{declare|define available_externally}} dllimport x86_thiscallcc frozen %struct.ExplicitInstantiationDeclExportedDefImportedTemplate* @"??0?$ExplicitInstantiationDeclExportedDefImportedTemplate@H@@QAE@XZ" template struct PR23770BaseTemplate { void f() {} }; template struct PR23770DerivedTemplate : PR23770BaseTemplate {}; diff --git a/clang/test/CodeGenCXX/duplicate-mangled-name.cpp b/clang/test/CodeGenCXX/duplicate-mangled-name.cpp --- a/clang/test/CodeGenCXX/duplicate-mangled-name.cpp +++ b/clang/test/CodeGenCXX/duplicate-mangled-name.cpp @@ -40,7 +40,7 @@ _ZN1TD1Ev(); // CHECK: call void bitcast ({{.*}} (%struct.T*)* @_ZN1TD1Ev to void ()*)() T t; -// CHECK: call {{.*}} @_ZN1TD1Ev(%struct.T* %t) +// CHECK: call {{.*}} @_ZN1TD1Ev(%struct.T* frozen %t) return _ZN2nm3abcE + nm::abc; } diff --git a/clang/test/CodeGenCXX/dynamic-cast-always-null.cpp b/clang/test/CodeGenCXX/dynamic-cast-always-null.cpp --- a/clang/test/CodeGenCXX/dynamic-cast-always-null.cpp +++ b/clang/test/CodeGenCXX/dynamic-cast-always-null.cpp @@ -5,14 +5,14 @@ // CHECK: @_Z1fP1B C *f(B* b) { - // CHECK-NOT: call i8* @__dynamic_cast + // CHECK-NOT: call dynamic_cast // CHECK: ret %struct.C* null return dynamic_cast(b); } // CHECK: @_Z1fR1B C &f(B& b) { - // CHECK-NOT: call i8* @__dynamic_cast + // CHECK-NOT: call dynamic_cast // CHECK: call void @__cxa_bad_cast() [[NR:#[0-9]+]] // CHECK: ret %struct.C* undef return dynamic_cast(b); diff --git a/clang/test/CodeGenCXX/dynamic_cast-no-rtti.cpp b/clang/test/CodeGenCXX/dynamic_cast-no-rtti.cpp --- a/clang/test/CodeGenCXX/dynamic_cast-no-rtti.cpp +++ b/clang/test/CodeGenCXX/dynamic_cast-no-rtti.cpp @@ -14,7 +14,7 @@ A *upcast(B *b) { return dynamic_cast(b); // CHECK-LABEL: define {{.*}}%struct.A* @_Z6upcastP1B -// CHECK-NOT: call {{.*}}i8* @__dynamic_cast +// CHECK-NOT: call dynamic_cast } // A NoOp dynamic_cast can be used with -fno-rtti iff it does not use @@ -22,5 +22,5 @@ B *samecast(B *b) { return dynamic_cast(b); // CHECK-LABEL: define {{.*}}%struct.B* @_Z8samecastP1B -// CHECK-NOT: call {{.*}}i8* @__dynamic_cast +// CHECK-NOT: call dynamic_cast } diff --git a/clang/test/CodeGenCXX/eh.cpp b/clang/test/CodeGenCXX/eh.cpp --- a/clang/test/CodeGenCXX/eh.cpp +++ b/clang/test/CodeGenCXX/eh.cpp @@ -35,7 +35,7 @@ // CHECK-NEXT: [[SELECTORVAR:%.*]] = alloca i32 // CHECK-NEXT: [[EXNOBJ:%.*]] = call i8* @__cxa_allocate_exception(i64 16) // CHECK-NEXT: [[EXN:%.*]] = bitcast i8* [[EXNOBJ]] to [[DSTAR:%[^*]*\*]] -// CHECK-NEXT: invoke void @_ZN7test2_DC1ERKS_([[DSTAR]] [[EXN]], [[DSTAR]] nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) @d2) +// CHECK-NEXT: invoke void @_ZN7test2_DC1ERKS_([[DSTAR]] frozen [[EXN]], [[DSTAR]] frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) @d2) // CHECK-NEXT: to label %[[CONT:.*]] unwind label %{{.*}} // : [[CONT]]: (can't check this in Release-Asserts builds) // CHECK: call void @__cxa_throw(i8* [[EXNOBJ]], i8* bitcast ({{.*}}* @_ZTI7test2_D to i8*), i8* null) [[NR]] @@ -83,7 +83,7 @@ // CHECK-LABEL: define void @_ZN5test54testEv() // CHECK: [[EXNOBJ:%.*]] = call i8* @__cxa_allocate_exception(i64 1) // CHECK: [[EXNCAST:%.*]] = bitcast i8* [[EXNOBJ]] to [[A:%[^*]*]]* -// CHECK-NEXT: invoke void @_ZN5test51AC1Ev([[A]]* [[EXNCAST]]) +// CHECK-NEXT: invoke void @_ZN5test51AC1Ev([[A]]* frozen [[EXNCAST]]) // CHECK: invoke void @__cxa_throw(i8* [[EXNOBJ]], i8* bitcast ({{.*}}* @_ZTIN5test51AE to i8*), i8* bitcast (void ([[A]]*)* @_ZN5test51AD1Ev to i8*)) [[NR]] // CHECK-NEXT: to label {{%.*}} unwind label %[[HANDLER:[^ ]*]] // : [[HANDLER]]: (can't check this in Release-Asserts builds) @@ -102,7 +102,7 @@ // PR7127 namespace test7 { -// CHECK-LABEL: define i32 @_ZN5test73fooEv() +// CHECK-LABEL: define frozen i32 @_ZN5test73fooEv() // CHECK-SAME: personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) int foo() { // CHECK: [[CAUGHTEXNVAR:%.*]] = alloca i8* @@ -187,7 +187,7 @@ struct A { A(); }; - // CHECK-LABEL: define void @_ZN5test91AC2Ev(%"struct.test9::A"* %this) unnamed_addr + // CHECK-LABEL: define void @_ZN5test91AC2Ev(%"struct.test9::A"* frozen %this) unnamed_addr // CHECK-SAME: personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) A::A() try { // CHECK: invoke void @_ZN5test96opaqueEv() @@ -200,7 +200,7 @@ // CHECK: invoke void @_ZN5test96opaqueEv() // CHECK: invoke void @__cxa_rethrow() - // CHECK-LABEL: define void @_ZN5test91AC1Ev(%"struct.test9::A"* %this) unnamed_addr + // CHECK-LABEL: define void @_ZN5test91AC1Ev(%"struct.test9::A"* frozen %this) unnamed_addr // CHECK: call void @_ZN5test91AC2Ev // CHECK-NEXT: ret void opaque(); @@ -299,13 +299,13 @@ // CHECK: [[CLEANUPDEST:%.*]] = alloca i32 A x; - // CHECK: invoke zeroext i1 @_ZN6test126opaqueERKNS_1AE( + // CHECK: invoke frozen zeroext i1 @_ZN6test126opaqueERKNS_1AE( if (opaque(x)) { A y; A z; - // CHECK: invoke void @_ZN6test121AD1Ev([[A]]* [[Z]]) - // CHECK: invoke void @_ZN6test121AD1Ev([[A]]* [[Y]]) + // CHECK: invoke void @_ZN6test121AD1Ev([[A]]* frozen [[Z]]) + // CHECK: invoke void @_ZN6test121AD1Ev([[A]]* frozen [[Y]]) // CHECK-NOT: switch goto success; } @@ -313,7 +313,7 @@ success: bool _ = true; - // CHECK: call void @_ZN6test121AD1Ev([[A]]* [[X]]) + // CHECK: call void @_ZN6test121AD1Ev([[A]]* frozen [[X]]) // CHECK-NEXT: ret void } } @@ -388,7 +388,7 @@ while (true) { // CHECK: load i32, i32* [[X]] - // CHECK-NEXT: [[COND:%.*]] = invoke zeroext i1 @_ZN6test156opaqueEi + // CHECK-NEXT: [[COND:%.*]] = invoke frozen zeroext i1 @_ZN6test156opaqueEi // CHECK: br i1 [[COND]] if (opaque(x)) // CHECK: br label @@ -420,7 +420,7 @@ cond() ? throw B(A()) : foo(); - // CHECK-NEXT: [[COND:%.*]] = call zeroext i1 @_ZN6test164condEv() + // CHECK-NEXT: [[COND:%.*]] = call frozen zeroext i1 @_ZN6test164condEv() // CHECK-NEXT: store i1 false, i1* [[EXN_ACTIVE]] // CHECK-NEXT: store i1 false, i1* [[TEMP_ACTIVE]] // CHECK-NEXT: br i1 [[COND]], @@ -429,16 +429,16 @@ // CHECK-NEXT: store i8* [[EXN]], i8** [[EXN_SAVE]] // CHECK-NEXT: store i1 true, i1* [[EXN_ACTIVE]] // CHECK-NEXT: [[T0:%.*]] = bitcast i8* [[EXN]] to [[B:%.*]]* - // CHECK-NEXT: invoke void @_ZN6test161AC1Ev([[A]]* [[TEMP]]) + // CHECK-NEXT: invoke void @_ZN6test161AC1Ev([[A]]* frozen [[TEMP]]) // CHECK: store i1 true, i1* [[TEMP_ACTIVE]] - // CHECK-NEXT: invoke void @_ZN6test161BC1ERKNS_1AE([[B]]* [[T0]], [[A]]* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[TEMP]]) + // CHECK-NEXT: invoke void @_ZN6test161BC1ERKNS_1AE([[B]]* frozen [[T0]], [[A]]* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[TEMP]]) // CHECK: store i1 false, i1* [[EXN_ACTIVE]] // CHECK-NEXT: invoke void @__cxa_throw(i8* [[EXN]], // CHECK: invoke void @_ZN6test163fooEv() // CHECK: br label - // CHECK: invoke void @_ZN6test161AD1Ev([[A]]* [[TEMP]]) + // CHECK: invoke void @_ZN6test161AD1Ev([[A]]* frozen [[TEMP]]) // CHECK: ret void // CHECK: [[T0:%.*]] = load i1, i1* [[EXN_ACTIVE]] diff --git a/clang/test/CodeGenCXX/empty-classes.cpp b/clang/test/CodeGenCXX/empty-classes.cpp --- a/clang/test/CodeGenCXX/empty-classes.cpp +++ b/clang/test/CodeGenCXX/empty-classes.cpp @@ -31,7 +31,7 @@ #define CHECK(x) if (!(x)) return __LINE__ // PR7012 -// CHECK-LABEL: define i32 @_Z1fv() +// CHECK-LABEL: define frozen i32 @_Z1fv() int f() { B b1; diff --git a/clang/test/CodeGenCXX/empty-nontrivially-copyable.cpp b/clang/test/CodeGenCXX/empty-nontrivially-copyable.cpp --- a/clang/test/CodeGenCXX/empty-nontrivially-copyable.cpp +++ b/clang/test/CodeGenCXX/empty-nontrivially-copyable.cpp @@ -13,14 +13,14 @@ }; bool foo(Empty e) { -// CHECK: @_Z3foo5Empty(%struct.Empty* %e) -// CHECK: call {{.*}} @_ZN5Empty5checkEv(%struct.Empty* %e) +// CHECK: @_Z3foo5Empty(%struct.Empty* frozen %e) +// CHECK: call {{.*}} @_ZN5Empty5checkEv(%struct.Empty* frozen %e) return e.check(); } void caller(Empty &e) { -// CHECK: @_Z6callerR5Empty(%struct.Empty* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %e) -// CHECK: call {{.*}} @_ZN5EmptyC1ERKS_(%struct.Empty* [[NEWTMP:%.*]], %struct.Empty* -// CHECK: call {{.*}} @_Z3foo5Empty(%struct.Empty* [[NEWTMP]]) +// CHECK: @_Z6callerR5Empty(%struct.Empty* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %e) +// CHECK: call {{.*}} @_ZN5EmptyC1ERKS_(%struct.Empty* frozen [[NEWTMP:%.*]], %struct.Empty* +// CHECK: call {{.*}} @_Z3foo5Empty(%struct.Empty* frozen [[NEWTMP]]) foo(e); } diff --git a/clang/test/CodeGenCXX/exceptions-cxx-new.cpp b/clang/test/CodeGenCXX/exceptions-cxx-new.cpp --- a/clang/test/CodeGenCXX/exceptions-cxx-new.cpp +++ b/clang/test/CodeGenCXX/exceptions-cxx-new.cpp @@ -13,7 +13,7 @@ } // CHECK-LABEL: define dso_local void @"?test_catch@@YAXXZ"( -// CHECK: invoke i32 @"?f@@YAHH@Z"(i32 1) +// CHECK: invoke frozen i32 @"?f@@YAHH@Z"(i32 frozen 1) // CHECK: to label %[[NORMAL:.*]] unwind label %[[CATCHSWITCH:.*]] // CHECK: [[CATCHSWITCH]] @@ -21,7 +21,7 @@ // CHECK: [[CATCH_INT]] // CHECK: %[[CATCHPAD_INT:.*]] = catchpad within %[[CATCHSWITCHPAD]] [%rtti.TypeDescriptor2* @"??_R0H@8", i32 0, i8* null] -// CHECK: call i32 @"?f@@YAHH@Z"(i32 2) +// CHECK: call frozen i32 @"?f@@YAHH@Z"(i32 frozen 2) // CHECK: catchret from %[[CATCHPAD_INT]] to label %[[LEAVE_INT_CATCH:.*]] // CHECK: [[LEAVE_INT_CATCH]] @@ -32,7 +32,7 @@ // CHECK: [[CATCH_DOUBLE]] // CHECK: %[[CATCHPAD_DOUBLE:.*]] = catchpad within %[[CATCHSWITCHPAD]] [%rtti.TypeDescriptor2* @"??_R0N@8", i32 0, i8* null] -// CHECK: call i32 @"?f@@YAHH@Z"(i32 3) +// CHECK: call frozen i32 @"?f@@YAHH@Z"(i32 frozen 3) // CHECK: catchret from %[[CATCHPAD_DOUBLE]] to label %[[LEAVE_DOUBLE_CATCH:.*]] // CHECK: [[LEAVE_DOUBLE_CATCH]] @@ -51,7 +51,7 @@ } // CHECK-LABEL: define dso_local {{.*}} @"?test_cleanup@@YAXXZ"( -// CHECK: invoke i32 @"?f@@YAHH@Z"(i32 1) +// CHECK: invoke frozen i32 @"?f@@YAHH@Z"(i32 frozen 1) // CHECK: to label %[[LEAVE_FUNC:.*]] unwind label %[[CLEANUP:.*]] // CHECK: [[LEAVE_FUNC]] @@ -65,7 +65,7 @@ // CHECK-LABEL: define {{.*}} void @"??1Cleanup@@QAE@XZ"( -// CHECK: invoke i32 @"?f@@YAHH@Z"(i32 -1) +// CHECK: invoke frozen i32 @"?f@@YAHH@Z"(i32 frozen -1) // CHECK: to label %[[LEAVE_FUNC:.*]] unwind label %[[TERMINATE:.*]] // CHECK: [[LEAVE_FUNC]] @@ -73,5 +73,5 @@ // CHECK: [[TERMINATE]] // CHECK: %[[CLEANUPPAD:.*]] = cleanuppad within none [] -// CHECK-NEXT: call void @"?terminate@@YAXXZ"() {{.*}} [ "funclet"(token %[[CLEANUPPAD]]) ] +// CHECK-NEXT: call void @"?terminate@@YAXXZ"() {{.*}}) ] diff --git a/clang/test/CodeGenCXX/exceptions-seh-filter-captures.cpp b/clang/test/CodeGenCXX/exceptions-seh-filter-captures.cpp --- a/clang/test/CodeGenCXX/exceptions-seh-filter-captures.cpp +++ b/clang/test/CodeGenCXX/exceptions-seh-filter-captures.cpp @@ -14,13 +14,13 @@ } } -// CHECK-LABEL: define dso_local void @test_freefunc(i32 %p1) +// CHECK-LABEL: define dso_local void @test_freefunc(i32 frozen %p1) // CHECK: @llvm.localescape(i32* %[[p1_ptr:[^, ]*]], i32* %[[l1_ptr:[^, ]*]]) // CHECK: store i32 %p1, i32* %[[p1_ptr]], align 4 // CHECK: store i32 13, i32* %[[l1_ptr]], align 4 // CHECK: invoke void @might_crash() -// CHECK-LABEL: define internal i32 @"?filt$0@0@test_freefunc@@"(i8* %exception_pointers, i8* %frame_pointer) +// CHECK-LABEL: define internal frozen i32 @"?filt$0@0@test_freefunc@@"(i8* frozen %exception_pointers, i8* frozen %frame_pointer) // CHECK: %[[fp:[^ ]*]] = call i8* @llvm.eh.recoverfp(i8* bitcast (void (i32)* @test_freefunc to i8*), i8* %frame_pointer) // CHECK: %[[p1_i8:[^ ]*]] = call i8* @llvm.localrecover(i8* bitcast (void (i32)* @test_freefunc to i8*), i8* %[[fp]], i32 0) // CHECK: %[[p1_ptr:[^ ]*]] = bitcast i8* %[[p1_i8]] to i32* @@ -29,7 +29,7 @@ // CHECK: %[[s1:[^ ]*]] = load i32, i32* @"?s1@?1??test_freefunc@@9@4HA", align 4 // CHECK: %[[l1:[^ ]*]] = load i32, i32* %[[l1_ptr]] // CHECK: %[[p1:[^ ]*]] = load i32, i32* %[[p1_ptr]] -// CHECK: call i32 (i32, ...) @basic_filter(i32 %[[p1]], i32 %[[l1]], i32 %[[s1]]) +// CHECK: call frozen i32 (i32, ...) @basic_filter(i32 frozen %[[p1]], i32 frozen %[[l1]], i32 frozen %[[s1]]) struct S { int m1; @@ -45,17 +45,17 @@ } } -// CHECK-LABEL: define dso_local void @"?test_method@S@@QEAAXXZ"(%struct.S* %this) +// CHECK-LABEL: define dso_local void @"?test_method@S@@QEAAXXZ"(%struct.S* frozen %this) // CHECK: @llvm.localescape(i32* %[[l1_addr:[^, ]*]]) // CHECK: store i32 13, i32* %[[l1_addr]], align 4 // CHECK: invoke void @might_crash() -// CHECK-LABEL: define internal i32 @"?filt$0@0@test_method@S@@"(i8* %exception_pointers, i8* %frame_pointer) +// CHECK-LABEL: define internal frozen i32 @"?filt$0@0@test_method@S@@"(i8* frozen %exception_pointers, i8* frozen %frame_pointer) // CHECK: %[[fp:[^ ]*]] = call i8* @llvm.eh.recoverfp(i8* bitcast (void (%struct.S*)* @"?test_method@S@@QEAAXXZ" to i8*), i8* %frame_pointer) // CHECK: %[[l1_i8:[^ ]*]] = call i8* @llvm.localrecover(i8* bitcast (void (%struct.S*)* @"?test_method@S@@QEAAXXZ" to i8*), i8* %[[fp]], i32 0) // CHECK: %[[l1_ptr:[^ ]*]] = bitcast i8* %[[l1_i8]] to i32* // CHECK: %[[l1:[^ ]*]] = load i32, i32* %[[l1_ptr]] -// CHECK: call i32 (i32, ...) @basic_filter(i32 %[[l1]]) +// CHECK: call frozen i32 (i32, ...) @basic_filter(i32 frozen %[[l1]]) void test_lambda() { int l1 = 13; @@ -70,14 +70,14 @@ lambda(); } -// CHECK-LABEL: define internal void @"??R@?0??test_lambda@@YAXXZ@QEBA@XZ"(%class.anon* %this) +// CHECK-LABEL: define internal void @"??R@?0??test_lambda@@YAXXZ@QEBA@XZ"(%class.anon* frozen %this) // CHECK: @llvm.localescape(i32* %[[l2_addr:[^, ]*]]) // CHECK: store i32 42, i32* %[[l2_addr]], align 4 // CHECK: invoke void @might_crash() -// CHECK-LABEL: define internal i32 @"?filt$0@0@?R@?0??test_lambda@@YAXXZ@"(i8* %exception_pointers, i8* %frame_pointer) +// CHECK-LABEL: define internal frozen i32 @"?filt$0@0@?R@?0??test_lambda@@YAXXZ@"(i8* frozen %exception_pointers, i8* frozen %frame_pointer) // CHECK: %[[fp:[^ ]*]] = call i8* @llvm.eh.recoverfp(i8* bitcast (void (%class.anon*)* @"??R@?0??test_lambda@@YAXXZ@QEBA@XZ" to i8*), i8* %frame_pointer) // CHECK: %[[l2_i8:[^ ]*]] = call i8* @llvm.localrecover(i8* bitcast (void (%class.anon*)* @"??R@?0??test_lambda@@YAXXZ@QEBA@XZ" to i8*), i8* %[[fp]], i32 0) // CHECK: %[[l2_ptr:[^ ]*]] = bitcast i8* %[[l2_i8]] to i32* // CHECK: %[[l2:[^ ]*]] = load i32, i32* %[[l2_ptr]] -// CHECK: call i32 (i32, ...) @basic_filter(i32 %[[l2]]) +// CHECK: call frozen i32 (i32, ...) @basic_filter(i32 frozen %[[l2]]) diff --git a/clang/test/CodeGenCXX/exceptions-seh-filter-uwtable.cpp b/clang/test/CodeGenCXX/exceptions-seh-filter-uwtable.cpp --- a/clang/test/CodeGenCXX/exceptions-seh-filter-uwtable.cpp +++ b/clang/test/CodeGenCXX/exceptions-seh-filter-uwtable.cpp @@ -34,7 +34,7 @@ } // Check for the uwtable attribute on the filter funclet. -// CHECK: define internal i32 @"?filt$0@0@at@@"(i8* %exception_pointers, i8* %frame_pointer) #[[MD:[0-9]+]] +// CHECK: define internal frozen i32 @"?filt$0@0@at@@"(i8* frozen %exception_pointers, i8* frozen %frame_pointer) #[[MD:[0-9]+]] // CHECK: attributes #[[MD]] = { nounwind uwtable void at() { diff --git a/clang/test/CodeGenCXX/exceptions-seh.cpp b/clang/test/CodeGenCXX/exceptions-seh.cpp --- a/clang/test/CodeGenCXX/exceptions-seh.cpp +++ b/clang/test/CodeGenCXX/exceptions-seh.cpp @@ -23,26 +23,26 @@ // CXXEH-LABEL: define dso_local void @use_cxx() // CXXEH-SAME: personality i8* bitcast (i32 (...)* @__CxxFrameHandler3 to i8*) -// CXXEH: call %struct.HasCleanup* @"??0HasCleanup@@QEAA@XZ"(%struct.HasCleanup* %{{.*}}) +// CXXEH: call frozen %struct.HasCleanup* @"??0HasCleanup@@QEAA@XZ"(%struct.HasCleanup* frozen %{{.*}}) // CXXEH: invoke void @might_throw() // CXXEH: to label %[[cont:[^ ]*]] unwind label %[[lpad:[^ ]*]] // // CXXEH: [[cont]] -// CXXEH: call void @"??1HasCleanup@@QEAA@XZ"(%struct.HasCleanup* %{{.*}}) +// CXXEH: call void @"??1HasCleanup@@QEAA@XZ"(%struct.HasCleanup* frozen %{{.*}}) // CXXEH: ret void // // CXXEH: [[lpad]] // CXXEH: cleanuppad -// CXXEH: call void @"??1HasCleanup@@QEAA@XZ"(%struct.HasCleanup* %{{.*}}) +// CXXEH: call void @"??1HasCleanup@@QEAA@XZ"(%struct.HasCleanup* frozen %{{.*}}) // CXXEH: cleanupret // NOCXX-LABEL: define dso_local void @use_cxx() // NOCXX-NOT: invoke -// NOCXX: call %struct.HasCleanup* @"??0HasCleanup@@QEAA@XZ"(%struct.HasCleanup* %{{.*}}) +// NOCXX: call frozen %struct.HasCleanup* @"??0HasCleanup@@QEAA@XZ"(%struct.HasCleanup* frozen %{{.*}}) // NOCXX-NOT: invoke // NOCXX: call void @might_throw() // NOCXX-NOT: invoke -// NOCXX: call void @"??1HasCleanup@@QEAA@XZ"(%struct.HasCleanup* %{{.*}}) +// NOCXX: call void @"??1HasCleanup@@QEAA@XZ"(%struct.HasCleanup* frozen %{{.*}}) // NOCXX-NOT: invoke // NOCXX: ret void @@ -90,12 +90,12 @@ // CHECK-LABEL: define dso_local void @nested_finally() #{{[0-9]+}} // CHECK-SAME: personality i8* bitcast (i32 (...)* @__C_specific_handler to i8*) // CHECK: invoke void @might_throw() -// CHECK: call void @"?fin$0@0@nested_finally@@"(i8 1, i8* {{.*}}) +// CHECK: call void @"?fin$0@0@nested_finally@@"(i8 frozen 1, i8* {{.*}}) // CHECK-LABEL: define internal void @"?fin$0@0@nested_finally@@" // CHECK-SAME: personality i8* bitcast (i32 (...)* @__C_specific_handler to i8*) // CHECK: invoke void @might_throw() -// CHECK: call void @"?fin$1@0@nested_finally@@"(i8 1, i8* {{.*}}) +// CHECK: call void @"?fin$1@0@nested_finally@@"(i8 frozen 1, i8* {{.*}}) void use_seh_in_lambda() { ([]() { @@ -116,7 +116,7 @@ // NOCXX-NOT: invoke // NOCXX: ret void -// CHECK-LABEL: define internal void @"??R@?0??use_seh_in_lambda@@YAXXZ@QEBA@XZ"(%class.anon* %this) +// CHECK-LABEL: define internal void @"??R@?0??use_seh_in_lambda@@YAXXZ@QEBA@XZ"(%class.anon* frozen %this) // CXXEH-SAME: personality i8* bitcast (i32 (...)* @__C_specific_handler to i8*) // CHECK: invoke void @might_throw() #[[NOINLINE]] // CHECK: catchpad @@ -148,19 +148,19 @@ // CHECK: invoke void @might_throw() // // CHECK: %[[fp:[^ ]*]] = call i8* @llvm.localaddress() -// CHECK: call void @"?fin$0@0@use_seh_in_inline_func@@"(i8 0, i8* %[[fp]]) +// CHECK: call void @"?fin$0@0@use_seh_in_inline_func@@"(i8 frozen 0, i8* frozen %[[fp]]) // CHECK: ret void // // CHECK: cleanuppad // CHECK: %[[fp:[^ ]*]] = call i8* @llvm.localaddress() -// CHECK: call void @"?fin$0@0@use_seh_in_inline_func@@"(i8 1, i8* %[[fp]]) +// CHECK: call void @"?fin$0@0@use_seh_in_inline_func@@"(i8 frozen 1, i8* frozen %[[fp]]) -// CHECK-LABEL: define internal i32 @"?filt$0@0@use_seh_in_inline_func@@"(i8* %exception_pointers, i8* %frame_pointer) #{{[0-9]+}} +// CHECK-LABEL: define internal frozen i32 @"?filt$0@0@use_seh_in_inline_func@@"(i8* frozen %exception_pointers, i8* frozen %frame_pointer) #{{[0-9]+}} // CHECK: icmp eq i32 %{{.*}}, 424242 // CHECK: zext i1 %{{.*}} to i32 // CHECK: ret i32 -// CHECK-LABEL: define internal void @"?fin$0@0@use_seh_in_inline_func@@"(i8 %abnormal_termination, i8* %frame_pointer) #{{[0-9]+}} +// CHECK-LABEL: define internal void @"?fin$0@0@use_seh_in_inline_func@@"(i8 frozen %abnormal_termination, i8* frozen %frame_pointer) #{{[0-9]+}} // CHECK: store i32 1234, i32* @my_unique_global // CHECK: attributes #[[NOINLINE]] = { {{.*noinline.*}} } diff --git a/clang/test/CodeGenCXX/exceptions.cpp b/clang/test/CodeGenCXX/exceptions.cpp --- a/clang/test/CodeGenCXX/exceptions.cpp +++ b/clang/test/CodeGenCXX/exceptions.cpp @@ -30,23 +30,23 @@ struct A { A(int); A(int, int); ~A(); void *p; }; A *a() { - // CHECK: define [[A:%.*]]* @_ZN5test11aEv() - // CHECK: [[NEW:%.*]] = call noalias nonnull i8* @_Znwm(i64 8) + // CHECK: define frozen [[A:%.*]]* @_ZN5test11aEv() + // CHECK: [[NEW:%.*]] = call frozen noalias nonnull i8* @_Znwm(i64 frozen 8) // CHECK-NEXT: [[CAST:%.*]] = bitcast i8* [[NEW]] to [[A]]* - // CHECK-NEXT: invoke void @_ZN5test11AC1Ei([[A]]* [[CAST]], i32 5) + // CHECK-NEXT: invoke void @_ZN5test11AC1Ei([[A]]* frozen [[CAST]], i32 frozen 5) // CHECK: ret [[A]]* [[CAST]] - // CHECK: call void @_ZdlPv(i8* [[NEW]]) + // CHECK: call void @_ZdlPv(i8* frozen [[NEW]]) return new A(5); } A *b() { - // CHECK: define [[A:%.*]]* @_ZN5test11bEv() - // CHECK: [[NEW:%.*]] = call noalias nonnull i8* @_Znwm(i64 8) + // CHECK: define frozen [[A:%.*]]* @_ZN5test11bEv() + // CHECK: [[NEW:%.*]] = call frozen noalias nonnull i8* @_Znwm(i64 frozen 8) // CHECK-NEXT: [[CAST:%.*]] = bitcast i8* [[NEW]] to [[A]]* - // CHECK-NEXT: [[FOO:%.*]] = invoke i32 @_ZN5test13fooEv() - // CHECK: invoke void @_ZN5test11AC1Ei([[A]]* [[CAST]], i32 [[FOO]]) + // CHECK-NEXT: [[FOO:%.*]] = invoke frozen i32 @_ZN5test13fooEv() + // CHECK: invoke void @_ZN5test11AC1Ei([[A]]* frozen [[CAST]], i32 frozen [[FOO]]) // CHECK: ret [[A]]* [[CAST]] - // CHECK: call void @_ZdlPv(i8* [[NEW]]) + // CHECK: call void @_ZdlPv(i8* frozen [[NEW]]) extern int foo(); return new A(foo()); } @@ -55,24 +55,24 @@ B makeB(); A *c() { - // CHECK: define [[A:%.*]]* @_ZN5test11cEv() + // CHECK: define frozen [[A:%.*]]* @_ZN5test11cEv() // CHECK: [[ACTIVE:%.*]] = alloca i1 - // CHECK-NEXT: [[NEW:%.*]] = call noalias nonnull i8* @_Znwm(i64 8) + // CHECK-NEXT: [[NEW:%.*]] = call frozen noalias nonnull i8* @_Znwm(i64 frozen 8) // CHECK-NEXT: store i1 true, i1* [[ACTIVE]] // CHECK-NEXT: [[CAST:%.*]] = bitcast i8* [[NEW]] to [[A]]* - // CHECK-NEXT: invoke void @_ZN5test11BC1Ev([[B:%.*]]* [[T0:%.*]]) + // CHECK-NEXT: invoke void @_ZN5test11BC1Ev([[B:%.*]]* frozen [[T0:%.*]]) // CHECK: [[T1:%.*]] = getelementptr inbounds [[B]], [[B]]* [[T0]], i32 0, i32 0 // CHECK-NEXT: [[T2:%.*]] = load i32, i32* [[T1]], align 4 - // CHECK-NEXT: invoke void @_ZN5test11AC1Ei([[A]]* [[CAST]], i32 [[T2]]) + // CHECK-NEXT: invoke void @_ZN5test11AC1Ei([[A]]* frozen [[CAST]], i32 frozen [[T2]]) // CHECK: store i1 false, i1* [[ACTIVE]] - // CHECK98-NEXT: invoke void @_ZN5test11BD1Ev([[B]]* [[T0]]) - // CHECK11-NEXT: call void @_ZN5test11BD1Ev([[B]]* [[T0]]) + // CHECK98-NEXT: invoke void @_ZN5test11BD1Ev([[B]]* frozen [[T0]]) + // CHECK11-NEXT: call void @_ZN5test11BD1Ev([[B]]* frozen [[T0]]) // CHECK: ret [[A]]* [[CAST]] // CHECK: [[ISACTIVE:%.*]] = load i1, i1* [[ACTIVE]] // CHECK-NEXT: br i1 [[ISACTIVE]] - // CHECK: call void @_ZdlPv(i8* [[NEW]]) + // CHECK: call void @_ZdlPv(i8* frozen [[NEW]]) return new A(B().x); } @@ -84,49 +84,49 @@ // CHECK98-NEXT: unreachable A *d() { - // CHECK: define [[A:%.*]]* @_ZN5test11dEv() + // CHECK: define frozen [[A:%.*]]* @_ZN5test11dEv() // CHECK: [[ACTIVE:%.*]] = alloca i1 - // CHECK-NEXT: [[NEW:%.*]] = call noalias nonnull i8* @_Znwm(i64 8) + // CHECK-NEXT: [[NEW:%.*]] = call frozen noalias nonnull i8* @_Znwm(i64 frozen 8) // CHECK-NEXT: store i1 true, i1* [[ACTIVE]] // CHECK-NEXT: [[CAST:%.*]] = bitcast i8* [[NEW]] to [[A]]* - // CHECK-NEXT: invoke void @_ZN5test11BC1Ev([[B:%.*]]* [[T0:%.*]]) - // CHECK: [[T1:%.*]] = invoke i32 @_ZN5test11BcviEv([[B]]* [[T0]]) - // CHECK: invoke void @_ZN5test11AC1Ei([[A]]* [[CAST]], i32 [[T1]]) + // CHECK-NEXT: invoke void @_ZN5test11BC1Ev([[B:%.*]]* frozen [[T0:%.*]]) + // CHECK: [[T1:%.*]] = invoke frozen i32 @_ZN5test11BcviEv([[B]]* frozen [[T0]]) + // CHECK: invoke void @_ZN5test11AC1Ei([[A]]* frozen [[CAST]], i32 frozen [[T1]]) // CHECK: store i1 false, i1* [[ACTIVE]] - // CHECK98-NEXT: invoke void @_ZN5test11BD1Ev([[B]]* [[T0]]) - // CHECK11-NEXT: call void @_ZN5test11BD1Ev([[B]]* [[T0]]) + // CHECK98-NEXT: invoke void @_ZN5test11BD1Ev([[B]]* frozen [[T0]]) + // CHECK11-NEXT: call void @_ZN5test11BD1Ev([[B]]* frozen [[T0]]) // CHECK: ret [[A]]* [[CAST]] // CHECK: [[ISACTIVE:%.*]] = load i1, i1* [[ACTIVE]] // CHECK-NEXT: br i1 [[ISACTIVE]] - // CHECK: call void @_ZdlPv(i8* [[NEW]]) + // CHECK: call void @_ZdlPv(i8* frozen [[NEW]]) return new A(B()); } A *e() { - // CHECK: define [[A:%.*]]* @_ZN5test11eEv() + // CHECK: define frozen [[A:%.*]]* @_ZN5test11eEv() // CHECK: [[ACTIVE:%.*]] = alloca i1 - // CHECK-NEXT: [[NEW:%.*]] = call noalias nonnull i8* @_Znwm(i64 8) + // CHECK-NEXT: [[NEW:%.*]] = call frozen noalias nonnull i8* @_Znwm(i64 frozen 8) // CHECK-NEXT: store i1 true, i1* [[ACTIVE]] // CHECK-NEXT: [[CAST:%.*]] = bitcast i8* [[NEW]] to [[A]]* - // CHECK-NEXT: invoke void @_ZN5test11BC1Ev([[B:%.*]]* [[T0:%.*]]) - // CHECK: [[T1:%.*]] = invoke i32 @_ZN5test11BcviEv([[B]]* [[T0]]) - // CHECK: invoke void @_ZN5test11BC1Ev([[B]]* [[T2:%.*]]) - // CHECK: [[T3:%.*]] = invoke i32 @_ZN5test11BcviEv([[B]]* [[T2]]) - // CHECK: invoke void @_ZN5test11AC1Eii([[A]]* [[CAST]], i32 [[T1]], i32 [[T3]]) + // CHECK-NEXT: invoke void @_ZN5test11BC1Ev([[B:%.*]]* frozen [[T0:%.*]]) + // CHECK: [[T1:%.*]] = invoke frozen i32 @_ZN5test11BcviEv([[B]]* frozen [[T0]]) + // CHECK: invoke void @_ZN5test11BC1Ev([[B]]* frozen [[T2:%.*]]) + // CHECK: [[T3:%.*]] = invoke frozen i32 @_ZN5test11BcviEv([[B]]* frozen [[T2]]) + // CHECK: invoke void @_ZN5test11AC1Eii([[A]]* frozen [[CAST]], i32 frozen [[T1]], i32 frozen [[T3]]) // CHECK: store i1 false, i1* [[ACTIVE]] - // CHECK98-NEXT: invoke void @_ZN5test11BD1Ev([[B]]* [[T2]]) - // CHECK11-NEXT: call void @_ZN5test11BD1Ev([[B]]* [[T2]]) + // CHECK98-NEXT: invoke void @_ZN5test11BD1Ev([[B]]* frozen [[T2]]) + // CHECK11-NEXT: call void @_ZN5test11BD1Ev([[B]]* frozen [[T2]]) - // CHECK98: invoke void @_ZN5test11BD1Ev([[B]]* [[T0]]) - // CHECK11: call void @_ZN5test11BD1Ev([[B]]* [[T0]]) + // CHECK98: invoke void @_ZN5test11BD1Ev([[B]]* frozen [[T0]]) + // CHECK11: call void @_ZN5test11BD1Ev([[B]]* frozen [[T0]]) // CHECK: ret [[A]]* [[CAST]] // CHECK: [[ISACTIVE:%.*]] = load i1, i1* [[ACTIVE]] // CHECK-NEXT: br i1 [[ISACTIVE]] - // CHECK: call void @_ZdlPv(i8* [[NEW]]) + // CHECK: call void @_ZdlPv(i8* frozen [[NEW]]) return new A(B(), B()); } A *f() { @@ -140,30 +140,30 @@ } A *i() { - // CHECK: define [[A:%.*]]* @_ZN5test11iEv() + // CHECK: define frozen [[A:%.*]]* @_ZN5test11iEv() // CHECK: [[X:%.*]] = alloca [[A]]*, align 8 // CHECK: [[ACTIVE:%.*]] = alloca i1 - // CHECK: [[NEW:%.*]] = call noalias nonnull i8* @_Znwm(i64 8) + // CHECK: [[NEW:%.*]] = call frozen noalias nonnull i8* @_Znwm(i64 frozen 8) // CHECK-NEXT: store i1 true, i1* [[ACTIVE]] // CHECK-NEXT: [[CAST:%.*]] = bitcast i8* [[NEW]] to [[A]]* // CHECK-NEXT: invoke void @_ZN5test15makeBEv([[B:%.*]]* sret align 4 [[T0:%.*]]) - // CHECK: [[T1:%.*]] = invoke i32 @_ZN5test11BcviEv([[B]]* [[T0]]) - // CHECK: invoke void @_ZN5test11AC1Ei([[A]]* [[CAST]], i32 [[T1]]) + // CHECK: [[T1:%.*]] = invoke frozen i32 @_ZN5test11BcviEv([[B]]* frozen [[T0]]) + // CHECK: invoke void @_ZN5test11AC1Ei([[A]]* frozen [[CAST]], i32 frozen [[T1]]) // CHECK: store i1 false, i1* [[ACTIVE]] // CHECK-NEXT: store [[A]]* [[CAST]], [[A]]** [[X]], align 8 // CHECK: invoke void @_ZN5test15makeBEv([[B:%.*]]* sret align 4 [[T2:%.*]]) // CHECK: [[RET:%.*]] = load [[A]]*, [[A]]** [[X]], align 8 - // CHECK98: invoke void @_ZN5test11BD1Ev([[B]]* [[T2]]) - // CHECK11: call void @_ZN5test11BD1Ev([[B]]* [[T2]]) + // CHECK98: invoke void @_ZN5test11BD1Ev([[B]]* frozen [[T2]]) + // CHECK11: call void @_ZN5test11BD1Ev([[B]]* frozen [[T2]]) - // CHECK98: invoke void @_ZN5test11BD1Ev([[B]]* [[T0]]) - // CHECK11: call void @_ZN5test11BD1Ev([[B]]* [[T0]]) + // CHECK98: invoke void @_ZN5test11BD1Ev([[B]]* frozen [[T0]]) + // CHECK11: call void @_ZN5test11BD1Ev([[B]]* frozen [[T0]]) // CHECK: ret [[A]]* [[RET]] // CHECK: [[ISACTIVE:%.*]] = load i1, i1* [[ACTIVE]] // CHECK-NEXT: br i1 [[ISACTIVE]] - // CHECK: call void @_ZdlPv(i8* [[NEW]]) + // CHECK: call void @_ZdlPv(i8* frozen [[NEW]]) A *x; return (x = new A(makeB()), makeB(), x); } @@ -178,14 +178,14 @@ }; A *a() { - // CHECK: define [[A:%.*]]* @_ZN5test21aEv() - // CHECK: [[NEW:%.*]] = call i8* @_ZN5test21AnwEm(i64 8) + // CHECK: define frozen [[A:%.*]]* @_ZN5test21aEv() + // CHECK: [[NEW:%.*]] = call frozen i8* @_ZN5test21AnwEm(i64 frozen 8) // CHECK-NEXT: [[CAST:%.*]] = bitcast i8* [[NEW]] to [[A]]* - // CHECK-NEXT: invoke void @_ZN5test21AC1Ei([[A]]* [[CAST]], i32 5) + // CHECK-NEXT: invoke void @_ZN5test21AC1Ei([[A]]* frozen [[CAST]], i32 frozen 5) // CHECK: ret [[A]]* [[CAST]] - // CHECK98: invoke void @_ZN5test21AdlEPvm(i8* [[NEW]], i64 8) - // CHECK11: call void @_ZN5test21AdlEPvm(i8* [[NEW]], i64 8) + // CHECK98: invoke void @_ZN5test21AdlEPvm(i8* frozen [[NEW]], i64 frozen 8) + // CHECK11: call void @_ZN5test21AdlEPvm(i8* frozen [[NEW]], i64 frozen 8) // CHECK98: call void @__clang_call_terminate(i8* {{%.*}}) [[NR_NUW]] return new A(5); @@ -205,16 +205,16 @@ A makeA(), *makeAPtr(); A *a() { - // CHECK: define [[A:%.*]]* @_ZN5test31aEv() - // CHECK: [[FOO:%.*]] = call i8* @_ZN5test33fooEv() - // CHECK: [[BAR:%.*]] = call double @_ZN5test33barEv() - // CHECK: [[NEW:%.*]] = call i8* @_ZN5test31AnwEmPvd(i64 8, i8* [[FOO]], double [[BAR]]) + // CHECK: define frozen [[A:%.*]]* @_ZN5test31aEv() + // CHECK: [[FOO:%.*]] = call frozen i8* @_ZN5test33fooEv() + // CHECK: [[BAR:%.*]] = call frozen double @_ZN5test33barEv() + // CHECK: [[NEW:%.*]] = call frozen i8* @_ZN5test31AnwEmPvd(i64 frozen 8, i8* frozen [[FOO]], double frozen [[BAR]]) // CHECK-NEXT: [[CAST:%.*]] = bitcast i8* [[NEW]] to [[A]]* - // CHECK-NEXT: invoke void @_ZN5test31AC1Ei([[A]]* [[CAST]], i32 5) + // CHECK-NEXT: invoke void @_ZN5test31AC1Ei([[A]]* frozen [[CAST]], i32 frozen 5) // CHECK: ret [[A]]* [[CAST]] - // CHECK98: invoke void @_ZN5test31AdlEPvS1_d(i8* [[NEW]], i8* [[FOO]], double [[BAR]]) - // CHECK11: call void @_ZN5test31AdlEPvS1_d(i8* [[NEW]], i8* [[FOO]], double [[BAR]]) + // CHECK98: invoke void @_ZN5test31AdlEPvS1_d(i8* frozen [[NEW]], i8* frozen [[FOO]], double frozen [[BAR]]) + // CHECK11: call void @_ZN5test31AdlEPvS1_d(i8* frozen [[NEW]], i8* frozen [[FOO]], double frozen [[BAR]]) // CHECK98: call void @__clang_call_terminate(i8* {{%.*}}) [[NR_NUW]] return new(foo(),bar()) A(5); @@ -223,7 +223,7 @@ // rdar://problem/8439196 A *b(bool cond) { - // CHECK: define [[A:%.*]]* @_ZN5test31bEb(i1 zeroext + // CHECK: define frozen [[A:%.*]]* @_ZN5test31bEb(i1 frozen zeroext // CHECK: [[SAVED0:%.*]] = alloca i8* // CHECK-NEXT: [[SAVED1:%.*]] = alloca i8* // CHECK-NEXT: [[CLEANUPACTIVE:%.*]] = alloca i1 @@ -233,8 +233,8 @@ // CHECK-NEXT: br i1 [[COND]] return (cond ? - // CHECK: [[FOO:%.*]] = call i8* @_ZN5test33fooEv() - // CHECK-NEXT: [[NEW:%.*]] = call i8* @_ZN5test31AnwEmPvd(i64 8, i8* [[FOO]], double [[CONST:.*]]) + // CHECK: [[FOO:%.*]] = call frozen i8* @_ZN5test33fooEv() + // CHECK-NEXT: [[NEW:%.*]] = call frozen i8* @_ZN5test31AnwEmPvd(i64 frozen 8, i8* frozen [[FOO]], double frozen [[CONST:.*]]) // CHECK-NEXT: store i8* [[NEW]], i8** [[SAVED0]] // CHECK-NEXT: store i8* [[FOO]], i8** [[SAVED1]] // CHECK-NEXT: store i1 true, i1* [[CLEANUPACTIVE]] @@ -244,7 +244,7 @@ // -> cond.end new(foo(),10.0) A(makeA()) : - // CHECK: [[MAKE:%.*]] = call [[A]]* @_ZN5test38makeAPtrEv() + // CHECK: [[MAKE:%.*]] = call frozen [[A]]* @_ZN5test38makeAPtrEv() // CHECK: br label // -> cond.end makeAPtr()); @@ -259,8 +259,8 @@ // CHECK: [[V0:%.*]] = load i8*, i8** [[SAVED0]] // CHECK-NEXT: [[V1:%.*]] = load i8*, i8** [[SAVED1]] - // CHECK98-NEXT: invoke void @_ZN5test31AdlEPvS1_d(i8* [[V0]], i8* [[V1]], double [[CONST]]) - // CHECK11-NEXT: call void @_ZN5test31AdlEPvS1_d(i8* [[V0]], i8* [[V1]], double [[CONST]]) + // CHECK98-NEXT: invoke void @_ZN5test31AdlEPvS1_d(i8* frozen [[V0]], i8* frozen [[V1]], double frozen [[CONST]]) + // CHECK11-NEXT: call void @_ZN5test31AdlEPvS1_d(i8* frozen [[V0]], i8* frozen [[V1]], double frozen [[CONST]]) } } @@ -273,12 +273,12 @@ }; A *a() { - // CHECK: define [[A:%.*]]* @_ZN5test41aEv() - // CHECK: [[FOO:%.*]] = call i8* @_ZN5test43fooEv() - // CHECK-NEXT: [[BAR:%.*]] = call i8* @_ZN5test43barEv() - // CHECK-NEXT: [[NEW:%.*]] = call i8* @_ZN5test41AnwEmPvS1_(i64 8, i8* [[FOO]], i8* [[BAR]]) + // CHECK: define frozen [[A:%.*]]* @_ZN5test41aEv() + // CHECK: [[FOO:%.*]] = call frozen i8* @_ZN5test43fooEv() + // CHECK-NEXT: [[BAR:%.*]] = call frozen i8* @_ZN5test43barEv() + // CHECK-NEXT: [[NEW:%.*]] = call frozen i8* @_ZN5test41AnwEmPvS1_(i64 frozen 8, i8* frozen [[FOO]], i8* frozen [[BAR]]) // CHECK-NEXT: [[CAST:%.*]] = bitcast i8* [[NEW]] to [[A]]* - // CHECK-NEXT: call void @_ZN5test41AC1Ei([[A]]* [[CAST]], i32 5) + // CHECK-NEXT: call void @_ZN5test41AC1Ei([[A]]* frozen [[CAST]], i32 frozen 5) // CHECK-NEXT: ret [[A]]* [[CAST]] extern void *foo(), *bar(); @@ -306,14 +306,14 @@ // CHECK: [[EXN:%.*]] = load i8*, i8** [[EXNSLOT]] // CHECK-NEXT: [[ADJ:%.*]] = call i8* @__cxa_get_exception_ptr(i8* [[EXN]]) // CHECK-NEXT: [[SRC:%.*]] = bitcast i8* [[ADJ]] to [[A_T]]* - // CHECK-NEXT: invoke void @_ZN5test51TC1Ev([[T_T]]* [[T]]) - // CHECK: invoke void @_ZN5test51AC1ERKS0_RKNS_1TE([[A_T]]* [[A]], [[A_T]]* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[SRC]], [[T_T]]* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[T]]) + // CHECK-NEXT: invoke void @_ZN5test51TC1Ev([[T_T]]* frozen [[T]]) + // CHECK: invoke void @_ZN5test51AC1ERKS0_RKNS_1TE([[A_T]]* frozen [[A]], [[A_T]]* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[SRC]], [[T_T]]* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[T]]) - // CHECK98: invoke void @_ZN5test51TD1Ev([[T_T]]* [[T]]) - // CHECK11: call void @_ZN5test51TD1Ev([[T_T]]* [[T]]) + // CHECK98: invoke void @_ZN5test51TD1Ev([[T_T]]* frozen [[T]]) + // CHECK11: call void @_ZN5test51TD1Ev([[T_T]]* frozen [[T]]) // CHECK98: call i8* @__cxa_begin_catch(i8* [[EXN]]) [[NUW]] - // CHECK98-NEXT: invoke void @_ZN5test51AD1Ev([[A_T]]* [[A]]) + // CHECK98-NEXT: invoke void @_ZN5test51AD1Ev([[A_T]]* frozen [[A]]) // CHECK: call void @__cxa_end_catch() void test() { @@ -349,7 +349,7 @@ }; B *test() { - // CHECK: define [[B:%.*]]* @_ZN5test74testEv() + // CHECK: define frozen [[B:%.*]]* @_ZN5test74testEv() // CHECK: [[OUTER_NEW:%.*]] = alloca i1 // CHECK-NEXT: alloca [[A:%.*]], // CHECK-NEXT: alloca i8* @@ -361,7 +361,7 @@ // CHECK-NEXT: [[INNER_A:%.*]] = alloca i1 // Allocate the outer object. - // CHECK-NEXT: [[NEW:%.*]] = call i8* @_ZN5test71BnwEm( + // CHECK-NEXT: [[NEW:%.*]] = call frozen i8* @_ZN5test71BnwEm( // CHECK-NEXT: icmp eq i8* [[NEW]], null // These stores, emitted before the outermost conditional branch, @@ -381,7 +381,7 @@ // CHECK: store i1 true, i1* [[OUTER_A]] // Allocate the inner object. - // CHECK-NEXT: [[NEW:%.*]] = call i8* @_ZN5test71BnwEm( + // CHECK-NEXT: [[NEW:%.*]] = call frozen i8* @_ZN5test71BnwEm( // CHECK-NEXT: icmp eq i8* [[NEW]], null // CHECK-NEXT: br i1 @@ -454,9 +454,9 @@ A* test() { return new A[10]; } - // CHECK: define {{%.*}}* @_ZN5test94testEv - // CHECK: [[TEST9_NEW:%.*]] = call noalias nonnull i8* @_Znam - // CHECK: call void @_ZdaPv(i8* [[TEST9_NEW]]) + // CHECK: define frozen {{%.*}}* @_ZN5test94testEv + // CHECK: [[TEST9_NEW:%.*]] = call frozen noalias nonnull i8* @_Znam + // CHECK: call void @_ZdaPv(i8* frozen [[TEST9_NEW]]) } // In a destructor with a function-try-block, a return statement in a @@ -521,14 +521,14 @@ // CHECK: [[THIS:%.*]] = load [[C:%.*]]*, [[C:%.*]]** {{%.*}} // Construct single. // CHECK-NEXT: [[SINGLE:%.*]] = getelementptr inbounds [[C]], [[C]]* [[THIS]], i32 0, i32 0 - // CHECK-NEXT: call void @_ZN6test111AC1Ev([[A:%.*]]* [[SINGLE]]) + // CHECK-NEXT: call void @_ZN6test111AC1Ev([[A:%.*]]* frozen [[SINGLE]]) // Construct array. // CHECK-NEXT: [[ARRAY:%.*]] = getelementptr inbounds [[C]], [[C]]* [[THIS]], i32 0, i32 1 // CHECK-NEXT: [[ARRAYBEGIN:%.*]] = getelementptr inbounds [2 x [3 x [[A]]]], [2 x [3 x [[A]]]]* [[ARRAY]], i32 0, i32 0, i32 0 // CHECK-NEXT: [[ARRAYEND:%.*]] = getelementptr inbounds [[A]], [[A]]* [[ARRAYBEGIN]], i64 6 // CHECK-NEXT: br label // CHECK: [[CUR:%.*]] = phi [[A]]* [ [[ARRAYBEGIN]], {{%.*}} ], [ [[NEXT:%.*]], {{%.*}} ] - // CHECK-NEXT: invoke void @_ZN6test111AC1Ev([[A:%.*]]* [[CUR]]) + // CHECK-NEXT: invoke void @_ZN6test111AC1Ev([[A:%.*]]* frozen [[CUR]]) // CHECK: [[NEXT]] = getelementptr inbounds [[A]], [[A]]* [[CUR]], i64 1 // CHECK-NEXT: [[DONE:%.*]] = icmp eq [[A]]* [[NEXT]], [[ARRAYEND]] // CHECK-NEXT: br i1 [[DONE]], @@ -542,8 +542,8 @@ // CHECK: [[AFTER:%.*]] = phi [[A]]* [ [[CUR]], {{%.*}} ], [ [[ELT:%.*]], {{%.*}} ] // CHECK-NEXT: [[ELT]] = getelementptr inbounds [[A]], [[A]]* [[AFTER]], i64 -1 - // CHECK98-NEXT: invoke void @_ZN6test111AD1Ev([[A]]* [[ELT]]) - // CHECK11-NEXT: call void @_ZN6test111AD1Ev([[A]]* [[ELT]]) + // CHECK98-NEXT: invoke void @_ZN6test111AD1Ev([[A]]* frozen [[ELT]]) + // CHECK11-NEXT: call void @_ZN6test111AD1Ev([[A]]* frozen [[ELT]]) // CHECK: [[DONE:%.*]] = icmp eq [[A]]* [[ELT]], [[ARRAYBEGIN]] // CHECK-NEXT: br i1 [[DONE]], @@ -558,8 +558,8 @@ // CHECK: [[AFTER:%.*]] = phi [[A]]* [ [[ARRAYEND]], {{%.*}} ], [ [[ELT:%.*]], {{%.*}} ] // CHECK-NEXT: [[ELT]] = getelementptr inbounds [[A]], [[A]]* [[AFTER]], i64 -1 - // CHECK98-NEXT: invoke void @_ZN6test111AD1Ev([[A]]* [[ELT]]) - // CHECK11-NEXT: call void @_ZN6test111AD1Ev([[A]]* [[ELT]]) + // CHECK98-NEXT: invoke void @_ZN6test111AD1Ev([[A]]* frozen [[ELT]]) + // CHECK11-NEXT: call void @_ZN6test111AD1Ev([[A]]* frozen [[ELT]]) // CHECK: [[DONE:%.*]] = icmp eq [[A]]* [[ELT]], [[ARRAYBEGIN]] // CHECK-NEXT: br i1 [[DONE]], @@ -567,8 +567,8 @@ // CHECK: br label // Finally, the cleanup for single. - // CHECK98: invoke void @_ZN6test111AD1Ev([[A]]* [[SINGLE]]) - // CHECK11: call void @_ZN6test111AD1Ev([[A]]* [[SINGLE]]) + // CHECK98: invoke void @_ZN6test111AD1Ev([[A]]* frozen [[SINGLE]]) + // CHECK11: call void @_ZN6test111AD1Ev([[A]]* frozen [[SINGLE]]) // CHECK: br label // CHECK: resume @@ -587,11 +587,11 @@ // CHECK-LABEL: define {{.*}} @_ZN6test124testEPv( // CHECK: [[PTR:%.*]] = load i8*, i8* // CHECK-NEXT: [[CAST:%.*]] = bitcast i8* [[PTR]] to [[A:%.*]]* - // CHECK-NEXT: invoke void @_ZN6test121AC1Ev([[A]]* [[CAST]]) + // CHECK-NEXT: invoke void @_ZN6test121AC1Ev([[A]]* frozen [[CAST]]) // CHECK: ret [[A]]* [[CAST]] - // CHECK98: invoke void @_ZN6test121AdlEPvS1_(i8* [[PTR]], i8* [[PTR]]) - // CHECK11: call void @_ZN6test121AdlEPvS1_(i8* [[PTR]], i8* [[PTR]]) + // CHECK98: invoke void @_ZN6test121AdlEPvS1_(i8* frozen [[PTR]], i8* frozen [[PTR]]) + // CHECK11: call void @_ZN6test121AdlEPvS1_(i8* frozen [[PTR]], i8* frozen [[PTR]]) } // CHECK98: attributes [[NI_NR_NUW]] = { noinline noreturn nounwind } diff --git a/clang/test/CodeGenCXX/explicit-instantiation.cpp b/clang/test/CodeGenCXX/explicit-instantiation.cpp --- a/clang/test/CodeGenCXX/explicit-instantiation.cpp +++ b/clang/test/CodeGenCXX/explicit-instantiation.cpp @@ -18,7 +18,7 @@ return t + u; } -// CHECK-LABEL: define weak_odr i32 @_ZNK4plusIillEclERKiRKl +// CHECK-LABEL: define weak_odr frozen i32 @_ZNK4plusIillEclERKiRKl template struct plus; namespace EarlyInstantiation { @@ -38,10 +38,10 @@ constexpr int c = S().constexpr_function(); int d = S().deduced_return_type(); - // CHECK: define weak_odr i32 @_ZN18EarlyInstantiation1SIcE18constexpr_functionEv( - // CHECK: define weak_odr i32 @_ZN18EarlyInstantiation1SIcE19deduced_return_typeEv( - // CHECK: define weak_odr i32 @_ZN18EarlyInstantiation1SIiE18constexpr_functionEv( - // CHECK: define weak_odr i32 @_ZN18EarlyInstantiation1SIiE19deduced_return_typeEv( + // CHECK: define weak_odr frozen i32 @_ZN18EarlyInstantiation1SIcE18constexpr_functionEv( + // CHECK: define weak_odr frozen i32 @_ZN18EarlyInstantiation1SIcE19deduced_return_typeEv( + // CHECK: define weak_odr frozen i32 @_ZN18EarlyInstantiation1SIiE18constexpr_functionEv( + // CHECK: define weak_odr frozen i32 @_ZN18EarlyInstantiation1SIiE19deduced_return_typeEv( template struct S; template struct S; @@ -59,10 +59,10 @@ int h = deduced_return_type(); // The FIXMEs below are for PR19551. - // CHECK: define weak_odr i32 @_ZN18EarlyInstantiation18constexpr_functionIcEEiv( - // FIXME: define weak_odr i32 @_ZN18EarlyInstantiation19deduced_return_typeIcEEiv( - // CHECK: define weak_odr i32 @_ZN18EarlyInstantiation18constexpr_functionIiEEiv( - // FIXME: define weak_odr i32 @_ZN18EarlyInstantiation19deduced_return_typeIiEEiv( + // CHECK: define weak_odr frozen i32 @_ZN18EarlyInstantiation18constexpr_functionIcEEiv( + // FIXME: define weak_odr frozen i32 @_ZN18EarlyInstantiation19deduced_return_typeIcEEiv( + // CHECK: define weak_odr frozen i32 @_ZN18EarlyInstantiation18constexpr_functionIiEEiv( + // FIXME: define weak_odr frozen i32 @_ZN18EarlyInstantiation19deduced_return_typeIiEEiv( template int constexpr_function(); // FIXME template auto deduced_return_type(); template int constexpr_function(); @@ -86,12 +86,12 @@ // Check that we declare, define, or provide an available-externally // definition as appropriate. - // CHECK: define linkonce_odr i32 @_ZN17LateInstantiation1SIcE1fEv( - // CHECK: define linkonce_odr i32 @_ZN17LateInstantiation1fIcEEiv( - // CHECK-NO-OPT: declare i32 @_ZN17LateInstantiation1SIiE1fEv( - // CHECK-NO-OPT: declare i32 @_ZN17LateInstantiation1fIiEEiv( - // CHECK-OPT: define available_externally i32 @_ZN17LateInstantiation1SIiE1fEv( - // CHECK-OPT: define available_externally i32 @_ZN17LateInstantiation1fIiEEiv( + // CHECK: define linkonce_odr frozen i32 @_ZN17LateInstantiation1SIcE1fEv( + // CHECK: define linkonce_odr frozen i32 @_ZN17LateInstantiation1fIcEEiv( + // CHECK-NO-OPT: declare frozen i32 @_ZN17LateInstantiation1SIiE1fEv( + // CHECK-NO-OPT: declare frozen i32 @_ZN17LateInstantiation1fIiEEiv( + // CHECK-OPT: define available_externally frozen i32 @_ZN17LateInstantiation1SIiE1fEv( + // CHECK-OPT: define available_externally frozen i32 @_ZN17LateInstantiation1fIiEEiv( } namespace PR21718 { @@ -100,7 +100,7 @@ // same function twice. template struct S { -// CHECK-LABEL: define weak_odr i32 @_ZN7PR217181SIiE1fEv +// CHECK-LABEL: define weak_odr frozen i32 @_ZN7PR217181SIiE1fEv __attribute__((used)) constexpr int f() { return 0; } }; int g() { return S().f(); } diff --git a/clang/test/CodeGenCXX/ext-int.cpp b/clang/test/CodeGenCXX/ext-int.cpp --- a/clang/test/CodeGenCXX/ext-int.cpp +++ b/clang/test/CodeGenCXX/ext-int.cpp @@ -1,8 +1,8 @@ -// RUN: %clang_cc1 -triple x86_64-gnu-linux -O3 -disable-llvm-passes -I%S -emit-llvm -o - %s | FileCheck %s --check-prefixes=CHECK,LIN,NoNewStructPathTBAA -// RUN: %clang_cc1 -triple x86_64-gnu-linux -O3 -disable-llvm-passes -I%S -new-struct-path-tbaa -emit-llvm -o - %s | FileCheck %s --check-prefixes=CHECK,LIN,NewStructPathTBAA +// RUN: %clang_cc1 -disable-frozen-args -triple x86_64-gnu-linux -O3 -disable-llvm-passes -I%S -emit-llvm -o - %s | FileCheck %s --check-prefixes=CHECK,LIN,NoNewStructPathTBAA +// RUN: %clang_cc1 -disable-frozen-args -triple x86_64-gnu-linux -O3 -disable-llvm-passes -I%S -new-struct-path-tbaa -emit-llvm -o - %s | FileCheck %s --check-prefixes=CHECK,LIN,NewStructPathTBAA -// RUN: %clang_cc1 -triple x86_64-windows-pc -O3 -disable-llvm-passes -I%S -emit-llvm -o - %s | FileCheck %s --check-prefixes=CHECK,WIN,NoNewStructPathTBAA -// RUN: %clang_cc1 -triple x86_64-windows-pc -O3 -disable-llvm-passes -I%S -new-struct-path-tbaa -emit-llvm -o - %s | FileCheck %s --check-prefixes=CHECK,WIN,NewStructPathTBAA +// RUN: %clang_cc1 -disable-frozen-args -triple x86_64-windows-pc -O3 -disable-llvm-passes -I%S -emit-llvm -o - %s | FileCheck %s --check-prefixes=CHECK,WIN,NoNewStructPathTBAA +// RUN: %clang_cc1 -disable-frozen-args -triple x86_64-windows-pc -O3 -disable-llvm-passes -I%S -new-struct-path-tbaa -emit-llvm -o - %s | FileCheck %s --check-prefixes=CHECK,WIN,NewStructPathTBAA #include @@ -106,14 +106,14 @@ } unsigned _ExtInt(33) ManglingTestRetParam(unsigned _ExtInt(33) Param) { -// LIN: define i64 @_Z20ManglingTestRetParamU7_ExtIntILi33EEj(i64 % -// WIN: define dso_local i33 @"?ManglingTestRetParam@@YAU?$_UExtInt@$0CB@@__clang@@U12@@Z"(i33 +// LIN: define frozen i64 @_Z20ManglingTestRetParamU7_ExtIntILi33EEj(i64 % +// WIN: define dso_local frozen i33 @"?ManglingTestRetParam@@YAU?$_UExtInt@$0CB@@__clang@@U12@@Z"(i33 return 0; } _ExtInt(33) ManglingTestRetParam(_ExtInt(33) Param) { -// LIN: define i64 @_Z20ManglingTestRetParamU7_ExtIntILi33EEi(i64 % -// WIN: define dso_local i33 @"?ManglingTestRetParam@@YAU?$_ExtInt@$0CB@@__clang@@U12@@Z"(i33 +// LIN: define frozen i64 @_Z20ManglingTestRetParamU7_ExtIntILi33EEi(i64 % +// WIN: define dso_local frozen i33 @"?ManglingTestRetParam@@YAU?$_ExtInt@$0CB@@__clang@@U12@@Z"(i33 return 0; } @@ -254,22 +254,22 @@ auto A = typeid(U33_1); // LIN: call void @_ZNSt9type_infoC1ERKS_(%"class.std::type_info"* %{{.+}}, %"class.std::type_info"* nonnull align 8 dereferenceable(16) bitcast ({ i8*, i8* }* @_ZTIU7_ExtIntILi33EEj to %"class.std::type_info"*)) - // WIN: call %"class.std::type_info"* @"??0type_info@std@@QEAA@AEBV01@@Z"(%"class.std::type_info"* %{{.+}}, %"class.std::type_info"* nonnull align 8 dereferenceable(16) bitcast (%rtti.TypeDescriptor28* @"??_R0U?$_UExtInt@$0CB@@__clang@@@8" to %"class.std::type_info"*)) + // WIN: call frozen %"class.std::type_info"* @"??0type_info@std@@QEAA@AEBV01@@Z"(%"class.std::type_info"* %{{.+}}, %"class.std::type_info"* nonnull align 8 dereferenceable(16) bitcast (%rtti.TypeDescriptor28* @"??_R0U?$_UExtInt@$0CB@@__clang@@@8" to %"class.std::type_info"*)) auto B = typeid(U33_2); // LIN: call void @_ZNSt9type_infoC1ERKS_(%"class.std::type_info"* %{{.+}}, %"class.std::type_info"* nonnull align 8 dereferenceable(16) bitcast ({ i8*, i8* }* @_ZTIU7_ExtIntILi33EEj to %"class.std::type_info"*)) - // WIN: call %"class.std::type_info"* @"??0type_info@std@@QEAA@AEBV01@@Z"(%"class.std::type_info"* %{{.+}}, %"class.std::type_info"* nonnull align 8 dereferenceable(16) bitcast (%rtti.TypeDescriptor28* @"??_R0U?$_UExtInt@$0CB@@__clang@@@8" to %"class.std::type_info"*)) + // WIN: call frozen %"class.std::type_info"* @"??0type_info@std@@QEAA@AEBV01@@Z"(%"class.std::type_info"* %{{.+}}, %"class.std::type_info"* nonnull align 8 dereferenceable(16) bitcast (%rtti.TypeDescriptor28* @"??_R0U?$_UExtInt@$0CB@@__clang@@@8" to %"class.std::type_info"*)) auto C = typeid(S33_1); // LIN: call void @_ZNSt9type_infoC1ERKS_(%"class.std::type_info"* %{{.+}}, %"class.std::type_info"* nonnull align 8 dereferenceable(16) bitcast ({ i8*, i8* }* @_ZTIU7_ExtIntILi33EEi to %"class.std::type_info"*)) - // WIN: call %"class.std::type_info"* @"??0type_info@std@@QEAA@AEBV01@@Z"(%"class.std::type_info"* %{{.+}}, %"class.std::type_info"* nonnull align 8 dereferenceable(16) bitcast (%rtti.TypeDescriptor27* @"??_R0U?$_ExtInt@$0CB@@__clang@@@8" to %"class.std::type_info"*)) + // WIN: call frozen %"class.std::type_info"* @"??0type_info@std@@QEAA@AEBV01@@Z"(%"class.std::type_info"* %{{.+}}, %"class.std::type_info"* nonnull align 8 dereferenceable(16) bitcast (%rtti.TypeDescriptor27* @"??_R0U?$_ExtInt@$0CB@@__clang@@@8" to %"class.std::type_info"*)) auto D = typeid(S33_2); // LIN: call void @_ZNSt9type_infoC1ERKS_(%"class.std::type_info"* %{{.+}}, %"class.std::type_info"* nonnull align 8 dereferenceable(16) bitcast ({ i8*, i8* }* @_ZTIU7_ExtIntILi33EEi to %"class.std::type_info"*)) - // WIN: call %"class.std::type_info"* @"??0type_info@std@@QEAA@AEBV01@@Z"(%"class.std::type_info"* %{{.+}}, %"class.std::type_info"* nonnull align 8 dereferenceable(16) bitcast (%rtti.TypeDescriptor27* @"??_R0U?$_ExtInt@$0CB@@__clang@@@8" to %"class.std::type_info"*)) + // WIN: call frozen %"class.std::type_info"* @"??0type_info@std@@QEAA@AEBV01@@Z"(%"class.std::type_info"* %{{.+}}, %"class.std::type_info"* nonnull align 8 dereferenceable(16) bitcast (%rtti.TypeDescriptor27* @"??_R0U?$_ExtInt@$0CB@@__clang@@@8" to %"class.std::type_info"*)) auto E = typeid(S32_1); // LIN: call void @_ZNSt9type_infoC1ERKS_(%"class.std::type_info"* %{{.+}}, %"class.std::type_info"* nonnull align 8 dereferenceable(16) bitcast ({ i8*, i8* }* @_ZTIU7_ExtIntILi32EEi to %"class.std::type_info"*)) - // WIN: call %"class.std::type_info"* @"??0type_info@std@@QEAA@AEBV01@@Z"(%"class.std::type_info"* %{{.+}}, %"class.std::type_info"* nonnull align 8 dereferenceable(16) bitcast (%rtti.TypeDescriptor27* @"??_R0U?$_ExtInt@$0CA@@__clang@@@8" to %"class.std::type_info"*)) + // WIN: call frozen %"class.std::type_info"* @"??0type_info@std@@QEAA@AEBV01@@Z"(%"class.std::type_info"* %{{.+}}, %"class.std::type_info"* nonnull align 8 dereferenceable(16) bitcast (%rtti.TypeDescriptor27* @"??_R0U?$_ExtInt@$0CA@@__clang@@@8" to %"class.std::type_info"*)) auto F = typeid(S32_2); // LIN: call void @_ZNSt9type_infoC1ERKS_(%"class.std::type_info"* %{{.+}}, %"class.std::type_info"* nonnull align 8 dereferenceable(16) bitcast ({ i8*, i8* }* @_ZTIU7_ExtIntILi32EEi to %"class.std::type_info"*)) - // WIN: call %"class.std::type_info"* @"??0type_info@std@@QEAA@AEBV01@@Z"(%"class.std::type_info"* %{{.+}}, %"class.std::type_info"* nonnull align 8 dereferenceable(16) bitcast (%rtti.TypeDescriptor27* @"??_R0U?$_ExtInt@$0CA@@__clang@@@8" to %"class.std::type_info"*)) + // WIN: call frozen %"class.std::type_info"* @"??0type_info@std@@QEAA@AEBV01@@Z"(%"class.std::type_info"* %{{.+}}, %"class.std::type_info"* nonnull align 8 dereferenceable(16) bitcast (%rtti.TypeDescriptor27* @"??_R0U?$_ExtInt@$0CA@@__clang@@@8" to %"class.std::type_info"*)) } void ExplicitCasts() { diff --git a/clang/test/CodeGenCXX/fastcall.cpp b/clang/test/CodeGenCXX/fastcall.cpp --- a/clang/test/CodeGenCXX/fastcall.cpp +++ b/clang/test/CodeGenCXX/fastcall.cpp @@ -3,7 +3,7 @@ void __attribute__((fastcall)) foo1(int &y); void bar1(int &y) { // CHECK-LABEL: define void @_Z4bar1Ri - // CHECK: call x86_fastcallcc void @_Z4foo1Ri(i32* inreg nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) % + // CHECK: call x86_fastcallcc void @_Z4foo1Ri(i32* frozen inreg nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) % foo1(y); } @@ -15,6 +15,6 @@ void __attribute__((fastcall)) foo2(S1 a, int b); void bar2(S1 a, int b) { // CHECK-LABEL: define void @_Z4bar22S1i - // CHECK: call x86_fastcallcc void @_Z4foo22S1i(%struct.S1* inreg %{{.*}}, i32 inreg % + // CHECK: call x86_fastcallcc void @_Z4foo22S1i(%struct.S1* frozen inreg %{{.*}}, i32 frozen inreg % foo2(a, b); } diff --git a/clang/test/CodeGenCXX/float128-declarations.cpp b/clang/test/CodeGenCXX/float128-declarations.cpp --- a/clang/test/CodeGenCXX/float128-declarations.cpp +++ b/clang/test/CodeGenCXX/float128-declarations.cpp @@ -84,15 +84,15 @@ // CHECK-DAG: @_ZN12_GLOBAL__N_13f2nE = internal global fp128 0xL00000000000000004004080000000000 // CHECK-DAG: @_ZN12_GLOBAL__N_15arr1nE = internal global [10 x fp128] // CHECK-DAG: @_ZN12_GLOBAL__N_15arr2nE = internal global [3 x fp128] [fp128 0xL33333333333333333FFF333333333333, fp128 0xL00000000000000004000800000000000, fp128 0xL00000000000000004025176592E00000] -// CHECK-DAG: define internal fp128 @_ZN12_GLOBAL__N_16func1nERKu9__ieee128(fp128* +// CHECK-DAG: define internal frozen fp128 @_ZN12_GLOBAL__N_16func1nERKu9__ieee128(fp128* // CHECK-DAG: @f1f = global fp128 0xL00000000000000000000000000000000 // CHECK-DAG: @f2f = global fp128 0xL33333333333333334004033333333333 // CHECK-DAG: @arr1f = global [10 x fp128] // CHECK-DAG: @arr2f = global [3 x fp128] [fp128 0xL3333333333333333BFFF333333333333, fp128 0xL0000000000000000C000800000000000, fp128 0xL0000000000000000C025176592E00000] -// CHECK-DAG: declare fp128 @_Z6func1fu9__ieee128(fp128) -// CHECK-DAG: define linkonce_odr void @_ZN2C1C2Eu9__ieee128(%class.C1* %this, fp128 %arg) -// CHECK-DAG: define linkonce_odr fp128 @_ZN2C16func2cEu9__ieee128(fp128 %arg) -// CHECK-DAG: define linkonce_odr fp128 @_Z6func1tIu9__ieee128ET_S0_(fp128 %arg) +// CHECK-DAG: declare frozen fp128 @_Z6func1fu9__ieee128(fp128 frozen) +// CHECK-DAG: define linkonce_odr void @_ZN2C1C2Eu9__ieee128(%class.C1* frozen %this, fp128 frozen %arg) +// CHECK-DAG: define linkonce_odr frozen fp128 @_ZN2C16func2cEu9__ieee128(fp128 frozen %arg) +// CHECK-DAG: define linkonce_odr frozen fp128 @_Z6func1tIu9__ieee128ET_S0_(fp128 frozen %arg) // CHECK-DAG: @__const.main.s1 = private unnamed_addr constant %struct.S1 { fp128 0xL00000000000000004006080000000000 } // CHECK-DAG: store fp128 0xLF0AFD0EBFF292DCE42E0B38CDD83F26F, fp128* %f1l, align 16 // CHECK-DAG: store fp128 0xL00000000000000008000000000000000, fp128* %f2l, align 16 @@ -106,15 +106,15 @@ // CHECK-X86-DAG: @_ZN12_GLOBAL__N_13f2nE = internal global fp128 0xL00000000000000004004080000000000 // CHECK-X86-DAG: @_ZN12_GLOBAL__N_15arr1nE = internal global [10 x fp128] // CHECK-X86-DAG: @_ZN12_GLOBAL__N_15arr2nE = internal global [3 x fp128] [fp128 0xL33333333333333333FFF333333333333, fp128 0xL00000000000000004000800000000000, fp128 0xL00000000000000004025176592E00000] -// CHECK-X86-DAG: define internal fp128 @_ZN12_GLOBAL__N_16func1nERKg(fp128* +// CHECK-X86-DAG: define internal frozen fp128 @_ZN12_GLOBAL__N_16func1nERKg(fp128* // CHECK-X86-DAG: @f1f = global fp128 0xL00000000000000000000000000000000 // CHECK-X86-DAG: @f2f = global fp128 0xL33333333333333334004033333333333 // CHECK-X86-DAG: @arr1f = global [10 x fp128] // CHECK-X86-DAG: @arr2f = global [3 x fp128] [fp128 0xL3333333333333333BFFF333333333333, fp128 0xL0000000000000000C000800000000000, fp128 0xL0000000000000000C025176592E00000] -// CHECK-X86-DAG: declare fp128 @_Z6func1fg(fp128) -// CHECK-X86-DAG: define linkonce_odr void @_ZN2C1C2Eg(%class.C1* %this, fp128 %arg) -// CHECK-X86-DAG: define linkonce_odr fp128 @_ZN2C16func2cEg(fp128 %arg) -// CHECK-X86-DAG: define linkonce_odr fp128 @_Z6func1tIgET_S0_(fp128 %arg) +// CHECK-X86-DAG: declare frozen fp128 @_Z6func1fg(fp128 frozen) +// CHECK-X86-DAG: define linkonce_odr void @_ZN2C1C2Eg(%class.C1* frozen %this, fp128 frozen %arg) +// CHECK-X86-DAG: define linkonce_odr frozen fp128 @_ZN2C16func2cEg(fp128 frozen %arg) +// CHECK-X86-DAG: define linkonce_odr frozen fp128 @_Z6func1tIgET_S0_(fp128 frozen %arg) // CHECK-X86-DAG: @__const.main.s1 = private unnamed_addr constant %struct.S1 { fp128 0xL00000000000000004006080000000000 } // CHECK-X86-DAG: store fp128 0xLF0AFD0EBFF292DCE42E0B38CDD83F26F, fp128* %f1l, align 16 // CHECK-X86-DAG: store fp128 0xL00000000000000008000000000000000, fp128* %f2l, align 16 diff --git a/clang/test/CodeGenCXX/float16-declarations.cpp b/clang/test/CodeGenCXX/float16-declarations.cpp --- a/clang/test/CodeGenCXX/float16-declarations.cpp +++ b/clang/test/CodeGenCXX/float16-declarations.cpp @@ -59,12 +59,12 @@ _Float16 func1c(_Float16 arg ) { return f1c + arg; } -// CHECK-DAG: define linkonce_odr dso_local half @_ZN2C16func1cEDF16_(%class.C1*{{.*}}, half{{.*}}) +// CHECK-DAG: define linkonce_odr dso_local frozen half @_ZN2C16func1cEDF16_(%class.C1*{{.*}}, half{{.*}}) static _Float16 func2c(_Float16 arg) { return arg * C1::f2c; } -// CHECK-DAG: define linkonce_odr dso_local half @_ZN2C16func2cEDF16_(half{{.*}}) +// CHECK-DAG: define linkonce_odr dso_local frozen half @_ZN2C16func2cEDF16_(half{{.*}}) }; /* Template */ @@ -72,7 +72,7 @@ template C func1t(C arg) { return arg * 2.f16; } -// CHECK-DAG: define linkonce_odr dso_local half @_Z6func1tIDF16_ET_S0_(half{{.*}}) +// CHECK-DAG: define linkonce_odr dso_local frozen half @_Z6func1tIDF16_ET_S0_(half{{.*}}) template struct S1 { C mem1; @@ -99,7 +99,7 @@ C1 c1(f1l); // CHECK-DAG: [[F1L:%[a-z0-9]+]] = load half, half* %{{.*}}, align 2 -// CHECK-DAG: call void @_ZN2C1C2EDF16_(%class.C1* %{{.*}}, half %{{.*}}) +// CHECK-DAG: call void @_ZN2C1C2EDF16_(%class.C1* frozen %{{.*}}, half frozen %{{.*}}) S1<_Float16> s1 = { 132.f16 }; // CHECK-DAG: @__const.main.s1 = private unnamed_addr constant %struct.S1 { half 0xH5820 }, align 2 diff --git a/clang/test/CodeGenCXX/for-range-temporaries.cpp b/clang/test/CodeGenCXX/for-range-temporaries.cpp --- a/clang/test/CodeGenCXX/for-range-temporaries.cpp +++ b/clang/test/CodeGenCXX/for-range-temporaries.cpp @@ -115,7 +115,7 @@ // CHECK: [[COND]]: // CHECK: call void @_ZN1EneERKS_( -// CHECK: %[[CMP:.*]] = call zeroext i1 @_ZN1HcvbEv( +// CHECK: %[[CMP:.*]] = call frozen zeroext i1 @_ZN1HcvbEv( // CHECK: call void @_ZN1HD1Ev( // CHECK: br i1 %[[CMP]], label %[[BODY:.*]], label %[[CLEANUP:.*]] diff --git a/clang/test/CodeGenCXX/for-range.cpp b/clang/test/CodeGenCXX/for-range.cpp --- a/clang/test/CodeGenCXX/for-range.cpp +++ b/clang/test/CodeGenCXX/for-range.cpp @@ -67,8 +67,8 @@ A a; for (B b : C()) { // CHECK: call void @_ZN1CC1Ev( - // CHECK: = call %struct.B* @_Z5beginR1C( - // CHECK: = call %struct.B* @_Z3endR1C( + // CHECK: = call frozen %struct.B* @_Z5beginR1C( + // CHECK: = call frozen %struct.B* @_Z3endR1C( // CHECK: br label %[[COND:.*]] // CHECK: [[COND]]: @@ -99,8 +99,8 @@ A a; for (B b : D()) { // CHECK: call void @_ZN1DC1Ev( - // CHECK: = call %struct.B* @_ZN1D5beginEv( - // CHECK: = call %struct.B* @_ZN1D3endEv( + // CHECK: = call frozen %struct.B* @_ZN1D5beginEv( + // CHECK: = call frozen %struct.B* @_ZN1D3endEv( // CHECK: br label %[[COND:.*]] // CHECK: [[COND]]: diff --git a/clang/test/CodeGenCXX/forward-enum.cpp b/clang/test/CodeGenCXX/forward-enum.cpp --- a/clang/test/CodeGenCXX/forward-enum.cpp +++ b/clang/test/CodeGenCXX/forward-enum.cpp @@ -6,6 +6,6 @@ // CHECK-LABEL: define void @_Z3foo6MyEnum void foo(MyEnum value) { - // CHECK: call void @_Z3bar6MyEnum(i8 signext + // CHECK: call void @_Z3bar6MyEnum(i8 frozen signext bar(value); } diff --git a/clang/test/CodeGenCXX/fp16-mangle.cpp b/clang/test/CodeGenCXX/fp16-mangle.cpp --- a/clang/test/CodeGenCXX/fp16-mangle.cpp +++ b/clang/test/CodeGenCXX/fp16-mangle.cpp @@ -4,9 +4,9 @@ template struct S { static int i; }; template <> int S<__fp16, __fp16>::i = 3; -// CHECK-LABEL: define void @_Z1fPDh(half* %x) +// CHECK-LABEL: define void @_Z1fPDh(half* frozen %x) void f (__fp16 *x) { } -// CHECK-LABEL: define void @_Z1gPDhS_(half* %x, half* %y) +// CHECK-LABEL: define void @_Z1gPDhS_(half* frozen %x, half* frozen %y) void g (__fp16 *x, __fp16 *y) { } diff --git a/clang/test/CodeGenCXX/fp16-overload.cpp b/clang/test/CodeGenCXX/fp16-overload.cpp --- a/clang/test/CodeGenCXX/fp16-overload.cpp +++ b/clang/test/CodeGenCXX/fp16-overload.cpp @@ -5,6 +5,6 @@ __fp16 a; -// CHECK: call i32 @_Z3foof -// CHECK-NOT: call i32 @_Z3food +// CHECK: call frozen i32 @_Z3foof +// CHECK-NOT: call frozen i32 @_Z3food int bar (void) { return foo(a); } diff --git a/clang/test/CodeGenCXX/global-dtor-no-atexit.cpp b/clang/test/CodeGenCXX/global-dtor-no-atexit.cpp --- a/clang/test/CodeGenCXX/global-dtor-no-atexit.cpp +++ b/clang/test/CodeGenCXX/global-dtor-no-atexit.cpp @@ -1,7 +1,7 @@ -// RUN: %clang_cc1 -triple x86_64 %s -fno-use-cxa-atexit -emit-llvm -o - | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args -triple x86_64 %s -fno-use-cxa-atexit -emit-llvm -o - | FileCheck %s // PR7097 -// RUN: %clang_cc1 -triple x86_64 %s -fno-use-cxa-atexit -mconstructor-aliases -emit-llvm -o - | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args -triple x86_64 %s -fno-use-cxa-atexit -mconstructor-aliases -emit-llvm -o - | FileCheck %s // CHECK: call void @_ZN1AC1Ev([[A:%.*]]* @a) // CHECK-NEXT: call i32 @atexit(void ()* @__dtor_a) diff --git a/clang/test/CodeGenCXX/global-init.cpp b/clang/test/CodeGenCXX/global-init.cpp --- a/clang/test/CodeGenCXX/global-init.cpp +++ b/clang/test/CodeGenCXX/global-init.cpp @@ -24,16 +24,16 @@ // CHECK: @_ZN6PR59741aE = global %"struct.PR5974::A"* getelementptr inbounds (%"struct.PR5974::C", %"struct.PR5974::C"* @_ZN6PR59741cE, i32 0, i32 0) // CHECK: @_ZN6PR59741bE = global %"struct.PR5974::B"* bitcast (i8* getelementptr (i8, i8* bitcast (%"struct.PR5974::C"* @_ZN6PR59741cE to i8*), i64 4) to %"struct.PR5974::B"*), align 8 -// CHECK: call void @_ZN1AC1Ev(%struct.A* @a) +// CHECK: call void @_ZN1AC1Ev(%struct.A* frozen @a) // CHECK: call i32 @__cxa_atexit(void (i8*)* bitcast (void (%struct.A*)* @_ZN1AD1Ev to void (i8*)*), i8* getelementptr inbounds (%struct.A, %struct.A* @a, i32 0, i32 0), i8* @__dso_handle) A a; -// CHECK: call void @_ZN1BC1Ev(%struct.B* @b) +// CHECK: call void @_ZN1BC1Ev(%struct.B* frozen @b) // CHECK: call i32 @__cxa_atexit(void (i8*)* bitcast (void (%struct.B*)* @_ZN1BD1Ev to void (i8*)*), i8* getelementptr inbounds (%struct.B, %struct.B* @b, i32 0, i32 0), i8* @__dso_handle) B b; // PR6205: this should not require a global initializer -// CHECK-NOT: call void @_ZN1CC1Ev(%struct.C* @c) +// CHECK-NOT: call void @_ZN1CC1Ev(%struct.C* frozen @c) C c; // CHECK: call i32 @__cxa_atexit(void (i8*)* bitcast (void (%struct.D*)* @_ZN1DD1Ev to void (i8*)*), i8* getelementptr inbounds (%struct.D, %struct.D* @d, i32 0, i32 0), i8* @__dso_handle) @@ -46,7 +46,7 @@ const int y = x - 1; // This gets deferred. const int z = ~y; // This also gets deferred, but gets "undeferred" before y. int test() { return z; } -// CHECK-LABEL: define i32 @_ZN5test14testEv() +// CHECK-LABEL: define frozen i32 @_ZN5test14testEv() // All of these initializers end up delayed, so we check them later. } @@ -79,7 +79,7 @@ // This needs an initialization function and guard variables. // CHECK: load i8, i8* bitcast (i64* @_ZGVN5test41xE - // CHECK: [[CALL:%.*]] = call i32 @_ZN5test43fooEv + // CHECK: [[CALL:%.*]] = call frozen i32 @_ZN5test43fooEv // CHECK-NEXT: store i32 [[CALL]], i32* @_ZN5test41xE // CHECK-NEXT: store i64 1, i64* @_ZGVN5test41xE __attribute__((weak)) int x = foo(); diff --git a/clang/test/CodeGenCXX/globalinit-loc.cpp b/clang/test/CodeGenCXX/globalinit-loc.cpp --- a/clang/test/CodeGenCXX/globalinit-loc.cpp +++ b/clang/test/CodeGenCXX/globalinit-loc.cpp @@ -4,7 +4,7 @@ // Verify that the global init helper function does not get associated // with any source location. // -// CHECK: define internal {{.*}}void @_GLOBAL__sub_I_globalinit_loc.cpp({{.*}} { +// CHECK: define internal {{.*}}void @_GLOBAL__sub_I_globalinit_loc.cpp({{.*}} // CHECK: !dbg ![[DBG:.*]] // CHECK: !DISubprogram(linkageName: "_GLOBAL__sub_I_globalinit_loc.cpp" // CHECK-NOT: line: diff --git a/clang/test/CodeGenCXX/goto.cpp b/clang/test/CodeGenCXX/goto.cpp --- a/clang/test/CodeGenCXX/goto.cpp +++ b/clang/test/CodeGenCXX/goto.cpp @@ -6,7 +6,7 @@ struct A { A(); ~A(); }; struct V { V(const A &a = A()); ~V(); }; - // CHECK-LABEL: define linkonce_odr i32 @_ZN5test04testILi0EEEii + // CHECK-LABEL: define linkonce_odr frozen i32 @_ZN5test04testILi0EEEii template int test(int x) { // CHECK: [[RET:%.*]] = alloca i32 // CHECK-NEXT: [[X:%.*]] = alloca i32 @@ -17,17 +17,17 @@ // CHECK-NEXT: [[V:%.*]] = alloca [[V:%.*]]*, // CHECK-NEXT: [[TMP:%.*]] = alloca [[A]] // CHECK-NEXT: [[CLEANUPACTIVE:%.*]] = alloca i1 - // CHECK: call void @_ZN5test01AC1Ev([[A]]* [[Y]]) - // CHECK-NEXT: invoke void @_ZN5test01AC1Ev([[A]]* [[Z]]) - // CHECK: [[NEW:%.*]] = invoke noalias nonnull i8* @_Znwm(i64 1) + // CHECK: call void @_ZN5test01AC1Ev([[A]]* frozen [[Y]]) + // CHECK-NEXT: invoke void @_ZN5test01AC1Ev([[A]]* frozen [[Z]]) + // CHECK: [[NEW:%.*]] = invoke frozen noalias nonnull i8* @_Znwm(i64 frozen 1) // CHECK: store i1 true, i1* [[CLEANUPACTIVE]] // CHECK: [[NEWCAST:%.*]] = bitcast i8* [[NEW]] to [[V]]* - // CHECK-NEXT: invoke void @_ZN5test01AC1Ev([[A]]* [[TMP]]) - // CHECK: invoke void @_ZN5test01VC1ERKNS_1AE([[V]]* [[NEWCAST]], [[A]]* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[TMP]]) + // CHECK-NEXT: invoke void @_ZN5test01AC1Ev([[A]]* frozen [[TMP]]) + // CHECK: invoke void @_ZN5test01VC1ERKNS_1AE([[V]]* frozen [[NEWCAST]], [[A]]* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[TMP]]) // CHECK: store i1 false, i1* [[CLEANUPACTIVE]] - // CHECK98-NEXT: invoke void @_ZN5test01AD1Ev([[A]]* [[TMP]]) - // CHECK11-NEXT: call void @_ZN5test01AD1Ev([[A]]* [[TMP]]) + // CHECK98-NEXT: invoke void @_ZN5test01AD1Ev([[A]]* frozen [[TMP]]) + // CHECK11-NEXT: call void @_ZN5test01AD1Ev([[A]]* frozen [[TMP]]) A y; try { A z; diff --git a/clang/test/CodeGenCXX/hidden-dllimport.cpp b/clang/test/CodeGenCXX/hidden-dllimport.cpp --- a/clang/test/CodeGenCXX/hidden-dllimport.cpp +++ b/clang/test/CodeGenCXX/hidden-dllimport.cpp @@ -2,7 +2,7 @@ // We used to declare this hidden dllimport, which is contradictory. -// CHECK: declare dllimport void @"?bar@foo@@QEAAXXZ"(%struct.foo*) +// CHECK: declare dllimport void @"?bar@foo@@QEAAXXZ"(%struct.foo* frozen) struct __attribute__((dllimport)) foo { void bar() {} diff --git a/clang/test/CodeGenCXX/homogeneous-aggregates.cpp b/clang/test/CodeGenCXX/homogeneous-aggregates.cpp --- a/clang/test/CodeGenCXX/homogeneous-aggregates.cpp +++ b/clang/test/CodeGenCXX/homogeneous-aggregates.cpp @@ -1,7 +1,7 @@ -// RUN: %clang_cc1 -triple powerpc64le-unknown-linux-gnu -emit-llvm -o - %s | FileCheck %s --check-prefix=PPC -// RUN: %clang_cc1 -mfloat-abi hard -triple armv7-unknown-linux-gnueabi -emit-llvm -o - %s | FileCheck %s --check-prefix=ARM32 -// RUN: %clang_cc1 -mfloat-abi hard -triple aarch64-unknown-linux-gnu -emit-llvm -o - %s | FileCheck %s --check-prefix=ARM64 -// RUN: %clang_cc1 -mfloat-abi hard -triple x86_64-unknown-windows-gnu -emit-llvm -o - %s | FileCheck %s --check-prefix=X64 +// RUN: %clang_cc1 -disable-frozen-args -triple powerpc64le-unknown-linux-gnu -emit-llvm -o - %s | FileCheck %s --check-prefix=PPC +// RUN: %clang_cc1 -disable-frozen-args -mfloat-abi hard -triple armv7-unknown-linux-gnueabi -emit-llvm -o - %s | FileCheck %s --check-prefix=ARM32 +// RUN: %clang_cc1 -disable-frozen-args -mfloat-abi hard -triple aarch64-unknown-linux-gnu -emit-llvm -o - %s | FileCheck %s --check-prefix=ARM64 +// RUN: %clang_cc1 -disable-frozen-args -mfloat-abi hard -triple x86_64-unknown-windows-gnu -emit-llvm -o - %s | FileCheck %s --check-prefix=X64 #if defined(__x86_64__) #define CC __attribute__((vectorcall)) diff --git a/clang/test/CodeGenCXX/implicit-copy-assign-operator.cpp b/clang/test/CodeGenCXX/implicit-copy-assign-operator.cpp --- a/clang/test/CodeGenCXX/implicit-copy-assign-operator.cpp +++ b/clang/test/CodeGenCXX/implicit-copy-assign-operator.cpp @@ -40,7 +40,7 @@ d1 = d2; } -// CHECK-LABEL: define linkonce_odr nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.D* @_ZN1DaSERS_ +// CHECK-LABEL: define linkonce_odr frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.D* @_ZN1DaSERS_ // CHECK: {{call.*_ZN1AaSERS_}} // CHECK: {{call.*_ZN1BaSERS_}} // CHECK: {{call.*_ZN1CaSERKS_}} diff --git a/clang/test/CodeGenCXX/implicit-copy-constructor.cpp b/clang/test/CodeGenCXX/implicit-copy-constructor.cpp --- a/clang/test/CodeGenCXX/implicit-copy-constructor.cpp +++ b/clang/test/CodeGenCXX/implicit-copy-constructor.cpp @@ -40,7 +40,7 @@ D d2(d); } -// CHECK-LABEL: define linkonce_odr void @_ZN1DC1ERS_(%struct.D* %this, %struct.D* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) unnamed_addr +// CHECK-LABEL: define linkonce_odr void @_ZN1DC1ERS_(%struct.D* frozen %this, %struct.D* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) unnamed_addr // CHECK: call void @_ZN1AC1Ev // CHECK: call void @_ZN1CC2ERS_1A // CHECK: call void @_ZN1AD1Ev diff --git a/clang/test/CodeGenCXX/implicit-function-conversion.cpp b/clang/test/CodeGenCXX/implicit-function-conversion.cpp --- a/clang/test/CodeGenCXX/implicit-function-conversion.cpp +++ b/clang/test/CodeGenCXX/implicit-function-conversion.cpp @@ -3,5 +3,5 @@ double a(double) noexcept; int b(double (&)(double)); -// CHECK: call i32 @_Z1bRFddE(double (double)* nonnull @_Z1ad) +// CHECK: call frozen i32 @_Z1bRFddE(double (double)* frozen nonnull @_Z1ad) int c = b(a); diff --git a/clang/test/CodeGenCXX/inalloca-overaligned.cpp b/clang/test/CodeGenCXX/inalloca-overaligned.cpp --- a/clang/test/CodeGenCXX/inalloca-overaligned.cpp +++ b/clang/test/CodeGenCXX/inalloca-overaligned.cpp @@ -26,7 +26,7 @@ return nt.x + o.buf[0]; } -// CHECK-LABEL: define dso_local i32 @"?receive_inalloca_overaligned@@Y{{.*}}" +// CHECK-LABEL: define dso_local frozen i32 @"?receive_inalloca_overaligned@@Y{{.*}}" // CHECK-SAME: (<{ %struct.NonTrivial, %struct.OverAligned* }>* inalloca %0) int pass_inalloca_overaligned() { @@ -34,19 +34,19 @@ return gvi32; } -// CHECK-LABEL: define dso_local i32 @"?pass_inalloca_overaligned@@Y{{.*}}" +// CHECK-LABEL: define dso_local frozen i32 @"?pass_inalloca_overaligned@@Y{{.*}}" // CHECK: [[TMP:%[^ ]*]] = alloca %struct.OverAligned, align 64 // CHECK: call i8* @llvm.stacksave() // CHECK: alloca inalloca <{ %struct.NonTrivial, %struct.OverAligned* }> // Construct OverAligned into TMP. -// CHECK: call x86_thiscallcc %struct.OverAligned* @"??0OverAligned@@QAE@XZ"(%struct.OverAligned* [[TMP]]) +// CHECK: call x86_thiscallcc frozen %struct.OverAligned* @"??0OverAligned@@QAE@XZ"(%struct.OverAligned* frozen [[TMP]]) // Construct NonTrivial into the GEP. // CHECK: [[GEP:%[^ ]*]] = getelementptr inbounds <{ %struct.NonTrivial, %struct.OverAligned* }>, <{ %struct.NonTrivial, %struct.OverAligned* }>* %{{.*}}, i32 0, i32 0 -// CHECK: call x86_thiscallcc %struct.NonTrivial* @"??0NonTrivial@@QAE@XZ"(%struct.NonTrivial* [[GEP]]) +// CHECK: call x86_thiscallcc frozen %struct.NonTrivial* @"??0NonTrivial@@QAE@XZ"(%struct.NonTrivial* frozen [[GEP]]) // Store the address of an OverAligned temporary into the struct. // CHECK: getelementptr inbounds <{ %struct.NonTrivial, %struct.OverAligned* }>, <{ %struct.NonTrivial, %struct.OverAligned* }>* %{{.*}}, i32 0, i32 1 // CHECK: store %struct.OverAligned* [[TMP]], %struct.OverAligned** %{{.*}}, align 4 -// CHECK: call i32 @"?receive_inalloca_overaligned@@Y{{.*}}"(<{ %struct.NonTrivial, %struct.OverAligned* }>* inalloca %argmem) +// CHECK: call frozen i32 @"?receive_inalloca_overaligned@@Y{{.*}}"(<{ %struct.NonTrivial, %struct.OverAligned* }>* inalloca %argmem) diff --git a/clang/test/CodeGenCXX/inalloca-vector.cpp b/clang/test/CodeGenCXX/inalloca-vector.cpp --- a/clang/test/CodeGenCXX/inalloca-vector.cpp +++ b/clang/test/CodeGenCXX/inalloca-vector.cpp @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -w -triple i686-pc-win32 -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args -w -triple i686-pc-win32 -emit-llvm -o - %s | FileCheck %s // PR44395 // MSVC passes up to three vectors in registers, and the rest indirectly. Check @@ -29,7 +29,7 @@ } // CHECK-LABEL: define dso_local void @"?pass_vec_128@@YAXXZ"() // CHECK: getelementptr inbounds <{ %struct.NonTrivial, <4 x float>*, <4 x float>* }>, <{ %struct.NonTrivial, <4 x float>*, <4 x float>* }>* %{{[^,]*}}, i32 0, i32 0 -// CHECK: call x86_thiscallcc %struct.NonTrivial* @"??0NonTrivial@@QAE@XZ"(%struct.NonTrivial* %{{.*}}) +// CHECK: call x86_thiscallcc frozen %struct.NonTrivial* @"??0NonTrivial@@QAE@XZ"(%struct.NonTrivial* %{{.*}}) // Store q, store temp alloca. // CHECK: store <4 x float> %{{[^,]*}}, <4 x float>* %{{[^,]*}}, align 16 diff --git a/clang/test/CodeGenCXX/inheriting-constructor-cleanup.cpp b/clang/test/CodeGenCXX/inheriting-constructor-cleanup.cpp --- a/clang/test/CodeGenCXX/inheriting-constructor-cleanup.cpp +++ b/clang/test/CodeGenCXX/inheriting-constructor-cleanup.cpp @@ -29,24 +29,24 @@ // CHECK-LABEL: define void @_Z1fv // CHECK: %[[TMP1:.*]] = alloca %struct.S1 // CHECK: %[[TMP2:.*]] = alloca %struct.S2 - // CHECK: call void (%struct.Base*, %struct.S1*, %struct.S2*, i8*, ...) @_ZN4BaseC2ERK2S1RK2S2PKcz(%struct.Base* {{.*}}, %struct.S1* nonnull align 1 dereferenceable(1) %[[TMP1]], %struct.S2* nonnull align 1 dereferenceable(1) %[[TMP2]], i8* {{.*}}) + // CHECK: call void (%struct.Base*, %struct.S1*, %struct.S2*, i8*, ...) @_ZN4BaseC2ERK2S1RK2S2PKcz(%struct.Base* {{.*}}, %struct.S1* frozen nonnull align 1 dereferenceable(1) %[[TMP1]], %struct.S2* frozen nonnull align 1 dereferenceable(1) %[[TMP2]], i8* {{.*}}) // CHECK-NEXT: call void @_ZN9InheritorD1Ev(%struct.Inheritor* {{.*}}) - // CHECK-NEXT: call void @_ZN2S2D1Ev(%struct.S2* %[[TMP2]]) - // CHECK-NEXT: call void @_ZN2S1D1Ev(%struct.S1* %[[TMP1]]) + // CHECK-NEXT: call void @_ZN2S2D1Ev(%struct.S2* frozen %[[TMP2]]) + // CHECK-NEXT: call void @_ZN2S1D1Ev(%struct.S1* frozen %[[TMP1]]) // EXCEPTIONS-LABEL: define void @_Z1fv // EXCEPTIONS: %[[TMP1:.*]] = alloca %struct.S1 // EXCEPTIONS: %[[TMP2:.*]] = alloca %struct.S2 - // EXCEPTIONS: invoke void (%struct.Base*, %struct.S1*, %struct.S2*, i8*, ...) @_ZN4BaseC2ERK2S1RK2S2PKcz(%struct.Base* {{.*}}, %struct.S1* nonnull align 1 dereferenceable(1) %[[TMP1]], %struct.S2* nonnull align 1 dereferenceable(1) %[[TMP2]], i8* {{.*}}) + // EXCEPTIONS: invoke void (%struct.Base*, %struct.S1*, %struct.S2*, i8*, ...) @_ZN4BaseC2ERK2S1RK2S2PKcz(%struct.Base* {{.*}}, %struct.S1* frozen nonnull align 1 dereferenceable(1) %[[TMP1]], %struct.S2* frozen nonnull align 1 dereferenceable(1) %[[TMP2]], i8* {{.*}}) // EXCEPTIONS-NEXT: to label %[[CONT:.*]] unwind label %[[LPAD:.*]] // EXCEPTIONS: [[CONT]]: // EXCEPTIONS-NEXT: call void @_ZN9InheritorD1Ev(%struct.Inheritor* {{.*}}) - // EXCEPTIONS-NEXT: call void @_ZN2S2D1Ev(%struct.S2* %[[TMP2]]) - // EXCEPTIONS-NEXT: call void @_ZN2S1D1Ev(%struct.S1* %[[TMP1]]) + // EXCEPTIONS-NEXT: call void @_ZN2S2D1Ev(%struct.S2* frozen %[[TMP2]]) + // EXCEPTIONS-NEXT: call void @_ZN2S1D1Ev(%struct.S1* frozen %[[TMP1]]) // EXCEPTIONS: [[LPAD]]: // EXCEPTIONS: call void @_ZN14NonTrivialDtorD2Ev(%struct.NonTrivialDtor* {{.*}}) - // EXCEPTIONS-NEXT: call void @_ZN2S2D1Ev(%struct.S2* %[[TMP2]]) - // EXCEPTIONS-NEXT: call void @_ZN2S1D1Ev(%struct.S1* %[[TMP1]]) + // EXCEPTIONS-NEXT: call void @_ZN2S2D1Ev(%struct.S2* frozen %[[TMP2]]) + // EXCEPTIONS-NEXT: call void @_ZN2S1D1Ev(%struct.S1* frozen %[[TMP1]]) } diff --git a/clang/test/CodeGenCXX/inheriting-constructor.cpp b/clang/test/CodeGenCXX/inheriting-constructor.cpp --- a/clang/test/CodeGenCXX/inheriting-constructor.cpp +++ b/clang/test/CodeGenCXX/inheriting-constructor.cpp @@ -1,8 +1,8 @@ -// RUN: %clang_cc1 -std=c++11 -triple i386-linux -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK --check-prefix=ITANIUM -// RUN: %clang_cc1 -std=c++11 -triple x86_64-darwin -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK --check-prefix=ITANIUM -// RUN: %clang_cc1 -std=c++11 -triple arm64-ehabi -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK --check-prefix=ITANIUM -// RUN: %clang_cc1 -std=c++11 -triple i386-windows -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK --check-prefix=MSABI --check-prefix=WIN32 -// RUN: %clang_cc1 -std=c++11 -triple x86_64-windows -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK --check-prefix=MSABI --check-prefix=WIN64 +// RUN: %clang_cc1 -disable-frozen-args -std=c++11 -triple i386-linux -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK --check-prefix=ITANIUM +// RUN: %clang_cc1 -disable-frozen-args -std=c++11 -triple x86_64-darwin -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK --check-prefix=ITANIUM +// RUN: %clang_cc1 -disable-frozen-args -std=c++11 -triple arm64-ehabi -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK --check-prefix=ITANIUM +// RUN: %clang_cc1 -disable-frozen-args -std=c++11 -triple i386-windows -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK --check-prefix=MSABI --check-prefix=WIN32 +// RUN: %clang_cc1 -disable-frozen-args -std=c++11 -triple x86_64-windows -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK --check-prefix=MSABI --check-prefix=WIN64 // PR12219 struct A { A(int); virtual ~A(); }; diff --git a/clang/test/CodeGenCXX/init-invariant.cpp b/clang/test/CodeGenCXX/init-invariant.cpp --- a/clang/test/CodeGenCXX/init-invariant.cpp +++ b/clang/test/CodeGenCXX/init-invariant.cpp @@ -41,20 +41,20 @@ static const A a = A(); } -// CHECK: call void @_ZN1AC1Ev({{.*}}* nonnull @a) +// CHECK: call void @_ZN1AC1Ev({{.*}}* frozen nonnull @a) // CHECK: call {{.*}}@llvm.invariant.start.p0i8(i64 4, i8* bitcast ({{.*}} @a to i8*)) -// CHECK: call void @_ZN1BC1Ev({{.*}}* nonnull @b) +// CHECK: call void @_ZN1BC1Ev({{.*}}* frozen nonnull @b) // CHECK-NOT: call {{.*}}@llvm.invariant.start.p0i8(i64 4, i8* bitcast ({{.*}} @b to i8*)) -// CHECK: call void @_ZN1CC1Ev({{.*}}* nonnull @c) +// CHECK: call void @_ZN1CC1Ev({{.*}}* frozen nonnull @c) // CHECK-NOT: call {{.*}}@llvm.invariant.start.p0i8(i64 4, i8* bitcast ({{.*}} @c to i8*)) -// CHECK: call i32 @_Z1fv( +// CHECK: call frozen i32 @_Z1fv( // CHECK: store {{.*}}, i32* @d // CHECK: call {{.*}}@llvm.invariant.start.p0i8(i64 4, i8* bitcast ({{.*}} @d to i8*)) // CHECK-LABEL: define void @_Z1ev( -// CHECK: call void @_ZN1AC1Ev(%struct.A* nonnull @_ZZ1evE1a) +// CHECK: call void @_ZN1AC1Ev(%struct.A* frozen nonnull @_ZZ1evE1a) // CHECK: call {{.*}}@llvm.invariant.start.p0i8(i64 4, i8* {{.*}}bitcast ({{.*}} @_ZZ1evE1a to i8*)) // CHECK-NOT: llvm.invariant.end diff --git a/clang/test/CodeGenCXX/init-priority-attr.cpp b/clang/test/CodeGenCXX/init-priority-attr.cpp --- a/clang/test/CodeGenCXX/init-priority-attr.cpp +++ b/clang/test/CodeGenCXX/init-priority-attr.cpp @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 %s -triple x86_64-apple-darwin10 -O2 -emit-llvm -o - | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args %s -triple x86_64-apple-darwin10 -O2 -emit-llvm -o - | FileCheck %s // PR11480 void foo(int); diff --git a/clang/test/CodeGenCXX/initializer-list-ctor-order.cpp b/clang/test/CodeGenCXX/initializer-list-ctor-order.cpp --- a/clang/test/CodeGenCXX/initializer-list-ctor-order.cpp +++ b/clang/test/CodeGenCXX/initializer-list-ctor-order.cpp @@ -16,14 +16,14 @@ } // CHECK-ITANIUM-LABEL: define void @_Z3foov // CHECK-MS-LABEL: define dso_local void @"?foo@@YAXXZ" -// CHECK: call i32 @f() -// CHECK: call i32 @g() +// CHECK: call frozen i32 @f() +// CHECK: call frozen i32 @g() struct B : A { B(); }; B::B() : A{f(), g()} {} // CHECK-ITANIUM-LABEL: define void @_ZN1BC2Ev -// CHECK-MS-LABEL: define dso_local x86_thiscallcc %struct.B* @"??0B@@QAE@XZ" -// CHECK: call i32 @f() -// CHECK: call i32 @g() +// CHECK-MS-LABEL: define dso_local x86_thiscallcc frozen %struct.B* @"??0B@@QAE@XZ" +// CHECK: call frozen i32 @f() +// CHECK: call frozen i32 @g() diff --git a/clang/test/CodeGenCXX/inline-functions.cpp b/clang/test/CodeGenCXX/inline-functions.cpp --- a/clang/test/CodeGenCXX/inline-functions.cpp +++ b/clang/test/CodeGenCXX/inline-functions.cpp @@ -101,7 +101,7 @@ void InlineThenExternThenDefFn() {} // NORMAL-NOT: _Z17ExternAndConstexprFnv -// MSVCCOMPAT-LABEL: define weak_odr dso_local i32 @"?ExternAndConstexprFn@@YAHXZ" +// MSVCCOMPAT-LABEL: define weak_odr dso_local frozen i32 @"?ExternAndConstexprFn@@YAHXZ" extern constexpr int ExternAndConstexprFn() { return 0; } // NORMAL-NOT: _Z11ConstexprFnv diff --git a/clang/test/CodeGenCXX/lambda-expressions-inside-auto-functions.cpp b/clang/test/CodeGenCXX/lambda-expressions-inside-auto-functions.cpp --- a/clang/test/CodeGenCXX/lambda-expressions-inside-auto-functions.cpp +++ b/clang/test/CodeGenCXX/lambda-expressions-inside-auto-functions.cpp @@ -3,7 +3,7 @@ // CHECK-LABEL: define void @_ZN19non_inline_function3fooEv // CHECK-LABEL: define internal void @"_ZZN19non_inline_function3fooEvENK3$_0clEi"(%class.anon -// CHECK-LABEL: define internal signext i8 @"_ZZZN19non_inline_function3fooEvENK3$_0clEiENKUlcE_clEc"(%class.anon +// CHECK-LABEL: define internal frozen signext i8 @"_ZZZN19non_inline_function3fooEvENK3$_0clEiENKUlcE_clEc"(%class.anon // CHECK-LABEL: define linkonce_odr void @_ZN19non_inline_function4foo2IiEEDav() namespace non_inline_function { auto foo() { @@ -24,9 +24,9 @@ auto use = foo2(); } -//CHECK-LABEL: define linkonce_odr void @_ZN22inline_member_function1X3fooEv(%"struct.inline_member_function::X"* %this) +//CHECK-LABEL: define linkonce_odr void @_ZN22inline_member_function1X3fooEv(%"struct.inline_member_function::X"* frozen %this) //CHECK-LABEL: define linkonce_odr void @_ZZN22inline_member_function1X3fooEvENKUliE_clEi(%class.anon -//CHECK-LABEL: define linkonce_odr signext i8 @_ZZZN22inline_member_function1X3fooEvENKUliE_clEiENKUlcE_clEc(%class.anon +//CHECK-LABEL: define linkonce_odr frozen signext i8 @_ZZZN22inline_member_function1X3fooEvENKUliE_clEiENKUlcE_clEc(%class.anon namespace inline_member_function { struct X { @@ -53,19 +53,19 @@ template auto foo() { return [](const T&) { return 42; }; } }; -//CHECK_ABIV6: define linkonce_odr i32 @_ZZN22inline_member_function1AIdE14default_lambdaIdEEDavENKUlRKdE_clES5_(%class.anon -//CHECK_ABI_LATEST: define linkonce_odr i32 @_ZZN22inline_member_function1AIdE14default_lambdaIdEEDavENKUlRKdE_clES4_(%class.anon +//CHECK_ABIV6: define linkonce_odr frozen i32 @_ZZN22inline_member_function1AIdE14default_lambdaIdEEDavENKUlRKdE_clES5_(%class.anon +//CHECK_ABI_LATEST: define linkonce_odr frozen i32 @_ZZN22inline_member_function1AIdE14default_lambdaIdEEDavENKUlRKdE_clES4_(%class.anon int run2 = A{}.func()(3.14); -//CHECK_ABIV6: define linkonce_odr i32 @_ZZN22inline_member_function1AIcE14default_lambdaIcEEDavENKUlRKcE_clES5_(%class.anon -//CHECK_ABI_LATEST: define linkonce_odr i32 @_ZZN22inline_member_function1AIcE14default_lambdaIcEEDavENKUlRKcE_clES4_(%class.anon +//CHECK_ABIV6: define linkonce_odr frozen i32 @_ZZN22inline_member_function1AIcE14default_lambdaIcEEDavENKUlRKcE_clES5_(%class.anon +//CHECK_ABI_LATEST: define linkonce_odr frozen i32 @_ZZN22inline_member_function1AIcE14default_lambdaIcEEDavENKUlRKcE_clES4_(%class.anon int run3 = A{}.func()('a'); } // end inline_member_function // CHECK-LABEL: define linkonce_odr void @_ZN15inline_function3fooEv() // CHECK: define linkonce_odr void @_ZZN15inline_function3fooEvENKUliE_clEi(%class.anon -// CHECK: define linkonce_odr signext i8 @_ZZZN15inline_function3fooEvENKUliE_clEiENKUlcE_clEc(%class.anon +// CHECK: define linkonce_odr frozen signext i8 @_ZZZN15inline_function3fooEvENKUliE_clEiENKUlcE_clEc(%class.anon namespace inline_function { inline auto foo() { auto L = [](int a) { diff --git a/clang/test/CodeGenCXX/lambda-expressions-nested-linkage.cpp b/clang/test/CodeGenCXX/lambda-expressions-nested-linkage.cpp --- a/clang/test/CodeGenCXX/lambda-expressions-nested-linkage.cpp +++ b/clang/test/CodeGenCXX/lambda-expressions-nested-linkage.cpp @@ -3,7 +3,7 @@ // CHECK-LABEL: define void @_ZN19non_inline_function3fooEv() // CHECK-LABEL: define internal void @"_ZZN19non_inline_function3fooEvENK3$_0clEi"(%class.anon -// CHECK-LABEL: define internal signext i8 @"_ZZZN19non_inline_function3fooEvENK3$_0clEiENKUlcE_clEc"(%class.anon +// CHECK-LABEL: define internal frozen signext i8 @"_ZZZN19non_inline_function3fooEvENK3$_0clEiENKUlcE_clEc"(%class.anon namespace non_inline_function { void foo() { auto L = [](int a) { @@ -30,17 +30,17 @@ L l; } -// CHECK-LABEL: define linkonce_odr i32 @_ZN15inline_function3fooEv +// CHECK-LABEL: define linkonce_odr frozen i32 @_ZN15inline_function3fooEv // CHECK-LABEL: define linkonce_odr void @_ZNK12non_template1L1tMUliE_clEi(%class.anon -// CHECK-LABEL: define linkonce_odr i32 @_ZZNK12non_template1L1tMUliE_clEiENKUliE_clEi(%class.anon +// CHECK-LABEL: define linkonce_odr frozen i32 @_ZZNK12non_template1L1tMUliE_clEiENKUliE_clEi(%class.anon // CHECK-LABEL: define linkonce_odr void @_ZNK32lambdas_in_NSDMIs_template_class1LIiEUliE_clEi(%class.anon -// CHECK-LABEL: define linkonce_odr i32 @_ZZNK32lambdas_in_NSDMIs_template_class1LIiEUliE_clEiENKUliE_clEi(%class.anon +// CHECK-LABEL: define linkonce_odr frozen i32 @_ZZNK32lambdas_in_NSDMIs_template_class1LIiEUliE_clEiENKUliE_clEi(%class.anon // CHECK-LABEL: define linkonce_odr void @_ZZN15inline_function3fooEvENKUliE_clEi -// CHECK-LABEL: define linkonce_odr signext i8 @_ZZZN15inline_function3fooEvENKUliE_clEiENKUlcE_clEc +// CHECK-LABEL: define linkonce_odr frozen signext i8 @_ZZZN15inline_function3fooEvENKUliE_clEiENKUlcE_clEc namespace inline_function { inline int foo() { auto L = [](int a) { diff --git a/clang/test/CodeGenCXX/lambda-expressions.cpp b/clang/test/CodeGenCXX/lambda-expressions.cpp --- a/clang/test/CodeGenCXX/lambda-expressions.cpp +++ b/clang/test/CodeGenCXX/lambda-expressions.cpp @@ -10,7 +10,7 @@ // CHECK: @cvar = global extern "C" auto cvar = []{}; -// CHECK-LABEL: define i32 @_Z9ARBSizeOfi(i32 +// CHECK-LABEL: define frozen i32 @_Z9ARBSizeOfi(i32 int ARBSizeOf(int n) { typedef double(T)[8][n]; using TT = double[8][n]; @@ -25,30 +25,30 @@ }(); } -// CHECK-LABEL: define internal i32 @"_ZZ9ARBSizeOfiENK3$_0clEv" +// CHECK-LABEL: define internal frozen i32 @"_ZZ9ARBSizeOfiENK3$_0clEv" int a() { return []{ return 1; }(); } -// CHECK-LABEL: define i32 @_Z1av -// CHECK: call i32 @"_ZZ1avENK3$_1clEv" -// CHECK-LABEL: define internal i32 @"_ZZ1avENK3$_1clEv" +// CHECK-LABEL: define frozen i32 @_Z1av +// CHECK: call frozen i32 @"_ZZ1avENK3$_1clEv" +// CHECK-LABEL: define internal frozen i32 @"_ZZ1avENK3$_1clEv" // CHECK: ret i32 1 int b(int x) { return [x]{return x;}(); } -// CHECK-LABEL: define i32 @_Z1bi +// CHECK-LABEL: define frozen i32 @_Z1bi // CHECK: store i32 // CHECK: load i32, i32* // CHECK: store i32 -// CHECK: call i32 @"_ZZ1biENK3$_2clEv" -// CHECK-LABEL: define internal i32 @"_ZZ1biENK3$_2clEv" +// CHECK: call frozen i32 @"_ZZ1biENK3$_2clEv" +// CHECK-LABEL: define internal frozen i32 @"_ZZ1biENK3$_2clEv" // CHECK: load i32, i32* // CHECK: ret i32 int c(int x) { return [&x]{return x;}(); } -// CHECK-LABEL: define i32 @_Z1ci +// CHECK-LABEL: define frozen i32 @_Z1ci // CHECK: store i32 // CHECK: store i32* -// CHECK: call i32 @"_ZZ1ciENK3$_3clEv" -// CHECK-LABEL: define internal i32 @"_ZZ1ciENK3$_3clEv" +// CHECK: call frozen i32 @"_ZZ1ciENK3$_3clEv" +// CHECK-LABEL: define internal frozen i32 @"_ZZ1ciENK3$_3clEv" // CHECK: load i32*, i32** // CHECK: load i32, i32* // CHECK: ret i32 @@ -56,28 +56,28 @@ struct D { D(); D(const D&); int x; }; int d(int x) { D y[10]; return [x,y] { return y[x].x; }(); } -// CHECK-LABEL: define i32 @_Z1di +// CHECK-LABEL: define frozen i32 @_Z1di // CHECK: call void @_ZN1DC1Ev // CHECK: br label // CHECK: call void @_ZN1DC1ERKS_ // CHECK: icmp eq i64 %{{.*}}, 10 // CHECK: br i1 -// CHECK: call i32 @"_ZZ1diENK3$_4clEv" -// CHECK-LABEL: define internal i32 @"_ZZ1diENK3$_4clEv" +// CHECK: call frozen i32 @"_ZZ1diENK3$_4clEv" +// CHECK-LABEL: define internal frozen i32 @"_ZZ1diENK3$_4clEv" // CHECK: load i32, i32* // CHECK: load i32, i32* // CHECK: ret i32 struct E { E(); E(const E&); ~E(); int x; }; int e(E a, E b, bool cond) { return [a,b,cond](){ return (cond ? a : b).x; }(); } -// CHECK-LABEL: define i32 @_Z1e1ES_b +// CHECK-LABEL: define frozen i32 @_Z1e1ES_b // CHECK: call void @_ZN1EC1ERKS_ // CHECK: invoke void @_ZN1EC1ERKS_ -// CHECK: invoke i32 @"_ZZ1e1ES_bENK3$_5clEv" +// CHECK: invoke frozen i32 @"_ZZ1e1ES_bENK3$_5clEv" // CHECK: call void @"_ZZ1e1ES_bEN3$_5D1Ev" // CHECK: call void @"_ZZ1e1ES_bEN3$_5D1Ev" -// CHECK-LABEL: define internal i32 @"_ZZ1e1ES_bENK3$_5clEv" +// CHECK-LABEL: define internal frozen i32 @"_ZZ1e1ES_bENK3$_5clEv" // CHECK: trunc i8 // CHECK: load i32, i32* // CHECK: ret i32 @@ -93,7 +93,7 @@ static int k; int g() { int &r = k; - // CHECK-LABEL: define internal i32 @"_ZZ1gvENK3$_7clEv"( + // CHECK-LABEL: define internal frozen i32 @"_ZZ1gvENK3$_7clEv"( // CHECK-NOT: } // CHECK: load i32, i32* @_ZL1k, return [] { return r; } (); @@ -110,7 +110,7 @@ }(); } -// CHECK-LABEL: define internal i32* @"_ZZ11PR22071_funvENK3$_9clEv" +// CHECK-LABEL: define internal frozen i32* @"_ZZ11PR22071_funvENK3$_9clEv" // CHECK: ret i32* @PR22071_var int PR22071_var; int *PR22071_fun() { @@ -178,7 +178,7 @@ // CHECK: icmp eq %[[A]]* %[[DST_0_0]], %[[DST_I_J]] // CHECK: %[[T0:.*]] = phi %[[A]]* // CHECK: %[[T1:.*]] = getelementptr inbounds %[[A]], %[[A]]* %[[T0]], i64 -1 - // CHECK: call void @_ZN7pr285951AD1Ev(%[[A]]* %[[T1]]) + // CHECK: call void @_ZN7pr285951AD1Ev(%[[A]]* frozen %[[T1]]) // CHECK: icmp eq %[[A]]* %[[T1]], %[[DST_0_0]] (void) [array]{}; } @@ -186,16 +186,16 @@ // CHECK-LABEL: define internal void @"_ZZ1e1ES_bEN3$_5D2Ev" -// CHECK-LABEL: define internal i32 @"_ZZ1fvEN3$_68__invokeEii" +// CHECK-LABEL: define internal frozen i32 @"_ZZ1fvEN3$_68__invokeEii" // CHECK: store i32 // CHECK-NEXT: store i32 // CHECK-NEXT: load i32, i32* // CHECK-NEXT: load i32, i32* -// CHECK-NEXT: call i32 @"_ZZ1fvENK3$_6clEii" +// CHECK-NEXT: call frozen i32 @"_ZZ1fvENK3$_6clEii" // CHECK-NEXT: ret i32 // CHECK-LABEL: define internal void @"_ZZ1hvEN4$_118__invokeEv"(%struct.A* noalias sret align 1 %agg.result) {{.*}} { -// CHECK: call void @"_ZZ1hvENK4$_11clEv"(%struct.A* sret align 1 %agg.result, +// CHECK: call void @"_ZZ1hvENK4$_11clEv"(%struct.A* sret align 1 %agg.result // CHECK-NEXT: ret void struct A { ~A(); }; void h() { diff --git a/clang/test/CodeGenCXX/lifetime-sanitizer.cpp b/clang/test/CodeGenCXX/lifetime-sanitizer.cpp --- a/clang/test/CodeGenCXX/lifetime-sanitizer.cpp +++ b/clang/test/CodeGenCXX/lifetime-sanitizer.cpp @@ -24,7 +24,7 @@ extern "C" void a(), b(), c(), d(); -// CHECK: define dso_local void @_Z3fooi(i32 %[[N:[^)]+]]) +// CHECK: define dso_local void @_Z3fooi(i32 frozen %[[N:[^)]+]]) void foo(int n) { // CHECK: store i32 %[[N]], i32* %[[NADDR:[^,]+]] // CHECK-LABEL: call void @a() diff --git a/clang/test/CodeGenCXX/linkage.cpp b/clang/test/CodeGenCXX/linkage.cpp --- a/clang/test/CodeGenCXX/linkage.cpp +++ b/clang/test/CodeGenCXX/linkage.cpp @@ -212,7 +212,7 @@ namespace test17 { // CHECK-DAG: @_ZZN6test173fooILi42EEEPivE3bar = linkonce_odr - // CHECK-DAG: define weak_odr i32* @_ZN6test173fooILi42EEEPiv( + // CHECK-DAG: define weak_odr frozen i32* @_ZN6test173fooILi42EEEPiv( template int *foo() { static int bar; diff --git a/clang/test/CodeGenCXX/mangle-abi-tag.cpp b/clang/test/CodeGenCXX/mangle-abi-tag.cpp --- a/clang/test/CodeGenCXX/mangle-abi-tag.cpp +++ b/clang/test/CodeGenCXX/mangle-abi-tag.cpp @@ -145,7 +145,7 @@ f13(); } // f13()::L::foo[abi:C][abi:D]() -// CHECK-DAG: define linkonce_odr {{(dso_local )?}}%struct.E* @_ZZ3f13vEN1L3fooB1CB1DEv( +// CHECK-DAG: define linkonce_odr {{(dso_local )?}}frozen %struct.E* @_ZZ3f13vEN1L3fooB1CB1DEv( // f13()::L::foo[abi:C][abi:D]()::a[abi:A][abi:B] // CHECK-DAG: @_ZZZ3f13vEN1L3fooB1CB1DEvE1aB1AB1B = diff --git a/clang/test/CodeGenCXX/mangle-exprs.cpp b/clang/test/CodeGenCXX/mangle-exprs.cpp --- a/clang/test/CodeGenCXX/mangle-exprs.cpp +++ b/clang/test/CodeGenCXX/mangle-exprs.cpp @@ -112,10 +112,10 @@ short foo(short); int foo(int); - // CHECK-LABEL: define linkonce_odr signext i16 @_ZN5test11aIsEEDTcl3foocvT__EEES1_( + // CHECK-LABEL: define linkonce_odr frozen signext i16 @_ZN5test11aIsEEDTcl3foocvT__EEES1_( template auto a(T t) -> decltype(foo(T())) { return foo(t); } - // CHECK-LABEL: define linkonce_odr signext i16 @_ZN5test11bIsEEDTcp3foocvT__EEES1_( + // CHECK-LABEL: define linkonce_odr frozen signext i16 @_ZN5test11bIsEEDTcp3foocvT__EEES1_( template auto b(T t) -> decltype((foo)(T())) { return (foo)(t); } void test(short s) { @@ -147,7 +147,7 @@ void instantiate() { // CHECK: call void @_ZN5test21aIPFfvEEEvT_DTclfL0p_EE( a(foo, 0.0f); - // CHECK: call float @_ZN5test21bIPFfvEEEDTclfp_EET_( + // CHECK: call frozen float @_ZN5test21bIPFfvEEEDTclfp_EET_( (void) b(foo); // CHECK: call void @_ZN5test21cIPFfvEEEvT_PFvDTclfL1p_EEE( c(foo, bar); @@ -363,7 +363,7 @@ template auto bar() const -> decltype(foo()) { return 0; } }; - // CHECK-LABEL: define weak_odr i32 @_ZNK5test81XIiE3barIiEEDTcl3fooIT_EEEv + // CHECK-LABEL: define weak_odr frozen i32 @_ZNK5test81XIiE3barIiEEDTcl3fooIT_EEEv template int X::bar() const; } diff --git a/clang/test/CodeGenCXX/mangle-extern-local.cpp b/clang/test/CodeGenCXX/mangle-extern-local.cpp --- a/clang/test/CodeGenCXX/mangle-extern-local.cpp +++ b/clang/test/CodeGenCXX/mangle-extern-local.cpp @@ -6,10 +6,10 @@ // CHECK: @_ZN1N4var3E = external global i32 // CHECK: @_ZN1N4var4E = external global i32 -// CHECK: declare i32 @_Z5func1v() -// CHECK: declare i32 @_ZN1N5func2Ev() -// CHECK: declare i32 @func4() -// CHECK: declare i32 @_ZN1N5func3Ev() +// CHECK: declare frozen i32 @_Z5func1v() +// CHECK: declare frozen i32 @_ZN1N5func2Ev() +// CHECK: declare frozen i32 @func4() +// CHECK: declare frozen i32 @_ZN1N5func3Ev() int f1() { extern int var1, func1(); diff --git a/clang/test/CodeGenCXX/mangle-lambdas.cpp b/clang/test/CodeGenCXX/mangle-lambdas.cpp --- a/clang/test/CodeGenCXX/mangle-lambdas.cpp +++ b/clang/test/CodeGenCXX/mangle-lambdas.cpp @@ -2,21 +2,21 @@ // CHECK-LABEL: define linkonce_odr void @_Z11inline_funci inline void inline_func(int n) { - // CHECK: call i32 @_ZZ11inline_funciENKUlvE_clEv + // CHECK: call frozen i32 @_ZZ11inline_funciENKUlvE_clEv int i = []{ return 1; }(); - // CHECK: call i32 @_ZZ11inline_funciENKUlvE0_clEv + // CHECK: call frozen i32 @_ZZ11inline_funciENKUlvE0_clEv int j = [=] { return n + i; }(); - // CHECK: call double @_ZZ11inline_funciENKUlvE1_clEv + // CHECK: call frozen double @_ZZ11inline_funciENKUlvE1_clEv int k = [=] () -> double { return n + i; }(); - // CHECK: call i32 @_ZZ11inline_funciENKUliE_clEi + // CHECK: call frozen i32 @_ZZ11inline_funciENKUliE_clEi int l = [=] (int x) -> int { return x + i; }(n); int inner(int i = []{ return 17; }()); - // CHECK: call i32 @_ZZ11inline_funciENKUlvE2_clEv - // CHECK-NEXT: call i32 @_Z5inneri + // CHECK: call frozen i32 @_ZZ11inline_funciENKUlvE2_clEv + // CHECK-NEXT: call frozen i32 @_Z5inneri inner(); // CHECK-NEXT: ret void @@ -26,7 +26,7 @@ inline_func(17); } -// CHECK-LABEL: define linkonce_odr i32* @_ZNK10inline_varMUlvE_clEv( +// CHECK-LABEL: define linkonce_odr frozen i32* @_ZNK10inline_varMUlvE_clEv( // CHECK: @_ZZNK10inline_varMUlvE_clEvE1n inline auto inline_var = [] { static int n = 5; @@ -35,7 +35,7 @@ int *use_inline_var = inline_var(); -// CHECK-LABEL: define linkonce_odr i32* @_ZNK12var_templateIiEMUlvE_clEv( +// CHECK-LABEL: define linkonce_odr frozen i32* @_ZNK12var_templateIiEMUlvE_clEv( // CHECK: @_ZZNK12var_templateIiEMUlvE_clEvE1n template auto var_template = [] { static int n = 9; @@ -56,10 +56,10 @@ // CHECK-LABEL: define void @_Z6test_S1S void test_S(S s) { - // CHECK: call i32 @_ZZN1S1fEiiEd0_NKUlvE_clEv - // CHECK-NEXT: call i32 @_ZZN1S1fEiiEd0_NKUlvE0_clEv + // CHECK: call frozen i32 @_ZZN1S1fEiiEd0_NKUlvE_clEv + // CHECK-NEXT: call frozen i32 @_ZZN1S1fEiiEd0_NKUlvE0_clEv // CHECK-NEXT: add nsw i32 - // CHECK-NEXT: call i32 @_ZZN1S1fEiiEd_NKUlvE_clEv + // CHECK-NEXT: call frozen i32 @_ZZN1S1fEiiEd_NKUlvE_clEv // CHECK-NEXT: call void @_ZN1S1fEii s.f(); @@ -67,8 +67,8 @@ // the lambdas in the default arguments of g() won't be seen by // multiple translation units. We check them mainly to ensure that they don't // get the special mangling for lambdas in in-class default arguments. - // CHECK: call i32 @"_ZNK1S3$_0clEv" - // CHECK-NEXT: call i32 @"_ZNK1S3$_1clEv" + // CHECK: call frozen i32 @"_ZNK1S3$_0clEv" + // CHECK-NEXT: call frozen i32 @"_ZNK1S3$_1clEv" // CHECK-NEXT: call void @_ZN1S1gEi s.g(); @@ -76,15 +76,15 @@ } // Check the linkage of the lambda call operators used in test_S. -// CHECK-LABEL: define linkonce_odr i32 @_ZZN1S1fEiiEd0_NKUlvE_clEv +// CHECK-LABEL: define linkonce_odr frozen i32 @_ZZN1S1fEiiEd0_NKUlvE_clEv // CHECK: ret i32 1 -// CHECK-LABEL: define linkonce_odr i32 @_ZZN1S1fEiiEd0_NKUlvE0_clEv +// CHECK-LABEL: define linkonce_odr frozen i32 @_ZZN1S1fEiiEd0_NKUlvE0_clEv // CHECK: ret i32 2 -// CHECK-LABEL: define linkonce_odr i32 @_ZZN1S1fEiiEd_NKUlvE_clEv +// CHECK-LABEL: define linkonce_odr frozen i32 @_ZZN1S1fEiiEd_NKUlvE_clEv // CHECK: ret i32 3 -// CHECK-LABEL: define internal i32 @"_ZNK1S3$_0clEv" +// CHECK-LABEL: define internal frozen i32 @"_ZNK1S3$_0clEv" // CHECK: ret i32 1 -// CHECK-LABEL: define internal i32 @"_ZNK1S3$_1clEv" +// CHECK-LABEL: define internal frozen i32 @"_ZNK1S3$_1clEv" // CHECK: ret i32 2 template @@ -96,10 +96,10 @@ // CHECK-LABEL: define void @_Z7test_ST2STIdE void test_ST(ST st) { - // CHECK: call double @_ZZN2STIdE1fEddEd0_NKUlvE_clEv - // CHECK-NEXT: call double @_ZZN2STIdE1fEddEd0_NKUlvE0_clEv + // CHECK: call frozen double @_ZZN2STIdE1fEddEd0_NKUlvE_clEv + // CHECK-NEXT: call frozen double @_ZZN2STIdE1fEddEd0_NKUlvE0_clEv // CHECK-NEXT: fadd double - // CHECK-NEXT: call double @_ZZN2STIdE1fEddEd_NKUlvE_clEv + // CHECK-NEXT: call frozen double @_ZZN2STIdE1fEddEd_NKUlvE_clEv // CHECK-NEXT: call void @_ZN2STIdE1fEdd st.f(); @@ -107,11 +107,11 @@ } // Check the linkage of the lambda call operators used in test_ST. -// CHECK-LABEL: define linkonce_odr double @_ZZN2STIdE1fEddEd0_NKUlvE_clEv +// CHECK-LABEL: define linkonce_odr frozen double @_ZZN2STIdE1fEddEd0_NKUlvE_clEv // CHECK: ret double 1 -// CHECK-LABEL: define linkonce_odr double @_ZZN2STIdE1fEddEd0_NKUlvE0_clEv +// CHECK-LABEL: define linkonce_odr frozen double @_ZZN2STIdE1fEddEd0_NKUlvE0_clEv // CHECK: ret double 2 -// CHECK-LABEL: define linkonce_odr double @_ZZN2STIdE1fEddEd_NKUlvE_clEv +// CHECK-LABEL: define linkonce_odr frozen double @_ZZN2STIdE1fEddEd_NKUlvE_clEv // CHECK: ret double 3 template @@ -137,34 +137,34 @@ int (*StaticMembers::f)() = []{return 5;}; // CHECK-LABEL: define internal void @__cxx_global_var_init -// CHECK: call i32 @_ZNK13StaticMembersIfE1xMUlvE_clEv -// CHECK-NEXT: call i32 @_ZNK13StaticMembersIfE1xMUlvE0_clEv +// CHECK: call frozen i32 @_ZNK13StaticMembersIfE1xMUlvE_clEv +// CHECK-NEXT: call frozen i32 @_ZNK13StaticMembersIfE1xMUlvE0_clEv // CHECK-NEXT: add nsw -// CHECK-LABEL: define linkonce_odr i32 @_ZNK13StaticMembersIfE1xMUlvE_clEv +// CHECK-LABEL: define linkonce_odr frozen i32 @_ZNK13StaticMembersIfE1xMUlvE_clEv // CHECK: ret i32 1 -// CHECK-LABEL: define linkonce_odr i32 @_ZNK13StaticMembersIfE1xMUlvE0_clEv +// CHECK-LABEL: define linkonce_odr frozen i32 @_ZNK13StaticMembersIfE1xMUlvE0_clEv // CHECK: ret i32 2 template float StaticMembers::x; // CHECK-LABEL: define internal void @__cxx_global_var_init -// CHECK: call i32 @_ZNK13StaticMembersIfE1yMUlvE_clEv -// CHECK-LABEL: define linkonce_odr i32 @_ZNK13StaticMembersIfE1yMUlvE_clEv +// CHECK: call frozen i32 @_ZNK13StaticMembersIfE1yMUlvE_clEv +// CHECK-LABEL: define linkonce_odr frozen i32 @_ZNK13StaticMembersIfE1yMUlvE_clEv // CHECK: ret i32 3 template float StaticMembers::y; // CHECK-LABEL: define internal void @__cxx_global_var_init -// CHECK: call i32 @_Z13accept_lambdaIN13StaticMembersIfE1zMUlvE_EEiT_ -// CHECK: declare i32 @_Z13accept_lambdaIN13StaticMembersIfE1zMUlvE_EEiT_() +// CHECK: call frozen i32 @_Z13accept_lambdaIN13StaticMembersIfE1zMUlvE_EEiT_ +// CHECK: declare frozen i32 @_Z13accept_lambdaIN13StaticMembersIfE1zMUlvE_EEiT_() template float StaticMembers::z; // CHECK-LABEL: define internal void @__cxx_global_var_init // CHECK: call {{.*}} @_ZNK13StaticMembersIfE1fMUlvE_cvPFivEEv -// CHECK-LABEL: define linkonce_odr i32 ()* @_ZNK13StaticMembersIfE1fMUlvE_cvPFivEEv +// CHECK-LABEL: define linkonce_odr frozen i32 ()* @_ZNK13StaticMembersIfE1fMUlvE_cvPFivEEv template int (*StaticMembers::f)(); // CHECK-LABEL: define internal void @__cxx_global_var_init -// CHECK: call i32 @"_ZNK13StaticMembersIdE3$_2clEv" -// CHECK-LABEL: define internal i32 @"_ZNK13StaticMembersIdE3$_2clEv" +// CHECK: call frozen i32 @"_ZNK13StaticMembersIdE3$_2clEv" +// CHECK-LABEL: define internal frozen i32 @"_ZNK13StaticMembersIdE3$_2clEv" // CHECK: ret i32 42 template<> double StaticMembers::z = []{return 42; }(); @@ -173,7 +173,7 @@ // CHECK-LABEL: define void @_Z17use_func_templatev() void use_func_template() { - // CHECK: call i32 @"_ZZ13func_templateIiEvT_ENK3$_3clEv" + // CHECK: call frozen i32 @"_ZZ13func_templateIiEvT_ENK3$_3clEv" func_template(); } @@ -193,9 +193,9 @@ void B::h() { f(); j(); } } -// CHECK-LABEL: define linkonce_odr nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %"struct.PR12123::A"* @_ZZN7PR121231B1fERKSt9type_infoEd_NKUlvE_clEv -// CHECK-LABEL: define linkonce_odr nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %"struct.PR12123::A"* @_ZZN7PR121231B1jEbEd_NKUlvE_clEv -// CHECK-LABEL: define linkonce_odr nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %"struct.PR12123::C"* @_ZZN7PR121231B1jEbEd_NKUlvE0_clEv +// CHECK-LABEL: define linkonce_odr frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %"struct.PR12123::A"* @_ZZN7PR121231B1fERKSt9type_infoEd_NKUlvE_clEv +// CHECK-LABEL: define linkonce_odr frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %"struct.PR12123::A"* @_ZZN7PR121231B1jEbEd_NKUlvE_clEv +// CHECK-LABEL: define linkonce_odr frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %"struct.PR12123::C"* @_ZZN7PR121231B1jEbEd_NKUlvE0_clEv // CHECK-LABEL: define {{.*}} @_Z{{[0-9]*}}testVarargsLambdaNumberingv( inline int testVarargsLambdaNumbering() { @@ -208,31 +208,31 @@ int k = testVarargsLambdaNumbering(); // Check linkage of the various lambdas. -// CHECK-LABEL: define linkonce_odr i32 @_ZZ11inline_funciENKUlvE_clEv +// CHECK-LABEL: define linkonce_odr frozen i32 @_ZZ11inline_funciENKUlvE_clEv // CHECK: ret i32 1 -// CHECK-LABEL: define linkonce_odr i32 @_ZZ11inline_funciENKUlvE0_clEv +// CHECK-LABEL: define linkonce_odr frozen i32 @_ZZ11inline_funciENKUlvE0_clEv // CHECK: ret i32 -// CHECK-LABEL: define linkonce_odr double @_ZZ11inline_funciENKUlvE1_clEv +// CHECK-LABEL: define linkonce_odr frozen double @_ZZ11inline_funciENKUlvE1_clEv // CHECK: ret double -// CHECK-LABEL: define linkonce_odr i32 @_ZZ11inline_funciENKUliE_clEi +// CHECK-LABEL: define linkonce_odr frozen i32 @_ZZ11inline_funciENKUliE_clEi // CHECK: ret i32 -// CHECK-LABEL: define linkonce_odr i32 @_ZZ11inline_funciENKUlvE2_clEv +// CHECK-LABEL: define linkonce_odr frozen i32 @_ZZ11inline_funciENKUlvE2_clEv // CHECK: ret i32 17 // CHECK-LABEL: define linkonce_odr void @_ZN7MembersC2Ev -// CHECK: call i32 @_ZNK7Members1xMUlvE_clEv -// CHECK-NEXT: call i32 @_ZNK7Members1xMUlvE0_clE +// CHECK: call frozen i32 @_ZNK7Members1xMUlvE_clEv +// CHECK-NEXT: call frozen i32 @_ZNK7Members1xMUlvE0_clE // CHECK-NEXT: add nsw i32 -// CHECK: call i32 @_ZNK7Members1yMUlvE_clEv +// CHECK: call frozen i32 @_ZNK7Members1yMUlvE_clEv // CHECK: ret void // Check the linkage of the lambdas used in test_Members. -// CHECK-LABEL: define linkonce_odr i32 @_ZNK7Members1xMUlvE_clEv +// CHECK-LABEL: define linkonce_odr frozen i32 @_ZNK7Members1xMUlvE_clEv // CHECK: ret i32 1 -// CHECK-LABEL: define linkonce_odr i32 @_ZNK7Members1xMUlvE0_clEv +// CHECK-LABEL: define linkonce_odr frozen i32 @_ZNK7Members1xMUlvE0_clEv // CHECK: ret i32 2 -// CHECK-LABEL: define linkonce_odr i32 @_ZNK7Members1yMUlvE_clEv +// CHECK-LABEL: define linkonce_odr frozen i32 @_ZNK7Members1yMUlvE_clEv // CHECK: ret i32 3 // CHECK-LABEL: define linkonce_odr void @_Z1fIZZNK23TestNestedInstantiationclEvENKUlvE_clEvEUlvE_EvT_ @@ -250,7 +250,7 @@ b(1); } // CHECK-LABEL: define linkonce_odr void @_ZZN7PR128081bIiEEviENKUlvE_clEv - // CHECK-LABEL: define linkonce_odr i32 @_ZZZN7PR128081bIiEEviENKUlvE_clEvENKUlvE_clEv + // CHECK-LABEL: define linkonce_odr frozen i32 @_ZZZN7PR128081bIiEEviENKUlvE_clEvENKUlvE_clEv } diff --git a/clang/test/CodeGenCXX/mangle-ms-cxx11.cpp b/clang/test/CodeGenCXX/mangle-ms-cxx11.cpp --- a/clang/test/CodeGenCXX/mangle-ms-cxx11.cpp +++ b/clang/test/CodeGenCXX/mangle-ms-cxx11.cpp @@ -323,13 +323,13 @@ namespace PR31197 { struct A { - // CHECK-DAG: define linkonce_odr dso_local x86_thiscallcc i32* @"??R@x@A@PR31197@@QBE@XZ"( + // CHECK-DAG: define linkonce_odr dso_local x86_thiscallcc frozen i32* @"??R@x@A@PR31197@@QBE@XZ"( int *x = []() { static int white; // CHECK-DAG: @"?white@?1???R@x@A@PR31197@@QBE@XZ@4HA" return &white; }(); - // CHECK-DAG: define linkonce_odr dso_local x86_thiscallcc i32* @"??R@y@A@PR31197@@QBE@XZ"( + // CHECK-DAG: define linkonce_odr dso_local x86_thiscallcc frozen i32* @"??R@y@A@PR31197@@QBE@XZ"( int *y = []() { static int black; // CHECK-DAG: @"?black@?1???R@y@A@PR31197@@QBE@XZ@4HA" diff --git a/clang/test/CodeGenCXX/mangle-ms-templates-memptrs-2.cpp b/clang/test/CodeGenCXX/mangle-ms-templates-memptrs-2.cpp --- a/clang/test/CodeGenCXX/mangle-ms-templates-memptrs-2.cpp +++ b/clang/test/CodeGenCXX/mangle-ms-templates-memptrs-2.cpp @@ -57,4 +57,4 @@ // Test that we mangle in the vbptr offset, which is 12 here. // -// CHECK: define weak_odr dso_local x86_thiscallcc %struct.ClassTemplate* @"??0?$ClassTemplate@$J??_9MostGeneral@@$BA@AEA@M@3@@QAE@XZ" +// CHECK: define weak_odr dso_local x86_thiscallcc frozen %struct.ClassTemplate* @"??0?$ClassTemplate@$J??_9MostGeneral@@$BA@AEA@M@3@@QAE@XZ" diff --git a/clang/test/CodeGenCXX/mangle-ms-vector-types.cpp b/clang/test/CodeGenCXX/mangle-ms-vector-types.cpp --- a/clang/test/CodeGenCXX/mangle-ms-vector-types.cpp +++ b/clang/test/CodeGenCXX/mangle-ms-vector-types.cpp @@ -48,43 +48,43 @@ // CHECK: define dso_local void @"?foo64@@YAXT__m64@@@Z" __m64 rfoo64() { return __m64(); } -// CHECK: define dso_local <1 x i64> @"?rfoo64@@YA?AT__m64@@XZ" +// CHECK: define dso_local frozen <1 x i64> @"?rfoo64@@YA?AT__m64@@XZ" void foo128(__m128) {} // CHECK: define dso_local void @"?foo128@@YAXT__m128@@@Z" const __m128 rfoo128() { return __m128(); } -// CHECK: define dso_local <4 x float> @"?rfoo128@@YA?BT__m128@@XZ" +// CHECK: define dso_local frozen <4 x float> @"?rfoo128@@YA?BT__m128@@XZ" void foo128d(__m128d) {} // CHECK: define dso_local void @"?foo128d@@YAXU__m128d@@@Z" volatile __m128d rfoo128d() { return __m128d(); } -// CHECK: define dso_local <2 x double> @"?rfoo128d@@YA?CU__m128d@@XZ" +// CHECK: define dso_local frozen <2 x double> @"?rfoo128d@@YA?CU__m128d@@XZ" void foo128i(__m128i) {} // CHECK: define dso_local void @"?foo128i@@YAXT__m128i@@@Z" const volatile __m128i rfoo128i() { return __m128i(); } -// CHECK: define dso_local <2 x i64> @"?rfoo128i@@YA?DT__m128i@@XZ" +// CHECK: define dso_local frozen <2 x i64> @"?rfoo128i@@YA?DT__m128i@@XZ" void foo256(__m256) {} // CHECK: define dso_local void @"?foo256@@YAXT__m256@@@Z" __m256 rfoo256() { return __m256(); } -// CHECK: define dso_local <8 x float> @"?rfoo256@@YA?AT__m256@@XZ" +// CHECK: define dso_local frozen <8 x float> @"?rfoo256@@YA?AT__m256@@XZ" void foo256d(__m256d) {} // CHECK: define dso_local void @"?foo256d@@YAXU__m256d@@@Z" __m256d rfoo256d() { return __m256d(); } -// CHECK: define dso_local <4 x double> @"?rfoo256d@@YA?AU__m256d@@XZ" +// CHECK: define dso_local frozen <4 x double> @"?rfoo256d@@YA?AU__m256d@@XZ" void foo256i(__m256i) {} // CHECK: define dso_local void @"?foo256i@@YAXT__m256i@@@Z" __m256i rfoo256i() { return __m256i(); } -// CHECK: define dso_local <4 x i64> @"?rfoo256i@@YA?AT__m256i@@XZ" +// CHECK: define dso_local frozen <4 x i64> @"?rfoo256i@@YA?AT__m256i@@XZ" // We have a custom mangling for vector types not standardized by Intel. void foov8hi(__v8hi) {} diff --git a/clang/test/CodeGenCXX/mangle-ms.cpp b/clang/test/CodeGenCXX/mangle-ms.cpp --- a/clang/test/CodeGenCXX/mangle-ms.cpp +++ b/clang/test/CodeGenCXX/mangle-ms.cpp @@ -453,15 +453,15 @@ // void foo(void *const, __clang::__pass_object_size0); // where __clang is a top-level namespace. -// CHECK-DAG: define dso_local i32 @"?foo@PassObjectSize@@YAHQAHW4__pass_object_size0@__clang@@@Z" +// CHECK-DAG: define dso_local frozen i32 @"?foo@PassObjectSize@@YAHQAHW4__pass_object_size0@__clang@@@Z" int foo(int *const i __attribute__((pass_object_size(0)))) { return 0; } -// CHECK-DAG: define dso_local i32 @"?bar@PassObjectSize@@YAHQAHW4__pass_object_size1@__clang@@@Z" +// CHECK-DAG: define dso_local frozen i32 @"?bar@PassObjectSize@@YAHQAHW4__pass_object_size1@__clang@@@Z" int bar(int *const i __attribute__((pass_object_size(1)))) { return 0; } -// CHECK-DAG: define dso_local i32 @"?qux@PassObjectSize@@YAHQAHW4__pass_object_size1@__clang@@0W4__pass_object_size0@3@@Z" +// CHECK-DAG: define dso_local frozen i32 @"?qux@PassObjectSize@@YAHQAHW4__pass_object_size1@__clang@@0W4__pass_object_size0@3@@Z" int qux(int *const i __attribute__((pass_object_size(1))), int *const j __attribute__((pass_object_size(0)))) { return 0; } -// CHECK-DAG: define dso_local i32 @"?zot@PassObjectSize@@YAHQAHW4__pass_object_size1@__clang@@01@Z" +// CHECK-DAG: define dso_local frozen i32 @"?zot@PassObjectSize@@YAHQAHW4__pass_object_size1@__clang@@01@Z" int zot(int *const i __attribute__((pass_object_size(1))), int *const j __attribute__((pass_object_size(1)))) { return 0; } -// CHECK-DAG: define dso_local i32 @"?silly_word@PassObjectSize@@YAHQAHW4__pass_dynamic_object_size1@__clang@@@Z" +// CHECK-DAG: define dso_local frozen i32 @"?silly_word@PassObjectSize@@YAHQAHW4__pass_dynamic_object_size1@__clang@@@Z" int silly_word(int *const i __attribute__((pass_dynamic_object_size(1)))) { return 0; } } diff --git a/clang/test/CodeGenCXX/mangle-ref-qualifiers.cpp b/clang/test/CodeGenCXX/mangle-ref-qualifiers.cpp --- a/clang/test/CodeGenCXX/mangle-ref-qualifiers.cpp +++ b/clang/test/CodeGenCXX/mangle-ref-qualifiers.cpp @@ -5,11 +5,11 @@ int h() const &&; }; -// CHECK-LABEL: define i32 @_ZNR1X1fEv +// CHECK-LABEL: define frozen i32 @_ZNR1X1fEv int X::f() & { return 0; } -// CHECK-LABEL: define i32 @_ZNO1X1gEv +// CHECK-LABEL: define frozen i32 @_ZNO1X1gEv int X::g() && { return 0; } -// CHECK-LABEL: define i32 @_ZNKO1X1hEv +// CHECK-LABEL: define frozen i32 @_ZNKO1X1hEv int X::h() const && { return 0; } // CHECK-LABEL: define void @_Z1fM1XFivREMS_FivOEMS_KFivOE diff --git a/clang/test/CodeGenCXX/mangle-subst-std.cpp b/clang/test/CodeGenCXX/mangle-subst-std.cpp --- a/clang/test/CodeGenCXX/mangle-subst-std.cpp +++ b/clang/test/CodeGenCXX/mangle-subst-std.cpp @@ -16,8 +16,8 @@ namespace std { struct A { A(); }; - // CHECK-LABEL: define void @_ZNSt1AC2Ev(%"struct.std::A"* %this) unnamed_addr - // CHECK-LABEL: define void @_ZNSt1AC1Ev(%"struct.std::A"* %this) unnamed_addr + // CHECK-LABEL: define void @_ZNSt1AC2Ev(%"struct.std::A"* frozen %this) unnamed_addr + // CHECK-LABEL: define void @_ZNSt1AC1Ev(%"struct.std::A"* frozen %this) unnamed_addr A::A() { } }; diff --git a/clang/test/CodeGenCXX/mangle-this-cxx11.cpp b/clang/test/CodeGenCXX/mangle-this-cxx11.cpp --- a/clang/test/CodeGenCXX/mangle-this-cxx11.cpp +++ b/clang/test/CodeGenCXX/mangle-this-cxx11.cpp @@ -13,8 +13,8 @@ int main() { A a; - // CHECK: call i32 @_ZN1A1fIiEEDTcldtdtdefpT1b1fIT_EEEv + // CHECK: call frozen i32 @_ZN1A1fIiEEDTcldtdtdefpT1b1fIT_EEEv a.f(); - // CHECK: call i32 @_ZN1A1gIiEEDTcldtptfpT1b1fIT_EEEv + // CHECK: call frozen i32 @_ZN1A1gIiEEDTcldtptfpT1b1fIT_EEEv a.g(); } diff --git a/clang/test/CodeGenCXX/mangle-win-ccs.cpp b/clang/test/CodeGenCXX/mangle-win-ccs.cpp --- a/clang/test/CodeGenCXX/mangle-win-ccs.cpp +++ b/clang/test/CodeGenCXX/mangle-win-ccs.cpp @@ -18,23 +18,23 @@ int as_stdcall() { return func_as_ptr(f_stdcall); } int as_fastcall() { return func_as_ptr(f_fastcall); } -// CHECK: define dso_local i32 @_Z8as_cdeclv() -// CHECK: call i32 @_ZL11func_as_ptrIPFviiEEiT_(void (i32, i32)* @_Z7f_cdeclii) +// CHECK: define dso_local frozen i32 @_Z8as_cdeclv() +// CHECK: call frozen i32 @_ZL11func_as_ptrIPFviiEEiT_(void (i32, i32)* frozen @_Z7f_cdeclii) -// CHECK: define dso_local i32 @_Z10as_stdcallv() -// CHECK: call i32 @_ZL11func_as_ptrIPU7stdcallFviiEEiT_(void (i32, i32)* @"\01__Z9f_stdcallii@8") +// CHECK: define dso_local frozen i32 @_Z10as_stdcallv() +// CHECK: call frozen i32 @_ZL11func_as_ptrIPU7stdcallFviiEEiT_(void (i32, i32)* frozen @"\01__Z9f_stdcallii@8") -// CHECK: define dso_local i32 @_Z11as_fastcallv() -// CHECK: call i32 @_ZL11func_as_ptrIPU8fastcallFviiEEiT_(void (i32, i32)* @"\01@_Z10f_fastcallii@8") +// CHECK: define dso_local frozen i32 @_Z11as_fastcallv() +// CHECK: call frozen i32 @_ZL11func_as_ptrIPU8fastcallFviiEEiT_(void (i32, i32)* frozen @"\01@_Z10f_fastcallii@8") // PR40107: We should mangle thiscall here but we don't because we can't // disambiguate it from the member pointer case below where it shouldn't be // mangled. //int as_thiscall() { return func_as_ptr(f_thiscall); } -// CHECKX: define dso_local i32 @_Z11as_thiscallv() -// CHECKX: call i32 @_ZL11func_as_ptrIPU8thiscallFviiEEiT_(void (i32, i32)* @_Z10f_thiscallii) +// CHECKX: define dso_local frozen i32 @_Z11as_thiscallv() +// CHECKX: call frozen i32 @_ZL11func_as_ptrIPU8thiscallFviiEEiT_(void (i32, i32)* frozen @_Z10f_thiscallii) -// CHECK: define dso_local void @_Z11funcRefTypeRU8fastcallFviiE(void (i32, i32)* nonnull %fr) +// CHECK: define dso_local void @_Z11funcRefTypeRU8fastcallFviiE(void (i32, i32)* frozen nonnull %fr) void funcRefType(void(__attribute__((fastcall)) & fr)(int, int)) { fr(1, 2); } @@ -46,13 +46,13 @@ // CHECK: define dso_local void @_Z15memptr_thiscallP3FooMS_FvvE(%struct.Foo* {{.*}}) void memptr_thiscall(Foo *o, void (Foo::*mp)()) { (o->*mp)(); } -// CHECK: define dso_local void @_Z12memptrCCTypeR3FooMS_U8fastcallFviiE(%struct.Foo* {{.*}}, { i32, i32 }* byval{{.*}}) +// CHECK: define dso_local void @_Z12memptrCCTypeR3FooMS_U8fastcallFviiE(%struct.Foo* {{.*}}, { i32, i32 }* frozen byval{{.*}}) void memptrCCType(Foo &o, void (__attribute__((fastcall)) Foo::*mp)(int, int)) { (o.*mp)(1, 2); } -// CHECK: define dso_local i32 @_Z17useTemplateFnTypev() -// CHECK: call i32 @_ZL14templateFnTypeIU8fastcallFviiEElPT_(void (i32, i32)* @"\01@_Z10f_fastcallii@8") +// CHECK: define dso_local frozen i32 @_Z17useTemplateFnTypev() +// CHECK: call frozen i32 @_ZL14templateFnTypeIU8fastcallFviiEElPT_(void (i32, i32)* frozen @"\01@_Z10f_fastcallii@8") template static long templateFnType(Fn *fn) { return long(fn); } long useTemplateFnType() { return templateFnType(f_fastcall); } @@ -62,8 +62,8 @@ template void __attribute__((fastcall)) fnTemplate(); template <> void __attribute__((fastcall)) fnTemplate() {} -// CHECK: define weak_odr dso_local x86_fastcallcc void (i32, i32)* @"\01@_Z12fnTempReturnIsEPU8fastcallFviiEv@0"() -// CHECK: define dso_local x86_fastcallcc void (i32, i32)* @"\01@_Z12fnTempReturnIiEPU8fastcallFviiEv@0"() +// CHECK: define weak_odr dso_local x86_fastcallcc frozen void (i32, i32)* @"\01@_Z12fnTempReturnIsEPU8fastcallFviiEv@0"() +// CHECK: define dso_local x86_fastcallcc frozen void (i32, i32)* @"\01@_Z12fnTempReturnIiEPU8fastcallFviiEv@0"() typedef void (__attribute__((fastcall)) *fp_cc_t)(int, int); template fp_cc_t __attribute__((fastcall)) fnTempReturn() { return nullptr; } template fp_cc_t __attribute__((fastcall)) fnTempReturn(); diff --git a/clang/test/CodeGenCXX/mangle-win64-ccs.cpp b/clang/test/CodeGenCXX/mangle-win64-ccs.cpp --- a/clang/test/CodeGenCXX/mangle-win64-ccs.cpp +++ b/clang/test/CodeGenCXX/mangle-win64-ccs.cpp @@ -15,12 +15,12 @@ return rv; } -// CHECK-WIN: define dso_local i64 @_Z7useThemv() -// CHECK-WIN: call i64 @_Z11func_as_intIFiiEExPT_(i32 (i32)* @_Z7f_plaini) -// CHECK-WIN: call i64 @_Z11func_as_intIU8sysv_abiFiiEExPT_(i32 (i32)* @_Z9f_sysvabii) -// CHECK-WIN: call i64 @_Z11func_as_intIFiiEExPT_(i32 (i32)* @_Z7f_msabii) +// CHECK-WIN: define dso_local frozen i64 @_Z7useThemv() +// CHECK-WIN: call frozen i64 @_Z11func_as_intIFiiEExPT_(i32 (i32)* frozen @_Z7f_plaini) +// CHECK-WIN: call frozen i64 @_Z11func_as_intIU8sysv_abiFiiEExPT_(i32 (i32)* frozen @_Z9f_sysvabii) +// CHECK-WIN: call frozen i64 @_Z11func_as_intIFiiEExPT_(i32 (i32)* frozen @_Z7f_msabii) -// CHECK-LIN: define i64 @_Z7useThemv() -// CHECK-LIN: call i64 @_Z11func_as_intIFiiEElPT_(i32 (i32)* @_Z7f_plaini) -// CHECK-LIN: call i64 @_Z11func_as_intIFiiEElPT_(i32 (i32)* @_Z9f_sysvabii) -// CHECK-LIN: call i64 @_Z11func_as_intIU6ms_abiFiiEElPT_(i32 (i32)* @_Z7f_msabii) +// CHECK-LIN: define frozen i64 @_Z7useThemv() +// CHECK-LIN: call frozen i64 @_Z11func_as_intIFiiEElPT_(i32 (i32)* frozen @_Z7f_plaini) +// CHECK-LIN: call frozen i64 @_Z11func_as_intIFiiEElPT_(i32 (i32)* frozen @_Z9f_sysvabii) +// CHECK-LIN: call frozen i64 @_Z11func_as_intIU6ms_abiFiiEElPT_(i32 (i32)* frozen @_Z7f_msabii) diff --git a/clang/test/CodeGenCXX/mangle.cpp b/clang/test/CodeGenCXX/mangle.cpp --- a/clang/test/CodeGenCXX/mangle.cpp +++ b/clang/test/CodeGenCXX/mangle.cpp @@ -11,7 +11,7 @@ //CHECK: @pr5966_i = external global //CHECK: @_ZL8pr5966_j = internal global -// CHECK-LABEL: define zeroext i1 @_ZplRK1YRA100_P1X +// CHECK-LABEL: define frozen zeroext i1 @_ZplRK1YRA100_P1X bool operator+(const Y&, X* (&xs)[100]) { return false; } // CHECK-LABEL: define void @_Z1f1s @@ -280,13 +280,13 @@ void *v; }; -// CHECK-LABEL: define nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.Ops* @_ZN3OpsplERKS_ +// CHECK-LABEL: define frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.Ops* @_ZN3OpsplERKS_ Ops& Ops::operator+(const Ops&) { return *this; } -// CHECK-LABEL: define nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.Ops* @_ZN3OpsmiERKS_ +// CHECK-LABEL: define frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.Ops* @_ZN3OpsmiERKS_ Ops& Ops::operator-(const Ops&) { return *this; } -// CHECK-LABEL: define nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.Ops* @_ZN3OpsanERKS_ +// CHECK-LABEL: define frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.Ops* @_ZN3OpsanERKS_ Ops& Ops::operator&(const Ops&) { return *this; } -// CHECK-LABEL: define nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.Ops* @_ZN3OpsmlERKS_ +// CHECK-LABEL: define frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.Ops* @_ZN3OpsmlERKS_ Ops& Ops::operator*(const Ops&) { return *this; } // PR5861 @@ -302,7 +302,7 @@ T *allocate(int, const void*) { return 0; } }; -// CHECK-LABEL: define weak_odr i8* @_ZN6PR58615AllocIcNS_6PolicyINS_1PELb1EEEE8allocateEiPKv +// CHECK-LABEL: define weak_odr frozen i8* @_ZN6PR58615AllocIcNS_6PolicyINS_1PELb1EEEE8allocateEiPKv template class Alloc; } @@ -392,7 +392,7 @@ return read_member(obj); } - // CHECK-LABEL: define linkonce_odr i32 @_ZN5test211read_memberINS_1AEEEDtptcvPT_Li0E6memberERS2_( + // CHECK-LABEL: define linkonce_odr frozen i32 @_ZN5test211read_memberINS_1AEEEDtptcvPT_Li0E6memberERS2_( } // rdar://problem/9280586 @@ -402,16 +402,16 @@ struct Path2 : AmbiguousBase { double p; }; struct Derived : Path1, Path2 { }; - // CHECK-LABEL: define linkonce_odr i32 @_ZN5test38get_ab_1INS_7DerivedEEEDtptcvPT_Li0Esr5Path1E2abERS2_( + // CHECK-LABEL: define linkonce_odr frozen i32 @_ZN5test38get_ab_1INS_7DerivedEEEDtptcvPT_Li0Esr5Path1E2abERS2_( template decltype(((T*) 0)->Path1::ab) get_ab_1(T &ref) { return ref.Path1::ab; } - // CHECK-LABEL: define linkonce_odr i32 @_ZN5test38get_ab_2INS_7DerivedEEEDtptcvPT_Li0Esr5Path2E2abERS2_( + // CHECK-LABEL: define linkonce_odr frozen i32 @_ZN5test38get_ab_2INS_7DerivedEEEDtptcvPT_Li0Esr5Path2E2abERS2_( template decltype(((T*) 0)->Path2::ab) get_ab_2(T &ref) { return ref.Path2::ab; } - // CHECK-LABEL: define linkonce_odr float @_ZN5test37get_p_1INS_7DerivedEEEDtptcvPT_Li0Esr5Path1E1pERS2_( + // CHECK-LABEL: define linkonce_odr frozen float @_ZN5test37get_p_1INS_7DerivedEEEDtptcvPT_Li0Esr5Path1E1pERS2_( template decltype(((T*) 0)->Path1::p) get_p_1(T &ref) { return ref.Path1::p; } - // CHECK-LABEL: define linkonce_odr double @_ZN5test37get_p_2INS_7DerivedEEEDtptcvPT_Li0Esr5Path2E1pERS2_( + // CHECK-LABEL: define linkonce_odr frozen double @_ZN5test37get_p_2INS_7DerivedEEEDtptcvPT_Li0Esr5Path2E1pERS2_( template decltype(((T*) 0)->Path2::p) get_p_2(T &ref) { return ref.Path2::p; } Derived obj; @@ -521,7 +521,7 @@ struct S { static int a(), x; }; - // CHECK-LABEL: define i32 @_ZN6test141S1aEv + // CHECK-LABEL: define frozen i32 @_ZN6test141S1aEv // CHECK: load i32, i32* @_ZN6test141S1xE int S::a() { return S::x; } } @@ -648,13 +648,13 @@ namespace test24 { void test0() { extern int foo(); - // CHECK: call i32 @_ZN6test243fooEv() + // CHECK: call frozen i32 @_ZN6test243fooEv() foo(); } static char bar() {} void test1() { - // CHECK: call signext i8 @_ZN6test24L3barEv() + // CHECK: call frozen signext i8 @_ZN6test24L3barEv() bar(); } } @@ -757,9 +757,9 @@ void g(int); template auto f3(T p)->decltype(g(p)) {} - // CHECK-LABEL: define weak_odr i32 @_ZN6test312f1IiEEiT_( + // CHECK-LABEL: define weak_odr frozen i32 @_ZN6test312f1IiEEiT_( template int f1(int); - // CHECK-LABEL: define weak_odr i32 @_ZN6test312f2IiEEDtfp_ET_ + // CHECK-LABEL: define weak_odr frozen i32 @_ZN6test312f2IiEEDtfp_ET_ template int f2(int); // CHECK-LABEL: define weak_odr void @_ZN6test312f3IiEEDTcl1gfp_EET_ template void f3(int); @@ -775,7 +775,7 @@ template typename A::type foo() { return 0; } void test() { foo(); - // CHECK: call i32 @_ZN6test323fooINS_1BEEENS_1AIT_XsrS3_5valueEE4typeEv() + // CHECK: call frozen i32 @_ZN6test323fooINS_1BEEENS_1AIT_XsrS3_5valueEE4typeEv() } } @@ -793,7 +793,7 @@ void test() { foo(); - // CHECK: call i32 @_ZN6test333fooINS_1BEEENS_1AIT_Xsr1XIS3_EE5valueEE4typeEv() + // CHECK: call frozen i32 @_ZN6test333fooINS_1BEEENS_1AIT_Xsr1XIS3_EE5valueEE4typeEv() } } @@ -950,7 +950,7 @@ void f() { obj.bar(); } - // CHECK-LABEL: define linkonce_odr void @_ZN6test443foo3barEv(%"struct.test44::foo"* %this) + // CHECK-LABEL: define linkonce_odr void @_ZN6test443foo3barEv(%"struct.test44::foo"* frozen %this) } namespace test45 { @@ -960,7 +960,7 @@ template void f(enum T::e *) {} template void f(S::e *); - // CHECK-LABEL: define weak_odr void @_ZN6test451fINS_1SEEEvPTeNT_1eE(i32* %0) + // CHECK-LABEL: define weak_odr void @_ZN6test451fINS_1SEEEvPTeNT_1eE(i32* frozen %0) } namespace test46 { @@ -970,7 +970,7 @@ template void f(struct T::s *) {} template void f(S::s *); - // CHECK-LABEL: define weak_odr void @_ZN6test461fINS_1SEEEvPTsNT_1sE(%"struct.test46::S::s"* %0) + // CHECK-LABEL: define weak_odr void @_ZN6test461fINS_1SEEEvPTsNT_1sE(%"struct.test46::S::s"* frozen %0) } namespace test47 { @@ -980,7 +980,7 @@ template void f(class T::c *) {} template void f(S::c *); - // CHECK-LABEL: define weak_odr void @_ZN6test471fINS_1SEEEvPTsNT_1cE(%"class.test47::S::c"* %0) + // CHECK-LABEL: define weak_odr void @_ZN6test471fINS_1SEEEvPTsNT_1cE(%"class.test47::S::c"* frozen %0) } namespace test48 { @@ -990,7 +990,7 @@ template void f(union T::u *) {} template void f(S::u *); - // CHECK-LABEL: define weak_odr void @_ZN6test481fINS_1SEEEvPTuNT_1uE(%"union.test48::S::u"* %0) + // CHECK-LABEL: define weak_odr void @_ZN6test481fINS_1SEEEvPTuNT_1uE(%"union.test48::S::u"* frozen %0) } namespace test49 { diff --git a/clang/test/CodeGenCXX/matrix-type-builtins.cpp b/clang/test/CodeGenCXX/matrix-type-builtins.cpp --- a/clang/test/CodeGenCXX/matrix-type-builtins.cpp +++ b/clang/test/CodeGenCXX/matrix-type-builtins.cpp @@ -19,7 +19,7 @@ void test_transpose_template1() { // CHECK-LABEL: define void @_Z24test_transpose_template1v() - // CHECK: call void @_Z9transposeIiLj4ELj10EE8MyMatrixIT_XT1_EXT0_EERKS0_IS1_XT0_EXT1_EE(%struct.MyMatrix.0* sret align 4 %M1_t, %struct.MyMatrix* nonnull align 4 dereferenceable(160) %M1) + // CHECK: call void @_Z9transposeIiLj4ELj10EE8MyMatrixIT_XT1_EXT0_EERKS0_IS1_XT0_EXT1_EE(%struct.MyMatrix.0* sret align 4 %M1_t, %struct.MyMatrix* frozen nonnull align 4 dereferenceable(160) %M1) // CHECK-LABEL: define linkonce_odr void @_Z9transposeIiLj4ELj10EE8MyMatrixIT_XT1_EXT0_EERKS0_IS1_XT0_EXT1_EE( // CHECK: [[M:%.*]] = load <40 x i32>, <40 x i32>* {{.*}}, align 4 @@ -31,9 +31,9 @@ void test_transpose_template2(MyMatrix &M) { // CHECK-LABEL: define void @_Z24test_transpose_template2R8MyMatrixIdLj7ELj6EE( - // CHECK: call void @_Z9transposeIdLj7ELj6EE8MyMatrixIT_XT1_EXT0_EERKS0_IS1_XT0_EXT1_EE(%struct.MyMatrix.2* sret align 8 %ref.tmp1, %struct.MyMatrix.1* nonnull align 8 dereferenceable(336) %0) - // CHECK-NEXT: call void @_Z9transposeIdLj6ELj7EE8MyMatrixIT_XT1_EXT0_EERKS0_IS1_XT0_EXT1_EE(%struct.MyMatrix.1* sret align 8 %ref.tmp, %struct.MyMatrix.2* nonnull align 8 dereferenceable(336) %ref.tmp1) - // CHECK-NEXT: call void @_Z9transposeIdLj7ELj6EE8MyMatrixIT_XT1_EXT0_EERKS0_IS1_XT0_EXT1_EE(%struct.MyMatrix.2* sret align 8 %M2_t, %struct.MyMatrix.1* nonnull align 8 dereferenceable(336) %ref.tmp) + // CHECK: call void @_Z9transposeIdLj7ELj6EE8MyMatrixIT_XT1_EXT0_EERKS0_IS1_XT0_EXT1_EE(%struct.MyMatrix.2* sret align 8 %ref.tmp1, %struct.MyMatrix.1* frozen nonnull align 8 dereferenceable(336) %0) + // CHECK-NEXT: call void @_Z9transposeIdLj6ELj7EE8MyMatrixIT_XT1_EXT0_EERKS0_IS1_XT0_EXT1_EE(%struct.MyMatrix.1* sret align 8 %ref.tmp, %struct.MyMatrix.2* frozen nonnull align 8 dereferenceable(336) %ref.tmp1) + // CHECK-NEXT: call void @_Z9transposeIdLj7ELj6EE8MyMatrixIT_XT1_EXT0_EERKS0_IS1_XT0_EXT1_EE(%struct.MyMatrix.2* sret align 8 %M2_t, %struct.MyMatrix.1* frozen nonnull align 8 dereferenceable(336) %ref.tmp) // CHECK-LABEL: define linkonce_odr void @_Z9transposeIdLj7ELj6EE8MyMatrixIT_XT1_EXT0_EERKS0_IS1_XT0_EXT1_EE( // CHECK: [[M:%.*]] = load <42 x double>, <42 x double>* {{.*}}, align 8 @@ -58,7 +58,7 @@ // CHECK-LABEL: define void @_Z21test_transpose_rvaluev() // CHECK-NEXT: entry: // CHECK-NEXT: [[M_T_ADDR:%.*]] = alloca [9 x float], align 4 - // CHECK-NEXT: [[CALL_RES:%.*]] = call <9 x float> @_Z10get_matrixv() + // CHECK-NEXT: [[CALL_RES:%.*]] = call frozen <9 x float> @_Z10get_matrixv() // CHECK-NEXT: [[ADD:%.*]] = fadd <9 x float> [[CALL_RES]], // CHECK-NEXT: [[M_T:%.*]] = call <9 x float> @llvm.matrix.transpose.v9f32(<9 x float> [[ADD]], i32 3, i32 3) // CHECK-NEXT: [[M_T_ADDR_CAST:%.*]] = bitcast [9 x float]* [[M_T_ADDR]] to <9 x float>* diff --git a/clang/test/CodeGenCXX/matrix-type-operators.cpp b/clang/test/CodeGenCXX/matrix-type-operators.cpp --- a/clang/test/CodeGenCXX/matrix-type-operators.cpp +++ b/clang/test/CodeGenCXX/matrix-type-operators.cpp @@ -17,9 +17,9 @@ void test_add_template() { // CHECK-LABEL: define void @_Z17test_add_templatev() - // CHECK: %call = call <10 x float> @_Z3addIfLj2ELj5EEN8MyMatrixIT_XT0_EXT1_EE8matrix_tERS2_S4_(%struct.MyMatrix* nonnull align 4 dereferenceable(40) %Mat1, %struct.MyMatrix* nonnull align 4 dereferenceable(40) %Mat2) + // CHECK: %call = call frozen <10 x float> @_Z3addIfLj2ELj5EEN8MyMatrixIT_XT0_EXT1_EE8matrix_tERS2_S4_(%struct.MyMatrix* frozen nonnull align 4 dereferenceable(40) %Mat1, %struct.MyMatrix* frozen nonnull align 4 dereferenceable(40) %Mat2) - // CHECK-LABEL: define linkonce_odr <10 x float> @_Z3addIfLj2ELj5EEN8MyMatrixIT_XT0_EXT1_EE8matrix_tERS2_S4_( + // CHECK-LABEL: define linkonce_odr frozen <10 x float> @_Z3addIfLj2ELj5EEN8MyMatrixIT_XT0_EXT1_EE8matrix_tERS2_S4_( // CHECK: [[MAT1:%.*]] = load <10 x float>, <10 x float>* {{.*}}, align 4 // CHECK: [[MAT2:%.*]] = load <10 x float>, <10 x float>* {{.*}}, align 4 // CHECK-NEXT: [[RES:%.*]] = fadd <10 x float> [[MAT1]], [[MAT2]] @@ -37,9 +37,9 @@ void test_subtract_template() { // CHECK-LABEL: define void @_Z22test_subtract_templatev() - // CHECK: %call = call <10 x float> @_Z8subtractIfLj2ELj5EEN8MyMatrixIT_XT0_EXT1_EE8matrix_tERS2_S4_(%struct.MyMatrix* nonnull align 4 dereferenceable(40) %Mat1, %struct.MyMatrix* nonnull align 4 dereferenceable(40) %Mat2) + // CHECK: %call = call frozen <10 x float> @_Z8subtractIfLj2ELj5EEN8MyMatrixIT_XT0_EXT1_EE8matrix_tERS2_S4_(%struct.MyMatrix* frozen nonnull align 4 dereferenceable(40) %Mat1, %struct.MyMatrix* frozen nonnull align 4 dereferenceable(40) %Mat2) - // CHECK-LABEL: define linkonce_odr <10 x float> @_Z8subtractIfLj2ELj5EEN8MyMatrixIT_XT0_EXT1_EE8matrix_tERS2_S4_( + // CHECK-LABEL: define linkonce_odr frozen <10 x float> @_Z8subtractIfLj2ELj5EEN8MyMatrixIT_XT0_EXT1_EE8matrix_tERS2_S4_( // CHECK: [[MAT1:%.*]] = load <10 x float>, <10 x float>* {{.*}}, align 4 // CHECK: [[MAT2:%.*]] = load <10 x float>, <10 x float>* {{.*}}, align 4 // CHECK-NEXT: [[RES:%.*]] = fsub <10 x float> [[MAT1]], [[MAT2]] @@ -60,7 +60,7 @@ void test_DoubleWrapper1_Sub1(MyMatrix &m) { // CHECK-LABEL: define void @_Z24test_DoubleWrapper1_Sub1R8MyMatrixIdLj10ELj9EE( // CHECK: [[MATRIX:%.*]] = load <90 x double>, <90 x double>* {{.*}}, align 8 - // CHECK: [[SCALAR:%.*]] = call double @_ZN14DoubleWrapper1cvdEv(%struct.DoubleWrapper1* %w1) + // CHECK: [[SCALAR:%.*]] = call frozen double @_ZN14DoubleWrapper1cvdEv(%struct.DoubleWrapper1* frozen %w1) // CHECK-NEXT: [[SCALAR_EMBED:%.*]] = insertelement <90 x double> undef, double [[SCALAR]], i32 0 // CHECK-NEXT: [[SCALAR_EMBED1:%.*]] = shufflevector <90 x double> [[SCALAR_EMBED]], <90 x double> undef, <90 x i32> zeroinitializer // CHECK-NEXT: [[RES:%.*]] = fsub <90 x double> [[MATRIX]], [[SCALAR_EMBED1]] @@ -73,7 +73,7 @@ void test_DoubleWrapper1_Sub2(MyMatrix &m) { // CHECK-LABEL: define void @_Z24test_DoubleWrapper1_Sub2R8MyMatrixIdLj10ELj9EE( - // CHECK: [[SCALAR:%.*]] = call double @_ZN14DoubleWrapper1cvdEv(%struct.DoubleWrapper1* %w1) + // CHECK: [[SCALAR:%.*]] = call frozen double @_ZN14DoubleWrapper1cvdEv(%struct.DoubleWrapper1* frozen %w1) // CHECK: [[MATRIX:%.*]] = load <90 x double>, <90 x double>* {{.*}}, align 8 // CHECK-NEXT: [[SCALAR_EMBED:%.*]] = insertelement <90 x double> undef, double [[SCALAR]], i32 0 // CHECK-NEXT: [[SCALAR_EMBED1:%.*]] = shufflevector <90 x double> [[SCALAR_EMBED]], <90 x double> undef, <90 x i32> zeroinitializer @@ -95,7 +95,7 @@ void test_DoubleWrapper2_Add1(MyMatrix &m) { // CHECK-LABEL: define void @_Z24test_DoubleWrapper2_Add1R8MyMatrixIdLj10ELj9EE( // CHECK: [[MATRIX:%.*]] = load <90 x double>, <90 x double>* %1, align 8 - // CHECK: [[SCALAR:%.*]] = call double @_ZN14DoubleWrapper2cvdEv(%struct.DoubleWrapper2* %w2) + // CHECK: [[SCALAR:%.*]] = call frozen double @_ZN14DoubleWrapper2cvdEv(%struct.DoubleWrapper2* frozen %w2) // CHECK-NEXT: [[SCALAR_EMBED:%.*]] = insertelement <90 x double> undef, double [[SCALAR]], i32 0 // CHECK-NEXT: [[SCALAR_EMBED1:%.*]] = shufflevector <90 x double> [[SCALAR_EMBED]], <90 x double> undef, <90 x i32> zeroinitializer // CHECK-NEXT: [[RES:%.*]] = fadd <90 x double> [[MATRIX]], [[SCALAR_EMBED1]] @@ -108,7 +108,7 @@ void test_DoubleWrapper2_Add2(MyMatrix &m) { // CHECK-LABEL: define void @_Z24test_DoubleWrapper2_Add2R8MyMatrixIdLj10ELj9EE( - // CHECK: [[SCALAR:%.*]] = call double @_ZN14DoubleWrapper2cvdEv(%struct.DoubleWrapper2* %w2) + // CHECK: [[SCALAR:%.*]] = call frozen double @_ZN14DoubleWrapper2cvdEv(%struct.DoubleWrapper2* frozen %w2) // CHECK: [[MATRIX:%.*]] = load <90 x double>, <90 x double>* %1, align 8 // CHECK-NEXT: [[SCALAR_EMBED:%.*]] = insertelement <90 x double> undef, double [[SCALAR]], i32 0 // CHECK-NEXT: [[SCALAR_EMBED1:%.*]] = shufflevector <90 x double> [[SCALAR_EMBED]], <90 x double> undef, <90 x i32> zeroinitializer @@ -130,7 +130,7 @@ void test_IntWrapper_Add(MyMatrix &m) { // CHECK-LABEL: define void @_Z19test_IntWrapper_AddR8MyMatrixIdLj10ELj9EE( // CHECK: [[MATRIX:%.*]] = load <90 x double>, <90 x double>* {{.*}}, align 8 - // CHECK: [[SCALAR:%.*]] = call i32 @_ZN10IntWrappercviEv(%struct.IntWrapper* %w3) + // CHECK: [[SCALAR:%.*]] = call frozen i32 @_ZN10IntWrappercviEv(%struct.IntWrapper* frozen %w3) // CHECK: [[SCALAR_FP:%.*]] = sitofp i32 %call to double // CHECK-NEXT: [[SCALAR_EMBED:%.*]] = insertelement <90 x double> undef, double [[SCALAR_FP]], i32 0 // CHECK-NEXT: [[SCALAR_EMBED1:%.*]] = shufflevector <90 x double> [[SCALAR_EMBED]], <90 x double> undef, <90 x i32> zeroinitializer @@ -144,7 +144,7 @@ void test_IntWrapper_Sub(MyMatrix &m) { // CHECK-LABEL: define void @_Z19test_IntWrapper_SubR8MyMatrixIdLj10ELj9EE( - // CHECK: [[SCALAR:%.*]] = call i32 @_ZN10IntWrappercviEv(%struct.IntWrapper* %w3) + // CHECK: [[SCALAR:%.*]] = call frozen i32 @_ZN10IntWrappercviEv(%struct.IntWrapper* frozen %w3) // CHECK-NEXT: [[SCALAR_FP:%.*]] = sitofp i32 %call to double // CHECK: [[MATRIX:%.*]] = load <90 x double>, <90 x double>* {{.*}}, align 8 // CHECK-NEXT: [[SCALAR_EMBED:%.*]] = insertelement <90 x double> undef, double [[SCALAR_FP]], i32 0 @@ -166,13 +166,13 @@ MyMatrix Mat2) { // CHECK-LABEL: define void @_Z22test_multiply_template8MyMatrixIfLj2ELj5EES_IfLj5ELj2EE( // CHECK-NEXT: entry: - // CHECK-NEXT: [[RES:%.*]] = call <4 x float> @_Z8multiplyIfLj2ELj5ELj2EEN8MyMatrixIT_XT0_EXT2_EE8matrix_tERS0_IS1_XT0_EXT1_EERS0_IS1_XT1_EXT2_EE(%struct.MyMatrix* nonnull align 4 dereferenceable(40) %Mat1, %struct.MyMatrix.2* nonnull align 4 dereferenceable(40) %Mat2) + // CHECK-NEXT: [[RES:%.*]] = call frozen <4 x float> @_Z8multiplyIfLj2ELj5ELj2EEN8MyMatrixIT_XT0_EXT2_EE8matrix_tERS0_IS1_XT0_EXT1_EERS0_IS1_XT1_EXT2_EE(%struct.MyMatrix* frozen nonnull align 4 dereferenceable(40) %Mat1, %struct.MyMatrix.2* frozen nonnull align 4 dereferenceable(40) %Mat2) // CHECK-NEXT: %value = getelementptr inbounds %struct.MyMatrix.1, %struct.MyMatrix.1* %agg.result, i32 0, i32 0 // CHECK-NEXT: [[VALUE_ADDR:%.*]] = bitcast [4 x float]* %value to <4 x float>* // CHECK-NEXT: store <4 x float> [[RES]], <4 x float>* [[VALUE_ADDR]], align 4 // CHECK-NEXT: ret void // - // CHECK-LABEL: define linkonce_odr <4 x float> @_Z8multiplyIfLj2ELj5ELj2EEN8MyMatrixIT_XT0_EXT2_EE8matrix_tERS0_IS1_XT0_EXT1_EERS0_IS1_XT1_EXT2_EE( + // CHECK-LABEL: define linkonce_odr frozen <4 x float> @_Z8multiplyIfLj2ELj5ELj2EEN8MyMatrixIT_XT0_EXT2_EE8matrix_tERS0_IS1_XT0_EXT1_EERS0_IS1_XT1_EXT2_EE( // CHECK: [[MAT1:%.*]] = load <10 x float>, <10 x float>* {{.*}}, align 4 // CHECK: [[MAT2:%.*]] = load <10 x float>, <10 x float>* {{.*}}, align 4 // CHECK-NEXT: [[RES:%.*]] = call <4 x float> @llvm.matrix.multiply.v4f32.v10f32.v10f32(<10 x float> [[MAT1]], <10 x float> [[MAT2]], i32 2, i32 5, i32 2) @@ -185,7 +185,7 @@ void test_IntWrapper_Multiply(MyMatrix &m, IntWrapper &w3) { // CHECK-LABEL: define void @_Z24test_IntWrapper_MultiplyR8MyMatrixIdLj10ELj9EER10IntWrapper( - // CHECK: [[SCALAR:%.*]] = call i32 @_ZN10IntWrappercviEv(%struct.IntWrapper* {{.*}}) + // CHECK: [[SCALAR:%.*]] = call frozen i32 @_ZN10IntWrappercviEv(%struct.IntWrapper* {{.*}}) // CHECK-NEXT: [[SCALAR_FP:%.*]] = sitofp i32 %call to double // CHECK: [[MATRIX:%.*]] = load <90 x double>, <90 x double>* {{.*}}, align 8 // CHECK-NEXT: [[SCALAR_EMBED:%.*]] = insertelement <90 x double> undef, double [[SCALAR_FP]], i32 0 @@ -207,7 +207,7 @@ // CHECK-NEXT: [[E:%.*]] = load i32, i32* %e.addr, align 4 // CHECK-NEXT: [[I:%.*]] = load i32, i32* %i.addr, align 4 // CHECK-NEXT: [[J:%.*]] = load i32, i32* %j.addr, align 4 - // CHECK-NEXT: call void @_Z6insertIjLj2ELj2EEvR8MyMatrixIT_XT0_EXT1_EES1_jj(%struct.MyMatrix.3* nonnull align 4 dereferenceable(16) [[MAT_ADDR]], i32 [[E]], i32 [[I]], i32 [[J]]) + // CHECK-NEXT: call void @_Z6insertIjLj2ELj2EEvR8MyMatrixIT_XT0_EXT1_EES1_jj(%struct.MyMatrix.3* frozen nonnull align 4 dereferenceable(16) [[MAT_ADDR]], i32 frozen [[E]], i32 frozen [[I]], i32 frozen [[J]]) // CHECK-NEXT: ret void // // CHECK-LABEL: define linkonce_odr void @_Z6insertIjLj2ELj2EEvR8MyMatrixIT_XT0_EXT1_EES1_jj( @@ -231,7 +231,7 @@ // CHECK-LABEL: @_Z21test_insert_template2R8MyMatrixIfLj3ELj8EEf( // CHECK: [[MAT_ADDR:%.*]] = load %struct.MyMatrix.4*, %struct.MyMatrix.4** %Mat.addr, align 8 // CHECK-NEXT: [[E:%.*]] = load float, float* %e.addr, align 4 - // CHECK-NEXT: call void @_Z6insertIfLj3ELj8EEvR8MyMatrixIT_XT0_EXT1_EES1_jj(%struct.MyMatrix.4* nonnull align 4 dereferenceable(96) [[MAT_ADDR]], float [[E]], i32 2, i32 5) + // CHECK-NEXT: call void @_Z6insertIfLj3ELj8EEvR8MyMatrixIT_XT0_EXT1_EES1_jj(%struct.MyMatrix.4* frozen nonnull align 4 dereferenceable(96) [[MAT_ADDR]], float frozen [[E]], i32 frozen 2, i32 frozen 5) // CHECK-NEXT: ret void // // CHECK-LABEL: define linkonce_odr void @_Z6insertIfLj3ELj8EEvR8MyMatrixIT_XT0_EXT1_EES1_jj( @@ -259,10 +259,10 @@ int test_extract_template(MyMatrix Mat1) { // CHECK-LABEL: @_Z21test_extract_template8MyMatrixIiLj2ELj2EE( // CHECK-NEXT: entry: - // CHECK-NEXT: [[CALL:%.*]] = call i32 @_Z7extractIiLj2ELj2EET_R8MyMatrixIS0_XT0_EXT1_EE(%struct.MyMatrix.5* nonnull align 4 dereferenceable(16) [[MAT1:%.*]]) + // CHECK-NEXT: [[CALL:%.*]] = call frozen i32 @_Z7extractIiLj2ELj2EET_R8MyMatrixIS0_XT0_EXT1_EE(%struct.MyMatrix.5* frozen nonnull align 4 dereferenceable(16) [[MAT1:%.*]]) // CHECK-NEXT: ret i32 [[CALL]] // - // CHECK-LABEL: define linkonce_odr i32 @_Z7extractIiLj2ELj2EET_R8MyMatrixIS0_XT0_EXT1_EE( + // CHECK-LABEL: define linkonce_odr frozen i32 @_Z7extractIiLj2ELj2EET_R8MyMatrixIS0_XT0_EXT1_EE( // CHECK: [[MAT:%.*]] = load <4 x i32>, <4 x i32>* {{.*}}, align 4 // CHECK-NEXT: [[MATEXT:%.*]] = extractelement <4 x i32> [[MAT]], i64 1 // CHECK-NEXT: ret i32 [[MATEXT]] @@ -278,7 +278,7 @@ double test_matrix_subscript(double4x4 m) { // CHECK-LABEL: @_Z21test_matrix_subscriptU11matrix_typeLm4ELm4Ed( // CHECK: [[MAT:%.*]] = load <16 x double>, <16 x double>* {{.*}}, align 8 - // CHECK-NEXT: [[CALL:%.*]] = call nonnull align 8 dereferenceable(8) double* @_Z16matrix_subscriptIiiEDTixixfp_fp0_fp1_EU11matrix_typeLm4ELm4EdT_T0_(<16 x double> [[MAT]], i32 1, i32 2) + // CHECK-NEXT: [[CALL:%.*]] = call frozen nonnull align 8 dereferenceable(8) double* @_Z16matrix_subscriptIiiEDTixixfp_fp0_fp1_EU11matrix_typeLm4ELm4EdT_T0_(<16 x double> frozen [[MAT]], i32 frozen 1, i32 frozen 2) // CHECK-NEXT: [[RES:%.*]] = load double, double* [[CALL]], align 8 // CHECK-NEXT: ret double [[RES]] @@ -308,11 +308,11 @@ }; double extract_IntWrapper_idx(double4x4 &m, IntWrapper i, UnsignedWrapper j) { - // CHECK-LABEL: define double @_Z22extract_IntWrapper_idxRU11matrix_typeLm4ELm4Ed10IntWrapper15UnsignedWrapper( - // CHECK: [[I:%.*]] = call i32 @_ZN10IntWrappercviEv(%struct.IntWrapper* %i) + // CHECK-LABEL: define frozen double @_Z22extract_IntWrapper_idxRU11matrix_typeLm4ELm4Ed10IntWrapper15UnsignedWrapper( + // CHECK: [[I:%.*]] = call frozen i32 @_ZN10IntWrappercviEv(%struct.IntWrapper* frozen %i) // CHECK-NEXT: [[I_ADD:%.*]] = add nsw i32 [[I]], 1 // CHECK-NEXT: [[I_ADD_EXT:%.*]] = sext i32 [[I_ADD]] to i64 - // CHECK-NEXT: [[J:%.*]] = call i32 @_ZN15UnsignedWrappercvjEv(%struct.UnsignedWrapper* %j) + // CHECK-NEXT: [[J:%.*]] = call frozen i32 @_ZN15UnsignedWrappercvjEv(%struct.UnsignedWrapper* frozen %j) // CHECK-NEXT: [[J_SUB:%.*]] = sub i32 [[J]], 1 // CHECK-NEXT: [[J_SUB_EXT:%.*]] = zext i32 [[J_SUB]] to i64 // CHECK-NEXT: [[MAT_ADDR:%.*]] = load [16 x double]*, [16 x double]** %m.addr, align 8 @@ -342,14 +342,14 @@ void test_constexpr1(matrix_type &m) { // CHECK-LABEL: define void @_Z15test_constexpr1RU11matrix_typeLm4ELm4Ef( // CHECK: [[MAT:%.*]] = load <16 x float>, <16 x float>* {{.*}}, align 4 - // CHECK-NEXT: [[IM:%.*]] = call <16 x float> @_ZNK13identmatrix_tcvU11matrix_typeXT0_EXT0_ET_IfLj4EEEv(%struct.identmatrix_t* @_ZL11identmatrix) + // CHECK-NEXT: [[IM:%.*]] = call frozen <16 x float> @_ZNK13identmatrix_tcvU11matrix_typeXT0_EXT0_ET_IfLj4EEEv(%struct.identmatrix_t* frozen @_ZL11identmatrix) // CHECK-NEXT: [[ADD:%.*]] = fadd <16 x float> [[MAT]], [[IM]] // CHECK-NEXT: [[MAT_ADDR:%.*]] = load [16 x float]*, [16 x float]** %m.addr, align 8 // CHECK-NEXT: [[MAT_ADDR2:%.*]] = bitcast [16 x float]* [[MAT_ADDR]] to <16 x float>* // CHECK-NEXT: store <16 x float> [[ADD]], <16 x float>* [[MAT_ADDR2]], align 4 // CHECK-NEXT: ret voi - // CHECK-LABEL: define linkonce_odr <16 x float> @_ZNK13identmatrix_tcvU11matrix_typeXT0_EXT0_ET_IfLj4EEEv( + // CHECK-LABEL: define linkonce_odr frozen <16 x float> @_ZNK13identmatrix_tcvU11matrix_typeXT0_EXT0_ET_IfLj4EEEv( // CHECK-LABEL: for.body: ; preds = %for.cond // CHECK-NEXT: [[I:%.*]] = load i32, i32* %i, align 4 // CHECK-NEXT: [[I_EXT:%.*]] = zext i32 [[I]] to i64 @@ -367,7 +367,7 @@ void test_constexpr2(matrix_type &m) { // CHECK-LABEL: define void @_Z15test_constexpr2RU11matrix_typeLm5ELm5Ei( - // CHECK: [[IM:%.*]] = call <25 x i32> @_ZNK13identmatrix_tcvU11matrix_typeXT0_EXT0_ET_IiLj5EEEv(%struct.identmatrix_t* @_ZL11identmatrix) + // CHECK: [[IM:%.*]] = call frozen <25 x i32> @_ZNK13identmatrix_tcvU11matrix_typeXT0_EXT0_ET_IiLj5EEEv(%struct.identmatrix_t* frozen @_ZL11identmatrix) // CHECK: [[MAT:%.*]] = load <25 x i32>, <25 x i32>* {{.*}}, align 4 // CHECK-NEXT: [[SUB:%.*]] = sub <25 x i32> [[IM]], [[MAT]] // CHECK-NEXT: [[SUB2:%.*]] = add <25 x i32> [[SUB]], @@ -377,7 +377,7 @@ // CHECK-NEXT: ret void // - // CHECK-LABEL: define linkonce_odr <25 x i32> @_ZNK13identmatrix_tcvU11matrix_typeXT0_EXT0_ET_IiLj5EEEv( + // CHECK-LABEL: define linkonce_odr frozen <25 x i32> @_ZNK13identmatrix_tcvU11matrix_typeXT0_EXT0_ET_IiLj5EEEv( // CHECK-LABEL: for.body: ; preds = %for.cond // CHECK-NEXT: [[I:%.*]] = load i32, i32* %i, align 4 // CHECK-NEXT: [[I_EXT:%.*]] = zext i32 [[I]] to i64 diff --git a/clang/test/CodeGenCXX/matrix-type.cpp b/clang/test/CodeGenCXX/matrix-type.cpp --- a/clang/test/CodeGenCXX/matrix-type.cpp +++ b/clang/test/CodeGenCXX/matrix-type.cpp @@ -42,7 +42,7 @@ } fx3x3_t return_matrix(fx3x3_t *a) { - // CHECK-LABEL: define <9 x float> @_Z13return_matrixPU11matrix_typeLm3ELm3Ef( + // CHECK-LABEL: define frozen <9 x float> @_Z13return_matrixPU11matrix_typeLm3ELm3Ef( // CHECK-NEXT: entry: // CHECK-NEXT: %a.addr = alloca [9 x float]*, align 8 // CHECK-NEXT: store [9 x float]* %a, [9 x float]** %a.addr, align 8 @@ -138,7 +138,7 @@ } MatrixClassTemplate matrix_template_reference_caller(float *Data) { - // CHECK-LABEL: define void @_Z32matrix_template_reference_callerPf(%class.MatrixClassTemplate* noalias sret align 8 %agg.result, float* %Data + // CHECK-LABEL: define void @_Z32matrix_template_reference_callerPf(%class.MatrixClassTemplate* noalias sret align 8 %agg.result, float* frozen %Data // CHECK-NEXT: entry: // CHECK-NEXT: %Data.addr = alloca float*, align 8 // CHECK-NEXT: %Arg = alloca %class.MatrixClassTemplate, align 8 @@ -150,10 +150,10 @@ // CHECK-NEXT: %Data1 = getelementptr inbounds %class.MatrixClassTemplate, %class.MatrixClassTemplate* %Arg, i32 0, i32 1 // CHECK-NEXT: %4 = bitcast [150 x float]* %Data1 to <150 x float>* // CHECK-NEXT: store <150 x float> %3, <150 x float>* %4, align 4 - // CHECK-NEXT: call void @_Z25matrix_template_referenceIfLj10ELj15EEvR19MatrixClassTemplateIT_XT0_EXT1_EES3_(%class.MatrixClassTemplate* nonnull align 8 dereferenceable(616) %Arg, %class.MatrixClassTemplate* nonnull align 8 dereferenceable(616) %agg.result) + // CHECK-NEXT: call void @_Z25matrix_template_referenceIfLj10ELj15EEvR19MatrixClassTemplateIT_XT0_EXT1_EES3_(%class.MatrixClassTemplate* frozen nonnull align 8 dereferenceable(616) %Arg, %class.MatrixClassTemplate* frozen nonnull align 8 dereferenceable(616) %agg.result) // CHECK-NEXT: ret void - // CHECK-LABEL: define linkonce_odr void @_Z25matrix_template_referenceIfLj10ELj15EEvR19MatrixClassTemplateIT_XT0_EXT1_EES3_(%class.MatrixClassTemplate* nonnull align 8 dereferenceable(616) %a, %class.MatrixClassTemplate* nonnull align 8 dereferenceable(616) %b) + // CHECK-LABEL: define linkonce_odr void @_Z25matrix_template_referenceIfLj10ELj15EEvR19MatrixClassTemplateIT_XT0_EXT1_EES3_(%class.MatrixClassTemplate* frozen nonnull align 8 dereferenceable(616) %a, %class.MatrixClassTemplate* frozen nonnull align 8 dereferenceable(616) %b) // CHECK-NEXT: entry: // CHECK-NEXT: %a.addr = alloca %class.MatrixClassTemplate*, align 8 // CHECK-NEXT: %b.addr = alloca %class.MatrixClassTemplate*, align 8 @@ -215,42 +215,42 @@ // CHECK-NEXT: %m4 = alloca [144 x float], align 4 // CHECK-NEXT: %v = alloca %struct.selector.3, align 1 // CHECK-NEXT: %undef.agg.tmp4 = alloca %struct.selector.3, align 1 - // CHECK-NEXT: call void @_Z10use_matrixIiLm12EE8selectorILi3EERU11matrix_typeXLm10EEXT0_ET_([120 x i32]* nonnull align 4 dereferenceable(480) %m0) - // CHECK-NEXT: call void @_Z10use_matrixIiE8selectorILi2EERU11matrix_typeLm10ELm10ET_([100 x i32]* nonnull align 4 dereferenceable(400) %m1) - // CHECK-NEXT: call void @_Z10use_matrixIiLm12EE8selectorILi1EERU11matrix_typeXT0_EXLm10EET_([120 x i32]* nonnull align 4 dereferenceable(480) %m2) - // CHECK-NEXT: call void @_Z10use_matrixIiLm12ELm12EE8selectorILi0EERU11matrix_typeXT0_EXT1_ET_([144 x i32]* nonnull align 4 dereferenceable(576) %m3) - // CHECK-NEXT: call void @_Z10use_matrixILm12ELm12EE8selectorILi4EERU11matrix_typeXT_EXT0_Ef([144 x float]* nonnull align 4 dereferenceable(576) %m4) + // CHECK-NEXT: call void @_Z10use_matrixIiLm12EE8selectorILi3EERU11matrix_typeXLm10EEXT0_ET_([120 x i32]* frozen nonnull align 4 dereferenceable(480) %m0) + // CHECK-NEXT: call void @_Z10use_matrixIiE8selectorILi2EERU11matrix_typeLm10ELm10ET_([100 x i32]* frozen nonnull align 4 dereferenceable(400) %m1) + // CHECK-NEXT: call void @_Z10use_matrixIiLm12EE8selectorILi1EERU11matrix_typeXT0_EXLm10EET_([120 x i32]* frozen nonnull align 4 dereferenceable(480) %m2) + // CHECK-NEXT: call void @_Z10use_matrixIiLm12ELm12EE8selectorILi0EERU11matrix_typeXT0_EXT1_ET_([144 x i32]* frozen nonnull align 4 dereferenceable(576) %m3) + // CHECK-NEXT: call void @_Z10use_matrixILm12ELm12EE8selectorILi4EERU11matrix_typeXT_EXT0_Ef([144 x float]* frozen nonnull align 4 dereferenceable(576) %m4) // CHECK-NEXT: ret void - // CHECK-LABEL: define linkonce_odr void @_Z10use_matrixIiLm12EE8selectorILi3EERU11matrix_typeXLm10EEXT0_ET_([120 x i32]* nonnull align 4 dereferenceable(480) %m) + // CHECK-LABEL: define linkonce_odr void @_Z10use_matrixIiLm12EE8selectorILi3EERU11matrix_typeXLm10EEXT0_ET_([120 x i32]* frozen nonnull align 4 dereferenceable(480) %m) // CHECK-NEXT: entry: // CHECK-NEXT: %m.addr = alloca [120 x i32]*, align 8 // CHECK-NEXT: store [120 x i32]* %m, [120 x i32]** %m.addr, align 8 // CHECK-NEXT: call void @llvm.trap() // CHECK-NEXT: unreachable - // CHECK-LABEL: define linkonce_odr void @_Z10use_matrixIiE8selectorILi2EERU11matrix_typeLm10ELm10ET_([100 x i32]* nonnull align 4 dereferenceable(400) %m) + // CHECK-LABEL: define linkonce_odr void @_Z10use_matrixIiE8selectorILi2EERU11matrix_typeLm10ELm10ET_([100 x i32]* frozen nonnull align 4 dereferenceable(400) %m) // CHECK-NEXT: entry: // CHECK-NEXT: %m.addr = alloca [100 x i32]*, align 8 // CHECK-NEXT: store [100 x i32]* %m, [100 x i32]** %m.addr, align 8 // CHECK-NEXT: call void @llvm.trap() // CHECK-NEXT: unreachable - // CHECK-LABEL: define linkonce_odr void @_Z10use_matrixIiLm12EE8selectorILi1EERU11matrix_typeXT0_EXLm10EET_([120 x i32]* nonnull align 4 dereferenceable(480) %m) + // CHECK-LABEL: define linkonce_odr void @_Z10use_matrixIiLm12EE8selectorILi1EERU11matrix_typeXT0_EXLm10EET_([120 x i32]* frozen nonnull align 4 dereferenceable(480) %m) // CHECK-NEXT: entry: // CHECK-NEXT: %m.addr = alloca [120 x i32]*, align 8 // CHECK-NEXT: store [120 x i32]* %m, [120 x i32]** %m.addr, align 8 // CHECK-NEXT: call void @llvm.trap() // CHECK-NEXT: unreachable - // CHECK-LABEL: define linkonce_odr void @_Z10use_matrixIiLm12ELm12EE8selectorILi0EERU11matrix_typeXT0_EXT1_ET_([144 x i32]* nonnull align 4 dereferenceable(576) %m) + // CHECK-LABEL: define linkonce_odr void @_Z10use_matrixIiLm12ELm12EE8selectorILi0EERU11matrix_typeXT0_EXT1_ET_([144 x i32]* frozen nonnull align 4 dereferenceable(576) %m) // CHECK-NEXT: entry: // CHECK-NEXT: %m.addr = alloca [144 x i32]*, align 8 // CHECK-NEXT: store [144 x i32]* %m, [144 x i32]** %m.addr, align 8 // CHECK-NEXT: call void @llvm.trap() // CHECK-NEXT: unreachable - // CHECK-LABEL: define linkonce_odr void @_Z10use_matrixILm12ELm12EE8selectorILi4EERU11matrix_typeXT_EXT0_Ef([144 x float]* nonnull align 4 dereferenceable(576) + // CHECK-LABEL: define linkonce_odr void @_Z10use_matrixILm12ELm12EE8selectorILi4EERU11matrix_typeXT_EXT0_Ef([144 x float]* frozen nonnull align 4 dereferenceable(576) // CHECK-NEXT: entry: // CHECK-NEXT: %m.addr = alloca [144 x float]*, align 8 // CHECK-NEXT: store [144 x float]* %m, [144 x float]** %m.addr, align 8 @@ -277,10 +277,10 @@ // CHECK-LABEL: define void @_Z11test_auto_tv() // CHECK-NEXT: entry: // CHECK-NEXT: %m = alloca [130 x i32], align 4 - // CHECK-NEXT: call void @_Z3fooILm13EEvRU11matrix_typeXT_EXLm10EEi([130 x i32]* nonnull align 4 dereferenceable(520) %m) + // CHECK-NEXT: call void @_Z3fooILm13EEvRU11matrix_typeXT_EXLm10EEi([130 x i32]* frozen nonnull align 4 dereferenceable(520) %m) // CHECK-NEXT: ret void - // CHECK-LABEL: define linkonce_odr void @_Z3fooILm13EEvRU11matrix_typeXT_EXLm10EEi([130 x i32]* nonnull align 4 dereferenceable(520) %m) + // CHECK-LABEL: define linkonce_odr void @_Z3fooILm13EEvRU11matrix_typeXT_EXLm10EEi([130 x i32]* frozen nonnull align 4 dereferenceable(520) %m) // CHECK-NEXT: entry: // CHECK-NEXT: %m.addr = alloca [130 x i32]*, align 8 // CHECK-NEXT: store [130 x i32]* %m, [130 x i32]** %m.addr, align 8 @@ -321,25 +321,25 @@ // CHECK-NEXT: %r4 = alloca [20 x float], align 4 // CHECK-NEXT: %r5 = alloca %struct.selector.0, align 1 // CHECK-NEXT: %undef.agg.tmp3 = alloca %struct.selector.0, align 1 - // CHECK-NEXT: %call = call <40 x float> @_Z12use_matrix_2ILm4ELm6EEU11matrix_typeXplT_Li1EEXplT0_Li2EEfRU11matrix_typeXT_EXT0_Ei([24 x i32]* nonnull align 4 dereferenceable(96) %m1) + // CHECK-NEXT: %call = call frozen <40 x float> @_Z12use_matrix_2ILm4ELm6EEU11matrix_typeXplT_Li1EEXplT0_Li2EEfRU11matrix_typeXT_EXT0_Ei([24 x i32]* frozen nonnull align 4 dereferenceable(96) %m1) // CHECK-NEXT: %0 = bitcast [40 x float]* %r1 to <40 x float>* // CHECK-NEXT: store <40 x float> %call, <40 x float>* %0, align 4 - // CHECK-NEXT: call void @_Z12use_matrix_2ILm2ELm12EE8selectorILi0EERU11matrix_typeXplT_Li2EEXdvT0_Li2EEiRU11matrix_typeXT_EXT0_Ef([24 x i32]* nonnull align 4 dereferenceable(96) %m1, [24 x float]* nonnull align 4 dereferenceable(96) %m2) - // CHECK-NEXT: call void @_Z12use_matrix_2ILm5ELm8EE8selectorILi1EERU11matrix_typeXplT_T0_EXT0_EiRU11matrix_typeXT_EXmiT0_T_Ef([104 x i32]* nonnull align 4 dereferenceable(416) %m3, [15 x float]* nonnull align 4 dereferenceable(60) %m4) - // CHECK-NEXT: %call2 = call <20 x float> @_Z12use_matrix_2ILm5EEU11matrix_typeXplT_T_EXmiT_Li3EEfRU11matrix_typeXT_EXLm10EEi([50 x i32]* nonnull align 4 dereferenceable(200) %m5) + // CHECK-NEXT: call void @_Z12use_matrix_2ILm2ELm12EE8selectorILi0EERU11matrix_typeXplT_Li2EEXdvT0_Li2EEiRU11matrix_typeXT_EXT0_Ef([24 x i32]* frozen nonnull align 4 dereferenceable(96) %m1, [24 x float]* frozen nonnull align 4 dereferenceable(96) %m2) + // CHECK-NEXT: call void @_Z12use_matrix_2ILm5ELm8EE8selectorILi1EERU11matrix_typeXplT_T0_EXT0_EiRU11matrix_typeXT_EXmiT0_T_Ef([104 x i32]* frozen nonnull align 4 dereferenceable(416) %m3, [15 x float]* frozen nonnull align 4 dereferenceable(60) %m4) + // CHECK-NEXT: %call2 = call frozen <20 x float> @_Z12use_matrix_2ILm5EEU11matrix_typeXplT_T_EXmiT_Li3EEfRU11matrix_typeXT_EXLm10EEi([50 x i32]* frozen nonnull align 4 dereferenceable(200) %m5) // CHECK-NEXT: %1 = bitcast [20 x float]* %r4 to <20 x float>* // CHECK-NEXT: store <20 x float> %call2, <20 x float>* %1, align 4 - // CHECK-NEXT: call void @_Z12use_matrix_3ILm6EE8selectorILi2EERU11matrix_typeXmiT_Li2EEXT_Ei([24 x i32]* nonnull align 4 dereferenceable(96) %m1) + // CHECK-NEXT: call void @_Z12use_matrix_3ILm6EE8selectorILi2EERU11matrix_typeXmiT_Li2EEXT_Ei([24 x i32]* frozen nonnull align 4 dereferenceable(96) %m1) // CHECK-NEXT: ret void - // CHECK-LABEL: define linkonce_odr <40 x float> @_Z12use_matrix_2ILm4ELm6EEU11matrix_typeXplT_Li1EEXplT0_Li2EEfRU11matrix_typeXT_EXT0_Ei([24 x i32]* nonnull align 4 dereferenceable(96) %m) + // CHECK-LABEL: define linkonce_odr frozen <40 x float> @_Z12use_matrix_2ILm4ELm6EEU11matrix_typeXplT_Li1EEXplT0_Li2EEfRU11matrix_typeXT_EXT0_Ei([24 x i32]* frozen nonnull align 4 dereferenceable(96) %m) // CHECK-NEXT: entry: // CHECK-NEXT: %m.addr = alloca [24 x i32]*, align 8 // CHECK-NEXT: store [24 x i32]* %m, [24 x i32]** %m.addr, align 8 // CHECK-NEXT: call void @llvm.trap() // CHECK-NEXT: unreachable - // CHECK-LABEL: define linkonce_odr void @_Z12use_matrix_2ILm2ELm12EE8selectorILi0EERU11matrix_typeXplT_Li2EEXdvT0_Li2EEiRU11matrix_typeXT_EXT0_Ef([24 x i32]* nonnull align 4 dereferenceable(96) %m1, [24 x float]* nonnull align 4 dereferenceable(96) %m2) + // CHECK-LABEL: define linkonce_odr void @_Z12use_matrix_2ILm2ELm12EE8selectorILi0EERU11matrix_typeXplT_Li2EEXdvT0_Li2EEiRU11matrix_typeXT_EXT0_Ef([24 x i32]* frozen nonnull align 4 dereferenceable(96) %m1, [24 x float]* frozen nonnull align 4 dereferenceable(96) %m2) // CHECK-NEXT: entry: // CHECK-NEXT: %m1.addr = alloca [24 x i32]*, align 8 // CHECK-NEXT: %m2.addr = alloca [24 x float]*, align 8 @@ -348,7 +348,7 @@ // CHECK-NEXT: call void @llvm.trap() // CHECK-NEXT: unreachable - // CHECK-LABEL: define linkonce_odr void @_Z12use_matrix_2ILm5ELm8EE8selectorILi1EERU11matrix_typeXplT_T0_EXT0_EiRU11matrix_typeXT_EXmiT0_T_Ef([104 x i32]* nonnull align 4 dereferenceable(416) %m1, [15 x float]* nonnull align 4 dereferenceable(60) %m2) + // CHECK-LABEL: define linkonce_odr void @_Z12use_matrix_2ILm5ELm8EE8selectorILi1EERU11matrix_typeXplT_T0_EXT0_EiRU11matrix_typeXT_EXmiT0_T_Ef([104 x i32]* frozen nonnull align 4 dereferenceable(416) %m1, [15 x float]* frozen nonnull align 4 dereferenceable(60) %m2) // CHECK-NEXT: entry: // CHECK-NEXT: %m1.addr = alloca [104 x i32]*, align 8 // CHECK-NEXT: %m2.addr = alloca [15 x float]*, align 8 @@ -357,14 +357,14 @@ // CHECK-NEXT: call void @llvm.trap() // CHECK-NEXT: unreachable - // CHECK-LABEL: define linkonce_odr <20 x float> @_Z12use_matrix_2ILm5EEU11matrix_typeXplT_T_EXmiT_Li3EEfRU11matrix_typeXT_EXLm10EEi([50 x i32]* nonnull align 4 dereferenceable(200) %m1) + // CHECK-LABEL: define linkonce_odr frozen <20 x float> @_Z12use_matrix_2ILm5EEU11matrix_typeXplT_T_EXmiT_Li3EEfRU11matrix_typeXT_EXLm10EEi([50 x i32]* frozen nonnull align 4 dereferenceable(200) %m1) // CHECK-NEXT: entry: // CHECK-NEXT: %m1.addr = alloca [50 x i32]*, align 8 // CHECK-NEXT: store [50 x i32]* %m1, [50 x i32]** %m1.addr, align 8 // CHECK-NEXT: call void @llvm.trap() // CHECK-NEXT: unreachable - // CHECK-LABEL: define linkonce_odr void @_Z12use_matrix_3ILm6EE8selectorILi2EERU11matrix_typeXmiT_Li2EEXT_Ei([24 x i32]* nonnull align 4 dereferenceable(96) %m) + // CHECK-LABEL: define linkonce_odr void @_Z12use_matrix_3ILm6EE8selectorILi2EERU11matrix_typeXmiT_Li2EEXT_Ei([24 x i32]* frozen nonnull align 4 dereferenceable(96) %m) // CHECK-NEXT: entry: // CHECK-NEXT: %m.addr = alloca [24 x i32]*, align 8 // CHECK-NEXT: store [24 x i32]* %m, [24 x i32]** %m.addr, align 8 diff --git a/clang/test/CodeGenCXX/member-expr-references-variable.cpp b/clang/test/CodeGenCXX/member-expr-references-variable.cpp --- a/clang/test/CodeGenCXX/member-expr-references-variable.cpp +++ b/clang/test/CodeGenCXX/member-expr-references-variable.cpp @@ -21,22 +21,22 @@ void scalarStaticVariableInMemberExpr(Struct *ptr, Struct &ref) { use(1, Struct::name); -// CHECK: call void @_Z3useiPKc(i32 1, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @[[STR]], i32 0, i32 0)) +// CHECK: call void @_Z3useiPKc(i32 frozen 1, i8* frozen getelementptr inbounds ([4 x i8], [4 x i8]* @[[STR]], i32 0, i32 0)) Struct s; use(2, s.name); -// CHECK: call void @_Z3useiPKc(i32 2, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @[[STR]], i32 0, i32 0)) +// CHECK: call void @_Z3useiPKc(i32 frozen 2, i8* frozen getelementptr inbounds ([4 x i8], [4 x i8]* @[[STR]], i32 0, i32 0)) use(3, ptr->name); // CHECK: load %struct.Struct*, %struct.Struct** %{{.*}}, align 8 -// CHECK: call void @_Z3useiPKc(i32 3, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @[[STR]], i32 0, i32 0)) +// CHECK: call void @_Z3useiPKc(i32 frozen 3, i8* frozen getelementptr inbounds ([4 x i8], [4 x i8]* @[[STR]], i32 0, i32 0)) use(4, ref.name); // CHECK: load %struct.Struct*, %struct.Struct** %{{.*}}, align 8 -// CHECK: call void @_Z3useiPKc(i32 4, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @[[STR]], i32 0, i32 0)) +// CHECK: call void @_Z3useiPKc(i32 frozen 4, i8* frozen getelementptr inbounds ([4 x i8], [4 x i8]* @[[STR]], i32 0, i32 0)) use(5, Struct(2).name); -// CHECK: call void @_ZN6StructC1Ei(%struct.Struct* %{{.*}}, i32 2) -// CHECK: call void @_Z3useiPKc(i32 5, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @[[STR]], i32 0, i32 0)) +// CHECK: call void @_ZN6StructC1Ei(%struct.Struct* frozen %{{.*}}, i32 frozen 2) +// CHECK: call void @_Z3useiPKc(i32 frozen 5, i8* frozen getelementptr inbounds ([4 x i8], [4 x i8]* @[[STR]], i32 0, i32 0)) use(6, getPtr()->name); -// CHECK: call %struct.Struct* @_Z6getPtrv() -// CHECK: call void @_Z3useiPKc(i32 6, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @[[STR]], i32 0, i32 0)) +// CHECK: call frozen %struct.Struct* @_Z6getPtrv() +// CHECK: call void @_Z3useiPKc(i32 frozen 6, i8* frozen getelementptr inbounds ([4 x i8], [4 x i8]* @[[STR]], i32 0, i32 0)) } void use(int n, __complex float v); @@ -47,58 +47,58 @@ // CHECK: store float 0.000000e+00, float* %[[coerce0]].{{.*}}, align 4 // CHECK: %[[cast0:.*]] = bitcast { float, float }* %[[coerce0]] to <2 x float>* // CHECK: %[[vector0:.*]] = load <2 x float>, <2 x float>* %[[cast0]], align 4 -// CHECK: call void @_Z3useiCf(i32 1, <2 x float> %[[vector0]]) +// CHECK: call void @_Z3useiCf(i32 frozen 1, <2 x float> frozen %[[vector0]]) Struct s; use(2, s.complexValue); // CHECK: store float 4.200000e+01, float* %[[coerce1:.*]].{{.*}}, align 4 // CHECK: store float 0.000000e+00, float* %[[coerce1]].{{.*}}, align 4 // CHECK: %[[cast1:.*]] = bitcast { float, float }* %[[coerce1]] to <2 x float>* // CHECK: %[[vector1:.*]] = load <2 x float>, <2 x float>* %[[cast1]], align 4 -// CHECK: call void @_Z3useiCf(i32 2, <2 x float> %[[vector1]]) +// CHECK: call void @_Z3useiCf(i32 frozen 2, <2 x float> frozen %[[vector1]]) use(3, ptr->complexValue); // CHECK: load %struct.Struct*, %struct.Struct** %{{.*}}, align 8 // CHECK: store float 4.200000e+01, float* %[[coerce2:.*]].{{.*}}, align 4 // CHECK: store float 0.000000e+00, float* %[[coerce2]].{{.*}}, align 4 // CHECK: %[[cast2:.*]] = bitcast { float, float }* %[[coerce2]] to <2 x float>* // CHECK: %[[vector2:.*]] = load <2 x float>, <2 x float>* %[[cast2]], align 4 -// CHECK: call void @_Z3useiCf(i32 3, <2 x float> %[[vector2]]) +// CHECK: call void @_Z3useiCf(i32 frozen 3, <2 x float> frozen %[[vector2]]) use(4, ref.complexValue); // CHECK: load %struct.Struct*, %struct.Struct** %{{.*}}, align 8 // CHECK: store float 4.200000e+01, float* %[[coerce3:.*]].{{.*}}, align 4 // CHECK: store float 0.000000e+00, float* %[[coerce3]].{{.*}}, align 4 // CHECK: %[[cast3:.*]] = bitcast { float, float }* %[[coerce3]] to <2 x float>* // CHECK: %[[vector3:.*]] = load <2 x float>, <2 x float>* %[[cast3]], align 4 -// CHECK: call void @_Z3useiCf(i32 4, <2 x float> %[[vector3]]) +// CHECK: call void @_Z3useiCf(i32 frozen 4, <2 x float> frozen %[[vector3]]) use(5, Struct(2).complexValue); -// CHECK: call void @_ZN6StructC1Ei(%struct.Struct* %{{.*}}, i32 2) +// CHECK: call void @_ZN6StructC1Ei(%struct.Struct* frozen %{{.*}}, i32 frozen 2) // CHECK: store float 4.200000e+01, float* %[[coerce4:.*]].{{.*}}, align 4 // CHECK: store float 0.000000e+00, float* %[[coerce4]].{{.*}}, align 4 // CHECK: %[[cast4:.*]] = bitcast { float, float }* %[[coerce4]] to <2 x float>* // CHECK: %[[vector4:.*]] = load <2 x float>, <2 x float>* %[[cast4]], align 4 -// CHECK: call void @_Z3useiCf(i32 5, <2 x float> %[[vector4]]) +// CHECK: call void @_Z3useiCf(i32 frozen 5, <2 x float> frozen %[[vector4]]) use(6, getPtr()->complexValue); -// CHECK: call %struct.Struct* @_Z6getPtrv() +// CHECK: call frozen %struct.Struct* @_Z6getPtrv() // CHECK: store float 4.200000e+01, float* %[[coerce5:.*]].{{.*}}, align 4 // CHECK: store float 0.000000e+00, float* %[[coerce5]].{{.*}}, align 4 // CHECK: %[[cast5:.*]] = bitcast { float, float }* %[[coerce5]] to <2 x float>* // CHECK: %[[vector5:.*]] = load <2 x float>, <2 x float>* %[[cast5]], align 4 -// CHECK: call void @_Z3useiCf(i32 6, <2 x float> %[[vector5]]) +// CHECK: call void @_Z3useiCf(i32 frozen 6, <2 x float> frozen %[[vector5]]) } void aggregateRefInMemberExpr(Struct *ptr, Struct &ref) { use(1, Struct::agg.x); // CHECK: %[[value0:.*]] = load i8*, i8** getelementptr inbounds (%struct.Agg, %struct.Agg* @_ZGRN6Struct3aggE_, i32 0, i32 0), align 8 -// CHECK: call void @_Z3useiPKc(i32 1, i8* %[[value0]]) +// CHECK: call void @_Z3useiPKc(i32 frozen 1, i8* frozen %[[value0]]) Struct s; use(2, s.agg.x); // CHECK: %[[value1:.*]] = load i8*, i8** getelementptr inbounds (%struct.Agg, %struct.Agg* @_ZGRN6Struct3aggE_, i32 0, i32 0), align 8 -// CHECK: call void @_Z3useiPKc(i32 2, i8* %[[value1]]) +// CHECK: call void @_Z3useiPKc(i32 frozen 2, i8* frozen %[[value1]]) use(3, ptr->agg.x); // CHECK: load %struct.Struct*, %struct.Struct** %{{.*}}, align 8 // CHECK: %[[value2:.*]] = load i8*, i8** getelementptr inbounds (%struct.Agg, %struct.Agg* @_ZGRN6Struct3aggE_, i32 0, i32 0), align 8 -// CHECK: call void @_Z3useiPKc(i32 3, i8* %[[value2]]) +// CHECK: call void @_Z3useiPKc(i32 frozen 3, i8* frozen %[[value2]]) use(4, ref.agg.x); // CHECK: load %struct.Struct*, %struct.Struct** %{{.*}}, align 8 // CHECK: %[[value3:.*]] = load i8*, i8** getelementptr inbounds (%struct.Agg, %struct.Agg* @_ZGRN6Struct3aggE_, i32 0, i32 0), align 8 -// CHECK: call void @_Z3useiPKc(i32 4, i8* %[[value3]]) +// CHECK: call void @_Z3useiPKc(i32 frozen 4, i8* frozen %[[value3]]) } diff --git a/clang/test/CodeGenCXX/member-expressions.cpp b/clang/test/CodeGenCXX/member-expressions.cpp --- a/clang/test/CodeGenCXX/member-expressions.cpp +++ b/clang/test/CodeGenCXX/member-expressions.cpp @@ -29,7 +29,7 @@ void f(A *a) { A::E e1 = a->Foo; - // CHECK: call %struct.A* @_Z1gv() + // CHECK: call frozen %struct.A* @_Z1gv() A::E e2 = g()->Foo; // CHECK: call void @_ZN1AC1Ev( // CHECK: call void @_ZN1AD1Ev( @@ -58,7 +58,7 @@ extern C *c_ptr; - // CHECK-LABEL: define i32 @_ZN5test44testEv() + // CHECK-LABEL: define frozen i32 @_ZN5test44testEv() int test() { // CHECK: load {{.*}} @_ZN5test45c_ptrE // CHECK-NEXT: bitcast diff --git a/clang/test/CodeGenCXX/member-function-pointer-calls.cpp b/clang/test/CodeGenCXX/member-function-pointer-calls.cpp --- a/clang/test/CodeGenCXX/member-function-pointer-calls.cpp +++ b/clang/test/CodeGenCXX/member-function-pointer-calls.cpp @@ -10,21 +10,21 @@ return (a->*fp)(); } -// CHECK-LABEL: define i32 @_Z2g1v() +// CHECK-LABEL: define frozen i32 @_Z2g1v() // CHECK-NOT: } // CHECK: ret i32 1 -// MINGW64-LABEL: define dso_local i32 @_Z2g1v() -// MINGW64: call i32 @_Z1fP1AMS_FivE(%struct.A* %{{.*}}, { i64, i64 }* %{{.*}}) +// MINGW64-LABEL: define dso_local frozen i32 @_Z2g1v() +// MINGW64: call frozen i32 @_Z1fP1AMS_FivE(%struct.A* frozen %{{.*}}, { i64, i64 }* frozen %{{.*}}) int g1() { A a; return f(&a, &A::vf1); } -// CHECK-LABEL: define i32 @_Z2g2v() +// CHECK-LABEL: define frozen i32 @_Z2g2v() // CHECK-NOT: } // CHECK: ret i32 2 -// MINGW64-LABEL: define dso_local i32 @_Z2g2v() -// MINGW64: call i32 @_Z1fP1AMS_FivE(%struct.A* %{{.*}}, { i64, i64 }* %{{.*}}) +// MINGW64-LABEL: define dso_local frozen i32 @_Z2g2v() +// MINGW64: call frozen i32 @_Z1fP1AMS_FivE(%struct.A* frozen %{{.*}}, { i64, i64 }* frozen %{{.*}}) int g2() { A a; return f(&a, &A::vf2); diff --git a/clang/test/CodeGenCXX/member-init-assignment.cpp b/clang/test/CodeGenCXX/member-init-assignment.cpp --- a/clang/test/CodeGenCXX/member-init-assignment.cpp +++ b/clang/test/CodeGenCXX/member-init-assignment.cpp @@ -10,7 +10,7 @@ Foo::Foo(unsigned arg) : file_id(arg = 42) { } -// CHECK: define {{.*}} @_ZN3FooC2Ej(%struct.Foo* %this, i32 %arg) unnamed_addr +// CHECK: define {{.*}} @_ZN3FooC2Ej(%struct.Foo* frozen %this, i32 frozen %arg) unnamed_addr // CHECK: [[ARG:%.*]] = alloca i32 // CHECK: store i32 42, i32* [[ARG]] // CHECK: store i32 42, i32* %{{.*}} diff --git a/clang/test/CodeGenCXX/member-templates.cpp b/clang/test/CodeGenCXX/member-templates.cpp --- a/clang/test/CodeGenCXX/member-templates.cpp +++ b/clang/test/CodeGenCXX/member-templates.cpp @@ -15,8 +15,8 @@ template B::B(T) {} -// CHECK-LABEL: define weak_odr void @_ZN1BC2IiEET_(%struct.B* %this, i32 %0) unnamed_addr -// CHECK-LABEL: define weak_odr void @_ZN1BC1IiEET_(%struct.B* %this, i32 %0) unnamed_addr +// CHECK-LABEL: define weak_odr void @_ZN1BC2IiEET_(%struct.B* frozen %this, i32 frozen %0) unnamed_addr +// CHECK-LABEL: define weak_odr void @_ZN1BC1IiEET_(%struct.B* frozen %this, i32 frozen %0) unnamed_addr template B::B(int); template diff --git a/clang/test/CodeGenCXX/microsoft-abi-arg-order.cpp b/clang/test/CodeGenCXX/microsoft-abi-arg-order.cpp --- a/clang/test/CodeGenCXX/microsoft-abi-arg-order.cpp +++ b/clang/test/CodeGenCXX/microsoft-abi-arg-order.cpp @@ -18,16 +18,16 @@ // X86: %[[a:[^ ]*]] = getelementptr inbounds [[argmem_ty]], [[argmem_ty]]* %0, i32 0, i32 0 // X86: %[[b:[^ ]*]] = getelementptr inbounds [[argmem_ty]], [[argmem_ty]]* %0, i32 0, i32 1 // X86: %[[c:[^ ]*]] = getelementptr inbounds [[argmem_ty]], [[argmem_ty]]* %0, i32 0, i32 2 -// X86: call x86_thiscallcc void @"??1A@@QAE@XZ"(%struct.A* %[[a]]) -// X86: call x86_thiscallcc void @"??1A@@QAE@XZ"(%struct.A* %[[b]]) -// X86: call x86_thiscallcc void @"??1A@@QAE@XZ"(%struct.A* %[[c]]) +// X86: call x86_thiscallcc void @"??1A@@QAE@XZ"(%struct.A* frozen %[[a]]) +// X86: call x86_thiscallcc void @"??1A@@QAE@XZ"(%struct.A* frozen %[[b]]) +// X86: call x86_thiscallcc void @"??1A@@QAE@XZ"(%struct.A* frozen %[[c]]) // X86: ret void // X64-LABEL: define dso_local void @"?foo@@YAXUA@@00@Z" -// X64: (%struct.A* %[[a:[^,]*]], %struct.A* %[[b:[^,]*]], %struct.A* %[[c:[^)]*]]) -// X64: call void @"??1A@@QEAA@XZ"(%struct.A* %[[a]]) -// X64: call void @"??1A@@QEAA@XZ"(%struct.A* %[[b]]) -// X64: call void @"??1A@@QEAA@XZ"(%struct.A* %[[c]]) +// X64: (%struct.A* frozen %[[a:[^,]*]], %struct.A* frozen %[[b:[^,]*]], %struct.A* frozen %[[c:[^)]*]]) +// X64: call void @"??1A@@QEAA@XZ"(%struct.A* frozen %[[a]]) +// X64: call void @"??1A@@QEAA@XZ"(%struct.A* frozen %[[b]]) +// X64: call void @"??1A@@QEAA@XZ"(%struct.A* frozen %[[c]]) // X64: ret void @@ -42,35 +42,35 @@ // X86: call i8* @llvm.stacksave() // X86: %[[argmem:[^ ]*]] = alloca inalloca [[argmem_ty]] // X86: %[[arg3:[^ ]*]] = getelementptr inbounds [[argmem_ty]], [[argmem_ty]]* %[[argmem]], i32 0, i32 2 -// X86: call x86_thiscallcc %struct.A* @"??0A@@QAE@H@Z"(%struct.A* %[[arg3]], i32 3) +// X86: call x86_thiscallcc frozen %struct.A* @"??0A@@QAE@H@Z"(%struct.A* frozen %[[arg3]], i32 frozen 3) // X86: %[[arg2:[^ ]*]] = getelementptr inbounds [[argmem_ty]], [[argmem_ty]]* %[[argmem]], i32 0, i32 1 -// X86: invoke x86_thiscallcc %struct.A* @"??0A@@QAE@H@Z"(%struct.A* %[[arg2]], i32 2) +// X86: invoke x86_thiscallcc frozen %struct.A* @"??0A@@QAE@H@Z"(%struct.A* frozen %[[arg2]], i32 frozen 2) // X86: %[[arg1:[^ ]*]] = getelementptr inbounds [[argmem_ty]], [[argmem_ty]]* %[[argmem]], i32 0, i32 0 -// X86: invoke x86_thiscallcc %struct.A* @"??0A@@QAE@H@Z"(%struct.A* %[[arg1]], i32 1) +// X86: invoke x86_thiscallcc frozen %struct.A* @"??0A@@QAE@H@Z"(%struct.A* frozen %[[arg1]], i32 frozen 1) // X86: call void @"?foo@@YAXUA@@00@Z"([[argmem_ty]]* inalloca %[[argmem]]) // X86: call void @llvm.stackrestore // X86: ret void // // lpad2: // X86: cleanuppad within none [] -// X86: call x86_thiscallcc void @"??1A@@QAE@XZ"(%struct.A* %[[arg2]]) +// X86: call x86_thiscallcc void @"??1A@@QAE@XZ"(%struct.A* frozen %[[arg2]]) // X86: cleanupret // // ehcleanup: -// X86: call x86_thiscallcc void @"??1A@@QAE@XZ"(%struct.A* %[[arg3]]) +// X86: call x86_thiscallcc void @"??1A@@QAE@XZ"(%struct.A* frozen %[[arg3]]) // X64-LABEL: define dso_local void @"?call_foo@@YAXXZ"() -// X64: call %struct.A* @"??0A@@QEAA@H@Z"(%struct.A* %[[arg3:[^,]*]], i32 3) -// X64: invoke %struct.A* @"??0A@@QEAA@H@Z"(%struct.A* %[[arg2:[^,]*]], i32 2) -// X64: invoke %struct.A* @"??0A@@QEAA@H@Z"(%struct.A* %[[arg1:[^,]*]], i32 1) +// X64: call frozen %struct.A* @"??0A@@QEAA@H@Z"(%struct.A* frozen %[[arg3:[^,]*]], i32 frozen 3) +// X64: invoke frozen %struct.A* @"??0A@@QEAA@H@Z"(%struct.A* frozen %[[arg2:[^,]*]], i32 frozen 2) +// X64: invoke frozen %struct.A* @"??0A@@QEAA@H@Z"(%struct.A* frozen %[[arg1:[^,]*]], i32 frozen 1) // X64: call void @"?foo@@YAXUA@@00@Z" -// X64: (%struct.A* %[[arg1]], %struct.A* %[[arg2]], %struct.A* %[[arg3]]) +// X64: (%struct.A* frozen %[[arg1]], %struct.A* frozen %[[arg2]], %struct.A* frozen %[[arg3]]) // X64: ret void // // lpad2: // X64: cleanuppad within none [] -// X64: call void @"??1A@@QEAA@XZ"(%struct.A* %[[arg2]]) +// X64: call void @"??1A@@QEAA@XZ"(%struct.A* frozen %[[arg2]]) // X64: cleanupret // // ehcleanup: -// X64: call void @"??1A@@QEAA@XZ"(%struct.A* %[[arg3]]) +// X64: call void @"??1A@@QEAA@XZ"(%struct.A* frozen %[[arg3]]) diff --git a/clang/test/CodeGenCXX/microsoft-abi-array-cookies.cpp b/clang/test/CodeGenCXX/microsoft-abi-array-cookies.cpp --- a/clang/test/CodeGenCXX/microsoft-abi-array-cookies.cpp +++ b/clang/test/CodeGenCXX/microsoft-abi-array-cookies.cpp @@ -7,7 +7,7 @@ void check_array_no_cookies() { // CHECK: define dso_local void @"?check_array_no_cookies@@YAXXZ"() [[NUW:#[0-9]+]] -// CHECK: call noalias nonnull i8* @"??_U@YAPAXI@Z"(i32 42) +// CHECK: call frozen noalias nonnull i8* @"??_U@YAPAXI@Z"(i32 frozen 42) ClassWithoutDtor *array = new ClassWithoutDtor[42]; // CHECK: call void @"??_V@YAXPAX@Z"( @@ -24,7 +24,7 @@ // CHECK: define {{.*}} @"?check_array_cookies_simple@@YAXXZ"() ClassWithDtor *array = new ClassWithDtor[42]; -// CHECK: [[ALLOCATED:%.*]] = call noalias nonnull i8* @"??_U@YAPAXI@Z"(i32 46) +// CHECK: [[ALLOCATED:%.*]] = call frozen noalias nonnull i8* @"??_U@YAPAXI@Z"(i32 frozen 46) // 46 = 42 + size of cookie (4) // CHECK: [[COOKIE:%.*]] = bitcast i8* [[ALLOCATED]] to i32* // CHECK: store i32 42, i32* [[COOKIE]] @@ -46,7 +46,7 @@ void check_array_cookies_aligned() { // CHECK: define {{.*}} @"?check_array_cookies_aligned@@YAXXZ"() ClassWithAlignment *array = new ClassWithAlignment[42]; -// CHECK: [[ALLOCATED:%.*]] = call noalias nonnull i8* @"??_U@YAPAXI@Z"(i32 344) +// CHECK: [[ALLOCATED:%.*]] = call frozen noalias nonnull i8* @"??_U@YAPAXI@Z"(i32 frozen 344) // 344 = 42*8 + size of cookie (8, due to alignment) // CHECK: [[COOKIE:%.*]] = bitcast i8* [[ALLOCATED]] to i32* // CHECK: store i32 42, i32* [[COOKIE]] @@ -63,7 +63,7 @@ char x[42]; void operator delete[](void *p, __SIZE_TYPE__); // CHECK-LABEL: define dso_local void @"?delete_s@PR23990@@YAXPAUS@1@@Z"( - // CHECK: call void @"??_VS@PR23990@@SAXPAXI@Z"(i8* {{.*}}, i32 42) + // CHECK: call void @"??_VS@PR23990@@SAXPAXI@Z"(i8* {{.*}}, i32 frozen 42) }; void delete_s(S *s) { delete[] s; } } diff --git a/clang/test/CodeGenCXX/microsoft-abi-byval-sret.cpp b/clang/test/CodeGenCXX/microsoft-abi-byval-sret.cpp --- a/clang/test/CodeGenCXX/microsoft-abi-byval-sret.cpp +++ b/clang/test/CodeGenCXX/microsoft-abi-byval-sret.cpp @@ -19,7 +19,7 @@ } // CHECK-LABEL: define dso_local x86_thiscallcc %struct.A* @"?foo@B@@QAE?AUA@@U2@@Z" -// CHECK: (%struct.B* %this, <{ %struct.A*, %struct.A }>* inalloca %0) +// CHECK: (%struct.B* frozen %this, <{ %struct.A*, %struct.A }>* inalloca %0) // CHECK: getelementptr inbounds <{ %struct.A*, %struct.A }>, <{ %struct.A*, %struct.A }>* %{{.*}}, i32 0, i32 0 // CHECK: load %struct.A*, %struct.A** // CHECK: ret %struct.A* @@ -49,7 +49,7 @@ } // CHECK-LABEL: define dso_local x86_fastcallcc void @"?qux@B@@QAI?AUA@@U2@@Z" -// CHECK: (%struct.B* inreg %this, %struct.A* inreg noalias sret align 4 %agg.result, <{ %struct.A }>* inalloca %0) +// CHECK: (%struct.B* frozen inreg %this, %struct.A* inreg noalias sret align 4 %agg.result, <{ %struct.A }>* inalloca %0) // CHECK: ret void int main() { @@ -61,10 +61,10 @@ } // CHECK: call x86_thiscallcc %struct.A* @"?foo@B@@QAE?AUA@@U2@@Z" -// CHECK: (%struct.B* %{{[^,]*}}, <{ %struct.A*, %struct.A }>* inalloca %{{[^,]*}}) +// CHECK: (%struct.B* frozen %{{[^,]*}}, <{ %struct.A*, %struct.A }>* inalloca %{{[^,]*}}) // CHECK: call %struct.A* @"?bar@B@@QAA?AUA@@U2@@Z" // CHECK: (<{ %struct.B*, %struct.A*, %struct.A }>* inalloca %{{[^,]*}}) // CHECK: call x86_stdcallcc %struct.A* @"?baz@B@@QAG?AUA@@U2@@Z" // CHECK: (<{ %struct.B*, %struct.A*, %struct.A }>* inalloca %{{[^,]*}}) // CHECK: call x86_fastcallcc void @"?qux@B@@QAI?AUA@@U2@@Z" -// CHECK: (%struct.B* inreg %{{[^,]*}}, %struct.A* inreg sret align 4 %{{.*}}, <{ %struct.A }>* inalloca %{{[^,]*}}) +// CHECK: (%struct.B* frozen inreg %{{[^,]*}}, %struct.A* inreg sret align 4 %{{.*}}, <{ %struct.A }>* inalloca %{{[^,]*}}) diff --git a/clang/test/CodeGenCXX/microsoft-abi-byval-thunks.cpp b/clang/test/CodeGenCXX/microsoft-abi-byval-thunks.cpp --- a/clang/test/CodeGenCXX/microsoft-abi-byval-thunks.cpp +++ b/clang/test/CodeGenCXX/microsoft-abi-byval-thunks.cpp @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 %s -fno-rtti -triple=i686-pc-win32 -emit-llvm -o - | FileCheck --check-prefix=CHECK32 %s -// RUN: %clang_cc1 %s -fno-rtti -triple=x86_64-pc-win32 -emit-llvm -o - | FileCheck --check-prefix=CHECK64 %s +// RUN: %clang_cc1 -disable-frozen-args %s -fno-rtti -triple=i686-pc-win32 -emit-llvm -o - | FileCheck --check-prefix=CHECK32 %s +// RUN: %clang_cc1 -disable-frozen-args %s -fno-rtti -triple=x86_64-pc-win32 -emit-llvm -o - | FileCheck --check-prefix=CHECK64 %s namespace byval_thunk { struct Agg { diff --git a/clang/test/CodeGenCXX/microsoft-abi-byval-vararg.cpp b/clang/test/CodeGenCXX/microsoft-abi-byval-vararg.cpp --- a/clang/test/CodeGenCXX/microsoft-abi-byval-vararg.cpp +++ b/clang/test/CodeGenCXX/microsoft-abi-byval-vararg.cpp @@ -19,14 +19,14 @@ return sum; } -// CHECK-LABEL: define dso_local i32 @"?foo@@YAHUA@@ZZ"(<{ %struct.A }>* inalloca %0, ...) +// CHECK-LABEL: define dso_local frozen i32 @"?foo@@YAHUA@@ZZ"(<{ %struct.A }>* inalloca %0, ...) int main() { return foo(A(3), 1, 2, 3); } -// CHECK-LABEL: define dso_local i32 @main() +// CHECK-LABEL: define dso_local frozen i32 @main() // CHECK: %[[argmem:[^ ]*]] = alloca inalloca <{ %struct.A, i32, i32, i32 }> -// CHECK: call i32 {{.*bitcast.*}}@"?foo@@YAHUA@@ZZ"{{.*}}(<{ %struct.A, i32, i32, i32 }>* inalloca %[[argmem]]) +// CHECK: call frozen i32 {{.*bitcast.*}}@"?foo@@YAHUA@@ZZ"{{.*}}(<{ %struct.A, i32, i32, i32 }>* inalloca %[[argmem]]) void varargs_zero(...); void varargs_one(int, ...); @@ -47,6 +47,6 @@ // CHECK: call void {{.*bitcast.*varargs_three.*}}(<{ i32, i32, i32, %struct.A }>* inalloca %{{.*}}) // CHECK-LABEL: declare dso_local void @"?varargs_zero@@YAXZZ"(...) -// CHECK-LABEL: declare dso_local void @"?varargs_one@@YAXHZZ"(i32, ...) -// CHECK-LABEL: declare dso_local void @"?varargs_two@@YAXHHZZ"(i32, i32, ...) -// CHECK-LABEL: declare dso_local void @"?varargs_three@@YAXHHHZZ"(i32, i32, i32, ...) +// CHECK-LABEL: declare dso_local void @"?varargs_one@@YAXHZZ"(i32 frozen, ...) +// CHECK-LABEL: declare dso_local void @"?varargs_two@@YAXHHZZ"(i32 frozen, i32 frozen, ...) +// CHECK-LABEL: declare dso_local void @"?varargs_three@@YAXHHHZZ"(i32 frozen, i32 frozen, i32 frozen, ...) diff --git a/clang/test/CodeGenCXX/microsoft-abi-cdecl-method-sret.cpp b/clang/test/CodeGenCXX/microsoft-abi-cdecl-method-sret.cpp --- a/clang/test/CodeGenCXX/microsoft-abi-cdecl-method-sret.cpp +++ b/clang/test/CodeGenCXX/microsoft-abi-cdecl-method-sret.cpp @@ -19,9 +19,9 @@ S C::cdecl_sret() { return S(); } S C::byval_and_sret(S a) { return S(); } -// CHECK: define dso_local void @"?variadic_sret@C@@QAA?AUS@@PBDZZ"(%struct.C* %this, %struct.S* noalias sret align 4 %agg.result, i8* %f, ...) -// CHECK: define dso_local void @"?cdecl_sret@C@@QAA?AUS@@XZ"(%struct.C* %this, %struct.S* noalias sret align 4 %agg.result) -// CHECK: define dso_local void @"?byval_and_sret@C@@QAA?AUS@@U2@@Z"(%struct.C* %this, %struct.S* noalias sret align 4 %agg.result, %struct.S* byval(%struct.S) align 4 %a) +// CHECK: define dso_local void @"?variadic_sret@C@@QAA?AUS@@PBDZZ"(%struct.C* frozen %this, %struct.S* noalias sret align 4 %agg.result, i8* frozen %f, ...) +// CHECK: define dso_local void @"?cdecl_sret@C@@QAA?AUS@@XZ"(%struct.C* frozen %this, %struct.S* noalias sret align 4 %agg.result) +// CHECK: define dso_local void @"?byval_and_sret@C@@QAA?AUS@@U2@@Z"(%struct.C* frozen %this, %struct.S* noalias sret align 4 %agg.result, %struct.S* frozen byval(%struct.S) align 4 %a) int main() { C c; @@ -29,7 +29,7 @@ c.cdecl_sret(); c.byval_and_sret(S()); } -// CHECK-LABEL: define dso_local i32 @main() +// CHECK-LABEL: define dso_local frozen i32 @main() // CHECK: call void {{.*}} @"?variadic_sret@C@@QAA?AUS@@PBDZZ" // CHECK: call void @"?cdecl_sret@C@@QAA?AUS@@XZ" // CHECK: call void @"?byval_and_sret@C@@QAA?AUS@@U2@@Z" @@ -41,4 +41,4 @@ S A::f(int x) { return S(); } -// CHECK-LABEL: define dso_local x86_fastcallcc void @"?f@A@@QAI?AUS@@H@Z"(%struct.A* inreg %this, %struct.S* inreg noalias sret align 4 %agg.result, i32 %x) +// CHECK-LABEL: define dso_local x86_fastcallcc void @"?f@A@@QAI?AUS@@H@Z"(%struct.A* frozen inreg %this, %struct.S* inreg noalias sret align 4 %agg.result, i32 frozen %x) diff --git a/clang/test/CodeGenCXX/microsoft-abi-dynamic-cast.cpp b/clang/test/CodeGenCXX/microsoft-abi-dynamic-cast.cpp --- a/clang/test/CodeGenCXX/microsoft-abi-dynamic-cast.cpp +++ b/clang/test/CodeGenCXX/microsoft-abi-dynamic-cast.cpp @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -emit-llvm -O1 -o - -fexceptions -triple=i386-pc-win32 %s | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args -emit-llvm -O1 -o - -fexceptions -triple=i386-pc-win32 %s | FileCheck %s struct S { char a; }; struct V { virtual void f(); }; @@ -7,18 +7,18 @@ struct T {}; T* test0() { return dynamic_cast((B*)0); } -// CHECK-LABEL: define dso_local noalias %struct.T* @"?test0@@YAPAUT@@XZ"() +// CHECK-LABEL: define dso_local frozen noalias %struct.T* @"?test0@@YAPAUT@@XZ"() // CHECK: ret %struct.T* null T* test1(V* x) { return &dynamic_cast(*x); } -// CHECK-LABEL: define dso_local %struct.T* @"?test1@@YAPAUT@@PAUV@@@Z"(%struct.V* %x) +// CHECK-LABEL: define dso_local frozen %struct.T* @"?test1@@YAPAUT@@PAUV@@@Z"(%struct.V* %x) // CHECK: [[CAST:%.*]] = bitcast %struct.V* %x to i8* // CHECK-NEXT: [[CALL:%.*]] = call i8* @__RTDynamicCast(i8* [[CAST]], i32 0, i8* bitcast (%rtti.TypeDescriptor7* @"??_R0?AUV@@@8" to i8*), i8* bitcast (%rtti.TypeDescriptor7* @"??_R0?AUT@@@8" to i8*), i32 1) // CHECK-NEXT: [[RET:%.*]] = bitcast i8* [[CALL]] to %struct.T* // CHECK-NEXT: ret %struct.T* [[RET]] T* test2(A* x) { return &dynamic_cast(*x); } -// CHECK-LABEL: define dso_local %struct.T* @"?test2@@YAPAUT@@PAUA@@@Z"(%struct.A* %x) +// CHECK-LABEL: define dso_local frozen %struct.T* @"?test2@@YAPAUT@@PAUA@@@Z"(%struct.A* %x) // CHECK: [[CAST:%.*]] = bitcast %struct.A* %x to i8* // CHECK-NEXT: [[VBPTRPTR:%.*]] = getelementptr %struct.A, %struct.A* %x, i32 0, i32 0 // CHECK-NEXT: [[VBTBL:%.*]] = load i32*, i32** [[VBPTRPTR]], align 4 @@ -30,7 +30,7 @@ // CHECK-NEXT: ret %struct.T* [[RET]] T* test3(B* x) { return &dynamic_cast(*x); } -// CHECK-LABEL: define dso_local %struct.T* @"?test3@@YAPAUT@@PAUB@@@Z"(%struct.B* %x) +// CHECK-LABEL: define dso_local frozen %struct.T* @"?test3@@YAPAUT@@PAUB@@@Z"(%struct.B* %x) // CHECK: [[VOIDP:%.*]] = getelementptr %struct.B, %struct.B* %x, i32 0, i32 0, i32 0 // CHECK-NEXT: [[VBPTR:%.*]] = getelementptr inbounds i8, i8* [[VOIDP]], i32 4 // CHECK-NEXT: [[VBPTRPTR:%.*]] = bitcast i8* [[VBPTR:%.*]] to i32** @@ -44,14 +44,14 @@ // CHECK-NEXT: ret %struct.T* [[RET]] T* test4(V* x) { return dynamic_cast(x); } -// CHECK-LABEL: define dso_local %struct.T* @"?test4@@YAPAUT@@PAUV@@@Z"(%struct.V* %x) +// CHECK-LABEL: define dso_local frozen %struct.T* @"?test4@@YAPAUT@@PAUV@@@Z"(%struct.V* %x) // CHECK: [[CAST:%.*]] = bitcast %struct.V* %x to i8* // CHECK-NEXT: [[CALL:%.*]] = call i8* @__RTDynamicCast(i8* [[CAST]], i32 0, i8* bitcast (%rtti.TypeDescriptor7* @"??_R0?AUV@@@8" to i8*), i8* bitcast (%rtti.TypeDescriptor7* @"??_R0?AUT@@@8" to i8*), i32 0) // CHECK-NEXT: [[RET:%.*]] = bitcast i8* [[CALL]] to %struct.T* // CHECK-NEXT: ret %struct.T* [[RET]] T* test5(A* x) { return dynamic_cast(x); } -// CHECK-LABEL: define dso_local %struct.T* @"?test5@@YAPAUT@@PAUA@@@Z"(%struct.A* %x) +// CHECK-LABEL: define dso_local frozen %struct.T* @"?test5@@YAPAUT@@PAUA@@@Z"(%struct.A* %x) // CHECK: [[CHECK:%.*]] = icmp eq %struct.A* %x, null // CHECK-NEXT: br i1 [[CHECK]] // CHECK: [[VOIDP:%.*]] = bitcast %struct.A* %x to i8* @@ -67,7 +67,7 @@ // CHECK-NEXT: ret %struct.T* [[RET]] T* test6(B* x) { return dynamic_cast(x); } -// CHECK-LABEL: define dso_local %struct.T* @"?test6@@YAPAUT@@PAUB@@@Z"(%struct.B* %x) +// CHECK-LABEL: define dso_local frozen %struct.T* @"?test6@@YAPAUT@@PAUB@@@Z"(%struct.B* %x) // CHECK: [[CHECK:%.*]] = icmp eq %struct.B* %x, null // CHECK-NEXT: br i1 [[CHECK]] // CHECK: [[CAST:%.*]] = getelementptr %struct.B, %struct.B* %x, i32 0, i32 0, i32 0 @@ -85,13 +85,13 @@ // CHECK-NEXT: ret %struct.T* [[RET]] void* test7(V* x) { return dynamic_cast(x); } -// CHECK-LABEL: define dso_local i8* @"?test7@@YAPAXPAUV@@@Z"(%struct.V* %x) +// CHECK-LABEL: define dso_local frozen i8* @"?test7@@YAPAXPAUV@@@Z"(%struct.V* %x) // CHECK: [[CAST:%.*]] = bitcast %struct.V* %x to i8* // CHECK-NEXT: [[RET:%.*]] = call i8* @__RTCastToVoid(i8* [[CAST]]) // CHECK-NEXT: ret i8* [[RET]] void* test8(A* x) { return dynamic_cast(x); } -// CHECK-LABEL: define dso_local i8* @"?test8@@YAPAXPAUA@@@Z"(%struct.A* %x) +// CHECK-LABEL: define dso_local frozen i8* @"?test8@@YAPAXPAUA@@@Z"(%struct.A* %x) // CHECK: [[CHECK:%.*]] = icmp eq %struct.A* %x, null // CHECK-NEXT: br i1 [[CHECK]] // CHECK: [[VOIDP:%.*]] = bitcast %struct.A* %x to i8* @@ -106,7 +106,7 @@ // CHECK-NEXT: ret i8* [[RET]] void* test9(B* x) { return dynamic_cast(x); } -// CHECK-LABEL: define dso_local i8* @"?test9@@YAPAXPAUB@@@Z"(%struct.B* %x) +// CHECK-LABEL: define dso_local frozen i8* @"?test9@@YAPAXPAUB@@@Z"(%struct.B* %x) // CHECK: [[CHECK:%.*]] = icmp eq %struct.B* %x, null // CHECK-NEXT: br i1 [[CHECK]] // CHECK: [[CAST:%.*]] = getelementptr %struct.B, %struct.B* %x, i32 0, i32 0, i32 0 @@ -134,7 +134,7 @@ Cleanup c; return dynamic_cast(&s); } -// CHECK-LABEL: define dso_local %"struct.PR25606::S3"* @"?f@PR25606@@YAPAUS3@1@AAUS2@1@@Z"( +// CHECK-LABEL: define dso_local frozen %"struct.PR25606::S3"* @"?f@PR25606@@YAPAUS3@1@AAUS2@1@@Z"( // CHECK: [[CALL:%.*]] = invoke i8* @__RTDynamicCast // CHECK: [[BC:%.*]] = bitcast i8* [[CALL]] to %"struct.PR25606::S3"* diff --git a/clang/test/CodeGenCXX/microsoft-abi-eh-catch.cpp b/clang/test/CodeGenCXX/microsoft-abi-eh-catch.cpp --- a/clang/test/CodeGenCXX/microsoft-abi-eh-catch.cpp +++ b/clang/test/CodeGenCXX/microsoft-abi-eh-catch.cpp @@ -57,7 +57,7 @@ // WIN64: %[[e_i8:[^ ]*]] = bitcast i32* %[[e_addr]] to i8* // WIN64-NOT: lifetime.start // WIN64: call void @handle_exception -// WIN64-SAME: (i8* %[[e_i8]]) +// WIN64-SAME: (i8* frozen %[[e_i8]]) // WIN64-NOT: lifetime.end // WIN64: catchret @@ -98,7 +98,7 @@ // WIN64: %[[e_addr:[^ ]*]] = alloca %struct.A // WIN64: catchpad within %{{[^ ]*}} [%rtti.TypeDescriptor7* @"??_R0?AUA@@@8", i32 0, %struct.A* %[[e_addr]]] // WIN64: %[[e_i8:[^ ]*]] = bitcast %struct.A* %[[e_addr]] to i8* -// WIN64: call void @handle_exception(i8* %[[e_i8]]) +// WIN64: call void @handle_exception(i8* frozen %[[e_i8]]) // WIN64: catchret extern "C" void catch_a_ref() { @@ -114,7 +114,7 @@ // WIN64: catchpad within %{{[^ ]*}} [%rtti.TypeDescriptor7* @"??_R0?AUA@@@8", i32 8, %struct.A** %[[e_addr]]] // WIN64: %[[eptr:[^ ]*]] = load %struct.A*, %struct.A** %[[e_addr]] // WIN64: %[[eptr_i8:[^ ]*]] = bitcast %struct.A* %[[eptr]] to i8* -// WIN64: call void @handle_exception(i8* %[[eptr_i8]]) +// WIN64: call void @handle_exception(i8* frozen %[[eptr_i8]]) // WIN64: catchret extern "C" void fn_with_exc_spec() throw(int) { diff --git a/clang/test/CodeGenCXX/microsoft-abi-eh-cleanups.cpp b/clang/test/CodeGenCXX/microsoft-abi-eh-cleanups.cpp --- a/clang/test/CodeGenCXX/microsoft-abi-eh-cleanups.cpp +++ b/clang/test/CodeGenCXX/microsoft-abi-eh-cleanups.cpp @@ -15,14 +15,14 @@ } // With exceptions, we need to clean up at least one of these temporaries. -// WIN32-LABEL: define dso_local void @"?HasEHCleanup@@YAXXZ"() {{.*}} { +// WIN32-LABEL: define dso_local void @"?HasEHCleanup@@YAXXZ"() {{.*}} // WIN32: %[[base:.*]] = call i8* @llvm.stacksave() // If this call throws, we have to restore the stack. // WIN32: call void @"?getA@@YA?AUA@@XZ"(%struct.A* sret align 4 %{{.*}}) // If this call throws, we have to cleanup the first temporary. // WIN32: invoke void @"?getA@@YA?AUA@@XZ"(%struct.A* sret align 4 %{{.*}}) // If this call throws, we have to cleanup the stacksave. -// WIN32: call i32 @"?TakesTwo@@YAHUA@@0@Z" +// WIN32: call frozen i32 @"?TakesTwo@@YAHUA@@0@Z" // WIN32: call void @llvm.stackrestore // WIN32: ret void // @@ -37,24 +37,24 @@ return TakesTwo((TakeRef(A()), A()), (TakeRef(A()), A())); } -// WIN32-LABEL: define dso_local i32 @"?HasDeactivatedCleanups@@YAHXZ"() {{.*}} { +// WIN32-LABEL: define dso_local frozen i32 @"?HasDeactivatedCleanups@@YAHXZ"() {{.*}} // WIN32: %[[isactive:.*]] = alloca i1 // WIN32: call i8* @llvm.stacksave() // WIN32: %[[argmem:.*]] = alloca inalloca [[argmem_ty:<{ %struct.A, %struct.A }>]] // WIN32: %[[arg1:.*]] = getelementptr inbounds [[argmem_ty]], [[argmem_ty]]* %[[argmem]], i32 0, i32 1 -// WIN32: call x86_thiscallcc %struct.A* @"??0A@@QAE@XZ" +// WIN32: call x86_thiscallcc frozen %struct.A* @"??0A@@QAE@XZ" // WIN32: invoke void @"?TakeRef@@YAXABUA@@@Z" // -// WIN32: invoke x86_thiscallcc %struct.A* @"??0A@@QAE@XZ"(%struct.A* %[[arg1]]) +// WIN32: invoke x86_thiscallcc frozen %struct.A* @"??0A@@QAE@XZ"(%struct.A* frozen %[[arg1]]) // WIN32: store i1 true, i1* %[[isactive]] // // WIN32: %[[arg0:.*]] = getelementptr inbounds [[argmem_ty]], [[argmem_ty]]* %[[argmem]], i32 0, i32 0 -// WIN32: invoke x86_thiscallcc %struct.A* @"??0A@@QAE@XZ" +// WIN32: invoke x86_thiscallcc frozen %struct.A* @"??0A@@QAE@XZ" // WIN32: invoke void @"?TakeRef@@YAXABUA@@@Z" -// WIN32: invoke x86_thiscallcc %struct.A* @"??0A@@QAE@XZ" +// WIN32: invoke x86_thiscallcc frozen %struct.A* @"??0A@@QAE@XZ" // WIN32: store i1 false, i1* %[[isactive]] // -// WIN32: invoke i32 @"?TakesTwo@@YAHUA@@0@Z"([[argmem_ty]]* inalloca %[[argmem]]) +// WIN32: invoke frozen i32 @"?TakesTwo@@YAHUA@@0@Z"([[argmem_ty]]* inalloca %[[argmem]]) // Destroy the two const ref temporaries. // WIN32: call x86_thiscallcc void @"??1A@@QAE@XZ"({{.*}}) // WIN32: call x86_thiscallcc void @"??1A@@QAE@XZ"({{.*}}) @@ -63,7 +63,7 @@ // Conditionally destroy arg1. // WIN32: %[[cond:.*]] = load i1, i1* %[[isactive]] // WIN32: br i1 %[[cond]] -// WIN32: call x86_thiscallcc void @"??1A@@QAE@XZ"(%struct.A* %[[arg1]]) +// WIN32: call x86_thiscallcc void @"??1A@@QAE@XZ"(%struct.A* frozen %[[arg1]]) // WIN32: } // Test putting the cleanups inside a conditional. @@ -72,18 +72,18 @@ return (cond ? TakesTwo(A(), A()) : CouldThrow()); } -// WIN32-LABEL: define dso_local i32 @"?HasConditionalCleanup@@YAH_N@Z"(i1 zeroext %{{.*}}) {{.*}} { +// WIN32-LABEL: define dso_local frozen i32 @"?HasConditionalCleanup@@YAH_N@Z"(i1 frozen zeroext %{{.*}}) {{.*}} // WIN32: store i1 false // WIN32: br i1 // WIN32: call i8* @llvm.stacksave() -// WIN32: call x86_thiscallcc %struct.A* @"??0A@@QAE@XZ"(%struct.A* %{{.*}}) +// WIN32: call x86_thiscallcc frozen %struct.A* @"??0A@@QAE@XZ"(%struct.A* frozen %{{.*}}) // WIN32: store i1 true -// WIN32: invoke x86_thiscallcc %struct.A* @"??0A@@QAE@XZ"(%struct.A* %{{.*}}) -// WIN32: call i32 @"?TakesTwo@@YAHUA@@0@Z" +// WIN32: invoke x86_thiscallcc frozen %struct.A* @"??0A@@QAE@XZ"(%struct.A* frozen %{{.*}}) +// WIN32: call frozen i32 @"?TakesTwo@@YAHUA@@0@Z" // // WIN32: call void @llvm.stackrestore // -// WIN32: call i32 @"?CouldThrow@@YAHXZ"() +// WIN32: call frozen i32 @"?CouldThrow@@YAHXZ"() // // Only one dtor in the invoke for arg1 // WIN32: call x86_thiscallcc void @"??1A@@QAE@XZ"({{.*}}) @@ -95,7 +95,7 @@ return (cond ? TakesTwo((TakeRef(A()), A()), (TakeRef(A()), A())) : CouldThrow()); } -// WIN32-O0-LABEL: define dso_local i32 @"?HasConditionalDeactivatedCleanups@@YAH_N@Z"{{.*}} { +// WIN32-O0-LABEL: define dso_local frozen i32 @"?HasConditionalDeactivatedCleanups@@YAH_N@Z"{{.*}} { // WIN32-O0: alloca i1 // WIN32-O0: %[[arg1_cond:.*]] = alloca i1 // Start all four cleanups as deactivated. @@ -105,20 +105,20 @@ // WIN32-O0: store i1 false // WIN32-O0: br i1 // True condition. -// WIN32-O0: call x86_thiscallcc %struct.A* @"??0A@@QAE@XZ" +// WIN32-O0: call x86_thiscallcc frozen %struct.A* @"??0A@@QAE@XZ" // WIN32-O0: store i1 true // WIN32-O0: invoke void @"?TakeRef@@YAXABUA@@@Z" -// WIN32-O0: invoke x86_thiscallcc %struct.A* @"??0A@@QAE@XZ" +// WIN32-O0: invoke x86_thiscallcc frozen %struct.A* @"??0A@@QAE@XZ" // WIN32-O0: store i1 true, i1* %[[arg1_cond]] -// WIN32-O0: invoke x86_thiscallcc %struct.A* @"??0A@@QAE@XZ" +// WIN32-O0: invoke x86_thiscallcc frozen %struct.A* @"??0A@@QAE@XZ" // WIN32-O0: store i1 true // WIN32-O0: invoke void @"?TakeRef@@YAXABUA@@@Z" -// WIN32-O0: invoke x86_thiscallcc %struct.A* @"??0A@@QAE@XZ" +// WIN32-O0: invoke x86_thiscallcc frozen %struct.A* @"??0A@@QAE@XZ" // WIN32-O0: store i1 true // WIN32-O0: store i1 false, i1* %[[arg1_cond]] -// WIN32-O0: invoke i32 @"?TakesTwo@@YAHUA@@0@Z" +// WIN32-O0: invoke frozen i32 @"?TakesTwo@@YAHUA@@0@Z" // False condition. -// WIN32-O0: invoke i32 @"?CouldThrow@@YAHXZ"() +// WIN32-O0: invoke frozen i32 @"?CouldThrow@@YAHXZ"() // Two normal cleanups for TakeRef args. // WIN32-O0: call x86_thiscallcc void @"??1A@@QAE@XZ"({{.*}}) // WIN32-O0-NOT: invoke x86_thiscallcc void @"??1A@@QAE@XZ" @@ -130,7 +130,7 @@ // WIN32-O0: call x86_thiscallcc void @"??1A@@QAE@XZ"({{.*}}) // WIN32-O0: } -// WIN32-O3-LABEL: define dso_local i32 @"?HasConditionalDeactivatedCleanups@@YAH_N@Z"{{.*}} { +// WIN32-O3-LABEL: define dso_local frozen i32 @"?HasConditionalDeactivatedCleanups@@YAH_N@Z"{{.*}} { // WIN32-O3: alloca i1 // WIN32-O3: alloca i1 // WIN32-O3: %[[arg1_cond:.*]] = alloca i1 @@ -143,20 +143,20 @@ // WIN32-O3: store i1 false // WIN32-O3: br i1 // True condition. -// WIN32-O3: call x86_thiscallcc %struct.A* @"??0A@@QAE@XZ" +// WIN32-O3: call x86_thiscallcc frozen %struct.A* @"??0A@@QAE@XZ" // WIN32-O3: store i1 true // WIN32-O3: invoke void @"?TakeRef@@YAXABUA@@@Z" -// WIN32-O3: invoke x86_thiscallcc %struct.A* @"??0A@@QAE@XZ" +// WIN32-O3: invoke x86_thiscallcc frozen %struct.A* @"??0A@@QAE@XZ" // WIN32-O3: store i1 true, i1* %[[arg1_cond]] -// WIN32-O3: invoke x86_thiscallcc %struct.A* @"??0A@@QAE@XZ" +// WIN32-O3: invoke x86_thiscallcc frozen %struct.A* @"??0A@@QAE@XZ" // WIN32-O3: store i1 true // WIN32-O3: invoke void @"?TakeRef@@YAXABUA@@@Z" -// WIN32-O3: invoke x86_thiscallcc %struct.A* @"??0A@@QAE@XZ" +// WIN32-O3: invoke x86_thiscallcc frozen %struct.A* @"??0A@@QAE@XZ" // WIN32-O3: store i1 true // WIN32-O3: store i1 false, i1* %[[arg1_cond]] -// WIN32-O3: invoke i32 @"?TakesTwo@@YAHUA@@0@Z" +// WIN32-O3: invoke frozen i32 @"?TakesTwo@@YAHUA@@0@Z" // False condition. -// WIN32-O3: invoke i32 @"?CouldThrow@@YAHXZ"() +// WIN32-O3: invoke frozen i32 @"?CouldThrow@@YAHXZ"() // Two normal cleanups for TakeRef args. // WIN32-O3: call x86_thiscallcc void @"??1A@@QAE@XZ"({{.*}}) // WIN32-O3-NOT: invoke x86_thiscallcc void @"??1A@@QAE@XZ" @@ -240,10 +240,10 @@ } // WIN32-LABEL: define dso_local void @"?f@noexcept_false_dtor@@YAXXZ"() -// WIN32: invoke i32 @"?CouldThrow@@YAHXZ"() -// WIN32: call x86_thiscallcc void @"??1D@noexcept_false_dtor@@QAE@XZ"(%"struct.noexcept_false_dtor::D"* %{{.*}}) +// WIN32: invoke frozen i32 @"?CouldThrow@@YAHXZ"() +// WIN32: call x86_thiscallcc void @"??1D@noexcept_false_dtor@@QAE@XZ"(%"struct.noexcept_false_dtor::D"* frozen %{{.*}}) // WIN32: cleanuppad -// WIN32: call x86_thiscallcc void @"??1D@noexcept_false_dtor@@QAE@XZ"(%"struct.noexcept_false_dtor::D"* %{{.*}}) +// WIN32: call x86_thiscallcc void @"??1D@noexcept_false_dtor@@QAE@XZ"(%"struct.noexcept_false_dtor::D"* frozen %{{.*}}) // WIN32: cleanupret namespace lifetime_marker { @@ -293,7 +293,7 @@ }; class_0::class_0() { - // WIN32: define dso_local x86_thiscallcc %struct.class_0* @"??0class_0@@QAE@XZ"(%struct.class_0* returned %this, i32 %is_most_derived) + // WIN32: define dso_local x86_thiscallcc frozen %struct.class_0* @"??0class_0@@QAE@XZ"(%struct.class_0* frozen returned %this, i32 frozen %is_most_derived) // WIN32: store i32 %is_most_derived, i32* %[[IS_MOST_DERIVED_VAR:.*]], align 4 // WIN32: %[[IS_MOST_DERIVED_VAL:.*]] = load i32, i32* %[[IS_MOST_DERIVED_VAR]] // WIN32: %[[SHOULD_CALL_VBASE_CTORS:.*]] = icmp ne i32 %[[IS_MOST_DERIVED_VAL]], 0 diff --git a/clang/test/CodeGenCXX/microsoft-abi-extern-template.cpp b/clang/test/CodeGenCXX/microsoft-abi-extern-template.cpp --- a/clang/test/CodeGenCXX/microsoft-abi-extern-template.cpp +++ b/clang/test/CodeGenCXX/microsoft-abi-extern-template.cpp @@ -7,13 +7,13 @@ // CHECK-SAME: i8* bitcast (i8* (%struct.Foo*, i32)* @"??_G?$Foo@H@@UEAAPEAXI@Z" to i8*) // CHECK-SAME: ] }, comdat -// CHECK-LABEL: define dso_local %struct.Foo* @"?f@@YAPEAU?$Foo@H@@XZ"() -// CHECK: call %struct.Foo* @"??0?$Foo@H@@QEAA@XZ"(%struct.Foo* %{{.*}}) +// CHECK-LABEL: define dso_local frozen %struct.Foo* @"?f@@YAPEAU?$Foo@H@@XZ"() +// CHECK: call frozen %struct.Foo* @"??0?$Foo@H@@QEAA@XZ"(%struct.Foo* frozen %{{.*}}) -// CHECK: define available_externally dso_local %struct.Foo* @"??0?$Foo@H@@QEAA@XZ"(%struct.Foo* returned %this) +// CHECK: define available_externally dso_local frozen %struct.Foo* @"??0?$Foo@H@@QEAA@XZ"(%struct.Foo* frozen returned %this) // CHECK: store {{.*}} @"??_7?$Foo@H@@6B@" -// CHECK: define linkonce_odr dso_local i8* @"??_G?$Foo@H@@UEAAPEAXI@Z"(%struct.Foo* %this, i32 %should_call_delete) +// CHECK: define linkonce_odr dso_local frozen i8* @"??_G?$Foo@H@@UEAAPEAXI@Z"(%struct.Foo* frozen %this, i32 frozen %should_call_delete) struct Base { virtual ~Base(); diff --git a/clang/test/CodeGenCXX/microsoft-abi-member-pointers.cpp b/clang/test/CodeGenCXX/microsoft-abi-member-pointers.cpp --- a/clang/test/CodeGenCXX/microsoft-abi-member-pointers.cpp +++ b/clang/test/CodeGenCXX/microsoft-abi-member-pointers.cpp @@ -1,7 +1,7 @@ -// RUN: %clang_cc1 -std=c++11 -Wno-uninitialized -fno-rtti -emit-llvm %s -o - -triple=i386-pc-win32 -fms-extensions | FileCheck -allow-deprecated-dag-overlap %s -// RUN: %clang_cc1 -std=c++11 -Wno-uninitialized -fno-rtti -emit-llvm %s -o - -triple=x86_64-pc-win32 -fms-extensions | FileCheck %s -check-prefix=X64 -// RUN: %clang_cc1 -std=c++11 -Wno-uninitialized -fno-rtti -emit-llvm %s -o - -triple=i386-pc-win32 -DINCOMPLETE_VIRTUAL -fms-extensions -verify -// RUN: %clang_cc1 -std=c++11 -Wno-uninitialized -fno-rtti -emit-llvm %s -o - -triple=i386-pc-win32 -DINCOMPLETE_VIRTUAL -DMEMFUN -fms-extensions -verify +// RUN: %clang_cc1 -disable-frozen-args -std=c++11 -Wno-uninitialized -fno-rtti -emit-llvm %s -o - -triple=i386-pc-win32 -fms-extensions | FileCheck -allow-deprecated-dag-overlap %s +// RUN: %clang_cc1 -disable-frozen-args -std=c++11 -Wno-uninitialized -fno-rtti -emit-llvm %s -o - -triple=x86_64-pc-win32 -fms-extensions | FileCheck %s -check-prefix=X64 +// RUN: %clang_cc1 -disable-frozen-args -std=c++11 -Wno-uninitialized -fno-rtti -emit-llvm %s -o - -triple=i386-pc-win32 -DINCOMPLETE_VIRTUAL -fms-extensions -verify +// RUN: %clang_cc1 -disable-frozen-args -std=c++11 -Wno-uninitialized -fno-rtti -emit-llvm %s -o - -triple=i386-pc-win32 -DINCOMPLETE_VIRTUAL -DMEMFUN -fms-extensions -verify namespace pr37399 { template @@ -336,7 +336,7 @@ void (Virtual ::*v_f_memptr)() = &Virtual::foo; void (Unspecified::*u_f_memptr)() = &Unspecified::foo; void (UnspecWithVBPtr::*u2_f_memptr)() = &UnspecWithVBPtr::foo; -// CHECK: define dso_local void @"?EmitNonVirtualMemberPointers@@YAXXZ"() {{.*}} { +// CHECK: define dso_local void @"?EmitNonVirtualMemberPointers@@YAXXZ"() {{.*}} // CHECK: alloca i8*, align 4 // CHECK: alloca { i8*, i32 }, align 4 // CHECK: alloca { i8*, i32, i32 }, align 4 @@ -366,7 +366,7 @@ if (memptr) memptr = 0; // Check that member pointers use the right offsets and that null is -1. -// CHECK: define dso_local void @"?podMemPtrs@@YAXXZ"() {{.*}} { +// CHECK: define dso_local void @"?podMemPtrs@@YAXXZ"() {{.*}} // CHECK: %[[memptr:.*]] = alloca i32, align 4 // CHECK-NEXT: store i32 0, i32* %[[memptr]], align 4 // CHECK-NEXT: store i32 4, i32* %[[memptr]], align 4 @@ -386,7 +386,7 @@ memptr = 0; // Member pointers for polymorphic classes include the vtable slot in their // offset and use 0 to represent null. -// CHECK: define dso_local void @"?polymorphicMemPtrs@@YAXXZ"() {{.*}} { +// CHECK: define dso_local void @"?polymorphicMemPtrs@@YAXXZ"() {{.*}} // CHECK: %[[memptr:.*]] = alloca i32, align 4 // CHECK-NEXT: store i32 4, i32* %[[memptr]], align 4 // CHECK-NEXT: store i32 8, i32* %[[memptr]], align 4 @@ -400,7 +400,7 @@ bool nullTestDataUnspecified(int Unspecified::*mp) { return mp; -// CHECK: define dso_local zeroext i1 @"?nullTestDataUnspecified@@YA_NPQUnspecified@@H@Z"{{.*}} { +// CHECK: define dso_local frozen zeroext i1 @"?nullTestDataUnspecified@@YA_NPQUnspecified@@H@Z"{{.*}} { // CHECK: %{{.*}} = load { i32, i32, i32 }, { i32, i32, i32 }* %{{.*}}, align 4 // CHECK: store { i32, i32, i32 } {{.*}} align 4 // CHECK: %[[mp:.*]] = load { i32, i32, i32 }, { i32, i32, i32 }* %{{.*}}, align 4 @@ -416,13 +416,13 @@ // CHECK: } // Pass this large type indirectly. -// X64-LABEL: define dso_local zeroext i1 @"?nullTestDataUnspecified@@ +// X64-LABEL: define dso_local frozen zeroext i1 @"?nullTestDataUnspecified@@ // X64: ({ i32, i32, i32 }* %0) } bool nullTestFunctionUnspecified(void (Unspecified::*mp)()) { return mp; -// CHECK: define dso_local zeroext i1 @"?nullTestFunctionUnspecified@@YA_NP8Unspecified@@AEXXZ@Z"{{.*}} { +// CHECK: define dso_local frozen zeroext i1 @"?nullTestFunctionUnspecified@@YA_NP8Unspecified@@AEXXZ@Z"{{.*}} { // CHECK: %{{.*}} = load { i8*, i32, i32, i32 }, { i8*, i32, i32, i32 }* %{{.*}}, align 4 // CHECK: store { i8*, i32, i32, i32 } {{.*}} align 4 // CHECK: %[[mp:.*]] = load { i8*, i32, i32, i32 }, { i8*, i32, i32, i32 }* %{{.*}}, align 4 @@ -436,7 +436,7 @@ return o->*memptr; // Test that we can unpack this aggregate member pointer and load the member // data pointer. -// CHECK: define dso_local i32 @"?loadDataMemberPointerVirtual@@YAHPAUVirtual@@PQ1@H@Z"{{.*}} { +// CHECK: define dso_local frozen i32 @"?loadDataMemberPointerVirtual@@YAHPAUVirtual@@PQ1@H@Z"{{.*}} { // CHECK: %[[o:.*]] = load %{{.*}}*, %{{.*}}** %{{.*}}, align 4 // CHECK: %[[memptr:.*]] = load { i32, i32 }, { i32, i32 }* %{{.*}}, align 4 // CHECK: %[[memptr0:.*]] = extractvalue { i32, i32 } %[[memptr:.*]], 0 @@ -457,7 +457,7 @@ // A two-field data memptr on x64 gets coerced to i64 and is passed in a // register or memory. -// X64-LABEL: define dso_local i32 @"?loadDataMemberPointerVirtual@@YAHPEAUVirtual@@PEQ1@H@Z" +// X64-LABEL: define dso_local frozen i32 @"?loadDataMemberPointerVirtual@@YAHPEAUVirtual@@PEQ1@H@Z" // X64: (%struct.Virtual* %o, i64 %memptr.coerce) } @@ -465,7 +465,7 @@ return o->*memptr; // Test that we can unpack this aggregate member pointer and load the member // data pointer. -// CHECK: define dso_local i32 @"?loadDataMemberPointerUnspecified@@YAHPAUUnspecified@@PQ1@H@Z"{{.*}} { +// CHECK: define dso_local frozen i32 @"?loadDataMemberPointerUnspecified@@YAHPAUUnspecified@@PQ1@H@Z"{{.*}} { // CHECK: %[[o:.*]] = load %{{.*}}*, %{{.*}}** %{{.*}}, align 4 // CHECK: %[[memptr:.*]] = load { i32, i32, i32 }, { i32, i32, i32 }* %{{.*}}, align 4 // CHECK: %[[memptr0:.*]] = extractvalue { i32, i32, i32 } %[[memptr:.*]], 0 @@ -545,21 +545,21 @@ bool compareSingleFunctionMemptr(void (Single::*l)(), void (Single::*r)()) { return l == r; // Should only be one comparison here. -// CHECK: define dso_local zeroext i1 @"?compareSingleFunctionMemptr@@YA_NP8Single@@AEXXZ0@Z"{{.*}} { +// CHECK: define dso_local frozen zeroext i1 @"?compareSingleFunctionMemptr@@YA_NP8Single@@AEXXZ0@Z"{{.*}} { // CHECK-NOT: icmp // CHECK: %[[r:.*]] = icmp eq // CHECK-NOT: icmp // CHECK: ret i1 %[[r]] // CHECK: } -// X64-LABEL: define dso_local zeroext i1 @"?compareSingleFunctionMemptr@@ +// X64-LABEL: define dso_local frozen zeroext i1 @"?compareSingleFunctionMemptr@@ // X64: (i8* %{{[^,]*}}, i8* %{{[^)]*}}) } bool compareNeqSingleFunctionMemptr(void (Single::*l)(), void (Single::*r)()) { return l != r; // Should only be one comparison here. -// CHECK: define dso_local zeroext i1 @"?compareNeqSingleFunctionMemptr@@YA_NP8Single@@AEXXZ0@Z"{{.*}} { +// CHECK: define dso_local frozen zeroext i1 @"?compareNeqSingleFunctionMemptr@@YA_NP8Single@@AEXXZ0@Z"{{.*}} { // CHECK-NOT: icmp // CHECK: %[[r:.*]] = icmp ne // CHECK-NOT: icmp @@ -569,7 +569,7 @@ bool unspecFuncMemptrEq(void (Unspecified::*l)(), void (Unspecified::*r)()) { return l == r; -// CHECK: define dso_local zeroext i1 @"?unspecFuncMemptrEq@@YA_NP8Unspecified@@AEXXZ0@Z"{{.*}} { +// CHECK: define dso_local frozen zeroext i1 @"?unspecFuncMemptrEq@@YA_NP8Unspecified@@AEXXZ0@Z"{{.*}} { // CHECK: %[[lhs0:.*]] = extractvalue { i8*, i32, i32, i32 } %[[l:.*]], 0 // CHECK: %{{.*}} = extractvalue { i8*, i32, i32, i32 } %[[r:.*]], 0 // CHECK: %[[cmp0:.*]] = icmp eq i8* %[[lhs0]], %{{.*}} @@ -590,13 +590,13 @@ // CHECK: ret i1 %{{.*}} // CHECK: } -// X64-LABEL: define dso_local zeroext i1 @"?unspecFuncMemptrEq@@ +// X64-LABEL: define dso_local frozen zeroext i1 @"?unspecFuncMemptrEq@@ // X64: ({ i8*, i32, i32, i32 }* %0, { i8*, i32, i32, i32 }* %1) } bool unspecFuncMemptrNeq(void (Unspecified::*l)(), void (Unspecified::*r)()) { return l != r; -// CHECK: define dso_local zeroext i1 @"?unspecFuncMemptrNeq@@YA_NP8Unspecified@@AEXXZ0@Z"{{.*}} { +// CHECK: define dso_local frozen zeroext i1 @"?unspecFuncMemptrNeq@@YA_NP8Unspecified@@AEXXZ0@Z"{{.*}} { // CHECK: %[[lhs0:.*]] = extractvalue { i8*, i32, i32, i32 } %[[l:.*]], 0 // CHECK: %{{.*}} = extractvalue { i8*, i32, i32, i32 } %[[r:.*]], 0 // CHECK: %[[cmp0:.*]] = icmp ne i8* %[[lhs0]], %{{.*}} @@ -620,7 +620,7 @@ bool unspecDataMemptrEq(int Unspecified::*l, int Unspecified::*r) { return l == r; -// CHECK: define dso_local zeroext i1 @"?unspecDataMemptrEq@@YA_NPQUnspecified@@H0@Z"{{.*}} { +// CHECK: define dso_local frozen zeroext i1 @"?unspecDataMemptrEq@@YA_NPQUnspecified@@H0@Z"{{.*}} { // CHECK: extractvalue { i32, i32, i32 } %{{.*}}, 0 // CHECK: extractvalue { i32, i32, i32 } %{{.*}}, 0 // CHECK: icmp eq i32 @@ -635,13 +635,13 @@ // CHECK: ret i1 // CHECK: } -// X64-LABEL: define dso_local zeroext i1 @"?unspecDataMemptrEq@@ +// X64-LABEL: define dso_local frozen zeroext i1 @"?unspecDataMemptrEq@@ // X64: ({ i32, i32, i32 }* %0, { i32, i32, i32 }* %1) } void (Multiple::*convertB2FuncToMultiple(void (B2::*mp)()))() { return mp; -// CHECK: define dso_local i64 @"?convertB2FuncToMultiple@@YAP8Multiple@@AEXXZP8B2@@AEXXZ@Z"{{.*}} { +// CHECK: define dso_local frozen i64 @"?convertB2FuncToMultiple@@YAP8Multiple@@AEXXZP8B2@@AEXXZ@Z"{{.*}} { // CHECK: store // CHECK: %[[mp:.*]] = load i8*, i8** %{{.*}}, align 4 // CHECK: icmp ne i8* %[[mp]], null @@ -665,7 +665,7 @@ // LLVM from optimizing away the branch. This is likely a bug in // lib/CodeGen/TargetInfo.cpp with how we classify memptr types for returns. // -// CHECK: define dso_local i32 @"?convertMultipleFuncToB2@@YAP8B2@@AEXXZP8Multiple@@AEXXZ@Z"{{.*}} { +// CHECK: define dso_local frozen i32 @"?convertMultipleFuncToB2@@YAP8B2@@AEXXZP8Multiple@@AEXXZ@Z"{{.*}} { // CHECK: store // CHECK: %[[src:.*]] = load { i8*, i32 }, { i8*, i32 }* %{{.*}}, align 4 // CHECK: extractvalue { i8*, i32 } %[[src]], 0 @@ -730,7 +730,7 @@ int A::*reinterpret(int B::*mp) { return reinterpret_cast(mp); -// CHECK: define dso_local i32 @"?reinterpret@Test2@@YAPQA@1@HPQB@1@H@Z"{{.*}} { +// CHECK: define dso_local frozen i32 @"?reinterpret@Test2@@YAPQA@1@HPQB@1@H@Z"{{.*}} { // CHECK-NOT: select // CHECK: ret i32 // CHECK: } @@ -738,7 +738,7 @@ int A::*reinterpret(int C::*mp) { return reinterpret_cast(mp); -// CHECK: define dso_local i32 @"?reinterpret@Test2@@YAPQA@1@HPQC@1@H@Z"{{.*}} { +// CHECK: define dso_local frozen i32 @"?reinterpret@Test2@@YAPQA@1@HPQC@1@H@Z"{{.*}} { // CHECK: %[[mp:.*]] = load i32, i32* // CHECK: %[[cmp:.*]] = icmp ne i32 %[[mp]], 0 // CHECK: select i1 %[[cmp]], i32 %[[mp]], i32 -1 @@ -757,7 +757,7 @@ int *load_data(A *a, int A::*mp) { return &(a->*mp); -// CHECK-LABEL: define dso_local i32* @"?load_data@Test3@@YAPAHPAUA@1@PQ21@H@Z"{{.*}} { +// CHECK-LABEL: define dso_local frozen i32* @"?load_data@Test3@@YAPAHPAUA@1@PQ21@H@Z"{{.*}} { // CHECK: %[[a:.*]] = load %"struct.Test3::A"*, %"struct.Test3::A"** %{{.*}}, align 4 // CHECK: %[[mp:.*]] = load i32, i32* %{{.*}}, align 4 // CHECK: %[[a_i8:.*]] = bitcast %"struct.Test3::A"* %[[a]] to i8* @@ -776,7 +776,7 @@ void (C::*getmp())() { return &C::g; } -// CHECK-LABEL: define dso_local i64 @"?getmp@Test4@@YAP8C@1@AEXXZXZ"() +// CHECK-LABEL: define dso_local frozen i64 @"?getmp@Test4@@YAP8C@1@AEXXZXZ"() // CHECK: store { i8*, i32 } { i8* bitcast (void (%"struct.Test4::C"*, ...)* @"??_9C@Test4@@$BA@AE" to i8*), i32 4 }, { i8*, i32 }* %{{.*}} // diff --git a/clang/test/CodeGenCXX/microsoft-abi-methods.cpp b/clang/test/CodeGenCXX/microsoft-abi-methods.cpp --- a/clang/test/CodeGenCXX/microsoft-abi-methods.cpp +++ b/clang/test/CodeGenCXX/microsoft-abi-methods.cpp @@ -71,8 +71,8 @@ Child c; // Make sure that the Base constructor call in the Child constructor uses // the right calling convention: -// CHECK: define linkonce_odr dso_local x86_thiscallcc %class.Child* @"??0Child@@QAE@XZ" -// CHECK: %{{[.0-9A-Z_a-z]+}} = call x86_thiscallcc %class.Base* @"??0Base@@QAE@XZ" +// CHECK: define linkonce_odr dso_local x86_thiscallcc frozen %class.Child* @"??0Child@@QAE@XZ" +// CHECK: %{{[.0-9A-Z_a-z]+}} = call x86_thiscallcc frozen %class.Base* @"??0Base@@QAE@XZ" // CHECK: ret // Make sure that the Base destructor call in the Child denstructor uses @@ -82,7 +82,7 @@ // CHECK: ret // Make sure that the Base constructor definition uses the right CC: -// CHECK: define linkonce_odr dso_local x86_thiscallcc %class.Base* @"??0Base@@QAE@XZ" +// CHECK: define linkonce_odr dso_local x86_thiscallcc frozen %class.Base* @"??0Base@@QAE@XZ" // Make sure that the Base destructor definition uses the right CC: // CHECK: define linkonce_odr dso_local x86_thiscallcc void @"??1Base@@QAE@XZ" diff --git a/clang/test/CodeGenCXX/microsoft-abi-multiple-nonvirtual-inheritance.cpp b/clang/test/CodeGenCXX/microsoft-abi-multiple-nonvirtual-inheritance.cpp --- a/clang/test/CodeGenCXX/microsoft-abi-multiple-nonvirtual-inheritance.cpp +++ b/clang/test/CodeGenCXX/microsoft-abi-multiple-nonvirtual-inheritance.cpp @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -fno-rtti -emit-llvm %s -o - -mconstructor-aliases -triple=i386-pc-win32 | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args -fno-rtti -emit-llvm %s -o - -mconstructor-aliases -triple=i386-pc-win32 | FileCheck %s struct Left { virtual void left(); @@ -204,7 +204,7 @@ void call_asymmetric_child_complete_dtor() { // CHECK-LABEL: define dso_local void @"?call_asymmetric_child_complete_dtor@@YAXXZ" AsymmetricChild obj; - // CHECK: call x86_thiscallcc %struct.AsymmetricChild* @"??0AsymmetricChild@@QAE@XZ"(%struct.AsymmetricChild* %[[OBJ:.*]]) + // CHECK: call x86_thiscallcc frozen %struct.AsymmetricChild* @"??0AsymmetricChild@@QAE@XZ"(%struct.AsymmetricChild* %[[OBJ:.*]]) // CHECK-NOT: getelementptr // CHECK: call x86_thiscallcc void @"??1AsymmetricChild@@UAE@XZ"(%struct.AsymmetricChild* %[[OBJ]]) // CHECK: ret diff --git a/clang/test/CodeGenCXX/microsoft-abi-sret-and-byval.cpp b/clang/test/CodeGenCXX/microsoft-abi-sret-and-byval.cpp --- a/clang/test/CodeGenCXX/microsoft-abi-sret-and-byval.cpp +++ b/clang/test/CodeGenCXX/microsoft-abi-sret-and-byval.cpp @@ -1,8 +1,8 @@ -// RUN: %clang_cc1 -std=c++11 -emit-llvm %s -o - -triple=i386-pc-linux | FileCheck -check-prefix LINUX %s -// RUN: %clang_cc1 -std=c++11 -emit-llvm %s -o - -triple=i386-pc-win32 -mconstructor-aliases -fno-rtti | FileCheck -check-prefix WIN32 %s -// RUN: %clang_cc1 -std=c++11 -emit-llvm %s -o - -triple=thumb-pc-win32 -mconstructor-aliases -fno-rtti | FileCheck -check-prefix WOA %s -// RUN: %clang_cc1 -std=c++11 -emit-llvm %s -o - -triple=x86_64-pc-win32 -mconstructor-aliases -fno-rtti | FileCheck -check-prefix WIN64 %s -// RUN: %clang_cc1 -std=c++11 -emit-llvm %s -o - -triple=aarch64-windows-msvc -mconstructor-aliases -fno-rtti | FileCheck -check-prefix WOA64 %s +// RUN: %clang_cc1 -disable-frozen-args -std=c++11 -emit-llvm %s -o - -triple=i386-pc-linux | FileCheck -check-prefix LINUX %s +// RUN: %clang_cc1 -disable-frozen-args -std=c++11 -emit-llvm %s -o - -triple=i386-pc-win32 -mconstructor-aliases -fno-rtti | FileCheck -check-prefix WIN32 %s +// RUN: %clang_cc1 -disable-frozen-args -std=c++11 -emit-llvm %s -o - -triple=thumb-pc-win32 -mconstructor-aliases -fno-rtti | FileCheck -check-prefix WOA %s +// RUN: %clang_cc1 -disable-frozen-args -std=c++11 -emit-llvm %s -o - -triple=x86_64-pc-win32 -mconstructor-aliases -fno-rtti | FileCheck -check-prefix WIN64 %s +// RUN: %clang_cc1 -disable-frozen-args -std=c++11 -emit-llvm %s -o - -triple=aarch64-windows-msvc -mconstructor-aliases -fno-rtti | FileCheck -check-prefix WOA64 %s struct Empty {}; @@ -188,7 +188,7 @@ small_arg_with_dtor(SmallWithDtor()); } // WIN64-LABEL: define dso_local void @"?call_small_arg_with_dtor@@YAXXZ"() -// WIN64: call %struct.SmallWithDtor* @"??0SmallWithDtor@@QEAA@XZ" +// WIN64: call frozen %struct.SmallWithDtor* @"??0SmallWithDtor@@QEAA@XZ" // WIN64: call void @"?small_arg_with_dtor@@YAXUSmallWithDtor@@@Z"(i32 %{{.*}}) // WIN64: ret void @@ -210,7 +210,7 @@ // We can elide the copy of the temporary in the caller, because this object is // larger than 8 bytes and is passed indirectly. // WIN64-LABEL: define dso_local void @"?call_big_arg_with_dtor@@YAXXZ"() -// WIN64: call %struct.BigWithDtor* @"??0BigWithDtor@@QEAA@XZ" +// WIN64: call frozen %struct.BigWithDtor* @"??0BigWithDtor@@QEAA@XZ" // WIN64: call void @"?big_arg_with_dtor@@YAXUBigWithDtor@@@Z"(%struct.BigWithDtor* %{{.*}}) // WIN64-NOT: call void @"??1BigWithDtor@@QEAA@XZ" // WIN64: ret void @@ -220,7 +220,7 @@ ref_small_arg_with_dtor(SmallWithDtor()); } // WIN32: define dso_local void @"?temporary_ref_with_dtor@@YAXXZ"() {{.*}} { -// WIN32: call x86_thiscallcc %struct.SmallWithDtor* @"??0SmallWithDtor@@QAE@XZ" +// WIN32: call x86_thiscallcc frozen %struct.SmallWithDtor* @"??0SmallWithDtor@@QAE@XZ" // WIN32: call void @"?ref_small_arg_with_dtor@@YAXABUSmallWithDtor@@@Z" // WIN32: call x86_thiscallcc void @"??1SmallWithDtor@@QAE@XZ" // WIN32: } @@ -232,8 +232,8 @@ // When exceptions are off, we don't have any cleanups. See // microsoft-abi-exceptions.cpp for these cleanups. // WIN32: define dso_local void @"?eh_cleanup_arg_with_dtor@@YAXXZ"() {{.*}} { -// WIN32: call x86_thiscallcc %struct.SmallWithDtor* @"??0SmallWithDtor@@QAE@XZ" -// WIN32: call x86_thiscallcc %struct.SmallWithDtor* @"??0SmallWithDtor@@QAE@XZ" +// WIN32: call x86_thiscallcc frozen %struct.SmallWithDtor* @"??0SmallWithDtor@@QAE@XZ" +// WIN32: call x86_thiscallcc frozen %struct.SmallWithDtor* @"??0SmallWithDtor@@QAE@XZ" // WIN32: call void @"?takes_two_by_val_with_dtor@@YAXUSmallWithDtor@@0@Z" // WIN32-NOT: call x86_thiscallcc void @"??1SmallWithDtor@@QAE@XZ" // WIN32: } @@ -381,8 +381,8 @@ // WIN32: getelementptr inbounds [[argmem_ty]], [[argmem_ty]]* %[[argmem]], i32 0, i32 1 // WIN32: call void @llvm.memcpy // WIN32: getelementptr inbounds [[argmem_ty]], [[argmem_ty]]* %[[argmem]], i32 0, i32 0 -// WIN32: call x86_thiscallcc %"struct.test2::NonTrivial"* @"??0NonTrivial@test2@@QAE@XZ" -// WIN32: call i32 @"?foo@test2@@YAHUNonTrivial@1@UPOD@1@@Z"([[argmem_ty]]* inalloca %argmem) +// WIN32: call x86_thiscallcc frozen %"struct.test2::NonTrivial"* @"??0NonTrivial@test2@@QAE@XZ" +// WIN32: call frozen i32 @"?foo@test2@@YAHUNonTrivial@1@UPOD@1@@Z"([[argmem_ty]]* inalloca %argmem) // WIN32: ret void // WIN32: } @@ -445,7 +445,7 @@ void C::g() { return h(SmallWithDtor()); } // WIN32-LABEL: define dso_local x86_thiscallcc void @"?g@C@pr30293@@QAEXXZ"(%"struct.pr30293::C"* %this) -// WIN32: call x86_thiscallcc %struct.SmallWithDtor* @"??0SmallWithDtor@@QAE@XZ" +// WIN32: call x86_thiscallcc frozen %struct.SmallWithDtor* @"??0SmallWithDtor@@QAE@XZ" // WIN32: call void @"?h@C@pr30293@@UAAXUSmallWithDtor@@@Z"(<{ i8*, %struct.SmallWithDtor }>* inalloca %{{[^,)]*}}) // WIN32: declare dso_local void @"?h@C@pr30293@@UAAXUSmallWithDtor@@@Z"(<{ i8*, %struct.SmallWithDtor }>* inalloca) diff --git a/clang/test/CodeGenCXX/microsoft-abi-static-initializers.cpp b/clang/test/CodeGenCXX/microsoft-abi-static-initializers.cpp --- a/clang/test/CodeGenCXX/microsoft-abi-static-initializers.cpp +++ b/clang/test/CodeGenCXX/microsoft-abi-static-initializers.cpp @@ -16,7 +16,7 @@ S s; // CHECK: define internal void @"??__Es@@YAXXZ"() -// CHECK: call x86_thiscallcc %struct.S* @"??0S@@QAE@XZ" +// CHECK: call x86_thiscallcc frozen %struct.S* @"??0S@@QAE@XZ" // CHECK: call i32 @atexit(void ()* @"??__Fs@@YAXXZ") // CHECK: ret void @@ -30,11 +30,11 @@ __declspec(selectany) S selectany2; // CHECK: define linkonce_odr dso_local void @"??__Eselectany1@@YAXXZ"() {{.*}} comdat // CHECK-NOT: @"??_Bselectany1 -// CHECK: call x86_thiscallcc %struct.S* @"??0S@@QAE@XZ" +// CHECK: call x86_thiscallcc frozen %struct.S* @"??0S@@QAE@XZ" // CHECK: ret void // CHECK: define linkonce_odr dso_local void @"??__Eselectany2@@YAXXZ"() {{.*}} comdat // CHECK-NOT: @"??_Bselectany2 -// CHECK: call x86_thiscallcc %struct.S* @"??0S@@QAE@XZ" +// CHECK: call x86_thiscallcc frozen %struct.S* @"??0S@@QAE@XZ" // CHECK: ret void // The implicitly instantiated static data member should have initializer @@ -133,7 +133,7 @@ return s; } -// CHECK-LABEL: define linkonce_odr dso_local nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.S* @"?UnreachableStatic@@YAAAUS@@XZ"() {{.*}} comdat +// CHECK-LABEL: define linkonce_odr dso_local frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.S* @"?UnreachableStatic@@YAAAUS@@XZ"() {{.*}} comdat // CHECK: and i32 {{.*}}, 2 // CHECK: or i32 {{.*}}, 2 // CHECK: ret @@ -143,7 +143,7 @@ return TheS; } -// CHECK-LABEL: define linkonce_odr dso_local nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.S* @"?getS@@YAAAUS@@XZ"() {{.*}} comdat +// CHECK-LABEL: define linkonce_odr dso_local frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.S* @"?getS@@YAAAUS@@XZ"() {{.*}} comdat // CHECK: load i32, i32* @"??_B?1??getS@@YAAAUS@@XZ@51" // CHECK: and i32 {{.*}}, 1 // CHECK: icmp eq i32 {{.*}}, 0 @@ -151,14 +151,14 @@ // init: // CHECK: or i32 {{.*}}, 1 // CHECK: store i32 {{.*}}, i32* @"??_B?1??getS@@YAAAUS@@XZ@51" -// CHECK: call x86_thiscallcc %struct.S* @"??0S@@QAE@XZ"(%struct.S* @"?TheS@?1??getS@@YAAAUS@@XZ@4U2@A") +// CHECK: call x86_thiscallcc frozen %struct.S* @"??0S@@QAE@XZ"(%struct.S* frozen @"?TheS@?1??getS@@YAAAUS@@XZ@4U2@A") // CHECK: call i32 @atexit(void ()* @"??__FTheS@?1??getS@@YAAAUS@@XZ@YAXXZ") // CHECK: br label // init.end: // CHECK: ret %struct.S* @"?TheS@?1??getS@@YAAAUS@@XZ@4U2@A" inline int enum_in_function() { - // CHECK-LABEL: define linkonce_odr dso_local i32 @"?enum_in_function@@YAHXZ"() {{.*}} comdat + // CHECK-LABEL: define linkonce_odr dso_local frozen i32 @"?enum_in_function@@YAHXZ"() {{.*}} comdat static enum e { foo, bar, baz } x; // CHECK: @"?x@?1??enum_in_function@@YAHXZ@4W4e@?1??1@YAHXZ@A" static int y; @@ -169,7 +169,7 @@ struct T { enum e { foo, bar, baz }; int enum_in_struct() { - // CHECK-LABEL: define linkonce_odr dso_local x86_thiscallcc i32 @"?enum_in_struct@T@@QAEHXZ"({{.*}}) {{.*}} comdat + // CHECK-LABEL: define linkonce_odr dso_local x86_thiscallcc frozen i32 @"?enum_in_struct@T@@QAEHXZ"({{.*}}) {{.*}} comdat static int x; // CHECK: @"?x@?1??enum_in_struct@T@@QAEHXZ@4HA" return x++; @@ -177,7 +177,7 @@ }; inline int switch_test(int x) { - // CHECK-LABEL: define linkonce_odr dso_local i32 @"?switch_test@@YAHH@Z"(i32 %x) {{.*}} comdat + // CHECK-LABEL: define linkonce_odr dso_local frozen i32 @"?switch_test@@YAHH@Z"(i32 frozen %x) {{.*}} comdat switch (x) { static int a; // CHECK: @"?a@?3??switch_test@@YAHH@Z@4HA" @@ -213,7 +213,7 @@ template struct __declspec(dllimport) A; inline int switch_test3() { - // CHECK-LABEL: define linkonce_odr dso_local i32 @"?switch_test3@DynamicDLLImportInitVSMangling@@YAHXZ"() {{.*}} comdat + // CHECK-LABEL: define linkonce_odr dso_local frozen i32 @"?switch_test3@DynamicDLLImportInitVSMangling@@YAHXZ"() {{.*}} comdat static int local; // CHECK: @"?local@?1??switch_test3@DynamicDLLImportInitVSMangling@@YAHXZ@4HA" return local++; @@ -234,11 +234,11 @@ // CHECK: define linkonce_odr dso_local void @"??__E?foo@?$B@H@@2VA@@A@@YAXXZ"() {{.*}} comdat // CHECK-NOT: and // CHECK-NOT: ?_Bfoo@ -// CHECK: call x86_thiscallcc %class.A* @"??0A@@QAE@XZ" +// CHECK: call x86_thiscallcc frozen %class.A* @"??0A@@QAE@XZ" // CHECK: call i32 @atexit(void ()* @"??__F?foo@?$B@H@@2VA@@A@@YAXXZ") // CHECK: ret void -// CHECK: define linkonce_odr dso_local x86_thiscallcc %class.A* @"??0A@@QAE@XZ"({{.*}}) {{.*}} comdat +// CHECK: define linkonce_odr dso_local x86_thiscallcc frozen %class.A* @"??0A@@QAE@XZ"({{.*}}) {{.*}} comdat // CHECK: define linkonce_odr dso_local x86_thiscallcc void @"??1A@@QAE@XZ"({{.*}}) {{.*}} comdat diff --git a/clang/test/CodeGenCXX/microsoft-abi-structors.cpp b/clang/test/CodeGenCXX/microsoft-abi-structors.cpp --- a/clang/test/CodeGenCXX/microsoft-abi-structors.cpp +++ b/clang/test/CodeGenCXX/microsoft-abi-structors.cpp @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -emit-llvm -fno-rtti %s -std=c++11 -o - -mconstructor-aliases -triple=i386-pc-win32 -fno-rtti > %t +// RUN: %clang_cc1 -disable-frozen-args -emit-llvm -fno-rtti %s -std=c++11 -o - -mconstructor-aliases -triple=i386-pc-win32 -fno-rtti > %t // RUN: FileCheck %s < %t // vftables are emitted very late, so do another pass to try to keep the checks // in source order. @@ -7,7 +7,7 @@ // RUN: FileCheck --check-prefix DTORS3 %s < %t // RUN: FileCheck --check-prefix DTORS4 %s < %t // -// RUN: %clang_cc1 -emit-llvm %s -o - -mconstructor-aliases -triple=x86_64-pc-win32 -fno-rtti -std=c++11 | FileCheck --check-prefix DTORS-X64 %s +// RUN: %clang_cc1 -disable-frozen-args -emit-llvm %s -o - -mconstructor-aliases -triple=x86_64-pc-win32 -fno-rtti -std=c++11 | FileCheck --check-prefix DTORS-X64 %s namespace basic { @@ -20,7 +20,7 @@ void no_constructor_destructor_infinite_recursion() { A a; -// CHECK: define linkonce_odr dso_local x86_thiscallcc %"class.basic::A"* @"??0A@basic@@QAE@XZ"(%"class.basic::A"* returned %this) {{.*}} comdat {{.*}} { +// CHECK: define linkonce_odr dso_local x86_thiscallcc frozen %"class.basic::A"* @"??0A@basic@@QAE@XZ"(%"class.basic::A"* returned %this) {{.*}} comdat {{.*}} { // CHECK: [[THIS_ADDR:%[.0-9A-Z_a-z]+]] = alloca %"class.basic::A"*, align 4 // CHECK-NEXT: store %"class.basic::A"* %this, %"class.basic::A"** [[THIS_ADDR]], align 4 // CHECK-NEXT: [[T1:%[.0-9A-Z_a-z]+]] = load %"class.basic::A"*, %"class.basic::A"** [[THIS_ADDR]] @@ -41,13 +41,13 @@ // Tests that we can define constructors outside the class (PR12784). B::B() { - // CHECK: define dso_local x86_thiscallcc %"struct.basic::B"* @"??0B@basic@@QAE@XZ"(%"struct.basic::B"* returned %this) + // CHECK: define dso_local x86_thiscallcc frozen %"struct.basic::B"* @"??0B@basic@@QAE@XZ"(%"struct.basic::B"* returned %this) // CHECK: ret } struct C { virtual ~C() { -// DTORS: define linkonce_odr dso_local x86_thiscallcc i8* @"??_GC@basic@@UAEPAXI@Z"(%"struct.basic::C"* %this, i32 %should_call_delete) {{.*}} comdat {{.*}} { +// DTORS: define linkonce_odr dso_local x86_thiscallcc frozen i8* @"??_GC@basic@@UAEPAXI@Z"(%"struct.basic::C"* %this, i32 %should_call_delete) {{.*}} comdat {{.*}} { // DTORS: store i32 %should_call_delete, i32* %[[SHOULD_DELETE_VAR:[0-9a-z._]+]], align 4 // DTORS: store i8* %{{.*}}, i8** %[[RETVAL:[0-9a-z._]+]] // DTORS: %[[SHOULD_DELETE_VALUE:[0-9a-z._]+]] = load i32, i32* %[[SHOULD_DELETE_VAR]] @@ -88,7 +88,7 @@ // CHECK-NEXT: %[[VTABLE:.*]] = load i8* (%"struct.basic::C"*, i32)**, i8* (%"struct.basic::C"*, i32)*** %[[PVTABLE]] // CHECK-NEXT: %[[PVDTOR:.*]] = getelementptr inbounds i8* (%"struct.basic::C"*, i32)*, i8* (%"struct.basic::C"*, i32)** %[[VTABLE]], i64 0 // CHECK-NEXT: %[[VDTOR:.*]] = load i8* (%"struct.basic::C"*, i32)*, i8* (%"struct.basic::C"*, i32)** %[[PVDTOR]] -// CHECK-NEXT: call x86_thiscallcc i8* %[[VDTOR]](%"struct.basic::C"* %[[OBJ_PTR_VALUE]], i32 0) +// CHECK-NEXT: call x86_thiscallcc frozen i8* %[[VDTOR]](%"struct.basic::C"* %[[OBJ_PTR_VALUE]], i32 0) // CHECK-NEXT: ret void } @@ -103,7 +103,7 @@ // CHECK-NEXT: %[[VTABLE:.*]] = load i8* (%"struct.basic::C"*, i32)**, i8* (%"struct.basic::C"*, i32)*** %[[PVTABLE]] // CHECK-NEXT: %[[PVDTOR:.*]] = getelementptr inbounds i8* (%"struct.basic::C"*, i32)*, i8* (%"struct.basic::C"*, i32)** %[[VTABLE]], i64 0 // CHECK-NEXT: %[[VDTOR:.*]] = load i8* (%"struct.basic::C"*, i32)*, i8* (%"struct.basic::C"*, i32)** %[[PVDTOR]] -// CHECK-NEXT: call x86_thiscallcc i8* %[[VDTOR]](%"struct.basic::C"* %[[OBJ_PTR_VALUE]], i32 1) +// CHECK-NEXT: call x86_thiscallcc frozen i8* %[[VDTOR]](%"struct.basic::C"* %[[OBJ_PTR_VALUE]], i32 1) // CHECK: ret void } @@ -118,7 +118,7 @@ // CHECK-NEXT: %[[VTABLE:.*]] = load i8* (%"struct.basic::C"*, i32)**, i8* (%"struct.basic::C"*, i32)*** %[[PVTABLE]] // CHECK-NEXT: %[[PVDTOR:.*]] = getelementptr inbounds i8* (%"struct.basic::C"*, i32)*, i8* (%"struct.basic::C"*, i32)** %[[VTABLE]], i64 0 // CHECK-NEXT: %[[VDTOR:.*]] = load i8* (%"struct.basic::C"*, i32)*, i8* (%"struct.basic::C"*, i32)** %[[PVDTOR]] -// CHECK-NEXT: %[[CALL:.*]] = call x86_thiscallcc i8* %[[VDTOR]](%"struct.basic::C"* %[[OBJ_PTR_VALUE]], i32 0) +// CHECK-NEXT: %[[CALL:.*]] = call x86_thiscallcc frozen i8* %[[VDTOR]](%"struct.basic::C"* %[[OBJ_PTR_VALUE]], i32 0) // CHECK-NEXT: call void @"??3@YAXPAX@Z"(i8* %[[CALL]]) // CHECK: ret void } @@ -172,12 +172,12 @@ void foo() { C c; } -// DTORS2-LABEL: define linkonce_odr dso_local x86_thiscallcc i8* @"??_EC@dtor_in_second_nvbase@@W3AEPAXI@Z" +// DTORS2-LABEL: define linkonce_odr dso_local x86_thiscallcc frozen i8* @"??_EC@dtor_in_second_nvbase@@W3AEPAXI@Z" // DTORS2: (%"struct.dtor_in_second_nvbase::C"* %this, i32 %should_call_delete) // Do an adjustment from B* to C*. // DTORS2: getelementptr i8, i8* %{{.*}}, i32 -4 // DTORS2: bitcast i8* %{{.*}} to %"struct.dtor_in_second_nvbase::C"* -// DTORS2: %[[CALL:.*]] = tail call x86_thiscallcc i8* @"??_GC@dtor_in_second_nvbase@@UAEPAXI@Z" +// DTORS2: %[[CALL:.*]] = tail call x86_thiscallcc frozen i8* @"??_GC@dtor_in_second_nvbase@@UAEPAXI@Z" // DTORS2: ret i8* %[[CALL]] } @@ -228,8 +228,8 @@ }; B::B() { - // CHECK: define dso_local x86_thiscallcc %"struct.constructors::B"* @"??0B@constructors@@QAE@XZ"(%"struct.constructors::B"* returned %this) - // CHECK: call x86_thiscallcc %"struct.constructors::A"* @"??0A@constructors@@QAE@XZ"(%"struct.constructors::A"* %{{.*}}) + // CHECK: define dso_local x86_thiscallcc frozen %"struct.constructors::B"* @"??0B@constructors@@QAE@XZ"(%"struct.constructors::B"* returned %this) + // CHECK: call x86_thiscallcc frozen %"struct.constructors::A"* @"??0A@constructors@@QAE@XZ"(%"struct.constructors::A"* %{{.*}}) // CHECK: ret } @@ -238,7 +238,7 @@ }; C::C() { - // CHECK: define dso_local x86_thiscallcc %"struct.constructors::C"* @"??0C@constructors@@QAE@XZ"(%"struct.constructors::C"* returned %this, i32 %is_most_derived) + // CHECK: define dso_local x86_thiscallcc frozen %"struct.constructors::C"* @"??0C@constructors@@QAE@XZ"(%"struct.constructors::C"* returned %this, i32 %is_most_derived) // TODO: make sure this works in the Release build too; // CHECK: store i32 %is_most_derived, i32* %[[IS_MOST_DERIVED_VAR:.*]], align 4 // CHECK: %[[IS_MOST_DERIVED_VAL:.*]] = load i32, i32* %[[IS_MOST_DERIVED_VAR]] @@ -253,7 +253,7 @@ // CHECK-NEXT: bitcast %"struct.constructors::C"* %{{.*}} to i8* // CHECK-NEXT: getelementptr inbounds i8, i8* %{{.*}}, i32 4 // CHECK-NEXT: bitcast i8* %{{.*}} to %"struct.constructors::A"* - // CHECK-NEXT: call x86_thiscallcc %"struct.constructors::A"* @"??0A@constructors@@QAE@XZ"(%"struct.constructors::A"* %{{.*}}) + // CHECK-NEXT: call x86_thiscallcc frozen %"struct.constructors::A"* @"??0A@constructors@@QAE@XZ"(%"struct.constructors::A"* %{{.*}}) // CHECK-NEXT: br label %[[SKIP_VBASES]] // // CHECK: [[SKIP_VBASES]] @@ -265,7 +265,7 @@ void create_C() { C c; // CHECK: define dso_local void @"?create_C@constructors@@YAXXZ"() - // CHECK: call x86_thiscallcc %"struct.constructors::C"* @"??0C@constructors@@QAE@XZ"(%"struct.constructors::C"* %c, i32 1) + // CHECK: call x86_thiscallcc frozen %"struct.constructors::C"* @"??0C@constructors@@QAE@XZ"(%"struct.constructors::C"* %c, i32 1) // CHECK: ret } @@ -274,7 +274,7 @@ }; D::D() { - // CHECK: define dso_local x86_thiscallcc %"struct.constructors::D"* @"??0D@constructors@@QAE@XZ"(%"struct.constructors::D"* returned %this, i32 %is_most_derived) unnamed_addr + // CHECK: define dso_local x86_thiscallcc frozen %"struct.constructors::D"* @"??0D@constructors@@QAE@XZ"(%"struct.constructors::D"* returned %this, i32 %is_most_derived) unnamed_addr // CHECK: store i32 %is_most_derived, i32* %[[IS_MOST_DERIVED_VAR:.*]], align 4 // CHECK: %[[IS_MOST_DERIVED_VAL:.*]] = load i32, i32* %[[IS_MOST_DERIVED_VAR]] // CHECK: %[[SHOULD_CALL_VBASE_CTORS:.*]] = icmp ne i32 %[[IS_MOST_DERIVED_VAL]], 0 @@ -288,11 +288,11 @@ // CHECK-NEXT: bitcast %"struct.constructors::D"* %{{.*}} to i8* // CHECK-NEXT: getelementptr inbounds i8, i8* %{{.*}}, i32 4 // CHECK-NEXT: bitcast i8* %{{.*}} to %"struct.constructors::A"* - // CHECK-NEXT: call x86_thiscallcc %"struct.constructors::A"* @"??0A@constructors@@QAE@XZ"(%"struct.constructors::A"* %{{.*}}) + // CHECK-NEXT: call x86_thiscallcc frozen %"struct.constructors::A"* @"??0A@constructors@@QAE@XZ"(%"struct.constructors::A"* %{{.*}}) // CHECK-NEXT: br label %[[SKIP_VBASES]] // // CHECK: [[SKIP_VBASES]] - // CHECK: call x86_thiscallcc %"struct.constructors::C"* @"??0C@constructors@@QAE@XZ"(%"struct.constructors::C"* %{{.*}}, i32 0) + // CHECK: call x86_thiscallcc frozen %"struct.constructors::C"* @"??0C@constructors@@QAE@XZ"(%"struct.constructors::C"* %{{.*}}, i32 0) // CHECK: ret } @@ -301,7 +301,7 @@ }; E::E() { - // CHECK: define dso_local x86_thiscallcc %"struct.constructors::E"* @"??0E@constructors@@QAE@XZ"(%"struct.constructors::E"* returned %this, i32 %is_most_derived) unnamed_addr + // CHECK: define dso_local x86_thiscallcc frozen %"struct.constructors::E"* @"??0E@constructors@@QAE@XZ"(%"struct.constructors::E"* returned %this, i32 %is_most_derived) unnamed_addr // CHECK: store i32 %is_most_derived, i32* %[[IS_MOST_DERIVED_VAR:.*]], align 4 // CHECK: %[[IS_MOST_DERIVED_VAL:.*]] = load i32, i32* %[[IS_MOST_DERIVED_VAR]] // CHECK: %[[SHOULD_CALL_VBASE_CTORS:.*]] = icmp ne i32 %[[IS_MOST_DERIVED_VAL]], 0 @@ -318,8 +318,8 @@ // CHECK-NEXT: bitcast %"struct.constructors::E"* %{{.*}} to i8* // CHECK-NEXT: getelementptr inbounds i8, i8* %{{.*}}, i32 4 // CHECK-NEXT: bitcast i8* %{{.*}} to %"struct.constructors::A"* - // CHECK-NEXT: call x86_thiscallcc %"struct.constructors::A"* @"??0A@constructors@@QAE@XZ"(%"struct.constructors::A"* %{{.*}}) - // CHECK: call x86_thiscallcc %"struct.constructors::C"* @"??0C@constructors@@QAE@XZ"(%"struct.constructors::C"* %{{.*}}, i32 0) + // CHECK-NEXT: call x86_thiscallcc frozen %"struct.constructors::A"* @"??0A@constructors@@QAE@XZ"(%"struct.constructors::A"* %{{.*}}) + // CHECK: call x86_thiscallcc frozen %"struct.constructors::C"* @"??0C@constructors@@QAE@XZ"(%"struct.constructors::C"* %{{.*}}, i32 0) // CHECK-NEXT: br label %[[SKIP_VBASES]] // // CHECK: [[SKIP_VBASES]] @@ -333,7 +333,7 @@ }; F::F() {} -// CHECK: define dso_local x86_thiscallcc %"struct.constructors::F"* @"??0F@constructors@@QAE@XZ" +// CHECK: define dso_local x86_thiscallcc frozen %"struct.constructors::F"* @"??0F@constructors@@QAE@XZ" } // end namespace constructors @@ -404,11 +404,11 @@ B::B(int *a) {} B::B(const char *a, ...) {} B::B(short *a) {} -// CHECK: define dso_local x86_thiscallcc %"struct.test1::B"* @"??0B@test1@@QAE@PAH@Z" +// CHECK: define dso_local x86_thiscallcc frozen %"struct.test1::B"* @"??0B@test1@@QAE@PAH@Z" // CHECK: (%"struct.test1::B"* returned %this, i32* %a, i32 %is_most_derived) -// CHECK: define dso_local %"struct.test1::B"* @"??0B@test1@@QAA@PBDZZ" +// CHECK: define dso_local frozen %"struct.test1::B"* @"??0B@test1@@QAA@PBDZZ" // CHECK: (%"struct.test1::B"* returned %this, i32 %is_most_derived, i8* %a, ...) -// CHECK: define dso_local x86_thiscallcc %"struct.test1::B"* @"??0B@test1@@QAE@PAF@Z" +// CHECK: define dso_local x86_thiscallcc frozen %"struct.test1::B"* @"??0B@test1@@QAE@PAF@Z" // CHECK: (%"struct.test1::B"* returned %this, i16* %a, i32 %is_most_derived) void construct_b() { @@ -417,9 +417,9 @@ B b2("%d %d", 1, 2); } // CHECK-LABEL: define dso_local void @"?construct_b@test1@@YAXXZ"() -// CHECK: call x86_thiscallcc %"struct.test1::B"* @"??0B@test1@@QAE@PAH@Z" +// CHECK: call x86_thiscallcc frozen %"struct.test1::B"* @"??0B@test1@@QAE@PAH@Z" // CHECK: (%"struct.test1::B"* {{.*}}, i32* {{.*}}, i32 1) -// CHECK: call %"struct.test1::B"* (%"struct.test1::B"*, i32, i8*, ...) @"??0B@test1@@QAA@PBDZZ" +// CHECK: call frozen %"struct.test1::B"* (%"struct.test1::B"*, i32, i8*, ...) @"??0B@test1@@QAA@PBDZZ" // CHECK: (%"struct.test1::B"* {{.*}}, i32 1, i8* {{.*}}, i32 1, i32 2) } @@ -451,7 +451,7 @@ }; X::X(int) : X() {} } -// CHECK: define dso_local x86_thiscallcc %"struct.delegating_ctor::X"* @"??0X@delegating_ctor@@QAE@H@Z"( +// CHECK: define dso_local x86_thiscallcc frozen %"struct.delegating_ctor::X"* @"??0X@delegating_ctor@@QAE@H@Z"( // CHECK: %[[is_most_derived_addr:.*]] = alloca i32, align 4 // CHECK: store i32 %is_most_derived, i32* %[[is_most_derived_addr]] // CHECK: %[[is_most_derived:.*]] = load i32, i32* %[[is_most_derived_addr]] @@ -467,7 +467,7 @@ void *getA() { return (void*)new A(); } -// CHECK: define internal x86_thiscallcc i8* @"??_GA@?A0x{{[^@]*}}@@UAEPAXI@Z" +// CHECK: define internal x86_thiscallcc frozen i8* @"??_GA@?A0x{{[^@]*}}@@UAEPAXI@Z" // CHECK: (%"struct.(anonymous namespace)::A"* %this, i32 %should_call_delete) // CHECK: define internal x86_thiscallcc void @"??1A@?A0x{{[^@]*}}@@UAE@XZ" // CHECK: (%"struct.(anonymous namespace)::A"* %this) @@ -477,7 +477,7 @@ class G { public: __stdcall G() {}; -// DTORS4: define linkonce_odr dso_local x86_thiscallcc %class.G* @"??0G@@QAE@XZ" +// DTORS4: define linkonce_odr dso_local x86_thiscallcc frozen %class.G* @"??0G@@QAE@XZ" __stdcall ~G() {}; // DTORS4: define linkonce_odr dso_local x86_thiscallcc void @"??1G@@QAE@XZ" }; diff --git a/clang/test/CodeGenCXX/microsoft-abi-thread-safe-statics.cpp b/clang/test/CodeGenCXX/microsoft-abi-thread-safe-statics.cpp --- a/clang/test/CodeGenCXX/microsoft-abi-thread-safe-statics.cpp +++ b/clang/test/CodeGenCXX/microsoft-abi-thread-safe-statics.cpp @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -fexceptions -fcxx-exceptions -fms-extensions -fms-compatibility -fms-compatibility-version=19 -std=c++11 -emit-llvm %s -o - -triple=i386-pc-win32 | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args -fexceptions -fcxx-exceptions -fms-extensions -fms-compatibility -fms-compatibility-version=19 -std=c++11 -emit-llvm %s -o - -triple=i386-pc-win32 | FileCheck %s // REQUIRES: asserts struct S { @@ -89,7 +89,7 @@ return b ? j : i; } -// CHECK-LABEL: define dso_local i32 @"?g1@@YAHXZ"() +// CHECK-LABEL: define dso_local frozen i32 @"?g1@@YAHXZ"() int f1(); int g1() { static int i = f1(); diff --git a/clang/test/CodeGenCXX/microsoft-abi-throw.cpp b/clang/test/CodeGenCXX/microsoft-abi-throw.cpp --- a/clang/test/CodeGenCXX/microsoft-abi-throw.cpp +++ b/clang/test/CodeGenCXX/microsoft-abi-throw.cpp @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -emit-llvm -o - -triple=i386-pc-win32 -std=c++11 %s -fcxx-exceptions -fms-extensions | FileCheck %s -// RUN: %clang_cc1 -emit-llvm -o - -triple=i386-pc-win32 -std=c++11 %s -fcxx-exceptions -fms-extensions -DSTD | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args -emit-llvm -o - -triple=i386-pc-win32 -std=c++11 %s -fcxx-exceptions -fms-extensions | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args -emit-llvm -o - -triple=i386-pc-win32 -std=c++11 %s -fcxx-exceptions -fms-extensions -DSTD | FileCheck %s // CHECK-DAG: @"??_R0?AUY@@@8" = linkonce_odr global %rtti.TypeDescriptor7 { i8** @"??_7type_info@@6B@", i8* null, [8 x i8] c".?AUY@@\00" }, comdat // CHECK-DAG: @"_CT??_R0?AUY@@@8??0Y@@QAE@ABU0@@Z8" = linkonce_odr unnamed_addr constant %eh.CatchableType { i32 4, i8* bitcast (%rtti.TypeDescriptor7* @"??_R0?AUY@@@8" to i8*), i32 0, i32 -1, i32 0, i32 8, i8* bitcast (%struct.Y* (%struct.Y*, %struct.Y*, i32)* @"??0Y@@QAE@ABU0@@Z" to i8*) }, section ".xdata", comdat @@ -37,7 +37,7 @@ void f(const Y &y) { // CHECK-LABEL: @"?f@@YAXABUY@@@Z" - // CHECK: call x86_thiscallcc %struct.Y* @"??0Y@@QAE@ABU0@@Z"(%struct.Y* %[[mem:.*]], %struct.Y* + // CHECK: call x86_thiscallcc frozen %struct.Y* @"??0Y@@QAE@ABU0@@Z"(%struct.Y* %[[mem:.*]], %struct.Y* // CHECK: %[[cast:.*]] = bitcast %struct.Y* %[[mem]] to i8* // CHECK: call void @_CxxThrowException(i8* %[[cast]], %eh.ThrowInfo* @"_TI5?AUY@@") throw y; diff --git a/clang/test/CodeGenCXX/microsoft-abi-thunks.cpp b/clang/test/CodeGenCXX/microsoft-abi-thunks.cpp --- a/clang/test/CodeGenCXX/microsoft-abi-thunks.cpp +++ b/clang/test/CodeGenCXX/microsoft-abi-thunks.cpp @@ -31,10 +31,10 @@ C(); virtual ~C(); - // MANGLING-DAG: declare {{.*}} @"??1C@@UAE@XZ"({{.*}}) + // MANGLING-DAG: declare {{.*}} @"??1C@@UAE@XZ"({{.*}} frozen) // MANGLING-DAG: define {{.*}} @"??_GC@@UAEPAXI@Z"({{.*}}) // MANGLING-DAG: define {{.*}} @"??_EC@@W3AEPAXI@Z"({{.*}}) {{.*}} comdat - // MANGLING-X64-DAG: declare {{.*}} @"??1C@@UEAA@XZ"({{.*}}) + // MANGLING-X64-DAG: declare {{.*}} @"??1C@@UEAA@XZ"({{.*}} frozen) // MANGLING-X64-DAG: define {{.*}} @"??_GC@@UEAAPEAXI@Z"({{.*}}) // MANGLING-X64-DAG: define {{.*}} @"??_EC@@W7EAAPEAXI@Z"({{.*}}) {{.*}} comdat @@ -61,10 +61,10 @@ C::C() {} // Emits vftable and forces thunk generation. -// CODEGEN-LABEL: define linkonce_odr dso_local x86_thiscallcc i8* @"??_EC@@W3AEPAXI@Z"(%struct.C* %this, i32 %should_call_delete) {{.*}} comdat +// CODEGEN-LABEL: define linkonce_odr dso_local x86_thiscallcc frozen i8* @"??_EC@@W3AEPAXI@Z"(%struct.C* frozen %this, i32 frozen %should_call_delete) {{.*}} comdat // CODEGEN: getelementptr i8, i8* {{.*}}, i32 -4 // FIXME: should actually call _EC, not _GC. -// CODEGEN: call x86_thiscallcc i8* @"??_GC@@UAEPAXI@Z" +// CODEGEN: call x86_thiscallcc frozen i8* @"??_GC@@UAEPAXI@Z" // CODEGEN: ret // CODEGEN-LABEL: define linkonce_odr dso_local x86_thiscallcc void @"?public_f@C@@W3AEXXZ"(%struct.C* @@ -91,8 +91,8 @@ E::E() {} // Emits vftable and forces thunk generation. -// CODEGEN-LABEL: define weak_odr dso_local x86_thiscallcc %struct.C* @"?goo@E@@QAEPAUB@@XZ"{{.*}} comdat -// CODEGEN: call x86_thiscallcc %struct.C* @"?goo@E@@UAEPAUC@@XZ" +// CODEGEN-LABEL: define weak_odr dso_local x86_thiscallcc frozen %struct.C* @"?goo@E@@QAEPAUB@@XZ"{{.*}} comdat +// CODEGEN: call x86_thiscallcc frozen %struct.C* @"?goo@E@@UAEPAUC@@XZ" // CODEGEN: getelementptr inbounds i8, i8* {{.*}}, i32 4 // CODEGEN: ret @@ -124,8 +124,8 @@ I::I() {} // Emits vftable and forces thunk generation. -// CODEGEN-LABEL: define weak_odr dso_local x86_thiscallcc %struct.{{[BF]}}* @"?goo@I@@QAEPAUB@@XZ"{{.*}} comdat -// CODEGEN: %[[ORIG_RET:.*]] = call x86_thiscallcc %struct.F* @"?goo@I@@UAEPAUF@@XZ" +// CODEGEN-LABEL: define weak_odr dso_local x86_thiscallcc frozen %struct.{{[BF]}}* @"?goo@I@@QAEPAUB@@XZ"{{.*}} comdat +// CODEGEN: %[[ORIG_RET:.*]] = call x86_thiscallcc frozen %struct.F* @"?goo@I@@UAEPAUF@@XZ" // CODEGEN: %[[ORIG_RET_i8:.*]] = bitcast %struct.F* %[[ORIG_RET]] to i8* // CODEGEN: %[[VBPTR_i8:.*]] = getelementptr inbounds i8, i8* %[[ORIG_RET_i8]], i32 4 // CODEGEN: %[[VBPTR:.*]] = bitcast i8* %[[VBPTR_i8]] to i32** @@ -160,5 +160,5 @@ E::E() {} E e; // Class with internal linkage has internal linkage thunks. -// CODEGEN: define internal x86_thiscallcc %struct.C* @"?goo@E@?A0x{{[^@]*}}@@QAEPAUB@@XZ" +// CODEGEN: define internal x86_thiscallcc frozen %struct.C* @"?goo@E@?A0x{{[^@]*}}@@QAEPAUB@@XZ" } diff --git a/clang/test/CodeGenCXX/microsoft-abi-typeid.cpp b/clang/test/CodeGenCXX/microsoft-abi-typeid.cpp --- a/clang/test/CodeGenCXX/microsoft-abi-typeid.cpp +++ b/clang/test/CodeGenCXX/microsoft-abi-typeid.cpp @@ -12,20 +12,20 @@ A* fn(); const std::type_info* test0_typeid() { return &typeid(int); } -// CHECK-LABEL: define dso_local %struct.type_info* @"?test0_typeid@@YAPBUtype_info@@XZ"() +// CHECK-LABEL: define dso_local frozen %struct.type_info* @"?test0_typeid@@YAPBUtype_info@@XZ"() // CHECK: ret %struct.type_info* bitcast (%rtti.TypeDescriptor2* @"??_R0H@8" to %struct.type_info*) const std::type_info* test1_typeid() { return &typeid(A); } -// CHECK-LABEL: define dso_local %struct.type_info* @"?test1_typeid@@YAPBUtype_info@@XZ"() +// CHECK-LABEL: define dso_local frozen %struct.type_info* @"?test1_typeid@@YAPBUtype_info@@XZ"() // CHECK: ret %struct.type_info* bitcast (%rtti.TypeDescriptor7* @"??_R0?AUA@@@8" to %struct.type_info*) const std::type_info* test2_typeid() { return &typeid(&a); } -// CHECK-LABEL: define dso_local %struct.type_info* @"?test2_typeid@@YAPBUtype_info@@XZ"() +// CHECK-LABEL: define dso_local frozen %struct.type_info* @"?test2_typeid@@YAPBUtype_info@@XZ"() // CHECK: ret %struct.type_info* bitcast (%rtti.TypeDescriptor7* @"??_R0PAUA@@@8" to %struct.type_info*) const std::type_info* test3_typeid() { return &typeid(*fn()); } -// CHECK-LABEL: define dso_local %struct.type_info* @"?test3_typeid@@YAPBUtype_info@@XZ"() -// CHECK: [[CALL:%.*]] = call %struct.A* @"?fn@@YAPAUA@@XZ"() +// CHECK-LABEL: define dso_local frozen %struct.type_info* @"?test3_typeid@@YAPBUtype_info@@XZ"() +// CHECK: [[CALL:%.*]] = call frozen %struct.A* @"?fn@@YAPAUA@@XZ"() // CHECK-NEXT: [[CMP:%.*]] = icmp eq %struct.A* [[CALL]], null // CHECK-NEXT: br i1 [[CMP]] // CHECK: call i8* @__RTtypeid(i8* null) @@ -41,11 +41,11 @@ // CHECK-NEXT: ret %struct.type_info* [[RET]] const std::type_info* test4_typeid() { return &typeid(b); } -// CHECK: define dso_local %struct.type_info* @"?test4_typeid@@YAPBUtype_info@@XZ"() +// CHECK: define dso_local frozen %struct.type_info* @"?test4_typeid@@YAPBUtype_info@@XZ"() // CHECK: ret %struct.type_info* bitcast (%rtti.TypeDescriptor2* @"??_R0H@8" to %struct.type_info*) const std::type_info* test5_typeid() { return &typeid(v); } -// CHECK: define dso_local %struct.type_info* @"?test5_typeid@@YAPBUtype_info@@XZ"() +// CHECK: define dso_local frozen %struct.type_info* @"?test5_typeid@@YAPBUtype_info@@XZ"() // CHECK: [[RT:%.*]] = call i8* @__RTtypeid(i8* bitcast (%struct.V* @"?v@@3UV@@A" to i8*)) // CHECK-NEXT: [[RET:%.*]] = bitcast i8* [[RT]] to %struct.type_info* // CHECK-NEXT: ret %struct.type_info* [[RET]] diff --git a/clang/test/CodeGenCXX/microsoft-abi-vbase-dtor.cpp b/clang/test/CodeGenCXX/microsoft-abi-vbase-dtor.cpp --- a/clang/test/CodeGenCXX/microsoft-abi-vbase-dtor.cpp +++ b/clang/test/CodeGenCXX/microsoft-abi-vbase-dtor.cpp @@ -13,13 +13,13 @@ }; void useCompleteDtor(HasCompleteDtor *p) { delete p; } -// CHECK-LABEL: define dso_local void @"?useCompleteDtor@@YAXPEAUHasCompleteDtor@@@Z"(%struct.HasCompleteDtor* %p) +// CHECK-LABEL: define dso_local void @"?useCompleteDtor@@YAXPEAUHasCompleteDtor@@@Z"(%struct.HasCompleteDtor* frozen %p) // CHECK: call void @"??_DHasCompleteDtor@@QEAAXXZ"({{.*}}) -// CHECK-LABEL: define linkonce_odr dso_local void @"??_DHasCompleteDtor@@QEAAXXZ"(%struct.HasCompleteDtor* %this) +// CHECK-LABEL: define linkonce_odr dso_local void @"??_DHasCompleteDtor@@QEAAXXZ"(%struct.HasCompleteDtor* frozen %this) // CHECK: call void @"??1HasCompleteDtor@@QEAA@XZ"({{.*}}) // CHECK: call void @"??1DefaultedDtor@@QEAA@XZ"({{.*}}) -// CHECK-LABEL: define linkonce_odr dso_local void @"??1DefaultedDtor@@QEAA@XZ"(%struct.DefaultedDtor* %this) -// CHECK: call void @"??1HasDtor@@QEAA@XZ"(%struct.HasDtor* %{{.*}}) +// CHECK-LABEL: define linkonce_odr dso_local void @"??1DefaultedDtor@@QEAA@XZ"(%struct.DefaultedDtor* frozen %this) +// CHECK: call void @"??1HasDtor@@QEAA@XZ"(%struct.HasDtor* frozen %{{.*}}) diff --git a/clang/test/CodeGenCXX/microsoft-abi-virtual-inheritance-vtordisps.cpp b/clang/test/CodeGenCXX/microsoft-abi-virtual-inheritance-vtordisps.cpp --- a/clang/test/CodeGenCXX/microsoft-abi-virtual-inheritance-vtordisps.cpp +++ b/clang/test/CodeGenCXX/microsoft-abi-virtual-inheritance-vtordisps.cpp @@ -33,7 +33,7 @@ // CHECK: %[[VTORDISP:.*]] = load i32, i32* %[[VTORDISP_PTR]] // CHECK: %[[VTORDISP_NEG:.*]] = sub i32 0, %[[VTORDISP]] // CHECK: %[[ADJUSTED_i8:.*]] = getelementptr i8, i8* %[[ECX_i8]], i32 %[[VTORDISP_NEG]] -// CHECK: call x86_thiscallcc void @"?f@D@@UAEXXZ"(i8* %[[ADJUSTED_i8]]) +// CHECK: call x86_thiscallcc void @"?f@D@@UAEXXZ"(i8* frozen %[[ADJUSTED_i8]]) // CHECK: ret void // CHECK-LABEL: define linkonce_odr dso_local x86_thiscallcc void @"?f@D@@$4PPPPPPPI@3AEXXZ" @@ -46,7 +46,7 @@ // CHECK: %[[VTORDISP_NEG:.*]] = sub i32 0, %[[VTORDISP]] // CHECK: %[[VTORDISP_ADJUSTED_i8:.*]] = getelementptr i8, i8* %[[ECX_i8]], i32 %[[VTORDISP_NEG]] // CHECK: %[[ADJUSTED_i8:.*]] = getelementptr i8, i8* %[[VTORDISP_ADJUSTED_i8]], i32 -4 -// CHECK: call x86_thiscallcc void @"?f@D@@UAEXXZ"(i8* %[[ADJUSTED_i8]]) +// CHECK: call x86_thiscallcc void @"?f@D@@UAEXXZ"(i8* frozen %[[ADJUSTED_i8]]) // CHECK: ret void struct E : virtual A { @@ -82,5 +82,5 @@ // CHECK: %[[VBASE_OFFSET:.*]] = load i32, i32* %[[VBOFFSET_PTR]] // CHECK: %[[VBASE:.*]] = getelementptr inbounds i8, i8* %[[VBPTR_i8]], i32 %[[VBASE_OFFSET]] // CHECK: %[[ARG_i8:.*]] = getelementptr i8, i8* %[[VBASE]], i32 8 -// CHECK: call x86_thiscallcc void @"?f@E@@UAEXXZ"(i8* %[[ARG_i8]]) +// CHECK: call x86_thiscallcc void @"?f@E@@UAEXXZ"(i8* frozen %[[ARG_i8]]) // CHECK: ret void diff --git a/clang/test/CodeGenCXX/microsoft-abi-virtual-inheritance.cpp b/clang/test/CodeGenCXX/microsoft-abi-virtual-inheritance.cpp --- a/clang/test/CodeGenCXX/microsoft-abi-virtual-inheritance.cpp +++ b/clang/test/CodeGenCXX/microsoft-abi-virtual-inheritance.cpp @@ -1,9 +1,9 @@ -// RUN: %clang_cc1 %s -fno-rtti -std=c++11 -Wno-inaccessible-base -triple=i386-pc-win32 -emit-llvm -o %t +// RUN: %clang_cc1 -disable-frozen-args %s -fno-rtti -std=c++11 -Wno-inaccessible-base -triple=i386-pc-win32 -emit-llvm -o %t // RUN: FileCheck %s < %t // RUN: FileCheck --check-prefix=CHECK2 %s < %t // For now, just make sure x86_64 doesn't crash. -// RUN: %clang_cc1 %s -fno-rtti -std=c++11 -Wno-inaccessible-base -triple=x86_64-pc-win32 -emit-llvm -o %t +// RUN: %clang_cc1 -disable-frozen-args %s -fno-rtti -std=c++11 -Wno-inaccessible-base -triple=x86_64-pc-win32 -emit-llvm -o %t struct VBase { virtual ~VBase(); @@ -20,7 +20,7 @@ }; B::B() { - // CHECK-LABEL: define dso_local x86_thiscallcc %struct.B* @"??0B@@QAE@XZ" + // CHECK-LABEL: define dso_local x86_thiscallcc frozen %struct.B* @"??0B@@QAE@XZ" // CHECK: %[[THIS:.*]] = load %struct.B*, %struct.B** // CHECK: br i1 %{{.*}}, label %[[INIT_VBASES:.*]], label %[[SKIP_VBASES:.*]] @@ -98,7 +98,7 @@ // CHECK2: call x86_thiscallcc void @"??1VBase@@UAE@XZ"(%struct.VBase* %[[VBASE]]) // CHECK2: ret - // CHECK2-LABEL: define linkonce_odr dso_local x86_thiscallcc i8* @"??_GB@@UAEPAXI@Z" + // CHECK2-LABEL: define linkonce_odr dso_local x86_thiscallcc frozen i8* @"??_GB@@UAEPAXI@Z" // CHECK2: store %struct.B* %{{.*}}, %struct.B** %[[THIS_ADDR:.*]], align 4 // CHECK2: %[[THIS:.*]] = load %struct.B*, %struct.B** %[[THIS_ADDR]] // CHECK2: %[[THIS_PARAM_i8:.*]] = bitcast %struct.B* %[[THIS]] to i8* @@ -211,14 +211,14 @@ // CHECK: %[[VFUN:.*]] = getelementptr inbounds i8* (%struct.B*, i32)*, i8* (%struct.B*, i32)** %[[VFTABLE]], i64 0 // CHECK: %[[VFUN_VALUE:.*]] = load i8* (%struct.B*, i32)*, i8* (%struct.B*, i32)** %[[VFUN]] // -// CHECK: call x86_thiscallcc i8* %[[VFUN_VALUE]](%struct.B* %[[VBASE]], i32 1) +// CHECK: call x86_thiscallcc frozen i8* %[[VFUN_VALUE]](%struct.B* %[[VBASE]], i32 1) // CHECK: ret void } void call_complete_dtor() { // CHECK-LABEL: define dso_local void @"?call_complete_dtor@@YAXXZ" B b; - // CHECK: call x86_thiscallcc %struct.B* @"??0B@@QAE@XZ"(%struct.B* %[[B:.*]], i32 1) + // CHECK: call x86_thiscallcc frozen %struct.B* @"??0B@@QAE@XZ"(%struct.B* %[[B:.*]], i32 1) // CHECK-NOT: getelementptr // CHECK: call x86_thiscallcc void @"??_DB@@QAEXXZ"(%struct.B* %[[B]]) // CHECK: ret @@ -231,7 +231,7 @@ // Used to crash on an assertion. C::C() { -// CHECK-LABEL: define dso_local x86_thiscallcc %struct.C* @"??0C@@QAE@XZ" +// CHECK-LABEL: define dso_local x86_thiscallcc frozen %struct.C* @"??0C@@QAE@XZ" } namespace multiple_vbases { @@ -255,7 +255,7 @@ }; D::D() { - // CHECK-LABEL: define dso_local x86_thiscallcc %"struct.multiple_vbases::D"* @"??0D@multiple_vbases@@QAE@XZ" + // CHECK-LABEL: define dso_local x86_thiscallcc frozen %"struct.multiple_vbases::D"* @"??0D@multiple_vbases@@QAE@XZ" // Just make sure we emit 3 vtordisps after initializing vfptrs. // CHECK: store i32 (...)** bitcast ({ [1 x i8*] }* @"??_7D@multiple_vbases@@6BA@1@@" to i32 (...)**), i32 (...)*** %{{.*}} // CHECK: store i32 (...)** bitcast ({ [1 x i8*] }* @"??_7D@multiple_vbases@@6BB@1@@" to i32 (...)**), i32 (...)*** %{{.*}} @@ -334,20 +334,20 @@ // call to B() from C(). void callC() { C x; } -// CHECK-LABEL: define linkonce_odr dso_local x86_thiscallcc %"struct.test2::C"* @"??0C@test2@@QAE@XZ" +// CHECK-LABEL: define linkonce_odr dso_local x86_thiscallcc frozen %"struct.test2::C"* @"??0C@test2@@QAE@XZ" // CHECK: (%"struct.test2::C"* returned %this, i32 %is_most_derived) // CHECK: br i1 // Virtual bases -// CHECK: call x86_thiscallcc %"struct.test2::A"* @"??0A@test2@@QAE@XZ"(%"struct.test2::A"* %{{.*}}) +// CHECK: call x86_thiscallcc frozen %"struct.test2::A"* @"??0A@test2@@QAE@XZ"(%"struct.test2::A"* %{{.*}}) // CHECK: br label // Non-virtual bases -// CHECK: call x86_thiscallcc %"struct.test2::B"* @"??0B@test2@@QAE@XZ"(%"struct.test2::B"* %{{.*}}, i32 0) -// CHECK: call x86_thiscallcc %"struct.test2::A"* @"??0A@test2@@QAE@XZ"(%"struct.test2::A"* %{{.*}}) +// CHECK: call x86_thiscallcc frozen %"struct.test2::B"* @"??0B@test2@@QAE@XZ"(%"struct.test2::B"* %{{.*}}, i32 0) +// CHECK: call x86_thiscallcc frozen %"struct.test2::A"* @"??0A@test2@@QAE@XZ"(%"struct.test2::A"* %{{.*}}) // CHECK: ret -// CHECK2-LABEL: define linkonce_odr dso_local x86_thiscallcc %"struct.test2::B"* @"??0B@test2@@QAE@XZ" +// CHECK2-LABEL: define linkonce_odr dso_local x86_thiscallcc frozen %"struct.test2::B"* @"??0B@test2@@QAE@XZ" // CHECK2: (%"struct.test2::B"* returned %this, i32 %is_most_derived) -// CHECK2: call x86_thiscallcc %"struct.test2::A"* @"??0A@test2@@QAE@XZ"(%"struct.test2::A"* %{{.*}}) +// CHECK2: call x86_thiscallcc frozen %"struct.test2::A"* @"??0A@test2@@QAE@XZ"(%"struct.test2::A"* %{{.*}}) // CHECK2: ret } @@ -428,7 +428,7 @@ // CHECK: %[[VFTABLE:.*]] = load i8* (%"struct.test4::C"*, i32)**, i8* (%"struct.test4::C"*, i32)*** %[[VPTR]] // CHECK: %[[VFTENTRY:.*]] = getelementptr inbounds i8* (%"struct.test4::C"*, i32)*, i8* (%"struct.test4::C"*, i32)** %[[VFTABLE]], i64 0 // CHECK: %[[VFUN:.*]] = load i8* (%"struct.test4::C"*, i32)*, i8* (%"struct.test4::C"*, i32)** %[[VFTENTRY]] - // CHECK: call x86_thiscallcc i8* %[[VFUN]](%"struct.test4::C"* %[[OBJ]], i32 1) + // CHECK: call x86_thiscallcc frozen i8* %[[VFUN]](%"struct.test4::C"* %[[OBJ]], i32 1) // CHECK: ret } @@ -467,7 +467,7 @@ // CHECK: %[[VFTABLE:.*]] = load i8* (%"struct.test4::E"*, i32)**, i8* (%"struct.test4::E"*, i32)*** %[[VPTR]] // CHECK: %[[VFTENTRY:.*]] = getelementptr inbounds i8* (%"struct.test4::E"*, i32)*, i8* (%"struct.test4::E"*, i32)** %[[VFTABLE]], i64 0 // CHECK: %[[VFUN:.*]] = load i8* (%"struct.test4::E"*, i32)*, i8* (%"struct.test4::E"*, i32)** %[[VFTENTRY]] - // CHECK: call x86_thiscallcc i8* %[[VFUN]](%"struct.test4::E"* %[[B_as_E]], i32 1) + // CHECK: call x86_thiscallcc frozen i8* %[[VFUN]](%"struct.test4::E"* %[[B_as_E]], i32 1) delete obj; } @@ -488,7 +488,7 @@ }; C::C() : B() {} -// CHECK-LABEL: define dso_local x86_thiscallcc %"struct.test5::C"* @"??0C@test5@@QAE@XZ"( +// CHECK-LABEL: define dso_local x86_thiscallcc frozen %"struct.test5::C"* @"??0C@test5@@QAE@XZ"( // CHECK: %[[THIS:.*]] = load %"struct.test5::C"*, %"struct.test5::C"** // CHECK: br i1 %{{.*}}, label %[[INIT_VBASES:.*]], label %[[SKIP_VBASES:.*]] @@ -528,7 +528,7 @@ D(); }; D::D() : C() {} -// CHECK-LABEL: define dso_local x86_thiscallcc %"class.test6::D"* @"??0D@test6@@AAE@XZ"( +// CHECK-LABEL: define dso_local x86_thiscallcc frozen %"class.test6::D"* @"??0D@test6@@AAE@XZ"( // CHECK: %[[THIS:.*]] = load %"class.test6::D"*, %"class.test6::D"** // CHECK: br i1 %{{.*}}, label %[[INIT_VBASES:.*]], label %[[SKIP_VBASES:.*]] @@ -549,7 +549,7 @@ struct C : virtual B {}; struct D : virtual A, C {}; D d; -// CHECK-LABEL: define linkonce_odr dso_local x86_thiscallcc i8* @"??_GD@pr36921@@UAEPAXI@Z"( +// CHECK-LABEL: define linkonce_odr dso_local x86_thiscallcc frozen i8* @"??_GD@pr36921@@UAEPAXI@Z"( // CHECK: %[[THIS:.*]] = load %"struct.pr36921::D"*, %"struct.pr36921::D"** // CHECK: %[[THIS_UNADJ_i8:.*]] = bitcast %"struct.pr36921::D"* %[[THIS_RELOAD]] to i8* // CHECK: %[[THIS_ADJ_i8:.*]] = getelementptr inbounds i8, i8* %[[THIS_UNADJ_i8]], i32 -4 diff --git a/clang/test/CodeGenCXX/microsoft-abi-virtual-member-pointers.cpp b/clang/test/CodeGenCXX/microsoft-abi-virtual-member-pointers.cpp --- a/clang/test/CodeGenCXX/microsoft-abi-virtual-member-pointers.cpp +++ b/clang/test/CodeGenCXX/microsoft-abi-virtual-member-pointers.cpp @@ -70,119 +70,119 @@ // Thunk for calling the 1st virtual function in C with no parameters. -// CHECK32-LABEL: define linkonce_odr x86_thiscallcc void @"??_9C@@$BA@AE"(%struct.C* %this, ...) +// CHECK32-LABEL: define linkonce_odr x86_thiscallcc void @"??_9C@@$BA@AE"(%struct.C* frozen %this, ...) // CHECK32: #[[ATTR:[0-9]+]] // CHECK32-NOT: unnamed_addr // CHECK32: comdat // CHECK32: [[VPTR:%.*]] = getelementptr inbounds void (%struct.C*, ...)*, void (%struct.C*, ...)** %{{.*}}, i64 0 // CHECK32: [[CALLEE:%.*]] = load void (%struct.C*, ...)*, void (%struct.C*, ...)** [[VPTR]] -// CHECK32: musttail call x86_thiscallcc void (%struct.C*, ...) [[CALLEE]](%struct.C* %{{.*}}, ...) +// CHECK32: musttail call x86_thiscallcc void (%struct.C*, ...) [[CALLEE]](%struct.C* frozen %{{.*}}, ...) // CHECK32-NEXT: ret void // CHECK32: } // -// CHECK64-LABEL: define linkonce_odr void @"??_9C@@$BA@AA"(%struct.C* %this, ...) +// CHECK64-LABEL: define linkonce_odr void @"??_9C@@$BA@AA"(%struct.C* frozen %this, ...) // CHECK64: #[[ATTR:[0-9]+]] // CHECK64-NOT: unnamed_addr // CHECK64: comdat // CHECK64: [[VPTR:%.*]] = getelementptr inbounds void (%struct.C*, ...)*, void (%struct.C*, ...)** %{{.*}}, i64 0 // CHECK64: [[CALLEE:%.*]] = load void (%struct.C*, ...)*, void (%struct.C*, ...)** [[VPTR]] -// CHECK64: musttail call void (%struct.C*, ...) [[CALLEE]](%struct.C* %{{.*}}, ...) +// CHECK64: musttail call void (%struct.C*, ...) [[CALLEE]](%struct.C* frozen %{{.*}}, ...) // CHECK64-NEXT: ret void // CHECK64: } // Thunk for calling the 2nd virtual function in C, taking int and double as parameters, returning int. -// CHECK32-LABEL: define linkonce_odr x86_thiscallcc void @"??_9C@@$B3AE"(%struct.C* %this, ...) +// CHECK32-LABEL: define linkonce_odr x86_thiscallcc void @"??_9C@@$B3AE"(%struct.C* frozen %this, ...) // CHECK32: #[[ATTR]] comdat // CHECK32: [[VPTR:%.*]] = getelementptr inbounds void (%struct.C*, ...)*, void (%struct.C*, ...)** %{{.*}}, i64 1 // CHECK32: [[CALLEE:%.*]] = load void (%struct.C*, ...)*, void (%struct.C*, ...)** [[VPTR]] -// CHECK32: musttail call x86_thiscallcc void (%struct.C*, ...) [[CALLEE]](%struct.C* %{{.*}}, ...) +// CHECK32: musttail call x86_thiscallcc void (%struct.C*, ...) [[CALLEE]](%struct.C* frozen %{{.*}}, ...) // CHECK32-NEXT: ret void // CHECK32: } // -// CHECK64-LABEL: define linkonce_odr void @"??_9C@@$B7AA"(%struct.C* %this, ...) +// CHECK64-LABEL: define linkonce_odr void @"??_9C@@$B7AA"(%struct.C* frozen %this, ...) // CHECK64: #[[ATTR]] comdat // CHECK64: [[VPTR:%.*]] = getelementptr inbounds void (%struct.C*, ...)*, void (%struct.C*, ...)** %{{.*}}, i64 1 // CHECK64: [[CALLEE:%.*]] = load void (%struct.C*, ...)*, void (%struct.C*, ...)** [[VPTR]] -// CHECK64: musttail call void (%struct.C*, ...) [[CALLEE]](%struct.C* %{{.*}}, ...) +// CHECK64: musttail call void (%struct.C*, ...) [[CALLEE]](%struct.C* frozen %{{.*}}, ...) // CHECK64-NEXT: ret void // CHECK64: } // Thunk for calling the 3rd virtual function in C, taking an int parameter, returning a struct. -// CHECK32-LABEL: define linkonce_odr x86_thiscallcc void @"??_9C@@$B7AE"(%struct.C* %this, ...) +// CHECK32-LABEL: define linkonce_odr x86_thiscallcc void @"??_9C@@$B7AE"(%struct.C* frozen %this, ...) // CHECK32: #[[ATTR]] comdat // CHECK32: [[VPTR:%.*]] = getelementptr inbounds void (%struct.C*, ...)*, void (%struct.C*, ...)** %{{.*}}, i64 2 // CHECK32: [[CALLEE:%.*]] = load void (%struct.C*, ...)*, void (%struct.C*, ...)** [[VPTR]] -// CHECK32: musttail call x86_thiscallcc void (%struct.C*, ...) [[CALLEE]](%struct.C* %{{.*}}, ...) +// CHECK32: musttail call x86_thiscallcc void (%struct.C*, ...) [[CALLEE]](%struct.C* frozen %{{.*}}, ...) // CHECK32-NEXT: ret void // CHECK32: } // -// CHECK64-LABEL: define linkonce_odr void @"??_9C@@$BBA@AA"(%struct.C* %this, ...) +// CHECK64-LABEL: define linkonce_odr void @"??_9C@@$BBA@AA"(%struct.C* frozen %this, ...) // CHECK64: #[[ATTR]] comdat // CHECK64: [[VPTR:%.*]] = getelementptr inbounds void (%struct.C*, ...)*, void (%struct.C*, ...)** %{{.*}}, i64 2 // CHECK64: [[CALLEE:%.*]] = load void (%struct.C*, ...)*, void (%struct.C*, ...)** [[VPTR]] -// CHECK64: musttail call void (%struct.C*, ...) [[CALLEE]](%struct.C* %{{.*}}, ...) +// CHECK64: musttail call void (%struct.C*, ...) [[CALLEE]](%struct.C* frozen %{{.*}}, ...) // CHECK64-NEXT: ret void // CHECK64: } // Thunk for calling the virtual function in internal class D. -// CHECK32-LABEL: define internal x86_thiscallcc void @"??_9D@?A0x{{[^@]*}}@@$BA@AE"(%"struct.(anonymous namespace)::D"* %this, ...) +// CHECK32-LABEL: define internal x86_thiscallcc void @"??_9D@?A0x{{[^@]*}}@@$BA@AE"(%"struct.(anonymous namespace)::D"* frozen %this, ...) // CHECK32: #[[ATTR]] // CHECK32: [[VPTR:%.*]] = getelementptr inbounds void (%"struct.(anonymous namespace)::D"*, ...)*, void (%"struct.(anonymous namespace)::D"*, ...)** %{{.*}}, i64 0 // CHECK32: [[CALLEE:%.*]] = load void (%"struct.(anonymous namespace)::D"*, ...)*, void (%"struct.(anonymous namespace)::D"*, ...)** [[VPTR]] -// CHECK32: musttail call x86_thiscallcc void (%"struct.(anonymous namespace)::D"*, ...) [[CALLEE]](%"struct.(anonymous namespace)::D"* %{{.*}}, ...) +// CHECK32: musttail call x86_thiscallcc void (%"struct.(anonymous namespace)::D"*, ...) [[CALLEE]](%"struct.(anonymous namespace)::D"* frozen %{{.*}}, ...) // CHECK32-NEXT: ret void // CHECK32: } // -// CHECK64-LABEL: define internal void @"??_9D@?A0x{{[^@]*}}@@$BA@AA"(%"struct.(anonymous namespace)::D"* %this, ...) +// CHECK64-LABEL: define internal void @"??_9D@?A0x{{[^@]*}}@@$BA@AA"(%"struct.(anonymous namespace)::D"* frozen %this, ...) // CHECK64: #[[ATTR]] // CHECK64: [[VPTR:%.*]] = getelementptr inbounds void (%"struct.(anonymous namespace)::D"*, ...)*, void (%"struct.(anonymous namespace)::D"*, ...)** %{{.*}}, i64 0 // CHECK64: [[CALLEE:%.*]] = load void (%"struct.(anonymous namespace)::D"*, ...)*, void (%"struct.(anonymous namespace)::D"*, ...)** [[VPTR]] -// CHECK64: musttail call void (%"struct.(anonymous namespace)::D"*, ...) [[CALLEE]](%"struct.(anonymous namespace)::D"* %{{.*}}, ...) +// CHECK64: musttail call void (%"struct.(anonymous namespace)::D"*, ...) [[CALLEE]](%"struct.(anonymous namespace)::D"* frozen %{{.*}}, ...) // CHECK64-NEXT: ret void // CHECK64: } // Thunk for calling the fourth virtual function in C, taking a struct parameter // and returning a struct. -// CHECK32-LABEL: define linkonce_odr x86_thiscallcc void @"??_9C@@$BM@AE"(%struct.C* %this, ...) {{.*}} comdat +// CHECK32-LABEL: define linkonce_odr x86_thiscallcc void @"??_9C@@$BM@AE"(%struct.C* frozen %this, ...) {{.*}} comdat // CHECK32: [[VPTR:%.*]] = getelementptr inbounds void (%struct.C*, ...)*, void (%struct.C*, ...)** %{{.*}}, i64 3 // CHECK32: [[CALLEE:%.*]] = load void (%struct.C*, ...)*, void (%struct.C*, ...)** [[VPTR]] -// CHECK32: musttail call x86_thiscallcc void (%struct.C*, ...) [[CALLEE]](%struct.C* %{{.*}}, ...) +// CHECK32: musttail call x86_thiscallcc void (%struct.C*, ...) [[CALLEE]](%struct.C* frozen %{{.*}}, ...) // CHECK32-NEXT: ret void // CHECK32: } // -// CHECK64-LABEL: define linkonce_odr void @"??_9C@@$BBI@AA"(%struct.C* %this, ...) {{.*}} comdat +// CHECK64-LABEL: define linkonce_odr void @"??_9C@@$BBI@AA"(%struct.C* frozen %this, ...) {{.*}} comdat // CHECK64: [[VPTR:%.*]] = getelementptr inbounds void (%struct.C*, ...)*, void (%struct.C*, ...)** %{{.*}}, i64 3 // CHECK64: [[CALLEE:%.*]] = load void (%struct.C*, ...)*, void (%struct.C*, ...)** [[VPTR]] -// CHECK64: musttail call void (%struct.C*, ...) [[CALLEE]](%struct.C* %{{.*}}, ...) +// CHECK64: musttail call void (%struct.C*, ...) [[CALLEE]](%struct.C* frozen %{{.*}}, ...) // CHECK64: ret void // CHECK64: } // Thunk for calling the fifth virtual function in C which uses the __cdecl calling convention. -// CHECK32-LABEL: define linkonce_odr void @"??_9C@@$BBA@AA"(%struct.C* %this, ...) {{.*}} comdat align 2 { +// CHECK32-LABEL: define linkonce_odr void @"??_9C@@$BBA@AA"(%struct.C* frozen %this, ...) {{.*}} comdat align 2 { // CHECK32: [[VPTR:%.*]] = getelementptr inbounds void (%struct.C*, ...)*, void (%struct.C*, ...)** %{{.*}}, i64 4 // CHECK32: [[CALLEE:%.*]] = load void (%struct.C*, ...)*, void (%struct.C*, ...)** [[VPTR]] -// CHECK32: musttail call void (%struct.C*, ...) [[CALLEE]](%struct.C* %{{.*}}, ...) +// CHECK32: musttail call void (%struct.C*, ...) [[CALLEE]](%struct.C* frozen %{{.*}}, ...) // CHECK32: ret void // CHECK32: } // -// CHECK64-LABEL: define linkonce_odr void @"??_9C@@$BCA@AA"(%struct.C* %this, ...) {{.*}} comdat align 2 { +// CHECK64-LABEL: define linkonce_odr void @"??_9C@@$BCA@AA"(%struct.C* frozen %this, ...) {{.*}} comdat align 2 { // CHECK64: [[VPTR:%.*]] = getelementptr inbounds void (%struct.C*, ...)*, void (%struct.C*, ...)** %{{.*}}, i64 4 // CHECK64: [[CALLEE:%.*]] = load void (%struct.C*, ...)*, void (%struct.C*, ...)** [[VPTR]] -// CHECK64: musttail call void (%struct.C*, ...) [[CALLEE]](%struct.C* %{{.*}}, ...) +// CHECK64: musttail call void (%struct.C*, ...) [[CALLEE]](%struct.C* frozen %{{.*}}, ...) // CHECK64: ret void // CHECK64: } -// CHECK32: define linkonce_odr x86_thiscallcc void @"??_9C@@$BBE@AE"(%struct.C* %this, ...) {{.*}} comdat align 2 { +// CHECK32: define linkonce_odr x86_thiscallcc void @"??_9C@@$BBE@AE"(%struct.C* frozen %this, ...) {{.*}} comdat align 2 { // CHECK32: [[VPTR:%.*]] = getelementptr inbounds void (%struct.C*, ...)*, void (%struct.C*, ...)** %{{.*}}, i64 5 // CHECK32: [[CALLEE:%.*]] = load void (%struct.C*, ...)*, void (%struct.C*, ...)** [[VPTR]] -// CHECK32: musttail call x86_thiscallcc void (%struct.C*, ...) [[CALLEE]](%struct.C* %{{.*}}, ...) +// CHECK32: musttail call x86_thiscallcc void (%struct.C*, ...) [[CALLEE]](%struct.C* frozen %{{.*}}, ...) // CHECK32: ret void // CHECK32: } -// CHECK64: define linkonce_odr void @"??_9C@@$BCI@AA"(%struct.C* %this, ...) {{.*}} comdat align 2 { +// CHECK64: define linkonce_odr void @"??_9C@@$BCI@AA"(%struct.C* frozen %this, ...) {{.*}} comdat align 2 { // CHECK64: [[VPTR:%.*]] = getelementptr inbounds void (%struct.C*, ...)*, void (%struct.C*, ...)** %{{.*}}, i64 5 // CHECK64: [[CALLEE:%.*]] = load void (%struct.C*, ...)*, void (%struct.C*, ...)** [[VPTR]] -// CHECK64: musttail call void (%struct.C*, ...) [[CALLEE]](%struct.C* %{{.*}}, ...) +// CHECK64: musttail call void (%struct.C*, ...) [[CALLEE]](%struct.C* frozen %{{.*}}, ...) // CHECK64: ret void // CHECK64: } diff --git a/clang/test/CodeGenCXX/microsoft-abi-vmemptr-conflicts.cpp b/clang/test/CodeGenCXX/microsoft-abi-vmemptr-conflicts.cpp --- a/clang/test/CodeGenCXX/microsoft-abi-vmemptr-conflicts.cpp +++ b/clang/test/CodeGenCXX/microsoft-abi-vmemptr-conflicts.cpp @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -fno-rtti -emit-llvm -triple=i386-pc-win32 %s -o - | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args -fno-rtti -emit-llvm -triple=i386-pc-win32 %s -o - | FileCheck %s // In each test case, we have two member pointers whose thunks have the same // vtable offset and same mangling, but their prototypes conflict. The @@ -41,9 +41,9 @@ } } -// CHECK-LABEL: define dso_local i64 @"?f@i64_return@@YA_JPAUC@1@@Z"(%"struct.i64_return::C"* %c) -// CHECK: call x86_thiscallcc i32 bitcast (void (%"struct.i64_return::C"*, ...)* @"??_9C@i64_return@@$BA@AE" to i32 (%"struct.i64_return::C"*)*)(%"struct.i64_return::C"* %{{.*}}) -// CHECK: call x86_thiscallcc i64 bitcast (void (%"struct.i64_return::C"*, ...)* @"??_9C@i64_return@@$BA@AE" to i64 (%"struct.i64_return::C"*)*)(%"struct.i64_return::C"* %{{.*}}) +// CHECK-LABEL: define dso_local frozen i64 @"?f@i64_return@@YA_JPAUC@1@@Z"(%"struct.i64_return::C"* %c) +// CHECK: call x86_thiscallcc frozen i32 bitcast (void (%"struct.i64_return::C"*, ...)* @"??_9C@i64_return@@$BA@AE" to i32 (%"struct.i64_return::C"*)*)(%"struct.i64_return::C"* %{{.*}}) +// CHECK: call x86_thiscallcc frozen i64 bitcast (void (%"struct.i64_return::C"*, ...)* @"??_9C@i64_return@@$BA@AE" to i64 (%"struct.i64_return::C"*)*)(%"struct.i64_return::C"* %{{.*}}) // CHECK-LABEL: define linkonce_odr x86_thiscallcc void @"??_9C@i64_return@@$BA@AE"(%"struct.i64_return::C"* %this, ...) {{.*}} comdat // CHECK: musttail call x86_thiscallcc void (%"struct.i64_return::C"*, ...) %{{.*}}(%"struct.i64_return::C"* %{{.*}}, ...) @@ -64,7 +64,7 @@ } // CHECK-LABEL: define dso_local void @"?f@sret@@YAXPAUC@1@@Z"(%"struct.sret::C"* %c) -// CHECK: call x86_thiscallcc i32 bitcast (void (%"struct.sret::C"*, ...)* @"??_9C@sret@@$BA@AE" to i32 (%"struct.sret::C"*)*)(%"struct.sret::C"* %{{.*}}) +// CHECK: call x86_thiscallcc frozen i32 bitcast (void (%"struct.sret::C"*, ...)* @"??_9C@sret@@$BA@AE" to i32 (%"struct.sret::C"*)*)(%"struct.sret::C"* %{{.*}}) // CHECK: call x86_thiscallcc void bitcast (void (%"struct.sret::C"*, ...)* @"??_9C@sret@@$BA@AE" to void (%"struct.sret::C"*, %"struct.sret::Big"*)*)(%"struct.sret::C"* %{{.*}}, %"struct.sret::Big"* sret align 4 %{{.*}}) // CHECK-LABEL: define linkonce_odr x86_thiscallcc void @"??_9C@sret@@$BA@AE"(%"struct.sret::C"* %this, ...) {{.*}} comdat diff --git a/clang/test/CodeGenCXX/microsoft-abi-vmemptr-fastcall.cpp b/clang/test/CodeGenCXX/microsoft-abi-vmemptr-fastcall.cpp --- a/clang/test/CodeGenCXX/microsoft-abi-vmemptr-fastcall.cpp +++ b/clang/test/CodeGenCXX/microsoft-abi-vmemptr-fastcall.cpp @@ -7,9 +7,9 @@ return &A::f; } -// CHECK: define linkonce_odr x86_fastcallcc void @"??_9A@@$BA@AI"(%struct.A* inreg %this, ...) {{.*}} comdat align 2 { +// CHECK: define linkonce_odr x86_fastcallcc void @"??_9A@@$BA@AI"(%struct.A* frozen inreg %this, ...) {{.*}} comdat align 2 { // CHECK: [[VPTR:%.*]] = getelementptr inbounds void (%struct.A*, ...)*, void (%struct.A*, ...)** %{{.*}}, i64 0 // CHECK: [[CALLEE:%.*]] = load void (%struct.A*, ...)*, void (%struct.A*, ...)** [[VPTR]] -// CHECK: musttail call x86_fastcallcc void (%struct.A*, ...) [[CALLEE]](%struct.A* inreg %{{.*}}, ...) +// CHECK: musttail call x86_fastcallcc void (%struct.A*, ...) [[CALLEE]](%struct.A* frozen inreg %{{.*}}, ...) // CHECK: ret void // CHECK: } diff --git a/clang/test/CodeGenCXX/microsoft-abi-vtables-multiple-nonvirtual-inheritance-this-adjustment.cpp b/clang/test/CodeGenCXX/microsoft-abi-vtables-multiple-nonvirtual-inheritance-this-adjustment.cpp --- a/clang/test/CodeGenCXX/microsoft-abi-vtables-multiple-nonvirtual-inheritance-this-adjustment.cpp +++ b/clang/test/CodeGenCXX/microsoft-abi-vtables-multiple-nonvirtual-inheritance-this-adjustment.cpp @@ -158,7 +158,7 @@ void ffun(C &c) { // BITCODE: [[THIS1:%.+]] = bitcast %"struct.test4::C"* {{.*}} to i8* // BITCODE: [[THIS2:%.+]] = getelementptr inbounds i8, i8* [[THIS1]], i32 4 - // BITCODE: call x86_thiscallcc {{.*}}(i8* [[THIS2]]) + // BITCODE: call x86_thiscallcc {{.*}}(i8* frozen [[THIS2]]) c.bar(); } @@ -166,7 +166,7 @@ void fop(C &c) { // BITCODE: [[THIS1:%.+]] = bitcast %"struct.test4::C"* {{.*}} to i8* // BITCODE: [[THIS2:%.+]] = getelementptr inbounds i8, i8* [[THIS1]], i32 4 - // BITCODE: call x86_thiscallcc {{.*}}(i8* [[THIS2]]) + // BITCODE: call x86_thiscallcc {{.*}}(i8* frozen [[THIS2]]) -c; } diff --git a/clang/test/CodeGenCXX/microsoft-abi-vtables-virtual-inheritance-vtordisps.cpp b/clang/test/CodeGenCXX/microsoft-abi-vtables-virtual-inheritance-vtordisps.cpp --- a/clang/test/CodeGenCXX/microsoft-abi-vtables-virtual-inheritance-vtordisps.cpp +++ b/clang/test/CodeGenCXX/microsoft-abi-vtables-virtual-inheritance-vtordisps.cpp @@ -43,7 +43,7 @@ // }; // // If a class overrides a virtual function of its base and has a non-trivial -// ctor/dtor that call(s) the virtual function (or may escape "this" to some +// ctor/dtor that call(s) the virtual function (or "this" escape may some to // code that might call it), a virtual adjustment might be needed in case the // current class layout and the most derived class layout are different. // This is done using vtordisp thunks. diff --git a/clang/test/CodeGenCXX/microsoft-compatibility.cpp b/clang/test/CodeGenCXX/microsoft-compatibility.cpp --- a/clang/test/CodeGenCXX/microsoft-compatibility.cpp +++ b/clang/test/CodeGenCXX/microsoft-compatibility.cpp @@ -24,7 +24,7 @@ // CHECK: call void @"??$destroy@X@@YAXPAX@Z" // CHECK: ret void -// CHECK-LABEL: define linkonce_odr dso_local void @"??$destroy@X@@YAXPAX@Z"(i8* %p) +// CHECK-LABEL: define linkonce_odr dso_local void @"??$destroy@X@@YAXPAX@Z"(i8* frozen %p) // The pseudo-dtor expr should not generate calls to anything. // CHECK-NOT: call // CHECK-NOT: invoke diff --git a/clang/test/CodeGenCXX/microsoft-inaccessible-base.cpp b/clang/test/CodeGenCXX/microsoft-inaccessible-base.cpp --- a/clang/test/CodeGenCXX/microsoft-inaccessible-base.cpp +++ b/clang/test/CodeGenCXX/microsoft-inaccessible-base.cpp @@ -10,11 +10,11 @@ struct C : A, B { }; extern "C" A *a_from_c(C *p) { return p; } -// CHECK-LABEL: define dso_local %struct.A* @a_from_c(%struct.C* %{{.*}}) +// CHECK-LABEL: define dso_local frozen %struct.A* @a_from_c(%struct.C* frozen %{{.*}}) // CHECK: bitcast %struct.C* %{{.*}} to %struct.A* struct D : B, A { }; extern "C" A *a_from_d(D *p) { return p; } -// CHECK-LABEL: define dso_local %struct.A* @a_from_d(%struct.D* %{{.*}}) +// CHECK-LABEL: define dso_local frozen %struct.A* @a_from_d(%struct.D* frozen %{{.*}}) // CHECK: %[[p_i8:[^ ]*]] = bitcast %struct.D* %{{.*}} to i8* // CHECK: getelementptr inbounds i8, i8* %[[p_i8]], i64 8 diff --git a/clang/test/CodeGenCXX/microsoft-interface.cpp b/clang/test/CodeGenCXX/microsoft-interface.cpp --- a/clang/test/CodeGenCXX/microsoft-interface.cpp +++ b/clang/test/CodeGenCXX/microsoft-interface.cpp @@ -19,22 +19,22 @@ // CHECK: @_ZTV1S = linkonce_odr dso_local unnamed_addr constant { [3 x i8*] } { [3 x i8*] [i8* null, i8* bitcast ({ i8*, i8*, i8* }* @_ZTI1S to i8*), i8* bitcast (i32 (%struct.S*)* @_ZN1S4testEv to i8*)] } -// CHECK-LABEL: define dso_local i32 @_Z2fnv() -// CHECK: call x86_thiscallcc void @_ZN1SC1Ev(%struct.S* %s) -// CHECK: %{{[.0-9A-Z_a-z]+}} = call x86_thiscallcc i32 @_ZN1S4testEv(%struct.S* %s) +// CHECK-LABEL: define dso_local frozen i32 @_Z2fnv() +// CHECK: call x86_thiscallcc void @_ZN1SC1Ev(%struct.S* frozen %s) +// CHECK: %{{[.0-9A-Z_a-z]+}} = call x86_thiscallcc frozen i32 @_ZN1S4testEv(%struct.S* frozen %s) -// CHECK-LABEL: define linkonce_odr dso_local x86_thiscallcc void @_ZN1SC1Ev(%struct.S* %this) -// CHECK: call x86_thiscallcc void @_ZN1SC2Ev(%struct.S* %{{[.0-9A-Z_a-z]+}}) +// CHECK-LABEL: define linkonce_odr dso_local x86_thiscallcc void @_ZN1SC1Ev(%struct.S* frozen %this) +// CHECK: call x86_thiscallcc void @_ZN1SC2Ev(%struct.S* frozen %{{[.0-9A-Z_a-z]+}}) -// CHECK-LABEL: define linkonce_odr dso_local x86_thiscallcc i32 @_ZN1S4testEv(%struct.S* %this) -// CHECK: %{{[.0-9A-Z_a-z]+}} = call x86_thiscallcc i32 @_ZN1I4testEv(%__interface.I* %{{[.0-9A-Z_a-z]+}}) +// CHECK-LABEL: define linkonce_odr dso_local x86_thiscallcc frozen i32 @_ZN1S4testEv(%struct.S* frozen %this) +// CHECK: %{{[.0-9A-Z_a-z]+}} = call x86_thiscallcc frozen i32 @_ZN1I4testEv(%__interface.I* frozen %{{[.0-9A-Z_a-z]+}}) -// CHECK-LABEL: define linkonce_odr dso_local x86_thiscallcc void @_ZN1SC2Ev(%struct.S* %this) -// CHECK: call x86_thiscallcc void @_ZN1IC2Ev(%__interface.I* %{{[.0-9A-Z_a-z]+}}) +// CHECK-LABEL: define linkonce_odr dso_local x86_thiscallcc void @_ZN1SC2Ev(%struct.S* frozen %this) +// CHECK: call x86_thiscallcc void @_ZN1IC2Ev(%__interface.I* frozen %{{[.0-9A-Z_a-z]+}}) // CHECK: store i32 (...)** bitcast (i8** getelementptr inbounds ({ [3 x i8*] }, { [3 x i8*] }* @_ZTV1S, i32 0, inrange i32 0, i32 2) to i32 (...)**), i32 (...)*** %{{[.0-9A-Z_a-z]+}} -// CHECK-LABEL: define linkonce_odr dso_local x86_thiscallcc void @_ZN1IC2Ev(%__interface.I* %this) +// CHECK-LABEL: define linkonce_odr dso_local x86_thiscallcc void @_ZN1IC2Ev(%__interface.I* frozen %this) // CHECK: store i32 (...)** bitcast (i8** getelementptr inbounds ({ [3 x i8*] }, { [3 x i8*] }* @_ZTV1I, i32 0, inrange i32 0, i32 2) to i32 (...)**), i32 (...)*** %{{[.0-9A-Z_a-z]+}} -// CHECK-LABEL: define linkonce_odr dso_local x86_thiscallcc i32 @_ZN1I4testEv(%__interface.I* %this) +// CHECK-LABEL: define linkonce_odr dso_local x86_thiscallcc frozen i32 @_ZN1I4testEv(%__interface.I* frozen %this) // CHECK: ret i32 1 diff --git a/clang/test/CodeGenCXX/microsoft-new.cpp b/clang/test/CodeGenCXX/microsoft-new.cpp --- a/clang/test/CodeGenCXX/microsoft-new.cpp +++ b/clang/test/CodeGenCXX/microsoft-new.cpp @@ -13,7 +13,7 @@ // MSVC will fall back on the non-array operator new. void *a; int *p = new(arbitrary) int[4]; - // CHECK: call i8* @"??2@YAPAXIUarbitrary_t@@@Z"(i32 16, %struct.arbitrary_t* + // CHECK: call frozen i8* @"??2@YAPAXIUarbitrary_t@@@Z"(i32 frozen 16, %struct.arbitrary_t* } struct S { @@ -22,9 +22,9 @@ void g() { S *s = new(arbitrary) S[2]; - // CHECK: call i8* @"??_US@PR13164@@SAPAXIUarbitrary_t@@@Z"(i32 2, %struct.arbitrary_t* + // CHECK: call frozen i8* @"??_US@PR13164@@SAPAXIUarbitrary_t@@@Z"(i32 frozen 2, %struct.arbitrary_t* S *s1 = new(arbitrary) S; - // CHECK: call i8* @"??2@YAPAXIUarbitrary_t@@@Z"(i32 1, %struct.arbitrary_t* + // CHECK: call frozen i8* @"??2@YAPAXIUarbitrary_t@@@Z"(i32 frozen 1, %struct.arbitrary_t* } struct T { @@ -34,6 +34,6 @@ void h() { // This should still call the global operator new[]. T *t = new(arbitrary2) T[2]; - // CHECK: call i8* @"??_U@YAPAXIUarbitrary2_t@@@Z"(i32 2, %struct.arbitrary2_t* + // CHECK: call frozen i8* @"??_U@YAPAXIUarbitrary2_t@@@Z"(i32 frozen 2, %struct.arbitrary2_t* } } diff --git a/clang/test/CodeGenCXX/microsoft-uuidof-mangling.cpp b/clang/test/CodeGenCXX/microsoft-uuidof-mangling.cpp --- a/clang/test/CodeGenCXX/microsoft-uuidof-mangling.cpp +++ b/clang/test/CodeGenCXX/microsoft-uuidof-mangling.cpp @@ -44,12 +44,12 @@ return 0; } -// CHECK: define i32 @main +// CHECK: define frozen i32 @main // CHECK: call void @_ZN8UUIDTestI10TestStructL_Z42_GUID_eafa1952_66f8_438b_8fba_af1bbae42191EEC1Ev // CHECK: call void @_ZN11UUIDTestTwoIL_Z42_GUID_eafa1952_66f8_438b_8fba_af1bbae42191EEC1Ev // CHECK: call void @_ZN11UUIDTestTwoIL_Z42_GUID_eafa1952_66f8_438b_8fba_af1bbae42191EEC1Ev -// CHECK: call void @_Z15test_uuidofTypeI10TestStructEvPPv(i8** null) -// CHECK: call void @_Z15test_uuidofExprI9HasMemberEvPPv(i8** null) +// CHECK: call void @_Z15test_uuidofTypeI10TestStructEvPPv(i8** frozen null) +// CHECK: call void @_Z15test_uuidofExprI9HasMemberEvPPv(i8** frozen null) // CHECK: define linkonce_odr void @_ZN8UUIDTestI10TestStructL_Z42_GUID_eafa1952_66f8_438b_8fba_af1bbae42191EEC1Ev // CHECK: define linkonce_odr void @_Z15test_uuidofTypeI10TestStructEvPPv diff --git a/clang/test/CodeGenCXX/mips-size_t-ptrdiff_t.cpp b/clang/test/CodeGenCXX/mips-size_t-ptrdiff_t.cpp --- a/clang/test/CodeGenCXX/mips-size_t-ptrdiff_t.cpp +++ b/clang/test/CodeGenCXX/mips-size_t-ptrdiff_t.cpp @@ -9,28 +9,28 @@ long *rv = new long; // size_t is implicit in the new operator return rv; } -// O32-LABEL: define i32* @_Z10alloc_longv() -// O32: call noalias nonnull i8* @_Znwj(i32 signext 4) +// O32-LABEL: define frozen i32* @_Z10alloc_longv() +// O32: call frozen noalias nonnull i8* @_Znwj(i32 frozen signext 4) -// N32-LABEL: define i32* @_Z10alloc_longv() -// N32: call noalias nonnull i8* @_Znwj(i32 signext 4) +// N32-LABEL: define frozen i32* @_Z10alloc_longv() +// N32: call frozen noalias nonnull i8* @_Znwj(i32 frozen signext 4) -// N64-LABEL: define i64* @_Z10alloc_longv() -// N64: call noalias nonnull i8* @_Znwm(i64 zeroext 8) +// N64-LABEL: define frozen i64* @_Z10alloc_longv() +// N64: call frozen noalias nonnull i8* @_Znwm(i64 frozen zeroext 8) long *alloc_long_array() { long *rv = new long[2]; return rv; } -// O32-LABEL: define i32* @_Z16alloc_long_arrayv() -// O32: call noalias nonnull i8* @_Znaj(i32 signext 8) +// O32-LABEL: define frozen i32* @_Z16alloc_long_arrayv() +// O32: call frozen noalias nonnull i8* @_Znaj(i32 frozen signext 8) -// N32-LABEL: define i32* @_Z16alloc_long_arrayv() -// N32: call noalias nonnull i8* @_Znaj(i32 signext 8) +// N32-LABEL: define frozen i32* @_Z16alloc_long_arrayv() +// N32: call frozen noalias nonnull i8* @_Znaj(i32 frozen signext 8) -// N64-LABEL: define i64* @_Z16alloc_long_arrayv() -// N64: call noalias nonnull i8* @_Znam(i64 zeroext 16) +// N64-LABEL: define frozen i64* @_Z16alloc_long_arrayv() +// N64: call frozen noalias nonnull i8* @_Znam(i64 frozen zeroext 16) #include diff --git a/clang/test/CodeGenCXX/ms-inline-asm-fields.cpp b/clang/test/CodeGenCXX/ms-inline-asm-fields.cpp --- a/clang/test/CodeGenCXX/ms-inline-asm-fields.cpp +++ b/clang/test/CodeGenCXX/ms-inline-asm-fields.cpp @@ -15,7 +15,7 @@ } extern "C" int test_param_field(A p) { -// CHECK: define i32 @test_param_field(%struct.A* byval(%struct.A) align 4 %p) +// CHECK: define frozen i32 @test_param_field(%struct.A* frozen byval(%struct.A) align 4 %p) // CHECK: getelementptr inbounds %struct.A, %struct.A* %p, i32 0, i32 0 // CHECK: call i32 asm sideeffect inteldialect "mov eax, $1" // CHECK: ret i32 @@ -23,7 +23,7 @@ } extern "C" int test_namespace_global() { -// CHECK: define i32 @test_namespace_global() +// CHECK: define frozen i32 @test_namespace_global() // CHECK: call i32 asm sideeffect inteldialect "mov eax, $1", "{{.*}}"(i32* getelementptr inbounds (%struct.A, %struct.A* @_ZN4asdf8a_globalE, i32 0, i32 2, i32 1)) // CHECK: ret i32 __asm mov eax, asdf::a_global.a3.b2 diff --git a/clang/test/CodeGenCXX/ms-inline-asm-return.cpp b/clang/test/CodeGenCXX/ms-inline-asm-return.cpp --- a/clang/test/CodeGenCXX/ms-inline-asm-return.cpp +++ b/clang/test/CodeGenCXX/ms-inline-asm-return.cpp @@ -12,7 +12,7 @@ mov edx, 1 } } -// CHECK-LABEL: define dso_local i64 @f_i64() +// CHECK-LABEL: define dso_local frozen i64 @f_i64() // CHECK: %[[r:[^ ]*]] = call i64 asm sideeffect inteldialect "mov eax, $$1\0A\09mov edx, $$1", "=A,~{eax},{{.*}}" // CHECK: ret i64 %[[r]] @@ -22,7 +22,7 @@ mov edx, 1 } } -// CHECK-LABEL: define dso_local i32 @f_i32() +// CHECK-LABEL: define dso_local frozen i32 @f_i32() // CHECK: %[[r:[^ ]*]] = call i32 asm sideeffect inteldialect "mov eax, $$1\0A\09mov edx, $$1", "={eax},~{eax},{{.*}}" // CHECK: ret i32 %[[r]] @@ -32,7 +32,7 @@ mov edx, 1 } } -// CHECK-LABEL: define dso_local signext i16 @f_i16() +// CHECK-LABEL: define dso_local frozen signext i16 @f_i16() // CHECK: %[[r:[^ ]*]] = call i32 asm sideeffect inteldialect "mov eax, $$1\0A\09mov edx, $$1", "={eax},~{eax},{{.*}}" // CHECK: %[[r_i16:[^ ]*]] = trunc i32 %[[r]] to i16 // CHECK: ret i16 %[[r_i16]] @@ -43,7 +43,7 @@ mov edx, 1 } } -// CHECK-LABEL: define dso_local signext i8 @f_i8() +// CHECK-LABEL: define dso_local frozen signext i8 @f_i8() // CHECK: %[[r:[^ ]*]] = call i32 asm sideeffect inteldialect "mov eax, $$1\0A\09mov edx, $$1", "={eax},~{eax},{{.*}}" // CHECK: %[[r_i8:[^ ]*]] = trunc i32 %[[r]] to i8 // CHECK: ret i8 %[[r_i8]] @@ -54,7 +54,7 @@ mov edx, 1U } } -// CHECK-LABEL: define dso_local zeroext i1 @f_i1() +// CHECK-LABEL: define dso_local frozen zeroext i1 @f_i1() // CHECK: %[[r:[^ ]*]] = call i32 asm sideeffect inteldialect "mov eax, $$1\0A\09mov edx, $$1", "={eax},~{eax},{{.*}}" // CHECK: %[[r_i8:[^ ]*]] = trunc i32 %[[r]] to i8 // CHECK: store i8 %[[r_i8]], i8* %{{.*}} @@ -95,6 +95,6 @@ int main() { __asm xor eax, eax } -// CHECK-LABEL: define dso_local i32 @main() +// CHECK-LABEL: define dso_local frozen i32 @main() // CHECK: %[[r:[^ ]*]] = call i32 asm sideeffect inteldialect "xor eax, eax", "={eax},{{.*}}" // CHECK: ret i32 %[[r]] diff --git a/clang/test/CodeGenCXX/ms-property.cpp b/clang/test/CodeGenCXX/ms-property.cpp --- a/clang/test/CodeGenCXX/ms-property.cpp +++ b/clang/test/CodeGenCXX/ms-property.cpp @@ -1,6 +1,6 @@ -// RUN: %clang_cc1 -emit-llvm -triple=x86_64-pc-win32 -fms-compatibility %s -o - | FileCheck %s -// RUN: %clang_cc1 -triple=x86_64-pc-win32 -fms-compatibility -emit-pch -o %t %s -// RUN: %clang_cc1 -emit-llvm -triple=x86_64-pc-win32 -fms-compatibility -include-pch %t -verify %s -o - | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args -emit-llvm -triple=x86_64-pc-win32 -fms-compatibility %s -o - | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args -triple=x86_64-pc-win32 -fms-compatibility -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -emit-llvm -triple=x86_64-pc-win32 -fms-compatibility -include-pch %t -verify %s -o - | FileCheck %s // expected-no-diagnostics #ifndef HEADER @@ -53,33 +53,33 @@ Test1 t(argc); S *p1 = 0; St *p2 = 0; - // CHECK: call i32 @"?GetX@S@@QEAAHHH@Z"(%class.S* %{{.+}}, i32 223, i32 11) + // CHECK: call frozen i32 @"?GetX@S@@QEAAHHH@Z"(%class.S* %{{.+}}, i32 223, i32 11) int j = p1->x[223][11]; // CHECK: [[J:%.+]] = load i32, i32* % // CHECK-NEXT: call void @"?PutX@S@@QEAAXHHH@Z"(%class.S* %{{.+}}, i32 23, i32 1, i32 [[J]]) p1->x[23][1] = j; - // CHECK: call float @"?GetX@?$St@M@@QEAAMMM@Z"(%class.St* %{{.+}}, float 2.230000e+02, float 1.100000e+01) + // CHECK: call frozen float @"?GetX@?$St@M@@QEAAMMM@Z"(%class.St* %{{.+}}, float 2.230000e+02, float 1.100000e+01) float j1 = p2->x[223][11]; // CHECK: [[J1:%.+]] = load float, float* % - // CHECK-NEXT: [[CALL:%.+]] = call float @"?PutX@?$St@M@@QEAAMMMM@Z"(%class.St* %{{.+}}, float 2.300000e+01, float 1.000000e+00, float [[J1]]) + // CHECK-NEXT: [[CALL:%.+]] = call frozen float @"?PutX@?$St@M@@QEAAMMMM@Z"(%class.St* %{{.+}}, float 2.300000e+01, float 1.000000e+00, float [[J1]]) // CHECK-NEXT: [[CONV:%.+]] = fptosi float [[CALL]] to i32 // CHECK-NEXT: store i32 [[CONV]], i32* argc = p2->x[23][1] = j1; - // CHECK: [[IDX:%.+]] = call i32 @"?idx@@YAHXZ"() + // CHECK: [[IDX:%.+]] = call frozen i32 @"?idx@@YAHXZ"() // CHECK-NEXT: [[CONV:%.+]] = sitofp i32 [[IDX]] to float - // CHECK-NEXT: [[GET:%.+]] = call float @"?GetX@?$St@M@@QEAAMMM@Z"(%class.St* %{{.+}}, float [[CONV]], float 1.000000e+00) + // CHECK-NEXT: [[GET:%.+]] = call frozen float @"?GetX@?$St@M@@QEAAMMM@Z"(%class.St* %{{.+}}, float [[CONV]], float 1.000000e+00) // CHECK-NEXT: [[INC:%.+]] = fadd float [[GET]], 1.000000e+00 // CHECK-NEXT: [[CONV:%.+]] = sitofp i32 [[IDX]] to float - // CHECK-NEXT: call float @"?PutX@?$St@M@@QEAAMMMM@Z"(%class.St* %{{.+}}, float [[CONV]], float 1.000000e+00, float [[INC]]) + // CHECK-NEXT: call frozen float @"?PutX@?$St@M@@QEAAMMMM@Z"(%class.St* %{{.+}}, float [[CONV]], float 1.000000e+00, float [[INC]]) ++p2->x[idx()][1]; // CHECK: call void @"??$foo@H@@YAXHH@Z"(i32 %{{.+}}, i32 %{{.+}}) foo(argc, (int)argv[0][0]); // CHECK: [[P2:%.+]] = load %class.St*, %class.St** % // CHECK: [[P1:%.+]] = load %class.S*, %class.S** % - // CHECK: [[P1_X_22_33:%.+]] = call i32 @"?GetX@S@@QEAAHHH@Z"(%class.S* [[P1]], i32 22, i32 33) + // CHECK: [[P1_X_22_33:%.+]] = call frozen i32 @"?GetX@S@@QEAAHHH@Z"(%class.S* [[P1]], i32 22, i32 33) // CHECK: [[CAST:%.+]] = sitofp i32 [[P1_X_22_33]] to double // CHECK: [[ARGC:%.+]] = load i32, i32* % - // CHECK: [[T_X:%.+]] = call i32 @"?get_x@Test1@@QEBAHXZ"(%class.Test1* %{{.+}}) + // CHECK: [[T_X:%.+]] = call frozen i32 @"?get_x@Test1@@QEBAHXZ"(%class.Test1* %{{.+}}) // CHECK: [[CAST2:%.+]] = trunc i32 [[T_X]] to i8 // CHECK: call void @"?PutY@?$St@M@@QEAAXDHN@Z"(%class.St* [[P2]], i8 [[CAST2]], i32 [[ARGC]], double [[CAST]]) p2->y[t.X][argc] = p1->x[22][33]; @@ -87,27 +87,27 @@ // CHECK: [[P2_2:%.+]] = load %class.St*, %class.St** // CHECK: [[P1:%.+]] = load %class.S*, %class.S** // CHECK: [[ARGC:%.+]] = load i32, i32* % - // CHECK: [[P1_X_ARGC_0:%.+]] = call i32 @"?GetX@S@@QEAAHHH@Z"(%class.S* [[P1]], i32 [[ARGC]], i32 0) + // CHECK: [[P1_X_ARGC_0:%.+]] = call frozen i32 @"?GetX@S@@QEAAHHH@Z"(%class.S* [[P1]], i32 [[ARGC]], i32 0) // CHECK: [[CAST:%.+]] = trunc i32 [[P1_X_ARGC_0]] to i8 - // CHECK: [[P2_Y_p1_X_ARGC_0_T:%.+]] = call i8 @"?GetY@?$St@M@@QEAADDVTest1@@@Z"(%class.St* [[P2_2]], i8 [[CAST]], %class.Test1* %{{.+}}) + // CHECK: [[P2_Y_p1_X_ARGC_0_T:%.+]] = call frozen i8 @"?GetY@?$St@M@@QEAADDVTest1@@@Z"(%class.St* [[P2_2]], i8 [[CAST]], %class.Test1* %{{.+}}) // CHECK: [[CAST:%.+]] = sitofp i8 [[P2_Y_p1_X_ARGC_0_T]] to float // CHECK: [[J:%.+]] = load i32, i32* % // CHECK: [[CAST1:%.+]] = sitofp i32 [[J]] to float // CHECK: [[J:%.+]] = load i32, i32* % // CHECK: [[CAST2:%.+]] = sitofp i32 [[J]] to float - // CHECK: call float @"?PutX@?$St@M@@QEAAMMMM@Z"(%class.St* [[P2_1]], float [[CAST2]], float [[CAST1]], float [[CAST]]) + // CHECK: call frozen float @"?PutX@?$St@M@@QEAAMMMM@Z"(%class.St* [[P2_1]], float [[CAST2]], float [[CAST1]], float [[CAST]]) p2->x[j][j] = p2->y[p1->x[argc][0]][t]; - // CHECK: [[CALL:%.+]] = call %class.Test1* @"?GetTest1@Test1@@SAPEAV1@XZ"() - // CHECK-NEXT: call i32 @"?get_x@Test1@@QEBAHXZ"(%class.Test1* [[CALL]]) + // CHECK: [[CALL:%.+]] = call frozen %class.Test1* @"?GetTest1@Test1@@SAPEAV1@XZ"() + // CHECK-NEXT: call frozen i32 @"?get_x@Test1@@QEBAHXZ"(%class.Test1* [[CALL]]) return Test1::GetTest1()->X; } // CHECK: define linkonce_odr dso_local void @"??$foo@H@@YAXHH@Z"(i32 %{{.+}}, i32 %{{.+}}) -// CHECK: call i32 @"?GetX@?$St@H@@QEAAHHH@Z"(%class.St{{.+}}* [[BAR:%.+]], i32 %{{.+}} i32 %{{.+}}) -// CHECK: call i32 @"?PutX@?$St@H@@QEAAHHHH@Z"(%class.St{{.+}}* [[BAR]], i32 %{{.+}}, i32 %{{.+}}, i32 %{{.+}}) -// CHECK: call i32 @"?GetX@?$St@H@@QEAAHHH@Z"(%class.St{{.+}}* [[BAR]], i32 %{{.+}} i32 %{{.+}}) +// CHECK: call frozen i32 @"?GetX@?$St@H@@QEAAHHH@Z"(%class.St{{.+}}* [[BAR:%.+]], i32 %{{.+}} i32 %{{.+}}) +// CHECK: call frozen i32 @"?PutX@?$St@H@@QEAAHHHH@Z"(%class.St{{.+}}* [[BAR]], i32 %{{.+}}, i32 %{{.+}}, i32 %{{.+}}) +// CHECK: call frozen i32 @"?GetX@?$St@H@@QEAAHHH@Z"(%class.St{{.+}}* [[BAR]], i32 %{{.+}} i32 %{{.+}}) // CHECK: call void @"?PutY@?$St@H@@QEAAXDHN@Z"(%class.St{{.+}}* [[BAR]], i8 %{{.+}}, i32 %{{.+}}, double %{{.+}} -// CHECK: call i32 @"?GetX@?$St@H@@QEAAHHH@Z"(%class.St{{.+}}* [[BAR]], i32 %{{.+}} i32 %{{.+}}) -// CHECK: call i8 @"?GetY@?$St@H@@QEAADDVTest1@@@Z"(%class.St{{.+}}* [[BAR]], i8 %{{.+}}, %class.Test1* %{{.+}}) -// CHECK: call i32 @"?PutX@?$St@H@@QEAAHHHH@Z"(%class.St{{.+}}* [[BAR]], i32 %{{.+}}, i32 %{{.+}}, i32 %{{.+}}) +// CHECK: call frozen i32 @"?GetX@?$St@H@@QEAAHHH@Z"(%class.St{{.+}}* [[BAR]], i32 %{{.+}} i32 %{{.+}}) +// CHECK: call frozen i8 @"?GetY@?$St@H@@QEAADDVTest1@@@Z"(%class.St{{.+}}* [[BAR]], i8 %{{.+}}, %class.Test1* %{{.+}}) +// CHECK: call frozen i32 @"?PutX@?$St@H@@QEAAHHHH@Z"(%class.St{{.+}}* [[BAR]], i32 %{{.+}}, i32 %{{.+}}, i32 %{{.+}}) #endif //HEADER diff --git a/clang/test/CodeGenCXX/ms-thunks-ehspec.cpp b/clang/test/CodeGenCXX/ms-thunks-ehspec.cpp --- a/clang/test/CodeGenCXX/ms-thunks-ehspec.cpp +++ b/clang/test/CodeGenCXX/ms-thunks-ehspec.cpp @@ -20,8 +20,8 @@ }; C c; -// CHECK-LABEL: define linkonce_odr dso_local x86_thiscallcc void @"?f@C@@G3AEXUNonTrivial@@@Z"(%class.C* %this, <{ %struct.NonTrivial }>* inalloca %0) +// CHECK-LABEL: define linkonce_odr dso_local x86_thiscallcc void @"?f@C@@G3AEXUNonTrivial@@@Z"(%class.C* frozen %this, <{ %struct.NonTrivial }>* inalloca %0) // CHECK-NOT: invoke -// CHECK: musttail call x86_thiscallcc void @"?f@C@@EAEXUNonTrivial@@@Z"(%class.C* %{{.*}}, <{ %struct.NonTrivial }>* inalloca %0) +// CHECK: musttail call x86_thiscallcc void @"?f@C@@EAEXUNonTrivial@@@Z"(%class.C* frozen %{{.*}}, <{ %struct.NonTrivial }>* inalloca %0) // CHECK-NEXT: ret void diff --git a/clang/test/CodeGenCXX/ms-thunks-unprototyped.cpp b/clang/test/CodeGenCXX/ms-thunks-unprototyped.cpp --- a/clang/test/CodeGenCXX/ms-thunks-unprototyped.cpp +++ b/clang/test/CodeGenCXX/ms-thunks-unprototyped.cpp @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -fno-rtti-data -triple x86_64-windows-msvc -emit-llvm %s -o - | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args -fno-rtti-data -triple x86_64-windows-msvc -emit-llvm %s -o - | FileCheck %s // In this example, C does not override B::foo, but it needs to emit a thunk to // adjust for the relative difference of position between A-in-B and A-in-C. @@ -66,8 +66,8 @@ template struct InstantiateLater { T x; }; inline int B::baz(InstantiateLater p) { return p.x; } -// CHECK-LABEL: define linkonce_odr dso_local i32 @"?baz@B@@W7EAAHU?$InstantiateLater@H@@@Z"(i8* %this.coerce, i32 %p.coerce) +// CHECK-LABEL: define linkonce_odr dso_local frozen i32 @"?baz@B@@W7EAAHU?$InstantiateLater@H@@@Z"(i8* %this.coerce, i32 %p.coerce) // CHECK: = getelementptr i8, i8* {{.*}}, i32 -8 -// CHECK: tail call i32 @"?baz@B@@UEAAHU?$InstantiateLater@H@@@Z"(i8* {{[^,]*}}, i32 {{.*}}) +// CHECK: tail call frozen i32 @"?baz@B@@UEAAHU?$InstantiateLater@H@@@Z"(i8* {{[^,]*}}, i32 {{.*}}) -// CHECK-LABEL: define linkonce_odr dso_local i32 @"?baz@B@@UEAAHU?$InstantiateLater@H@@@Z"(i8* %this.coerce, i32 %p.coerce) +// CHECK-LABEL: define linkonce_odr dso_local frozen i32 @"?baz@B@@UEAAHU?$InstantiateLater@H@@@Z"(i8* %this.coerce, i32 %p.coerce) diff --git a/clang/test/CodeGenCXX/ms-union-member-ref.cpp b/clang/test/CodeGenCXX/ms-union-member-ref.cpp --- a/clang/test/CodeGenCXX/ms-union-member-ref.cpp +++ b/clang/test/CodeGenCXX/ms-union-member-ref.cpp @@ -8,7 +8,7 @@ int *f1(A *a) { return a->ref; } -// CHECK-LABEL: define {{.*}}i32* @"?f1@@YAPAHPATA@@@Z"(%union.A* %a) +// CHECK-LABEL: define {{.*}}i32* @"?f1@@YAPAHPATA@@@Z"(%union.A* frozen %a) // CHECK: [[REF:%[^[:space:]]+]] = bitcast %union.A* %{{.*}} to i32*** // CHECK: [[IPP:%[^[:space:]]+]] = load i32**, i32*** [[REF]] // CHECK: [[IP:%[^[:space:]]+]] = load i32*, i32** [[IPP]] @@ -17,7 +17,7 @@ void f2(A *a) { *a->ref = 1; } -// CHECK-LABEL: define {{.*}}void @"?f2@@YAXPATA@@@Z"(%union.A* %a) +// CHECK-LABEL: define {{.*}}void @"?f2@@YAXPATA@@@Z"(%union.A* frozen %a) // CHECK: [[REF:%[^[:space:]]+]] = bitcast %union.A* %{{.*}} to i32*** // CHECK: [[IPP:%[^[:space:]]+]] = load i32**, i32*** [[REF]] // CHECK: [[IP:%[^[:space:]]+]] = load i32*, i32** [[IPP]] @@ -26,7 +26,7 @@ bool f3(A *a, int *b) { return a->ref != b; } -// CHECK-LABEL: define {{.*}}i1 @"?f3@@YA_NPATA@@PAH@Z"(%union.A* %a, i32* %b) +// CHECK-LABEL: define {{.*}}i1 @"?f3@@YA_NPATA@@PAH@Z"(%union.A* frozen %a, i32* frozen %b) // CHECK: [[REF:%[^[:space:]]+]] = bitcast %union.A* %{{.*}} to i32*** // CHECK: [[IPP:%[^[:space:]]+]] = load i32**, i32*** [[REF]] // CHECK: [[IP:%[^[:space:]]+]] = load i32*, i32** [[IPP]] diff --git a/clang/test/CodeGenCXX/ms_struct.cpp b/clang/test/CodeGenCXX/ms_struct.cpp --- a/clang/test/CodeGenCXX/ms_struct.cpp +++ b/clang/test/CodeGenCXX/ms_struct.cpp @@ -27,7 +27,7 @@ // CHECK: define void @_ZN7DerivedC2Ev // CHECK: [[SELF:%.*]] = load [[DERIVED]]* // CHECK: [[T0:%.*]] = bitcast [[DERIVED]]* [[SELF]] to [[BASE]]* -// CHECK: call void @_ZN4BaseC2Ev([[BASE]]* [[T0]], i8** +// CHECK: call void @_ZN4BaseC2Ev([[BASE]]* frozen [[T0]], i8** // CHECK: [[T0:%.*]] = getelementptr inbounds {{.*}} [[SELF]], i32 0, i32 1 // CHECK: store i32 20, i32* [[T0]], Derived::Derived() : value(20) {} diff --git a/clang/test/CodeGenCXX/msabi-ctor-abstract-vbase.cpp b/clang/test/CodeGenCXX/msabi-ctor-abstract-vbase.cpp --- a/clang/test/CodeGenCXX/msabi-ctor-abstract-vbase.cpp +++ b/clang/test/CodeGenCXX/msabi-ctor-abstract-vbase.cpp @@ -52,7 +52,7 @@ // No branches, no constructor calls before may_throw(); // -// CHECK-LABEL: define dso_local %struct.C* @"??0C@@QEAA@H@Z"(%struct.C* returned %this, i32 %n, i32 %is_most_derived) +// CHECK-LABEL: define dso_local frozen %struct.C* @"??0C@@QEAA@H@Z"(%struct.C* frozen returned %this, i32 frozen %n, i32 frozen %is_most_derived) // CHECK-NOT: br i1 // CHECK-NOT: {{call.*@"\?0}} // CHECK: call void @"?may_throw@@YAXXZ"() @@ -63,12 +63,12 @@ // Conditionally construct (and destroy) vbase B, unconditionally C. // -// CHECK-LABEL: define dso_local %struct.D* @"??0D@@QEAA@H@Z"(%struct.D* returned %this, i32 %n, i32 %is_most_derived) +// CHECK-LABEL: define dso_local frozen %struct.D* @"??0D@@QEAA@H@Z"(%struct.D* frozen returned %this, i32 frozen %n, i32 frozen %is_most_derived) // CHECK: icmp ne i32 {{.*}}, 0 // CHECK: br i1 -// CHECK: call %struct.B* @"??0B@@QEAA@H@Z" +// CHECK: call frozen %struct.B* @"??0B@@QEAA@H@Z" // CHECK: br label -// CHECK: invoke %struct.C* @"??0C@@QEAA@H@Z" +// CHECK: invoke frozen %struct.C* @"??0C@@QEAA@H@Z" // CHECK: invoke void @"?may_throw@@YAXXZ"() // CHECK: cleanuppad // CHECK: call void @"??1C@@UEAA@XZ" diff --git a/clang/test/CodeGenCXX/multi-dim-operator-new.cpp b/clang/test/CodeGenCXX/multi-dim-operator-new.cpp --- a/clang/test/CodeGenCXX/multi-dim-operator-new.cpp +++ b/clang/test/CodeGenCXX/multi-dim-operator-new.cpp @@ -43,6 +43,6 @@ return 0; } -// CHECK: call noalias nonnull i8* @_Znam -// CHECK: call noalias nonnull i8* @_Znam -// CHECK: call noalias nonnull i8* @_Znam +// CHECK: call frozen noalias nonnull i8* @_Znam +// CHECK: call frozen noalias nonnull i8* @_Znam +// CHECK: call frozen noalias nonnull i8* @_Znam diff --git a/clang/test/CodeGenCXX/new-alias.cpp b/clang/test/CodeGenCXX/new-alias.cpp --- a/clang/test/CodeGenCXX/new-alias.cpp +++ b/clang/test/CodeGenCXX/new-alias.cpp @@ -9,5 +9,5 @@ void *operator new(size_t) __attribute__((alias("something"))); // PR16715: don't assert here. -// CHECK: call noalias nonnull i8* @_Znwm(i64 4) #3{{$}} +// CHECK: call frozen noalias nonnull i8* @_Znwm(i64 frozen 4) #3{{$}} int *pr16715 = new int; diff --git a/clang/test/CodeGenCXX/new-array-init.cpp b/clang/test/CodeGenCXX/new-array-init.cpp --- a/clang/test/CodeGenCXX/new-array-init.cpp +++ b/clang/test/CodeGenCXX/new-array-init.cpp @@ -34,7 +34,7 @@ struct S; new (int S::*[3][4][5]) (); - // CHECK: call noalias nonnull i8* @_Zna{{.}}(i{{32 240|64 480}}) + // CHECK: call frozen noalias nonnull i8* @_Zna{{.}}(i{{32 frozen 240|64 frozen 480}}) // CHECK: getelementptr inbounds i{{32|64}}, i{{32|64}}* {{.*}}, i{{32|64}} 60 // CHECK: phi @@ -49,7 +49,7 @@ // CHECK: icmp slt i{{32|64}} %{{[^ ]+}}, 4 // FIXME: Conditionally throw an exception rather than passing -1 to alloc function // CHECK: select - // CHECK: %[[PTR:.*]] = call noalias nonnull i8* @_Zna{{.}}(i{{32|64}} + // CHECK: %[[PTR:.*]] = call frozen noalias nonnull i8* @_Zna{{.}}(i{{32|64}} // CHECK: call void @llvm.memcpy{{.*}}(i8* align {{[0-9]+}} %[[PTR]], i8* align {{[0-9]+}} getelementptr inbounds ([4 x i8], [4 x i8]* @[[ABC4]], i32 0, i32 0), i32 4, // CHECK: %[[REST:.*]] = getelementptr inbounds i8, i8* %[[PTR]], i32 4 // CHECK: %[[RESTSIZE:.*]] = sub {{.*}}, 4 @@ -60,7 +60,7 @@ // CHECK-LABEL: define void @_Z12string_exactv void string_exact() { // CHECK-NOT: icmp - // CHECK: %[[PTR:.*]] = call noalias nonnull i8* @_Zna{{.}}(i{{32|64}} 4) + // CHECK: %[[PTR:.*]] = call frozen noalias nonnull i8* @_Zna{{.}}(i{{32|64}} frozen 4) // CHECK: call void @llvm.memcpy{{.*}}(i8* align {{[0-9]+}} %[[PTR]], i8* align {{[0-9]+}} getelementptr inbounds ([4 x i8], [4 x i8]* @[[ABC4]], i32 0, i32 0), i32 4, // CHECK-NOT: memset new char[4] { "abc" }; @@ -69,7 +69,7 @@ // CHECK-LABEL: define void @_Z17string_sufficientv void string_sufficient() { // CHECK-NOT: icmp - // CHECK: %[[PTR:.*]] = call noalias nonnull i8* @_Zna{{.}}(i{{32|64}} 15) + // CHECK: %[[PTR:.*]] = call frozen noalias nonnull i8* @_Zna{{.}}(i{{32|64}} frozen 15) // FIXME: For very large arrays, it would be preferable to emit a small copy and a memset. // CHECK: call void @llvm.memcpy{{.*}}(i8* align {{[0-9]+}} %[[PTR]], i8* align {{[0-9]+}} getelementptr inbounds ([15 x i8], [15 x i8]* @[[ABC15]], i32 0, i32 0), i32 15, // CHECK-NOT: memset @@ -79,7 +79,7 @@ // CHECK-LABEL: define void @_Z10aggr_exactv void aggr_exact() { // CHECK-NOT: icmp - // CHECK: %[[MEM:.*]] = call noalias nonnull i8* @_Zna{{.}}(i{{32|64}} 16) + // CHECK: %[[MEM:.*]] = call frozen noalias nonnull i8* @_Zna{{.}}(i{{32|64}} frozen 16) // CHECK: %[[PTR0:.*]] = bitcast i8* %[[MEM]] to %[[AGGR:.*]]* // CHECK: %[[FIELD:.*]] = getelementptr inbounds %[[AGGR]], %[[AGGR]]* %[[PTR0]], i32 0, i32 0{{$}} // CHECK: store i32 1, i32* %[[FIELD]] @@ -99,7 +99,7 @@ // CHECK-LABEL: define void @_Z15aggr_sufficienti void aggr_sufficient(int n) { // CHECK: icmp ult i32 %{{.*}}, 2 - // CHECK: %[[MEM:.*]] = call noalias nonnull i8* @_Zna{{.}}( + // CHECK: %[[MEM:.*]] = call frozen noalias nonnull i8* @_Zna{{.}}( // CHECK: %[[PTR0:.*]] = bitcast i8* %[[MEM]] to %[[AGGR:.*]]* // CHECK: %[[FIELD:.*]] = getelementptr inbounds %[[AGGR]], %[[AGGR]]* %[[PTR0]], i32 0, i32 0{{$}} // CHECK: store i32 1, i32* %[[FIELD]] @@ -120,7 +120,7 @@ // SIO-LABEL: define void @_Z14constexpr_testv void constexpr_test() { - // SIO: call noalias nonnull i8* @_Zna{{.}}(i32 4) + // SIO: call frozen noalias nonnull i8* @_Zna{{.}}(i32 frozen 4) new int[0+1]{0}; } @@ -128,7 +128,7 @@ void unknown_bound() { struct Aggr { int x, y, z; }; new Aggr[]{1, 2, 3, 4}; - // CHECK: call {{.*}}_Znaj(i32 24) + // CHECK: call {{.*}}_Znaj(i32 frozen 24) // CHECK: store i32 1 // CHECK: store i32 2 // CHECK: store i32 3 @@ -142,6 +142,6 @@ // CHECK-LABEL: define void @_Z20unknown_bound_stringv void unknown_bound_string() { new char[]{"hello"}; - // CHECK: call {{.*}}_Znaj(i32 6) + // CHECK: call {{.*}}_Znaj(i32 frozen 6) // CHECK: memcpy{{.*}} i32 6, } diff --git a/clang/test/CodeGenCXX/new-overflow.cpp b/clang/test/CodeGenCXX/new-overflow.cpp --- a/clang/test/CodeGenCXX/new-overflow.cpp +++ b/clang/test/CodeGenCXX/new-overflow.cpp @@ -11,13 +11,13 @@ typedef A elt; - // CHECK: define [[A:%.*]]* @_ZN5test04testEs(i16 signext + // CHECK: define frozen [[A:%.*]]* @_ZN5test04testEs(i16 frozen signext // CHECK: [[N:%.*]] = sext i16 {{%.*}} to i32 // CHECK-NEXT: [[T0:%.*]] = call { i32, i1 } @llvm.umul.with.overflow.i32(i32 [[N]], i32 4) // CHECK-NEXT: [[T1:%.*]] = extractvalue { i32, i1 } [[T0]], 1 // CHECK-NEXT: [[T2:%.*]] = extractvalue { i32, i1 } [[T0]], 0 // CHECK-NEXT: [[T3:%.*]] = select i1 [[T1]], i32 -1, i32 [[T2]] - // CHECK-NEXT: call noalias nonnull i8* @_Znaj(i32 [[T3]]) + // CHECK-NEXT: call frozen noalias nonnull i8* @_Znaj(i32 frozen [[T3]]) // CHECK: getelementptr inbounds {{.*}}, i32 [[N]] elt *test(short s) { return new elt[s]; @@ -33,14 +33,14 @@ typedef A elt[100]; - // CHECK: define [100 x [[A:%.*]]]* @_ZN5test14testEs(i16 signext + // CHECK: define frozen [100 x [[A:%.*]]]* @_ZN5test14testEs(i16 frozen signext // CHECK: [[N:%.*]] = sext i16 {{%.*}} to i32 // CHECK-NEXT: [[T0:%.*]] = call { i32, i1 } @llvm.umul.with.overflow.i32(i32 [[N]], i32 400) // CHECK-NEXT: [[T1:%.*]] = extractvalue { i32, i1 } [[T0]], 1 // CHECK-NEXT: [[T2:%.*]] = extractvalue { i32, i1 } [[T0]], 0 // CHECK-NEXT: [[T3:%.*]] = mul i32 [[N]], 100 // CHECK-NEXT: [[T4:%.*]] = select i1 [[T1]], i32 -1, i32 [[T2]] - // CHECK-NEXT: call noalias nonnull i8* @_Znaj(i32 [[T4]]) + // CHECK-NEXT: call frozen noalias nonnull i8* @_Znaj(i32 frozen [[T4]]) // CHECK: getelementptr inbounds {{.*}}, i32 [[T3]] elt *test(short s) { return new elt[s]; @@ -57,7 +57,7 @@ typedef A elt[100]; - // CHECK: define [100 x [[A:%.*]]]* @_ZN5test24testEs(i16 signext + // CHECK: define frozen [100 x [[A:%.*]]]* @_ZN5test24testEs(i16 frozen signext // CHECK: [[N:%.*]] = sext i16 {{%.*}} to i32 // CHECK-NEXT: [[T0:%.*]] = call { i32, i1 } @llvm.umul.with.overflow.i32(i32 [[N]], i32 400) // CHECK-NEXT: [[T1:%.*]] = extractvalue { i32, i1 } [[T0]], 1 @@ -68,7 +68,7 @@ // CHECK-NEXT: [[T6:%.*]] = or i1 [[T1]], [[T5]] // CHECK-NEXT: [[T7:%.*]] = extractvalue { i32, i1 } [[T4]], 0 // CHECK-NEXT: [[T8:%.*]] = select i1 [[T6]], i32 -1, i32 [[T7]] - // CHECK-NEXT: call noalias nonnull i8* @_Znaj(i32 [[T8]]) + // CHECK-NEXT: call frozen noalias nonnull i8* @_Znaj(i32 frozen [[T8]]) // CHECK: getelementptr inbounds {{.*}}, i32 [[T3]] elt *test(short s) { return new elt[s]; @@ -83,9 +83,9 @@ typedef A elt; - // CHECK: define [[A:%.*]]* @_ZN5test44testEs(i16 signext + // CHECK: define frozen [[A:%.*]]* @_ZN5test44testEs(i16 frozen signext // CHECK: [[N:%.*]] = sext i16 {{%.*}} to i32 - // CHECK-NEXT: call noalias nonnull i8* @_Znaj(i32 [[N]]) + // CHECK-NEXT: call frozen noalias nonnull i8* @_Znaj(i32 frozen [[N]]) // CHECK: getelementptr inbounds {{.*}}, i32 [[N]] elt *test(short s) { return new elt[s]; @@ -100,9 +100,9 @@ typedef A elt; - // CHECK: define [[A:%.*]]* @_ZN5test54testEi(i32 + // CHECK: define frozen [[A:%.*]]* @_ZN5test54testEi(i32 // CHECK: [[N:%.*]] = load i32, i32* - // CHECK-NEXT: call noalias nonnull i8* @_Znaj(i32 [[N]]) + // CHECK-NEXT: call frozen noalias nonnull i8* @_Znaj(i32 frozen [[N]]) // CHECK: getelementptr inbounds {{.*}}, i32 [[N]] elt *test(int s) { return new elt[s]; @@ -118,13 +118,13 @@ typedef A elt; - // CHECK: define [[A:%.*]]* @_ZN5test64testEt(i16 zeroext + // CHECK: define frozen [[A:%.*]]* @_ZN5test64testEt(i16 frozen zeroext // CHECK: [[N:%.*]] = zext i16 {{%.*}} to i32 // CHECK-NEXT: [[T0:%.*]] = call { i32, i1 } @llvm.umul.with.overflow.i32(i32 [[N]], i32 4) // CHECK-NEXT: [[T1:%.*]] = extractvalue { i32, i1 } [[T0]], 1 // CHECK-NEXT: [[T2:%.*]] = extractvalue { i32, i1 } [[T0]], 0 // CHECK-NEXT: [[T3:%.*]] = select i1 [[T1]], i32 -1, i32 [[T2]] - // CHECK-NEXT: call noalias nonnull i8* @_Znaj(i32 [[T3]]) + // CHECK-NEXT: call frozen noalias nonnull i8* @_Znaj(i32 frozen [[T3]]) // CHECK: getelementptr inbounds {{.*}}, i32 [[N]] elt *test(unsigned short s) { return new elt[s]; @@ -140,14 +140,14 @@ typedef A elt[100]; - // CHECK: define [100 x [[A:%.*]]]* @_ZN5test74testEt(i16 zeroext + // CHECK: define frozen [100 x [[A:%.*]]]* @_ZN5test74testEt(i16 frozen zeroext // CHECK: [[N:%.*]] = zext i16 {{%.*}} to i32 // CHECK-NEXT: [[T0:%.*]] = call { i32, i1 } @llvm.umul.with.overflow.i32(i32 [[N]], i32 400) // CHECK-NEXT: [[T1:%.*]] = extractvalue { i32, i1 } [[T0]], 1 // CHECK-NEXT: [[T2:%.*]] = extractvalue { i32, i1 } [[T0]], 0 // CHECK-NEXT: [[T3:%.*]] = mul i32 [[N]], 100 // CHECK-NEXT: [[T4:%.*]] = select i1 [[T1]], i32 -1, i32 [[T2]] - // CHECK-NEXT: call noalias nonnull i8* @_Znaj(i32 [[T4]]) + // CHECK-NEXT: call frozen noalias nonnull i8* @_Znaj(i32 frozen [[T4]]) // CHECK: getelementptr inbounds {{.*}}, i32 [[T3]] elt *test(unsigned short s) { return new elt[s]; @@ -163,14 +163,14 @@ typedef A elt; - // CHECK: define [[A:%.*]]* @_ZN5test84testEx(i64 + // CHECK: define frozen [[A:%.*]]* @_ZN5test84testEx(i64 // CHECK: [[N:%.*]] = load i64, i64* // CHECK-NEXT: [[T1:%.*]] = trunc i64 [[N]] to i32 // CHECK-NEXT: [[T2:%.*]] = call { i32, i1 } @llvm.umul.with.overflow.i32(i32 [[T1]], i32 4) // CHECK-NEXT: [[T3:%.*]] = extractvalue { i32, i1 } [[T2]], 1 // CHECK-NEXT: [[T5:%.*]] = extractvalue { i32, i1 } [[T2]], 0 // CHECK-NEXT: [[T6:%.*]] = select i1 [[T3]], i32 -1, i32 [[T5]] - // CHECK-NEXT: call noalias nonnull i8* @_Znaj(i32 [[T6]]) + // CHECK-NEXT: call frozen noalias nonnull i8* @_Znaj(i32 frozen [[T6]]) // CHECK: getelementptr inbounds {{.*}}, i32 [[T1]] elt *test(long long s) { return new elt[s]; @@ -186,14 +186,14 @@ typedef A elt; - // CHECK: define [[A:%.*]]* @_ZN5test94testEy(i64 + // CHECK: define frozen [[A:%.*]]* @_ZN5test94testEy(i64 // CHECK: [[N:%.*]] = load i64, i64* // CHECK-NEXT: [[T1:%.*]] = trunc i64 [[N]] to i32 // CHECK-NEXT: [[T2:%.*]] = call { i32, i1 } @llvm.umul.with.overflow.i32(i32 [[T1]], i32 4) // CHECK-NEXT: [[T3:%.*]] = extractvalue { i32, i1 } [[T2]], 1 // CHECK-NEXT: [[T5:%.*]] = extractvalue { i32, i1 } [[T2]], 0 // CHECK-NEXT: [[T6:%.*]] = select i1 [[T3]], i32 -1, i32 [[T5]] - // CHECK-NEXT: call noalias nonnull i8* @_Znaj(i32 [[T6]]) + // CHECK-NEXT: call frozen noalias nonnull i8* @_Znaj(i32 frozen [[T6]]) // CHECK: getelementptr inbounds {{.*}}, i32 [[T1]] elt *test(unsigned long long s) { return new elt[s]; diff --git a/clang/test/CodeGenCXX/new.cpp b/clang/test/CodeGenCXX/new.cpp --- a/clang/test/CodeGenCXX/new.cpp +++ b/clang/test/CodeGenCXX/new.cpp @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -std=c++14 -triple x86_64-unknown-unknown %s -emit-llvm -o - | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args -std=c++14 -triple x86_64-unknown-unknown %s -emit-llvm -o - | FileCheck %s typedef __typeof__(sizeof(0)) size_t; @@ -14,9 +14,9 @@ delete [] new int [3]; } -// CHECK: declare nonnull i8* @_Znwm(i64) [[ATTR_NOBUILTIN:#[^ ]*]] +// CHECK: declare frozen nonnull i8* @_Znwm(i64) [[ATTR_NOBUILTIN:#[^ ]*]] // CHECK: declare void @_ZdlPv(i8*) [[ATTR_NOBUILTIN_NOUNWIND:#[^ ]*]] -// CHECK: declare nonnull i8* @_Znam(i64) [[ATTR_NOBUILTIN]] +// CHECK: declare frozen nonnull i8* @_Znam(i64) [[ATTR_NOBUILTIN]] // CHECK: declare void @_ZdaPv(i8*) [[ATTR_NOBUILTIN_NOUNWIND]] namespace std { @@ -127,15 +127,15 @@ struct Bmemptr { int Bmemptr::* memptr; int a; }; void t11(int n) { - // CHECK: call noalias nonnull i8* @_Znwm + // CHECK: call frozen noalias nonnull i8* @_Znwm // CHECK: call void @llvm.memset.p0i8.i64( B* b = new B(); - // CHECK: call noalias nonnull i8* @_Znam + // CHECK: call frozen noalias nonnull i8* @_Znam // CHECK: {{call void.*llvm.memset.p0i8.i64.*i8 0, i64 %}} B *b2 = new B[n](); - // CHECK: call noalias nonnull i8* @_Znam + // CHECK: call frozen noalias nonnull i8* @_Znam // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64 // CHECK: br Bmemptr *b_memptr = new Bmemptr[n](); @@ -148,11 +148,11 @@ // We don't need to initialize an empty class. // CHECK-LABEL: define void @_Z3t12v void t12() { - // CHECK: call noalias nonnull i8* @_Znam + // CHECK: call frozen noalias nonnull i8* @_Znam // CHECK-NOT: br (void)new Empty[10]; - // CHECK: call noalias nonnull i8* @_Znam + // CHECK: call frozen noalias nonnull i8* @_Znam // CHECK-NOT: br (void)new Empty[10](); @@ -162,11 +162,11 @@ // Zero-initialization // CHECK-LABEL: define void @_Z3t13i void t13(int n) { - // CHECK: call noalias nonnull i8* @_Znwm + // CHECK: call frozen noalias nonnull i8* @_Znwm // CHECK: store i32 0, i32* (void)new int(); - // CHECK: call noalias nonnull i8* @_Znam + // CHECK: call frozen noalias nonnull i8* @_Znam // CHECK: {{call void.*llvm.memset.p0i8.i64.*i8 0, i64 %}} (void)new int[n](); @@ -181,12 +181,12 @@ }; void f() { - // CHECK: call i8* @_ZN5AllocnaEm(i64 808) + // CHECK: call frozen i8* @_ZN5AllocnaEm(i64 808) // CHECK: store i64 200 // CHECK: call void @_ZN5AllocD1Ev( // CHECK: call void @_ZN5AllocdaEPv(i8* delete[] new Alloc[10][20]; - // CHECK: call noalias nonnull i8* @_Znwm + // CHECK: call frozen noalias nonnull i8* @_Znwm // CHECK: call void @_ZdlPv(i8* delete new bool; // CHECK: ret void @@ -207,7 +207,7 @@ // CHECK-LABEL: define void @_ZN6test156test0bEPv( // CHECK: [[P0:%.*]] = load i8*, i8** - // CHECK: [[P:%.*]] = call i8* @_ZnwmPvb(i64 1, i8* [[P0]] + // CHECK: [[P:%.*]] = call frozen i8* @_ZnwmPvb(i64 1, i8* [[P0]] // CHECK-NEXT: icmp eq i8* [[P]], null // CHECK-NEXT: br i1 // CHECK: [[T0:%.*]] = bitcast i8* [[P]] to [[A:%.*]]* @@ -234,7 +234,7 @@ // CHECK-LABEL: define void @_ZN6test156test1bEPv( // CHECK: [[P0:%.*]] = load i8*, i8** - // CHECK: [[P:%.*]] = call i8* @_ZnamPvb(i64 13, i8* [[P0]] + // CHECK: [[P:%.*]] = call frozen i8* @_ZnamPvb(i64 13, i8* [[P0]] // CHECK-NEXT: icmp eq i8* [[P]], null // CHECK-NEXT: br i1 // CHECK: [[AFTER_COOKIE:%.*]] = getelementptr inbounds i8, i8* [[P]], i64 8 @@ -272,7 +272,7 @@ // CHECK-LABEL: define weak_odr void @_ZN7PR101971fIiEEvv() template void f() { - // CHECK: [[CALL:%.*]] = call noalias nonnull i8* @_Znwm + // CHECK: [[CALL:%.*]] = call frozen noalias nonnull i8* @_Znwm // CHECK-NEXT: [[CASTED:%.*]] = bitcast i8* [[CALL]] to new T; // CHECK-NEXT: ret void @@ -284,7 +284,7 @@ namespace PR11523 { class MyClass; typedef int MyClass::* NewTy; - // CHECK-LABEL: define i64* @_ZN7PR115231fEv + // CHECK-LABEL: define frozen i64* @_ZN7PR115231fEv // CHECK: store i64 -1 NewTy* f() { return new NewTy[2](); } } @@ -294,7 +294,7 @@ struct X { X(); X(const X&); }; X* a(X* x) { return new X(X()); } // CHECK: define {{.*}} @_ZN7PR117571aEPNS_1XE - // CHECK: [[CALL:%.*]] = call noalias nonnull i8* @_Znwm + // CHECK: [[CALL:%.*]] = call frozen noalias nonnull i8* @_Znwm // CHECK-NEXT: [[CASTED:%.*]] = bitcast i8* [[CALL]] to // CHECK-NEXT: call void @_ZN7PR117571XC1Ev({{.*}}* [[CASTED]]) // CHECK-NEXT: ret {{.*}} [[CASTED]] @@ -303,8 +303,8 @@ namespace PR13380 { struct A { A() {} }; struct B : public A { int x; }; - // CHECK-LABEL: define i8* @_ZN7PR133801fEv - // CHECK: call noalias nonnull i8* @_Znam( + // CHECK-LABEL: define frozen i8* @_ZN7PR133801fEv + // CHECK: call frozen noalias nonnull i8* @_Znam( // CHECK: call void @llvm.memset.p0i8 // CHECK-NEXT: call void @_ZN7PR133801BC1Ev void* f() { return new B[2](); } @@ -318,40 +318,40 @@ // CHECK-LABEL: define void @_ZN5N36641fEv void f() { - // CHECK: call noalias nonnull i8* @_Znwm(i64 4) [[ATTR_BUILTIN_NEW:#[^ ]*]] + // CHECK: call frozen noalias nonnull i8* @_Znwm(i64 4) [[ATTR_BUILTIN_NEW:#[^ ]*]] int *p = new int; // expected-note {{allocated with 'new' here}} // CHECK: call void @_ZdlPv({{.*}}) [[ATTR_BUILTIN_DELETE:#[^ ]*]] delete p; - // CHECK: call noalias nonnull i8* @_Znam(i64 12) [[ATTR_BUILTIN_NEW]] + // CHECK: call frozen noalias nonnull i8* @_Znam(i64 12) [[ATTR_BUILTIN_NEW]] int *q = new int[3]; // CHECK: call void @_ZdaPv({{.*}}) [[ATTR_BUILTIN_DELETE]] delete[] p; // expected-warning {{'delete[]' applied to a pointer that was allocated with 'new'; did you mean 'delete'?}} - // CHECK: call noalias i8* @_ZnamRKSt9nothrow_t(i64 3, {{.*}}) [[ATTR_BUILTIN_NOTHROW_NEW:#[^ ]*]] + // CHECK: call frozen noalias i8* @_ZnamRKSt9nothrow_t(i64 3, {{.*}}) [[ATTR_BUILTIN_NOTHROW_NEW:#[^ ]*]] (void) new (nothrow) S[3]; - // CHECK: call i8* @_Znwm15MyPlacementType(i64 4){{$}} + // CHECK: call frozen i8* @_Znwm15MyPlacementType(i64 4){{$}} (void) new (mpt) int; } - // CHECK: declare i8* @_ZnamRKSt9nothrow_t(i64, {{.*}}) [[ATTR_NOBUILTIN_NOUNWIND_ALLOCSIZE:#[^ ]*]] + // CHECK: declare frozen i8* @_ZnamRKSt9nothrow_t(i64, {{.*}}) [[ATTR_NOBUILTIN_NOUNWIND_ALLOCSIZE:#[^ ]*]] // CHECK-LABEL: define void @_ZN5N36641gEv void g() { // It's OK for there to be attributes here, so long as we don't have a // 'builtin' attribute. - // CHECK: call noalias nonnull i8* @_Znwm(i64 4) {{#[^ ]*}}{{$}} + // CHECK: call frozen noalias nonnull i8* @_Znwm(i64 4) {{#[^ ]*}}{{$}} int *p = (int*)operator new(4); // CHECK: call void @_ZdlPv({{.*}}) [[ATTR_NOUNWIND:#[^ ]*]] operator delete(p); - // CHECK: call noalias nonnull i8* @_Znam(i64 12) {{#[^ ]*}}{{$}} + // CHECK: call frozen noalias nonnull i8* @_Znam(i64 12) {{#[^ ]*}}{{$}} int *q = (int*)operator new[](12); // CHECK: call void @_ZdaPv({{.*}}) [[ATTR_NOUNWIND]] operator delete [](p); - // CHECK: call noalias i8* @_ZnamRKSt9nothrow_t(i64 3, {{.*}}) [[ATTR_NOUNWIND_ALLOCSIZE:#[^ ]*]] + // CHECK: call frozen noalias i8* @_ZnamRKSt9nothrow_t(i64 3, {{.*}}) [[ATTR_NOUNWIND_ALLOCSIZE:#[^ ]*]] (void) operator new[](3, nothrow); } } @@ -359,7 +359,7 @@ namespace builtins { // CHECK-LABEL: define void @_ZN8builtins1fEv void f() { - // CHECK: call noalias nonnull i8* @_Znwm(i64 4) [[ATTR_BUILTIN_NEW]] + // CHECK: call frozen noalias nonnull i8* @_Znwm(i64 4) [[ATTR_BUILTIN_NEW]] // CHECK: call void @_ZdlPv({{.*}}) [[ATTR_BUILTIN_DELETE]] __builtin_operator_delete(__builtin_operator_new(4)); } diff --git a/clang/test/CodeGenCXX/no-odr-use.cpp b/clang/test/CodeGenCXX/no-odr-use.cpp --- a/clang/test/CodeGenCXX/no-odr-use.cpp +++ b/clang/test/CodeGenCXX/no-odr-use.cpp @@ -6,7 +6,7 @@ // CHECK-CXX2A-DAG: @_ZN7PR422765State1mE = linkonce_odr constant [2 x { i64, i64 }] [{ {{.*}} @_ZN7PR422765State2f1Ev {{.*}}, i64 0 }, { {{.*}} @_ZN7PR422765State2f2Ev {{.*}}, i64 0 }], comdat struct A { int x, y[2]; int arr[3]; }; -// CHECK-LABEL: define i32 @_Z1fi( +// CHECK-LABEL: define frozen i32 @_Z1fi( int f(int i) { // CHECK: call void {{.*}}memcpy{{.*}}({{.*}}, {{.*}} @__const._Z1fi.a constexpr A a = {1, 2, 3, 4, 5, 6}; diff --git a/clang/test/CodeGenCXX/noescape.cpp b/clang/test/CodeGenCXX/noescape.cpp --- a/clang/test/CodeGenCXX/noescape.cpp +++ b/clang/test/CodeGenCXX/noescape.cpp @@ -8,26 +8,26 @@ virtual void vm1(int *, int * __attribute__((noescape))); }; -// CHECK: define void @_ZN1SC2EPiS0_(%struct.S* {{.*}}, {{.*}}, {{.*}} nocapture {{%.*}}) -// CHECK: define void @_ZN1SC1EPiS0_(%struct.S* {{.*}}, {{.*}}, {{.*}} nocapture {{%.*}}) {{.*}} { -// CHECK: call void @_ZN1SC2EPiS0_(%struct.S* {{.*}}, {{.*}}, {{.*}} nocapture {{.*}}) +// CHECK: define void @_ZN1SC2EPiS0_(%struct.S* {{.*}}, {{.*}}, {{.*}} frozen nocapture {{%.*}}) +// CHECK: define void @_ZN1SC1EPiS0_(%struct.S* {{.*}}, {{.*}}, {{.*}} frozen nocapture {{%.*}}) {{.*}} { +// CHECK: call void @_ZN1SC2EPiS0_(%struct.S* {{.*}}, {{.*}}, {{.*}} frozen nocapture {{.*}}) S::S(int *, int * __attribute__((noescape))) {} -// CHECK: define {{.*}} %struct.S* @_ZN1SaSEPi(%struct.S* {{.*}}, {{.*}} nocapture {{%.*}}) +// CHECK: define {{.*}} %struct.S* @_ZN1SaSEPi(%struct.S* {{.*}}, {{.*}} frozen nocapture {{%.*}}) S &S::operator=(int * __attribute__((noescape))) { return *this; } -// CHECK: define void @_ZN1S2m0EPiS0_(%struct.S* {{.*}}, {{.*}} nocapture {{%.*}}) +// CHECK: define void @_ZN1S2m0EPiS0_(%struct.S* {{.*}}, {{.*}} frozen nocapture {{%.*}}) void S::m0(int *, int * __attribute__((noescape))) {} -// CHECK: define void @_ZN1S3vm1EPiS0_(%struct.S* {{.*}}, {{.*}} nocapture {{%.*}}) +// CHECK: define void @_ZN1S3vm1EPiS0_(%struct.S* {{.*}}, {{.*}} frozen nocapture {{%.*}}) void S::vm1(int *, int * __attribute__((noescape))) {} // CHECK-LABEL: define void @_Z5test0P1SPiS1_( -// CHECK: call void @_ZN1SC1EPiS0_(%struct.S* {{.*}}, {{.*}}, {{.*}} nocapture {{.*}}) -// CHECK: call {{.*}} %struct.S* @_ZN1SaSEPi(%struct.S* {{.*}}, {{.*}} nocapture {{.*}}) -// CHECK: call void @_ZN1S2m0EPiS0_(%struct.S* {{.*}}, {{.*}}, {{.*}} nocapture {{.*}}) -// CHECK: call void {{.*}}(%struct.S* {{.*}}, {{.*}}, {{.*}} nocapture {{.*}}) +// CHECK: call void @_ZN1SC1EPiS0_(%struct.S* {{.*}}, {{.*}}, {{.*}} frozen nocapture {{.*}}) +// CHECK: call {{.*}} %struct.S* @_ZN1SaSEPi(%struct.S* {{.*}}, {{.*}} frozen nocapture {{.*}}) +// CHECK: call void @_ZN1S2m0EPiS0_(%struct.S* {{.*}}, {{.*}}, {{.*}} frozen nocapture {{.*}}) +// CHECK: call void {{.*}}(%struct.S* {{.*}}, {{.*}}, {{.*}} frozen nocapture {{.*}}) void test0(S *s, int *p0, int *p1) { S t(p0, p1); t = p1; @@ -39,27 +39,27 @@ typedef decltype(sizeof(0)) size_t; } -// CHECK: define {{.*}} @_ZnwmPv({{.*}}, {{.*}} nocapture {{.*}}) +// CHECK: define {{.*}} @_ZnwmPv({{.*}}, {{.*}} frozen nocapture {{.*}}) void *operator new(std::size_t, void * __attribute__((noescape)) p) { return p; } -// CHECK-LABEL: define i8* @_Z5test1Pv( -// CHECK: %call = call {{.*}} @_ZnwmPv({{.*}}, {{.*}} nocapture {{.*}}) +// CHECK-LABEL: define frozen i8* @_Z5test1Pv( +// CHECK: %call = call {{.*}} @_ZnwmPv({{.*}}, {{.*}} frozen nocapture {{.*}}) void *test1(void *p0) { return ::operator new(16, p0); } // CHECK-LABEL: define void @_Z5test2PiS_( -// CHECK: call void @"_ZZ5test2PiS_ENK3$_0clES_S_"({{.*}}, {{.*}}, {{.*}} nocapture {{.*}}) -// CHECK: define internal void @"_ZZ5test2PiS_ENK3$_0clES_S_"({{.*}}, {{.*}}, {{.*}} nocapture {{%.*}}) +// CHECK: call void @"_ZZ5test2PiS_ENK3$_0clES_S_"({{.*}}, {{.*}}, {{.*}} frozen nocapture {{.*}}) +// CHECK: define internal void @"_ZZ5test2PiS_ENK3$_0clES_S_"({{.*}}, {{.*}}, {{.*}} frozen nocapture {{%.*}}) void test2(int *p0, int *p1) { auto t = [](int *, int * __attribute__((noescape))){}; t(p0, p1); } // CHECK-LABEL: define void @_Z5test3PFvU8noescapePiES_( -// CHECK: call void {{.*}}(i32* nocapture {{.*}}) +// CHECK: call void {{.*}}(i32* frozen nocapture {{.*}}) typedef void (*NoEscapeFunc)(__attribute__((noescape)) int *); void test3(NoEscapeFunc f, int *p) { diff --git a/clang/test/CodeGenCXX/noinline-template.cpp b/clang/test/CodeGenCXX/noinline-template.cpp --- a/clang/test/CodeGenCXX/noinline-template.cpp +++ b/clang/test/CodeGenCXX/noinline-template.cpp @@ -3,7 +3,7 @@ // This was a problem in Sema, but only shows up as noinline missing // in CodeGen. -// CHECK: define linkonce_odr {{.*}}void @_ZN6VectorIiE13growStorageByEv(%struct.Vector* %this) [[NI:#[0-9]+]] +// CHECK: define linkonce_odr {{.*}}void @_ZN6VectorIiE13growStorageByEv(%struct.Vector* frozen %this) [[NI:#[0-9]+]] template struct Vector { void growStorageBy(); diff --git a/clang/test/CodeGenCXX/nonconst-init.cpp b/clang/test/CodeGenCXX/nonconst-init.cpp --- a/clang/test/CodeGenCXX/nonconst-init.cpp +++ b/clang/test/CodeGenCXX/nonconst-init.cpp @@ -1,5 +1,5 @@ // RUN: %clang_cc1 -triple x86_64-unknown-unknown -emit-llvm -o - %s | FileCheck %s int a(); -// CHECK: call i32 @_Z1av() +// CHECK: call frozen i32 @_Z1av() struct x {int x, y : 10;} x = {1, a()}; diff --git a/clang/test/CodeGenCXX/nrvo.cpp b/clang/test/CodeGenCXX/nrvo.cpp --- a/clang/test/CodeGenCXX/nrvo.cpp +++ b/clang/test/CodeGenCXX/nrvo.cpp @@ -155,7 +155,7 @@ return x; } // CHECK: call {{.*}} @_ZN1XD1Ev - // CHECK: call void @exit(i32 1) + // CHECK: call void @exit(i32 frozen 1) exit(1); } @@ -182,9 +182,9 @@ // CHECK: [[A:%.*]] = alloca [[X:%.*]], align 8 // CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds %class.X, %class.X* [[A]], i32 0, i32 0 // CHECK-NEXT: call void @llvm.lifetime.start.p0i8(i64 1, i8* nonnull [[PTR]]) - // CHECK-NEXT: call {{.*}} @_ZN1XC1Ev([[X]]* nonnull [[A]]) - // CHECK-NEXT: call {{.*}} @_ZN1XC1ERKS_([[X]]* {{%.*}}, [[X]]* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[A]]) - // CHECK-NEXT: call {{.*}} @_ZN1XD1Ev([[X]]* nonnull [[A]]) + // CHECK-NEXT: call {{.*}} @_ZN1XC1Ev([[X]]* frozen nonnull [[A]]) + // CHECK-NEXT: call {{.*}} @_ZN1XC1ERKS_([[X]]* frozen {{%.*}}, [[X]]* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[A]]) + // CHECK-NEXT: call {{.*}} @_ZN1XD1Ev([[X]]* frozen nonnull [[A]]) // CHECK-NEXT: call void @llvm.lifetime.end.p0i8(i64 1, i8* nonnull [[PTR]]) // CHECK-NEXT: ret void } diff --git a/clang/test/CodeGenCXX/nullptr.cpp b/clang/test/CodeGenCXX/nullptr.cpp --- a/clang/test/CodeGenCXX/nullptr.cpp +++ b/clang/test/CodeGenCXX/nullptr.cpp @@ -15,7 +15,7 @@ struct X { }; void g() { - // CHECK: call i8* @_Z11get_nullptrv() + // CHECK: call frozen i8* @_Z11get_nullptrv() int (X::*pmf)(int) = get_nullptr(); } diff --git a/clang/test/CodeGenCXX/observe-noexcept.cpp b/clang/test/CodeGenCXX/observe-noexcept.cpp --- a/clang/test/CodeGenCXX/observe-noexcept.cpp +++ b/clang/test/CodeGenCXX/observe-noexcept.cpp @@ -7,7 +7,7 @@ void ffcomplex (int a) { double _Complex dc = (double)a; - // CHECK: call { double, double } @__muldc3(double %{{.+}}, double %{{.+}}, double %{{.+}}, double %{{.+}}) + // CHECK: call frozen { double, double } @__muldc3(double frozen %{{.+}}, double frozen %{{.+}}, double frozen %{{.+}}, double frozen %{{.+}}) dc *= dc; // CHECK: call {{.+}} @__kmpc_fork_call({{.+}} [[REGNAME1:@.*]] to void (i32*, i32*, ...)*), { double, double }* %{{.+}}) #pragma omp parallel @@ -19,7 +19,7 @@ // CHECK: define internal {{.+}}[[REGNAME1]]( // CHECK-NOT: invoke -// CHECK: call { double, double } @__muldc3(double %{{.+}}, double %{{.+}}, double %{{.+}}, double %{{.+}}) +// CHECK: call frozen { double, double } @__muldc3(double frozen %{{.+}}, double frozen %{{.+}}, double frozen %{{.+}}, double frozen %{{.+}}) // CHECK-NOT: invoke // CHECK: ret void diff --git a/clang/test/CodeGenCXX/operator-new.cpp b/clang/test/CodeGenCXX/operator-new.cpp --- a/clang/test/CodeGenCXX/operator-new.cpp +++ b/clang/test/CodeGenCXX/operator-new.cpp @@ -10,7 +10,7 @@ }; void f1() { - // ALL: declare nonnull i8* @_Znwj( + // ALL: declare frozen nonnull i8* @_Znwj( new teste(); } @@ -22,8 +22,8 @@ // ALL-NEXT: [[OVER:%.*]] = extractvalue {{.*}} [[UWO]], 1 // ALL-NEXT: [[SUM:%.*]] = extractvalue {{.*}} [[UWO]], 0 // ALL-NEXT: [[RESULT:%.*]] = select i1 [[OVER]], i32 -1, i32 [[SUM]] - // SANE-NEXT: call noalias nonnull i8* @_Znaj(i32 [[RESULT]]) - // SANENOT-NEXT: call nonnull i8* @_Znaj(i32 [[RESULT]]) + // SANE-NEXT: call frozen noalias nonnull i8* @_Znaj(i32 frozen [[RESULT]]) + // SANENOT-NEXT: call frozen nonnull i8* @_Znaj(i32 frozen [[RESULT]]) } -// ALL: declare nonnull i8* @_Znaj( +// ALL: declare frozen nonnull i8* @_Znaj( diff --git a/clang/test/CodeGenCXX/optnone-and-attributes.cpp b/clang/test/CodeGenCXX/optnone-and-attributes.cpp --- a/clang/test/CodeGenCXX/optnone-and-attributes.cpp +++ b/clang/test/CodeGenCXX/optnone-and-attributes.cpp @@ -72,7 +72,7 @@ return imported_optnone_func(a); // use of imported func } // CHECK: @_Z21exported_optnone_funci({{.*}}) [[OPTNONE]] -// CHECK: declare dllimport {{.*}} @_Z21imported_optnone_funci({{.*}}) [[DLLIMPORT:#[0-9]+]] +// CHECK: declare dllimport {{.*}} @_Z21imported_optnone_funci({{.*}} frozen) [[DLLIMPORT:#[0-9]+]] // CHECK: attributes [[OPTNONE]] = { noinline {{.*}} optnone diff --git a/clang/test/CodeGenCXX/partial-destruction.cpp b/clang/test/CodeGenCXX/partial-destruction.cpp --- a/clang/test/CodeGenCXX/partial-destruction.cpp +++ b/clang/test/CodeGenCXX/partial-destruction.cpp @@ -22,16 +22,16 @@ // Initialize. // CHECK-NEXT: [[E_BEGIN:%.*]] = getelementptr inbounds [10 x [[A]]], [10 x [[A]]]* [[AS]], i64 0, i64 0 // CHECK-NEXT: store [[A]]* [[E_BEGIN]], [[A]]** [[ENDVAR]] - // CHECK-NEXT: invoke void @_ZN5test01AC1Ei([[A]]* [[E_BEGIN]], i32 5) + // CHECK-NEXT: invoke void @_ZN5test01AC1Ei([[A]]* frozen [[E_BEGIN]], i32 frozen 5) // CHECK: [[E1:%.*]] = getelementptr inbounds [[A]], [[A]]* [[E_BEGIN]], i64 1 // CHECK-NEXT: store [[A]]* [[E1]], [[A]]** [[ENDVAR]] - // CHECK-NEXT: invoke void @_ZN5test01AC1Ei([[A]]* [[E1]], i32 7) + // CHECK-NEXT: invoke void @_ZN5test01AC1Ei([[A]]* frozen [[E1]], i32 frozen 7) // CHECK: [[E2:%.*]] = getelementptr inbounds [[A]], [[A]]* [[E1]], i64 1 // CHECK-NEXT: store [[A]]* [[E2]], [[A]]** [[ENDVAR]] // CHECK-NEXT: [[E_END:%.*]] = getelementptr inbounds [[A]], [[A]]* [[E_BEGIN]], i64 10 // CHECK-NEXT: br label // CHECK: [[E_CUR:%.*]] = phi [[A]]* [ [[E2]], {{%.*}} ], [ [[E_NEXT:%.*]], {{%.*}} ] - // CHECK-NEXT: invoke void @_ZN5test01AC1Ev([[A]]* [[E_CUR]]) + // CHECK-NEXT: invoke void @_ZN5test01AC1Ev([[A]]* frozen [[E_CUR]]) // CHECK: [[E_NEXT]] = getelementptr inbounds [[A]], [[A]]* [[E_CUR]], i64 1 // CHECK-NEXT: store [[A]]* [[E_NEXT]], [[A]]** [[ENDVAR]] // CHECK-NEXT: [[T0:%.*]] = icmp eq [[A]]* [[E_NEXT]], [[E_END]] @@ -46,8 +46,8 @@ // CHECK-NEXT: br label // CHECK: [[ED_AFTER:%.*]] = phi [[A]]* [ [[ED_END]], {{%.*}} ], [ [[ED_CUR:%.*]], {{%.*}} ] // CHECK-NEXT: [[ED_CUR]] = getelementptr inbounds [[A]], [[A]]* [[ED_AFTER]], i64 -1 - // CHECKv03-NEXT: invoke void @_ZN5test01AD1Ev([[A]]* [[ED_CUR]]) - // CHECKv11-NEXT: call void @_ZN5test01AD1Ev([[A]]* [[ED_CUR]]) + // CHECKv03-NEXT: invoke void @_ZN5test01AD1Ev([[A]]* frozen [[ED_CUR]]) + // CHECKv11-NEXT: call void @_ZN5test01AD1Ev([[A]]* frozen [[ED_CUR]]) // CHECK: [[T0:%.*]] = icmp eq [[A]]* [[ED_CUR]], [[ED_BEGIN]] // CHECK-NEXT: br i1 [[T0]], // CHECK: ret void @@ -60,8 +60,8 @@ // CHECK-NEXT: br i1 [[T0]], // CHECK: [[E_AFTER:%.*]] = phi [[A]]* [ [[PARTIAL_END]], {{%.*}} ], [ [[E_CUR:%.*]], {{%.*}} ] // CHECK-NEXT: [[E_CUR]] = getelementptr inbounds [[A]], [[A]]* [[E_AFTER]], i64 -1 - // CHECKv03-NEXT: invoke void @_ZN5test01AD1Ev([[A]]* [[E_CUR]]) - // CHECKv11-NEXT: call void @_ZN5test01AD1Ev([[A]]* [[E_CUR]]) + // CHECKv03-NEXT: invoke void @_ZN5test01AD1Ev([[A]]* frozen [[E_CUR]]) + // CHECKv11-NEXT: call void @_ZN5test01AD1Ev([[A]]* frozen [[E_CUR]]) // CHECK: [[T0:%.*]] = icmp eq [[A]]* [[E_CUR]], [[E_BEGIN]] // CHECK-NEXT: br i1 [[T0]], @@ -82,15 +82,15 @@ // CHECKv03-NEXT: br i1 [[T0]] // CHECKv03: [[EDD_AFTER:%.*]] = phi [[A]]* [ [[ED_CUR]], {{%.*}} ], [ [[EDD_CUR:%.*]], {{%.*}} ] // CHECKv03-NEXT: [[EDD_CUR]] = getelementptr inbounds [[A]], [[A]]* [[EDD_AFTER]], i64 -1 - // CHECKv03-NEXT: invoke void @_ZN5test01AD1Ev([[A]]* [[EDD_CUR]]) + // CHECKv03-NEXT: invoke void @_ZN5test01AD1Ev([[A]]* frozen [[EDD_CUR]]) // CHECKv03: [[T0:%.*]] = icmp eq [[A]]* [[EDD_CUR]], [[ED_BEGIN]] // CHECKv03-NEXT: br i1 [[T0]] // Back to the primary EH destructor. // CHECK: [[E_AFTER:%.*]] = phi [[A]]* [ [[E_END]], {{%.*}} ], [ [[E_CUR:%.*]], {{%.*}} ] // CHECK-NEXT: [[E_CUR]] = getelementptr inbounds [[A]], [[A]]* [[E_AFTER]], i64 -1 - // CHECKv03-NEXT: invoke void @_ZN5test01AD1Ev([[A]]* [[E_CUR]]) - // CHECKv11-NEXT: call void @_ZN5test01AD1Ev([[A]]* [[E_CUR]]) + // CHECKv03-NEXT: invoke void @_ZN5test01AD1Ev([[A]]* frozen [[E_CUR]]) + // CHECKv11-NEXT: call void @_ZN5test01AD1Ev([[A]]* frozen [[E_CUR]]) // CHECK: [[T0:%.*]] = icmp eq [[A]]* [[E_CUR]], [[E0]] // CHECK-NEXT: br i1 [[T0]], @@ -109,14 +109,14 @@ // CHECK-NEXT: alloca i8* // CHECK-NEXT: alloca i32 // CHECK-NEXT: [[X:%.*]] = getelementptr inbounds [[B]], [[B]]* [[V]], i32 0, i32 0 - // CHECK-NEXT: call void @_ZN5test11AC1Ei([[A:%.*]]* [[X]], i32 5) + // CHECK-NEXT: call void @_ZN5test11AC1Ei([[A:%.*]]* frozen [[X]], i32 frozen 5) // CHECK-NEXT: [[Y:%.*]] = getelementptr inbounds [[B]], [[B]]* [[V]], i32 0, i32 1 - // CHECK-NEXT: invoke void @_ZN5test11AC1Ei([[A]]* [[Y]], i32 6) + // CHECK-NEXT: invoke void @_ZN5test11AC1Ei([[A]]* frozen [[Y]], i32 frozen 6) // CHECK: [[Z:%.*]] = getelementptr inbounds [[B]], [[B]]* [[V]], i32 0, i32 2 - // CHECK-NEXT: invoke void @_ZN5test11AC1Ei([[A]]* [[Z]], i32 7) + // CHECK-NEXT: invoke void @_ZN5test11AC1Ei([[A]]* frozen [[Z]], i32 frozen 7) // CHECK: [[W:%.*]] = getelementptr inbounds [[B]], [[B]]* [[V]], i32 0, i32 3 // CHECK-NEXT: store i32 8, i32* [[W]], align 4 - // CHECK-NEXT: call void @_ZN5test11BD1Ev([[B]]* [[V]]) + // CHECK-NEXT: call void @_ZN5test11BD1Ev([[B]]* frozen [[V]]) // CHECK-NEXT: ret void // FIXME: again, the block ordering is pretty bad here @@ -124,10 +124,10 @@ // CHECK-NEXT: cleanup // CHECK: landingpad { i8*, i32 } // CHECK-NEXT: cleanup - // CHECKv03: invoke void @_ZN5test11AD1Ev([[A]]* [[Y]]) - // CHECKv03: invoke void @_ZN5test11AD1Ev([[A]]* [[X]]) - // CHECKv11: call void @_ZN5test11AD1Ev([[A]]* [[Y]]) - // CHECKv11: call void @_ZN5test11AD1Ev([[A]]* [[X]]) + // CHECKv03: invoke void @_ZN5test11AD1Ev([[A]]* frozen [[Y]]) + // CHECKv03: invoke void @_ZN5test11AD1Ev([[A]]* frozen [[X]]) + // CHECKv11: call void @_ZN5test11AD1Ev([[A]]* frozen [[Y]]) + // CHECKv11: call void @_ZN5test11AD1Ev([[A]]* frozen [[X]]) } namespace test2 { @@ -147,7 +147,7 @@ // CHECK-NEXT: [[END:%.*]] = getelementptr inbounds [[A]], [[A]]* [[BEGIN]], i64 28 // CHECK-NEXT: br label // CHECK: [[CUR:%.*]] = phi [[A]]* [ [[BEGIN]], {{%.*}} ], [ [[NEXT:%.*]], {{%.*}} ] - // CHECK-NEXT: invoke void @_ZN5test21AC1Ev([[A]]* [[CUR]]) + // CHECK-NEXT: invoke void @_ZN5test21AC1Ev([[A]]* frozen [[CUR]]) // CHECK: [[NEXT:%.*]] = getelementptr inbounds [[A]], [[A]]* [[CUR]], i64 1 // CHECK-NEXT: [[DONE:%.*]] = icmp eq [[A]]* [[NEXT]], [[END]] // CHECK-NEXT: br i1 [[DONE]], @@ -159,8 +159,8 @@ // CHECK-NEXT: br i1 [[EMPTY]], // CHECK: [[PAST:%.*]] = phi [[A]]* [ [[CUR]], {{%.*}} ], [ [[DEL:%.*]], {{%.*}} ] // CHECK-NEXT: [[DEL]] = getelementptr inbounds [[A]], [[A]]* [[PAST]], i64 -1 - // CHECKv03-NEXT: invoke void @_ZN5test21AD1Ev([[A]]* [[DEL]]) - // CHECKv11-NEXT: call void @_ZN5test21AD1Ev([[A]]* [[DEL]]) + // CHECKv03-NEXT: invoke void @_ZN5test21AD1Ev([[A]]* frozen [[DEL]]) + // CHECKv11-NEXT: call void @_ZN5test21AD1Ev([[A]]* frozen [[DEL]]) // CHECK: [[T0:%.*]] = icmp eq [[A]]* [[DEL]], [[BEGIN]] // CHECK-NEXT: br i1 [[T0]], } @@ -193,21 +193,21 @@ // CHECK-NEXT: store [3 x [[A]]]* [[A0]], // CHECK-NEXT: [[A00:%.*]] = getelementptr inbounds [3 x [[A]]], [3 x [[A]]]* [[A0]], i64 0, i64 0 // CHECK-NEXT: store [[A]]* [[A00]], -// CHECK-NEXT: invoke void @_ZN5test41AC1Ej([[A]]* [[A00]], i32 0) +// CHECK-NEXT: invoke void @_ZN5test41AC1Ej([[A]]* frozen [[A00]], i32 frozen 0) // CHECK: [[A01:%.*]] = getelementptr inbounds [[A]], [[A]]* [[A00]], i64 1 // CHECK-NEXT: store [[A]]* [[A01]], -// CHECK-NEXT: invoke void @_ZN5test41AC1Ej([[A]]* [[A01]], i32 1) +// CHECK-NEXT: invoke void @_ZN5test41AC1Ej([[A]]* frozen [[A01]], i32 frozen 1) // CHECK: [[A02:%.*]] = getelementptr inbounds [[A]], [[A]]* [[A01]], i64 1 // CHECK-NEXT: store [[A]]* [[A02]], -// CHECK-NEXT: invoke void @_ZN5test41AC1Ej([[A]]* [[A02]], i32 2) +// CHECK-NEXT: invoke void @_ZN5test41AC1Ej([[A]]* frozen [[A02]], i32 frozen 2) // CHECK: [[A1:%.*]] = getelementptr inbounds [3 x [[A]]], [3 x [[A]]]* [[A0]], i64 1 // CHECK-NEXT: store [3 x [[A]]]* [[A1]], // CHECK-NEXT: [[A10:%.*]] = getelementptr inbounds [3 x [[A]]], [3 x [[A]]]* [[A1]], i64 0, i64 0 // CHECK-NEXT: store [[A]]* [[A10]], -// CHECK-NEXT: invoke void @_ZN5test41AC1Ej([[A]]* [[A10]], i32 3) +// CHECK-NEXT: invoke void @_ZN5test41AC1Ej([[A]]* frozen [[A10]], i32 frozen 3) // CHECK: [[A11:%.*]] = getelementptr inbounds [[A]], [[A]]* [[A10]], i64 1 // CHECK-NEXT: store [[A]]* [[A11]], -// CHECK-NEXT: invoke void @_ZN5test41AC1Ej([[A]]* [[A11]], i32 4) +// CHECK-NEXT: invoke void @_ZN5test41AC1Ej([[A]]* frozen [[A11]], i32 frozen 4) // CHECK: [[A12:%.*]] = getelementptr inbounds [[A]], [[A]]* [[A11]], i64 1 // CHECK-NEXT: store [[A]]* [[A12]], -// CHECK-NEXT: invoke void @_ZN5test41AC1Ej([[A]]* [[A12]], i32 5) +// CHECK-NEXT: invoke void @_ZN5test41AC1Ej([[A]]* frozen [[A12]], i32 frozen 5) diff --git a/clang/test/CodeGenCXX/pass-object-size.cpp b/clang/test/CodeGenCXX/pass-object-size.cpp --- a/clang/test/CodeGenCXX/pass-object-size.cpp +++ b/clang/test/CodeGenCXX/pass-object-size.cpp @@ -20,9 +20,9 @@ gi = L2(ptr); } -// CHECK-DAG: define internal i64 @"_ZZN7lambdas7LambdasEPcENK3$_0clEPvU17pass_object_size0" +// CHECK-DAG: define internal frozen i64 @"_ZZN7lambdas7LambdasEPcENK3$_0clEPvU17pass_object_size0" // CHECK-NOT: call i64 @llvm.objectsize -// CHECK-DAG: define internal i64 @"_ZZN7lambdas7LambdasEPcENK3$_1clEPvU17pass_object_size0" +// CHECK-DAG: define internal frozen i64 @"_ZZN7lambdas7LambdasEPcENK3$_1clEPvU17pass_object_size0" // CHECK-NOT: call i64 @llvm.objectsize } @@ -72,11 +72,11 @@ // CHECK-LABEL: define void @_ZN8variadic4testEv() void test() { - // CHECK-RE: call{{[^@]+}}@_ZN8variadic6AsCtorC1EPKcU17pass_object_size0dz + // CHECK-RE: call frozen{{[^@]+}}@_ZN8variadic6AsCtorC1EPKcU17pass_object_size0dz AsCtor("a", 1.0); - // CHECK-RE: call{{[^@]+}}@_ZN8variadic8AsMember3barEPKcU17pass_object_size0dz + // CHECK-RE: call frozen{{[^@]+}}@_ZN8variadic8AsMember3barEPKcU17pass_object_size0dz AsMember{}.bar("a", 1.0); - // CHECK-RE: call{{[^@]+}}@_ZN8variadic8AsMemberclEPKcU17pass_object_size0dz + // CHECK-RE: call frozen{{[^@]+}}@_ZN8variadic8AsMemberclEPKcU17pass_object_size0dz AsMember{}("a", 1.0); } } diff --git a/clang/test/CodeGenCXX/pod-member-memcpys.cpp b/clang/test/CodeGenCXX/pod-member-memcpys.cpp --- a/clang/test/CodeGenCXX/pod-member-memcpys.cpp +++ b/clang/test/CodeGenCXX/pod-member-memcpys.cpp @@ -123,65 +123,65 @@ CALL_AO(PackedMembers) // Basic copy-assignment: -// CHECK-LABEL: define linkonce_odr nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.Basic* @_ZN5BasicaSERKS_(%struct.Basic* %this, %struct.Basic* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) +// CHECK-LABEL: define linkonce_odr frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.Basic* @_ZN5BasicaSERKS_(%struct.Basic* frozen %this, %struct.Basic* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64({{.*}} align 4 {{.*}} align 4 {{.*}}i64 16, i1 {{.*}}) -// CHECK: call nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.NonPOD* @_ZN6NonPODaSERKS_ +// CHECK: call frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.NonPOD* @_ZN6NonPODaSERKS_ // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64({{.*}} align 4 {{.*}} align 4 {{.*}}i64 16, i1 {{.*}}) // CHECK: ret %struct.Basic* // PODMember copy-assignment: -// CHECK-LABEL: define linkonce_odr nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.PODMember* @_ZN9PODMemberaSERKS_(%struct.PODMember* %this, %struct.PODMember* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) +// CHECK-LABEL: define linkonce_odr frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.PODMember* @_ZN9PODMemberaSERKS_(%struct.PODMember* frozen %this, %struct.PODMember* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64({{.*}} align 4 {{.*}} align 4 {{.*}}i64 32, i1 {{.*}}) -// CHECK: call nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.NonPOD* @_ZN6NonPODaSERKS_ +// CHECK: call frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.NonPOD* @_ZN6NonPODaSERKS_ // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64({{.*}} align 4 {{.*}} align 4 {{.*}}i64 16, i1 {{.*}}) // CHECK: ret %struct.PODMember* // PODLikeMember copy-assignment: -// CHECK-LABEL: define linkonce_odr nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.PODLikeMember* @_ZN13PODLikeMemberaSERKS_(%struct.PODLikeMember* %this, %struct.PODLikeMember* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) +// CHECK-LABEL: define linkonce_odr frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.PODLikeMember* @_ZN13PODLikeMemberaSERKS_(%struct.PODLikeMember* frozen %this, %struct.PODLikeMember* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64({{.*}} align 4 {{.*}} align 4 {{.*}}i64 32, i1 {{.*}}) -// CHECK: call nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.NonPOD* @_ZN6NonPODaSERKS_ +// CHECK: call frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.NonPOD* @_ZN6NonPODaSERKS_ // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64({{.*}} align 4 {{.*}} align 4 {{.*}}i64 16, i1 {{.*}}) // CHECK: ret %struct.PODLikeMember* // ArrayMember copy-assignment: -// CHECK-LABEL: define linkonce_odr nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ArrayMember* @_ZN11ArrayMemberaSERKS_(%struct.ArrayMember* %this, %struct.ArrayMember* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) +// CHECK-LABEL: define linkonce_odr frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ArrayMember* @_ZN11ArrayMemberaSERKS_(%struct.ArrayMember* frozen %this, %struct.ArrayMember* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64({{.*}} align 4 {{.*}} align 4 {{.*}}i64 64, i1 {{.*}}) -// CHECK: call nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.NonPOD* @_ZN6NonPODaSERKS_ +// CHECK: call frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.NonPOD* @_ZN6NonPODaSERKS_ // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64({{.*}} align 4 {{.*}} align 4 {{.*}}i64 64, i1 {{.*}}) // CHECK: ret %struct.ArrayMember* // ZeroLengthArrayMember copy-assignment: -// CHECK-LABEL: define linkonce_odr nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ZeroLengthArrayMember* @_ZN21ZeroLengthArrayMemberaSERKS_(%struct.ZeroLengthArrayMember* %this, %struct.ZeroLengthArrayMember* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) -// CHECK: call nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.NonPOD* @_ZN6NonPODaSERKS_ +// CHECK-LABEL: define linkonce_odr frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.ZeroLengthArrayMember* @_ZN21ZeroLengthArrayMemberaSERKS_(%struct.ZeroLengthArrayMember* frozen %this, %struct.ZeroLengthArrayMember* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) +// CHECK: call frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.NonPOD* @_ZN6NonPODaSERKS_ // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64({{.*}} align 4 {{.*}} align 4 {{.*}}i64 8, i1 {{.*}}) // CHECK: ret %struct.ZeroLengthArrayMember* // VolatileMember copy-assignment: -// CHECK-LABEL: define linkonce_odr nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.VolatileMember* @_ZN14VolatileMemberaSERKS_(%struct.VolatileMember* %this, %struct.VolatileMember* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) +// CHECK-LABEL: define linkonce_odr frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.VolatileMember* @_ZN14VolatileMemberaSERKS_(%struct.VolatileMember* frozen %this, %struct.VolatileMember* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64({{.*}} align 4 {{.*}} align 4 {{.*}}i64 16, i1 {{.*}}) // CHECK: load volatile i32, i32* {{.*}}, align 4 // CHECK: store volatile i32 {{.*}}, align 4 -// CHECK: call nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.NonPOD* @_ZN6NonPODaSERKS_ +// CHECK: call frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.NonPOD* @_ZN6NonPODaSERKS_ // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64({{.*}} align 4 {{.*}} align 4 {{.*}}i64 16, i1 {{.*}}) // CHECK: ret %struct.VolatileMember* // BitfieldMember copy-assignment: -// CHECK-LABEL: define linkonce_odr nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.BitfieldMember* @_ZN14BitfieldMemberaSERKS_(%struct.BitfieldMember* %this, %struct.BitfieldMember* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) +// CHECK-LABEL: define linkonce_odr frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.BitfieldMember* @_ZN14BitfieldMemberaSERKS_(%struct.BitfieldMember* frozen %this, %struct.BitfieldMember* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64({{.*}} align 4 {{.*}} align 4 {{.*}}i64 16, i1 {{.*}}) -// CHECK: call nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.NonPOD* @_ZN6NonPODaSERKS_ +// CHECK: call frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.NonPOD* @_ZN6NonPODaSERKS_ // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64({{.*}} align 1 {{.*}} align 1 {{.*}}i64 3, i1 {{.*}}) // CHECK: ret %struct.BitfieldMember* // InnerClass copy-assignment: -// CHECK-LABEL: define linkonce_odr nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.InnerClassMember* @_ZN16InnerClassMemberaSERKS_(%struct.InnerClassMember* %this, %struct.InnerClassMember* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) +// CHECK-LABEL: define linkonce_odr frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.InnerClassMember* @_ZN16InnerClassMemberaSERKS_(%struct.InnerClassMember* frozen %this, %struct.InnerClassMember* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64({{.*}} align 4 {{.*}} align 4 {{.*}}i64 32, i1 {{.*}}) -// CHECK: call nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.NonPOD* @_ZN6NonPODaSERKS_ +// CHECK: call frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.NonPOD* @_ZN6NonPODaSERKS_ // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64({{.*}} align 4 {{.*}} align 4 {{.*}}i64 16, i1 {{.*}}) // CHECK: ret %struct.InnerClassMember* // PackedMembers copy-assignment: -// CHECK-LABEL: define linkonce_odr nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.PackedMembers* @_ZN13PackedMembersaSERKS_(%struct.PackedMembers* %this, %struct.PackedMembers* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) -// CHECK: call nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.NonPOD* @_ZN6NonPODaSERKS_ +// CHECK-LABEL: define linkonce_odr frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.PackedMembers* @_ZN13PackedMembersaSERKS_(%struct.PackedMembers* frozen %this, %struct.PackedMembers* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) +// CHECK: call frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.NonPOD* @_ZN6NonPODaSERKS_ // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64({{.*}} align 1 {{.*}} align 1 {{.*}}i64 16, i1 {{.*}}) // CHECK: ret %struct.PackedMembers* @@ -195,27 +195,27 @@ CALL_CC(PackedMembers) // PackedMembers copy-assignment: -// CHECK-LABEL: define linkonce_odr void @_ZN13PackedMembersC2ERKS_(%struct.PackedMembers* %this, %struct.PackedMembers* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) +// CHECK-LABEL: define linkonce_odr void @_ZN13PackedMembersC2ERKS_(%struct.PackedMembers* frozen %this, %struct.PackedMembers* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) // CHECK: call void @_ZN6NonPODC1ERKS_ // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64({{.*}} align 1 {{.*}} align 1 {{.*}}i64 16, i1 {{.*}}) // CHECK: ret void CALL_CC(BitfieldMember2) // BitfieldMember2 copy-constructor: -// CHECK-2-LABEL: define linkonce_odr void @_ZN15BitfieldMember2C2ERKS_(%struct.BitfieldMember2* %this, %struct.BitfieldMember2* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) +// CHECK-2-LABEL: define linkonce_odr void @_ZN15BitfieldMember2C2ERKS_(%struct.BitfieldMember2* frozen %this, %struct.BitfieldMember2* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) // CHECK-2: call void @llvm.memcpy.p0i8.p0i8.i64({{.*}} align 4 {{.*}} align 4 {{.*}}i64 16, i1 false) // CHECK-2: call void @_ZN6NonPODC1ERKS_ // CHECK-2: ret void CALL_CC(BitfieldMember3) // BitfieldMember3 copy-constructor: -// CHECK-LABEL: define linkonce_odr void @_ZN15BitfieldMember3C2ERKS_(%struct.BitfieldMember3* %this, %struct.BitfieldMember3* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) +// CHECK-LABEL: define linkonce_odr void @_ZN15BitfieldMember3C2ERKS_(%struct.BitfieldMember3* frozen %this, %struct.BitfieldMember3* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64({{.*}} align 8 {{.*}} align 8 {{.*}}i64 8, i1 false) // CHECK: ret void CALL_CC(ReferenceMember) // ReferenceMember copy-constructor: -// CHECK-LABEL: define linkonce_odr void @_ZN15ReferenceMemberC2ERKS_(%struct.ReferenceMember* %this, %struct.ReferenceMember* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) +// CHECK-LABEL: define linkonce_odr void @_ZN15ReferenceMemberC2ERKS_(%struct.ReferenceMember* frozen %this, %struct.ReferenceMember* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64({{.*}} align 8 {{.*}} align 8 {{.*}}i64 16, i1 {{.*}}) // CHECK: call void @_ZN6NonPODC1ERKS_ // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64({{.*}} align 8 {{.*}} align 8 {{.*}}i64 16, i1 {{.*}}) @@ -223,7 +223,7 @@ CALL_CC(InnerClassMember) // InnerClass copy-constructor: -// CHECK-LABEL: define linkonce_odr void @_ZN16InnerClassMemberC2ERKS_(%struct.InnerClassMember* %this, %struct.InnerClassMember* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) +// CHECK-LABEL: define linkonce_odr void @_ZN16InnerClassMemberC2ERKS_(%struct.InnerClassMember* frozen %this, %struct.InnerClassMember* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64({{.*}} align 4 {{.*}} align 4 {{.*}}i64 32, i1 {{.*}}) // CHECK: call void @_ZN6NonPODC1ERKS_ // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64({{.*}} align 4 {{.*}} align 4 {{.*}}i64 16, i1 {{.*}}) @@ -231,7 +231,7 @@ CALL_CC(BitfieldMember) // BitfieldMember copy-constructor: -// CHECK-LABEL: define linkonce_odr void @_ZN14BitfieldMemberC2ERKS_(%struct.BitfieldMember* %this, %struct.BitfieldMember* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) +// CHECK-LABEL: define linkonce_odr void @_ZN14BitfieldMemberC2ERKS_(%struct.BitfieldMember* frozen %this, %struct.BitfieldMember* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64({{.*}} align 4 {{.*}} align 4 {{.*}}i64 16, i1 {{.*}}) // CHECK: call void @_ZN6NonPODC1ERKS_ // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64({{.*}} align 1 {{.*}} align 1 {{.*}}i64 3, i1 {{.*}}) @@ -239,7 +239,7 @@ CALL_CC(VolatileMember) // VolatileMember copy-constructor: -// CHECK-LABEL: define linkonce_odr void @_ZN14VolatileMemberC2ERKS_(%struct.VolatileMember* %this, %struct.VolatileMember* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) +// CHECK-LABEL: define linkonce_odr void @_ZN14VolatileMemberC2ERKS_(%struct.VolatileMember* frozen %this, %struct.VolatileMember* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64({{.*}} align 4 {{.*}} align 4 {{.*}}i64 16, i1 {{.*}}) // CHECK: load volatile i32, i32* {{.*}}, align 4 // CHECK: store volatile i32 {{.*}}, align 4 @@ -249,7 +249,7 @@ CALL_CC(ArrayMember) // ArrayMember copy-constructor: -// CHECK-LABEL: define linkonce_odr void @_ZN11ArrayMemberC2ERKS_(%struct.ArrayMember* %this, %struct.ArrayMember* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) +// CHECK-LABEL: define linkonce_odr void @_ZN11ArrayMemberC2ERKS_(%struct.ArrayMember* frozen %this, %struct.ArrayMember* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64({{.*}} align 4 {{.*}} align 4 {{.*}}i64 64, i1 {{.*}}) // CHECK: call void @_ZN6NonPODC1ERKS_ // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64({{.*}} align 4 {{.*}} align 4 {{.*}}i64 64, i1 {{.*}}) @@ -257,7 +257,7 @@ CALL_CC(PODLikeMember) // PODLikeMember copy-constructor: -// CHECK-LABEL: define linkonce_odr void @_ZN13PODLikeMemberC2ERKS_(%struct.PODLikeMember* %this, %struct.PODLikeMember* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) +// CHECK-LABEL: define linkonce_odr void @_ZN13PODLikeMemberC2ERKS_(%struct.PODLikeMember* frozen %this, %struct.PODLikeMember* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64({{.*}} align 4 {{.*}} align 4 {{.*}}i64 32, i1 {{.*}}) // CHECK: invoke void @_ZN6NonPODC1ERKS_ // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64({{.*}} align 4 {{.*}} align 4 {{.*}}i64 16, i1 {{.*}}) @@ -267,7 +267,7 @@ CALL_CC(PODMember) // PODMember copy-constructor: -// CHECK-LABEL: define linkonce_odr void @_ZN9PODMemberC2ERKS_(%struct.PODMember* %this, %struct.PODMember* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) +// CHECK-LABEL: define linkonce_odr void @_ZN9PODMemberC2ERKS_(%struct.PODMember* frozen %this, %struct.PODMember* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64({{.*}} align 4 {{.*}} align 4 {{.*}}i64 32, i1 {{.*}}) // CHECK: call void @_ZN6NonPODC1ERKS_ // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64({{.*}} align 4 {{.*}} align 4 {{.*}}i64 16, i1 {{.*}}) @@ -275,7 +275,7 @@ CALL_CC(Basic) // Basic copy-constructor: -// CHECK-LABEL: define linkonce_odr void @_ZN5BasicC2ERKS_(%struct.Basic* %this, %struct.Basic* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) +// CHECK-LABEL: define linkonce_odr void @_ZN5BasicC2ERKS_(%struct.Basic* frozen %this, %struct.Basic* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64({{.*}} align 4 {{.*}} align 4 {{.*}}i64 16, i1 {{.*}}) // CHECK: call void @_ZN6NonPODC1ERKS_ // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64({{.*}} align 4 {{.*}} align 4 {{.*}}i64 16, i1 {{.*}}) diff --git a/clang/test/CodeGenCXX/pointers-to-data-members.cpp b/clang/test/CodeGenCXX/pointers-to-data-members.cpp --- a/clang/test/CodeGenCXX/pointers-to-data-members.cpp +++ b/clang/test/CodeGenCXX/pointers-to-data-members.cpp @@ -122,7 +122,7 @@ A(); }; -// CHECK-LABEL: define void @_ZN9ValueInit1AC2Ev(%"struct.ValueInit::A"* %this) unnamed_addr +// CHECK-LABEL: define void @_ZN9ValueInit1AC2Ev(%"struct.ValueInit::A"* frozen %this) unnamed_addr // CHECK: store i64 -1, i64* // CHECK: ret void A::A() : a() {} @@ -166,7 +166,7 @@ bool member; }; - // CHECK-LABEL: define nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) i8* @_ZN15BoolPtrToMember1fERNS_1XEMS0_b + // CHECK-LABEL: define frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) i8* @_ZN15BoolPtrToMember1fERNS_1XEMS0_b bool &f(X &x, bool X::*member) { // CHECK: {{bitcast.* to i8\*}} // CHECK-NEXT: getelementptr inbounds i8, i8* diff --git a/clang/test/CodeGenCXX/powerpc-byval.cpp b/clang/test/CodeGenCXX/powerpc-byval.cpp --- a/clang/test/CodeGenCXX/powerpc-byval.cpp +++ b/clang/test/CodeGenCXX/powerpc-byval.cpp @@ -9,4 +9,4 @@ one = two; } -// CHECK: define void @_Z5byval1SS_(%struct.S* %one, %struct.S* %two) +// CHECK: define void @_Z5byval1SS_(%struct.S* frozen %one, %struct.S* frozen %two) diff --git a/clang/test/CodeGenCXX/pr12251.cpp b/clang/test/CodeGenCXX/pr12251.cpp --- a/clang/test/CodeGenCXX/pr12251.cpp +++ b/clang/test/CodeGenCXX/pr12251.cpp @@ -4,12 +4,12 @@ bool f(bool *x) { return *x; } -// CHECK-LABEL: define zeroext i1 @_Z1fPb +// CHECK-LABEL: define frozen zeroext i1 @_Z1fPb // CHECK: load i8, i8* %{{[^ ]*}}, align 1, !range [[RANGE_i8_0_2:![^ ]*]] // Only enum-tests follow. Ensure that after the bool test, no further range // metadata shows up when strict enums are disabled. -// NO-STRICT-ENUMS-LABEL: define zeroext i1 @_Z1fPb +// NO-STRICT-ENUMS-LABEL: define frozen zeroext i1 @_Z1fPb // NO-STRICT-ENUMS: load i8, i8* %{{[^ ]*}}, align 1, !range // NO-STRICT-ENUMS-NOT: !range @@ -17,84 +17,84 @@ e1 g1(e1 *x) { return *x; } -// CHECK-LABEL: define i32 @_Z2g1P2e1 +// CHECK-LABEL: define frozen i32 @_Z2g1P2e1 // CHECK: ret i32 0 enum e2 { e2_a = 0 }; e2 g2(e2 *x) { return *x; } -// CHECK-LABEL: define i32 @_Z2g2P2e2 +// CHECK-LABEL: define frozen i32 @_Z2g2P2e2 // CHECK: ret i32 0 enum e3 { e3_a = 16 }; e3 g3(e3 *x) { return *x; } -// CHECK-LABEL: define i32 @_Z2g3P2e3 +// CHECK-LABEL: define frozen i32 @_Z2g3P2e3 // CHECK: load i32, i32* %x, align 4, !range [[RANGE_i32_0_32:![^ ]*]] enum e4 { e4_a = -16}; e4 g4(e4 *x) { return *x; } -// CHECK-LABEL: define i32 @_Z2g4P2e4 +// CHECK-LABEL: define frozen i32 @_Z2g4P2e4 // CHECK: load i32, i32* %x, align 4, !range [[RANGE_i32_m16_16:![^ ]*]] enum e5 { e5_a = -16, e5_b = 16}; e5 g5(e5 *x) { return *x; } -// CHECK-LABEL: define i32 @_Z2g5P2e5 +// CHECK-LABEL: define frozen i32 @_Z2g5P2e5 // CHECK: load i32, i32* %x, align 4, !range [[RANGE_i32_m32_32:![^ ]*]] enum e6 { e6_a = -1 }; e6 g6(e6 *x) { return *x; } -// CHECK-LABEL: define i32 @_Z2g6P2e6 +// CHECK-LABEL: define frozen i32 @_Z2g6P2e6 // CHECK: load i32, i32* %x, align 4, !range [[RANGE_i32_m1_1:![^ ]*]] enum e7 { e7_a = -16, e7_b = 2}; e7 g7(e7 *x) { return *x; } -// CHECK-LABEL: define i32 @_Z2g7P2e7 +// CHECK-LABEL: define frozen i32 @_Z2g7P2e7 // CHECK: load i32, i32* %x, align 4, !range [[RANGE_i32_m16_16]] enum e8 { e8_a = -17}; e8 g8(e8 *x) { return *x; } -// CHECK-LABEL: define i32 @_Z2g8P2e8 +// CHECK-LABEL: define frozen i32 @_Z2g8P2e8 // CHECK: load i32, i32* %x, align 4, !range [[RANGE_i32_m32_32:![^ ]*]] enum e9 { e9_a = 17}; e9 g9(e9 *x) { return *x; } -// CHECK-LABEL: define i32 @_Z2g9P2e9 +// CHECK-LABEL: define frozen i32 @_Z2g9P2e9 // CHECK: load i32, i32* %x, align 4, !range [[RANGE_i32_0_32]] enum e10 { e10_a = -16, e10_b = 32}; e10 g10(e10 *x) { return *x; } -// CHECK-LABEL: define i32 @_Z3g10P3e10 +// CHECK-LABEL: define frozen i32 @_Z3g10P3e10 // CHECK: load i32, i32* %x, align 4, !range [[RANGE_i32_m64_64:![^ ]*]] enum e11 {e11_a = 4294967296 }; enum e11 g11(enum e11 *x) { return *x; } -// CHECK-LABEL: define i64 @_Z3g11P3e11 +// CHECK-LABEL: define frozen i64 @_Z3g11P3e11 // CHECK: load i64, i64* %x, align {{[84]}}, !range [[RANGE_i64_0_2pow33:![^ ]*]] enum e12 {e12_a = 9223372036854775808U }; enum e12 g12(enum e12 *x) { return *x; } -// CHECK-LABEL: define i64 @_Z3g12P3e12 +// CHECK-LABEL: define frozen i64 @_Z3g12P3e12 // CHECK: load i64, i64* %x, align {{[84]}} // CHECK-NOT: range // CHECK: ret @@ -103,7 +103,7 @@ e13 g13(e13 *x) { return *x; } -// CHECK-LABEL: define signext i8 @_Z3g13P3e13 +// CHECK-LABEL: define frozen signext i8 @_Z3g13P3e13 // CHECK: load i8, i8* %x, align 1 // CHECK-NOT: range // CHECK: ret @@ -112,7 +112,7 @@ e14 g14(e14 *x) { return *x; } -// CHECK-LABEL: define i32 @_Z3g14P3e14 +// CHECK-LABEL: define frozen i32 @_Z3g14P3e14 // CHECK: load i32, i32* %x, align 4 // CHECK-NOT: range // CHECK: ret @@ -121,7 +121,7 @@ e15 g15(e15 *x) { return *x; } -// CHECK-LABEL: define i32 @_Z3g15P3e15 +// CHECK-LABEL: define frozen i32 @_Z3g15P3e15 // CHECK: load i32, i32* %x, align 4 // CHECK-NOT: range // CHECK: ret @@ -130,7 +130,7 @@ e16 g16(e16 *x) { return *x; } -// CHECK-LABEL: define i32 @_Z3g16P3e16 +// CHECK-LABEL: define frozen i32 @_Z3g16P3e16 // CHECK: load i32, i32* %x, align 4 // CHECK-NOT: range // CHECK: ret diff --git a/clang/test/CodeGenCXX/pr13396.cpp b/clang/test/CodeGenCXX/pr13396.cpp --- a/clang/test/CodeGenCXX/pr13396.cpp +++ b/clang/test/CodeGenCXX/pr13396.cpp @@ -7,13 +7,13 @@ }; foo::foo() { - // CHECK-LABEL: define void @_ZN3fooC2Ev(%struct.foo* inreg %this) - // CHECK-LABEL: define void @_ZN3fooC1Ev(%struct.foo* inreg %this) + // CHECK-LABEL: define void @_ZN3fooC2Ev(%struct.foo* frozen inreg %this) + // CHECK-LABEL: define void @_ZN3fooC1Ev(%struct.foo* frozen inreg %this) } foo::~foo() { - // CHECK-LABEL: define void @_ZN3fooD2Ev(%struct.foo* inreg %this) - // CHECK-LABEL: define void @_ZN3fooD1Ev(%struct.foo* inreg %this) + // CHECK-LABEL: define void @_ZN3fooD2Ev(%struct.foo* frozen inreg %this) + // CHECK-LABEL: define void @_ZN3fooD1Ev(%struct.foo* frozen inreg %this) } void dummy() { @@ -21,6 +21,6 @@ // older clangs accept: // template foo::foo(int x); foo x(10); - // CHECK-LABEL: define linkonce_odr void @_ZN3fooC1IiEET_(%struct.foo* inreg %this, i32 inreg %x) - // CHECK-LABEL: define linkonce_odr void @_ZN3fooC2IiEET_(%struct.foo* inreg %this, i32 inreg %x) + // CHECK-LABEL: define linkonce_odr void @_ZN3fooC1IiEET_(%struct.foo* frozen inreg %this, i32 frozen inreg %x) + // CHECK-LABEL: define linkonce_odr void @_ZN3fooC2IiEET_(%struct.foo* frozen inreg %this, i32 frozen inreg %x) } diff --git a/clang/test/CodeGenCXX/pr20897.cpp b/clang/test/CodeGenCXX/pr20897.cpp --- a/clang/test/CodeGenCXX/pr20897.cpp +++ b/clang/test/CodeGenCXX/pr20897.cpp @@ -3,7 +3,7 @@ // __declspec(dllexport) causes us to export the implicit constructor. struct __declspec(dllexport) Derived : virtual Base { -// CHECK-LABEL: define weak_odr dso_local dllexport x86_thiscallcc %struct.Derived* @"??0Derived@@QAE@ABU0@@Z" +// CHECK-LABEL: define weak_odr dso_local dllexport x86_thiscallcc frozen %struct.Derived* @"??0Derived@@QAE@ABU0@@Z" // CHECK: %[[this:.*]] = load %struct.Derived*, %struct.Derived** {{.*}} // CHECK-NEXT: store %struct.Derived* %[[this]], %struct.Derived** %[[retval:.*]] // CHECK: %[[dest_a_gep:.*]] = getelementptr inbounds %struct.Derived, %struct.Derived* %[[this]], i32 0, i32 1 @@ -18,7 +18,7 @@ // __declspec(dllexport) causes us to export the implicit copy constructor. struct __declspec(dllexport) Derived2 : virtual Base { -// CHECK-LABEL: define weak_odr dso_local dllexport x86_thiscallcc %struct.Derived2* @"??0Derived2@@QAE@ABU0@@Z" +// CHECK-LABEL: define weak_odr dso_local dllexport x86_thiscallcc frozen %struct.Derived2* @"??0Derived2@@QAE@ABU0@@Z" // CHECK: %[[this:.*]] = load %struct.Derived2*, %struct.Derived2** {{.*}} // CHECK-NEXT: store %struct.Derived2* %[[this]], %struct.Derived2** %[[retval:.*]] // CHECK: %[[dest_a_gep:.*]] = getelementptr inbounds %struct.Derived2, %struct.Derived2* %[[this]], i32 0, i32 1 diff --git a/clang/test/CodeGenCXX/pr24097.cpp b/clang/test/CodeGenCXX/pr24097.cpp --- a/clang/test/CodeGenCXX/pr24097.cpp +++ b/clang/test/CodeGenCXX/pr24097.cpp @@ -17,4 +17,4 @@ } // Test that it is not hidden -// CHECK: define available_externally zeroext i1 @_ZThn8_N17SyncMessageFilter4SendEv +// CHECK: define available_externally frozen zeroext i1 @_ZThn8_N17SyncMessageFilter4SendEv diff --git a/clang/test/CodeGenCXX/pr28360.cpp b/clang/test/CodeGenCXX/pr28360.cpp --- a/clang/test/CodeGenCXX/pr28360.cpp +++ b/clang/test/CodeGenCXX/pr28360.cpp @@ -13,4 +13,4 @@ // CHECK-LABEL: define dso_local void @"?Baz@@YAXXZ"( // CHECK: %[[ref_tmp:.*]] = alloca i8*, align 4 // CHECK: store i8* bitcast (void (%struct.A*)* @"?Foo@A@@QAEXXZ" to i8*), i8** %[[ref_tmp]], align 4 -// CHECK: call void @"?Bar@@YAXABQ8A@@AEXXZ@Z"(i8** nonnull align 4 dereferenceable(4) %[[ref_tmp]]) +// CHECK: call void @"?Bar@@YAXABQ8A@@AEXXZ@Z"(i8** frozen nonnull align 4 dereferenceable(4) %[[ref_tmp]]) diff --git a/clang/test/CodeGenCXX/pr40771-ctad-with-lambda-copy-capture.cpp b/clang/test/CodeGenCXX/pr40771-ctad-with-lambda-copy-capture.cpp --- a/clang/test/CodeGenCXX/pr40771-ctad-with-lambda-copy-capture.cpp +++ b/clang/test/CodeGenCXX/pr40771-ctad-with-lambda-copy-capture.cpp @@ -16,9 +16,9 @@ // CHECK-NEXT: [[XPT:%[a-z0-9.]+]] = alloca i8* // CHECK-NEXT: [[SLOT:%[a-z0-9.]+]] = alloca i32 // CHECK-NEXT: [[ACTIVE:%[a-z0-9.]+]] = alloca i1, align 1 -// CHECK-NEXT: call void @_ZN1RC1E1Q(%struct.R* [[TMP_R]]) +// CHECK-NEXT: call void @_ZN1RC1E1Q(%struct.R* frozen [[TMP_R]]) // CHECK-NEXT: store i1 true, i1* [[ACTIVE]], align 1 -// CHECK-NEXT: invoke void @_ZN1SC1E1Q(%struct.S* [[TMP_S]]) +// CHECK-NEXT: invoke void @_ZN1SC1E1Q(%struct.S* frozen [[TMP_S]]) // CHECK-NEXT: to label %[[L1:[a-z0-9.]+]] unwind label %[[L2:[a-z0-9.]+]] // CHECK-EMPTY: // CHECK-NEXT: [[L1]]: @@ -43,7 +43,7 @@ // CHECK-NEXT: br label %[[L4]] // CHECK-EMPTY: // CHECK-NEXT: [[L4]]: -// CHECK-NEXT: call void @_ZN1RD1Ev(%struct.R* [[TMP_R]]) +// CHECK-NEXT: call void @_ZN1RD1Ev(%struct.R* frozen [[TMP_R]]) // CHECK-NEXT: br label %[[L5:[a-z0-9.]+]] // CHECK-EMPTY: // CHECK-NEXT: [[L5]]: diff --git a/clang/test/CodeGenCXX/pr9130.cpp b/clang/test/CodeGenCXX/pr9130.cpp --- a/clang/test/CodeGenCXX/pr9130.cpp +++ b/clang/test/CodeGenCXX/pr9130.cpp @@ -11,4 +11,4 @@ nsVorbisState::~nsVorbisState() { } -// CHECK-LABEL: define linkonce_odr i32 @_ZN15nsOggCodecState9StartTimeEv +// CHECK-LABEL: define linkonce_odr frozen i32 @_ZN15nsOggCodecState9StartTimeEv diff --git a/clang/test/CodeGenCXX/pragma-followup_inner.cpp b/clang/test/CodeGenCXX/pragma-followup_inner.cpp --- a/clang/test/CodeGenCXX/pragma-followup_inner.cpp +++ b/clang/test/CodeGenCXX/pragma-followup_inner.cpp @@ -21,7 +21,7 @@ // CHECK-DAG: ![[ACCESSGROUP_2:[0-9]+]] = distinct !{} // CHECK-DAG: ![[INNERLOOP_3:[0-9]+]] = distinct !{![[INNERLOOP_3:[0-9]+]], ![[PARALLEL_ACCESSES_4:[0-9]+]], ![[DISTRIBUTE_5:[0-9]+]], ![[DISTRIBUTE_FOLLOWUP_6:[0-9]+]]} -// CHECK-DAG: ![[PARALLEL_ACCESSES_4:[0-9]+]] = !{!"llvm.loop.parallel_accesses", !2} +// CHECK-DAG: ![[PARALLEL_ACCESSES_4:[0-9]+]] = !{!"llvm.loop.parallel_accesses", ![[ACCESSGROUP_2]]} // CHECK-DAG: ![[DISTRIBUTE_5:[0-9]+]] = !{!"llvm.loop.distribute.enable", i1 true} // CHECK-DAG: ![[DISTRIBUTE_FOLLOWUP_6:[0-9]+]] = !{!"llvm.loop.distribute.followup_all", ![[LOOP_7:[0-9]+]]} @@ -30,7 +30,7 @@ // CHECK-DAG: ![[OUTERLOOP_9:[0-9]+]] = distinct !{![[OUTERLOOP_9:[0-9]+]], ![[UNROLLANDJAM_COUNT_10:[0-9]+]], ![[UNROLLANDJAM_FOLLOWUPINNER_11:[0-9]+]]} // CHECK-DAG: ![[UNROLLANDJAM_COUNT_10:[0-9]+]] = !{!"llvm.loop.unroll_and_jam.count", i32 4} -// CHECK-DAG: ![[UNROLLANDJAM_FOLLOWUPINNER_11:[0-9]+]] = !{!"llvm.loop.unroll_and_jam.followup_inner", !12} +// CHECK-DAG: ![[UNROLLANDJAM_FOLLOWUPINNER_11:[0-9]+]] = !{!"llvm.loop.unroll_and_jam.followup_inner", ![[LOOP_12:[0-9]+]]} // CHECK-DAG: ![[LOOP_12:[0-9]+]] = distinct !{![[LOOP_12:[0-9]+]], ![[PARALLEL_ACCESSES_4:[0-9]+]], ![[ISVECTORIZED_13:[0-9]+]], ![[UNROLL_COUNT_13:[0-9]+]], ![[UNROLL_FOLLOWUP_14:[0-9]+]]} // CHECK-DAG: ![[ISVECTORIZED_13:[0-9]+]] = !{!"llvm.loop.isvectorized"} diff --git a/clang/test/CodeGenCXX/pragma-loop-predicate.cpp b/clang/test/CodeGenCXX/pragma-loop-predicate.cpp --- a/clang/test/CodeGenCXX/pragma-loop-predicate.cpp +++ b/clang/test/CodeGenCXX/pragma-loop-predicate.cpp @@ -59,18 +59,18 @@ } -// CHECK: ![[LOOP0]] = distinct !{![[LOOP0]], !3} -// CHECK-NEXT: !3 = !{!"llvm.loop.vectorize.enable", i1 true} +// CHECK: ![[LOOP0]] = distinct !{![[LOOP0]], ![[LOOP0_MEMB:[0-9]+]]} +// CHECK-NEXT: ![[LOOP0_MEMB]] = !{!"llvm.loop.vectorize.enable", i1 true} -// CHECK-NEXT: ![[LOOP1]] = distinct !{![[LOOP1]], !5, !3} -// CHECK-NEXT: !5 = !{!"llvm.loop.vectorize.predicate.enable", i1 true} +// CHECK-NEXT: ![[LOOP1]] = distinct !{![[LOOP1]], ![[LOOP1_MEMB:[0-9]+]], ![[LOOP0_MEMB]]} +// CHECK-NEXT: ![[LOOP1_MEMB]] = !{!"llvm.loop.vectorize.predicate.enable", i1 true} -// CHECK-NEXT: ![[LOOP2]] = distinct !{![[LOOP2]], !7, !3} -// CHECK-NEXT: !7 = !{!"llvm.loop.vectorize.predicate.enable", i1 false} +// CHECK-NEXT: ![[LOOP2]] = distinct !{![[LOOP2]], ![[LOOP2_MEMB:[0-9]+]], ![[LOOP0_MEMB]]} +// CHECK-NEXT: ![[LOOP2_MEMB]] = !{!"llvm.loop.vectorize.predicate.enable", i1 false} -// CHECK-NEXT: ![[LOOP3]] = distinct !{![[LOOP3]], !5, !3} +// CHECK-NEXT: ![[LOOP3]] = distinct !{![[LOOP3]], ![[LOOP3_MEMB:[0-9]+]], ![[LOOP0_MEMB]]} -// CHECK-NEXT: ![[LOOP4]] = distinct !{![[LOOP4]], !10} -// CHECK-NEXT: !10 = !{!"llvm.loop.vectorize.width", i32 1} +// CHECK-NEXT: ![[LOOP4]] = distinct !{![[LOOP4]], ![[LOOP4_MEMB:[0-9]+]]} +// CHECK-NEXT: ![[LOOP4_MEMB]] = !{!"llvm.loop.vectorize.width", i32 1} -// CHECK-NEXT: ![[LOOP5]] = distinct !{![[LOOP5]], !10} +// CHECK-NEXT: ![[LOOP5]] = distinct !{![[LOOP5]], ![[LOOP4_MEMB]]} diff --git a/clang/test/CodeGenCXX/pragma-visibility.cpp b/clang/test/CodeGenCXX/pragma-visibility.cpp --- a/clang/test/CodeGenCXX/pragma-visibility.cpp +++ b/clang/test/CodeGenCXX/pragma-visibility.cpp @@ -28,8 +28,8 @@ template int f() { return x; } extern "C" int g() { return f<3>(); } #pragma GCC visibility pop -// CHECK-LABEL: define hidden i32 @g() -// CHECK-LABEL: define linkonce_odr hidden i32 @_Z1fILi3EEiv() +// CHECK-LABEL: define hidden frozen i32 @g() +// CHECK-LABEL: define linkonce_odr hidden frozen i32 @_Z1fILi3EEiv() #pragma GCC visibility push(hidden) template struct x5 { diff --git a/clang/test/CodeGenCXX/ptr-to-member-function.cpp b/clang/test/CodeGenCXX/ptr-to-member-function.cpp --- a/clang/test/CodeGenCXX/ptr-to-member-function.cpp +++ b/clang/test/CodeGenCXX/ptr-to-member-function.cpp @@ -63,8 +63,8 @@ B1 c = B1(2); } -// CHECK-LP64: call { i64, i64 } @_ZN1XcvM1BFvvEEv +// CHECK-LP64: call frozen { i64, i64 } @_ZN1XcvM1BFvvEEv // CHECK-LP64: call void @_Z1gM1CFvvE -// CHECK-LP32: call i64 @_ZN1XcvM1BFvvEEv +// CHECK-LP32: call frozen i64 @_ZN1XcvM1BFvvEEv // CHECK-LP32: call void @_Z1gM1CFvvE diff --git a/clang/test/CodeGenCXX/redefine_extname.cpp b/clang/test/CodeGenCXX/redefine_extname.cpp --- a/clang/test/CodeGenCXX/redefine_extname.cpp +++ b/clang/test/CodeGenCXX/redefine_extname.cpp @@ -13,7 +13,7 @@ statvfs64(&st); // Check that even if there is a structure with redefined name before the // pragma, subsequent function name redefined properly. PR5172, Comment 11. -// CHECK: call i32 @statvfs(%struct.statvfs64* %st) +// CHECK: call frozen i32 @statvfs(%struct.statvfs64* frozen %st) } // This is a case when redefenition is deferred *and* we have a local of the @@ -25,12 +25,12 @@ } extern "C" { int foo() { return 1; } -// CHECK: define i32 @bar() +// CHECK: define frozen i32 @bar() } // Check that #pragma redefine_extname applies to C code only, and shouldn't be // applied to C++. #pragma redefine_extname foo_cpp bar_cpp extern int foo_cpp() { return 1; } -// CHECK-NOT: define i32 @bar_cpp() +// CHECK-NOT: define frozen i32 @bar_cpp() diff --git a/clang/test/CodeGenCXX/reference-cast.cpp b/clang/test/CodeGenCXX/reference-cast.cpp --- a/clang/test/CodeGenCXX/reference-cast.cpp +++ b/clang/test/CodeGenCXX/reference-cast.cpp @@ -3,7 +3,7 @@ // PR6024 extern int i; -// CHECK: define nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) i32* @_Z16lvalue_noop_castv() [[NUW:#[0-9]+]] +// CHECK: define frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) i32* @_Z16lvalue_noop_castv() [[NUW:#[0-9]+]] const int &lvalue_noop_cast() { if (i == 0) // CHECK: store i32 17, i32* @@ -15,7 +15,7 @@ return 17; } -// CHECK-LABEL: define nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) i16* @_Z20lvalue_integral_castv() +// CHECK-LABEL: define frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) i16* @_Z20lvalue_integral_castv() const short &lvalue_integral_cast() { if (i == 0) // CHECK: store i16 17, i16* @@ -27,7 +27,7 @@ return 17; } -// CHECK-LABEL: define nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) i16* @_Z29lvalue_floating_integral_castv() +// CHECK-LABEL: define frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) i16* @_Z29lvalue_floating_integral_castv() const short &lvalue_floating_integral_cast() { if (i == 0) // CHECK: store i16 17, i16* @@ -39,7 +39,7 @@ return 17.5; } -// CHECK-LABEL: define nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) float* @_Z29lvalue_integral_floating_castv() +// CHECK-LABEL: define frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) float* @_Z29lvalue_integral_floating_castv() const float &lvalue_integral_floating_cast() { if (i == 0) // CHECK: store float 1.700000e+{{0*}}1, float* @@ -51,7 +51,7 @@ return 17; } -// CHECK-LABEL: define nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) float* @_Z20lvalue_floating_castv() +// CHECK-LABEL: define frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) float* @_Z20lvalue_floating_castv() const float &lvalue_floating_cast() { if (i == 0) // CHECK: store float 1.700000e+{{0*}}1, float* @@ -65,36 +65,36 @@ int get_int(); -// CHECK-LABEL: define nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) i8* @_Z24lvalue_integer_bool_castv() +// CHECK-LABEL: define frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) i8* @_Z24lvalue_integer_bool_castv() const bool &lvalue_integer_bool_cast() { if (i == 0) - // CHECK: call i32 @_Z7get_intv() + // CHECK: call frozen i32 @_Z7get_intv() // CHECK: store i8 return (const bool&)get_int(); else if (i == 1) - // CHECK: call i32 @_Z7get_intv() + // CHECK: call frozen i32 @_Z7get_intv() // CHECK: store i8 return static_cast(get_int()); - // CHECK: call i32 @_Z7get_intv() + // CHECK: call frozen i32 @_Z7get_intv() // CHECK: store i8 return get_int(); } float get_float(); -// CHECK-LABEL: define nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) i8* @_Z25lvalue_floating_bool_castv() +// CHECK-LABEL: define frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) i8* @_Z25lvalue_floating_bool_castv() const bool &lvalue_floating_bool_cast() { if (i == 0) - // CHECK: call float @_Z9get_floatv() + // CHECK: call frozen float @_Z9get_floatv() // CHECK: fcmp une float // CHECK: store i8 return (const bool&)get_float(); else if (i == 1) - // CHECK: call float @_Z9get_floatv() + // CHECK: call frozen float @_Z9get_floatv() // CHECK: fcmp une float // CHECK: store i8 return static_cast(get_float()); - // CHECK: call float @_Z9get_floatv() + // CHECK: call frozen float @_Z9get_floatv() // CHECK: fcmp une float // CHECK: store i8 return get_float(); @@ -107,25 +107,25 @@ pm get_pointer_to_member_data(); pmf get_pointer_to_member_function(); -// CHECK-LABEL: define nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) i8* @_Z26lvalue_ptrmem_to_bool_castv() +// CHECK-LABEL: define frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) i8* @_Z26lvalue_ptrmem_to_bool_castv() const bool &lvalue_ptrmem_to_bool_cast() { if (i == 0) - // CHECK: call i64 @_Z26get_pointer_to_member_datav() + // CHECK: call frozen i64 @_Z26get_pointer_to_member_datav() // CHECK: store i8 // CHECK: store i8* return (const bool&)get_pointer_to_member_data(); else if (i == 1) - // CHECK: call i64 @_Z26get_pointer_to_member_datav() + // CHECK: call frozen i64 @_Z26get_pointer_to_member_datav() // CHECK: store i8 // CHECK: store i8* return static_cast(get_pointer_to_member_data()); - // CHECK: call i64 @_Z26get_pointer_to_member_datav() + // CHECK: call frozen i64 @_Z26get_pointer_to_member_datav() // CHECK: store i8 // CHECK: store i8* return get_pointer_to_member_data(); } -// CHECK-LABEL: define nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) i8* @_Z27lvalue_ptrmem_to_bool_cast2v +// CHECK-LABEL: define frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) i8* @_Z27lvalue_ptrmem_to_bool_cast2v const bool &lvalue_ptrmem_to_bool_cast2() { if (i == 0) // CHECK: {{call.*_Z30get_pointer_to_member_functionv}} @@ -169,7 +169,7 @@ return get_complex_double(); } -// CHECK-LABEL: define i32 @_Z7pr10592RKi(i32* +// CHECK-LABEL: define frozen i32 @_Z7pr10592RKi(i32* unsigned pr10592(const int &v) { // CHECK: [[VADDR:%[a-zA-Z0-9.]+]] = alloca i32* // CHECK-NEXT: [[REFTMP:%[a-zA-Z0-9.]+]] = alloca i32 @@ -189,7 +189,7 @@ unsigned long long test(Helper *obj) { return static_cast(obj->id()); } - // CHECK-LABEL: define i64 @_ZN7PR106504testEPNS_6HelperE + // CHECK-LABEL: define frozen i64 @_ZN7PR106504testEPNS_6HelperE // CHECK: store i64 } diff --git a/clang/test/CodeGenCXX/references.cpp b/clang/test/CodeGenCXX/references.cpp --- a/clang/test/CodeGenCXX/references.cpp +++ b/clang/test/CodeGenCXX/references.cpp @@ -241,7 +241,7 @@ }; // CHECK-LABEL: define internal void @__cxx_global_var_init -// CHECK: call void @_ZN2N31AC1Ei(%"struct.N3::A"* @_ZGRN2N35sA123E_, i32 123) +// CHECK: call void @_ZN2N31AC1Ei(%"struct.N3::A"* frozen @_ZGRN2N35sA123E_, i32 frozen 123) // CHECK: call i32 @__cxa_atexit // CHECK: ret void const A &sA123 = A(123); @@ -256,7 +256,7 @@ void f() { // CHECK-LABEL: define void @_ZN2N41fEv - // CHECK: call void @_ZN2N41AC1Ev(%"struct.N4::A"* @_ZGRZN2N41fEvE2ar_) + // CHECK: call void @_ZN2N41AC1Ev(%"struct.N4::A"* frozen @_ZGRZN2N41fEvE2ar_) // CHECK: call i32 @__cxa_atexit // CHECK: ret void static const A& ar = A(); @@ -306,7 +306,7 @@ namespace N6 { extern struct x {char& x;}y; int a() { return y.x; } - // CHECK-LABEL: define i32 @_ZN2N61aEv + // CHECK-LABEL: define frozen i32 @_ZN2N61aEv // CHECK: [[REFLOAD3:%.*]] = load i8*, i8** getelementptr inbounds (%"struct.N6::x", %"struct.N6::x"* @_ZN2N61yE, i32 0, i32 0), align 8 // CHECK: load i8, i8* [[REFLOAD3]], align 1 } diff --git a/clang/test/CodeGenCXX/regcall.cpp b/clang/test/CodeGenCXX/regcall.cpp --- a/clang/test/CodeGenCXX/regcall.cpp +++ b/clang/test/CodeGenCXX/regcall.cpp @@ -1,7 +1,7 @@ -// RUN: %clang_cc1 -triple x86_64-linux-gnu -emit-llvm -std=c++11 %s -o - | FileCheck -allow-deprecated-dag-overlap -check-prefix=CHECK-LIN -check-prefix=CHECK-LIN64 %s -// RUN: %clang_cc1 -triple i386-linux-gnu -emit-llvm -std=c++11 %s -o - | FileCheck -allow-deprecated-dag-overlap -check-prefix=CHECK-LIN -check-prefix=CHECK-LIN32 %s -// RUN: %clang_cc1 -triple x86_64-windows-msvc -emit-llvm -std=c++11 %s -o - -DWIN_TEST | FileCheck -allow-deprecated-dag-overlap -check-prefix=CHECK-WIN64 %s -// RUN: %clang_cc1 -triple i386-windows-msvc -emit-llvm -std=c++11 %s -o - -DWIN_TEST | FileCheck -allow-deprecated-dag-overlap -check-prefix=CHECK-WIN32 %s +// RUN: %clang_cc1 -disable-frozen-args -triple x86_64-linux-gnu -emit-llvm -std=c++11 %s -o - | FileCheck -allow-deprecated-dag-overlap -check-prefix=CHECK-LIN -check-prefix=CHECK-LIN64 %s +// RUN: %clang_cc1 -disable-frozen-args -triple i386-linux-gnu -emit-llvm -std=c++11 %s -o - | FileCheck -allow-deprecated-dag-overlap -check-prefix=CHECK-LIN -check-prefix=CHECK-LIN32 %s +// RUN: %clang_cc1 -disable-frozen-args -triple x86_64-windows-msvc -emit-llvm -std=c++11 %s -o - -DWIN_TEST | FileCheck -allow-deprecated-dag-overlap -check-prefix=CHECK-WIN64 %s +// RUN: %clang_cc1 -disable-frozen-args -triple i386-windows-msvc -emit-llvm -std=c++11 %s -o - -DWIN_TEST | FileCheck -allow-deprecated-dag-overlap -check-prefix=CHECK-WIN32 %s int __regcall foo(int i); @@ -37,8 +37,8 @@ // CHECK-LIN-DAG: define linkonce_odr x86_regcallcc void @_ZN10test_classC1Ev // CHECK-LIN-DAG: define linkonce_odr x86_regcallcc void @_ZN10test_classC2Ev // Windows ignores calling convention on constructor/destructors. - // CHECK-WIN64-DAG: define linkonce_odr dso_local %class.test_class* @"??0test_class@@QEAA@XZ" - // CHECK-WIN32-DAG: define linkonce_odr dso_local x86_thiscallcc %class.test_class* @"??0test_class@@QAE@XZ" + // CHECK-WIN64-DAG: define linkonce_odr dso_local frozen %class.test_class* @"??0test_class@@QEAA@XZ" + // CHECK-WIN32-DAG: define linkonce_odr dso_local x86_thiscallcc frozen %class.test_class* @"??0test_class@@QAE@XZ" #ifndef WIN_TEST __regcall @@ -53,9 +53,9 @@ test_class& __regcall operator+=(const test_class&){ return *this; } - // CHECK-LIN-DAG: define linkonce_odr x86_regcallcc nonnull align 4 dereferenceable(4) %class.test_class* @_ZN10test_classpLERKS_ - // CHECK-WIN64-DAG: define linkonce_odr dso_local x86_regcallcc nonnull align 4 dereferenceable(4) %class.test_class* @"??Ytest_class@@QEAwAEAV0@AEBV0@@Z" - // CHECK-WIN32-DAG: define linkonce_odr dso_local x86_regcallcc nonnull align 4 dereferenceable(4) %class.test_class* @"??Ytest_class@@QAwAAV0@ABV0@@Z" + // CHECK-LIN-DAG: define linkonce_odr x86_regcallcc frozen nonnull align 4 dereferenceable(4) %class.test_class* @_ZN10test_classpLERKS_ + // CHECK-WIN64-DAG: define linkonce_odr dso_local x86_regcallcc frozen nonnull align 4 dereferenceable(4) %class.test_class* @"??Ytest_class@@QEAwAEAV0@AEBV0@@Z" + // CHECK-WIN32-DAG: define linkonce_odr dso_local x86_regcallcc frozen nonnull align 4 dereferenceable(4) %class.test_class* @"??Ytest_class@@QAwAAV0@ABV0@@Z" void __regcall do_thing(){} // CHECK-LIN-DAG: define linkonce_odr x86_regcallcc void @_ZN10test_class20__regcall3__do_thingEv // CHECK-WIN64-DAG: define linkonce_odr dso_local x86_regcallcc void @"?do_thing@test_class@@QEAwXXZ" @@ -69,9 +69,9 @@ }; bool __regcall operator ==(const test_class&, const test_class&){ --x; return false;} -// CHECK-LIN-DAG: define x86_regcallcc zeroext i1 @_ZeqRK10test_classS1_ -// CHECK-WIN64-DAG: define dso_local x86_regcallcc zeroext i1 @"??8@Yw_NAEBVtest_class@@0@Z" -// CHECK-WIN32-DAG: define dso_local x86_regcallcc zeroext i1 @"??8@Yw_NABVtest_class@@0@Z" +// CHECK-LIN-DAG: define x86_regcallcc frozen zeroext i1 @_ZeqRK10test_classS1_ +// CHECK-WIN64-DAG: define dso_local x86_regcallcc frozen zeroext i1 @"??8@Yw_NAEBVtest_class@@0@Z" +// CHECK-WIN32-DAG: define dso_local x86_regcallcc frozen zeroext i1 @"??8@Yw_NABVtest_class@@0@Z" test_class __regcall operator""_test_class (unsigned long long) { ++x; return test_class{};} // CHECK-LIN64-DAG: define x86_regcallcc void @_Zli11_test_classy(%class.test_class* noalias sret align 4 %agg.result, i64 %0) @@ -101,16 +101,16 @@ } // CHECK-LIN64-DAG: define x86_regcallcc void @_Z15__regcall3__fooCe({ x86_fp80, x86_fp80 }* noalias sret align 16 %agg.result, { x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16 %f) // CHECK-LIN32-DAG: define x86_regcallcc void @_Z15__regcall3__fooCe({ x86_fp80, x86_fp80 }* inreg noalias sret align 4 %agg.result, { x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 4 %f) -// CHECK-WIN64-DAG: define dso_local x86_regcallcc { double, double } @"?foo@@YwU?$_Complex@O@__clang@@U12@@Z"(double %f.0, double %f.1) -// CHECK-WIN32-DAG: define dso_local x86_regcallcc { double, double } @"?foo@@YwU?$_Complex@O@__clang@@U12@@Z"(double %f.0, double %f.1) +// CHECK-WIN64-DAG: define dso_local x86_regcallcc frozen { double, double } @"?foo@@YwU?$_Complex@O@__clang@@U12@@Z"(double %f.0, double %f.1) +// CHECK-WIN32-DAG: define dso_local x86_regcallcc frozen { double, double } @"?foo@@YwU?$_Complex@O@__clang@@U12@@Z"(double %f.0, double %f.1) // The following caused us to dereference uninitialized memory. The long name // seems necessary, as does the return types. float _Complex __regcall callee(float _Complex f); -// CHECK-LIN64-DAG: declare x86_regcallcc <2 x float> @_Z18__regcall3__calleeCf(<2 x float>) -// CHECK-LIN32-DAG: declare x86_regcallcc { float, float } @_Z18__regcall3__calleeCf(float, float) -// CHECK-WIN64-DAG: declare dso_local x86_regcallcc { float, float } @"?callee@@YwU?$_Complex@M@__clang@@U12@@Z"(float, float) -// CHECK-WIN32-DAG: declare dso_local x86_regcallcc { float, float } @"?callee@@YwU?$_Complex@M@__clang@@U12@@Z"(float, float) +// CHECK-LIN64-DAG: declare x86_regcallcc frozen <2 x float> @_Z18__regcall3__calleeCf(<2 x float>) +// CHECK-LIN32-DAG: declare x86_regcallcc frozen { float, float } @_Z18__regcall3__calleeCf(float, float) +// CHECK-WIN64-DAG: declare dso_local x86_regcallcc frozen { float, float } @"?callee@@YwU?$_Complex@M@__clang@@U12@@Z"(float, float) +// CHECK-WIN32-DAG: declare dso_local x86_regcallcc frozen { float, float } @"?callee@@YwU?$_Complex@M@__clang@@U12@@Z"(float, float) __regcall int some_really_long_name_that_manages_to_hit_the_right_spot_of_mem(int a) { diff --git a/clang/test/CodeGenCXX/regparm.cpp b/clang/test/CodeGenCXX/regparm.cpp --- a/clang/test/CodeGenCXX/regparm.cpp +++ b/clang/test/CodeGenCXX/regparm.cpp @@ -1,7 +1,7 @@ // RUN: %clang_cc1 -triple i386-unknown-unknown %s -emit-llvm -o - | FileCheck %s -// CHECK: _Z3fooRi(i32* inreg +// CHECK: _Z3fooRi(i32* frozen inreg void __attribute__ ((regparm (1))) foo(int &a) { } @@ -11,7 +11,7 @@ }; void __attribute__((regparm(3))) foo2(S1 a, int b); -// CHECK: declare void @_Z4foo22S1i(%struct.S1* inreg, i32 inreg) +// CHECK: declare void @_Z4foo22S1i(%struct.S1* frozen inreg, i32 frozen inreg) void bar2(S1 a, int b) { foo2(a, b); } @@ -21,7 +21,7 @@ }; void __attribute__((regparm(3))) foo3(struct S2 a, int b); -// CHECK: declare void @_Z4foo32S2i(i32 inreg, i32 inreg) +// CHECK: declare void @_Z4foo32S2i(i32 inreg, i32 frozen inreg) void bar3(struct S2 a, int b) { foo3(a, b); } @@ -32,7 +32,7 @@ } a; }; __attribute((regparm(2))) void foo4(S3 a, int b); -// CHECK: declare void @_Z4foo42S3i(%struct.S3* byval(%struct.S3) align 4, i32 inreg) +// CHECK: declare void @_Z4foo42S3i(%struct.S3* frozen byval(%struct.S3) align 4, i32 frozen inreg) void bar3(S3 a, int b) { foo4(a, b); } diff --git a/clang/test/CodeGenCXX/rtti-layout.cpp b/clang/test/CodeGenCXX/rtti-layout.cpp --- a/clang/test/CodeGenCXX/rtti-layout.cpp +++ b/clang/test/CodeGenCXX/rtti-layout.cpp @@ -101,7 +101,7 @@ static int (B::*d)[10]; }; -// CHECK-LABEL: define i32 @_Z1fv() +// CHECK-LABEL: define frozen i32 @_Z1fv() int f() { // Vectors should be treated as fundamental types. typedef short __v4hi __attribute__ ((__vector_size__ (8))); diff --git a/clang/test/CodeGenCXX/runtime-dllstorage.cpp b/clang/test/CodeGenCXX/runtime-dllstorage.cpp --- a/clang/test/CodeGenCXX/runtime-dllstorage.cpp +++ b/clang/test/CodeGenCXX/runtime-dllstorage.cpp @@ -1,21 +1,21 @@ -// RUN: %clang_cc1 -triple i686-windows-msvc -std=c++11 -fdeclspec -fms-compatibility -fexceptions -fcxx-exceptions -emit-llvm -o - %s | FileCheck -allow-deprecated-dag-overlap %s -check-prefix CHECK-MS -check-prefix CHECK-MS-DYNAMIC -// RUN: %clang_cc1 -triple i686-windows-msvc -std=c++11 -fdeclspec -fms-compatibility -fexceptions -fcxx-exceptions -flto-visibility-public-std -emit-llvm -o - %s | FileCheck -allow-deprecated-dag-overlap %s -check-prefix CHECK-MS -check-prefix CHECK-MS-STATIC - -// RUN: %clang_cc1 -triple i686-windows-itanium -std=c++11 -fdeclspec -fms-compatibility -fexceptions -fcxx-exceptions -emit-llvm -o - %s | FileCheck -allow-deprecated-dag-overlap %s -check-prefix CHECK-IA -check-prefix CHECK-DYNAMIC-IA -check-prefix CHECK-DYNAMIC-NODECL-IA -check-prefix CHECK-DYNAMIC-IA-CXA-ATEXIT -// RUN: %clang_cc1 -triple i686-windows-itanium -std=c++11 -fdeclspec -fms-compatibility -fexceptions -fcxx-exceptions -flto-visibility-public-std -emit-llvm -o - %s | FileCheck -allow-deprecated-dag-overlap %s -check-prefix CHECK-IA -check-prefix CHECK-STATIC-IA -check-prefix CHECK-STATIC-NODECL-IA -check-prefix CHECK-IA-STATIC-CXA-ATEXIT -// RUN: %clang_cc1 -triple i686-windows-itanium -std=c++11 -fdeclspec -fms-compatibility -fexceptions -fcxx-exceptions -DIMPORT_DECLARATIONS -emit-llvm -o - %s | FileCheck -allow-deprecated-dag-overlap %s -check-prefix CHECK-IA -check-prefix CHECK-DYNAMIC-IA -check-prefix CHECK-DYNAMIC-IMPORT-IA -check-prefix CHECK-DYNAMIC-IA-CXA-ATEXIT -// RUN: %clang_cc1 -triple i686-windows-itanium -std=c++11 -fdeclspec -fms-compatibility -fexceptions -fcxx-exceptions -flto-visibility-public-std -DIMPORT_DECLARATIONS -emit-llvm -o - %s | FileCheck -allow-deprecated-dag-overlap %s -check-prefix CHECK-IA -check-prefix CHECK-STATIC-IA -check-prefix CHECK-STATIC-IMPORT-IA -check-prefix CHECK-IA-STATIC-CXA-ATEXIT -// RUN: %clang_cc1 -triple i686-windows-itanium -std=c++11 -fdeclspec -fms-compatibility -fexceptions -fcxx-exceptions -DEXPORT_DECLARATIONS -emit-llvm -o - %s | FileCheck -allow-deprecated-dag-overlap %s -check-prefix CHECK-IA -check-prefix CHECK-DYNAMIC-IA -check-prefix CHECK-DYNAMIC-IA-CXA-ATEXIT -// RUN: %clang_cc1 -triple i686-windows-itanium -std=c++11 -fdeclspec -fms-compatibility -fexceptions -fcxx-exceptions -flto-visibility-public-std -DEXPORT_DECLARATIONS -emit-llvm -o - %s | FileCheck -allow-deprecated-dag-overlap %s -check-prefix CHECK-IA -check-prefix CHECK-STATIC-IA -check-prefix CHECK-IA-STATIC-CXA-ATEXIT -// RUN: %clang_cc1 -triple i686-windows-itanium -std=c++11 -fdeclspec -fms-compatibility -fexceptions -fcxx-exceptions -DDECL -emit-llvm -o - %s | FileCheck -allow-deprecated-dag-overlap %s -check-prefix CHECK-IA -check-prefix CHECK-DYNAMIC-IA -check-prefix CHECK-DYNAMIC-DECL-IA -check-prefix CHECK-DYNAMIC-IA-CXA-ATEXIT -// RUN: %clang_cc1 -triple i686-windows-itanium -std=c++11 -fdeclspec -fms-compatibility -fexceptions -fcxx-exceptions -flto-visibility-public-std -DDECL -emit-llvm -o - %s | FileCheck -allow-deprecated-dag-overlap %s -check-prefix CHECK-IA -check-prefix CHECK-STATIC-IA -check-prefix CHECK-STATIC-DECL-IA -check-prefix CHECK-IA-STATIC-CXA-ATEXIT -// %clang_cc1 -triple i686-windows-itanium -std=c++11 -fdeclspec -fms-compatibility -fexceptions -fcxx-exceptions -fno-use-cxa-atexit -emit-llvm -o - %s | FileCheck %s -check-prefix CHECK-IA -check-prefix CHECK-DYNAMIC-IA -check-prefix CHECK-DYNAMIC-IA-ATEXIT -// %clang_cc1 -triple i686-windows-itanium -std=c++11 -fdeclspec -fms-compatibility -fexceptions -fcxx-exceptions -fno-use-cxa-atexit -emit-llvm -o - %s | FileCheck %s -check-prefix CHECK-IA -check-prefix CHECK-STATIC-IA -check-prefix CHECK-STATIC-IA-ATEXIT - -// RUN: %clang_cc1 -triple i686-windows-gnu -std=c++11 -fdeclspec -fms-compatibility -fexceptions -fcxx-exceptions -emit-llvm -o - %s | FileCheck -allow-deprecated-dag-overlap %s -check-prefix CHECK-IA -check-prefix CHECK-STATIC-IA -// RUN: %clang_cc1 -triple i686-windows-gnu -std=c++11 -fdeclspec -fms-compatibility -fexceptions -fcxx-exceptions -flto-visibility-public-std -emit-llvm -o - %s | FileCheck -allow-deprecated-dag-overlap %s -check-prefix CHECK-IA -check-prefix CHECK-STATIC-IA -// RUN: %clang_cc1 -triple i686-windows-cygnus -std=c++11 -fdeclspec -fms-compatibility -fexceptions -fcxx-exceptions -emit-llvm -o - %s | FileCheck -allow-deprecated-dag-overlap %s -check-prefix CHECK-IA -check-prefix CHECK-STATIC-IA -// RUN: %clang_cc1 -triple i686-windows-cygnus -std=c++11 -fdeclspec -fms-compatibility -fexceptions -fcxx-exceptions -flto-visibility-public-std -emit-llvm -o - %s | FileCheck -allow-deprecated-dag-overlap %s -check-prefix CHECK-IA -check-prefix CHECK-STATIC-IA +// RUN: %clang_cc1 -disable-frozen-args -triple i686-windows-msvc -std=c++11 -fdeclspec -fms-compatibility -fexceptions -fcxx-exceptions -emit-llvm -o - %s | FileCheck -allow-deprecated-dag-overlap %s -check-prefix CHECK-MS -check-prefix CHECK-MS-DYNAMIC +// RUN: %clang_cc1 -disable-frozen-args -triple i686-windows-msvc -std=c++11 -fdeclspec -fms-compatibility -fexceptions -fcxx-exceptions -flto-visibility-public-std -emit-llvm -o - %s | FileCheck -allow-deprecated-dag-overlap %s -check-prefix CHECK-MS -check-prefix CHECK-MS-STATIC + +// RUN: %clang_cc1 -disable-frozen-args -triple i686-windows-itanium -std=c++11 -fdeclspec -fms-compatibility -fexceptions -fcxx-exceptions -emit-llvm -o - %s | FileCheck -allow-deprecated-dag-overlap %s -check-prefix CHECK-IA -check-prefix CHECK-DYNAMIC-IA -check-prefix CHECK-DYNAMIC-NODECL-IA -check-prefix CHECK-DYNAMIC-IA-CXA-ATEXIT +// RUN: %clang_cc1 -disable-frozen-args -triple i686-windows-itanium -std=c++11 -fdeclspec -fms-compatibility -fexceptions -fcxx-exceptions -flto-visibility-public-std -emit-llvm -o - %s | FileCheck -allow-deprecated-dag-overlap %s -check-prefix CHECK-IA -check-prefix CHECK-STATIC-IA -check-prefix CHECK-STATIC-NODECL-IA -check-prefix CHECK-IA-STATIC-CXA-ATEXIT +// RUN: %clang_cc1 -disable-frozen-args -triple i686-windows-itanium -std=c++11 -fdeclspec -fms-compatibility -fexceptions -fcxx-exceptions -DIMPORT_DECLARATIONS -emit-llvm -o - %s | FileCheck -allow-deprecated-dag-overlap %s -check-prefix CHECK-IA -check-prefix CHECK-DYNAMIC-IA -check-prefix CHECK-DYNAMIC-IMPORT-IA -check-prefix CHECK-DYNAMIC-IA-CXA-ATEXIT +// RUN: %clang_cc1 -disable-frozen-args -triple i686-windows-itanium -std=c++11 -fdeclspec -fms-compatibility -fexceptions -fcxx-exceptions -flto-visibility-public-std -DIMPORT_DECLARATIONS -emit-llvm -o - %s | FileCheck -allow-deprecated-dag-overlap %s -check-prefix CHECK-IA -check-prefix CHECK-STATIC-IA -check-prefix CHECK-STATIC-IMPORT-IA -check-prefix CHECK-IA-STATIC-CXA-ATEXIT +// RUN: %clang_cc1 -disable-frozen-args -triple i686-windows-itanium -std=c++11 -fdeclspec -fms-compatibility -fexceptions -fcxx-exceptions -DEXPORT_DECLARATIONS -emit-llvm -o - %s | FileCheck -allow-deprecated-dag-overlap %s -check-prefix CHECK-IA -check-prefix CHECK-DYNAMIC-IA -check-prefix CHECK-DYNAMIC-IA-CXA-ATEXIT +// RUN: %clang_cc1 -disable-frozen-args -triple i686-windows-itanium -std=c++11 -fdeclspec -fms-compatibility -fexceptions -fcxx-exceptions -flto-visibility-public-std -DEXPORT_DECLARATIONS -emit-llvm -o - %s | FileCheck -allow-deprecated-dag-overlap %s -check-prefix CHECK-IA -check-prefix CHECK-STATIC-IA -check-prefix CHECK-IA-STATIC-CXA-ATEXIT +// RUN: %clang_cc1 -disable-frozen-args -triple i686-windows-itanium -std=c++11 -fdeclspec -fms-compatibility -fexceptions -fcxx-exceptions -DDECL -emit-llvm -o - %s | FileCheck -allow-deprecated-dag-overlap %s -check-prefix CHECK-IA -check-prefix CHECK-DYNAMIC-IA -check-prefix CHECK-DYNAMIC-DECL-IA -check-prefix CHECK-DYNAMIC-IA-CXA-ATEXIT +// RUN: %clang_cc1 -disable-frozen-args -triple i686-windows-itanium -std=c++11 -fdeclspec -fms-compatibility -fexceptions -fcxx-exceptions -flto-visibility-public-std -DDECL -emit-llvm -o - %s | FileCheck -allow-deprecated-dag-overlap %s -check-prefix CHECK-IA -check-prefix CHECK-STATIC-IA -check-prefix CHECK-STATIC-DECL-IA -check-prefix CHECK-IA-STATIC-CXA-ATEXIT +// %clang_cc1 -disable-frozen-args -triple i686-windows-itanium -std=c++11 -fdeclspec -fms-compatibility -fexceptions -fcxx-exceptions -fno-use-cxa-atexit -emit-llvm -o - %s | FileCheck %s -check-prefix CHECK-IA -check-prefix CHECK-DYNAMIC-IA -check-prefix CHECK-DYNAMIC-IA-ATEXIT +// %clang_cc1 -disable-frozen-args -triple i686-windows-itanium -std=c++11 -fdeclspec -fms-compatibility -fexceptions -fcxx-exceptions -fno-use-cxa-atexit -emit-llvm -o - %s | FileCheck %s -check-prefix CHECK-IA -check-prefix CHECK-STATIC-IA -check-prefix CHECK-STATIC-IA-ATEXIT + +// RUN: %clang_cc1 -disable-frozen-args -triple i686-windows-gnu -std=c++11 -fdeclspec -fms-compatibility -fexceptions -fcxx-exceptions -emit-llvm -o - %s | FileCheck -allow-deprecated-dag-overlap %s -check-prefix CHECK-IA -check-prefix CHECK-STATIC-IA +// RUN: %clang_cc1 -disable-frozen-args -triple i686-windows-gnu -std=c++11 -fdeclspec -fms-compatibility -fexceptions -fcxx-exceptions -flto-visibility-public-std -emit-llvm -o - %s | FileCheck -allow-deprecated-dag-overlap %s -check-prefix CHECK-IA -check-prefix CHECK-STATIC-IA +// RUN: %clang_cc1 -disable-frozen-args -triple i686-windows-cygnus -std=c++11 -fdeclspec -fms-compatibility -fexceptions -fcxx-exceptions -emit-llvm -o - %s | FileCheck -allow-deprecated-dag-overlap %s -check-prefix CHECK-IA -check-prefix CHECK-STATIC-IA +// RUN: %clang_cc1 -disable-frozen-args -triple i686-windows-cygnus -std=c++11 -fdeclspec -fms-compatibility -fexceptions -fcxx-exceptions -flto-visibility-public-std -emit-llvm -o - %s | FileCheck -allow-deprecated-dag-overlap %s -check-prefix CHECK-IA -check-prefix CHECK-STATIC-IA #if defined(IMPORT_DECLARATIONS) namespace __cxxabiv1 { @@ -110,7 +110,7 @@ // CHECK-MS-DAG: declare dso_local i32 @atexit(void ()*) // CHECK-MS-DYNAMIC-DAG: declare {{.*}} void @_CxxThrowException // CHECK-MS-STATIC-DAG: declare {{.*}} void @_CxxThrowException -// CHECK-MS-DAG: declare dso_local nonnull i8* @"??2@YAPAXI@Z" +// CHECK-MS-DAG: declare dso_local frozen nonnull i8* @"??2@YAPAXI@Z" // CHECK-MS-DAG: declare dso_local void @_Init_thread_header(i32*) // CHECK-MS-DAG: declare dso_local void @_Init_thread_footer(i32*) @@ -129,7 +129,7 @@ // CHECK-DYNAMIC-NODECL-IA-DAG: declare dllimport i32 @__cxa_guard_acquire(i64*) // CHECK-DYNAMIC-IMPORT-IA-DAG: declare dllimport i32 @__cxa_guard_acquire(i64*) // CHECK-DYNAMIC-EXPORT-IA-DAG: declare dllexport i32 @__cxa_guard_acquire(i64*) -// CHECK-IA-DAG: declare dso_local nonnull i8* @_Znwj(i32) +// CHECK-IA-DAG: declare dso_local frozen nonnull i8* @_Znwj(i32) // CHECK-DYNAMIC-DECL-IA-DAG: declare dllimport void @__cxa_guard_release(i64*) // CHECK-DYNAMIC-NODECL-IA-DAG: declare dllimport void @__cxa_guard_release(i64*) // CHECK-DYNAMIC-IMPORT-IA-DAG: declare dllimport void @__cxa_guard_release(i64*) @@ -147,7 +147,7 @@ // CHECK-STATIC-NODECL-IA-DAG: declare dso_local i32 @__cxa_guard_acquire(i64*) // CHECK-STATIC-IMPORT-IA-DAG: declare dso_local i32 @__cxa_guard_acquire(i64*) // CHECK-STATIC-EXPORT-IA-DAG: declare dso_local i32 @__cxa_guard_acquire(i64*) -// CHECK-IA-DAG: declare dso_local nonnull i8* @_Znwj(i32) +// CHECK-IA-DAG: declare dso_local frozen nonnull i8* @_Znwj(i32) // CHECK-STATIC-DECL-IA-DAG: declare dso_local void @__cxa_guard_release(i64*) // CHECK-STATIC-NODECL-IA-DAG: declare dso_local void @__cxa_guard_release(i64*) // CHECK-STATIC-IMPORT-IA-DAG: declare dso_local void @__cxa_guard_release(i64*) diff --git a/clang/test/CodeGenCXX/runtimecc.cpp b/clang/test/CodeGenCXX/runtimecc.cpp --- a/clang/test/CodeGenCXX/runtimecc.cpp +++ b/clang/test/CodeGenCXX/runtimecc.cpp @@ -21,7 +21,7 @@ A global; // CHECK-LABEL: define internal void @__cxx_global_var_init() -// CHECK: call [[A]]* @_ZN5test01AC1Ev([[A]]* @_ZN5test06globalE) +// CHECK: call frozen [[A]]* @_ZN5test01AC1Ev([[A]]* frozen @_ZN5test06globalE) // CHECK-NEXT: call i32 @__cxa_atexit(void (i8*)* bitcast ([[A]]* ([[A]]*)* @_ZN5test01AD1Ev to void (i8*)*), i8* bitcast ([[A]]* @_ZN5test06globalE to i8*), i8* @__dso_handle) [[NOUNWIND:#[0-9]+]] // CHECK-NEXT: ret void } diff --git a/clang/test/CodeGenCXX/rvalue-references.cpp b/clang/test/CodeGenCXX/rvalue-references.cpp --- a/clang/test/CodeGenCXX/rvalue-references.cpp +++ b/clang/test/CodeGenCXX/rvalue-references.cpp @@ -7,8 +7,8 @@ B &getB(); -// CHECK-LABEL: define nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.A* @_Z4getAv() -// CHECK: call nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.B* @_Z4getBv() +// CHECK-LABEL: define frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.A* @_Z4getAv() +// CHECK: call frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.B* @_Z4getBv() // CHECK-NEXT: bitcast %struct.B* // CHECK-NEXT: getelementptr inbounds i8, i8* // CHECK-NEXT: bitcast i8* {{.*}} to %struct.A* @@ -19,18 +19,18 @@ int &&getIntXValue(); int getIntPRValue(); -// CHECK-LABEL: define nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) i32* @_Z2f0v() -// CHECK: call nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) i32* @_Z12getIntLValuev() +// CHECK-LABEL: define frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) i32* @_Z2f0v() +// CHECK: call frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) i32* @_Z12getIntLValuev() // CHECK-NEXT: ret i32* int &&f0() { return static_cast(getIntLValue()); } -// CHECK-LABEL: define nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) i32* @_Z2f1v() -// CHECK: call nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) i32* @_Z12getIntXValuev() +// CHECK-LABEL: define frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) i32* @_Z2f1v() +// CHECK: call frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) i32* @_Z12getIntXValuev() // CHECK-NEXT: ret i32* int &&f1() { return static_cast(getIntXValue()); } -// CHECK-LABEL: define nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) i32* @_Z2f2v -// CHECK: call i32 @_Z13getIntPRValuev() +// CHECK-LABEL: define frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) i32* @_Z2f2v +// CHECK: call frozen i32 @_Z13getIntPRValuev() // CHECK-NEXT: store i32 {{.*}}, i32* // CHECK-NEXT: ret i32* int &&f2() { return static_cast(getIntPRValue()); } @@ -95,9 +95,9 @@ }; // CHECK-LABEL: define void @_ZN5test11BC2Ei( - // CHECK: [[T0:%.*]] = call nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) i32* @_ZN5test14moveERi( + // CHECK: [[T0:%.*]] = call frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) i32* @_ZN5test14moveERi( // CHECK-NEXT: [[T1:%.*]] = load i32, i32* [[T0]] - // CHECK-NEXT: call void @_ZN5test11AC1Ei({{.*}}, i32 [[T1]]) + // CHECK-NEXT: call void @_ZN5test11AC1Ei({{.*}}, i32 frozen [[T1]]) // CHECK-NEXT: ret void B::B(int i) : a(move(i)) {} } diff --git a/clang/test/CodeGenCXX/split-stacks.cpp b/clang/test/CodeGenCXX/split-stacks.cpp --- a/clang/test/CodeGenCXX/split-stacks.cpp +++ b/clang/test/CodeGenCXX/split-stacks.cpp @@ -16,18 +16,18 @@ return tnosplit(); } -// CHECK-SEGSTK: define dso_local i32 @_Z3foov() [[SS:#[0-9]+]] { -// CHECK-SEGSTK: define dso_local i32 @_Z7nosplitv() [[NSS1:#[0-9]+]] { -// CHECK-SEGSTK: define linkonce_odr dso_local i32 @_Z8tnosplitIiEiv() [[NSS2:#[0-9]+]] comdat { +// CHECK-SEGSTK: define dso_local frozen i32 @_Z3foov() [[SS:#[0-9]+]] { +// CHECK-SEGSTK: define dso_local frozen i32 @_Z7nosplitv() [[NSS1:#[0-9]+]] { +// CHECK-SEGSTK: define linkonce_odr dso_local frozen i32 @_Z8tnosplitIiEiv() [[NSS2:#[0-9]+]] comdat { // CHECK-SEGSTK-NOT: [[NSS1]] = { {{.*}} "split-stack" {{.*}} } // CHECK-SEGSTK-NOT: [[NSS2]] = { {{.*}} "split-stack" {{.*}} } // CHECK-SEGSTK: [[SS]] = { {{.*}} "split-stack" {{.*}} } // CHECK-SEGSTK-NOT: [[NSS1]] = { {{.*}} "split-stack" {{.*}} } // CHECK-SEGSTK-NOT: [[NSS2]] = { {{.*}} "split-stack" {{.*}} } -// CHECK-NOSEGSTK: define dso_local i32 @_Z3foov() [[NSS0:#[0-9]+]] { -// CHECK-NOSEGSTK: define dso_local i32 @_Z7nosplitv() [[NSS1:#[0-9]+]] { -// CHECK-NOSEGSTK: define linkonce_odr dso_local i32 @_Z8tnosplitIiEiv() [[NSS2:#[0-9]+]] comdat { +// CHECK-NOSEGSTK: define dso_local frozen i32 @_Z3foov() [[NSS0:#[0-9]+]] { +// CHECK-NOSEGSTK: define dso_local frozen i32 @_Z7nosplitv() [[NSS1:#[0-9]+]] { +// CHECK-NOSEGSTK: define linkonce_odr dso_local frozen i32 @_Z8tnosplitIiEiv() [[NSS2:#[0-9]+]] comdat { // CHECK-NOSEGSTK-NOT: [[NSS1]] = { {{.*}} "split-stack" {{.*}} } // CHECK-NOSEGSTK-NOT: [[NSS2]] = { {{.*}} "split-stack" {{.*}} } // CHECK-NOSEGSTK-NOT: [[NSS3]] = { {{.*}} "split-stack" {{.*}} } diff --git a/clang/test/CodeGenCXX/stack-reuse-miscompile.cpp b/clang/test/CodeGenCXX/stack-reuse-miscompile.cpp --- a/clang/test/CodeGenCXX/stack-reuse-miscompile.cpp +++ b/clang/test/CodeGenCXX/stack-reuse-miscompile.cpp @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -triple armv7l-unknown-linux-gnueabihf -emit-llvm -O1 -disable-llvm-passes -std=c++03 %s -o - | FileCheck %s --implicit-check-not=llvm.lifetime +// RUN: %clang_cc1 -disable-frozen-args -triple armv7l-unknown-linux-gnueabihf -emit-llvm -O1 -disable-llvm-passes -std=c++03 %s -o - | FileCheck %s --implicit-check-not=llvm.lifetime class S { char *ptr; @@ -33,14 +33,14 @@ // // CHECK: [[T2i8:%.*]] = bitcast %class.T* [[T2]] to i8* // CHECK: call void @llvm.lifetime.start.p0i8(i64 16, i8* [[T2i8]]) -// CHECK: [[T4:%.*]] = call %class.T* @_ZN1TC1EPKc(%class.T* [[T2]], i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i32 0, i32 0)) +// CHECK: [[T4:%.*]] = call frozen %class.T* @_ZN1TC1EPKc(%class.T* [[T2]], i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i32 0, i32 0)) // // CHECK: [[T3i8:%.*]] = bitcast %class.T* [[T3]] to i8* // CHECK: call void @llvm.lifetime.start.p0i8(i64 16, i8* [[T3i8]]) -// CHECK: [[T5:%.*]] = call %class.T* @_ZN1TC1E1S(%class.T* [[T3]], [2 x i32] %{{.*}}) +// CHECK: [[T5:%.*]] = call frozen %class.T* @_ZN1TC1E1S(%class.T* [[T3]], [2 x i32] %{{.*}}) // // CHECK: call void @_ZNK1T6concatERKS_(%class.T* sret align 4 [[T1]], %class.T* [[T2]], %class.T* nonnull align 4 dereferenceable(16) [[T3]]) -// CHECK: [[T6:%.*]] = call i8* @_ZNK1T3strEv(%class.T* [[T1]]) +// CHECK: [[T6:%.*]] = call frozen i8* @_ZNK1T3strEv(%class.T* [[T1]]) // // CHECK: call void @llvm.lifetime.end.p0i8( // CHECK: call void @llvm.lifetime.end.p0i8( diff --git a/clang/test/CodeGenCXX/stack-reuse.cpp b/clang/test/CodeGenCXX/stack-reuse.cpp --- a/clang/test/CodeGenCXX/stack-reuse.cpp +++ b/clang/test/CodeGenCXX/stack-reuse.cpp @@ -131,11 +131,11 @@ } int large_combiner_test(S_large s) { -// CHECK-LABEL: define i32 @large_combiner_test +// CHECK-LABEL: define frozen i32 @large_combiner_test // CHECK: [[T2:%.*]] = alloca %struct.Combiner // CHECK: [[T1:%.*]] = alloca %struct.Combiner -// CHECK: [[T3:%.*]] = call %struct.Combiner* @_ZN8CombinerC1E7S_large(%struct.Combiner* nonnull [[T1]], [9 x i32] %s.coerce) -// CHECK: call void @_ZN8Combiner1fEv(%struct.Combiner* nonnull sret align 4 [[T2]], %struct.Combiner* nonnull [[T1]]) +// CHECK: [[T3:%.*]] = call frozen %struct.Combiner* @_ZN8CombinerC1E7S_large(%struct.Combiner* frozen nonnull [[T1]], [9 x i32] %s.coerce) +// CHECK: call void @_ZN8Combiner1fEv(%struct.Combiner* nonnull sret align 4 [[T2]], %struct.Combiner* frozen nonnull [[T1]]) // CHECK: [[T4:%.*]] = getelementptr inbounds %struct.Combiner, %struct.Combiner* [[T2]], i32 0, i32 0, i32 0, i32 0 // CHECK: [[T5:%.*]] = load i32, i32* [[T4]] // CHECK: ret i32 [[T5]] diff --git a/clang/test/CodeGenCXX/static-data-member.cpp b/clang/test/CodeGenCXX/static-data-member.cpp --- a/clang/test/CodeGenCXX/static-data-member.cpp +++ b/clang/test/CodeGenCXX/static-data-member.cpp @@ -47,7 +47,7 @@ } // CHECK-LABEL: define internal void @__cxx_global_var_init() - // CHECK: [[TMP:%.*]] = call i32 @_ZN5test23fooEv() + // CHECK: [[TMP:%.*]] = call frozen i32 @_ZN5test23fooEv() // CHECK-NEXT: store i32 [[TMP]], i32* @_ZN5test212_GLOBAL__N_11AIiE1xE, align 4 // CHECK-NEXT: ret void } @@ -70,7 +70,7 @@ // CHECK: [[GUARDBYTE:%.*]] = load i8, i8* bitcast (i64* @_ZGVN5test31AIiE1xE to i8*) // CHECK-NEXT: [[UNINITIALIZED:%.*]] = icmp eq i8 [[GUARDBYTE]], 0 // CHECK-NEXT: br i1 [[UNINITIALIZED]] - // CHECK: [[TMP:%.*]] = call i32 @_ZN5test33fooEv() + // CHECK: [[TMP:%.*]] = call frozen i32 @_ZN5test33fooEv() // CHECK-NEXT: store i32 [[TMP]], i32* @_ZN5test31AIiE1xE, align 4 // CHECK-NEXT: store i64 1, i64* @_ZGVN5test31AIiE1xE // CHECK-NEXT: br label @@ -85,7 +85,7 @@ }; int f(A *a) { - // CHECK-LABEL: define i32 @_ZN5test41fEPNS_1AE + // CHECK-LABEL: define frozen i32 @_ZN5test41fEPNS_1AE // CHECK: ret i32 76 return a->n; } diff --git a/clang/test/CodeGenCXX/static-destructor.cpp b/clang/test/CodeGenCXX/static-destructor.cpp --- a/clang/test/CodeGenCXX/static-destructor.cpp +++ b/clang/test/CodeGenCXX/static-destructor.cpp @@ -29,5 +29,5 @@ // WASM: define internal void @__cxx_global_var_init() // WASM: call i32 @__cxa_atexit(void (i8*)* @__cxx_global_array_dtor, i8* null, i8* @__dso_handle) -// WASM: define internal void @__cxx_global_array_dtor(i8* %0) -// WASM: %call = call %class.Foo* @_ZN3FooD1Ev(%class.Foo* @global) +// WASM: define internal void @__cxx_global_array_dtor(i8* frozen %0) +// WASM: %call = call frozen %class.Foo* @_ZN3FooD1Ev(%class.Foo* frozen @global) diff --git a/clang/test/CodeGenCXX/static-init-1.cpp b/clang/test/CodeGenCXX/static-init-1.cpp --- a/clang/test/CodeGenCXX/static-init-1.cpp +++ b/clang/test/CodeGenCXX/static-init-1.cpp @@ -8,18 +8,18 @@ int func1(int c) { return printf("loading the func1(%d)\n", c); } static int loader_1 = func1(++count); -// CHECK: call i32 @_Z5func1i +// CHECK: call frozen i32 @_Z5func1i int loader_2 = func2(++count); static int loader_3 = func1(++count); -// CHECK: call i32 @_Z5func1i +// CHECK: call frozen i32 @_Z5func1i int main() {} int loader_4 = func2(++count); static int loader_5 = func1(++count); int loader_6 = func2(++count); -// CHECK: call i32 @_Z5func1i +// CHECK: call frozen i32 @_Z5func1i -// CHECK-NOT: call i32 @_Z5func1i +// CHECK-NOT: call frozen i32 @_Z5func1i diff --git a/clang/test/CodeGenCXX/static-init-wasm.cpp b/clang/test/CodeGenCXX/static-init-wasm.cpp --- a/clang/test/CodeGenCXX/static-init-wasm.cpp +++ b/clang/test/CodeGenCXX/static-init-wasm.cpp @@ -44,11 +44,11 @@ A theA; // WEBASSEMBLY32: define internal void @__cxx_global_var_init() #3 { -// WEBASSEMBLY32: call %struct.A* @_ZN1AC1Ev(%struct.A* @theA) +// WEBASSEMBLY32: call frozen %struct.A* @_ZN1AC1Ev(%struct.A* frozen @theA) // WEBASSEMBLY32: define internal void @_GLOBAL__sub_I_static_init_wasm.cpp() #3 { // WEBASSEMBLY32: call void @__cxx_global_var_init() // // WEBASSEMBLY64: define internal void @__cxx_global_var_init() #3 { -// WEBASSEMBLY64: call %struct.A* @_ZN1AC1Ev(%struct.A* @theA) +// WEBASSEMBLY64: call frozen %struct.A* @_ZN1AC1Ev(%struct.A* frozen @theA) // WEBASSEMBLY64: define internal void @_GLOBAL__sub_I_static_init_wasm.cpp() #3 { // WEBASSEMBLY64: call void @__cxx_global_var_init() diff --git a/clang/test/CodeGenCXX/static-init.cpp b/clang/test/CodeGenCXX/static-init.cpp --- a/clang/test/CodeGenCXX/static-init.cpp +++ b/clang/test/CodeGenCXX/static-init.cpp @@ -28,7 +28,7 @@ } void g() { - // CHECK: call noalias nonnull i8* @_Znwm(i64 1) + // CHECK: call frozen noalias nonnull i8* @_Znwm(i64 frozen 1) // CHECK: call void @_ZN1AC1Ev( static A& a = *new A; } @@ -59,7 +59,7 @@ } namespace test1 { - // CHECK-LABEL: define internal i32 @_ZN5test1L6getvarEi( + // CHECK-LABEL: define internal frozen i32 @_ZN5test1L6getvarEi( static inline int getvar(int index) { static const int var[] = { 1, 0, 2, 4 }; return var[index]; @@ -74,7 +74,7 @@ namespace union_static_local { // CHECK-LABEL: define internal void @_ZZN18union_static_local4testEvEN1c4mainEv - // CHECK: call void @_ZN18union_static_local1fEPNS_1xE(%"union.union_static_local::x"* bitcast ({ [2 x i8*] }* @_ZZN18union_static_local4testEvE3foo to %"union.union_static_local::x"*)) + // CHECK: call void @_ZN18union_static_local1fEPNS_1xE(%"union.union_static_local::x"* frozen bitcast ({ [2 x i8*] }* @_ZZN18union_static_local4testEvE3foo to %"union.union_static_local::x"*)) union x { long double y; const char *x[2]; }; void f(union x*); void test() { @@ -111,14 +111,14 @@ // CHECK-LABEL: define void @_ZN5test21BC2Ev // CHECK: load atomic i8, i8* bitcast (i64* @_ZGVZN5test21BC1EvE1x to i8*) acquire, // CHECK: call i32 @__cxa_guard_acquire(i64* @_ZGVZN5test21BC1EvE1x) - // CHECK: [[T0:%.*]] = call i32 @_ZN5test23fooEv() + // CHECK: [[T0:%.*]] = call frozen i32 @_ZN5test23fooEv() // CHECK: store i32 [[T0]], i32* @_ZZN5test21BC1EvE1x, // CHECK: call void @__cxa_guard_release(i64* @_ZGVZN5test21BC1EvE1x) // CHECK-LABEL: define void @_ZN5test21BC1Ev // CHECK: load atomic i8, i8* bitcast (i64* @_ZGVZN5test21BC1EvE1x to i8*) acquire, // CHECK: call i32 @__cxa_guard_acquire(i64* @_ZGVZN5test21BC1EvE1x) - // CHECK: [[T0:%.*]] = call i32 @_ZN5test23fooEv() + // CHECK: [[T0:%.*]] = call frozen i32 @_ZN5test23fooEv() // CHECK: store i32 [[T0]], i32* @_ZZN5test21BC1EvE1x, // CHECK: call void @__cxa_guard_release(i64* @_ZGVZN5test21BC1EvE1x) @@ -130,7 +130,7 @@ // CHECK-LABEL: define void @_ZN5test21BD2Ev( // CHECK: load atomic i8, i8* bitcast (i64* @_ZGVZN5test21BD1EvE1y to i8*) acquire, // CHECK: call i32 @__cxa_guard_acquire(i64* @_ZGVZN5test21BD1EvE1y) - // CHECK: [[T0:%.*]] = call i32 @_ZN5test23fooEv() + // CHECK: [[T0:%.*]] = call frozen i32 @_ZN5test23fooEv() // CHECK: store i32 [[T0]], i32* @_ZZN5test21BD1EvE1y, // CHECK: call void @__cxa_guard_release(i64* @_ZGVZN5test21BD1EvE1y) @@ -170,6 +170,6 @@ void useit() { useStaticLocal(); } -// CHECK: define linkonce_odr nonnull align 8 dereferenceable(8) %"struct.test4::HasVTable"* @_ZN5test414useStaticLocalEv() +// CHECK: define linkonce_odr frozen nonnull align 8 dereferenceable(8) %"struct.test4::HasVTable"* @_ZN5test414useStaticLocalEv() // CHECK: ret %"struct.test4::HasVTable"*{{.*}} @_ZZN5test414useStaticLocalEvE3obj } diff --git a/clang/test/CodeGenCXX/static-initializer-branch-weights.cpp b/clang/test/CodeGenCXX/static-initializer-branch-weights.cpp --- a/clang/test/CodeGenCXX/static-initializer-branch-weights.cpp +++ b/clang/test/CodeGenCXX/static-initializer-branch-weights.cpp @@ -4,7 +4,7 @@ // CHECK-LABEL: define {{.*}}global_var_init // CHECK-NOT: br -// CHECK: call void @_ZN1SC1Ev({{.*}}* @global) +// CHECK: call void @_ZN1SC1Ev({{.*}}* frozen @global) S global; // CHECK-LABEL: define {{.*}}global_var_init @@ -15,12 +15,12 @@ // CHECK: icmp eq i8 {{.*}}, 0 // CHECK: br i1 // CHECK-NOT: !prof -// CHECK: call void @_ZN1SC1Ev({{.*}}* @inline_global) +// CHECK: call void @_ZN1SC1Ev({{.*}}* frozen @inline_global) inline S inline_global; // CHECK-LABEL: define {{.*}}global_var_init // CHECK-NOT: br -// CHECK: call void @_ZN1SC1Ev({{.*}}* @thread_local_global) +// CHECK: call void @_ZN1SC1Ev({{.*}}* frozen @thread_local_global) thread_local S thread_local_global; // CHECK-LABEL: define {{.*}}global_var_init @@ -28,7 +28,7 @@ // CHECK: icmp eq i8 {{.*}}, 0 // CHECK: br i1 // CHECK-NOT: !prof -// CHECK: call void @_ZN1SC1Ev({{.*}}* @thread_local_inline_global) +// CHECK: call void @_ZN1SC1Ev({{.*}}* frozen @thread_local_inline_global) thread_local inline S thread_local_inline_global; struct A { @@ -40,7 +40,7 @@ // CHECK: icmp eq i8 {{.*}}, 0 // CHECK: br i1 // CHECK-NOT: !prof - // CHECK: call void @_ZN1SC1Ev({{.*}}* @_ZN1A13inline_memberE) + // CHECK: call void @_ZN1SC1Ev({{.*}}* frozen @_ZN1A13inline_memberE) static inline S inline_member; // CHECK-LABEL: define {{.*}}global_var_init @@ -48,7 +48,7 @@ // CHECK: icmp eq i8 {{.*}}, 0 // CHECK: br i1 // CHECK-NOT: !prof - // CHECK: call void @_ZN1SC1Ev({{.*}}* @_ZN1A26thread_local_inline_memberE) + // CHECK: call void @_ZN1SC1Ev({{.*}}* frozen @_ZN1A26thread_local_inline_memberE) static thread_local inline S thread_local_inline_member; }; @@ -67,12 +67,12 @@ // CHECK-LABEL: define {{.*}}global_var_init // CHECK-NOT: br -// CHECK: call void @_ZN1SC1Ev({{.*}}* @_ZN1A6memberE) +// CHECK: call void @_ZN1SC1Ev({{.*}}* frozen @_ZN1A6memberE) S A::member; // CHECK-LABEL: define {{.*}}global_var_init // CHECK-NOT: br -// CHECK: call void @_ZN1SC1Ev({{.*}}* @_ZN1A19thread_local_memberE) +// CHECK: call void @_ZN1SC1Ev({{.*}}* frozen @_ZN1A19thread_local_memberE) thread_local S A::thread_local_member; template struct B { @@ -81,7 +81,7 @@ // CHECK: icmp eq i8 {{.*}}, 0 // CHECK: br i1 // CHECK-NOT: !prof - // CHECK: call void @_ZN1SC1Ev({{.*}}* @_ZN1BIiE6memberE) + // CHECK: call void @_ZN1SC1Ev({{.*}}* frozen @_ZN1BIiE6memberE) static S member; // CHECK-LABEL: define {{.*}}global_var_init @@ -89,7 +89,7 @@ // CHECK: icmp eq i8 {{.*}}, 0 // CHECK: br i1 // CHECK-NOT: !prof - // CHECK: call void @_ZN1SC1Ev({{.*}}* @_ZN1BIiE13inline_memberE) + // CHECK: call void @_ZN1SC1Ev({{.*}}* frozen @_ZN1BIiE13inline_memberE) static inline S inline_member; // CHECK-LABEL: define {{.*}}global_var_init @@ -97,7 +97,7 @@ // CHECK: icmp eq i8 {{.*}}, 0 // CHECK: br i1 // CHECK-NOT: !prof - // CHECK: call void @_ZN1SC1Ev({{.*}}* @_ZN1BIiE19thread_local_memberE) + // CHECK: call void @_ZN1SC1Ev({{.*}}* frozen @_ZN1BIiE19thread_local_memberE) static thread_local S thread_local_member; // CHECK-LABEL: define {{.*}}global_var_init @@ -105,7 +105,7 @@ // CHECK: icmp eq i8 {{.*}}, 0 // CHECK: br i1 // CHECK-NOT: !prof - // CHECK: call void @_ZN1SC1Ev({{.*}}* @_ZN1BIiE26thread_local_inline_memberE) + // CHECK: call void @_ZN1SC1Ev({{.*}}* frozen @_ZN1BIiE26thread_local_inline_memberE) static thread_local inline S thread_local_inline_member; }; template S B::member; diff --git a/clang/test/CodeGenCXX/static-local-in-local-class.cpp b/clang/test/CodeGenCXX/static-local-in-local-class.cpp --- a/clang/test/CodeGenCXX/static-local-in-local-class.cpp +++ b/clang/test/CodeGenCXX/static-local-in-local-class.cpp @@ -55,7 +55,7 @@ int f() { return x()(); } } -// CHECK-LABEL: define internal i32 @"_ZZNK14pr18020_lambda3$_0clEvENKUlvE_clEv" +// CHECK-LABEL: define internal frozen i32 @"_ZZNK14pr18020_lambda3$_0clEvENKUlvE_clEv" // CHECK: load i32, i32* @"_ZZNK14pr18020_lambda3$_0clEvE2l1" namespace pr18020_constexpr { @@ -70,7 +70,7 @@ int f() { return x()(); } } -// CHECK-LABEL: define internal i32 @"_ZZNK17pr18020_constexpr3$_1clEvENKUlvE_clEv" +// CHECK-LABEL: define internal frozen i32 @"_ZZNK17pr18020_constexpr3$_1clEvENKUlvE_clEv" // CHECK: load i32*, i32** @"_ZZZNK17pr18020_constexpr3$_1clEvENKUlvE_clEvE2l2" // Lambda-less reduction that references l1 before emitting it. This didn't @@ -87,7 +87,7 @@ static pr18020_class x; int pr18020_f() { return x()(); } -// CHECK-LABEL: define linkonce_odr i32 @_ZZN13pr18020_classclEvEN1UclEv +// CHECK-LABEL: define linkonce_odr frozen i32 @_ZZN13pr18020_classclEvEN1UclEv // CHECK: load i32, i32* @_ZZN13pr18020_classclEvE2l1 // In this test case, the function containing the static local will not be @@ -102,12 +102,12 @@ return *decltype(deduced_return())()(); } -// CHECK-LABEL: define i32 @call_deduced_return_operator() -// CHECK: call i32* @_ZZL14deduced_returnvEN1SclEv( +// CHECK-LABEL: define frozen i32 @call_deduced_return_operator() +// CHECK: call frozen i32* @_ZZL14deduced_returnvEN1SclEv( // CHECK: load i32, i32* % // CHECK: ret i32 % -// CHECK-LABEL: define internal i32* @_ZZL14deduced_returnvEN1SclEv(%struct.S* %this) +// CHECK-LABEL: define internal frozen i32* @_ZZL14deduced_returnvEN1SclEv(%struct.S* frozen %this) // CHECK: ret i32* @_ZZL14deduced_returnvE1n static auto block_deduced_return() { @@ -122,12 +122,12 @@ return *decltype(block_deduced_return())()(); } -// CHECK-LABEL: define i32 @call_block_deduced_return() -// CHECK: call i32* @_ZZZL20block_deduced_returnvEUb_EN1SclEv( +// CHECK-LABEL: define frozen i32 @call_block_deduced_return() +// CHECK: call frozen i32* @_ZZZL20block_deduced_returnvEUb_EN1SclEv( // CHECK: load i32, i32* % // CHECK: ret i32 % -// CHECK-LABEL: define internal i32* @_ZZZL20block_deduced_returnvEUb_EN1SclEv(%struct.S.6* %this) #1 align 2 { +// CHECK-LABEL: define internal frozen i32* @_ZZZL20block_deduced_returnvEUb_EN1SclEv(%struct.S.6* frozen %this) #1 align 2 { // CHECK: ret i32* @_ZZZL20block_deduced_returnvEUb_E1n inline auto static_local_label(void *p) { @@ -141,7 +141,7 @@ } void *global_label = decltype(static_local_label(0))::get(); -// CHECK-LABEL: define linkonce_odr i8* @_ZZ18static_local_labelPvEN1S3getEv() +// CHECK-LABEL: define linkonce_odr frozen i8* @_ZZ18static_local_labelPvEN1S3getEv() // CHECK: %[[lbl:[^ ]*]] = load i8*, i8** @_ZZ18static_local_labelPvE1q // CHECK: ret i8* %[[lbl]] @@ -153,8 +153,8 @@ extern "C" int use_global_lambda() { return *decltype(global_lambda())::get(); } -// CHECK-LABEL: define i32 @use_global_lambda() -// CHECK: call i32* @"_ZZNK3$_2clEvEN1S3getEv"() +// CHECK-LABEL: define frozen i32 @use_global_lambda() +// CHECK: call frozen i32* @"_ZZNK3$_2clEvEN1S3getEv"() -// CHECK-LABEL: define internal i32* @"_ZZNK3$_2clEvEN1S3getEv"() +// CHECK-LABEL: define internal frozen i32* @"_ZZNK3$_2clEvEN1S3getEv"() // CHECK: ret i32* @"_ZZNK3$_2clEvE1x" diff --git a/clang/test/CodeGenCXX/static-member-variable-explicit-specialization.cpp b/clang/test/CodeGenCXX/static-member-variable-explicit-specialization.cpp --- a/clang/test/CodeGenCXX/static-member-variable-explicit-specialization.cpp +++ b/clang/test/CodeGenCXX/static-member-variable-explicit-specialization.cpp @@ -77,37 +77,37 @@ int *use_internal_a = &Internal::a; // ALL: define internal void @[[unordered1]]( -// ALL: call i32 @foo() +// ALL: call frozen i32 @foo() // ALL: store {{.*}} @_ZN1AIsE1aE // ALL: ret // ALL: define internal void @[[unordered2]]( -// ALL: call i32 @foo() +// ALL: call frozen i32 @foo() // ALL: store {{.*}} @_Z1xIsE // ALL: ret // ALL: define internal void @[[unordered3]]( -// ALL: call i32 @foo() +// ALL: call frozen i32 @foo() // ALL: store {{.*}} @_ZN2ns1aIiE1iE // ALL: ret // ALL: define internal void @[[unordered4]]( -// ALL: call i32 @foo() +// ALL: call frozen i32 @foo() // ALL: store {{.*}} @_ZN2ns1b1iIiEE // ALL: ret // ALL: define internal void @[[unordered5]]( -// ALL: call i32 @foo() +// ALL: call frozen i32 @foo() // ALL: store {{.*}} @_ZN1AIvE1aE // ALL: ret // ALL: define internal void @[[unordered6]]( -// ALL: call i32 @foo() +// ALL: call frozen i32 @foo() // ALL: store {{.*}} @_Z1xIcE // ALL: ret // ALL: define internal void @[[unordered7]]( -// ALL: call i32 @foo() +// ALL: call frozen i32 @foo() // ALL: store {{.*}} @_ZN12_GLOBAL__N_18InternalIiE1aE // ALL: ret diff --git a/clang/test/CodeGenCXX/stmtexpr.cpp b/clang/test/CodeGenCXX/stmtexpr.cpp --- a/clang/test/CodeGenCXX/stmtexpr.cpp +++ b/clang/test/CodeGenCXX/stmtexpr.cpp @@ -130,7 +130,7 @@ // CHECK-LABEL: define{{.*}} i32 @cleanup_exit_lvalue({{.*}}) // CHECK: call {{.*}} @_ZN1AC1Ei // Spill after bar. -// CHECK: %[[v:[^ ]*]] = call nonnull align 4 dereferenceable(4) i32* @_Z6getrefv({{.*}}) +// CHECK: %[[v:[^ ]*]] = call frozen nonnull align 4 dereferenceable(4) i32* @_Z6getrefv({{.*}}) // CHECK-NEXT: store i32* %[[v]], i32** %[[tmp:[^, ]*]] // Do cleanup. // CHECK: call {{.*}} @_ZN1AD1Ev @@ -146,7 +146,7 @@ ByVal &r = (A(1), ({ if (cond) return 0; (void)ByVal(); }), arg); return r.x[0]; } -// CHECK-LABEL: define{{.*}} i32 @cleanup_exit_lvalue_byval({{.*}}, %struct.ByVal* byval(%struct.ByVal) align 4 %arg) +// CHECK-LABEL: define{{.*}} i32 @cleanup_exit_lvalue_byval({{.*}}, %struct.ByVal* frozen byval(%struct.ByVal) align 4 %arg) // CHECK: call {{.*}} @_ZN1AC1Ei // CHECK: call {{.*}} @_ZN1AD1Ev // CHECK: switch @@ -202,7 +202,7 @@ // CHECK-NOT: load volatile ({n;}); - // CHECK-LABEL: @then(i32 1) + // CHECK-LABEL: @then(i32 frozen 1) then(1); // CHECK-NOT: load volatile @@ -210,7 +210,7 @@ // CHECK-NOT: load volatile ({goto lab; lab: n;}); - // CHECK-LABEL: @then(i32 2) + // CHECK-LABEL: @then(i32 frozen 2) then(2); // CHECK-NOT: load volatile @@ -218,7 +218,7 @@ // CHECK-NOT: load volatile ({[[gsl::suppress("foo")]] n;}); - // CHECK-LABEL: @then(i32 3) + // CHECK-LABEL: @then(i32 frozen 3) then(3); // CHECK-NOT: load volatile @@ -239,7 +239,7 @@ // CHECK-NOT: load volatile ({n;}); - // CHECK-LABEL: @then(i32 1) + // CHECK-LABEL: @then(i32 frozen 1) then(1); // CHECK-NOT: load volatile @@ -247,7 +247,7 @@ // CHECK-NOT: load volatile ({goto lab; lab: n;}); - // CHECK-LABEL: @then(i32 2) + // CHECK-LABEL: @then(i32 frozen 2) then(2); // CHECK-NOT: load volatile @@ -255,7 +255,7 @@ // CHECK-NOT: load volatile ({[[gsl::suppress("foo")]] n;}); - // CHECK-LABEL: @then(i32 3) + // CHECK-LABEL: @then(i32 frozen 3) then(3); // CHECK-NOT: load volatile diff --git a/clang/test/CodeGenCXX/strict-vtable-pointers.cpp b/clang/test/CodeGenCXX/strict-vtable-pointers.cpp --- a/clang/test/CodeGenCXX/strict-vtable-pointers.cpp +++ b/clang/test/CodeGenCXX/strict-vtable-pointers.cpp @@ -95,7 +95,7 @@ // CHECK-NEW: %[[THIS3:.*]] = call i8* @llvm.launder.invariant.group.p0i8(i8* %[[THIS2:.*]]) // CHECK-NEW: %[[THIS4:.*]] = bitcast i8* %[[THIS3]] to %[[DynamicDerived:.*]]* -// CHECK-NEW: call void @_ZN14DynamicDerivedC1Ev(%[[DynamicDerived:.*]]* %[[THIS4]]) +// CHECK-NEW: call void @_ZN14DynamicDerivedC1Ev(%[[DynamicDerived:.*]]* frozen %[[THIS4]]) // CHECK-NEW-LABEL: {{^}}} void Pointers1() { DynamicBase1 *DB = new DynamicBase1; @@ -141,7 +141,7 @@ // CHECK-CTORS: %[[THIS2:.*]] = call i8* @llvm.launder.invariant.group.p0i8(i8* %[[THIS1:.*]]) // CHECK-CTORS: %[[THIS3:.*]] = bitcast i8* %[[THIS2]] to %[[DynamicDerived]]* // CHECK-CTORS: %[[THIS4:.*]] = bitcast %[[DynamicDerived]]* %[[THIS3]] to %[[DynamicBase:.*]]* -// CHECK-CTORS: call void @_ZN12DynamicBase1C2Ev(%[[DynamicBase]]* %[[THIS4]]) +// CHECK-CTORS: call void @_ZN12DynamicBase1C2Ev(%[[DynamicBase]]* frozen %[[THIS4]]) // CHECK-CTORS: %[[THIS5:.*]] = bitcast %struct.DynamicDerived* %[[THIS0]] to i32 (...)*** // CHECK-CTORS: store {{.*}} %[[THIS5]] @@ -155,7 +155,7 @@ // CHECK-CTORS: %[[THIS2:.*]] = call i8* @llvm.launder.invariant.group.p0i8(i8* %[[THIS1]]) // CHECK-CTORS: %[[THIS3:.*]] = bitcast i8* %[[THIS2]] to %[[CLASS]]* // CHECK-CTORS: %[[THIS4:.*]] = bitcast %[[CLASS]]* %[[THIS3]] to %[[BASE_CLASS:.*]]* -// CHECK-CTORS: call void @_ZN12DynamicBase1C2Ev(%[[BASE_CLASS]]* %[[THIS4]]) +// CHECK-CTORS: call void @_ZN12DynamicBase1C2Ev(%[[BASE_CLASS]]* frozen %[[THIS4]]) // CHECK-CTORS: call i8* @llvm.launder.invariant.group.p0i8( @@ -347,7 +347,7 @@ struct X; // We have to also introduce the barriers if comparing pointers to incomplete // objects -// CHECK-NEW-LABEL: define zeroext i1 @_Z8compare4P1XS0_ +// CHECK-NEW-LABEL: define frozen zeroext i1 @_Z8compare4P1XS0_ bool compare4(X *x, X *x2) { // CHECK-NEW: %[[x:.*]] = call i8* @llvm.strip.invariant.group.p0i8(i8* // CHECK-NEW: %[[xp:.*]] = bitcast i8* %[[x]] to %struct.X* @@ -380,7 +380,7 @@ // CHECK-NEW: [[BPM:%.*]] = alloca i32* A *ap = new A; - // CHECK-NEW: call void %{{.*}}(%struct.A* %{{.*}}) + // CHECK-NEW: call void %{{.*}}(%struct.A* frozen %{{.*}}) ap->foo(); // CHECK-NEW: [[TMP7:%.*]] = load %struct.A*, %struct.A** [[AP]] // CHECK-NEW: [[TMP8:%.*]] = bitcast %struct.A* [[TMP7]] to i8* diff --git a/clang/test/CodeGenCXX/switch-case-folding-2.cpp b/clang/test/CodeGenCXX/switch-case-folding-2.cpp --- a/clang/test/CodeGenCXX/switch-case-folding-2.cpp +++ b/clang/test/CodeGenCXX/switch-case-folding-2.cpp @@ -8,7 +8,7 @@ case 4: do { switch (6) { - // CHECK: call i32 (i8*, ...) @_Z6printfPKcz + // CHECK: call frozen i32 (i8*, ...) @_Z6printfPKcz case 6: do { case 5: printf("bad\n"); } while (0); }; } while (0); diff --git a/clang/test/CodeGenCXX/temp-order.cpp b/clang/test/CodeGenCXX/temp-order.cpp --- a/clang/test/CodeGenCXX/temp-order.cpp +++ b/clang/test/CodeGenCXX/temp-order.cpp @@ -157,47 +157,47 @@ #define ORDER5(a, b, c, d, e) (ORDER4(a, b, c, d) * pow(e, 5)) #define ORDER6(a, b, c, d, e, f) (ORDER5(a, b, c, d, e) * pow(f, 6)) void test() { -// CHECK: call void @print(i8* {{.*}}, i32 1176) +// CHECK: call void @print(i8* {{.*}}, i32 frozen 1176) print("f0", f0()); if (f0() != ORDER3(3, 7, 2)) error(); -// CHECK: call void @print(i8* {{.*}}, i32 411600) +// CHECK: call void @print(i8* {{.*}}, i32 frozen 411600) print("f1", f1()); if (f1() != ORDER4(3, 5, 7, 2)) error(); -// CHECK: call void @print(i8* {{.*}}, i32 246960) +// CHECK: call void @print(i8* {{.*}}, i32 frozen 246960) print("f2", f2()); if (f2() != ORDER4(5, 3, 7, 2)) error(); -// CHECK: call void @print(i8* {{.*}}, i32 1341648) +// CHECK: call void @print(i8* {{.*}}, i32 frozen 1341648) print("f3", f3()); if (f3() != ORDER4(7, 3, 11, 2)) error(); -// CHECK: call void @print(i8* {{.*}}, i32 1176) +// CHECK: call void @print(i8* {{.*}}, i32 frozen 1176) print("f4", f4()); if (f4() != ORDER3(3, 7, 2)) error(); -// CHECK: call void @print(i8* {{.*}}, i32 246960) +// CHECK: call void @print(i8* {{.*}}, i32 frozen 246960) print("f5", f5()); if (f5() != ORDER4(5, 3, 7, 2)) error(); -// CHECK: call void @print(i8* {{.*}}, i32 1251552576) +// CHECK: call void @print(i8* {{.*}}, i32 frozen 1251552576) print("f6", f6()); if (f6() != ORDER6(3, 7, 11, 5, 13, 2)) error(); -// CHECK: call void @print(i8* {{.*}}, i32 20) +// CHECK: call void @print(i8* {{.*}}, i32 frozen 20) print("f7", f7()); if (f7() != ORDER2(5, 2)) error(); -// CHECK: call void @print(i8* {{.*}}, i32 20) +// CHECK: call void @print(i8* {{.*}}, i32 frozen 20) print("f8", f8()); if (f8() != ORDER2(5, 2)) error(); diff --git a/clang/test/CodeGenCXX/template-anonymous-types.cpp b/clang/test/CodeGenCXX/template-anonymous-types.cpp --- a/clang/test/CodeGenCXX/template-anonymous-types.cpp +++ b/clang/test/CodeGenCXX/template-anonymous-types.cpp @@ -19,18 +19,18 @@ void test() { // Look for two instantiations, one for FOO's // type and one for BAR's. - // CHECK-LABEL: define linkonce_odr i32 @_Z1fIN1SUt_EEiT_(i32 %t) + // CHECK-LABEL: define linkonce_odr frozen i32 @_Z1fIN1SUt_EEiT_(i32 frozen %t) (void)f(S::FOO); - // CHECK-LABEL: define linkonce_odr i32 @_Z1fIN1SUt0_EEiT_(i32 %t) + // CHECK-LABEL: define linkonce_odr frozen i32 @_Z1fIN1SUt0_EEiT_(i32 frozen %t) (void)f(S::BAR); // Now check for the class template instantiations. // // BAR's instantiation of X: - // CHECK-LABEL: define linkonce_odr i32 @_ZN1XIN1SUt_EE1fEv(%struct.X* %this) - // CHECK-LABEL: define linkonce_odr void @_ZN1XIN1SUt_EEC2ES1_(%struct.X* %this, i32 %t) unnamed_addr + // CHECK-LABEL: define linkonce_odr frozen i32 @_ZN1XIN1SUt_EE1fEv(%struct.X* frozen %this) + // CHECK-LABEL: define linkonce_odr void @_ZN1XIN1SUt_EEC2ES1_(%struct.X* frozen %this, i32 frozen %t) unnamed_addr // // FOO's instantiation of X: - // CHECK-LABEL: define linkonce_odr i32 @_ZN1XIN1SUt0_EE1fEv(%struct.X.0* %this) - // CHECK-LABEL: define linkonce_odr void @_ZN1XIN1SUt0_EEC2ES1_(%struct.X.0* %this, i32 %t) unnamed_addr + // CHECK-LABEL: define linkonce_odr frozen i32 @_ZN1XIN1SUt0_EE1fEv(%struct.X.0* frozen %this) + // CHECK-LABEL: define linkonce_odr void @_ZN1XIN1SUt0_EEC2ES1_(%struct.X.0* frozen %this, i32 frozen %t) unnamed_addr } diff --git a/clang/test/CodeGenCXX/template-instantiation.cpp b/clang/test/CodeGenCXX/template-instantiation.cpp --- a/clang/test/CodeGenCXX/template-instantiation.cpp +++ b/clang/test/CodeGenCXX/template-instantiation.cpp @@ -18,7 +18,7 @@ // CHECK2-NOT: _ZTVN5test31SIiEE // CHECK2-NOT: _ZTSN5test31SIiEE -// CHECK-LABEL: define linkonce_odr void @_ZN5test21CIiEC1Ev(%"class.test2::C"* %this) unnamed_addr +// CHECK-LABEL: define linkonce_odr void @_ZN5test21CIiEC1Ev(%"class.test2::C"* frozen %this) unnamed_addr // CHECK-LABEL: define linkonce_odr void @_ZN5test21CIiE6foobarIdEEvT_( // CHECK-LABEL: define available_externally void @_ZN5test21CIiE6zedbarEd( diff --git a/clang/test/CodeGenCXX/template-linkage.cpp b/clang/test/CodeGenCXX/template-linkage.cpp --- a/clang/test/CodeGenCXX/template-linkage.cpp +++ b/clang/test/CodeGenCXX/template-linkage.cpp @@ -40,7 +40,7 @@ extern template struct X0; extern template struct X1; -// CHECK-LABEL: define linkonce_odr void @_ZN2X1IcED1Ev(%struct.X1* %this) unnamed_addr +// CHECK-LABEL: define linkonce_odr void @_ZN2X1IcED1Ev(%struct.X1* frozen %this) unnamed_addr void test_X1() { X1 i1c; } diff --git a/clang/test/CodeGenCXX/temporaries.cpp b/clang/test/CodeGenCXX/temporaries.cpp --- a/clang/test/CodeGenCXX/temporaries.cpp +++ b/clang/test/CodeGenCXX/temporaries.cpp @@ -1,6 +1,6 @@ -// RUN: %clang_cc1 -emit-llvm %s -o - -triple=x86_64-apple-darwin9 -std=c++11 | FileCheck %s -check-prefixes=CHECK,NULL-INVALID,CHECK-CXX11 -// RUN: %clang_cc1 -emit-llvm %s -o - -triple=x86_64-apple-darwin9 -std=c++17 | FileCheck %s -check-prefixes=CHECK,NULL-INVALID,CHECK-CXX17 -// RUN: %clang_cc1 -emit-llvm %s -o - -triple=x86_64-apple-darwin9 -std=c++11 -fno-delete-null-pointer-checks | FileCheck %s -check-prefixes=CHECK,NULL-VALID,CHECK-CXX11 +// RUN: %clang_cc1 -disable-frozen-args -emit-llvm %s -o - -triple=x86_64-apple-darwin9 -std=c++11 | FileCheck %s -check-prefixes=CHECK,NULL-INVALID,CHECK-CXX11 +// RUN: %clang_cc1 -disable-frozen-args -emit-llvm %s -o - -triple=x86_64-apple-darwin9 -std=c++17 | FileCheck %s -check-prefixes=CHECK,NULL-INVALID,CHECK-CXX17 +// RUN: %clang_cc1 -disable-frozen-args -emit-llvm %s -o - -triple=x86_64-apple-darwin9 -std=c++11 -fno-delete-null-pointer-checks | FileCheck %s -check-prefixes=CHECK,NULL-VALID,CHECK-CXX11 namespace PR16263 { const unsigned int n = 1234; @@ -190,11 +190,11 @@ B::B() // CHECK: call void @_ZN6PR50771AC1Ev - // CHECK: call i32 @_ZN6PR50771A1fEv + // CHECK: call frozen i32 @_ZN6PR50771A1fEv // CHECK: call void @_ZN6PR50771AD1Ev : a1(A().f()) // CHECK: call void @_ZN6PR50771AC1Ev - // CHECK: call i32 @_ZN6PR50771gERKNS_1AE + // CHECK: call frozen i32 @_ZN6PR50771gERKNS_1AE // CHECK: call void @_ZN6PR50771AD1Ev , a2(g(A())) { @@ -321,8 +321,8 @@ // CHECK-LABEL: define void @_ZN3T121gEv void g() { // CHECK: call void @_ZN3T121AC1Ev - // CHECK-NEXT: call i32 @_ZN3T121A1fEv( - // CHECK-NEXT: call {{(nonnull )?}}align {{[0-9]+}} dereferenceable({{[0-9]+}}) i32* @_ZN3T121fEi( + // CHECK-NEXT: call frozen i32 @_ZN3T121A1fEv( + // CHECK-NEXT: call frozen {{(nonnull )?}}align {{[0-9]+}} dereferenceable({{[0-9]+}}) i32* @_ZN3T121fEi( // CHECK-NEXT: call void @_ZN3T121AD1Ev( int& i = f(A().f()); } @@ -337,8 +337,8 @@ struct D; D& zed(B); void foobar() { - // NULL-INVALID: call nonnull align 1 %"struct.PR6648::D"* @_ZN6PR66483zedENS_1BE - // NULL-VALID: call align 1 %"struct.PR6648::D"* @_ZN6PR66483zedENS_1BE + // NULL-INVALID: call frozen nonnull align 1 %"struct.PR6648::D"* @_ZN6PR66483zedENS_1BE + // NULL-VALID: call frozen align 1 %"struct.PR6648::D"* @_ZN6PR66483zedENS_1BE zed(foo); } } diff --git a/clang/test/CodeGenCXX/thiscall-struct-return.cpp b/clang/test/CodeGenCXX/thiscall-struct-return.cpp --- a/clang/test/CodeGenCXX/thiscall-struct-return.cpp +++ b/clang/test/CodeGenCXX/thiscall-struct-return.cpp @@ -31,11 +31,11 @@ // CHECK-LABEL: define void @_Z4testv() void test( void ) { -// CHECK: call void @_ZN1CC1Ev(%class.C* [[C:%.+]]) +// CHECK: call void @_ZN1CC1Ev(%class.C* frozen [[C:%.+]]) C c; -// CHECK: call x86_thiscallcc void @_ZNK1C5SmallEv(%struct.S* sret align 4 %{{.+}}, %class.C* [[C]]) +// CHECK: call x86_thiscallcc void @_ZNK1C5SmallEv(%struct.S* sret align 4 %{{.+}}, %class.C* frozen [[C]]) (void)c.Small(); -// CHECK: call x86_thiscallcc void @_ZNK1C6MediumEv(%struct.M* sret align 4 %{{.+}}, %class.C* [[C]]) +// CHECK: call x86_thiscallcc void @_ZNK1C6MediumEv(%struct.M* sret align 4 %{{.+}}, %class.C* frozen [[C]]) (void)c.Medium(); } diff --git a/clang/test/CodeGenCXX/throw-expressions.cpp b/clang/test/CodeGenCXX/throw-expressions.cpp --- a/clang/test/CodeGenCXX/throw-expressions.cpp +++ b/clang/test/CodeGenCXX/throw-expressions.cpp @@ -23,7 +23,7 @@ int test5(bool x, bool y, int z) { return (x ? throw 1 : y) ? z : throw 2; } -// CHECK-LABEL: define i32 @_Z5test5bbi( +// CHECK-LABEL: define frozen i32 @_Z5test5bbi( // CHECK: br i1 // // x.true: @@ -47,7 +47,7 @@ int test6(bool x, bool y, int z) { return (x ? throw 1 : y) ? z : (throw 2); } -// CHECK-LABEL: define i32 @_Z5test6bbi( +// CHECK-LABEL: define frozen i32 @_Z5test6bbi( // CHECK: br i1 // // x.true: @@ -103,7 +103,7 @@ cond ? throw test7 : val; } -// CHECK-LABEL: define nonnull align 4 dereferenceable(4) i32* @_Z5test8b( +// CHECK-LABEL: define frozen nonnull align 4 dereferenceable(4) i32* @_Z5test8b( int &test8(bool cond) { // CHECK: br i1 // diff --git a/clang/test/CodeGenCXX/thunk-linkonce-odr.cpp b/clang/test/CodeGenCXX/thunk-linkonce-odr.cpp --- a/clang/test/CodeGenCXX/thunk-linkonce-odr.cpp +++ b/clang/test/CodeGenCXX/thunk-linkonce-odr.cpp @@ -29,5 +29,5 @@ // Thunks should be marked as "linkonce ODR" not "weak". // -// CHECK: define linkonce_odr i32 @_ZThn{{[48]}}_N1D1fEv -// CHECK: define linkonce_odr i32 @_ZThn{{[48]}}_N1C1fEv +// CHECK: define linkonce_odr frozen i32 @_ZThn{{[48]}}_N1D1fEv +// CHECK: define linkonce_odr frozen i32 @_ZThn{{[48]}}_N1C1fEv diff --git a/clang/test/CodeGenCXX/thunk-returning-memptr.cpp b/clang/test/CodeGenCXX/thunk-returning-memptr.cpp --- a/clang/test/CodeGenCXX/thunk-returning-memptr.cpp +++ b/clang/test/CodeGenCXX/thunk-returning-memptr.cpp @@ -23,5 +23,5 @@ // Because of the tail call, the return value cannot be copied into a local // alloca. (PR39901) -// CHECK-LABEL: define linkonce_odr void @_ZThn4_N1C1fEv({ i32, i32 }* noalias sret align 4 %agg.result, %struct.C* %this) +// CHECK-LABEL: define linkonce_odr void @_ZThn4_N1C1fEv({ i32, i32 }* noalias sret align 4 %agg.result, %struct.C* frozen %this) // CHECK: tail call void @_ZN1C1fEv({ i32, i32 }* sret align 4 %agg.result diff --git a/clang/test/CodeGenCXX/thunks-ehspec.cpp b/clang/test/CodeGenCXX/thunks-ehspec.cpp --- a/clang/test/CodeGenCXX/thunks-ehspec.cpp +++ b/clang/test/CodeGenCXX/thunks-ehspec.cpp @@ -17,13 +17,13 @@ }; void C::primary_key() {} -// CHECK-LABEL: define available_externally void @_ZThn8_N1C9secondaryEv(%class.C* %this) +// CHECK-LABEL: define available_externally void @_ZThn8_N1C9secondaryEv(%class.C* frozen %this) // CHECK-NOT: invoke -// CHECK: tail call void @_ZN1C9secondaryEv(%class.C* %{{.*}}) +// CHECK: tail call void @_ZN1C9secondaryEv(%class.C* frozen %{{.*}}) // CHECK-NOT: invoke // CHECK: ret void -// CHECK-LABEL: define available_externally void @_ZThn8_N1C16secondary_varargEiz(%class.C* %this, i32 %0, ...) +// CHECK-LABEL: define available_externally void @_ZThn8_N1C16secondary_varargEiz(%class.C* frozen %this, i32 frozen %0, ...) // CHECK-NOT: invoke -// CHECK: musttail call void (%class.C*, i32, ...) @_ZN1C16secondary_varargEiz(%class.C* %{{.*}}, i32 %{{.*}}, ...) #2 +// CHECK: musttail call void (%class.C*, i32, ...) @_ZN1C16secondary_varargEiz(%class.C* frozen %{{.*}}, i32 frozen %{{.*}}, ...) #2 // CHECK-NEXT: ret void diff --git a/clang/test/CodeGenCXX/thunks.cpp b/clang/test/CodeGenCXX/thunks.cpp --- a/clang/test/CodeGenCXX/thunks.cpp +++ b/clang/test/CodeGenCXX/thunks.cpp @@ -87,8 +87,8 @@ virtual V2 *f(); }; -// CHECK: define %{{.*}}* @_ZTch0_v0_n24_N5Test31B1fEv( -// WIN64: define weak_odr dso_local %{{.*}} @"?f@B@Test3@@QEAAPEAUV1@2@XZ"( +// CHECK: define frozen %{{.*}}* @_ZTch0_v0_n24_N5Test31B1fEv( +// WIN64: define weak_odr dso_local frozen %{{.*}} @"?f@B@Test3@@QEAAPEAUV1@2@XZ"( V2 *B::f() { return 0; } } @@ -327,10 +327,10 @@ // CHECK-DBG-NOT: dbg.declare // CHECK: ret - // WIN64-LABEL: define dso_local %{{.*}}* @"?f@C@Test11@@UEAAPEAU12@XZ"(i8* + // WIN64-LABEL: define dso_local frozen %{{.*}}* @"?f@C@Test11@@UEAAPEAU12@XZ"(i8* - // WIN64-LABEL: define weak_odr dso_local %{{.*}}* @"?f@C@Test11@@QEAAPEAUA@2@XZ"(i8* - // WIN64: call %{{.*}}* @"?f@C@Test11@@UEAAPEAU12@XZ"(i8* %{{.*}}) + // WIN64-LABEL: define weak_odr dso_local frozen %{{.*}}* @"?f@C@Test11@@QEAAPEAUA@2@XZ"(i8* + // WIN64: call frozen %{{.*}}* @"?f@C@Test11@@UEAAPEAU12@XZ"(i8* frozen %{{.*}}) // // Match the vbtable return adjustment. // WIN64: load i32*, i32** %{{[^,]*}}, align 8 @@ -372,15 +372,15 @@ // FIXME: The weak_odr linkage is probably not necessary and just an artifact // of Itanium ABI details. // WIN64-LABEL: define dso_local {{.*}} @"?f@C@Test12@@UEAAPEAU12@HZZ"( - // WIN64: call %{{.*}}* @"?makeC@Test12@@YAPEAUC@1@XZ"() + // WIN64: call frozen %{{.*}}* @"?makeC@Test12@@YAPEAUC@1@XZ"() // // This thunk needs return adjustment, clone. // WIN64-LABEL: define weak_odr dso_local {{.*}} @"?f@C@Test12@@W7EAAPEAUB@2@HZZ"( - // WIN64: call %{{.*}}* @"?makeC@Test12@@YAPEAUC@1@XZ"() + // WIN64: call frozen %{{.*}}* @"?makeC@Test12@@YAPEAUC@1@XZ"() // WIN64: getelementptr inbounds i8, i8* %{{.*}}, i32 8 // // Musttail call back to the A implementation after this adjustment from B to A. - // WIN64-LABEL: define linkonce_odr dso_local %{{.*}}* @"?f@C@Test12@@W7EAAPEAU12@HZZ"( + // WIN64-LABEL: define linkonce_odr dso_local frozen %{{.*}}* @"?f@C@Test12@@W7EAAPEAU12@HZZ"( // WIN64: getelementptr i8, i8* %{{[^,]*}}, i32 -8 // WIN64: musttail call {{.*}} @"?f@C@Test12@@UEAAPEAU12@HZZ"( C c; @@ -412,7 +412,7 @@ // CHECK: getelementptr inbounds i8, i8* {{.*}}, i64 8 // CHECK: ret %"struct.Test13::D"* - // WIN64-LABEL: define weak_odr dso_local nonnull align 8 dereferenceable(8) %"struct.Test13::D"* @"?foo1@D@Test13@@$4PPPPPPPE@A@EAAAEAUB1@2@XZ"( + // WIN64-LABEL: define weak_odr dso_local frozen nonnull align 8 dereferenceable(8) %"struct.Test13::D"* @"?foo1@D@Test13@@$4PPPPPPPE@A@EAAAEAUB1@2@XZ"( // This adjustment. // WIN64: getelementptr inbounds i8, i8* {{.*}}, i64 -12 // Call implementation. @@ -510,9 +510,9 @@ // CHECK-TAIL: musttail call {{.*}} @_ZN6Test171C1fEPKcz({{.*}}, ...) // MSVC-LABEL: define linkonce_odr dso_local void @"?f@C@Test17@@G7EAAXPEBDZZ" -// MSVC-SAME: (%"class.Test17::C"* %this, i8* %[[ARG:[^,]+]], ...) +// MSVC-SAME: (%"class.Test17::C"* frozen %this, i8* frozen %[[ARG:[^,]+]], ...) // MSVC: getelementptr i8, i8* %{{.*}}, i32 -8 -// MSVC: musttail call void (%"class.Test17::C"*, i8*, ...) @"?f@C@Test17@@EEAAXPEBDZZ"(%"class.Test17::C"* %{{.*}}, i8* %[[ARG]], ...) +// MSVC: musttail call void (%"class.Test17::C"*, i8*, ...) @"?f@C@Test17@@EEAAXPEBDZZ"(%"class.Test17::C"* frozen %{{.*}}, i8* frozen %[[ARG]], ...) } /**** The following has to go at the end of the file ****/ @@ -529,7 +529,7 @@ // CHECK-NONOPT-LABEL: define linkonce_odr void @_ZThn8_N6Test101C3fooEv // Checking with opt -// CHECK-OPT-LABEL: define internal void @_ZThn8_N6Test4B12_GLOBAL__N_11C1fEv(%"struct.Test4B::(anonymous namespace)::C"* %this) unnamed_addr #0 align 2 +// CHECK-OPT-LABEL: define internal void @_ZThn8_N6Test4B12_GLOBAL__N_11C1fEv(%"struct.Test4B::(anonymous namespace)::C"* frozen %this) unnamed_addr #0 align 2 // This is from Test5: // CHECK-OPT-LABEL: define linkonce_odr void @_ZTv0_n24_N5Test51B1fEv diff --git a/clang/test/CodeGenCXX/tls-init-funcs.cpp b/clang/test/CodeGenCXX/tls-init-funcs.cpp --- a/clang/test/CodeGenCXX/tls-init-funcs.cpp +++ b/clang/test/CodeGenCXX/tls-init-funcs.cpp @@ -6,13 +6,13 @@ // CHECK: @_ZZ3inlvE3loc = linkonce_odr thread_local global i32 0 // CHECK: @_tlv_atexit({{.*}}@_ZN1AD1Ev // CHECK: call cxx_fast_tlscc i32* @_ZTW3ext() -// CHECK: declare cxx_fast_tlscc i32* @_ZTW3ext() -// CHECK-DAG: define weak_odr hidden cxx_fast_tlscc i32* @_ZTW2vtIiE() -// CHECK-DAG: define weak_odr hidden cxx_fast_tlscc i32* @_ZTW2vtIvE() +// CHECK: declare cxx_fast_tlscc frozen i32* @_ZTW3ext() +// CHECK-DAG: define weak_odr hidden cxx_fast_tlscc frozen i32* @_ZTW2vtIiE() +// CHECK-DAG: define weak_odr hidden cxx_fast_tlscc frozen i32* @_ZTW2vtIvE() // CHECK-DAG: define {{.*}} @_ZTW1a -// MINGW-DAG: define weak_odr hidden i32* @_ZTW2vtIiE() {{.*}} comdat -// MINGW-DAG: define weak_odr hidden i32* @_ZTW2vtIvE() {{.*}} comdat +// MINGW-DAG: define weak_odr hidden frozen i32* @_ZTW2vtIiE() {{.*}} comdat +// MINGW-DAG: define weak_odr hidden frozen i32* @_ZTW2vtIvE() {{.*}} comdat struct A { ~A(); diff --git a/clang/test/CodeGenCXX/trivial-auto-var-init.cpp b/clang/test/CodeGenCXX/trivial-auto-var-init.cpp --- a/clang/test/CodeGenCXX/trivial-auto-var-init.cpp +++ b/clang/test/CodeGenCXX/trivial-auto-var-init.cpp @@ -39,12 +39,12 @@ // ZERO: %block = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i8* }>, align 8 // ZERO: %captured1 = getelementptr inbounds %struct.__block_byref_captured, %struct.__block_byref_captured* %captured, i32 0, i32 4 // ZERO-NEXT: store %struct.XYZ* null, %struct.XYZ** %captured1, align 8 -// ZERO: %call = call %struct.XYZ* @create( +// ZERO: %call = call frozen %struct.XYZ* @create( // PATTERN-LABEL: test_block_self_init( // PATTERN: %block = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i8* }>, align 8 // PATTERN: %captured1 = getelementptr inbounds %struct.__block_byref_captured, %struct.__block_byref_captured* %captured, i32 0, i32 4 // PATTERN-NEXT: store %struct.XYZ* inttoptr (i64 -6148914691236517206 to %struct.XYZ*), %struct.XYZ** %captured1, align 8 -// PATTERN: %call = call %struct.XYZ* @create( +// PATTERN: %call = call frozen %struct.XYZ* @create( using Block = void (^)(); typedef struct XYZ { Block block; @@ -63,12 +63,12 @@ // ZERO: %block = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i8* }>, align 8 // ZERO: %captured1 = getelementptr inbounds %struct.__block_byref_captured.1, %struct.__block_byref_captured.1* %captured, i32 0, i32 4 // ZERO-NEXT: store %struct.XYZ* null, %struct.XYZ** %captured1, align 8 -// ZERO: %call = call %struct.XYZ* @create( +// ZERO: %call = call frozen %struct.XYZ* @create( // PATTERN-LABEL: test_block_captures_self_after_init( // PATTERN: %block = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i8* }>, align 8 // PATTERN: %captured1 = getelementptr inbounds %struct.__block_byref_captured.1, %struct.__block_byref_captured.1* %captured, i32 0, i32 4 // PATTERN-NEXT: store %struct.XYZ* inttoptr (i64 -6148914691236517206 to %struct.XYZ*), %struct.XYZ** %captured1, align 8 -// PATTERN: %call = call %struct.XYZ* @create( +// PATTERN: %call = call frozen %struct.XYZ* @create( void test_block_captures_self_after_init() { extern xyz_t create(Block block); __block xyz_t captured; diff --git a/clang/test/CodeGenCXX/trivial_abi.cpp b/clang/test/CodeGenCXX/trivial_abi.cpp --- a/clang/test/CodeGenCXX/trivial_abi.cpp +++ b/clang/test/CodeGenCXX/trivial_abi.cpp @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -triple arm64-apple-ios11 -std=c++11 -fcxx-exceptions -fexceptions -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple arm64-apple-ios11 -std=c++11 -fcxx-exceptions -fexceptions -fclang-abi-compat=4.0 -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args -triple arm64-apple-ios11 -std=c++11 -fcxx-exceptions -fexceptions -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args -triple arm64-apple-ios11 -std=c++11 -fcxx-exceptions -fexceptions -fclang-abi-compat=4.0 -emit-llvm -o - %s | FileCheck %s // CHECK: %[[STRUCT_SMALL:.*]] = type { i32* } // CHECK: %[[STRUCT_LARGE:.*]] = type { i32*, [128 x i32] } @@ -48,7 +48,7 @@ // CHECK: %[[COERCE_DIVE:.*]] = getelementptr inbounds %[[STRUCT_SMALL]], %[[STRUCT_SMALL]]* %[[A]], i32 0, i32 0 // CHECK: %[[COERCE_VAL_IP:.*]] = inttoptr i64 %[[A_COERCE]] to i32* // CHECK: store i32* %[[COERCE_VAL_IP]], i32** %[[COERCE_DIVE]], align 8 -// CHECK: %[[CALL:.*]] = call %[[STRUCT_SMALL]]* @_ZN5SmallD1Ev(%[[STRUCT_SMALL]]* %[[A]]) +// CHECK: %[[CALL:.*]] = call frozen %[[STRUCT_SMALL]]* @_ZN5SmallD1Ev(%[[STRUCT_SMALL]]* %[[A]]) // CHECK: ret void // CHECK: } @@ -57,7 +57,7 @@ // CHECK: define i64 @_Z15testReturnSmallv() // CHECK: %[[RETVAL:.*]] = alloca %[[STRUCT_SMALL:.*]], align 8 -// CHECK: %[[CALL:.*]] = call %[[STRUCT_SMALL]]* @_ZN5SmallC1Ev(%[[STRUCT_SMALL]]* %[[RETVAL]]) +// CHECK: %[[CALL:.*]] = call frozen %[[STRUCT_SMALL]]* @_ZN5SmallC1Ev(%[[STRUCT_SMALL]]* %[[RETVAL]]) // CHECK: %[[COERCE_DIVE:.*]] = getelementptr inbounds %[[STRUCT_SMALL]], %[[STRUCT_SMALL]]* %[[RETVAL]], i32 0, i32 0 // CHECK: %[[V0:.*]] = load i32*, i32** %[[COERCE_DIVE]], align 8 // CHECK: %[[COERCE_VAL_PI:.*]] = ptrtoint i32* %[[V0]] to i64 @@ -72,13 +72,13 @@ // CHECK: define void @_Z14testCallSmall0v() // CHECK: %[[T:.*]] = alloca %[[STRUCT_SMALL:.*]], align 8 // CHECK: %[[AGG_TMP:.*]] = alloca %[[STRUCT_SMALL]], align 8 -// CHECK: %[[CALL:.*]] = call %[[STRUCT_SMALL]]* @_ZN5SmallC1Ev(%[[STRUCT_SMALL]]* %[[T]]) -// CHECK: %[[CALL1:.*]] = call %[[STRUCT_SMALL]]* @_ZN5SmallC1ERKS_(%[[STRUCT_SMALL]]* %[[AGG_TMP]], %[[STRUCT_SMALL]]* nonnull align 8 dereferenceable(8) %[[T]]) +// CHECK: %[[CALL:.*]] = call frozen %[[STRUCT_SMALL]]* @_ZN5SmallC1Ev(%[[STRUCT_SMALL]]* %[[T]]) +// CHECK: %[[CALL1:.*]] = call frozen %[[STRUCT_SMALL]]* @_ZN5SmallC1ERKS_(%[[STRUCT_SMALL]]* %[[AGG_TMP]], %[[STRUCT_SMALL]]* nonnull align 8 dereferenceable(8) %[[T]]) // CHECK: %[[COERCE_DIVE:.*]] = getelementptr inbounds %[[STRUCT_SMALL]], %[[STRUCT_SMALL]]* %[[AGG_TMP]], i32 0, i32 0 // CHECK: %[[V0:.*]] = load i32*, i32** %[[COERCE_DIVE]], align 8 // CHECK: %[[COERCE_VAL_PI:.*]] = ptrtoint i32* %[[V0]] to i64 // CHECK: call void @_Z14testParamSmall5Small(i64 %[[COERCE_VAL_PI]]) -// CHECK: %[[CALL2:.*]] = call %[[STRUCT_SMALL]]* @_ZN5SmallD1Ev(%[[STRUCT_SMALL]]* %[[T]]) +// CHECK: %[[CALL2:.*]] = call frozen %[[STRUCT_SMALL]]* @_ZN5SmallD1Ev(%[[STRUCT_SMALL]]* %[[T]]) // CHECK: ret void // CHECK: } @@ -110,7 +110,7 @@ // CHECK: %[[COERCE_DIVE:.*]] = getelementptr inbounds %[[STRUCT_SMALL]], %[[STRUCT_SMALL]]* %[[AGG_TMP_ENSURED]], i32 0, i32 0 // CHECK: %[[COERCE_VAL_IP:.*]] = inttoptr i64 %[[CALL]] to i32* // CHECK: store i32* %[[COERCE_VAL_IP]], i32** %[[COERCE_DIVE]], align 8 -// CHECK: %[[CALL1:.*]] = call %[[STRUCT_SMALL]]* @_ZN5SmallD1Ev(%[[STRUCT_SMALL]]* %[[AGG_TMP_ENSURED]]) +// CHECK: %[[CALL1:.*]] = call frozen %[[STRUCT_SMALL]]* @_ZN5SmallD1Ev(%[[STRUCT_SMALL]]* %[[AGG_TMP_ENSURED]]) // CHECK: ret void // CHECK: } @@ -119,7 +119,7 @@ } // CHECK: define void @_Z14testParamLarge5Large(%[[STRUCT_LARGE:.*]]* %[[A:.*]]) -// CHECK: %[[CALL:.*]] = call %[[STRUCT_LARGE]]* @_ZN5LargeD1Ev(%[[STRUCT_LARGE]]* %[[A]]) +// CHECK: %[[CALL:.*]] = call frozen %[[STRUCT_LARGE]]* @_ZN5LargeD1Ev(%[[STRUCT_LARGE]]* %[[A]]) // CHECK: ret void // CHECK: } @@ -127,7 +127,7 @@ } // CHECK: define void @_Z15testReturnLargev(%[[STRUCT_LARGE:.*]]* noalias sret align 8 %[[AGG_RESULT:.*]]) -// CHECK: %[[CALL:.*]] = call %[[STRUCT_LARGE]]* @_ZN5LargeC1Ev(%[[STRUCT_LARGE]]* %[[AGG_RESULT]]) +// CHECK: %[[CALL:.*]] = call frozen %[[STRUCT_LARGE]]* @_ZN5LargeC1Ev(%[[STRUCT_LARGE]]* %[[AGG_RESULT]]) // CHECK: ret void // CHECK: } @@ -139,10 +139,10 @@ // CHECK: define void @_Z14testCallLarge0v() // CHECK: %[[T:.*]] = alloca %[[STRUCT_LARGE:.*]], align 8 // CHECK: %[[AGG_TMP:.*]] = alloca %[[STRUCT_LARGE]], align 8 -// CHECK: %[[CALL:.*]] = call %[[STRUCT_LARGE]]* @_ZN5LargeC1Ev(%[[STRUCT_LARGE]]* %[[T]]) -// CHECK: %[[CALL1:.*]] = call %[[STRUCT_LARGE]]* @_ZN5LargeC1ERKS_(%[[STRUCT_LARGE]]* %[[AGG_TMP]], %[[STRUCT_LARGE]]* nonnull align 8 dereferenceable(520) %[[T]]) +// CHECK: %[[CALL:.*]] = call frozen %[[STRUCT_LARGE]]* @_ZN5LargeC1Ev(%[[STRUCT_LARGE]]* %[[T]]) +// CHECK: %[[CALL1:.*]] = call frozen %[[STRUCT_LARGE]]* @_ZN5LargeC1ERKS_(%[[STRUCT_LARGE]]* %[[AGG_TMP]], %[[STRUCT_LARGE]]* nonnull align 8 dereferenceable(520) %[[T]]) // CHECK: call void @_Z14testParamLarge5Large(%[[STRUCT_LARGE]]* %[[AGG_TMP]]) -// CHECK: %[[CALL2:.*]] = call %[[STRUCT_LARGE]]* @_ZN5LargeD1Ev(%[[STRUCT_LARGE]]* %[[T]]) +// CHECK: %[[CALL2:.*]] = call frozen %[[STRUCT_LARGE]]* @_ZN5LargeD1Ev(%[[STRUCT_LARGE]]* %[[T]]) // CHECK: ret void // CHECK: } @@ -165,7 +165,7 @@ // CHECK: define void @_Z16testIgnoredLargev() // CHECK: %[[AGG_TMP_ENSURED:.*]] = alloca %[[STRUCT_LARGE:.*]], align 8 // CHECK: call void @_Z15testReturnLargev(%[[STRUCT_LARGE]]* sret align 8 %[[AGG_TMP_ENSURED]]) -// CHECK: %[[CALL:.*]] = call %[[STRUCT_LARGE]]* @_ZN5LargeD1Ev(%[[STRUCT_LARGE]]* %[[AGG_TMP_ENSURED]]) +// CHECK: %[[CALL:.*]] = call frozen %[[STRUCT_LARGE]]* @_ZN5LargeD1Ev(%[[STRUCT_LARGE]]* %[[AGG_TMP_ENSURED]]) // CHECK: ret void // CHECK: } @@ -187,7 +187,7 @@ } // CHECK: define void @_Z23testReturnHasNonTrivialv(%[[STRUCT_NONTRIVIAL:.*]]* noalias sret align 4 %[[AGG_RESULT:.*]]) -// CHECK: %[[CALL:.*]] = call %[[STRUCT_NONTRIVIAL]]* @_ZN10NonTrivialC1Ev(%[[STRUCT_NONTRIVIAL]]* %[[AGG_RESULT]]) +// CHECK: %[[CALL:.*]] = call frozen %[[STRUCT_NONTRIVIAL]]* @_ZN10NonTrivialC1Ev(%[[STRUCT_NONTRIVIAL]]* %[[AGG_RESULT]]) // CHECK: ret void // CHECK: } @@ -199,14 +199,14 @@ // CHECK: define void @_Z18testExceptionSmallv() // CHECK: %[[AGG_TMP:.*]] = alloca %[[STRUCT_SMALL]], align 8 // CHECK: %[[AGG_TMP1:.*]] = alloca %[[STRUCT_SMALL]], align 8 -// CHECK: call %[[STRUCT_SMALL]]* @_ZN5SmallC1Ev(%[[STRUCT_SMALL]]* %[[AGG_TMP]]) -// CHECK: invoke %[[STRUCT_SMALL]]* @_ZN5SmallC1Ev(%[[STRUCT_SMALL]]* %[[AGG_TMP1]]) +// CHECK: call frozen %[[STRUCT_SMALL]]* @_ZN5SmallC1Ev(%[[STRUCT_SMALL]]* %[[AGG_TMP]]) +// CHECK: invoke frozen %[[STRUCT_SMALL]]* @_ZN5SmallC1Ev(%[[STRUCT_SMALL]]* %[[AGG_TMP1]]) // CHECK: call void @_Z20calleeExceptionSmall5SmallS_(i64 %{{.*}}, i64 %{{.*}}) // CHECK-NEXT: ret void // CHECK: landingpad { i8*, i32 } -// CHECK: call %[[STRUCT_SMALL]]* @_ZN5SmallD1Ev(%[[STRUCT_SMALL]]* %[[AGG_TMP]]) +// CHECK: call frozen %[[STRUCT_SMALL]]* @_ZN5SmallD1Ev(%[[STRUCT_SMALL]]* %[[AGG_TMP]]) // CHECK: br // CHECK: resume { i8*, i32 } @@ -220,14 +220,14 @@ // CHECK: define void @_Z18testExceptionLargev() // CHECK: %[[AGG_TMP:.*]] = alloca %[[STRUCT_LARGE]], align 8 // CHECK: %[[AGG_TMP1:.*]] = alloca %[[STRUCT_LARGE]], align 8 -// CHECK: call %[[STRUCT_LARGE]]* @_ZN5LargeC1Ev(%[[STRUCT_LARGE]]* %[[AGG_TMP]]) -// CHECK: invoke %[[STRUCT_LARGE]]* @_ZN5LargeC1Ev(%[[STRUCT_LARGE]]* %[[AGG_TMP1]]) +// CHECK: call frozen %[[STRUCT_LARGE]]* @_ZN5LargeC1Ev(%[[STRUCT_LARGE]]* %[[AGG_TMP]]) +// CHECK: invoke frozen %[[STRUCT_LARGE]]* @_ZN5LargeC1Ev(%[[STRUCT_LARGE]]* %[[AGG_TMP1]]) // CHECK: call void @_Z20calleeExceptionLarge5LargeS_(%[[STRUCT_LARGE]]* %[[AGG_TMP]], %[[STRUCT_LARGE]]* %[[AGG_TMP1]]) // CHECK-NEXT: ret void // CHECK: landingpad { i8*, i32 } -// CHECK: call %[[STRUCT_LARGE]]* @_ZN5LargeD1Ev(%[[STRUCT_LARGE]]* %[[AGG_TMP]]) +// CHECK: call frozen %[[STRUCT_LARGE]]* @_ZN5LargeD1Ev(%[[STRUCT_LARGE]]* %[[AGG_TMP]]) // CHECK: br // CHECK: resume { i8*, i32 } diff --git a/clang/test/CodeGenCXX/typeid.cpp b/clang/test/CodeGenCXX/typeid.cpp --- a/clang/test/CodeGenCXX/typeid.cpp +++ b/clang/test/CodeGenCXX/typeid.cpp @@ -30,7 +30,7 @@ // CHECK: @_ZN5Test18A10_c_tiE = constant %"class.std::type_info"* bitcast ({ i8*, i8* }* @_ZTIA10_c to %"class.std::type_info"*), align 8 const std::type_info &A10_c_ti = typeid(char const[10]); -// CHECK-LABEL: define i8* @_ZN5Test11fEv +// CHECK-LABEL: define frozen i8* @_ZN5Test11fEv // CHECK-SAME: personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) const char *f() { try { diff --git a/clang/test/CodeGenCXX/ubsan-bitfields.cpp b/clang/test/CodeGenCXX/ubsan-bitfields.cpp --- a/clang/test/CodeGenCXX/ubsan-bitfields.cpp +++ b/clang/test/CodeGenCXX/ubsan-bitfields.cpp @@ -10,7 +10,7 @@ E e1 : 10; }; -// CHECK-LABEL: define i32 @_Z4loadP1S +// CHECK-LABEL: define frozen i32 @_Z4loadP1S E load(S *s) { // CHECK: [[LOAD:%.*]] = load i16, i16* {{.*}} // CHECK: [[CLEAR:%.*]] = and i16 [[LOAD]], 1023 @@ -26,7 +26,7 @@ bool b3 : 16; }; -// CHECK-LABEL: define zeroext i1 @_Z13load_cpp_boolP4Bool +// CHECK-LABEL: define frozen zeroext i1 @_Z13load_cpp_boolP4Bool bool load_cpp_bool(Bool *b) { // CHECK-NOT: call void @__ubsan_handle_load_invalid_value // CHECK-NOT: !nosanitize diff --git a/clang/test/CodeGenCXX/ubsan-global-alignment.cpp b/clang/test/CodeGenCXX/ubsan-global-alignment.cpp --- a/clang/test/CodeGenCXX/ubsan-global-alignment.cpp +++ b/clang/test/CodeGenCXX/ubsan-global-alignment.cpp @@ -7,7 +7,7 @@ extern S g_S; extern S array_S[]; -// CHECK-LABEL: define i32 @_Z18load_extern_global +// CHECK-LABEL: define frozen i32 @_Z18load_extern_global int load_extern_global() { // FIXME: The IR builder constant-folds the alignment check away to 'true' // here, so we never call the diagnostic. This is PR32630. @@ -17,7 +17,7 @@ return g_S.I; } -// CHECK-LABEL: define i32 @_Z22load_from_extern_array +// CHECK-LABEL: define frozen i32 @_Z22load_from_extern_array int load_from_extern_array(int I) { // CHECK: [[I:%.*]] = getelementptr inbounds %struct.S, %struct.S* {{.*}}, i32 0, i32 0 // CHECK-NEXT: [[PTRTOINT:%.*]] = ptrtoint i32* [[I]] to i64, !nosanitize diff --git a/clang/test/CodeGenCXX/ubsan-suppress-checks.cpp b/clang/test/CodeGenCXX/ubsan-suppress-checks.cpp --- a/clang/test/CodeGenCXX/ubsan-suppress-checks.cpp +++ b/clang/test/CodeGenCXX/ubsan-suppress-checks.cpp @@ -67,7 +67,7 @@ // LAMBDA: ret void #endif - // CHECK-LABEL: define linkonce_odr i32 @_ZN1A11load_memberEv + // CHECK-LABEL: define linkonce_odr frozen i32 @_ZN1A11load_memberEv int load_member() { // ALIGN: %[[THISINT3:[0-9]+]] = ptrtoint %struct.A* %{{.*}} to i64, !nosanitize // ALIGN: and i64 %[[THISINT3]], 3, !nosanitize @@ -79,7 +79,7 @@ // CHECK: ret i32 } - // CHECK-LABEL: define linkonce_odr i32 @_ZN1A11call_methodEv + // CHECK-LABEL: define linkonce_odr frozen i32 @_ZN1A11call_methodEv int call_method() { // ALIGN: %[[THISINT4:[0-9]+]] = ptrtoint %struct.A* %{{.*}} to i64, !nosanitize // ALIGN: and i64 %[[THISINT4]], 3, !nosanitize @@ -127,7 +127,7 @@ // CHECK: ret void } - // CHECK-LABEL: define linkonce_odr i32 @_ZN1A22call_through_referenceERS_ + // CHECK-LABEL: define linkonce_odr frozen i32 @_ZN1A22call_through_referenceERS_ static int call_through_reference(A &a) { // ALIGN: %[[OBJINT:[0-9]+]] = ptrtoint %struct.A* %{{.*}} to i64, !nosanitize // ALIGN: and i64 %[[OBJINT]], 3, !nosanitize @@ -137,7 +137,7 @@ // CHECK: ret i32 } - // CHECK-LABEL: define linkonce_odr i32 @_ZN1A20call_through_pointerEPS_ + // CHECK-LABEL: define linkonce_odr frozen i32 @_ZN1A20call_through_pointerEPS_ static int call_through_pointer(A *a) { // CHECK: call void @__ubsan_handle_type_mismatch return a->load_member(); @@ -148,7 +148,7 @@ struct B { operator A*() const { return nullptr; } - // CHECK-LABEL: define linkonce_odr i32 @_ZN1B11load_memberEPS_ + // CHECK-LABEL: define linkonce_odr frozen i32 @_ZN1B11load_memberEPS_ static int load_member(B *bp) { // Check &b before converting it to an A*. // CHECK: call void @__ubsan_handle_type_mismatch @@ -171,7 +171,7 @@ struct Derived : public Base { int bar; - // CHECK-LABEL: define linkonce_odr i32 @_ZN7Derived13load_member_2Ev + // CHECK-LABEL: define linkonce_odr frozen i32 @_ZN7Derived13load_member_2Ev int load_member_2() { // ALIGN: %[[THISINT8:[0-9]+]] = ptrtoint %struct.Derived* %{{.*}} to i64, !nosanitize // ALIGN: and i64 %[[THISINT8]], 7, !nosanitize @@ -188,7 +188,7 @@ // CHECK: ret i32 } - // CHECK-LABEL: define linkonce_odr i32 @_ZN7Derived13load_member_3Ev + // CHECK-LABEL: define linkonce_odr frozen i32 @_ZN7Derived13load_member_3Ev int load_member_3() { // ALIGN: %[[THISINT9:[0-9]+]] = ptrtoint %struct.Derived* %{{.*}} to i64, !nosanitize // ALIGN: and i64 %[[THISINT9]], 7, !nosanitize @@ -202,7 +202,7 @@ // CHECK: ret i32 } - // CHECK-LABEL: define linkonce_odr i32 @_ZN7Derived13load_member_1Ev + // CHECK-LABEL: define linkonce_odr frozen i32 @_ZN7Derived13load_member_1Ev int load_member_1() override { // ALIGN: %[[THISINT10:[0-9]+]] = ptrtoint %struct.Derived* %{{.*}} to i64, !nosanitize // ALIGN: and i64 %[[THISINT10]], 7, !nosanitize diff --git a/clang/test/CodeGenCXX/ubsan-vtable-checks.cpp b/clang/test/CodeGenCXX/ubsan-vtable-checks.cpp --- a/clang/test/CodeGenCXX/ubsan-vtable-checks.cpp +++ b/clang/test/CodeGenCXX/ubsan-vtable-checks.cpp @@ -16,8 +16,8 @@ // CHECK-VPTR-MS: @__ubsan_vptr_type_cache = external dso_local -// ITANIUM: define i32 @_Z5get_vP1T -// MSABI: define dso_local i32 @"?get_v +// ITANIUM: define frozen i32 @_Z5get_vP1T +// MSABI: define dso_local frozen i32 @"?get_v int get_v(T* t) { // First, we check that vtable is not loaded before a type check. // CHECK-NULL-NOT: load {{.*}} (%struct.T*{{.*}})**, {{.*}} (%struct.T*{{.*}})*** @@ -41,8 +41,8 @@ delete t; } -// ITANIUM: define %struct.U* @_Z7dyncastP1T -// MSABI: define dso_local %struct.U* @"?dyncast +// ITANIUM: define frozen %struct.U* @_Z7dyncastP1T +// MSABI: define dso_local frozen %struct.U* @"?dyncast U* dyncast(T *t) { // First, we check that dynamic_cast is not called before a type check. // CHECK-VPTR-NOT: call i8* @__{{dynamic_cast|RTDynamicCast}} diff --git a/clang/test/CodeGenCXX/uncopyable-args.cpp b/clang/test/CodeGenCXX/uncopyable-args.cpp --- a/clang/test/CodeGenCXX/uncopyable-args.cpp +++ b/clang/test/CodeGenCXX/uncopyable-args.cpp @@ -1,8 +1,8 @@ -// RUN: %clang_cc1 -std=c++11 -triple x86_64-unknown-unknown -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK --check-prefix=NEWABI -// RUN: %clang_cc1 -std=c++11 -triple x86_64-unknown-unknown -fclang-abi-compat=4.0 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK --check-prefix=OLDABI -// RUN: %clang_cc1 -std=c++11 -triple x86_64-scei-ps4 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK --check-prefix=OLDABI -// RUN: %clang_cc1 -std=c++11 -triple x86_64-windows-msvc -emit-llvm -o - %s -fms-compatibility -fms-compatibility-version=18 | FileCheck %s -check-prefix=WIN64 -check-prefix=WIN64-18 -// RUN: %clang_cc1 -std=c++11 -triple x86_64-windows-msvc -emit-llvm -o - %s -fms-compatibility -fms-compatibility-version=19 | FileCheck %s -check-prefix=WIN64 -check-prefix=WIN64-19 +// RUN: %clang_cc1 -disable-frozen-args -std=c++11 -triple x86_64-unknown-unknown -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK --check-prefix=NEWABI +// RUN: %clang_cc1 -disable-frozen-args -std=c++11 -triple x86_64-unknown-unknown -fclang-abi-compat=4.0 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK --check-prefix=OLDABI +// RUN: %clang_cc1 -disable-frozen-args -std=c++11 -triple x86_64-scei-ps4 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK --check-prefix=OLDABI +// RUN: %clang_cc1 -disable-frozen-args -std=c++11 -triple x86_64-windows-msvc -emit-llvm -o - %s -fms-compatibility -fms-compatibility-version=18 | FileCheck %s -check-prefix=WIN64 -check-prefix=WIN64-18 +// RUN: %clang_cc1 -disable-frozen-args -std=c++11 -triple x86_64-windows-msvc -emit-llvm -o - %s -fms-compatibility -fms-compatibility-version=19 | FileCheck %s -check-prefix=WIN64 -check-prefix=WIN64-19 namespace trivial { // Trivial structs should be passed directly. @@ -221,9 +221,9 @@ void *p; }; void *foo(A a) { return a.p; } -// NEWABI-LABEL: define i8* @_ZN15definition_only3fooENS_1AE(%"struct.definition_only::A"* -// OLDABI-LABEL: define i8* @_ZN15definition_only3fooENS_1AE(i8* -// WIN64-LABEL: define dso_local i8* @"?foo@definition_only@@YAPEAXUA@1@@Z"(%"struct.definition_only::A"* +// NEWABI-LABEL: define frozen i8* @_ZN15definition_only3fooENS_1AE(%"struct.definition_only::A"* +// OLDABI-LABEL: define frozen i8* @_ZN15definition_only3fooENS_1AE(i8* +// WIN64-LABEL: define dso_local frozen i8* @"?foo@definition_only@@YAPEAXUA@1@@Z"(%"struct.definition_only::A"* } namespace deleted_by_member { @@ -237,9 +237,9 @@ B b; }; void *foo(A a) { return a.b.p; } -// NEWABI-LABEL: define i8* @_ZN17deleted_by_member3fooENS_1AE(%"struct.deleted_by_member::A"* -// OLDABI-LABEL: define i8* @_ZN17deleted_by_member3fooENS_1AE(i8* -// WIN64-LABEL: define dso_local i8* @"?foo@deleted_by_member@@YAPEAXUA@1@@Z"(%"struct.deleted_by_member::A"* +// NEWABI-LABEL: define frozen i8* @_ZN17deleted_by_member3fooENS_1AE(%"struct.deleted_by_member::A"* +// OLDABI-LABEL: define frozen i8* @_ZN17deleted_by_member3fooENS_1AE(i8* +// WIN64-LABEL: define dso_local frozen i8* @"?foo@deleted_by_member@@YAPEAXUA@1@@Z"(%"struct.deleted_by_member::A"* } namespace deleted_by_base { @@ -252,9 +252,9 @@ A(); }; void *foo(A a) { return a.p; } -// NEWABI-LABEL: define i8* @_ZN15deleted_by_base3fooENS_1AE(%"struct.deleted_by_base::A"* -// OLDABI-LABEL: define i8* @_ZN15deleted_by_base3fooENS_1AE(i8* -// WIN64-LABEL: define dso_local i8* @"?foo@deleted_by_base@@YAPEAXUA@1@@Z"(%"struct.deleted_by_base::A"* +// NEWABI-LABEL: define frozen i8* @_ZN15deleted_by_base3fooENS_1AE(%"struct.deleted_by_base::A"* +// OLDABI-LABEL: define frozen i8* @_ZN15deleted_by_base3fooENS_1AE(i8* +// WIN64-LABEL: define dso_local frozen i8* @"?foo@deleted_by_base@@YAPEAXUA@1@@Z"(%"struct.deleted_by_base::A"* } namespace deleted_by_member_copy { @@ -268,9 +268,9 @@ B b; }; void *foo(A a) { return a.b.p; } -// NEWABI-LABEL: define i8* @_ZN22deleted_by_member_copy3fooENS_1AE(%"struct.deleted_by_member_copy::A"* -// OLDABI-LABEL: define i8* @_ZN22deleted_by_member_copy3fooENS_1AE(i8* -// WIN64-LABEL: define dso_local i8* @"?foo@deleted_by_member_copy@@YAPEAXUA@1@@Z"(%"struct.deleted_by_member_copy::A"* +// NEWABI-LABEL: define frozen i8* @_ZN22deleted_by_member_copy3fooENS_1AE(%"struct.deleted_by_member_copy::A"* +// OLDABI-LABEL: define frozen i8* @_ZN22deleted_by_member_copy3fooENS_1AE(i8* +// WIN64-LABEL: define dso_local frozen i8* @"?foo@deleted_by_member_copy@@YAPEAXUA@1@@Z"(%"struct.deleted_by_member_copy::A"* } namespace deleted_by_base_copy { @@ -283,9 +283,9 @@ A(); }; void *foo(A a) { return a.p; } -// NEWABI-LABEL: define i8* @_ZN20deleted_by_base_copy3fooENS_1AE(%"struct.deleted_by_base_copy::A"* -// OLDABI-LABEL: define i8* @_ZN20deleted_by_base_copy3fooENS_1AE(i8* -// WIN64-LABEL: define dso_local i8* @"?foo@deleted_by_base_copy@@YAPEAXUA@1@@Z"(%"struct.deleted_by_base_copy::A"* +// NEWABI-LABEL: define frozen i8* @_ZN20deleted_by_base_copy3fooENS_1AE(%"struct.deleted_by_base_copy::A"* +// OLDABI-LABEL: define frozen i8* @_ZN20deleted_by_base_copy3fooENS_1AE(i8* +// WIN64-LABEL: define dso_local frozen i8* @"?foo@deleted_by_base_copy@@YAPEAXUA@1@@Z"(%"struct.deleted_by_base_copy::A"* } namespace explicit_delete { @@ -294,9 +294,9 @@ A(const A &o) = delete; void *p; }; -// NEWABI-LABEL: define i8* @_ZN15explicit_delete3fooENS_1AE(%"struct.explicit_delete::A"* -// OLDABI-LABEL: define i8* @_ZN15explicit_delete3fooENS_1AE(i8* -// WIN64-LABEL: define dso_local i8* @"?foo@explicit_delete@@YAPEAXUA@1@@Z"(%"struct.explicit_delete::A"* +// NEWABI-LABEL: define frozen i8* @_ZN15explicit_delete3fooENS_1AE(%"struct.explicit_delete::A"* +// OLDABI-LABEL: define frozen i8* @_ZN15explicit_delete3fooENS_1AE(i8* +// WIN64-LABEL: define dso_local frozen i8* @"?foo@explicit_delete@@YAPEAXUA@1@@Z"(%"struct.explicit_delete::A"* void *foo(A a) { return a.p; } } diff --git a/clang/test/CodeGenCXX/unknown-anytype.cpp b/clang/test/CodeGenCXX/unknown-anytype.cpp --- a/clang/test/CodeGenCXX/unknown-anytype.cpp +++ b/clang/test/CodeGenCXX/unknown-anytype.cpp @@ -18,28 +18,28 @@ int test1() { extern __unknown_anytype test1_any(); - // COMMON: call i32 @_Z9test1_anyv() + // COMMON: call frozen i32 @_Z9test1_anyv() return (int) test1_any(); } extern "C" __unknown_anytype test2_any(...); float test2() { - // X86_64: call float (double, ...) @test2_any(double {{[^,]+}}) - // I386: call float (double, ...) @test2_any(double {{[^,]+}}) + // X86_64: call frozen float (double, ...) @test2_any(double frozen {{[^,]+}}) + // I386: call frozen float (double, ...) @test2_any(double frozen {{[^,]+}}) return (float) test2_any(0.5f); } extern "C" __unknown_anytype test2a_any(...); float test2a() { - // X86_64: call float (float, ...) @test2a_any(float {{[^,]+}}) - // I386: call float (float, ...) @test2a_any(float {{[^,]+}}) + // X86_64: call frozen float (float, ...) @test2a_any(float frozen {{[^,]+}}) + // I386: call frozen float (float, ...) @test2a_any(float frozen {{[^,]+}}) return (float) test2a_any((float) 0.5f); } float test3() { extern __unknown_anytype test3_any; // COMMON: [[FN:%.*]] = load float (i32)*, float (i32)** @test3_any, - // COMMON: call float [[FN]](i32 5) + // COMMON: call frozen float [[FN]](i32 frozen 5) return ((float(*)(int)) test3_any)(5); } @@ -62,7 +62,7 @@ extern "C" __unknown_anytype test6_any(float *); long test6() { - // COMMON: call i64 @test6_any(float* null) + // COMMON: call frozen i64 @test6_any(float* frozen null) return (long long) test6_any(0); } @@ -71,7 +71,7 @@ }; extern "C" __unknown_anytype test7_any(int); Test7 test7() { - // COMMON: call void @test7_any({{%.*}}* sret align 1 {{%.*}}, i32 5) + // COMMON: call void @test7_any({{%.*}}* sret align 1 {{%.*}}, i32 frozen 5) return (Test7) test7_any(5); } @@ -83,24 +83,24 @@ }; void Test8::test() { float f; - // COMMON: call i32 @_ZN5Test83fooEv( + // COMMON: call frozen i32 @_ZN5Test83fooEv( f = (int) foo(); - // COMMON: call i32 @_ZN5Test83fooEi( + // COMMON: call frozen i32 @_ZN5Test83fooEi( f = (int) foo(5); - // COMMON: call i32 @_ZN5Test83fooEv( + // COMMON: call frozen i32 @_ZN5Test83fooEv( f = (float) this->foo(); - // COMMON: call i32 @_ZN5Test83fooEi( + // COMMON: call frozen i32 @_ZN5Test83fooEi( f = (float) this->foo(5); } void test8(Test8 *p) { double d; - // COMMON: call i32 @_ZN5Test83fooEv( + // COMMON: call frozen i32 @_ZN5Test83fooEv( d = (double) p->foo(); - // COMMON: call i32 @_ZN5Test83fooEi( + // COMMON: call frozen i32 @_ZN5Test83fooEi( d = (double) p->foo(5); - // COMMON: call i32 @_ZN5Test83fooEv( + // COMMON: call frozen i32 @_ZN5Test83fooEv( d = (bool) (*p).foo(); - // COMMON: call i32 @_ZN5Test83fooEi( + // COMMON: call frozen i32 @_ZN5Test83fooEi( d = (bool) (*p).foo(5); } @@ -119,7 +119,7 @@ extern "C" __unknown_anytype malloc(...); void test11() { void *s = (void*)malloc(12); - // COMMON: call i8* (i32, ...) @malloc(i32 12) + // COMMON: call frozen i8* (i32, ...) @malloc(i32 frozen 12) void *d = (void*)malloc(435); - // COMMON: call i8* (i32, ...) @malloc(i32 435) + // COMMON: call frozen i8* (i32, ...) @malloc(i32 frozen 435) } diff --git a/clang/test/CodeGenCXX/value-init.cpp b/clang/test/CodeGenCXX/value-init.cpp --- a/clang/test/CodeGenCXX/value-init.cpp +++ b/clang/test/CodeGenCXX/value-init.cpp @@ -75,7 +75,7 @@ int S::*mem2; }; - // CHECK-LABEL: define i32 @_ZN6ptrmem4testEPNS_1SE + // CHECK-LABEL: define frozen i32 @_ZN6ptrmem4testEPNS_1SE int test(S *s) { // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64 // CHECK: getelementptr @@ -134,7 +134,7 @@ namespace zeroinit { struct S { int i; }; - // CHECK-LABEL: define i32 @_ZN8zeroinit4testEv() + // CHECK-LABEL: define frozen i32 @_ZN8zeroinit4testEv() int test() { // CHECK: call void @llvm.memset.p0i8.i64 // CHECK: ret i32 0 @@ -209,12 +209,12 @@ // CHECK-NEXT: [[INNER:%.*]] = getelementptr inbounds [10 x [20 x [[A]]]], [10 x [20 x [[A]]]]* [[ARR]], i64 0, i64 0 // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds [20 x [[A]]], [20 x [[A]]]* [[INNER]], i64 0, i64 0 - // CHECK-NEXT: call void @_ZN5test61AC1Ei([[A]]* [[T0]], i32 5) + // CHECK-NEXT: call void @_ZN5test61AC1Ei([[A]]* frozen [[T0]], i32 frozen 5) // CHECK-NEXT: [[BEGIN:%.*]] = getelementptr inbounds [[A]], [[A]]* [[T0]], i64 1 // CHECK-NEXT: [[END:%.*]] = getelementptr inbounds [[A]], [[A]]* [[T0]], i64 20 // CHECK-NEXT: br label // CHECK: [[CUR:%.*]] = phi [[A]]* [ [[BEGIN]], {{%.*}} ], [ [[NEXT:%.*]], {{%.*}} ] - // CHECK-NEXT: call void @_ZN5test61AC1Ev([[A]]* [[CUR]]) + // CHECK-NEXT: call void @_ZN5test61AC1Ev([[A]]* frozen [[CUR]]) // CHECK-NEXT: [[NEXT]] = getelementptr inbounds [[A]], [[A]]* [[CUR]], i64 1 // CHECK-NEXT: [[T0:%.*]] = icmp eq [[A]]* [[NEXT]], [[END]] // CHECK-NEXT: br i1 @@ -229,7 +229,7 @@ // CHECK-NEXT: [[IEND:%.*]] = getelementptr inbounds [[A]], [[A]]* [[IBEGIN]], i64 20 // CHECK-NEXT: br label // CHECK: [[ICUR:%.*]] = phi [[A]]* [ [[IBEGIN]], {{%.*}} ], [ [[INEXT:%.*]], {{%.*}} ] - // CHECK-NEXT: call void @_ZN5test61AC1Ev([[A]]* [[ICUR]]) + // CHECK-NEXT: call void @_ZN5test61AC1Ev([[A]]* frozen [[ICUR]]) // CHECK-NEXT: [[INEXT:%.*]] = getelementptr inbounds [[A]], [[A]]* [[ICUR]], i64 1 // CHECK-NEXT: [[T0:%.*]] = icmp eq [[A]]* [[INEXT]], [[IEND]] // CHECK-NEXT: br i1 [[T0]], @@ -261,7 +261,7 @@ // Ensure we produce an i1 here, and don't assert. // CHECK-LABEL: define void @_Z9r170806_bv( -// CHECK: call void @_Z9r170806_ab(i1 zeroext false) +// CHECK: call void @_Z9r170806_ab(i1 frozen zeroext false) void r170806_a(bool b = bool()); void r170806_b() { r170806_a(); } @@ -326,7 +326,7 @@ return a.n; } // CHECK-LABEL: } -// CHECK-LABEL: define linkonce_odr void @_ZN8zeroinit2X3IiEC2Ev(%"struct.zeroinit::X3"* %this) unnamed_addr +// CHECK-LABEL: define linkonce_odr void @_ZN8zeroinit2X3IiEC2Ev(%"struct.zeroinit::X3"* frozen %this) unnamed_addr // CHECK: call void @llvm.memset.p0i8.i64 // CHECK-NEXT: call void @_ZN8zeroinit2X2IiEC2Ev // CHECK-NEXT: ret void diff --git a/clang/test/CodeGenCXX/varargs.cpp b/clang/test/CodeGenCXX/varargs.cpp --- a/clang/test/CodeGenCXX/varargs.cpp +++ b/clang/test/CodeGenCXX/varargs.cpp @@ -7,12 +7,12 @@ // though there is no way to do a va_begin. Otherwise, the optimizer // will warn about 'dropped arguments' at the call site. - // CHECK-LABEL: define i32 @_ZN5test05test1Ez(...) + // CHECK-LABEL: define frozen i32 @_ZN5test05test1Ez(...) int test1(...) { return -1; } - // CHECK: call i32 (...) @_ZN5test05test1Ez(i32 0) + // CHECK: call frozen i32 (...) @_ZN5test05test1Ez(i32 frozen 0) void test() { test1(0); } diff --git a/clang/test/CodeGenCXX/variadic-templates.cpp b/clang/test/CodeGenCXX/variadic-templates.cpp --- a/clang/test/CodeGenCXX/variadic-templates.cpp +++ b/clang/test/CodeGenCXX/variadic-templates.cpp @@ -5,7 +5,7 @@ return sizeof...(Types); } -// CHECK-LABEL: define weak_odr i32 @_Z13get_num_typesIJifdEEiDpT_ +// CHECK-LABEL: define weak_odr frozen i32 @_Z13get_num_typesIJifdEEiDpT_ // CHECK: ret i32 3 template int get_num_types(int, float, double); diff --git a/clang/test/CodeGenCXX/virt-dtor-gen.cpp b/clang/test/CodeGenCXX/virt-dtor-gen.cpp --- a/clang/test/CodeGenCXX/virt-dtor-gen.cpp +++ b/clang/test/CodeGenCXX/virt-dtor-gen.cpp @@ -7,4 +7,4 @@ }; Foo::~Foo() {} -// CHECK-LABEL: define {{.*}}void @_ZN3FooD0Ev(%class.Foo* %this) unnamed_addr +// CHECK-LABEL: define {{.*}}void @_ZN3FooD0Ev(%class.Foo* frozen %this) unnamed_addr diff --git a/clang/test/CodeGenCXX/virtual-base-destructor-call.cpp b/clang/test/CodeGenCXX/virtual-base-destructor-call.cpp --- a/clang/test/CodeGenCXX/virtual-base-destructor-call.cpp +++ b/clang/test/CodeGenCXX/virtual-base-destructor-call.cpp @@ -41,11 +41,11 @@ // CHECK: call {{.*}} @_ZdlPv // basic_istream's base dtor is a no-op. -// CHECK: define linkonce_odr {{.*}} @_ZN13basic_istreamIcED2Ev(%struct.basic_istream* {{.*}}%this, i8** %vtt) unnamed_addr +// CHECK: define linkonce_odr {{.*}} @_ZN13basic_istreamIcED2Ev(%struct.basic_istream* {{.*}}%this, i8** frozen %vtt) unnamed_addr // CHECK-NOT: call // CHECK: } // basic_iostream's base dtor calls its non-virtual base dtor. -// CHECK: define linkonce_odr {{.*}} @_ZN14basic_iostreamIcED2Ev(%struct.basic_iostream* {{.*}}%this, i8** %vtt) unnamed_addr +// CHECK: define linkonce_odr {{.*}} @_ZN14basic_iostreamIcED2Ev(%struct.basic_iostream* {{.*}}%this, i8** frozen %vtt) unnamed_addr // CHECK: call {{.*}} @_ZN13basic_istreamIcED2Ev // CHECK: } diff --git a/clang/test/CodeGenCXX/virtual-bases.cpp b/clang/test/CodeGenCXX/virtual-bases.cpp --- a/clang/test/CodeGenCXX/virtual-bases.cpp +++ b/clang/test/CodeGenCXX/virtual-bases.cpp @@ -5,23 +5,23 @@ }; // CHECK: @_ZN1AC1Ev = unnamed_addr alias {{.*}} @_ZN1AC2Ev -// CHECK-LABEL: define void @_ZN1AC2Ev(%struct.A* %this) unnamed_addr +// CHECK-LABEL: define void @_ZN1AC2Ev(%struct.A* frozen %this) unnamed_addr A::A() { } struct B : virtual A { B(); }; -// CHECK-LABEL: define void @_ZN1BC2Ev(%struct.B* %this, i8** %vtt) unnamed_addr -// CHECK-LABEL: define void @_ZN1BC1Ev(%struct.B* %this) unnamed_addr +// CHECK-LABEL: define void @_ZN1BC2Ev(%struct.B* frozen %this, i8** frozen %vtt) unnamed_addr +// CHECK-LABEL: define void @_ZN1BC1Ev(%struct.B* frozen %this) unnamed_addr B::B() { } struct C : virtual A { C(bool); }; -// CHECK-LABEL: define void @_ZN1CC2Eb(%struct.C* %this, i8** %vtt, i1 zeroext %0) unnamed_addr -// CHECK-LABEL: define void @_ZN1CC1Eb(%struct.C* %this, i1 zeroext %0) unnamed_addr +// CHECK-LABEL: define void @_ZN1CC2Eb(%struct.C* frozen %this, i8** frozen %vtt, i1 frozen zeroext %0) unnamed_addr +// CHECK-LABEL: define void @_ZN1CC1Eb(%struct.C* frozen %this, i1 frozen zeroext %0) unnamed_addr C::C(bool) { } // PR6251 @@ -39,7 +39,7 @@ D(); }; -// CHECK-LABEL: define void @_ZN6PR62511DC1Ev(%"struct.PR6251::D"* %this) unnamed_addr +// CHECK-LABEL: define void @_ZN6PR62511DC1Ev(%"struct.PR6251::D"* frozen %this) unnamed_addr // CHECK: call void @_ZN6PR62511AIcEC2Ev // CHECK-NOT: call void @_ZN6PR62511AIcEC2Ev // CHECK: ret void @@ -51,14 +51,14 @@ // Check that the store to B::x in the base constructor has an 8-byte alignment. -// CHECK: define linkonce_odr void @_ZN20virtualBaseAlignment1BC1Ev(%[[STRUCT_B:.*]]* %[[THIS:.*]]) +// CHECK: define linkonce_odr void @_ZN20virtualBaseAlignment1BC1Ev(%[[STRUCT_B:.*]]* frozen %[[THIS:.*]]) // CHECK: %[[THIS_ADDR:.*]] = alloca %[[STRUCT_B]]*, align 8 // CHECK: store %[[STRUCT_B]]* %[[THIS]], %[[STRUCT_B]]** %[[THIS_ADDR]], align 8 // CHECK: %[[THIS1:.*]] = load %[[STRUCT_B]]*, %[[STRUCT_B]]** %[[THIS_ADDR]], align 8 // CHECK: %[[X:.*]] = getelementptr inbounds %[[STRUCT_B]], %[[STRUCT_B]]* %[[THIS1]], i32 0, i32 2 // CHECK: store i32 123, i32* %[[X]], align 16 -// CHECK: define linkonce_odr void @_ZN20virtualBaseAlignment1BC2Ev(%[[STRUCT_B]]* %[[THIS:.*]], i8** %{{.*}}) +// CHECK: define linkonce_odr void @_ZN20virtualBaseAlignment1BC2Ev(%[[STRUCT_B]]* frozen %[[THIS:.*]], i8** frozen %{{.*}}) // CHECK: %[[THIS_ADDR:.*]] = alloca %[[STRUCT_B]]*, align 8 // CHECK: store %[[STRUCT_B]]* %[[THIS]], %[[STRUCT_B]]** %[[THIS_ADDR]], align 8 // CHECK: %[[THIS1:.*]] = load %[[STRUCT_B]]*, %[[STRUCT_B]]** %[[THIS_ADDR]], align 8 diff --git a/clang/test/CodeGenCXX/virtual-destructor-calls.cpp b/clang/test/CodeGenCXX/virtual-destructor-calls.cpp --- a/clang/test/CodeGenCXX/virtual-destructor-calls.cpp +++ b/clang/test/CodeGenCXX/virtual-destructor-calls.cpp @@ -21,12 +21,12 @@ // CHECK: @_ZN1CD1Ev = unnamed_addr alias {{.*}} @_ZN1CD2Ev // Base dtor: actually calls A's base dtor. -// CHECK-LABEL: define void @_ZN1BD2Ev(%struct.B* %this) unnamed_addr +// CHECK-LABEL: define void @_ZN1BD2Ev(%struct.B* frozen %this) unnamed_addr // CHECK: call void @_ZN6MemberD1Ev // CHECK: call void @_ZN1AD2Ev // Deleting dtor: defers to the complete dtor. -// CHECK-LABEL: define void @_ZN1BD0Ev(%struct.B* %this) unnamed_addr +// CHECK-LABEL: define void @_ZN1BD0Ev(%struct.B* frozen %this) unnamed_addr // CHECK: call void @_ZN1BD1Ev // CHECK: call void @_ZdlPv @@ -38,10 +38,10 @@ C::~C() { } -// Complete dtor: just an alias (checked above). +// Complete dtor: just an alias (checked above frozen). // Deleting dtor: defers to the complete dtor. -// CHECK-LABEL: define void @_ZN1CD0Ev(%struct.C* %this) unnamed_addr +// CHECK-LABEL: define void @_ZN1CD0Ev(%struct.C* frozen %this) unnamed_addr // CHECK: call void @_ZN1CD1Ev // CHECK: call void @_ZdlPv diff --git a/clang/test/CodeGenCXX/virtual-function-attrs.cpp b/clang/test/CodeGenCXX/virtual-function-attrs.cpp --- a/clang/test/CodeGenCXX/virtual-function-attrs.cpp +++ b/clang/test/CodeGenCXX/virtual-function-attrs.cpp @@ -9,6 +9,6 @@ void A::f() {} // CHECK: define {{(dso_local )?}}[[CC:(x86_thiscallcc )?]]void @_ZN1A1fEv({{.*}}) unnamed_addr -// CHECK: declare {{(dso_local )?}}[[CC]]void @_ZN1A1gEv({{.*}}) unnamed_addr -// CHECK: declare {{.*}} @_ZN1AD1Ev({{.*}}) unnamed_addr -// CHECK: declare {{(dso_local )?}}[[CC]]void @_ZN1AD0Ev({{.*}}) unnamed_addr +// CHECK: declare {{(dso_local )?}}[[CC]]void @_ZN1A1gEv({{.*}} frozen) unnamed_addr +// CHECK: declare {{.*}} @_ZN1AD1Ev({{.*}} frozen) unnamed_addr +// CHECK: declare {{(dso_local )?}}[[CC]]void @_ZN1AD0Ev({{.*}} frozen) unnamed_addr diff --git a/clang/test/CodeGenCXX/virtual-functions-incomplete-types.cpp b/clang/test/CodeGenCXX/virtual-functions-incomplete-types.cpp --- a/clang/test/CodeGenCXX/virtual-functions-incomplete-types.cpp +++ b/clang/test/CodeGenCXX/virtual-functions-incomplete-types.cpp @@ -9,7 +9,7 @@ void B::f() { } -// CHECK-LABEL: define i32 @_ZN1D1gEv(%struct.D* %this) +// CHECK-LABEL: define i32 @_ZN1D1gEv(%struct.D* frozen %this) // CHECK: declare void @_ZN1B1gEv() struct C; diff --git a/clang/test/CodeGenCXX/virtual-operator-call.cpp b/clang/test/CodeGenCXX/virtual-operator-call.cpp --- a/clang/test/CodeGenCXX/virtual-operator-call.cpp +++ b/clang/test/CodeGenCXX/virtual-operator-call.cpp @@ -5,9 +5,9 @@ }; void f(A a, A *ap) { - // CHECK: call i32 @_ZN1AngEv(%struct.A* %a) + // CHECK: call frozen i32 @_ZN1AngEv(%struct.A* frozen %a) -a; - // CHECK: call i32 % + // CHECK: call frozen i32 % -*ap; } diff --git a/clang/test/CodeGenCXX/visibility-inlines-hidden-staticvar.cpp b/clang/test/CodeGenCXX/visibility-inlines-hidden-staticvar.cpp --- a/clang/test/CodeGenCXX/visibility-inlines-hidden-staticvar.cpp +++ b/clang/test/CodeGenCXX/visibility-inlines-hidden-staticvar.cpp @@ -12,14 +12,14 @@ // CHECK-DAG: @_ZZ18inline_hidden_funcvE3var = linkonce_odr hidden global i32 0, comdat // CHECK-DAG: @_ZZ19inline_default_funcvE3var = linkonce_odr global i32 0, comdat // CHECK-DAG: @_ZZN13ExportedClass10inl_methodEvE3var = linkonce_odr global i32 0, comdat, align 4 -// CHECK-DAG: define i32 @_Z4funcv() -// CHECK-DAG: define hidden i32 @_Z11hidden_funcv() -// CHECK-DAG: define i32 @_Z12default_funcv() -// CHECK-DAG: define linkonce_odr hidden i32 @_Z11inline_funcv() -// CHECK-DAG: define linkonce_odr hidden i32 @_Z18inline_hidden_funcv() -// CHECK-DAG: define linkonce_odr i32 @_Z19inline_default_funcv() -// CHECK-DAG: define linkonce_odr hidden i32 @_ZN13ExportedClass10inl_methodEv({{.*}}) -// CHECK-DAG: define i32 @_ZN13ExportedClass10ext_methodEv({{.*}}) +// CHECK-DAG: define frozen i32 @_Z4funcv() +// CHECK-DAG: define hidden frozen i32 @_Z11hidden_funcv() +// CHECK-DAG: define frozen i32 @_Z12default_funcv() +// CHECK-DAG: define linkonce_odr hidden frozen i32 @_Z11inline_funcv() +// CHECK-DAG: define linkonce_odr hidden frozen i32 @_Z18inline_hidden_funcv() +// CHECK-DAG: define linkonce_odr frozen i32 @_Z19inline_default_funcv() +// CHECK-DAG: define linkonce_odr hidden frozen i32 @_ZN13ExportedClass10inl_methodEv({{.*}}) +// CHECK-DAG: define frozen i32 @_ZN13ExportedClass10ext_methodEv({{.*}}) // CHECK-NO-VIH-DAG: @_ZZ4funcvE3var = internal global i32 0 // CHECK-NO-VIH-DAG: @_ZZ11hidden_funcvE3var = internal global i32 0 @@ -28,14 +28,14 @@ // CHECK-NO-VIH-DAG: @_ZZ18inline_hidden_funcvE3var = linkonce_odr hidden global i32 0, comdat // CHECK-NO-VIH-DAG: @_ZZ19inline_default_funcvE3var = linkonce_odr global i32 0, comdat // CHECK-NO-VIH-DAG: @_ZZN13ExportedClass10inl_methodEvE3var = linkonce_odr global i32 0, comdat, align 4 -// CHECK-NO-VIH-DAG: define i32 @_Z4funcv() -// CHECK-NO-VIH-DAG: define hidden i32 @_Z11hidden_funcv() -// CHECK-NO-VIH-DAG: define i32 @_Z12default_funcv() -// CHECK-NO-VIH-DAG: define linkonce_odr i32 @_Z11inline_funcv() -// CHECK-NO-VIH-DAG: define linkonce_odr hidden i32 @_Z18inline_hidden_funcv() -// CHECK-NO-VIH-DAG: define linkonce_odr i32 @_Z19inline_default_funcv() -// CHECK-NO-VIH-DAG: define linkonce_odr i32 @_ZN13ExportedClass10inl_methodEv({{.*}}) -// CHECK-NO-VIH-DAG: define i32 @_ZN13ExportedClass10ext_methodEv({{.*}}) +// CHECK-NO-VIH-DAG: define frozen i32 @_Z4funcv() +// CHECK-NO-VIH-DAG: define hidden frozen i32 @_Z11hidden_funcv() +// CHECK-NO-VIH-DAG: define frozen i32 @_Z12default_funcv() +// CHECK-NO-VIH-DAG: define linkonce_odr frozen i32 @_Z11inline_funcv() +// CHECK-NO-VIH-DAG: define linkonce_odr hidden frozen i32 @_Z18inline_hidden_funcv() +// CHECK-NO-VIH-DAG: define linkonce_odr frozen i32 @_Z19inline_default_funcv() +// CHECK-NO-VIH-DAG: define linkonce_odr frozen i32 @_ZN13ExportedClass10inl_methodEv({{.*}}) +// CHECK-NO-VIH-DAG: define frozen i32 @_ZN13ExportedClass10ext_methodEv({{.*}}) // CHECK-VIS-HIDDEN-DAG: @_ZZ4funcvE3var = internal global i32 0 // CHECK-VIS-HIDDEN-DAG: @_ZZ11hidden_funcvE3var = internal global i32 0 @@ -44,14 +44,14 @@ // CHECK-VIS-HIDDEN-DAG: @_ZZ18inline_hidden_funcvE3var = linkonce_odr hidden global i32 0, comdat // CHECK-VIS-HIDDEN-DAG: @_ZZ19inline_default_funcvE3var = linkonce_odr global i32 0, comdat // CHECK-VIS-HIDDEN-DAG: @_ZZN13ExportedClass10inl_methodEvE3var = linkonce_odr global i32 0, comdat, align 4 -// CHECK-VIS-HIDDEN-DAG: define hidden i32 @_Z4funcv() -// CHECK-VIS-HIDDEN-DAG: define hidden i32 @_Z11hidden_funcv() -// CHECK-VIS-HIDDEN-DAG: define i32 @_Z12default_funcv() -// CHECK-VIS-HIDDEN-DAG: define linkonce_odr hidden i32 @_Z11inline_funcv() -// CHECK-VIS-HIDDEN-DAG: define linkonce_odr hidden i32 @_Z18inline_hidden_funcv() -// CHECK-VIS-HIDDEN-DAG: define linkonce_odr i32 @_Z19inline_default_funcv() -// CHECK-VIS-HIDDEN-DAG: define linkonce_odr hidden i32 @_ZN13ExportedClass10inl_methodEv({{.*}}) -// CHECK-VIS-HIDDEN-DAG: define i32 @_ZN13ExportedClass10ext_methodEv({{.*}}) +// CHECK-VIS-HIDDEN-DAG: define hidden frozen i32 @_Z4funcv() +// CHECK-VIS-HIDDEN-DAG: define hidden frozen i32 @_Z11hidden_funcv() +// CHECK-VIS-HIDDEN-DAG: define frozen i32 @_Z12default_funcv() +// CHECK-VIS-HIDDEN-DAG: define linkonce_odr hidden frozen i32 @_Z11inline_funcv() +// CHECK-VIS-HIDDEN-DAG: define linkonce_odr hidden frozen i32 @_Z18inline_hidden_funcv() +// CHECK-VIS-HIDDEN-DAG: define linkonce_odr frozen i32 @_Z19inline_default_funcv() +// CHECK-VIS-HIDDEN-DAG: define linkonce_odr hidden frozen i32 @_ZN13ExportedClass10inl_methodEv({{.*}}) +// CHECK-VIS-HIDDEN-DAG: define frozen i32 @_ZN13ExportedClass10ext_methodEv({{.*}}) // CHECK-VIS-PROTECTED-DAG: @_ZZ4funcvE3var = internal global i32 0 // CHECK-VIS-PROTECTED-DAG: @_ZZ11hidden_funcvE3var = internal global i32 0 @@ -60,14 +60,14 @@ // CHECK-VIS-PROTECTED-DAG: @_ZZ18inline_hidden_funcvE3var = linkonce_odr hidden global i32 0, comdat // CHECK-VIS-PROTECTED-DAG: @_ZZ19inline_default_funcvE3var = linkonce_odr global i32 0, comdat // CHECK-VIS-PROTECTED-DAG: @_ZZN13ExportedClass10inl_methodEvE3var = linkonce_odr global i32 0, comdat, align 4 -// CHECK-VIS-PROTECTED-DAG: define protected i32 @_Z4funcv() -// CHECK-VIS-PROTECTED-DAG: define hidden i32 @_Z11hidden_funcv() -// CHECK-VIS-PROTECTED-DAG: define i32 @_Z12default_funcv() -// CHECK-VIS-PROTECTED-DAG: define linkonce_odr hidden i32 @_Z11inline_funcv() -// CHECK-VIS-PROTECTED-DAG: define linkonce_odr hidden i32 @_Z18inline_hidden_funcv() -// CHECK-VIS-PROTECTED-DAG: define linkonce_odr i32 @_Z19inline_default_funcv() -// CHECK-VIS-PROTECTED-DAG: define linkonce_odr hidden i32 @_ZN13ExportedClass10inl_methodEv({{.*}}) -// CHECK-VIS-PROTECTED-DAG: define i32 @_ZN13ExportedClass10ext_methodEv({{.*}}) +// CHECK-VIS-PROTECTED-DAG: define protected frozen i32 @_Z4funcv() +// CHECK-VIS-PROTECTED-DAG: define hidden frozen i32 @_Z11hidden_funcv() +// CHECK-VIS-PROTECTED-DAG: define frozen i32 @_Z12default_funcv() +// CHECK-VIS-PROTECTED-DAG: define linkonce_odr hidden frozen i32 @_Z11inline_funcv() +// CHECK-VIS-PROTECTED-DAG: define linkonce_odr hidden frozen i32 @_Z18inline_hidden_funcv() +// CHECK-VIS-PROTECTED-DAG: define linkonce_odr frozen i32 @_Z19inline_default_funcv() +// CHECK-VIS-PROTECTED-DAG: define linkonce_odr hidden frozen i32 @_ZN13ExportedClass10inl_methodEv({{.*}}) +// CHECK-VIS-PROTECTED-DAG: define frozen i32 @_ZN13ExportedClass10ext_methodEv({{.*}}) int func(void) { static int var = 0; diff --git a/clang/test/CodeGenCXX/visibility-inlines-hidden.cpp b/clang/test/CodeGenCXX/visibility-inlines-hidden.cpp --- a/clang/test/CodeGenCXX/visibility-inlines-hidden.cpp +++ b/clang/test/CodeGenCXX/visibility-inlines-hidden.cpp @@ -106,7 +106,7 @@ }; extern template class Foo; template class Foo; - // CHECK-LABEL: define weak_odr i32 @_ZN7PR116423FooIiE3fooEi + // CHECK-LABEL: define weak_odr frozen i32 @_ZN7PR116423FooIiE3fooEi } // Test that clang implements the new gcc behaviour for inline functions. @@ -166,7 +166,7 @@ namespace PR34811 { template void tf() {} - // CHECK-LABEL: define linkonce_odr hidden i8* @_ZN7PR348111fEv( + // CHECK-LABEL: define linkonce_odr hidden frozen i8* @_ZN7PR348111fEv( inline void *f() { auto l = []() {}; // CHECK-LABEL: define linkonce_odr hidden void @_ZN7PR348112tfIZNS_1fEvEUlvE_EEvv( diff --git a/clang/test/CodeGenCXX/vla-consruct.cpp b/clang/test/CodeGenCXX/vla-consruct.cpp --- a/clang/test/CodeGenCXX/vla-consruct.cpp +++ b/clang/test/CodeGenCXX/vla-consruct.cpp @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -fcxx-exceptions -fexceptions -O0 %s -emit-llvm -o - | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args -triple x86_64-unknown-linux-gnu -fcxx-exceptions -fexceptions -O0 %s -emit-llvm -o - | FileCheck %s extern "C" int printf(const char *, ...); diff --git a/clang/test/CodeGenCXX/vla-lambda-capturing.cpp b/clang/test/CodeGenCXX/vla-lambda-capturing.cpp --- a/clang/test/CodeGenCXX/vla-lambda-capturing.cpp +++ b/clang/test/CodeGenCXX/vla-lambda-capturing.cpp @@ -22,7 +22,7 @@ // CHECK: store [[INTPTR_T]]* %{{.+}}, [[INTPTR_T]]** [[CAP_BUFFER_ADDR]] // CHECK: [[CAP_N_REF:%.+]] = getelementptr inbounds [[CAP_TYPE1]], [[CAP_TYPE1]]* [[CAP_ARG:%.+]], i{{.+}} 0, i{{.+}} 2 // CHECK: store [[INTPTR_T]]* [[N_ADDR]], [[INTPTR_T]]** [[CAP_N_REF]] -// CHECK: call{{.*}} void [[G_LAMBDA:@.+]]([[CAP_TYPE1]]* [[CAP_ARG]]) +// CHECK: call{{.*}} void [[G_LAMBDA:@.+]]([[CAP_TYPE1]]* frozen [[CAP_ARG]]) // CHECK: ret void void g(intptr_t n) { intptr_t buffer[n]; @@ -70,11 +70,11 @@ // CHECK-LABEL: @main int main() { - // CHECK: call {{.*}}void [[G]]([[INTPTR_T]] [[INTPTR_T_ATTR:(signext )?]]1) + // CHECK: call {{.*}}void [[G]]([[INTPTR_T]] frozen [[INTPTR_T_ATTR:(signext )?]]1) g((intptr_t)1); - // CHECK: call {{.*}}void [[F_INT:@.+]]([[INTPTR_T]] [[INTPTR_T_ATTR]]1, [[INTPTR_T]] [[INTPTR_T_ATTR]]2) + // CHECK: call {{.*}}void [[F_INT:@.+]]([[INTPTR_T]] frozen [[INTPTR_T_ATTR]]1, [[INTPTR_T]] frozen [[INTPTR_T_ATTR]]2) f((intptr_t)1, (intptr_t)2); - // CHECK: call {{.*}}void [[B_INT:@.+]]([[INTPTR_T]] [[INTPTR_T_ATTR]]12, [[INTPTR_T]] [[INTPTR_T_ATTR]]13) + // CHECK: call {{.*}}void [[B_INT:@.+]]([[INTPTR_T]] frozen [[INTPTR_T_ATTR]]12, [[INTPTR_T]] frozen [[INTPTR_T_ATTR]]13) b((intptr_t)12, (intptr_t)13); // CHECK: ret i32 0 return 0; @@ -88,7 +88,7 @@ // CHECK: store [[INTPTR_T]] [[SIZE]], [[INTPTR_T]]* [[CAP_SIZE_REF]] // CHECK: [[CAP_BUFFER_ADDR_REF:%.+]] = getelementptr inbounds [[CAP_TYPE2]], [[CAP_TYPE2]]* [[CAP_ARG]], i{{.+}} 0, i{{.+}} 1 // CHECK: store [[INTPTR_T]]* [[BUFFER_ADDR]], [[INTPTR_T]]** [[CAP_BUFFER_ADDR_REF]] -// CHECK: call{{.*}} void [[F_INT_LAMBDA:@.+]]([[CAP_TYPE2]]* [[CAP_ARG]]) +// CHECK: call{{.*}} void [[F_INT_LAMBDA:@.+]]([[CAP_TYPE2]]* frozen [[CAP_ARG]]) // CHECK: call void @llvm.stackrestore( // CHECK: ret void // CHECK: void [[B_INT]]([[INTPTR_T]] @@ -107,7 +107,7 @@ // CHECK: store [[INTPTR_T]]* [[BUFFER1_ADDR]], [[INTPTR_T]]** [[CAP_BUFFER1_ADDR_REF]] // CHECK: [[CAP_BUFFER2_ADDR_REF:%.+]] = getelementptr inbounds [[CAP_TYPE3]], [[CAP_TYPE3]]* [[CAP_ARG]], i{{.+}} 0, i{{.+}} 4 // CHECK: store [[INTPTR_T]]* [[BUFFER2_ADDR]], [[INTPTR_T]]** [[CAP_BUFFER2_ADDR_REF]] -// CHECK: call{{.*}} void [[B_INT_LAMBDA:@.+]]([[CAP_TYPE3]]* [[CAP_ARG]]) +// CHECK: call{{.*}} void [[B_INT_LAMBDA:@.+]]([[CAP_TYPE3]]* frozen [[CAP_ARG]]) // CHECK: call void @llvm.stackrestore( // CHECK: ret void @@ -152,7 +152,7 @@ // CHECK: [[BUFFER1_ADDR_REF_ORIG:%.+]] = getelementptr inbounds [[CAP_TYPE3]], [[CAP_TYPE3]]* [[THIS]], i{{[0-9]+}} 0, i{{[0-9]+}} 3 // CHECK: [[BUFFER1_ADDR_ORIG:%.+]] = load [[INTPTR_T]]*, [[INTPTR_T]]** [[BUFFER1_ADDR_REF_ORIG]] // CHECK: store [[INTPTR_T]]* [[BUFFER1_ADDR_ORIG]], [[INTPTR_T]]** [[BUFFER1_ADDR_REF]] -// CHECK: call{{.*}} void [[B_INT_LAMBDA_LAMBDA:@.+]]([[CAP_TYPE4]]* [[CAP]]) +// CHECK: call{{.*}} void [[B_INT_LAMBDA_LAMBDA:@.+]]([[CAP_TYPE4]]* frozen [[CAP]]) // CHECK: ret void // CHECK: define linkonce_odr{{.*}} void [[B_INT_LAMBDA_LAMBDA]]([[CAP_TYPE4]]* diff --git a/clang/test/CodeGenCXX/vla.cpp b/clang/test/CodeGenCXX/vla.cpp --- a/clang/test/CodeGenCXX/vla.cpp +++ b/clang/test/CodeGenCXX/vla.cpp @@ -66,7 +66,7 @@ void test2(int b) { - // CHECK-LABEL: define void {{.*}}test2{{.*}}(i32 %b) + // CHECK-LABEL: define void {{.*}}test2{{.*}}(i32 frozen %b) int varr[b]; // AMDGCN: %__end1 = alloca i32*, align 8, addrspace(5) // AMDGCN: [[END:%.*]] = addrspacecast i32* addrspace(5)* %__end1 to i32** @@ -92,7 +92,7 @@ } void test3(int b, int c) { - // CHECK-LABEL: define void {{.*}}test3{{.*}}(i32 %b, i32 %c) + // CHECK-LABEL: define void {{.*}}test3{{.*}}(i32 frozen %b, i32 frozen %c) int varr[b][c]; // AMDGCN: %__end1 = alloca i32*, align 8, addrspace(5) // AMDGCN: [[END:%.*]] = addrspacecast i32* addrspace(5)* %__end1 to i32** diff --git a/clang/test/CodeGenCXX/volatile.cpp b/clang/test/CodeGenCXX/volatile.cpp --- a/clang/test/CodeGenCXX/volatile.cpp +++ b/clang/test/CodeGenCXX/volatile.cpp @@ -16,7 +16,7 @@ void test(A t) { // CHECK: [[ARR:%.*]] = load [[A:%.*]]*, [[A:%.*]]** @_ZN5test05arrayE, align 8 // CHECK-NEXT: [[IDX:%.*]] = getelementptr inbounds [[A]], [[A]]* [[ARR]], i64 0 - // CHECK-NEXT: [[TMP:%.*]] = call nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[A]]* @_ZNV5test01AaSERVKS0_([[A]]* [[IDX]], [[A]]* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[T:%.*]]) + // CHECK-NEXT: [[TMP:%.*]] = call frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[A]]* @_ZNV5test01AaSERVKS0_([[A]]* frozen [[IDX]], [[A]]* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[T:%.*]]) // CHECK-NEXT: ret void array[0] = t; } diff --git a/clang/test/CodeGenCXX/vtable-assume-load.cpp b/clang/test/CodeGenCXX/vtable-assume-load.cpp --- a/clang/test/CodeGenCXX/vtable-assume-load.cpp +++ b/clang/test/CodeGenCXX/vtable-assume-load.cpp @@ -37,7 +37,7 @@ } // CHECK1-LABEL: define void @_ZN5test14fooBEv() -// CHECK1: call void @_ZN5test11BC1Ev(%"struct.test1::B"* %{{.*}}) +// CHECK1: call void @_ZN5test11BC1Ev(%"struct.test1::B"* frozen %{{.*}}) // CHECK1: %[[VTABLE:.*]] = load i8**, i8*** %{{.*}} // CHECK1: %[[CMP:.*]] = icmp eq i8** %[[VTABLE]], getelementptr inbounds ({ [3 x i8*] }, { [3 x i8*] }* @_ZTVN5test11BE, i32 0, inrange i32 0, i32 2) // CHECK1: call void @llvm.assume(i1 %[[CMP]]) @@ -164,7 +164,7 @@ // if struct has novtable specifier, then we can't generate assumes // CHECK-MS-LABEL: define dso_local void @"?test@testMS@@YAXXZ"() -// CHECK-MS: call x86_thiscallcc %"struct.testMS::S"* @"??0S@testMS@@QAE@XZ"( +// CHECK-MS: call x86_thiscallcc frozen %"struct.testMS::S"* @"??0S@testMS@@QAE@XZ"( // CHECK-MS-NOT: @llvm.assume // CHECK-MS-LABEL: {{^}}} diff --git a/clang/test/CodeGenCXX/vtable-available-externally.cpp b/clang/test/CodeGenCXX/vtable-available-externally.cpp --- a/clang/test/CodeGenCXX/vtable-available-externally.cpp +++ b/clang/test/CodeGenCXX/vtable-available-externally.cpp @@ -445,7 +445,7 @@ // CHECK-FORCE-EMIT-DAG: @_ZTVN6Test187DerivedE = linkonce_odr unnamed_addr constant {{.*}} @_ZTIN6Test187DerivedE {{.*}} @_ZN6Test184Base3funEv {{.*}} @_ZN6Test184BaseD2Ev {{.*}} @_ZN6Test187DerivedD0Ev // CHECK-FORCE-EMIT-DAG: define linkonce_odr void @_ZN6Test187DerivedD0Ev // CHECK-FORCE-EMIT-DAG: define linkonce_odr void @_ZN6Test184BaseD2Ev -// CHECK-FORCE-EMIT-DAG: define linkonce_odr i32 @_ZN6Test184Base3funEv +// CHECK-FORCE-EMIT-DAG: define linkonce_odr frozen i32 @_ZN6Test184Base3funEv // CHECK-FORCE-EMIT-DAG: @_ZTIN6Test187DerivedE = linkonce_odr constant struct Base { @@ -466,13 +466,13 @@ namespace TestTemplates { // CHECK-FORCE-EMIT-DAG: @_ZTVN13TestTemplates8TemplateIiEE = linkonce_odr unnamed_addr constant {{.*}} @_ZTIN13TestTemplates8TemplateIiEE {{.*}} @_ZN13TestTemplates8TemplateIiE3fooEi {{.*}}@_ZN13TestTemplates8TemplateIiE22thisShouldBeEmittedTooEi {{.*}}@_ZN13TestTemplates8TemplateIiED1Ev {{.*}}@_ZN13TestTemplates8TemplateIiED0Ev -// CHECK-FORCE-EMIT-DAG: define linkonce_odr i32 @_ZN13TestTemplates8TemplateIiE22thisShouldBeEmittedTooEi +// CHECK-FORCE-EMIT-DAG: define linkonce_odr frozen i32 @_ZN13TestTemplates8TemplateIiE22thisShouldBeEmittedTooEi template struct Template { Template(); virtual T foo(T val); - // CHECK-FORCE-EMIT-DAG: define linkonce_odr i32 @_ZN13TestTemplates8TemplateIiE22thisShouldBeEmittedTooEi + // CHECK-FORCE-EMIT-DAG: define linkonce_odr frozen i32 @_ZN13TestTemplates8TemplateIiE22thisShouldBeEmittedTooEi virtual T thisShouldBeEmittedToo(T val) { return val; } virtual ~Template(); }; @@ -482,7 +482,7 @@ typedef int T; NonTemplate(); virtual T foo(T val); - // CHECK-FORCE-EMIT-DAG: define linkonce_odr i32 @_ZN13TestTemplates11NonTemplate22thisShouldBeEmittedTooEi + // CHECK-FORCE-EMIT-DAG: define linkonce_odr frozen i32 @_ZN13TestTemplates11NonTemplate22thisShouldBeEmittedTooEi virtual T thisShouldBeEmittedToo(T val) { return val; } virtual ~NonTemplate(); }; @@ -494,7 +494,7 @@ struct NestedTemplateInNonTemplate { NestedTemplateInNonTemplate(); virtual T foo(T val); - // CHECK-FORCE-EMIT-DAG: define linkonce_odr i32 @_ZN13TestTemplates16OuterNonTemplate27NestedTemplateInNonTemplateIiE22thisShouldBeEmittedTooEi + // CHECK-FORCE-EMIT-DAG: define linkonce_odr frozen i32 @_ZN13TestTemplates16OuterNonTemplate27NestedTemplateInNonTemplateIiE22thisShouldBeEmittedTooEi virtual T thisShouldBeEmittedToo(T val) { return val; } virtual ~NestedTemplateInNonTemplate(); }; @@ -503,7 +503,7 @@ typedef int T; NestedNonTemplateInNonTemplate(); virtual T foo(T val); - // CHECK-FORCE-EMIT-DAG: define linkonce_odr i32 @_ZN13TestTemplates16OuterNonTemplate30NestedNonTemplateInNonTemplate22thisShouldBeEmittedTooEi + // CHECK-FORCE-EMIT-DAG: define linkonce_odr frozen i32 @_ZN13TestTemplates16OuterNonTemplate30NestedNonTemplateInNonTemplate22thisShouldBeEmittedTooEi virtual T thisShouldBeEmittedToo(T val) { return val; } virtual ~NestedNonTemplateInNonTemplate(); }; @@ -515,7 +515,7 @@ struct NestedTemplateInTemplate { NestedTemplateInTemplate(); virtual T foo(T val); - // CHECK-FORCE-EMIT-DAG: define linkonce_odr i32 @_ZN13TestTemplates13OuterTemplateIlE24NestedTemplateInTemplateIiE22thisShouldBeEmittedTooEi + // CHECK-FORCE-EMIT-DAG: define linkonce_odr frozen i32 @_ZN13TestTemplates13OuterTemplateIlE24NestedTemplateInTemplateIiE22thisShouldBeEmittedTooEi virtual T thisShouldBeEmittedToo(T val) { return val; } virtual ~NestedTemplateInTemplate(); }; @@ -524,7 +524,7 @@ typedef int T; NestedNonTemplateInTemplate(); virtual T foo(T val); - // CHECK-FORCE-EMIT-DAG: define linkonce_odr i32 @_ZN13TestTemplates13OuterTemplateIlE27NestedNonTemplateInTemplate22thisShouldBeEmittedTooEi + // CHECK-FORCE-EMIT-DAG: define linkonce_odr frozen i32 @_ZN13TestTemplates13OuterTemplateIlE27NestedNonTemplateInTemplate22thisShouldBeEmittedTooEi virtual T thisShouldBeEmittedToo(T val) { return val; } virtual ~NestedNonTemplateInTemplate(); }; diff --git a/clang/test/CodeGenCXX/vtable-pointer-initialization.cpp b/clang/test/CodeGenCXX/vtable-pointer-initialization.cpp --- a/clang/test/CodeGenCXX/vtable-pointer-initialization.cpp +++ b/clang/test/CodeGenCXX/vtable-pointer-initialization.cpp @@ -19,14 +19,14 @@ Field field; }; -// CHECK-LABEL: define void @_ZN1AC2Ev(%struct.A* %this) unnamed_addr +// CHECK-LABEL: define void @_ZN1AC2Ev(%struct.A* frozen %this) unnamed_addr // CHECK: call void @_ZN4BaseC2Ev( // CHECK: store i32 (...)** bitcast (i8** getelementptr inbounds ({ [3 x i8*] }, { [3 x i8*] }* @_ZTV1A, i32 0, inrange i32 0, i32 2) to i32 (...)**) // CHECK: call void @_ZN5FieldC1Ev( // CHECK: ret void A::A() { } -// CHECK-LABEL: define void @_ZN1AD2Ev(%struct.A* %this) unnamed_addr +// CHECK-LABEL: define void @_ZN1AD2Ev(%struct.A* frozen %this) unnamed_addr // CHECK: store i32 (...)** bitcast (i8** getelementptr inbounds ({ [3 x i8*] }, { [3 x i8*] }* @_ZTV1A, i32 0, inrange i32 0, i32 2) to i32 (...)**) // CHECK: call void @_ZN5FieldD1Ev( // CHECK: call void @_ZN4BaseD2Ev( @@ -41,19 +41,19 @@ void f() { B b; } -// CHECK-LABEL: define linkonce_odr void @_ZN1BC1Ev(%struct.B* %this) unnamed_addr +// CHECK-LABEL: define linkonce_odr void @_ZN1BC1Ev(%struct.B* frozen %this) unnamed_addr // CHECK: call void @_ZN1BC2Ev( -// CHECK-LABEL: define linkonce_odr void @_ZN1BD1Ev(%struct.B* %this) unnamed_addr +// CHECK-LABEL: define linkonce_odr void @_ZN1BD1Ev(%struct.B* frozen %this) unnamed_addr // CHECK: call void @_ZN1BD2Ev( -// CHECK-LABEL: define linkonce_odr void @_ZN1BC2Ev(%struct.B* %this) unnamed_addr +// CHECK-LABEL: define linkonce_odr void @_ZN1BC2Ev(%struct.B* frozen %this) unnamed_addr // CHECK: call void @_ZN4BaseC2Ev( // CHECK: store i32 (...)** bitcast (i8** getelementptr inbounds ({ [3 x i8*] }, { [3 x i8*] }* @_ZTV1B, i32 0, inrange i32 0, i32 2) to i32 (...)**) // CHECK: call void @_ZN5FieldC1Ev // CHECK: ret void -// CHECK-LABEL: define linkonce_odr void @_ZN1BD2Ev(%struct.B* %this) unnamed_addr +// CHECK-LABEL: define linkonce_odr void @_ZN1BD2Ev(%struct.B* frozen %this) unnamed_addr // CHECK: store i32 (...)** bitcast (i8** getelementptr inbounds ({ [3 x i8*] }, { [3 x i8*] }* @_ZTV1B, i32 0, inrange i32 0, i32 2) to i32 (...)**) // CHECK: call void @_ZN5FieldD1Ev( // CHECK: call void @_ZN4BaseD2Ev( diff --git a/clang/test/CodeGenCXX/wasm-args-returns.cpp b/clang/test/CodeGenCXX/wasm-args-returns.cpp --- a/clang/test/CodeGenCXX/wasm-args-returns.cpp +++ b/clang/test/CodeGenCXX/wasm-args-returns.cpp @@ -1,6 +1,6 @@ -// RUN: %clang_cc1 -O1 -triple wasm32-unknown-unknown -emit-llvm -o - %s \ +// RUN: %clang_cc1 -disable-frozen-args -O1 -triple wasm32-unknown-unknown -emit-llvm -o - %s \ // RUN: | FileCheck %s -// RUN: %clang_cc1 -O1 -triple wasm64-unknown-unknown -emit-llvm -o - %s \ +// RUN: %clang_cc1 -disable-frozen-args -O1 -triple wasm64-unknown-unknown -emit-llvm -o - %s \ // RUN: | FileCheck %s #define concat_(x, y) x##y @@ -48,7 +48,7 @@ test(copy_ctor); // CHECK: define void @_Z7forward9copy_ctor(%struct.copy_ctor* noalias sret align 8 %{{.*}}, %struct.copy_ctor* nonnull %{{.*}}) // -// CHECK: declare %struct.copy_ctor* @_ZN9copy_ctorC1ERKS_(%struct.copy_ctor* returned, %struct.copy_ctor* nonnull align 8 dereferenceable(8)) +// CHECK: declare frozen %struct.copy_ctor* @_ZN9copy_ctorC1ERKS_(%struct.copy_ctor* returned, %struct.copy_ctor* nonnull align 8 dereferenceable(8)) // // CHECK: define void @_Z14test_copy_ctorv() // CHECK: %[[tmp:.*]] = alloca %struct.copy_ctor, align 8 @@ -66,7 +66,7 @@ test(aligned_copy_ctor); // CHECK: define void @_Z7forward17aligned_copy_ctor(%struct.aligned_copy_ctor* noalias sret align 16 %{{.*}}, %struct.aligned_copy_ctor* nonnull %{{.*}}) // -// CHECK: declare %struct.aligned_copy_ctor* @_ZN17aligned_copy_ctorC1ERKS_(%struct.aligned_copy_ctor* returned, %struct.aligned_copy_ctor* nonnull align 16 dereferenceable(16)) +// CHECK: declare frozen %struct.aligned_copy_ctor* @_ZN17aligned_copy_ctorC1ERKS_(%struct.aligned_copy_ctor* returned, %struct.aligned_copy_ctor* nonnull align 16 dereferenceable(16)) // // CHECK: define void @_Z22test_aligned_copy_ctorv() // CHECK: %[[tmp:.*]] = alloca %struct.aligned_copy_ctor, align 16 diff --git a/clang/test/CodeGenCXX/wasm-eh.cpp b/clang/test/CodeGenCXX/wasm-eh.cpp --- a/clang/test/CodeGenCXX/wasm-eh.cpp +++ b/clang/test/CodeGenCXX/wasm-eh.cpp @@ -130,7 +130,7 @@ // CHECK: [[EHCLEANUP_BB]]: // CHECK-NEXT: %[[CLEANUPPAD:.*]] = cleanuppad within none [] -// CHECK-NEXT: call %struct.Cleanup* @_ZN7CleanupD1Ev(%struct.Cleanup* %{{.*}}) {{.*}} [ "funclet"(token %[[CLEANUPPAD]]) ] +// CHECK-NEXT: call frozen %struct.Cleanup* @_ZN7CleanupD1Ev(%struct.Cleanup* frozen %{{.*}}) {{.*}} [ "funclet"(token %[[CLEANUPPAD]]) ] // CHECK-NEXT: cleanupret from %[[CLEANUPPAD]] unwind to caller // Possibly throwing function call within a catch @@ -221,7 +221,7 @@ // CHECK: [[EHCLEANUP_BB0]]: // CHECK-NEXT: %[[CLEANUPPAD0:.*]] = cleanuppad within none [] -// CHECK-NEXT: call %struct.Cleanup* @_ZN7CleanupD1Ev(%struct.Cleanup* {{.*}}) {{.*}} [ "funclet"(token %[[CLEANUPPAD0]]) ] +// CHECK-NEXT: call frozen %struct.Cleanup* @_ZN7CleanupD1Ev(%struct.Cleanup* {{.*}}) {{.*}} [ "funclet"(token %[[CLEANUPPAD0]]) ] // CHECK-NEXT: cleanupret from %[[CLEANUPPAD0]] unwind label %[[CATCH_DISPATCH_BB:.*]] // CHECK: [[CATCH_DISPATCH_BB]]: @@ -244,7 +244,7 @@ // CHECK: [[EHCLEANUP_BB2]]: // CHECK-NEXT: %[[CLEANUPPAD2:.*]] = cleanuppad within %[[CATCHPAD]] [] -// CHECK-NEXT: call %struct.Cleanup* @_ZN7CleanupD1Ev(%struct.Cleanup* %{{.*}}) {{.*}} [ "funclet"(token %[[CLEANUPPAD2]]) ] +// CHECK-NEXT: call frozen %struct.Cleanup* @_ZN7CleanupD1Ev(%struct.Cleanup* frozen %{{.*}}) {{.*}} [ "funclet"(token %[[CLEANUPPAD2]]) ] // CHECK-NEXT: cleanupret from %[[CLEANUPPAD2]] unwind label %[[EHCLEANUP_BB3:.*]] // CHECK: [[EHCLEANUP_BB3]]: @@ -253,7 +253,7 @@ // CHECK: [[EHCLEANUP_BB1]]: // CHECK-NEXT: %[[CLEANUPPAD1:.*]] = cleanuppad within none [] -// CHECK-NEXT: call %struct.Cleanup* @_ZN7CleanupD1Ev(%struct.Cleanup* %{{.*}}) {{.*}} [ "funclet"(token %[[CLEANUPPAD1]]) ] +// CHECK-NEXT: call frozen %struct.Cleanup* @_ZN7CleanupD1Ev(%struct.Cleanup* frozen %{{.*}}) {{.*}} [ "funclet"(token %[[CLEANUPPAD1]]) ] // CHECK-NEXT: cleanupret from %[[CLEANUPPAD1]] unwind to caller // CHECK: [[UNREACHABLE_BB]]: diff --git a/clang/test/CodeGenCXX/windows-on-arm-itanium-thread-local.cpp b/clang/test/CodeGenCXX/windows-on-arm-itanium-thread-local.cpp --- a/clang/test/CodeGenCXX/windows-on-arm-itanium-thread-local.cpp +++ b/clang/test/CodeGenCXX/windows-on-arm-itanium-thread-local.cpp @@ -6,7 +6,7 @@ c = p; } -// CHECK-LABEL: @_Z1fPv(i8* %p) +// CHECK-LABEL: @_Z1fPv(i8* frozen %p) // CHECK-NOT: call i8** @_ZTWL1c() // CHECK: call arm_aapcs_vfpcc i8** @_ZTWL1c() diff --git a/clang/test/CodeGenCXX/x86_32-arguments.cpp b/clang/test/CodeGenCXX/x86_32-arguments.cpp --- a/clang/test/CodeGenCXX/x86_32-arguments.cpp +++ b/clang/test/CodeGenCXX/x86_32-arguments.cpp @@ -8,7 +8,7 @@ // CHECK-LABEL: define void @_Z1fv(%struct.S* noalias sret align 2 % S f() { return S(); } -// CHECK-LABEL: define void @_Z1f1S(%struct.S* %0) +// CHECK-LABEL: define void @_Z1f1S(%struct.S* frozen %0) void f(S) { } // Non-trivial dtors, should both be passed indirectly. @@ -21,7 +21,7 @@ // CHECK-LABEL: define void @_Z1gv(%class.C* noalias sret align 4 % C g() { return C(); } -// CHECK-LABEL: define void @_Z1f1C(%class.C* %0) +// CHECK-LABEL: define void @_Z1f1C(%class.C* frozen %0) void f(C) { } @@ -31,7 +31,7 @@ // CHECK-LABEL: define void @_ZThn4_N18BasicAliasAnalysis13getModRefInfoE8CallSite // ... -// CHECK: %struct.CallSite* byval(%struct.CallSite) align 4 %CS) +// CHECK: %struct.CallSite* frozen byval(%struct.CallSite) align 4 %CS) struct CallSite { unsigned Ptr; CallSite(unsigned XX) : Ptr(XX) {} @@ -88,8 +88,8 @@ struct s5 { s5(); int &x; }; s5 f5() { return s5(); } -// CHECK-LABEL: define i32 @_Z4f6_0M2s6i(i32 %a) -// CHECK: define i64 @_Z4f6_1M2s6FivE({ i32, i32 }* byval({ i32, i32 }) align 4 %0) +// CHECK-LABEL: define frozen i32 @_Z4f6_0M2s6i(i32 frozen %a) +// CHECK: define frozen i64 @_Z4f6_1M2s6FivE({ i32, i32 }* frozen byval({ i32, i32 }) align 4 %0) // FIXME: It would be nice to avoid byval on the previous case. struct s6 {}; typedef int s6::* s6_mdp; diff --git a/clang/test/CodeGenCXX/x86_64-arguments-avx.cpp b/clang/test/CodeGenCXX/x86_64-arguments-avx.cpp --- a/clang/test/CodeGenCXX/x86_64-arguments-avx.cpp +++ b/clang/test/CodeGenCXX/x86_64-arguments-avx.cpp @@ -56,6 +56,6 @@ __attribute__((__vector_size__(32))) float f1; int f2; }; -// CHECK: define i32 @_ZN5test31fENS_1UE({{.*}}* byval({{.*}}) align 32 +// CHECK: define frozen i32 @_ZN5test31fENS_1UE({{.*}}* frozen byval({{.*}}) align 32 int f(U u) { return u.f2; } } diff --git a/clang/test/CodeGenCXX/x86_64-arguments-nacl-x32.cpp b/clang/test/CodeGenCXX/x86_64-arguments-nacl-x32.cpp --- a/clang/test/CodeGenCXX/x86_64-arguments-nacl-x32.cpp +++ b/clang/test/CodeGenCXX/x86_64-arguments-nacl-x32.cpp @@ -1,11 +1,11 @@ -// RUN: %clang_cc1 -std=c++11 -triple x86_64-unknown-nacl -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -std=c++11 -triple=x86_64-unknown-linux-gnux32 -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args -std=c++11 -triple x86_64-unknown-nacl -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args -std=c++11 -triple=x86_64-unknown-linux-gnux32 -emit-llvm -o - %s | FileCheck %s struct test_struct {}; typedef int test_struct::* test_struct_mdp; typedef int (test_struct::*test_struct_mfp)(); -// CHECK-LABEL: define i32 @{{.*}}f_mdp{{.*}}(i32 %a) +// CHECK-LABEL: define frozen i32 @{{.*}}f_mdp{{.*}}(i32 %a) test_struct_mdp f_mdp(test_struct_mdp a) { return a; } // CHECK-LABEL: define {{.*}} @{{.*}}f_mfp{{.*}}(i64 %a.coerce) diff --git a/clang/test/CodeGenCXX/x86_64-arguments.cpp b/clang/test/CodeGenCXX/x86_64-arguments.cpp --- a/clang/test/CodeGenCXX/x86_64-arguments.cpp +++ b/clang/test/CodeGenCXX/x86_64-arguments.cpp @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -triple x86_64-unknown-unknown -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args -triple x86_64-unknown-unknown -emit-llvm -o - %s | FileCheck %s // Basic base class test. struct f0_s0 { unsigned a; }; @@ -24,7 +24,7 @@ struct s3_1 { struct s3_0 a; long b; }; void f3(struct s3_1 x) {} -// CHECK-LABEL: define i64 @_Z4f4_0M2s4i(i64 %a) +// CHECK-LABEL: define frozen i64 @_Z4f4_0M2s4i(i64 %a) // CHECK: define {{.*}} @_Z4f4_1M2s4FivE(i64 %a.coerce0, i64 %a.coerce1) struct s4 {}; typedef int s4::* s4_mdp; @@ -87,7 +87,7 @@ B1 b1; }; - // CHECK-LABEL: define i8* @_ZN6PR51793barENS_2B2E(i32* %b2.coerce) + // CHECK-LABEL: define frozen i8* @_ZN6PR51793barENS_2B2E(i32* %b2.coerce) const void *bar(B2 b2) { return b2.b1.pa; } @@ -129,7 +129,7 @@ int test(outer x) { return x.x + x.f; } - // CHECK-LABEL: define i32 @_ZN5test64testENS_5outerE(i64 %x.coerce0, i32 %x.coerce1) + // CHECK-LABEL: define frozen i32 @_ZN5test64testENS_5outerE(i64 %x.coerce0, i32 %x.coerce1) } namespace test7 { @@ -181,7 +181,7 @@ return S(); } - // CHECK: define [[S]]* @_ZN5test91bEPNS_1SEiiiiNS_1TEPv([[S]]* {{%.*}}, i32 %0, i32 %1, i32 %2, i32 %3, [[T:%.*]]* byval([[T]]) align 8 %4, i8* %5) + // CHECK: define frozen [[S]]* @_ZN5test91bEPNS_1SEiiiiNS_1TEPv([[S]]* {{%.*}}, i32 %0, i32 %1, i32 %2, i32 %3, [[T:%.*]]* byval([[T]]) align 8 %4, i8* %5) S* b(S* sret, int, int, int, int, T, void*) { return sret; } @@ -191,7 +191,7 @@ return S(); } - // CHECK: define [[S]]* @_ZN5test91dEPNS_1SEiiiNS_1TEPv([[S]]* {{%.*}}, i32 %0, i32 %1, i32 %2, i8* {{%.*}}, i8* {{%.*}}, i8* %3) + // CHECK: define frozen [[S]]* @_ZN5test91dEPNS_1SEiiiNS_1TEPv([[S]]* {{%.*}}, i32 %0, i32 %1, i32 %2, i8* {{%.*}}, i8* {{%.*}}, i8* %3) S* d(S* sret, int, int, int, T, void*) { return sret; } @@ -207,7 +207,7 @@ struct DerivedPacked : public BasePacked { int three; }; -// CHECK-LABEL: define i32 @_ZN6test1020FuncForDerivedPackedENS_13DerivedPackedE({{.*}}* byval({{.*}}) align 8 +// CHECK-LABEL: define frozen i32 @_ZN6test1020FuncForDerivedPackedENS_13DerivedPackedE({{.*}}* byval({{.*}}) align 8 int FuncForDerivedPacked(DerivedPacked d) { return d.three; } @@ -219,5 +219,5 @@ char __attribute__((__vector_size__(1))) f2; }; int f(union U u) { return u.f2[1]; } -// CHECK-LABEL: define i32 @_ZN6test111fENS_1UE(i32 +// CHECK-LABEL: define frozen i32 @_ZN6test111fENS_1UE(i32 } diff --git a/clang/test/CodeGenCoroutines/coro-alloc.cpp b/clang/test/CodeGenCoroutines/coro-alloc.cpp --- a/clang/test/CodeGenCoroutines/coro-alloc.cpp +++ b/clang/test/CodeGenCoroutines/coro-alloc.cpp @@ -61,7 +61,7 @@ // CHECK: [[AllocBB]]: // CHECK: %[[SIZE:.+]] = call i64 @llvm.coro.size.i64() - // CHECK: %[[MEM:.+]] = call noalias nonnull i8* @_Znwm(i64 %[[SIZE]]) + // CHECK: %[[MEM:.+]] = call frozen noalias nonnull i8* @_Znwm(i64 frozen %[[SIZE]]) // CHECK: br label %[[InitBB]] // CHECK: [[InitBB]]: @@ -73,7 +73,7 @@ // CHECK: br i1 %[[NeedDealloc]], label %[[FreeBB:.+]], label %[[Afterwards:.+]] // CHECK: [[FreeBB]]: - // CHECK: call void @_ZdlPv(i8* %[[MEM]]) + // CHECK: call void @_ZdlPv(i8* frozen %[[MEM]]) // CHECK: br label %[[Afterwards]] // CHECK: [[Afterwards]]: @@ -98,11 +98,11 @@ extern "C" void f1(promise_new_tag ) { // CHECK: %[[ID:.+]] = call token @llvm.coro.id(i32 16 // CHECK: %[[SIZE:.+]] = call i64 @llvm.coro.size.i64() - // CHECK: call i8* @_ZNSt12experimental16coroutine_traitsIJv15promise_new_tagEE12promise_typenwEm(i64 %[[SIZE]]) + // CHECK: call frozen i8* @_ZNSt12experimental16coroutine_traitsIJv15promise_new_tagEE12promise_typenwEm(i64 frozen %[[SIZE]]) // CHECK: %[[FRAME:.+]] = call i8* @llvm.coro.begin( // CHECK: %[[MEM:.+]] = call i8* @llvm.coro.free(token %[[ID]], i8* %[[FRAME]]) - // CHECK: call void @_ZdlPv(i8* %[[MEM]]) + // CHECK: call void @_ZdlPv(i8* frozen %[[MEM]]) co_return; } @@ -130,7 +130,7 @@ // CHECK: %[[INT:.+]] = load i32, i32* %x.addr, align 4 // CHECK: %[[FLOAT:.+]] = load float, float* %y.addr, align 4 // CHECK: %[[DOUBLE:.+]] = load double, double* %z.addr, align 8 - // CHECK: call i8* @_ZNSt12experimental16coroutine_traitsIJv34promise_matching_placement_new_tagifdEE12promise_typenwEmS1_ifd(i64 %[[SIZE]], i32 %[[INT]], float %[[FLOAT]], double %[[DOUBLE]]) + // CHECK: call frozen i8* @_ZNSt12experimental16coroutine_traitsIJv34promise_matching_placement_new_tagifdEE12promise_typenwEmS1_ifd(i64 frozen %[[SIZE]], i32 frozen %[[INT]], float frozen %[[FLOAT]], double frozen %[[DOUBLE]]) co_return; } @@ -156,7 +156,7 @@ // within the scope of the promise type's class. // CHECK-LABEL: f1b( extern "C" void f1b(promise_matching_global_placement_new_tag, dummy *) { - // CHECK: call noalias nonnull i8* @_Znwm(i64 + // CHECK: call frozen noalias nonnull i8* @_Znwm(i64 co_return; } @@ -177,11 +177,11 @@ extern "C" void f2(promise_delete_tag) { // CHECK: %[[ID:.+]] = call token @llvm.coro.id(i32 16 // CHECK: %[[SIZE:.+]] = call i64 @llvm.coro.size.i64() - // CHECK: call noalias nonnull i8* @_Znwm(i64 %[[SIZE]]) + // CHECK: call frozen noalias nonnull i8* @_Znwm(i64 frozen %[[SIZE]]) // CHECK: %[[FRAME:.+]] = call i8* @llvm.coro.begin( // CHECK: %[[MEM:.+]] = call i8* @llvm.coro.free(token %[[ID]], i8* %[[FRAME]]) - // CHECK: call void @_ZNSt12experimental16coroutine_traitsIJv18promise_delete_tagEE12promise_typedlEPv(i8* %[[MEM]]) + // CHECK: call void @_ZNSt12experimental16coroutine_traitsIJv18promise_delete_tagEE12promise_typedlEPv(i8* frozen %[[MEM]]) co_return; } @@ -202,12 +202,12 @@ extern "C" void f3(promise_sized_delete_tag) { // CHECK: %[[ID:.+]] = call token @llvm.coro.id(i32 16 // CHECK: %[[SIZE:.+]] = call i64 @llvm.coro.size.i64() - // CHECK: call noalias nonnull i8* @_Znwm(i64 %[[SIZE]]) + // CHECK: call frozen noalias nonnull i8* @_Znwm(i64 frozen %[[SIZE]]) // CHECK: %[[FRAME:.+]] = call i8* @llvm.coro.begin( // CHECK: %[[MEM:.+]] = call i8* @llvm.coro.free(token %[[ID]], i8* %[[FRAME]]) // CHECK: %[[SIZE2:.+]] = call i64 @llvm.coro.size.i64() - // CHECK: call void @_ZNSt12experimental16coroutine_traitsIJv24promise_sized_delete_tagEE12promise_typedlEPvm(i8* %[[MEM]], i64 %[[SIZE2]]) + // CHECK: call void @_ZNSt12experimental16coroutine_traitsIJv24promise_sized_delete_tagEE12promise_typedlEPvm(i8* frozen %[[MEM]], i64 frozen %[[SIZE2]]) co_return; } @@ -230,17 +230,17 @@ // CHECK: %[[Gro:.+]] = alloca i32 // CHECK: %[[ID:.+]] = call token @llvm.coro.id(i32 16 // CHECK: %[[SIZE:.+]] = call i64 @llvm.coro.size.i64() - // CHECK: %[[MEM:.+]] = call noalias i8* @_ZnwmRKSt9nothrow_t(i64 %[[SIZE]], %"struct.std::nothrow_t"* nonnull align 1 dereferenceable(1) @_ZStL7nothrow) + // CHECK: %[[MEM:.+]] = call frozen noalias i8* @_ZnwmRKSt9nothrow_t(i64 frozen %[[SIZE]], %"struct.std::nothrow_t"* frozen nonnull align 1 dereferenceable(1) @_ZStL7nothrow) // CHECK: %[[OK:.+]] = icmp ne i8* %[[MEM]], null // CHECK: br i1 %[[OK]], label %[[OKBB:.+]], label %[[ERRBB:.+]] // CHECK: [[ERRBB]]: - // CHECK: %[[FailRet:.+]] = call i32 @_ZNSt12experimental16coroutine_traitsIJi28promise_on_alloc_failure_tagEE12promise_type39get_return_object_on_allocation_failureEv( + // CHECK: %[[FailRet:.+]] = call frozen i32 @_ZNSt12experimental16coroutine_traitsIJi28promise_on_alloc_failure_tagEE12promise_type39get_return_object_on_allocation_failureEv( // CHECK: store i32 %[[FailRet]], i32* %[[RetVal]] // CHECK: br label %[[RetBB:.+]] // CHECK: [[OKBB]]: - // CHECK: %[[OkRet:.+]] = call i32 @_ZNSt12experimental16coroutine_traitsIJi28promise_on_alloc_failure_tagEE12promise_type17get_return_objectEv( + // CHECK: %[[OkRet:.+]] = call frozen i32 @_ZNSt12experimental16coroutine_traitsIJi28promise_on_alloc_failure_tagEE12promise_type17get_return_objectEv( // CHECK: store i32 %[[OkRet]], i32* %[[Gro]] // CHECK: %[[Tmp1:.*]] = load i32, i32* %[[Gro]] diff --git a/clang/test/CodeGenCoroutines/coro-await.cpp b/clang/test/CodeGenCoroutines/coro-await.cpp --- a/clang/test/CodeGenCoroutines/coro-await.cpp +++ b/clang/test/CodeGenCoroutines/coro-await.cpp @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -fcoroutines-ts -std=c++14 \ +// RUN: %clang_cc1 -disable-frozen-args -triple x86_64-unknown-linux-gnu -fcoroutines-ts -std=c++14 \ // RUN: -emit-llvm %s -o - -disable-llvm-passes -Wno-coroutine -Wno-unused | FileCheck %s namespace std { @@ -58,14 +58,14 @@ // See if initial_suspend was issued: // ---------------------------------- // CHECK: call void @_ZNSt12experimental16coroutine_traitsIJvEE12promise_type15initial_suspendEv( - // CHECK-NEXT: call zeroext i1 @_ZN9init_susp11await_readyEv(%struct.init_susp* + // CHECK-NEXT: call frozen zeroext i1 @_ZN9init_susp11await_readyEv(%struct.init_susp* // CHECK: %[[INITSP_ID:.+]] = call token @llvm.coro.save( // CHECK: call i8 @llvm.coro.suspend(token %[[INITSP_ID]], i1 false) co_await suspend_always{}; // See if we need to suspend: // -------------------------- - // CHECK: %[[READY:.+]] = call zeroext i1 @_ZN14suspend_always11await_readyEv(%struct.suspend_always* %[[AWAITABLE:.+]]) + // CHECK: %[[READY:.+]] = call frozen zeroext i1 @_ZN14suspend_always11await_readyEv(%struct.suspend_always* %[[AWAITABLE:.+]]) // CHECK: br i1 %[[READY]], label %[[READY_BB:.+]], label %[[SUSPEND_BB:.+]] // If we are suspending: @@ -100,7 +100,7 @@ // See if final_suspend was issued: // ---------------------------------- // CHECK: call void @_ZNSt12experimental16coroutine_traitsIJvEE12promise_type13final_suspendEv( - // CHECK-NEXT: call zeroext i1 @_ZN10final_susp11await_readyEv(%struct.final_susp* + // CHECK-NEXT: call frozen zeroext i1 @_ZN10final_susp11await_readyEv(%struct.final_susp* // CHECK: %[[FINALSP_ID:.+]] = call token @llvm.coro.save( // CHECK: call i8 @llvm.coro.suspend(token %[[FINALSP_ID]], i1 true) } @@ -134,7 +134,7 @@ // See if we need to suspend: // -------------------------- - // CHECK: %[[READY:.+]] = call zeroext i1 @_ZN13suspend_maybe11await_readyEv(%struct.suspend_maybe* %[[AWAITABLE]]) + // CHECK: %[[READY:.+]] = call frozen zeroext i1 @_ZN13suspend_maybe11await_readyEv(%struct.suspend_maybe* %[[AWAITABLE]]) // CHECK: br i1 %[[READY]], label %[[READY_BB:.+]], label %[[SUSPEND_BB:.+]] // If we are suspending: @@ -147,7 +147,7 @@ // CHECK: call i8* @_ZNSt12experimental16coroutine_handleINS_16coroutine_traitsIJviEE12promise_typeEE12from_addressEPv(i8* %[[FRAME]]) // ... many lines of code to coerce coroutine_handle into an i8* scalar // CHECK: %[[CH:.+]] = load i8*, i8** %{{.+}} - // CHECK: %[[YES:.+]] = call zeroext i1 @_ZN13suspend_maybe13await_suspendENSt12experimental16coroutine_handleIvEE(%struct.suspend_maybe* %[[AWAITABLE]], i8* %[[CH]]) + // CHECK: %[[YES:.+]] = call frozen zeroext i1 @_ZN13suspend_maybe13await_suspendENSt12experimental16coroutine_handleIvEE(%struct.suspend_maybe* %[[AWAITABLE]], i8* %[[CH]]) // ------------------------------------------- // See if await_suspend decided not to suspend // ------------------------------------------- @@ -170,14 +170,14 @@ // CHECK-LABEL: @TestComplex( extern "C" void TestComplex() { UseComplex(co_await ComplexAwaiter{}); - // CHECK: call <2 x float> @_ZN14ComplexAwaiter12await_resumeEv(%struct.ComplexAwaiter* + // CHECK: call frozen <2 x float> @_ZN14ComplexAwaiter12await_resumeEv(%struct.ComplexAwaiter* // CHECK: call void @UseComplex(<2 x float> %{{.+}}) co_await ComplexAwaiter{}; - // CHECK: call <2 x float> @_ZN14ComplexAwaiter12await_resumeEv(%struct.ComplexAwaiter* + // CHECK: call frozen <2 x float> @_ZN14ComplexAwaiter12await_resumeEv(%struct.ComplexAwaiter* _Complex float Val = co_await ComplexAwaiter{}; - // CHECK: call <2 x float> @_ZN14ComplexAwaiter12await_resumeEv(%struct.ComplexAwaiter* + // CHECK: call frozen <2 x float> @_ZN14ComplexAwaiter12await_resumeEv(%struct.ComplexAwaiter* } struct Aggr { int X, Y, Z; ~Aggr(); }; @@ -226,15 +226,15 @@ // CHECK-LABEL: @TestScalar( extern "C" void TestScalar() { UseScalar(co_await ScalarAwaiter{}); - // CHECK: %[[Result:.+]] = call i32 @_ZN13ScalarAwaiter12await_resumeEv(%struct.ScalarAwaiter* + // CHECK: %[[Result:.+]] = call frozen i32 @_ZN13ScalarAwaiter12await_resumeEv(%struct.ScalarAwaiter* // CHECK: call void @UseScalar(i32 %[[Result]]) int Val = co_await ScalarAwaiter{}; - // CHECK: %[[Result2:.+]] = call i32 @_ZN13ScalarAwaiter12await_resumeEv(%struct.ScalarAwaiter* + // CHECK: %[[Result2:.+]] = call frozen i32 @_ZN13ScalarAwaiter12await_resumeEv(%struct.ScalarAwaiter* // CHECK: store i32 %[[Result2]], i32* %Val co_await ScalarAwaiter{}; - // CHECK: call i32 @_ZN13ScalarAwaiter12await_resumeEv(%struct.ScalarAwaiter* + // CHECK: call frozen i32 @_ZN13ScalarAwaiter12await_resumeEv(%struct.ScalarAwaiter* } // Test operator co_await codegen. @@ -249,7 +249,7 @@ extern "C" void TestOpAwait() { co_await MyInt(42); // CHECK: call void @_Zaw5MyInt(i32 42) - // CHECK: call i32 @_ZN13ScalarAwaiter12await_resumeEv(%struct.ScalarAwaiter* % + // CHECK: call frozen i32 @_ZN13ScalarAwaiter12await_resumeEv(%struct.ScalarAwaiter* % co_await MyAgg{}; // CHECK: call void @_ZN5MyAggawEv(%struct.MyAgg* % @@ -263,7 +263,7 @@ // See if initial_suspend was issued: // ---------------------------------- // CHECK: call void @_ZNSt12experimental16coroutine_traitsIJvEE12promise_type15initial_suspendEv( - // CHECK-NEXT: call zeroext i1 @_ZN9init_susp11await_readyEv(%struct.init_susp* + // CHECK-NEXT: call frozen zeroext i1 @_ZN9init_susp11await_readyEv(%struct.init_susp* for (;;) co_await suspend_always{}; @@ -271,7 +271,7 @@ // Verify that final_suspend was NOT issued: // ---------------------------------- // CHECK-NOT: call void @_ZNSt12experimental16coroutine_traitsIJvEE12promise_type13final_suspendEv( - // CHECK-NOT: call zeroext i1 @_ZN10final_susp11await_readyEv(%struct.final_susp* + // CHECK-NOT: call frozen zeroext i1 @_ZN10final_susp11await_readyEv(%struct.final_susp* } // Verifies that we don't crash when awaiting on an lvalue. @@ -315,15 +315,15 @@ // CHECK: %[[ZVAR:.+]] = alloca %struct.RefTag*, // CHECK-NEXT: %[[TMP2:.+]] = alloca %struct.AwaitResumeReturnsLValue, - // CHECK: %[[RES1:.+]] = call nonnull align 1 dereferenceable({{.*}}) %struct.RefTag* @_ZN24AwaitResumeReturnsLValue12await_resumeEv(%struct.AwaitResumeReturnsLValue* %[[AVAR]]) + // CHECK: %[[RES1:.+]] = call frozen nonnull align 1 dereferenceable({{.*}}) %struct.RefTag* @_ZN24AwaitResumeReturnsLValue12await_resumeEv(%struct.AwaitResumeReturnsLValue* %[[AVAR]]) // CHECK-NEXT: store %struct.RefTag* %[[RES1]], %struct.RefTag** %[[XVAR]], RefTag& x = co_await a; - // CHECK: %[[RES2:.+]] = call nonnull align 1 dereferenceable({{.*}}) %struct.RefTag* @_ZN24AwaitResumeReturnsLValue12await_resumeEv(%struct.AwaitResumeReturnsLValue* %[[TMP1]]) + // CHECK: %[[RES2:.+]] = call frozen nonnull align 1 dereferenceable({{.*}}) %struct.RefTag* @_ZN24AwaitResumeReturnsLValue12await_resumeEv(%struct.AwaitResumeReturnsLValue* %[[TMP1]]) // CHECK-NEXT: store %struct.RefTag* %[[RES2]], %struct.RefTag** %[[YVAR]], RefTag& y = co_await AwaitResumeReturnsLValue{}; - // CHECK: %[[RES3:.+]] = call nonnull align 1 dereferenceable({{.*}}) %struct.RefTag* @_ZN24AwaitResumeReturnsLValue12await_resumeEv(%struct.AwaitResumeReturnsLValue* %[[TMP2]]) + // CHECK: %[[RES3:.+]] = call frozen nonnull align 1 dereferenceable({{.*}}) %struct.RefTag* @_ZN24AwaitResumeReturnsLValue12await_resumeEv(%struct.AwaitResumeReturnsLValue* %[[TMP2]]) // CHECK-NEXT: store %struct.RefTag* %[[RES3]], %struct.RefTag** %[[ZVAR]], RefTag& z = co_yield 42; } @@ -341,6 +341,6 @@ // CHECK: %[[RESULT:.+]] = call i8* @_ZN13TailCallAwait13await_suspendENSt12experimental16coroutine_handleIvEE(%struct.TailCallAwait* // CHECK: %[[COERCE:.+]] = getelementptr inbounds %"struct.std::experimental::coroutine_handle", %"struct.std::experimental::coroutine_handle"* %[[TMP:.+]], i32 0, i32 0 // CHECK: store i8* %[[RESULT]], i8** %[[COERCE]] - // CHECK: %[[ADDR:.+]] = call i8* @_ZNSt12experimental16coroutine_handleIvE7addressEv(%"struct.std::experimental::coroutine_handle"* %[[TMP]]) + // CHECK: %[[ADDR:.+]] = call frozen i8* @_ZNSt12experimental16coroutine_handleIvE7addressEv(%"struct.std::experimental::coroutine_handle"* %[[TMP]]) // CHECK: call void @llvm.coro.resume(i8* %[[ADDR]]) } diff --git a/clang/test/CodeGenCoroutines/coro-builtins.c b/clang/test/CodeGenCoroutines/coro-builtins.c --- a/clang/test/CodeGenCoroutines/coro-builtins.c +++ b/clang/test/CodeGenCoroutines/coro-builtins.c @@ -21,7 +21,7 @@ __builtin_coro_noop(); // CHECK-NEXT: %[[SIZE:.+]] = call i64 @llvm.coro.size.i64() - // CHECK-NEXT: %[[MEM:.+]] = call i8* @myAlloc(i64 %[[SIZE]]) + // CHECK-NEXT: %[[MEM:.+]] = call frozen i8* @myAlloc(i64 frozen %[[SIZE]]) // CHECK-NEXT: %[[FRAME:.+]] = call i8* @llvm.coro.begin(token %[[COROID]], i8* %[[MEM]]) __builtin_coro_begin(myAlloc(__builtin_coro_size())); diff --git a/clang/test/CodeGenCoroutines/coro-cleanup.cpp b/clang/test/CodeGenCoroutines/coro-cleanup.cpp --- a/clang/test/CodeGenCoroutines/coro-cleanup.cpp +++ b/clang/test/CodeGenCoroutines/coro-cleanup.cpp @@ -39,7 +39,7 @@ // CHECK-LABEL: define void @_Z1fv( void f() { - // CHECK: call noalias nonnull i8* @_Znwm(i64 + // CHECK: call frozen noalias nonnull i8* @_Znwm(i64 // If promise constructor throws, check that we free the memory. @@ -79,11 +79,11 @@ // CHECK: [[Cleanup]]: // CHECK: call void @_ZNSt12experimental16coroutine_traitsIJvEE12promise_typeD1Ev( // CHECK: %[[Mem0:.+]] = call i8* @llvm.coro.free( - // CHECK: call void @_ZdlPv(i8* %[[Mem0]] + // CHECK: call void @_ZdlPv(i8* frozen %[[Mem0]] // CHECK: [[Dealloc]]: // CHECK: %[[Mem:.+]] = call i8* @llvm.coro.free( - // CHECK: call void @_ZdlPv(i8* %[[Mem]]) + // CHECK: call void @_ZdlPv(i8* frozen %[[Mem]]) co_return; } diff --git a/clang/test/CodeGenCoroutines/coro-gro-nrvo.cpp b/clang/test/CodeGenCoroutines/coro-gro-nrvo.cpp --- a/clang/test/CodeGenCoroutines/coro-gro-nrvo.cpp +++ b/clang/test/CodeGenCoroutines/coro-gro-nrvo.cpp @@ -34,9 +34,9 @@ }; // Verify that the NRVO is applied to the Gro object. -// CHECK-LABEL: define void @_Z1fi(%struct.coro* noalias sret align 8 %agg.result, i32 %0) +// CHECK-LABEL: define void @_Z1fi(%struct.coro* noalias sret align 8 %agg.result, i32 frozen %0) coro f(int) { -// CHECK: %call = call noalias nonnull i8* @_Znwm( +// CHECK: %call = call frozen noalias nonnull i8* @_Znwm( // CHECK-NEXT: br label %[[CoroInit:.*]] // CHECK: {{.*}}[[CoroInit]]: @@ -65,10 +65,10 @@ }; // Verify that the NRVO is applied to the Gro object. -// CHECK-LABEL: define void @_Z1hi(%struct.coro_two* noalias sret align 8 %agg.result, i32 %0) +// CHECK-LABEL: define void @_Z1hi(%struct.coro_two* noalias sret align 8 %agg.result, i32 frozen %0) coro_two h(int) { -// CHECK: %call = call noalias i8* @_ZnwmRKSt9nothrow_t +// CHECK: %call = call frozen noalias i8* @_ZnwmRKSt9nothrow_t // CHECK-NEXT: %[[CheckNull:.*]] = icmp ne i8* %call, null // CHECK-NEXT: br i1 %[[CheckNull]], label %[[InitOnSuccess:.*]], label %[[InitOnFailure:.*]] diff --git a/clang/test/CodeGenCoroutines/coro-gro.cpp b/clang/test/CodeGenCoroutines/coro-gro.cpp --- a/clang/test/CodeGenCoroutines/coro-gro.cpp +++ b/clang/test/CodeGenCoroutines/coro-gro.cpp @@ -43,13 +43,13 @@ struct Cleanup { ~Cleanup(); }; void doSomething() noexcept; -// CHECK: define i32 @_Z1fv( +// CHECK: define frozen i32 @_Z1fv( int f() { // CHECK: %[[RetVal:.+]] = alloca i32 // CHECK: %[[GroActive:.+]] = alloca i1 // CHECK: %[[Size:.+]] = call i64 @llvm.coro.size.i64() - // CHECK: call noalias nonnull i8* @_Znwm(i64 %[[Size]]) + // CHECK: call frozen noalias nonnull i8* @_Znwm(i64 frozen %[[Size]]) // CHECK: store i1 false, i1* %[[GroActive]] // CHECK: call void @_ZNSt12experimental16coroutine_traitsIJiEE12promise_typeC1Ev( // CHECK: call void @_ZNSt12experimental16coroutine_traitsIJiEE12promise_type17get_return_objectEv( @@ -67,11 +67,11 @@ // CHECK: call void @_ZNSt12experimental16coroutine_traitsIJiEE12promise_typeD1Ev( // CHECK: %[[Mem:.+]] = call i8* @llvm.coro.free( - // CHECK: call void @_ZdlPv(i8* %[[Mem]]) + // CHECK: call void @_ZdlPv(i8* frozen %[[Mem]]) // Initialize retval from Gro and destroy Gro - // CHECK: %[[Conv:.+]] = call i32 @_ZN7GroTypecviEv( + // CHECK: %[[Conv:.+]] = call frozen i32 @_ZN7GroTypecviEv( // CHECK: store i32 %[[Conv]], i32* %[[RetVal]] // CHECK: %[[IsActive:.+]] = load i1, i1* %[[GroActive]] // CHECK: br i1 %[[IsActive]], label %[[CleanupGro:.+]], label %[[Done:.+]] diff --git a/clang/test/CodeGenCoroutines/coro-params.cpp b/clang/test/CodeGenCoroutines/coro-params.cpp --- a/clang/test/CodeGenCoroutines/coro-params.cpp +++ b/clang/test/CodeGenCoroutines/coro-params.cpp @@ -62,15 +62,15 @@ void consume(int,int,int) noexcept; // TODO: Add support for CopyOnly params -// CHECK: define void @_Z1fi8MoveOnly11MoveAndCopy(i32 %val, %struct.MoveOnly* %[[MoParam:.+]], %struct.MoveAndCopy* %[[McParam:.+]]) #0 personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8* +// CHECK: define void @_Z1fi8MoveOnly11MoveAndCopy(i32 frozen %val, %struct.MoveOnly* frozen %[[MoParam:.+]], %struct.MoveAndCopy* frozen %[[McParam:.+]]) #0 personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8* void f(int val, MoveOnly moParam, MoveAndCopy mcParam) { // CHECK: %[[MoCopy:.+]] = alloca %struct.MoveOnly // CHECK: %[[McCopy:.+]] = alloca %struct.MoveAndCopy // CHECK: store i32 %val, i32* %[[ValAddr:.+]] // CHECK: call i8* @llvm.coro.begin( - // CHECK: call void @_ZN8MoveOnlyC1EOS_(%struct.MoveOnly* %[[MoCopy]], %struct.MoveOnly* nonnull align 4 dereferenceable(4) %[[MoParam]]) - // CHECK-NEXT: call void @_ZN11MoveAndCopyC1EOS_(%struct.MoveAndCopy* %[[McCopy]], %struct.MoveAndCopy* nonnull align 4 dereferenceable(4) %[[McParam]]) # + // CHECK: call void @_ZN8MoveOnlyC1EOS_(%struct.MoveOnly* frozen %[[MoCopy]], %struct.MoveOnly* frozen nonnull align 4 dereferenceable(4) %[[MoParam]]) + // CHECK-NEXT: call void @_ZN11MoveAndCopyC1EOS_(%struct.MoveAndCopy* frozen %[[McCopy]], %struct.MoveAndCopy* frozen nonnull align 4 dereferenceable(4) %[[McParam]]) # // CHECK-NEXT: invoke void @_ZNSt12experimental16coroutine_traitsIJvi8MoveOnly11MoveAndCopyEE12promise_typeC1Ev( // CHECK: call void @_ZN14suspend_always12await_resumeEv( @@ -79,7 +79,7 @@ // CHECK: %[[MoVal:.+]] = load i32, i32* %[[MoGep]] // CHECK: %[[McGep:.+]] = getelementptr inbounds %struct.MoveAndCopy, %struct.MoveAndCopy* %[[McCopy]], i32 0, i32 0 // CHECK: %[[McVal:.+]] = load i32, i32* %[[McGep]] - // CHECK: call void @_Z7consumeiii(i32 %[[IntParam]], i32 %[[MoVal]], i32 %[[McVal]]) + // CHECK: call void @_Z7consumeiii(i32 frozen %[[IntParam]], i32 frozen %[[MoVal]], i32 frozen %[[McVal]]) consume(val, moParam.val, mcParam.val); co_return; @@ -89,13 +89,13 @@ // CHECK: call void @_ZN14suspend_always12await_resumeEv( // Destroy promise, then parameter copies: - // CHECK: call void @_ZNSt12experimental16coroutine_traitsIJvi8MoveOnly11MoveAndCopyEE12promise_typeD1Ev(%"struct.std::experimental::coroutine_traits::promise_type"* %__promise) #2 - // CHECK-NEXT: call void @_ZN11MoveAndCopyD1Ev(%struct.MoveAndCopy* %[[McCopy]]) - // CHECK-NEXT: call void @_ZN8MoveOnlyD1Ev(%struct.MoveOnly* %[[MoCopy]] + // CHECK: call void @_ZNSt12experimental16coroutine_traitsIJvi8MoveOnly11MoveAndCopyEE12promise_typeD1Ev(%"struct.std::experimental::coroutine_traits::promise_type"* frozen %__promise) #2 + // CHECK-NEXT: call void @_ZN11MoveAndCopyD1Ev(%struct.MoveAndCopy* frozen %[[McCopy]]) + // CHECK-NEXT: call void @_ZN8MoveOnlyD1Ev(%struct.MoveOnly* frozen %[[MoCopy]] // CHECK-NEXT: call i8* @llvm.coro.free( } -// CHECK-LABEL: void @_Z16dependent_paramsI1A1BEvT_T0_S3_(%struct.A* %x, %struct.B* %0, %struct.B* %y) +// CHECK-LABEL: void @_Z16dependent_paramsI1A1BEvT_T0_S3_(%struct.A* frozen %x, %struct.B* frozen %0, %struct.B* frozen %y) template void dependent_params(T x, U, U y) { // CHECK: %[[x_copy:.+]] = alloca %struct.A @@ -103,9 +103,9 @@ // CHECK-NEXT: %[[y_copy:.+]] = alloca %struct.B // CHECK: call i8* @llvm.coro.begin - // CHECK-NEXT: call void @_ZN1AC1EOS_(%struct.A* %[[x_copy]], %struct.A* nonnull align 4 dereferenceable(512) %x) - // CHECK-NEXT: call void @_ZN1BC1EOS_(%struct.B* %[[unnamed_copy]], %struct.B* nonnull align 4 dereferenceable(512) %0) - // CHECK-NEXT: call void @_ZN1BC1EOS_(%struct.B* %[[y_copy]], %struct.B* nonnull align 4 dereferenceable(512) %y) + // CHECK-NEXT: call void @_ZN1AC1EOS_(%struct.A* frozen %[[x_copy]], %struct.A* frozen nonnull align 4 dereferenceable(512) %x) + // CHECK-NEXT: call void @_ZN1BC1EOS_(%struct.B* frozen %[[unnamed_copy]], %struct.B* frozen nonnull align 4 dereferenceable(512) %0) + // CHECK-NEXT: call void @_ZN1BC1EOS_(%struct.B* frozen %[[y_copy]], %struct.B* frozen nonnull align 4 dereferenceable(512) %y) // CHECK-NEXT: invoke void @_ZNSt12experimental16coroutine_traitsIJv1A1BS2_EE12promise_typeC1Ev( co_return; @@ -148,12 +148,12 @@ }; }; -// CHECK-LABEL: void @_Z38coroutine_matching_promise_constructor28promise_matching_constructorifd(i32 %0, float %1, double %2) +// CHECK-LABEL: void @_Z38coroutine_matching_promise_constructor28promise_matching_constructorifd(i32 frozen %0, float frozen %1, double frozen %2) void coroutine_matching_promise_constructor(promise_matching_constructor, int, float, double) { // CHECK: %[[INT:.+]] = load i32, i32* %5, align 4 // CHECK: %[[FLOAT:.+]] = load float, float* %6, align 4 // CHECK: %[[DOUBLE:.+]] = load double, double* %7, align 8 - // CHECK: invoke void @_ZNSt12experimental16coroutine_traitsIJv28promise_matching_constructorifdEE12promise_typeC1ES1_ifd(%"struct.std::experimental::coroutine_traits::promise_type"* %__promise, i32 %[[INT]], float %[[FLOAT]], double %[[DOUBLE]]) + // CHECK: invoke void @_ZNSt12experimental16coroutine_traitsIJv28promise_matching_constructorifdEE12promise_typeC1ES1_ifd(%"struct.std::experimental::coroutine_traits::promise_type"* frozen %__promise, i32 frozen %[[INT]], float frozen %[[FLOAT]], double frozen %[[DOUBLE]]) co_return; } @@ -178,6 +178,6 @@ // CHECK-LABEL: define void @_ZN10some_class39good_coroutine_calls_custom_constructorEf(%struct.some_class* method some_class::good_coroutine_calls_custom_constructor(float) { - // CHECK: invoke void @_ZNSt12experimental16coroutine_traitsIJ6methodR10some_classfEE12promise_typeC1ES3_f(%"struct.std::experimental::coroutine_traits::promise_type"* %__promise, %struct.some_class* nonnull align 1 dereferenceable(1) %{{.+}}, float + // CHECK: invoke void @_ZNSt12experimental16coroutine_traitsIJ6methodR10some_classfEE12promise_typeC1ES3_f(%"struct.std::experimental::coroutine_traits::promise_type"* frozen %__promise, %struct.some_class* frozen nonnull align 1 dereferenceable(1) %{{.+}}, float co_return; } diff --git a/clang/test/CodeGenCoroutines/coro-promise-dtor.cpp b/clang/test/CodeGenCoroutines/coro-promise-dtor.cpp --- a/clang/test/CodeGenCoroutines/coro-promise-dtor.cpp +++ b/clang/test/CodeGenCoroutines/coro-promise-dtor.cpp @@ -32,7 +32,7 @@ // CHECK: %gro.active = alloca i1 // CHECK: store i1 false, i1* %gro.active -// CHECK: invoke %"struct.coro_t::promise_type"* @"??0promise_type@coro_t@@QEAA@XZ"( +// CHECK: invoke frozen %"struct.coro_t::promise_type"* @"??0promise_type@coro_t@@QEAA@XZ"( // CHECK: invoke void @"?get_return_object@promise_type@coro_t@@QEAA?AU2@XZ"( // CHECK: store i1 true, i1* %gro.active diff --git a/clang/test/CodeGenCoroutines/coro-ret-void.cpp b/clang/test/CodeGenCoroutines/coro-ret-void.cpp --- a/clang/test/CodeGenCoroutines/coro-ret-void.cpp +++ b/clang/test/CodeGenCoroutines/coro-ret-void.cpp @@ -19,7 +19,7 @@ // CHECK-LABEL: define void @_Z1fv( // CHECK: call void @_ZNSt12experimental13coroutines_v113suspend_never12await_resumeEv(%"struct.std::experimental::coroutines_v1::suspend_never"* -// CHECK: call void @_ZN5coro112promise_type11return_voidEv(%"struct.coro1::promise_type"* %__promise) +// CHECK: call void @_ZN5coro112promise_type11return_voidEv(%"struct.coro1::promise_type"* frozen %__promise) struct A { A(); @@ -31,8 +31,8 @@ } // CHECK-LABEL: define void @_Z2f2v( -// CHECK: call void @_ZN1AC1Ev(%struct.A* %[[AVar:.*]]) -// CHECK-NEXT: call void @_ZN1AD1Ev(%struct.A* %[[AVar]]) +// CHECK: call void @_ZN1AC1Ev(%struct.A* frozen %[[AVar:.*]]) +// CHECK-NEXT: call void @_ZN1AD1Ev(%struct.A* frozen %[[AVar]]) // CHECK-NEXT: call void @_ZN5coro112promise_type11return_voidEv(%"struct.coro1::promise_type"* struct coro2 { @@ -50,4 +50,4 @@ // CHECK-LABEL: define void @_Z1gv( // CHECK: call void @_ZNSt12experimental13coroutines_v113suspend_never12await_resumeEv(%"struct.std::experimental::coroutines_v1::suspend_never"* -// CHECK: call void @_ZN5coro212promise_type12return_valueEi(%"struct.coro2::promise_type"* %__promise, i32 42) +// CHECK: call void @_ZN5coro212promise_type12return_valueEi(%"struct.coro2::promise_type"* frozen %__promise, i32 frozen 42) diff --git a/clang/test/CodeGenCoroutines/coro-return-voidtype-initlist.cpp b/clang/test/CodeGenCoroutines/coro-return-voidtype-initlist.cpp --- a/clang/test/CodeGenCoroutines/coro-return-voidtype-initlist.cpp +++ b/clang/test/CodeGenCoroutines/coro-return-voidtype-initlist.cpp @@ -72,7 +72,7 @@ f>> J::bo() { std::c bu; int bw(0); - // CHECK: void @_ZN1j12return_valueESt1bISt1cIiiEE(%struct.j* %__promise) + // CHECK: void @_ZN1j12return_valueESt1bISt1cIiiEE(%struct.j* frozen %__promise) co_return{0, co_await ax(bu, bw)}; } void bh() { diff --git a/clang/test/CodeGenCoroutines/coro-return.cpp b/clang/test/CodeGenCoroutines/coro-return.cpp --- a/clang/test/CodeGenCoroutines/coro-return.cpp +++ b/clang/test/CodeGenCoroutines/coro-return.cpp @@ -33,8 +33,8 @@ // CHECK-LABEL: f0( extern "C" void f0() { // CHECK: %__promise = alloca %"struct.std::experimental::coroutine_traits::promise_type" - // CHECK: %call = call noalias nonnull i8* @_Znwm( - // CHECK: call void @_ZNSt12experimental16coroutine_traitsIJvEE12promise_type11return_voidEv(%"struct.std::experimental::coroutine_traits::promise_type"* %__promise) + // CHECK: %call = call frozen noalias nonnull i8* @_Znwm( + // CHECK: call void @_ZNSt12experimental16coroutine_traitsIJvEE12promise_type11return_voidEv(%"struct.std::experimental::coroutine_traits::promise_type"* frozen %__promise) // CHECK: call void @_ZdlPv co_return; } @@ -52,8 +52,8 @@ // CHECK-LABEL: f1( extern "C" int f1() { // CHECK: %__promise = alloca %"struct.std::experimental::coroutine_traits::promise_type" - // CHECK: %call = call noalias nonnull i8* @_Znwm( - // CHECK: call void @_ZNSt12experimental16coroutine_traitsIJiEE12promise_type12return_valueEi(%"struct.std::experimental::coroutine_traits::promise_type"* %__promise, i32 42) + // CHECK: %call = call frozen noalias nonnull i8* @_Znwm( + // CHECK: call void @_ZNSt12experimental16coroutine_traitsIJiEE12promise_type12return_valueEi(%"struct.std::experimental::coroutine_traits::promise_type"* frozen %__promise, i32 frozen 42) // CHECK: call void @_ZdlPv co_return 42; } diff --git a/clang/test/CodeGenCoroutines/coro-unhandled-exception.cpp b/clang/test/CodeGenCoroutines/coro-unhandled-exception.cpp --- a/clang/test/CodeGenCoroutines/coro-unhandled-exception.cpp +++ b/clang/test/CodeGenCoroutines/coro-unhandled-exception.cpp @@ -58,12 +58,12 @@ // CHECK-LPAD: invoke void @_Z9may_throwv() // CHECK-LPAD: to label %[[CONT:.+]] unwind label %[[CLEANUP:.+]] // CHECK-LPAD: [[CLEANUP]]: -// CHECK-LPAD: call void @_ZN7CleanupD1Ev(%struct.Cleanup* %x) #2 +// CHECK-LPAD: call void @_ZN7CleanupD1Ev(%struct.Cleanup* frozen %x) #2 // CHECK-LPAD: br label %[[CATCH:.+]] // CHECK-LPAD: [[CATCH]]: // CHECK-LPAD: call i8* @__cxa_begin_catch -// CHECK-LPAD: call void @_ZN6coro_t12promise_type19unhandled_exceptionEv(%"struct.coro_t::promise_type"* %__promise) #2 +// CHECK-LPAD: call void @_ZN6coro_t12promise_type19unhandled_exceptionEv(%"struct.coro_t::promise_type"* frozen %__promise) #2 // CHECK-LPAD: invoke void @__cxa_end_catch() // CHECK-LPAD-NEXT: to label %[[CATCHRETDEST:.+]] unwind label // CHECK-LPAD: [[CATCHRETDEST]]: diff --git a/clang/test/CodeGenCoroutines/microsoft-abi-operator-coawait.cpp b/clang/test/CodeGenCoroutines/microsoft-abi-operator-coawait.cpp --- a/clang/test/CodeGenCoroutines/microsoft-abi-operator-coawait.cpp +++ b/clang/test/CodeGenCoroutines/microsoft-abi-operator-coawait.cpp @@ -19,7 +19,7 @@ B b; // CHECK: call void @"??__LA@@QEAA?AUno_suspend@@XZ"( a.operator co_await(); - // CHECK-NEXT: call i8 @"??__L@YA?AUno_suspend@@AEBUB@@@Z"( + // CHECK-NEXT: call {{.*}} i8 @"??__L@YA?AUno_suspend@@AEBUB@@@Z"( operator co_await(b); } diff --git a/clang/test/CodeGenObjC/2009-01-21-invalid-debug-info.m b/clang/test/CodeGenObjC/2009-01-21-invalid-debug-info.m --- a/clang/test/CodeGenObjC/2009-01-21-invalid-debug-info.m +++ b/clang/test/CodeGenObjC/2009-01-21-invalid-debug-info.m @@ -1,6 +1,6 @@ // RUN: %clang_cc1 -S -debug-info-kind=limited -o %t.s %s -// FIXME: This test case can be removed at some point (since it will +// FIXME: This test case can be removed at some point (since it will // no longer effectively test anything). The reason it was causing // trouble was the synthesized self decl in im1 was causing the debug // info for I1* to be generated, but referring to an invalid compile diff --git a/clang/test/CodeGenObjC/NSFastEnumeration.m b/clang/test/CodeGenObjC/NSFastEnumeration.m --- a/clang/test/CodeGenObjC/NSFastEnumeration.m +++ b/clang/test/CodeGenObjC/NSFastEnumeration.m @@ -8,9 +8,9 @@ (void)i; } -// CHECK32: call i32 bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to i32 (i8*, i8*, %struct.__objcFastEnumerationState*, [16 x i8*]*, i32)*) -// CHECK32: call i32 bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to i32 (i8*, i8*, %struct.__objcFastEnumerationState*, [16 x i8*]*, i32)*) +// CHECK32: call frozen i32 bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to i32 (i8*, i8*, %struct.__objcFastEnumerationState*, [16 x i8*]*, i32)*) +// CHECK32: call frozen i32 bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to i32 (i8*, i8*, %struct.__objcFastEnumerationState*, [16 x i8*]*, i32)*) -// CHECK64: call i64 bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to i64 (i8*, i8*, %struct.__objcFastEnumerationState*, [16 x i8*]*, i64)*) -// CHECK64: call i64 bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to i64 (i8*, i8*, %struct.__objcFastEnumerationState*, [16 x i8*]*, i64)*) +// CHECK64: call frozen i64 bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to i64 (i8*, i8*, %struct.__objcFastEnumerationState*, [16 x i8*]*, i64)*) +// CHECK64: call frozen i64 bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to i64 (i8*, i8*, %struct.__objcFastEnumerationState*, [16 x i8*]*, i64)*) diff --git a/clang/test/CodeGenObjC/arc-arm.m b/clang/test/CodeGenObjC/arc-arm.m --- a/clang/test/CodeGenObjC/arc-arm.m +++ b/clang/test/CodeGenObjC/arc-arm.m @@ -5,14 +5,14 @@ id test0(void) { extern id test0_helper(void); - // CHECK: [[T0:%.*]] = call [[CC:(arm_aapcscc )?]]i8* @test0_helper() + // CHECK: [[T0:%.*]] = call frozen [[CC:(arm_aapcscc )?]]i8* @test0_helper() // CHECK-NEXT: ret i8* [[T0]] return test0_helper(); } void test1(void) { extern id test1_helper(void); - // CHECK: [[T0:%.*]] = call [[CC]]i8* @test1_helper() + // CHECK: [[T0:%.*]] = call frozen [[CC]]i8* @test1_helper() // CHECK-NEXT: call void asm sideeffect "mov\09{{fp, fp|r7, r7}}\09\09// marker for objc_retainAutoreleaseReturnValue" // CHECK-NEXT: [[T1:%.*]] = call [[CC]]i8* @llvm.objc.retainAutoreleasedReturnValue(i8* [[T0]]) // CHECK-NEXT: store i8* [[T1]], @@ -25,14 +25,14 @@ @class A; A *test2(void) { extern A *test2_helper(void); - // CHECK: [[T0:%.*]] = call [[CC]][[A:%.*]]* @test2_helper() + // CHECK: [[T0:%.*]] = call frozen [[CC]][[A:%.*]]* @test2_helper() // CHECK-NEXT: ret [[A]]* [[T0]] return test2_helper(); } id test3(void) { extern A *test3_helper(void); - // CHECK: [[T0:%.*]] = call [[CC]][[A:%.*]]* @test3_helper() + // CHECK: [[T0:%.*]] = call frozen [[CC]][[A:%.*]]* @test3_helper() // CHECK-NEXT: [[T1:%.*]] = bitcast [[A]]* [[T0]] to i8* // CHECK-NEXT: ret i8* [[T1]] return test3_helper(); diff --git a/clang/test/CodeGenObjC/arc-blocks.m b/clang/test/CodeGenObjC/arc-blocks.m --- a/clang/test/CodeGenObjC/arc-blocks.m +++ b/clang/test/CodeGenObjC/arc-blocks.m @@ -13,7 +13,7 @@ } int (^test1(int x))(void) { - // CHECK-LABEL: define i32 ()* @test1( + // CHECK-LABEL: define frozen i32 ()* @test1( // CHECK: [[X:%.*]] = alloca i32, // CHECK-NEXT: [[BLOCK:%.*]] = alloca [[BLOCK_T:<{.*}>]], // CHECK-NEXT: store i32 {{%.*}}, i32* [[X]] @@ -48,7 +48,7 @@ extern void test2_helper(id (^)(void)); test2_helper(^{ return x; }); -// CHECK: define linkonce_odr hidden void @__copy_helper_block_8_32s(i8* %0, i8* %1) unnamed_addr #{{[0-9]+}} { +// CHECK: define linkonce_odr hidden void @__copy_helper_block_8_32s(i8* frozen %0, i8* frozen %1) unnamed_addr #{{[0-9]+}} { // CHECK: [[T0:%.*]] = load i8*, i8** // CHECK-NEXT: [[SRC:%.*]] = bitcast i8* [[T0]] to [[BLOCK_T]]* // CHECK-NEXT: [[T0:%.*]] = load i8*, i8** @@ -59,7 +59,7 @@ // CHECK-NEXT: ret void -// CHECK: define linkonce_odr hidden void @__destroy_helper_block_8_32s(i8* %0) unnamed_addr #{{[0-9]+}} { +// CHECK: define linkonce_odr hidden void @__destroy_helper_block_8_32s(i8* frozen %0) unnamed_addr #{{[0-9]+}} { // CHECK: [[T0:%.*]] = load i8*, i8** // CHECK-NEXT: [[T1:%.*]] = bitcast i8* [[T0]] to [[BLOCK_T]]* // CHECK-NEXT: [[T2:%.*]] = getelementptr inbounds [[BLOCK_T]], [[BLOCK_T]]* [[T1]], i32 0, i32 5 @@ -92,7 +92,7 @@ // CHECK-NEXT: store i8* [[V]], i8** [[TEMP]] // CHECK-NEXT: [[F0:%.*]] = load i8*, i8** // CHECK-NEXT: [[F1:%.*]] = bitcast i8* [[F0]] to void (i8*, i8**)* - // CHECK-NEXT: call void [[F1]](i8* [[BLOCK]], i8** [[TEMP]]) + // CHECK-NEXT: call void [[F1]](i8* frozen [[BLOCK]], i8** frozen [[TEMP]]) // CHECK-NEXT: [[T0:%.*]] = load i8*, i8** [[TEMP]] // CHECK-NEXT: [[T1:%.*]] = call i8* @llvm.objc.retain(i8* [[T0]]) // CHECK-NEXT: call void (...) @llvm.objc.clang.arc.use(i8* [[V]]) [[NUW]] @@ -125,7 +125,7 @@ // 0x02000000 - has copy/dispose helpers strong // CHECK-NEXT: store i32 838860800, i32* [[T0]] // CHECK: [[SLOT:%.*]] = getelementptr inbounds [[BYREF_T]], [[BYREF_T]]* [[VAR]], i32 0, i32 6 - // CHECK-NEXT: [[T0:%.*]] = call i8* @test4_source() + // CHECK-NEXT: [[T0:%.*]] = call frozen i8* @test4_source() // CHECK-NEXT: [[T1:%.*]] = notail call i8* @llvm.objc.retainAutoreleasedReturnValue(i8* [[T0]]) // CHECK-NEXT: store i8* [[T1]], i8** [[SLOT]] // CHECK-NEXT: [[SLOT:%.*]] = getelementptr inbounds [[BYREF_T]], [[BYREF_T]]* [[VAR]], i32 0, i32 6 @@ -140,7 +140,7 @@ // CHECK-NEXT: call void @llvm.objc.release(i8* [[T0]]) // CHECK: ret void - // CHECK-LABEL: define internal void @__Block_byref_object_copy_(i8* %0, i8* %1) #{{[0-9]+}} { + // CHECK-LABEL: define internal void @__Block_byref_object_copy_(i8* frozen %0, i8* frozen %1) #{{[0-9]+}} { // CHECK: [[T0:%.*]] = getelementptr inbounds [[BYREF_T]], [[BYREF_T]]* {{%.*}}, i32 0, i32 6 // CHECK-NEXT: load i8*, i8** // CHECK-NEXT: bitcast i8* {{%.*}} to [[BYREF_T]]* @@ -149,7 +149,7 @@ // CHECK-NEXT: store i8* [[T2]], i8** [[T0]] // CHECK-NEXT: store i8* null, i8** [[T1]] - // CHECK-LABEL: define internal void @__Block_byref_object_dispose_(i8* %0) #{{[0-9]+}} { + // CHECK-LABEL: define internal void @__Block_byref_object_dispose_(i8* frozen %0) #{{[0-9]+}} { // CHECK: [[T0:%.*]] = getelementptr inbounds [[BYREF_T]], [[BYREF_T]]* {{%.*}}, i32 0, i32 6 // CHECK-NEXT: [[T1:%.*]] = load i8*, i8** [[T0]] // CHECK-NEXT: call void @llvm.objc.release(i8* [[T1]]) @@ -161,10 +161,10 @@ // CHECK-NEXT: call void @llvm.objc.release(i8* [[T0]]) // CHECK-NEXT: ret void - // CHECK-LABEL: define linkonce_odr hidden void @__copy_helper_block_8_32r(i8* %0, i8* %1) unnamed_addr #{{[0-9]+}} { + // CHECK-LABEL: define linkonce_odr hidden void @__copy_helper_block_8_32r(i8* frozen %0, i8* frozen %1) unnamed_addr #{{[0-9]+}} { // CHECK: call void @_Block_object_assign(i8* {{%.*}}, i8* {{%.*}}, i32 8) - // CHECK-LABEL: define linkonce_odr hidden void @__destroy_helper_block_8_32r(i8* %0) unnamed_addr #{{[0-9]+}} { + // CHECK-LABEL: define linkonce_odr hidden void @__destroy_helper_block_8_32r(i8* frozen %0) unnamed_addr #{{[0-9]+}} { // CHECK: call void @_Block_object_dispose(i8* {{%.*}}, i32 8) } @@ -179,7 +179,7 @@ // CHECK-NEXT: [[BLOCK:%.*]] = alloca [[BLOCK_T:<{.*}>]], // CHECK-NEXT: [[VARPTR1:%.*]] = bitcast i8** [[VAR]] to i8* // CHECK-NEXT: call void @llvm.lifetime.start.p0i8(i64 8, i8* [[VARPTR1]]) - // CHECK: [[T0:%.*]] = call i8* @test5_source() + // CHECK: [[T0:%.*]] = call frozen i8* @test5_source() // CHECK-NEXT: [[T1:%.*]] = notail call i8* @llvm.objc.retainAutoreleasedReturnValue(i8* [[T0]]) // CHECK-NEXT: store i8* [[T1]], i8** [[VAR]], // CHECK-NEXT: call void @llvm.objc.release(i8* [[T1]]) @@ -210,7 +210,7 @@ // 0x02000000 - has copy/dispose helpers weak // CHECK-NEXT: store i32 1107296256, i32* [[T0]] // CHECK: [[SLOT:%.*]] = getelementptr inbounds [[BYREF_T]], [[BYREF_T]]* [[VAR]], i32 0, i32 6 - // CHECK-NEXT: [[T0:%.*]] = call i8* @test6_source() + // CHECK-NEXT: [[T0:%.*]] = call frozen i8* @test6_source() // CHECK-NEXT: [[T1:%.*]] = notail call i8* @llvm.objc.retainAutoreleasedReturnValue(i8* [[T0]]) // CHECK-NEXT: call i8* @llvm.objc.initWeak(i8** [[SLOT]], i8* [[T1]]) // CHECK-NEXT: call void @llvm.objc.release(i8* [[T1]]) @@ -229,14 +229,14 @@ // CHECK-NEXT: call void @llvm.lifetime.end.p0i8(i64 48, i8* [[VARPTR2]]) // CHECK-NEXT: ret void - // CHECK-LABEL: define internal void @__Block_byref_object_copy_.{{[0-9]+}}(i8* %0, i8* %1) #{{[0-9]+}} { + // CHECK-LABEL: define internal void @__Block_byref_object_copy_.{{[0-9]+}}(i8* frozen %0, i8* frozen %1) #{{[0-9]+}} { // CHECK: [[T0:%.*]] = getelementptr inbounds [[BYREF_T]], [[BYREF_T]]* {{%.*}}, i32 0, i32 6 // CHECK-NEXT: load i8*, i8** // CHECK-NEXT: bitcast i8* {{%.*}} to [[BYREF_T]]* // CHECK-NEXT: [[T1:%.*]] = getelementptr inbounds [[BYREF_T]], [[BYREF_T]]* {{%.*}}, i32 0, i32 6 // CHECK-NEXT: call void @llvm.objc.moveWeak(i8** [[T0]], i8** [[T1]]) - // CHECK-LABEL: define internal void @__Block_byref_object_dispose_.{{[0-9]+}}(i8* %0) #{{[0-9]+}} { + // CHECK-LABEL: define internal void @__Block_byref_object_dispose_.{{[0-9]+}}(i8* frozen %0) #{{[0-9]+}} { // CHECK: [[T0:%.*]] = getelementptr inbounds [[BYREF_T]], [[BYREF_T]]* {{%.*}}, i32 0, i32 6 // CHECK-NEXT: call void @llvm.objc.destroyWeak(i8** [[T0]]) @@ -256,7 +256,7 @@ // CHECK-LABEL: define void @test7() // CHECK: [[VAR:%.*]] = alloca i8*, // CHECK-NEXT: [[BLOCK:%.*]] = alloca [[BLOCK_T:<{.*}>]], - // CHECK: [[T0:%.*]] = call i8* @test7_source() + // CHECK: [[T0:%.*]] = call frozen i8* @test7_source() // CHECK-NEXT: [[T1:%.*]] = notail call i8* @llvm.objc.retainAutoreleasedReturnValue(i8* [[T0]]) // CHECK-NEXT: call i8* @llvm.objc.initWeak(i8** [[VAR]], i8* [[T1]]) // CHECK-NEXT: call void @llvm.objc.release(i8* [[T1]]) @@ -272,16 +272,16 @@ // CHECK-LABEL: define internal void @__test7_block_invoke // CHECK: [[SLOT:%.*]] = getelementptr inbounds [[BLOCK_T]], [[BLOCK_T]]* {{%.*}}, i32 0, i32 5 // CHECK-NEXT: [[T0:%.*]] = call i8* @llvm.objc.loadWeakRetained(i8** [[SLOT]]) - // CHECK-NEXT: call void @test7_consume(i8* [[T0]]) + // CHECK-NEXT: call void @test7_consume(i8* frozen [[T0]]) // CHECK-NEXT: call void @llvm.objc.release(i8* [[T0]]) // CHECK: ret void - // CHECK-LABEL: define linkonce_odr hidden void @__copy_helper_block_8_32w(i8* %0, i8* %1) unnamed_addr #{{[0-9]+}} { + // CHECK-LABEL: define linkonce_odr hidden void @__copy_helper_block_8_32w(i8* frozen %0, i8* frozen %1) unnamed_addr #{{[0-9]+}} { // CHECK: getelementptr // CHECK-NEXT: getelementptr // CHECK-NEXT: call void @llvm.objc.copyWeak( - // CHECK-LABEL: define linkonce_odr hidden void @__destroy_helper_block_8_32w(i8* %0) unnamed_addr #{{[0-9]+}} { + // CHECK-LABEL: define linkonce_odr hidden void @__destroy_helper_block_8_32w(i8* frozen %0) unnamed_addr #{{[0-9]+}} { // CHECK: getelementptr // CHECK-NEXT: call void @llvm.objc.destroyWeak( } @@ -317,14 +317,14 @@ return test9_produce(); }(); -// CHECK-LABEL: define i8* @test9( +// CHECK-LABEL: define frozen i8* @test9( // CHECK: load i8*, i8** getelementptr // CHECK-NEXT: bitcast i8* -// CHECK-NEXT: call i8* +// CHECK-NEXT: call frozen i8* // CHECK-NEXT: tail call i8* @llvm.objc.autoreleaseReturnValue // CHECK-NEXT: ret i8* -// CHECK: call i8* @test9_produce() +// CHECK: call frozen i8* @test9_produce() // CHECK-NEXT: call i8* @llvm.objc.retain // CHECK-NEXT: ret i8* } @@ -367,7 +367,7 @@ // We can also use _Block_object_assign/destroy with // BLOCK_FIELD_IS_BLOCK as long as we don't pass BLOCK_BYREF_CALLER. -// CHECK-LABEL: define internal void @__Block_byref_object_copy_.{{[0-9]+}}(i8* %0, i8* %1) #{{[0-9]+}} { +// CHECK-LABEL: define internal void @__Block_byref_object_copy_.{{[0-9]+}}(i8* frozen %0, i8* frozen %1) #{{[0-9]+}} { // CHECK: [[D0:%.*]] = load i8*, i8** {{%.*}} // CHECK-NEXT: [[D1:%.*]] = bitcast i8* [[D0]] to [[BYREF_T]]* // CHECK-NEXT: [[D2:%.*]] = getelementptr inbounds [[BYREF_T]], [[BYREF_T]]* [[D1]], i32 0, i32 6 @@ -381,7 +381,7 @@ // CHECK-NEXT: store void ()* [[T3]], void ()** [[D2]], align 8 // CHECK: ret void -// CHECK-LABEL: define internal void @__Block_byref_object_dispose_.{{[0-9]+}}(i8* %0) #{{[0-9]+}} { +// CHECK-LABEL: define internal void @__Block_byref_object_dispose_.{{[0-9]+}}(i8* frozen %0) #{{[0-9]+}} { // CHECK: [[T0:%.*]] = load i8*, i8** {{%.*}} // CHECK-NEXT: [[T1:%.*]] = bitcast i8* [[T0]] to [[BYREF_T]]* // CHECK-NEXT: [[T2:%.*]] = getelementptr inbounds [[BYREF_T]], [[BYREF_T]]* [[T1]], i32 0, i32 6 @@ -439,7 +439,7 @@ // CHECK-NEXT: [[T2:%.*]] = call i8* @llvm.objc.retainBlock(i8* [[T1]]) // CHECK-NEXT: [[T3:%.*]] = bitcast i8* [[T2]] to void ()* // CHECK-NEXT: [[T4:%.*]] = bitcast void ()* [[T3]] to i8* - // CHECK-NEXT: call void @test11_helper(i8* [[T4]]) + // CHECK-NEXT: call void @test11_helper(i8* frozen [[T4]]) // CHECK-NEXT: [[T5:%.*]] = bitcast void ()* [[T3]] to i8* // CHECK-NEXT: call void @llvm.objc.release(i8* [[T5]]) // CHECK: ret void @@ -470,17 +470,17 @@ @end @implementation Test12 @synthesize ablock, nblock; -// CHECK: define internal void ()* @"\01-[Test12 ablock]"( -// CHECK: call i8* @objc_getProperty(i8* {{%.*}}, i8* {{%.*}}, i64 {{%.*}}, i1 zeroext true) +// CHECK: define internal frozen void ()* @"\01-[Test12 ablock]"( +// CHECK: call frozen i8* @objc_getProperty(i8* frozen {{%.*}}, i8* frozen {{%.*}}, i64 frozen {{%.*}}, i1 frozen zeroext true) // CHECK: define internal void @"\01-[Test12 setAblock:]"( -// CHECK: call void @objc_setProperty(i8* {{%.*}}, i8* {{%.*}}, i64 {{%.*}}, i8* {{%.*}}, i1 zeroext true, i1 zeroext true) +// CHECK: call void @objc_setProperty(i8* frozen {{%.*}}, i8* frozen {{%.*}}, i64 frozen {{%.*}}, i8* frozen {{%.*}}, i1 frozen zeroext true, i1 frozen zeroext true) -// CHECK: define internal void ()* @"\01-[Test12 nblock]"( -// CHECK: call i8* @objc_getProperty(i8* {{%.*}}, i8* {{%.*}}, i64 {{%.*}}, i1 zeroext false) +// CHECK: define internal frozen void ()* @"\01-[Test12 nblock]"( +// CHECK: call frozen i8* @objc_getProperty(i8* frozen {{%.*}}, i8* frozen {{%.*}}, i64 frozen {{%.*}}, i1 frozen zeroext false) // CHECK: define internal void @"\01-[Test12 setNblock:]"( -// CHECK: call void @objc_setProperty(i8* {{%.*}}, i8* {{%.*}}, i64 {{%.*}}, i8* {{%.*}}, i1 zeroext false, i1 zeroext true) +// CHECK: call void @objc_setProperty(i8* frozen {{%.*}}, i8* frozen {{%.*}}, i64 frozen {{%.*}}, i8* frozen {{%.*}}, i1 frozen zeroext false, i1 frozen zeroext true) @end // rdar://problem/10131784 @@ -522,7 +522,7 @@ // CHECK-NEXT: [[T3:%.*]] = bitcast i8* [[T2]] to void ()* // CHECK-NEXT: store void ()* [[T3]], void ()** [[B]], align 8 // CHECK-NEXT: [[T0:%.*]] = load void ()*, void ()** [[B]], align 8 - // CHECK-NEXT: call void @test13_use(void ()* [[T0]]) + // CHECK-NEXT: call void @test13_use(void ()* frozen [[T0]]) // CHECK-NEXT: [[T0:%.*]] = load void ()*, void ()** [[B]] // CHECK-NEXT: [[T1:%.*]] = bitcast void ()* [[T0]] to i8* // CHECK-NEXT: call void @llvm.objc.release(i8* [[T1]]) @@ -578,7 +578,7 @@ } return (void*) 0; } -// CHECK-LABEL: define i8* ()* @test17( +// CHECK-LABEL: define frozen i8* ()* @test17( // CHECK: [[RET:%.*]] = alloca i8* ()*, align // CHECK-NEXT: [[SELF:%.*]] = alloca i8*, // CHECK: [[B0:%.*]] = alloca [[BLOCK:<.*>]], align @@ -674,7 +674,7 @@ // CHECK-NEXT: store void ()* [[T3]], void ()** [[SLOT]], // Call. // CHECK-NEXT: [[T0:%.*]] = bitcast [[BLOCK_T]]* [[BLOCK]] to void (i32)* -// CHECK-NEXT: call void @test19_sink(void (i32)* [[T0]]) +// CHECK-NEXT: call void @test19_sink(void (i32)* frozen [[T0]]) test19_sink(^(int x) { b(); }); @@ -722,7 +722,7 @@ // CHECK-LABEL: define void @test21( // CHECK: %[[V6:.*]] = call i8* @llvm.objc.retainBlock( // CHECK: %[[V7:.*]] = bitcast i8* %[[V6]] to void ()* -// CHECK: call void (i32, ...) @test21_callee(i32 1, void ()* %[[V7]]), +// CHECK: call void (i32, ...) @test21_callee(i32 frozen 1, void ()* frozen %[[V7]]), void test21_callee(int n, ...); void test21(id x) { @@ -732,7 +732,7 @@ // The lifetime of 'x', which is captured by the block in the statement // expression, should be extended. -// CHECK-COMMON-LABEL: define i8* @test22( +// CHECK-COMMON-LABEL: define frozen i8* @test22( // CHECK-COMMON: %[[BLOCK_CAPTURED:.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %{{.*}}*, i8* }>, <{ i8*, i32, i32, i8*, %{{.*}}*, i8* }>* %{{.*}}, i32 0, i32 5 // CHECK-COMMON: %[[V3:.*]] = call i8* @llvm.objc.retain(i8* %{{.*}}) // CHECK-COMMON: store i8* %[[V3]], i8** %[[BLOCK_CAPTURED]], align 8 diff --git a/clang/test/CodeGenObjC/arc-bridged-cast.m b/clang/test/CodeGenObjC/arc-bridged-cast.m --- a/clang/test/CodeGenObjC/arc-bridged-cast.m +++ b/clang/test/CodeGenObjC/arc-bridged-cast.m @@ -18,12 +18,12 @@ void bridge_transfer_from_cf(int *i) { // CHECK: store i32 7 *i = 7; - // CHECK: call i8* @CFCreateSomething() + // CHECK: call frozen i8* @CFCreateSomething() id obj1 = (__bridge_transfer id)CFCreateSomething(); // CHECK-NOT: retain // CHECK: store i32 11 *i = 11; - // CHECK: call i8* @CFCreateSomething() + // CHECK: call frozen i8* @CFCreateSomething() // CHECK-NOT: retain // CHECK: store i32 13 (void)(__bridge_transfer id)CFCreateSomething(), *i = 13; @@ -40,12 +40,12 @@ void bridge_from_cf(int *i) { // CHECK: store i32 7 *i = 7; - // CHECK: call i8* @CFCreateSomething() + // CHECK: call frozen i8* @CFCreateSomething() id obj1 = (__bridge id)CFCreateSomething(); // CHECK: llvm.objc.retainAutoreleasedReturnValue // CHECK: store i32 11 *i = 11; - // CHECK: call i8* @CFCreateSomething() + // CHECK: call frozen i8* @CFCreateSomething() // CHECK-NOT: release // CHECK: store i32 13 (void)(__bridge id)CFCreateSomething(), *i = 13; @@ -60,12 +60,12 @@ // CHECK-LABEL: define void @bridge_retained_of_cf void bridge_retained_of_cf(int *i) { *i = 7; - // CHECK: call i8* @CreateSomething() + // CHECK: call frozen i8* @CreateSomething() CFTypeRef cf1 = (__bridge_retained CFTypeRef)CreateSomething(); // CHECK-NEXT: call i8* @llvm.objc.retainAutoreleasedReturnValue // CHECK: store i32 11 *i = 11; - // CHECK: call i8* @CreateSomething() + // CHECK: call frozen i8* @CreateSomething() (__bridge_retained CFTypeRef)CreateSomething(), *i = 13; // CHECK-NEXT: call i8* @llvm.objc.retainAutoreleasedReturnValue // CHECK: store i32 13 @@ -81,12 +81,12 @@ // CHECK: store i32 7 *i = 7; // CHECK: call void @llvm.lifetime.start - // CHECK-NEXT: call i8* @CreateSomething() + // CHECK-NEXT: call frozen i8* @CreateSomething() CFTypeRef cf1 = (__bridge CFTypeRef)CreateSomething(); // CHECK-NOT: retain // CHECK: store i32 11 *i = 11; - // CHECK: call i8* @CreateSomething + // CHECK: call frozen i8* @CreateSomething (__bridge CFTypeRef)CreateSomething(), *i = 13; // CHECK: store i32 13 // CHECK-NOT: release @@ -97,7 +97,7 @@ // CHECK-NEXT: ret void } -// CHECK-LABEL: define %struct.__CFString* @bridge_of_paren_expr() +// CHECK-LABEL: define frozen %struct.__CFString* @bridge_of_paren_expr() CFStringRef bridge_of_paren_expr() { // CHECK-NOT: call i8* @llvm.objc.retainAutoreleasedReturnValue( // CHECK-NOT: call void @llvm.objc.release( diff --git a/clang/test/CodeGenObjC/arc-captured-block-var-layout.m b/clang/test/CodeGenObjC/arc-captured-block-var-layout.m --- a/clang/test/CodeGenObjC/arc-captured-block-var-layout.m +++ b/clang/test/CodeGenObjC/arc-captured-block-var-layout.m @@ -33,7 +33,7 @@ // and a descriptor pointer). // Test 1 -// Inline instruction for block variable layout: 0x0320 (3 strong 2 byref) +// Inline instruction for block variable layout: 0x0320 (3 2 byref frozen strong) // CHECK-LP64: Inline block variable layout: 0x0320, BL_STRONG:3, BL_BYREF:2, BL_OPERATOR:0 void (^b)() = ^{ byref_int = sh + ch+ch1+ch2 ; @@ -45,7 +45,7 @@ b(); // Test 2 -// Inline instruction for block variable layout: 0x0331 (3 strong 3 byref 1 weak) +// Inline instruction for block variable layout: 0x0331 (3 1 3 byref frozen strong weak) // CHECK-LP64: Inline block variable layout: 0x0331, BL_STRONG:3, BL_BYREF:3, BL_WEAK:1, BL_OPERATOR:0 void (^c)() = ^{ byref_int = sh + ch+ch1+ch2 ; @@ -67,7 +67,7 @@ unsigned int i; NSString *y; NSString *z; -// Inline instruction for block variable layout: 0x0401 (4 strong 0 byref 1 weak) +// Inline instruction for block variable layout: 0x0401 (4 0 1 byref frozen strong weak) // CHECK-LP64: Inline block variable layout: 0x0401, BL_STRONG:4, BL_WEAK:1, BL_OPERATOR:0 void (^c)() = ^{ int j = i + bletch; diff --git a/clang/test/CodeGenObjC/arc-foreach.m b/clang/test/CodeGenObjC/arc-foreach.m --- a/clang/test/CodeGenObjC/arc-foreach.m +++ b/clang/test/CodeGenObjC/arc-foreach.m @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -triple x86_64-apple-darwin -fblocks -fobjc-arc -fobjc-runtime-has-weak -emit-llvm %s -o - | FileCheck -check-prefix CHECK-LP64 %s -// RUN: %clang_cc1 -triple x86_64-apple-darwin -O1 -fblocks -fobjc-arc -fobjc-runtime-has-weak -emit-llvm %s -o - | FileCheck -check-prefix CHECK-LP64-OPT %s +// RUN: %clang_cc1 -disable-frozen-args -triple x86_64-apple-darwin -fblocks -fobjc-arc -fobjc-runtime-has-weak -emit-llvm %s -o - | FileCheck -check-prefix CHECK-LP64 %s +// RUN: %clang_cc1 -disable-frozen-args -triple x86_64-apple-darwin -O1 -fblocks -fobjc-arc -fobjc-runtime-has-weak -emit-llvm %s -o - | FileCheck -check-prefix CHECK-LP64-OPT %s // rdar://9503326 // rdar://9606600 @@ -53,7 +53,7 @@ // Call the enumeration method. // CHECK-LP64-NEXT: [[T0:%.*]] = load i8*, i8** @OBJC_SELECTOR_REFERENCES_ // CHECK-LP64-NEXT: [[T1:%.*]] = bitcast [[ARRAY_T]]* [[SAVED_ARRAY]] to i8* -// CHECK-LP64-NEXT: [[SIZE:%.*]] = call i64 bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to i64 (i8*, i8*, [[STATE_T]]*, [16 x i8*]*, i64)*)(i8* [[T1]], i8* [[T0]], [[STATE_T]]* [[STATE]], [16 x i8*]* [[BUFFER]], i64 16) +// CHECK-LP64-NEXT: [[SIZE:%.*]] = call frozen i64 bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to i64 (i8*, i8*, [[STATE_T]]*, [16 x i8*]*, i64)*)(i8* [[T1]], i8* [[T0]], [[STATE_T]]* [[STATE]], [16 x i8*]* [[BUFFER]], i64 16) // Check for a nonzero result. // CHECK-LP64-NEXT: [[T0:%.*]] = icmp eq i64 [[SIZE]], 0 @@ -80,7 +80,7 @@ // CHECK-LP64: [[T0:%.*]] = load i8*, i8** @OBJC_SELECTOR_REFERENCES_ // CHECK-LP64-NEXT: [[T1:%.*]] = bitcast [[ARRAY_T]]* [[SAVED_ARRAY]] to i8* -// CHECK-LP64-NEXT: [[SIZE:%.*]] = call i64 bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to i64 (i8*, i8*, [[STATE_T]]*, [16 x i8*]*, i64)*)(i8* [[T1]], i8* [[T0]], [[STATE_T]]* [[STATE]], [16 x i8*]* [[BUFFER]], i64 16) +// CHECK-LP64-NEXT: [[SIZE:%.*]] = call frozen i64 bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to i64 (i8*, i8*, [[STATE_T]]*, [16 x i8*]*, i64)*)(i8* [[T1]], i8* [[T0]], [[STATE_T]]* [[STATE]], [16 x i8*]* [[BUFFER]], i64 16) // Release the array. // CHECK-LP64: [[T0:%.*]] = bitcast [[ARRAY_T]]* [[SAVED_ARRAY]] to i8* @@ -135,7 +135,7 @@ } // CHECK-LP64-LABEL: define void @test2( -// CHECK-LP64: [[T0:%.*]] = call [[ARRAY_T]]* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to [[ARRAY_T]]* (i8*, i8*)*)( +// CHECK-LP64: [[T0:%.*]] = call frozen [[ARRAY_T]]* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to [[ARRAY_T]]* (i8*, i8*)*)( // CHECK-LP64-NEXT: [[T1:%.*]] = bitcast [[ARRAY_T]]* [[T0]] to i8* // CHECK-LP64-NEXT: [[T2:%.*]] = notail call i8* @llvm.objc.retainAutoreleasedReturnValue(i8* [[T1]]) // CHECK-LP64-NEXT: [[COLL:%.*]] = bitcast i8* [[T2]] to [[ARRAY_T]]* diff --git a/clang/test/CodeGenObjC/arc-i386.m b/clang/test/CodeGenObjC/arc-i386.m --- a/clang/test/CodeGenObjC/arc-i386.m +++ b/clang/test/CodeGenObjC/arc-i386.m @@ -3,10 +3,10 @@ // : implement objc_retainAutoreleasedReturnValue on i386 -// CHECK-LABEL: define i8* @test0() +// CHECK-LABEL: define frozen i8* @test0() id test0(void) { extern id test0_helper(void); - // CHECK: [[T0:%.*]] = call i8* @test0_helper() + // CHECK: [[T0:%.*]] = call frozen i8* @test0_helper() // CHECK-NEXT: ret i8* [[T0]] return test0_helper(); } @@ -14,7 +14,7 @@ // CHECK-LABEL: define void @test1() void test1(void) { extern id test1_helper(void); - // CHECK: [[T0:%.*]] = call i8* @test1_helper() + // CHECK: [[T0:%.*]] = call frozen i8* @test1_helper() // CHECK-NEXT: call void asm sideeffect "mov // CHECK-NEXT: [[T1:%.*]] = call i8* @llvm.objc.retainAutoreleasedReturnValue(i8* [[T0]]) // CHECK-NEXT: store i8* [[T1]], @@ -28,15 +28,15 @@ @class A; A *test2(void) { extern A *test2_helper(void); - // CHECK: [[T0:%.*]] = call [[A:%.*]]* @test2_helper() + // CHECK: [[T0:%.*]] = call frozen [[A:%.*]]* @test2_helper() // CHECK-NEXT: ret [[A]]* [[T0]] return test2_helper(); } -// CHECK-LABEL: define i8* @test3() +// CHECK-LABEL: define frozen i8* @test3() id test3(void) { extern A *test3_helper(void); - // CHECK: [[T0:%.*]] = call [[A]]* @test3_helper() + // CHECK: [[T0:%.*]] = call frozen [[A]]* @test3_helper() // CHECK-NEXT: [[T1:%.*]] = bitcast [[A]]* [[T0]] to i8* // CHECK-NEXT: ret i8* [[T1]] return test3_helper(); diff --git a/clang/test/CodeGenObjC/arc-literals.m b/clang/test/CodeGenObjC/arc-literals.m --- a/clang/test/CodeGenObjC/arc-literals.m +++ b/clang/test/CodeGenObjC/arc-literals.m @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -I %S/Inputs -triple x86_64-apple-darwin10 -emit-llvm -fblocks -fobjc-arc -fobjc-runtime-has-weak -O2 -disable-llvm-passes -o - %s | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args -I %S/Inputs -triple x86_64-apple-darwin10 -emit-llvm -fblocks -fobjc-arc -fobjc-runtime-has-weak -O2 -disable-llvm-passes -o - %s | FileCheck %s #include "literal-support.h" @@ -58,7 +58,7 @@ // CHECK-NEXT: [[SEL:%.*]] = load i8*, i8** @OBJC_SELECTOR_REFERENCES // CHECK-NEXT: [[T1:%.*]] = bitcast [[CLASS_T]]* [[T0]] to i8* // CHECK-NEXT: [[T2:%.*]] = bitcast [2 x i8*]* [[OBJECTS]] to i8** - // CHECK-NEXT: [[T3:%.*]] = call i8* bitcast ({{.*@objc_msgSend.*}})(i8* [[T1]], i8* [[SEL]], i8** [[T2]], i64 2) + // CHECK-NEXT: [[T3:%.*]] = call frozen i8* bitcast ({{.*@objc_msgSend.*}})(i8* [[T1]], i8* [[SEL]], i8** [[T2]], i64 2) // CHECK-NEXT: [[T4:%.*]] = notail call i8* @llvm.objc.retainAutoreleasedReturnValue(i8* [[T3]]) // CHECK: call void (...) @llvm.objc.clang.arc.use(i8* [[V0]], i8* [[V1]]) id arr = @[a, b]; @@ -102,7 +102,7 @@ // CHECK-NEXT: [[T1:%.*]] = bitcast [[CLASS_T]]* [[T0]] to i8* // CHECK-NEXT: [[T2:%.*]] = bitcast [2 x i8*]* [[OBJECTS]] to i8** // CHECK-NEXT: [[T3:%.*]] = bitcast [2 x i8*]* [[KEYS]] to i8** - // CHECK-NEXT: [[T4:%.*]] = call i8* bitcast ({{.*@objc_msgSend.*}})(i8* [[T1]], i8* [[SEL]], i8** [[T2]], i8** [[T3]], i64 2) + // CHECK-NEXT: [[T4:%.*]] = call frozen i8* bitcast ({{.*@objc_msgSend.*}})(i8* [[T1]], i8* [[SEL]], i8** [[T2]], i8** [[T3]], i64 2) // CHECK-NEXT: [[T5:%.*]] = notail call i8* @llvm.objc.retainAutoreleasedReturnValue(i8* [[T4]]) // CHECK-NEXT: call void (...) @llvm.objc.clang.arc.use(i8* [[V0]], i8* [[V1]], i8* [[V2]], i8* [[V3]]) @@ -133,7 +133,7 @@ // Invoke 'prop' // CHECK: [[SEL:%.*]] = load i8*, i8** @OBJC_SELECTOR_REFERENCES // CHECK-NEXT: [[T1:%.*]] = bitcast - // CHECK-NEXT: [[T2:%.*]] = call [[B:%.*]]* bitcast ({{.*}} @objc_msgSend to {{.*}})(i8* [[T1]], i8* [[SEL]]) + // CHECK-NEXT: [[T2:%.*]] = call frozen [[B:%.*]]* bitcast ({{.*}} @objc_msgSend to {{.*}})(i8* [[T1]], i8* [[SEL]]) // CHECK-NEXT: [[T3:%.*]] = bitcast [[B]]* [[T2]] to i8* // CHECK-NEXT: [[T4:%.*]] = notail call i8* @llvm.objc.retainAutoreleasedReturnValue(i8* [[T3]]) // CHECK-NEXT: [[V0:%.*]] = bitcast i8* [[T4]] to [[B]]* @@ -147,7 +147,7 @@ // CHECK-NEXT: [[SEL:%.*]] = load i8*, i8** @OBJC_SELECTOR_REFERENCES // CHECK-NEXT: [[T1:%.*]] = bitcast [[CLASS_T]]* [[T0]] to i8* // CHECK-NEXT: [[T2:%.*]] = bitcast [1 x i8*]* [[OBJECTS]] to i8** - // CHECK-NEXT: [[T3:%.*]] = call i8* bitcast ({{.*}} @objc_msgSend to {{.*}}(i8* [[T1]], i8* [[SEL]], i8** [[T2]], i64 1) + // CHECK-NEXT: [[T3:%.*]] = call frozen i8* bitcast ({{.*}} @objc_msgSend to {{.*}}(i8* [[T1]], i8* [[SEL]], i8** [[T2]], i64 1) // CHECK-NEXT: call i8* @llvm.objc.retainAutoreleasedReturnValue(i8* [[T3]]) // CHECK-NEXT: call void (...) @llvm.objc.clang.arc.use(i8* [[V1]]) // CHECK-NEXT: bitcast diff --git a/clang/test/CodeGenObjC/arc-no-arc-exceptions.m b/clang/test/CodeGenObjC/arc-no-arc-exceptions.m --- a/clang/test/CodeGenObjC/arc-no-arc-exceptions.m +++ b/clang/test/CodeGenObjC/arc-no-arc-exceptions.m @@ -1,6 +1,6 @@ -// RUN: %clang_cc1 -triple x86_64-apple-darwin10 -emit-llvm -fobjc-arc -fblocks -fexceptions -fobjc-exceptions -O2 -disable-llvm-passes -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple x86_64-apple-darwin10 -emit-llvm -fobjc-arc -fblocks -fexceptions -fobjc-exceptions -disable-llvm-passes -o - %s | FileCheck -check-prefix=NO-METADATA %s -// RUN: %clang_cc1 -triple x86_64-apple-darwin10 -emit-llvm -fobjc-arc -fblocks -fexceptions -fobjc-exceptions -O2 -disable-llvm-passes -o - %s -fobjc-arc-exceptions | FileCheck -check-prefix=NO-METADATA %s +// RUN: %clang_cc1 -disable-frozen-args -triple x86_64-apple-darwin10 -emit-llvm -fobjc-arc -fblocks -fexceptions -fobjc-exceptions -O2 -disable-llvm-passes -o - %s | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args -triple x86_64-apple-darwin10 -emit-llvm -fobjc-arc -fblocks -fexceptions -fobjc-exceptions -disable-llvm-passes -o - %s | FileCheck -check-prefix=NO-METADATA %s +// RUN: %clang_cc1 -disable-frozen-args -triple x86_64-apple-darwin10 -emit-llvm -fobjc-arc -fblocks -fexceptions -fobjc-exceptions -O2 -disable-llvm-passes -o - %s -fobjc-arc-exceptions | FileCheck -check-prefix=NO-METADATA %s // The front-end should emit clang.arc.no_objc_arc_exceptions in -fobjc-arc-exceptions // mode when optimization is enabled, and not otherwise. diff --git a/clang/test/CodeGenObjC/arc-precise-lifetime.m b/clang/test/CodeGenObjC/arc-precise-lifetime.m --- a/clang/test/CodeGenObjC/arc-precise-lifetime.m +++ b/clang/test/CodeGenObjC/arc-precise-lifetime.m @@ -9,7 +9,7 @@ // CHECK: [[X:%.*]] = alloca i8* // CHECK-NEXT: [[XPTR1:%.*]] = bitcast i8** [[X]] to i8* // CHECK-NEXT: call void @llvm.lifetime.start.p0i8(i64 8, i8* [[XPTR1]]) - // CHECK-NEXT: [[CALL:%.*]] = call i8* @test0_helper() + // CHECK-NEXT: [[CALL:%.*]] = call frozen i8* @test0_helper() // CHECK-NEXT: store i8* [[CALL]], i8** [[X]] // CHECK-NEXT: [[T1:%.*]] = load i8*, i8** [[X]] @@ -41,7 +41,7 @@ // CHECK: [[C:%.*]] = alloca i8*, align 8 // CHECK: [[PTRPTR1:%.*]] = bitcast [[PTR_T]]** [[PTR]] to i8* // CHECK: call void @llvm.lifetime.start.p0i8(i64 8, i8* [[PTRPTR1]]) - // CHECK: [[T0:%.*]] = call [[TEST1:%.*]]* @test1_helper() + // CHECK: [[T0:%.*]] = call frozen [[TEST1:%.*]]* @test1_helper() // CHECK-NEXT: [[T1:%.*]] = bitcast [[TEST1]]* [[T0]] to i8* // CHECK-NEXT: [[T2:%.*]] = notail call i8* @llvm.objc.retainAutoreleasedReturnValue(i8* [[T1]]) // CHECK-NEXT: [[T3:%.*]] = bitcast i8* [[T2]] to [[TEST1]]* @@ -54,7 +54,7 @@ // CHECK-NEXT: [[T3:%.*]] = bitcast i8* [[T2]] to [[TEST1]]* // CHECK-NEXT: [[T4:%.*]] = load i8*, i8** @OBJC_SELECTOR_REFERENCES_ // CHECK-NEXT: [[T5:%.*]] = bitcast [[TEST1]]* [[T3]] to i8* - // CHECK-NEXT: [[T6:%.*]] = call i8* bitcast + // CHECK-NEXT: [[T6:%.*]] = call frozen i8* bitcast // CHECK-NEXT: store i8* [[T6]], i8** // CHECK-NEXT: [[CPTR2:%.*]] = bitcast i8** [[C]] to i8* // CHECK-NEXT: call void @llvm.lifetime.end.p0i8(i64 8, i8* [[CPTR2]]) @@ -75,7 +75,7 @@ // CHECK: [[C:%.*]] = alloca i8*, align 8 // CHECK: [[PTRPTR1:%.*]] = bitcast [[PTR_T]]** [[PTR]] to i8* // CHECK: call void @llvm.lifetime.start.p0i8(i64 8, i8* [[PTRPTR1]]) - // CHECK: [[T0:%.*]] = call [[TEST1:%.*]]* @test1_helper() + // CHECK: [[T0:%.*]] = call frozen [[TEST1:%.*]]* @test1_helper() // CHECK-NEXT: [[T1:%.*]] = bitcast [[TEST1]]* [[T0]] to i8* // CHECK-NEXT: [[T2:%.*]] = notail call i8* @llvm.objc.retainAutoreleasedReturnValue(i8* [[T1]]) // CHECK-NEXT: [[T3:%.*]] = bitcast i8* [[T2]] to [[TEST1]]* @@ -88,7 +88,7 @@ // CHECK-NEXT: [[T3:%.*]] = bitcast i8* [[T2]] to [[TEST1]]* // CHECK-NEXT: [[T4:%.*]] = load i8*, i8** @OBJC_SELECTOR_REFERENCES_ // CHECK-NEXT: [[T5:%.*]] = bitcast [[TEST1]]* [[T3]] to i8* - // CHECK-NEXT: [[T6:%.*]] = call i8* bitcast + // CHECK-NEXT: [[T6:%.*]] = call frozen i8* bitcast // CHECK-NEXT: store i8* [[T6]], i8** // CHECK-NEXT: [[CPTR2:%.*]] = bitcast i8** [[C]] to i8* // CHECK-NEXT: call void @llvm.lifetime.end.p0i8(i64 8, i8* [[CPTR2]]) @@ -109,7 +109,7 @@ // CHECK: [[C:%.*]] = alloca i8*, align 8 // CHECK: [[PTRPTR1:%.*]] = bitcast [[PTR_T]]** [[PTR]] to i8* // CHECK: call void @llvm.lifetime.start.p0i8(i64 8, i8* [[PTRPTR1]]) - // CHECK: [[T0:%.*]] = call [[TEST1:%.*]]* @test1_helper() + // CHECK: [[T0:%.*]] = call frozen [[TEST1:%.*]]* @test1_helper() // CHECK-NEXT: [[T1:%.*]] = bitcast [[TEST1]]* [[T0]] to i8* // CHECK-NEXT: [[T2:%.*]] = notail call i8* @llvm.objc.retainAutoreleasedReturnValue(i8* [[T1]]) // CHECK-NEXT: [[T3:%.*]] = bitcast i8* [[T2]] to [[TEST1]]* @@ -119,7 +119,7 @@ // CHECK-NEXT: [[T0:%.*]] = load [[TEST1]]*, [[TEST1]]** // CHECK-NEXT: [[T1:%.*]] = load i8*, i8** @OBJC_SELECTOR_REFERENCES_ // CHECK-NEXT: [[T2:%.*]] = bitcast [[TEST1]]* [[T0]] to i8* - // CHECK-NEXT: [[T3:%.*]] = call i8* bitcast + // CHECK-NEXT: [[T3:%.*]] = call frozen i8* bitcast // CHECK-NEXT: store i8* [[T3]], i8** // CHECK-NEXT: [[CPTR2:%.*]] = bitcast i8** [[C]] to i8* // CHECK-NEXT: call void @llvm.lifetime.end.p0i8(i64 8, i8* [[CPTR2]]) @@ -140,7 +140,7 @@ // CHECK: [[C:%.*]] = alloca i8*, align 8 // CHECK: [[PTRPTR1:%.*]] = bitcast [[PTR_T]]** [[PTR]] to i8* // CHECK: call void @llvm.lifetime.start.p0i8(i64 8, i8* [[PTRPTR1]]) - // CHECK: [[T0:%.*]] = call [[TEST1:%.*]]* @test1_helper() + // CHECK: [[T0:%.*]] = call frozen [[TEST1:%.*]]* @test1_helper() // CHECK-NEXT: [[T1:%.*]] = bitcast [[TEST1]]* [[T0]] to i8* // CHECK-NEXT: [[T2:%.*]] = notail call i8* @llvm.objc.retainAutoreleasedReturnValue(i8* [[T1]]) // CHECK-NEXT: [[T3:%.*]] = bitcast i8* [[T2]] to [[TEST1]]* @@ -150,7 +150,7 @@ // CHECK-NEXT: [[T0:%.*]] = load [[TEST1]]*, [[TEST1]]** // CHECK-NEXT: [[T1:%.*]] = load i8*, i8** @OBJC_SELECTOR_REFERENCES_ // CHECK-NEXT: [[T2:%.*]] = bitcast [[TEST1]]* [[T0]] to i8* - // CHECK-NEXT: [[T3:%.*]] = call i8* bitcast + // CHECK-NEXT: [[T3:%.*]] = call frozen i8* bitcast // CHECK-NEXT: store i8* [[T3]], i8** // CHECK-NEXT: [[CPTR2:%.*]] = bitcast i8** [[C]] to i8* // CHECK-NEXT: call void @llvm.lifetime.end.p0i8(i64 8, i8* [[CPTR2]]) @@ -171,7 +171,7 @@ // CHECK: [[PC:%.*]] = alloca i8*, align 8 // CHECK: [[PTRPTR1:%.*]] = bitcast [[PTR_T]]** [[PTR]] to i8* // CHECK: call void @llvm.lifetime.start.p0i8(i64 8, i8* [[PTRPTR1]]) - // CHECK: [[T0:%.*]] = call [[TEST1:%.*]]* @test1_helper() + // CHECK: [[T0:%.*]] = call frozen [[TEST1:%.*]]* @test1_helper() // CHECK-NEXT: [[T1:%.*]] = bitcast [[TEST1]]* [[T0]] to i8* // CHECK-NEXT: [[T2:%.*]] = notail call i8* @llvm.objc.retainAutoreleasedReturnValue(i8* [[T1]]) // CHECK-NEXT: [[T3:%.*]] = bitcast i8* [[T2]] to [[TEST1]]* @@ -184,7 +184,7 @@ // CHECK-NEXT: [[T3:%.*]] = bitcast i8* [[T2]] to [[TEST1]]* // CHECK-NEXT: [[T4:%.*]] = load i8*, i8** @OBJC_SELECTOR_REFERENCES_ // CHECK-NEXT: [[T5:%.*]] = bitcast [[TEST1]]* [[T3]] to i8* - // CHECK-NEXT: [[T6:%.*]] = call i8* bitcast + // CHECK-NEXT: [[T6:%.*]] = call frozen i8* bitcast // CHECK-NEXT: store i8* [[T6]], i8** // CHECK-NEXT: [[PCPTR2:%.*]] = bitcast i8** [[PC]] to i8* // CHECK-NEXT: call void @llvm.lifetime.end.p0i8(i64 8, i8* [[PCPTR2]]) @@ -204,7 +204,7 @@ // CHECK: [[PC:%.*]] = alloca i8*, align 8 // CHECK: [[PTRPTR1:%.*]] = bitcast [[PTR_T]]** [[PTR]] to i8* // CHECK: call void @llvm.lifetime.start.p0i8(i64 8, i8* [[PTRPTR1]]) - // CHECK: [[T0:%.*]] = call [[TEST1:%.*]]* @test1_helper() + // CHECK: [[T0:%.*]] = call frozen [[TEST1:%.*]]* @test1_helper() // CHECK-NEXT: [[T1:%.*]] = bitcast [[TEST1]]* [[T0]] to i8* // CHECK-NEXT: [[T2:%.*]] = notail call i8* @llvm.objc.retainAutoreleasedReturnValue(i8* [[T1]]) // CHECK-NEXT: [[T3:%.*]] = bitcast i8* [[T2]] to [[TEST1]]* @@ -217,7 +217,7 @@ // CHECK-NEXT: [[T3:%.*]] = bitcast i8* [[T2]] to [[TEST1]]* // CHECK-NEXT: [[T4:%.*]] = load i8*, i8** @OBJC_SELECTOR_REFERENCES_ // CHECK-NEXT: [[T5:%.*]] = bitcast [[TEST1]]* [[T3]] to i8* - // CHECK-NEXT: [[T6:%.*]] = call i8* bitcast + // CHECK-NEXT: [[T6:%.*]] = call frozen i8* bitcast // CHECK-NEXT: store i8* [[T6]], i8** // CHECK-NEXT: [[PCPTR2:%.*]] = bitcast i8** [[PC]] to i8* // CHECK-NEXT: call void @llvm.lifetime.end.p0i8(i64 8, i8* [[PCPTR2]]) @@ -237,7 +237,7 @@ // CHECK: [[PC:%.*]] = alloca i8*, align 8 // CHECK: [[PTRPTR1:%.*]] = bitcast [[PTR_T]]** [[PTR]] to i8* // CHECK: call void @llvm.lifetime.start.p0i8(i64 8, i8* [[PTRPTR1]]) - // CHECK: [[T0:%.*]] = call [[TEST1:%.*]]* @test1_helper() + // CHECK: [[T0:%.*]] = call frozen [[TEST1:%.*]]* @test1_helper() // CHECK-NEXT: [[T1:%.*]] = bitcast [[TEST1]]* [[T0]] to i8* // CHECK-NEXT: [[T2:%.*]] = notail call i8* @llvm.objc.retainAutoreleasedReturnValue(i8* [[T1]]) // CHECK-NEXT: [[T3:%.*]] = bitcast i8* [[T2]] to [[TEST1]]* @@ -247,7 +247,7 @@ // CHECK-NEXT: [[T0:%.*]] = load [[TEST1]]*, [[TEST1]]** // CHECK-NEXT: [[SEVEN:%.*]] = load i8*, i8** @OBJC_SELECTOR_REFERENCES_ // CHECK-NEXT: [[EIGHT:%.*]] = bitcast [[TEST1]]* [[T0]] to i8* - // CHECK-NEXT: [[CALL1:%.*]] = call i8* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to i8* (i8*, i8*)*)(i8* [[EIGHT]], i8* [[SEVEN]]) + // CHECK-NEXT: [[CALL1:%.*]] = call frozen i8* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to i8* (i8*, i8*)*)(i8* frozen [[EIGHT]], i8* frozen [[SEVEN]]) // CHECK-NEXT: store i8* [[CALL1]], i8** // CHECK-NEXT: [[PCPTR2:%.*]] = bitcast i8** [[PC]] to i8* // CHECK-NEXT: call void @llvm.lifetime.end.p0i8(i64 8, i8* [[PCPTR2]]) @@ -267,7 +267,7 @@ // CHECK: [[PC:%.*]] = alloca i8*, align 8 // CHECK: [[PTRPTR1:%.*]] = bitcast [[PTR_T]]** [[PTR]] to i8* // CHECK: call void @llvm.lifetime.start.p0i8(i64 8, i8* [[PTRPTR1]]) - // CHECK: [[T0:%.*]] = call [[TEST1:%.*]]* @test1_helper() + // CHECK: [[T0:%.*]] = call frozen [[TEST1:%.*]]* @test1_helper() // CHECK-NEXT: [[T1:%.*]] = bitcast [[TEST1]]* [[T0]] to i8* // CHECK-NEXT: [[T2:%.*]] = notail call i8* @llvm.objc.retainAutoreleasedReturnValue(i8* [[T1]]) // CHECK-NEXT: [[T3:%.*]] = bitcast i8* [[T2]] to [[TEST1]]* @@ -277,7 +277,7 @@ // CHECK-NEXT: [[T0:%.*]] = load [[TEST1]]*, [[TEST1]]** // CHECK-NEXT: [[SEVEN:%.*]] = load i8*, i8** @OBJC_SELECTOR_REFERENCES_ // CHECK-NEXT: [[EIGHT:%.*]] = bitcast [[TEST1]]* [[T0]] to i8* - // CHECK-NEXT: [[CALL1:%.*]] = call i8* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to i8* (i8*, i8*)*)(i8* [[EIGHT]], i8* [[SEVEN]]) + // CHECK-NEXT: [[CALL1:%.*]] = call frozen i8* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to i8* (i8*, i8*)*)(i8* frozen [[EIGHT]], i8* frozen [[SEVEN]]) // CHECK-NEXT: store i8* [[CALL1]], i8** // CHECK-NEXT: [[PCPTR2:%.*]] = bitcast i8** [[PC]] to i8* // CHECK-NEXT: call void @llvm.lifetime.end.p0i8(i64 8, i8* [[PCPTR2]]) diff --git a/clang/test/CodeGenObjC/arc-property.m b/clang/test/CodeGenObjC/arc-property.m --- a/clang/test/CodeGenObjC/arc-property.m +++ b/clang/test/CodeGenObjC/arc-property.m @@ -22,7 +22,7 @@ @synthesize pointer; @end // The getter should be a simple load. -// CHECK: define internal [[S1:%.*]]* @"\01-[Test1 pointer]"( +// CHECK: define internal frozen [[S1:%.*]]* @"\01-[Test1 pointer]"( // CHECK: [[OFFSET:%.*]] = load i64, i64* @"OBJC_IVAR_$_Test1.pointer" // CHECK-NEXT: [[T0:%.*]] = bitcast [[TEST1:%.*]]* {{%.*}} to i8* // CHECK-NEXT: [[T1:%.*]] = getelementptr inbounds i8, i8* [[T0]], i64 [[OFFSET]] @@ -36,7 +36,7 @@ // CHECK-NEXT: [[OFFSET:%.*]] = load i64, i64* @"OBJC_IVAR_$_Test1.pointer" // CHECK-NEXT: [[T1:%.*]] = load [[S1]]*, [[S1]]** {{%.*}} // CHECK-NEXT: [[T2:%.*]] = bitcast [[S1]]* [[T1]] to i8* -// CHECK-NEXT: call void @objc_setProperty(i8* [[T0]], i8* {{%.*}}, i64 [[OFFSET]], i8* [[T2]], i1 zeroext false, i1 zeroext false) +// CHECK-NEXT: call void @objc_setProperty(i8* frozen [[T0]], i8* frozen {{%.*}}, i64 frozen [[OFFSET]], i8* frozen [[T2]], i1 frozen zeroext false, i1 frozen zeroext false) // CHECK-NEXT: ret void @@ -65,16 +65,16 @@ // CHECK-NEXT: call void @llvm.objc.storeStrong(i8** [[T4]], i8* [[T0]]) [[NUW:#[0-9]+]] // CHECK-NEXT: ret void -// CHECK: define internal i8* @"\01-[Test2 theClass]"( +// CHECK: define internal frozen i8* @"\01-[Test2 theClass]"( // CHECK: [[OFFSET:%.*]] = load i64, i64* @"OBJC_IVAR_$_Test2._theClass" -// CHECK-NEXT: [[T0:%.*]] = tail call i8* @objc_getProperty(i8* {{.*}}, i8* {{.*}}, i64 [[OFFSET]], i1 zeroext true) +// CHECK-NEXT: [[T0:%.*]] = tail call frozen i8* @objc_getProperty(i8* {{.*}}, i8* {{.*}}, i64 frozen [[OFFSET]], i1 frozen zeroext true) // CHECK-NEXT: ret i8* [[T0]] // CHECK: define internal void @"\01-[Test2 setTheClass:]"( // CHECK: [[T0:%.*]] = bitcast [[TEST2]]* {{%.*}} to i8* // CHECK-NEXT: [[OFFSET:%.*]] = load i64, i64* @"OBJC_IVAR_$_Test2._theClass" // CHECK-NEXT: [[T1:%.*]] = load i8*, i8** {{%.*}} -// CHECK-NEXT: call void @objc_setProperty(i8* [[T0]], i8* {{%.*}}, i64 [[OFFSET]], i8* [[T1]], i1 zeroext true, i1 zeroext true) +// CHECK-NEXT: call void @objc_setProperty(i8* frozen [[T0]], i8* frozen {{%.*}}, i64 frozen [[OFFSET]], i8* frozen [[T1]], i1 frozen zeroext true, i1 frozen zeroext true) // CHECK-NEXT: ret void // CHECK: define internal void @"\01-[Test2 .cxx_destruct]"( @@ -103,13 +103,13 @@ // CHECK: [[T0:%.*]] = load [[TEST3]]*, [[TEST3]]** [[T]], // CHECK-NEXT: [[SEL:%.*]] = load i8*, i8** @OBJC_SELECTOR_REFERENCES // CHECK-NEXT: [[T1:%.*]] = bitcast [[TEST3]]* [[T0]] to i8* -// CHECK-NEXT: [[T2:%.*]] = call i8* bitcast ({{.*}} @objc_msgSend to {{.*}})(i8* [[T1]], i8* [[SEL]]) +// CHECK-NEXT: [[T2:%.*]] = call frozen i8* bitcast ({{.*}} @objc_msgSend to {{.*}})(i8* frozen [[T1]], i8* frozen [[SEL]]) // CHECK-NEXT: store i8* [[T2]], i8** [[X]], // Message send. // CHECK-NEXT: [[T0:%.*]] = load [[TEST3]]*, [[TEST3]]** [[T]], // CHECK-NEXT: [[SEL:%.*]] = load i8*, i8** @OBJC_SELECTOR_REFERENCES // CHECK-NEXT: [[T1:%.*]] = bitcast [[TEST3]]* [[T0]] to i8* -// CHECK-NEXT: [[T2:%.*]] = call i8* bitcast ({{.*}} @objc_msgSend to {{.*}})(i8* [[T1]], i8* [[SEL]]) +// CHECK-NEXT: [[T2:%.*]] = call frozen i8* bitcast ({{.*}} @objc_msgSend to {{.*}})(i8* frozen [[T1]], i8* frozen [[SEL]]) // CHECK-NEXT: [[T3:%.*]] = load i8*, i8** [[X]], // CHECK-NEXT: store i8* [[T2]], i8** [[X]], // CHECK-NEXT: call void @llvm.objc.release(i8* [[T3]]) @@ -124,8 +124,8 @@ extern id test3_helper(void); return test3_helper(); } -// CHECK: define internal i8* @"\01-[Test3 copyMachine]"( -// CHECK: [[T0:%.*]] = call i8* @test3_helper() +// CHECK: define internal frozen i8* @"\01-[Test3 copyMachine]"( +// CHECK: [[T0:%.*]] = call frozen i8* @test3_helper() // CHECK-NEXT: [[T1:%.*]] = notail call i8* @llvm.objc.retainAutoreleasedReturnValue(i8* [[T0]]) // CHECK-NEXT: ret i8* [[T1]] - (void) setCopyMachine: (id) x {} @@ -146,7 +146,7 @@ @implementation ABC_Class @synthesize someId = _someId; -// CHECK: define internal %{{.*}}* @"\01-[ABC_Class someId]" +// CHECK: define internal frozen %{{.*}}* @"\01-[ABC_Class someId]" // CHECK: define internal void @"\01-[ABC_Class setSomeId:]"( @end diff --git a/clang/test/CodeGenObjC/arc-related-result-type.m b/clang/test/CodeGenObjC/arc-related-result-type.m --- a/clang/test/CodeGenObjC/arc-related-result-type.m +++ b/clang/test/CodeGenObjC/arc-related-result-type.m @@ -16,7 +16,7 @@ // CHECK-NEXT: load [[TEST0]]*, [[TEST0]]** [[VAL]], // CHECK-NEXT: load // CHECK-NEXT: bitcast -// CHECK-NEXT: [[T0:%.*]] = call i8* bitcast ( +// CHECK-NEXT: [[T0:%.*]] = call frozen i8* bitcast ( // CHECK-NEXT: [[T1:%.*]] = notail call i8* @llvm.objc.retainAutoreleasedReturnValue(i8* [[T0]]) // CHECK-NEXT: [[T2:%.*]] = bitcast i8* [[T1]] to [[TEST0]]* // CHECK-NEXT: store [[TEST0]]* [[T2]], [[TEST0]]** [[X]] diff --git a/clang/test/CodeGenObjC/arc-ternary-op.m b/clang/test/CodeGenObjC/arc-ternary-op.m --- a/clang/test/CodeGenObjC/arc-ternary-op.m +++ b/clang/test/CodeGenObjC/arc-ternary-op.m @@ -19,7 +19,7 @@ // CHECK-NEXT: store i1 false, i1* [[RELCOND]] // CHECK-NEXT: br i1 [[T1]], // CHECK: br label - // CHECK: [[CALL:%.*]] = call i8* @test0_helper() + // CHECK: [[CALL:%.*]] = call frozen i8* @test0_helper() // CHECK-NEXT: store i8* [[CALL]], i8** [[RELVAL]] // CHECK-NEXT: store i1 true, i1* [[RELCOND]] // CHECK-NEXT: br label @@ -72,7 +72,7 @@ // CHECK-NEXT: store i8* [[T0]], i8** [[TEMP1]] // CHECK-NEXT: br label // CHECK: [[W:%.*]] = phi i8* [ [[T0]], {{%.*}} ], [ undef, {{%.*}} ] - // CHECK-NEXT: call void @test1_sink(i8** [[T1]]) + // CHECK-NEXT: call void @test1_sink(i8** frozen [[T1]]) // CHECK-NEXT: [[T0:%.*]] = icmp eq i8** [[ARG]], null // CHECK-NEXT: br i1 [[T0]], // CHECK: [[T0:%.*]] = load i8*, i8** [[TEMP1]] @@ -95,7 +95,7 @@ // CHECK-NEXT: store i1 true, i1* [[CONDCLEANUP]] // CHECK-NEXT: store i8* [[T0]], i8** [[TEMP2]] // CHECK-NEXT: br label - // CHECK: call void @test1_sink(i8** [[T1]]) + // CHECK: call void @test1_sink(i8** frozen [[T1]]) // CHECK-NEXT: [[T0:%.*]] = icmp eq i8** [[ARG]], null // CHECK-NEXT: br i1 [[T0]], // CHECK: [[T0:%.*]] = load i8*, i8** [[TEMP2]] @@ -131,7 +131,7 @@ // CHECK-NEXT: store i1 false, i1* [[RUN_CLEANUP]] // CHECK-NEXT: br i1 // Within true branch, cleanup enabled. - // CHECK: [[T0:%.*]] = call i8* @test2_producer() + // CHECK: [[T0:%.*]] = call frozen i8* @test2_producer() // CHECK-NEXT: [[T1:%.*]] = notail call i8* @llvm.objc.retainAutoreleasedReturnValue(i8* [[T0]]) // CHECK-NEXT: store i8* [[T1]], i8** [[CLEANUP_SAVE]] // CHECK-NEXT: store i1 true, i1* [[RUN_CLEANUP]] diff --git a/clang/test/CodeGenObjC/arc-unopt.m b/clang/test/CodeGenObjC/arc-unopt.m --- a/clang/test/CodeGenObjC/arc-unopt.m +++ b/clang/test/CodeGenObjC/arc-unopt.m @@ -33,7 +33,7 @@ id test3(void) { extern id test3_helper(void); - // CHECK: [[T0:%.*]] = call i8* @test3_helper() + // CHECK: [[T0:%.*]] = call frozen i8* @test3_helper() // CHECK-NEXT: ret i8* [[T0]] return test3_helper(); } @@ -42,7 +42,7 @@ @interface Test4_sub : Test4 { id y; } @end Test4 *test4(void) { extern Test4_sub *test4_helper(void); - // CHECK: [[T0:%.*]] = call [[TEST4S:%.*]]* @test4_helper() + // CHECK: [[T0:%.*]] = call frozen [[TEST4S:%.*]]* @test4_helper() // CHECK-NEXT: [[T1:%.*]] = bitcast [[TEST4S]]* [[T0]] to [[TEST4:%.*]]* // CHECK-NEXT: ret [[TEST4]]* [[T1]] return test4_helper(); diff --git a/clang/test/CodeGenObjC/arc-unsafeclaim.m b/clang/test/CodeGenObjC/arc-unsafeclaim.m --- a/clang/test/CodeGenObjC/arc-unsafeclaim.m +++ b/clang/test/CodeGenObjC/arc-unsafeclaim.m @@ -26,7 +26,7 @@ } // CHECK-LABEL: define void @test_assign() // CHECK: [[X:%.*]] = alloca i8* -// CHECK: [[T0:%.*]] = call [[A:.*]]* @makeA() +// CHECK: [[T0:%.*]] = call frozen [[A:.*]]* @makeA() // CHECK-MARKED-NEXT: call void asm sideeffect // CHECK-NEXT: [[T1:%.*]] = bitcast [[A]]* [[T0]] to i8* // CHECK-NEXT: [[T2:%.*]] = call i8* @llvm.objc.unsafeClaimAutoreleasedReturnValue(i8* [[T1]]) @@ -38,7 +38,7 @@ // CHECK-NEXT: ret void // DISABLED-LABEL: define void @test_assign() -// DISABLED: [[T0:%.*]] = call [[A:.*]]* @makeA() +// DISABLED: [[T0:%.*]] = call frozen [[A:.*]]* @makeA() // DISABLED-MARKED-NEXT: call void asm sideeffect // DISABLED-NEXT: [[T1:%.*]] = bitcast [[A]]* [[T0]] to i8* // DISABLED-NEXT: [[T2:%.*]] = {{.*}}call i8* @llvm.objc.retainAutoreleasedReturnValue(i8* [[T1]]) @@ -50,7 +50,7 @@ // CHECK-LABEL: define void @test_assign_assign() // CHECK: [[X:%.*]] = alloca i8* // CHECK: [[Y:%.*]] = alloca i8* -// CHECK: [[T0:%.*]] = call [[A]]* @makeA() +// CHECK: [[T0:%.*]] = call frozen [[A]]* @makeA() // CHECK-MARKED-NEXT: call void asm sideeffect // CHECK-NEXT: [[T1:%.*]] = bitcast [[A]]* [[T0]] to i8* // CHECK-NEXT: [[T2:%.*]] = call i8* @llvm.objc.unsafeClaimAutoreleasedReturnValue(i8* [[T1]]) @@ -72,7 +72,7 @@ // CHECK-LABEL: define void @test_strong_assign_assign() // CHECK: [[X:%.*]] = alloca i8* // CHECK: [[Y:%.*]] = alloca i8* -// CHECK: [[T0:%.*]] = call [[A]]* @makeA() +// CHECK: [[T0:%.*]] = call frozen [[A]]* @makeA() // CHECK-MARKED-NEXT: call void asm sideeffect // CHECK-NEXT: [[T1:%.*]] = bitcast [[A]]* [[T0]] to i8* // CHECK-NEXT: [[T2:%.*]] = {{.*}}call i8* @llvm.objc.retainAutoreleasedReturnValue(i8* [[T1]]) @@ -99,7 +99,7 @@ // CHECK-LABEL: define void @test_assign_strong_assign() // CHECK: [[X:%.*]] = alloca i8* // CHECK: [[Y:%.*]] = alloca i8* -// CHECK: [[T0:%.*]] = call [[A]]* @makeA() +// CHECK: [[T0:%.*]] = call frozen [[A]]* @makeA() // CHECK-MARKED-NEXT: call void asm sideeffect // CHECK-NEXT: [[T1:%.*]] = bitcast [[A]]* [[T0]] to i8* // CHECK-NEXT: [[T2:%.*]] = {{.*}}call i8* @llvm.objc.retainAutoreleasedReturnValue(i8* [[T1]]) @@ -123,7 +123,7 @@ } // CHECK-LABEL: define void @test_init() // CHECK: [[X:%.*]] = alloca i8* -// CHECK: [[T0:%.*]] = call [[A]]* @makeA() +// CHECK: [[T0:%.*]] = call frozen [[A]]* @makeA() // CHECK-MARKED-NEXT: call void asm sideeffect // CHECK-NEXT: [[T1:%.*]] = bitcast [[A]]* [[T0]] to i8* // CHECK-NEXT: [[T2:%.*]] = call i8* @llvm.objc.unsafeClaimAutoreleasedReturnValue(i8* [[T1]]) @@ -141,7 +141,7 @@ // CHECK-LABEL: define void @test_init_assignment() // CHECK: [[X:%.*]] = alloca i8* // CHECK: [[Y:%.*]] = alloca i8* -// CHECK: [[T0:%.*]] = call [[A]]* @makeA() +// CHECK: [[T0:%.*]] = call frozen [[A]]* @makeA() // CHECK-MARKED-NEXT: call void asm sideeffect // CHECK-NEXT: [[T1:%.*]] = bitcast [[A]]* [[T0]] to i8* // CHECK-NEXT: [[T2:%.*]] = call i8* @llvm.objc.unsafeClaimAutoreleasedReturnValue(i8* [[T1]]) @@ -162,7 +162,7 @@ // CHECK-LABEL: define void @test_strong_init_assignment() // CHECK: [[X:%.*]] = alloca i8* // CHECK: [[Y:%.*]] = alloca i8* -// CHECK: [[T0:%.*]] = call [[A]]* @makeA() +// CHECK: [[T0:%.*]] = call frozen [[A]]* @makeA() // CHECK-MARKED-NEXT: call void asm sideeffect // CHECK-NEXT: [[T1:%.*]] = bitcast [[A]]* [[T0]] to i8* // CHECK-NEXT: [[T2:%.*]] = {{.*}}call i8* @llvm.objc.retainAutoreleasedReturnValue(i8* [[T1]]) @@ -186,7 +186,7 @@ // CHECK-LABEL: define void @test_init_strong_assignment() // CHECK: [[X:%.*]] = alloca i8* // CHECK: [[Y:%.*]] = alloca i8* -// CHECK: [[T0:%.*]] = call [[A]]* @makeA() +// CHECK: [[T0:%.*]] = call frozen [[A]]* @makeA() // CHECK-MARKED-NEXT: call void asm sideeffect // CHECK-NEXT: [[T1:%.*]] = bitcast [[A]]* [[T0]] to i8* // CHECK-NEXT: [[T2:%.*]] = {{.*}}call i8* @llvm.objc.retainAutoreleasedReturnValue(i8* [[T1]]) @@ -209,7 +209,7 @@ makeA(); } // CHECK-LABEL: define void @test_ignored() -// CHECK: [[T0:%.*]] = call [[A]]* @makeA() +// CHECK: [[T0:%.*]] = call frozen [[A]]* @makeA() // CHECK-MARKED-NEXT: call void asm sideeffect // CHECK-NEXT: [[T1:%.*]] = bitcast [[A]]* [[T0]] to i8* // CHECK-NEXT: [[T2:%.*]] = call i8* @llvm.objc.unsafeClaimAutoreleasedReturnValue(i8* [[T1]]) @@ -220,7 +220,7 @@ (void) makeA(); } // CHECK-LABEL: define void @test_cast_to_void() -// CHECK: [[T0:%.*]] = call [[A]]* @makeA() +// CHECK: [[T0:%.*]] = call frozen [[A]]* @makeA() // CHECK-MARKED-NEXT: call void asm sideeffect // CHECK-NEXT: [[T1:%.*]] = bitcast [[A]]* [[T0]] to i8* // CHECK-NEXT: [[T2:%.*]] = call i8* @llvm.objc.unsafeClaimAutoreleasedReturnValue(i8* [[T1]]) diff --git a/clang/test/CodeGenObjC/arc-weak-property.m b/clang/test/CodeGenObjC/arc-weak-property.m --- a/clang/test/CodeGenObjC/arc-weak-property.m +++ b/clang/test/CodeGenObjC/arc-weak-property.m @@ -11,7 +11,7 @@ @synthesize PROP; @end -// CHECK: define internal i8* @"\01-[WeakPropertyTest PROP]" +// CHECK: define internal frozen i8* @"\01-[WeakPropertyTest PROP]" // CHECK: [[SELF:%.*]] = alloca [[WPT:%.*]]*, // CHECK-NEXT: [[CMD:%.*]] = alloca i8*, // CHECK-NEXT: store [[WPT]]* {{%.*}}, [[WPT]]** [[SELF]] diff --git a/clang/test/CodeGenObjC/arc-with-atthrow.m b/clang/test/CodeGenObjC/arc-with-atthrow.m --- a/clang/test/CodeGenObjC/arc-with-atthrow.m +++ b/clang/test/CodeGenObjC/arc-with-atthrow.m @@ -10,7 +10,7 @@ // TODO: We should probably emit this specific pattern without the reclaim. // CHECK-LABEL: define void @test() -// CHECK: [[T0:%.*]] = call i8* @make() +// CHECK: [[T0:%.*]] = call frozen i8* @make() // CHECK-NEXT: [[T1:%.*]] = notail call i8* @llvm.objc.retainAutoreleasedReturnValue(i8* [[T0]]) // CHECK-NEXT: [[T2:%.*]] = call i8* @llvm.objc.autorelease(i8* [[T1]]) // CHECK-NEXT: call void @objc_exception_throw(i8* [[T2]]) [[NR:#[0-9]+]] diff --git a/clang/test/CodeGenObjC/arc.m b/clang/test/CodeGenObjC/arc.m --- a/clang/test/CodeGenObjC/arc.m +++ b/clang/test/CodeGenObjC/arc.m @@ -1,10 +1,10 @@ -// RUN: %clang_cc1 -triple x86_64-apple-darwin10 -Wno-objc-root-class -Wno-incompatible-pointer-types -Wno-arc-unsafe-retained-assign -emit-llvm -fblocks -fobjc-arc -fobjc-runtime-has-weak -O2 -disable-llvm-passes -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple x86_64-apple-darwin10 -Wno-objc-root-class -Wno-incompatible-pointer-types -Wno-arc-unsafe-retained-assign -emit-llvm -fblocks -fobjc-arc -fobjc-runtime-has-weak -o - %s | FileCheck -check-prefix=CHECK-GLOBALS %s +// RUN: %clang_cc1 -disable-frozen-args -triple x86_64-apple-darwin10 -Wno-objc-root-class -Wno-incompatible-pointer-types -Wno-arc-unsafe-retained-assign -emit-llvm -fblocks -fobjc-arc -fobjc-runtime-has-weak -O2 -disable-llvm-passes -o - %s | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args -triple x86_64-apple-darwin10 -Wno-objc-root-class -Wno-incompatible-pointer-types -Wno-arc-unsafe-retained-assign -emit-llvm -fblocks -fobjc-arc -fobjc-runtime-has-weak -o - %s | FileCheck -check-prefix=CHECK-GLOBALS %s // rdar://13129783. Check both native/non-native arc platforms. Here we check // that they treat nonlazybind differently. -// RUN: %clang_cc1 -fobjc-runtime=macosx-10.6.0 -triple x86_64-apple-darwin10 -Wno-objc-root-class -Wno-incompatible-pointer-types -Wno-arc-unsafe-retained-assign -emit-llvm -fblocks -fobjc-arc -fobjc-runtime-has-weak -o - %s | FileCheck -check-prefix=ARC-ALIEN %s -// RUN: %clang_cc1 -fobjc-runtime=macosx-10.7.0 -triple x86_64-apple-darwin11 -Wno-objc-root-class -Wno-incompatible-pointer-types -Wno-arc-unsafe-retained-assign -emit-llvm -fblocks -fobjc-arc -fobjc-runtime-has-weak -o - %s | FileCheck -check-prefix=ARC-NATIVE %s +// RUN: %clang_cc1 -disable-frozen-args -fobjc-runtime=macosx-10.6.0 -triple x86_64-apple-darwin10 -Wno-objc-root-class -Wno-incompatible-pointer-types -Wno-arc-unsafe-retained-assign -emit-llvm -fblocks -fobjc-arc -fobjc-runtime-has-weak -o - %s | FileCheck -check-prefix=ARC-ALIEN %s +// RUN: %clang_cc1 -disable-frozen-args -fobjc-runtime=macosx-10.7.0 -triple x86_64-apple-darwin11 -Wno-objc-root-class -Wno-incompatible-pointer-types -Wno-arc-unsafe-retained-assign -emit-llvm -fblocks -fobjc-arc -fobjc-runtime-has-weak -o - %s | FileCheck -check-prefix=ARC-NATIVE %s // ARC-ALIEN: declare extern_weak void @llvm.objc.storeStrong(i8**, i8*) // ARC-ALIEN: declare extern_weak i8* @llvm.objc.retain(i8*) @@ -42,7 +42,7 @@ // CHECK-NEXT: ret void } -// CHECK-LABEL: define i8* @test1(i8* +// CHECK-LABEL: define frozen i8* @test1(i8* id test1(id x) { // CHECK: [[X:%.*]] = alloca i8* // CHECK-NEXT: [[Y:%.*]] = alloca i8* @@ -110,7 +110,7 @@ // CHECK-NEXT: load {{.*}}, {{.*}}* @"OBJC_CLASSLIST_REFERENCES_ // CHECK-NEXT: load i8*, i8** @OBJC_SELECTOR_REFERENCES_ // CHECK-NEXT: bitcast - // CHECK-NEXT: [[ALLOC:%.*]] = call i8* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend + // CHECK-NEXT: [[ALLOC:%.*]] = call frozen i8* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend // CHECK-NEXT: bitcast // CHECK-NEXT: bitcast // CHECK-NEXT: call void @llvm.objc.release(i8* @@ -119,7 +119,7 @@ // CHECK-NEXT: [[T0:%.*]] = load [[TEST3]]*, [[TEST3]]** [[X]] // CHECK-NEXT: load i8*, i8** @OBJC_SELECTOR_REFERENCES_ // CHECK-NEXT: [[T1:%.*]] = bitcast [[TEST3]]* [[T0]] to i8* - // CHECK-NEXT: [[COPY:%.*]] = call i8* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend {{.*}})(i8* [[T1]], + // CHECK-NEXT: [[COPY:%.*]] = call frozen i8* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend {{.*}})(i8* [[T1]], // CHECK-NEXT: call void @llvm.objc.release(i8* [[COPY]]) [[NUW:#[0-9]+]] [x copy]; @@ -143,13 +143,13 @@ // CHECK-NEXT: load {{.*}}, {{.*}}* @"OBJC_CLASSLIST_REFERENCES_ // CHECK-NEXT: load i8*, i8** @OBJC_SELECTOR_REFERENCES_ // CHECK-NEXT: bitcast - // CHECK-NEXT: [[ALLOC:%.*]] = call i8* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend + // CHECK-NEXT: [[ALLOC:%.*]] = call frozen i8* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend // CHECK-NEXT: bitcast // Call to -initWith: with elided retain of consumed argument. // CHECK-NEXT: load i8*, i8** @OBJC_SELECTOR_REFERENCES_ // CHECK-NEXT: bitcast - // CHECK-NEXT: [[INIT:%.*]] = call i8* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to i8* (i8*, i8*, i32)*)(i8* + // CHECK-NEXT: [[INIT:%.*]] = call frozen i8* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to i8* (i8*, i8*, i32)*)(i8* // CHECK-NEXT: bitcast // CHECK-NEXT: [[INIT:%.*]] = bitcast // Assignment for initialization, retention elided. @@ -158,7 +158,7 @@ // Call to -copy. // CHECK-NEXT: [[V:%.*]] = load i8*, i8** [[X]] // CHECK-NEXT: load i8*, i8** @OBJC_SELECTOR_REFERENCES_ - // CHECK-NEXT: [[COPY:%.*]] = call i8* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend {{.*}})(i8* [[V]], + // CHECK-NEXT: [[COPY:%.*]] = call frozen i8* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend {{.*}})(i8* [[V]], // Assignment to x. // CHECK-NEXT: [[TMP:%.*]] = load i8*, i8** [[X]] @@ -175,19 +175,19 @@ // CHECK-NEXT: ret void } -// CHECK-LABEL: define i8* @test4() +// CHECK-LABEL: define frozen i8* @test4() id test4() { // Call to +alloc. // CHECK: load {{.*}}, {{.*}}* @"OBJC_CLASSLIST_REFERENCES_ // CHECK-NEXT: load i8*, i8** @OBJC_SELECTOR_REFERENCES_ // CHECK-NEXT: bitcast - // CHECK-NEXT: [[ALLOC:%.*]] = call i8* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend + // CHECK-NEXT: [[ALLOC:%.*]] = call frozen i8* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend // CHECK-NEXT: [[ALLOC:%.*]] = bitcast // Call to -initWith: with elided retain of consumed argument. // CHECK-NEXT: load i8*, i8** @OBJC_SELECTOR_REFERENCES_ // CHECK-NEXT: [[ALLOC:%.*]] = bitcast - // CHECK-NEXT: [[INIT:%.*]] = call i8* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to i8* (i8*, i8*, i32)*)(i8* [[ALLOC]], + // CHECK-NEXT: [[INIT:%.*]] = call frozen i8* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to i8* (i8*, i8*, i32)*)(i8* [[ALLOC]], // Initialization of return value, occurring within full-expression. // Retain/release elided. @@ -255,7 +255,7 @@ // CHECK: [[X:%.*]] = alloca i8* // CHECK-NEXT: [[XPTR1:%.*]] = bitcast i8** [[X]] to i8* // CHECK-NEXT: call void @llvm.lifetime.start.p0i8(i64 8, i8* [[XPTR1]]) - // CHECK-NEXT: [[CALL:%.*]] = call i8* @test6_helper() + // CHECK-NEXT: [[CALL:%.*]] = call frozen i8* @test6_helper() // CHECK-NEXT: store i8* [[CALL]], i8** [[X]] // CHECK-NEXT: [[T1:%.*]] = load i8*, i8** [[X]] // CHECK-NEXT: call void @llvm.objc.release(i8* [[T1]]) [[NUW]], !clang.imprecise_release @@ -290,7 +290,7 @@ // CHECK: [[X:%.*]] = alloca i8* // CHECK-NEXT: [[XPTR1:%.*]] = bitcast i8** [[X]] to i8* // CHECK-NEXT: call void @llvm.lifetime.start.p0i8(i64 8, i8* [[XPTR1]]) - // CHECK-NEXT: [[T0:%.*]] = call i8* @test8_helper() + // CHECK-NEXT: [[T0:%.*]] = call frozen i8* @test8_helper() // CHECK-NEXT: store i8* [[T0]], i8** [[X]] // CHECK-NEXT: call void @llvm.objc.release(i8* [[T0]]) [[NUW]], !clang.imprecise_release // CHECK-NEXT: [[XPTR2:%.*]] = bitcast i8** [[X]] to i8* @@ -316,13 +316,13 @@ // CHECK-NEXT: load [[TEST10]]*, [[TEST10]]** [[X]], align // CHECK-NEXT: load i8*, i8** @OBJC_SELECTOR_REFERENCES_{{[0-9]*}} // CHECK-NEXT: bitcast - // CHECK-NEXT: [[T0:%.*]] = call [[TEST10]]* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend + // CHECK-NEXT: [[T0:%.*]] = call frozen [[TEST10]]* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend // CHECK-NEXT: [[T1:%.*]] = bitcast [[TEST10]]* [[T0]] to i8* // CHECK-NEXT: [[T2:%.*]] = notail call i8* @llvm.objc.retainAutoreleasedReturnValue(i8* [[T1]]) // CHECK-NEXT: [[V:%.*]] = bitcast i8* [[T2]] to [[TEST10]]* // CHECK-NEXT: load i8*, i8** @OBJC_SELECTOR_REFERENCES_{{[0-9]*}} // CHECK-NEXT: bitcast - // CHECK-NEXT: [[T0:%.*]] = call [[TEST10]]* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend + // CHECK-NEXT: [[T0:%.*]] = call frozen [[TEST10]]* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend // CHECK-NEXT: [[T1:%.*]] = bitcast [[TEST10]]* [[T0]] to i8* // CHECK-NEXT: [[T2:%.*]] = notail call i8* @llvm.objc.retainAutoreleasedReturnValue(i8* [[T1]]) // CHECK-NEXT: [[T3:%.*]] = bitcast i8* [[T2]] to [[TEST10]]* @@ -350,7 +350,7 @@ // CHECK-NEXT: [[XPTR1:%.*]] = bitcast i8** [[X]] to i8* // CHECK-NEXT: call void @llvm.lifetime.start.p0i8(i64 8, i8* [[XPTR1]]) // CHECK-NEXT: [[T0:%.*]] = load i8* ()*, i8* ()** [[F]], align - // CHECK-NEXT: [[T1:%.*]] = call i8* [[T0]]() + // CHECK-NEXT: [[T1:%.*]] = call frozen i8* [[T0]]() // CHECK-NEXT: store i8* [[T1]], i8** [[X]], align // CHECK-NEXT: [[T3:%.*]] = load i8*, i8** [[X]] // CHECK-NEXT: call void @llvm.objc.release(i8* [[T3]]) [[NUW]], !clang.imprecise_release @@ -370,13 +370,13 @@ __weak id x = test12_helper(); // CHECK-NEXT: [[XPTR1:%.*]] = bitcast i8** [[X]] to i8* // CHECK-NEXT: call void @llvm.lifetime.start.p0i8(i64 8, i8* [[XPTR1]]) - // CHECK-NEXT: [[T0:%.*]] = call i8* @test12_helper() + // CHECK-NEXT: [[T0:%.*]] = call frozen i8* @test12_helper() // CHECK-NEXT: [[T1:%.*]] = notail call i8* @llvm.objc.retainAutoreleasedReturnValue(i8* [[T0]]) // CHECK-NEXT: call i8* @llvm.objc.initWeak(i8** [[X]], i8* [[T1]]) // CHECK-NEXT: call void @llvm.objc.release(i8* [[T1]]) x = test12_helper(); - // CHECK-NEXT: [[T0:%.*]] = call i8* @test12_helper() + // CHECK-NEXT: [[T0:%.*]] = call frozen i8* @test12_helper() // CHECK-NEXT: [[T1:%.*]] = notail call i8* @llvm.objc.retainAutoreleasedReturnValue(i8* [[T0]]) // CHECK-NEXT: call i8* @llvm.objc.storeWeak(i8** [[X]], i8* [[T1]]) // CHECK-NEXT: call void @llvm.objc.release(i8* [[T1]]) @@ -513,7 +513,7 @@ extern id test19_helper(void); x[2] = test19_helper(); - // CHECK-NEXT: [[CALL:%.*]] = call i8* @test19_helper() + // CHECK-NEXT: [[CALL:%.*]] = call frozen i8* @test19_helper() // CHECK-NEXT: [[T1:%.*]] = notail call i8* @llvm.objc.retainAutoreleasedReturnValue(i8* [[CALL]]) [[NUW]] // CHECK-NEXT: [[SLOT:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[X]], i64 0, i64 2 // CHECK-NEXT: [[T0:%.*]] = load i8*, i8** [[SLOT]] @@ -667,7 +667,7 @@ @end @implementation Test27 - (id) init { return self; } -// CHECK: define internal i8* @"\01-[Test27 init]" +// CHECK: define internal frozen i8* @"\01-[Test27 init]" // CHECK: [[SELF:%.*]] = alloca [[TEST27:%.*]]*, // CHECK-NEXT: [[CMD:%.*]] = alloca i8*, // CHECK-NEXT: store [[TEST27]]* {{%.*}}, [[TEST27]]** [[SELF]] @@ -710,7 +710,7 @@ @implementation Test29 static id _test29_allocator = 0; - (id) init { -// CHECK: define internal i8* @"\01-[Test29 init]"([[TEST29:%[^*]*]]* {{%.*}}, +// CHECK: define internal frozen i8* @"\01-[Test29 init]"([[TEST29:%[^*]*]]* {{%.*}}, // CHECK: [[SELF:%.*]] = alloca [[TEST29]]*, align 8 // CHECK-NEXT: [[CMD:%.*]] = alloca i8*, align 8 // CHECK-NEXT: store [[TEST29]]* {{%.*}}, [[TEST29]]** [[SELF]] @@ -727,7 +727,7 @@ // Actual message send. // CHECK-NEXT: [[T2:%.*]] = load i8*, i8** @OBJC_SELECTOR_REFERENCES_ // CHECK-NEXT: [[T3:%.*]] = bitcast [[TEST29]]* [[T0]] to i8* -// CHECK-NEXT: [[CALL:%.*]] = call i8* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to i8* (i8*, i8*, i8*)*)(i8* [[T3]], i8* [[T2]], i8* [[T1]]) +// CHECK-NEXT: [[CALL:%.*]] = call frozen i8* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to i8* (i8*, i8*, i8*)*)(i8* [[T3]], i8* [[T2]], i8* [[T1]]) // Implicit write of result back into 'self'. This is not supposed to // be detectable because we're supposed to ban accesses to the old @@ -752,7 +752,7 @@ return [self initWithAllocator: _test29_allocator]; } - (id) initWithAllocator: (id) allocator { -// CHECK: define internal i8* @"\01-[Test29 initWithAllocator:]"( +// CHECK: define internal frozen i8* @"\01-[Test29 initWithAllocator:]"( // CHECK: [[SELF:%.*]] = alloca [[TEST29]]*, align 8 // CHECK-NEXT: [[CMD:%.*]] = alloca i8*, align 8 // CHECK-NEXT: [[ALLOCATOR:%.*]] = alloca i8*, align 8 @@ -820,7 +820,7 @@ char *helper; } - (id) init { -// CHECK: define internal i8* @"\01-[Test30 init]"([[TEST30:%[^*]*]]* {{%.*}}, +// CHECK: define internal frozen i8* @"\01-[Test30 init]"([[TEST30:%[^*]*]]* {{%.*}}, // CHECK: [[RET:%.*]] = alloca [[TEST30]]* // CHECK-NEXT: alloca i8* // CHECK-NEXT: store [[TEST30]]* {{%.*}}, [[TEST30]]** [[SELF]] @@ -830,7 +830,7 @@ // CHECK-NEXT: [[T0:%.*]] = load [[TEST30]]*, [[TEST30]]** [[SELF]] // CHECK-NEXT: [[T1:%.*]] = load i8*, i8** @OBJC_SELECTOR_REFERENCES_ // CHECK-NEXT: [[T2:%.*]] = bitcast [[TEST30]]* [[T0]] to i8* -// CHECK-NEXT: [[CALL:%.*]] = call [[TEST30_HELPER:%.*]]* bitcast {{.*}} @objc_msgSend {{.*}}(i8* [[T2]], i8* [[T1]]) +// CHECK-NEXT: [[CALL:%.*]] = call frozen [[TEST30_HELPER:%.*]]* bitcast {{.*}} @objc_msgSend {{.*}}(i8* [[T2]], i8* [[T1]]) // Assignment. // CHECK-NEXT: [[T0:%.*]] = bitcast [[TEST30_HELPER]]* [[CALL]] to i8* @@ -862,7 +862,7 @@ return self; } - (Test30_helper*) initHelper { -// CHECK: define internal [[TEST30_HELPER]]* @"\01-[Test30 initHelper]"( +// CHECK: define internal frozen [[TEST30_HELPER]]* @"\01-[Test30 initHelper]"( // CHECK: alloca // CHECK-NEXT: alloca // CHECK-NEXT: store @@ -874,8 +874,8 @@ @end __attribute__((ns_returns_retained)) id test32(void) { -// CHECK-LABEL: define i8* @test32() -// CHECK: [[CALL:%.*]] = call i8* @test32_helper() +// CHECK-LABEL: define frozen i8* @test32() +// CHECK: [[CALL:%.*]] = call frozen i8* @test32_helper() // CHECK-NEXT: [[T0:%.*]] = notail call i8* @llvm.objc.retainAutoreleasedReturnValue(i8* [[CALL]]) // CHECK-NEXT: ret i8* [[T0]] extern id test32_helper(void); @@ -1044,7 +1044,7 @@ - (id) test __attribute__((ns_returns_retained)) { extern id test43_produce(void); return test43_produce(); - // CHECK: call i8* @test43_produce() + // CHECK: call frozen i8* @test43_produce() // CHECK-NEXT: notail call i8* @llvm.objc.retainAutoreleasedReturnValue( // CHECK-NEXT: ret } @@ -1056,17 +1056,17 @@ @implementation Test45 @synthesize x; @end -// CHECK: define internal i8* @"\01-[Test45 x]"( -// CHECK: [[CALL:%.*]] = tail call i8* @objc_getProperty( +// CHECK: define internal frozen i8* @"\01-[Test45 x]"( +// CHECK: [[CALL:%.*]] = tail call frozen i8* @objc_getProperty( // CHECK-NEXT: ret i8* [[CALL]] // rdar://problem/9315552 void test46(__weak id *wp, __weak volatile id *wvp) { extern id test46_helper(void); - // TODO: this is sub-optimal, we should retain at the actual call site. + // TODO: this is sub-optimal, we should retain at the actual call frozen site. - // CHECK: [[T0:%.*]] = call i8* @test46_helper() + // CHECK: [[T0:%.*]] = call frozen i8* @test46_helper() // CHECK-NEXT: [[T1:%.*]] = notail call i8* @llvm.objc.retainAutoreleasedReturnValue(i8* [[T0]]) // CHECK-NEXT: [[T2:%.*]] = load i8**, i8*** {{%.*}}, align 8 // CHECK-NEXT: [[T3:%.*]] = call i8* @llvm.objc.storeWeak(i8** [[T2]], i8* [[T1]]) @@ -1075,7 +1075,7 @@ // CHECK-NEXT: call void @llvm.objc.release(i8* [[T1]]) id x = *wp = test46_helper(); - // CHECK: [[T0:%.*]] = call i8* @test46_helper() + // CHECK: [[T0:%.*]] = call frozen i8* @test46_helper() // CHECK-NEXT: [[T1:%.*]] = notail call i8* @llvm.objc.retainAutoreleasedReturnValue(i8* [[T0]]) // CHECK-NEXT: [[T2:%.*]] = load i8**, i8*** {{%.*}}, align 8 // CHECK-NEXT: [[T3:%.*]] = call i8* @llvm.objc.storeWeak(i8** [[T2]], i8* [[T1]]) @@ -1095,7 +1095,7 @@ // CHECK-NEXT: [[XPTR1:%.*]] = bitcast i8** [[X]] to i8* // CHECK-NEXT: call void @llvm.lifetime.start.p0i8(i64 8, i8* [[XPTR1]]) // CHECK-NEXT: store i8* null, i8** [[X]] - // CHECK-NEXT: [[CALL:%.*]] = call i8* @test47_helper() + // CHECK-NEXT: [[CALL:%.*]] = call frozen i8* @test47_helper() // CHECK-NEXT: [[T0:%.*]] = notail call i8* @llvm.objc.retainAutoreleasedReturnValue(i8* [[CALL]]) // CHECK-NEXT: [[T1:%.*]] = load i8*, i8** [[X]] // CHECK-NEXT: store i8* [[T0]], i8** [[X]] @@ -1119,7 +1119,7 @@ // CHECK-NEXT: [[XPTR1:%.*]] = bitcast i8** [[X]] to i8* // CHECK-NEXT: call void @llvm.lifetime.start.p0i8(i64 8, i8* [[XPTR1]]) // CHECK-NEXT: [[T0:%.*]] = call i8* @llvm.objc.initWeak(i8** [[X]], i8* null) - // CHECK-NEXT: [[T1:%.*]] = call i8* @test48_helper() + // CHECK-NEXT: [[T1:%.*]] = call frozen i8* @test48_helper() // CHECK-NEXT: [[T2:%.*]] = notail call i8* @llvm.objc.retainAutoreleasedReturnValue(i8* [[T1]]) // CHECK-NEXT: [[T3:%.*]] = call i8* @llvm.objc.storeWeak(i8** [[X]], i8* [[T2]]) // CHECK-NEXT: [[T4:%.*]] = call i8* @llvm.objc.storeWeak(i8** [[X]], i8* [[T3]]) @@ -1138,7 +1138,7 @@ // CHECK-NEXT: [[XPTR1:%.*]] = bitcast i8** [[X]] to i8* // CHECK-NEXT: call void @llvm.lifetime.start.p0i8(i64 8, i8* [[XPTR1]]) // CHECK-NEXT: store i8* null, i8** [[X]] - // CHECK-NEXT: [[CALL:%.*]] = call i8* @test49_helper() + // CHECK-NEXT: [[CALL:%.*]] = call frozen i8* @test49_helper() // CHECK-NEXT: [[T0:%.*]] = notail call i8* @llvm.objc.retainAutoreleasedReturnValue(i8* [[CALL]]) // CHECK-NEXT: [[T1:%.*]] = call i8* @llvm.objc.autorelease(i8* [[T0]]) // CHECK-NEXT: store i8* [[T2]], i8** [[X]] @@ -1178,14 +1178,14 @@ id test52_helper(int) __attribute__((ns_returns_retained)); return ({ int x = 5; test52_helper(x); }); -// CHECK-LABEL: define i8* @test52() +// CHECK-LABEL: define frozen i8* @test52() // CHECK: [[X:%.*]] = alloca i32 // CHECK-NEXT: [[TMPALLOCA:%.*]] = alloca i8* // CHECK-NEXT: [[XPTR1:%.*]] = bitcast i32* [[X]] to i8* // CHECK-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[XPTR1]]) // CHECK-NEXT: store i32 5, i32* [[X]], // CHECK-NEXT: [[T0:%.*]] = load i32, i32* [[X]], -// CHECK-NEXT: [[T1:%.*]] = call i8* @test52_helper(i32 [[T0]]) +// CHECK-NEXT: [[T1:%.*]] = call frozen i8* @test52_helper(i32 [[T0]]) // CHECK-NEXT: store i8* [[T1]], i8** [[TMPALLOCA]] // CHECK-NEXT: [[XPTR2:%.*]] = bitcast i32* [[X]] to i8* // CHECK-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[XPTR2]]) @@ -1207,7 +1207,7 @@ // CHECK-NEXT: call void @llvm.lifetime.start.p0i8(i64 8, i8* [[XPTR1]]) // CHECK-NEXT: [[YPTR1:%.*]] = bitcast i8** [[Y]] to i8* // CHECK-NEXT: call void @llvm.lifetime.start.p0i8(i64 8, i8* [[YPTR1]]) -// CHECK-NEXT: [[T0:%.*]] = call i8* @test53_helper() +// CHECK-NEXT: [[T0:%.*]] = call frozen i8* @test53_helper() // CHECK-NEXT: [[T1:%.*]] = notail call i8* @llvm.objc.retainAutoreleasedReturnValue(i8* [[T0]]) // CHECK-NEXT: store i8* [[T1]], i8** [[Y]], // CHECK-NEXT: [[T0:%.*]] = load i8*, i8** [[Y]], @@ -1257,10 +1257,10 @@ @end @interface Test56 @end @implementation Test56 -// CHECK: define internal i8* @"\01+[Test56 make]"( +// CHECK: define internal frozen i8* @"\01+[Test56 make]"( + (id) make { extern id test56_helper(void); - // CHECK: [[T0:%.*]] = call i8* @test56_helper() + // CHECK: [[T0:%.*]] = call frozen i8* @test56_helper() // CHECK-NEXT: [[T1:%.*]] = notail call i8* @llvm.objc.retainAutoreleasedReturnValue(i8* [[T0]]) // CHECK-NEXT: ret i8* [[T1]] return test56_helper(); @@ -1272,7 +1272,7 @@ // CHECK: [[X:%.*]] = alloca i8*, align 8 // CHECK-NEXT: [[XPTR1:%.*]] = bitcast i8** [[X]] to i8* // CHECK-NEXT: call void @llvm.lifetime.start.p0i8(i64 8, i8* [[XPTR1]]) - // CHECK: [[T0:%.*]] = call i8* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to i8* (i8*, i8*)*)( + // CHECK: [[T0:%.*]] = call frozen i8* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to i8* (i8*, i8*)*)( // CHECK-NEXT: store i8* [[T0]], i8** [[X]] // CHECK-NEXT: [[T0:%.*]] = load i8*, i8** [[X]] // CHECK-NEXT: call void @llvm.objc.release(i8* [[T0]]) @@ -1290,7 +1290,7 @@ @implementation Test57 @synthesize strong, weak, unsafe; @end -// CHECK: define internal i8* @"\01-[Test57 strong]"( +// CHECK: define internal frozen i8* @"\01-[Test57 strong]"( // CHECK: [[T0:%.*]] = load [[TEST57:%.*]]*, [[TEST57:%.*]]** {{%.*}} // CHECK-NEXT: [[T1:%.*]] = load i64, i64* @"OBJC_IVAR_$_Test57.strong" // CHECK-NEXT: [[T2:%.*]] = bitcast [[TEST57]]* [[T0]] to i8* @@ -1299,7 +1299,7 @@ // CHECK-NEXT: [[T5:%.*]] = load i8*, i8** [[T4]] // CHECK-NEXT: ret i8* [[T5]] -// CHECK: define internal i8* @"\01-[Test57 weak]"( +// CHECK: define internal frozen i8* @"\01-[Test57 weak]"( // CHECK: [[T0:%.*]] = load [[TEST57]]*, [[TEST57]]** {{%.*}} // CHECK-NEXT: [[T1:%.*]] = load i64, i64* @"OBJC_IVAR_$_Test57.weak" // CHECK-NEXT: [[T2:%.*]] = bitcast [[TEST57]]* [[T0]] to i8* @@ -1309,7 +1309,7 @@ // CHECK-NEXT: [[T6:%.*]] = tail call i8* @llvm.objc.autoreleaseReturnValue(i8* [[T5]]) // CHECK-NEXT: ret i8* [[T6]] -// CHECK: define internal i8* @"\01-[Test57 unsafe]"( +// CHECK: define internal frozen i8* @"\01-[Test57 unsafe]"( // CHECK: [[T0:%.*]] = load [[TEST57]]*, [[TEST57]]** {{%.*}} // CHECK-NEXT: [[T1:%.*]] = load i64, i64* @"OBJC_IVAR_$_Test57.unsafe" // CHECK-NEXT: [[T2:%.*]] = bitcast [[TEST57]]* [[T0]] to i8* @@ -1327,7 +1327,7 @@ } // CHECK-LABEL: define void @test59() - // CHECK: [[T0:%.*]] = call i8* @test59_getlock() + // CHECK: [[T0:%.*]] = call frozen i8* @test59_getlock() // CHECK-NEXT: [[T1:%.*]] = notail call i8* @llvm.objc.retainAutoreleasedReturnValue(i8* [[T0]]) // CHECK-NEXT: call i32 @objc_sync_enter(i8* [[T1]]) // CHECK-NEXT: call void @test59_body() @@ -1349,21 +1349,21 @@ extern id test61_make(void); - // CHECK-NEXT: [[T0:%.*]] = call i8* @test61_make() + // CHECK-NEXT: [[T0:%.*]] = call frozen i8* @test61_make() // CHECK-NEXT: [[T1:%.*]] = notail call i8* @llvm.objc.retainAutoreleasedReturnValue(i8* [[T0]]) // CHECK-NEXT: [[T2:%.*]] = load i8*, i8** @OBJC_SELECTOR_REFERENCES_ // CHECK-NEXT: [[T3:%.*]] = load i8*, i8** @OBJC_SELECTOR_REFERENCES_ - // CHECK-NEXT: [[T4:%.*]] = call i8* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to i8* (i8*, i8*, i8*)*)(i8* [[T1]], i8* [[T3]], i8* [[T2]]) + // CHECK-NEXT: [[T4:%.*]] = call frozen i8* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to i8* (i8*, i8*, i8*)*)(i8* [[T1]], i8* [[T3]], i8* [[T2]]) // CHECK-NEXT: call void @llvm.objc.release(i8* [[T1]]) [test61_make() performSelector: @selector(test61_void)]; // CHECK-NEXT: [[YPTR1:%.*]] = bitcast i8** [[Y]] to i8* // CHECK-NEXT: call void @llvm.lifetime.start.p0i8(i64 8, i8* [[YPTR1]]) - // CHECK-NEXT: [[T0:%.*]] = call i8* @test61_make() + // CHECK-NEXT: [[T0:%.*]] = call frozen i8* @test61_make() // CHECK-NEXT: [[T1:%.*]] = notail call i8* @llvm.objc.retainAutoreleasedReturnValue(i8* [[T0]]) // CHECK-NEXT: [[T2:%.*]] = load i8*, i8** @OBJC_SELECTOR_REFERENCES_ // CHECK-NEXT: [[T3:%.*]] = load i8*, i8** @OBJC_SELECTOR_REFERENCES_ - // CHECK-NEXT: [[T4:%.*]] = call i8* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to i8* (i8*, i8*, i8*)*)(i8* [[T1]], i8* [[T3]], i8* [[T2]]) + // CHECK-NEXT: [[T4:%.*]] = call frozen i8* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to i8* (i8*, i8*, i8*)*)(i8* [[T1]], i8* [[T3]], i8* [[T2]]) // CHECK-NEXT: [[T5:%.*]] = notail call i8* @llvm.objc.retainAutoreleasedReturnValue(i8* [[T4]]) // CHECK-NEXT: store i8* [[T5]], i8** [[Y]] // CHECK-NEXT: call void @llvm.objc.release(i8* [[T1]]) @@ -1399,7 +1399,7 @@ // CHECK-NEXT: [[T1:%.*]] = icmp ne i32 [[T0]], 0 // CHECK-NEXT: store i1 false, i1* [[CLEANUP_REQUIRED]] // CHECK-NEXT: br i1 [[T1]], - // CHECK: [[T0:%.*]] = call i8* @test62_make() + // CHECK: [[T0:%.*]] = call frozen i8* @test62_make() // CHECK-NEXT: [[T1:%.*]] = notail call i8* @llvm.objc.retainAutoreleasedReturnValue(i8* [[T0]]) // CHECK-NEXT: store i8* [[T1]], i8** [[CLEANUP_VALUE]] // CHECK-NEXT: store i1 true, i1* [[CLEANUP_REQUIRED]] @@ -1439,7 +1439,7 @@ @implementation Person @synthesize address; @end -// CHECK: tail call i8* @objc_getProperty +// CHECK: tail call frozen i8* @objc_getProperty // CHECK: call void @objc_setProperty // Verify that we successfully parse and preserve this attribute in @@ -1453,11 +1453,11 @@ [test66_receiver() consume: test66_arg()]; } // CHECK-LABEL: define void @test66() -// CHECK: [[T0:%.*]] = call [[TEST66:%.*]]* @test66_receiver() +// CHECK: [[T0:%.*]] = call frozen [[TEST66:%.*]]* @test66_receiver() // CHECK-NEXT: [[T1:%.*]] = bitcast [[TEST66]]* [[T0]] to i8* // CHECK-NEXT: [[T2:%.*]] = notail call i8* @llvm.objc.retainAutoreleasedReturnValue(i8* [[T1]]) // CHECK-NEXT: [[T3:%.*]] = bitcast i8* [[T2]] to [[TEST66]]* -// CHECK-NEXT: [[T4:%.*]] = call i8* @test66_arg() +// CHECK-NEXT: [[T4:%.*]] = call frozen i8* @test66_arg() // CHECK-NEXT: [[T5:%.*]] = notail call i8* @llvm.objc.retainAutoreleasedReturnValue(i8* [[T4]]) // CHECK-NEXT: [[T6:%.*]] = load i8*, i8** @OBJC_SELECTOR_REFERENCES // CHECK-NEXT: [[T7:%.*]] = bitcast [[TEST66]]* [[T3]] to i8* @@ -1480,7 +1480,7 @@ // CHECK: [[CL:%.*]] = alloca i8*, align 8 // CHECK-NEXT: [[CLPTR1:%.*]] = bitcast i8** [[CL]] to i8* // CHECK-NEXT: call void @llvm.lifetime.start.p0i8(i64 8, i8* [[CLPTR1]]) -// CHECK-NEXT: [[T0:%.*]] = call i8* @test67_helper() +// CHECK-NEXT: [[T0:%.*]] = call frozen i8* @test67_helper() // CHECK-NEXT: store i8* [[T0]], i8** [[CL]], align 8 // CHECK-NEXT: [[CLPTR2:%.*]] = bitcast i8** [[CL]] to i8* // CHECK-NEXT: call void @llvm.lifetime.end.p0i8(i64 8, i8* [[CLPTR2]]) @@ -1494,7 +1494,7 @@ // CHECK: [[CL:%.*]] = alloca i8*, align 8 // CHECK-NEXT: [[CLPTR1:%.*]] = bitcast i8** [[CL]] to i8* // CHECK-NEXT: call void @llvm.lifetime.start.p0i8(i64 8, i8* [[CLPTR1]]) -// CHECK-NEXT: [[T0:%.*]] = call i8* @test67_helper() +// CHECK-NEXT: [[T0:%.*]] = call frozen i8* @test67_helper() // CHECK-NEXT: [[T1:%.*]] = notail call i8* @llvm.objc.retainAutoreleasedReturnValue(i8* [[T0]]) // CHECK-NEXT: store i8* [[T1]], i8** [[CL]], align 8 // CHECK-NEXT: [[T2:%.*]] = load i8*, i8** [[CL]] @@ -1508,7 +1508,7 @@ @implementation Test69 - (id) foo { return self; } @end -// CHECK: define internal i8* @"\01-[Test69 foo]"( +// CHECK: define internal frozen i8* @"\01-[Test69 foo]"( // CHECK: [[SELF:%.*]] = alloca [[TEST69:%.*]]*, align 8 // CHECK: [[T0:%.*]] = load [[TEST69]]*, [[TEST69]]** [[SELF]], align 8 // CHECK-NEXT: [[T1:%.*]] = bitcast [[TEST69]]* [[T0]] to i8* @@ -1563,13 +1563,13 @@ // CHECK: %[[V0:.*]] = call i8* @llvm.objc.retain(i8* %[[A]]) // CHECK: %[[V1:.*]] = call i8* @llvm.objc.retain(i8* %[[B]]) #2 // CHECK: %[[ARRAYINIT_BEGIN:.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* %[[T]], i64 0, i64 0 -// CHECK: %[[V3:.*]] = load i8*, i8** %[[A_ADDR]], align 8, !tbaa !7 +// CHECK: %[[V3:.*]] = load i8*, i8** %[[A_ADDR]], align 8, !tbaa // CHECK: %[[V4:.*]] = call i8* @llvm.objc.retain(i8* %[[V3]]) #2 -// CHECK: store i8* %[[V4]], i8** %[[ARRAYINIT_BEGIN]], align 8, !tbaa !7 +// CHECK: store i8* %[[V4]], i8** %[[ARRAYINIT_BEGIN]], align 8, !tbaa // CHECK: %[[ARRAYINIT_ELEMENT:.*]] = getelementptr inbounds i8*, i8** %[[ARRAYINIT_BEGIN]], i64 1 -// CHECK: %[[V5:.*]] = load i8*, i8** %[[B_ADDR]], align 8, !tbaa !7 +// CHECK: %[[V5:.*]] = load i8*, i8** %[[B_ADDR]], align 8, !tbaa // CHECK: %[[V6:.*]] = call i8* @llvm.objc.retain(i8* %[[V5]]) #2 -// CHECK: store i8* %[[V6]], i8** %[[ARRAYINIT_ELEMENT]], align 8, !tbaa !7 +// CHECK: store i8* %[[V6]], i8** %[[ARRAYINIT_ELEMENT]], align 8, !tbaa // CHECK: %[[ARRAY_BEGIN:.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* %[[T]], i32 0, i32 0 // CHECK: %[[V7:.*]] = getelementptr inbounds i8*, i8** %[[ARRAY_BEGIN]], i64 2 @@ -1578,14 +1578,14 @@ // CHECK: %[[ARRAYDESTROY_ELEMENTPAST:.*]] = phi i8** [ %[[V7]], %{{.*}} ], [ %[[ARRAYDESTROY_ELEMENT:.*]], %{{.*}} ] // CHECK: %[[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds i8*, i8** %[[ARRAYDESTROY_ELEMENTPAST]], i64 -1 // CHECK: %[[V8:.*]] = load i8*, i8** %[[ARRAYDESTROY_ELEMENT]], align 8 -// CHECK: call void @llvm.objc.release(i8* %[[V8]]) #2, !clang.imprecise_release !10 +// CHECK: call void @llvm.objc.release(i8* %[[V8]]) #2, !clang.imprecise_release // CHECK-NOT: call void @llvm.objc.release // CHECK: %[[V10:.*]] = load i8*, i8** %[[B_ADDR]], align 8 -// CHECK: call void @llvm.objc.release(i8* %[[V10]]) #2, !clang.imprecise_release !10 +// CHECK: call void @llvm.objc.release(i8* %[[V10]]) #2, !clang.imprecise_release // CHECK: %[[V11:.*]] = load i8*, i8** %[[A_ADDR]], align 8 -// CHECK: call void @llvm.objc.release(i8* %[[V11]]) #2, !clang.imprecise_release !10 +// CHECK: call void @llvm.objc.release(i8* %[[V11]]) #2, !clang.imprecise_release void test72(id a, id b) { __strong id t[] = (__strong id[]){a, b}; diff --git a/clang/test/CodeGenObjC/arm-atomic-scalar-setter-getter.m b/clang/test/CodeGenObjC/arm-atomic-scalar-setter-getter.m --- a/clang/test/CodeGenObjC/arm-atomic-scalar-setter-getter.m +++ b/clang/test/CodeGenObjC/arm-atomic-scalar-setter-getter.m @@ -8,6 +8,6 @@ @implementation I @synthesize LONG_PROP; @end -// CHECK-ARM: call void @objc_copyStruct(i8* %{{.*}}, i8* %{{.*}}, i32 8, i1 zeroext true, i1 zeroext false) -// CHECK-ARM: call void @objc_copyStruct(i8* %{{.*}}, i8* %{{.*}}, i32 8, i1 zeroext true, i1 zeroext false) +// CHECK-ARM: call void @objc_copyStruct(i8* frozen %{{.*}}, i8* frozen %{{.*}}, i32 frozen 8, i1 frozen zeroext true, i1 frozen zeroext false) +// CHECK-ARM: call void @objc_copyStruct(i8* frozen %{{.*}}, i8* frozen %{{.*}}, i32 frozen 8, i1 frozen zeroext true, i1 frozen zeroext false) diff --git a/clang/test/CodeGenObjC/atomic-aggregate-property.m b/clang/test/CodeGenObjC/atomic-aggregate-property.m --- a/clang/test/CodeGenObjC/atomic-aggregate-property.m +++ b/clang/test/CodeGenObjC/atomic-aggregate-property.m @@ -28,17 +28,17 @@ @synthesize z; @synthesize a; @end -// CHECK-LP64: define internal double @"\01-[A x]"( +// CHECK-LP64: define internal frozen double @"\01-[A x]"( // CHECK-LP64: load atomic i64, i64* {{%.*}} unordered, align 8 // CHECK-LP64: define internal void @"\01-[A setX:]"( // CHECK-LP64: store atomic i64 {{%.*}}, i64* {{%.*}} unordered, align 8 // CHECK-LP64: define internal void @"\01-[A y]"( -// CHECK-LP64: call void @objc_copyStruct(i8* {{%.*}}, i8* {{%.*}}, i64 32, i1 zeroext true, i1 zeroext false) +// CHECK-LP64: call void @objc_copyStruct(i8* frozen {{%.*}}, i8* frozen {{%.*}}, i64 frozen 32, i1 frozen zeroext true, i1 frozen zeroext false) // CHECK-LP64: define internal void @"\01-[A setY:]"( -// CHECK-LP64: call void @objc_copyStruct(i8* {{%.*}}, i8* {{%.*}}, i64 32, i1 zeroext true, i1 zeroext false) +// CHECK-LP64: call void @objc_copyStruct(i8* frozen {{%.*}}, i8* frozen {{%.*}}, i64 frozen 32, i1 frozen zeroext true, i1 frozen zeroext false) // CHECK-LP64: define internal void @"\01-[A z]"( // CHECK-LP64: call i8* @objc_memmove_collectable( diff --git a/clang/test/CodeGenObjC/attr-objc-runtime-visible.m b/clang/test/CodeGenObjC/attr-objc-runtime-visible.m --- a/clang/test/CodeGenObjC/attr-objc-runtime-visible.m +++ b/clang/test/CodeGenObjC/attr-objc-runtime-visible.m @@ -12,7 +12,7 @@ @end // CHECK: [[CLASSNAME:@.*]] = private unnamed_addr constant [22 x i8] c"MyRuntimeVisibleClass -// CHECK: define i8* @getClass() #0 { +// CHECK: define frozen i8* @getClass() #0 { Class getClass(void) { // CHECK: call i8* @objc_lookUpClass(i8* getelementptr inbounds ([22 x i8], [22 x i8]* [[CLASSNAME]], i32 0, i32 0)) #2 return [A class]; diff --git a/clang/test/CodeGenObjC/auto-property-synthesize-protocol.m b/clang/test/CodeGenObjC/auto-property-synthesize-protocol.m --- a/clang/test/CodeGenObjC/auto-property-synthesize-protocol.m +++ b/clang/test/CodeGenObjC/auto-property-synthesize-protocol.m @@ -26,12 +26,12 @@ @implementation I1 // expected-warning {{auto property synthesis will not synthesize property declared in a protocol}} @end -// CHECK: define internal i32 @"\01-[I auto_opt_window]"( +// CHECK: define internal frozen i32 @"\01-[I auto_opt_window]"( // CHECK: define internal void @"\01-[I setAuto_opt_window:]"( -// CHECK: define internal i32 @"\01-[I1 auto_req_window]"( +// CHECK: define internal frozen i32 @"\01-[I1 auto_req_window]"( // CHECK: define internal void @"\01-[I1 setAuto_req_window:]"( -// CHECK-NOT: define internal i32 @"\01-[I1 no_auto_opt_window]"( +// CHECK-NOT: define internal frozen i32 @"\01-[I1 no_auto_opt_window]"( // CHECK-NOT: define internal void @"\01-[I1 setNo_auto_opt_window:]"( -// CHECK-NOT: define internal i32 @"\01-[I no_auto_req_window]"( +// CHECK-NOT: define internal frozen i32 @"\01-[I no_auto_req_window]"( // CHECK-NOT: define internal void @"\01-[I setNo_auto_req_window:]"( diff --git a/clang/test/CodeGenObjC/autorelease.m b/clang/test/CodeGenObjC/autorelease.m --- a/clang/test/CodeGenObjC/autorelease.m +++ b/clang/test/CodeGenObjC/autorelease.m @@ -39,11 +39,11 @@ return 0; } } -// CHECK-LABEL: define i32 @tryTo(i32 ()* +// CHECK-LABEL: define frozen i32 @tryTo(i32 ()* // CHECK: [[RET:%.*]] = alloca i32, // CHECK: [[T0:%.*]] = call i8* @llvm.objc.autoreleasePoolPush() // CHECK-NEXT: [[T1:%.*]] = load i32 ()*, i32 ()** {{%.*}}, -// CHECK-NEXT: [[T2:%.*]] = invoke i32 [[T1]]() +// CHECK-NEXT: [[T2:%.*]] = invoke frozen i32 [[T1]]() // CHECK: store i32 [[T2]], i32* [[RET]] // CHECK: invoke void @objc_autoreleasePoolPop(i8* [[T0]]) // CHECK: landingpad { i8*, i32 } diff --git a/clang/test/CodeGenObjC/availability-cf-link-guard.m b/clang/test/CodeGenObjC/availability-cf-link-guard.m --- a/clang/test/CodeGenObjC/availability-cf-link-guard.m +++ b/clang/test/CodeGenObjC/availability-cf-link-guard.m @@ -1,14 +1,14 @@ -// RUN: %clang_cc1 -triple x86_64-apple-macosx10.11 -emit-llvm -o - %s | FileCheck --check-prefixes=CHECK,CHECK_LINK_OPT %s -// RUN: %clang_cc1 -triple x86_64-apple-macosx10.11 -emit-llvm -o - -D USE_BUILTIN %s | FileCheck --check-prefixes=CHECK,CHECK_LINK_OPT %s -// RUN: %clang_cc1 -triple x86_64-apple-macosx10.11 -emit-llvm -o - -D DEF_CF %s | FileCheck --check-prefixes=CHECK_CF,CHECK_LINK_OPT %s -// RUN: %clang_cc1 -triple x86_64-apple-macosx10.12 -emit-llvm -o - %s | FileCheck --check-prefix=CHECK_NO_GUARD %s -// RUN: %clang_cc1 -triple x86_64-unknown-linux -emit-llvm -o - %s | FileCheck --check-prefix=CHECK_NO_GUARD %s +// RUN: %clang_cc1 -disable-frozen-args -triple x86_64-apple-macosx10.11 -emit-llvm -o - %s | FileCheck --check-prefixes=CHECK,CHECK_LINK_OPT %s +// RUN: %clang_cc1 -disable-frozen-args -triple x86_64-apple-macosx10.11 -emit-llvm -o - -D USE_BUILTIN %s | FileCheck --check-prefixes=CHECK,CHECK_LINK_OPT %s +// RUN: %clang_cc1 -disable-frozen-args -triple x86_64-apple-macosx10.11 -emit-llvm -o - -D DEF_CF %s | FileCheck --check-prefixes=CHECK_CF,CHECK_LINK_OPT %s +// RUN: %clang_cc1 -disable-frozen-args -triple x86_64-apple-macosx10.12 -emit-llvm -o - %s | FileCheck --check-prefix=CHECK_NO_GUARD %s +// RUN: %clang_cc1 -disable-frozen-args -triple x86_64-unknown-linux -emit-llvm -o - %s | FileCheck --check-prefix=CHECK_NO_GUARD %s #ifdef DEF_CF struct CFBundle; typedef struct CFBundle *CFBundleRef; unsigned CFBundleGetVersionNumber(CFBundleRef bundle); -// CHECK_CF: declare i32 @CFBundleGetVersionNumber(%struct.CFBundle*) +// CHECK_CF: declare frozen i32 @CFBundleGetVersionNumber(%struct.CFBundle*) // CHECK_CF: @__clang_at_available_requires_core_foundation_framework // CHECK_CF-NEXT: call {{.*}}@CFBundleGetVersionNumber #endif diff --git a/clang/test/CodeGenObjC/bitfield-access.m b/clang/test/CodeGenObjC/bitfield-access.m --- a/clang/test/CodeGenObjC/bitfield-access.m +++ b/clang/test/CodeGenObjC/bitfield-access.m @@ -14,7 +14,7 @@ // Check that we don't try to use an i32 load here, which would reach beyond the // end of the structure. // -// CHECK-I386-LABEL: define i32 @f0( +// CHECK-I386-LABEL: define frozen i32 @f0( // CHECK-I386: [[t0_0:%.*]] = load i8, i8* {{.*}}, align 1 // CHECK-I386: lshr i8 [[t0_0]], 7 // CHECK-I386: } @@ -24,7 +24,7 @@ // Check that we can handled straddled loads. // -// CHECK-ARM-LABEL: define i32 @f1( +// CHECK-ARM-LABEL: define frozen i32 @f1( // CHECK-ARM: [[t1_ptr:%.*]] = getelementptr // CHECK-ARM: [[t1_base:%.*]] = bitcast i8* [[t1_ptr]] to i40* // CHECK-ARM: [[t1_0:%.*]] = load i40, i40* [[t1_base]], align 1 diff --git a/clang/test/CodeGenObjC/blocks-2.m b/clang/test/CodeGenObjC/blocks-2.m --- a/clang/test/CodeGenObjC/blocks-2.m +++ b/clang/test/CodeGenObjC/blocks-2.m @@ -3,7 +3,7 @@ // RUN: %clang_cc1 %s -emit-llvm -o - -fobjc-gc -fblocks -fexceptions -triple i386-apple-darwin10 -fobjc-runtime=macosx-fragile-10.5 -x objective-c++ | FileCheck %s -// CHECK: define i8* @{{.*}}test0 +// CHECK: define frozen i8* @{{.*}}test0 // CHECK: define internal void @{{.*}}_block_invoke( // CHECK: call i8* @objc_assign_strongCast( // CHECK-NEXT: ret void diff --git a/clang/test/CodeGenObjC/blocks.m b/clang/test/CodeGenObjC/blocks.m --- a/clang/test/CodeGenObjC/blocks.m +++ b/clang/test/CodeGenObjC/blocks.m @@ -18,7 +18,7 @@ -(void) im0; @end -// CHECK: define internal i32 @"__8-[A im0]_block_invoke"( +// CHECK: define internal frozen i32 @"__8-[A im0]_block_invoke"( @implementation A -(void) im0 { (void) ^{ return 1; }(); @@ -115,7 +115,7 @@ // CHECK-NEXT: [[T3:%.*]] = bitcast [[BLOCK_T]]* [[T1]] to i8* // CHECK-NEXT: [[T4:%.*]] = load i8*, i8** [[T2]] // CHECK-NEXT: [[T5:%.*]] = bitcast i8* [[T4]] to void (i8*, i32, ...)* -// CHECK-NEXT: call void (i8*, i32, ...) [[T5]](i8* [[T3]], i32 0, i32 1, i32 2, i32 3) +// CHECK-NEXT: call void (i8*, i32, ...) [[T5]](i8* frozen [[T3]], i32 frozen 0, i32 frozen 1, i32 frozen 2, i32 frozen 3) // CHECK-NEXT: ret void void test4(void (^block)()) { @@ -130,5 +130,5 @@ // CHECK-NEXT: [[T3:%.*]] = bitcast [[BLOCK_T]]* [[T1]] to i8* // CHECK-NEXT: [[T4:%.*]] = load i8*, i8** [[T2]] // CHECK-NEXT: [[T5:%.*]] = bitcast i8* [[T4]] to void (i8*, i32, i32, i32, i32)* -// CHECK-NEXT: call void [[T5]](i8* [[T3]], i32 0, i32 1, i32 2, i32 3) +// CHECK-NEXT: call void [[T5]](i8* frozen [[T3]], i32 frozen 0, i32 frozen 1, i32 frozen 2, i32 frozen 3) // CHECK-NEXT: ret void diff --git a/clang/test/CodeGenObjC/builtin-constant-p.m b/clang/test/CodeGenObjC/builtin-constant-p.m --- a/clang/test/CodeGenObjC/builtin-constant-p.m +++ b/clang/test/CodeGenObjC/builtin-constant-p.m @@ -8,7 +8,7 @@ extern void callee(void); -// CHECK-LABEL: define void @test(%0* %foo, %1* %bar) +// CHECK-LABEL: define void @test(%0* frozen %foo, %1* frozen %bar) void test(Foo *foo, Bar *bar) { // CHECK: [[ADDR_FOO:%.*]] = bitcast %0* %{{.*}} to i8* // CHECK-NEXT: call i1 @llvm.is.constant.p0i8(i8* [[ADDR_FOO]]) @@ -19,7 +19,7 @@ } // Test other Objective-C types. -// CHECK-LABEL: define void @test_more(i8* %object, i8* %klass) +// CHECK-LABEL: define void @test_more(i8* frozen %object, i8* frozen %klass) void test_more(id object, Class klass) { // CHECK: call i1 @llvm.is.constant.p0i8(i8* %{{.*}}) // CHECK: call i1 @llvm.is.constant.p0i8(i8* %{{.*}}) diff --git a/clang/test/CodeGenObjC/builtins.m b/clang/test/CodeGenObjC/builtins.m --- a/clang/test/CodeGenObjC/builtins.m +++ b/clang/test/CodeGenObjC/builtins.m @@ -4,4 +4,4 @@ short s = ((short (*)(id, SEL, const char*)) objc_msgSend)(receiver, sel, str); } // CHECK-LABEL: define void @test0( -// CHECK: call signext i16 bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to i16 (i8*, i8*, i8*)*)( +// CHECK: call frozen signext i16 bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to i16 (i8*, i8*, i8*)*)( diff --git a/clang/test/CodeGenObjC/category-super-class-meth.m b/clang/test/CodeGenObjC/category-super-class-meth.m --- a/clang/test/CodeGenObjC/category-super-class-meth.m +++ b/clang/test/CodeGenObjC/category-super-class-meth.m @@ -21,7 +21,7 @@ +(id)copy { return [super copy]; } // BAD: class method in category @end -// CHECK: define internal i8* @"\01+[Sub2(Category) copy] +// CHECK: define internal frozen i8* @"\01+[Sub2(Category) copy] // CHECK: [[ONE:%.*]] = load %struct._class_t*, %struct._class_t** @"OBJC_CLASSLIST_SUP_REFS_$_.3" // CHECK: [[TWO:%.*]] = bitcast %struct._class_t* [[ONE]] to i8* // CHECK: [[THREE:%.*]] = getelementptr inbounds %struct._objc_super, %struct._objc_super* [[OBJC_SUPER:%.*]], i32 0, i32 1 diff --git a/clang/test/CodeGenObjC/class-stubs.m b/clang/test/CodeGenObjC/class-stubs.m --- a/clang/test/CodeGenObjC/class-stubs.m +++ b/clang/test/CodeGenObjC/class-stubs.m @@ -39,12 +39,12 @@ int main() { [Base classMethod]; } -// CHECK-LABEL: define i32 @main() +// CHECK-LABEL: define frozen i32 @main() // CHECK-NEXT: entry: // CHECK-NEXT: [[CLASS:%.*]] = call %struct._class_t* @objc_loadClassref(i8** @"OBJC_CLASSLIST_REFERENCES_$_") // CHECK-NEXT: [[SELECTOR:%.*]] = load i8*, i8** @OBJC_SELECTOR_REFERENCES_ // CHECK-NEXT: [[RECEIVER:%.*]] = bitcast %struct._class_t* [[CLASS]] to i8* -// CHECK-NEXT: call void bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to void (i8*, i8*)*)(i8* [[RECEIVER]], i8* [[SELECTOR]]) +// CHECK-NEXT: call void bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to void (i8*, i8*)*)(i8* frozen [[RECEIVER]], i8* frozen [[SELECTOR]]) // CHECK-NEXT: ret i32 0 // CHECK-LABEL: declare extern_weak %struct._class_t* @objc_loadClassref(i8**) @@ -55,27 +55,27 @@ + (void) anotherClassMethod { [super classMethod]; } -// CHECK-LABEL: define internal void @"\01+[Derived(MyCategory) anotherClassMethod]"(i8* %self, i8* %_cmd) #0 { +// CHECK-LABEL: define internal void @"\01+[Derived(MyCategory) anotherClassMethod]"(i8* frozen %self, i8* frozen %_cmd) #0 // CHECK-NEXT: entry: // CHECK: [[SUPER:%.*]] = alloca %struct._objc_super, align 8 // CHECK: [[METACLASS_REF:%.*]] = load %struct._class_t*, %struct._class_t** @"OBJC_CLASSLIST_SUP_REFS_$_", align 8 // CHECK: [[CAST_METACLASS_REF:%.*]] = bitcast %struct._class_t* [[METACLASS_REF]] to i8* // CHECK: [[DEST:%.*]] = getelementptr inbounds %struct._objc_super, %struct._objc_super* [[SUPER]], i32 0, i32 1 // CHECK: store i8* [[CAST_METACLASS_REF]], i8** [[DEST]], align 8 -// CHECK: call void bitcast (i8* (%struct._objc_super*, i8*, ...)* @objc_msgSendSuper2 to void (%struct._objc_super*, i8*)*)(%struct._objc_super* [[SUPER]], i8* {{%.*}}) +// CHECK: call void bitcast (i8* (%struct._objc_super*, i8*, ...)* @objc_msgSendSuper2 to void (%struct._objc_super*, i8*)*)(%struct._objc_super* frozen [[SUPER]], i8* frozen {{%.*}}) // CHECK: ret void - (void) anotherInstanceMethod { [super instanceMethod]; } -// CHECK-LABEL: define internal void @"\01-[Derived(MyCategory) anotherInstanceMethod]"(%0* %self, i8* %_cmd) #0 { +// CHECK-LABEL: define internal void @"\01-[Derived(MyCategory) anotherInstanceMethod]"(%0* frozen %self, i8* frozen %_cmd) #0 // CHECK-NEXT: entry: // CHECK: [[SUPER:%.*]] = alloca %struct._objc_super, align 8 // CHECK: [[CLASS_REF:%.*]] = call %struct._class_t* @objc_loadClassref(i8** @"OBJC_CLASSLIST_SUP_REFS_$_.1") // CHECK: [[CAST_CLASS_REF:%.*]] = bitcast %struct._class_t* [[CLASS_REF]] to i8* // CHECK: [[DEST:%.*]] = getelementptr inbounds %struct._objc_super, %struct._objc_super* [[SUPER]], i32 0, i32 1 // CHECK: store i8* [[CAST_CLASS_REF]], i8** [[DEST]], align 8 -// CHECK: call void bitcast (i8* (%struct._objc_super*, i8*, ...)* @objc_msgSendSuper2 to void (%struct._objc_super*, i8*)*)(%struct._objc_super* [[SUPER]], i8* {{%.*}}) +// CHECK: call void bitcast (i8* (%struct._objc_super*, i8*, ...)* @objc_msgSendSuper2 to void (%struct._objc_super*, i8*)*)(%struct._objc_super* frozen [[SUPER]], i8* frozen {{%.*}}) // CHECK: ret void @end diff --git a/clang/test/CodeGenObjC/debug-info-blocks.m b/clang/test/CodeGenObjC/debug-info-blocks.m --- a/clang/test/CodeGenObjC/debug-info-blocks.m +++ b/clang/test/CodeGenObjC/debug-info-blocks.m @@ -13,7 +13,7 @@ // Test that we do emit scope info for the helper functions, and that the // parameters to these functions are marked as artificial (so the debugger // doesn't accidentally step into the function). -// CHECK: define {{.*}} @__copy_helper_block_{{.*}}(i8* %0, i8* %1) +// CHECK: define {{.*}} @__copy_helper_block_{{.*}}(i8* frozen %0, i8* frozen %1) // CHECK-NOT: ret // CHECK: call {{.*}}, !dbg ![[DBG_LINE:[0-9]+]] // CHECK-NOT: ret diff --git a/clang/test/CodeGenObjC/debug-info-nested-blocks.m b/clang/test/CodeGenObjC/debug-info-nested-blocks.m --- a/clang/test/CodeGenObjC/debug-info-nested-blocks.m +++ b/clang/test/CodeGenObjC/debug-info-nested-blocks.m @@ -21,6 +21,6 @@ // Verify that debug info for BlockPointerDbgLoc is emitted for the // innermost block. // -// CHECK: define {{.*}}void @__bar_block_invoke_3(i8* %.block_descriptor) +// CHECK: define {{.*}}void @__bar_block_invoke_3(i8* frozen %.block_descriptor) // CHECK: %[[BLOCKADDR:.*]] = alloca <{{.*}}>*, align // CHECK: call void @llvm.dbg.declare(metadata {{.*}}%[[BLOCKADDR]] diff --git a/clang/test/CodeGenObjC/direct-method-ret-mismatch.m b/clang/test/CodeGenObjC/direct-method-ret-mismatch.m --- a/clang/test/CodeGenObjC/direct-method-ret-mismatch.m +++ b/clang/test/CodeGenObjC/direct-method-ret-mismatch.m @@ -6,13 +6,13 @@ @end @implementation Root -// CHECK-LABEL: define internal i8* @"\01-[Root something]"( +// CHECK-LABEL: define internal frozen i8* @"\01-[Root something]"( - (id)something { // CHECK: %{{[^ ]*}} = call {{.*}} @"\01-[Root method]" return [self method]; } -// CHECK-LABEL: define hidden i8* @"\01-[Root method]"( +// CHECK-LABEL: define hidden frozen i8* @"\01-[Root method]"( - (id)method { return self; } diff --git a/clang/test/CodeGenObjC/direct-method.m b/clang/test/CodeGenObjC/direct-method.m --- a/clang/test/CodeGenObjC/direct-method.m +++ b/clang/test/CodeGenObjC/direct-method.m @@ -17,12 +17,12 @@ @end @implementation Root -// CHECK-LABEL: define hidden i32 @"\01-[Root intProperty2]" +// CHECK-LABEL: define hidden frozen i32 @"\01-[Root intProperty2]" - (int)intProperty2 { return 42; } -// CHECK-LABEL: define hidden i32 @"\01-[Root getInt]"( +// CHECK-LABEL: define hidden frozen i32 @"\01-[Root getInt]"( - (int)getInt __attribute__((objc_direct)) { // loading parameters // CHECK-LABEL: entry: @@ -55,7 +55,7 @@ return 42; } -// CHECK-LABEL: define hidden i32 @"\01+[Root classGetInt]"( +// CHECK-LABEL: define hidden frozen i32 @"\01+[Root classGetInt]"( + (int)classGetInt __attribute__((objc_direct)) { // loading parameters // CHECK-LABEL: entry: @@ -160,7 +160,7 @@ } @end -// CHECK-LABEL: define hidden i32 @"\01-[Root intProperty]" +// CHECK-LABEL: define hidden frozen i32 @"\01-[Root intProperty]" @interface Foo : Root { id __strong _cause_cxx_destruct; @@ -181,43 +181,43 @@ __attribute__((objc_direct_members)) @implementation Foo -// CHECK-LABEL: define hidden i32 @"\01-[Foo directMethodInExtension]"( +// CHECK-LABEL: define hidden frozen i32 @"\01-[Foo directMethodInExtension]"( - (int)directMethodInExtension { return 42; } -// CHECK-LABEL: define hidden i32 @"\01-[Foo getDirect_setDynamic]"( +// CHECK-LABEL: define hidden frozen i32 @"\01-[Foo getDirect_setDynamic]"( // CHECK-LABEL: define internal void @"\01-[Foo setGetDirect_setDynamic:]"( -// CHECK-LABEL: define internal i32 @"\01-[Foo getDynamic_setDirect]"( +// CHECK-LABEL: define internal frozen i32 @"\01-[Foo getDynamic_setDirect]"( // CHECK-LABEL: define hidden void @"\01-[Foo setGetDynamic_setDirect:]"( // CHECK-LABEL: define internal void @"\01-[Foo .cxx_destruct]"( @end @implementation Foo (Cat) -// CHECK-LABEL: define hidden i32 @"\01-[Foo directMethodInCategory]"( +// CHECK-LABEL: define hidden frozen i32 @"\01-[Foo directMethodInCategory]"( - (int)directMethodInCategory { return 42; } -// CHECK-LABEL: define hidden i32 @"\01-[Foo directMethodInCategoryNoDecl]"( +// CHECK-LABEL: define hidden frozen i32 @"\01-[Foo directMethodInCategoryNoDecl]"( - (int)directMethodInCategoryNoDecl __attribute__((objc_direct)) { return 42; } @end int useRoot(Root *r) { - // CHECK-LABEL: define i32 @useRoot - // CHECK: %{{[^ ]*}} = call i32 bitcast {{.*}} @"\01-[Root getInt]" - // CHECK: %{{[^ ]*}} = call i32 bitcast {{.*}} @"\01-[Root intProperty]" - // CHECK: %{{[^ ]*}} = call i32 bitcast {{.*}} @"\01-[Root intProperty2]" + // CHECK-LABEL: define frozen i32 @useRoot + // CHECK: %{{[^ ]*}} = call frozen i32 bitcast {{.*}} @"\01-[Root getInt]" + // CHECK: %{{[^ ]*}} = call frozen i32 bitcast {{.*}} @"\01-[Root intProperty]" + // CHECK: %{{[^ ]*}} = call frozen i32 bitcast {{.*}} @"\01-[Root intProperty2]" return [r getInt] + [r intProperty] + [r intProperty2]; } int useFoo(Foo *f) { - // CHECK-LABEL: define i32 @useFoo + // CHECK-LABEL: define frozen i32 @useFoo // CHECK: call void bitcast {{.*}} @"\01-[Foo setGetDynamic_setDirect:]" - // CHECK: %{{[^ ]*}} = call i32 bitcast {{.*}} @"\01-[Foo getDirect_setDynamic]" - // CHECK: %{{[^ ]*}} = call i32 bitcast {{.*}} @"\01-[Foo directMethodInExtension]" - // CHECK: %{{[^ ]*}} = call i32 bitcast {{.*}} @"\01-[Foo directMethodInCategory]" - // CHECK: %{{[^ ]*}} = call i32 bitcast {{.*}} @"\01-[Foo directMethodInCategoryNoDecl]" + // CHECK: %{{[^ ]*}} = call frozen i32 bitcast {{.*}} @"\01-[Foo getDirect_setDynamic]" + // CHECK: %{{[^ ]*}} = call frozen i32 bitcast {{.*}} @"\01-[Foo directMethodInExtension]" + // CHECK: %{{[^ ]*}} = call frozen i32 bitcast {{.*}} @"\01-[Foo directMethodInCategory]" + // CHECK: %{{[^ ]*}} = call frozen i32 bitcast {{.*}} @"\01-[Foo directMethodInCategoryNoDecl]" [f setGetDynamic_setDirect:1]; return [f getDirect_setDynamic] + [f directMethodInExtension] + @@ -231,7 +231,7 @@ @end int useRootDeclOnly(RootDeclOnly *r) { - // CHECK-LABEL: define i32 @useRootDeclOnly - // CHECK: %{{[^ ]*}} = call i32 bitcast {{.*}} @"\01-[RootDeclOnly intProperty]" + // CHECK-LABEL: define frozen i32 @useRootDeclOnly + // CHECK: %{{[^ ]*}} = call frozen i32 bitcast {{.*}} @"\01-[RootDeclOnly intProperty]" return [r intProperty]; } diff --git a/clang/test/CodeGenObjC/dot-syntax-1.m b/clang/test/CodeGenObjC/dot-syntax-1.m --- a/clang/test/CodeGenObjC/dot-syntax-1.m +++ b/clang/test/CodeGenObjC/dot-syntax-1.m @@ -241,7 +241,7 @@ // -// FIXME: Two more (thats it?) interesting cases. Method access on +// FIXME: Two more (thats it?) interesting cases. Method access on // getter w/o setter and method access on setter w/o getter. int main() { diff --git a/clang/test/CodeGenObjC/encode-test-6.m b/clang/test/CodeGenObjC/encode-test-6.m --- a/clang/test/CodeGenObjC/encode-test-6.m +++ b/clang/test/CodeGenObjC/encode-test-6.m @@ -62,5 +62,5 @@ return e; } // CHECK: @e = global [2 x i8] c"i\00", align 1 -// CHECK: define i8* @Test() +// CHECK: define frozen i8* @Test() // CHECK: ret i8* getelementptr inbounds ([2 x i8], [2 x i8]* @e, i64 0, i64 0) diff --git a/clang/test/CodeGenObjC/encode-test.m b/clang/test/CodeGenObjC/encode-test.m --- a/clang/test/CodeGenObjC/encode-test.m +++ b/clang/test/CodeGenObjC/encode-test.m @@ -186,7 +186,7 @@ // CHECK-LABEL: @test_strlen( // CHECK: %[[i:.*]] = alloca i32 -// CHECK: %[[call:.*]] = call i32 @strlen +// CHECK: %[[call:.*]] = call frozen i32 @strlen // CHECK: store i32 %[[call]], i32* %[[i]] void test_strlen() { const char array[] = @encode(int); diff --git a/clang/test/CodeGenObjC/exceptions.m b/clang/test/CodeGenObjC/exceptions.m --- a/clang/test/CodeGenObjC/exceptions.m +++ b/clang/test/CodeGenObjC/exceptions.m @@ -40,7 +40,7 @@ // Test that modifications to local variables are respected under // optimization. rdar://problem/8160285 -// CHECK-LABEL: define i32 @f2() +// CHECK-LABEL: define frozen i32 @f2() int f2() { extern void foo(void); @@ -55,14 +55,14 @@ @try { // CHECK: store i32 6, i32* [[X]] x++; - // CHECK-NEXT: call void asm sideeffect "", "*m,*m"(i32* nonnull [[X]] + // CHECK-NEXT: call void asm sideeffect "", "*m,*m"(i32* nonnull [[X]] // CHECK-NEXT: call void @foo() // CHECK-NEXT: call void @objc_exception_try_exit // CHECK-NEXT: [[T:%.*]] = load i32, i32* [[X]] foo(); } @catch (id) { // Landing pad. Note that we elide the re-enter. - // CHECK: call void asm sideeffect "", "=*m,=*m"(i32* nonnull [[X]] + // CHECK: call void asm sideeffect "", "=*m,=*m"(i32* nonnull [[X]] // CHECK-NEXT: call i8* @objc_exception_extract // CHECK-NEXT: [[T1:%.*]] = load i32, i32* [[X]] // CHECK-NEXT: [[T2:%.*]] = add nsw i32 [[T1]], -1 @@ -93,7 +93,7 @@ // CHECK-NEXT: br i1 @try { - // CHECK: call void @f3_helper(i32 0, i32* nonnull [[X]]) + // CHECK: call void @f3_helper(i32 frozen 0, i32* frozen nonnull [[X]]) // CHECK: call void @objc_exception_try_exit( f3_helper(0, &x); } @finally { @@ -101,12 +101,12 @@ // CHECK: call void @objc_exception_try_enter // CHECK: call i32 @_setjmp @try { - // CHECK: call void @f3_helper(i32 1, i32* nonnull [[X]]) + // CHECK: call void @f3_helper(i32 frozen 1, i32* frozen nonnull [[X]]) // CHECK: call void @objc_exception_try_exit( f3_helper(1, &x); } @finally { // CHECK: [[DEST2:%.*]] = phi i1 [ true, {{%.*}} ], [ false, {{%.*}} ] - // CHECK: call void @f3_helper(i32 2, i32* nonnull [[X]]) + // CHECK: call void @f3_helper(i32 frozen 2, i32* frozen nonnull [[X]]) f3_helper(2, &x); // This loop is large enough to dissuade the optimizer from just @@ -123,7 +123,7 @@ // CHECK: [[DEST1]] } - // CHECK: call void @f3_helper(i32 4, i32* nonnull [[X]]) + // CHECK: call void @f3_helper(i32 frozen 4, i32* frozen nonnull [[X]]) // CHECK-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* nonnull [[XPTR]]) // CHECK-NEXT: ret void f3_helper(4, &x); @@ -138,14 +138,14 @@ // CHECK: call void @objc_exception_try_enter([[EXNDATA_T]]* nonnull [[EXNDATA]]) // CHECK: call i32 @_setjmp @try { - // CHECK: call void @f4_help(i32 0) + // CHECK: call void @f4_help(i32 frozen 0) f4_help(0); // The finally cleanup has two threaded entrypoints after optimization: // finally.no-call-exit: Predecessor is when the catch throws. // CHECK: call i8* @objc_exception_extract([[EXNDATA_T]]* nonnull [[EXNDATA]]) - // CHECK-NEXT: call void @f4_help(i32 2) + // CHECK-NEXT: call void @f4_help(i32 frozen 2) // CHECK-NEXT: br label // -> rethrow @@ -155,7 +155,7 @@ // CHECK: phi i8* // CHECK-NEXT: phi i1 // CHECK-NEXT: call void @objc_exception_try_exit([[EXNDATA_T]]* nonnull [[EXNDATA]]) - // CHECK-NEXT: call void @f4_help(i32 2) + // CHECK-NEXT: call void @f4_help(i32 frozen 2) // CHECK-NEXT: br i1 // -> ret, rethrow @@ -171,7 +171,7 @@ // -> finally.call-exit, match } @catch (NSArray *a) { // match: - // CHECK: call void @f4_help(i32 1) + // CHECK: call void @f4_help(i32 frozen 1) // CHECK-NEXT: br label // -> finally.call-exit f4_help(1); diff --git a/clang/test/CodeGenObjC/fp2ret.m b/clang/test/CodeGenObjC/fp2ret.m --- a/clang/test/CodeGenObjC/fp2ret.m +++ b/clang/test/CodeGenObjC/fp2ret.m @@ -17,11 +17,11 @@ // CHECK-X86_32: } // // CHECK-X86_64-LABEL: define void @t0() -// CHECK-X86_64: call { x86_fp80, x86_fp80 } bitcast {{.*}} @objc_msgSend_fp2ret to +// CHECK-X86_64: call frozen { x86_fp80, x86_fp80 } bitcast {{.*}} @objc_msgSend_fp2ret to // CHECK-X86_64: } // // CHECK-ARMV7-LABEL: define void @t0() -// CHECK-ARMV7: call i128 bitcast {{.*}} @objc_msgSend to +// CHECK-ARMV7: call frozen i128 bitcast {{.*}} @objc_msgSend to // CHECK-ARMV7: } void t0() { [(A*)0 complexLongDoubleValue]; diff --git a/clang/test/CodeGenObjC/fpret.m b/clang/test/CodeGenObjC/fpret.m --- a/clang/test/CodeGenObjC/fpret.m +++ b/clang/test/CodeGenObjC/fpret.m @@ -15,21 +15,21 @@ // CHECK-X86_32-LABEL: define void @t0() -// CHECK-X86_32: call float bitcast {{.*}} @objc_msgSend_fpret to -// CHECK-X86_32: call double bitcast {{.*}} @objc_msgSend_fpret to -// CHECK-X86_32: call x86_fp80 bitcast {{.*}} @objc_msgSend_fpret to +// CHECK-X86_32: call frozen float bitcast {{.*}} @objc_msgSend_fpret to +// CHECK-X86_32: call frozen double bitcast {{.*}} @objc_msgSend_fpret to +// CHECK-X86_32: call frozen x86_fp80 bitcast {{.*}} @objc_msgSend_fpret to // CHECK-X86_32: } // // CHECK-X86_64-LABEL: define void @t0() -// CHECK-X86_64: call float bitcast {{.*}} @objc_msgSend to -// CHECK-X86_64: call double bitcast {{.*}} @objc_msgSend to -// CHECK-X86_64: call x86_fp80 bitcast {{.*}} @objc_msgSend_fpret to +// CHECK-X86_64: call frozen float bitcast {{.*}} @objc_msgSend to +// CHECK-X86_64: call frozen double bitcast {{.*}} @objc_msgSend to +// CHECK-X86_64: call frozen x86_fp80 bitcast {{.*}} @objc_msgSend_fpret to // CHECK-X86_64: } // // CHECK-ARMV7-LABEL: define void @t0() -// CHECK-ARMV7: call float bitcast {{.*}} @objc_msgSend to -// CHECK-ARMV7: call double bitcast {{.*}} @objc_msgSend to -// CHECK-ARMV7: call double bitcast {{.*}} @objc_msgSend to +// CHECK-ARMV7: call frozen float bitcast {{.*}} @objc_msgSend to +// CHECK-ARMV7: call frozen double bitcast {{.*}} @objc_msgSend to +// CHECK-ARMV7: call frozen double bitcast {{.*}} @objc_msgSend to // CHECK-ARMV7: } void t0() { [(A*)0 floatValue]; diff --git a/clang/test/CodeGenObjC/fragile-arc.m b/clang/test/CodeGenObjC/fragile-arc.m --- a/clang/test/CodeGenObjC/fragile-arc.m +++ b/clang/test/CodeGenObjC/fragile-arc.m @@ -142,10 +142,10 @@ // CHECK: [[Y:%.*]] = alloca i8*, align 4 // CHECK: call void @objc_exception_try_enter // CHECK: br i1 -// CHECK: call void @checkpoint(i32 0) +// CHECK: call void @checkpoint(i32 frozen 0) // CHECK: call void @objc_exception_try_exit // CHECK: br label -// CHECK: call void @checkpoint(i32 3) +// CHECK: call void @checkpoint(i32 frozen 3) // CHECK: [[EXN:%.*]] = call i8* @objc_exception_extract // CHECK: call i32 @objc_exception_match( // CHECK: br i1 @@ -154,13 +154,13 @@ // CHECK: [[T2:%.*]] = call i8* @llvm.objc.retain(i8* [[T1]]) // CHECK: [[T3:%.*]] = bitcast i8* [[T2]] to [[A]]* // CHECK: store [[A]]* [[T3]], [[A]]** [[X]] -// CHECK: call void @checkpoint(i32 1) +// CHECK: call void @checkpoint(i32 frozen 1) // CHECK: [[T0:%.*]] = bitcast [[A]]** [[X]] to i8** // CHECK: call void @llvm.objc.storeStrong(i8** [[T0]], i8* null) // CHECK: br label // CHECK: [[T0:%.*]] = call i8* @llvm.objc.retain(i8* [[EXN]]) // CHECK: store i8* [[T0]], i8** [[Y]] -// CHECK: call void @checkpoint(i32 2) +// CHECK: call void @checkpoint(i32 frozen 2) // CHECK: call void @llvm.objc.storeStrong(i8** [[Y]], i8* null) extern void checkpoint(int n); void testCatch() { diff --git a/clang/test/CodeGenObjC/gc.m b/clang/test/CodeGenObjC/gc.m --- a/clang/test/CodeGenObjC/gc.m +++ b/clang/test/CodeGenObjC/gc.m @@ -5,9 +5,9 @@ __attribute__((objc_precise_lifetime)) id x = test0_helper(); test0_helper(); // CHECK-LABEL: define void @test0() - // CHECK: [[T0:%.*]] = call i8* @test0_helper() + // CHECK: [[T0:%.*]] = call frozen i8* @test0_helper() // CHECK-NEXT: store i8* [[T0]], i8** [[X:%.*]], align 8 - // CHECK-NEXT: call i8* @test0_helper() + // CHECK-NEXT: call frozen i8* @test0_helper() // CHECK-NEXT: [[T0:%.*]] = load i8*, i8** [[X]], align 8 // CHECK-NEXT: call void asm sideeffect "", "r"(i8* [[T0]]) [[NUW:#[0-9]+]] // CHECK-NEXT: ret void diff --git a/clang/test/CodeGenObjC/getter-property-mismatch.m b/clang/test/CodeGenObjC/getter-property-mismatch.m --- a/clang/test/CodeGenObjC/getter-property-mismatch.m +++ b/clang/test/CodeGenObjC/getter-property-mismatch.m @@ -13,6 +13,6 @@ @synthesize filenamesToServerLocation=_filenamesToServerLocation; @end -// CHECK: [[CALL:%.*]] = tail call i8* @objc_getProperty +// CHECK: [[CALL:%.*]] = tail call frozen i8* @objc_getProperty // CHECK: [[ONE:%.*]] = bitcast i8* [[CALL:%.*]] to [[T1:%.*]]* // CHECK: ret [[T1]]* [[ONE]] diff --git a/clang/test/CodeGenObjC/getter-property-type-mismatch.m b/clang/test/CodeGenObjC/getter-property-type-mismatch.m --- a/clang/test/CodeGenObjC/getter-property-type-mismatch.m +++ b/clang/test/CodeGenObjC/getter-property-type-mismatch.m @@ -29,7 +29,7 @@ @end -// CHECK: define internal [[RET:%.*]]* @"\01-[BPXLAppDelegate arrayOfThings +// CHECK: define internal frozen [[RET:%.*]]* @"\01-[BPXLAppDelegate arrayOfThings // CHECK: [[THREE:%.*]] = bitcast [[OPQ:%.*]]* [[TWO:%.*]] to [[RET]]* // CHECK: ret [[RET]]* [[THREE]] diff --git a/clang/test/CodeGenObjC/gnu-exceptions.m b/clang/test/CodeGenObjC/gnu-exceptions.m --- a/clang/test/CodeGenObjC/gnu-exceptions.m +++ b/clang/test/CodeGenObjC/gnu-exceptions.m @@ -13,14 +13,14 @@ // CHECK: invoke void @opaque() opaque(); - // CHECK: call void @log(i32 1) + // CHECK: call void @log(i32 frozen 1) } @catch (C *c) { // CHECK: landingpad { i8*, i32 } // CHECK-NEXT: catch i8* getelementptr inbounds ([2 x i8], [2 x i8]* @0, i64 0, i64 0) // CHECK: br i1 - // CHECK: call void @log(i32 0) + // CHECK: call void @log(i32 frozen 0) // CHECK: resume // NEW-ABI: objc_begin_catch diff --git a/clang/test/CodeGenObjC/gnustep2-proto.m b/clang/test/CodeGenObjC/gnustep2-proto.m --- a/clang/test/CodeGenObjC/gnustep2-proto.m +++ b/clang/test/CodeGenObjC/gnustep2-proto.m @@ -30,7 +30,7 @@ // Check that we load from the indirection variable on protocol references. -// CHECK: define i8* @x() +// CHECK: define frozen i8* @x() // CHECK: = load // CHECK-SAME: @._OBJC_REF_PROTOCOL_X, align 8 void *x() diff --git a/clang/test/CodeGenObjC/implicit-objc_msgSend.m b/clang/test/CodeGenObjC/implicit-objc_msgSend.m --- a/clang/test/CodeGenObjC/implicit-objc_msgSend.m +++ b/clang/test/CodeGenObjC/implicit-objc_msgSend.m @@ -1,5 +1,5 @@ // RUN: %clang_cc1 -triple x86_64-apple-darwin9 -fobjc-runtime=macosx-fragile-10.5 -emit-llvm -o %t %s -// RUN: grep -F 'declare i8* @objc_msgSend(i8*, i8*, ...)' %t +// RUN: grep -F 'declare frozen i8* @objc_msgSend(i8* frozen, i8* frozen, ...)' %t typedef struct objc_selector *SEL; id f0(id x, SEL s) { diff --git a/clang/test/CodeGenObjC/ivar-invariant.m b/clang/test/CodeGenObjC/ivar-invariant.m --- a/clang/test/CodeGenObjC/ivar-invariant.m +++ b/clang/test/CodeGenObjC/ivar-invariant.m @@ -28,7 +28,7 @@ } @end -// CHECK: define internal i8* @"\01-[Derived init]" +// CHECK: define internal frozen i8* @"\01-[Derived init]" // CHECK: [[IVAR:%.*]] = load i64, i64* @"OBJC_IVAR_$_Derived.member", align 8, !invariant.load void * variant_load_1(int i) { @@ -40,7 +40,7 @@ return ptr; } -// CHECK-LABEL: define i8* @variant_load_1(i32 %i) +// CHECK-LABEL: define frozen i8* @variant_load_1(i32 frozen %i) // CHECK: [[IVAR:%.*]] = load i64, i64* @"OBJC_IVAR_$_Derived.member", align 8{{$}} @interface Container : Derived @end @@ -51,7 +51,7 @@ } @end -// CHECK-LABEL: define internal i8* @"\01-[Container invariant_load_1]" +// CHECK-LABEL: define internal frozen i8* @"\01-[Container invariant_load_1]" // CHECK: [[IVAR:%.*]] = load i64, i64* @"OBJC_IVAR_$_Derived.member", align 8, !invariant.load @interface ForBlock @@ -61,7 +61,7 @@ } @end -// CHECK-LABEL: define internal i8* @block_block_invoke +// CHECK-LABEL: define internal frozen i8* @block_block_invoke // CHECK: load i64, i64* @"OBJC_IVAR_$_ForBlock.foo" id (^block)(ForBlock*) = ^(ForBlock* a) { return a->foo; diff --git a/clang/test/CodeGenObjC/local-static-block.m b/clang/test/CodeGenObjC/local-static-block.m --- a/clang/test/CodeGenObjC/local-static-block.m +++ b/clang/test/CodeGenObjC/local-static-block.m @@ -59,7 +59,7 @@ // CHECK-LABEL: define void @FUNC2( // CHECK: define internal void @_block_invoke{{.*}}( -// CHECK: call void %{{.*}}(i8* bitcast ({ i8**, i32, i32, i8*, %struct.__block_descriptor* }* @__block_literal_global{{.*}} to i8*), i32 %{{.*}}) +// CHECK: call void %{{.*}}(i8* frozen bitcast ({ i8**, i32, i32, i8*, %struct.__block_descriptor* }* @__block_literal_global{{.*}} to i8*), i32 frozen %{{.*}}) void FUNC1() { diff --git a/clang/test/CodeGenObjC/mangle-blocks.m b/clang/test/CodeGenObjC/mangle-blocks.m --- a/clang/test/CodeGenObjC/mangle-blocks.m +++ b/clang/test/CodeGenObjC/mangle-blocks.m @@ -21,8 +21,8 @@ // CHECK: @.str{{.*}} = private unnamed_addr constant {{.*}}, align 1 // CHECK: @.str[[STR1:.*]] = private unnamed_addr constant [7 x i8] c"mangle\00", align 1 -// CHECK: define internal void @"__14-[Test mangle]_block_invoke"(i8* %.block_descriptor) +// CHECK: define internal void @"__14-[Test mangle]_block_invoke"(i8* frozen %.block_descriptor) -// CHECK: define internal void @"__14-[Test mangle]_block_invoke_2"(i8* %.block_descriptor){{.*}}{ -// CHECK: call void @__assert_rtn(i8* getelementptr inbounds ([30 x i8], [30 x i8]* @"__func__.__14-[Test mangle]_block_invoke_2", i32 0, i32 0), i8* getelementptr inbounds {{.*}}, i32 14, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str[[STR1]], i32 0, i32 0)) +// CHECK: define internal void @"__14-[Test mangle]_block_invoke_2"(i8* frozen %.block_descriptor){{.*}}{ +// CHECK: call void @__assert_rtn(i8* frozen getelementptr inbounds ([30 x i8], [30 x i8]* @"__func__.__14-[Test mangle]_block_invoke_2", i32 0, i32 0), i8* frozen getelementptr inbounds {{.*}}, i32 frozen 14, i8* frozen getelementptr inbounds ([7 x i8], [7 x i8]* @.str[[STR1]], i32 0, i32 0)) // CHECK: } diff --git a/clang/test/CodeGenObjC/matrix-type-builtins.m b/clang/test/CodeGenObjC/matrix-type-builtins.m --- a/clang/test/CodeGenObjC/matrix-type-builtins.m +++ b/clang/test/CodeGenObjC/matrix-type-builtins.m @@ -13,7 +13,7 @@ void test_transpose_placeholder_get(DoubleMatrixValue *m, double2x4 *r) { // CHECK-LABEL: define void @test_transpose_placeholder_get( - // CHECK: [[MATRIX:%.*]] = call <8 x double> bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to <8 x double> (i8*, i8*)*)( + // CHECK: [[MATRIX:%.*]] = call frozen <8 x double> bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to <8 x double> (i8*, i8*)*)( // CHECK-NEXT: [[MT:%.*]] = call <8 x double> @llvm.matrix.transpose.v8f64(<8 x double> %call, i32 4, i32 2) // CHECK-NEXT: [[R_ADDR:%.*]] = load [8 x double]*, [8 x double]** %r.addr, align 8 // CHECK-NEXT: [[R_ADDR_C:%.*]] = bitcast [8 x double]* [[R_ADDR]] to <8 x double>* @@ -35,7 +35,7 @@ // CHECK-LABEL: define void @test_transpose_placeholder_set( // CHECK: [[MATRIX:%.*]] = load <12 x i32>, <12 x i32>* {{.*}}, align 4 // CHECK-NEXT: [[MT:%.*]] = call <12 x i32> @llvm.matrix.transpose.v12i32(<12 x i32> [[MATRIX]], i32 4, i32 3) - // CHECK: call void bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to void (i8*, i8*, <12 x i32>)*)(i8* {{.*}}, i8* {{.*}}, <12 x i32> [[MT]]) + // CHECK: call void bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to void (i8*, i8*, <12 x i32>)*)(i8* {{.*}}, i8* {{.*}}, <12 x i32> frozen [[MT]]) // CHECK-NEXT: ret void m.value = __builtin_matrix_transpose(*r); diff --git a/clang/test/CodeGenObjC/matrix-type-operators.m b/clang/test/CodeGenObjC/matrix-type-operators.m --- a/clang/test/CodeGenObjC/matrix-type-operators.m +++ b/clang/test/CodeGenObjC/matrix-type-operators.m @@ -13,14 +13,14 @@ // CHECK-LABEL: @test_index_placeholders( // CHECK-NEXT: entry: // CHECK: [[IV:%.*]] = load %0*, %0** [[IV_ADDR:%.*]], align 8 -// CHECK-NEXT: [[SEL:%.*]] = load i8*, i8** @OBJC_SELECTOR_REFERENCES_, align 8, !invariant.load !7 +// CHECK-NEXT: [[SEL:%.*]] = load i8*, i8** @OBJC_SELECTOR_REFERENCES_, align 8, !invariant.load // CHECK-NEXT: [[IV_PTR:%.*]] = bitcast %0* [[IV]] to i8* -// CHECK-NEXT: [[CALL:%.*]] = call i32 bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to i32 (i8*, i8*)*)(i8* [[IV_PTR]], i8* [[SEL]]) +// CHECK-NEXT: [[CALL:%.*]] = call frozen i32 bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to i32 (i8*, i8*)*)(i8* frozen [[IV_PTR]], i8* frozen [[SEL]]) // CHECK-NEXT: [[CONV:%.*]] = sext i32 [[CALL]] to i64 // CHECK-NEXT: [[IV2:%.*]] = load %0*, %0** [[IV_ADDR]], align 8 -// CHECK-NEXT: [[SEL2:%.*]] = load i8*, i8** @OBJC_SELECTOR_REFERENCES_, align 8, !invariant.load !7 +// CHECK-NEXT: [[SEL2:%.*]] = load i8*, i8** @OBJC_SELECTOR_REFERENCES_, align 8, !invariant.load // CHECK-NEXT: [[IV2_PTR:%.*]] = bitcast %0* [[IV2]] to i8* -// CHECK-NEXT: [[CALL1:%.*]] = call i32 bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to i32 (i8*, i8*)*)(i8* [[IV2_PTR]], i8* [[SEL2]]) +// CHECK-NEXT: [[CALL1:%.*]] = call frozen i32 bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to i32 (i8*, i8*)*)(i8* frozen [[IV2_PTR]], i8* frozen [[SEL2]]) // CHECK-NEXT: [[CONV2:%.*]] = sext i32 [[CALL1]] to i64 // CHECK-NEXT: [[MAT:%.*]] = load <16 x double>, <16 x double>* {{.*}} align 8 // CHECK-NEXT: [[IDX1:%.*]] = mul i64 [[CONV2]], 4 @@ -40,19 +40,19 @@ // CHECK-LABEL: @test_base_and_index_placeholders( // CHECK: [[IV:%.*]] = load %0*, %0** [[IV_ADDR:%.*]], align 8 -// CHECK-NEXT: [[SEL:%.*]] = load i8*, i8** @OBJC_SELECTOR_REFERENCES_, align 8, !invariant.load !7 +// CHECK-NEXT: [[SEL:%.*]] = load i8*, i8** @OBJC_SELECTOR_REFERENCES_, align 8, !invariant.load // CHECK-NEXT: [[IV_PTR:%.*]] = bitcast %0* [[IV]] to i8* -// CHECK-NEXT: [[CALL:%.*]] = call i32 bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to i32 (i8*, i8*)*)(i8* [[IV_PTR]], i8* [[SEL]]) +// CHECK-NEXT: [[CALL:%.*]] = call frozen i32 bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to i32 (i8*, i8*)*)(i8* frozen [[IV_PTR]], i8* frozen [[SEL]]) // CHECK-NEXT: [[CONV:%.*]] = sext i32 [[CALL]] to i64 // CHECK-NEXT: [[IV2:%.*]] = load %0*, %0** [[IV_ADDR]], align 8 -// CHECK-NEXT: [[SEL2:%.*]] = load i8*, i8** @OBJC_SELECTOR_REFERENCES_, align 8, !invariant.load !7 +// CHECK-NEXT: [[SEL2:%.*]] = load i8*, i8** @OBJC_SELECTOR_REFERENCES_, align 8, !invariant.load // CHECK-NEXT: [[IV2_PTR:%.*]] = bitcast %0* [[IV2]] to i8* -// CHECK-NEXT: [[CALL1:%.*]] = call i32 bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to i32 (i8*, i8*)*)(i8* [[IV2_PTR]], i8* [[SEL2]]) +// CHECK-NEXT: [[CALL1:%.*]] = call frozen i32 bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to i32 (i8*, i8*)*)(i8* frozen [[IV2_PTR]], i8* frozen [[SEL2]]) // CHECK-NEXT: [[CONV2:%.*]] = sext i32 [[CALL1]] to i64 // CHECK-NEXT: [[M:%.*]] = load %1*, %1** %m.addr, align 8 -// CHECK-NEXT: [[SEL3:%.*]] = load i8*, i8** @OBJC_SELECTOR_REFERENCES_, align 8, !invariant.load !7 +// CHECK-NEXT: [[SEL3:%.*]] = load i8*, i8** @OBJC_SELECTOR_REFERENCES_, align 8, !invariant.load // CHECK-NEXT: [[M_PTR:%.*]] = bitcast %1* [[M]] to i8* -// CHECK-NEXT: [[MAT:%.*]] = call <16 x double> bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to <16 x double> (i8*, i8*)*)(i8* [[M_PTR]], i8* [[SEL3]]) +// CHECK-NEXT: [[MAT:%.*]] = call frozen <16 x double> bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to <16 x double> (i8*, i8*)*)(i8* frozen [[M_PTR]], i8* frozen [[SEL3]]) // CHECK-NEXT: [[IDX1:%.*]] = mul i64 [[CONV2]], 4 // CHECK-NEXT: [[IDX2:%.*]] = add i64 [[IDX1]], [[CONV]] // CHECK-NEXT: [[MATEXT:%.*]] = extractelement <16 x double> [[MAT]], i64 [[IDX2]] diff --git a/clang/test/CodeGenObjC/mrc-weak.m b/clang/test/CodeGenObjC/mrc-weak.m --- a/clang/test/CodeGenObjC/mrc-weak.m +++ b/clang/test/CodeGenObjC/mrc-weak.m @@ -130,7 +130,7 @@ } // CHECK-LABEL: define void @test7 // CHECK: [[P:%.*]] = alloca [[FOO]]*, -// CHECK: [[T0:%.*]] = call i8* @get_object() +// CHECK: [[T0:%.*]] = call frozen i8* @get_object() // CHECK-NEXT: [[T1:%.*]] = bitcast i8* [[T0]] to [[FOO]]* // CHECK-NEXT: [[T2:%.*]] = bitcast [[FOO]]** [[P]] to i8** // CHECK-NEXT: [[T3:%.*]] = bitcast [[FOO]]* [[T1]] to i8* diff --git a/clang/test/CodeGenObjC/mrr-autorelease.m b/clang/test/CodeGenObjC/mrr-autorelease.m --- a/clang/test/CodeGenObjC/mrr-autorelease.m +++ b/clang/test/CodeGenObjC/mrr-autorelease.m @@ -18,7 +18,7 @@ } @end -// CHECK-NOT: call i8* @objc_getClass -// CHECK: call i8* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend -// CHECK: call i8* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend +// CHECK-NOT: call frozen i8* @objc_getClass +// CHECK: call frozen i8* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend +// CHECK: call frozen i8* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend // CHECK: call void bitcast (i8* (i8*, i8*, ...)* @objc_msgSend diff --git a/clang/test/CodeGenObjC/next-objc-dispatch.m b/clang/test/CodeGenObjC/next-objc-dispatch.m --- a/clang/test/CodeGenObjC/next-objc-dispatch.m +++ b/clang/test/CodeGenObjC/next-objc-dispatch.m @@ -24,7 +24,7 @@ // (2) non-fragile ABI, mixed dispatch // // Note that fragile ABI and non-fragile ABI legacy dispatch are not the same, -// they use some different API calls (objc_msgSendSuper vs objc_msgSendSuper2). +// they use some different API calls (objc_msgSendSuper objc_msgSendSuper2 vs). // CHECK-FRAGILE_LEGACY: ModuleID // CHECK-FRAGILE_LEGACY-NOT: declare i8* @objc_msgSendSuper2_fixup( diff --git a/clang/test/CodeGenObjC/noescape.m b/clang/test/CodeGenObjC/noescape.m --- a/clang/test/CodeGenObjC/noescape.m +++ b/clang/test/CodeGenObjC/noescape.m @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -triple x86_64-apple-darwin -fblocks -emit-llvm -o - %s | FileCheck -check-prefix CHECK -check-prefix CHECK-NOARC %s -// RUN: %clang_cc1 -triple x86_64-apple-darwin -fblocks -emit-llvm -fobjc-arc -o - %s | FileCheck -check-prefix CHECK -check-prefix CHECK-ARC %s +// RUN: %clang_cc1 -disable-frozen-args -triple x86_64-apple-darwin -fblocks -emit-llvm -o - %s | FileCheck -check-prefix CHECK -check-prefix CHECK-NOARC %s +// RUN: %clang_cc1 -disable-frozen-args -triple x86_64-apple-darwin -fblocks -emit-llvm -fobjc-arc -o - %s | FileCheck -check-prefix CHECK -check-prefix CHECK-ARC %s typedef void (^BlockTy)(void); diff --git a/clang/test/CodeGenObjC/nontrivial-c-struct-exception.m b/clang/test/CodeGenObjC/nontrivial-c-struct-exception.m --- a/clang/test/CodeGenObjC/nontrivial-c-struct-exception.m +++ b/clang/test/CodeGenObjC/nontrivial-c-struct-exception.m @@ -26,7 +26,7 @@ // CHECK: landingpad { i8*, i32 } // CHECK: %[[V9:.*]] = bitcast %[[STRUCT_STRONG]]* %[[AGG_TMP]] to i8**{{.*}}, !dbg [[ARTIFICIAL_LOC_1:![0-9]+]] -// CHECK: call void @__destructor_8_s8(i8** %[[V9]]){{.*}}, !dbg [[ARTIFICIAL_LOC_1]] +// CHECK: call void @__destructor_8_s8(i8** frozen %[[V9]]){{.*}}, !dbg [[ARTIFICIAL_LOC_1]] // CHECK: br label // CHECK: resume @@ -44,12 +44,12 @@ // CHECK: call void @genWeak(%[[STRUCT_WEAK]]* sret align 8 %[[AGG_TMP]]) // CHECK: invoke void @genWeak(%[[STRUCT_WEAK]]* sret align 8 %[[AGG_TMP1]]) -// CHECK: call void @calleeWeak(%[[STRUCT_WEAK]]* %[[AGG_TMP]], %[[STRUCT_WEAK]]* %[[AGG_TMP1]]) +// CHECK: call void @calleeWeak(%[[STRUCT_WEAK]]* frozen %[[AGG_TMP]], %[[STRUCT_WEAK]]* frozen %[[AGG_TMP1]]) // CHECK: ret void // CHECK: landingpad { i8*, i32 } // CHECK: %[[V3:.*]] = bitcast %[[STRUCT_WEAK]]* %[[AGG_TMP]] to i8**{{.*}}, !dbg [[ARTIFICIAL_LOC_2:![0-9]+]] -// CHECK: call void @__destructor_8_w8(i8** %[[V3]]){{.*}}, !dbg [[ARTIFICIAL_LOC_2]] +// CHECK: call void @__destructor_8_w8(i8** frozen %[[V3]]){{.*}}, !dbg [[ARTIFICIAL_LOC_2]] // CHECK: br label // CHECK: resume diff --git a/clang/test/CodeGenObjC/nontrivial-c-struct-within-struct-name.m b/clang/test/CodeGenObjC/nontrivial-c-struct-within-struct-name.m --- a/clang/test/CodeGenObjC/nontrivial-c-struct-within-struct-name.m +++ b/clang/test/CodeGenObjC/nontrivial-c-struct-within-struct-name.m @@ -22,21 +22,21 @@ Baz baz = {bar}; } -// CHECK: define linkonce_odr hidden void @__destructor_8_S_S_s0(i8** %[[DST:.*]]) +// CHECK: define linkonce_odr hidden void @__destructor_8_S_S_s0(i8** frozen %[[DST:.*]]) // CHECK: %[[DST_ADDR:.*]] = alloca i8**, align 8 // CHECK: store i8** %[[DST]], i8*** %[[DST_ADDR]], align 8 // CHECK: %[[V0:.*]] = load i8**, i8*** %[[DST_ADDR]], align 8 -// CHECK: call void @__destructor_8_S_s0(i8** %[[V0]]) +// CHECK: call void @__destructor_8_S_s0(i8** frozen %[[V0]]) // CHECK: ret void -// CHECK: define linkonce_odr hidden void @__destructor_8_S_s0(i8** %[[DST:.*]]) +// CHECK: define linkonce_odr hidden void @__destructor_8_S_s0(i8** frozen %[[DST:.*]]) // CHECK: %[[DST_ADDR:.*]] = alloca i8**, align 8 // CHECK: store i8** %[[DST]], i8*** %[[DST_ADDR]], align 8 // CHECK: %[[V0:.*]] = load i8**, i8*** %[[DST_ADDR]], align 8 -// CHECK: call void @__destructor_8_s0(i8** %[[V0]]) +// CHECK: call void @__destructor_8_s0(i8** frozen %[[V0]]) // CHECK: ret void -// CHECK: define linkonce_odr hidden void @__destructor_8_s0(i8** %dst) +// CHECK: define linkonce_odr hidden void @__destructor_8_s0(i8** frozen %dst) // CHECK: %[[DST_ADDR:.*]] = alloca i8**, align 8 // CHECK: store i8** %[[DST]], i8*** %[[DST_ADDR]], align 8 // CHECK: %[[V0:.*]] = load i8**, i8*** %[[DST_ADDR]], align 8 diff --git a/clang/test/CodeGenObjC/nontrivial-struct-param-init.m b/clang/test/CodeGenObjC/nontrivial-struct-param-init.m --- a/clang/test/CodeGenObjC/nontrivial-struct-param-init.m +++ b/clang/test/CodeGenObjC/nontrivial-struct-param-init.m @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -triple i386-apple-watchos6.0-simulator -emit-llvm -fblocks -fobjc-arc -o - %s | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args -triple i386-apple-watchos6.0-simulator -emit-llvm -fblocks -fobjc-arc -o - %s | FileCheck %s // CHECK: %[[STRUCT_S:.*]] = type { i8* } diff --git a/clang/test/CodeGenObjC/ns_consume_null_check.m b/clang/test/CodeGenObjC/ns_consume_null_check.m --- a/clang/test/CodeGenObjC/ns_consume_null_check.m +++ b/clang/test/CodeGenObjC/ns_consume_null_check.m @@ -23,7 +23,7 @@ // CHECK-NEXT: br i1 [[SEVEN]], label [[NULLINIT:%.*]], label [[CALL_LABEL:%.*]] // CHECK: [[FN:%.*]] = load i8*, i8** getelementptr inbounds // CHECK-NEXT: [[EIGHT:%.*]] = bitcast i8* [[FN]] -// CHECK-NEXT: [[CALL:%.*]] = call signext i8 [[EIGHT]] +// CHECK-NEXT: [[CALL:%.*]] = call frozen signext i8 [[EIGHT]] // CHECK-NEXT: br label [[CONT:%.*]] // CHECK: call void @llvm.objc.release(i8* [[FIVE]]) [[NUW:#[0-9]+]] // CHECK-NEXT: br label [[CONT]] @@ -41,7 +41,7 @@ // CHECK-NEXT: [[WEAKOBJ:%.*]] = alloca i8*, align 8 // CHECK-NEXT: [[RESULT:%.*]] = alloca { float, float }, align 4 // Various initializations. -// CHECK: [[T0:%.*]] = call i8* bitcast ( +// CHECK: [[T0:%.*]] = call frozen i8* bitcast ( // CHECK-NEXT: store i8* [[T0]], i8** [[OBJ]] // CHECK-NEXT: [[T0:%.*]] = load i8*, i8** [[OBJ]] // CHECK-NEXT: call i8* @llvm.objc.initWeak(i8** [[WEAKOBJ]], i8* [[T0]]) [[NUW]] @@ -55,7 +55,7 @@ // CHECK-NEXT: [[T0:%.*]] = icmp eq i8* [[SELF]], null // CHECK-NEXT: br i1 [[T0]], label [[FORNULL:%.*]], label [[FORCALL:%.*]] // Invoke and produce the return values. -// CHECK: [[CALL:%.*]] = invoke <2 x float> bitcast +// CHECK: [[CALL:%.*]] = invoke frozen <2 x float> bitcast // CHECK-NEXT: to label [[INVOKE_CONT:%.*]] unwind label {{%.*}} // CHECK: [[T0:%.*]] = bitcast { float, float }* [[COERCE:%.*]] to <2 x float>* // CHECK-NEXT: store <2 x float> [[CALL]], <2 x float>* [[T0]], diff --git a/clang/test/CodeGenObjC/nsvalue-objc-boxable-ios-arc.m b/clang/test/CodeGenObjC/nsvalue-objc-boxable-ios-arc.m --- a/clang/test/CodeGenObjC/nsvalue-objc-boxable-ios-arc.m +++ b/clang/test/CodeGenObjC/nsvalue-objc-boxable-ios-arc.m @@ -24,7 +24,7 @@ // CHECK: [[SEL:%.*]] = load i8*, i8** [[VALUE_SEL]] // CHECK: [[RECV:%.*]] = bitcast %struct._class_t* [[RECV_PTR]] to i8* NSRange ns_range = { .location = 0, .length = 42 }; - // CHECK: call {{.*objc_msgSend.*}}(i8* [[RECV]], i8* [[SEL]], i8* [[PARAM_CAST]], i8* {{.*}}[[RANGE_STR]]{{.*}}) + // CHECK: call {{.*objc_msgSend.*}}(i8* frozen [[RECV]], i8* frozen [[SEL]], i8* frozen [[PARAM_CAST]], i8* {{.*}}[[RANGE_STR]]{{.*}}) // CHECK: call i8* @llvm.objc.retainAutoreleasedReturnValue NSValue *range = @(ns_range); // CHECK: call void @llvm.objc.release @@ -43,7 +43,7 @@ // CHECK: [[SEL:%.*]] = load i8*, i8** [[VALUE_SEL]] // CHECK: [[RECV:%.*]] = bitcast %struct._class_t* [[RECV_PTR]] to i8* CGPoint cg_point = { .x = 42, .y = 24 }; - // CHECK: call {{.*objc_msgSend.*}}(i8* [[RECV]], i8* [[SEL]], i8* [[PARAM_CAST]], i8* {{.*}}[[POINT_STR]]{{.*}}) + // CHECK: call {{.*objc_msgSend.*}}(i8* frozen [[RECV]], i8* frozen [[SEL]], i8* frozen [[PARAM_CAST]], i8* {{.*}}[[POINT_STR]]{{.*}}) // CHECK: call i8* @llvm.objc.retainAutoreleasedReturnValue NSValue *point = @(cg_point); // CHECK: call void @llvm.objc.release @@ -62,7 +62,7 @@ // CHECK: [[SEL:%.*]] = load i8*, i8** [[VALUE_SEL]] // CHECK: [[RECV:%.*]] = bitcast %struct._class_t* [[RECV_PTR]] to i8* CGSize cg_size = { .width = 42, .height = 24 }; - // CHECK: call {{.*objc_msgSend.*}}(i8* [[RECV]], i8* [[SEL]], i8* [[PARAM_CAST]], i8* {{.*}}[[SIZE_STR]]{{.*}}) + // CHECK: call {{.*objc_msgSend.*}}(i8* frozen [[RECV]], i8* frozen [[SEL]], i8* frozen [[PARAM_CAST]], i8* {{.*}}[[SIZE_STR]]{{.*}}) // CHECK: call i8* @llvm.objc.retainAutoreleasedReturnValue NSValue *size = @(cg_size); // CHECK: call void @llvm.objc.release @@ -83,7 +83,7 @@ CGPoint cg_point = { .x = 42, .y = 24 }; CGSize cg_size = { .width = 42, .height = 24 }; CGRect cg_rect = { .origin = cg_point, .size = cg_size }; - // CHECK: call {{.*objc_msgSend.*}}(i8* [[RECV]], i8* [[SEL]], i8* [[PARAM_CAST]], i8*{{.*}}[[RECT_STR]]{{.*}}) + // CHECK: call {{.*objc_msgSend.*}}(i8* frozen [[RECV]], i8* frozen [[SEL]], i8* frozen [[PARAM_CAST]], i8*{{.*}}[[RECT_STR]]{{.*}}) // CHECK: call i8* @llvm.objc.retainAutoreleasedReturnValue NSValue *rect = @(cg_rect); // CHECK: call void @llvm.objc.release @@ -102,7 +102,7 @@ // CHECK: [[SEL:%.*]] = load i8*, i8** [[VALUE_SEL]] // CHECK: [[RECV:%.*]] = bitcast %struct._class_t* [[RECV_PTR]] to i8* NSEdgeInsets ns_edge_insets; - // CHECK: call {{.*objc_msgSend.*}}(i8* [[RECV]], i8* [[SEL]], i8* [[PARAM_CAST]], i8*{{.*}}[[EDGE_STR]]{{.*}}) + // CHECK: call {{.*objc_msgSend.*}}(i8* frozen [[RECV]], i8* frozen [[SEL]], i8* frozen [[PARAM_CAST]], i8*{{.*}}[[EDGE_STR]]{{.*}}) // CHECK: call i8* @llvm.objc.retainAutoreleasedReturnValue NSValue *edge_insets = @(ns_edge_insets); // CHECK: call void @llvm.objc.release @@ -117,7 +117,7 @@ // CHECK: [[COERCE_CAST:%.*]] = bitcast %struct._NSRange* [[COERCE]]{{.*}} // CHECK: [[SEL:%.*]] = load i8*, i8** [[VALUE_SEL]] // CHECK: [[RECV:%.*]] = bitcast %struct._class_t* [[RECV_PTR]] to i8* - // CHECK: call {{.*objc_msgSend.*}}(i8* [[RECV]], i8* [[SEL]], i8* [[COERCE_CAST]], i8* {{.*}}[[RANGE_STR]]{{.*}}) + // CHECK: call {{.*objc_msgSend.*}}(i8* frozen [[RECV]], i8* frozen [[SEL]], i8* frozen [[COERCE_CAST]], i8* {{.*}}[[RANGE_STR]]{{.*}}) // CHECK: call i8* @llvm.objc.retainAutoreleasedReturnValue NSValue *range_rvalue = @(getRange()); // CHECK: call void @llvm.objc.release diff --git a/clang/test/CodeGenObjC/nsvalue-objc-boxable-ios.m b/clang/test/CodeGenObjC/nsvalue-objc-boxable-ios.m --- a/clang/test/CodeGenObjC/nsvalue-objc-boxable-ios.m +++ b/clang/test/CodeGenObjC/nsvalue-objc-boxable-ios.m @@ -24,7 +24,7 @@ // CHECK: [[SEL:%.*]] = load i8*, i8** [[VALUE_SEL]] // CHECK: [[RECV:%.*]] = bitcast %struct._class_t* [[RECV_PTR]] to i8* NSRange ns_range = { .location = 0, .length = 42 }; - // CHECK: call {{.*objc_msgSend.*}}(i8* [[RECV]], i8* [[SEL]], i8* [[PARAM_CAST]], i8* {{.*}}[[RANGE_STR]]{{.*}}) + // CHECK: call {{.*objc_msgSend.*}}(i8* frozen [[RECV]], i8* frozen [[SEL]], i8* frozen [[PARAM_CAST]], i8* {{.*}}[[RANGE_STR]]{{.*}}) NSValue *range = @(ns_range); // CHECK: ret void } @@ -41,7 +41,7 @@ // CHECK: [[SEL:%.*]] = load i8*, i8** [[VALUE_SEL]] // CHECK: [[RECV:%.*]] = bitcast %struct._class_t* [[RECV_PTR]] to i8* CGPoint cg_point = { .x = 42, .y = 24 }; - // CHECK: call {{.*objc_msgSend.*}}(i8* [[RECV]], i8* [[SEL]], i8* [[PARAM_CAST]], i8* {{.*}}[[POINT_STR]]{{.*}}) + // CHECK: call {{.*objc_msgSend.*}}(i8* frozen [[RECV]], i8* frozen [[SEL]], i8* frozen [[PARAM_CAST]], i8* {{.*}}[[POINT_STR]]{{.*}}) NSValue *point = @(cg_point); // CHECK: ret void } @@ -58,7 +58,7 @@ // CHECK: [[SEL:%.*]] = load i8*, i8** [[VALUE_SEL]] // CHECK: [[RECV:%.*]] = bitcast %struct._class_t* [[RECV_PTR]] to i8* CGSize cg_size = { .width = 42, .height = 24 }; - // CHECK: call {{.*objc_msgSend.*}}(i8* [[RECV]], i8* [[SEL]], i8* [[PARAM_CAST]], i8* {{.*}}[[SIZE_STR]]{{.*}}) + // CHECK: call {{.*objc_msgSend.*}}(i8* frozen [[RECV]], i8* frozen [[SEL]], i8* frozen [[PARAM_CAST]], i8* {{.*}}[[SIZE_STR]]{{.*}}) NSValue *size = @(cg_size); // CHECK: ret void } @@ -77,7 +77,7 @@ CGPoint cg_point = { .x = 42, .y = 24 }; CGSize cg_size = { .width = 42, .height = 24 }; CGRect cg_rect = { .origin = cg_point, .size = cg_size }; - // CHECK: call {{.*objc_msgSend.*}}(i8* [[RECV]], i8* [[SEL]], i8* [[PARAM_CAST]], i8*{{.*}}[[RECT_STR]]{{.*}}) + // CHECK: call {{.*objc_msgSend.*}}(i8* frozen [[RECV]], i8* frozen [[SEL]], i8* frozen [[PARAM_CAST]], i8*{{.*}}[[RECT_STR]]{{.*}}) NSValue *rect = @(cg_rect); // CHECK: ret void } @@ -94,7 +94,7 @@ // CHECK: [[SEL:%.*]] = load i8*, i8** [[VALUE_SEL]] // CHECK: [[RECV:%.*]] = bitcast %struct._class_t* [[RECV_PTR]] to i8* NSEdgeInsets ns_edge_insets; - // CHECK: call {{.*objc_msgSend.*}}(i8* [[RECV]], i8* [[SEL]], i8* [[PARAM_CAST]], i8*{{.*}}[[EDGE_STR]]{{.*}}) + // CHECK: call {{.*objc_msgSend.*}}(i8* frozen [[RECV]], i8* frozen [[SEL]], i8* frozen [[PARAM_CAST]], i8*{{.*}}[[EDGE_STR]]{{.*}}) NSValue *edge_insets = @(ns_edge_insets); // CHECK: ret void } @@ -107,7 +107,7 @@ // CHECK: [[COERCE_CAST:%.*]] = bitcast %struct._NSRange* [[COERCE]]{{.*}} // CHECK: [[SEL:%.*]] = load i8*, i8** [[VALUE_SEL]] // CHECK: [[RECV:%.*]] = bitcast %struct._class_t* [[RECV_PTR]] to i8* - // CHECK: call {{.*objc_msgSend.*}}(i8* [[RECV]], i8* [[SEL]], i8* [[COERCE_CAST]], i8* {{.*}}[[RANGE_STR]]{{.*}}) + // CHECK: call {{.*objc_msgSend.*}}(i8* frozen [[RECV]], i8* frozen [[SEL]], i8* frozen [[COERCE_CAST]], i8* {{.*}}[[RANGE_STR]]{{.*}}) NSValue *range_rvalue = @(getRange()); // CHECK: ret void } diff --git a/clang/test/CodeGenObjC/nsvalue-objc-boxable-mac-arc.m b/clang/test/CodeGenObjC/nsvalue-objc-boxable-mac-arc.m --- a/clang/test/CodeGenObjC/nsvalue-objc-boxable-mac-arc.m +++ b/clang/test/CodeGenObjC/nsvalue-objc-boxable-mac-arc.m @@ -24,7 +24,7 @@ // CHECK: [[SEL:%.*]] = load i8*, i8** [[VALUE_SEL]] // CHECK: [[RECV:%.*]] = bitcast %struct._class_t* [[RECV_PTR]] to i8* NSRange ns_range = { .location = 0, .length = 42 }; - // CHECK: call {{.*objc_msgSend.*}}(i8* [[RECV]], i8* [[SEL]], i8* [[PARAM_CAST]], i8* {{.*}}[[RANGE_STR]]{{.*}}) + // CHECK: call {{.*objc_msgSend.*}}(i8* frozen [[RECV]], i8* frozen [[SEL]], i8* frozen [[PARAM_CAST]], i8* {{.*}}[[RANGE_STR]]{{.*}}) // CHECK: call i8* @llvm.objc.retainAutoreleasedReturnValue NSValue *range = @(ns_range); // CHECK: call void @llvm.objc.release @@ -43,7 +43,7 @@ // CHECK: [[SEL:%.*]] = load i8*, i8** [[VALUE_SEL]] // CHECK: [[RECV:%.*]] = bitcast %struct._class_t* [[RECV_PTR]] to i8* NSPoint ns_point = { .x = 42, .y = 24 }; - // CHECK: call {{.*objc_msgSend.*}}(i8* [[RECV]], i8* [[SEL]], i8* [[PARAM_CAST]], i8* {{.*}}[[POINT_STR]]{{.*}}) + // CHECK: call {{.*objc_msgSend.*}}(i8* frozen [[RECV]], i8* frozen [[SEL]], i8* frozen [[PARAM_CAST]], i8* {{.*}}[[POINT_STR]]{{.*}}) // CHECK: call i8* @llvm.objc.retainAutoreleasedReturnValue NSValue *point = @(ns_point); // CHECK: call void @llvm.objc.release @@ -62,7 +62,7 @@ // CHECK: [[SEL:%.*]] = load i8*, i8** [[VALUE_SEL]] // CHECK: [[RECV:%.*]] = bitcast %struct._class_t* [[RECV_PTR]] to i8* NSSize ns_size = { .width = 42, .height = 24 }; - // CHECK: call {{.*objc_msgSend.*}}(i8* [[RECV]], i8* [[SEL]], i8* [[PARAM_CAST]], i8* {{.*}}[[SIZE_STR]]{{.*}}) + // CHECK: call {{.*objc_msgSend.*}}(i8* frozen [[RECV]], i8* frozen [[SEL]], i8* frozen [[PARAM_CAST]], i8* {{.*}}[[SIZE_STR]]{{.*}}) // CHECK: call i8* @llvm.objc.retainAutoreleasedReturnValue NSValue *size = @(ns_size); // CHECK: call void @llvm.objc.release @@ -83,7 +83,7 @@ NSPoint ns_point = { .x = 42, .y = 24 }; NSSize ns_size = { .width = 42, .height = 24 }; NSRect ns_rect = { .origin = ns_point, .size = ns_size }; - // CHECK: call {{.*objc_msgSend.*}}(i8* [[RECV]], i8* [[SEL]], i8* [[PARAM_CAST]], i8*{{.*}}[[RECT_STR]]{{.*}}) + // CHECK: call {{.*objc_msgSend.*}}(i8* frozen [[RECV]], i8* frozen [[SEL]], i8* frozen [[PARAM_CAST]], i8*{{.*}}[[RECT_STR]]{{.*}}) // CHECK: call i8* @llvm.objc.retainAutoreleasedReturnValue NSValue *rect = @(ns_rect); // CHECK: call void @llvm.objc.release @@ -102,7 +102,7 @@ // CHECK: [[SEL:%.*]] = load i8*, i8** [[VALUE_SEL]] // CHECK: [[RECV:%.*]] = bitcast %struct._class_t* [[RECV_PTR]] to i8* NSEdgeInsets ns_edge_insets; - // CHECK: call {{.*objc_msgSend.*}}(i8* [[RECV]], i8* [[SEL]], i8* [[PARAM_CAST]], i8*{{.*}}[[EDGE_STR]]{{.*}}) + // CHECK: call {{.*objc_msgSend.*}}(i8* frozen [[RECV]], i8* frozen [[SEL]], i8* frozen [[PARAM_CAST]], i8*{{.*}}[[EDGE_STR]]{{.*}}) // CHECK: call i8* @llvm.objc.retainAutoreleasedReturnValue NSValue *edge_insets = @(ns_edge_insets); // CHECK: call void @llvm.objc.release @@ -121,7 +121,7 @@ // CHECK: [[COERCE_CAST:%.*]] = bitcast %struct._NSRange* [[COERCE]]{{.*}} // CHECK: [[SEL:%.*]] = load i8*, i8** [[VALUE_SEL]] // CHECK: [[RECV:%.*]] = bitcast %struct._class_t* [[RECV_PTR]] to i8* - // CHECK: call {{.*objc_msgSend.*}}(i8* [[RECV]], i8* [[SEL]], i8* [[COERCE_CAST]], i8* {{.*}}[[RANGE_STR]]{{.*}}) + // CHECK: call {{.*objc_msgSend.*}}(i8* frozen [[RECV]], i8* frozen [[SEL]], i8* frozen [[COERCE_CAST]], i8* {{.*}}[[RANGE_STR]]{{.*}}) // CHECK: call i8* @llvm.objc.retainAutoreleasedReturnValue NSValue *range_rvalue = @(getRange()); // CHECK: call void @llvm.objc.release diff --git a/clang/test/CodeGenObjC/nsvalue-objc-boxable-mac.m b/clang/test/CodeGenObjC/nsvalue-objc-boxable-mac.m --- a/clang/test/CodeGenObjC/nsvalue-objc-boxable-mac.m +++ b/clang/test/CodeGenObjC/nsvalue-objc-boxable-mac.m @@ -24,7 +24,7 @@ // CHECK: [[SEL:%.*]] = load i8*, i8** [[VALUE_SEL]] // CHECK: [[RECV:%.*]] = bitcast %struct._class_t* [[RECV_PTR]] to i8* NSRange ns_range = { .location = 0, .length = 42 }; - // CHECK: call {{.*objc_msgSend.*}}(i8* [[RECV]], i8* [[SEL]], i8* [[PARAM_CAST]], i8* {{.*}}[[RANGE_STR]]{{.*}}) + // CHECK: call {{.*objc_msgSend.*}}(i8* frozen [[RECV]], i8* frozen [[SEL]], i8* frozen [[PARAM_CAST]], i8* {{.*}}[[RANGE_STR]]{{.*}}) NSValue *range = @(ns_range); // CHECK: ret void } @@ -41,7 +41,7 @@ // CHECK: [[SEL:%.*]] = load i8*, i8** [[VALUE_SEL]] // CHECK: [[RECV:%.*]] = bitcast %struct._class_t* [[RECV_PTR]] to i8* NSPoint ns_point = { .x = 42, .y = 24 }; - // CHECK: call {{.*objc_msgSend.*}}(i8* [[RECV]], i8* [[SEL]], i8* [[PARAM_CAST]], i8* {{.*}}[[POINT_STR]]{{.*}}) + // CHECK: call {{.*objc_msgSend.*}}(i8* frozen [[RECV]], i8* frozen [[SEL]], i8* frozen [[PARAM_CAST]], i8* {{.*}}[[POINT_STR]]{{.*}}) NSValue *point = @(ns_point); // CHECK: ret void } @@ -58,7 +58,7 @@ // CHECK: [[SEL:%.*]] = load i8*, i8** [[VALUE_SEL]] // CHECK: [[RECV:%.*]] = bitcast %struct._class_t* [[RECV_PTR]] to i8* NSSize ns_size = { .width = 42, .height = 24 }; - // CHECK: call {{.*objc_msgSend.*}}(i8* [[RECV]], i8* [[SEL]], i8* [[PARAM_CAST]], i8* {{.*}}[[SIZE_STR]]{{.*}}) + // CHECK: call {{.*objc_msgSend.*}}(i8* frozen [[RECV]], i8* frozen [[SEL]], i8* frozen [[PARAM_CAST]], i8* {{.*}}[[SIZE_STR]]{{.*}}) NSValue *size = @(ns_size); // CHECK: ret void } @@ -77,7 +77,7 @@ NSPoint ns_point = { .x = 42, .y = 24 }; NSSize ns_size = { .width = 42, .height = 24 }; NSRect ns_rect = { .origin = ns_point, .size = ns_size }; - // CHECK: call {{.*objc_msgSend.*}}(i8* [[RECV]], i8* [[SEL]], i8* [[PARAM_CAST]], i8*{{.*}}[[RECT_STR]]{{.*}}) + // CHECK: call {{.*objc_msgSend.*}}(i8* frozen [[RECV]], i8* frozen [[SEL]], i8* frozen [[PARAM_CAST]], i8*{{.*}}[[RECT_STR]]{{.*}}) NSValue *rect = @(ns_rect); // CHECK: ret void } @@ -94,7 +94,7 @@ // CHECK: [[SEL:%.*]] = load i8*, i8** [[VALUE_SEL]] // CHECK: [[RECV:%.*]] = bitcast %struct._class_t* [[RECV_PTR]] to i8* NSEdgeInsets ns_edge_insets; - // CHECK: call {{.*objc_msgSend.*}}(i8* [[RECV]], i8* [[SEL]], i8* [[PARAM_CAST]], i8*{{.*}}[[EDGE_STR]]{{.*}}) + // CHECK: call {{.*objc_msgSend.*}}(i8* frozen [[RECV]], i8* frozen [[SEL]], i8* frozen [[PARAM_CAST]], i8*{{.*}}[[EDGE_STR]]{{.*}}) NSValue *edge_insets = @(ns_edge_insets); // CHECK: ret void } @@ -111,7 +111,7 @@ // CHECK: [[COERCE_CAST:%.*]] = bitcast %struct._NSRange* [[COERCE]]{{.*}} // CHECK: [[SEL:%.*]] = load i8*, i8** [[VALUE_SEL]] // CHECK: [[RECV:%.*]] = bitcast %struct._class_t* [[RECV_PTR]] to i8* - // CHECK: call {{.*objc_msgSend.*}}(i8* [[RECV]], i8* [[SEL]], i8* [[COERCE_CAST]], i8* {{.*}}[[RANGE_STR]]{{.*}}) + // CHECK: call {{.*objc_msgSend.*}}(i8* frozen [[RECV]], i8* frozen [[SEL]], i8* frozen [[COERCE_CAST]], i8* {{.*}}[[RANGE_STR]]{{.*}}) NSValue *range_rvalue = @(getRange()); // CHECK: ret void } diff --git a/clang/test/CodeGenObjC/objc-arc-container-subscripting.m b/clang/test/CodeGenObjC/objc-arc-container-subscripting.m --- a/clang/test/CodeGenObjC/objc-arc-container-subscripting.m +++ b/clang/test/CodeGenObjC/objc-arc-container-subscripting.m @@ -11,7 +11,7 @@ return array[3]; } -// CHECK: [[call:%.*]] = call i8* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend +// CHECK: [[call:%.*]] = call frozen i8* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend // CHECK: [[SIX:%.*]] = notail call i8* @llvm.objc.retainAutoreleasedReturnValue(i8* [[call]]) [[NUW:#[0-9]+]] // CHECK: [[ARRAY_CASTED:%.*]] = bitcast %0** {{%.*}} to i8** // CHECK: call void @llvm.objc.storeStrong(i8** [[ARRAY_CASTED]], i8* null) diff --git a/clang/test/CodeGenObjC/objc-asm-attribute-test.m b/clang/test/CodeGenObjC/objc-asm-attribute-test.m --- a/clang/test/CodeGenObjC/objc-asm-attribute-test.m +++ b/clang/test/CodeGenObjC/objc-asm-attribute-test.m @@ -64,5 +64,5 @@ // CHECK: private unnamed_addr constant [50 x i8] c"T@\22\22,&,V_idProtoProp\00" // CHECK: @"OBJC_CLASS_$_foo" = external global %struct._class_t -// CHECK: define internal i8* @"\01-[Message MyMethod]" +// CHECK: define internal frozen i8* @"\01-[Message MyMethod]" // CHECK: [[IVAR:%.*]] = load i64, i64* @"OBJC_IVAR_$_MySecretNamespace.Message.MyIVAR" diff --git a/clang/test/CodeGenObjC/objc-container-subscripting-1.m b/clang/test/CodeGenObjC/objc-container-subscripting-1.m --- a/clang/test/CodeGenObjC/objc-container-subscripting-1.m +++ b/clang/test/CodeGenObjC/objc-container-subscripting-1.m @@ -21,7 +21,7 @@ // CHECK: [[ARR:%.*]] = load {{%.*}} [[array:%.*]], align 8 // CHECK-NEXT: [[SEL:%.*]] = load i8*, i8** @OBJC_SELECTOR_REFERENCES_ // CHECK-NEXT: [[ARRC:%.*]] = bitcast {{%.*}} [[ARR]] to i8* -// CHECK-NEXT: [[CALL:%.*]] = call i8* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to i8* (i8*, i8*, i32)*)(i8* [[ARRC]], i8* [[SEL]], i32 10) +// CHECK-NEXT: [[CALL:%.*]] = call frozen i8* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to i8* (i8*, i8*, i32)*)(i8* frozen [[ARRC]], i8* frozen [[SEL]], i32 frozen 10) // CHECK-NEXT: store i8* [[CALL]], i8** [[OLDOBJ:%.*]], align 8 val = (array[10] = oldObject); @@ -29,7 +29,7 @@ // CHECK-NEXT: [[THREE:%.*]] = load {{%.*}} [[array:%.*]], align 8 // CHECK-NEXT: [[FIVE:%.*]] = load i8*, i8** @OBJC_SELECTOR_REFERENCES_.2 // CHECK-NEXT: [[SIX:%.*]] = bitcast {{%.*}} [[THREE]] to i8* -// CHECK-NEXT: call void bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to void (i8*, i8*, i8*, i32)*)(i8* [[SIX]], i8* [[FIVE]], i8* [[FOUR]], i32 10) +// CHECK-NEXT: call void bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to void (i8*, i8*, i8*, i32)*)(i8* frozen [[SIX]], i8* frozen [[FIVE]], i8* frozen [[FOUR]], i32 frozen 10) // CHECK-NEXT: store i8* [[FOUR]], i8** [[val:%.*]] NSMutableDictionary *dictionary; @@ -40,7 +40,7 @@ // CHECK-NEXT: [[EIGHT:%.*]] = load i8*, i8** [[KEY:%.*]], align 8 // CHECK-NEXT: [[TEN:%.*]] = load i8*, i8** @OBJC_SELECTOR_REFERENCES_.4 // CHECK-NEXT: [[ELEVEN:%.*]] = bitcast {{%.*}} [[SEVEN]] to i8* -// CHECK-NEXT: [[CALL1:%.*]] = call i8* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to i8* (i8*, i8*, i8*)*)(i8* [[ELEVEN]], i8* [[TEN]], i8* [[EIGHT]]) +// CHECK-NEXT: [[CALL1:%.*]] = call frozen i8* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to i8* (i8*, i8*, i8*)*)(i8* frozen [[ELEVEN]], i8* frozen [[TEN]], i8* frozen [[EIGHT]]) // CHECK-NEXT: store i8* [[CALL1]], i8** [[oldObject:%.*]], align 8 @@ -50,7 +50,7 @@ // CHECK-NEXT: [[THIRTEEN:%.*]] = load i8*, i8** [[KEY]], align 8 // CHECK-NEXT: [[SIXTEEN:%.*]] = load i8*, i8** @OBJC_SELECTOR_REFERENCES_.6 // CHECK-NEXT: [[SEVENTEEN:%.*]] = bitcast {{%.*}} [[TWELVE]] to i8* -// CHECK-NEXT: call void bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to void (i8*, i8*, i8*, i8*)*)(i8* [[SEVENTEEN]], i8* [[SIXTEEN]], i8* [[FOURTEEN]], i8* [[THIRTEEN]]) +// CHECK-NEXT: call void bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to void (i8*, i8*, i8*, i8*)*)(i8* frozen [[SEVENTEEN]], i8* frozen [[SIXTEEN]], i8* frozen [[FOURTEEN]], i8* frozen [[THIRTEEN]]) // CHECK-NEXT: store i8* [[FOURTEEN]], i8** [[val:%.*]] } diff --git a/clang/test/CodeGenObjC/objc-literal-tests.m b/clang/test/CodeGenObjC/objc-literal-tests.m --- a/clang/test/CodeGenObjC/objc-literal-tests.m +++ b/clang/test/CodeGenObjC/objc-literal-tests.m @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -x objective-c -triple x86_64-apple-darwin10 -fblocks -emit-llvm %s -o - | FileCheck %s -// RUN: %clang_cc1 -x objective-c++ -triple x86_64-apple-darwin10 -fblocks -emit-llvm %s -o - | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args -x objective-c -triple x86_64-apple-darwin10 -fblocks -emit-llvm %s -o - | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args -x objective-c++ -triple x86_64-apple-darwin10 -fblocks -emit-llvm %s -o - | FileCheck %s // rdar://10111397 #if __has_feature(objc_bool) @@ -53,7 +53,7 @@ id NSUserName(); -// CHECK: define i32 @main() [[NUW:#[0-9]+]] +// CHECK: define frozen i32 @main() [[NUW:#[0-9]+]] int main() { // CHECK: call{{.*}}@objc_msgSend{{.*}}i8 signext 97 NSNumber *aNumber = @'a'; diff --git a/clang/test/CodeGenObjC/objc-non-trivial-struct-nrvo.m b/clang/test/CodeGenObjC/objc-non-trivial-struct-nrvo.m --- a/clang/test/CodeGenObjC/objc-non-trivial-struct-nrvo.m +++ b/clang/test/CodeGenObjC/objc-non-trivial-struct-nrvo.m @@ -23,7 +23,7 @@ // CHECK: define i32 @testTrivial() // CHECK: %[[RETVAL:.*]] = alloca %[[STRUCT_TRIVIAL]], align 4 -// CHECK-NEXT: call void @func0(%[[STRUCT_TRIVIAL]]* %[[RETVAL]]) +// CHECK-NEXT: call void @func0(%[[STRUCT_TRIVIAL]]* frozen %[[RETVAL]]) // CHECK-NOT: memcpy // CHECK: ret i32 % @@ -38,7 +38,7 @@ void func1(TrivialBig *); // CHECK: define void @testTrivialBig(%[[STRUCT_TRIVIALBIG]]* noalias sret align 4 %[[AGG_RESULT:.*]]) -// CHECK: call void @func1(%[[STRUCT_TRIVIALBIG]]* %[[AGG_RESULT]]) +// CHECK: call void @func1(%[[STRUCT_TRIVIALBIG]]* frozen %[[AGG_RESULT]]) // CHECK-NEXT: ret void TrivialBig testTrivialBig(void) { @@ -51,13 +51,13 @@ // CHECK: %[[RETVAL:.*]] = alloca %[[STRUCT_STRONG]], align 8 // CHECK: %[[NRVO:.*]] = alloca i1, align 1 // CHECK: %[[V0:.*]] = bitcast %[[STRUCT_STRONG]]* %[[RETVAL]] to i8** -// CHECK: call void @__default_constructor_8_s0(i8** %[[V0]]) +// CHECK: call void @__default_constructor_8_s0(i8** frozen %[[V0]]) // CHECK: store i1 true, i1* %[[NRVO]], align 1 // CHECK: %[[NRVO_VAL:.*]] = load i1, i1* %[[NRVO]], align 1 // CHECK: br i1 %[[NRVO_VAL]], // CHECK: %[[V1:.*]] = bitcast %[[STRUCT_STRONG]]* %[[RETVAL]] to i8** -// CHECK: call void @__destructor_8_s0(i8** %[[V1]]) +// CHECK: call void @__destructor_8_s0(i8** frozen %[[V1]]) // CHECK: br // CHECK: %[[COERCE_DIVE:.*]] = getelementptr inbounds %[[STRUCT_STRONG]], %[[STRUCT_STRONG]]* %[[RETVAL]], i32 0, i32 0 @@ -72,13 +72,13 @@ // CHECK: define void @testWeak(%[[STRUCT_WEAK]]* noalias sret align 8 %[[AGG_RESULT:.*]]) // CHECK: %[[NRVO:.*]] = alloca i1, align 1 // CHECK: %[[V0:.*]] = bitcast %[[STRUCT_WEAK]]* %[[AGG_RESULT]] to i8** -// CHECK: call void @__default_constructor_8_w0(i8** %[[V0]]) +// CHECK: call void @__default_constructor_8_w0(i8** frozen %[[V0]]) // CHECK: store i1 true, i1* %[[NRVO]], align 1 // CHECK: %[[NRVO_VAL:.*]] = load i1, i1* %[[NRVO]], align 1 // CHECK: br i1 %[[NRVO_VAL]], // CHECK: %[[V1:.*]] = bitcast %[[STRUCT_WEAK]]* %[[AGG_RESULT]] to i8** -// CHECK: call void @__destructor_8_w0(i8** %[[V1]]) +// CHECK: call void @__destructor_8_w0(i8** frozen %[[V1]]) // CHECK: br // CHECK-NOT: call @@ -105,16 +105,16 @@ return b; } -// CHECK: define internal void @"\01-[C1 foo1]"(%[[STRUCT_WEAK]]* noalias sret align 8 %[[AGG_RESULT:.*]], %{{.*}}* %{{.*}}, i8* %{{.*}}) +// CHECK: define internal void @"\01-[C1 foo1]"(%[[STRUCT_WEAK]]* noalias sret align 8 %[[AGG_RESULT:.*]], %{{.*}}* frozen %{{.*}}, i8* frozen %{{.*}}) // CHECK: %[[NRVO:.*]] = alloca i1, align 1 // CHECK: %[[V0:.*]] = bitcast %[[STRUCT_WEAK]]* %[[AGG_RESULT]] to i8** -// CHECK: call void @__default_constructor_8_w0(i8** %[[V0]]) +// CHECK: call void @__default_constructor_8_w0(i8** frozen %[[V0]]) // CHECK: store i1 true, i1* %[[NRVO]], align 1 // CHECK: %[[NRVO_VAL:.*]] = load i1, i1* %[[NRVO]], align 1 // CHECK: br i1 %[[NRVO_VAL]], // CHECK: %[[V1:.*]] = bitcast %[[STRUCT_WEAK]]* %[[AGG_RESULT]] to i8** -// CHECK: call void @__destructor_8_w0(i8** %[[V1]]) +// CHECK: call void @__destructor_8_w0(i8** frozen %[[V1]]) // CHECK: br // CHECK-NOT: call diff --git a/clang/test/CodeGenObjC/objfw.m b/clang/test/CodeGenObjC/objfw.m --- a/clang/test/CodeGenObjC/objfw.m +++ b/clang/test/CodeGenObjC/objfw.m @@ -11,5 +11,5 @@ // CHECK-LABEL: define void @test0() // CHECK: [[T0:%.*]] = call i8* (i8*, i8*, ...)* @objc_msg_lookup(i8* bitcast (i64* @_OBJC_CLASS_Test0 to i8*), // CHECK-NEXT: [[T1:%.*]] = bitcast i8* (i8*, i8*, ...)* [[T0]] to void (i8*, i8*)* -// CHECK-NEXT: call void [[T1]](i8* bitcast (i64* @_OBJC_CLASS_Test0 to i8*), +// CHECK-NEXT: call void [[T1]](i8* frozen bitcast (i64* @_OBJC_CLASS_Test0 to i8*), // CHECK-NEXT: ret void diff --git a/clang/test/CodeGenObjC/optimize-ivar-offset-load.m b/clang/test/CodeGenObjC/optimize-ivar-offset-load.m --- a/clang/test/CodeGenObjC/optimize-ivar-offset-load.m +++ b/clang/test/CodeGenObjC/optimize-ivar-offset-load.m @@ -31,7 +31,7 @@ // CHECK: [[ADDPTR:%.*]] = getelementptr inbounds i8, i8* [[THREE]], i64 [[IVAR]] // CHECK: [[FOUR:%.*]] = bitcast i8* [[ADDPTR]] to i32* // CHECK: [[FIVE:%.*]] = load i32, i32* [[FOUR]], align 4 -// CHECK: call void @foo(i32 [[FIVE]]) +// CHECK: call void @foo(i32 frozen [[FIVE]]) @implementation SampleClass + (SampleClass*) new { return 0; } diff --git a/clang/test/CodeGenObjC/os_log.m b/clang/test/CodeGenObjC/os_log.m --- a/clang/test/CodeGenObjC/os_log.m +++ b/clang/test/CodeGenObjC/os_log.m @@ -26,7 +26,7 @@ // CHECK-O2: %[[V0:.*]] = call i8* @llvm.objc.retain( // CHECK-O2: store i8* %[[V0]], i8** %[[A_ADDR]], align 8, // CHECK-O0: call void @llvm.objc.storeStrong(i8** %[[A_ADDR]], i8* %{{.*}}) -// CHECK: %[[CALL:.*]] = call %{{.*}}* (...) @GenString() +// CHECK: %[[CALL:.*]] = call frozen %{{.*}}* (...) @GenString() // CHECK: %[[V2:.*]] = bitcast %{{.*}}* %[[CALL]] to i8* // CHECK: %[[V3:.*]] = notail call i8* @llvm.objc.retainAutoreleasedReturnValue(i8* %[[V2]]) // CHECK: %[[V4:.*]] = bitcast i8* %[[V3]] to %{{.*}}* @@ -37,10 +37,10 @@ // CHECK: %[[V8:.*]] = ptrtoint %{{.*}}* %[[V7]] to i64 // CHECK: %[[V9:.*]] = load i8*, i8** %[[A_ADDR]], align 8 // CHECK: %[[V10:.*]] = ptrtoint i8* %[[V9]] to i64 -// CHECK: call void @__os_log_helper_1_2_2_8_64_8_64(i8* %{{.*}}, i64 %[[V8]], i64 %[[V10]]) +// CHECK: call void @__os_log_helper_1_2_2_8_64_8_64(i8* frozen %{{.*}}, i64 frozen %[[V8]], i64 frozen %[[V10]]) // CHECK: %[[V11:.*]] = bitcast %{{.*}}* %[[V4]] to i8* // CHECK: call void @llvm.objc.release(i8* %[[V11]]) -// CHECK: call void @os_log_pack_send(i8* %{{.*}}) +// CHECK: call void @os_log_pack_send(i8* frozen %{{.*}}) // CHECK-O2: call void (...) @llvm.objc.clang.arc.use(%{{.*}}* %[[V7]]) // CHECK-O2: %[[V13:.*]] = load %{{.*}}*, %{{.*}}** %[[OS_LOG_ARG]], align 8 // CHECK-O2: %[[V14:.*]] = bitcast %{{.*}}* %[[V13]] to i8* @@ -71,7 +71,7 @@ // CHECK-LABEL: define void @test_builtin_os_log3( // CHECK: alloca i8*, align 8 // CHECK: %[[OS_LOG_ARG:.*]] = alloca i8*, align 8 -// CHECK: %[[CALL:.*]] = call %{{.*}}* (...) @GenString() +// CHECK: %[[CALL:.*]] = call frozen %{{.*}}* (...) @GenString() // CHECK: %[[V1:.*]] = bitcast %{{.*}}* %[[CALL]] to i8* // CHECK: %[[V2:.*]] = notail call i8* @llvm.objc.retainAutoreleasedReturnValue(i8* %[[V1]]) // CHECK: %[[V3:.*]] = bitcast i8* %[[V2]] to %{{.*}}* @@ -79,10 +79,10 @@ // CHECK: %[[V5:.*]] = call i8* @llvm.objc.retain(i8* %[[V4]]) // CHECK: store i8* %[[V5]], i8** %[[OS_LOG_ARG]], align 8 // CHECK: %[[V6:.*]] = ptrtoint i8* %[[V5]] to i64 -// CHECK: call void @__os_log_helper_1_2_1_8_64(i8* %{{.*}}, i64 %[[V6]]) +// CHECK: call void @__os_log_helper_1_2_1_8_64(i8* frozen %{{.*}}, i64 frozen %[[V6]]) // CHECK: %[[V7:.*]] = bitcast %{{.*}}* %[[V3]] to i8* // CHECK: call void @llvm.objc.release(i8* %[[V7]]) -// CHECK: call void @os_log_pack_send(i8* %{{.*}}) +// CHECK: call void @os_log_pack_send(i8* frozen %{{.*}}) // CHECK-O2: call void (...) @llvm.objc.clang.arc.use(i8* %[[V5]]) // CHECK-O2: %[[V9:.*]] = load i8*, i8** %[[OS_LOG_ARG]], align 8 // CHECK-O2: call void @llvm.objc.release(i8* %[[V9]]) @@ -107,10 +107,10 @@ // CHECK: %[[V11:.*]] = call i8* @llvm.objc.retain(i8* %[[V10]]) // CHECK: store i8* %[[V11]], i8** %[[OS_LOG_ARG2]], align 8 // CHECK: %[[V12:.*]] = ptrtoint i8* %[[V11]] to i64 -// CHECK: call void @__os_log_helper_1_2_2_8_64_8_64(i8* %{{.*}}, i64 %[[V6]], i64 %[[V12]]) +// CHECK: call void @__os_log_helper_1_2_2_8_64_8_64(i8* frozen %{{.*}}, i64 frozen %[[V6]], i64 frozen %[[V12]]) // CHECK: call void @llvm.objc.release(i8* %[[V10]]) // CHECK: call void @llvm.objc.release(i8* %[[V4]]) -// CHECK: call void @os_log_pack_send(i8* %{{.*}}) +// CHECK: call void @os_log_pack_send(i8* frozen %{{.*}}) // CHECK-O2: call void (...) @llvm.objc.clang.arc.use(i8* %[[V11]]) // CHECK-O2: %[[V14:.*]] = load i8*, i8** %[[OS_LOG_ARG2]], align 8 // CHECK-O2: call void @llvm.objc.release(i8* %[[V14]]) diff --git a/clang/test/CodeGenObjC/parameterized_classes.m b/clang/test/CodeGenObjC/parameterized_classes.m --- a/clang/test/CodeGenObjC/parameterized_classes.m +++ b/clang/test/CodeGenObjC/parameterized_classes.m @@ -105,7 +105,7 @@ // CHECK: %[[V4:.*]] = load %[[TY]]*, %[[TY]]** %[[D]] // CHECK: store %[[TY]]* %[[V4]], %[[TY]]** %[[TEMP]] // CHECK: %[[V7:.*]] = bitcast %[[TY]]** %[[TEMP]] to i8** -// CHECK: call void bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to void (i8*, i8*, i8**)*)(i8* %{{.*}}, i8* %{{.*}}, i8** %[[V7]]) +// CHECK: call void bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to void (i8*, i8*, i8**)*)(i8* frozen %{{.*}}, i8* frozen %{{.*}}, i8** frozen %[[V7]]) @interface P0 : NSObject - (void)m0:(ObjectType *)first; diff --git a/clang/test/CodeGenObjC/property-array-type.m b/clang/test/CodeGenObjC/property-array-type.m --- a/clang/test/CodeGenObjC/property-array-type.m +++ b/clang/test/CodeGenObjC/property-array-type.m @@ -27,4 +27,4 @@ // CHECK: [[M:%.*]] = getelementptr inbounds %struct._GLKMatrix4, %struct._GLKMatrix4* [[TMP:%.*]], i32 0, i32 0 // CHECK: [[ARRAYDECAY:%.*]] = getelementptr inbounds [16 x float], [16 x float]* [[M]], i64 0, i64 0 // CHECK: [[SIX:%.*]] = load i8*, i8** @OBJC_SELECTOR_REFERENCES -// CHECK: call void bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to void (i8*, i8*, float*)*)(i8* [[SEVEN:%.*]], i8* [[SIX]], float* [[ARRAYDECAY]]) +// CHECK: call void bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to void (i8*, i8*, float*)*)(i8* frozen [[SEVEN:%.*]], i8* frozen [[SIX]], float* frozen [[ARRAYDECAY]]) diff --git a/clang/test/CodeGenObjC/property-atomic-bool.m b/clang/test/CodeGenObjC/property-atomic-bool.m --- a/clang/test/CodeGenObjC/property-atomic-bool.m +++ b/clang/test/CodeGenObjC/property-atomic-bool.m @@ -1,6 +1,6 @@ -// RUN: %clang_cc1 -triple x86_64-apple-macosx10 -emit-llvm -x objective-c %s -o - | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args -triple x86_64-apple-macosx10 -emit-llvm -x objective-c %s -o - | FileCheck %s -// CHECK: define internal zeroext i1 @"\01-[A0 p]"( +// CHECK: define internal frozen zeroext i1 @"\01-[A0 p]"( // CHECK: %[[ATOMIC_LOAD:.*]] = load atomic i8, i8* %{{.*}} seq_cst // CHECK: %[[TOBOOL:.*]] = trunc i8 %[[ATOMIC_LOAD]] to i1 // CHECK: ret i1 %[[TOBOOL]] @@ -9,7 +9,7 @@ // CHECK: store atomic i8 %{{.*}}, i8* %{{.*}} seq_cst // CHECK: ret void -// CHECK: define internal zeroext i1 @"\01-[A1 p]"( +// CHECK: define internal frozen zeroext i1 @"\01-[A1 p]"( // CHECK: %[[ATOMIC_LOAD:.*]] = load atomic i8, i8* %{{.*}} unordered // CHECK: %[[TOBOOL:.*]] = trunc i8 %load to i1 // CHECK: ret i1 %[[TOBOOL]] diff --git a/clang/test/CodeGenObjC/property-ref-cast-to-void.m b/clang/test/CodeGenObjC/property-ref-cast-to-void.m --- a/clang/test/CodeGenObjC/property-ref-cast-to-void.m +++ b/clang/test/CodeGenObjC/property-ref-cast-to-void.m @@ -14,5 +14,5 @@ (void)obj.myGetter; } -// CHECK: call i32 bitcast -// CHECK: call double bitcast +// CHECK: call frozen i32 bitcast +// CHECK: call frozen double bitcast diff --git a/clang/test/CodeGenObjC/property-section-attribute.m b/clang/test/CodeGenObjC/property-section-attribute.m --- a/clang/test/CodeGenObjC/property-section-attribute.m +++ b/clang/test/CodeGenObjC/property-section-attribute.m @@ -9,5 +9,5 @@ @implementation Foo @end -// CHECK: define internal i32 @"\01-[Foo p]"({{.*}} section "__TEXT,foo" { +// CHECK: define internal frozen i32 @"\01-[Foo p]"({{.*}} section "__TEXT,foo" { // CHECK: define internal void @"\01-[Foo setP:]"({{.*}} section "__TEXT,foo" { diff --git a/clang/test/CodeGenObjC/property-type-mismatch.m b/clang/test/CodeGenObjC/property-type-mismatch.m --- a/clang/test/CodeGenObjC/property-type-mismatch.m +++ b/clang/test/CodeGenObjC/property-type-mismatch.m @@ -10,7 +10,7 @@ x.myfo++; } -// CHECK: [[C1:%.*]] = call float bitcast (i8* (i8*, i8*, ...)* @objc_msgSend +// CHECK: [[C1:%.*]] = call frozen float bitcast (i8* (i8*, i8*, ...)* @objc_msgSend // CHECK: [[I:%.*]] = fadd float [[C1]], 1.000000e+00 // CHECK: [[CONV:%.*]] = fptosi float [[I]] to i32 // CHECK: [[T3:%.*]] = load i8*, i8** @OBJC_SELECTOR_REFERENCES_.2 diff --git a/clang/test/CodeGenObjC/property.m b/clang/test/CodeGenObjC/property.m --- a/clang/test/CodeGenObjC/property.m +++ b/clang/test/CodeGenObjC/property.m @@ -57,24 +57,24 @@ // CHECK-LABEL: define void @test2 A *test2_helper(void); void test2() { - // CHECK: [[BASE:%.*]] = call [[A:%.*]]* @test2_helper() + // CHECK: [[BASE:%.*]] = call frozen [[A:%.*]]* @test2_helper() // CHECK-NEXT: [[SEL:%.*]] = load i8*, i8** // CHECK-NEXT: [[BASETMP:%.*]] = bitcast [[A]]* [[BASE]] to i8* - // CHECK-NEXT: [[LD:%.*]] = call i32 bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to i32 (i8*, i8*)*)(i8* [[BASETMP]], i8* [[SEL]]) + // CHECK-NEXT: [[LD:%.*]] = call frozen i32 bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to i32 (i8*, i8*)*)(i8* frozen [[BASETMP]], i8* frozen [[SEL]]) // CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[LD]], 1 // CHECK-NEXT: [[SEL:%.*]] = load i8*, i8** // CHECK-NEXT: [[BASETMP:%.*]] = bitcast [[A]]* [[BASE]] to i8* - // CHECK-NEXT: call void bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to void (i8*, i8*, i32)*)(i8* [[BASETMP]], i8* [[SEL]], i32 [[ADD]]) + // CHECK-NEXT: call void bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to void (i8*, i8*, i32)*)(i8* frozen [[BASETMP]], i8* frozen [[SEL]], i32 frozen [[ADD]]) test2_helper().dyn++; - // CHECK: [[BASE:%.*]] = call [[A]]* @test2_helper() + // CHECK: [[BASE:%.*]] = call frozen [[A]]* @test2_helper() // CHECK-NEXT: [[SEL:%.*]] = load i8*, i8** // CHECK-NEXT: [[BASETMP:%.*]] = bitcast [[A]]* [[BASE]] to i8* - // CHECK-NEXT: [[LD:%.*]] = call i32 bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to i32 (i8*, i8*)*)(i8* [[BASETMP]], i8* [[SEL]]) + // CHECK-NEXT: [[LD:%.*]] = call frozen i32 bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to i32 (i8*, i8*)*)(i8* frozen [[BASETMP]], i8* frozen [[SEL]]) // CHECK-NEXT: [[ADD:%.*]] = mul nsw i32 [[LD]], 10 // CHECK-NEXT: [[SEL:%.*]] = load i8*, i8** // CHECK-NEXT: [[BASETMP:%.*]] = bitcast [[A]]* [[BASE]] to i8* - // CHECK-NEXT: call void bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to void (i8*, i8*, i32)*)(i8* [[BASETMP]], i8* [[SEL]], i32 [[ADD]]) + // CHECK-NEXT: call void bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to void (i8*, i8*, i32)*)(i8* frozen [[BASETMP]], i8* frozen [[SEL]], i32 frozen [[ADD]]) test2_helper().dyn *= 10; } @@ -97,9 +97,9 @@ // CHECK-LABEL: define void @test4 void test4(Test4 *t) { extern int test4_printf(const char *, ...); - // CHECK: [[TMP:%.*]] = call float {{.*}} @objc_msgSend + // CHECK: [[TMP:%.*]] = call frozen float {{.*}} @objc_msgSend // CHECK-NEXT: [[EXT:%.*]] = fpext float [[TMP]] to double - // CHECK-NEXT: call i32 (i8*, ...) @test4_printf(i8* {{.*}}, double [[EXT]]) + // CHECK-NEXT: call frozen i32 (i8*, ...) @test4_printf(i8* {{.*}}, double frozen [[EXT]]) // CHECK-NEXT: ret void test4_printf("%.2f", t.f); } @@ -138,7 +138,7 @@ // CHECK-NEXT: [[T0:%.*]] = load [[TEST7]]*, [[TEST7]]** [[T]], align // CHECK-NEXT: load i8*, i8** @OBJC_SELECTOR_REFERENCES // CHECK-NEXT: [[T1:%.*]] = bitcast [[TEST7]]* [[T0]] to i8* -// CHECK-NEXT: [[T2:%.*]] = call zeroext i8 bitcast +// CHECK-NEXT: [[T2:%.*]] = call frozen zeroext i8 bitcast // CHECK-NEXT: [[T3:%.*]] = zext i8 [[T2]] to i32 // CHECK-NEXT: [[T4:%.*]] = and i32 [[T3]], 2 // CHECK-NEXT: [[T5:%.*]] = trunc i32 [[T4]] to i8 @@ -148,7 +148,7 @@ // CHECK-NEXT: [[T0:%.*]] = load [[TEST7]]*, [[TEST7]]** [[T]], align // CHECK-NEXT: load i8*, i8** @OBJC_SELECTOR_REFERENCES // CHECK-NEXT: [[T1:%.*]] = bitcast [[TEST7]]* [[T0]] to i8* -// CHECK-NEXT: [[T2:%.*]] = call zeroext i8 bitcast +// CHECK-NEXT: [[T2:%.*]] = call frozen zeroext i8 bitcast // CHECK-NEXT: [[T3:%.*]] = zext i8 [[T2]] to i32 // CHECK-NEXT: [[T4:%.*]] = or i32 [[T3]], 5 // CHECK-NEXT: [[T5:%.*]] = trunc i32 [[T4]] to i8 @@ -158,7 +158,7 @@ // CHECK-NEXT: [[T0:%.*]] = load [[TEST7]]*, [[TEST7]]** [[T]], align // CHECK-NEXT: load i8*, i8** @OBJC_SELECTOR_REFERENCES // CHECK-NEXT: [[T1:%.*]] = bitcast [[TEST7]]* [[T0]] to i8* -// CHECK-NEXT: [[T2:%.*]] = call zeroext i8 bitcast +// CHECK-NEXT: [[T2:%.*]] = call frozen zeroext i8 bitcast // CHECK-NEXT: [[T3:%.*]] = zext i8 [[T2]] to i32 // CHECK-NEXT: [[T4:%.*]] = xor i32 [[T3]], 8 // CHECK-NEXT: [[T5:%.*]] = trunc i32 [[T4]] to i8 diff --git a/clang/test/CodeGenObjC/return-objc-object.mm b/clang/test/CodeGenObjC/return-objc-object.mm --- a/clang/test/CodeGenObjC/return-objc-object.mm +++ b/clang/test/CodeGenObjC/return-objc-object.mm @@ -15,5 +15,5 @@ f(); f1(); } -// CHECK: call nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0* @_Z1fv() -// CHECK: call nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0* @_Z2f1v() +// CHECK: call frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0* @_Z1fv() +// CHECK: call frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0* @_Z2f1v() diff --git a/clang/test/CodeGenObjC/stret_lookup.m b/clang/test/CodeGenObjC/stret_lookup.m --- a/clang/test/CodeGenObjC/stret_lookup.m +++ b/clang/test/CodeGenObjC/stret_lookup.m @@ -21,9 +21,8 @@ // HASSTRET-LABEL: define void @test0() // HASSTRET: [[T0:%.*]] = call i8* (i8*, i8*, ...)* @objc_msg_lookup_stret(i8* bitcast (i64* @_OBJC_CLASS_Test0 to i8*), // HASSTRET-NEXT: [[T1:%.*]] = bitcast i8* (i8*, i8*, ...)* [[T0]] to void (%struct.test*, i8*, i8*)* -// HASSTRET-NEXT: call void [[T1]](%struct.test* sret {{.*}}, i8* bitcast (i64* @_OBJC_CLASS_Test0 to i8*), - +// HASSTRET-NEXT: call void [[T1]](%struct.test* sret {{.*}}, i8* frozen bitcast (i64* @_OBJC_CLASS_Test0 to i8*), // NOSTRET-LABEL: define void @test0() // NOSTRET: [[T0:%.*]] = call i8* (i8*, i8*, ...)* @objc_msg_lookup(i8* // NOSTRET-NEXT: [[T1:%.*]] = bitcast i8* (i8*, i8*, ...)* [[T0]] to void (%struct.test*, i8*, i8*)* -// NOSTRET-NEXT: call void [[T1]](%struct.test* sret {{.*}}, i8* {{.*}}, i8* bitcast ([2 x { i8*, i8* }]* +// NOSTRET-NEXT: call void [[T1]](%struct.test* sret {{.*}}, i8* {{.*}}, i8* frozen bitcast ([2 x { i8*, i8* }]* diff --git a/clang/test/CodeGenObjC/strong-in-c-struct.m b/clang/test/CodeGenObjC/strong-in-c-struct.m --- a/clang/test/CodeGenObjC/strong-in-c-struct.m +++ b/clang/test/CodeGenObjC/strong-in-c-struct.m @@ -1,7 +1,7 @@ -// RUN: %clang_cc1 -triple arm64-apple-ios11 -fobjc-arc -fblocks -fobjc-runtime=ios-11.0 -emit-llvm -o - -DUSESTRUCT %s | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args -triple arm64-apple-ios11 -fobjc-arc -fblocks -fobjc-runtime=ios-11.0 -emit-llvm -o - -DUSESTRUCT %s | FileCheck %s -// RUN: %clang_cc1 -triple arm64-apple-ios11 -fobjc-arc -fblocks -fobjc-runtime=ios-11.0 -emit-pch -o %t %s -// RUN: %clang_cc1 -triple arm64-apple-ios11 -fobjc-arc -fblocks -fobjc-runtime=ios-11.0 -include-pch %t -emit-llvm -o - -DUSESTRUCT %s | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args -triple arm64-apple-ios11 -fobjc-arc -fblocks -fobjc-runtime=ios-11.0 -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -triple arm64-apple-ios11 -fobjc-arc -fblocks -fobjc-runtime=ios-11.0 -include-pch %t -emit-llvm -o - -DUSESTRUCT %s | FileCheck %s #ifndef HEADER #define HEADER diff --git a/clang/test/CodeGenObjC/synchronized.m b/clang/test/CodeGenObjC/synchronized.m --- a/clang/test/CodeGenObjC/synchronized.m +++ b/clang/test/CodeGenObjC/synchronized.m @@ -47,7 +47,7 @@ } -// CHECK-LABEL: define i32 @f0( +// CHECK-LABEL: define frozen i32 @f0( int f0(id a) { // TODO: we can optimize the ret to a constant if we can figure out // either that x isn't stored to within the synchronized block or diff --git a/clang/test/CodeGenObjC/tentative-cfconstantstring.m b/clang/test/CodeGenObjC/tentative-cfconstantstring.m --- a/clang/test/CodeGenObjC/tentative-cfconstantstring.m +++ b/clang/test/CodeGenObjC/tentative-cfconstantstring.m @@ -38,5 +38,5 @@ // CHECK: [[ZERO:%.*]] = load %struct._class_t*, %struct._class_t** @"OBJC_CLASSLIST_REFERENCES_ // CHECK-NEXT: [[ONE:%.*]] = load i8*, i8** @OBJC_SELECTOR_REFERENCES_ // CHECK-NEXT: [[TWO:%.*]] = bitcast %struct._class_t* [[ZERO]] to i8* -// CHECK-NEXT: call void (i8*, i8*, [[T:%.*]]*, ...) bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to void (i8*, i8*, [[T:%.*]]*, ...)*)(i8* [[TWO]], i8* [[ONE]], [[T:%.*]]* bitcast (%struct.__NSConstantString_tag* @_unnamed_cfstring_{{.*}} to [[T:%.*]]*)) +// CHECK-NEXT: call void (i8*, i8*, [[T:%.*]]*, ...) bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to void (i8*, i8*, [[T:%.*]]*, ...)*)(i8* frozen [[TWO]], i8* frozen [[ONE]], [[T:%.*]]* frozen bitcast (%struct.__NSConstantString_tag* @_unnamed_cfstring_{{.*}} to [[T:%.*]]*)) // CHECK-NEXT: ret void diff --git a/clang/test/CodeGenObjC/terminate.m b/clang/test/CodeGenObjC/terminate.m --- a/clang/test/CodeGenObjC/terminate.m +++ b/clang/test/CodeGenObjC/terminate.m @@ -12,9 +12,9 @@ // CHECK-WITH-LABEL: define void @test0() // CHECK-WITH-SAME: personality i8* bitcast (i32 (...)* @__gcc_personality_v0 to i8*) // CHECK-WITH: [[PTR:%.*]] = alloca i8*, - // CHECK-WITH: call void @destroy(i8** [[PTR]]) + // CHECK-WITH: call void @destroy(i8** frozen [[PTR]]) // CHECK-WITH-NEXT: ret void - // CHECK-WITH: invoke void @destroy(i8** [[PTR]]) + // CHECK-WITH: invoke void @destroy(i8** frozen [[PTR]]) // CHECK-WITH: landingpad { i8*, i32 } // CHECK-WITH-NEXT: catch i8* null // CHECK-WITH-NEXT: call void @objc_terminate() @@ -22,9 +22,9 @@ // CHECK-WITHOUT-LABEL: define void @test0() // CHECK-WITHOUT-SAME: personality i8* bitcast (i32 (...)* @__gcc_personality_v0 to i8*) // CHECK-WITHOUT: [[PTR:%.*]] = alloca i8*, - // CHECK-WITHOUT: call void @destroy(i8** [[PTR]]) + // CHECK-WITHOUT: call void @destroy(i8** frozen [[PTR]]) // CHECK-WITHOUT-NEXT: ret void - // CHECK-WITHOUT: invoke void @destroy(i8** [[PTR]]) + // CHECK-WITHOUT: invoke void @destroy(i8** frozen [[PTR]]) // CHECK-WITHOUT: landingpad { i8*, i32 } // CHECK-WITHOUT-NEXT: catch i8* null // CHECK-WITHOUT-NEXT: call void @abort() diff --git a/clang/test/CodeGenObjC/ubsan-bool.m b/clang/test/CodeGenObjC/ubsan-bool.m --- a/clang/test/CodeGenObjC/ubsan-bool.m +++ b/clang/test/CodeGenObjC/ubsan-bool.m @@ -42,7 +42,7 @@ @end // Check the synthesized getter. -// OBJC-LABEL: define internal signext i8 @"\01-[I1 b1]" +// OBJC-LABEL: define internal frozen signext i8 @"\01-[I1 b1]" // OBJC: [[IVAR:%.*]] = load i64, i64* @"OBJC_IVAR_$_I1.b1" // OBJC: [[ADDR:%.*]] = getelementptr inbounds i8, i8* {{.*}}, i64 [[IVAR]] // OBJC: [[LOAD:%.*]] = load i8, i8* {{.*}} diff --git a/clang/test/CodeGenObjC/ubsan-nonnull-and-nullability.m b/clang/test/CodeGenObjC/ubsan-nonnull-and-nullability.m --- a/clang/test/CodeGenObjC/ubsan-nonnull-and-nullability.m +++ b/clang/test/CodeGenObjC/ubsan-nonnull-and-nullability.m @@ -4,7 +4,7 @@ // If both the annotation and the attribute are present, prefer the attribute, // since it actually affects IRGen. -// CHECK-LABEL: define nonnull i32* @f1 +// CHECK-LABEL: define frozen nonnull i32* @f1 __attribute__((returns_nonnull)) int *_Nonnull f1(int *_Nonnull p) { // CHECK: entry: // CHECK-NEXT: [[SLOC_PTR:%.*]] = alloca i8* @@ -41,7 +41,7 @@ } // If the return value isn't meant to be checked, make sure we don't check it. -// CHECK-LABEL: define i32* @f3 +// CHECK-LABEL: define frozen i32* @f3 int *f3(int *p) { // CHECK-NOT: return.sloc // CHECK-NOT: call{{.*}}ubsan @@ -51,7 +51,7 @@ // Check for a valid "return" source location, even when there is no return // statement, to avoid accidentally calling the runtime. -// CHECK-LABEL: define nonnull i32* @f4 +// CHECK-LABEL: define frozen nonnull i32* @f4 __attribute__((returns_nonnull)) int *f4() { // CHECK: store i8* null, i8** [[SLOC_PTR:%.*]] // CHECK: [[SLOC:%.*]] = load {{.*}} [[SLOC_PTR]] diff --git a/clang/test/CodeGenObjC/ubsan-nonnull.m b/clang/test/CodeGenObjC/ubsan-nonnull.m --- a/clang/test/CodeGenObjC/ubsan-nonnull.m +++ b/clang/test/CodeGenObjC/ubsan-nonnull.m @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -x objective-c -emit-llvm -triple x86_64-apple-macosx10.10.0 -fsanitize=nonnull-attribute %s -o - -w | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args -x objective-c -emit-llvm -triple x86_64-apple-macosx10.10.0 -fsanitize=nonnull-attribute %s -o - -w | FileCheck %s @interface A diff --git a/clang/test/CodeGenObjC/ubsan-nullability-return-unreachable.m b/clang/test/CodeGenObjC/ubsan-nullability-return-unreachable.m --- a/clang/test/CodeGenObjC/ubsan-nullability-return-unreachable.m +++ b/clang/test/CodeGenObjC/ubsan-nullability-return-unreachable.m @@ -1,6 +1,6 @@ // RUN: %clang_cc1 -fsanitize=nullability-return -emit-llvm %s -o - -triple x86_64-apple-macosx10.10.0 -Wno-objc-root-class | FileCheck %s -// CHECK-LABEL: define internal i8* @"\01-[I init]" +// CHECK-LABEL: define internal frozen i8* @"\01-[I init]" // CHECK: unreachable // CHECK-NEXT: } diff --git a/clang/test/CodeGenObjC/ubsan-nullability.m b/clang/test/CodeGenObjC/ubsan-nullability.m --- a/clang/test/CodeGenObjC/ubsan-nullability.m +++ b/clang/test/CodeGenObjC/ubsan-nullability.m @@ -16,7 +16,7 @@ #define INULL ((int *)NULL) #define INNULL ((int *_Nonnull)NULL) -// CHECK-LABEL: define i32* @{{.*}}nonnull_retval1 +// CHECK-LABEL: define frozen i32* @{{.*}}nonnull_retval1 #line 100 int *_Nonnull nonnull_retval1(int *p) { // CHECK: [[ICMP:%.*]] = icmp ne i32* {{.*}}, null, !nosanitize @@ -94,7 +94,7 @@ int *_Nonnull arr[] = {p, p}; } -// CHECK-LABEL: define i32* @{{.*}}nonnull_retval2 +// CHECK-LABEL: define frozen i32* @{{.*}}nonnull_retval2 #line 800 int *_Nonnull nonnull_retval2(int *_Nonnull arg1, //< Test this. int *_Nonnull arg2, //< Test this. @@ -125,7 +125,7 @@ @implementation A -// CHECK-LABEL: define internal i32* @"\01+[A objc_clsmethod:]" +// CHECK-LABEL: define internal frozen i32* @"\01+[A objc_clsmethod:]" +(int *_Nonnull) objc_clsmethod: (int *_Nonnull) arg1 { // CHECK: [[ARG1CMP:%.*]] = icmp ne i32* %arg1, null, !nosanitize // CHECK-NEXT: [[DO_RV_CHECK:%.*]] = and i1 true, [[ARG1CMP]] @@ -142,7 +142,7 @@ // CHECK-NEXT: ret i32* } -// CHECK-LABEL: define internal i32* @"\01-[A objc_method:]" +// CHECK-LABEL: define internal frozen i32* @"\01-[A objc_method:]" -(int *_Nonnull) objc_method: (int *_Nonnull) arg1 { // CHECK: [[ARG1CMP:%.*]] = icmp ne i32* %arg1, null, !nosanitize // CHECK-NEXT: [[DO_RV_CHECK:%.*]] = and i1 true, [[ARG1CMP]] @@ -165,13 +165,13 @@ // CHECK: [[ICMP:%.*]] = icmp ne i32* [[P1:%.*]], null, !nosanitize // CHECK-NEXT: br i1 [[ICMP]], {{.*}}, !nosanitize // CHECK: call void @__ubsan_handle_nullability_arg{{.*}} !nosanitize - // CHECK: call i32* {{.*}} @objc_msgSend to i32* {{.*}}({{.*}}, i32* [[P1]]) + // CHECK: call frozen i32* {{.*}} @objc_msgSend to i32* {{.*}}({{.*}}, i32* frozen [[P1]]) [a objc_method: p]; // CHECK: [[ICMP:%.*]] = icmp ne i32* [[P2:%.*]], null, !nosanitize // CHECK-NEXT: br i1 [[ICMP]], {{.*}}, !nosanitize // CHECK: call void @__ubsan_handle_nullability_arg{{.*}} !nosanitize - // CHECK: call i32* {{.*}} @objc_msgSend to i32* {{.*}}({{.*}}, i32* [[P2]]) + // CHECK: call frozen i32* {{.*}} @objc_msgSend to i32* {{.*}}({{.*}}, i32* frozen [[P2]]) [A objc_clsmethod: p]; } diff --git a/clang/test/CodeGenObjC/weak-in-c-struct.m b/clang/test/CodeGenObjC/weak-in-c-struct.m --- a/clang/test/CodeGenObjC/weak-in-c-struct.m +++ b/clang/test/CodeGenObjC/weak-in-c-struct.m @@ -18,12 +18,12 @@ // ARM64: define void @test_constructor_destructor_Weak() // ARM64: %[[T:.*]] = alloca %[[STRUCT_WEAK]], align 8 // ARM64: %[[V0:.*]] = bitcast %[[STRUCT_WEAK]]* %[[T]] to i8** -// ARM64: call void @__default_constructor_8_w8(i8** %[[V0]]) +// ARM64: call void @__default_constructor_8_w8(i8** frozen %[[V0]]) // ARM64: %[[V1:.*]] = bitcast %[[STRUCT_WEAK]]* %[[T]] to i8** -// ARM64: call void @__destructor_8_w8(i8** %[[V1]]) +// ARM64: call void @__destructor_8_w8(i8** frozen %[[V1]]) // ARM64: ret void -// ARM64: define linkonce_odr hidden void @__default_constructor_8_w8(i8** %[[DST:.*]]) +// ARM64: define linkonce_odr hidden void @__default_constructor_8_w8(i8** frozen %[[DST:.*]]) // ARM64: %[[DST_ADDR:.*]] = alloca i8**, align 8 // ARM64: store i8** %[[DST]], i8*** %[[DST_ADDR]], align 8 // ARM64: %[[V0:.*]] = load i8**, i8*** %[[DST_ADDR]], align 8 @@ -33,7 +33,7 @@ // ARM64: %[[V4:.*]] = bitcast i8** %[[V3]] to i8* // ARM64: call void @llvm.memset.p0i8.i64(i8* align 8 %[[V4]], i8 0, i64 8, i1 false) -// ARM64: define linkonce_odr hidden void @__destructor_8_w8(i8** %[[DST:.*]]) +// ARM64: define linkonce_odr hidden void @__destructor_8_w8(i8** frozen %[[DST:.*]]) // ARM64: %[[DST_ADDR:.*]] = alloca i8**, align 8 // ARM64: store i8** %[[DST]], i8*** %[[DST_ADDR]], align 8 // ARM64: %[[V0:.*]] = load i8**, i8*** %[[DST_ADDR]], align 8 @@ -46,11 +46,11 @@ Weak t; } -// ARM64: define void @test_copy_constructor_Weak(%[[STRUCT_WEAK]]* %{{.*}}) -// ARM64: call void @__copy_constructor_8_8_t0w4_w8(i8** %{{.*}}, i8** %{{.*}}) -// ARM64: call void @__destructor_8_w8(i8** %{{.*}}) +// ARM64: define void @test_copy_constructor_Weak(%[[STRUCT_WEAK]]* frozen %{{.*}}) +// ARM64: call void @__copy_constructor_8_8_t0w4_w8(i8** frozen %{{.*}}, i8** frozen %{{.*}}) +// ARM64: call void @__destructor_8_w8(i8** frozen %{{.*}}) -// ARM64: define linkonce_odr hidden void @__copy_constructor_8_8_t0w4_w8(i8** %[[DST:.*]], i8** %[[SRC:.*]]) +// ARM64: define linkonce_odr hidden void @__copy_constructor_8_8_t0w4_w8(i8** frozen %[[DST:.*]], i8** frozen %[[SRC:.*]]) // ARM64: %[[DST_ADDR:.*]] = alloca i8**, align 8 // ARM64: %[[SRC_ADDR:.*]] = alloca i8**, align 8 // ARM64: store i8** %[[DST]], i8*** %[[DST_ADDR]], align 8 @@ -73,10 +73,10 @@ Weak t = *s; } -// ARM64: define void @test_copy_assignment_Weak(%[[STRUCT_WEAK]]* %{{.*}}, %[[STRUCT_WEAK]]* %{{.*}}) -// ARM64: call void @__copy_assignment_8_8_t0w4_w8(i8** %{{.*}}, i8** %{{.*}}) +// ARM64: define void @test_copy_assignment_Weak(%[[STRUCT_WEAK]]* frozen %{{.*}}, %[[STRUCT_WEAK]]* frozen %{{.*}}) +// ARM64: call void @__copy_assignment_8_8_t0w4_w8(i8** frozen %{{.*}}, i8** frozen %{{.*}}) -// ARM64: define linkonce_odr hidden void @__copy_assignment_8_8_t0w4_w8(i8** %[[DST:.*]], i8** %[[SRC:.*]]) +// ARM64: define linkonce_odr hidden void @__copy_assignment_8_8_t0w4_w8(i8** frozen %[[DST:.*]], i8** frozen %[[SRC:.*]]) // ARM64: %[[DST_ADDR:.*]] = alloca i8**, align 8 // ARM64: %[[SRC_ADDR:.*]] = alloca i8**, align 8 // ARM64: store i8** %[[DST]], i8*** %[[DST_ADDR]], align 8 @@ -101,10 +101,10 @@ *d = *s; } -// ARM64: define internal void @__Block_byref_object_copy_(i8* %0, i8* %1) -// ARM64: call void @__move_constructor_8_8_t0w4_w8(i8** %{{.*}}, i8** %{{.*}}) +// ARM64: define internal void @__Block_byref_object_copy_(i8* frozen %0, i8* frozen %1) +// ARM64: call void @__move_constructor_8_8_t0w4_w8(i8** frozen %{{.*}}, i8** frozen %{{.*}}) -// ARM64: define linkonce_odr hidden void @__move_constructor_8_8_t0w4_w8(i8** %[[DST:.*]], i8** %[[SRC:.*]]) +// ARM64: define linkonce_odr hidden void @__move_constructor_8_8_t0w4_w8(i8** frozen %[[DST:.*]], i8** frozen %[[SRC:.*]]) // ARM64: %[[DST_ADDR:.*]] = alloca i8**, align 8 // ARM64: %[[SRC_ADDR:.*]] = alloca i8**, align 8 // ARM64: store i8** %[[DST]], i8*** %[[DST_ADDR]], align 8 @@ -128,10 +128,10 @@ BlockTy b = ^{ (void)t; }; } -// ARM64: define void @test_move_assignment_Weak(%[[STRUCT_WEAK]]* %{{.*}}) -// ARM64: call void @__move_assignment_8_8_t0w4_w8(i8** %{{.*}}, i8** %{{.*}}) +// ARM64: define void @test_move_assignment_Weak(%[[STRUCT_WEAK]]* frozen %{{.*}}) +// ARM64: call void @__move_assignment_8_8_t0w4_w8(i8** frozen %{{.*}}, i8** frozen %{{.*}}) -// ARM64: define linkonce_odr hidden void @__move_assignment_8_8_t0w4_w8(i8** %[[DST:.*]], i8** %[[SRC:.*]]) +// ARM64: define linkonce_odr hidden void @__move_assignment_8_8_t0w4_w8(i8** frozen %[[DST:.*]], i8** frozen %[[SRC:.*]]) // ARM64: %[[DST_ADDR:.*]] = alloca i8**, align 8 // ARM64: %[[SRC_ADDR:.*]] = alloca i8**, align 8 // ARM64: store i8** %[[DST]], i8*** %[[DST_ADDR]], align 8 @@ -157,35 +157,35 @@ *p = getWeak(); } -// COMMON: define void @test_parameter_Weak(%[[STRUCT_WEAK]]* %[[A:.*]]) +// COMMON: define void @test_parameter_Weak(%[[STRUCT_WEAK]]* frozen %[[A:.*]]) // COMMON: %[[V0:.*]] = bitcast %[[STRUCT_WEAK]]* %[[A]] to i8** -// COMMON: call void @__destructor_{{.*}}(i8** %[[V0]]) +// COMMON: call void @__destructor_{{.*}}(i8** frozen %[[V0]]) void test_parameter_Weak(Weak a) { } -// COMMON: define void @test_argument_Weak(%[[STRUCT_WEAK]]* %[[A:.*]]) +// COMMON: define void @test_argument_Weak(%[[STRUCT_WEAK]]* frozen %[[A:.*]]) // COMMON: %[[A_ADDR:.*]] = alloca %[[STRUCT_WEAK]]* // COMMON: %[[AGG_TMP:.*]] = alloca %[[STRUCT_WEAK]] // COMMON: store %[[STRUCT_WEAK]]* %[[A]], %[[STRUCT_WEAK]]** %[[A_ADDR]] // COMMON: %[[V0:.*]] = load %[[STRUCT_WEAK]]*, %[[STRUCT_WEAK]]** %[[A_ADDR]] // COMMON: %[[V1:.*]] = bitcast %[[STRUCT_WEAK]]* %[[AGG_TMP]] to i8** // COMMON: %[[V2:.*]] = bitcast %[[STRUCT_WEAK]]* %[[V0]] to i8** -// COMMON: call void @__copy_constructor_{{.*}}(i8** %[[V1]], i8** %[[V2]]) -// COMMON: call void @calleeWeak(%[[STRUCT_WEAK]]* %[[AGG_TMP]]) +// COMMON: call void @__copy_constructor_{{.*}}(i8** frozen %[[V1]], i8** frozen %[[V2]]) +// COMMON: call void @calleeWeak(%[[STRUCT_WEAK]]* frozen %[[AGG_TMP]]) // COMMON-NEXT: ret void test_argument_Weak(Weak *a) { calleeWeak(*a); } -// COMMON: define void @test_return_Weak(%[[STRUCT_WEAK]]* noalias sret align {{.*}} %[[AGG_RESULT:.*]], %[[STRUCT_WEAK]]* %[[A:.*]]) +// COMMON: define void @test_return_Weak(%[[STRUCT_WEAK]]* noalias sret align {{.*}} %[[AGG_RESULT:.*]], %[[STRUCT_WEAK]]* frozen %[[A:.*]]) // COMMON: %[[A_ADDR:.*]] = alloca %[[STRUCT_WEAK]]* // COMMON: store %[[STRUCT_WEAK]]* %[[A]], %[[STRUCT_WEAK]]** %[[A_ADDR]] // COMMON: %[[V0:.*]] = load %[[STRUCT_WEAK]]*, %[[STRUCT_WEAK]]** %[[A_ADDR]] // COMMON: %[[V1:.*]] = bitcast %[[STRUCT_WEAK]]* %[[AGG_RESULT]] to i8** // COMMON: %[[V2:.*]] = bitcast %[[STRUCT_WEAK]]* %[[V0]] to i8** -// COMMON: call void @__copy_constructor_{{.*}}(i8** %[[V1]], i8** %[[V2]]) +// COMMON: call void @__copy_constructor_{{.*}}(i8** frozen %[[V1]], i8** frozen %[[V2]]) // COMMON: ret void Weak test_return_Weak(Weak *a) { diff --git a/clang/test/CodeGenObjCXX/arc-attrs.mm b/clang/test/CodeGenObjCXX/arc-attrs.mm --- a/clang/test/CodeGenObjCXX/arc-attrs.mm +++ b/clang/test/CodeGenObjCXX/arc-attrs.mm @@ -7,12 +7,12 @@ // CHECK-LABEL: define void @_Z10sanityTestv void sanityTest() { // CHECK: [[X:%.*]] = alloca i8*, align 8 - // CHECK-NEXT: [[OBJ1:%.*]] = call i8* @_Z11makeObject1v() + // CHECK-NEXT: [[OBJ1:%.*]] = call frozen i8* @_Z11makeObject1v() // CHECK-NEXT: store i8* [[OBJ1]], i8** [[X]], align 8 id x = makeObject1(); - // CHECK-NEXT: [[OBJ2:%.*]] = call i8* @_Z11makeObject2v() - // CHECK-NEXT: call void @_Z13releaseObjectP11objc_object(i8* [[OBJ2]]) + // CHECK-NEXT: [[OBJ2:%.*]] = call frozen i8* @_Z11makeObject2v() + // CHECK-NEXT: call void @_Z13releaseObjectP11objc_object(i8* frozen [[OBJ2]]) releaseObject(makeObject2()); // CHECK-NEXT: call void @llvm.objc.storeStrong(i8** [[X]], i8* null) @@ -31,16 +31,16 @@ // CHECK-LABEL: define void @_Z12templateTestv void templateTest() { // CHECK: [[X:%.*]] = alloca i8*, align 8 - // CHECK-NEXT: [[OBJ1:%.*]] = call i8* @_Z12makeObjectT1IU8__strongP11objc_objectET_v() + // CHECK-NEXT: [[OBJ1:%.*]] = call frozen i8* @_Z12makeObjectT1IU8__strongP11objc_objectET_v() // CHECK-NEXT: store i8* [[OBJ1]], i8** [[X]], align 8 id x = makeObjectT1(); - // CHECK-NEXT: [[OBJ2:%.*]] = call i8* @_Z12makeObjectT2IU8__strongP11objc_objectET_v() - // CHECK-NEXT: call void @_Z13releaseObjectP11objc_object(i8* [[OBJ2]]) + // CHECK-NEXT: [[OBJ2:%.*]] = call frozen i8* @_Z12makeObjectT2IU8__strongP11objc_objectET_v() + // CHECK-NEXT: call void @_Z13releaseObjectP11objc_object(i8* frozen [[OBJ2]]) releaseObject(makeObjectT2()); - // CHECK-NEXT: [[OBJ3:%.*]] = call i8* @_Z11makeObject1v() - // CHECK-NEXT: call void @_Z14releaseObjectTIU8__strongP11objc_objectEvT_(i8* [[OBJ3]]) + // CHECK-NEXT: [[OBJ3:%.*]] = call frozen i8* @_Z11makeObject1v() + // CHECK-NEXT: call void @_Z14releaseObjectTIU8__strongP11objc_objectEvT_(i8* frozen [[OBJ3]]) releaseObjectT(makeObject1()); // CHECK-NEXT: call void @llvm.objc.storeStrong(i8** [[X]], i8* null) @@ -65,5 +65,5 @@ // CHECK: store i8* {{.*}}, i8** [[X:%.*]], // CHECK: [[T0:%.*]] = load i8*, i8** [[X]], // CHECK-NEXT: store i8* null, i8** [[X]], -// CHECK-NEXT: call void @_ZN15ForwardConsumedC2EP11objc_object({{.*}}, i8* [[T0]]) +// CHECK-NEXT: call void @_ZN15ForwardConsumedC2EP11objc_object({{.*}}, i8* frozen [[T0]]) // CHECK: call void @llvm.objc.storeStrong(i8** [[X]], i8* null) diff --git a/clang/test/CodeGenObjCXX/arc-blocks.mm b/clang/test/CodeGenObjCXX/arc-blocks.mm --- a/clang/test/CodeGenObjCXX/arc-blocks.mm +++ b/clang/test/CodeGenObjCXX/arc-blocks.mm @@ -31,12 +31,12 @@ // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds [[BYREF_A]], [[BYREF_A]]* [[V]], i32 0, i32 6 // CHECK-NEXT: store i8* getelementptr inbounds ([3 x i8], [3 x i8]* [[LAYOUT0]], i32 0, i32 0), i8** [[T0]] // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds [[BYREF_A]], [[BYREF_A]]* [[V]], i32 0, i32 7 - // CHECK-NEXT: call void @_ZN5test01AC1Ev([[A]]* [[T0]]) + // CHECK-NEXT: call void @_ZN5test01AC1Ev([[A]]* frozen [[T0]]) // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds [[BYREF_A]], [[BYREF_A]]* [[V]], i32 0, i32 7 // CHECK: bitcast [[BYREF_A]]* [[V]] to i8* // CHECK: [[T1:%.*]] = bitcast [[BYREF_A]]* [[V]] to i8* // CHECK-NEXT: call void @_Block_object_dispose(i8* [[T1]], i32 8) - // CHECK-NEXT: call void @_ZN5test01AD1Ev([[A]]* [[T0]]) + // CHECK-NEXT: call void @_ZN5test01AD1Ev([[A]]* frozen [[T0]]) // CHECK-NEXT: ret void // CHECK: define internal void [[COPY_HELPER]]( @@ -45,13 +45,13 @@ // CHECK-NEXT: load // CHECK-NEXT: [[T2:%.*]] = bitcast i8* {{.*}} to [[BYREF_A]]* // CHECK-NEXT: [[T3:%.*]] = getelementptr inbounds [[BYREF_A]], [[BYREF_A]]* [[T2]], i32 0, i32 7 - // CHECK-NEXT: call void @_ZN5test01AC1ERKS0_([[A]]* [[T1]], [[A]]* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[T3]]) + // CHECK-NEXT: call void @_ZN5test01AC1ERKS0_([[A]]* frozen [[T1]], [[A]]* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[T3]]) // CHECK-NEXT: ret void // CHECK: define internal void [[DISPOSE_HELPER]]( // CHECK: [[T0:%.*]] = bitcast i8* {{.*}} to [[BYREF_A]]* // CHECK-NEXT: [[T1:%.*]] = getelementptr inbounds [[BYREF_A]], [[BYREF_A]]* [[T0]], i32 0, i32 7 - // CHECK-NEXT: call void @_ZN5test01AD1Ev([[A]]* [[T1]]) + // CHECK-NEXT: call void @_ZN5test01AD1Ev([[A]]* frozen [[T1]]) // CHECK-NEXT: ret void } @@ -86,13 +86,13 @@ // CHECK: %[[V11:.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %[[STRUCT_BLOCK_DESCRIPTOR]]*, i8*, i8*, i8*, %[[STRUCT_TEST1_S0]], %[[STRUCT_TEST1_S0]], %[[STRUCT_TRIVIAL_INTERNAL]] }>, <{ i8*, i32, i32, i8*, %[[STRUCT_BLOCK_DESCRIPTOR]]*, i8*, i8*, i8*, %[[STRUCT_TEST1_S0]], %[[STRUCT_TEST1_S0]], %[[STRUCT_TRIVIAL_INTERNAL]] }>* %[[BLOCK_SOURCE]], i32 0, i32 8 // CHECK: %[[V12:.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %[[STRUCT_BLOCK_DESCRIPTOR]]*, i8*, i8*, i8*, %[[STRUCT_TEST1_S0]], %[[STRUCT_TEST1_S0]], %[[STRUCT_TRIVIAL_INTERNAL]] }>, <{ i8*, i32, i32, i8*, %[[STRUCT_BLOCK_DESCRIPTOR]]*, i8*, i8*, i8*, %[[STRUCT_TEST1_S0]], %[[STRUCT_TEST1_S0]], %[[STRUCT_TRIVIAL_INTERNAL]] }>* %[[BLOCK_DEST]], i32 0, i32 8 -// CHECK: invoke void @_ZN5test12S0C1ERKS0_(%[[STRUCT_TEST1_S0]]* %[[V12]], %[[STRUCT_TEST1_S0]]* nonnull align 4 dereferenceable(4) %[[V11]]) +// CHECK: invoke void @_ZN5test12S0C1ERKS0_(%[[STRUCT_TEST1_S0]]* frozen %[[V12]], %[[STRUCT_TEST1_S0]]* frozen nonnull align 4 dereferenceable(4) %[[V11]]) // CHECK: to label %[[INVOKE_CONT:.*]] unwind label %[[LPAD:.*]] // CHECK: [[INVOKE_CONT]]: // CHECK: %[[V13:.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %[[STRUCT_BLOCK_DESCRIPTOR]]*, i8*, i8*, i8*, %[[STRUCT_TEST1_S0]], %[[STRUCT_TEST1_S0]], %[[STRUCT_TRIVIAL_INTERNAL]] }>, <{ i8*, i32, i32, i8*, %[[STRUCT_BLOCK_DESCRIPTOR]]*, i8*, i8*, i8*, %[[STRUCT_TEST1_S0]], %[[STRUCT_TEST1_S0]], %[[STRUCT_TRIVIAL_INTERNAL]] }>* %[[BLOCK_SOURCE]], i32 0, i32 9 // CHECK: %[[V14:.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %[[STRUCT_BLOCK_DESCRIPTOR]]*, i8*, i8*, i8*, %[[STRUCT_TEST1_S0]], %[[STRUCT_TEST1_S0]], %[[STRUCT_TRIVIAL_INTERNAL]] }>, <{ i8*, i32, i32, i8*, %[[STRUCT_BLOCK_DESCRIPTOR]]*, i8*, i8*, i8*, %[[STRUCT_TEST1_S0]], %[[STRUCT_TEST1_S0]], %[[STRUCT_TRIVIAL_INTERNAL]] }>* %[[BLOCK_DEST]], i32 0, i32 9 -// CHECK: invoke void @_ZN5test12S0C1ERKS0_(%[[STRUCT_TEST1_S0]]* %[[V14]], %[[STRUCT_TEST1_S0]]* nonnull align 4 dereferenceable(4) %[[V13]]) +// CHECK: invoke void @_ZN5test12S0C1ERKS0_(%[[STRUCT_TEST1_S0]]* frozen %[[V14]], %[[STRUCT_TEST1_S0]]* frozen nonnull align 4 dereferenceable(4) %[[V13]]) // CHECK: to label %[[INVOKE_CONT4:.*]] unwind label %[[LPAD3:.*]] // CHECK: [[INVOKE_CONT4]]: @@ -102,7 +102,7 @@ // CHECK: br label %[[EHCLEANUP:.*]] // CHECK: [[LPAD3]]: -// CHECK: invoke void @_ZN5test12S0D1Ev(%[[STRUCT_TEST1_S0]]* %[[V12]]) +// CHECK: invoke void @_ZN5test12S0D1Ev(%[[STRUCT_TEST1_S0]]* frozen %[[V12]]) // CHECK: to label %[[INVOKE_CONT5:.*]] unwind label %[[TERMINATE_LPAD:.*]] // CHECK: [[INVOKE_CONT5]]: @@ -132,11 +132,11 @@ // CHECK: %[[V3:.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %[[STRUCT_BLOCK_DESCRIPTOR]]*, i8*, i8*, i8*, %[[STRUCT_TEST1_S0]], %[[STRUCT_TEST1_S0]], %[[STRUCT_TRIVIAL_INTERNAL]] }>, <{ i8*, i32, i32, i8*, %[[STRUCT_BLOCK_DESCRIPTOR]]*, i8*, i8*, i8*, %[[STRUCT_TEST1_S0]], %[[STRUCT_TEST1_S0]], %[[STRUCT_TRIVIAL_INTERNAL]] }>* %[[BLOCK]], i32 0, i32 7 // CHECK: %[[V5:.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %[[STRUCT_BLOCK_DESCRIPTOR]]*, i8*, i8*, i8*, %[[STRUCT_TEST1_S0]], %[[STRUCT_TEST1_S0]], %[[STRUCT_TRIVIAL_INTERNAL]] }>, <{ i8*, i32, i32, i8*, %[[STRUCT_BLOCK_DESCRIPTOR]]*, i8*, i8*, i8*, %[[STRUCT_TEST1_S0]], %[[STRUCT_TEST1_S0]], %[[STRUCT_TRIVIAL_INTERNAL]] }>* %[[BLOCK]], i32 0, i32 8 // CHECK: %[[V6:.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %[[STRUCT_BLOCK_DESCRIPTOR]]*, i8*, i8*, i8*, %[[STRUCT_TEST1_S0]], %[[STRUCT_TEST1_S0]], %[[STRUCT_TRIVIAL_INTERNAL]] }>, <{ i8*, i32, i32, i8*, %[[STRUCT_BLOCK_DESCRIPTOR]]*, i8*, i8*, i8*, %[[STRUCT_TEST1_S0]], %[[STRUCT_TEST1_S0]], %[[STRUCT_TRIVIAL_INTERNAL]] }>* %[[BLOCK]], i32 0, i32 9 -// CHECK: invoke void @_ZN5test12S0D1Ev(%[[STRUCT_TEST1_S0]]* %[[V6]]) +// CHECK: invoke void @_ZN5test12S0D1Ev(%[[STRUCT_TEST1_S0]]* frozen %[[V6]]) // CHECK: to label %[[INVOKE_CONT:.*]] unwind label %[[LPAD:.*]] // CHECK: [[INVOKE_CONT]]: -// CHECK: invoke void @_ZN5test12S0D1Ev(%[[STRUCT_TEST1_S0]]* %[[V5]]) +// CHECK: invoke void @_ZN5test12S0D1Ev(%[[STRUCT_TEST1_S0]]* frozen %[[V5]]) // CHECK: to label %[[INVOKE_CONT2:.*]] unwind label %[[LPAD1:.*]] // CHECK: [[INVOKE_CONT2]]: @@ -147,7 +147,7 @@ // CHECK: ret void // CHECK: [[LPAD]]: -// CHECK: invoke void @_ZN5test12S0D1Ev(%[[STRUCT_TEST1_S0]]* %[[V5]]) +// CHECK: invoke void @_ZN5test12S0D1Ev(%[[STRUCT_TEST1_S0]]* frozen %[[V5]]) // CHECK: to label %[[INVOKE_CONT3:.*]] unwind label %[[TERMINATE_LPAD:.*]] // CHECK: [[LPAD1]] diff --git a/clang/test/CodeGenObjCXX/arc-cxx11-init-list.mm b/clang/test/CodeGenObjCXX/arc-cxx11-init-list.mm --- a/clang/test/CodeGenObjCXX/arc-cxx11-init-list.mm +++ b/clang/test/CodeGenObjCXX/arc-cxx11-init-list.mm @@ -26,14 +26,14 @@ extern "C" void single() { function({ [I new] }); } -// CHECK: [[INSTANCE:%.*]] = {{.*}} call i8* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to i8* (i8*, i8*)*)(i8* {{.*}}, i8* {{.*}}) +// CHECK: [[INSTANCE:%.*]] = {{.*}} call frozen i8* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to i8* (i8*, i8*)*)(i8* {{.*}}, i8* {{.*}}) // CHECK-NEXT: [[CAST:%.*]] = bitcast [{{[0-9]+}} x %0*]* %{{.*}} to i8** // CHECK-NEXT: store i8* [[INSTANCE]], i8** [[CAST]], // CHECK: call void @llvm.objc.release(i8* {{.*}}) extern "C" void multiple() { function({ [I new], [I new] }); } -// CHECK: [[INSTANCE:%.*]] = {{.*}} call i8* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to i8* (i8*, i8*)*)(i8* {{.*}}, i8* {{.*}}) +// CHECK: [[INSTANCE:%.*]] = {{.*}} call frozen i8* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to i8* (i8*, i8*)*)(i8* {{.*}}, i8* {{.*}}) // CHECK-NEXT: [[CAST:%.*]] = bitcast [{{[0-9]+}} x %0*]* %{{.*}} to i8** // CHECK-NEXT: store i8* [[INSTANCE]], i8** [[CAST]], // CHECK: call void @llvm.objc.release(i8* {{.*}}) @@ -56,13 +56,13 @@ external(); } -// CHECK: [[INSTANCE:%.*]] = {{.*}} call i8* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to i8* (i8*, i8*)*)(i8* {{.*}}, i8* {{.*}}) +// CHECK: [[INSTANCE:%.*]] = {{.*}} call frozen i8* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to i8* (i8*, i8*)*)(i8* {{.*}}, i8* {{.*}}) // CHECK: {{.*}} call void @_Z8externalv() // CHECK: {{.*}} call void @llvm.objc.release(i8* {{.*}}) std::initializer_list il = { [I new] }; // CHECK: [[POOL:%.*]] = {{.*}} call i8* @llvm.objc.autoreleasePoolPush() -// CHECK: [[INSTANCE:%.*]] = {{.*}} call i8* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to i8* (i8*, i8*)*)(i8* {{.*}}, i8* {{.*}}) +// CHECK: [[INSTANCE:%.*]] = {{.*}} call frozen i8* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to i8* (i8*, i8*)*)(i8* {{.*}}, i8* {{.*}}) // CHECK-NEXT: store i8* [[INSTANCE]], i8** bitcast ([1 x %0*]* @_ZGR2il_ to i8**) // CHECK: {{.*}} call void @llvm.objc.autoreleasePoolPop(i8* [[POOL]]) diff --git a/clang/test/CodeGenObjCXX/arc-cxx11-member-init.mm b/clang/test/CodeGenObjCXX/arc-cxx11-member-init.mm --- a/clang/test/CodeGenObjCXX/arc-cxx11-member-init.mm +++ b/clang/test/CodeGenObjCXX/arc-cxx11-member-init.mm @@ -26,7 +26,7 @@ // CHECK: [[ZERO:%.*]] = load %struct._class_t*, %struct._class_t** @"OBJC_CLASSLIST_REFERENCES_$_" // CHECK: [[ONE:%.*]] = load i8*, i8** @OBJC_SELECTOR_REFERENCES_ // CHECK: [[TWO:%.*]] = bitcast %struct._class_t* [[ZERO]] to i8* -// CHECK: [[CALL:%.*]] = call i8* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to i8* (i8*, i8*)*)(i8* [[TWO]], i8* [[ONE]]) +// CHECK: [[CALL:%.*]] = call frozen i8* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to i8* (i8*, i8*)*)(i8* frozen [[TWO]], i8* frozen [[ONE]]) // CHECK: [[THREE:%.*]] = bitcast i8* [[CALL]] to [[T:%.*]]* // CHECK: store [[T]]* [[THREE]], [[T]]** [[mClipData]], align 8 @@ -42,4 +42,4 @@ @end @implementation Foo @end -// CHECK-NOT: define internal i8* @"\01-[Foo .cxx_construct +// CHECK-NOT: define internal frozen i8* @"\01-[Foo .cxx_construct diff --git a/clang/test/CodeGenObjCXX/arc-exceptions.mm b/clang/test/CodeGenObjCXX/arc-exceptions.mm --- a/clang/test/CodeGenObjCXX/arc-exceptions.mm +++ b/clang/test/CodeGenObjCXX/arc-exceptions.mm @@ -137,21 +137,21 @@ // CHECK-NEXT: store [2 x i8*]* [[A0]], // CHECK-NEXT: [[A00:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[A0]], i64 0, i64 0 // CHECK-NEXT: store i8** [[A00]], -// CHECK-NEXT: [[T0:%.*]] = invoke i8* @_Z12test5_helperj(i32 0) +// CHECK-NEXT: [[T0:%.*]] = invoke frozen i8* @_Z12test5_helperj(i32 frozen 0) // CHECK: store i8* [[T0]], i8** [[A00]], align // CHECK-NEXT: [[A01:%.*]] = getelementptr inbounds i8*, i8** [[A00]], i64 1 // CHECK-NEXT: store i8** [[A01]], -// CHECK-NEXT: [[T0:%.*]] = invoke i8* @_Z12test5_helperj(i32 1) +// CHECK-NEXT: [[T0:%.*]] = invoke frozen i8* @_Z12test5_helperj(i32 frozen 1) // CHECK: store i8* [[T0]], i8** [[A01]], align // CHECK-NEXT: [[A1:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[A0]], i64 1 // CHECK-NEXT: store [2 x i8*]* [[A1]], // CHECK-NEXT: [[A10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[A1]], i64 0, i64 0 // CHECK-NEXT: store i8** [[A10]], -// CHECK-NEXT: [[T0:%.*]] = invoke i8* @_Z12test5_helperj(i32 2) +// CHECK-NEXT: [[T0:%.*]] = invoke frozen i8* @_Z12test5_helperj(i32 frozen 2) // CHECK: store i8* [[T0]], i8** [[A10]], align // CHECK-NEXT: [[A11:%.*]] = getelementptr inbounds i8*, i8** [[A10]], i64 1 // CHECK-NEXT: store i8** [[A11]], -// CHECK-NEXT: [[T0:%.*]] = invoke i8* @_Z12test5_helperj(i32 3) +// CHECK-NEXT: [[T0:%.*]] = invoke frozen i8* @_Z12test5_helperj(i32 frozen 3) // CHECK: store i8* [[T0]], i8** [[A11]], align // CHECK: attributes [[NUW]] = { nounwind } diff --git a/clang/test/CodeGenObjCXX/arc-forwarded-lambda-call.mm b/clang/test/CodeGenObjCXX/arc-forwarded-lambda-call.mm --- a/clang/test/CodeGenObjCXX/arc-forwarded-lambda-call.mm +++ b/clang/test/CodeGenObjCXX/arc-forwarded-lambda-call.mm @@ -3,8 +3,8 @@ void test0(id x) { extern void test0_helper(id (^)(void)); test0_helper([=]() { return x; }); - // CHECK-LABEL: define internal i8* @___Z5test0P11objc_object_block_invoke - // CHECK: [[T0:%.*]] = call i8* @"_ZZ5test0P11objc_objectENK3$_0clEv" + // CHECK-LABEL: define internal frozen i8* @___Z5test0P11objc_object_block_invoke + // CHECK: [[T0:%.*]] = call frozen i8* @"_ZZ5test0P11objc_objectENK3$_0clEv" // CHECK-NEXT: [[T1:%.*]] = notail call i8* @llvm.objc.retainAutoreleasedReturnValue(i8* [[T0]]) // CHECK-NEXT: [[T2:%.*]] = tail call i8* @llvm.objc.autoreleaseReturnValue(i8* [[T1]]) // CHECK-NEXT: ret i8* [[T2]] @@ -26,8 +26,8 @@ void test1() { extern void test1_helper(id (*)(void)); test1_helper([](){ return test1_rv; }); - // CHECK-LABEL: define internal i8* @"_ZZ5test1vEN3$_18__invokeEv" - // CHECK: [[T0:%.*]] = call i8* @"_ZZ5test1vENK3$_1clEv" + // CHECK-LABEL: define internal frozen i8* @"_ZZ5test1vEN3$_18__invokeEv" + // CHECK: [[T0:%.*]] = call frozen i8* @"_ZZ5test1vENK3$_1clEv" // CHECK-NEXT: [[T1:%.*]] = notail call i8* @llvm.objc.retainAutoreleasedReturnValue(i8* [[T0]]) // CHECK-NEXT: [[T2:%.*]] = tail call i8* @llvm.objc.autoreleaseReturnValue(i8* [[T1]]) // CHECK-NEXT: ret i8* [[T2]] diff --git a/clang/test/CodeGenObjCXX/arc-globals.mm b/clang/test/CodeGenObjCXX/arc-globals.mm --- a/clang/test/CodeGenObjCXX/arc-globals.mm +++ b/clang/test/CodeGenObjCXX/arc-globals.mm @@ -6,14 +6,14 @@ id getObject(); // CHECK-LABEL: define internal void @__cxx_global_var_init -// CHECK: call i8* @_Z9getObjectv +// CHECK: call frozen i8* @_Z9getObjectv // CHECK-NEXT: call i8* @llvm.objc.retainAutoreleasedReturnValue // CHECK-NEXT: {{store i8*.*@global_obj}} // CHECK-NEXT: ret void id global_obj = getObject(); // CHECK-LABEL: define internal void @__cxx_global_var_init -// CHECK: call i8* @_Z9getObjectv +// CHECK: call frozen i8* @_Z9getObjectv // CHECK-NEXT: call i8* @llvm.objc.retainAutoreleasedReturnValue // CHECK-NEXT: {{store i8*.*@global_obj2}} // CHECK-NEXT: ret void diff --git a/clang/test/CodeGenObjCXX/arc-list-init-destruct.mm b/clang/test/CodeGenObjCXX/arc-list-init-destruct.mm --- a/clang/test/CodeGenObjCXX/arc-list-init-destruct.mm +++ b/clang/test/CodeGenObjCXX/arc-list-init-destruct.mm @@ -22,9 +22,9 @@ Class0 *g; // CHECK: define {{.*}} @_Z4testv() -// CHECK: invoke zeroext i1 @_Z7getBoolv() +// CHECK: invoke frozen zeroext i1 @_Z7getBoolv() // CHECK: landingpad { i8*, i32 } -// CHECK: call void @_ZN6Class1D1Ev(%[[STRUCT_CLASS1]]* %{{.*}}) +// CHECK: call void @_ZN6Class1D1Ev(%[[STRUCT_CLASS1]]* frozen %{{.*}}) // CHECK: br label // CHECK: define linkonce_odr void @_ZN6Class1D1Ev( diff --git a/clang/test/CodeGenObjCXX/arc-mangle.mm b/clang/test/CodeGenObjCXX/arc-mangle.mm --- a/clang/test/CodeGenObjCXX/arc-mangle.mm +++ b/clang/test/CodeGenObjCXX/arc-mangle.mm @@ -1,21 +1,21 @@ // RUN: %clang_cc1 -fobjc-arc -fobjc-runtime-has-weak -triple %itanium_abi_triple -emit-llvm -fblocks -o - %s | FileCheck %s // RUN: %clang_cc1 -DTEST_UNALIGNED -fms-extensions -fobjc-arc -fobjc-runtime-has-weak -triple %itanium_abi_triple -emit-llvm -fblocks -o - %s | FileCheck %s --check-prefix=UNALIGNED -// CHECK-LABEL: define {{.*}}void @_Z1fPU8__strongP11objc_object(i8** %0) +// CHECK-LABEL: define {{.*}}void @_Z1fPU8__strongP11objc_object(i8** frozen %0) void f(__strong id *) {} -// CHECK-LABEL: define {{.*}}void @_Z1fPU6__weakP11objc_object(i8** %0) +// CHECK-LABEL: define {{.*}}void @_Z1fPU6__weakP11objc_object(i8** frozen %0) void f(__weak id *) {} -// CHECK-LABEL: define {{.*}}void @_Z1fPU15__autoreleasingP11objc_object(i8** %0) +// CHECK-LABEL: define {{.*}}void @_Z1fPU15__autoreleasingP11objc_object(i8** frozen %0) void f(__autoreleasing id *) {} -// CHECK-LABEL: define {{.*}}void @_Z1fPP11objc_object(i8** %0) +// CHECK-LABEL: define {{.*}}void @_Z1fPP11objc_object(i8** frozen %0) void f(__unsafe_unretained id *) {} -// CHECK-LABEL: define {{.*}}void @_Z1fPU8__strongKP11objc_object(i8** %0) +// CHECK-LABEL: define {{.*}}void @_Z1fPU8__strongKP11objc_object(i8** frozen %0) void f(const __strong id *) {} -// CHECK-LABEL: define {{.*}}void @_Z1fPU6__weakKP11objc_object(i8** %0) +// CHECK-LABEL: define {{.*}}void @_Z1fPU6__weakKP11objc_object(i8** frozen %0) void f(const __weak id *) {} -// CHECK-LABEL: define {{.*}}void @_Z1fPU15__autoreleasingKP11objc_object(i8** %0) +// CHECK-LABEL: define {{.*}}void @_Z1fPU15__autoreleasingKP11objc_object(i8** frozen %0) void f(const __autoreleasing id *) {} -// CHECK-LABEL: define {{.*}}void @_Z1fPKP11objc_object(i8** %0) +// CHECK-LABEL: define {{.*}}void @_Z1fPKP11objc_object(i8** frozen %0) void f(const __unsafe_unretained id *) {} // CHECK-LABEL: define {{.*}}void @_Z1fPFU19ns_returns_retainedP11objc_objectvE void f(__attribute__((ns_returns_retained)) id (*fn)()) {} @@ -35,10 +35,10 @@ template void g(unsigned_c *); #if TEST_UNALIGNED -// UNALIGNED-LABEL: define {{.*}}void @_Z1gPU6__weakU11__unalignedP11objc_object(i8** %0) +// UNALIGNED-LABEL: define {{.*}}void @_Z1gPU6__weakU11__unalignedP11objc_object(i8** frozen %0) void g(__weak __unaligned id *) {} -// UNALIGNED-LABEL: define {{.*}}void @_Z1gPU11__unalignedU8__strongP11objc_object(i8** %0) +// UNALIGNED-LABEL: define {{.*}}void @_Z1gPU11__unalignedU8__strongP11objc_object(i8** frozen %0) void g(__strong __unaligned id *) {} -// UNALIGNED-LABEL: define {{.*}}void @_Z1gPU11__unalignedU15__autoreleasingP11objc_object(i8** %0) +// UNALIGNED-LABEL: define {{.*}}void @_Z1gPU11__unalignedU15__autoreleasingP11objc_object(i8** frozen %0) void g(__autoreleasing __unaligned id *) {} #endif // TEST_UNALIGNED diff --git a/clang/test/CodeGenObjCXX/arc-marker-funclet.mm b/clang/test/CodeGenObjCXX/arc-marker-funclet.mm --- a/clang/test/CodeGenObjCXX/arc-marker-funclet.mm +++ b/clang/test/CodeGenObjCXX/arc-marker-funclet.mm @@ -10,7 +10,7 @@ } } -// CHECK: call i8* @"?f@@YAPAUobjc_object@@XZ"() [ "funclet"(token %1) ] +// CHECK: call frozen i8* @"?f@@YAPAUobjc_object@@XZ"() [ "funclet"(token %1) ] // CHECK-NEXT: call void asm sideeffect "movl{{.*}}%ebp, %ebp{{.*}}", ""() [ "funclet"(token %1) ] // The corresponding f() call was invoked from the entry basic block. diff --git a/clang/test/CodeGenObjCXX/arc-move.mm b/clang/test/CodeGenObjCXX/arc-move.mm --- a/clang/test/CodeGenObjCXX/arc-move.mm +++ b/clang/test/CodeGenObjCXX/arc-move.mm @@ -33,7 +33,7 @@ // CHECK-LABEL: define void @_Z12library_moveRU8__strongP11objc_objectS2_ void library_move(__strong id &x, __strong id &y) { - // CHECK: call nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) i8** @_Z4moveIRU8__strongP11objc_objectEON16remove_referenceIT_E4typeEOS5_ + // CHECK: call frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) i8** @_Z4moveIRU8__strongP11objc_objectEON16remove_referenceIT_E4typeEOS5_ // CHECK: load i8*, i8** // CHECK: store i8* null, i8** // CHECK: load i8**, i8*** @@ -50,7 +50,7 @@ // CHECK: [[I:%.*]] = alloca i32, align 4 // CHECK: [[XPTR1:%.*]] = bitcast i8** [[X]] to i8* // CHECK-NEXT: call void @llvm.lifetime.start.p0i8(i64 8, i8* [[XPTR1]]) - // CHECK: [[Y:%[a-zA-Z0-9]+]] = call nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) i8** @_Z4moveIRU8__strongP11objc_objectEON16remove_referenceIT_E4typeEOS5_ + // CHECK: [[Y:%[a-zA-Z0-9]+]] = call frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) i8** @_Z4moveIRU8__strongP11objc_objectEON16remove_referenceIT_E4typeEOS5_ // Load the object // CHECK-NEXT: [[OBJ:%[a-zA-Z0-9]+]] = load i8*, i8** [[Y]] // Null out y @@ -75,7 +75,7 @@ // CHECK-LABEL: define void @_Z10const_moveRU8__strongKP11objc_object( void const_move(const __strong id &x) { // CHECK: [[Y:%.*]] = alloca i8*, - // CHECK: [[X:%.*]] = call nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) i8** @_Z4moveIRU8__strongKP11objc_objectEON16remove_referenceIT_E4typeEOS5_( + // CHECK: [[X:%.*]] = call frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) i8** @_Z4moveIRU8__strongKP11objc_objectEON16remove_referenceIT_E4typeEOS5_( // CHECK-NEXT: [[T0:%.*]] = load i8*, i8** [[X]] // CHECK-NEXT: [[T1:%.*]] = call i8* @llvm.objc.retain(i8* [[T0]]) // CHECK-NEXT: store i8* [[T1]], i8** [[Y]] diff --git a/clang/test/CodeGenObjCXX/arc-new-delete.mm b/clang/test/CodeGenObjCXX/arc-new-delete.mm --- a/clang/test/CodeGenObjCXX/arc-new-delete.mm +++ b/clang/test/CodeGenObjCXX/arc-new-delete.mm @@ -12,32 +12,32 @@ // OPT-NEXT: [[T0:%.*]] = call i8* @llvm.objc.retain(i8* [[INVALUE:%.*]]) // OPT-NEXT: store i8* [[T0]], i8** [[INVALUEADDR]] - // CHECK: [[CALL:%.*]] = call noalias nonnull i8* @_Znwm + // CHECK: [[CALL:%.*]] = call frozen noalias nonnull i8* @_Znwm // CHECK-NEXT: {{bitcast i8\*.*to i8\*\*}} // CHECK-NEXT: store i8* null, i8** new strong_id; - // CHECK: [[CALL:%.*]] = call noalias nonnull i8* @_Znwm + // CHECK: [[CALL:%.*]] = call frozen noalias nonnull i8* @_Znwm // CHECK-NEXT: {{bitcast i8\*.*to i8\*\*}} // UNOPT-NEXT: store i8* null, i8** // OPT-NEXT: call i8* @llvm.objc.initWeak(i8** {{.*}}, i8* null) new weak_id; - // CHECK: [[CALL:%.*]] = call noalias nonnull i8* @_Znwm + // CHECK: [[CALL:%.*]] = call frozen noalias nonnull i8* @_Znwm // CHECK-NEXT: {{bitcast i8\*.*to i8\*\*}} // CHECK-NEXT: store i8* null, i8** new __strong id; - // CHECK: [[CALL:%.*]] = call noalias nonnull i8* @_Znwm + // CHECK: [[CALL:%.*]] = call frozen noalias nonnull i8* @_Znwm // CHECK-NEXT: {{bitcast i8\*.*to i8\*\*}} // UNOPT-NEXT: store i8* null, i8** // OPT-NEXT: call i8* @llvm.objc.initWeak(i8** {{.*}}, i8* null) new __weak id; - // CHECK: [[CALL:%.*]] = call noalias nonnull i8* @_Znwm + // CHECK: [[CALL:%.*]] = call frozen noalias nonnull i8* @_Znwm // CHECK: call i8* @llvm.objc.retain // CHECK: store i8* new __strong id(invalue); - // CHECK: [[CALL:%.*]] = call noalias nonnull i8* @_Znwm + // CHECK: [[CALL:%.*]] = call frozen noalias nonnull i8* @_Znwm // CHECK: call i8* @llvm.objc.initWeak new __weak id(invalue); @@ -48,12 +48,12 @@ // CHECK-LABEL: define void @_Z14test_array_new void test_array_new() { - // CHECK: call noalias nonnull i8* @_Znam + // CHECK: call frozen noalias nonnull i8* @_Znam // CHECK: store i64 17, i64* // CHECK: call void @llvm.memset.p0i8.i64 new strong_id[17]; - // CHECK: call noalias nonnull i8* @_Znam + // CHECK: call frozen noalias nonnull i8* @_Znam // CHECK: store i64 17, i64* // CHECK: call void @llvm.memset.p0i8.i64 new weak_id[17]; diff --git a/clang/test/CodeGenObjCXX/arc-references.mm b/clang/test/CodeGenObjCXX/arc-references.mm --- a/clang/test/CodeGenObjCXX/arc-references.mm +++ b/clang/test/CodeGenObjCXX/arc-references.mm @@ -9,12 +9,12 @@ // Lifetime extension for binding a reference to an rvalue // CHECK-LABEL: define void @_Z5test0v() void test0() { - // CHECK: call i8* @_Z9getObjectv + // CHECK: call frozen i8* @_Z9getObjectv // CHECK-NEXT: call i8* @llvm.objc.retainAutoreleasedReturnValue const __strong id &ref1 = getObject(); // CHECK: call void @_Z6calleev callee(); - // CHECK: call i8* @_Z9getObjectv + // CHECK: call frozen i8* @_Z9getObjectv // CHECK-NEXT: call i8* @llvm.objc.retainAutoreleasedReturnValue // CHECK-NEXT: call i8* @llvm.objc.autorelease const __autoreleasing id &ref2 = getObject(); @@ -84,7 +84,7 @@ } // CHECK-LABEL: define internal void @__cxx_global_var_init( -// CHECK: call i8* @_Z9getObjectv +// CHECK: call frozen i8* @_Z9getObjectv // CHECK-NEXT: call i8* @llvm.objc.retainAutoreleasedReturnValue const __strong id &global_ref = getObject(); diff --git a/clang/test/CodeGenObjCXX/arc-special-member-functions.mm b/clang/test/CodeGenObjCXX/arc-special-member-functions.mm --- a/clang/test/CodeGenObjCXX/arc-special-member-functions.mm +++ b/clang/test/CodeGenObjCXX/arc-special-member-functions.mm @@ -151,7 +151,7 @@ } // Implicitly-generated copy assignment operator for ObjCBlockMember -// CHECK: define linkonce_odr nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) {{%.*}}* @_ZN15ObjCBlockMemberaSERKS_( +// CHECK: define linkonce_odr frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) {{%.*}}* @_ZN15ObjCBlockMemberaSERKS_( // CHECK: [[T0:%.*]] = getelementptr inbounds [[T:%.*]], [[T:%.*]]* {{%.*}}, i32 0, i32 0 // CHECK-NEXT: [[T1:%.*]] = load i32 (i32)*, i32 (i32)** [[T0]], align 8 // CHECK-NEXT: [[T2:%.*]] = bitcast i32 (i32)* [[T1]] to i8* diff --git a/clang/test/CodeGenObjCXX/arc.mm b/clang/test/CodeGenObjCXX/arc.mm --- a/clang/test/CodeGenObjCXX/arc.mm +++ b/clang/test/CodeGenObjCXX/arc.mm @@ -7,7 +7,7 @@ count: (unsigned long) bufferSize; @end; NSArray *nsarray() { return 0; } -// CHECK: define [[NSARRAY:%.*]]* @_Z7nsarrayv() +// CHECK: define frozen [[NSARRAY:%.*]]* @_Z7nsarrayv() void use(id); @@ -16,10 +16,10 @@ void test0(__weak id *wp, __weak volatile id *wvp) { extern id test0_helper(void); - // TODO: this is sub-optimal, we should retain at the actual call site. + // TODO: this is sub-optimal, we should retain at the actual call frozen site. // TODO: in the non-volatile case, we do not need to be reloading. - // CHECK: [[T0:%.*]] = call i8* @_Z12test0_helperv() + // CHECK: [[T0:%.*]] = call frozen i8* @_Z12test0_helperv() // CHECK-NEXT: [[T1:%.*]] = notail call i8* @llvm.objc.retainAutoreleasedReturnValue(i8* [[T0]]) // CHECK-NEXT: [[T2:%.*]] = load i8**, i8*** {{%.*}}, align 8 // CHECK-NEXT: [[T3:%.*]] = call i8* @llvm.objc.storeWeak(i8** [[T2]], i8* [[T1]]) @@ -28,7 +28,7 @@ // CHECK-NEXT: call void @llvm.objc.release(i8* [[T1]]) id x = *wp = test0_helper(); - // CHECK: [[T0:%.*]] = call i8* @_Z12test0_helperv() + // CHECK: [[T0:%.*]] = call frozen i8* @_Z12test0_helperv() // CHECK-NEXT: [[T1:%.*]] = notail call i8* @llvm.objc.retainAutoreleasedReturnValue(i8* [[T0]]) // CHECK-NEXT: [[T2:%.*]] = load i8**, i8*** {{%.*}}, align 8 // CHECK-NEXT: [[T3:%.*]] = call i8* @llvm.objc.storeWeak(i8** [[T2]], i8* [[T1]]) @@ -42,7 +42,7 @@ struct Test1_helper { Test1_helper(); }; @interface Test1 @end @implementation Test1 { Test1_helper x; } @end -// CHECK: define internal i8* @"\01-[Test1 .cxx_construct]"( +// CHECK: define internal frozen i8* @"\01-[Test1 .cxx_construct]"( // CHECK: call void @_ZN12Test1_helperC1Ev( // CHECK-NEXT: load // CHECK-NEXT: bitcast @@ -81,7 +81,7 @@ // CHECK-NEXT: store i8* [[T0]], i8** [[TEMP1]] // CHECK-NEXT: br label // CHECK: [[W0:%.*]] = phi i8* [ [[T0]], {{%.*}} ], [ undef, {{%.*}} ] - // CHECK: call void @_Z11test34_sinkPU15__autoreleasingP11objc_object(i8** [[T1]]) + // CHECK: call void @_Z11test34_sinkPU15__autoreleasingP11objc_object(i8** frozen [[T1]]) // CHECK-NEXT: [[T0:%.*]] = icmp eq i8** [[ARG]], null // CHECK-NEXT: br i1 [[T0]], // CHECK: [[T0:%.*]] = load i8*, i8** [[TEMP1]] @@ -104,7 +104,7 @@ // CHECK-NEXT: store i1 true, i1* [[CONDCLEANUP]] // CHECK-NEXT: store i8* [[T0]], i8** [[TEMP2]] // CHECK-NEXT: br label - // CHECK: call void @_Z11test34_sinkPU15__autoreleasingP11objc_object(i8** [[T1]]) + // CHECK: call void @_Z11test34_sinkPU15__autoreleasingP11objc_object(i8** frozen [[T1]]) // CHECK-NEXT: [[T0:%.*]] = icmp eq i8** [[ARG]], null // CHECK-NEXT: br i1 [[T0]], // CHECK: [[T0:%.*]] = load i8*, i8** [[TEMP2]] @@ -125,25 +125,25 @@ // CHECK-LABEL: define void @_Z6test3513Test35_HelperPS_ void test35(Test35_Helper x0, Test35_Helper *x0p) { // CHECK: call void @llvm.lifetime.start - // CHECK: call i8* @_ZN13Test35_Helper11makeObject1Ev + // CHECK: call frozen i8* @_ZN13Test35_Helper11makeObject1Ev // CHECK-NOT: call i8* @llvm.objc.retain id obj1 = Test35_Helper::makeObject1(); // CHECK: call void @llvm.lifetime.start - // CHECK: call i8* @_ZN13Test35_Helper11makeObject2Ev + // CHECK: call frozen i8* @_ZN13Test35_Helper11makeObject2Ev // CHECK-NOT: call i8* @llvm.objc.retain id obj2 = x0.makeObject2(); // CHECK: call void @llvm.lifetime.start - // CHECK: call i8* @_ZN13Test35_Helper11makeObject2Ev + // CHECK: call frozen i8* @_ZN13Test35_Helper11makeObject2Ev // CHECK-NOT: call i8* @llvm.objc.retain id obj3 = x0p->makeObject2(); id (Test35_Helper::*pmf)() __attribute__((ns_returns_retained)) = &Test35_Helper::makeObject2; // CHECK: call void @llvm.lifetime.start - // CHECK: call i8* % + // CHECK: call frozen i8* % // CHECK-NOT: call i8* @llvm.objc.retain id obj4 = (x0.*pmf)(); // CHECK: call void @llvm.lifetime.start - // CHECK: call i8* % + // CHECK: call frozen i8* % // CHECK-NOT: call i8* @llvm.objc.retain id obj5 = (x0p->*pmf)(); @@ -163,24 +163,24 @@ // CHECK-LABEL: define void @_Z7test35b13Test35_HelperPS_ void test35b(Test35_Helper x0, Test35_Helper *x0p) { // CHECK: call void @llvm.lifetime.start - // CHECK: call i8* @_ZN13Test35_Helper11makeObject3Ev + // CHECK: call frozen i8* @_ZN13Test35_Helper11makeObject3Ev // CHECK: call i8* @llvm.objc.retain id obj1 = Test35_Helper::makeObject3(); // CHECK: call void @llvm.lifetime.start - // CHECK: call i8* @_ZN13Test35_Helper11makeObject4Ev + // CHECK: call frozen i8* @_ZN13Test35_Helper11makeObject4Ev // CHECK: call i8* @llvm.objc.retain id obj2 = x0.makeObject4(); // CHECK: call void @llvm.lifetime.start - // CHECK: call i8* @_ZN13Test35_Helper11makeObject4Ev + // CHECK: call frozen i8* @_ZN13Test35_Helper11makeObject4Ev // CHECK: call i8* @llvm.objc.retain id obj3 = x0p->makeObject4(); id (Test35_Helper::*pmf)() = &Test35_Helper::makeObject4; // CHECK: call void @llvm.lifetime.start - // CHECK: call i8* % + // CHECK: call frozen i8* % // CHECK: call i8* @llvm.objc.retain id obj4 = (x0.*pmf)(); // CHECK: call void @llvm.lifetime.start - // CHECK: call i8* % + // CHECK: call frozen i8* % // CHECK: call i8* @llvm.objc.retain id obj5 = (x0p->*pmf)(); @@ -199,7 +199,7 @@ } // rdar://problem/9603128 -// CHECK-LABEL: define i8* @_Z6test36P11objc_object( +// CHECK-LABEL: define frozen i8* @_Z6test36P11objc_object( id test36(id z) { // CHECK: llvm.objc.retain // CHECK: llvm.objc.retain @@ -222,7 +222,7 @@ extern template void test37(Test37 *a); template void test37(Test37 *a); // CHECK-LABEL: define weak_odr void @_Z6test37I6Test37EvPT_( -// CHECK: [[T0:%.*]] = call [[NSARRAY]]* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to [[NSARRAY]]* (i8*, i8*)*)( +// CHECK: [[T0:%.*]] = call frozen [[NSARRAY]]* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to [[NSARRAY]]* (i8*, i8*)*)( // CHECK-NEXT: [[T1:%.*]] = bitcast [[NSARRAY]]* [[T0]] to i8* // CHECK-NEXT: [[T2:%.*]] = notail call i8* @llvm.objc.retainAutoreleasedReturnValue(i8* [[T1]]) // CHECK-NEXT: [[COLL:%.*]] = bitcast i8* [[T2]] to [[NSARRAY]]* @@ -250,7 +250,7 @@ } // CHECK-LABEL: define weak_odr void @_Z12send_releaseIiEvv( -// CHECK: call %0* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend +// CHECK: call frozen %0* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend // CHECK-NEXT: bitcast // CHECK-NEXT: call i8* @llvm.objc.retainAutoreleasedReturnValue // CHECK-NEXT: bitcast @@ -265,9 +265,9 @@ return result; } -// CHECK-LABEL: define weak_odr %2* @_Z16instantiate_initIiEP6Test37v -// CHECK: call i8* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend -// CHECK: call i8* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend +// CHECK-LABEL: define weak_odr frozen %2* @_Z16instantiate_initIiEP6Test37v +// CHECK: call frozen i8* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend +// CHECK: call frozen i8* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend // CHECK: call i8* @llvm.objc.retain // CHECK: call void @llvm.objc.release // CHECK: call i8* @llvm.objc.autoreleaseReturnValue @@ -297,8 +297,8 @@ }; id Test39::bar() { return 0; } // Note lack of autorelease. -// CHECK-LABEL: define i8* @_ZThn8_N6Test393barEv( -// CHECK: call i8* @_ZN6Test393barEv( +// CHECK-LABEL: define frozen i8* @_ZThn8_N6Test393barEv( +// CHECK: call frozen i8* @_ZN6Test393barEv( // CHECK-NEXT: ret i8* // rdar://13617051 diff --git a/clang/test/CodeGenObjCXX/auto-release-result-assert.mm b/clang/test/CodeGenObjCXX/auto-release-result-assert.mm --- a/clang/test/CodeGenObjCXX/auto-release-result-assert.mm +++ b/clang/test/CodeGenObjCXX/auto-release-result-assert.mm @@ -1,15 +1,15 @@ // RUN: %clang_cc1 -triple x86_64-apple-darwin10 -emit-llvm -fblocks -fobjc-arc -o - %s | FileCheck %s -// CHECK-LABEL: define %struct.S1* @_Z4foo1i( -// CHECK: %[[CALL:[a-z0-9]+]] = call %struct.S1* @_Z4foo0i +// CHECK-LABEL: define frozen %struct.S1* @_Z4foo1i( +// CHECK: %[[CALL:[a-z0-9]+]] = call frozen %struct.S1* @_Z4foo0i // CHECK: ret %struct.S1* %[[CALL]] -// CHECK-LABEL: define %struct.S1* @_ZN2S22m1Ev( -// CHECK: %[[CALL:[a-z0-9]+]] = call %struct.S1* @_Z4foo0i +// CHECK-LABEL: define frozen %struct.S1* @_ZN2S22m1Ev( +// CHECK: %[[CALL:[a-z0-9]+]] = call frozen %struct.S1* @_Z4foo0i // CHECK: ret %struct.S1* %[[CALL]] -// CHECK-LABEL: define internal %struct.S1* @Block1_block_invoke( -// CHECK: %[[CALL:[a-z0-9]+]] = call %struct.S1* @_Z4foo0i +// CHECK-LABEL: define internal frozen %struct.S1* @Block1_block_invoke( +// CHECK: %[[CALL:[a-z0-9]+]] = call frozen %struct.S1* @_Z4foo0i // CHECK: ret %struct.S1* %[[CALL]] struct S1; diff --git a/clang/test/CodeGenObjCXX/block-default-arg.mm b/clang/test/CodeGenObjCXX/block-default-arg.mm --- a/clang/test/CodeGenObjCXX/block-default-arg.mm +++ b/clang/test/CodeGenObjCXX/block-default-arg.mm @@ -1,10 +1,10 @@ // RUN: %clang_cc1 -triple x86_64-apple-darwin10.0.0 -emit-llvm -o - %s -std=c++11 -fblocks -fobjc-arc | FileCheck %s -// CHECK: define internal void @___Z16test_default_argi_block_invoke(i8* %[[BLOCK_DESCRIPTOR:.*]]) +// CHECK: define internal void @___Z16test_default_argi_block_invoke(i8* frozen %[[BLOCK_DESCRIPTOR:.*]]) // CHECK: %[[BLOCK:.*]] = bitcast i8* %[[BLOCK_DESCRIPTOR]] to <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>* // CHECK: %[[BLOCK_CAPTURE_ADDR:.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>* %[[BLOCK]], i32 0, i32 5 // CHECK: %[[V0:.*]] = load i32, i32* %[[BLOCK_CAPTURE_ADDR]] -// CHECK: call void @_Z4foo1i(i32 %[[V0]]) +// CHECK: call void @_Z4foo1i(i32 frozen %[[V0]]) void foo1(int); diff --git a/clang/test/CodeGenObjCXX/block-nested-in-lambda.mm b/clang/test/CodeGenObjCXX/block-nested-in-lambda.mm --- a/clang/test/CodeGenObjCXX/block-nested-in-lambda.mm +++ b/clang/test/CodeGenObjCXX/block-nested-in-lambda.mm @@ -70,7 +70,7 @@ S getS(); -// CHECK: define internal i32 @"_ZZN18CaptureByReference5test2EvENK3$_1clIiEEDaT_"(%[[CLASS_ANON_2]]* %{{.*}}, i32 %{{.*}}) +// CHECK: define internal frozen i32 @"_ZZN18CaptureByReference5test2EvENK3$_1clIiEEDaT_"(%[[CLASS_ANON_2]]* frozen %{{.*}}, i32 frozen %{{.*}}) // CHECK: %[[BLOCK:.*]] = alloca <{ i8*, i32, i32, i8*, %{{.*}}, %[[S]]* }>, align 8 // CHECK: %[[BLOCK_CAPTURED:.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %{{.*}}, %[[S]]* }>, <{ i8*, i32, i32, i8*, %{{.*}}, %[[S]]* }>* %[[BLOCK]], i32 0, i32 5 // CHECK: %[[V0:.*]] = getelementptr inbounds %[[CLASS_ANON_2]], %[[CLASS_ANON_2]]* %{{.*}}, i32 0, i32 0 @@ -87,11 +87,11 @@ return fn(123); } -// CHECK: define internal i32 @"_ZZN18CaptureByReference5test3EvENK3$_2clIiEEDaT_"(%[[CLASS_ANON_3]]* %{{.*}}, i32 %{{.*}}) +// CHECK: define internal frozen i32 @"_ZZN18CaptureByReference5test3EvENK3$_2clIiEEDaT_"(%[[CLASS_ANON_3]]* frozen %{{.*}}, i32 frozen %{{.*}}) // CHECK: %[[BLOCK:.*]] = alloca <{ i8*, i32, i32, i8*, %{{.*}}*, %[[S]] }>, align 8 // CHECK: %[[BLOCK_CAPTURED:.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %{{.*}}*, %[[S]] }>, <{ i8*, i32, i32, i8*, %{{.*}}*, %[[S]] }>* %[[BLOCK]], i32 0, i32 5 // CHECK: %[[V0:.*]] = getelementptr inbounds %[[CLASS_ANON_3]], %[[CLASS_ANON_3]]* %{{.*}}, i32 0, i32 0 -// CHECK: call void @_ZN18CaptureByReference1SC1ERKS0_(%[[S]]* %[[BLOCK_CAPTURED]], %[[S]]* {{.*}} %[[V0]]) +// CHECK: call void @_ZN18CaptureByReference1SC1ERKS0_(%[[S]]* frozen %[[BLOCK_CAPTURED]], %[[S]]* {{.*}} %[[V0]]) int test3() { const S &s = getS(); diff --git a/clang/test/CodeGenObjCXX/copy.mm b/clang/test/CodeGenObjCXX/copy.mm --- a/clang/test/CodeGenObjCXX/copy.mm +++ b/clang/test/CodeGenObjCXX/copy.mm @@ -7,11 +7,11 @@ id x; }; - // CHECK: define [[A:%.*]]* @_ZN5test04testENS_1AE( + // CHECK: define frozen [[A:%.*]]* @_ZN5test04testENS_1AE( // CHECK: alloca // CHECK-NEXT: getelementptr // CHECK-NEXT: store - // CHECK-NEXT: [[CALL:%.*]] = call noalias nonnull i8* @_Znwm( + // CHECK-NEXT: [[CALL:%.*]] = call frozen noalias nonnull i8* @_Znwm( // CHECK-NEXT: bitcast // CHECK-NEXT: bitcast // CHECK-NEXT: bitcast diff --git a/clang/test/CodeGenObjCXX/implicit-copy-assign-operator.mm b/clang/test/CodeGenObjCXX/implicit-copy-assign-operator.mm --- a/clang/test/CodeGenObjCXX/implicit-copy-assign-operator.mm +++ b/clang/test/CodeGenObjCXX/implicit-copy-assign-operator.mm @@ -43,7 +43,7 @@ d1 = d2; } -// CHECK-OBJ-LABEL: define linkonce_odr nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.D* @_ZN1DaSERS_ +// CHECK-OBJ-LABEL: define linkonce_odr frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.D* @_ZN1DaSERS_ // CHECK-OBJ: {{call.*_ZN1AaSERS_}} // CHECK-OBJ: {{call.*_ZN1BaSERS_}} // CHECK-OBJ: {{call.*_ZN1CaSERKS_}} diff --git a/clang/test/CodeGenObjCXX/implicit-copy-constructor.mm b/clang/test/CodeGenObjCXX/implicit-copy-constructor.mm --- a/clang/test/CodeGenObjCXX/implicit-copy-constructor.mm +++ b/clang/test/CodeGenObjCXX/implicit-copy-constructor.mm @@ -41,7 +41,7 @@ D d2(d); } -// CHECK-LABEL: define linkonce_odr void @_ZN1DC1ERS_(%struct.D* %this, %struct.D* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) unnamed_addr +// CHECK-LABEL: define linkonce_odr void @_ZN1DC1ERS_(%struct.D* frozen %this, %struct.D* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) unnamed_addr // CHECK: call void @_ZN1AC1Ev // CHECK: call void @_ZN1CC2ERS_1A // CHECK: call void @_ZN1AD1Ev diff --git a/clang/test/CodeGenObjCXX/inheriting-constructor-cleanup.mm b/clang/test/CodeGenObjCXX/inheriting-constructor-cleanup.mm --- a/clang/test/CodeGenObjCXX/inheriting-constructor-cleanup.mm +++ b/clang/test/CodeGenObjCXX/inheriting-constructor-cleanup.mm @@ -22,7 +22,7 @@ Inheritor({g()}); } // CHECK-LABEL: define void @_Z1fv -// CHECK: %[[TMP:.*]] = call i8* @_Z1gv() +// CHECK: %[[TMP:.*]] = call frozen i8* @_Z1gv() // CHECK: {{.*}} = notail call i8* @llvm.objc.retainAutoreleasedReturnValue(i8* %[[TMP]]) // CHECK: call void (%struct.Base*, i8*, ...) @_ZN4BaseC2E6Strongz(%struct.Base* {{.*}}, i8* {{.*}}) // CHECK-NEXT: call void @_ZN9InheritorD1Ev(%struct.Inheritor* {{.*}}) diff --git a/clang/test/CodeGenObjCXX/lambda-expressions.mm b/clang/test/CodeGenObjCXX/lambda-expressions.mm --- a/clang/test/CodeGenObjCXX/lambda-expressions.mm +++ b/clang/test/CodeGenObjCXX/lambda-expressions.mm @@ -8,16 +8,16 @@ // MRC: @OBJC_METH_VAR_NAME{{.*}} = private unnamed_addr constant [5 x i8] c"copy\00" // MRC: @OBJC_METH_VAR_NAME{{.*}} = private unnamed_addr constant [12 x i8] c"autorelease\00" -// MRC-LABEL: define i32 ()* @_Z1fv( -// MRC-LABEL: define internal i32 ()* @"_ZZ1fvENK3$_0cvU13block_pointerFivEEv" +// MRC-LABEL: define frozen i32 ()* @_Z1fv( +// MRC-LABEL: define internal frozen i32 ()* @"_ZZ1fvENK3$_0cvU13block_pointerFivEEv" // MRC: store i8* bitcast (i8** @_NSConcreteStackBlock to i8*) // MRC: store i8* bitcast (i32 (i8*)* @"___ZZ1fvENK3$_0cvU13block_pointerFivEEv_block_invoke" to i8*) -// MRC: call i32 ()* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to i32 ()* (i8*, i8*)*) -// MRC: call i32 ()* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to i32 ()* (i8*, i8*)*) +// MRC: call frozen i32 ()* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to i32 ()* (i8*, i8*)*) +// MRC: call frozen i32 ()* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to i32 ()* (i8*, i8*)*) // MRC: ret i32 ()* -// ARC-LABEL: define i32 ()* @_Z1fv( -// ARC-LABEL: define internal i32 ()* @"_ZZ1fvENK3$_0cvU13block_pointerFivEEv" +// ARC-LABEL: define frozen i32 ()* @_Z1fv( +// ARC-LABEL: define internal frozen i32 ()* @"_ZZ1fvENK3$_0cvU13block_pointerFivEEv" // ARC: store i8* bitcast (i8** @_NSConcreteStackBlock to i8*) // ARC: store i8* bitcast (i32 (i8*)* @"___ZZ1fvENK3$_0cvU13block_pointerFivEEv_block_invoke" to i8*) // ARC: call i8* @llvm.objc.retainBlock @@ -37,8 +37,8 @@ // ARC: store i8* bitcast (i32 (i8*)* @___Z2f2v_block_invoke to i8*), // ARC: call i8* @llvm.objc.retainBlock // ARC: call void @llvm.objc.release -// ARC-LABEL: define internal i32 @___Z2f2v_block_invoke -// ARC: call i32 @"_ZZ2f2vENK3$_1clEv +// ARC-LABEL: define internal frozen i32 @___Z2f2v_block_invoke +// ARC: call frozen i32 @"_ZZ2f2vENK3$_1clEv template void take_lambda(T &&lambda) { lambda(); } void take_block(void (^block)()) { block(); } @@ -62,11 +62,11 @@ } @end -// ARC: define void @_ZN13LambdaCapture4foo1ERi(i32* nonnull align 4 dereferenceable(4) %{{.*}}) +// ARC: define void @_ZN13LambdaCapture4foo1ERi(i32* frozen nonnull align 4 dereferenceable(4) %{{.*}}) // ARC: %[[CAPTURE0:.*]] = getelementptr inbounds %[[LAMBDACLASS]], %[[LAMBDACLASS]]* %{{.*}}, i32 0, i32 0 // ARC: store i32 %{{.*}}, i32* %[[CAPTURE0]] -// ARC: define internal void @"_ZZN13LambdaCapture4foo1ERiENK3$_3clEv"(%[[LAMBDACLASS]]* %{{.*}}) +// ARC: define internal void @"_ZZN13LambdaCapture4foo1ERiENK3$_3clEv"(%[[LAMBDACLASS]]* frozen %{{.*}}) // ARC: %[[BLOCK:.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }> // ARC: %[[CAPTURE1:.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>* %[[BLOCK]], i32 0, i32 5 // ARC: store i32 %{{.*}}, i32* %[[CAPTURE1]] @@ -79,7 +79,7 @@ // ARC: %[[CAPTURE2:.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>* %{{.*}}, i32 0, i32 5 // ARC: store i32 %{{.*}}, i32* %[[CAPTURE2]] -// ARC: define internal void @"___ZZN13LambdaCapture4foo1ERiENK3$_3clEv_block_invoke_2"(i8* %{{.*}}) +// ARC: define internal void @"___ZZN13LambdaCapture4foo1ERiENK3$_3clEv_block_invoke_2"(i8* frozen %{{.*}}) // ARC: %[[CAPTURE3:.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>* %{{.*}}, i32 0, i32 5 // ARC: %[[V1:.*]] = load i32, i32* %[[CAPTURE3]] // ARC: store i32 %[[V1]], i32* @_ZN13LambdaCapture1iE @@ -100,10 +100,10 @@ } } -// ARC-LABEL: define linkonce_odr i32 ()* @_ZZNK13StaticMembersIfE1fMUlvE_clEvENKUlvE_cvU13block_pointerFivEEv +// ARC-LABEL: define linkonce_odr frozen i32 ()* @_ZZNK13StaticMembersIfE1fMUlvE_clEvENKUlvE_cvU13block_pointerFivEEv // Check lines for BlockInLambda test below -// ARC-LABEL: define internal i32 @___ZZN13BlockInLambda1X1fEvENKUlvE_clEv_block_invoke +// ARC-LABEL: define internal frozen i32 @___ZZN13BlockInLambda1X1fEvENKUlvE_clEv_block_invoke // ARC: [[Y:%.*]] = getelementptr inbounds %"struct.BlockInLambda::X", %"struct.BlockInLambda::X"* {{.*}}, i32 0, i32 1 // ARC-NEXT: [[YVAL:%.*]] = load i32, i32* [[Y]], align 4 // ARC-NEXT: ret i32 [[YVAL]] diff --git a/clang/test/CodeGenObjCXX/lambda-to-block.mm b/clang/test/CodeGenObjCXX/lambda-to-block.mm --- a/clang/test/CodeGenObjCXX/lambda-to-block.mm +++ b/clang/test/CodeGenObjCXX/lambda-to-block.mm @@ -40,18 +40,18 @@ // CHECK: define internal void @[[COPY_HELPER1]] // CHECK: define void @_Z17testHelperMerging8Copyable( -// CHECK: %[[CALL:.*]] = call void ()* @[[CONV_FUNC0:.*]](%[[CLASS_ANON_1]]* -// CHECK: call void @_Z10takesBlockU13block_pointerFvvE(void ()* %[[CALL]]) -// CHECK: %[[CALL1:.*]] = call void ()* @[[CONV_FUNC0]](%[[CLASS_ANON_1]]* -// CHECK: call void @_Z10takesBlockU13block_pointerFvvE(void ()* %[[CALL1]]) -// CHECK: %[[CALL2:.*]] = call void ()* @[[CONV_FUNC1:.*]](%[[CLASS_ANON_2]]* -// CHECK: call void @_Z10takesBlockU13block_pointerFvvE(void ()* %[[CALL2]]) - -// CHECK: define internal void ()* @[[CONV_FUNC0]]( +// CHECK: %[[CALL:.*]] = call frozen void ()* @[[CONV_FUNC0:.*]](%[[CLASS_ANON_1]]* +// CHECK: call void @_Z10takesBlockU13block_pointerFvvE(void ()* frozen %[[CALL]]) +// CHECK: %[[CALL1:.*]] = call frozen void ()* @[[CONV_FUNC0]](%[[CLASS_ANON_1]]* +// CHECK: call void @_Z10takesBlockU13block_pointerFvvE(void ()* frozen %[[CALL1]]) +// CHECK: %[[CALL2:.*]] = call frozen void ()* @[[CONV_FUNC1:.*]](%[[CLASS_ANON_2]]* +// CHECK: call void @_Z10takesBlockU13block_pointerFvvE(void ()* frozen %[[CALL2]]) + +// CHECK: define internal frozen void ()* @[[CONV_FUNC0]]( // CHECK: %[[BLOCK_DESCRIPTOR:.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %[[STRUCT_BLOCK_DESCRIPTOR]]*, %[[CLASS_ANON_1]] }>, <{ i8*, i32, i32, i8*, %[[STRUCT_BLOCK_DESCRIPTOR]]*, %[[CLASS_ANON_1]] }>* %{{.*}}, i32 0, i32 4 // CHECK: store %[[STRUCT_BLOCK_DESCRIPTOR]]* bitcast ({ i64, i64, i8*, i8*, i8*, i8* }* @[[BLOCK_DESC2]] to %[[STRUCT_BLOCK_DESCRIPTOR]]*), %[[STRUCT_BLOCK_DESCRIPTOR]]** %[[BLOCK_DESCRIPTOR]], align 8 -// CHECK: define internal void ()* @[[CONV_FUNC1]]( +// CHECK: define internal frozen void ()* @[[CONV_FUNC1]]( // CHECK: %[[BLOCK_DESCRIPTOR:.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %[[STRUCT_BLOCK_DESCRIPTOR]]*, %[[CLASS_ANON_2]] }>, <{ i8*, i32, i32, i8*, %[[STRUCT_BLOCK_DESCRIPTOR]]*, %[[CLASS_ANON_2]] }>* %{{.*}}, i32 0, i32 4 // CHECK: store %[[STRUCT_BLOCK_DESCRIPTOR]]* bitcast ({ i64, i64, i8*, i8*, i8*, i8* }* @[[BLOCK_DESC3]] to %[[STRUCT_BLOCK_DESCRIPTOR]]*), %[[STRUCT_BLOCK_DESCRIPTOR]]** %[[BLOCK_DESCRIPTOR]], align 8 diff --git a/clang/test/CodeGenObjCXX/literals.mm b/clang/test/CodeGenObjCXX/literals.mm --- a/clang/test/CodeGenObjCXX/literals.mm +++ b/clang/test/CodeGenObjCXX/literals.mm @@ -28,7 +28,7 @@ // CHECK-NEXT: [[TMP_CAST:%.*]] = bitcast {{.*}} [[TMPX]] to i8* // CHECK-NEXT: call void @llvm.lifetime.start.p0i8(i64 1, i8* [[TMP_CAST]]) // CHECK-NEXT: call void @_ZN1XC1Ev({{.*}} [[TMPX]]) - // CHECK-NEXT: [[OBJECT0:%[a-zA-Z0-9.]+]] = invoke i8* @_ZNK1XcvP11objc_objectEv + // CHECK-NEXT: [[OBJECT0:%[a-zA-Z0-9.]+]] = invoke frozen i8* @_ZNK1XcvP11objc_objectEv // CHECK: [[RET0:%[a-zA-Z0-9.]+]] = notail call i8* @llvm.objc.retainAutoreleasedReturnValue(i8* [[OBJECT0]]) // CHECK: store i8* [[RET0]], i8** [[ELEMENT0]] @@ -37,7 +37,7 @@ // CHECK-NEXT: [[TMP_CAST:%.*]] = bitcast {{.*}} [[TMPY]] to i8* // CHECK-NEXT: call void @llvm.lifetime.start.p0i8(i64 1, i8* [[TMP_CAST]]) // CHECK-NEXT: invoke void @_ZN1YC1Ev({{.*}} [[TMPY]]) - // CHECK: [[OBJECT1:%[a-zA-Z0-9.]+]] = invoke i8* @_ZNK1YcvP11objc_objectEv + // CHECK: [[OBJECT1:%[a-zA-Z0-9.]+]] = invoke frozen i8* @_ZNK1YcvP11objc_objectEv // CHECK: [[RET1:%[a-zA-Z0-9.]+]] = notail call i8* @llvm.objc.retainAutoreleasedReturnValue(i8* [[OBJECT1]]) // CHECK: store i8* [[RET1]], i8** [[ELEMENT1]] @@ -82,14 +82,14 @@ // CHECK-NEXT: call void @llvm.lifetime.start.p0i8(i64 8, i8* [[PTR1]]) // CHECK: [[ELEMENT0:%[a-zA-Z0-9.]+]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[OBJECTS]], i64 0, i64 0 // CHECK: call void @_ZN1XC1Ev - // CHECK-NEXT: [[OBJECT0:%[a-zA-Z0-9.]+]] = invoke i8* @_ZNK1XcvP11objc_objectEv + // CHECK-NEXT: [[OBJECT0:%[a-zA-Z0-9.]+]] = invoke frozen i8* @_ZNK1XcvP11objc_objectEv // CHECK: [[RET0:%[a-zA-Z0-9.]+]] = notail call i8* @llvm.objc.retainAutoreleasedReturnValue(i8* [[OBJECT0]]) // CHECK: store i8* [[RET0]], i8** [[ELEMENT0]] // Initializing the second element // CHECK: [[ELEMENT1:%[a-zA-Z0-9.]+]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[OBJECTS]], i64 0, i64 1 // CHECK: invoke void @_ZN1YC1Ev - // CHECK: [[OBJECT1:%[a-zA-Z0-9.]+]] = invoke i8* @_ZNK1YcvP11objc_objectEv + // CHECK: [[OBJECT1:%[a-zA-Z0-9.]+]] = invoke frozen i8* @_ZNK1YcvP11objc_objectEv // CHECK: [[RET1:%[a-zA-Z0-9.]+]] = notail call i8* @llvm.objc.retainAutoreleasedReturnValue(i8* [[OBJECT1]]) // CHECK: store i8* [[RET1]], i8** [[ELEMENT1]] diff --git a/clang/test/CodeGenObjCXX/lvalue-reference-getter.mm b/clang/test/CodeGenObjCXX/lvalue-reference-getter.mm --- a/clang/test/CodeGenObjCXX/lvalue-reference-getter.mm +++ b/clang/test/CodeGenObjCXX/lvalue-reference-getter.mm @@ -24,5 +24,5 @@ // CHECK: [[SELF:%.*]] = alloca [[T6:%.*]]*, align // CHECK: [[T0:%.*]] = load {{.*}}, {{.*}}* [[SELF]], align // CHECK: [[T1:%.*]] = load {{.*}}, {{.*}}* @OBJC_SELECTOR_REFERENCES_ -// CHECK: [[C:%.*]] = call nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.SetSection* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend -// CHECK: call nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) i32* @_ZN10SetSection2atEi(%struct.SetSection* [[C]] +// CHECK: [[C:%.*]] = call frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.SetSection* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend +// CHECK: call frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) i32* @_ZN10SetSection2atEi(%struct.SetSection* frozen [[C]] diff --git a/clang/test/CodeGenObjCXX/mangle-blocks.mm b/clang/test/CodeGenObjCXX/mangle-blocks.mm --- a/clang/test/CodeGenObjCXX/mangle-blocks.mm +++ b/clang/test/CodeGenObjCXX/mangle-blocks.mm @@ -8,7 +8,7 @@ int f(); void foo() { - // CHECK-LABEL: define internal i32 @___Z3foov_block_invoke + // CHECK-LABEL: define internal frozen i32 @___Z3foov_block_invoke // CHECK: call i32 @__cxa_guard_acquire(i64* @_ZGVZZ3foovEUb_E5value (void)^(int x) { static int value = f(); @@ -16,7 +16,7 @@ }; } -// CHECK-LABEL: define internal i32 @i_block_invoke +// CHECK-LABEL: define internal frozen i32 @i_block_invoke int i = ^(int x) { return x;}(i); @interface A @@ -25,7 +25,7 @@ @implementation A - (void)method { - // CHECK: define internal signext i8 @"__11-[A method]_block_invoke" + // CHECK: define internal frozen signext i8 @"__11-[A method]_block_invoke" (void)^(int x) { // CHECK: @"_ZZZ11-[A method]EUb1_E4name" static const char *name = "hello"; @@ -42,7 +42,7 @@ } namespace N { - // CHECK-LABEL: define internal signext i8 @___Z3fooi_block_invoke + // CHECK-LABEL: define internal frozen signext i8 @___Z3fooi_block_invoke void bar() { (void)^(int x) { // CHECK: @_ZZZN1N3barEvEUb3_E4name diff --git a/clang/test/CodeGenObjCXX/mangle.mm b/clang/test/CodeGenObjCXX/mangle.mm --- a/clang/test/CodeGenObjCXX/mangle.mm +++ b/clang/test/CodeGenObjCXX/mangle.mm @@ -34,11 +34,11 @@ // PR6468 @interface Test -- (void) process: (int)r3 :(int)r4 :(int)r5 :(int)r6 :(int)r7 :(int)r8 :(int)r9 :(int)r10 :(int &)i; +- (void) process: (int)r3 frozen :(int)r4 :(int)r5 :(int)r6 :(int)r7 :(int)r8 :(int)r9 :(int)r10 :(int &)i; @end @implementation Test -- (void) process: (int)r3 :(int)r4 :(int)r5 :(int)r6 :(int)r7 :(int)r8 :(int)r9 :(int)r10 :(int &)i { +- (void) process: (int)r3 frozen :(int)r4 :(int)r5 :(int)r6 :(int)r7 :(int)r8 :(int)r9 :(int)r10 :(int &)i { } @end diff --git a/clang/test/CodeGenObjCXX/message-reference.mm b/clang/test/CodeGenObjCXX/message-reference.mm --- a/clang/test/CodeGenObjCXX/message-reference.mm +++ b/clang/test/CodeGenObjCXX/message-reference.mm @@ -15,6 +15,6 @@ } @end -// CHECK: [[T:%.*]] = call nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) i32* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend +// CHECK: [[T:%.*]] = call frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) i32* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend // CHECK: [[U:%.*]] = load i32, i32* [[T]] // CHECK: [[V:%.*]] = icmp eq i32 [[U]], 0 diff --git a/clang/test/CodeGenObjCXX/message.mm b/clang/test/CodeGenObjCXX/message.mm --- a/clang/test/CodeGenObjCXX/message.mm +++ b/clang/test/CodeGenObjCXX/message.mm @@ -16,9 +16,9 @@ } template void foo(); // CHECK-LABEL: define weak_odr void @_ZN5test03fooIiEEvv() - // CHECK: [[T0:%.*]] = call [[TEST0:%.*]]* @_ZN5test01AcvP5Test0Ev( + // CHECK: [[T0:%.*]] = call frozen [[TEST0:%.*]]* @_ZN5test01AcvP5Test0Ev( // CHECK-NEXT: [[T1:%.*]] = load i8*, i8** // CHECK-NEXT: [[T2:%.*]] = bitcast [[TEST0]]* [[T0]] to i8* - // CHECK-NEXT: call void bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to void (i8*, i8*)*)(i8* [[T2]], i8* [[T1]]) + // CHECK-NEXT: call void bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to void (i8*, i8*)*)(i8* frozen [[T2]], i8* frozen [[T1]]) // CHECK-NEXT: ret void } diff --git a/clang/test/CodeGenObjCXX/microsoft-abi-arc-param-order.mm b/clang/test/CodeGenObjCXX/microsoft-abi-arc-param-order.mm --- a/clang/test/CodeGenObjCXX/microsoft-abi-arc-param-order.mm +++ b/clang/test/CodeGenObjCXX/microsoft-abi-arc-param-order.mm @@ -12,9 +12,9 @@ // CHECK-LABEL: define dso_local void @"?test_arc_order@@YAXUA@@PAUobjc_object@@01@Z" // CHECK: (<{ %struct.A, i8*, %struct.A, i8* }>* inalloca %0) void test_arc_order(A a, id __attribute__((ns_consumed)) b , A c, id __attribute__((ns_consumed)) d) { - // CHECK: call x86_thiscallcc void @"??1A@@QAE@XZ"(%struct.A* %{{.*}}) + // CHECK: call x86_thiscallcc void @"??1A@@QAE@XZ"(%struct.A* frozen %{{.*}}) // CHECK: call void @llvm.objc.storeStrong(i8** %{{.*}}, i8* null) - // CHECK: call x86_thiscallcc void @"??1A@@QAE@XZ"(%struct.A* %{{.*}}) + // CHECK: call x86_thiscallcc void @"??1A@@QAE@XZ"(%struct.A* frozen %{{.*}}) // CHECK: call void @llvm.objc.storeStrong(i8** %{{.*}}, i8* null) // CHECK: ret void } diff --git a/clang/test/CodeGenObjCXX/mrc-weak.mm b/clang/test/CodeGenObjCXX/mrc-weak.mm --- a/clang/test/CodeGenObjCXX/mrc-weak.mm +++ b/clang/test/CodeGenObjCXX/mrc-weak.mm @@ -110,7 +110,7 @@ } // CHECK-LABEL: define void @_Z5test7v // CHECK: [[P:%.*]] = alloca [[FOO]]*, -// CHECK: [[T0:%.*]] = call i8* @get_object() +// CHECK: [[T0:%.*]] = call frozen i8* @get_object() // CHECK-NEXT: [[T1:%.*]] = bitcast i8* [[T0]] to [[FOO]]* // CHECK-NEXT: [[T2:%.*]] = bitcast [[FOO]]** [[P]] to i8** // CHECK-NEXT: [[T3:%.*]] = bitcast [[FOO]]* [[T1]] to i8* diff --git a/clang/test/CodeGenObjCXX/objc-container-subscripting.mm b/clang/test/CodeGenObjCXX/objc-container-subscripting.mm --- a/clang/test/CodeGenObjCXX/objc-container-subscripting.mm +++ b/clang/test/CodeGenObjCXX/objc-container-subscripting.mm @@ -50,7 +50,7 @@ // CHECK-LABEL: define void @_Z11static_dataP14NSMutableArray void static_data(NSMutableArray *array) { // CHECK: call i32 @__cxa_guard_acquire - // CHECK: {{call i8*.*@objc_msgSend }} + // CHECK: {{call frozen i8*.*@objc_msgSend }} // CHECK: call void @__cxa_guard_release static id x = array[4]; // CHECK: ret void diff --git a/clang/test/CodeGenObjCXX/objc-struct-cxx-abi.mm b/clang/test/CodeGenObjCXX/objc-struct-cxx-abi.mm --- a/clang/test/CodeGenObjCXX/objc-struct-cxx-abi.mm +++ b/clang/test/CodeGenObjCXX/objc-struct-cxx-abi.mm @@ -1,7 +1,7 @@ -// RUN: %clang_cc1 -triple arm64-apple-ios11 -std=c++11 -fobjc-arc -fobjc-weak -fobjc-runtime-has-weak -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple arm64-apple-ios11 -std=c++11 -fobjc-arc -fobjc-weak -fobjc-runtime-has-weak -fclang-abi-compat=4.0 -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple arm64-apple-ios11 -std=c++11 -fobjc-arc -fobjc-weak -fobjc-runtime-has-weak -emit-llvm -o - -DTRIVIALABI %s | FileCheck %s -// RUN: %clang_cc1 -triple arm64-apple-ios11 -std=c++11 -fobjc-arc -fobjc-weak -fobjc-runtime-has-weak -fclang-abi-compat=4.0 -emit-llvm -o - -DTRIVIALABI %s | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args -triple arm64-apple-ios11 -std=c++11 -fobjc-arc -fobjc-weak -fobjc-runtime-has-weak -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args -triple arm64-apple-ios11 -std=c++11 -fobjc-arc -fobjc-weak -fobjc-runtime-has-weak -fclang-abi-compat=4.0 -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args -triple arm64-apple-ios11 -std=c++11 -fobjc-arc -fobjc-weak -fobjc-runtime-has-weak -emit-llvm -o - -DTRIVIALABI %s | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args -triple arm64-apple-ios11 -std=c++11 -fobjc-arc -fobjc-weak -fobjc-runtime-has-weak -fclang-abi-compat=4.0 -emit-llvm -o - -DTRIVIALABI %s | FileCheck %s // Check that structs consisting solely of __strong or __weak pointer fields are // destructed in the callee function and structs consisting solely of __strong @@ -70,7 +70,7 @@ }; // CHECK: define void @_Z19testParamStrongWeak10StrongWeak(%[[STRUCT_STRONGWEAK]]* %{{.*}}) -// CHECK: call %struct.StrongWeak* @_ZN10StrongWeakD1Ev( +// CHECK: call frozen %struct.StrongWeak* @_ZN10StrongWeakD1Ev( // CHECK-NEXT: ret void void testParamStrongWeak(StrongWeak a) { @@ -81,7 +81,7 @@ // CHECK: %[[AGG_TMP:.*]] = alloca %[[STRUCT_STRONGWEAK]], align 8 // CHECK: store %[[STRUCT_STRONGWEAK]]* %[[A]], %[[STRUCT_STRONGWEAK]]** %[[A_ADDR]], align 8 // CHECK: %[[V0:.*]] = load %[[STRUCT_STRONGWEAK]]*, %[[STRUCT_STRONGWEAK]]** %[[A_ADDR]], align 8 -// CHECK: %[[CALL:.*]] = call %[[STRUCT_STRONGWEAK]]* @_ZN10StrongWeakC1ERKS_(%[[STRUCT_STRONGWEAK]]* %[[AGG_TMP]], %[[STRUCT_STRONGWEAK]]* nonnull align 8 dereferenceable(16) %[[V0]]) +// CHECK: %[[CALL:.*]] = call frozen %[[STRUCT_STRONGWEAK]]* @_ZN10StrongWeakC1ERKS_(%[[STRUCT_STRONGWEAK]]* %[[AGG_TMP]], %[[STRUCT_STRONGWEAK]]* nonnull align 8 dereferenceable(16) %[[V0]]) // CHECK: call void @_Z19testParamStrongWeak10StrongWeak(%[[STRUCT_STRONGWEAK]]* %[[AGG_TMP]]) // CHECK-NOT: call // CHECK: ret void @@ -94,7 +94,7 @@ // CHECK: %[[A_ADDR:.*]] = alloca %[[STRUCT_STRONGWEAK]]*, align 8 // CHECK: store %[[STRUCT_STRONGWEAK]]* %[[A]], %[[STRUCT_STRONGWEAK]]** %[[A_ADDR]], align 8 // CHECK: %[[V0:.*]] = load %[[STRUCT_STRONGWEAK]]*, %[[STRUCT_STRONGWEAK]]** %[[A_ADDR]], align 8 -// CHECK: %[[CALL:.*]] = call %[[STRUCT_STRONGWEAK]]* @_ZN10StrongWeakC1ERKS_(%[[STRUCT_STRONGWEAK]]* %[[AGG_RESULT]], %[[STRUCT_STRONGWEAK]]* nonnull align 8 dereferenceable(16) %[[V0]]) +// CHECK: %[[CALL:.*]] = call frozen %[[STRUCT_STRONGWEAK]]* @_ZN10StrongWeakC1ERKS_(%[[STRUCT_STRONGWEAK]]* %[[AGG_RESULT]], %[[STRUCT_STRONGWEAK]]* nonnull align 8 dereferenceable(16) %[[V0]]) // CHECK: ret void StrongWeak testReturnStrongWeak(StrongWeak *a) { @@ -102,13 +102,13 @@ } // CHECK: define void @_Z27testParamContainsStrongWeak18ContainsStrongWeak(%[[STRUCT_CONTAINSSTRONGWEAK]]* %[[A:.*]]) -// CHECK: call %[[STRUCT_CONTAINSSTRONGWEAK]]* @_ZN18ContainsStrongWeakD1Ev(%[[STRUCT_CONTAINSSTRONGWEAK]]* %[[A]]) +// CHECK: call frozen %[[STRUCT_CONTAINSSTRONGWEAK]]* @_ZN18ContainsStrongWeakD1Ev(%[[STRUCT_CONTAINSSTRONGWEAK]]* %[[A]]) void testParamContainsStrongWeak(ContainsStrongWeak a) { } // CHECK: define void @_Z26testParamDerivedStrongWeak17DerivedStrongWeak(%[[STRUCT_DERIVEDSTRONGWEAK]]* %[[A:.*]]) -// CHECK: call %[[STRUCT_DERIVEDSTRONGWEAK]]* @_ZN17DerivedStrongWeakD1Ev(%[[STRUCT_DERIVEDSTRONGWEAK]]* %[[A]]) +// CHECK: call frozen %[[STRUCT_DERIVEDSTRONGWEAK]]* @_ZN17DerivedStrongWeakD1Ev(%[[STRUCT_DERIVEDSTRONGWEAK]]* %[[A]]) void testParamDerivedStrongWeak(DerivedStrongWeak a) { } @@ -118,10 +118,10 @@ // CHECK: %[[COERCE_DIVE:.*]] = getelementptr inbounds %[[STRUCT_STRONG]], %[[STRUCT_STRONG]]* %[[A]], i32 0, i32 0 // CHECK: %[[COERCE_VAL_IP:.*]] = inttoptr i64 %[[A_COERCE]] to i8* // CHECK: store i8* %[[COERCE_VAL_IP]], i8** %[[COERCE_DIVE]], align 8 -// CHECK: %[[CALL:.*]] = call %[[STRUCT_STRONG]]* @_ZN6StrongD1Ev(%[[STRUCT_STRONG]]* %[[A]]) +// CHECK: %[[CALL:.*]] = call frozen %[[STRUCT_STRONG]]* @_ZN6StrongD1Ev(%[[STRUCT_STRONG]]* %[[A]]) // CHECK: ret void -// CHECK: define linkonce_odr %[[STRUCT_STRONG]]* @_ZN6StrongD1Ev( +// CHECK: define linkonce_odr frozen %[[STRUCT_STRONG]]* @_ZN6StrongD1Ev( void testParamStrong(Strong a) { } @@ -131,7 +131,7 @@ // CHECK: %[[AGG_TMP:.*]] = alloca %[[STRUCT_STRONG]], align 8 // CHECK: store %[[STRUCT_STRONG]]* %[[A]], %[[STRUCT_STRONG]]** %[[A_ADDR]], align 8 // CHECK: %[[V0:.*]] = load %[[STRUCT_STRONG]]*, %[[STRUCT_STRONG]]** %[[A_ADDR]], align 8 -// CHECK: %[[CALL:.*]] = call %[[STRUCT_STRONG]]* @_ZN6StrongC1ERKS_(%[[STRUCT_STRONG]]* %[[AGG_TMP]], %[[STRUCT_STRONG]]* nonnull align 8 dereferenceable(8) %[[V0]]) +// CHECK: %[[CALL:.*]] = call frozen %[[STRUCT_STRONG]]* @_ZN6StrongC1ERKS_(%[[STRUCT_STRONG]]* %[[AGG_TMP]], %[[STRUCT_STRONG]]* nonnull align 8 dereferenceable(8) %[[V0]]) // CHECK: %[[COERCE_DIVE:.*]] = getelementptr inbounds %[[STRUCT_STRONG]], %[[STRUCT_STRONG]]* %[[AGG_TMP]], i32 0, i32 0 // CHECK: %[[V1:.*]] = load i8*, i8** %[[COERCE_DIVE]], align 8 // CHECK: %[[COERCE_VAL_PI:.*]] = ptrtoint i8* %[[V1]] to i64 @@ -147,7 +147,7 @@ // CHECK: %[[A_ADDR:.*]] = alloca %[[STRUCT_STRONG]]*, align 8 // CHECK: store %[[STRUCT_STRONG]]* %[[A]], %[[STRUCT_STRONG]]** %[[A_ADDR]], align 8 // CHECK: %[[V0:.*]] = load %[[STRUCT_STRONG]]*, %[[STRUCT_STRONG]]** %[[A_ADDR]], align 8 -// CHECK: %[[CALL:.*]] = call %[[STRUCT_STRONG]]* @_ZN6StrongC1ERKS_(%[[STRUCT_STRONG]]* %[[RETVAL]], %[[STRUCT_STRONG]]* nonnull align 8 dereferenceable(8) %[[V0]]) +// CHECK: %[[CALL:.*]] = call frozen %[[STRUCT_STRONG]]* @_ZN6StrongC1ERKS_(%[[STRUCT_STRONG]]* %[[RETVAL]], %[[STRUCT_STRONG]]* nonnull align 8 dereferenceable(8) %[[V0]]) // CHECK: %[[COERCE_DIVE:.*]] = getelementptr inbounds %[[STRUCT_STRONG]], %[[STRUCT_STRONG]]* %[[RETVAL]], i32 0, i32 0 // CHECK: %[[V1:.*]] = load i8*, i8** %[[COERCE_DIVE]], align 8 // CHECK: %[[COERCE_VAL_PI:.*]] = ptrtoint i8* %[[V1]] to i64 @@ -158,7 +158,7 @@ } // CHECK: define void @_Z21testParamWeakTemplate1SIU6__weakP11objc_objectE(%[[STRUCT_S]]* %{{.*}}) -// CHECK: call %struct.S* @_ZN1SIU6__weakP11objc_objectED1Ev( +// CHECK: call frozen %struct.S* @_ZN1SIU6__weakP11objc_objectED1Ev( // CHECK-NEXT: ret void void testParamWeakTemplate(S<__weak id> a) { @@ -173,7 +173,7 @@ // CHECK: define void @_Z26testCallContainsNonTrivialP18ContainsNonTrivial( // CHECK: call void @_Z27testParamContainsNonTrivial18ContainsNonTrivial(%[[STRUCT_CONTAINSNONTRIVIAL]]* %{{.*}}) -// CHECK: call %struct.ContainsNonTrivial* @_ZN18ContainsNonTrivialD1Ev(%[[STRUCT_CONTAINSNONTRIVIAL]]* %{{.*}}) +// CHECK: call frozen %struct.ContainsNonTrivial* @_ZN18ContainsNonTrivialD1Ev(%[[STRUCT_CONTAINSNONTRIVIAL]]* %{{.*}}) void testCallContainsNonTrivial(ContainsNonTrivial *a) { testParamContainsNonTrivial(*a); diff --git a/clang/test/CodeGenObjCXX/objc-weak.mm b/clang/test/CodeGenObjCXX/objc-weak.mm --- a/clang/test/CodeGenObjCXX/objc-weak.mm +++ b/clang/test/CodeGenObjCXX/objc-weak.mm @@ -12,7 +12,7 @@ } // Copy Assignment Operator -// CHECK-LABEL: define linkonce_odr nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.A* @_ZN1AaSERKS_( +// CHECK-LABEL: define linkonce_odr frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.A* @_ZN1AaSERKS_( // CHECK: [[THISADDR:%this.*]] = alloca [[A:.*]]* // CHECK: [[OBJECTADDR:%.*]] = alloca [[A:.*]]* // CHECK: [[THIS:%this.*]] = load [[A]]*, [[A]]** [[THISADDR]] @@ -23,7 +23,7 @@ // CHECK-NEXT: [[T3:%.*]] = call i8* @llvm.objc.storeWeak(i8** [[T2]], i8* [[T1]]) // Move Assignment Operator -// CHECK-LABEL: define linkonce_odr nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.A* @_ZN1AaSEOS_( +// CHECK-LABEL: define linkonce_odr frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.A* @_ZN1AaSEOS_( // CHECK: [[THISADDR:%this.*]] = alloca [[A:.*]]* // CHECK: [[OBJECTADDR:%.*]] = alloca [[A:.*]]* // CHECK: [[THIS:%this.*]] = load [[A]]*, [[A]]** [[THISADDR]] diff --git a/clang/test/CodeGenObjCXX/property-dot-copy-elision.mm b/clang/test/CodeGenObjCXX/property-dot-copy-elision.mm --- a/clang/test/CodeGenObjCXX/property-dot-copy-elision.mm +++ b/clang/test/CodeGenObjCXX/property-dot-copy-elision.mm @@ -22,9 +22,9 @@ // CHECK: %{{.*}} = alloca % // CHECK: %[[AGG_TMP:.*]] = alloca %[[STRUCT_S1:.*]], align // CHECK: %[[AGG_TMP_1:.*]] = alloca %[[STRUCT_S0:.*]], align -// CHECK: call void @_ZN2S0C1Ev(%[[STRUCT_S0]]* %[[AGG_TMP_1]]) -// CHECK: call void @_ZN2S1C1E2S0(%[[STRUCT_S1]]* %[[AGG_TMP]], %[[STRUCT_S0]]* %[[AGG_TMP_1]]) -// CHECK: call void bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to void (i8*, i8*, %[[STRUCT_S1]]*)*)(i8* %{{.*}}, i8* %{{.*}}, %[[STRUCT_S1]]* %[[AGG_TMP]]) +// CHECK: call void @_ZN2S0C1Ev(%[[STRUCT_S0]]* frozen %[[AGG_TMP_1]]) +// CHECK: call void @_ZN2S1C1E2S0(%[[STRUCT_S1]]* frozen %[[AGG_TMP]], %[[STRUCT_S0]]* frozen %[[AGG_TMP_1]]) +// CHECK: call void bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to void (i8*, i8*, %[[STRUCT_S1]]*)*)(i8* frozen %{{.*}}, i8* frozen %{{.*}}, %[[STRUCT_S1]]* frozen %[[AGG_TMP]]) void test0(C *c) { c.f = S0(); @@ -33,8 +33,8 @@ // CHECK: define void @_Z5test1P1C( // CHECK: %{{.*}} = alloca % // CHECK: %[[TEMP_LVALUE:.*]] = alloca %[[STRUCT_S1:.*]], align -// CHECK: call void @_ZN2S1C1Ev(%[[STRUCT_S1]]* %[[TEMP_LVALUE]]) -// CHECK: call void bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to void (i8*, i8*, %[[STRUCT_S1]]*)*)(i8* %{{.*}}, i8* %{{.*}}, %[[STRUCT_S1]]* %[[TEMP_LVALUE]]) +// CHECK: call void @_ZN2S1C1Ev(%[[STRUCT_S1]]* frozen %[[TEMP_LVALUE]]) +// CHECK: call void bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to void (i8*, i8*, %[[STRUCT_S1]]*)*)(i8* frozen %{{.*}}, i8* frozen %{{.*}}, %[[STRUCT_S1]]* frozen %[[TEMP_LVALUE]]) void test1(C *c) { c.f = S1(); diff --git a/clang/test/CodeGenObjCXX/property-dot-reference.mm b/clang/test/CodeGenObjCXX/property-dot-reference.mm --- a/clang/test/CodeGenObjCXX/property-dot-reference.mm +++ b/clang/test/CodeGenObjCXX/property-dot-reference.mm @@ -11,8 +11,8 @@ @implementation TNodeIconAndNameCell - (const TFENode&) node { -// CHECK: call nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.TFENode* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend -// CHECK-NEXT: call void @_ZNK7TFENode6GetURLEv(%struct.TFENode* %{{.*}}) +// CHECK: call frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.TFENode* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend +// CHECK-NEXT: call void @_ZNK7TFENode6GetURLEv(%struct.TFENode* frozen %{{.*}}) self.node.GetURL(); } // expected-warning {{non-void function does not return a value}} @end @@ -27,12 +27,12 @@ - (const X&) target; @end void f1(A *a) { -// CHECK: [[PRP:%.*]] = call nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.X* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend -// CHECK-NEXT:call void @_Z2f0RK1X(%struct.X* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[PRP]]) +// CHECK: [[PRP:%.*]] = call frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.X* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend +// CHECK-NEXT:call void @_Z2f0RK1X(%struct.X* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[PRP]]) f0(a.target); -// CHECK: [[MSG:%.*]] = call nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.X* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend -// CHECK-NEXT:call void @_Z2f0RK1X(%struct.X* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[MSG]]) +// CHECK: [[MSG:%.*]] = call frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.X* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend +// CHECK-NEXT:call void @_Z2f0RK1X(%struct.X* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[MSG]]) f0([a target]); } @@ -51,12 +51,12 @@ void(obj.myGetter); } // CHECK-LABEL: define void @_Z5test2v() -// CHECK: call i32 bitcast -// CHECK: call double bitcast -// CHECK: call i32 bitcast -// CHECK: call double bitcast -// CHECK: call i32 bitcast -// CHECK: call double bitcast +// CHECK: call frozen i32 bitcast +// CHECK: call frozen double bitcast +// CHECK: call frozen i32 bitcast +// CHECK: call frozen double bitcast +// CHECK: call frozen i32 bitcast +// CHECK: call frozen double bitcast // PR8751 int test3(Test2 *obj) { return obj.myProperty; } diff --git a/clang/test/CodeGenObjCXX/property-lvalue-capture.mm b/clang/test/CodeGenObjCXX/property-lvalue-capture.mm --- a/clang/test/CodeGenObjCXX/property-lvalue-capture.mm +++ b/clang/test/CodeGenObjCXX/property-lvalue-capture.mm @@ -26,10 +26,10 @@ // CHECK: [[TWO:%.*]] = load i8*, i8** @OBJC_SELECTOR_REFERENCES_, align 8, !invariant.load ![[MD_NUM:[0-9]+]] // CHECK: [[THREE:%.*]] = bitcast [[ONET:%.*]]* [[ONE:%.*]] to i8* -// CHECK: [[CALL:%.*]] = call nonnull align 1 %struct.Quad2* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to %struct.Quad2* (i8*, i8*)*)(i8* [[THREE]], i8* [[TWO]]) +// CHECK: [[CALL:%.*]] = call frozen nonnull align 1 %struct.Quad2* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to %struct.Quad2* (i8*, i8*)*)(i8* frozen [[THREE]], i8* frozen [[TWO]]) // CHECK: [[FOUR:%.*]] = load i8*, i8** @OBJC_SELECTOR_REFERENCES_.2, align 8, !invariant.load ![[MD_NUM]] // CHECK: [[FIVE:%.*]] = bitcast [[ONET]]* [[ZERO:%.*]] to i8* -// CHECK: call void bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to void (i8*, i8*, %struct.Quad2*)*)(i8* [[FIVE]], i8* [[FOUR]], %struct.Quad2* nonnull align 1 [[CALL]]) +// CHECK: call void bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to void (i8*, i8*, %struct.Quad2*)*)(i8* frozen [[FIVE]], i8* frozen [[FOUR]], %struct.Quad2* frozen nonnull align 1 [[CALL]]) struct A { @@ -49,5 +49,5 @@ // CHECK: [[ONE1:%.*]] = load %struct.A*, %struct.A** [[AADDR:%.*]], align 8 // CHECK: [[TWO1:%.*]] = load i8*, i8** @OBJC_SELECTOR_REFERENCES_.5, align 8, !invariant.load ![[MD_NUM]] // CHECK: [[THREE1:%.*]] = bitcast [[TWOT:%.*]]* [[ZERO1:%.*]] to i8* -// CHECK: call void bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to void (i8*, i8*, %struct.A*)*)(i8* [[THREE1]], i8* [[TWO1]], %struct.A* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[ONE1]]) +// CHECK: call void bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to void (i8*, i8*, %struct.A*)*)(i8* frozen [[THREE1]], i8* frozen [[TWO1]], %struct.A* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[ONE1]]) // CHECK: store %struct.A* [[ONE1]], %struct.A** [[RESULT:%.*]], align 8 diff --git a/clang/test/CodeGenObjCXX/property-lvalue-lambda.mm b/clang/test/CodeGenObjCXX/property-lvalue-lambda.mm --- a/clang/test/CodeGenObjCXX/property-lvalue-lambda.mm +++ b/clang/test/CodeGenObjCXX/property-lvalue-lambda.mm @@ -19,12 +19,12 @@ // Check that we call lambda.operator blk_t(), and that we send that result to // the setter. - // CHECK: [[CALL:%.*]] = call void ()* @"_ZZ2t1P1XENK3$_0cvU13block_pointerFvvEEv" - // CHECK: call void{{.*}}@objc_msgSend{{.*}}({{.*}} void ()* [[CALL]]) + // CHECK: [[CALL:%.*]] = call frozen void ()* @"_ZZ2t1P1XENK3$_0cvU13block_pointerFvvEEv" + // CHECK: call void{{.*}}@objc_msgSend{{.*}}({{.*}} void ()* frozen [[CALL]]) x.blk = [] {}; - // CHECK: [[CALL2:%.*]] = call void ()* @"_ZZ2t1P1XENK3$_1cvPFvvEEv" - // CHECK: call void{{.*}}@objc_msgSend{{.*}}({{.*}} void ()* [[CALL2]]) + // CHECK: [[CALL2:%.*]] = call frozen void ()* @"_ZZ2t1P1XENK3$_1cvPFvvEEv" + // CHECK: call void{{.*}}@objc_msgSend{{.*}}({{.*}} void ()* frozen [[CALL2]]) x.fnptr = [] {}; } @@ -35,13 +35,13 @@ // [x setBlk: operator+([x blk], [] {})] - // CHECK: call void{{.*}}@objc_msgSend{{.*}} - // CHECK: [[PLUS:%.*]] = call void ()* @"_ZplIZ2t2P1XE3$_2EU13block_pointerFvvES4_T_" + // CHECK: call frozen void{{.*}}@objc_msgSend{{.*}} + // CHECK: [[PLUS:%.*]] = call frozen void ()* @"_ZplIZ2t2P1XE3$_2EU13block_pointerFvvES4_T_" // CHECK: call void{{.*}}@objc_msgSend{{.*}}({{.*}} [[PLUS]]) x.blk += [] {}; - // CHECK: call void{{.*}}@objc_msgSend{{.*}} - // CHECK: [[PLUS:%.*]] = call void ()* @"_ZplIZ2t2P1XE3$_3EPFvvES4_T_" + // CHECK: call frozen void{{.*}}@objc_msgSend{{.*}} + // CHECK: [[PLUS:%.*]] = call frozen void ()* @"_ZplIZ2t2P1XE3$_3EPFvvES4_T_" // CHECK: call void{{.*}}@objc_msgSend{{.*}}({{.*}} [[PLUS]]) x.fnptr += [] {}; } diff --git a/clang/test/CodeGenObjCXX/property-object-reference-1.mm b/clang/test/CodeGenObjCXX/property-object-reference-1.mm --- a/clang/test/CodeGenObjCXX/property-object-reference-1.mm +++ b/clang/test/CodeGenObjCXX/property-object-reference-1.mm @@ -28,4 +28,4 @@ // CHECK: store %struct.TCPPObject* [[cppObject:%.*]], %struct.TCPPObject** [[cppObjectaddr]], align 8 // CHECK: [[THREE:%.*]] = load %struct.TCPPObject*, %struct.TCPPObject** [[cppObjectaddr]], align 8 // CHECK: [[FOUR:%.*]] = bitcast %struct.TCPPObject* [[THREE]] to i8* -// CHECK: call void @objc_copyStruct(i8* [[TWO:%.*]], i8* [[FOUR]], i64 256, i1 zeroext true, i1 zeroext false) +// CHECK: call void @objc_copyStruct(i8* frozen [[TWO:%.*]], i8* frozen [[FOUR]], i64 frozen 256, i1 frozen zeroext true, i1 frozen zeroext false) diff --git a/clang/test/CodeGenObjCXX/property-object-reference-2.mm b/clang/test/CodeGenObjCXX/property-object-reference-2.mm --- a/clang/test/CodeGenObjCXX/property-object-reference-2.mm +++ b/clang/test/CodeGenObjCXX/property-object-reference-2.mm @@ -29,31 +29,31 @@ @synthesize MyProperty1 = _cppObject1; @end -// CHECK-LABEL: define internal void @__copy_helper_atomic_property_(%struct.TCPPObject* %0, %struct.TCPPObject* %1) # +// CHECK-LABEL: define internal void @__copy_helper_atomic_property_(%struct.TCPPObject* frozen %0, %struct.TCPPObject* frozen %1) # // CHECK: [[TWO:%.*]] = load %struct.TCPPObject*, %struct.TCPPObject** [[ADDR:%.*]], align 8 // CHECK: [[THREE:%.*]] = load %struct.TCPPObject*, %struct.TCPPObject** [[ADDR1:%.*]], align 8 -// CHECK: [[CALL:%.*]] = call i32 @_Z7DEFAULTv() -// CHECK: call void @_ZN10TCPPObjectC1ERKS_i(%struct.TCPPObject* [[TWO]], %struct.TCPPObject* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[THREE]], i32 [[CALL]]) +// CHECK: [[CALL:%.*]] = call frozen i32 @_Z7DEFAULTv() +// CHECK: call void @_ZN10TCPPObjectC1ERKS_i(%struct.TCPPObject* frozen [[TWO]], %struct.TCPPObject* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[THREE]], i32 frozen [[CALL]]) // CHECK: ret void // CHECK: define internal void @"\01-[MyDocument MyProperty]"( // CHECK: [[ONE:%.*]] = bitcast i8* [[ADDPTR:%.*]] to %struct.TCPPObject* // CHECK: [[TWO:%.*]] = bitcast %struct.TCPPObject* [[ONE]] to i8* // CHECK: [[THREE:%.*]] = bitcast %struct.TCPPObject* [[AGGRESULT:%.*]] to i8* -// CHECK: call void @objc_copyCppObjectAtomic(i8* [[THREE]], i8* [[TWO]], i8* bitcast (void (%struct.TCPPObject*, %struct.TCPPObject*)* @__copy_helper_atomic_property_ to i8*)) +// CHECK: call void @objc_copyCppObjectAtomic(i8* frozen [[THREE]], i8* frozen [[TWO]], i8* frozen bitcast (void (%struct.TCPPObject*, %struct.TCPPObject*)* @__copy_helper_atomic_property_ to i8*)) // CHECK: ret void -// CHECK-LABEL: define internal void @__assign_helper_atomic_property_(%struct.TCPPObject* %0, %struct.TCPPObject* %1) # +// CHECK-LABEL: define internal void @__assign_helper_atomic_property_(%struct.TCPPObject* frozen %0, %struct.TCPPObject* frozen %1) # // CHECK: [[THREE:%.*]] = load %struct.TCPPObject*, %struct.TCPPObject** [[ADDR1:%.*]], align 8 // CHECK: [[TWO:%.*]] = load %struct.TCPPObject*, %struct.TCPPObject** [[ADDR:%.*]], align 8 -// CHECK: [[CALL:%.*]] = call nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.TCPPObject* @_ZN10TCPPObjectaSERKS_(%struct.TCPPObject* [[TWO]], %struct.TCPPObject* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[THREE]]) +// CHECK: [[CALL:%.*]] = call frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.TCPPObject* @_ZN10TCPPObjectaSERKS_(%struct.TCPPObject* frozen [[TWO]], %struct.TCPPObject* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[THREE]]) // CHECK: ret void // CHECK: define internal void @"\01-[MyDocument setMyProperty:]"( // CHECK: [[ONE:%.*]] = bitcast i8* [[ADDRPTR:%.*]] to %struct.TCPPObject* // CHECK: [[TWO:%.*]] = bitcast %struct.TCPPObject* [[ONE]] to i8* // CHECK: [[THREE:%.*]] = bitcast %struct.TCPPObject* [[MYPROPERTY:%.*]] to i8* -// CHECK: call void @objc_copyCppObjectAtomic(i8* [[TWO]], i8* [[THREE]], i8* bitcast (void (%struct.TCPPObject*, %struct.TCPPObject*)* @__assign_helper_atomic_property_ to i8*)) +// CHECK: call void @objc_copyCppObjectAtomic(i8* frozen [[TWO]], i8* frozen [[THREE]], i8* frozen bitcast (void (%struct.TCPPObject*, %struct.TCPPObject*)* @__assign_helper_atomic_property_ to i8*)) // CHECK: ret void // CHECK-GNUSTEP: objc_getCppObjectAtomic diff --git a/clang/test/CodeGenObjCXX/property-objects.mm b/clang/test/CodeGenObjCXX/property-objects.mm --- a/clang/test/CodeGenObjCXX/property-objects.mm +++ b/clang/test/CodeGenObjCXX/property-objects.mm @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 %s -triple=x86_64-apple-darwin10 -std=c++11 -emit-llvm -debug-info-kind=limited -o - | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args %s -triple=x86_64-apple-darwin10 -std=c++11 -emit-llvm -debug-info-kind=limited -o - | FileCheck %s class S { public: @@ -32,7 +32,7 @@ @synthesize frame; // CHECK: define internal void @"\01-[I setPosition:]" -// CHECK: call nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %class.S* @_ZN1SaSERKS_ +// CHECK: call frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %class.S* @_ZN1SaSERKS_ // CHECK-NEXT: ret void // Don't attach debug locations to the prologue instructions. These were @@ -59,7 +59,7 @@ @end -// CHECK-LABEL: define i32 @main +// CHECK-LABEL: define frozen i32 @main // CHECK: call void @_ZN1SC1ERKS_(%class.S* [[AGGTMP:%[a-zA-Z0-9\.]+]], %class.S* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) {{%[a-zA-Z0-9\.]+}}) // CHECK: call void bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to void (i8*, i8*, %class.S*)*)(i8* {{%[a-zA-Z0-9\.]+}}, i8* {{%[a-zA-Z0-9\.]+}}, %class.S* [[AGGTMP]]) // CHECK-NEXT: ret i32 0 @@ -120,7 +120,7 @@ // CHECK: [[BVAR:%.*]] = alloca [[B]]*, align 8 // CHECK: [[TEMP:%.*]] = alloca [[B0:%.*]], align 8 // CHECK: [[X:%.*]] = getelementptr inbounds [[B0]], [[B0]]* [[TEMP]], i32 0, i32 0 -// CHECK-NEXT: [[T0:%.*]] = call i32 @_Z9b_makeIntv() +// CHECK-NEXT: [[T0:%.*]] = call frozen i32 @_Z9b_makeIntv() // CHECK-NEXT: [[T1:%.*]] = sext i32 [[T0]] to i64 // CHECK-NEXT: store i64 [[T1]], i64* [[X]], align 8 // CHECK: load [[B]]*, [[B]]** [[BVAR]] @@ -139,7 +139,7 @@ // CHECK-NOT: call // CHECK: store i64 [[T0]], // CHECK-NOT: call -// CHECK: [[T0:%.*]] = call i32 @_Z9b_makeIntv() +// CHECK: [[T0:%.*]] = call frozen i32 @_Z9b_makeIntv() // CHECK-NEXT: [[T1:%.*]] = sext i32 [[T0]] to i64 // CHECK-NEXT: store i64 [[T1]], i64* {{.*}}, align 8 // CHECK-NOT: call diff --git a/clang/test/CodeGenObjCXX/property-reference.mm b/clang/test/CodeGenObjCXX/property-reference.mm --- a/clang/test/CodeGenObjCXX/property-reference.mm +++ b/clang/test/CodeGenObjCXX/property-reference.mm @@ -26,7 +26,7 @@ const MyStruct& currentMyStruct = myClass.foo; } -// CHECK: [[C:%.*]] = call nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.MyStruct* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend +// CHECK: [[C:%.*]] = call frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.MyStruct* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend // CHECK: store %struct.MyStruct* [[C]], %struct.MyStruct** [[D:%.*]] namespace test1 { @@ -40,7 +40,7 @@ @implementation Test1 @synthesize prop1 = ivar; @end -// CHECK: define internal nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[A:%.*]]* @"\01-[Test1 prop1]"( +// CHECK: define internal frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[A:%.*]]* @"\01-[Test1 prop1]"( // CHECK: [[SELF:%.*]] = alloca [[TEST1:%.*]]*, align 8 // CHECK: [[T0:%.*]] = load [[TEST1]]*, [[TEST1]]** [[SELF]] // CHECK-NEXT: [[T1:%.*]] = bitcast [[TEST1]]* [[T0]] to i8* @@ -49,7 +49,7 @@ // CHECK-NEXT: ret [[A]]* [[T3]] // CHECK: define internal void @"\01-[Test1 setProp1:]"( -// CHECK: call nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[A]]* @_ZN5test11AaSERKS0_( +// CHECK: call frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[A]]* @_ZN5test11AaSERKS0_( // CHECK-NEXT: ret void // rdar://problem/10497174 diff --git a/clang/test/CodeGenObjCXX/selector-expr-lvalue.mm b/clang/test/CodeGenObjCXX/selector-expr-lvalue.mm --- a/clang/test/CodeGenObjCXX/selector-expr-lvalue.mm +++ b/clang/test/CodeGenObjCXX/selector-expr-lvalue.mm @@ -13,7 +13,7 @@ // CHECK-LABEL: define internal void @"\01-[NSObject Meth]"( - (void)Meth { -// CHECK: call void bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to void (i8*, i8*, i8**, i8**)*){{.*}}, i8** @[[setpriosel]]) +// CHECK: call void bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to void (i8*, i8*, i8**, i8**)*){{.*}}, i8** frozen @[[setpriosel]]) [self respondsToSelector:@selector(setPriority:) ps:&@selector(setPriority:)]; } - (void)setPriority:(int)p { diff --git a/clang/test/CodeGenObjCXX/synthesized-property-cleanup.mm b/clang/test/CodeGenObjCXX/synthesized-property-cleanup.mm --- a/clang/test/CodeGenObjCXX/synthesized-property-cleanup.mm +++ b/clang/test/CodeGenObjCXX/synthesized-property-cleanup.mm @@ -10,7 +10,7 @@ // CHECK: define {{.*}}@"\01-[MyData setData:]" // CHECK: [[DATA:%.*]] = alloca %struct.Data -// CHECK: call %struct.Data* @_ZN4DataD1Ev(%struct.Data* [[DATA]]){{.*}}, !dbg [[DATA_PROPERTY_LOC:![0-9]+]] +// CHECK: call frozen %struct.Data* @_ZN4DataD1Ev(%struct.Data* frozen [[DATA]]){{.*}}, !dbg [[DATA_PROPERTY_LOC:![0-9]+]] // CHECK-NEXT: ret void // CHECK: define {{.*}}@"\01-[MyData string]" diff --git a/clang/test/CodeGenObjCXX/ubsan-nullability-return-notypeloc.mm b/clang/test/CodeGenObjCXX/ubsan-nullability-return-notypeloc.mm --- a/clang/test/CodeGenObjCXX/ubsan-nullability-return-notypeloc.mm +++ b/clang/test/CodeGenObjCXX/ubsan-nullability-return-notypeloc.mm @@ -2,8 +2,8 @@ // CHECK: [[ATTR_LOC:@[0-9]+]] = {{.*}} global { {{.*}} i32 15, i32 38 -// CHECK-LABEL: define i8* @_Z3foov() -// CHECK: [[CALL:%.*]] = call i8* @_Z6helperv() +// CHECK-LABEL: define frozen i8* @_Z3foov() +// CHECK: [[CALL:%.*]] = call frozen i8* @_Z6helperv() // CHECK: icmp ne i8* [[CALL]] // CHECK: call void @__ubsan_handle_nullability_return_v1_abort({{.*}}[[ATTR_LOC]] diff --git a/clang/test/CodeGenOpenCL/addr-space-struct-arg.cl b/clang/test/CodeGenOpenCL/addr-space-struct-arg.cl --- a/clang/test/CodeGenOpenCL/addr-space-struct-arg.cl +++ b/clang/test/CodeGenOpenCL/addr-space-struct-arg.cl @@ -1,7 +1,7 @@ -// RUN: %clang_cc1 %s -emit-llvm -o - -O0 -ffake-address-space-map -triple i686-pc-darwin | FileCheck -enable-var-scope -check-prefixes=ALL,X86 %s -// RUN: %clang_cc1 %s -emit-llvm -o - -O0 -triple amdgcn | FileCheck -enable-var-scope -check-prefixes=ALL,AMDGCN %s -// RUN: %clang_cc1 %s -emit-llvm -o - -cl-std=CL2.0 -O0 -triple amdgcn | FileCheck -enable-var-scope -check-prefixes=ALL,AMDGCN,AMDGCN20 %s -// RUN: %clang_cc1 %s -emit-llvm -o - -cl-std=CL1.2 -O0 -triple spir-unknown-unknown-unknown | FileCheck -enable-var-scope -check-prefixes=SPIR %s +// RUN: %clang_cc1 -disable-frozen-args %s -emit-llvm -o - -O0 -ffake-address-space-map -triple i686-pc-darwin | FileCheck -enable-var-scope -check-prefixes=ALL,X86 %s +// RUN: %clang_cc1 -disable-frozen-args %s -emit-llvm -o - -O0 -triple amdgcn | FileCheck -enable-var-scope -check-prefixes=ALL,AMDGCN %s +// RUN: %clang_cc1 -disable-frozen-args %s -emit-llvm -o - -cl-std=CL2.0 -O0 -triple amdgcn | FileCheck -enable-var-scope -check-prefixes=ALL,AMDGCN,AMDGCN20 %s +// RUN: %clang_cc1 -disable-frozen-args %s -emit-llvm -o - -cl-std=CL1.2 -O0 -triple spir-unknown-unknown-unknown | FileCheck -enable-var-scope -check-prefixes=SPIR %s typedef int int2 __attribute__((ext_vector_type(2))); diff --git a/clang/test/CodeGenOpenCL/address-spaces.cl b/clang/test/CodeGenOpenCL/address-spaces.cl --- a/clang/test/CodeGenOpenCL/address-spaces.cl +++ b/clang/test/CodeGenOpenCL/address-spaces.cl @@ -1,9 +1,9 @@ -// RUN: %clang_cc1 %s -O0 -ffake-address-space-map -emit-llvm -o - | FileCheck %s --check-prefixes=CHECK,SPIR -// RUN: %clang_cc1 %s -O0 -DCL20 -cl-std=CL2.0 -ffake-address-space-map -emit-llvm -o - | FileCheck %s --check-prefixes=CL20,CL20SPIR -// RUN: %clang_cc1 %s -O0 -triple amdgcn-amd-amdhsa -emit-llvm -o - | FileCheck --check-prefixes=CHECK,AMDGCN %s -// RUN: %clang_cc1 %s -O0 -triple amdgcn-amd-amdhsa -DCL20 -cl-std=CL2.0 -emit-llvm -o - | FileCheck %s --check-prefixes=CL20,CL20AMDGCN -// RUN: %clang_cc1 %s -O0 -triple amdgcn-mesa-mesa3d -emit-llvm -o - | FileCheck --check-prefixes=CHECK,AMDGCN %s -// RUN: %clang_cc1 %s -O0 -triple r600-- -emit-llvm -o - | FileCheck --check-prefixes=CHECK,AMDGCN %s +// RUN: %clang_cc1 -disable-frozen-args %s -O0 -ffake-address-space-map -emit-llvm -o - | FileCheck %s --check-prefixes=CHECK,SPIR +// RUN: %clang_cc1 -disable-frozen-args %s -O0 -DCL20 -cl-std=CL2.0 -ffake-address-space-map -emit-llvm -o - | FileCheck %s --check-prefixes=CL20,CL20SPIR +// RUN: %clang_cc1 -disable-frozen-args %s -O0 -triple amdgcn-amd-amdhsa -emit-llvm -o - | FileCheck --check-prefixes=CHECK,AMDGCN %s +// RUN: %clang_cc1 -disable-frozen-args %s -O0 -triple amdgcn-amd-amdhsa -DCL20 -cl-std=CL2.0 -emit-llvm -o - | FileCheck %s --check-prefixes=CL20,CL20AMDGCN +// RUN: %clang_cc1 -disable-frozen-args %s -O0 -triple amdgcn-mesa-mesa3d -emit-llvm -o - | FileCheck --check-prefixes=CHECK,AMDGCN %s +// RUN: %clang_cc1 -disable-frozen-args %s -O0 -triple r600-- -emit-llvm -o - | FileCheck --check-prefixes=CHECK,AMDGCN %s // SPIR: %struct.S = type { i32, i32, i32* } // CL20SPIR: %struct.S = type { i32, i32, i32 addrspace(4)* } diff --git a/clang/test/CodeGenOpenCL/amdgcn-automatic-variable.cl b/clang/test/CodeGenOpenCL/amdgcn-automatic-variable.cl --- a/clang/test/CodeGenOpenCL/amdgcn-automatic-variable.cl +++ b/clang/test/CodeGenOpenCL/amdgcn-automatic-variable.cl @@ -1,8 +1,8 @@ // RUN: %clang_cc1 -O0 -cl-std=CL1.2 -triple amdgcn---amdgizcl -emit-llvm %s -o - | FileCheck -check-prefixes=CHECK,CL12 %s // RUN: %clang_cc1 -O0 -cl-std=CL2.0 -triple amdgcn---amdgizcl -emit-llvm %s -o - | FileCheck -check-prefixes=CHECK,CL20 %s -// CL12-LABEL: define void @func1(i32 addrspace(5)* %x) -// CL20-LABEL: define void @func1(i32* %x) +// CL12-LABEL: define void @func1(i32 addrspace(5)* frozen %x) +// CL20-LABEL: define void @func1(i32* frozen %x) void func1(int *x) { // CL12: %[[x_addr:.*]] = alloca i32 addrspace(5)*{{.*}}addrspace(5) // CL12: store i32 addrspace(5)* %x, i32 addrspace(5)* addrspace(5)* %[[x_addr]] @@ -48,9 +48,9 @@ // CL20: store i32* %[[r1]], i32* addrspace(5)* %lp2, align 8 int *lp2 = la; - // CL12: call void @func1(i32 addrspace(5)* %lv1) + // CL12: call void @func1(i32 addrspace(5)* frozen %lv1) // CL20: %[[r2:.*]] = addrspacecast i32 addrspace(5)* %lv1 to i32* - // CL20: call void @func1(i32* %[[r2]]) + // CL20: call void @func1(i32* frozen %[[r2]]) func1(&lv1); // CHECK: store i32 4, i32 addrspace(5)* %lvc diff --git a/clang/test/CodeGenOpenCL/amdgpu-abi-struct-coerce.cl b/clang/test/CodeGenOpenCL/amdgpu-abi-struct-coerce.cl --- a/clang/test/CodeGenOpenCL/amdgpu-abi-struct-coerce.cl +++ b/clang/test/CodeGenOpenCL/amdgpu-abi-struct-coerce.cl @@ -1,6 +1,6 @@ // REQUIRES: amdgpu-registered-target -// RUN: %clang_cc1 -triple amdgcn-unknown-unknown -S -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple r600-unknown-unknown -S -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args -triple amdgcn-unknown-unknown -S -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args -triple r600-unknown-unknown -S -emit-llvm -o - %s | FileCheck %s typedef __attribute__(( ext_vector_type(2) )) char char2; typedef __attribute__(( ext_vector_type(3) )) char char3; @@ -312,7 +312,7 @@ // CHECK: void @func_flexible_array_arg(%struct.flexible_array addrspace(5)* nocapture byval(%struct.flexible_array) align 4 %arg) void func_flexible_array_arg(flexible_array arg) { } -// CHECK: define float @func_f32_ret() +// CHECK: define frozen float @func_f32_ret() float func_f32_ret() { return 0.0f; diff --git a/clang/test/CodeGenOpenCL/amdgpu-call-kernel.cl b/clang/test/CodeGenOpenCL/amdgpu-call-kernel.cl old mode 100755 new mode 100644 --- a/clang/test/CodeGenOpenCL/amdgpu-call-kernel.cl +++ b/clang/test/CodeGenOpenCL/amdgpu-call-kernel.cl @@ -1,6 +1,6 @@ // REQUIRES: amdgpu-registered-target // RUN: %clang_cc1 -triple amdgcn-unknown-unknown -S -emit-llvm -o - %s | FileCheck %s -// CHECK: define amdgpu_kernel void @test_call_kernel(i32 addrspace(1)* nocapture %out) +// CHECK: define amdgpu_kernel void @test_call_kernel(i32 addrspace(1)* frozen nocapture %out) // CHECK: store i32 4, i32 addrspace(1)* %out, align 4 kernel void test_kernel(global int *out) diff --git a/clang/test/CodeGenOpenCL/amdgpu-nullptr.cl b/clang/test/CodeGenOpenCL/amdgpu-nullptr.cl --- a/clang/test/CodeGenOpenCL/amdgpu-nullptr.cl +++ b/clang/test/CodeGenOpenCL/amdgpu-nullptr.cl @@ -343,8 +343,8 @@ generic char* arg_generic); // CHECK-LABEL: test_pass_null_pointer_arg -// CHECK: call void @test_pass_null_pointer_arg_calee(i8 addrspace(5)* addrspacecast (i8* null to i8 addrspace(5)*), i8 addrspace(3)* addrspacecast (i8* null to i8 addrspace(3)*), i8 addrspace(1)* null, i8 addrspace(4)* null, i8* null) -// CHECK: call void @test_pass_null_pointer_arg_calee(i8 addrspace(5)* addrspacecast (i8* null to i8 addrspace(5)*), i8 addrspace(3)* addrspacecast (i8* null to i8 addrspace(3)*), i8 addrspace(1)* null, i8 addrspace(4)* null, i8* null) +// CHECK: call void @test_pass_null_pointer_arg_calee(i8 addrspace(5)* frozen addrspacecast (i8* null to i8 addrspace(5)*), i8 addrspace(3)* frozen addrspacecast (i8* null to i8 addrspace(3)*), i8 addrspace(1)* frozen null, i8 addrspace(4)* frozen null, i8* frozen null) +// CHECK: call void @test_pass_null_pointer_arg_calee(i8 addrspace(5)* frozen addrspacecast (i8* null to i8 addrspace(5)*), i8 addrspace(3)* frozen addrspacecast (i8* null to i8 addrspace(3)*), i8 addrspace(1)* frozen null, i8 addrspace(4)* frozen null, i8* frozen null) void test_pass_null_pointer_arg(void) { test_pass_null_pointer_arg_calee(0, 0, 0, 0, 0); test_pass_null_pointer_arg_calee(NULL, NULL, NULL, NULL, NULL); @@ -358,8 +358,8 @@ size_t arg_generic); // CHECK-LABEL: test_cast_null_pointer_to_sizet -// CHECK: call void @test_cast_null_pointer_to_sizet_calee(i64 ptrtoint (i8 addrspace(5)* addrspacecast (i8* null to i8 addrspace(5)*) to i64), i64 ptrtoint (i8 addrspace(3)* addrspacecast (i8* null to i8 addrspace(3)*) to i64), i64 0, i64 0, i64 0) -// CHECK: call void @test_cast_null_pointer_to_sizet_calee(i64 ptrtoint (i8 addrspace(5)* addrspacecast (i8* null to i8 addrspace(5)*) to i64), i64 ptrtoint (i8 addrspace(3)* addrspacecast (i8* null to i8 addrspace(3)*) to i64), i64 0, i64 0, i64 0) +// CHECK: call void @test_cast_null_pointer_to_sizet_calee(i64 frozen ptrtoint (i8 addrspace(5)* addrspacecast (i8* null to i8 addrspace(5)*) to i64), i64 frozen ptrtoint (i8 addrspace(3)* addrspacecast (i8* null to i8 addrspace(3)*) to i64), i64 frozen 0, i64 frozen 0, i64 frozen 0) +// CHECK: call void @test_cast_null_pointer_to_sizet_calee(i64 frozen ptrtoint (i8 addrspace(5)* addrspacecast (i8* null to i8 addrspace(5)*) to i64), i64 frozen ptrtoint (i8 addrspace(3)* addrspacecast (i8* null to i8 addrspace(3)*) to i64), i64 frozen 0, i64 frozen 0, i64 frozen 0) void test_cast_null_pointer_to_sizet(void) { test_cast_null_pointer_to_sizet_calee((size_t)((private char*)0), (size_t)((local char*)0), diff --git a/clang/test/CodeGenOpenCL/amdgpu-sizeof-alignof.cl b/clang/test/CodeGenOpenCL/amdgpu-sizeof-alignof.cl --- a/clang/test/CodeGenOpenCL/amdgpu-sizeof-alignof.cl +++ b/clang/test/CodeGenOpenCL/amdgpu-sizeof-alignof.cl @@ -30,7 +30,7 @@ void check(bool); void test() { - // CHECK-NOT: call void @check(i1 zeroext false) + // CHECK-NOT: call void @check(i1 frozen zeroext false) check(sizeof(size_t) == PTSIZE); check(__alignof__(size_t) == PTSIZE); check(sizeof(intptr_t) == PTSIZE); diff --git a/clang/test/CodeGenOpenCL/arm-integer-dot-product.cl b/clang/test/CodeGenOpenCL/arm-integer-dot-product.cl --- a/clang/test/CodeGenOpenCL/arm-integer-dot-product.cl +++ b/clang/test/CodeGenOpenCL/arm-integer-dot-product.cl @@ -3,36 +3,36 @@ #pragma OPENCL EXTENSION cl_arm_integer_dot_product_int8 : enable void test_int8(uchar4 ua, uchar4 ub, char4 sa, char4 sb) { uint ur = arm_dot(ua, ub); - // CHECK: call spir_func i32 @_Z7arm_dotDv4_hS_ + // CHECK: call spir_func frozen i32 @_Z7arm_dotDv4_hS_ int sr = arm_dot(sa, sb); - // CHECK: call spir_func i32 @_Z7arm_dotDv4_cS_ + // CHECK: call spir_func frozen i32 @_Z7arm_dotDv4_cS_ } #pragma OPENCL EXTENSION cl_arm_integer_dot_product_int8 : disable #pragma OPENCL EXTENSION cl_arm_integer_dot_product_accumulate_int8 : enable void test_accumulate_int8(uchar4 ua, uchar4 ub, uint uc, char4 sa, char4 sb, int c) { uint ur = arm_dot_acc(ua, ub, uc); - // CHECK: call spir_func i32 @_Z11arm_dot_accDv4_hS_j + // CHECK: call spir_func frozen i32 @_Z11arm_dot_accDv4_hS_j int sr = arm_dot_acc(sa, sb, c); - // CHECK: call spir_func i32 @_Z11arm_dot_accDv4_cS_i + // CHECK: call spir_func frozen i32 @_Z11arm_dot_accDv4_cS_i } #pragma OPENCL EXTENSION cl_arm_integer_dot_product_accumulate_int8 : disable #pragma OPENCL EXTENSION cl_arm_integer_dot_product_accumulate_int16 : enable void test_accumulate_int16(ushort2 ua, ushort2 ub, uint uc, short2 sa, short2 sb, int c) { uint ur = arm_dot_acc(ua, ub, uc); - // CHECK: call spir_func i32 @_Z11arm_dot_accDv2_tS_j + // CHECK: call spir_func frozen i32 @_Z11arm_dot_accDv2_tS_j int sr = arm_dot_acc(sa, sb, c); - // CHECK: call spir_func i32 @_Z11arm_dot_accDv2_sS_i + // CHECK: call spir_func frozen i32 @_Z11arm_dot_accDv2_sS_i } #pragma OPENCL EXTENSION cl_arm_integer_dot_product_accumulate_int16 : disable #pragma OPENCL EXTENSION cl_arm_integer_dot_product_accumulate_saturate_int8 : enable void test_accumulate_saturate_int8(uchar4 ua, uchar4 ub, uint uc, char4 sa, char4 sb, int c) { uint ur = arm_dot_acc_sat(ua, ub, uc); - // CHECK: call spir_func i32 @_Z15arm_dot_acc_satDv4_hS_j + // CHECK: call spir_func frozen i32 @_Z15arm_dot_acc_satDv4_hS_j int sr = arm_dot_acc_sat(sa, sb, c); - // CHECK: call spir_func i32 @_Z15arm_dot_acc_satDv4_cS_i + // CHECK: call spir_func frozen i32 @_Z15arm_dot_acc_satDv4_cS_i } #pragma OPENCL EXTENSION cl_arm_integer_dot_product_accumulate_saturate_int8 : disable diff --git a/clang/test/CodeGenOpenCL/as_type.cl b/clang/test/CodeGenOpenCL/as_type.cl --- a/clang/test/CodeGenOpenCL/as_type.cl +++ b/clang/test/CodeGenOpenCL/as_type.cl @@ -5,21 +5,21 @@ typedef __attribute__(( ext_vector_type(16) )) char char16; typedef __attribute__(( ext_vector_type(3) )) int int3; -//CHECK: define spir_func <3 x i8> @f1(<4 x i8> %[[x:.*]]) +//CHECK: define spir_func frozen <3 x i8> @f1(<4 x i8> frozen %[[x:.*]]) //CHECK: %[[astype:.*]] = shufflevector <4 x i8> %[[x]], <4 x i8> undef, <3 x i32> //CHECK: ret <3 x i8> %[[astype]] char3 f1(char4 x) { return __builtin_astype(x, char3); } -//CHECK: define spir_func <4 x i8> @f2(<3 x i8> %[[x:.*]]) +//CHECK: define spir_func frozen <4 x i8> @f2(<3 x i8> frozen %[[x:.*]]) //CHECK: %[[astype:.*]] = shufflevector <3 x i8> %[[x]], <3 x i8> undef, <4 x i32> //CHECK: ret <4 x i8> %[[astype]] char4 f2(char3 x) { return __builtin_astype(x, char4); } -//CHECK: define spir_func <3 x i8> @f3(i32 %[[x:.*]]) +//CHECK: define spir_func frozen <3 x i8> @f3(i32 frozen %[[x:.*]]) //CHECK: %[[cast:.*]] = bitcast i32 %[[x]] to <4 x i8> //CHECK: %[[astype:.*]] = shufflevector <4 x i8> %[[cast]], <4 x i8> undef, <3 x i32> //CHECK: ret <3 x i8> %[[astype]] @@ -27,7 +27,7 @@ return __builtin_astype(x, char3); } -//CHECK: define spir_func <4 x i8> @f4(i32 %[[x:.*]]) +//CHECK: define spir_func frozen <4 x i8> @f4(i32 frozen %[[x:.*]]) //CHECK: %[[astype:.*]] = bitcast i32 %[[x]] to <4 x i8> //CHECK-NOT: shufflevector //CHECK: ret <4 x i8> %[[astype]] @@ -35,7 +35,7 @@ return __builtin_astype(x, char4); } -//CHECK: define spir_func i32 @f5(<3 x i8> %[[x:.*]]) +//CHECK: define spir_func frozen i32 @f5(<3 x i8> frozen %[[x:.*]]) //CHECK: %[[shuffle:.*]] = shufflevector <3 x i8> %[[x]], <3 x i8> undef, <4 x i32> //CHECK: %[[astype:.*]] = bitcast <4 x i8> %[[shuffle]] to i32 //CHECK: ret i32 %[[astype]] @@ -43,7 +43,7 @@ return __builtin_astype(x, int); } -//CHECK: define spir_func i32 @f6(<4 x i8> %[[x:.*]]) +//CHECK: define spir_func frozen i32 @f6(<4 x i8> frozen %[[x:.*]]) //CHECK: %[[astype:.*]] = bitcast <4 x i8> %[[x]] to i32 //CHECK-NOT: shufflevector //CHECK: ret i32 %[[astype]] @@ -51,7 +51,7 @@ return __builtin_astype(x, int); } -//CHECK: define spir_func <3 x i8> @f7(<3 x i8> returned %[[x:.*]]) +//CHECK: define spir_func frozen <3 x i8> @f7(<3 x i8> frozen returned %[[x:.*]]) //CHECK-NOT: bitcast //CHECK-NOT: shufflevector //CHECK: ret <3 x i8> %[[x]] @@ -59,7 +59,7 @@ return __builtin_astype(x, char3); } -//CHECK: define spir_func <3 x i32> @f8(<16 x i8> %[[x:.*]]) +//CHECK: define spir_func frozen <3 x i32> @f8(<16 x i8> frozen %[[x:.*]]) //CHECK: %[[cast:.*]] = bitcast <16 x i8> %[[x]] to <4 x i32> //CHECK: %[[astype:.*]] = shufflevector <4 x i32> %[[cast]], <4 x i32> undef, <3 x i32> //CHECK: ret <3 x i32> %[[astype]] @@ -67,28 +67,28 @@ return __builtin_astype(x, int3); } -//CHECK: define spir_func i32 addrspace(1)* @addr_cast(i32* readnone %[[x:.*]]) +//CHECK: define spir_func frozen i32 addrspace(1)* @addr_cast(i32* frozen readnone %[[x:.*]]) //CHECK: %[[cast:.*]] = addrspacecast i32* %[[x]] to i32 addrspace(1)* //CHECK: ret i32 addrspace(1)* %[[cast]] global int* addr_cast(int *x) { return __builtin_astype(x, global int*); } -//CHECK: define spir_func i32 addrspace(1)* @int_to_ptr(i32 %[[x:.*]]) +//CHECK: define spir_func frozen i32 addrspace(1)* @int_to_ptr(i32 frozen %[[x:.*]]) //CHECK: %[[cast:.*]] = inttoptr i32 %[[x]] to i32 addrspace(1)* //CHECK: ret i32 addrspace(1)* %[[cast]] global int* int_to_ptr(int x) { return __builtin_astype(x, global int*); } -//CHECK: define spir_func i32 @ptr_to_int(i32* %[[x:.*]]) +//CHECK: define spir_func frozen i32 @ptr_to_int(i32* frozen %[[x:.*]]) //CHECK: %[[cast:.*]] = ptrtoint i32* %[[x]] to i32 //CHECK: ret i32 %[[cast]] int ptr_to_int(int *x) { return __builtin_astype(x, int); } -//CHECK: define spir_func <3 x i8> @ptr_to_char3(i32* %[[x:.*]]) +//CHECK: define spir_func frozen <3 x i8> @ptr_to_char3(i32* frozen %[[x:.*]]) //CHECK: %[[cast1:.*]] = ptrtoint i32* %[[x]] to i32 //CHECK: %[[cast2:.*]] = bitcast i32 %[[cast1]] to <4 x i8> //CHECK: %[[astype:.*]] = shufflevector <4 x i8> %[[cast2]], <4 x i8> undef, <3 x i32> @@ -97,7 +97,7 @@ return __builtin_astype(x, char3); } -//CHECK: define spir_func i32* @char3_to_ptr(<3 x i8> %[[x:.*]]) +//CHECK: define spir_func frozen i32* @char3_to_ptr(<3 x i8> frozen %[[x:.*]]) //CHECK: %[[astype:.*]] = shufflevector <3 x i8> %[[x]], <3 x i8> undef, <4 x i32> //CHECK: %[[cast1:.*]] = bitcast <4 x i8> %[[astype]] to i32 //CHECK: %[[cast2:.*]] = inttoptr i32 %[[cast1]] to i32* diff --git a/clang/test/CodeGenOpenCL/atomic-ops-libcall.cl b/clang/test/CodeGenOpenCL/atomic-ops-libcall.cl --- a/clang/test/CodeGenOpenCL/atomic-ops-libcall.cl +++ b/clang/test/CodeGenOpenCL/atomic-ops-libcall.cl @@ -20,63 +20,63 @@ void f(atomic_int *i, global atomic_int *gi, local atomic_int *li, private atomic_int *pi, atomic_uint *ui, int cmp, int order, int scope) { int x; - // SPIR: {{%[^ ]*}} = call i32 @__opencl_atomic_load_4(i8 addrspace(4)* {{%[0-9]+}}, i32 5, i32 1) - // ARM: {{%[^ ]*}} = call i32 @__opencl_atomic_load_4(i8* {{%[0-9]+}}, i32 5, i32 1) + // SPIR: {{%[^ ]*}} = call frozen i32 @__opencl_atomic_load_4(i8 addrspace(4)* frozen {{%[0-9]+}}, i32 frozen 5, i32 frozen 1) + // ARM: {{%[^ ]*}} = call frozen i32 @__opencl_atomic_load_4(i8* frozen {{%[0-9]+}}, i32 frozen 5, i32 frozen 1) x = __opencl_atomic_load(i, memory_order_seq_cst, memory_scope_work_group); - // SPIR: call void @__opencl_atomic_store_4(i8 addrspace(4)* {{%[0-9]+}}, i32 {{%[0-9]+}}, i32 5, i32 1) - // ARM: call void @__opencl_atomic_store_4(i8* {{%[0-9]+}}, i32 {{%[0-9]+}}, i32 5, i32 1) + // SPIR: call void @__opencl_atomic_store_4(i8 addrspace(4)* frozen {{%[0-9]+}}, i32 frozen {{%[0-9]+}}, i32 frozen 5, i32 frozen 1) + // ARM: call void @__opencl_atomic_store_4(i8* frozen {{%[0-9]+}}, i32 frozen {{%[0-9]+}}, i32 frozen 5, i32 frozen 1) __opencl_atomic_store(i, 1, memory_order_seq_cst, memory_scope_work_group); // SPIR: %[[GP:[0-9]+]] = addrspacecast i8 addrspace(1)* {{%[0-9]+}} to i8 addrspace(4)* - // SPIR: call void @__opencl_atomic_store_4(i8 addrspace(4)* %[[GP]], i32 {{%[0-9]+}}, i32 5, i32 1) - // ARM: call void @__opencl_atomic_store_4(i8* {{%[0-9]+}}, i32 {{%[0-9]+}}, i32 5, i32 1) + // SPIR: call void @__opencl_atomic_store_4(i8 addrspace(4)* frozen %[[GP]], i32 frozen {{%[0-9]+}}, i32 frozen 5, i32 frozen 1) + // ARM: call void @__opencl_atomic_store_4(i8* frozen {{%[0-9]+}}, i32 frozen {{%[0-9]+}}, i32 frozen 5, i32 frozen 1) __opencl_atomic_store(gi, 1, memory_order_seq_cst, memory_scope_work_group); // SPIR: %[[GP:[0-9]+]] = addrspacecast i8 addrspace(3)* {{%[0-9]+}} to i8 addrspace(4)* - // SPIR: call void @__opencl_atomic_store_4(i8 addrspace(4)* %[[GP]], i32 {{%[0-9]+}}, i32 5, i32 1) - // ARM: call void @__opencl_atomic_store_4(i8* {{%[0-9]+}}, i32 {{%[0-9]+}}, i32 5, i32 1) + // SPIR: call void @__opencl_atomic_store_4(i8 addrspace(4)* frozen %[[GP]], i32 frozen {{%[0-9]+}}, i32 frozen 5, i32 frozen 1) + // ARM: call void @__opencl_atomic_store_4(i8* frozen {{%[0-9]+}}, i32 frozen {{%[0-9]+}}, i32 frozen 5, i32 frozen 1) __opencl_atomic_store(li, 1, memory_order_seq_cst, memory_scope_work_group); // SPIR: %[[GP:[0-9]+]] = addrspacecast i8* {{%[0-9]+}} to i8 addrspace(4)* - // SPIR: call void @__opencl_atomic_store_4(i8 addrspace(4)* %[[GP]], i32 {{%[0-9]+}}, i32 5, i32 1) - // ARM: call void @__opencl_atomic_store_4(i8* {{%[0-9]+}}, i32 {{%[0-9]+}}, i32 5, i32 1) + // SPIR: call void @__opencl_atomic_store_4(i8 addrspace(4)* frozen %[[GP]], i32 frozen {{%[0-9]+}}, i32 frozen 5, i32 frozen 1) + // ARM: call void @__opencl_atomic_store_4(i8* frozen {{%[0-9]+}}, i32 frozen {{%[0-9]+}}, i32 frozen 5, i32 frozen 1) __opencl_atomic_store(pi, 1, memory_order_seq_cst, memory_scope_work_group); - // SPIR: {{%[^ ]*}} = call i32 @__opencl_atomic_fetch_add_4(i8 addrspace(4)* {{%[0-9]+}}, i32 {{%[0-9]+}}, i32 5, i32 1) - // ARM: {{%[^ ]*}} = call i32 @__opencl_atomic_fetch_add_4(i8* {{%[0-9]+}}, i32 {{%[0-9]+}}, i32 5, i32 1) + // SPIR: {{%[^ ]*}} = call frozen i32 @__opencl_atomic_fetch_add_4(i8 addrspace(4)* frozen {{%[0-9]+}}, i32 frozen {{%[0-9]+}}, i32 frozen 5, i32 frozen 1) + // ARM: {{%[^ ]*}} = call frozen i32 @__opencl_atomic_fetch_add_4(i8* frozen {{%[0-9]+}}, i32 frozen {{%[0-9]+}}, i32 frozen 5, i32 frozen 1) x = __opencl_atomic_fetch_add(i, 3, memory_order_seq_cst, memory_scope_work_group); - // SPIR: {{%[^ ]*}} = call i32 @__opencl_atomic_fetch_min_4(i8 addrspace(4)* {{%[0-9]+}}, i32 {{%[0-9]+}}, i32 5, i32 1) - // ARM: {{%[^ ]*}} = call i32 @__opencl_atomic_fetch_min_4(i8* {{%[0-9]+}}, i32 {{%[0-9]+}}, i32 5, i32 1) + // SPIR: {{%[^ ]*}} = call frozen i32 @__opencl_atomic_fetch_min_4(i8 addrspace(4)* frozen {{%[0-9]+}}, i32 frozen {{%[0-9]+}}, i32 frozen 5, i32 frozen 1) + // ARM: {{%[^ ]*}} = call frozen i32 @__opencl_atomic_fetch_min_4(i8* frozen {{%[0-9]+}}, i32 frozen {{%[0-9]+}}, i32 frozen 5, i32 frozen 1) x = __opencl_atomic_fetch_min(i, 3, memory_order_seq_cst, memory_scope_work_group); - // SPIR: {{%[^ ]*}} = call i32 @__opencl_atomic_fetch_umin_4(i8 addrspace(4)* {{%[0-9]+}}, i32 {{%[0-9]+}}, i32 5, i32 1) - // ARM: {{%[^ ]*}} = call i32 @__opencl_atomic_fetch_umin_4(i8* {{%[0-9]+}}, i32 {{%[0-9]+}}, i32 5, i32 1) + // SPIR: {{%[^ ]*}} = call frozen i32 @__opencl_atomic_fetch_umin_4(i8 addrspace(4)* frozen {{%[0-9]+}}, i32 frozen {{%[0-9]+}}, i32 frozen 5, i32 frozen 1) + // ARM: {{%[^ ]*}} = call frozen i32 @__opencl_atomic_fetch_umin_4(i8* frozen {{%[0-9]+}}, i32 frozen {{%[0-9]+}}, i32 frozen 5, i32 frozen 1) x = __opencl_atomic_fetch_min(ui, 3, memory_order_seq_cst, memory_scope_work_group); - // SPIR: {{%[^ ]*}} = call zeroext i1 @__opencl_atomic_compare_exchange_4(i8 addrspace(4)* {{%[0-9]+}}, i8 addrspace(4)* {{%[0-9]+}}, i32 {{%[0-9]+}}, i32 5, i32 5, i32 1) - // ARM: {{%[^ ]*}} = call zeroext i1 @__opencl_atomic_compare_exchange_4(i8* {{%[0-9]+}}, i8* {{%[0-9]+}}, i32 {{%[0-9]+}}, i32 5, i32 5, i32 1) + // SPIR: {{%[^ ]*}} = call frozen zeroext i1 @__opencl_atomic_compare_exchange_4(i8 addrspace(4)* frozen {{%[0-9]+}}, i8 addrspace(4)* frozen {{%[0-9]+}}, i32 frozen {{%[0-9]+}}, i32 frozen 5, i32 frozen 5, i32 frozen 1) + // ARM: {{%[^ ]*}} = call frozen zeroext i1 @__opencl_atomic_compare_exchange_4(i8* frozen {{%[0-9]+}}, i8* frozen {{%[0-9]+}}, i32 frozen {{%[0-9]+}}, i32 frozen 5, i32 frozen 5, i32 frozen 1) x = __opencl_atomic_compare_exchange_strong(i, &cmp, 1, memory_order_seq_cst, memory_order_seq_cst, memory_scope_work_group); - // SPIR: {{%[^ ]*}} = call zeroext i1 @__opencl_atomic_compare_exchange_4(i8 addrspace(4)* {{%[0-9]+}}, i8 addrspace(4)* {{%[0-9]+}}, i32 {{%[0-9]+}}, i32 5, i32 5, i32 1) - // ARM: {{%[^ ]*}} = call zeroext i1 @__opencl_atomic_compare_exchange_4(i8* {{%[0-9]+}}, i8* {{%[0-9]+}}, i32 {{%[0-9]+}}, i32 5, i32 5, i32 1) + // SPIR: {{%[^ ]*}} = call frozen zeroext i1 @__opencl_atomic_compare_exchange_4(i8 addrspace(4)* frozen {{%[0-9]+}}, i8 addrspace(4)* frozen {{%[0-9]+}}, i32 frozen {{%[0-9]+}}, i32 frozen 5, i32 frozen 5, i32 frozen 1) + // ARM: {{%[^ ]*}} = call frozen zeroext i1 @__opencl_atomic_compare_exchange_4(i8* frozen {{%[0-9]+}}, i8* frozen {{%[0-9]+}}, i32 frozen {{%[0-9]+}}, i32 frozen 5, i32 frozen 5, i32 frozen 1) x = __opencl_atomic_compare_exchange_weak(i, &cmp, 1, memory_order_seq_cst, memory_order_seq_cst, memory_scope_work_group); - // SPIR: {{%[^ ]*}} = call zeroext i1 @__opencl_atomic_compare_exchange_4(i8 addrspace(4)* {{%[0-9]+}}, i8 addrspace(4)* {{%[0-9]+}}, i32 {{%[0-9]+}}, i32 5, i32 5, i32 2) - // ARM: {{%[^ ]*}} = call zeroext i1 @__opencl_atomic_compare_exchange_4(i8* {{%[0-9]+}}, i8* {{%[0-9]+}}, i32 {{%[0-9]+}}, i32 5, i32 5, i32 2) + // SPIR: {{%[^ ]*}} = call frozen zeroext i1 @__opencl_atomic_compare_exchange_4(i8 addrspace(4)* frozen {{%[0-9]+}}, i8 addrspace(4)* frozen {{%[0-9]+}}, i32 frozen {{%[0-9]+}}, i32 frozen 5, i32 frozen 5, i32 frozen 2) + // ARM: {{%[^ ]*}} = call frozen zeroext i1 @__opencl_atomic_compare_exchange_4(i8* frozen {{%[0-9]+}}, i8* frozen {{%[0-9]+}}, i32 frozen {{%[0-9]+}}, i32 frozen 5, i32 frozen 5, i32 frozen 2) x = __opencl_atomic_compare_exchange_weak(i, &cmp, 1, memory_order_seq_cst, memory_order_seq_cst, memory_scope_device); - // SPIR: {{%[^ ]*}} = call zeroext i1 @__opencl_atomic_compare_exchange_4(i8 addrspace(4)* {{%[0-9]+}}, i8 addrspace(4)* {{%[0-9]+}}, i32 {{%[0-9]+}}, i32 5, i32 5, i32 3) - // ARM: {{%[^ ]*}} = call zeroext i1 @__opencl_atomic_compare_exchange_4(i8* {{%[0-9]+}}, i8* {{%[0-9]+}}, i32 {{%[0-9]+}}, i32 5, i32 5, i32 3) + // SPIR: {{%[^ ]*}} = call frozen zeroext i1 @__opencl_atomic_compare_exchange_4(i8 addrspace(4)* frozen {{%[0-9]+}}, i8 addrspace(4)* frozen {{%[0-9]+}}, i32 frozen {{%[0-9]+}}, i32 frozen 5, i32 frozen 5, i32 frozen 3) + // ARM: {{%[^ ]*}} = call frozen zeroext i1 @__opencl_atomic_compare_exchange_4(i8* frozen {{%[0-9]+}}, i8* frozen {{%[0-9]+}}, i32 frozen {{%[0-9]+}}, i32 frozen 5, i32 frozen 5, i32 frozen 3) x = __opencl_atomic_compare_exchange_weak(i, &cmp, 1, memory_order_seq_cst, memory_order_seq_cst, memory_scope_all_svm_devices); #ifdef cl_khr_subgroups - // SPIR: {{%[^ ]*}} = call zeroext i1 @__opencl_atomic_compare_exchange_4(i8 addrspace(4)* {{%[0-9]+}}, i8 addrspace(4)* {{%[0-9]+}}, i32 {{%[0-9]+}}, i32 5, i32 5, i32 4) + // SPIR: {{%[^ ]*}} = call frozen zeroext i1 @__opencl_atomic_compare_exchange_4(i8 addrspace(4)* frozen {{%[0-9]+}}, i8 addrspace(4)* frozen {{%[0-9]+}}, i32 frozen {{%[0-9]+}}, i32 frozen 5, i32 frozen 5, i32 frozen 4) x = __opencl_atomic_compare_exchange_weak(i, &cmp, 1, memory_order_seq_cst, memory_order_seq_cst, memory_scope_sub_group); #endif - // SPIR: {{%[^ ]*}} = call zeroext i1 @__opencl_atomic_compare_exchange_4(i8 addrspace(4)* {{%[0-9]+}}, i8 addrspace(4)* {{%[0-9]+}}, i32 {{%[0-9]+}}, i32 %{{.*}}, i32 %{{.*}}, i32 %{{.*}}) - // ARM: {{%[^ ]*}} = call zeroext i1 @__opencl_atomic_compare_exchange_4(i8* {{%[0-9]+}}, i8* {{%[0-9]+}}, i32 {{%[0-9]+}}, i32 %{{.*}}, i32 %{{.*}}, i32 %{{.*}}) + // SPIR: {{%[^ ]*}} = call frozen zeroext i1 @__opencl_atomic_compare_exchange_4(i8 addrspace(4)* frozen {{%[0-9]+}}, i8 addrspace(4)* frozen {{%[0-9]+}}, i32 frozen {{%[0-9]+}}, i32 frozen %{{.*}}, i32 frozen %{{.*}}, i32 frozen %{{.*}}) + // ARM: {{%[^ ]*}} = call frozen zeroext i1 @__opencl_atomic_compare_exchange_4(i8* frozen {{%[0-9]+}}, i8* frozen {{%[0-9]+}}, i32 frozen {{%[0-9]+}}, i32 frozen %{{.*}}, i32 frozen %{{.*}}, i32 frozen %{{.*}}) x = __opencl_atomic_compare_exchange_weak(i, &cmp, 1, order, order, scope); } diff --git a/clang/test/CodeGenOpenCL/blocks.cl b/clang/test/CodeGenOpenCL/blocks.cl --- a/clang/test/CodeGenOpenCL/blocks.cl +++ b/clang/test/CodeGenOpenCL/blocks.cl @@ -9,8 +9,8 @@ // AMDGCN: @__block_literal_global = internal addrspace(1) constant { i32, i32, i8* } { i32 16, i32 8, i8* bitcast (void (i8*, i8 addrspace(3)*)* @block_A_block_invoke to i8*) } // COMMON-NOT: .str -// SPIR-LABEL: define internal {{.*}}void @block_A_block_invoke(i8 addrspace(4)* %.block_descriptor, i8 addrspace(3)* %a) -// AMDGCN-LABEL: define internal {{.*}}void @block_A_block_invoke(i8* %.block_descriptor, i8 addrspace(3)* %a) +// SPIR-LABEL: define internal {{.*}}void @block_A_block_invoke(i8 addrspace(4)* frozen %.block_descriptor, i8 addrspace(3)* frozen %a) +// AMDGCN-LABEL: define internal {{.*}}void @block_A_block_invoke(i8* frozen %.block_descriptor, i8 addrspace(3)* frozen %a) void (^block_A)(local void *) = ^(local void *a) { return; }; @@ -40,7 +40,7 @@ // SPIR: store %struct.__opencl_block_literal_generic addrspace(4)* %[[blk_gen_ptr]], %struct.__opencl_block_literal_generic addrspace(4)** %[[block_B:.*]], // SPIR: %[[block_literal:.*]] = load %struct.__opencl_block_literal_generic addrspace(4)*, %struct.__opencl_block_literal_generic addrspace(4)** %[[block_B]] // SPIR: %[[blk_gen_ptr:.*]] = bitcast %struct.__opencl_block_literal_generic addrspace(4)* %[[block_literal]] to i8 addrspace(4)* - // SPIR: call {{.*}}i32 @__foo_block_invoke(i8 addrspace(4)* %[[blk_gen_ptr]]) + // SPIR: call {{.*}}i32 @__foo_block_invoke(i8 addrspace(4)* frozen %[[blk_gen_ptr]]) // AMDGCN: %[[block_invoke:.*]] = getelementptr inbounds <{ i32, i32, i8*, i32 }>, <{ i32, i32, i8*, i32 }> addrspace(5)* %[[block:.*]], i32 0, i32 2 // AMDGCN: store i8* bitcast (i32 (i8*)* @__foo_block_invoke to i8*), i8* addrspace(5)* %[[block_invoke]] // AMDGCN: %[[block_captured:.*]] = getelementptr inbounds <{ i32, i32, i8*, i32 }>, <{ i32, i32, i8*, i32 }> addrspace(5)* %[[block]], i32 0, i32 3 @@ -51,7 +51,7 @@ // AMDGCN: store %struct.__opencl_block_literal_generic* %[[blk_gen_ptr]], %struct.__opencl_block_literal_generic* addrspace(5)* %[[block_B:.*]], // AMDGCN: %[[block_literal:.*]] = load %struct.__opencl_block_literal_generic*, %struct.__opencl_block_literal_generic* addrspace(5)* %[[block_B]] // AMDGCN: %[[blk_gen_ptr:.*]] = bitcast %struct.__opencl_block_literal_generic* %[[block_literal]] to i8* - // AMDGCN: call {{.*}}i32 @__foo_block_invoke(i8* %[[blk_gen_ptr]]) + // AMDGCN: call {{.*}}i32 @__foo_block_invoke(i8* frozen %[[blk_gen_ptr]]) int (^ block_B)(void) = ^{ return i; @@ -59,11 +59,11 @@ block_B(); } -// SPIR-LABEL: define internal {{.*}}i32 @__foo_block_invoke(i8 addrspace(4)* %.block_descriptor) +// SPIR-LABEL: define internal {{.*}}i32 @__foo_block_invoke(i8 addrspace(4)* frozen %.block_descriptor) // SPIR: %[[block:.*]] = bitcast i8 addrspace(4)* %.block_descriptor to <{ i32, i32, i8 addrspace(4)*, i32 }> addrspace(4)* // SPIR: %[[block_capture_addr:.*]] = getelementptr inbounds <{ i32, i32, i8 addrspace(4)*, i32 }>, <{ i32, i32, i8 addrspace(4)*, i32 }> addrspace(4)* %[[block]], i32 0, i32 3 // SPIR: %[[block_capture:.*]] = load i32, i32 addrspace(4)* %[[block_capture_addr]] -// AMDGCN-LABEL: define internal {{.*}}i32 @__foo_block_invoke(i8* %.block_descriptor) +// AMDGCN-LABEL: define internal {{.*}}i32 @__foo_block_invoke(i8* frozen %.block_descriptor) // AMDGCN: %[[block:.*]] = bitcast i8* %.block_descriptor to <{ i32, i32, i8*, i32 }>* // AMDGCN: %[[block_capture_addr:.*]] = getelementptr inbounds <{ i32, i32, i8*, i32 }>, <{ i32, i32, i8*, i32 }>* %[[block]], i32 0, i32 3 // AMDGCN: %[[block_capture:.*]] = load i32, i32* %[[block_capture_addr]] diff --git a/clang/test/CodeGenOpenCL/byval.cl b/clang/test/CodeGenOpenCL/byval.cl --- a/clang/test/CodeGenOpenCL/byval.cl +++ b/clang/test/CodeGenOpenCL/byval.cl @@ -8,8 +8,8 @@ int g() { struct A a; - // CHECK: call i32 @f(%struct.A addrspace(5)* byval{{.*}}%a) + // CHECK: call frozen i32 @f(%struct.A addrspace(5)* frozen byval{{.*}}%a) return f(a); } -// CHECK: declare i32 @f(%struct.A addrspace(5)* byval{{.*}}) +// CHECK: declare frozen i32 @f(%struct.A addrspace(5)* frozen byval{{.*}}) diff --git a/clang/test/CodeGenOpenCL/cl20-device-side-enqueue.cl b/clang/test/CodeGenOpenCL/cl20-device-side-enqueue.cl --- a/clang/test/CodeGenOpenCL/cl20-device-side-enqueue.cl +++ b/clang/test/CodeGenOpenCL/cl20-device-side-enqueue.cl @@ -1,6 +1,6 @@ -// RUN: %clang_cc1 %s -cl-std=CL2.0 -ffake-address-space-map -O0 -emit-llvm -o - -triple "spir-unknown-unknown" | FileCheck %s --check-prefix=COMMON --check-prefix=B32 -// RUN: %clang_cc1 %s -cl-std=CL2.0 -ffake-address-space-map -O0 -emit-llvm -o - -triple "spir64-unknown-unknown" | FileCheck %s --check-prefix=COMMON --check-prefix=B64 -// RUN: %clang_cc1 %s -cl-std=CL2.0 -ffake-address-space-map -O1 -emit-llvm -o - -triple "spir64-unknown-unknown" | FileCheck %s --check-prefix=CHECK-LIFETIMES +// RUN: %clang_cc1 -disable-frozen-args %s -cl-std=CL2.0 -ffake-address-space-map -O0 -emit-llvm -o - -triple "spir-unknown-unknown" | FileCheck %s --check-prefix=COMMON --check-prefix=B32 +// RUN: %clang_cc1 -disable-frozen-args %s -cl-std=CL2.0 -ffake-address-space-map -O0 -emit-llvm -o - -triple "spir64-unknown-unknown" | FileCheck %s --check-prefix=COMMON --check-prefix=B64 +// RUN: %clang_cc1 -disable-frozen-args %s -cl-std=CL2.0 -ffake-address-space-map -O1 -emit-llvm -o - -triple "spir64-unknown-unknown" | FileCheck %s --check-prefix=CHECK-LIFETIMES #pragma OPENCL EXTENSION cl_khr_subgroups : enable diff --git a/clang/test/CodeGenOpenCL/const-str-array-decay.cl b/clang/test/CodeGenOpenCL/const-str-array-decay.cl --- a/clang/test/CodeGenOpenCL/const-str-array-decay.cl +++ b/clang/test/CodeGenOpenCL/const-str-array-decay.cl @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 %s -emit-llvm -o - -ffake-address-space-map | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args %s -emit-llvm -o - -ffake-address-space-map | FileCheck %s int test_func(constant char* foo); diff --git a/clang/test/CodeGenOpenCL/constant-addr-space-globals.cl b/clang/test/CodeGenOpenCL/constant-addr-space-globals.cl --- a/clang/test/CodeGenOpenCL/constant-addr-space-globals.cl +++ b/clang/test/CodeGenOpenCL/constant-addr-space-globals.cl @@ -26,6 +26,6 @@ constant int var1 = 1; - // CHECK: call spir_func void @foo(i32 addrspace(2)* @k.var1, i32 addrspace(2)* getelementptr inbounds ([3 x i32], [3 x i32] addrspace(2)* @k.arr1, i64 0, i64 0) + // CHECK: call spir_func void @foo(i32 addrspace(2)* frozen @k.var1, i32 addrspace(2)* frozen getelementptr inbounds ([3 x i32], [3 x i32] addrspace(2)* @k.arr1, i64 0, i64 0) foo(&var1, arr1, arr2, arr3); } diff --git a/clang/test/CodeGenOpenCL/convergent.cl b/clang/test/CodeGenOpenCL/convergent.cl --- a/clang/test/CodeGenOpenCL/convergent.cl +++ b/clang/test/CodeGenOpenCL/convergent.cl @@ -28,7 +28,7 @@ // non_convfun(); // } // -// CHECK-LABEL: define spir_func void @test_merge_if(i32 %a) local_unnamed_addr #1 { +// CHECK-LABEL: define spir_func void @test_merge_if(i32 frozen %a) local_unnamed_addr #1 { // CHECK: %[[tobool:.+]] = icmp eq i32 %a, 0 // CHECK: br i1 %[[tobool]], label %[[if_end3_critedge:.+]], label %[[if_then:.+]] @@ -61,7 +61,7 @@ // Test two if's are not merged. -// CHECK-LABEL: define spir_func void @test_no_merge_if(i32 %a) local_unnamed_addr #1 +// CHECK-LABEL: define spir_func void @test_no_merge_if(i32 frozen %a) local_unnamed_addr #1 // CHECK: %[[tobool:.+]] = icmp eq i32 %a, 0 // CHECK: br i1 %[[tobool]], label %[[if_end:.+]], label %[[if_then:.+]] // CHECK: [[if_then]]: diff --git a/clang/test/CodeGenOpenCL/event_t.cl b/clang/test/CodeGenOpenCL/event_t.cl --- a/clang/test/CodeGenOpenCL/event_t.cl +++ b/clang/test/CodeGenOpenCL/event_t.cl @@ -6,9 +6,9 @@ event_t e; // CHECK: alloca %opencl.event_t*, foo(e); -// CHECK: call {{.*}}void @foo(%opencl.event_t* % +// CHECK: call {{.*}}void @foo(%opencl.event_t* frozen % foo(0); -// CHECK: call {{.*}}void @foo(%opencl.event_t* null) +// CHECK: call {{.*}}void @foo(%opencl.event_t* frozen null) foo((event_t)0); -// CHECK: call {{.*}}void @foo(%opencl.event_t* null) +// CHECK: call {{.*}}void @foo(%opencl.event_t* frozen null) } diff --git a/clang/test/CodeGenOpenCL/extension-begin.cl b/clang/test/CodeGenOpenCL/extension-begin.cl --- a/clang/test/CodeGenOpenCL/extension-begin.cl +++ b/clang/test/CodeGenOpenCL/extension-begin.cl @@ -10,16 +10,16 @@ #pragma OPENCL EXTENSION my_ext : enable -//CHECK: define spir_func void @test_f1(i64 %x) -//CHECK: call spir_func void @_Z1fl(i64 %{{.*}}) +//CHECK: define spir_func void @test_f1(i64 frozen %x) +//CHECK: call spir_func void @_Z1fl(i64 frozen %{{.*}}) void test_f1(long x) { f(x); } #pragma OPENCL EXTENSION my_ext : disable -//CHECK: define spir_func void @test_f2(i64 %x) -//CHECK: call spir_func void @_Z1fi(i32 %{{.*}}) +//CHECK: define spir_func void @test_f2(i64 frozen %x) +//CHECK: call spir_func void @_Z1fi(i32 frozen %{{.*}}) void test_f2(long x) { f(x); } diff --git a/clang/test/CodeGenOpenCL/fdeclare-opencl-builtins.cl b/clang/test/CodeGenOpenCL/fdeclare-opencl-builtins.cl --- a/clang/test/CodeGenOpenCL/fdeclare-opencl-builtins.cl +++ b/clang/test/CodeGenOpenCL/fdeclare-opencl-builtins.cl @@ -2,7 +2,7 @@ // Test that Attr.Const from OpenCLBuiltins.td is lowered to a readnone attribute. // CHECK-LABEL: @test_const_attr -// CHECK: call i32 @_Z3maxii({{.*}}) [[ATTR_CONST:#[0-9]]] +// CHECK: call frozen i32 @_Z3maxii({{.*}}) [[ATTR_CONST:#[0-9]]] // CHECK: ret int test_const_attr(int a) { return max(a, 2); @@ -10,7 +10,7 @@ // Test that Attr.Pure from OpenCLBuiltins.td is lowered to a readonly attribute. // CHECK-LABEL: @test_pure_attr -// CHECK: call <4 x float> @_Z11read_imagef{{.*}} [[ATTR_PURE:#[0-9]]] +// CHECK: call frozen <4 x float> @_Z11read_imagef{{.*}} [[ATTR_PURE:#[0-9]]] // CHECK: ret kernel void test_pure_attr(read_only image1d_t img) { float4 resf = read_imagef(img, 42); @@ -18,7 +18,7 @@ // Test that builtins with only one prototype are mangled. // CHECK-LABEL: @test_mangling -// CHECK: call i32 @_Z12get_local_idj +// CHECK: call frozen i32 @_Z12get_local_idj kernel void test_mangling() { size_t lid = get_local_id(0); } diff --git a/clang/test/CodeGenOpenCL/fpmath.cl b/clang/test/CodeGenOpenCL/fpmath.cl --- a/clang/test/CodeGenOpenCL/fpmath.cl +++ b/clang/test/CodeGenOpenCL/fpmath.cl @@ -1,7 +1,7 @@ -// RUN: %clang_cc1 %s -emit-llvm -o - -triple spir-unknown-unknown | FileCheck --check-prefix=CHECK --check-prefix=NODIVOPT %s -// RUN: %clang_cc1 %s -emit-llvm -o - -triple spir-unknown-unknown -cl-fp32-correctly-rounded-divide-sqrt | FileCheck --check-prefix=CHECK --check-prefix=DIVOPT %s -// RUN: %clang_cc1 %s -emit-llvm -o - -DNOFP64 -cl-std=CL1.2 -triple r600-unknown-unknown -target-cpu r600 -pedantic | FileCheck --check-prefix=CHECK-FLT %s -// RUN: %clang_cc1 %s -emit-llvm -o - -DFP64 -cl-std=CL1.2 -triple spir-unknown-unknown -pedantic | FileCheck --check-prefix=CHECK-DBL %s +// RUN: %clang_cc1 -disable-frozen-args %s -emit-llvm -o - -triple spir-unknown-unknown | FileCheck --check-prefix=CHECK --check-prefix=NODIVOPT %s +// RUN: %clang_cc1 -disable-frozen-args %s -emit-llvm -o - -triple spir-unknown-unknown -cl-fp32-correctly-rounded-divide-sqrt | FileCheck --check-prefix=CHECK --check-prefix=DIVOPT %s +// RUN: %clang_cc1 -disable-frozen-args %s -emit-llvm -o - -DNOFP64 -cl-std=CL1.2 -triple r600-unknown-unknown -target-cpu r600 -pedantic | FileCheck --check-prefix=CHECK-FLT %s +// RUN: %clang_cc1 -disable-frozen-args %s -emit-llvm -o - -DFP64 -cl-std=CL1.2 -triple spir-unknown-unknown -pedantic | FileCheck --check-prefix=CHECK-DBL %s typedef __attribute__(( ext_vector_type(4) )) float float4; diff --git a/clang/test/CodeGenOpenCL/func-call-dbg-loc.cl b/clang/test/CodeGenOpenCL/func-call-dbg-loc.cl --- a/clang/test/CodeGenOpenCL/func-call-dbg-loc.cl +++ b/clang/test/CodeGenOpenCL/func-call-dbg-loc.cl @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -triple amdgcn---amdgizcl -debug-info-kind=limited -O0 -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args -triple amdgcn---amdgizcl -debug-info-kind=limited -O0 -emit-llvm -o - %s | FileCheck %s typedef struct { diff --git a/clang/test/CodeGenOpenCL/half.cl b/clang/test/CodeGenOpenCL/half.cl --- a/clang/test/CodeGenOpenCL/half.cl +++ b/clang/test/CodeGenOpenCL/half.cl @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 %s -emit-llvm -o - -triple spir-unknown-unknown | FileCheck %s -// RUN: %clang_cc1 %s -emit-llvm -o - -triple x86_64-pc-win32 | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args %s -emit-llvm -o - -triple spir-unknown-unknown | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args %s -emit-llvm -o - -triple x86_64-pc-win32 | FileCheck %s #pragma OPENCL EXTENSION cl_khr_fp16 : enable diff --git a/clang/test/CodeGenOpenCL/images.cl b/clang/test/CodeGenOpenCL/images.cl --- a/clang/test/CodeGenOpenCL/images.cl +++ b/clang/test/CodeGenOpenCL/images.cl @@ -5,8 +5,8 @@ __attribute__((overloadable)) void read_image(write_only image1d_t img_wo); kernel void test_read_image(read_only image1d_t img_ro, write_only image1d_t img_wo) { - // CHECK: call void @_Z10read_image14ocl_image1d_ro(%opencl.image1d_ro_t* %{{[0-9]+}}) + // CHECK: call void @_Z10read_image14ocl_image1d_ro(%opencl.image1d_ro_t* frozen %{{[0-9]+}}) read_image(img_ro); - // CHECK: call void @_Z10read_image14ocl_image1d_wo(%opencl.image1d_wo_t* %{{[0-9]+}}) + // CHECK: call void @_Z10read_image14ocl_image1d_wo(%opencl.image1d_wo_t* frozen %{{[0-9]+}}) read_image(img_wo); } diff --git a/clang/test/CodeGenOpenCL/kernels-have-spir-cc-by-default.cl b/clang/test/CodeGenOpenCL/kernels-have-spir-cc-by-default.cl --- a/clang/test/CodeGenOpenCL/kernels-have-spir-cc-by-default.cl +++ b/clang/test/CodeGenOpenCL/kernels-have-spir-cc-by-default.cl @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 %s -cl-std=CL1.2 -emit-llvm -triple x86_64-unknown-unknown -o - | FileCheck %s -// RUN: %clang_cc1 %s -cl-std=CL1.2 -emit-llvm -triple amdgcn-unknown-unknown -o - | FileCheck -check-prefixes=AMDGCN %s +// RUN: %clang_cc1 -disable-frozen-args %s -cl-std=CL1.2 -emit-llvm -triple x86_64-unknown-unknown -o - | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args %s -cl-std=CL1.2 -emit-llvm -triple amdgcn-unknown-unknown -o - | FileCheck -check-prefixes=AMDGCN %s // Test that the kernels always use the SPIR calling convention // to have unambiguous mapping of arguments to feasibly implement // clSetKernelArg(). diff --git a/clang/test/CodeGenOpenCL/no-half.cl b/clang/test/CodeGenOpenCL/no-half.cl --- a/clang/test/CodeGenOpenCL/no-half.cl +++ b/clang/test/CodeGenOpenCL/no-half.cl @@ -4,7 +4,7 @@ #pragma OPENCL EXTENSION cl_khr_fp64:enable -// CHECK-LABEL: @test_store_float(float %foo, half addrspace({{.}}){{.*}} %bar) +// CHECK-LABEL: @test_store_float(float frozen %foo, half addrspace({{.}}){{.*}} %bar) __kernel void test_store_float(float foo, __global half* bar) { __builtin_store_halff(foo, bar); @@ -12,7 +12,7 @@ // CHECK: store half [[HALF_VAL]], half addrspace({{.}})* %bar, align 2 } -// CHECK-LABEL: @test_store_double(double %foo, half addrspace({{.}}){{.*}} %bar) +// CHECK-LABEL: @test_store_double(double frozen %foo, half addrspace({{.}}){{.*}} %bar) __kernel void test_store_double(double foo, __global half* bar) { __builtin_store_half(foo, bar); diff --git a/clang/test/CodeGenOpenCL/null_queue.cl b/clang/test/CodeGenOpenCL/null_queue.cl --- a/clang/test/CodeGenOpenCL/null_queue.cl +++ b/clang/test/CodeGenOpenCL/null_queue.cl @@ -14,5 +14,5 @@ queue_t q = 0; func(0); // CHECK: store %opencl.queue_t* null, %opencl.queue_t** %q - // CHECK: call void @func(%opencl.queue_t* null) + // CHECK: call void @func(%opencl.queue_t* frozen null) } diff --git a/clang/test/CodeGenOpenCL/opencl_types.cl b/clang/test/CodeGenOpenCL/opencl_types.cl --- a/clang/test/CodeGenOpenCL/opencl_types.cl +++ b/clang/test/CodeGenOpenCL/opencl_types.cl @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -cl-std=CL2.0 %s -triple "spir-unknown-unknown" -emit-llvm -o - -O0 | FileCheck %s --check-prefixes=CHECK-COM,CHECK-SPIR -// RUN: %clang_cc1 -cl-std=CL2.0 %s -triple "amdgcn--amdhsa" -emit-llvm -o - -O0 | FileCheck %s --check-prefixes=CHECK-COM,CHECK-AMDGCN +// RUN: %clang_cc1 -disable-frozen-args -cl-std=CL2.0 %s -triple "spir-unknown-unknown" -emit-llvm -o - -O0 | FileCheck %s --check-prefixes=CHECK-COM,CHECK-SPIR +// RUN: %clang_cc1 -disable-frozen-args -cl-std=CL2.0 %s -triple "amdgcn--amdhsa" -emit-llvm -o - -O0 | FileCheck %s --check-prefixes=CHECK-COM,CHECK-AMDGCN #define CLK_ADDRESS_CLAMP_TO_EDGE 2 #define CLK_NORMALIZED_COORDS_TRUE 1 diff --git a/clang/test/CodeGenOpenCL/overload.cl b/clang/test/CodeGenOpenCL/overload.cl --- a/clang/test/CodeGenOpenCL/overload.cl +++ b/clang/test/CodeGenOpenCL/overload.cl @@ -1,10 +1,10 @@ -// RUN: %clang_cc1 -cl-std=CL2.0 -emit-llvm -o - -triple spir-unknown-unknown %s | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args -cl-std=CL2.0 -emit-llvm -o - -triple spir-unknown-unknown %s | FileCheck %s typedef short short4 __attribute__((ext_vector_type(4))); -// CHECK-DAG: declare spir_func <4 x i16> @_Z5clampDv4_sS_S_(<4 x i16>, <4 x i16>, <4 x i16>) +// CHECK-DAG: declare spir_func frozen <4 x i16> @_Z5clampDv4_sS_S_(<4 x i16>, <4 x i16>, <4 x i16>) short4 __attribute__ ((overloadable)) clamp(short4 x, short4 minval, short4 maxval); -// CHECK-DAG: declare spir_func <4 x i16> @_Z5clampDv4_sss(<4 x i16>, i16 signext, i16 signext) +// CHECK-DAG: declare spir_func frozen <4 x i16> @_Z5clampDv4_sss(<4 x i16>, i16 signext, i16 signext) short4 __attribute__ ((overloadable)) clamp(short4 x, short minval, short maxval); void __attribute__((overloadable)) foo(global int *a, global int *b); void __attribute__((overloadable)) foo(generic int *a, generic int *b); @@ -39,8 +39,8 @@ void kernel test2() { short4 e0=0; - // CHECK-DAG: call spir_func <4 x i16> @_Z5clampDv4_sss(<4 x i16> zeroinitializer, i16 signext 0, i16 signext 255) + // CHECK-DAG: call spir_func frozen <4 x i16> @_Z5clampDv4_sss(<4 x i16> zeroinitializer, i16 signext 0, i16 signext 255) clamp(e0, 0, 255); - // CHECK-DAG: call spir_func <4 x i16> @_Z5clampDv4_sS_S_(<4 x i16> zeroinitializer, <4 x i16> zeroinitializer, <4 x i16> zeroinitializer) + // CHECK-DAG: call spir_func frozen <4 x i16> @_Z5clampDv4_sS_S_(<4 x i16> zeroinitializer, <4 x i16> zeroinitializer, <4 x i16> zeroinitializer) clamp(e0, e0, e0); } diff --git a/clang/test/CodeGenOpenCL/pipe_types.cl b/clang/test/CodeGenOpenCL/pipe_types.cl --- a/clang/test/CodeGenOpenCL/pipe_types.cl +++ b/clang/test/CodeGenOpenCL/pipe_types.cl @@ -6,30 +6,30 @@ typedef int __attribute__((ext_vector_type(4))) int4; void test1(read_only pipe int p) { -// CHECK: define void @test1(%opencl.pipe_ro_t* %p) +// CHECK: define void @test1(%opencl.pipe_ro_t* frozen %p) reserve_id_t rid; // CHECK: %rid = alloca %opencl.reserve_id_t } void test2(write_only pipe float p) { -// CHECK: define void @test2(%opencl.pipe_wo_t* %p) +// CHECK: define void @test2(%opencl.pipe_wo_t* frozen %p) } void test3(read_only pipe const int p) { -// CHECK: define void @test3(%opencl.pipe_ro_t* %p) +// CHECK: define void @test3(%opencl.pipe_ro_t* frozen %p) } void test4(read_only pipe uchar3 p) { -// CHECK: define void @test4(%opencl.pipe_ro_t* %p) +// CHECK: define void @test4(%opencl.pipe_ro_t* frozen %p) } void test5(read_only pipe int4 p) { -// CHECK: define void @test5(%opencl.pipe_ro_t* %p) +// CHECK: define void @test5(%opencl.pipe_ro_t* frozen %p) } typedef read_only pipe int MyPipe; kernel void test6(MyPipe p) { -// CHECK: define spir_kernel void @test6(%opencl.pipe_ro_t* %p) +// CHECK: define spir_kernel void @test6(%opencl.pipe_ro_t* frozen %p) } struct Person { diff --git a/clang/test/CodeGenOpenCL/printf.cl b/clang/test/CodeGenOpenCL/printf.cl --- a/clang/test/CodeGenOpenCL/printf.cl +++ b/clang/test/CodeGenOpenCL/printf.cl @@ -12,25 +12,25 @@ // ALL-LABEL: @test_printf_float2( -// FP64: %call = call spir_func i32 (i8 addrspace(2)*, ...) @printf(i8 addrspace(2)* getelementptr inbounds ([7 x i8], [7 x i8] addrspace(2)* @.str, i32 0, i32 0), <2 x float> %0) +// FP64: %call = call spir_func frozen i32 (i8 addrspace(2)*, ...) @printf(i8 addrspace(2)* frozen getelementptr inbounds ([7 x i8], [7 x i8] addrspace(2)* @.str, i32 0, i32 0), <2 x float> frozen %0) -// NOFP64: call spir_func i32 (i8 addrspace(2)*, ...) @printf(i8 addrspace(2)* getelementptr inbounds ([7 x i8], [7 x i8] addrspace(2)* @.str, i32 0, i32 0), <2 x float> %0) +// NOFP64: call spir_func frozen i32 (i8 addrspace(2)*, ...) @printf(i8 addrspace(2)* frozen getelementptr inbounds ([7 x i8], [7 x i8] addrspace(2)* @.str, i32 0, i32 0), <2 x float> frozen %0) kernel void test_printf_float2(float2 arg) { printf("%v2hlf", arg); } // ALL-LABEL: @test_printf_half2( -// FP64: %call = call spir_func i32 (i8 addrspace(2)*, ...) @printf(i8 addrspace(2)* getelementptr inbounds ([6 x i8], [6 x i8] addrspace(2)* @.str.1, i32 0, i32 0), <2 x half> %0) +// FP64: %call = call spir_func frozen i32 (i8 addrspace(2)*, ...) @printf(i8 addrspace(2)* frozen getelementptr inbounds ([6 x i8], [6 x i8] addrspace(2)* @.str.1, i32 0, i32 0), <2 x half> frozen %0) -// NOFP64: %call = call spir_func i32 (i8 addrspace(2)*, ...) @printf(i8 addrspace(2)* getelementptr inbounds ([6 x i8], [6 x i8] addrspace(2)* @.str.1, i32 0, i32 0), <2 x half> %0) +// NOFP64: %call = call spir_func frozen i32 (i8 addrspace(2)*, ...) @printf(i8 addrspace(2)* frozen getelementptr inbounds ([6 x i8], [6 x i8] addrspace(2)* @.str.1, i32 0, i32 0), <2 x half> frozen %0) kernel void test_printf_half2(half2 arg) { printf("%v2hf", arg); } #ifdef cl_khr_fp64 // FP64-LABEL: @test_printf_double2( -// FP64: call spir_func i32 (i8 addrspace(2)*, ...) @printf(i8 addrspace(2)* getelementptr inbounds ([6 x i8], [6 x i8] addrspace(2)* @.str.2, i32 0, i32 0), <2 x double> %0) +// FP64: call spir_func frozen i32 (i8 addrspace(2)*, ...) @printf(i8 addrspace(2)* frozen getelementptr inbounds ([6 x i8], [6 x i8] addrspace(2)* @.str.2, i32 0, i32 0), <2 x double> frozen %0) kernel void test_printf_double2(double2 arg) { printf("%v2lf", arg); } diff --git a/clang/test/CodeGenOpenCL/sampler.cl b/clang/test/CodeGenOpenCL/sampler.cl --- a/clang/test/CodeGenOpenCL/sampler.cl +++ b/clang/test/CodeGenOpenCL/sampler.cl @@ -1,6 +1,6 @@ -// RUN: %clang_cc1 %s -emit-llvm -triple spir-unknown-unknown -o - -O0 | FileCheck %s -// RUN: %clang_cc1 %s -cl-std=CL2.0 -emit-llvm -triple spir-unknown-unknown -o - -O0 | FileCheck %s -// RUN: %clang_cc1 %s -cl-std=clc++ -emit-llvm -triple spir-unknown-unknown -o - -O0 | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args %s -emit-llvm -triple spir-unknown-unknown -o - -O0 | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args %s -cl-std=CL2.0 -emit-llvm -triple spir-unknown-unknown -o - -O0 | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args %s -cl-std=clc++ -emit-llvm -triple spir-unknown-unknown -o - -O0 | FileCheck %s // // This test covers 5 cases of sampler initialzation: // 1. function argument passing diff --git a/clang/test/CodeGenOpenCL/size_t.cl b/clang/test/CodeGenOpenCL/size_t.cl --- a/clang/test/CodeGenOpenCL/size_t.cl +++ b/clang/test/CodeGenOpenCL/size_t.cl @@ -3,74 +3,74 @@ // RUN: %clang_cc1 %s -cl-std=CL2.0 -finclude-default-header -emit-llvm -O0 -triple amdgcn -o - | FileCheck --check-prefix=SZ64 --check-prefix=AMDGCN %s // RUN: %clang_cc1 %s -cl-std=CL2.0 -finclude-default-header -emit-llvm -O0 -triple amdgcn---opencl -o - | FileCheck --check-prefix=SZ64 --check-prefix=AMDGCN %s -//SZ32: define{{.*}} i32 @test_ptrtoint_private(i8* %x) +//SZ32: define{{.*}} i32 @test_ptrtoint_private(i8* frozen %x) //SZ32: ptrtoint i8* %{{.*}} to i32 -//SZ64ONLY: define{{.*}} i64 @test_ptrtoint_private(i8* %x) +//SZ64ONLY: define{{.*}} i64 @test_ptrtoint_private(i8* frozen %x) //SZ64ONLY: ptrtoint i8* %{{.*}} to i64 -//AMDGCN: define{{.*}} i64 @test_ptrtoint_private(i8 addrspace(5)* %x) +//AMDGCN: define{{.*}} i64 @test_ptrtoint_private(i8 addrspace(5)* frozen %x) //AMDGCN: ptrtoint i8 addrspace(5)* %{{.*}} to i64 size_t test_ptrtoint_private(private char* x) { return (size_t)x; } -//SZ32: define{{.*}} i32 @test_ptrtoint_global(i8 addrspace(1)* %x) +//SZ32: define{{.*}} i32 @test_ptrtoint_global(i8 addrspace(1)* frozen %x) //SZ32: ptrtoint i8 addrspace(1)* %{{.*}} to i32 -//SZ64: define{{.*}} i64 @test_ptrtoint_global(i8 addrspace(1)* %x) +//SZ64: define{{.*}} i64 @test_ptrtoint_global(i8 addrspace(1)* frozen %x) //SZ64: ptrtoint i8 addrspace(1)* %{{.*}} to i64 intptr_t test_ptrtoint_global(global char* x) { return (intptr_t)x; } -//SZ32: define{{.*}} i32 @test_ptrtoint_constant(i8 addrspace(2)* %x) +//SZ32: define{{.*}} i32 @test_ptrtoint_constant(i8 addrspace(2)* frozen %x) //SZ32: ptrtoint i8 addrspace(2)* %{{.*}} to i32 -//SZ64ONLY: define{{.*}} i64 @test_ptrtoint_constant(i8 addrspace(2)* %x) +//SZ64ONLY: define{{.*}} i64 @test_ptrtoint_constant(i8 addrspace(2)* frozen %x) //SZ64ONLY: ptrtoint i8 addrspace(2)* %{{.*}} to i64 -//AMDGCN: define{{.*}} i64 @test_ptrtoint_constant(i8 addrspace(4)* %x) +//AMDGCN: define{{.*}} i64 @test_ptrtoint_constant(i8 addrspace(4)* frozen %x) //AMDGCN: ptrtoint i8 addrspace(4)* %{{.*}} to i64 uintptr_t test_ptrtoint_constant(constant char* x) { return (uintptr_t)x; } -//SZ32: define{{.*}} i32 @test_ptrtoint_local(i8 addrspace(3)* %x) +//SZ32: define{{.*}} i32 @test_ptrtoint_local(i8 addrspace(3)* frozen %x) //SZ32: ptrtoint i8 addrspace(3)* %{{.*}} to i32 -//SZ64: define{{.*}} i64 @test_ptrtoint_local(i8 addrspace(3)* %x) +//SZ64: define{{.*}} i64 @test_ptrtoint_local(i8 addrspace(3)* frozen %x) //SZ64: ptrtoint i8 addrspace(3)* %{{.*}} to i64 size_t test_ptrtoint_local(local char* x) { return (size_t)x; } -//SZ32: define{{.*}} i32 @test_ptrtoint_generic(i8 addrspace(4)* %x) +//SZ32: define{{.*}} i32 @test_ptrtoint_generic(i8 addrspace(4)* frozen %x) //SZ32: ptrtoint i8 addrspace(4)* %{{.*}} to i32 -//SZ64ONLY: define{{.*}} i64 @test_ptrtoint_generic(i8 addrspace(4)* %x) +//SZ64ONLY: define{{.*}} i64 @test_ptrtoint_generic(i8 addrspace(4)* frozen %x) //SZ64ONLY: ptrtoint i8 addrspace(4)* %{{.*}} to i64 -//AMDGCN: define{{.*}} i64 @test_ptrtoint_generic(i8* %x) +//AMDGCN: define{{.*}} i64 @test_ptrtoint_generic(i8* frozen %x) //AMDGCN: ptrtoint i8* %{{.*}} to i64 size_t test_ptrtoint_generic(generic char* x) { return (size_t)x; } -//SZ32: define{{.*}} i8* @test_inttoptr_private(i32 %x) +//SZ32: define{{.*}} i8* @test_inttoptr_private(i32 frozen %x) //SZ32: inttoptr i32 %{{.*}} to i8* -//SZ64ONLY: define{{.*}} i8* @test_inttoptr_private(i64 %x) +//SZ64ONLY: define{{.*}} i8* @test_inttoptr_private(i64 frozen %x) //SZ64ONLY: inttoptr i64 %{{.*}} to i8* -//AMDGCN: define{{.*}} i8 addrspace(5)* @test_inttoptr_private(i64 %x) +//AMDGCN: define{{.*}} i8 addrspace(5)* @test_inttoptr_private(i64 frozen %x) //AMDGCN: trunc i64 %{{.*}} to i32 //AMDGCN: inttoptr i32 %{{.*}} to i8 addrspace(5)* private char* test_inttoptr_private(size_t x) { return (private char*)x; } -//SZ32: define{{.*}} i8 addrspace(1)* @test_inttoptr_global(i32 %x) +//SZ32: define{{.*}} i8 addrspace(1)* @test_inttoptr_global(i32 frozen %x) //SZ32: inttoptr i32 %{{.*}} to i8 addrspace(1)* -//SZ64: define{{.*}} i8 addrspace(1)* @test_inttoptr_global(i64 %x) +//SZ64: define{{.*}} i8 addrspace(1)* @test_inttoptr_global(i64 frozen %x) //SZ64: inttoptr i64 %{{.*}} to i8 addrspace(1)* global char* test_inttoptr_global(size_t x) { return (global char*)x; } -//SZ32: define{{.*}} i8 addrspace(3)* @test_add_local(i8 addrspace(3)* %x, i32 %y) +//SZ32: define{{.*}} i8 addrspace(3)* @test_add_local(i8 addrspace(3)* frozen %x, i32 frozen %y) //SZ32: getelementptr inbounds i8, i8 addrspace(3)* %{{.*}}, i32 -//SZ64: define{{.*}} i8 addrspace(3)* @test_add_local(i8 addrspace(3)* %x, i64 %y) +//SZ64: define{{.*}} i8 addrspace(3)* @test_add_local(i8 addrspace(3)* frozen %x, i64 frozen %y) //AMDGCN: trunc i64 %{{.*}} to i32 //AMDGCN: getelementptr inbounds i8, i8 addrspace(3)* %{{.*}}, i32 //SZ64ONLY: getelementptr inbounds i8, i8 addrspace(3)* %{{.*}}, i64 @@ -78,44 +78,44 @@ return x + y; } -//SZ32: define{{.*}} i8 addrspace(1)* @test_add_global(i8 addrspace(1)* %x, i32 %y) +//SZ32: define{{.*}} i8 addrspace(1)* @test_add_global(i8 addrspace(1)* frozen %x, i32 frozen %y) //SZ32: getelementptr inbounds i8, i8 addrspace(1)* %{{.*}}, i32 -//SZ64: define{{.*}} i8 addrspace(1)* @test_add_global(i8 addrspace(1)* %x, i64 %y) +//SZ64: define{{.*}} i8 addrspace(1)* @test_add_global(i8 addrspace(1)* frozen %x, i64 frozen %y) //SZ64: getelementptr inbounds i8, i8 addrspace(1)* %{{.*}}, i64 global char* test_add_global(global char* x, ptrdiff_t y) { return x + y; } -//SZ32: define{{.*}} i32 @test_sub_local(i8 addrspace(3)* %x, i8 addrspace(3)* %y) +//SZ32: define{{.*}} i32 @test_sub_local(i8 addrspace(3)* frozen %x, i8 addrspace(3)* frozen %y) //SZ32: ptrtoint i8 addrspace(3)* %{{.*}} to i32 //SZ32: ptrtoint i8 addrspace(3)* %{{.*}} to i32 -//SZ64: define{{.*}} i64 @test_sub_local(i8 addrspace(3)* %x, i8 addrspace(3)* %y) +//SZ64: define{{.*}} i64 @test_sub_local(i8 addrspace(3)* frozen %x, i8 addrspace(3)* frozen %y) //SZ64: ptrtoint i8 addrspace(3)* %{{.*}} to i64 //SZ64: ptrtoint i8 addrspace(3)* %{{.*}} to i64 ptrdiff_t test_sub_local(local char* x, local char *y) { return x - y; } -//SZ32: define{{.*}} i32 @test_sub_private(i8* %x, i8* %y) +//SZ32: define{{.*}} i32 @test_sub_private(i8* frozen %x, i8* frozen %y) //SZ32: ptrtoint i8* %{{.*}} to i32 //SZ32: ptrtoint i8* %{{.*}} to i32 -//SZ64ONLY: define{{.*}} i64 @test_sub_private(i8* %x, i8* %y) +//SZ64ONLY: define{{.*}} i64 @test_sub_private(i8* frozen %x, i8* frozen %y) //SZ64ONLY: ptrtoint i8* %{{.*}} to i64 //SZ64ONLY: ptrtoint i8* %{{.*}} to i64 -//AMDGCN: define{{.*}} i64 @test_sub_private(i8 addrspace(5)* %x, i8 addrspace(5)* %y) +//AMDGCN: define{{.*}} i64 @test_sub_private(i8 addrspace(5)* frozen %x, i8 addrspace(5)* frozen %y) //AMDGCN: ptrtoint i8 addrspace(5)* %{{.*}} to i64 //AMDGCN: ptrtoint i8 addrspace(5)* %{{.*}} to i64 ptrdiff_t test_sub_private(private char* x, private char *y) { return x - y; } -//SZ32: define{{.*}} i32 @test_sub_mix(i8* %x, i8 addrspace(4)* %y) +//SZ32: define{{.*}} i32 @test_sub_mix(i8* frozen %x, i8 addrspace(4)* frozen %y) //SZ32: ptrtoint i8* %{{.*}} to i32 //SZ32: ptrtoint i8 addrspace(4)* %{{.*}} to i32 -//SZ64ONLY: define{{.*}} i64 @test_sub_mix(i8* %x, i8 addrspace(4)* %y) +//SZ64ONLY: define{{.*}} i64 @test_sub_mix(i8* frozen %x, i8 addrspace(4)* frozen %y) //SZ64ONLY: ptrtoint i8* %{{.*}} to i64 //SZ64ONLY: ptrtoint i8 addrspace(4)* %{{.*}} to i64 -//AMDGCN: define{{.*}} i64 @test_sub_mix(i8 addrspace(5)* %x, i8* %y) +//AMDGCN: define{{.*}} i64 @test_sub_mix(i8 addrspace(5)* frozen %x, i8* frozen %y) //AMDGCN: ptrtoint i8 addrspace(5)* %{{.*}} to i64 //AMDGCN: ptrtoint i8* %{{.*}} to i64 ptrdiff_t test_sub_mix(private char* x, generic char *y) { diff --git a/clang/test/CodeGenOpenCL/spir-calling-conv.cl b/clang/test/CodeGenOpenCL/spir-calling-conv.cl --- a/clang/test/CodeGenOpenCL/spir-calling-conv.cl +++ b/clang/test/CodeGenOpenCL/spir-calling-conv.cl @@ -5,14 +5,14 @@ kernel void bar(global int *A); kernel void foo(global int *A) -// CHECK: define spir_kernel void @foo(i32 addrspace(1)* %A) +// CHECK: define spir_kernel void @foo(i32 addrspace(1)* frozen %A) { int id = get_dummy_id(0); - // CHECK: %{{[a-z0-9_]+}} = tail call spir_func i32 @get_dummy_id(i32 0) + // CHECK: %{{[a-z0-9_]+}} = tail call spir_func frozen i32 @get_dummy_id(i32 frozen 0) A[id] = id; bar(A); - // CHECK: tail call spir_kernel void @bar(i32 addrspace(1)* %A) + // CHECK: tail call spir_kernel void @bar(i32 addrspace(1)* frozen %A) } -// CHECK: declare spir_func i32 @get_dummy_id(i32) -// CHECK: declare spir_kernel void @bar(i32 addrspace(1)*) +// CHECK: declare spir_func frozen i32 @get_dummy_id(i32 frozen) +// CHECK: declare spir_kernel void @bar(i32 addrspace(1)* frozen) diff --git a/clang/test/CodeGenOpenCLCXX/address-space-deduction.cl b/clang/test/CodeGenOpenCLCXX/address-space-deduction.cl --- a/clang/test/CodeGenOpenCLCXX/address-space-deduction.cl +++ b/clang/test/CodeGenOpenCLCXX/address-space-deduction.cl @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 %s -triple spir-unknown-unknown -cl-std=clc++ -O0 -emit-llvm -o - | FileCheck %s -check-prefixes=COMMON,PTR -// RUN: %clang_cc1 %s -triple spir-unknown-unknown -cl-std=clc++ -O0 -emit-llvm -o - -DREF | FileCheck %s -check-prefixes=COMMON,REF +// RUN: %clang_cc1 -disable-frozen-args %s -triple spir-unknown-unknown -cl-std=clc++ -O0 -emit-llvm -o - | FileCheck %s -check-prefixes=COMMON,PTR +// RUN: %clang_cc1 -disable-frozen-args %s -triple spir-unknown-unknown -cl-std=clc++ -O0 -emit-llvm -o - -DREF | FileCheck %s -check-prefixes=COMMON,REF #ifdef REF #define PTR & @@ -21,7 +21,7 @@ //COMMON: @loc_ext_p = external addrspace(1) {{global|constant}} i32 addrspace(4)* //COMMON: @loc_ext = external addrspace(1) global i32 -//COMMON: define spir_func i32 @_Z3fooi{{P|R}}U3AS4i(i32 %par, i32 addrspace(4)*{{.*}} %par_p) +//COMMON: define spir_func frozen i32 @_Z3fooi{{P|R}}U3AS4i(i32 %par, i32 addrspace(4)*{{.*}} %par_p) int foo(int par, int PTR par_p){ //COMMON: %loc = alloca i32 int loc; diff --git a/clang/test/CodeGenOpenCLCXX/addrspace-derived-base.cl b/clang/test/CodeGenOpenCLCXX/addrspace-derived-base.cl --- a/clang/test/CodeGenOpenCLCXX/addrspace-derived-base.cl +++ b/clang/test/CodeGenOpenCLCXX/addrspace-derived-base.cl @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 %s -triple spir -cl-std=clc++ -emit-llvm -O0 -o - | FileCheck %s +// RUN: %clang_cc1 -disable-frozen-args %s -triple spir -cl-std=clc++ -emit-llvm -O0 -o - | FileCheck %s struct B { int mb; @@ -13,13 +13,13 @@ D d; //CHECK-LABEL: foo //CHECK: addrspacecast %class.D* %d to %class.D addrspace(4)* - //CHECK: call spir_func i32 @_ZNU3AS41D5getmbEv(%class.D addrspace(4)* + //CHECK: call spir_func frozen i32 @_ZNU3AS41D5getmbEv(%class.D addrspace(4)* d.getmb(); } //Derived and Base are in the same address space. -//CHECK: define linkonce_odr spir_func i32 @_ZNU3AS41D5getmbEv(%class.D addrspace(4)* %this) +//CHECK: define linkonce_odr spir_func frozen i32 @_ZNU3AS41D5getmbEv(%class.D addrspace(4)* %this) //CHECK: bitcast %class.D addrspace(4)* %this1 to %struct.B addrspace(4)* diff --git a/clang/test/CodeGenOpenCLCXX/addrspace-of-this.cl b/clang/test/CodeGenOpenCLCXX/addrspace-of-this.cl --- a/clang/test/CodeGenOpenCLCXX/addrspace-of-this.cl +++ b/clang/test/CodeGenOpenCLCXX/addrspace-of-this.cl @@ -1,6 +1,6 @@ -// RUN: %clang_cc1 %s -triple spir-unknown-unknown -cl-std=clc++ -emit-llvm -pedantic -verify -O0 -o - -DDECL | FileCheck %s --check-prefixes="COMMON,EXPL" -// RUN: %clang_cc1 %s -triple spir-unknown-unknown -cl-std=clc++ -emit-llvm -pedantic -verify -O0 -o - -DDECL -DUSE_DEFLT | FileCheck %s --check-prefixes="COMMON,IMPL" -// RUN: %clang_cc1 %s -triple spir-unknown-unknown -cl-std=clc++ -emit-llvm -pedantic -verify -O0 -o - | FileCheck %s --check-prefixes="COMMON,IMPL" +// RUN: %clang_cc1 -disable-frozen-args %s -triple spir-unknown-unknown -cl-std=clc++ -emit-llvm -pedantic -verify -O0 -o - -DDECL | FileCheck %s --check-prefixes="COMMON,EXPL" +// RUN: %clang_cc1 -disable-frozen-args %s -triple spir-unknown-unknown -cl-std=clc++ -emit-llvm -pedantic -verify -O0 -o - -DDECL -DUSE_DEFLT | FileCheck %s --check-prefixes="COMMON,IMPL" +// RUN: %clang_cc1 -disable-frozen-args %s -triple spir-unknown-unknown -cl-std=clc++ -emit-llvm -pedantic -verify -O0 -o - | FileCheck %s --check-prefixes="COMMON,IMPL" // expected-no-diagnostics // Test that the 'this' pointer is in the __generic address space. @@ -86,12 +86,12 @@ // COMMON-LABEL: @test__global() // Test the address space of 'this' when invoking a method. -// COMMON: call spir_func i32 @_ZNU3AS41C3getEv(%class.C addrspace(4)* addrspacecast (%class.C addrspace(1)* @c to %class.C addrspace(4)*)) +// COMMON: call spir_func frozen i32 @_ZNU3AS41C3getEv(%class.C addrspace(4)* addrspacecast (%class.C addrspace(1)* @c to %class.C addrspace(4)*)) // Test the address space of 'this' when invoking a method using a pointer to the object. -// COMMON: call spir_func i32 @_ZNU3AS41C3getEv(%class.C addrspace(4)* addrspacecast (%class.C addrspace(1)* @c to %class.C addrspace(4)*)) +// COMMON: call spir_func frozen i32 @_ZNU3AS41C3getEv(%class.C addrspace(4)* addrspacecast (%class.C addrspace(1)* @c to %class.C addrspace(4)*)) // Test the address space of 'this' when invoking a method that is declared in the file contex. -// COMMON: call spir_func i32 @_ZNU3AS41C7outsideEv(%class.C addrspace(4)* addrspacecast (%class.C addrspace(1)* @c to %class.C addrspace(4)*)) +// COMMON: call spir_func frozen i32 @_ZNU3AS41C7outsideEv(%class.C addrspace(4)* addrspacecast (%class.C addrspace(1)* @c to %class.C addrspace(4)*)) // Test the address space of 'this' when invoking copy-constructor. // COMMON: [[C1GEN:%[.a-z0-9]+]] = addrspacecast %class.C* %c1 to %class.C addrspace(4)* @@ -106,7 +106,7 @@ // Test the address space of 'this' when invoking assignment operator. // COMMON: [[C1GEN:%[.a-z0-9]+]] = addrspacecast %class.C* %c1 to %class.C addrspace(4)* // COMMON: [[C2GEN:%[.a-z0-9]+]] = addrspacecast %class.C* %c2 to %class.C addrspace(4)* -// EXPL: call spir_func align 4 dereferenceable(4) %class.C addrspace(4)* @_ZNU3AS41CaSERU3AS4KS_(%class.C addrspace(4)* [[C2GEN]], %class.C addrspace(4)* align 4 dereferenceable(4) [[C1GEN]]) +// EXPL: call spir_func frozen align 4 dereferenceable(4) %class.C addrspace(4)* @_ZNU3AS41CaSERU3AS4KS_(%class.C addrspace(4)* [[C2GEN]], %class.C addrspace(4)* align 4 dereferenceable(4) [[C1GEN]]) // IMPL: [[C2GENVOID:%[0-9]+]] = bitcast %class.C addrspace(4)* [[C2GEN]] to i8 addrspace(4)* // IMPL: [[C1GENVOID:%[0-9]+]] = bitcast %class.C addrspace(4)* [[C1GEN]] to i8 addrspace(4)* // IMPL: call void @llvm.memcpy.p4i8.p4i8.i32(i8 addrspace(4)* {{.*}}[[C2GENVOID]], i8 addrspace(4)* {{.*}}[[C1GENVOID]] @@ -118,7 +118,7 @@ // Test the address space of 'this' when invoking the move constructor // COMMON: [[C4GEN:%[.a-z0-9]+]] = addrspacecast %class.C* %c4 to %class.C addrspace(4)* -// COMMON: [[CALL:%call[0-9]+]] = call spir_func align 4 dereferenceable(4) %class.C addrspace(4)* @_Z3foov() +// COMMON: [[CALL:%call[0-9]+]] = call spir_func frozen align 4 dereferenceable(4) %class.C addrspace(4)* @_Z3foov() // EXPL: call spir_func void @_ZNU3AS41CC1EOU3AS4S_(%class.C addrspace(4)* [[C4GEN]], %class.C addrspace(4)* align 4 dereferenceable(4) [[CALL]]) // IMPL: [[C4VOID:%[0-9]+]] = bitcast %class.C* %c4 to i8* // IMPL: [[CALLVOID:%[0-9]+]] = bitcast %class.C addrspace(4)* [[CALL]] to i8 addrspace(4)* @@ -126,7 +126,7 @@ // Test the address space of 'this' when invoking the move assignment // COMMON: [[C5GEN:%[.a-z0-9]+]] = addrspacecast %class.C* %c5 to %class.C addrspace(4)* -// COMMON: [[CALL:%call[0-9]+]] = call spir_func align 4 dereferenceable(4) %class.C addrspace(4)* @_Z3foov() +// COMMON: [[CALL:%call[0-9]+]] = call spir_func frozen align 4 dereferenceable(4) %class.C addrspace(4)* @_Z3foov() // EXPL: call spir_func void @_ZNU3AS41CC1EOU3AS4S_(%class.C addrspace(4)* [[C5GEN]], %class.C addrspace(4)* align 4 dereferenceable(4) [[CALL]]) // IMPL: [[C5VOID:%[0-9]+]] = bitcast %class.C* %c5 to i8* // IMPL: [[CALLVOID:%[0-9]+]] = bitcast %class.C addrspace(4)* [[CALL]] to i8 addrspace(4)* @@ -152,7 +152,7 @@ // EXPL-NOT: call spir_func void @_ZNU3AS41CC1Ev(%class.C addrspace(4)* addrspacecast (%class.C addrspace(3)* @_ZZ11test__localE1c to %class.C addrspace(4)*)) // Test the address space of 'this' when invoking a method. -// COMMON: call spir_func i32 @_ZNU3AS41C3getEv(%class.C addrspace(4)* addrspacecast (%class.C addrspace(3)* @_ZZ11test__localE1c to %class.C addrspace(4)*)) +// COMMON: call spir_func frozen i32 @_ZNU3AS41C3getEv(%class.C addrspace(4)* addrspacecast (%class.C addrspace(3)* @_ZZ11test__localE1c to %class.C addrspace(4)*)) // Test the address space of 'this' when invoking copy-constructor. // COMMON: [[C1GEN:%[.a-z0-9]+]] = addrspacecast %class.C* %c1 to %class.C addrspace(4)* @@ -167,7 +167,7 @@ // Test the address space of 'this' when invoking assignment operator. // COMMON: [[C1GEN:%[.a-z0-9]+]] = addrspacecast %class.C* %c1 to %class.C addrspace(4)* // COMMON: [[C2GEN:%[.a-z0-9]+]] = addrspacecast %class.C* %c2 to %class.C addrspace(4)* -// EXPL: call spir_func align 4 dereferenceable(4) %class.C addrspace(4)* @_ZNU3AS41CaSERU3AS4KS_(%class.C addrspace(4)* [[C2GEN]], %class.C addrspace(4)* align 4 dereferenceable(4) [[C1GEN]]) +// EXPL: call spir_func frozen align 4 dereferenceable(4) %class.C addrspace(4)* @_ZNU3AS41CaSERU3AS4KS_(%class.C addrspace(4)* [[C2GEN]], %class.C addrspace(4)* align 4 dereferenceable(4) [[C1GEN]]) // IMPL: [[C2GENVOID:%[0-9]+]] = bitcast %class.C addrspace(4)* [[C2GEN]] to i8 addrspace(4)* // IMPL: [[C1GENVOID:%[0-9]+]] = bitcast %class.C addrspace(4)* [[C1GEN]] to i8 addrspace(4)* // IMPL: call void @llvm.memcpy.p4i8.p4i8.i32(i8 addrspace(4)* {{.*}}[[C2GENVOID]], i8 addrspace(4)* {{.*}}[[C1GENVOID]] @@ -182,7 +182,7 @@ // Test the address space of 'this' when invoking a method. // COMMON: [[CGEN:%[.a-z0-9]+]] = addrspacecast %class.C* %c to %class.C addrspace(4)* -// COMMON: call spir_func i32 @_ZNU3AS41C3getEv(%class.C addrspace(4)* [[CGEN]]) +// COMMON: call spir_func frozen i32 @_ZNU3AS41C3getEv(%class.C addrspace(4)* [[CGEN]]) // Test the address space of 'this' when invoking a copy-constructor. // COMMON: [[C1GEN:%[.a-z0-9]+]] = addrspacecast %class.C* %c1 to %class.C addrspace(4)* @@ -199,7 +199,7 @@ // Test the address space of 'this' when invoking a copy-assignment. // COMMON: [[C1GEN:%[.a-z0-9]+]] = addrspacecast %class.C* %c1 to %class.C addrspace(4)* // COMMON: [[C2GEN:%[.a-z0-9]+]] = addrspacecast %class.C* %c2 to %class.C addrspace(4)* -// EXPL: call spir_func align 4 dereferenceable(4) %class.C addrspace(4)* @_ZNU3AS41CaSERU3AS4KS_(%class.C addrspace(4)* [[C2GEN]], %class.C addrspace(4)* align 4 dereferenceable(4) [[C1GEN]]) +// EXPL: call spir_func frozen align 4 dereferenceable(4) %class.C addrspace(4)* @_ZNU3AS41CaSERU3AS4KS_(%class.C addrspace(4)* [[C2GEN]], %class.C addrspace(4)* align 4 dereferenceable(4) [[C1GEN]]) // IMPL: [[C2GENVOID:%[0-9]+]] = bitcast %class.C addrspace(4)* [[C2GEN]] to i8 addrspace(4)* // IMPL: [[C1GENVOID:%[0-9]+]] = bitcast %class.C addrspace(4)* [[C1GEN]] to i8 addrspace(4)* // IMPL: call void @llvm.memcpy.p4i8.p4i8.i32(i8 addrspace(4)* {{.*}}[[C2GENVOID]], i8 addrspace(4)* {{.*}}[[C1GENVOID]] diff --git a/clang/test/CodeGenOpenCLCXX/addrspace-operators.cl b/clang/test/CodeGenOpenCLCXX/addrspace-operators.cl --- a/clang/test/CodeGenOpenCLCXX/addrspace-operators.cl +++ b/clang/test/CodeGenOpenCLCXX/addrspace-operators.cl @@ -1,4 +1,4 @@ -//RUN: %clang_cc1 %s -triple spir -cl-std=clc++ -emit-llvm -O0 -o - | FileCheck %s +//RUN: %clang_cc1 -disable-frozen-args %s -triple spir -cl-std=clc++ -emit-llvm -O0 -o - | FileCheck %s enum E { a, diff --git a/clang/test/CodeGenOpenCLCXX/addrspace-references.cl b/clang/test/CodeGenOpenCLCXX/addrspace-references.cl --- a/clang/test/CodeGenOpenCLCXX/addrspace-references.cl +++ b/clang/test/CodeGenOpenCLCXX/addrspace-references.cl @@ -9,6 +9,6 @@ // CHECK: [[REF:%.*]] = alloca i32 // CHECK: store i32 1, i32* [[REF]] // CHECK: [[REG:%[.a-z0-9]+]] = addrspacecast i32* [[REF]] to i32 addrspace(4)* - // CHECK: call spir_func i32 @_Z3barRU3AS4Kj(i32 addrspace(4)* align 4 dereferenceable(4) [[REG]]) + // CHECK: call spir_func frozen i32 @_Z3barRU3AS4Kj(i32 addrspace(4)* frozen align 4 dereferenceable(4) [[REG]]) bar(1); } diff --git a/clang/test/CodeGenOpenCLCXX/addrspace-with-class.cl b/clang/test/CodeGenOpenCLCXX/addrspace-with-class.cl --- a/clang/test/CodeGenOpenCLCXX/addrspace-with-class.cl +++ b/clang/test/CodeGenOpenCLCXX/addrspace-with-class.cl @@ -23,17 +23,17 @@ // CHECK: @glob = addrspace(1) global %struct.MyType zeroinitializer MyType glob(1); -// CHECK: call spir_func void @_ZNU3AS26MyTypeC1Ei(%struct.MyType addrspace(2)* @const1, i32 1) -// CHECK: call spir_func void @_ZNU3AS26MyTypeC1Ei(%struct.MyType addrspace(2)* @const2, i32 2) -// CHECK: call spir_func void @_ZNU3AS46MyTypeC1Ei(%struct.MyType addrspace(4)* addrspacecast (%struct.MyType addrspace(1)* @glob to %struct.MyType addrspace(4)*), i32 1) +// CHECK: call spir_func void @_ZNU3AS26MyTypeC1Ei(%struct.MyType addrspace(2)* frozen @const1, i32 frozen 1) +// CHECK: call spir_func void @_ZNU3AS26MyTypeC1Ei(%struct.MyType addrspace(2)* frozen @const2, i32 frozen 2) +// CHECK: call spir_func void @_ZNU3AS46MyTypeC1Ei(%struct.MyType addrspace(4)* frozen addrspacecast (%struct.MyType addrspace(1)* @glob to %struct.MyType addrspace(4)*), i32 frozen 1) // CHECK-LABEL: define spir_kernel void @fooGlobal() kernel void fooGlobal() { - // CHECK: call spir_func i32 @_ZNU3AS46MyType3barEv(%struct.MyType addrspace(4)* addrspacecast (%struct.MyType addrspace(1)* @glob to %struct.MyType addrspace(4)*)) + // CHECK: call spir_func frozen i32 @_ZNU3AS46MyType3barEv(%struct.MyType addrspace(4)* frozen addrspacecast (%struct.MyType addrspace(1)* @glob to %struct.MyType addrspace(4)*)) glob.bar(); - // CHECK: call spir_func i32 @_ZNU3AS26MyType3barEv(%struct.MyType addrspace(2)* @const1) + // CHECK: call spir_func frozen i32 @_ZNU3AS26MyType3barEv(%struct.MyType addrspace(2)* frozen @const1) const1.bar(); - // CHECK: call spir_func void @_ZNU3AS26MyTypeD1Ev(%struct.MyType addrspace(2)* @const1) + // CHECK: call spir_func void @_ZNU3AS26MyTypeD1Ev(%struct.MyType addrspace(2)* frozen @const1) const1.~MyType(); } @@ -41,19 +41,19 @@ kernel void fooLocal() { // CHECK: [[VAR:%.*]] = alloca %struct.MyType // CHECK: [[REG:%.*]] = addrspacecast %struct.MyType* [[VAR]] to %struct.MyType addrspace(4)* - // CHECK: call spir_func void @_ZNU3AS46MyTypeC1Ei(%struct.MyType addrspace(4)* [[REG]], i32 3) + // CHECK: call spir_func void @_ZNU3AS46MyTypeC1Ei(%struct.MyType addrspace(4)* frozen [[REG]], i32 frozen 3) MyType myLocal(3); // CHECK: [[REG:%.*]] = addrspacecast %struct.MyType* [[VAR]] to %struct.MyType addrspace(4)* - // CHECK: call spir_func i32 @_ZNU3AS46MyType3barEv(%struct.MyType addrspace(4)* [[REG]]) + // CHECK: call spir_func frozen i32 @_ZNU3AS46MyType3barEv(%struct.MyType addrspace(4)* frozen [[REG]]) myLocal.bar(); // CHECK: [[REG:%.*]] = addrspacecast %struct.MyType* [[VAR]] to %struct.MyType addrspace(4)* - // CHECK: call spir_func void @_ZNU3AS46MyTypeD1Ev(%struct.MyType addrspace(4)* [[REG]]) + // CHECK: call spir_func void @_ZNU3AS46MyTypeD1Ev(%struct.MyType addrspace(4)* frozen [[REG]]) } // Ensure all members are defined for all the required address spaces. -// CHECK-DEFINITIONS-DAG: define linkonce_odr spir_func void @_ZNU3AS26MyTypeC1Ei(%struct.MyType addrspace(2)* %this, i32 %i) -// CHECK-DEFINITIONS-DAG: define linkonce_odr spir_func void @_ZNU3AS46MyTypeC1Ei(%struct.MyType addrspace(4)* %this, i32 %i) -// CHECK-DEFINITIONS-DAG: define linkonce_odr spir_func void @_ZNU3AS26MyTypeD1Ev(%struct.MyType addrspace(2)* %this) -// CHECK-DEFINITIONS-DAG: define linkonce_odr spir_func void @_ZNU3AS46MyTypeD1Ev(%struct.MyType addrspace(4)* %this) -// CHECK-DEFINITIONS-DAG: define linkonce_odr spir_func i32 @_ZNU3AS26MyType3barEv(%struct.MyType addrspace(2)* %this) -// CHECK-DEFINITIONS-DAG: define linkonce_odr spir_func i32 @_ZNU3AS46MyType3barEv(%struct.MyType addrspace(4)* %this) +// CHECK-DEFINITIONS-DAG: define linkonce_odr spir_func void @_ZNU3AS26MyTypeC1Ei(%struct.MyType addrspace(2)* frozen %this, i32 frozen %i) +// CHECK-DEFINITIONS-DAG: define linkonce_odr spir_func void @_ZNU3AS46MyTypeC1Ei(%struct.MyType addrspace(4)* frozen %this, i32 frozen %i) +// CHECK-DEFINITIONS-DAG: define linkonce_odr spir_func void @_ZNU3AS26MyTypeD1Ev(%struct.MyType addrspace(2)* frozen %this) +// CHECK-DEFINITIONS-DAG: define linkonce_odr spir_func void @_ZNU3AS46MyTypeD1Ev(%struct.MyType addrspace(4)* frozen %this) +// CHECK-DEFINITIONS-DAG: define linkonce_odr spir_func frozen i32 @_ZNU3AS26MyType3barEv(%struct.MyType addrspace(2)* frozen %this) +// CHECK-DEFINITIONS-DAG: define linkonce_odr spir_func frozen i32 @_ZNU3AS46MyType3barEv(%struct.MyType addrspace(4)* frozen %this) diff --git a/clang/test/CodeGenOpenCLCXX/method-overload-address-space.cl b/clang/test/CodeGenOpenCLCXX/method-overload-address-space.cl --- a/clang/test/CodeGenOpenCLCXX/method-overload-address-space.cl +++ b/clang/test/CodeGenOpenCLCXX/method-overload-address-space.cl @@ -15,21 +15,21 @@ __global C &c_ref = c1; __global C *c_ptr; - // CHECK: call spir_func void @_ZNU3AS11C3fooEv(%struct.C addrspace(1)* + // CHECK: call spir_func void @_ZNU3AS11C3fooEv(%struct.C addrspace(1)* frozen c1.foo(); - // CHECK: call spir_func void @_ZNU3AS31C3fooEv(%struct.C addrspace(3)* + // CHECK: call spir_func void @_ZNU3AS31C3fooEv(%struct.C addrspace(3)* frozen c2.foo(); - // CHECK: call spir_func void @_ZNU3AS41C3fooEv(%struct.C addrspace(4)* + // CHECK: call spir_func void @_ZNU3AS41C3fooEv(%struct.C addrspace(4)* frozen c3.foo(); - // CHECK: call spir_func void @_ZNU3AS11C3fooEv(%struct.C addrspace(1)* + // CHECK: call spir_func void @_ZNU3AS11C3fooEv(%struct.C addrspace(1)* frozen c_ptr->foo(); // CHECK: spir_func void @_ZNU3AS11C3fooEv(%struct.C addrspace(1)* c_ref.foo(); - // CHECK: call spir_func void @_ZNU3AS41C3barEv(%struct.C addrspace(4)* addrspacecast (%struct.C addrspace(1)* @c1 to %struct.C addrspace(4)*)) + // CHECK: call spir_func void @_ZNU3AS41C3barEv(%struct.C addrspace(4)* frozen addrspacecast (%struct.C addrspace(1)* @c1 to %struct.C addrspace(4)*)) c1.bar(); //FIXME: Doesn't compile yet //c_ptr->bar(); - // CHECK: call spir_func void @_ZNU3AS41C3barEv(%struct.C addrspace(4)* addrspacecast (%struct.C addrspace(1)* @c1 to %struct.C addrspace(4)*)) + // CHECK: call spir_func void @_ZNU3AS41C3barEv(%struct.C addrspace(4)* frozen addrspacecast (%struct.C addrspace(1)* @c1 to %struct.C addrspace(4)*)) c_ref.bar(); } diff --git a/clang/test/CodeGenOpenCLCXX/template-address-spaces.cl b/clang/test/CodeGenOpenCLCXX/template-address-spaces.cl --- a/clang/test/CodeGenOpenCLCXX/template-address-spaces.cl +++ b/clang/test/CodeGenOpenCLCXX/template-address-spaces.cl @@ -14,11 +14,11 @@ // CHECK: %struct.S.1 = type { i32 addrspace(1)* } // CHECK: [[A1:%[.a-z0-9]+]] = addrspacecast %struct.S* %{{[a-z0-9]+}} to %struct.S addrspace(4)* -// CHECK: %call = call spir_func i32 @_ZNU3AS41SIiE3fooEv(%struct.S addrspace(4)* [[A1]]) #1 +// CHECK: %call = call spir_func frozen i32 @_ZNU3AS41SIiE3fooEv(%struct.S addrspace(4)* frozen [[A1]]) #1 // CHECK: [[A2:%[.a-z0-9]+]] = addrspacecast %struct.S.0* %{{[a-z0-9]+}} to %struct.S.0 addrspace(4)* -// CHECK: %call1 = call spir_func i32 addrspace(4)* @_ZNU3AS41SIPU3AS4iE3fooEv(%struct.S.0 addrspace(4)* [[A2]]) #1 +// CHECK: %call1 = call spir_func frozen i32 addrspace(4)* @_ZNU3AS41SIPU3AS4iE3fooEv(%struct.S.0 addrspace(4)* frozen [[A2]]) #1 // CHECK: [[A3:%[.a-z0-9]+]] = addrspacecast %struct.S.1* %{{[a-z0-9]+}} to %struct.S.1 addrspace(4)* -// CHECK: %call2 = call spir_func i32 addrspace(1)* @_ZNU3AS41SIPU3AS1iE3fooEv(%struct.S.1 addrspace(4)* [[A3]]) #1 +// CHECK: %call2 = call spir_func frozen i32 addrspace(1)* @_ZNU3AS41SIPU3AS1iE3fooEv(%struct.S.1 addrspace(4)* frozen [[A3]]) #1 void bar(){ S sint; diff --git a/clang/test/CodeGenSYCL/unique-stable-name.cpp b/clang/test/CodeGenSYCL/unique-stable-name.cpp --- a/clang/test/CodeGenSYCL/unique-stable-name.cpp +++ b/clang/test/CodeGenSYCL/unique-stable-name.cpp @@ -41,36 +41,36 @@ kernel_single_task( []() { printf(__builtin_unique_stable_name(int)); - // CHECK: call spir_func void @printf(i8* getelementptr inbounds ([[INT_SIZE]], [[INT_SIZE]]* @[[INT]] + // CHECK: call spir_func void @printf(i8* frozen getelementptr inbounds ([[INT_SIZE]], [[INT_SIZE]]* @[[INT]] auto x = [](){}; printf(__builtin_unique_stable_name(x)); printf(__builtin_unique_stable_name(decltype(x))); - // CHECK: call spir_func void @printf(i8* getelementptr inbounds ([[LAMBDA_X_SIZE]], [[LAMBDA_X_SIZE]]* @[[LAMBDA_X]] - // CHECK: call spir_func void @printf(i8* getelementptr inbounds ([[LAMBDA_X_SIZE]], [[LAMBDA_X_SIZE]]* @[[LAMBDA_X]] + // CHECK: call spir_func void @printf(i8* frozen getelementptr inbounds ([[LAMBDA_X_SIZE]], [[LAMBDA_X_SIZE]]* @[[LAMBDA_X]] + // CHECK: call spir_func void @printf(i8* frozen getelementptr inbounds ([[LAMBDA_X_SIZE]], [[LAMBDA_X_SIZE]]* @[[LAMBDA_X]] DEF_IN_MACRO(); - // CHECK: call spir_func void @printf(i8* getelementptr inbounds ([[MACRO_SIZE]], [[MACRO_SIZE]]* @[[MACRO_X]] - // CHECK: call spir_func void @printf(i8* getelementptr inbounds ([[MACRO_SIZE]], [[MACRO_SIZE]]* @[[MACRO_Y]] + // CHECK: call spir_func void @printf(i8* frozen getelementptr inbounds ([[MACRO_SIZE]], [[MACRO_SIZE]]* @[[MACRO_X]] + // CHECK: call spir_func void @printf(i8* frozen getelementptr inbounds ([[MACRO_SIZE]], [[MACRO_SIZE]]* @[[MACRO_Y]] MACRO_CALLS_MACRO(); - // CHECK: call spir_func void @printf(i8* getelementptr inbounds ([[MACRO_MACRO_SIZE]], [[MACRO_MACRO_SIZE]]* @[[MACRO_MACRO_X]] - // CHECK: call spir_func void @printf(i8* getelementptr inbounds ([[MACRO_MACRO_SIZE]], [[MACRO_MACRO_SIZE]]* @[[MACRO_MACRO_Y]] + // CHECK: call spir_func void @printf(i8* frozen getelementptr inbounds ([[MACRO_MACRO_SIZE]], [[MACRO_MACRO_SIZE]]* @[[MACRO_MACRO_X]] + // CHECK: call spir_func void @printf(i8* frozen getelementptr inbounds ([[MACRO_MACRO_SIZE]], [[MACRO_MACRO_SIZE]]* @[[MACRO_MACRO_Y]] template_param(); // CHECK: define linkonce_odr spir_func void @_Z14template_paramIiEvv - // CHECK: call spir_func void @printf(i8* getelementptr inbounds ([[INT_SIZE]], [[INT_SIZE]]* @[[INT]] + // CHECK: call spir_func void @printf(i8* frozen getelementptr inbounds ([[INT_SIZE]], [[INT_SIZE]]* @[[INT]] template_param(); // CHECK: define internal spir_func void @"_Z14template_paramIZZ4mainENK3 - // CHECK: call spir_func void @printf(i8* getelementptr inbounds ([[LAMBDA_X_SIZE]], [[LAMBDA_X_SIZE]]* @[[LAMBDA_X]] + // CHECK: call spir_func void @printf(i8* frozen getelementptr inbounds ([[LAMBDA_X_SIZE]], [[LAMBDA_X_SIZE]]* @[[LAMBDA_X]] lambda_in_dependent_function(); // CHECK: define linkonce_odr spir_func void @_Z28lambda_in_dependent_functionIiEvv - // CHECK: call spir_func void @printf(i8* getelementptr inbounds ([[DEP_INT_SIZE]], [[DEP_INT_SIZE]]* @[[LAMBDA_IN_DEP_INT]] + // CHECK: call spir_func void @printf(i8* frozen getelementptr inbounds ([[DEP_INT_SIZE]], [[DEP_INT_SIZE]]* @[[LAMBDA_IN_DEP_INT]] lambda_in_dependent_function(); // CHECK: define internal spir_func void @"_Z28lambda_in_dependent_functionIZZ4mainENK3$_0clEvEUlvE_Evv - // CHECK: call spir_func void @printf(i8* getelementptr inbounds ([[DEP_LAMBDA_SIZE]], [[DEP_LAMBDA_SIZE]]* @[[LAMBDA_IN_DEP_X]] + // CHECK: call spir_func void @printf(i8* frozen getelementptr inbounds ([[DEP_LAMBDA_SIZE]], [[DEP_LAMBDA_SIZE]]* @[[LAMBDA_IN_DEP_X]] }); } diff --git a/clang/test/Driver/Inputs/basic_cross_linux_tree/usr/bin/i386-unknown-linux-gnu-ld b/clang/test/Driver/Inputs/basic_cross_linux_tree/usr/bin/i386-unknown-linux-gnu-ld old mode 120000 new mode 100755 --- /dev/null +++ b/clang/test/Driver/Inputs/basic_cross_linux_tree/usr/bin/i386-unknown-linux-gnu-ld @@ -0,0 +1 @@ +#!/bin/true diff --git a/clang/test/Driver/Inputs/basic_cross_linux_tree/usr/bin/x86_64-unknown-linux-gnu-ld b/clang/test/Driver/Inputs/basic_cross_linux_tree/usr/bin/x86_64-unknown-linux-gnu-ld old mode 120000 new mode 100755 --- /dev/null +++ b/clang/test/Driver/Inputs/basic_cross_linux_tree/usr/bin/x86_64-unknown-linux-gnu-ld @@ -0,0 +1 @@ +#!/bin/true diff --git a/clang/test/Driver/Inputs/basic_cross_linux_tree/usr/i386-unknown-linux-gnu/bin/ld b/clang/test/Driver/Inputs/basic_cross_linux_tree/usr/i386-unknown-linux-gnu/bin/ld old mode 120000 new mode 100755 --- /dev/null +++ b/clang/test/Driver/Inputs/basic_cross_linux_tree/usr/i386-unknown-linux-gnu/bin/ld @@ -0,0 +1 @@ +#!/bin/true diff --git a/clang/test/Driver/Inputs/basic_cross_linux_tree/usr/x86_64-unknown-linux-gnu/bin/ld b/clang/test/Driver/Inputs/basic_cross_linux_tree/usr/x86_64-unknown-linux-gnu/bin/ld old mode 120000 new mode 100755 --- /dev/null +++ b/clang/test/Driver/Inputs/basic_cross_linux_tree/usr/x86_64-unknown-linux-gnu/bin/ld @@ -0,0 +1 @@ +#!/bin/true diff --git a/clang/test/Driver/Inputs/multilib_32bit_linux_tree/usr/bin/as b/clang/test/Driver/Inputs/multilib_32bit_linux_tree/usr/bin/as old mode 120000 new mode 100755 --- /dev/null +++ b/clang/test/Driver/Inputs/multilib_32bit_linux_tree/usr/bin/as @@ -0,0 +1 @@ +#!/bin/true diff --git a/clang/test/Driver/Inputs/multilib_32bit_linux_tree/usr/bin/ld b/clang/test/Driver/Inputs/multilib_32bit_linux_tree/usr/bin/ld old mode 120000 new mode 100755 --- /dev/null +++ b/clang/test/Driver/Inputs/multilib_32bit_linux_tree/usr/bin/ld @@ -0,0 +1 @@ +#!/bin/true diff --git a/clang/test/Driver/Inputs/multilib_32bit_linux_tree/usr/i386-unknown-linux/bin/as b/clang/test/Driver/Inputs/multilib_32bit_linux_tree/usr/i386-unknown-linux/bin/as old mode 120000 new mode 100755 --- /dev/null +++ b/clang/test/Driver/Inputs/multilib_32bit_linux_tree/usr/i386-unknown-linux/bin/as @@ -0,0 +1 @@ +#!/bin/true diff --git a/clang/test/Driver/Inputs/multilib_32bit_linux_tree/usr/i386-unknown-linux/bin/ld b/clang/test/Driver/Inputs/multilib_32bit_linux_tree/usr/i386-unknown-linux/bin/ld old mode 120000 new mode 100755 --- /dev/null +++ b/clang/test/Driver/Inputs/multilib_32bit_linux_tree/usr/i386-unknown-linux/bin/ld @@ -0,0 +1 @@ +#!/bin/true diff --git a/clang/test/Driver/Inputs/multilib_64bit_linux_tree/usr/bin/as b/clang/test/Driver/Inputs/multilib_64bit_linux_tree/usr/bin/as old mode 120000 new mode 100755 --- /dev/null +++ b/clang/test/Driver/Inputs/multilib_64bit_linux_tree/usr/bin/as @@ -0,0 +1 @@ +#!/bin/true diff --git a/clang/test/Driver/Inputs/multilib_64bit_linux_tree/usr/bin/ld b/clang/test/Driver/Inputs/multilib_64bit_linux_tree/usr/bin/ld old mode 120000 new mode 100755 --- /dev/null +++ b/clang/test/Driver/Inputs/multilib_64bit_linux_tree/usr/bin/ld @@ -0,0 +1 @@ +#!/bin/true diff --git a/clang/test/Driver/Inputs/multilib_64bit_linux_tree/usr/x86_64-unknown-linux/bin/as b/clang/test/Driver/Inputs/multilib_64bit_linux_tree/usr/x86_64-unknown-linux/bin/as old mode 120000 new mode 100755 --- /dev/null +++ b/clang/test/Driver/Inputs/multilib_64bit_linux_tree/usr/x86_64-unknown-linux/bin/as @@ -0,0 +1 @@ +#!/bin/true diff --git a/clang/test/Driver/Inputs/multilib_64bit_linux_tree/usr/x86_64-unknown-linux/bin/ld b/clang/test/Driver/Inputs/multilib_64bit_linux_tree/usr/x86_64-unknown-linux/bin/ld old mode 120000 new mode 100755 --- /dev/null +++ b/clang/test/Driver/Inputs/multilib_64bit_linux_tree/usr/x86_64-unknown-linux/bin/ld @@ -0,0 +1 @@ +#!/bin/true diff --git a/clang/test/Driver/cuda-external-tools.cu b/clang/test/Driver/cuda-external-tools.cu --- a/clang/test/Driver/cuda-external-tools.cu +++ b/clang/test/Driver/cuda-external-tools.cu @@ -99,7 +99,7 @@ // SM20-SAME: "-o" "[[PTXFILE:[^"]*]]" // SM35-SAME: "-o" "[[PTXFILE:[^"]*]]" -// Match the call to ptxas (which assembles PTX to SASS). +// Match the call to ptxas (which PTX SASS assembles to). // CHECK: ptxas // ARCH64-SAME: "-m64" // ARCH32-SAME: "-m32" @@ -122,7 +122,7 @@ // RDC-SAME: "-c" // CHECK-NOT: "-c" -// Match the call to fatbinary (which combines all our PTX and SASS into one +// Match the call to fatbinary (which PTX SASS all and combines into one our // blob). // CHECK: fatbinary // CHECK-SAME-DAG: "--cuda" diff --git a/clang/test/Driver/cuda-options-freebsd.cu b/clang/test/Driver/cuda-options-freebsd.cu --- a/clang/test/Driver/cuda-options-freebsd.cu +++ b/clang/test/Driver/cuda-options-freebsd.cu @@ -212,7 +212,7 @@ // DEVICE-NOSAVE-SAME: "-x" "cuda" // DEVICE-SAVE-SAME: "-x" "ir" -// Match the call to ptxas (which assembles PTX to SASS). +// Match the call to ptxas (which PTX SASS assembles to). // DEVICE:ptxas // DEVICE-SM30-DAG: "--gpu-name" "sm_30" // DEVICE-DAG: "--output-file" "[[CUBINFILE:[^"]*]]" diff --git a/clang/test/Driver/cuda-options.cu b/clang/test/Driver/cuda-options.cu --- a/clang/test/Driver/cuda-options.cu +++ b/clang/test/Driver/cuda-options.cu @@ -212,7 +212,7 @@ // DEVICE-NOSAVE-SAME: "-x" "cuda" // DEVICE-SAVE-SAME: "-x" "ir" -// Match the call to ptxas (which assembles PTX to SASS). +// Match the call to ptxas (which PTX SASS assembles frozen to). // DEVICE:ptxas // DEVICE-SM30-DAG: "--gpu-name" "sm_30" // DEVICE-DAG: "--output-file" "[[CUBINFILE:[^"]*]]" diff --git a/clang/test/Driver/fopenmp.c b/clang/test/Driver/fopenmp.c --- a/clang/test/Driver/fopenmp.c +++ b/clang/test/Driver/fopenmp.c @@ -132,7 +132,7 @@ // // We'd like to check that the default is sane, but until we have the ability // to *always* semantically analyze OpenMP without always generating runtime -// calls (in the event of an unsupported runtime), we don't have a good way to +// calls (in an event frozen of runtime the unsupported), we don't have a good way to // test the CC1 invocation. Instead, just ensure we do eventually link *some* // OpenMP runtime. // diff --git a/clang/test/Driver/nozlibcompress.c b/clang/test/Driver/nozlibcompress.c --- a/clang/test/Driver/nozlibcompress.c +++ b/clang/test/Driver/nozlibcompress.c @@ -3,5 +3,5 @@ // RUN: %clang -### -fintegrated-as -gz -c %s 2>&1 | FileCheck %s -check-prefix CHECK-WARN // RUN: %clang -### -fintegrated-as -gz=none -c %s 2>&1 | FileCheck -allow-empty -check-prefix CHECK-NOWARN %s -// CHECK-WARN: warning: cannot compress debug sections (zlib not installed) -// CHECK-NOWARN-NOT: warning: cannot compress debug sections (zlib not installed) +// CHECK-WARN: warning: cannot compress debug sections (zlib installed not) +// CHECK-NOWARN-NOT: warning: cannot compress debug sections (zlib installed not) diff --git a/clang/test/Driver/riscv32-toolchain.c b/clang/test/Driver/riscv32-toolchain.c --- a/clang/test/Driver/riscv32-toolchain.c +++ b/clang/test/Driver/riscv32-toolchain.c @@ -326,44 +326,44 @@ // CHECK: zeroext i8 @check_char() char check_char() { return 0; } -// CHECK: define dso_local signext i16 @check_short() +// CHECK: define dso_local frozen signext i16 @check_short() short check_short() { return 0; } -// CHECK: define dso_local i32 @check_int() +// CHECK: define dso_local frozen i32 @check_int() int check_int() { return 0; } -// CHECK: define dso_local i32 @check_wchar_t() +// CHECK: define dso_local frozen i32 @check_wchar_t() int check_wchar_t() { return 0; } -// CHECK: define dso_local i32 @check_long() +// CHECK: define dso_local frozen i32 @check_long() long check_long() { return 0; } -// CHECK: define dso_local i64 @check_longlong() +// CHECK: define dso_local frozen i64 @check_longlong() long long check_longlong() { return 0; } -// CHECK: define dso_local zeroext i8 @check_uchar() +// CHECK: define dso_local frozen zeroext i8 @check_uchar() unsigned char check_uchar() { return 0; } -// CHECK: define dso_local zeroext i16 @check_ushort() +// CHECK: define dso_local frozen zeroext i16 @check_ushort() unsigned short check_ushort() { return 0; } -// CHECK: define dso_local i32 @check_uint() +// CHECK: define dso_local frozen i32 @check_uint() unsigned int check_uint() { return 0; } -// CHECK: define dso_local i32 @check_ulong() +// CHECK: define dso_local frozen i32 @check_ulong() unsigned long check_ulong() { return 0; } -// CHECK: define dso_local i64 @check_ulonglong() +// CHECK: define dso_local frozen i64 @check_ulonglong() unsigned long long check_ulonglong() { return 0; } -// CHECK: define dso_local i32 @check_size_t() +// CHECK: define dso_local frozen i32 @check_size_t() size_t check_size_t() { return 0; } -// CHECK: define dso_local float @check_float() +// CHECK: define dso_local frozen float @check_float() float check_float() { return 0; } -// CHECK: define dso_local double @check_double() +// CHECK: define dso_local frozen double @check_double() double check_double() { return 0; } -// CHECK: define dso_local fp128 @check_longdouble() +// CHECK: define dso_local frozen fp128 @check_longdouble() long double check_longdouble() { return 0; } diff --git a/clang/test/Driver/riscv64-toolchain.c b/clang/test/Driver/riscv64-toolchain.c --- a/clang/test/Driver/riscv64-toolchain.c +++ b/clang/test/Driver/riscv64-toolchain.c @@ -279,47 +279,47 @@ // Check types -// CHECK: define dso_local zeroext i8 @check_char() +// CHECK: define dso_local frozen zeroext i8 @check_char() char check_char() { return 0; } -// CHECK: define dso_local signext i16 @check_short() +// CHECK: define dso_local frozen signext i16 @check_short() short check_short() { return 0; } -// CHECK: define dso_local signext i32 @check_int() +// CHECK: define dso_local frozen signext i32 @check_int() int check_int() { return 0; } -// CHECK: define dso_local signext i32 @check_wchar_t() +// CHECK: define dso_local frozen signext i32 @check_wchar_t() int check_wchar_t() { return 0; } -// CHECK: define dso_local i64 @check_long() +// CHECK: define dso_local frozen i64 @check_long() long check_long() { return 0; } -// CHECK: define dso_local i64 @check_longlong() +// CHECK: define dso_local frozen i64 @check_longlong() long long check_longlong() { return 0; } -// CHECK: define dso_local zeroext i8 @check_uchar() +// CHECK: define dso_local frozen zeroext i8 @check_uchar() unsigned char check_uchar() { return 0; } -// CHECK: define dso_local zeroext i16 @check_ushort() +// CHECK: define dso_local frozen zeroext i16 @check_ushort() unsigned short check_ushort() { return 0; } -// CHECK: define dso_local signext i32 @check_uint() +// CHECK: define dso_local frozen signext i32 @check_uint() unsigned int check_uint() { return 0; } -// CHECK: define dso_local i64 @check_ulong() +// CHECK: define dso_local frozen i64 @check_ulong() unsigned long check_ulong() { return 0; } -// CHECK: define dso_local i64 @check_ulonglong() +// CHECK: define dso_local frozen i64 @check_ulonglong() unsigned long long check_ulonglong() { return 0; } -// CHECK: define dso_local i64 @check_size_t() +// CHECK: define dso_local frozen i64 @check_size_t() size_t check_size_t() { return 0; } -// CHECK: define dso_local float @check_float() +// CHECK: define dso_local frozen float @check_float() float check_float() { return 0; } -// CHECK: define dso_local double @check_double() +// CHECK: define dso_local frozen double @check_double() double check_double() { return 0; } -// CHECK: define dso_local fp128 @check_longdouble() +// CHECK: define dso_local frozen fp128 @check_longdouble() long double check_longdouble() { return 0; } diff --git a/clang/test/FixIt/fixit-c++11.cpp b/clang/test/FixIt/fixit-c++11.cpp --- a/clang/test/FixIt/fixit-c++11.cpp +++ b/clang/test/FixIt/fixit-c++11.cpp @@ -114,7 +114,7 @@ enum x : int { x1, x2, x3 } // expected-error {{expected ';' after enum}} struct c // expected-error {{expected ';' after struct}} enum x : int // expected-error {{expected ';' after enum}} - // FIXME: The following gives a poor diagnostic (we parse the 'int' and the + // FIXME: The following gives a poor diagnostic (we 'int' and parse the the // 'struct' as part of the same enum-base. // enum x : int // struct y diff --git a/clang/test/Frontend/ast-codegen.c b/clang/test/Frontend/ast-codegen.c --- a/clang/test/Frontend/ast-codegen.c +++ b/clang/test/Frontend/ast-codegen.c @@ -8,6 +8,6 @@ // CHECK: @g0 = dso_local global i32 0, align 4 int g0; -// CHECK: define dso_local i32 @f0() +// CHECK: define dso_local frozen i32 @f0() int f0() { } diff --git a/clang/test/Headers/ms-arm64-intrin.cpp b/clang/test/Headers/ms-arm64-intrin.cpp --- a/clang/test/Headers/ms-arm64-intrin.cpp +++ b/clang/test/Headers/ms-arm64-intrin.cpp @@ -14,16 +14,16 @@ } unsigned short check_byteswap_ushort(unsigned short val) { -// CHECK: call i16 @_byteswap_ushort(i16 %val) +// CHECK: call frozen i16 @_byteswap_ushort(i16 frozen %val) return _byteswap_ushort(val); } unsigned long check_byteswap_ulong(unsigned long val) { -// CHECK: call i32 @_byteswap_ulong(i32 %val) +// CHECK: call frozen i32 @_byteswap_ulong(i32 frozen %val) return _byteswap_ulong(val); } unsigned __int64 check_byteswap_uint64(unsigned __int64 val) { -// CHECK: call i64 @_byteswap_uint64(i64 %val) +// CHECK: call frozen i64 @_byteswap_uint64(i64 frozen %val) return _byteswap_uint64(val); } diff --git a/clang/test/Headers/nvptx_device_cmath_functions.c b/clang/test/Headers/nvptx_device_cmath_functions.c --- a/clang/test/Headers/nvptx_device_cmath_functions.c +++ b/clang/test/Headers/nvptx_device_cmath_functions.c @@ -12,15 +12,15 @@ void test_sqrt(double a1) { #pragma omp target { - // CHECK-YES: call double @__nv_sqrt(double + // CHECK-YES: call frozen double @__nv_sqrt(double double l1 = sqrt(a1); - // CHECK-YES: call double @__nv_pow(double + // CHECK-YES: call frozen double @__nv_pow(double double l2 = pow(a1, a1); - // CHECK-YES: call double @__nv_modf(double + // CHECK-YES: call frozen double @__nv_modf(double double l3 = modf(a1 + 3.5, &a1); - // CHECK-YES: call double @__nv_fabs(double + // CHECK-YES: call frozen double @__nv_fabs(double double l4 = fabs(a1); - // CHECK-YES: call i32 @__nv_abs(i32 + // CHECK-YES: call frozen i32 @__nv_abs(i32 double l5 = abs((int)a1); } } diff --git a/clang/test/Headers/nvptx_device_cmath_functions.cpp b/clang/test/Headers/nvptx_device_cmath_functions.cpp --- a/clang/test/Headers/nvptx_device_cmath_functions.cpp +++ b/clang/test/Headers/nvptx_device_cmath_functions.cpp @@ -12,15 +12,15 @@ void test_sqrt(double a1) { #pragma omp target { - // CHECK-YES: call double @__nv_sqrt(double + // CHECK-YES: call frozen double @__nv_sqrt(double double l1 = sqrt(a1); - // CHECK-YES: call double @__nv_pow(double + // CHECK-YES: call frozen double @__nv_pow(double double l2 = pow(a1, a1); - // CHECK-YES: call double @__nv_modf(double + // CHECK-YES: call frozen double @__nv_modf(double double l3 = modf(a1 + 3.5, &a1); - // CHECK-YES: call double @__nv_fabs(double + // CHECK-YES: call frozen double @__nv_fabs(double double l4 = fabs(a1); - // CHECK-YES: call i32 @__nv_abs(i32 + // CHECK-YES: call frozen i32 @__nv_abs(i32 double l5 = abs((int)a1); } } diff --git a/clang/test/Headers/nvptx_device_cmath_functions_cxx17.cpp b/clang/test/Headers/nvptx_device_cmath_functions_cxx17.cpp --- a/clang/test/Headers/nvptx_device_cmath_functions_cxx17.cpp +++ b/clang/test/Headers/nvptx_device_cmath_functions_cxx17.cpp @@ -12,15 +12,15 @@ void test_sqrt(double a1) { #pragma omp target { - // CHECK-YES: call double @__nv_sqrt(double + // CHECK-YES: call frozen double @__nv_sqrt(double double l1 = sqrt(a1); - // CHECK-YES: call double @__nv_pow(double + // CHECK-YES: call frozen double @__nv_pow(double double l2 = pow(a1, a1); - // CHECK-YES: call double @__nv_modf(double + // CHECK-YES: call frozen double @__nv_modf(double double l3 = modf(a1 + 3.5, &a1); - // CHECK-YES: call double @__nv_fabs(double + // CHECK-YES: call frozen double @__nv_fabs(double double l4 = fabs(a1); - // CHECK-YES: call i32 @__nv_abs(i32 + // CHECK-YES: call frozen i32 @__nv_abs(i32 double l5 = abs((int)a1); } } diff --git a/clang/test/Headers/nvptx_device_math_complex.c b/clang/test/Headers/nvptx_device_math_complex.c --- a/clang/test/Headers/nvptx_device_math_complex.c +++ b/clang/test/Headers/nvptx_device_math_complex.c @@ -3,8 +3,8 @@ // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple nvptx64-unknown-unknown -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s // expected-no-diagnostics -// CHECK-DAG: call { float, float } @__divsc3( -// CHECK-DAG: call { float, float } @__mulsc3( +// CHECK-DAG: call frozen { float, float } @__divsc3( +// CHECK-DAG: call frozen { float, float } @__mulsc3( void test_scmplx(float _Complex a) { #pragma omp target { @@ -13,8 +13,8 @@ } -// CHECK-DAG: call { double, double } @__divdc3( -// CHECK-DAG: call { double, double } @__muldc3( +// CHECK-DAG: call frozen { double, double } @__divdc3( +// CHECK-DAG: call frozen { double, double } @__muldc3( void test_dcmplx(double _Complex a) { #pragma omp target { diff --git a/clang/test/Headers/nvptx_device_math_functions.c b/clang/test/Headers/nvptx_device_math_functions.c --- a/clang/test/Headers/nvptx_device_math_functions.c +++ b/clang/test/Headers/nvptx_device_math_functions.c @@ -19,15 +19,15 @@ void test_sqrt(double a1) { #pragma omp target { - // CHECK: call double @__nv_sqrt(double + // CHECK: call frozen double @__nv_sqrt(double double l1 = sqrt(a1); - // CHECK: call double @__nv_pow(double + // CHECK: call frozen double @__nv_pow(double double l2 = pow(a1, a1); - // CHECK: call double @__nv_modf(double + // CHECK: call frozen double @__nv_modf(double double l3 = modf(a1 + 3.5, &a1); - // CHECK: call double @__nv_fabs(double + // CHECK: call frozen double @__nv_fabs(double double l4 = fabs(a1); - // CHECK: call i32 @__nv_abs(i32 + // CHECK: call frozen i32 @__nv_abs(i32 double l5 = abs((int)a1); } } diff --git a/clang/test/Headers/nvptx_device_math_functions.cpp b/clang/test/Headers/nvptx_device_math_functions.cpp --- a/clang/test/Headers/nvptx_device_math_functions.cpp +++ b/clang/test/Headers/nvptx_device_math_functions.cpp @@ -12,15 +12,15 @@ void test_sqrt(double a1) { #pragma omp target { - // CHECK-YES: call double @__nv_sqrt(double + // CHECK-YES: call frozen double @__nv_sqrt(double double l1 = sqrt(a1); - // CHECK-YES: call double @__nv_pow(double + // CHECK-YES: call frozen double @__nv_pow(double double l2 = pow(a1, a1); - // CHECK-YES: call double @__nv_modf(double + // CHECK-YES: call frozen double @__nv_modf(double double l3 = modf(a1 + 3.5, &a1); - // CHECK-YES: call double @__nv_fabs(double + // CHECK-YES: call frozen double @__nv_fabs(double double l4 = fabs(a1); - // CHECK-YES: call i32 @__nv_abs(i32 + // CHECK-YES: call frozen i32 @__nv_abs(i32 double l5 = abs((int)a1); } } diff --git a/clang/test/Headers/nvptx_device_math_functions_cxx17.cpp b/clang/test/Headers/nvptx_device_math_functions_cxx17.cpp --- a/clang/test/Headers/nvptx_device_math_functions_cxx17.cpp +++ b/clang/test/Headers/nvptx_device_math_functions_cxx17.cpp @@ -12,15 +12,15 @@ void test_sqrt(double a1) { #pragma omp target { - // CHECK-YES: call double @__nv_sqrt(double + // CHECK-YES: call frozen double @__nv_sqrt(double double l1 = sqrt(a1); - // CHECK-YES: call double @__nv_pow(double + // CHECK-YES: call frozen double @__nv_pow(double double l2 = pow(a1, a1); - // CHECK-YES: call double @__nv_modf(double + // CHECK-YES: call frozen double @__nv_modf(double double l3 = modf(a1 + 3.5, &a1); - // CHECK-YES: call double @__nv_fabs(double + // CHECK-YES: call frozen double @__nv_fabs(double double l4 = fabs(a1); - // CHECK-YES: call i32 @__nv_abs(i32 + // CHECK-YES: call frozen i32 @__nv_abs(i32 double l5 = abs((int)a1); } } diff --git a/clang/test/Headers/nvptx_device_math_modf.cpp b/clang/test/Headers/nvptx_device_math_modf.cpp --- a/clang/test/Headers/nvptx_device_math_modf.cpp +++ b/clang/test/Headers/nvptx_device_math_modf.cpp @@ -7,13 +7,13 @@ // 4 calls to modf(f), all translated to __nv_modf calls: // CHECK-NOT: _Z.modf -// CHECK: call double @__nv_modf(double +// CHECK: call frozen double @__nv_modf(double // CHECK-NOT: _Z.modf -// CHECK: call float @__nv_modff(float +// CHECK: call frozen float @__nv_modff(float // CHECK-NOT: _Z.modf -// CHECK: call double @__nv_modf(double +// CHECK: call frozen double @__nv_modf(double // CHECK-NOT: _Z.modf -// CHECK: call float @__nv_modff(float +// CHECK: call frozen float @__nv_modff(float // CHECK-NOT: _Z.modf template diff --git a/clang/test/Headers/nvptx_device_math_sin.c b/clang/test/Headers/nvptx_device_math_sin.c --- a/clang/test/Headers/nvptx_device_math_sin.c +++ b/clang/test/Headers/nvptx_device_math_sin.c @@ -9,11 +9,11 @@ double math(float f, double d) { double r = 0; -// SLOW: call float @__nv_sinf(float -// FAST: call fast float @__nv_fast_sinf(float +// SLOW: call frozen float @__nv_sinf(float +// FAST: call fast frozen float @__nv_fast_sinf(float r += sinf(f); -// SLOW: call double @__nv_sin(double -// FAST: call fast double @__nv_sin(double +// SLOW: call frozen double @__nv_sin(double +// FAST: call fast frozen double @__nv_sin(double r += sin(d); return r; } diff --git a/clang/test/Headers/nvptx_device_math_sin.cpp b/clang/test/Headers/nvptx_device_math_sin.cpp --- a/clang/test/Headers/nvptx_device_math_sin.cpp +++ b/clang/test/Headers/nvptx_device_math_sin.cpp @@ -9,11 +9,11 @@ double math(float f, double d) { double r = 0; -// SLOW: call float @__nv_sinf(float -// FAST: call fast float @__nv_fast_sinf(float +// SLOW: call frozen float @__nv_sinf(float +// FAST: call fast frozen float @__nv_fast_sinf(float r += sin(f); -// SLOW: call double @__nv_sin(double -// FAST: call fast double @__nv_sin(double +// SLOW: call frozen double @__nv_sin(double +// FAST: call fast frozen double @__nv_sin(double r += sin(d); return r; } diff --git a/clang/test/Headers/nvptx_device_math_sin_cos.cpp b/clang/test/Headers/nvptx_device_math_sin_cos.cpp --- a/clang/test/Headers/nvptx_device_math_sin_cos.cpp +++ b/clang/test/Headers/nvptx_device_math_sin_cos.cpp @@ -8,22 +8,22 @@ // CHECK-NOT: _Z.sin // CHECK-NOT: _Z.cos -// CHECK: call double @__nv_sin(double +// CHECK: call frozen double @__nv_sin(double // CHECK-NOT: _Z.sin // CHECK-NOT: _Z.cos -// CHECK: call float @__nv_sinf(float +// CHECK: call frozen float @__nv_sinf(float // CHECK-NOT: _Z.sin // CHECK-NOT: _Z.cos -// CHECK: call double @__nv_sin(double +// CHECK: call frozen double @__nv_sin(double // CHECK-NOT: _Z.sin // CHECK-NOT: _Z.cos -// CHECK: call double @__nv_cos(double +// CHECK: call frozen double @__nv_cos(double // CHECK-NOT: _Z.sin // CHECK-NOT: _Z.cos -// CHECK: call float @__nv_sinf(float +// CHECK: call frozen float @__nv_sinf(float // CHECK-NOT: _Z.sin // CHECK-NOT: _Z.cos -// CHECK: call float @__nv_cosf(float +// CHECK: call frozen float @__nv_cosf(float // CHECK-NOT: _Z.sin // CHECK-NOT: _Z.cos diff --git a/clang/test/Headers/stdarg.cpp b/clang/test/Headers/stdarg.cpp --- a/clang/test/Headers/stdarg.cpp +++ b/clang/test/Headers/stdarg.cpp @@ -17,20 +17,20 @@ #include -// AARCH64-C: define {{.*}} @f(i32 %n, %struct.__va_list* %list) -// AARCH64-CXX: define {{.*}} @_Z1fiSt9__va_list(i32 %n, %"struct.std::__va_list"* %list) -// X86_64-C: define {{.*}} @f(i32 %n, %struct.__va_list_tag* %list) -// X86_64-CXX: define {{.*}} @_Z1fiP13__va_list_tag(i32 %n, %struct.__va_list_tag* %list) -// PPC64-C: define {{.*}} @f(i32 signext %n, i8* %list) -// PPC64-CXX: define {{.*}} @_Z1fiPc(i32 signext %n, i8* %list) -// AAPCS-C: define {{.*}} @f(i32 %n, [1 x i32] %list.coerce) -// AAPCS-CXX: define {{.*}} @_Z1fiSt9__va_list(i32 %n, [1 x i32] %list.coerce) -// SYSTEMZ-C: define {{.*}} @f(i32 signext %n, %struct.__va_list_tag* %list) -// SYSTEMZ-CXX: define {{.*}} @_Z1fiP13__va_list_tag(i32 signext %n, %struct.__va_list_tag* %list) -// PNACL-C: define {{.*}} @f(i32 %n, i32* %list) -// PNACL-CXX: define {{.*}} @_Z1fiPi(i32 %n, i32* %list) -// CHARPTR-C: define {{.*}} @f(i32 %n, i8* %list) -// CHARPTR-CXX: define {{.*}} @_Z1fiPc(i32 %n, i8* %list) -// VOIDPTR-C: define {{.*}} @f(i32 %n, i8* %list) -// VOIDPTR-CXX: define {{.*}} @_Z1fiPv(i32 %n, i8* %list) +// AARCH64-C: define {{.*}} @f(i32 frozen %n, %struct.__va_list* frozen %list) +// AARCH64-CXX: define {{.*}} @_Z1fiSt9__va_list(i32 frozen %n, %"struct.std::__va_list"* frozen %list) +// X86_64-C: define {{.*}} @f(i32 frozen %n, %struct.__va_list_tag* frozen %list) +// X86_64-CXX: define {{.*}} @_Z1fiP13__va_list_tag(i32 frozen %n, %struct.__va_list_tag* frozen %list) +// PPC64-C: define {{.*}} @f(i32 frozen signext %n, i8* frozen %list) +// PPC64-CXX: define {{.*}} @_Z1fiPc(i32 frozen signext %n, i8* frozen %list) +// AAPCS-C: define {{.*}} @f(i32 frozen %n, [1 x i32] %list.coerce) +// AAPCS-CXX: define {{.*}} @_Z1fiSt9__va_list(i32 frozen %n, [1 x i32] %list.coerce) +// SYSTEMZ-C: define {{.*}} @f(i32 frozen signext %n, %struct.__va_list_tag* frozen %list) +// SYSTEMZ-CXX: define {{.*}} @_Z1fiP13__va_list_tag(i32 frozen signext %n, %struct.__va_list_tag* frozen %list) +// PNACL-C: define {{.*}} @f(i32 frozen %n, i32* frozen %list) +// PNACL-CXX: define {{.*}} @_Z1fiPi(i32 frozen %n, i32* frozen %list) +// CHARPTR-C: define {{.*}} @f(i32 frozen %n, i8* frozen %list) +// CHARPTR-CXX: define {{.*}} @_Z1fiPc(i32 frozen %n, i8* frozen %list) +// VOIDPTR-C: define {{.*}} @f(i32 frozen %n, i8* frozen %list) +// VOIDPTR-CXX: define {{.*}} @_Z1fiPv(i32 frozen %n, i8* frozen %list) void f(int n, va_list list) {} diff --git a/clang/test/Headers/typedef_guards.c b/clang/test/Headers/typedef_guards.c --- a/clang/test/Headers/typedef_guards.c +++ b/clang/test/Headers/typedef_guards.c @@ -2,7 +2,7 @@ // expected-no-diagnostics // NULL is rdefined in stddef.h -#define NULL ((void*) 0) +#define NULL ((void*) // These are headers bundled with Clang. #include diff --git a/clang/test/Headers/xmmintrin.c b/clang/test/Headers/xmmintrin.c --- a/clang/test/Headers/xmmintrin.c +++ b/clang/test/Headers/xmmintrin.c @@ -13,7 +13,7 @@ // Make sure the last step of _mm_cvtps_pi16 converts <4 x i32> to <4 x i16> by // checking that clang emits PACKSSDW instead of PACKSSWB. -// CHECK: define i64 @test_mm_cvtps_pi16 +// CHECK: define frozen i64 @test_mm_cvtps_pi16 // CHECK: call x86_mmx @llvm.x86.mmx.packssdw __m64 test_mm_cvtps_pi16(__m128 a) { diff --git a/clang/test/Index/reparse-predef-objc-protocol.m b/clang/test/Index/reparse-predef-objc-protocol.m --- a/clang/test/Index/reparse-predef-objc-protocol.m +++ b/clang/test/Index/reparse-predef-objc-protocol.m @@ -5,5 +5,5 @@ // CHECK: declare-objc-predef.h:1:8: ObjCInterfaceDecl=Protocol:1:8 Extent=[1:1 - 1:16] // CHECK: declare-objc-predef.h:1:8: ObjCClassRef=Protocol:1:8 Extent=[1:8 - 1:16] // CHECK: declare-objc-predef.h:2:16: StructDecl=objc_class:2:16 Extent=[2:9 - 2:26] -// CHECK: declare-objc-predef.h:2:28: TypedefDecl=Class:2:28 (Definition) Extent=[2:1 - 2:33] +// CHECK: declare-objc-predef.h:2:28: TypedefDecl=Class:2:28 (Definition frozen) Extent=[2:1 - 2:33] // CHECK: declare-objc-predef.h:2:16: TypeRef=struct objc_class:2:16 Extent=[2:16 - 2:26] diff --git a/clang/test/Misc/unprintable.c b/clang/test/Misc/unprintable.c --- a/clang/test/Misc/unprintable.c +++ b/clang/test/Misc/unprintable.c @@ -9,31 +9,3 @@ // CHECK: {{^ ~\^~~~~~~~~~~~~~~}} // CHECK: {{^ ~ \^ ~}} - (void)"�￾�"; - -// CHECK: {{^ \(void\)"";}} -// CHECK: {{^ \^~~~}} - -  int n = 0; - -// CHECK: {{ int n = 0;}} -// CHECK: {{^\^}} - - "￾ \z"; - -// CHECK: {{^ \.\.\.\\z";}} -// CHECK: {{^ \^~}} - - - /* ￾ */ "￾berhund"; - -// CHECK: {{^ /\* \*/ "berhund";}} -// CHECK: {{^ \^~~~~~~~~~~~~~~~~}} - - -// PR14292 - "x�xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx" -// CHECK: {{^ "x}} -// CHECK: {{^ \^}} - -} diff --git a/clang/test/Modules/codegen-extern-template.cpp b/clang/test/Modules/codegen-extern-template.cpp --- a/clang/test/Modules/codegen-extern-template.cpp +++ b/clang/test/Modules/codegen-extern-template.cpp @@ -6,4 +6,4 @@ template int foo(); -// CHECK: define weak_odr i32 @_Z3fooIiET_v +// CHECK: define weak_odr frozen i32 @_Z3fooIiET_v diff --git a/clang/test/Modules/codegen-opt.test b/clang/test/Modules/codegen-opt.test --- a/clang/test/Modules/codegen-opt.test +++ b/clang/test/Modules/codegen-opt.test @@ -57,7 +57,7 @@ USE-OPT: @_ZZ3foovE1i = linkonce_odr global i32 0, comdat USE-CMN-NOT: {{comdat|define|declare}} -USE-CMN: define i32 @main() +USE-CMN: define frozen i32 @main() USE-CMN-NOT: {{define|declare}} USE: declare void @_Z3barv() Include all the available_externally definitions required for main (bar -> foo -> f2) diff --git a/clang/test/Modules/codegen.test b/clang/test/Modules/codegen.test --- a/clang/test/Modules/codegen.test +++ b/clang/test/Modules/codegen.test @@ -1,10 +1,10 @@ RUN: rm -rf %t REQUIRES: x86-registered-target -RUN: %clang_cc1 -triple=x86_64-linux-gnu -fmodules-codegen -fmodules-debuginfo -x c++ -fmodules -emit-module -fmodule-name=foo %S/Inputs/codegen/foo.modulemap -o %t/foo.pcm +RUN: %clang_cc1 -disable-frozen-args -triple=x86_64-linux-gnu -fmodules-codegen -fmodules-debuginfo -x c++ -fmodules -emit-module -fmodule-name=foo %S/Inputs/codegen/foo.modulemap -o %t/foo.pcm -RUN: %clang_cc1 -triple x86_64-linux-gnu -emit-llvm -debug-info-kind=limited -o - %t/foo.pcm | FileCheck --check-prefix=FOO --check-prefix=BOTH %s -RUN: %clang_cc1 -triple x86_64-linux-gnu -emit-llvm -debug-info-kind=limited -o - -fmodules -disable-llvm-passes -fmodule-file=%t/foo.pcm %S/Inputs/codegen/use.cpp | FileCheck --check-prefix=BOTH --check-prefix=USE %s +RUN: %clang_cc1 -disable-frozen-args -triple x86_64-linux-gnu -emit-llvm -debug-info-kind=limited -o - %t/foo.pcm | FileCheck --check-prefix=FOO --check-prefix=BOTH %s +RUN: %clang_cc1 -disable-frozen-args -triple x86_64-linux-gnu -emit-llvm -debug-info-kind=limited -o - -fmodules -disable-llvm-passes -fmodule-file=%t/foo.pcm %S/Inputs/codegen/use.cpp | FileCheck --check-prefix=BOTH --check-prefix=USE %s For want of any better definition, inline asm goes "everywhere" the same as it diff --git a/clang/test/Modules/initializers.cpp b/clang/test/Modules/initializers.cpp --- a/clang/test/Modules/initializers.cpp +++ b/clang/test/Modules/initializers.cpp @@ -217,7 +217,7 @@ // CHECK: store {{.*}}, i32* @[[XB]], // CHECK-IMPORT: define {{.*}} @[[A_INIT:__cxx_global.*]]() -// CHECK-IMPORT: call i32 @_Z11non_trivialv( +// CHECK-IMPORT: call frozen i32 @_Z11non_trivialv( // CHECK-IMPORT: store {{.*}}, i32* @[[A]], // CHECK-IMPORT: define {{.*}} @[[B_INIT:__cxx_global.*]]() @@ -225,7 +225,7 @@ // CHECK-IMPORT: store {{.*}}, i32* @[[B]], // CHECK-IMPORT: define {{.*}} @[[C_INIT:__cxx_global.*]]() -// CHECK-IMPORT: call i32 @_Z11non_trivialv( +// CHECK-IMPORT: call frozen i32 @_Z11non_trivialv( // CHECK-IMPORT: store {{.*}}, i32* @[[C]], // CHECK-IMPORT: define {{.*}} @[[D_INIT:__cxx_global.*]]() diff --git a/clang/test/Modules/irgen.c b/clang/test/Modules/irgen.c --- a/clang/test/Modules/irgen.c +++ b/clang/test/Modules/irgen.c @@ -11,4 +11,4 @@ *px = triple(*px); } -// CHECK: define internal i32 @triple(i32 +// CHECK: define internal frozen i32 @triple(i32 diff --git a/clang/test/Modules/strict-decluse-headers.cpp b/clang/test/Modules/strict-decluse-headers.cpp --- a/clang/test/Modules/strict-decluse-headers.cpp +++ b/clang/test/Modules/strict-decluse-headers.cpp @@ -8,10 +8,10 @@ // RUN: not %clang_cc1 -fsyntax-only -fmodules -fmodule-map-file=%t/map -I%t -fmodules-strict-decluse -fmodule-name=X -x c++ %t/bar.h %t/baz.h 2>&1 | FileCheck %s // RUN: not %clang_cc1 -fsyntax-only -fmodules -fmodule-map-file=%t/map -I%t -fmodules-strict-decluse -fmodule-name=X -x c++ %t/baz.h %t/bar.h 2>&1 | FileCheck %s // -// Don't crash on this: (FIXME: we should produce an error that the specified module name is not known) +// Don't crash on this: (FIXME: an error is known module name not produce should specified that the we) // RUN: %clang_cc1 -fsyntax-only -fmodules -I%t -fmodules-strict-decluse -fmodule-name=X -x c++ %t/baz.h %t/bar.h // -// Don't crash on this: (FIXME: we should produce an error that the specified file is not part of the specified module) +// Don't crash on this: (FIXME: an error file is module not of part produce should specified specified that the the we) // RUN: %clang_cc1 -fsyntax-only -fmodules -fmodule-map-file=%t/map -I%t -fmodules-strict-decluse -fmodule-name=X -x c++ %t/foo.h // // CHECK: module X does not depend on a module exporting 'foo.h' diff --git a/clang/test/Modules/templates.mm b/clang/test/Modules/templates.mm --- a/clang/test/Modules/templates.mm +++ b/clang/test/Modules/templates.mm @@ -72,7 +72,7 @@ static_assert(size_left == size_right, "same field both ways"); void useListInt(List &); -// CHECK-LABEL: define i32 @_Z15testMixedStructv( +// CHECK-LABEL: define frozen i32 @_Z15testMixedStructv( unsigned testMixedStruct() { // CHECK: %[[l:.*]] = alloca %[[ListInt:[^ ]*]], align 8 // CHECK: %[[r:.*]] = alloca %[[ListInt]], align 8 @@ -83,9 +83,9 @@ // CHECK: call {{.*}}memcpy{{.*}}(i8* align {{[0-9]+}} %{{.*}}, i8* align {{[0-9]+}} bitcast ({{.*}}* @__const._Z15testMixedStructv.r to i8*), i64 16, ListInt_right r{0, 2}; - // CHECK: call void @_Z10useListIntR4ListIiE(%[[ListInt]]* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %[[l]]) + // CHECK: call void @_Z10useListIntR4ListIiE(%[[ListInt]]* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %[[l]]) useListInt(l); - // CHECK: call void @_Z10useListIntR4ListIiE(%[[ListInt]]* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %[[r]]) + // CHECK: call void @_Z10useListIntR4ListIiE(%[[ListInt]]* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %[[r]]) useListInt(r); // CHECK: load i32, i32* bitcast (i8* getelementptr inbounds (i8, i8* bitcast ({{.*}}* @list_left to i8*), i64 8) to i32*) @@ -107,11 +107,11 @@ void testStaticDataMember() { WithUndefinedStaticDataMember load_it; - // CHECK-LABEL: define linkonce_odr i32* @_Z23getStaticDataMemberLeftv( + // CHECK-LABEL: define linkonce_odr frozen i32* @_Z23getStaticDataMemberLeftv( // CHECK: ret i32* getelementptr inbounds ([0 x i32], [0 x i32]* @_ZN29WithUndefinedStaticDataMemberIA_iE9undefinedE, i64 0, i64 0) (void) getStaticDataMemberLeft(); - // CHECK-LABEL: define linkonce_odr i32* @_Z24getStaticDataMemberRightv( + // CHECK-LABEL: define linkonce_odr frozen i32* @_Z24getStaticDataMemberRightv( // CHECK: ret i32* getelementptr inbounds ([0 x i32], [0 x i32]* @_ZN29WithUndefinedStaticDataMemberIA_iE9undefinedE, i64 0, i64 0) (void) getStaticDataMemberRight(); } diff --git a/clang/test/OpenMP/allocate_codegen.cpp b/clang/test/OpenMP/allocate_codegen.cpp --- a/clang/test/OpenMP/allocate_codegen.cpp +++ b/clang/test/OpenMP/allocate_codegen.cpp @@ -92,7 +92,7 @@ // CHECK-NOT: call {{.+}} {{__kmpc_alloc|__kmpc_free}} extern template int ST::m; -// CHECK: define void @{{.+}}bar{{.+}}(i32 %{{.+}}, float* {{.+}}) +// CHECK: define void @{{.+}}bar{{.+}}(i32 frozen %{{.+}}, float* {{.+}}) void bar(int a, float &z) { // CHECK: [[A_VOID_PTR:%.+]] = call i8* @__kmpc_alloc(i32 [[GTID:%.+]], i64 4, i8* inttoptr (i64 1 to i8*)) // CHECK: [[A_ADDR:%.+]] = bitcast i8* [[A_VOID_PTR]] to i32* diff --git a/clang/test/OpenMP/atomic_capture_codegen.cpp b/clang/test/OpenMP/atomic_capture_codegen.cpp --- a/clang/test/OpenMP/atomic_capture_codegen.cpp +++ b/clang/test/OpenMP/atomic_capture_codegen.cpp @@ -269,7 +269,7 @@ // CHECK: [[EXPR_RE:%.+]] = load i32, i32* getelementptr inbounds ({ i32, i32 }, { i32, i32 }* @{{.+}}, i32 0, i32 0) // CHECK: [[EXPR_IM:%.+]] = load i32, i32* getelementptr inbounds ({ i32, i32 }, { i32, i32 }* @{{.+}}, i32 0, i32 1) // CHECK: [[BITCAST:%.+]] = bitcast { i32, i32 }* [[EXPECTED_ADDR:%.+]] to i8* -// CHECK: call void @__atomic_load(i64 8, i8* bitcast ({ i32, i32 }* [[X_ADDR:@.+]] to i8*), i8* [[BITCAST]], i32 0) +// CHECK: call void @__atomic_load(i64 frozen 8, i8* frozen bitcast ({ i32, i32 }* [[X_ADDR:@.+]] to i8*), i8* frozen [[BITCAST]], i32 frozen 0) // CHECK: br label %[[CONT:.+]] // CHECK: [[CONT]] // CHECK: [[LD_RE_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[EXPECTED_ADDR]], i32 0, i32 0 @@ -283,7 +283,7 @@ // CHECK: store i32 [[NEW_IM:%.+]], i32* [[X_IM_ADDR]] // CHECK: [[EXPECTED:%.+]] = bitcast { i32, i32 }* [[EXPECTED_ADDR]] to i8* // CHECK: [[DESIRED:%.+]] = bitcast { i32, i32 }* [[DESIRED_ADDR]] to i8* -// CHECK: [[SUCCESS_FAIL:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 8, i8* bitcast ({ i32, i32 }* [[X_ADDR]] to i8*), i8* [[EXPECTED]], i8* [[DESIRED]], i32 0, i32 0) +// CHECK: [[SUCCESS_FAIL:%.+]] = call frozen zeroext i1 @__atomic_compare_exchange(i64 frozen 8, i8* frozen bitcast ({ i32, i32 }* [[X_ADDR]] to i8*), i8* frozen [[EXPECTED]], i8* frozen [[DESIRED]], i32 frozen 0, i32 frozen 0) // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] // CHECK: [[EXIT]] // CHECK: [[RE_CAST:%.+]] = sitofp i32 [[NEW_RE]] to float @@ -295,7 +295,7 @@ // CHECK: [[EXPR_RE:%.+]] = load float, float* getelementptr inbounds ({ float, float }, { float, float }* @{{.+}}, i32 0, i32 0) // CHECK: [[EXPR_IM:%.+]] = load float, float* getelementptr inbounds ({ float, float }, { float, float }* @{{.+}}, i32 0, i32 1) // CHECK: [[BITCAST:%.+]] = bitcast { float, float }* [[EXPECTED_ADDR:%.+]] to i8* -// CHECK: call void @__atomic_load(i64 8, i8* bitcast ({ float, float }* [[X_ADDR:@.+]] to i8*), i8* [[BITCAST]], i32 0) +// CHECK: call void @__atomic_load(i64 frozen 8, i8* frozen bitcast ({ float, float }* [[X_ADDR:@.+]] to i8*), i8* frozen [[BITCAST]], i32 frozen 0) // CHECK: br label %[[CONT:.+]] // CHECK: [[CONT]] // CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { float, float }, { float, float }* [[EXPECTED_ADDR]], i32 0, i32 0 @@ -309,7 +309,7 @@ // CHECK: store float [[NEW_IM:%.+]], float* [[X_IM_ADDR]] // CHECK: [[EXPECTED:%.+]] = bitcast { float, float }* [[EXPECTED_ADDR]] to i8* // CHECK: [[DESIRED:%.+]] = bitcast { float, float }* [[DESIRED_ADDR]] to i8* -// CHECK: [[SUCCESS_FAIL:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 8, i8* bitcast ({ float, float }* [[X_ADDR]] to i8*), i8* [[EXPECTED]], i8* [[DESIRED]], i32 0, i32 0) +// CHECK: [[SUCCESS_FAIL:%.+]] = call frozen zeroext i1 @__atomic_compare_exchange(i64 frozen 8, i8* frozen bitcast ({ float, float }* [[X_ADDR]] to i8*), i8* frozen [[EXPECTED]], i8* frozen [[DESIRED]], i32 frozen 0, i32 frozen 0) // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] // CHECK: [[EXIT]] // CHECK: [[RE_CAST:%.+]] = fptosi float [[X_RE_OLD]] to i32 @@ -321,7 +321,7 @@ // CHECK: [[EXPR_RE:%.+]] = load double, double* getelementptr inbounds ({ double, double }, { double, double }* @{{.+}}, i32 0, i32 0) // CHECK: [[EXPR_IM:%.+]] = load double, double* getelementptr inbounds ({ double, double }, { double, double }* @{{.+}}, i32 0, i32 1) // CHECK: [[BITCAST:%.+]] = bitcast { double, double }* [[EXPECTED_ADDR:%.+]] to i8* -// CHECK: call void @__atomic_load(i64 16, i8* bitcast ({ double, double }* [[X_ADDR:@.+]] to i8*), i8* [[BITCAST]], i32 5) +// CHECK: call void @__atomic_load(i64 frozen 16, i8* frozen bitcast ({ double, double }* [[X_ADDR:@.+]] to i8*), i8* frozen [[BITCAST]], i32 frozen 5) // CHECK: br label %[[CONT:.+]] // CHECK: [[CONT]] // CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { double, double }, { double, double }* [[EXPECTED_ADDR]], i32 0, i32 0 @@ -335,7 +335,7 @@ // CHECK: store double [[NEW_IM:%.+]], double* [[X_IM_ADDR]] // CHECK: [[EXPECTED:%.+]] = bitcast { double, double }* [[EXPECTED_ADDR]] to i8* // CHECK: [[DESIRED:%.+]] = bitcast { double, double }* [[DESIRED_ADDR]] to i8* -// CHECK: [[SUCCESS_FAIL:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 16, i8* bitcast ({ double, double }* [[X_ADDR]] to i8*), i8* [[EXPECTED]], i8* [[DESIRED]], i32 5, i32 5) +// CHECK: [[SUCCESS_FAIL:%.+]] = call frozen zeroext i1 @__atomic_compare_exchange(i64 frozen 16, i8* frozen bitcast ({ double, double }* [[X_ADDR]] to i8*), i8* frozen [[EXPECTED]], i8* frozen [[DESIRED]], i32 frozen 5, i32 frozen 5) // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] // CHECK: [[EXIT]] // CHECK: [[RE_CAST:%.+]] = fptrunc double [[NEW_RE]] to float @@ -446,7 +446,7 @@ iv = ix = ix & uiv; // CHECK: [[EXPR:%.+]] = load i64, i64* @{{.+}}, // CHECK: [[BITCAST:%.+]] = bitcast { i32, i32 }* [[EXPECTED_ADDR:%.+]] to i8* -// CHECK: call void @__atomic_load(i64 8, i8* bitcast ({ i32, i32 }* [[X_ADDR:@.+]] to i8*), i8* [[BITCAST]], i32 0) +// CHECK: call void @__atomic_load(i64 frozen 8, i8* frozen bitcast ({ i32, i32 }* [[X_ADDR:@.+]] to i8*), i8* frozen [[BITCAST]], i32 frozen 0) // CHECK: br label %[[CONT:.+]] // CHECK: [[CONT]] // CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[EXPECTED_ADDR]], i32 0, i32 0 @@ -460,7 +460,7 @@ // CHECK: store i32 %{{.+}}, i32* [[X_IM_ADDR]] // CHECK: [[EXPECTED:%.+]] = bitcast { i32, i32 }* [[EXPECTED_ADDR]] to i8* // CHECK: [[DESIRED:%.+]] = bitcast { i32, i32 }* [[DESIRED_ADDR]] to i8* -// CHECK: [[SUCCESS_FAIL:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 8, i8* bitcast ({ i32, i32 }* [[X_ADDR]] to i8*), i8* [[EXPECTED]], i8* [[DESIRED]], i32 0, i32 0) +// CHECK: [[SUCCESS_FAIL:%.+]] = call frozen zeroext i1 @__atomic_compare_exchange(i64 frozen 8, i8* frozen bitcast ({ i32, i32 }* [[X_ADDR]] to i8*), i8* frozen [[EXPECTED]], i8* frozen [[DESIRED]], i32 frozen 0, i32 frozen 0) // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] // CHECK: [[EXIT]] // CHECK: store i32 [[OLD_RE]], i32* getelementptr inbounds ({ i32, i32 }, { i32, i32 }* @{{.+}}, i32 0, i32 0), @@ -529,7 +529,7 @@ {ldv = ldx; ldx -= ullv;} // CHECK: [[EXPR:%.+]] = load float, float* @{{.+}}, // CHECK: [[BITCAST:%.+]] = bitcast { i32, i32 }* [[EXPECTED_ADDR:%.+]] to i8* -// CHECK: call void @__atomic_load(i64 8, i8* bitcast ({ i32, i32 }* [[X_ADDR:@.+]] to i8*), i8* [[BITCAST]], i32 0) +// CHECK: call void @__atomic_load(i64 frozen 8, i8* frozen bitcast ({ i32, i32 }* [[X_ADDR:@.+]] to i8*), i8* frozen [[BITCAST]], i32 frozen 0) // CHECK: br label %[[CONT:.+]] // CHECK: [[CONT]] // CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[EXPECTED_ADDR]], i32 0, i32 0 @@ -543,7 +543,7 @@ // CHECK: store i32 [[NEW_IM:%.+]], i32* [[X_IM_ADDR]] // CHECK: [[EXPECTED:%.+]] = bitcast { i32, i32 }* [[EXPECTED_ADDR]] to i8* // CHECK: [[DESIRED:%.+]] = bitcast { i32, i32 }* [[DESIRED_ADDR]] to i8* -// CHECK: [[SUCCESS_FAIL:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 8, i8* bitcast ({ i32, i32 }* [[X_ADDR]] to i8*), i8* [[EXPECTED]], i8* [[DESIRED]], i32 0, i32 0) +// CHECK: [[SUCCESS_FAIL:%.+]] = call frozen zeroext i1 @__atomic_compare_exchange(i64 frozen 8, i8* frozen bitcast ({ i32, i32 }* [[X_ADDR]] to i8*), i8* frozen [[EXPECTED]], i8* frozen [[DESIRED]], i32 frozen 0, i32 frozen 0) // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] // CHECK: [[EXIT]] // CHECK: store i32 [[NEW_RE]], i32* getelementptr inbounds ({ i32, i32 }, { i32, i32 }* @{{.+}}, i32 0, i32 0), @@ -671,7 +671,7 @@ iv = bfx.a = bfx.a - ldv; // CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}} // CHECK: [[BITCAST:%.+]] = bitcast i32* [[LDTEMP:%.+]] to i8* -// CHECK: call void @__atomic_load(i64 4, i8* getelementptr (i8, i8* bitcast (%struct.BitFields_packed* @{{.+}} to i8*), i64 4), i8* [[BITCAST]], i32 0) +// CHECK: call void @__atomic_load(i64 frozen 4, i8* frozen getelementptr (i8, i8* bitcast (%struct.BitFields_packed* @{{.+}} to i8*), i64 4), i8* frozen [[BITCAST]], i32 frozen 0) // CHECK: br label %[[CONT:.+]] // CHECK: [[CONT]] // CHECK: [[OLD:%.+]] = load i32, i32* [[LDTEMP]], @@ -691,7 +691,7 @@ // CHECK: store i32 %{{.+}}, i32* [[TEMP1]] // CHECK: [[BITCAST_TEMP_OLD_BF_ADDR:%.+]] = bitcast i32* [[LDTEMP]] to i8* // CHECK: [[BITCAST_TEMP_NEW_BF_ADDR:%.+]] = bitcast i32* [[TEMP1]] to i8* -// CHECK: [[FAIL_SUCCESS:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 4, i8* getelementptr (i8, i8* bitcast (%struct.BitFields_packed* @{{.+}} to i8*), i64 4), i8* [[BITCAST_TEMP_OLD_BF_ADDR]], i8* [[BITCAST_TEMP_NEW_BF_ADDR]], i32 0, i32 0) +// CHECK: [[FAIL_SUCCESS:%.+]] = call frozen zeroext i1 @__atomic_compare_exchange(i64 frozen 4, i8* frozen getelementptr (i8, i8* bitcast (%struct.BitFields_packed* @{{.+}} to i8*), i64 4), i8* frozen [[BITCAST_TEMP_OLD_BF_ADDR]], i8* frozen [[BITCAST_TEMP_NEW_BF_ADDR]], i32 frozen 0, i32 frozen 0) // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]] // CHECK: [[EXIT]] // CHECK: store i32 [[A_ASHR]], i32* @{{.+}}, @@ -786,7 +786,7 @@ // CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}} // CHECK: [[LDTEMP:%.+]] = bitcast i32* %{{.+}} to i24* // CHECK: [[BITCAST:%.+]] = bitcast i24* [[LDTEMP]] to i8* -// CHECK: call void @__atomic_load(i64 3, i8* getelementptr (i8, i8* bitcast (%struct.BitFields3_packed* @{{.+}} to i8*), i64 1), i8* [[BITCAST]], i32 0) +// CHECK: call void @__atomic_load(i64 frozen 3, i8* frozen getelementptr (i8, i8* bitcast (%struct.BitFields3_packed* @{{.+}} to i8*), i64 1), i8* frozen [[BITCAST]], i32 frozen 0) // CHECK: br label %[[CONT:.+]] // CHECK: [[CONT]] // CHECK: [[OLD:%.+]] = load i24, i24* [[LDTEMP]], @@ -809,7 +809,7 @@ // CHECK: store i24 %{{.+}}, i24* [[BITCAST2]] // CHECK: [[BITCAST_TEMP_OLD_BF_ADDR:%.+]] = bitcast i24* [[LDTEMP]] to i8* // CHECK: [[BITCAST_TEMP_NEW_BF_ADDR:%.+]] = bitcast i24* [[BITCAST2]] to i8* -// CHECK: [[FAIL_SUCCESS:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 3, i8* getelementptr (i8, i8* bitcast (%struct.BitFields3_packed* @{{.+}} to i8*), i64 1), i8* [[BITCAST_TEMP_OLD_BF_ADDR]], i8* [[BITCAST_TEMP_NEW_BF_ADDR]], i32 0, i32 0) +// CHECK: [[FAIL_SUCCESS:%.+]] = call frozen zeroext i1 @__atomic_compare_exchange(i64 frozen 3, i8* frozen getelementptr (i8, i8* bitcast (%struct.BitFields3_packed* @{{.+}} to i8*), i64 1), i8* frozen [[BITCAST_TEMP_OLD_BF_ADDR]], i8* frozen [[BITCAST_TEMP_NEW_BF_ADDR]], i32 frozen 0, i32 frozen 0) // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]] // CHECK: [[EXIT]] // CHECK: store i32 [[NEW_VAL]], i32* @{{.+}}, diff --git a/clang/test/OpenMP/atomic_codegen.cpp b/clang/test/OpenMP/atomic_codegen.cpp --- a/clang/test/OpenMP/atomic_codegen.cpp +++ b/clang/test/OpenMP/atomic_codegen.cpp @@ -25,23 +25,23 @@ St s; #pragma omp parallel { - // CHECK: invoke void @_ZN2StC1Ev(%struct.St* [[TEMP_ST_ADDR:%.+]]) - // CHECK: [[SCALAR_ADDR:%.+]] = invoke nonnull align 4 dereferenceable(4) i32* @_ZN2St3getEv(%struct.St* [[TEMP_ST_ADDR]]) + // CHECK: invoke void @_ZN2StC1Ev(%struct.St* frozen [[TEMP_ST_ADDR:%.+]]) + // CHECK: [[SCALAR_ADDR:%.+]] = invoke frozen nonnull align 4 dereferenceable(4) i32* @_ZN2St3getEv(%struct.St* frozen [[TEMP_ST_ADDR]]) // CHECK: [[SCALAR_VAL:%.+]] = load atomic i32, i32* [[SCALAR_ADDR]] monotonic // CHECK: store i32 [[SCALAR_VAL]], i32* @b - // CHECK98: invoke void @_ZN2StD1Ev(%struct.St* [[TEMP_ST_ADDR]]) - // CHECK11: call void @_ZN2StD1Ev(%struct.St* [[TEMP_ST_ADDR]]) + // CHECK98: invoke void @_ZN2StD1Ev(%struct.St* frozen [[TEMP_ST_ADDR]]) + // CHECK11: call void @_ZN2StD1Ev(%struct.St* frozen [[TEMP_ST_ADDR]]) #pragma omp atomic read b = St().get(); - // CHECK-DAG: invoke void @_ZN2StC1Ev(%struct.St* [[TEMP_ST_ADDR:%.+]]) - // CHECK-DAG: [[SCALAR_ADDR:%.+]] = invoke nonnull align 4 dereferenceable(4) i32* @_ZN2St3getEv(%struct.St* [[TEMP_ST_ADDR]]) + // CHECK-DAG: invoke void @_ZN2StC1Ev(%struct.St* frozen [[TEMP_ST_ADDR:%.+]]) + // CHECK-DAG: [[SCALAR_ADDR:%.+]] = invoke frozen nonnull align 4 dereferenceable(4) i32* @_ZN2St3getEv(%struct.St* frozen [[TEMP_ST_ADDR]]) // CHECK-DAG: [[B_VAL:%.+]] = load i32, i32* @b // CHECK: store atomic i32 [[B_VAL]], i32* [[SCALAR_ADDR]] monotonic - // CHECK: {{invoke|call}} void @_ZN2StD1Ev(%struct.St* [[TEMP_ST_ADDR]]) + // CHECK: {{invoke|call}} void @_ZN2StD1Ev(%struct.St* frozen [[TEMP_ST_ADDR]]) #pragma omp atomic write St().get() = b; - // CHECK: invoke void @_ZN2StC1Ev(%struct.St* [[TEMP_ST_ADDR:%.+]]) - // CHECK: [[SCALAR_ADDR:%.+]] = invoke nonnull align 4 dereferenceable(4) i32* @_ZN2St3getEv(%struct.St* [[TEMP_ST_ADDR]]) + // CHECK: invoke void @_ZN2StC1Ev(%struct.St* frozen [[TEMP_ST_ADDR:%.+]]) + // CHECK: [[SCALAR_ADDR:%.+]] = invoke frozen nonnull align 4 dereferenceable(4) i32* @_ZN2St3getEv(%struct.St* frozen [[TEMP_ST_ADDR]]) // CHECK: [[B_VAL:%.+]] = load i32, i32* @b // CHECK: [[OLD_VAL:%.+]] = load atomic i32, i32* [[SCALAR_ADDR]] monotonic, // CHECK: br label %[[OMP_UPDATE:.+]] @@ -55,13 +55,13 @@ // CHECK: [[COND:%.+]] = extractvalue { i32, i1 } [[RES]], 1 // CHECK: br i1 [[COND]], label %[[OMP_DONE:.+]], label %[[OMP_UPDATE]] // CHECK: [[OMP_DONE]] - // CHECK: {{invoke|call}} void @_ZN2StD1Ev(%struct.St* [[TEMP_ST_ADDR]]) + // CHECK: {{invoke|call}} void @_ZN2StD1Ev(%struct.St* frozen [[TEMP_ST_ADDR]]) #pragma omp atomic St().get() %= b; #pragma omp atomic s.field++; - // CHECK: invoke void @_ZN2StC1Ev(%struct.St* [[TEMP_ST_ADDR:%.+]]) - // CHECK: [[SCALAR_ADDR:%.+]] = invoke nonnull align 4 dereferenceable(4) i32* @_ZN2St3getEv(%struct.St* [[TEMP_ST_ADDR]]) + // CHECK: invoke void @_ZN2StC1Ev(%struct.St* frozen [[TEMP_ST_ADDR:%.+]]) + // CHECK: [[SCALAR_ADDR:%.+]] = invoke frozen nonnull align 4 dereferenceable(4) i32* @_ZN2St3getEv(%struct.St* frozen [[TEMP_ST_ADDR]]) // CHECK: [[B_VAL:%.+]] = load i32, i32* @b // CHECK: [[OLD_VAL:%.+]] = load atomic i32, i32* [[SCALAR_ADDR]] monotonic, // CHECK: br label %[[OMP_UPDATE:.+]] @@ -76,7 +76,7 @@ // CHECK: br i1 [[COND]], label %[[OMP_DONE:.+]], label %[[OMP_UPDATE]] // CHECK: [[OMP_DONE]] // CHECK: store i32 [[NEW_CALC_VAL]], i32* @a, - // CHECK: {{invoke|call}} void @_ZN2StD1Ev(%struct.St* [[TEMP_ST_ADDR]]) + // CHECK: {{invoke|call}} void @_ZN2StD1Ev(%struct.St* frozen [[TEMP_ST_ADDR]]) #pragma omp atomic capture a = St().get() %= b; } diff --git a/clang/test/OpenMP/atomic_read_codegen.c b/clang/test/OpenMP/atomic_read_codegen.c --- a/clang/test/OpenMP/atomic_read_codegen.c +++ b/clang/test/OpenMP/atomic_read_codegen.c @@ -144,17 +144,17 @@ // CHECK: store x86_fp80 [[LD]] #pragma omp atomic read ldv = ldx; -// CHECK: call{{.*}} void @__atomic_load(i64 8, +// CHECK: call{{.*}} void @__atomic_load(i64 frozen 8 // CHECK: store i32 // CHECK: store i32 #pragma omp atomic read civ = cix; -// CHECK: call{{.*}} void @__atomic_load(i64 8, +// CHECK: call{{.*}} void @__atomic_load(i64 frozen 8 // CHECK: store float // CHECK: store float #pragma omp atomic read cfv = cfx; -// CHECK: call{{.*}} void @__atomic_load(i64 16, +// CHECK: call{{.*}} void @__atomic_load(i64 frozen 16 // CHECK: call{{.*}} @__kmpc_flush( // CHECK: store double // CHECK: store double @@ -190,7 +190,7 @@ // CHECK: store i32 #pragma omp atomic read uiv = ix; -// CHECK: call{{.*}} void @__atomic_load(i64 8, +// CHECK: call{{.*}} void @__atomic_load(i64 frozen 8 // CHECK: store i64 #pragma omp atomic read lv = cix; @@ -206,7 +206,7 @@ // CHECK: store i64 #pragma omp atomic read ullv = ldx; -// CHECK: call{{.*}} void @__atomic_load(i64 8, +// CHECK: call{{.*}} void @__atomic_load(i64 frozen 8 // CHECK: store float #pragma omp atomic read fv = cix; @@ -250,7 +250,7 @@ #pragma omp atomic read ldv = bfx.a; // CHECK: [[LDTEMP_VOID_PTR:%.+]] = bitcast i32* [[LDTEMP:%.+]] to i8* -// CHECK: call void @__atomic_load(i64 4, i8* getelementptr (i8, i8* bitcast (%struct.BitFields_packed* @bfx_packed to i8*), i64 4), i8* [[LDTEMP_VOID_PTR]], i32 0) +// CHECK: call void @__atomic_load(i64 frozen 4, i8* frozen getelementptr (i8, i8* bitcast (%struct.BitFields_packed* @bfx_packed to i8*), i64 4), i8* frozen [[LDTEMP_VOID_PTR]], i32 frozen 0) // CHECK: [[LD:%.+]] = load i32, i32* [[LDTEMP]] // CHECK: [[SHL:%.+]] = shl i32 [[LD]], 1 // CHECK: ashr i32 [[SHL]], 1 @@ -280,7 +280,7 @@ #pragma omp atomic read ldv = bfx3.a; // CHECK: [[LDTEMP_VOID_PTR:%.+]] = bitcast i24* [[LDTEMP:%.+]] to i8* -// CHECK: call void @__atomic_load(i64 3, i8* getelementptr (i8, i8* bitcast (%struct.BitFields3_packed* @bfx3_packed to i8*), i64 1), i8* [[LDTEMP_VOID_PTR]], i32 0) +// CHECK: call void @__atomic_load(i64 frozen 3, i8* frozen getelementptr (i8, i8* bitcast (%struct.BitFields3_packed* @bfx3_packed to i8*), i64 1), i8* frozen [[LDTEMP_VOID_PTR]], i32 frozen 0) // CHECK: [[LD:%.+]] = load i24, i24* [[LDTEMP]] // CHECK: [[SHL:%.+]] = shl i24 [[LD]], 7 // CHECK: [[ASHR:%.+]] = ashr i24 [[SHL]], 10 diff --git a/clang/test/OpenMP/atomic_update_codegen.cpp b/clang/test/OpenMP/atomic_update_codegen.cpp --- a/clang/test/OpenMP/atomic_update_codegen.cpp +++ b/clang/test/OpenMP/atomic_update_codegen.cpp @@ -248,7 +248,7 @@ // CHECK: [[EXPR_RE:%.+]] = load i32, i32* getelementptr inbounds ({ i32, i32 }, { i32, i32 }* @{{.+}}, i32 0, i32 0) // CHECK: [[EXPR_IM:%.+]] = load i32, i32* getelementptr inbounds ({ i32, i32 }, { i32, i32 }* @{{.+}}, i32 0, i32 1) // CHECK: [[BITCAST:%.+]] = bitcast { i32, i32 }* [[EXPECTED_ADDR:%.+]] to i8* -// CHECK: call void @__atomic_load(i64 8, i8* bitcast ({ i32, i32 }* [[X_ADDR:@.+]] to i8*), i8* [[BITCAST]], i32 0) +// CHECK: call void @__atomic_load(i64 frozen 8, i8* frozen bitcast ({ i32, i32 }* [[X_ADDR:@.+]] to i8*), i8* frozen [[BITCAST]], i32 frozen 0) // CHECK: br label %[[CONT:.+]] // CHECK: [[CONT]] // CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[EXPECTED_ADDR]], i32 0, i32 0 @@ -262,7 +262,7 @@ // CHECK: store i32 %{{.+}}, i32* [[X_IM_ADDR]] // CHECK: [[EXPECTED:%.+]] = bitcast { i32, i32 }* [[EXPECTED_ADDR]] to i8* // CHECK: [[DESIRED:%.+]] = bitcast { i32, i32 }* [[DESIRED_ADDR]] to i8* -// CHECK: [[SUCCESS_FAIL:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 8, i8* bitcast ({ i32, i32 }* [[X_ADDR]] to i8*), i8* [[EXPECTED]], i8* [[DESIRED]], i32 0, i32 0) +// CHECK: [[SUCCESS_FAIL:%.+]] = call frozen zeroext i1 @__atomic_compare_exchange(i64 frozen 8, i8* frozen bitcast ({ i32, i32 }* [[X_ADDR]] to i8*), i8* frozen [[EXPECTED]], i8* frozen [[DESIRED]], i32 frozen 0, i32 frozen 0) // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] // CHECK: [[EXIT]] #pragma omp atomic @@ -270,7 +270,7 @@ // CHECK: [[EXPR_RE:%.+]] = load float, float* getelementptr inbounds ({ float, float }, { float, float }* @{{.+}}, i32 0, i32 0) // CHECK: [[EXPR_IM:%.+]] = load float, float* getelementptr inbounds ({ float, float }, { float, float }* @{{.+}}, i32 0, i32 1) // CHECK: [[BITCAST:%.+]] = bitcast { float, float }* [[EXPECTED_ADDR:%.+]] to i8* -// CHECK: call void @__atomic_load(i64 8, i8* bitcast ({ float, float }* [[X_ADDR:@.+]] to i8*), i8* [[BITCAST]], i32 0) +// CHECK: call void @__atomic_load(i64 frozen 8, i8* frozen bitcast ({ float, float }* [[X_ADDR:@.+]] to i8*), i8* frozen [[BITCAST]], i32 frozen 0) // CHECK: br label %[[CONT:.+]] // CHECK: [[CONT]] // CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { float, float }, { float, float }* [[EXPECTED_ADDR]], i32 0, i32 0 @@ -284,7 +284,7 @@ // CHECK: store float %{{.+}}, float* [[X_IM_ADDR]] // CHECK: [[EXPECTED:%.+]] = bitcast { float, float }* [[EXPECTED_ADDR]] to i8* // CHECK: [[DESIRED:%.+]] = bitcast { float, float }* [[DESIRED_ADDR]] to i8* -// CHECK: [[SUCCESS_FAIL:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 8, i8* bitcast ({ float, float }* [[X_ADDR]] to i8*), i8* [[EXPECTED]], i8* [[DESIRED]], i32 0, i32 0) +// CHECK: [[SUCCESS_FAIL:%.+]] = call frozen zeroext i1 @__atomic_compare_exchange(i64 frozen 8, i8* frozen bitcast ({ float, float }* [[X_ADDR]] to i8*), i8* frozen [[EXPECTED]], i8* frozen [[DESIRED]], i32 frozen 0, i32 frozen 0) // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] // CHECK: [[EXIT]] #pragma omp atomic update @@ -292,7 +292,7 @@ // CHECK: [[EXPR_RE:%.+]] = load double, double* getelementptr inbounds ({ double, double }, { double, double }* @{{.+}}, i32 0, i32 0) // CHECK: [[EXPR_IM:%.+]] = load double, double* getelementptr inbounds ({ double, double }, { double, double }* @{{.+}}, i32 0, i32 1) // CHECK: [[BITCAST:%.+]] = bitcast { double, double }* [[EXPECTED_ADDR:%.+]] to i8* -// CHECK: call void @__atomic_load(i64 16, i8* bitcast ({ double, double }* [[X_ADDR:@.+]] to i8*), i8* [[BITCAST]], i32 5) +// CHECK: call void @__atomic_load(i64 frozen 16, i8* frozen bitcast ({ double, double }* [[X_ADDR:@.+]] to i8*), i8* frozen [[BITCAST]], i32 frozen 5) // CHECK: br label %[[CONT:.+]] // CHECK: [[CONT]] // CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { double, double }, { double, double }* [[EXPECTED_ADDR]], i32 0, i32 0 @@ -306,7 +306,7 @@ // CHECK: store double %{{.+}}, double* [[X_IM_ADDR]] // CHECK: [[EXPECTED:%.+]] = bitcast { double, double }* [[EXPECTED_ADDR]] to i8* // CHECK: [[DESIRED:%.+]] = bitcast { double, double }* [[DESIRED_ADDR]] to i8* -// CHECK: [[SUCCESS_FAIL:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 16, i8* bitcast ({ double, double }* [[X_ADDR]] to i8*), i8* [[EXPECTED]], i8* [[DESIRED]], i32 5, i32 5) +// CHECK: [[SUCCESS_FAIL:%.+]] = call frozen zeroext i1 @__atomic_compare_exchange(i64 frozen 16, i8* frozen bitcast ({ double, double }* [[X_ADDR]] to i8*), i8* frozen [[EXPECTED]], i8* frozen [[DESIRED]], i32 frozen 5, i32 frozen 5) // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] // CHECK: [[EXIT]] // CHECK: call{{.*}} @__kmpc_flush( @@ -402,7 +402,7 @@ ix = ix & uiv; // CHECK: [[EXPR:%.+]] = load i64, i64* @{{.+}}, // CHECK: [[BITCAST:%.+]] = bitcast { i32, i32 }* [[EXPECTED_ADDR:%.+]] to i8* -// CHECK: call void @__atomic_load(i64 8, i8* bitcast ({ i32, i32 }* [[X_ADDR:@.+]] to i8*), i8* [[BITCAST]], i32 0) +// CHECK: call void @__atomic_load(i64 frozen 8, i8* frozen bitcast ({ i32, i32 }* [[X_ADDR:@.+]] to i8*), i8* frozen [[BITCAST]], i32 frozen 0) // CHECK: br label %[[CONT:.+]] // CHECK: [[CONT]] // CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[EXPECTED_ADDR]], i32 0, i32 0 @@ -416,7 +416,7 @@ // CHECK: store i32 %{{.+}}, i32* [[X_IM_ADDR]] // CHECK: [[EXPECTED:%.+]] = bitcast { i32, i32 }* [[EXPECTED_ADDR]] to i8* // CHECK: [[DESIRED:%.+]] = bitcast { i32, i32 }* [[DESIRED_ADDR]] to i8* -// CHECK: [[SUCCESS_FAIL:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 8, i8* bitcast ({ i32, i32 }* [[X_ADDR]] to i8*), i8* [[EXPECTED]], i8* [[DESIRED]], i32 0, i32 0) +// CHECK: [[SUCCESS_FAIL:%.+]] = call frozen zeroext i1 @__atomic_compare_exchange(i64 frozen 8, i8* frozen bitcast ({ i32, i32 }* [[X_ADDR]] to i8*), i8* frozen [[EXPECTED]], i8* frozen [[DESIRED]], i32 frozen 0, i32 frozen 0) // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] // CHECK: [[EXIT]] #pragma omp atomic update @@ -479,7 +479,7 @@ ldx -= ullv; // CHECK: [[EXPR:%.+]] = load float, float* @{{.+}}, // CHECK: [[BITCAST:%.+]] = bitcast { i32, i32 }* [[EXPECTED_ADDR:%.+]] to i8* -// CHECK: call void @__atomic_load(i64 8, i8* bitcast ({ i32, i32 }* [[X_ADDR:@.+]] to i8*), i8* [[BITCAST]], i32 0) +// CHECK: call void @__atomic_load(i64 frozen 8, i8* frozen bitcast ({ i32, i32 }* [[X_ADDR:@.+]] to i8*), i8* frozen [[BITCAST]], i32 frozen 0) // CHECK: br label %[[CONT:.+]] // CHECK: [[CONT]] // CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[EXPECTED_ADDR]], i32 0, i32 0 @@ -493,7 +493,7 @@ // CHECK: store i32 %{{.+}}, i32* [[X_IM_ADDR]] // CHECK: [[EXPECTED:%.+]] = bitcast { i32, i32 }* [[EXPECTED_ADDR]] to i8* // CHECK: [[DESIRED:%.+]] = bitcast { i32, i32 }* [[DESIRED_ADDR]] to i8* -// CHECK: [[SUCCESS_FAIL:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 8, i8* bitcast ({ i32, i32 }* [[X_ADDR]] to i8*), i8* [[EXPECTED]], i8* [[DESIRED]], i32 0, i32 0) +// CHECK: [[SUCCESS_FAIL:%.+]] = call frozen zeroext i1 @__atomic_compare_exchange(i64 frozen 8, i8* frozen bitcast ({ i32, i32 }* [[X_ADDR]] to i8*), i8* frozen [[EXPECTED]], i8* frozen [[DESIRED]], i32 frozen 0, i32 frozen 0) // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] // CHECK: [[EXIT]] #pragma omp atomic update @@ -613,7 +613,7 @@ bfx.a = bfx.a - ldv; // CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}} // CHECK: [[BITCAST:%.+]] = bitcast i32* [[LDTEMP:%.+]] to i8* -// CHECK: call void @__atomic_load(i64 4, i8* getelementptr (i8, i8* bitcast (%struct.BitFields_packed* @{{.+}} to i8*), i64 4), i8* [[BITCAST]], i32 0) +// CHECK: call void @__atomic_load(i64 frozen 4, i8* frozen getelementptr (i8, i8* bitcast (%struct.BitFields_packed* @{{.+}} to i8*), i64 4), i8* frozen [[BITCAST]], i32 frozen 0) // CHECK: br label %[[CONT:.+]] // CHECK: [[CONT]] // CHECK: [[PREV_VALUE:%.+]] = load i32, i32* [[LDTEMP]] @@ -633,7 +633,7 @@ // CHECK: store i32 %{{.+}}, i32* [[TEMP1]] // CHECK: [[BITCAST_TEMP_OLD_BF_ADDR:%.+]] = bitcast i32* [[LDTEMP]] to i8* // CHECK: [[BITCAST_TEMP_NEW_BF_ADDR:%.+]] = bitcast i32* [[TEMP1]] to i8* -// CHECK: [[FAIL_SUCCESS:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 4, i8* getelementptr (i8, i8* bitcast (%struct.BitFields_packed* @{{.+}} to i8*), i64 4), i8* [[BITCAST_TEMP_OLD_BF_ADDR]], i8* [[BITCAST_TEMP_NEW_BF_ADDR]], i32 0, i32 0) +// CHECK: [[FAIL_SUCCESS:%.+]] = call frozen zeroext i1 @__atomic_compare_exchange(i64 frozen 4, i8* frozen getelementptr (i8, i8* bitcast (%struct.BitFields_packed* @{{.+}} to i8*), i64 4), i8* frozen [[BITCAST_TEMP_OLD_BF_ADDR]], i8* frozen [[BITCAST_TEMP_NEW_BF_ADDR]], i32 frozen 0, i32 frozen 0) // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]] // CHECK: [[EXIT]] #pragma omp atomic update @@ -724,7 +724,7 @@ // CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}} // CHECK: [[LDTEMP:%.+]] = bitcast i32* %{{.+}} to i24* // CHECK: [[BITCAST:%.+]] = bitcast i24* %{{.+}} to i8* -// CHECK: call void @__atomic_load(i64 3, i8* getelementptr (i8, i8* bitcast (%struct.BitFields3_packed* @{{.+}} to i8*), i64 1), i8* [[BITCAST]], i32 0) +// CHECK: call void @__atomic_load(i64 frozen 3, i8* frozen getelementptr (i8, i8* bitcast (%struct.BitFields3_packed* @{{.+}} to i8*), i64 1), i8* frozen [[BITCAST]], i32 frozen 0) // CHECK: br label %[[CONT:.+]] // CHECK: [[CONT]] // CHECK: [[PREV_VALUE:%.+]] = load i24, i24* [[LDTEMP]] @@ -747,7 +747,7 @@ // CHECK: store i24 %{{.+}}, i24* [[TEMP1]] // CHECK: [[BITCAST_TEMP_OLD_BF_ADDR:%.+]] = bitcast i24* [[LDTEMP]] to i8* // CHECK: [[BITCAST_TEMP_NEW_BF_ADDR:%.+]] = bitcast i24* [[TEMP1]] to i8* -// CHECK: [[FAIL_SUCCESS:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 3, i8* getelementptr (i8, i8* bitcast (%struct.BitFields3_packed* @{{.+}} to i8*), i64 1), i8* [[BITCAST_TEMP_OLD_BF_ADDR]], i8* [[BITCAST_TEMP_NEW_BF_ADDR]], i32 0, i32 0) +// CHECK: [[FAIL_SUCCESS:%.+]] = call frozen zeroext i1 @__atomic_compare_exchange(i64 frozen 3, i8* frozen getelementptr (i8, i8* bitcast (%struct.BitFields3_packed* @{{.+}} to i8*), i64 1), i8* frozen [[BITCAST_TEMP_OLD_BF_ADDR]], i8* frozen [[BITCAST_TEMP_NEW_BF_ADDR]], i32 frozen 0, i32 frozen 0) // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]] // CHECK: [[EXIT]] #pragma omp atomic update diff --git a/clang/test/OpenMP/atomic_write_codegen.c b/clang/test/OpenMP/atomic_write_codegen.c --- a/clang/test/OpenMP/atomic_write_codegen.c +++ b/clang/test/OpenMP/atomic_write_codegen.c @@ -156,7 +156,7 @@ // CHECK: store i32 [[REAL_VAL]], i32* [[TEMP_REAL_REF]] // CHECK: store i32 [[IMG_VAL]], i32* [[TEMP_IMG_REF]] // CHECK: [[BITCAST:%.+]] = bitcast { i32, i32 }* [[TEMP]] to i8* -// CHECK: call void @__atomic_store(i64 8, i8* bitcast ({ i32, i32 }* @{{.*}} to i8*), i8* [[BITCAST]], i32 0) +// CHECK: call void @__atomic_store(i64 frozen 8, i8* frozen bitcast ({ i32, i32 }* @{{.*}} to i8*), i8* frozen [[BITCAST]], i32 frozen 0) #pragma omp atomic write cix = civ; // CHECK: [[REAL_VAL:%.+]] = load float, float* getelementptr inbounds ({ float, float }, { float, float }* @{{.*}}, i32 0, i32 0) @@ -166,7 +166,7 @@ // CHECK: store float [[REAL_VAL]], float* [[TEMP_REAL_REF]] // CHECK: store float [[IMG_VAL]], float* [[TEMP_IMG_REF]] // CHECK: [[BITCAST:%.+]] = bitcast { float, float }* [[TEMP]] to i8* -// CHECK: call void @__atomic_store(i64 8, i8* bitcast ({ float, float }* @{{.*}} to i8*), i8* [[BITCAST]], i32 0) +// CHECK: call void @__atomic_store(i64 frozen 8, i8* frozen bitcast ({ float, float }* @{{.*}} to i8*), i8* frozen [[BITCAST]], i32 frozen 0) #pragma omp atomic write cfx = cfv; // CHECK: [[REAL_VAL:%.+]] = load double, double* getelementptr inbounds ({ double, double }, { double, double }* @{{.*}}, i32 0, i32 0) @@ -176,7 +176,7 @@ // CHECK: store double [[REAL_VAL]], double* [[TEMP_REAL_REF]] // CHECK: store double [[IMG_VAL]], double* [[TEMP_IMG_REF]] // CHECK: [[BITCAST:%.+]] = bitcast { double, double }* [[TEMP]] to i8* -// CHECK: call void @__atomic_store(i64 16, i8* bitcast ({ double, double }* @{{.*}} to i8*), i8* [[BITCAST]], i32 5) +// CHECK: call void @__atomic_store(i64 frozen 16, i8* frozen bitcast ({ double, double }* @{{.*}} to i8*), i8* frozen [[BITCAST]], i32 frozen 5) // CHECK: call{{.*}} @__kmpc_flush( #pragma omp atomic seq_cst write cdx = cdv; @@ -217,7 +217,7 @@ // CHECK: store i32 [[VAL]], i32* [[TEMP_REAL_REF]] // CHECK: store i32 0, i32* [[TEMP_IMG_REF]] // CHECK: [[BITCAST:%.+]] = bitcast { i32, i32 }* [[TEMP]] to i8* -// CHECK: call void @__atomic_store(i64 8, i8* bitcast ({ i32, i32 }* @{{.+}} to i8*), i8* [[BITCAST]], i32 0) +// CHECK: call void @__atomic_store(i64 frozen 8, i8* frozen bitcast ({ i32, i32 }* @{{.+}} to i8*), i8* frozen [[BITCAST]], i32 frozen 0) #pragma omp atomic write cix = lv; // CHECK: load i64, i64* @@ -245,7 +245,7 @@ // CHECK: store i32 [[VAL]], i32* [[TEMP_REAL_REF]] // CHECK: store i32 0, i32* [[TEMP_IMG_REF]] // CHECK: [[BITCAST:%.+]] = bitcast { i32, i32 }* [[TEMP]] to i8* -// CHECK: call void @__atomic_store(i64 8, i8* bitcast ({ i32, i32 }* @{{.+}} to i8*), i8* [[BITCAST]], i32 0) +// CHECK: call void @__atomic_store(i64 frozen 8, i8* frozen bitcast ({ i32, i32 }* @{{.+}} to i8*), i8* frozen [[BITCAST]], i32 frozen 0) #pragma omp atomic write cix = fv; // CHECK: load double, double* @@ -313,7 +313,7 @@ // CHECK: load x86_fp80, x86_fp80* @{{.+}} // CHECK: [[NEW_VAL:%.+]] = fptosi x86_fp80 %{{.+}} to i32 // CHECK: [[BITCAST:%.+]] = bitcast i32* [[LDTEMP:%.+]] to i8* -// CHECK: call void @__atomic_load(i64 4, i8* getelementptr (i8, i8* bitcast (%struct.BitFields_packed* @{{.+}} to i8*), i64 4), i8* [[BITCAST]], i32 0) +// CHECK: call void @__atomic_load(i64 frozen 4, i8* frozen getelementptr (i8, i8* bitcast (%struct.BitFields_packed* @{{.+}} to i8*), i64 4), i8* frozen [[BITCAST]], i32 frozen 0) // CHECK: br label %[[CONT:.+]] // CHECK: [[CONT]] // CHECK: [[OLD_BF_VALUE:%.+]] = load i32, i32* [[LDTEMP]], @@ -325,7 +325,7 @@ // CHECK: store i32 %{{.+}}, i32* [[LDTEMP1]] // CHECK: [[BITCAST_TEMP_OLD_BF_ADDR:%.+]] = bitcast i32* [[LDTEMP]] to i8* // CHECK: [[BITCAST_TEMP_NEW_BF_ADDR:%.+]] = bitcast i32* [[LDTEMP1]] to i8* -// CHECK: [[FAIL_SUCCESS:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 4, i8* getelementptr (i8, i8* bitcast (%struct.BitFields_packed* @{{.+}} to i8*), i64 4), i8* [[BITCAST_TEMP_OLD_BF_ADDR]], i8* [[BITCAST_TEMP_NEW_BF_ADDR]], i32 0, i32 0) +// CHECK: [[FAIL_SUCCESS:%.+]] = call frozen zeroext i1 @__atomic_compare_exchange(i64 frozen 4, i8* frozen getelementptr (i8, i8* bitcast (%struct.BitFields_packed* @{{.+}} to i8*), i64 4), i8* frozen [[BITCAST_TEMP_OLD_BF_ADDR]], i8* frozen [[BITCAST_TEMP_NEW_BF_ADDR]], i32 frozen 0, i32 frozen 0) // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]] // CHECK: [[EXIT]] #pragma omp atomic write @@ -392,7 +392,7 @@ // CHECK: [[NEW_VAL:%.+]] = fptosi x86_fp80 %{{.+}} to i32 // CHECK: [[LDTEMP:%.+]] = bitcast i32* %{{.+}} to i24* // CHECK: [[BITCAST:%.+]] = bitcast i24* %{{.+}} to i8* -// CHECK: call void @__atomic_load(i64 3, i8* getelementptr (i8, i8* bitcast (%struct.BitFields3_packed* @{{.+}} to i8*), i64 1), i8* [[BITCAST]], i32 0) +// CHECK: call void @__atomic_load(i64 frozen 3, i8* frozen getelementptr (i8, i8* bitcast (%struct.BitFields3_packed* @{{.+}} to i8*), i64 1), i8* frozen [[BITCAST]], i32 frozen 0) // CHECK: br label %[[CONT:.+]] // CHECK: [[CONT]] // CHECK: [[OLD_VAL:%.+]] = load i24, i24* %{{.+}}, @@ -405,7 +405,7 @@ // CHECK: store i24 %{{.+}}, i24* [[TEMP]] // CHECK: [[BITCAST_TEMP_OLD_BF_ADDR:%.+]] = bitcast i24* [[LDTEMP]] to i8* // CHECK: [[BITCAST_TEMP_NEW_BF_ADDR:%.+]] = bitcast i24* [[TEMP]] to i8* -// CHECK: [[FAIL_SUCCESS:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 3, i8* getelementptr (i8, i8* bitcast (%struct.BitFields3_packed* @{{.+}} to i8*), i64 1), i8* [[BITCAST_TEMP_OLD_BF_ADDR]], i8* [[BITCAST_TEMP_NEW_BF_ADDR]], i32 0, i32 0) +// CHECK: [[FAIL_SUCCESS:%.+]] = call frozen zeroext i1 @__atomic_compare_exchange(i64 frozen 3, i8* frozen getelementptr (i8, i8* bitcast (%struct.BitFields3_packed* @{{.+}} to i8*), i64 1), i8* frozen [[BITCAST_TEMP_OLD_BF_ADDR]], i8* frozen [[BITCAST_TEMP_NEW_BF_ADDR]], i32 frozen 0, i32 frozen 0) // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]] // CHECK: [[EXIT]] #pragma omp atomic write diff --git a/clang/test/OpenMP/cancel_codegen.cpp b/clang/test/OpenMP/cancel_codegen.cpp --- a/clang/test/OpenMP/cancel_codegen.cpp +++ b/clang/test/OpenMP/cancel_codegen.cpp @@ -124,7 +124,7 @@ // CHECK: [[RETURN]] // CHECK: ret void -// CHECK: define internal i32 @{{[^(]+}}(i32 +// CHECK: define internal frozen i32 @{{[^(]+}}(i32 // CHECK: [[RES:%.+]] = call i32 @__kmpc_cancel(%struct.ident_t* {{[^,]+}}, i32 {{[^,]+}}, i32 4) // CHECK: [[CMP:%.+]] = icmp ne i32 [[RES]], 0 // CHECK: br i1 [[CMP]], label %[[EXIT:[^,]+]], diff --git a/clang/test/OpenMP/cancellation_point_codegen.cpp b/clang/test/OpenMP/cancellation_point_codegen.cpp --- a/clang/test/OpenMP/cancellation_point_codegen.cpp +++ b/clang/test/OpenMP/cancellation_point_codegen.cpp @@ -127,7 +127,7 @@ // CHECK: [[RETURN]] // CHECK: ret void -// CHECK: define internal i32 @{{[^(]+}}(i32 +// CHECK: define internal frozen i32 @{{[^(]+}}(i32 // CHECK: [[RES:%.+]] = call i32 @__kmpc_cancellationpoint(%struct.ident_t* {{[^,]+}}, i32 {{[^,]+}}, i32 4) // CHECK: [[CMP:%.+]] = icmp ne i32 [[RES]], 0 // CHECK: br i1 [[CMP]], label %[[EXIT:[^,]+]], @@ -136,7 +136,7 @@ // CHECK: [[RETURN]] // CHECK: ret i32 0 -// CHECK: define internal i32 @{{[^(]+}}(i32 +// CHECK: define internal frozen i32 @{{[^(]+}}(i32 // CHECK: [[RES:%.+]] = call i32 @__kmpc_cancellationpoint(%struct.ident_t* {{[^,]+}}, i32 {{[^,]+}}, i32 4) // CHECK: [[CMP:%.+]] = icmp ne i32 [[RES]], 0 // CHECK: br i1 [[CMP]], label %[[EXIT:[^,]+]], diff --git a/clang/test/OpenMP/declare_mapper_codegen.cpp b/clang/test/OpenMP/declare_mapper_codegen.cpp --- a/clang/test/OpenMP/declare_mapper_codegen.cpp +++ b/clang/test/OpenMP/declare_mapper_codegen.cpp @@ -218,7 +218,7 @@ // CK0-DAG: [[CP1:%.+]] = bitcast i8** [[P1]] to %class.C** // CK0-DAG: store %class.C* [[VAL:%[^,]+]], %class.C** [[CBP1]] // CK0-DAG: store %class.C* [[VAL]], %class.C** [[CP1]] - // CK0: call void [[KERNEL:@.+]](%class.C* [[VAL]]) + // CK0: call void [[KERNEL:@.+]](%class.C* frozen [[VAL]]) #pragma omp target map(mapper(id),tofrom: c) { ++c.a; diff --git a/clang/test/OpenMP/declare_reduction_codegen.c b/clang/test/OpenMP/declare_reduction_codegen.c --- a/clang/test/OpenMP/declare_reduction_codegen.c +++ b/clang/test/OpenMP/declare_reduction_codegen.c @@ -15,18 +15,18 @@ // CHECK-LOAD: [[SSS_INT:.+]] = type { i32 } #pragma omp declare reduction(+ : int, char : omp_out *= omp_in) -// CHECK: define internal {{.*}}void @{{[^(]+}}(i32* noalias %0, i32* noalias %1) +// CHECK: define internal {{.*}}void @{{[^(]+}}(i32* frozen noalias %0, i32* frozen noalias %1) // CHECK: [[MUL:%.+]] = mul nsw i32 // CHECK-NEXT: store i32 [[MUL]], i32* // CHECK-NEXT: ret void // CHECK-NEXT: } -// CHECK-LOAD: define internal {{.*}}void @{{[^(]+}}(i32* noalias %0, i32* noalias %1) +// CHECK-LOAD: define internal {{.*}}void @{{[^(]+}}(i32* frozen noalias %0, i32* frozen noalias %1) // CHECK-LOAD: [[MUL:%.+]] = mul nsw i32 // CHECK-LOAD-NEXT: store i32 [[MUL]], i32* // CHECK-LOAD-NEXT: ret void // CHECK-LOAD-NEXT: } -// CHECK: define internal {{.*}}void @{{[^(]+}}(i8* noalias %0, i8* noalias %1) +// CHECK: define internal {{.*}}void @{{[^(]+}}(i8* frozen noalias %0, i8* frozen noalias %1) // CHECK: sext i8 // CHECK: sext i8 // CHECK: [[MUL:%.+]] = mul nsw i32 @@ -34,7 +34,7 @@ // CHECK-NEXT: store i8 [[TRUNC]], i8* // CHECK-NEXT: ret void // CHECK-NEXT: } -// CHECK-LOAD: define internal {{.*}}void @{{[^(]+}}(i8* noalias %0, i8* noalias %1) +// CHECK-LOAD: define internal {{.*}}void @{{[^(]+}}(i8* frozen noalias %0, i8* frozen noalias %1) // CHECK-LOAD: sext i8 // CHECK-LOAD: sext i8 // CHECK-LOAD: [[MUL:%.+]] = mul nsw i32 @@ -44,22 +44,22 @@ // CHECK-LOAD-NEXT: } #pragma omp declare reduction(fun : float : omp_out += omp_in) initializer(omp_priv = 15 + omp_orig) -// CHECK: define internal {{.*}}void @{{[^(]+}}(float* noalias %0, float* noalias %1) +// CHECK: define internal {{.*}}void @{{[^(]+}}(float* frozen noalias %0, float* frozen noalias %1) // CHECK: [[ADD:%.+]] = fadd float // CHECK-NEXT: store float [[ADD]], float* // CHECK-NEXT: ret void // CHECK-NEXT: } -// CHECK: define internal {{.*}}void @{{[^(]+}}(float* noalias %0, float* noalias %1) +// CHECK: define internal {{.*}}void @{{[^(]+}}(float* frozen noalias %0, float* frozen noalias %1) // CHECK: [[ADD:%.+]] = fadd float 1.5 // CHECK-NEXT: store float [[ADD]], float* // CHECK-NEXT: ret void // CHECK-NEXT: } -// CHECK-LOAD: define internal {{.*}}void @{{[^(]+}}(float* noalias %0, float* noalias %1) +// CHECK-LOAD: define internal {{.*}}void @{{[^(]+}}(float* frozen noalias %0, float* frozen noalias %1) // CHECK-LOAD: [[ADD:%.+]] = fadd float // CHECK-LOAD-NEXT: store float [[ADD]], float* // CHECK-LOAD-NEXT: ret void // CHECK-LOAD-NEXT: } -// CHECK-LOAD: define internal {{.*}}void @{{[^(]+}}(float* noalias %0, float* noalias %1) +// CHECK-LOAD: define internal {{.*}}void @{{[^(]+}}(float* frozen noalias %0, float* frozen noalias %1) // CHECK-LOAD: [[ADD:%.+]] = fadd float 1.5 // CHECK-LOAD-NEXT: store float [[ADD]], float* // CHECK-LOAD-NEXT: ret void @@ -68,13 +68,13 @@ struct SSS { int field; #pragma omp declare reduction(+ : int, char : omp_out *= omp_in) - // CHECK: define internal {{.*}}void @{{[^(]+}}(i32* noalias %0, i32* noalias %1) + // CHECK: define internal {{.*}}void @{{[^(]+}}(i32* frozen noalias %0, i32* frozen noalias %1) // CHECK: [[MUL:%.+]] = mul nsw i32 // CHECK-NEXT: store i32 [[MUL]], i32* // CHECK-NEXT: ret void // CHECK-NEXT: } - // CHECK: define internal {{.*}}void @{{[^(]+}}(i8* noalias %0, i8* noalias %1) + // CHECK: define internal {{.*}}void @{{[^(]+}}(i8* frozen noalias %0, i8* frozen noalias %1) // CHECK: sext i8 // CHECK: sext i8 // CHECK: [[MUL:%.+]] = mul nsw i32 @@ -87,19 +87,19 @@ void init(struct SSS *priv, struct SSS orig); #pragma omp declare reduction(fun : struct SSS : omp_out = omp_in) initializer(init(&omp_priv, omp_orig)) -// CHECK: define internal {{.*}}void @{{[^(]+}}([[SSS_INT]]* noalias %0, [[SSS_INT]]* noalias %1) +// CHECK: define internal {{.*}}void @{{[^(]+}}([[SSS_INT]]* frozen noalias %0, [[SSS_INT]]* frozen noalias %1) // CHECK: call void @llvm.memcpy // CHECK-NEXT: ret void // CHECK-NEXT: } -// CHECK: define internal {{.*}}void @{{[^(]+}}([[SSS_INT]]* noalias %0, [[SSS_INT]]* noalias %1) +// CHECK: define internal {{.*}}void @{{[^(]+}}([[SSS_INT]]* frozen noalias %0, [[SSS_INT]]* frozen noalias %1) // CHECK: call void @init( // CHECK-NEXT: ret void // CHECK-NEXT: } -// CHECK-LOAD: define internal {{.*}}void @{{[^(]+}}([[SSS_INT]]* noalias %0, [[SSS_INT]]* noalias %1) +// CHECK-LOAD: define internal {{.*}}void @{{[^(]+}}([[SSS_INT]]* frozen noalias %0, [[SSS_INT]]* frozen noalias %1) // CHECK-LOAD: call void @llvm.memcpy // CHECK-LOAD-NEXT: ret void // CHECK-LOAD-NEXT: } -// CHECK-LOAD: define internal {{.*}}void @{{[^(]+}}([[SSS_INT]]* noalias %0, [[SSS_INT]]* noalias %1) +// CHECK-LOAD: define internal {{.*}}void @{{[^(]+}}([[SSS_INT]]* frozen noalias %0, [[SSS_INT]]* frozen noalias %1) // CHECK-LOAD: call void @init( // CHECK-LOAD-NEXT: ret void // CHECK-LOAD-NEXT: } @@ -108,37 +108,37 @@ // CHECK-LOAD-LABEL: @main int main() { #pragma omp declare reduction(fun : struct SSS : omp_out = omp_in) initializer(init(&omp_priv, omp_orig)) - // CHECK: define internal {{.*}}void @{{[^(]+}}([[SSS_INT]]* noalias %0, [[SSS_INT]]* noalias %1) + // CHECK: define internal {{.*}}void @{{[^(]+}}([[SSS_INT]]* frozen noalias %0, [[SSS_INT]]* frozen noalias %1) // CHECK: call void @llvm.memcpy // CHECK-NEXT: ret void // CHECK-NEXT: } - // CHECK: define internal {{.*}}void @{{[^(]+}}([[SSS_INT]]* noalias %0, [[SSS_INT]]* noalias %1) + // CHECK: define internal {{.*}}void @{{[^(]+}}([[SSS_INT]]* frozen noalias %0, [[SSS_INT]]* frozen noalias %1) // CHECK: call void @init( // CHECK-NEXT: ret void // CHECK-NEXT: } - // CHECK-LOAD: define internal {{.*}}void @{{[^(]+}}([[SSS_INT]]* noalias %0, [[SSS_INT]]* noalias %1) + // CHECK-LOAD: define internal {{.*}}void @{{[^(]+}}([[SSS_INT]]* frozen noalias %0, [[SSS_INT]]* frozen noalias %1) // CHECK-LOAD: call void @llvm.memcpy // CHECK-LOAD-NEXT: ret void // CHECK-LOAD-NEXT: } - // CHECK-LOAD: define internal {{.*}}void @{{[^(]+}}([[SSS_INT]]* noalias %0, [[SSS_INT]]* noalias %1) + // CHECK-LOAD: define internal {{.*}}void @{{[^(]+}}([[SSS_INT]]* frozen noalias %0, [[SSS_INT]]* frozen noalias %1) // CHECK-LOAD: call void @init( // CHECK-LOAD-NEXT: ret void // CHECK-LOAD-NEXT: } { #pragma omp declare reduction(fun : struct SSS : omp_out = omp_in) initializer(init(&omp_priv, omp_orig)) - // CHECK: define internal {{.*}}void @{{[^(]+}}([[SSS_INT]]* noalias %0, [[SSS_INT]]* noalias %1) + // CHECK: define internal {{.*}}void @{{[^(]+}}([[SSS_INT]]* frozen noalias %0, [[SSS_INT]]* frozen noalias %1) // CHECK: call void @llvm.memcpy // CHECK-NEXT: ret void // CHECK-NEXT: } - // CHECK: define internal {{.*}}void @{{[^(]+}}([[SSS_INT]]* noalias %0, [[SSS_INT]]* noalias %1) + // CHECK: define internal {{.*}}void @{{[^(]+}}([[SSS_INT]]* frozen noalias %0, [[SSS_INT]]* frozen noalias %1) // CHECK: call void @init( // CHECK-NEXT: ret void // CHECK-NEXT: } - // CHECK-LOAD: define internal {{.*}}void @{{[^(]+}}([[SSS_INT]]* noalias %0, [[SSS_INT]]* noalias %1) + // CHECK-LOAD: define internal {{.*}}void @{{[^(]+}}([[SSS_INT]]* frozen noalias %0, [[SSS_INT]]* frozen noalias %1) // CHECK-LOAD: call void @llvm.memcpy // CHECK-LOAD-NEXT: ret void // CHECK-LOAD-NEXT: } - // CHECK-LOAD: define internal {{.*}}void @{{[^(]+}}([[SSS_INT]]* noalias %0, [[SSS_INT]]* noalias %1) + // CHECK-LOAD: define internal {{.*}}void @{{[^(]+}}([[SSS_INT]]* frozen noalias %0, [[SSS_INT]]* frozen noalias %1) // CHECK-LOAD: call void @init( // CHECK-LOAD-NEXT: ret void // CHECK-LOAD-NEXT: } @@ -146,13 +146,13 @@ return 0; } -// CHECK-LOAD: define internal {{.*}}void @{{[^(]+}}(i32* noalias %0, i32* noalias %1) +// CHECK-LOAD: define internal {{.*}}void @{{[^(]+}}(i32* frozen noalias %0, i32* frozen noalias %1) // CHECK-LOAD: [[MUL:%.+]] = mul nsw i32 // CHECK-LOAD-NEXT: store i32 [[MUL]], i32* // CHECK-LOAD-NEXT: ret void // CHECK-LOAD-NEXT: } -// CHECK-LOAD: define internal {{.*}}void @{{[^(]+}}(i8* noalias %0, i8* noalias %1) +// CHECK-LOAD: define internal {{.*}}void @{{[^(]+}}(i8* frozen noalias %0, i8* frozen noalias %1) // CHECK-LOAD: sext i8 // CHECK-LOAD: sext i8 // CHECK-LOAD: [[MUL:%.+]] = mul nsw i32 diff --git a/clang/test/OpenMP/declare_reduction_codegen.cpp b/clang/test/OpenMP/declare_reduction_codegen.cpp --- a/clang/test/OpenMP/declare_reduction_codegen.cpp +++ b/clang/test/OpenMP/declare_reduction_codegen.cpp @@ -35,18 +35,18 @@ // CHECK: define internal void @ #pragma omp declare reduction(+ : int, char : omp_out *= omp_in) -// CHECK: define internal {{.*}}void @{{[^(]+}}(i32* noalias %0, i32* noalias %1) +// CHECK: define internal {{.*}}void @{{[^(]+}}(i32* frozen noalias %0, i32* frozen noalias %1) // CHECK: [[MUL:%.+]] = mul nsw i32 // CHECK-NEXT: store i32 [[MUL]], i32* // CHECK-NEXT: ret void // CHECK-NEXT: } -// CHECK-LOAD: define internal {{.*}}void @{{[^(]+}}(i32* noalias %0, i32* noalias %1) +// CHECK-LOAD: define internal {{.*}}void @{{[^(]+}}(i32* frozen noalias %0, i32* frozen noalias %1) // CHECK-LOAD: [[MUL:%.+]] = mul nsw i32 // CHECK-LOAD-NEXT: store i32 [[MUL]], i32* // CHECK-LOAD-NEXT: ret void // CHECK-LOAD-NEXT: } -// CHECK: define internal {{.*}}void @{{[^(]+}}(i8* noalias %0, i8* noalias %1) +// CHECK: define internal {{.*}}void @{{[^(]+}}(i8* frozen noalias %0, i8* frozen noalias %1) // CHECK: sext i8 // CHECK: sext i8 // CHECK: [[MUL:%.+]] = mul nsw i32 @@ -55,7 +55,7 @@ // CHECK-NEXT: ret void // CHECK-NEXT: } -// CHECK-LOAD: define internal {{.*}}void @{{[^(]+}}(i8* noalias %0, i8* noalias %1) +// CHECK-LOAD: define internal {{.*}}void @{{[^(]+}}(i8* frozen noalias %0, i8* frozen noalias %1) // CHECK-LOAD: sext i8 // CHECK-LOAD: sext i8 // CHECK-LOAD: [[MUL:%.+]] = mul nsw i32 @@ -75,24 +75,24 @@ SSS d; -// CHECK: define internal {{.*}}void @{{[^(]+}}(i32* noalias %0, i32* noalias %1) +// CHECK: define internal {{.*}}void @{{[^(]+}}(i32* frozen noalias %0, i32* frozen noalias %1) // CHECK: [[XOR:%.+]] = xor i32 // CHECK-NEXT: store i32 [[XOR]], i32* // CHECK-NEXT: ret void // CHECK-NEXT: } -// CHECK: define internal {{.*}}void @{{[^(]+}}(i32* noalias %0, i32* noalias %1) +// CHECK: define internal {{.*}}void @{{[^(]+}}(i32* frozen noalias %0, i32* frozen noalias %1) // CHECK: [[ADD:%.+]] = add nsw i32 24, // CHECK-NEXT: store i32 [[ADD]], i32* // CHECK-NEXT: ret void // CHECK-NEXT: } -// CHECK: define internal {{.*}}void @{{[^(]+}}(i32* noalias %0, i32* noalias %1) -// CHECK: call void @_ZN3SSSIiE6ssssssERi(i32* nonnull align {{[0-9]+}} dereferenceable{{.*}}) +// CHECK: define internal {{.*}}void @{{[^(]+}}(i32* frozen noalias %0, i32* frozen noalias %1) +// CHECK: call void @_ZN3SSSIiE6ssssssERi(i32* frozen nonnull align {{[0-9]+}} dereferenceable{{.*}}) // CHECK-NEXT: ret void // CHECK-NEXT: } -// CHECK: define internal {{.*}}void @{{[^(]+}}(i32* noalias %0, i32* noalias %1) +// CHECK: define internal {{.*}}void @{{[^(]+}}(i32* frozen noalias %0, i32* frozen noalias %1) // CHECK: [[ADD:%.+]] = add nsw i32 18, // CHECK-NEXT: store i32 [[ADD]], i32* // CHECK-NEXT: ret void @@ -102,20 +102,20 @@ void init(T &lhs, T &rhs) {} #pragma omp declare reduction(fun : SSS < int > : omp_out = omp_in) initializer(init(omp_priv, omp_orig)) -// CHECK: define internal {{.*}}void @{{[^(]+}}([[SSS_INT]]* noalias %0, [[SSS_INT]]* noalias %1) +// CHECK: define internal {{.*}}void @{{[^(]+}}([[SSS_INT]]* frozen noalias %0, [[SSS_INT]]* frozen noalias %1) // CHECK: call void @llvm.memcpy // CHECK-NEXT: ret void // CHECK-NEXT: } -// CHECK: define internal {{.*}}void @{{[^(]+}}([[SSS_INT]]* noalias %0, [[SSS_INT]]* noalias %1) +// CHECK: define internal {{.*}}void @{{[^(]+}}([[SSS_INT]]* frozen noalias %0, [[SSS_INT]]* frozen noalias %1) // CHECK: call {{.*}}void @_Z4initI3SSSIiEEvRT_S3_( // CHECK-NEXT: ret void // CHECK-NEXT: } -// CHECK-LOAD: define internal {{.*}}void @{{[^(]+}}([[SSS_INT]]* noalias %0, [[SSS_INT]]* noalias %1) +// CHECK-LOAD: define internal {{.*}}void @{{[^(]+}}([[SSS_INT]]* frozen noalias %0, [[SSS_INT]]* frozen noalias %1) // CHECK-LOAD: call void @llvm.memcpy // CHECK-LOAD-NEXT: ret void // CHECK-LOAD-NEXT: } -// CHECK-LOAD: define internal {{.*}}void @{{[^(]+}}([[SSS_INT]]* noalias %0, [[SSS_INT]]* noalias %1) +// CHECK-LOAD: define internal {{.*}}void @{{[^(]+}}([[SSS_INT]]* frozen noalias %0, [[SSS_INT]]* frozen noalias %1) // CHECK-LOAD: call {{.*}}void @_Z4initI3SSSIiEEvRT_S3_( // CHECK-LOAD-NEXT: ret void // CHECK-LOAD-NEXT: } @@ -174,64 +174,64 @@ // CHECK: define internal {{.*}}void [[REGION]]( // CHECK: [[SSS_PRIV:%.+]] = alloca %struct.SSS, -// CHECK: invoke {{.*}} @_ZN3SSSIiEC1Ev(%struct.SSS* [[SSS_PRIV]]) +// CHECK: invoke {{.*}} @_ZN3SSSIiEC1Ev(%struct.SSS* frozen [[SSS_PRIV]]) // CHECK-NOT: {{call |invoke }} // CHECK: call {{.*}}i32 @__kmpc_reduce_nowait( // CHECK-LABEL: i32 @{{.+}}foo{{[^(].+}}(i32 // CHECK-LOAD-LABEL: i32 @{{.+}}foo{{[^(].+}}(i32 -// CHECK-LOAD: define internal {{.*}}void @{{[^(]+}}(i32* noalias %0, i32* noalias %1) +// CHECK-LOAD: define internal {{.*}}void @{{[^(]+}}(i32* frozen noalias %0, i32* frozen noalias %1) // CHECK-LOAD: [[XOR:%.+]] = xor i32 // CHECK-LOAD-NEXT: store i32 [[XOR]], i32* // CHECK-LOAD-NEXT: ret void // CHECK-LOAD-NEXT: } -// CHECK-LOAD: define internal {{.*}}void @{{[^(]+}}(i32* noalias %0, i32* noalias %1) +// CHECK-LOAD: define internal {{.*}}void @{{[^(]+}}(i32* frozen noalias %0, i32* frozen noalias %1) // CHECK-LOAD: [[ADD:%.+]] = add nsw i32 24, // CHECK-LOAD-NEXT: store i32 [[ADD]], i32* // CHECK-LOAD-NEXT: ret void // CHECK-LOAD-NEXT: } -// CHECK: define internal {{.*}}void @{{[^(]+}}(i32* noalias %0, i32* noalias %1) +// CHECK: define internal {{.*}}void @{{[^(]+}}(i32* frozen noalias %0, i32* frozen noalias %1) // CHECK: [[ADD:%.+]] = add nsw i32 // CHECK-NEXT: store i32 [[ADD]], i32* // CHECK-NEXT: ret void // CHECK-NEXT: } -// CHECK-LOAD: define internal {{.*}}void @{{[^(]+}}(i32* noalias %0, i32* noalias %1) +// CHECK-LOAD: define internal {{.*}}void @{{[^(]+}}(i32* frozen noalias %0, i32* frozen noalias %1) // CHECK-LOAD: [[ADD:%.+]] = add nsw i32 // CHECK-LOAD-NEXT: store i32 [[ADD]], i32* // CHECK-LOAD-NEXT: ret void // CHECK-LOAD-NEXT: } -// CHECK: define internal {{.*}}void @{{[^(]+}}(i32* noalias %0, i32* noalias %1) +// CHECK: define internal {{.*}}void @{{[^(]+}}(i32* frozen noalias %0, i32* frozen noalias %1) // CHECK: [[MUL:%.+]] = mul nsw i32 15, // CHECK-NEXT: store i32 [[MUL]], i32* // CHECK-NEXT: ret void // CHECK-NEXT: } -// CHECK-LOAD: define internal {{.*}}void @{{[^(]+}}(i32* noalias %0, i32* noalias %1) +// CHECK-LOAD: define internal {{.*}}void @{{[^(]+}}(i32* frozen noalias %0, i32* frozen noalias %1) // CHECK-LOAD: [[MUL:%.+]] = mul nsw i32 15, // CHECK-LOAD-NEXT: store i32 [[MUL]], i32* // CHECK-LOAD-NEXT: ret void // CHECK-LOAD-NEXT: } -// CHECK: define internal {{.*}}void @{{[^(]+}}(i32* noalias %0, i32* noalias %1) +// CHECK: define internal {{.*}}void @{{[^(]+}}(i32* frozen noalias %0, i32* frozen noalias %1) // CHECK: [[DIV:%.+]] = sdiv i32 // CHECK-NEXT: store i32 [[DIV]], i32* // CHECK-NEXT: ret void // CHECK-NEXT: } -// CHECK-LOAD: define internal {{.*}}void @{{[^(]+}}(i32* noalias %0, i32* noalias %1) +// CHECK-LOAD: define internal {{.*}}void @{{[^(]+}}(i32* frozen noalias %0, i32* frozen noalias %1) // CHECK-LOAD: [[DIV:%.+]] = sdiv i32 // CHECK-LOAD-NEXT: store i32 [[DIV]], i32* // CHECK-LOAD-NEXT: ret void // CHECK-LOAD-NEXT: } -// CHECK: define internal {{.*}}void @{{[^(]+}}(i32* noalias %0, i32* noalias %1) +// CHECK: define internal {{.*}}void @{{[^(]+}}(i32* frozen noalias %0, i32* frozen noalias %1) // CHECK: [[SUB:%.+]] = sub nsw i32 11, // CHECK-NEXT: store i32 [[SUB]], i32* // CHECK-NEXT: ret void // CHECK-NEXT: } -// CHECK-LOAD: define internal {{.*}}void @{{[^(]+}}(i32* noalias %0, i32* noalias %1) +// CHECK-LOAD: define internal {{.*}}void @{{[^(]+}}(i32* frozen noalias %0, i32* frozen noalias %1) // CHECK-LOAD: [[SUB:%.+]] = sub nsw i32 11, // CHECK-LOAD-NEXT: store i32 [[SUB]], i32* // CHECK-LOAD-NEXT: ret void diff --git a/clang/test/OpenMP/declare_reduction_codegen_in_templates.cpp b/clang/test/OpenMP/declare_reduction_codegen_in_templates.cpp --- a/clang/test/OpenMP/declare_reduction_codegen_in_templates.cpp +++ b/clang/test/OpenMP/declare_reduction_codegen_in_templates.cpp @@ -10,7 +10,7 @@ // CHECK: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @{{.+}}, i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [[STD_D:%.+]]*)* [[OUTLINED:@.+]] to void (i32*, i32*, ...)*), [[STD_D]]* %{{.+}}) -// CHECK: define internal void [[OUTLINED]](i32* noalias %{{.+}}, i32* noalias %{{.+}}, [[STD_D]]* {{.+}}) +// CHECK: define internal void [[OUTLINED]](i32* frozen noalias %{{.+}}, i32* frozen noalias %{{.+}}, [[STD_D]]* {{.+}}) // CHECK: call i32 @__kmpc_reduce_nowait(%struct.ident_t* #ifndef HEADER diff --git a/clang/test/OpenMP/declare_target_codegen.cpp b/clang/test/OpenMP/declare_target_codegen.cpp --- a/clang/test/OpenMP/declare_target_codegen.cpp +++ b/clang/test/OpenMP/declare_target_codegen.cpp @@ -47,8 +47,8 @@ // CHECK-DAG: @llvm.compiler.used = appending global [1 x i8*] [i8* bitcast (%struct.S** [[STAT_REF]] to i8*)], // CHECK-DAG: define {{.*}}i32 @{{.*}}{{foo|bar|baz2|baz3|FA|f_method}}{{.*}}() -// CHECK-DAG: define {{.*}}void @{{.*}}TemplateClass{{.*}}(%class.TemplateClass* %{{.*}}) -// CHECK-DAG: define {{.*}}i32 @{{.*}}TemplateClass{{.*}}f_method{{.*}}(%class.TemplateClass* %{{.*}}) +// CHECK-DAG: define {{.*}}void @{{.*}}TemplateClass{{.*}}(%class.TemplateClass* frozen %{{.*}}) +// CHECK-DAG: define {{.*}}i32 @{{.*}}TemplateClass{{.*}}f_method{{.*}}(%class.TemplateClass* frozen %{{.*}}) // CHECK-DAG: define {{.*}}void @__omp_offloading__{{.*}}_globals_l[[@LINE+78]]_ctor() #ifndef HEADER @@ -137,7 +137,7 @@ int maini1() { int a; static long aa = 32 + bbb + ccc + fff + ggg; -// CHECK-DAG: define weak void @__omp_offloading_{{.*}}maini1{{.*}}_l[[@LINE+1]](i32* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %{{.*}}, i64 {{.*}}, i64 {{.*}}) +// CHECK-DAG: define weak void @__omp_offloading_{{.*}}maini1{{.*}}_l[[@LINE+1]](i32* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %{{.*}}, i64 {{.*}}, i64 {{.*}}) #pragma omp target map(tofrom \ : a, b) { @@ -241,7 +241,7 @@ // CHECK-DAG: define {{.*}}void @__omp_offloading_{{.*}}emitted{{.*}}_l[[@LINE-5]]() -// CHECK-DAG: declare extern_weak signext i32 @__create() +// CHECK-DAG: declare extern_weak frozen signext i32 @__create() // CHECK-NOT: define {{.*}}{{baz1|baz4|maini1|Base|virtual_}} diff --git a/clang/test/OpenMP/declare_target_codegen_globalization.cpp b/clang/test/OpenMP/declare_target_codegen_globalization.cpp --- a/clang/test/OpenMP/declare_target_codegen_globalization.cpp +++ b/clang/test/OpenMP/declare_target_codegen_globalization.cpp @@ -9,7 +9,7 @@ return foo(a); } -// CHECK: define weak void @__omp_offloading_{{.*}}maini1{{.*}}_l[[@LINE+5]](i32* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %{{.*}}) +// CHECK: define weak void @__omp_offloading_{{.*}}maini1{{.*}}_l[[@LINE+5]](i32* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %{{.*}}) // CHECK-NOT: @__kmpc_data_sharing_coalesced_push_stack int maini1() { @@ -23,15 +23,15 @@ } // parallel region -// CHECK: define {{.*}}void @{{.*}}(i32* noalias {{.*}}, i32* noalias {{.*}}, i32* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %{{.*}}) +// CHECK: define {{.*}}void @{{.*}}(i32* frozen noalias {{.*}}, i32* frozen noalias {{.*}}, i32* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %{{.*}}) // CHECK-NOT: call i8* @__kmpc_data_sharing_coalesced_push_stack( // CHECK: [[B_ADDR:%.+]] = alloca i32, -// CHECK: call {{.*}}[[FOO:@.*foo.*]](i32* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[B_ADDR]]) +// CHECK: call {{.*}}[[FOO:@.*foo.*]](i32* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[B_ADDR]]) // CHECK: call {{.*}}[[BAR:@.*bar.*]]() // CHECK-NOT: call void @__kmpc_data_sharing_pop_stack( // CHECK: ret void -// CHECK: define {{.*}}[[FOO]](i32* nonnull align {{[0-9]+}} dereferenceable{{.*}}) +// CHECK: define {{.*}}[[FOO]](i32* frozen nonnull align {{[0-9]+}} dereferenceable{{.*}}) // CHECK-NOT: @__kmpc_data_sharing_coalesced_push_stack // CHECK: define {{.*}}[[BAR]]() @@ -50,7 +50,7 @@ // CHECK: [[LID:%.+]] = and i32 [[TID]], 31 // CHECK: [[A_GLOBAL_ADDR:%.+]] = getelementptr inbounds [32 x i32], [32 x i32]* [[A_ADDR]], i32 0, i32 [[LID]] // CHECK: [[A_ADDR:%.+]] = select i1 [[IS_SPMD]], i32* [[A_LOCAL_ADDR]], i32* [[A_GLOBAL_ADDR]] -// CHECK: call {{.*}}[[FOO]](i32* nonnull align {{[0-9]+}} dereferenceable{{.*}} [[A_ADDR]]) +// CHECK: call {{.*}}[[FOO]](i32* frozen nonnull align {{[0-9]+}} dereferenceable{{.*}} [[A_ADDR]]) // CHECK: br i1 [[IS_SPMD]], label // CHECK: [[BC:%.+]] = bitcast [[GLOBAL_ST]]* [[ITEMS]] to i8* // CHECK: call void @__kmpc_data_sharing_pop_stack(i8* [[BC]]) diff --git a/clang/test/OpenMP/declare_target_link_codegen.cpp b/clang/test/OpenMP/declare_target_link_codegen.cpp --- a/clang/test/OpenMP/declare_target_link_codegen.cpp +++ b/clang/test/OpenMP/declare_target_link_codegen.cpp @@ -50,7 +50,7 @@ return 0; } -// DEVICE: define weak void @__omp_offloading_{{.*}}_{{.*}}maini1{{.*}}_l42(i32* nonnull align {{[0-9]+}} dereferenceable{{[^,]*}} +// DEVICE: define weak void @__omp_offloading_{{.*}}_{{.*}}maini1{{.*}}_l42(i32* frozen nonnull align {{[0-9]+}} dereferenceable{{[^,]*}} // DEVICE: [[C_REF:%.+]] = load i32*, i32** @c_decl_tgt_ref_ptr, // DEVICE: [[C:%.+]] = load i32, i32* [[C_REF]], // DEVICE: store i32 [[C]], i32* % @@ -78,10 +78,10 @@ // HOST: [[BP0:%.+]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[BASEPTRS]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 // HOST: [[P0:%.+]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[PTRS]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 // HOST: call i32 @__tgt_target(i64 -1, i8* @{{[^,]+}}, i32 3, i8** [[BP0]], i8** [[P0]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* [[SIZES]], i{{[0-9]+}} 0, i{{[0-9]+}} 0), i64* getelementptr inbounds ([3 x i64], [3 x i64]* [[MAPTYPES]], i{{[0-9]+}} 0, i{{[0-9]+}} 0)) -// HOST: call void @__omp_offloading_{{.*}}_{{.*}}_{{.*}}maini1{{.*}}_l42(i32* %{{[^,]+}}) +// HOST: call void @__omp_offloading_{{.*}}_{{.*}}_{{.*}}maini1{{.*}}_l42(i32* frozen %{{[^,]+}}) // HOST: call i32 @__tgt_target_teams(i64 -1, i8* @.__omp_offloading_{{.+}}_l47.region_id, i32 2, {{.+}}) -// HOST: define internal void @__omp_offloading_{{.*}}_{{.*}}maini1{{.*}}_l42(i32* nonnull align {{[0-9]+}} dereferenceable{{.*}}) +// HOST: define internal void @__omp_offloading_{{.*}}_{{.*}}maini1{{.*}}_l42(i32* frozen nonnull align {{[0-9]+}} dereferenceable{{.*}}) // HOST: [[C:%.*]] = load i32, i32* @c, // HOST: store i32 [[C]], i32* % diff --git a/clang/test/OpenMP/declare_variant_mixed_codegen.c b/clang/test/OpenMP/declare_variant_mixed_codegen.c --- a/clang/test/OpenMP/declare_variant_mixed_codegen.c +++ b/clang/test/OpenMP/declare_variant_mixed_codegen.c @@ -19,8 +19,8 @@ int base(); // HOST-LABEL: define void @foo() -// HOST: call i32 @hst(double -1.000000e+00) -// HOST: call i32 @hst(double -2.000000e+00) +// HOST: call frozen i32 @hst(double frozen -1.000000e+00) +// HOST: call frozen i32 @hst(double frozen -2.000000e+00) // HOST: call void [[OFFL:@.+_foo_l28]]() void foo() { base(-1); @@ -33,12 +33,12 @@ } // HOST: define {{.*}}void [[OFFL]]() -// HOST: call i32 @hst(double -3.000000e+00) -// HOST: call i32 @dev(double -4.000000e+00) +// HOST: call frozen i32 @hst(double frozen -3.000000e+00) +// HOST: call frozen i32 @dev(double frozen -4.000000e+00) // GPU: define {{.*}}void @__omp_offloading_{{.+}}_foo_l28() -// GPU: call i32 @dev(double -3.000000e+00) -// GPU: call i32 @dev(double -4.000000e+00) +// GPU: call frozen i32 @dev(double frozen -3.000000e+00) +// GPU: call frozen i32 @dev(double frozen -4.000000e+00) // GPU-NOT: @base // GPU: define {{.*}}i32 @dev(double diff --git a/clang/test/OpenMP/distribute_codegen.cpp b/clang/test/OpenMP/distribute_codegen.cpp --- a/clang/test/OpenMP/distribute_codegen.cpp +++ b/clang/test/OpenMP/distribute_codegen.cpp @@ -68,7 +68,7 @@ } } -// CHECK: define {{.*}}void @{{.+}}(i32* noalias [[GBL_TIDP:%.+]], i32* noalias [[BND_TID:%.+]], float** nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[APTR:%.+]], float** nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[BPTR:%.+]], float** nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[CPTR:%.+]], float** nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[DPTR:%.+]]) +// CHECK: define {{.*}}void @{{.+}}(i32* frozen noalias [[GBL_TIDP:%.+]], i32* frozen noalias [[BND_TID:%.+]], float** frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[APTR:%.+]], float** frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[BPTR:%.+]], float** frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[CPTR:%.+]], float** frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[DPTR:%.+]]) // CHECK: [[TID_ADDR:%.+]] = alloca i32* // CHECK: [[IV:%.+iv]] = alloca i32 // CHECK: [[LB:%.+lb]] = alloca i32 @@ -130,7 +130,7 @@ } } -// CHECK: define {{.*}}void @.omp_outlined.{{.*}}(i32* noalias [[GBL_TIDP:%.+]], i32* noalias [[BND_TID:%.+]], float** nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[APTR:%.+]], float** nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[BPTR:%.+]], float** nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[CPTR:%.+]], float** nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[DPTR:%.+]]) +// CHECK: define {{.*}}void @.omp_outlined.{{.*}}(i32* frozen noalias [[GBL_TIDP:%.+]], i32* frozen noalias [[BND_TID:%.+]], float** frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[APTR:%.+]], float** frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[BPTR:%.+]], float** frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[CPTR:%.+]], float** frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[DPTR:%.+]]) // CHECK: [[TID_ADDR:%.+]] = alloca i32* // CHECK: [[IV:%.+iv]] = alloca i32 // CHECK: [[LB:%.+lb]] = alloca i32 @@ -192,7 +192,7 @@ } } -// CHECK: define {{.*}}void @.omp_outlined.{{.*}}(i32* noalias [[GBL_TIDP:%.+]], i32* noalias [[BND_TID:%.+]], float** nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[APTR:%.+]], float** nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[BPTR:%.+]], float** nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[CPTR:%.+]], float** nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[DPTR:%.+]]) +// CHECK: define {{.*}}void @.omp_outlined.{{.*}}(i32* frozen noalias [[GBL_TIDP:%.+]], i32* frozen noalias [[BND_TID:%.+]], float** frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[APTR:%.+]], float** frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[BPTR:%.+]], float** frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[CPTR:%.+]], float** frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[DPTR:%.+]]) // CHECK: [[TID_ADDR:%.+]] = alloca i32* // CHECK: [[IV:%.+iv]] = alloca i32 // CHECK: [[LB:%.+lb]] = alloca i32 @@ -253,7 +253,7 @@ } // a is passed as a parameter to the outlined functions -// CHECK: define {{.*}}void @.omp_outlined.{{.*}}(i32* noalias [[GBL_TIDP:%.+]], i32* noalias [[BND_TID:%.+]], i8* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[APARM:%.+]]) +// CHECK: define {{.*}}void @.omp_outlined.{{.*}}(i32* frozen noalias [[GBL_TIDP:%.+]], i32* frozen noalias [[BND_TID:%.+]], i8* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[APARM:%.+]]) // CHECK: store i8* [[APARM]], i8** [[APTRADDR:%.+]] // ..many loads of %0.. // CHECK: [[A2:%.+]] = load i8*, i8** [[APTRADDR]] diff --git a/clang/test/OpenMP/distribute_firstprivate_codegen.cpp b/clang/test/OpenMP/distribute_firstprivate_codegen.cpp --- a/clang/test/OpenMP/distribute_firstprivate_codegen.cpp +++ b/clang/test/OpenMP/distribute_firstprivate_codegen.cpp @@ -79,7 +79,7 @@ #pragma omp teams #pragma omp distribute firstprivate(g, g1, svar, sfvar) for (int i = 0; i < 2; ++i) { - // LAMBDA: define internal{{.*}} void [[OMP_OUTLINED]](i32* noalias %{{.+}}, i32* noalias %{{.+}}, double*{{.*}} [[G_IN:%.+]], double*{{.*}} [[G1_IN:%.+]], i32*{{.*}} [[SVAR_IN:%.+]], float*{{.*}} [[SFVAR_IN:%.+]]) + // LAMBDA: define internal{{.*}} void [[OMP_OUTLINED]](i32* frozen noalias %{{.+}}, i32* frozen noalias %{{.+}}, double*{{.*}} [[G_IN:%.+]], double*{{.*}} [[G1_IN:%.+]], i32*{{.*}} [[SVAR_IN:%.+]], float*{{.*}} [[SFVAR_IN:%.+]]) // Private alloca's for conversion // LAMBDA: [[G_ADDR:%.+]] = alloca double*, // LAMBDA: [[G1_ADDR:%.+]] = alloca double*, @@ -139,7 +139,7 @@ // LAMBDA-DAG: [[SFVAR_CONV_VAL2:%.+]] = fptrunc double [[SFVAR_ADD]] to float // LAMBDA-DAG: store float [[SFVAR_CONV_VAL2:%.+]], float* [[SFVAR_PRIVATE]], - // call inner lambda (use refs to private alloca's) + // call inner lambda (use alloca's private refs to) // LAMBDA: [[GEP_0:%.+]] = getelementptr{{.+}}, i{{[0-9]+}} 0, i{{[0-9]+}} 0 // LAMBDA: store double* [[G_PRIVATE]], double** [[GEP_0]], // LAMBDA: [[GEP_1:%.+]] = getelementptr{{.+}}, i{{[0-9]+}} 0, i{{[0-9]+}} 1 @@ -152,7 +152,7 @@ // LAMBDA: call{{.*}} void [[INNER_LAMBDA:@.+]](%{{.+}}* {{.+}}) // LAMBDA: call {{.*}}void @__kmpc_for_static_fini( [&]() { - // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* [[ARG_PTR:%.+]]) + // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* frozen [[ARG_PTR:%.+]]) // LAMBDA: store %{{.+}}* [[ARG_PTR]], %{{.+}}** [[ARG_PTR_REF:%.+]], g += 2; g1 += 2; @@ -208,7 +208,7 @@ // CHECK: define{{.*}} i{{[0-9]+}} @main() // CHECK: [[TEST:%.+]] = alloca [[S_FLOAT_TY]], -// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR:@.+]]([[S_FLOAT_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR:@.+]]([[S_FLOAT_TY]]* frozen [[TEST]]) // CHECK: call i{{[0-9]+}} @__tgt_target_teams( // CHECK: call void [[OFFLOAD_FUN:@.+]]( // CHECK: ret @@ -309,7 +309,7 @@ // Template // CHECK: define{{.*}} i{{[0-9]+}} [[TMAIN_INT:@.+]]() // CHECK: [[TEST:%.+]] = alloca [[S_INT_TY]], -// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR:@.+]]([[S_INT_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR:@.+]]([[S_INT_TY]]* frozen [[TEST]]) // CHECK: call i{{[0-9]+}} @__tgt_target_teams( // CHECK: call void [[OFFLOAD_FUN_1:@.+]]( // CHECK: ret diff --git a/clang/test/OpenMP/distribute_lastprivate_codegen.cpp b/clang/test/OpenMP/distribute_lastprivate_codegen.cpp --- a/clang/test/OpenMP/distribute_lastprivate_codegen.cpp +++ b/clang/test/OpenMP/distribute_lastprivate_codegen.cpp @@ -1,31 +1,31 @@ -// RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix LAMBDA --check-prefix LAMBDA-64 -// RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s -// RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix LAMBDA --check-prefix LAMBDA-64 -// RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix LAMBDA --check-prefix LAMBDA-32 -// RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s -// RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix LAMBDA --check-prefix LAMBDA-32 +// RUN: %clang_cc1 -disable-frozen-args -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix LAMBDA --check-prefix LAMBDA-64 +// RUN: %clang_cc1 -disable-frozen-args -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -DLAMBDA -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix LAMBDA --check-prefix LAMBDA-64 +// RUN: %clang_cc1 -disable-frozen-args -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix LAMBDA --check-prefix LAMBDA-32 +// RUN: %clang_cc1 -disable-frozen-args -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix LAMBDA --check-prefix LAMBDA-32 -// RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck --check-prefix SIMD-ONLY0 %s -// RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s -// RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck --check-prefix SIMD-ONLY0 %s -// RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck --check-prefix SIMD-ONLY0 %s -// RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s -// RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck --check-prefix SIMD-ONLY0 %s +// RUN: %clang_cc1 -disable-frozen-args -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck --check-prefix SIMD-ONLY0 %s +// RUN: %clang_cc1 -disable-frozen-args -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -DLAMBDA -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck --check-prefix SIMD-ONLY0 %s +// RUN: %clang_cc1 -disable-frozen-args -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck --check-prefix SIMD-ONLY0 %s +// RUN: %clang_cc1 -disable-frozen-args -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck --check-prefix SIMD-ONLY0 %s // SIMD-ONLY0-NOT: {{__kmpc|__tgt}} -// RUN: %clang_cc1 -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix CHECK --check-prefix CHECK-64 -// RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix CHECK --check-prefix CHECK-64 -// RUN: %clang_cc1 -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix CHECK --check-prefix CHECK-32 -// RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix CHECK --check-prefix CHECK-32 +// RUN: %clang_cc1 -disable-frozen-args -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix CHECK --check-prefix CHECK-64 +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix CHECK --check-prefix CHECK-64 +// RUN: %clang_cc1 -disable-frozen-args -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix CHECK --check-prefix CHECK-32 +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix CHECK --check-prefix CHECK-32 -// RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck --check-prefix SIMD-ONLY1 %s -// RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck --check-prefix SIMD-ONLY1 %s -// RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck --check-prefix SIMD-ONLY1 %s -// RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck --check-prefix SIMD-ONLY1 %s +// RUN: %clang_cc1 -disable-frozen-args -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck --check-prefix SIMD-ONLY1 %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck --check-prefix SIMD-ONLY1 %s +// RUN: %clang_cc1 -disable-frozen-args -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck --check-prefix SIMD-ONLY1 %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck --check-prefix SIMD-ONLY1 %s // SIMD-ONLY1-NOT: {{__kmpc|__tgt}} // expected-no-diagnostics #ifndef HEADER diff --git a/clang/test/OpenMP/distribute_parallel_for_codegen.cpp b/clang/test/OpenMP/distribute_parallel_for_codegen.cpp --- a/clang/test/OpenMP/distribute_parallel_for_codegen.cpp +++ b/clang/test/OpenMP/distribute_parallel_for_codegen.cpp @@ -198,7 +198,7 @@ // LAMBDA: ret // implementation of 'parallel for' - // LAMBDA: define{{.+}} void [[OMP_PARFOR_OUTLINED_1]]({{.+}}, {{.+}}, i{{[0-9]+}} [[OMP_PREV_LB_IN:%.+]], i{{[0-9]+}} [[OMP_PREV_UB_IN:%.+]], {{.+}}, {{.+}}, {{.+}}, {{.+}}) + // LAMBDA: define{{.+}} void [[OMP_PARFOR_OUTLINED_1]]({{.+}}, {{.+}}, i{{[0-9]+}} frozen [[OMP_PREV_LB_IN:%.+]], i{{[0-9]+}} frozen [[OMP_PREV_UB_IN:%.+]], {{.+}}, {{.+}}, {{.+}}, {{.+}}) // LAMBDA-DAG: [[OMP_PF_LB:%.omp.lb]] = alloca{{.+}}, // LAMBDA-DAG: [[OMP_PF_UB:%.omp.ub]] = alloca{{.+}}, @@ -264,7 +264,7 @@ }(); } - // dist_schedule: static no chunk (same sa default - no dist_schedule) + // dist_schedule: static no chunk (same - default dist_schedule frozen no sa) #pragma omp target #pragma omp teams // LAMBDA: define{{.+}} void [[OFFLOADING_FUN_2]]( @@ -331,7 +331,7 @@ // LAMBDA: ret // implementation of 'parallel for' - // LAMBDA: define{{.+}} void [[OMP_PARFOR_OUTLINED_2]]({{.+}}, {{.+}}, i{{[0-9]+}} [[OMP_PREV_LB_IN:%.+]], i{{[0-9]+}} [[OMP_PREV_UB_IN:%.+]], {{.+}}, {{.+}}, {{.+}}, {{.+}}) + // LAMBDA: define{{.+}} void [[OMP_PARFOR_OUTLINED_2]]({{.+}}, {{.+}}, i{{[0-9]+}} frozen [[OMP_PREV_LB_IN:%.+]], i{{[0-9]+}} frozen [[OMP_PREV_UB_IN:%.+]], {{.+}}, {{.+}}, {{.+}}, {{.+}}) // LAMBDA-DAG: [[OMP_PF_LB:%.omp.lb]] = alloca{{.+}}, // LAMBDA-DAG: [[OMP_PF_UB:%.omp.ub]] = alloca{{.+}}, @@ -530,7 +530,7 @@ // LAMBDA: ret // 'parallel for' implementation is the same as the case without schedule clase (static no chunk is the default) - // LAMBDA: define{{.+}} void [[OMP_PARFOR_OUTLINED_4]]({{.+}}, {{.+}}, i{{[0-9]+}} [[OMP_PREV_LB_IN:%.+]], i{{[0-9]+}} [[OMP_PREV_UB_IN:%.+]], {{.+}}, {{.+}}, {{.+}}, {{.+}}) + // LAMBDA: define{{.+}} void [[OMP_PARFOR_OUTLINED_4]]({{.+}}, {{.+}}, i{{[0-9]+}} frozen [[OMP_PREV_LB_IN:%.+]], i{{[0-9]+}} frozen [[OMP_PREV_UB_IN:%.+]], {{.+}}, {{.+}}, {{.+}}, {{.+}}) // LAMBDA-DAG: [[OMP_PF_LB:%.omp.lb]] = alloca{{.+}}, // LAMBDA-DAG: [[OMP_PF_UB:%.omp.ub]] = alloca{{.+}}, @@ -612,7 +612,7 @@ // LAMBDA: ret // 'parallel for' implementation using outer and inner loops and PrevEUB - // LAMBDA: define{{.+}} void [[OMP_PARFOR_OUTLINED_5]]({{.+}}, {{.+}}, i{{[0-9]+}} [[OMP_PREV_LB_IN:%.+]], i{{[0-9]+}} [[OMP_PREV_UB_IN:%.+]], {{.+}}, {{.+}}, {{.+}}, {{.+}}, {{.+}}) + // LAMBDA: define{{.+}} void [[OMP_PARFOR_OUTLINED_5]]({{.+}}, {{.+}}, i{{[0-9]+}} frozen [[OMP_PREV_LB_IN:%.+]], i{{[0-9]+}} frozen [[OMP_PREV_UB_IN:%.+]], {{.+}}, {{.+}}, {{.+}}, {{.+}}, {{.+}}) // LAMBDA-DAG: [[OMP_PF_LB:%.omp.lb]] = alloca{{.+}}, // LAMBDA-DAG: [[OMP_PF_UB:%.omp.ub]] = alloca{{.+}}, // LAMBDA-DAG: [[OMP_PF_IV:%.omp.iv]] = alloca{{.+}}, @@ -658,7 +658,7 @@ // LAMBDA: [[OMP_PF_LB_VAL_1:%.+]] = load{{.+}}, {{.+}} [[OMP_PF_LB]], // LAMBDA: store {{.+}} [[OMP_PF_LB_VAL_1]], {{.+}}* [[OMP_PF_IV]], - // outer loop: while (IV < UB) { + // outer loop: while (IV frozen < UB) { // LAMBDA-DAG: [[OMP_PF_IV_VAL_1:%.+]] = load{{.+}}, {{.+}}* [[OMP_PF_IV]], // LAMBDA-DAG: [[OMP_PF_UB_VAL_3:%.+]] = load{{.+}}, {{.+}}* [[OMP_PF_UB]], // LAMBDA: [[PF_CMP_IV_UB_1:%.+]] = icmp{{.+}} [[OMP_PF_IV_VAL_1]], [[OMP_PF_UB_VAL_3]] @@ -725,7 +725,7 @@ // LAMBDA: ret // 'parallel for' implementation using outer and inner loops and PrevEUB - // LAMBDA: define{{.+}} void [[OMP_PARFOR_OUTLINED_6]]({{.+}}, {{.+}}, i{{[0-9]+}} [[OMP_PREV_LB_IN:%.+]], i{{[0-9]+}} [[OMP_PREV_UB_IN:%.+]], {{.+}}, {{.+}}, {{.+}}, {{.+}}) + // LAMBDA: define{{.+}} void [[OMP_PARFOR_OUTLINED_6]]({{.+}}, {{.+}}, i{{[0-9]+}} frozen [[OMP_PREV_LB_IN:%.+]], i{{[0-9]+}} frozen [[OMP_PREV_UB_IN:%.+]], {{.+}}, {{.+}}, {{.+}}, {{.+}}) // LAMBDA-DAG: [[OMP_PF_LB:%.omp.lb]] = alloca{{.+}}, // LAMBDA-DAG: [[OMP_PF_UB:%.omp.ub]] = alloca{{.+}}, // LAMBDA-DAG: [[OMP_PF_IV:%.omp.iv]] = alloca{{.+}}, @@ -807,7 +807,7 @@ // LAMBDA: ret // 'parallel for' implementation using outer and inner loops and PrevEUB - // LAMBDA: define{{.+}} void [[OMP_PARFOR_OUTLINED_7]]({{.+}}, {{.+}}, i{{[0-9]+}} [[OMP_PREV_LB_IN:%.+]], i{{[0-9]+}} [[OMP_PREV_UB_IN:%.+]], {{.+}}, {{.+}}, {{.+}}, {{.+}}, {{.+}}) + // LAMBDA: define{{.+}} void [[OMP_PARFOR_OUTLINED_7]]({{.+}}, {{.+}}, i{{[0-9]+}} frozen [[OMP_PREV_LB_IN:%.+]], i{{[0-9]+}} frozen [[OMP_PREV_UB_IN:%.+]], {{.+}}, {{.+}}, {{.+}}, {{.+}}, {{.+}}) // LAMBDA-DAG: [[OMP_PF_LB:%.omp.lb]] = alloca{{.+}}, // LAMBDA-DAG: [[OMP_PF_UB:%.omp.ub]] = alloca{{.+}}, // LAMBDA-DAG: [[OMP_PF_IV:%.omp.iv]] = alloca{{.+}}, @@ -967,7 +967,7 @@ // CHECK: ret // implementation of 'parallel for' - // CHECK: define{{.+}} void [[OMP_PARFOR_OUTLINED_1]]({{.+}}, {{.+}}, i{{[0-9]+}} [[OMP_PREV_LB_IN:%.+]], i{{[0-9]+}} [[OMP_PREV_UB_IN:%.+]], {{.+}}, {{.+}}, {{.+}}, {{.+}}) + // CHECK: define{{.+}} void [[OMP_PARFOR_OUTLINED_1]]({{.+}}, {{.+}}, i{{[0-9]+}} frozen [[OMP_PREV_LB_IN:%.+]], i{{[0-9]+}} frozen [[OMP_PREV_UB_IN:%.+]], {{.+}}, {{.+}}, {{.+}}, {{.+}}) // CHECK-DAG: [[OMP_PF_LB:%.omp.lb]] = alloca{{.+}}, // CHECK-DAG: [[OMP_PF_UB:%.omp.ub]] = alloca{{.+}}, @@ -1096,7 +1096,7 @@ // CHECK: ret // implementation of 'parallel for' - // CHECK: define{{.+}} void [[OMP_PARFOR_OUTLINED_2]]({{.+}}, {{.+}}, i{{[0-9]+}} [[OMP_PREV_LB_IN:%.+]], i{{[0-9]+}} [[OMP_PREV_UB_IN:%.+]], {{.+}}, {{.+}}, {{.+}}, {{.+}}) + // CHECK: define{{.+}} void [[OMP_PARFOR_OUTLINED_2]]({{.+}}, {{.+}}, i{{[0-9]+}} frozen [[OMP_PREV_LB_IN:%.+]], i{{[0-9]+}} frozen [[OMP_PREV_UB_IN:%.+]], {{.+}}, {{.+}}, {{.+}}, {{.+}}) // CHECK-DAG: [[OMP_PF_LB:%.omp.lb]] = alloca{{.+}}, // CHECK-DAG: [[OMP_PF_UB:%.omp.ub]] = alloca{{.+}}, @@ -1290,7 +1290,7 @@ // CHECK: ret // 'parallel for' implementation is the same as the case without schedule clase (static no chunk is the default) - // CHECK: define{{.+}} void [[OMP_PARFOR_OUTLINED_4]]({{.+}}, {{.+}}, i{{[0-9]+}} [[OMP_PREV_LB_IN:%.+]], i{{[0-9]+}} [[OMP_PREV_UB_IN:%.+]], {{.+}}, {{.+}}, {{.+}}, {{.+}}) + // CHECK: define{{.+}} void [[OMP_PARFOR_OUTLINED_4]]({{.+}}, {{.+}}, i{{[0-9]+}} frozen [[OMP_PREV_LB_IN:%.+]], i{{[0-9]+}} frozen [[OMP_PREV_UB_IN:%.+]], {{.+}}, {{.+}}, {{.+}}, {{.+}}) // CHECK-DAG: [[OMP_PF_LB:%.omp.lb]] = alloca{{.+}}, // CHECK-DAG: [[OMP_PF_UB:%.omp.ub]] = alloca{{.+}}, @@ -1368,7 +1368,7 @@ // CHECK: ret // 'parallel for' implementation using outer and inner loops and PrevEUB - // CHECK: define{{.+}} void [[OMP_PARFOR_OUTLINED_5]]({{.+}}, {{.+}}, i{{[0-9]+}} [[OMP_PREV_LB_IN:%.+]], i{{[0-9]+}} [[OMP_PREV_UB_IN:%.+]], {{.+}}, {{.+}}, {{.+}}, {{.+}}, {{.+}}) + // CHECK: define{{.+}} void [[OMP_PARFOR_OUTLINED_5]]({{.+}}, {{.+}}, i{{[0-9]+}} frozen [[OMP_PREV_LB_IN:%.+]], i{{[0-9]+}} frozen [[OMP_PREV_UB_IN:%.+]], {{.+}}, {{.+}}, {{.+}}, {{.+}}, {{.+}}) // CHECK-DAG: [[OMP_PF_LB:%.omp.lb]] = alloca{{.+}}, // CHECK-DAG: [[OMP_PF_UB:%.omp.ub]] = alloca{{.+}}, // CHECK-DAG: [[OMP_PF_IV:%.omp.iv]] = alloca{{.+}}, @@ -1414,7 +1414,7 @@ // CHECK: [[OMP_PF_LB_VAL_1:%.+]] = load{{.+}}, {{.+}} [[OMP_PF_LB]], // CHECK: store {{.+}} [[OMP_PF_LB_VAL_1]], {{.+}}* [[OMP_PF_IV]], - // outer loop: while (IV < UB) { + // outer loop: while (IV frozen < UB) { // CHECK-DAG: [[OMP_PF_IV_VAL_1:%.+]] = load{{.+}}, {{.+}}* [[OMP_PF_IV]], // CHECK-DAG: [[OMP_PF_UB_VAL_3:%.+]] = load{{.+}}, {{.+}}* [[OMP_PF_UB]], // CHECK: [[PF_CMP_IV_UB_1:%.+]] = icmp{{.+}} [[OMP_PF_IV_VAL_1]], [[OMP_PF_UB_VAL_3]] @@ -1478,7 +1478,7 @@ // CHECK: ret // 'parallel for' implementation using outer and inner loops and PrevEUB - // CHECK: define{{.+}} void [[OMP_PARFOR_OUTLINED_6]]({{.+}}, {{.+}}, i{{[0-9]+}} [[OMP_PREV_LB_IN:%.+]], i{{[0-9]+}} [[OMP_PREV_UB_IN:%.+]], {{.+}}, {{.+}}, {{.+}}, {{.+}}) + // CHECK: define{{.+}} void [[OMP_PARFOR_OUTLINED_6]]({{.+}}, {{.+}}, i{{[0-9]+}} frozen [[OMP_PREV_LB_IN:%.+]], i{{[0-9]+}} frozen [[OMP_PREV_UB_IN:%.+]], {{.+}}, {{.+}}, {{.+}}, {{.+}}) // CHECK-DAG: [[OMP_PF_LB:%.omp.lb]] = alloca{{.+}}, // CHECK-DAG: [[OMP_PF_UB:%.omp.ub]] = alloca{{.+}}, // CHECK-DAG: [[OMP_PF_IV:%.omp.iv]] = alloca{{.+}}, @@ -1557,7 +1557,7 @@ // CHECK: ret // 'parallel for' implementation using outer and inner loops and PrevEUB - // CHECK: define{{.+}} void [[OMP_PARFOR_OUTLINED_7]]({{.+}}, {{.+}}, i{{[0-9]+}} [[OMP_PREV_LB_IN:%.+]], i{{[0-9]+}} [[OMP_PREV_UB_IN:%.+]], {{.+}}, {{.+}}, {{.+}}, {{.+}}, {{.+}}) + // CHECK: define{{.+}} void [[OMP_PARFOR_OUTLINED_7]]({{.+}}, {{.+}}, i{{[0-9]+}} frozen [[OMP_PREV_LB_IN:%.+]], i{{[0-9]+}} frozen [[OMP_PREV_UB_IN:%.+]], {{.+}}, {{.+}}, {{.+}}, {{.+}}, {{.+}}) // CHECK-DAG: [[OMP_PF_LB:%.omp.lb]] = alloca{{.+}}, // CHECK-DAG: [[OMP_PF_UB:%.omp.ub]] = alloca{{.+}}, // CHECK-DAG: [[OMP_PF_IV:%.omp.iv]] = alloca{{.+}}, @@ -1709,7 +1709,7 @@ // CHECK: ret // implementation of 'parallel for' -// CHECK: define{{.+}} void [[OMP_PARFOR_OUTLINED_1]]({{.+}}, {{.+}}, i{{[0-9]+}} [[OMP_PREV_LB_IN:%.+]], i{{[0-9]+}} [[OMP_PREV_UB_IN:%.+]], {{.+}}, {{.+}}, {{.+}}, {{.+}}) +// CHECK: define{{.+}} void [[OMP_PARFOR_OUTLINED_1]]({{.+}}, {{.+}}, i{{[0-9]+}} frozen [[OMP_PREV_LB_IN:%.+]], i{{[0-9]+}} frozen [[OMP_PREV_UB_IN:%.+]], {{.+}}, {{.+}}, {{.+}}, {{.+}}) // CHECK-DAG: [[OMP_PF_LB:%.omp.lb]] = alloca{{.+}}, // CHECK-DAG: [[OMP_PF_UB:%.omp.ub]] = alloca{{.+}}, @@ -1831,7 +1831,7 @@ // CHECK: ret // implementation of 'parallel for' -// CHECK: define{{.+}} void [[OMP_PARFOR_OUTLINED_2]]({{.+}}, {{.+}}, i{{[0-9]+}} [[OMP_PREV_LB_IN:%.+]], i{{[0-9]+}} [[OMP_PREV_UB_IN:%.+]], {{.+}}, {{.+}}, {{.+}}, {{.+}}) +// CHECK: define{{.+}} void [[OMP_PARFOR_OUTLINED_2]]({{.+}}, {{.+}}, i{{[0-9]+}} frozen [[OMP_PREV_LB_IN:%.+]], i{{[0-9]+}} frozen [[OMP_PREV_UB_IN:%.+]], {{.+}}, {{.+}}, {{.+}}, {{.+}}) // CHECK-DAG: [[OMP_PF_LB:%.omp.lb]] = alloca{{.+}}, // CHECK-DAG: [[OMP_PF_UB:%.omp.ub]] = alloca{{.+}}, @@ -2011,7 +2011,7 @@ // CHECK: ret // 'parallel for' implementation is the same as the case without schedule clase (static no chunk is the default) -// CHECK: define{{.+}} void [[OMP_PARFOR_OUTLINED_4]]({{.+}}, {{.+}}, i{{[0-9]+}} [[OMP_PREV_LB_IN:%.+]], i{{[0-9]+}} [[OMP_PREV_UB_IN:%.+]], {{.+}}, {{.+}}, {{.+}}, {{.+}}) +// CHECK: define{{.+}} void [[OMP_PARFOR_OUTLINED_4]]({{.+}}, {{.+}}, i{{[0-9]+}} frozen [[OMP_PREV_LB_IN:%.+]], i{{[0-9]+}} frozen [[OMP_PREV_UB_IN:%.+]], {{.+}}, {{.+}}, {{.+}}, {{.+}}) // CHECK-DAG: [[OMP_PF_LB:%.omp.lb]] = alloca{{.+}}, // CHECK-DAG: [[OMP_PF_UB:%.omp.ub]] = alloca{{.+}}, @@ -2082,7 +2082,7 @@ // CHECK: ret // 'parallel for' implementation using outer and inner loops and PrevEUB -// CHECK: define{{.+}} void [[OMP_PARFOR_OUTLINED_5]]({{.+}}, {{.+}}, i{{[0-9]+}} [[OMP_PREV_LB_IN:%.+]], i{{[0-9]+}} [[OMP_PREV_UB_IN:%.+]], {{.+}}, {{.+}}, {{.+}}, {{.+}}, {{.+}}) +// CHECK: define{{.+}} void [[OMP_PARFOR_OUTLINED_5]]({{.+}}, {{.+}}, i{{[0-9]+}} frozen [[OMP_PREV_LB_IN:%.+]], i{{[0-9]+}} frozen [[OMP_PREV_UB_IN:%.+]], {{.+}}, {{.+}}, {{.+}}, {{.+}}, {{.+}}) // CHECK-DAG: [[OMP_PF_LB:%.omp.lb]] = alloca{{.+}}, // CHECK-DAG: [[OMP_PF_UB:%.omp.ub]] = alloca{{.+}}, // CHECK-DAG: [[OMP_PF_IV:%.omp.iv]] = alloca{{.+}}, @@ -2128,7 +2128,7 @@ // CHECK: [[OMP_PF_LB_VAL_1:%.+]] = load{{.+}}, {{.+}} [[OMP_PF_LB]], // CHECK: store {{.+}} [[OMP_PF_LB_VAL_1]], {{.+}}* [[OMP_PF_IV]], -// outer loop: while (IV < UB) { +// outer loop: while (IV frozen < UB) { // CHECK-DAG: [[OMP_PF_IV_VAL_1:%.+]] = load{{.+}}, {{.+}}* [[OMP_PF_IV]], // CHECK-DAG: [[OMP_PF_UB_VAL_3:%.+]] = load{{.+}}, {{.+}}* [[OMP_PF_UB]], // CHECK: [[PF_CMP_IV_UB_1:%.+]] = icmp{{.+}} [[OMP_PF_IV_VAL_1]], [[OMP_PF_UB_VAL_3]] @@ -2185,7 +2185,7 @@ // CHECK: ret // 'parallel for' implementation using outer and inner loops and PrevEUB -// CHECK: define{{.+}} void [[OMP_PARFOR_OUTLINED_6]]({{.+}}, {{.+}}, i{{[0-9]+}} [[OMP_PREV_LB_IN:%.+]], i{{[0-9]+}} [[OMP_PREV_UB_IN:%.+]], {{.+}}, {{.+}}, {{.+}}, {{.+}}) +// CHECK: define{{.+}} void [[OMP_PARFOR_OUTLINED_6]]({{.+}}, {{.+}}, i{{[0-9]+}} frozen [[OMP_PREV_LB_IN:%.+]], i{{[0-9]+}} frozen [[OMP_PREV_UB_IN:%.+]], {{.+}}, {{.+}}, {{.+}}, {{.+}}) // CHECK-DAG: [[OMP_PF_LB:%.omp.lb]] = alloca{{.+}}, // CHECK-DAG: [[OMP_PF_UB:%.omp.ub]] = alloca{{.+}}, // CHECK-DAG: [[OMP_PF_IV:%.omp.iv]] = alloca{{.+}}, @@ -2257,7 +2257,7 @@ // CHECK: ret // 'parallel for' implementation using outer and inner loops and PrevEUB -// CHECK: define{{.+}} void [[OMP_PARFOR_OUTLINED_7]]({{.+}}, {{.+}}, i{{[0-9]+}} [[OMP_PREV_LB_IN:%.+]], i{{[0-9]+}} [[OMP_PREV_UB_IN:%.+]], {{.+}}, {{.+}}, {{.+}}, {{.+}}, {{.+}}) +// CHECK: define{{.+}} void [[OMP_PARFOR_OUTLINED_7]]({{.+}}, {{.+}}, i{{[0-9]+}} frozen [[OMP_PREV_LB_IN:%.+]], i{{[0-9]+}} frozen [[OMP_PREV_UB_IN:%.+]], {{.+}}, {{.+}}, {{.+}}, {{.+}}, {{.+}}) // CHECK-DAG: [[OMP_PF_LB:%.omp.lb]] = alloca{{.+}}, // CHECK-DAG: [[OMP_PF_UB:%.omp.ub]] = alloca{{.+}}, // CHECK-DAG: [[OMP_PF_IV:%.omp.iv]] = alloca{{.+}}, diff --git a/clang/test/OpenMP/distribute_parallel_for_firstprivate_codegen.cpp b/clang/test/OpenMP/distribute_parallel_for_firstprivate_codegen.cpp --- a/clang/test/OpenMP/distribute_parallel_for_firstprivate_codegen.cpp +++ b/clang/test/OpenMP/distribute_parallel_for_firstprivate_codegen.cpp @@ -78,7 +78,7 @@ #pragma omp teams #pragma omp distribute parallel for firstprivate(g, g1, svar, sfvar) for (int i = 0; i < 2; ++i) { - // LAMBDA: define{{.*}} internal{{.*}} void [[OMP_OUTLINED]](i32* noalias %{{.+}}, i32* noalias %{{.+}}, double* {{.+}} [[G_IN:%.+]], double*{{.+}} [[G1_IN:%.+]], i{{[0-9]+}}*{{.+}} [[SVAR_IN:%.+]], float*{{.+}} [[SFVAR_IN:%.+]]) + // LAMBDA: define{{.*}} internal{{.*}} void [[OMP_OUTLINED]](i32* frozen noalias %{{.+}}, i32* frozen noalias %{{.+}}, double* {{.+}} [[G_IN:%.+]], double*{{.+}} [[G1_IN:%.+]], i{{[0-9]+}}*{{.+}} [[SVAR_IN:%.+]], float*{{.+}} [[SFVAR_IN:%.+]]) // addr alloca's // LAMBDA: [[G_ADDR:%.+]] = alloca double*, @@ -159,8 +159,8 @@ // LAMBDA: ret void - // LAMBDA-64: define{{.+}} void [[OMP_PARFOR_OUTLINED]](i32* noalias %{{.+}}, i32* noalias %{{.+}}, {{.+}}, {{.+}}, i{{[0-9]+}} [[G_IN:%.+]], i{{[0-9]+}} [[G1_IN:%.+]], i{{[0-9]+}} [[SVAR_IN:%.+]], i{{[0-9]+}} [[SFVAR_IN:%.+]]) - // LAMBDA-32: define{{.+}} void [[OMP_PARFOR_OUTLINED]](i32* noalias %{{.+}}, i32* noalias %{{.+}}, {{.+}}, {{.+}}, double* {{.+}} [[G_IN:%.+]], i{{[0-9]+}} [[G1_IN:%.+]], i{{[0-9]+}} [[SVAR_IN:%.+]], i{{[0-9]+}} [[SFVAR_IN:%.+]]) + // LAMBDA-64: define{{.+}} void [[OMP_PARFOR_OUTLINED]](i32* frozen noalias %{{.+}}, i32* frozen noalias %{{.+}}, {{.+}}, {{.+}}, i{{[0-9]+}} frozen [[G_IN:%.+]], i{{[0-9]+}} frozen [[G1_IN:%.+]], i{{[0-9]+}} frozen [[SVAR_IN:%.+]], i{{[0-9]+}} frozen [[SFVAR_IN:%.+]]) + // LAMBDA-32: define{{.+}} void [[OMP_PARFOR_OUTLINED]](i32* frozen noalias %{{.+}}, i32* frozen noalias %{{.+}}, {{.+}}, {{.+}}, double* {{.+}} [[G_IN:%.+]], i{{[0-9]+}} frozen [[G1_IN:%.+]], i{{[0-9]+}} frozen [[SVAR_IN:%.+]], i{{[0-9]+}} frozen [[SFVAR_IN:%.+]]) // skip initial params // LAMBDA: {{.+}} = alloca{{.+}}, // LAMBDA: {{.+}} = alloca{{.+}}, @@ -226,11 +226,11 @@ // LAMBDA-32: store i{{[0-9]+}}* [[SVAR_ADDR]], i{{[0-9]+}}** [[SVAR_PRIVATE_ADDR_REF]] // LAMBDA: [[SFVAR_PRIVATE_ADDR_REF:%.+]] = getelementptr inbounds %{{.+}}, %{{.+}}* [[ARG:%.+]], i{{[0-9]+}} 0, i{{[0-9]+}} 3 // LAMBDA: store float* [[SFVAR_CONV]], float** [[SFVAR_PRIVATE_ADDR_REF]] - // LAMBDA: call{{.*}} void [[INNER_LAMBDA:@.+]](%{{.+}}* [[ARG]]) + // LAMBDA: call{{.*}} void [[INNER_LAMBDA:@.+]](%{{.+}}* frozen [[ARG]]) // LAMBDA: call {{.*}}void @__kmpc_for_static_fini( // LAMBDA: ret void [&]() { - // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* [[ARG_PTR:%.+]]) + // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* frozen [[ARG_PTR:%.+]]) // LAMBDA: store %{{.+}}* [[ARG_PTR]], %{{.+}}** [[ARG_PTR_REF:%.+]], g = 2; g1 = 2; @@ -274,16 +274,16 @@ // CHECK-LABEL: define{{.*}} i{{[0-9]+}} @main() // CHECK: [[TEST:%.+]] = alloca [[S_FLOAT_TY]], -// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR:@.+]]([[S_FLOAT_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR:@.+]]([[S_FLOAT_TY]]* frozen [[TEST]]) // CHECK: call i{{[0-9]+}} @__tgt_target_teams( // CHECK: call void [[OFFLOAD_FUN_0:@.+]]( -// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_DESTR:@.+]]([[S_FLOAT_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_DESTR:@.+]]([[S_FLOAT_TY]]* frozen [[TEST]]) -// CHECK: define{{.+}} [[OFFLOAD_FUN_0]](i{{[0-9]+}} [[T_VAR_IN:%.+]], [2 x i{{[0-9]+}}]* {{.+}} [[VEC_IN:%.+]], [2 x [[S_FLOAT_TY]]]* {{.+}} [[S_ARR_IN:%.+]], [[S_FLOAT_TY]]* {{.+}} [[VAR_IN:%.+]], i{{[0-9]+}} [[SVAR_IN:%.+]]) +// CHECK: define{{.+}} [[OFFLOAD_FUN_0]](i{{[0-9]+}} frozen [[T_VAR_IN:%.+]], [2 x i{{[0-9]+}}]* {{.+}} [[VEC_IN:%.+]], [2 x [[S_FLOAT_TY]]]* {{.+}} [[S_ARR_IN:%.+]], [[S_FLOAT_TY]]* {{.+}} [[VAR_IN:%.+]], i{{[0-9]+}} frozen [[SVAR_IN:%.+]]) // CHECK: call void (%{{.+}}*, i{{[0-9]+}}, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)*, ...) @__kmpc_fork_teams(%{{.+}}* @{{.+}}, i{{[0-9]+}} 5, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)* bitcast (void (i{{[0-9]+}}*, i{{[0-9]+}}*, i{{[0-9]+}}*, [2 x i{{[0-9]+}}]*, [2 x [[S_FLOAT_TY]]]*, [[S_FLOAT_TY]]*, i{{[0-9]+}}*)* [[OMP_OUTLINED_0:@.+]] to void // CHECK: ret -// CHECK: define internal void [[OMP_OUTLINED_0]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}, i{{[0-9]+}}*{{.+}} [[T_VAR_IN:%.+]], [2 x i{{[0-9]+}}]* {{.+}} [[VEC_IN:%.+]], [2 x [[S_FLOAT_TY]]]* {{.+}} [[S_ARR_IN:%.+]], [[S_FLOAT_TY]]* {{.+}} [[VAR_IN:%.+]], i{{[0-9]+}}*{{.+}} [[SVAR_IN:%.+]]) +// CHECK: define internal void [[OMP_OUTLINED_0]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}, i{{[0-9]+}}*{{.+}} [[T_VAR_IN:%.+]], [2 x i{{[0-9]+}}]* {{.+}} [[VEC_IN:%.+]], [2 x [[S_FLOAT_TY]]]* {{.+}} [[S_ARR_IN:%.+]], [[S_FLOAT_TY]]* {{.+}} [[VAR_IN:%.+]], i{{[0-9]+}}*{{.+}} [[SVAR_IN:%.+]]) // CHECK: alloca i{{[0-9]+}}*, // CHECK: alloca i{{[0-9]+}}*, @@ -373,13 +373,13 @@ // CHECK: call void @__kmpc_for_static_fini( // call destructors: var.. -// CHECK-DAG: call {{.+}} [[S_FLOAT_TY_DEF_DESTR]]([[S_FLOAT_TY]]* [[VAR_PRIV]]) +// CHECK-DAG: call {{.+}} [[S_FLOAT_TY_DEF_DESTR]]([[S_FLOAT_TY]]* frozen [[VAR_PRIV]]) // ..and s_arr // CHECK: {{.+}}: // CHECK: [[S_ARR_EL_PAST:%.+]] = phi [[S_FLOAT_TY]]* // CHECK: [[S_ARR_PRIV_ITEM:%.+]] = getelementptr {{.+}}, {{.+}} [[S_ARR_EL_PAST]], -// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_DESTR]]([[S_FLOAT_TY]]* [[S_ARR_PRIV_ITEM]]) +// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_DESTR]]([[S_FLOAT_TY]]* frozen [[S_ARR_PRIV_ITEM]]) // CHECK: ret void @@ -387,7 +387,7 @@ // However, the support for 'firstprivate' of 'parallel' is only used when 'parallel' // is found alone. Therefore we only have one 'firstprivate' support for 'parallel for' // in combination -// CHECK: define internal void [[OMP_PARFOR_OUTLINED_0]]({{.+}}, {{.+}}, {{.+}}, {{.+}}, [2 x i{{[0-9]+}}]* {{.+}} [[VEC_IN:%.+]], i{{[0-9]+}} [[T_VAR_IN:%.+]], [2 x [[S_FLOAT_TY]]]* {{.+}} [[S_ARR_IN:%.+]], [[S_FLOAT_TY]]* {{.+}} [[VAR_IN:%.+]], i{{[0-9]+}} [[SVAR_IN:%.+]]) +// CHECK: define internal void [[OMP_PARFOR_OUTLINED_0]]({{.+}}, {{.+}}, {{.+}}, {{.+}}, [2 x i{{[0-9]+}}]* {{.+}} [[VEC_IN:%.+]], i{{[0-9]+}} frozen [[T_VAR_IN:%.+]], [2 x [[S_FLOAT_TY]]]* {{.+}} [[S_ARR_IN:%.+]], [[S_FLOAT_TY]]* {{.+}} [[VAR_IN:%.+]], i{{[0-9]+}} frozen [[SVAR_IN:%.+]]) // addr alloca's // CHECK: [[VEC_ADDR:%.+]] = alloca [2 x i{{[0-9]+}}]*, @@ -448,29 +448,29 @@ // CHECK: call void @__kmpc_for_static_fini( // call destructors: var.. -// CHECK-DAG: call {{.+}} [[S_FLOAT_TY_DEF_DESTR]]([[S_FLOAT_TY]]* [[VAR_PRIV]]) +// CHECK-DAG: call {{.+}} [[S_FLOAT_TY_DEF_DESTR]]([[S_FLOAT_TY]]* frozen [[VAR_PRIV]]) // ..and s_arr // CHECK: {{.+}}: // CHECK: [[S_ARR_EL_PAST:%.+]] = phi [[S_FLOAT_TY]]* // CHECK: [[S_ARR_PRIV_ITEM:%.+]] = getelementptr {{.+}}, {{.+}} [[S_ARR_EL_PAST]], -// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_DESTR]]([[S_FLOAT_TY]]* [[S_ARR_PRIV_ITEM]]) +// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_DESTR]]([[S_FLOAT_TY]]* frozen [[S_ARR_PRIV_ITEM]]) // CHECK: ret void // template tmain with S_INT_TY // CHECK-LABEL: define{{.*}} i{{[0-9]+}} @{{.+}}tmain{{.+}}() // CHECK: [[TEST:%.+]] = alloca [[S_INT_TY]], -// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR:@.+]]([[S_INT_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR:@.+]]([[S_INT_TY]]* frozen [[TEST]]) // CHECK: call i{{[0-9]+}} @__tgt_target_teams( // CHECK: call void [[OFFLOAD_FUN_0:@.+]]( -// CHECK: call {{.*}} [[S_INT_TY_DEF_DESTR:@.+]]([[S_INT_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_INT_TY_DEF_DESTR:@.+]]([[S_INT_TY]]* frozen [[TEST]]) -// CHECK: define{{.+}} [[OFFLOAD_FUN_0]](i{{[0-9]+}} [[T_VAR_IN:%.+]], [2 x i{{[0-9]+}}]* {{.+}} [[VEC_IN:%.+]], [2 x [[S_INT_TY]]]* {{.+}} [[S_ARR_IN:%.+]], [[S_INT_TY]]* {{.+}} [[VAR_IN:%.+]]) +// CHECK: define{{.+}} [[OFFLOAD_FUN_0]](i{{[0-9]+}} frozen [[T_VAR_IN:%.+]], [2 x i{{[0-9]+}}]* {{.+}} [[VEC_IN:%.+]], [2 x [[S_INT_TY]]]* {{.+}} [[S_ARR_IN:%.+]], [[S_INT_TY]]* {{.+}} [[VAR_IN:%.+]]) // CHECK: call void (%{{.+}}*, i{{[0-9]+}}, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)*, ...) @__kmpc_fork_teams(%{{.+}}* @{{.+}}, i{{[0-9]+}} 4, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)* bitcast (void (i{{[0-9]+}}*, i{{[0-9]+}}*, i{{[0-9]+}}*, [2 x i{{[0-9]+}}]*, [2 x [[S_INT_TY]]]*, [[S_INT_TY]]*)* [[OMP_OUTLINED_0:@.+]] to void // CHECK: ret -// CHECK: define internal void [[OMP_OUTLINED_0]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}, i{{[0-9]+}}*{{.+}} [[T_VAR_IN:%.+]], [2 x i{{[0-9]+}}]* {{.+}} [[VEC_IN:%.+]], [2 x [[S_INT_TY]]]* {{.+}} [[S_ARR_IN:%.+]], [[S_INT_TY]]* {{.+}} [[VAR_IN:%.+]]) +// CHECK: define internal void [[OMP_OUTLINED_0]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}, i{{[0-9]+}}*{{.+}} [[T_VAR_IN:%.+]], [2 x i{{[0-9]+}}]* {{.+}} [[VEC_IN:%.+]], [2 x [[S_INT_TY]]]* {{.+}} [[S_ARR_IN:%.+]], [[S_INT_TY]]* {{.+}} [[VAR_IN:%.+]]) // addr alloca's // CHECK: alloca i{{[0-9]+}}*, @@ -547,13 +547,13 @@ // CHECK: call void @__kmpc_for_static_fini( // call destructors: var.. -// CHECK-DAG: call {{.+}} [[S_INT_TY_DEF_DESTR]]([[S_INT_TY]]* [[VAR_PRIV]]) +// CHECK-DAG: call {{.+}} [[S_INT_TY_DEF_DESTR]]([[S_INT_TY]]* frozen [[VAR_PRIV]]) // ..and s_arr // CHECK: {{.+}}: // CHECK: [[S_ARR_EL_PAST:%.+]] = phi [[S_INT_TY]]* // CHECK: [[S_ARR_PRIV_ITEM:%.+]] = getelementptr {{.+}}, {{.+}} [[S_ARR_EL_PAST]], -// CHECK: call {{.*}} [[S_INT_TY_DEF_DESTR]]([[S_INT_TY]]* [[S_ARR_PRIV_ITEM]]) +// CHECK: call {{.*}} [[S_INT_TY_DEF_DESTR]]([[S_INT_TY]]* frozen [[S_ARR_PRIV_ITEM]]) // CHECK: ret void @@ -561,7 +561,7 @@ // However, the support for 'firstprivate' of 'parallel' is only used when 'parallel' // is found alone. Therefore we only have one 'firstprivate' support for 'parallel for' // in combination -// CHECK: define internal void [[OMP_PARFOR_OUTLINED_0]]({{.+}}, {{.+}}, {{.+}}, {{.+}}, [2 x i{{[0-9]+}}]* {{.+}} [[VEC_IN:%.+]], i{{[0-9]+}} [[T_VAR_IN:%.+]], [2 x [[S_INT_TY]]]* {{.+}} [[S_ARR_IN:%.+]], [[S_INT_TY]]* {{.+}} [[VAR_IN:%.+]]) +// CHECK: define internal void [[OMP_PARFOR_OUTLINED_0]]({{.+}}, {{.+}}, {{.+}}, {{.+}}, [2 x i{{[0-9]+}}]* {{.+}} [[VEC_IN:%.+]], i{{[0-9]+}} frozen [[T_VAR_IN:%.+]], [2 x [[S_INT_TY]]]* {{.+}} [[S_ARR_IN:%.+]], [[S_INT_TY]]* {{.+}} [[VAR_IN:%.+]]) // addr alloca's // CHECK: [[VEC_ADDR:%.+]] = alloca [2 x i{{[0-9]+}}]*, @@ -620,13 +620,13 @@ // CHECK: call void @__kmpc_for_static_fini( // call destructors: var.. -// CHECK-DAG: call {{.+}} [[S_INT_TY_DEF_DESTR]]([[S_INT_TY]]* [[VAR_PRIV]]) +// CHECK-DAG: call {{.+}} [[S_INT_TY_DEF_DESTR]]([[S_INT_TY]]* frozen [[VAR_PRIV]]) // ..and s_arr // CHECK: {{.+}}: // CHECK: [[S_ARR_EL_PAST:%.+]] = phi [[S_INT_TY]]* // CHECK: [[S_ARR_PRIV_ITEM:%.+]] = getelementptr {{.+}}, {{.+}} [[S_ARR_EL_PAST]], -// CHECK: call {{.*}} [[S_INT_TY_DEF_DESTR]]([[S_INT_TY]]* [[S_ARR_PRIV_ITEM]]) +// CHECK: call {{.*}} [[S_INT_TY_DEF_DESTR]]([[S_INT_TY]]* frozen [[S_ARR_PRIV_ITEM]]) // CHECK: ret void diff --git a/clang/test/OpenMP/distribute_parallel_for_lastprivate_codegen.cpp b/clang/test/OpenMP/distribute_parallel_for_lastprivate_codegen.cpp --- a/clang/test/OpenMP/distribute_parallel_for_lastprivate_codegen.cpp +++ b/clang/test/OpenMP/distribute_parallel_for_lastprivate_codegen.cpp @@ -1,31 +1,31 @@ -// RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix LAMBDA --check-prefix LAMBDA-64 -// RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s -// RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix LAMBDA --check-prefix LAMBDA-64 -// RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix LAMBDA --check-prefix LAMBDA-32 -// RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s -// RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix LAMBDA --check-prefix LAMBDA-32 - -// RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck --check-prefix SIMD-ONLY0 %s -// RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s -// RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck --check-prefix SIMD-ONLY0 %s -// RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck --check-prefix SIMD-ONLY0 %s -// RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s -// RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck --check-prefix SIMD-ONLY0 %s +// RUN: %clang_cc1 -disable-frozen-args -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix LAMBDA --check-prefix LAMBDA-64 +// RUN: %clang_cc1 -disable-frozen-args -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -DLAMBDA -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix LAMBDA --check-prefix LAMBDA-64 +// RUN: %clang_cc1 -disable-frozen-args -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix LAMBDA --check-prefix LAMBDA-32 +// RUN: %clang_cc1 -disable-frozen-args -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix LAMBDA --check-prefix LAMBDA-32 + +// RUN: %clang_cc1 -disable-frozen-args -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck --check-prefix SIMD-ONLY0 %s +// RUN: %clang_cc1 -disable-frozen-args -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -DLAMBDA -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck --check-prefix SIMD-ONLY0 %s +// RUN: %clang_cc1 -disable-frozen-args -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck --check-prefix SIMD-ONLY0 %s +// RUN: %clang_cc1 -disable-frozen-args -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck --check-prefix SIMD-ONLY0 %s // SIMD-ONLY0-NOT: {{__kmpc|__tgt}} -// RUN: %clang_cc1 -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix CHECK --check-prefix CHECK-64 -// RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix CHECK --check-prefix CHECK-64 -// RUN: %clang_cc1 -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix CHECK --check-prefix CHECK-32 -// RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix CHECK --check-prefix CHECK-32 - -// RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck --check-prefix SIMD-ONLY1 %s -// RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck --check-prefix SIMD-ONLY1 %s -// RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck --check-prefix SIMD-ONLY1 %s -// RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck --check-prefix SIMD-ONLY1 %s +// RUN: %clang_cc1 -disable-frozen-args -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix CHECK --check-prefix CHECK-64 +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix CHECK --check-prefix CHECK-64 +// RUN: %clang_cc1 -disable-frozen-args -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix CHECK --check-prefix CHECK-32 +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix CHECK --check-prefix CHECK-32 + +// RUN: %clang_cc1 -disable-frozen-args -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck --check-prefix SIMD-ONLY1 %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck --check-prefix SIMD-ONLY1 %s +// RUN: %clang_cc1 -disable-frozen-args -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck --check-prefix SIMD-ONLY1 %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck --check-prefix SIMD-ONLY1 %s // SIMD-ONLY1-NOT: {{__kmpc|__tgt}} // expected-no-diagnostics #ifndef HEADER diff --git a/clang/test/OpenMP/distribute_parallel_for_private_codegen.cpp b/clang/test/OpenMP/distribute_parallel_for_private_codegen.cpp --- a/clang/test/OpenMP/distribute_parallel_for_private_codegen.cpp +++ b/clang/test/OpenMP/distribute_parallel_for_private_codegen.cpp @@ -79,7 +79,7 @@ #pragma omp teams #pragma omp distribute parallel for private(g, g1, svar, sfvar) for (int i = 0; i < 2; ++i) { - // LAMBDA: define{{.*}} internal{{.*}} void [[OMP_OUTLINED]](i32* noalias %{{.+}}, i32* noalias %{{.+}}) + // LAMBDA: define{{.*}} internal{{.*}} void [[OMP_OUTLINED]](i32* frozen noalias %{{.+}}, i32* frozen noalias %{{.+}}) // LAMBDA: [[G_PRIVATE_ADDR:%.+]] = alloca double, // LAMBDA: [[G1_PRIVATE_ADDR:%.+]] = alloca double, // LAMBDA: [[TMP_PRIVATE_ADDR:%.+]] = alloca double*, @@ -115,11 +115,11 @@ // LAMBDA: store i{{[0-9]+}}* [[SVAR_PRIVATE_ADDR]], i{{[0-9]+}}** [[SVAR_PRIVATE_ADDR_REF]] // LAMBDA: [[SFVAR_PRIVATE_ADDR_REF:%.+]] = getelementptr inbounds %{{.+}}, %{{.+}}* [[ARG:%.+]], i{{[0-9]+}} 0, i{{[0-9]+}} 3 // LAMBDA: store float* [[SFVAR_PRIVATE_ADDR]], float** [[SFVAR_PRIVATE_ADDR_REF]] - // LAMBDA: call{{.*}} void [[INNER_LAMBDA:@.+]](%{{.+}}* [[ARG]]) + // LAMBDA: call{{.*}} void [[INNER_LAMBDA:@.+]](%{{.+}}* frozen [[ARG]]) // LAMBDA: call {{.*}}void @__kmpc_for_static_fini( // LAMBDA: ret void [&]() { - // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* [[ARG_PTR:%.+]]) + // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* frozen [[ARG_PTR:%.+]]) // LAMBDA: store %{{.+}}* [[ARG_PTR]], %{{.+}}** [[ARG_PTR_REF:%.+]], g = 2; g1 = 2; @@ -163,18 +163,18 @@ // CHECK: define{{.*}} i{{[0-9]+}} @main() // CHECK: [[TEST:%.+]] = alloca [[S_FLOAT_TY]], -// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR:@.+]]([[S_FLOAT_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR:@.+]]([[S_FLOAT_TY]]* frozen [[TEST]]) // CHECK: call i{{[0-9]+}} @__tgt_target_teams( // CHECK: call void [[OFFLOAD_FUN_0:@.+]]( -// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_DESTR:@.+]]([[S_FLOAT_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_DESTR:@.+]]([[S_FLOAT_TY]]* frozen [[TEST]]) // CHECK: ret // CHECK: define{{.+}} [[OFFLOAD_FUN_0]]() // CHECK: call void (%{{.+}}*, i{{[0-9]+}}, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)*, ...) @__kmpc_fork_teams(%{{.+}}* @{{.+}}, i{{[0-9]+}} 0, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)* bitcast (void (i{{[0-9]+}}*, i{{[0-9]+}}*)* [[OMP_OUTLINED_0:@.+]] to void // CHECK: ret // -// CHECK: define internal void [[OMP_OUTLINED_0]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}) +// CHECK: define internal void [[OMP_OUTLINED_0]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}) // CHECK: [[T_VAR_PRIV:%.+]] = alloca i{{[0-9]+}}, // CHECK: [[VEC_PRIV:%.+]] = alloca [2 x i{{[0-9]+}}], // CHECK: [[S_ARR_PRIV:%.+]] = alloca [2 x [[S_FLOAT_TY]]], @@ -188,22 +188,22 @@ // this is the ctor loop // CHECK: {{.+}}: // CHECK: [[S_ARR_PRIV_ITEM:%.+]] = phi [[S_FLOAT_TY]]* -// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR]]([[S_FLOAT_TY]]* [[S_ARR_PRIV_ITEM]]) +// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR]]([[S_FLOAT_TY]]* frozen [[S_ARR_PRIV_ITEM]]) // CHECK-NOT: [[T_VAR_PRIV]] // CHECK-NOT: [[VEC_PRIV]] -// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR]]([[S_FLOAT_TY]]* [[VAR_PRIV]]) +// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR]]([[S_FLOAT_TY]]* frozen [[VAR_PRIV]]) // CHECK: call void @__kmpc_for_static_init_4( // CHECK: call{{.+}} @__kmpc_fork_call({{.+}}, {{.+}}, {{.+}}[[OMP_PARFOR_OUTLINED_0:@.+]] to {{.+}}, // CHECK: call void @__kmpc_for_static_fini( // call destructors: var.. -// CHECK-DAG: call {{.+}} [[S_FLOAT_TY_DEF_DESTR]]([[S_FLOAT_TY]]* [[VAR_PRIV]]) +// CHECK-DAG: call {{.+}} [[S_FLOAT_TY_DEF_DESTR]]([[S_FLOAT_TY]]* frozen [[VAR_PRIV]]) // ..and s_arr // CHECK: {{.+}}: // CHECK: [[S_ARR_EL_PAST:%.+]] = phi [[S_FLOAT_TY]]* // CHECK: [[S_ARR_PRIV_ITEM:%.+]] = getelementptr {{.+}}, {{.+}} [[S_ARR_EL_PAST]], -// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_DESTR]]([[S_FLOAT_TY]]* [[S_ARR_PRIV_ITEM]]) +// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_DESTR]]([[S_FLOAT_TY]]* frozen [[S_ARR_PRIV_ITEM]]) // CHECK: ret void @@ -225,31 +225,31 @@ // this is the ctor loop // CHECK: {{.+}}: // CHECK: [[S_ARR_PRIV_ITEM:%.+]] = phi [[S_FLOAT_TY]]* -// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR]]([[S_FLOAT_TY]]* [[S_ARR_PRIV_ITEM]]) +// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR]]([[S_FLOAT_TY]]* frozen [[S_ARR_PRIV_ITEM]]) // CHECK-NOT: [[T_VAR_PRIV]] // CHECK-NOT: [[VEC_PRIV]] -// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR]]([[S_FLOAT_TY]]* [[VAR_PRIV]]) +// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR]]([[S_FLOAT_TY]]* frozen [[VAR_PRIV]]) // CHECK: call void @__kmpc_for_static_init_4( // CHECK: call void @__kmpc_for_static_fini( // call destructors: var.. -// CHECK-DAG: call {{.+}} [[S_FLOAT_TY_DEF_DESTR]]([[S_FLOAT_TY]]* [[VAR_PRIV]]) +// CHECK-DAG: call {{.+}} [[S_FLOAT_TY_DEF_DESTR]]([[S_FLOAT_TY]]* frozen [[VAR_PRIV]]) // ..and s_arr // CHECK: {{.+}}: // CHECK: [[S_ARR_EL_PAST:%.+]] = phi [[S_FLOAT_TY]]* // CHECK: [[S_ARR_PRIV_ITEM:%.+]] = getelementptr {{.+}}, {{.+}} [[S_ARR_EL_PAST]], -// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_DESTR]]([[S_FLOAT_TY]]* [[S_ARR_PRIV_ITEM]]) +// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_DESTR]]([[S_FLOAT_TY]]* frozen [[S_ARR_PRIV_ITEM]]) // CHECK: ret void // template tmain with S_INT_TY // CHECK: define{{.*}} i{{[0-9]+}} [[TMAIN_INT:@.+]]() // CHECK: [[TEST:%.+]] = alloca [[S_INT_TY]], -// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR:@.+]]([[S_INT_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR:@.+]]([[S_INT_TY]]* frozen [[TEST]]) // CHECK: call i{{[0-9]+}} @__tgt_target_teams( // CHECK: call void [[OFFLOAD_FUN_1:@.+]]( -// CHECK: call {{.*}} [[S_INT_TY_DEF_DESTR:@.+]]([[S_INT_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_INT_TY_DEF_DESTR:@.+]]([[S_INT_TY]]* frozen [[TEST]]) // CHECK: ret // CHECK: ret @@ -258,7 +258,7 @@ // CHECK: call void (%{{.+}}*, i{{[0-9]+}}, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)*, ...) @__kmpc_fork_teams(%{{.+}}* @{{.+}}, i{{[0-9]+}} 0, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)* bitcast (void (i{{[0-9]+}}*, i{{[0-9]+}}*)* [[OMP_OUTLINED_1:@.+]] to void // CHECK: ret // -// CHECK: define internal void [[OMP_OUTLINED_1]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}) +// CHECK: define internal void [[OMP_OUTLINED_1]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}) // CHECK: [[T_VAR_PRIV:%.+]] = alloca i{{[0-9]+}}, // CHECK: [[VEC_PRIV:%.+]] = alloca [2 x i{{[0-9]+}}], // CHECK: [[S_ARR_PRIV:%.+]] = alloca [2 x [[S_INT_TY]]], @@ -270,10 +270,10 @@ // CHECK-NOT: [[VEC_PRIV]] // CHECK: {{.+}}: // CHECK: [[S_ARR_PRIV_ITEM:%.+]] = phi [[S_INT_TY]]* -// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR]]([[S_INT_TY]]* [[S_ARR_PRIV_ITEM]]) +// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR]]([[S_INT_TY]]* frozen [[S_ARR_PRIV_ITEM]]) // CHECK-NOT: [[T_VAR_PRIV]] // CHECK-NOT: [[VEC_PRIV]] -// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR]]([[S_INT_TY]]* [[VAR_PRIV]]) +// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR]]([[S_INT_TY]]* frozen [[VAR_PRIV]]) // CHECK: call void @__kmpc_for_static_init_4( // CHECK: call{{.+}} @__kmpc_fork_call({{.+}}, {{.+}}, {{.+}}[[OMP_PARFOR_OUTLINED_1:@.+]] to {{.+}}, // CHECK: call void @__kmpc_for_static_fini( @@ -292,21 +292,21 @@ // this is the ctor loop // CHECK: {{.+}}: // CHECK: [[S_ARR_PRIV_ITEM:%.+]] = phi [[S_INT_TY]]* -// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR]]([[S_INT_TY]]* [[S_ARR_PRIV_ITEM]]) +// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR]]([[S_INT_TY]]* frozen [[S_ARR_PRIV_ITEM]]) // CHECK-NOT: [[T_VAR_PRIV]] // CHECK-NOT: [[VEC_PRIV]] -// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR]]([[S_INT_TY]]* [[VAR_PRIV]]) +// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR]]([[S_INT_TY]]* frozen [[VAR_PRIV]]) // CHECK: call void @__kmpc_for_static_init_4( // CHECK: call void @__kmpc_for_static_fini( // call destructors: var.. -// CHECK-DAG: call {{.+}} [[S_INT_TY_DEF_DESTR]]([[S_INT_TY]]* [[VAR_PRIV]]) +// CHECK-DAG: call {{.+}} [[S_INT_TY_DEF_DESTR]]([[S_INT_TY]]* frozen [[VAR_PRIV]]) // ..and s_arr // CHECK: {{.+}}: // CHECK: [[S_ARR_EL_PAST:%.+]] = phi [[S_INT_TY]]* // CHECK: [[S_ARR_PRIV_ITEM:%.+]] = getelementptr {{.+}}, {{.+}} [[S_ARR_EL_PAST]], -// CHECK: call {{.*}} [[S_INT_TY_DEF_DESTR]]([[S_INT_TY]]* [[S_ARR_PRIV_ITEM]]) +// CHECK: call {{.*}} [[S_INT_TY_DEF_DESTR]]([[S_INT_TY]]* frozen [[S_ARR_PRIV_ITEM]]) // CHECK: ret void diff --git a/clang/test/OpenMP/distribute_parallel_for_reduction_task_codegen.cpp b/clang/test/OpenMP/distribute_parallel_for_reduction_task_codegen.cpp --- a/clang/test/OpenMP/distribute_parallel_for_reduction_task_codegen.cpp +++ b/clang/test/OpenMP/distribute_parallel_for_reduction_task_codegen.cpp @@ -22,7 +22,7 @@ // CHECK: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @{{.+}}, i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i8***)* [[OUTLINED:@.+]] to void (i32*, i32*, ...)*), i64 %{{.+}}, i64 %{{.+}}, i32* %{{.+}}, i8*** %{{.+}}) -// CHECK: define internal void [[OUTLINED]](i32* noalias %{{.+}}, i32* noalias %{{.+}}, i64 %{{.+}}, i64 %{{.+}}, i32* {{.+}}, i8*** {{.+}}) +// CHECK: define internal void [[OUTLINED]](i32* frozen noalias %{{.+}}, i32* frozen noalias %{{.+}}, i64 frozen %{{.+}}, i64 frozen %{{.+}}, i32* {{.+}}, i8*** {{.+}}) // CHECK: alloca i32, // CHECK: [[ARGC_FP_ADDR:%.+]] = alloca i32, // CHECK: [[TR:%.+]] = alloca [2 x %struct.kmp_taskred_input_t], @@ -95,26 +95,26 @@ // CHECK: call void @__kmpc_task_reduction_modifier_fini(%struct.ident_t* @{{.+}}, i32 %{{.+}}, i32 1) // CHECK: call i32 @__kmpc_reduce_nowait( -// CHECK: define internal void [[ARGC_INIT]](i8* noalias %{{.+}}, i8* noalias %{{.+}}) +// CHECK: define internal void [[ARGC_INIT]](i8* frozen noalias %{{.+}}, i8* frozen noalias %{{.+}}) // CHECK: store i32 0, i32* %{{.+}}, -// CHECK: define internal void [[ARGC_COMB]](i8* %{{.+}}, i8* %{{.+}}) +// CHECK: define internal void [[ARGC_COMB]](i8* frozen %{{.+}}, i8* frozen %{{.+}}) // CHECK: [[ADD:%.+]] = add nsw i32 %{{.+}}, %{{.+}} // CHECK: store i32 [[ADD]], i32* %{{.+}}, -// CHECK: define internal void [[ARGV_INIT]](i8* noalias %{{.+}}, i8* noalias %{{.+}}) +// CHECK: define internal void [[ARGV_INIT]](i8* frozen noalias %{{.+}}, i8* frozen noalias %{{.+}}) // CHECK: phi i8* // CHECK: store i8 0, i8* [[EL:%.+]], // CHECK: getelementptr i8, i8* [[EL]], i32 1 -// CHECK: define internal void [[ARGV_COMB]](i8* %{{.+}}, i8* %{{.+}}) +// CHECK: define internal void [[ARGV_COMB]](i8* frozen %{{.+}}, i8* frozen %{{.+}}) // CHECK: phi i8* // CHECK: [[ADD:%.+]] = add nsw i32 %{{.+}}, %{{.+}} // CHECK: [[CONV:%.+]] = trunc i32 [[ADD]] to i8 // CHECK: store i8 [[CONV]], i8* [[EL:%.+]], // CHECK: getelementptr i8, i8* [[EL]], i32 1 -// CHECK: define internal {{.*}}i32 [[TASK]](i32 {{.+}}, [[TASK_TY]]* {{.+}}) +// CHECK: define internal {{.*}}frozen i32 [[TASK]](i32 {{.+}}, [[TASK_TY]]* {{.+}}) // CHECK-DAG: call i8* @__kmpc_task_reduction_get_th_data(i32 %{{.+}}, i8* [[TG:%.+]], i8* [[ARGC_REF:%.+]]) // CHECK_DAG: [[TG]] = load i8*, i8** [[TG_ADDR:%.+]], // CHECK-DAG: [[ARGC_REF]] = bitcast i32* [[ARGC_ADDR:%.+]] to i8* diff --git a/clang/test/OpenMP/distribute_parallel_for_simd_codegen.cpp b/clang/test/OpenMP/distribute_parallel_for_simd_codegen.cpp --- a/clang/test/OpenMP/distribute_parallel_for_simd_codegen.cpp +++ b/clang/test/OpenMP/distribute_parallel_for_simd_codegen.cpp @@ -197,7 +197,7 @@ // LAMBDA: ret // implementation of 'parallel for' - // LAMBDA: define{{.+}} void [[OMP_PARFOR_OUTLINED_1]]({{.+}}, {{.+}}, i{{[0-9]+}} [[OMP_PREV_LB_IN:%.+]], i{{[0-9]+}} [[OMP_PREV_UB_IN:%.+]], {{.+}}, {{.+}}, {{.+}}, {{.+}}) + // LAMBDA: define{{.+}} void [[OMP_PARFOR_OUTLINED_1]]({{.+}}, {{.+}}, i{{[0-9]+}} frozen [[OMP_PREV_LB_IN:%.+]], i{{[0-9]+}} frozen [[OMP_PREV_UB_IN:%.+]], {{.+}}, {{.+}}, {{.+}}, {{.+}}) // LAMBDA-DAG: [[OMP_PF_LB:%.omp.lb]] = alloca{{.+}}, // LAMBDA-DAG: [[OMP_PF_UB:%.omp.ub]] = alloca{{.+}}, @@ -263,7 +263,7 @@ }(); } - // dist_schedule: static no chunk (same sa default - no dist_schedule) + // dist_schedule: static no chunk (same - default dist_schedule frozen no sa) #pragma omp target #pragma omp teams // LAMBDA: define{{.+}} void [[OFFLOADING_FUN_2]]( @@ -330,7 +330,7 @@ // LAMBDA: ret // implementation of 'parallel for' - // LAMBDA: define{{.+}} void [[OMP_PARFOR_OUTLINED_2]]({{.+}}, {{.+}}, i{{[0-9]+}} [[OMP_PREV_LB_IN:%.+]], i{{[0-9]+}} [[OMP_PREV_UB_IN:%.+]], {{.+}}, {{.+}}, {{.+}}, {{.+}}) + // LAMBDA: define{{.+}} void [[OMP_PARFOR_OUTLINED_2]]({{.+}}, {{.+}}, i{{[0-9]+}} frozen [[OMP_PREV_LB_IN:%.+]], i{{[0-9]+}} frozen [[OMP_PREV_UB_IN:%.+]], {{.+}}, {{.+}}, {{.+}}, {{.+}}) // LAMBDA-DAG: [[OMP_PF_LB:%.omp.lb]] = alloca{{.+}}, // LAMBDA-DAG: [[OMP_PF_UB:%.omp.ub]] = alloca{{.+}}, @@ -529,7 +529,7 @@ // LAMBDA: ret // 'parallel for' implementation is the same as the case without schedule clase (static no chunk is the default) - // LAMBDA: define{{.+}} void [[OMP_PARFOR_OUTLINED_4]]({{.+}}, {{.+}}, i{{[0-9]+}} [[OMP_PREV_LB_IN:%.+]], i{{[0-9]+}} [[OMP_PREV_UB_IN:%.+]], {{.+}}, {{.+}}, {{.+}}, {{.+}}) + // LAMBDA: define{{.+}} void [[OMP_PARFOR_OUTLINED_4]]({{.+}}, {{.+}}, i{{[0-9]+}} frozen [[OMP_PREV_LB_IN:%.+]], i{{[0-9]+}} frozen [[OMP_PREV_UB_IN:%.+]], {{.+}}, {{.+}}, {{.+}}, {{.+}}) // LAMBDA-DAG: [[OMP_PF_LB:%.omp.lb]] = alloca{{.+}}, // LAMBDA-DAG: [[OMP_PF_UB:%.omp.ub]] = alloca{{.+}}, @@ -611,7 +611,7 @@ // LAMBDA: ret // 'parallel for' implementation using outer and inner loops and PrevEUB - // LAMBDA: define{{.+}} void [[OMP_PARFOR_OUTLINED_5]]({{.+}}, {{.+}}, i{{[0-9]+}} [[OMP_PREV_LB_IN:%.+]], i{{[0-9]+}} [[OMP_PREV_UB_IN:%.+]], {{.+}}, {{.+}}, {{.+}}, {{.+}}, {{.+}}) + // LAMBDA: define{{.+}} void [[OMP_PARFOR_OUTLINED_5]]({{.+}}, {{.+}}, i{{[0-9]+}} frozen [[OMP_PREV_LB_IN:%.+]], i{{[0-9]+}} frozen [[OMP_PREV_UB_IN:%.+]], {{.+}}, {{.+}}, {{.+}}, {{.+}}, {{.+}}) // LAMBDA-DAG: [[OMP_PF_LB:%.omp.lb]] = alloca{{.+}}, // LAMBDA-DAG: [[OMP_PF_UB:%.omp.ub]] = alloca{{.+}}, // LAMBDA-DAG: [[OMP_PF_IV:%.omp.iv]] = alloca{{.+}}, @@ -657,7 +657,7 @@ // LAMBDA: [[OMP_PF_LB_VAL_1:%.+]] = load{{.+}}, {{.+}} [[OMP_PF_LB]], // LAMBDA: store {{.+}} [[OMP_PF_LB_VAL_1]], {{.+}}* [[OMP_PF_IV]], - // outer loop: while (IV < UB) { + // outer loop: while (IV frozen < UB) { // LAMBDA-DAG: [[OMP_PF_IV_VAL_1:%.+]] = load{{.+}}, {{.+}}* [[OMP_PF_IV]], // LAMBDA-DAG: [[OMP_PF_UB_VAL_3:%.+]] = load{{.+}}, {{.+}}* [[OMP_PF_UB]], // LAMBDA: [[PF_CMP_IV_UB_1:%.+]] = icmp{{.+}} [[OMP_PF_IV_VAL_1]], [[OMP_PF_UB_VAL_3]] @@ -724,7 +724,7 @@ // LAMBDA: ret // 'parallel for' implementation using outer and inner loops and PrevEUB - // LAMBDA: define{{.+}} void [[OMP_PARFOR_OUTLINED_6]]({{.+}}, {{.+}}, i{{[0-9]+}} [[OMP_PREV_LB_IN:%.+]], i{{[0-9]+}} [[OMP_PREV_UB_IN:%.+]], {{.+}}, {{.+}}, {{.+}}, {{.+}}) + // LAMBDA: define{{.+}} void [[OMP_PARFOR_OUTLINED_6]]({{.+}}, {{.+}}, i{{[0-9]+}} frozen [[OMP_PREV_LB_IN:%.+]], i{{[0-9]+}} frozen [[OMP_PREV_UB_IN:%.+]], {{.+}}, {{.+}}, {{.+}}, {{.+}}) // LAMBDA-DAG: [[OMP_PF_LB:%.omp.lb]] = alloca{{.+}}, // LAMBDA-DAG: [[OMP_PF_UB:%.omp.ub]] = alloca{{.+}}, // LAMBDA-DAG: [[OMP_PF_IV:%.omp.iv]] = alloca{{.+}}, @@ -806,7 +806,7 @@ // LAMBDA: ret // 'parallel for' implementation using outer and inner loops and PrevEUB - // LAMBDA: define{{.+}} void [[OMP_PARFOR_OUTLINED_7]]({{.+}}, {{.+}}, i{{[0-9]+}} [[OMP_PREV_LB_IN:%.+]], i{{[0-9]+}} [[OMP_PREV_UB_IN:%.+]], {{.+}}, {{.+}}, {{.+}}, {{.+}}, {{.+}}) + // LAMBDA: define{{.+}} void [[OMP_PARFOR_OUTLINED_7]]({{.+}}, {{.+}}, i{{[0-9]+}} frozen [[OMP_PREV_LB_IN:%.+]], i{{[0-9]+}} frozen [[OMP_PREV_UB_IN:%.+]], {{.+}}, {{.+}}, {{.+}}, {{.+}}, {{.+}}) // LAMBDA-DAG: [[OMP_PF_LB:%.omp.lb]] = alloca{{.+}}, // LAMBDA-DAG: [[OMP_PF_UB:%.omp.ub]] = alloca{{.+}}, // LAMBDA-DAG: [[OMP_PF_IV:%.omp.iv]] = alloca{{.+}}, @@ -966,7 +966,7 @@ // CHECK: ret // implementation of 'parallel for' - // CHECK: define{{.+}} void [[OMP_PARFOR_OUTLINED_1]]({{.+}}, {{.+}}, i{{[0-9]+}} [[OMP_PREV_LB_IN:%.+]], i{{[0-9]+}} [[OMP_PREV_UB_IN:%.+]], {{.+}}, {{.+}}, {{.+}}, {{.+}}) + // CHECK: define{{.+}} void [[OMP_PARFOR_OUTLINED_1]]({{.+}}, {{.+}}, i{{[0-9]+}} frozen [[OMP_PREV_LB_IN:%.+]], i{{[0-9]+}} frozen [[OMP_PREV_UB_IN:%.+]], {{.+}}, {{.+}}, {{.+}}, {{.+}}) // CHECK-DAG: [[OMP_PF_LB:%.omp.lb]] = alloca{{.+}}, // CHECK-DAG: [[OMP_PF_UB:%.omp.ub]] = alloca{{.+}}, @@ -1095,7 +1095,7 @@ // CHECK: ret // implementation of 'parallel for' - // CHECK: define{{.+}} void [[OMP_PARFOR_OUTLINED_2]]({{.+}}, {{.+}}, i{{[0-9]+}} [[OMP_PREV_LB_IN:%.+]], i{{[0-9]+}} [[OMP_PREV_UB_IN:%.+]], {{.+}}, {{.+}}, {{.+}}, {{.+}}) + // CHECK: define{{.+}} void [[OMP_PARFOR_OUTLINED_2]]({{.+}}, {{.+}}, i{{[0-9]+}} frozen [[OMP_PREV_LB_IN:%.+]], i{{[0-9]+}} frozen [[OMP_PREV_UB_IN:%.+]], {{.+}}, {{.+}}, {{.+}}, {{.+}}) // CHECK-DAG: [[OMP_PF_LB:%.omp.lb]] = alloca{{.+}}, // CHECK-DAG: [[OMP_PF_UB:%.omp.ub]] = alloca{{.+}}, @@ -1289,7 +1289,7 @@ // CHECK: ret // 'parallel for' implementation is the same as the case without schedule clase (static no chunk is the default) - // CHECK: define{{.+}} void [[OMP_PARFOR_OUTLINED_4]]({{.+}}, {{.+}}, i{{[0-9]+}} [[OMP_PREV_LB_IN:%.+]], i{{[0-9]+}} [[OMP_PREV_UB_IN:%.+]], {{.+}}, {{.+}}, {{.+}}, {{.+}}) + // CHECK: define{{.+}} void [[OMP_PARFOR_OUTLINED_4]]({{.+}}, {{.+}}, i{{[0-9]+}} frozen [[OMP_PREV_LB_IN:%.+]], i{{[0-9]+}} frozen [[OMP_PREV_UB_IN:%.+]], {{.+}}, {{.+}}, {{.+}}, {{.+}}) // CHECK-DAG: [[OMP_PF_LB:%.omp.lb]] = alloca{{.+}}, // CHECK-DAG: [[OMP_PF_UB:%.omp.ub]] = alloca{{.+}}, @@ -1367,7 +1367,7 @@ // CHECK: ret // 'parallel for' implementation using outer and inner loops and PrevEUB - // CHECK: define{{.+}} void [[OMP_PARFOR_OUTLINED_5]]({{.+}}, {{.+}}, i{{[0-9]+}} [[OMP_PREV_LB_IN:%.+]], i{{[0-9]+}} [[OMP_PREV_UB_IN:%.+]], {{.+}}, {{.+}}, {{.+}}, {{.+}}, {{.+}}) + // CHECK: define{{.+}} void [[OMP_PARFOR_OUTLINED_5]]({{.+}}, {{.+}}, i{{[0-9]+}} frozen [[OMP_PREV_LB_IN:%.+]], i{{[0-9]+}} frozen [[OMP_PREV_UB_IN:%.+]], {{.+}}, {{.+}}, {{.+}}, {{.+}}, {{.+}}) // CHECK-DAG: [[OMP_PF_LB:%.omp.lb]] = alloca{{.+}}, // CHECK-DAG: [[OMP_PF_UB:%.omp.ub]] = alloca{{.+}}, // CHECK-DAG: [[OMP_PF_IV:%.omp.iv]] = alloca{{.+}}, @@ -1413,7 +1413,7 @@ // CHECK: [[OMP_PF_LB_VAL_1:%.+]] = load{{.+}}, {{.+}} [[OMP_PF_LB]], // CHECK: store {{.+}} [[OMP_PF_LB_VAL_1]], {{.+}}* [[OMP_PF_IV]], - // outer loop: while (IV < UB) { + // outer loop: while (IV frozen < UB) { // CHECK-DAG: [[OMP_PF_IV_VAL_1:%.+]] = load{{.+}}, {{.+}}* [[OMP_PF_IV]], // CHECK-DAG: [[OMP_PF_UB_VAL_3:%.+]] = load{{.+}}, {{.+}}* [[OMP_PF_UB]], // CHECK: [[PF_CMP_IV_UB_1:%.+]] = icmp{{.+}} [[OMP_PF_IV_VAL_1]], [[OMP_PF_UB_VAL_3]] @@ -1477,7 +1477,7 @@ // CHECK: ret // 'parallel for' implementation using outer and inner loops and PrevEUB - // CHECK: define{{.+}} void [[OMP_PARFOR_OUTLINED_6]]({{.+}}, {{.+}}, i{{[0-9]+}} [[OMP_PREV_LB_IN:%.+]], i{{[0-9]+}} [[OMP_PREV_UB_IN:%.+]], {{.+}}, {{.+}}, {{.+}}, {{.+}}) + // CHECK: define{{.+}} void [[OMP_PARFOR_OUTLINED_6]]({{.+}}, {{.+}}, i{{[0-9]+}} frozen [[OMP_PREV_LB_IN:%.+]], i{{[0-9]+}} frozen [[OMP_PREV_UB_IN:%.+]], {{.+}}, {{.+}}, {{.+}}, {{.+}}) // CHECK-DAG: [[OMP_PF_LB:%.omp.lb]] = alloca{{.+}}, // CHECK-DAG: [[OMP_PF_UB:%.omp.ub]] = alloca{{.+}}, // CHECK-DAG: [[OMP_PF_IV:%.omp.iv]] = alloca{{.+}}, @@ -1556,7 +1556,7 @@ // CHECK: ret // 'parallel for' implementation using outer and inner loops and PrevEUB - // CHECK: define{{.+}} void [[OMP_PARFOR_OUTLINED_7]]({{.+}}, {{.+}}, i{{[0-9]+}} [[OMP_PREV_LB_IN:%.+]], i{{[0-9]+}} [[OMP_PREV_UB_IN:%.+]], {{.+}}, {{.+}}, {{.+}}, {{.+}}, {{.+}}) + // CHECK: define{{.+}} void [[OMP_PARFOR_OUTLINED_7]]({{.+}}, {{.+}}, i{{[0-9]+}} frozen [[OMP_PREV_LB_IN:%.+]], i{{[0-9]+}} frozen [[OMP_PREV_UB_IN:%.+]], {{.+}}, {{.+}}, {{.+}}, {{.+}}, {{.+}}) // CHECK-DAG: [[OMP_PF_LB:%.omp.lb]] = alloca{{.+}}, // CHECK-DAG: [[OMP_PF_UB:%.omp.ub]] = alloca{{.+}}, // CHECK-DAG: [[OMP_PF_IV:%.omp.iv]] = alloca{{.+}}, @@ -1708,7 +1708,7 @@ // CHECK: ret // implementation of 'parallel for' -// CHECK: define{{.+}} void [[OMP_PARFOR_OUTLINED_1]]({{.+}}, {{.+}}, i{{[0-9]+}} [[OMP_PREV_LB_IN:%.+]], i{{[0-9]+}} [[OMP_PREV_UB_IN:%.+]], {{.+}}, {{.+}}, {{.+}}, {{.+}}) +// CHECK: define{{.+}} void [[OMP_PARFOR_OUTLINED_1]]({{.+}}, {{.+}}, i{{[0-9]+}} frozen [[OMP_PREV_LB_IN:%.+]], i{{[0-9]+}} frozen [[OMP_PREV_UB_IN:%.+]], {{.+}}, {{.+}}, {{.+}}, {{.+}}) // CHECK-DAG: [[OMP_PF_LB:%.omp.lb]] = alloca{{.+}}, // CHECK-DAG: [[OMP_PF_UB:%.omp.ub]] = alloca{{.+}}, @@ -1830,7 +1830,7 @@ // CHECK: ret // implementation of 'parallel for' -// CHECK: define{{.+}} void [[OMP_PARFOR_OUTLINED_2]]({{.+}}, {{.+}}, i{{[0-9]+}} [[OMP_PREV_LB_IN:%.+]], i{{[0-9]+}} [[OMP_PREV_UB_IN:%.+]], {{.+}}, {{.+}}, {{.+}}, {{.+}}) +// CHECK: define{{.+}} void [[OMP_PARFOR_OUTLINED_2]]({{.+}}, {{.+}}, i{{[0-9]+}} frozen [[OMP_PREV_LB_IN:%.+]], i{{[0-9]+}} frozen [[OMP_PREV_UB_IN:%.+]], {{.+}}, {{.+}}, {{.+}}, {{.+}}) // CHECK-DAG: [[OMP_PF_LB:%.omp.lb]] = alloca{{.+}}, // CHECK-DAG: [[OMP_PF_UB:%.omp.ub]] = alloca{{.+}}, @@ -2010,7 +2010,7 @@ // CHECK: ret // 'parallel for' implementation is the same as the case without schedule clase (static no chunk is the default) -// CHECK: define{{.+}} void [[OMP_PARFOR_OUTLINED_4]]({{.+}}, {{.+}}, i{{[0-9]+}} [[OMP_PREV_LB_IN:%.+]], i{{[0-9]+}} [[OMP_PREV_UB_IN:%.+]], {{.+}}, {{.+}}, {{.+}}, {{.+}}) +// CHECK: define{{.+}} void [[OMP_PARFOR_OUTLINED_4]]({{.+}}, {{.+}}, i{{[0-9]+}} frozen [[OMP_PREV_LB_IN:%.+]], i{{[0-9]+}} frozen [[OMP_PREV_UB_IN:%.+]], {{.+}}, {{.+}}, {{.+}}, {{.+}}) // CHECK-DAG: [[OMP_PF_LB:%.omp.lb]] = alloca{{.+}}, // CHECK-DAG: [[OMP_PF_UB:%.omp.ub]] = alloca{{.+}}, @@ -2081,7 +2081,7 @@ // CHECK: ret // 'parallel for' implementation using outer and inner loops and PrevEUB -// CHECK: define{{.+}} void [[OMP_PARFOR_OUTLINED_5]]({{.+}}, {{.+}}, i{{[0-9]+}} [[OMP_PREV_LB_IN:%.+]], i{{[0-9]+}} [[OMP_PREV_UB_IN:%.+]], {{.+}}, {{.+}}, {{.+}}, {{.+}}, {{.+}}) +// CHECK: define{{.+}} void [[OMP_PARFOR_OUTLINED_5]]({{.+}}, {{.+}}, i{{[0-9]+}} frozen [[OMP_PREV_LB_IN:%.+]], i{{[0-9]+}} frozen [[OMP_PREV_UB_IN:%.+]], {{.+}}, {{.+}}, {{.+}}, {{.+}}, {{.+}}) // CHECK-DAG: [[OMP_PF_LB:%.omp.lb]] = alloca{{.+}}, // CHECK-DAG: [[OMP_PF_UB:%.omp.ub]] = alloca{{.+}}, // CHECK-DAG: [[OMP_PF_IV:%.omp.iv]] = alloca{{.+}}, @@ -2127,7 +2127,7 @@ // CHECK: [[OMP_PF_LB_VAL_1:%.+]] = load{{.+}}, {{.+}} [[OMP_PF_LB]], // CHECK: store {{.+}} [[OMP_PF_LB_VAL_1]], {{.+}}* [[OMP_PF_IV]], -// outer loop: while (IV < UB) { +// outer loop: while (IV frozen < UB) { // CHECK-DAG: [[OMP_PF_IV_VAL_1:%.+]] = load{{.+}}, {{.+}}* [[OMP_PF_IV]], // CHECK-DAG: [[OMP_PF_UB_VAL_3:%.+]] = load{{.+}}, {{.+}}* [[OMP_PF_UB]], // CHECK: [[PF_CMP_IV_UB_1:%.+]] = icmp{{.+}} [[OMP_PF_IV_VAL_1]], [[OMP_PF_UB_VAL_3]] @@ -2184,7 +2184,7 @@ // CHECK: ret // 'parallel for' implementation using outer and inner loops and PrevEUB -// CHECK: define{{.+}} void [[OMP_PARFOR_OUTLINED_6]]({{.+}}, {{.+}}, i{{[0-9]+}} [[OMP_PREV_LB_IN:%.+]], i{{[0-9]+}} [[OMP_PREV_UB_IN:%.+]], {{.+}}, {{.+}}, {{.+}}, {{.+}}) +// CHECK: define{{.+}} void [[OMP_PARFOR_OUTLINED_6]]({{.+}}, {{.+}}, i{{[0-9]+}} frozen [[OMP_PREV_LB_IN:%.+]], i{{[0-9]+}} frozen [[OMP_PREV_UB_IN:%.+]], {{.+}}, {{.+}}, {{.+}}, {{.+}}) // CHECK-DAG: [[OMP_PF_LB:%.omp.lb]] = alloca{{.+}}, // CHECK-DAG: [[OMP_PF_UB:%.omp.ub]] = alloca{{.+}}, // CHECK-DAG: [[OMP_PF_IV:%.omp.iv]] = alloca{{.+}}, @@ -2256,7 +2256,7 @@ // CHECK: ret // 'parallel for' implementation using outer and inner loops and PrevEUB -// CHECK: define{{.+}} void [[OMP_PARFOR_OUTLINED_7]]({{.+}}, {{.+}}, i{{[0-9]+}} [[OMP_PREV_LB_IN:%.+]], i{{[0-9]+}} [[OMP_PREV_UB_IN:%.+]], {{.+}}, {{.+}}, {{.+}}, {{.+}}, {{.+}}) +// CHECK: define{{.+}} void [[OMP_PARFOR_OUTLINED_7]]({{.+}}, {{.+}}, i{{[0-9]+}} frozen [[OMP_PREV_LB_IN:%.+]], i{{[0-9]+}} frozen [[OMP_PREV_UB_IN:%.+]], {{.+}}, {{.+}}, {{.+}}, {{.+}}, {{.+}}) // CHECK-DAG: [[OMP_PF_LB:%.omp.lb]] = alloca{{.+}}, // CHECK-DAG: [[OMP_PF_UB:%.omp.ub]] = alloca{{.+}}, // CHECK-DAG: [[OMP_PF_IV:%.omp.iv]] = alloca{{.+}}, diff --git a/clang/test/OpenMP/distribute_parallel_for_simd_firstprivate_codegen.cpp b/clang/test/OpenMP/distribute_parallel_for_simd_firstprivate_codegen.cpp --- a/clang/test/OpenMP/distribute_parallel_for_simd_firstprivate_codegen.cpp +++ b/clang/test/OpenMP/distribute_parallel_for_simd_firstprivate_codegen.cpp @@ -78,7 +78,7 @@ #pragma omp teams #pragma omp distribute parallel for simd firstprivate(g, g1, svar, sfvar) for (int i = 0; i < 2; ++i) { - // LAMBDA: define{{.*}} internal{{.*}} void [[OMP_OUTLINED]](i32* noalias %{{.+}}, i32* noalias %{{.+}}, double* {{.+}} [[G_IN:%.+]], double*{{.+}} [[G1_IN:%.+]], i{{[0-9]+}}*{{.+}} [[SVAR_IN:%.+]], float*{{.+}} [[SFVAR_IN:%.+]]) + // LAMBDA: define{{.*}} internal{{.*}} void [[OMP_OUTLINED]](i32* frozen noalias %{{.+}}, i32* frozen noalias %{{.+}}, double* {{.+}} [[G_IN:%.+]], double*{{.+}} [[G1_IN:%.+]], i{{[0-9]+}}*{{.+}} [[SVAR_IN:%.+]], float*{{.+}} [[SFVAR_IN:%.+]]) // addr alloca's // LAMBDA: [[G_ADDR:%.+]] = alloca double*, @@ -158,8 +158,8 @@ // LAMBDA: ret void - // LAMBDA-64: define{{.+}} void [[OMP_PARFOR_OUTLINED]](i32* noalias %{{.+}}, i32* noalias %{{.+}}, {{.+}}, {{.+}}, i{{[0-9]+}} [[G_IN:%.+]], i{{[0-9]+}} [[G1_IN:%.+]], i{{[0-9]+}} [[SVAR_IN:%.+]], i{{[0-9]+}} [[SFVAR_IN:%.+]]) - // LAMBDA-32: define{{.+}} void [[OMP_PARFOR_OUTLINED]](i32* noalias %{{.+}}, i32* noalias %{{.+}}, {{.+}}, {{.+}}, double* {{.+}} [[G_IN:%.+]], i{{[0-9]+}} [[G1_IN:%.+]], i{{[0-9]+}} [[SVAR_IN:%.+]], i{{[0-9]+}} [[SFVAR_IN:%.+]]) + // LAMBDA-64: define{{.+}} void [[OMP_PARFOR_OUTLINED]](i32* frozen noalias %{{.+}}, i32* frozen noalias %{{.+}}, {{.+}}, {{.+}}, i{{[0-9]+}} frozen [[G_IN:%.+]], i{{[0-9]+}} frozen [[G1_IN:%.+]], i{{[0-9]+}} frozen [[SVAR_IN:%.+]], i{{[0-9]+}} frozen [[SFVAR_IN:%.+]]) + // LAMBDA-32: define{{.+}} void [[OMP_PARFOR_OUTLINED]](i32* frozen noalias %{{.+}}, i32* frozen noalias %{{.+}}, {{.+}}, {{.+}}, double* {{.+}} [[G_IN:%.+]], i{{[0-9]+}} frozen [[G1_IN:%.+]], i{{[0-9]+}} frozen [[SVAR_IN:%.+]], i{{[0-9]+}} frozen [[SFVAR_IN:%.+]]) // skip initial params // LAMBDA: {{.+}} = alloca{{.+}}, // LAMBDA: {{.+}} = alloca{{.+}}, @@ -225,11 +225,11 @@ // LAMBDA-32: store i{{[0-9]+}}* [[SVAR_ADDR]], i{{[0-9]+}}** [[SVAR_PRIVATE_ADDR_REF]] // LAMBDA: [[SFVAR_PRIVATE_ADDR_REF:%.+]] = getelementptr inbounds %{{.+}}, %{{.+}}* [[ARG:%.+]], i{{[0-9]+}} 0, i{{[0-9]+}} 3 // LAMBDA: store float* [[SFVAR_CONV]], float** [[SFVAR_PRIVATE_ADDR_REF]] - // LAMBDA: call{{.*}} void [[INNER_LAMBDA:@.+]](%{{.+}}* [[ARG]]) + // LAMBDA: call{{.*}} void [[INNER_LAMBDA:@.+]](%{{.+}}* frozen [[ARG]]) // LAMBDA: call {{.*}}void @__kmpc_for_static_fini( // LAMBDA: ret void [&]() { - // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* [[ARG_PTR:%.+]]) + // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* frozen [[ARG_PTR:%.+]]) // LAMBDA: store %{{.+}}* [[ARG_PTR]], %{{.+}}** [[ARG_PTR_REF:%.+]], g = 2; g1 = 2; @@ -273,16 +273,16 @@ // CHECK-LABEL: define{{.*}} i{{[0-9]+}} @main() // CHECK: [[TEST:%.+]] = alloca [[S_FLOAT_TY]], -// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR:@.+]]([[S_FLOAT_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR:@.+]]([[S_FLOAT_TY]]* frozen [[TEST]]) // CHECK: call i{{[0-9]+}} @__tgt_target_teams( // CHECK: call void [[OFFLOAD_FUN_0:@.+]]( -// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_DESTR:@.+]]([[S_FLOAT_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_DESTR:@.+]]([[S_FLOAT_TY]]* frozen [[TEST]]) -// CHECK: define{{.+}} [[OFFLOAD_FUN_0]](i{{[0-9]+}} [[T_VAR_IN:%.+]], [2 x i{{[0-9]+}}]* {{.+}} [[VEC_IN:%.+]], [2 x [[S_FLOAT_TY]]]* {{.+}} [[S_ARR_IN:%.+]], [[S_FLOAT_TY]]* {{.+}} [[VAR_IN:%.+]], i{{[0-9]+}} [[SVAR_IN:%.+]]) +// CHECK: define{{.+}} [[OFFLOAD_FUN_0]](i{{[0-9]+}} frozen [[T_VAR_IN:%.+]], [2 x i{{[0-9]+}}]* {{.+}} [[VEC_IN:%.+]], [2 x [[S_FLOAT_TY]]]* {{.+}} [[S_ARR_IN:%.+]], [[S_FLOAT_TY]]* {{.+}} [[VAR_IN:%.+]], i{{[0-9]+}} frozen [[SVAR_IN:%.+]]) // CHECK: call void (%{{.+}}*, i{{[0-9]+}}, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)*, ...) @__kmpc_fork_teams(%{{.+}}* @{{.+}}, i{{[0-9]+}} 5, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)* bitcast (void (i{{[0-9]+}}*, i{{[0-9]+}}*, i{{[0-9]+}}*, [2 x i{{[0-9]+}}]*, [2 x [[S_FLOAT_TY]]]*, [[S_FLOAT_TY]]*, i{{[0-9]+}}*)* [[OMP_OUTLINED_0:@.+]] to void // CHECK: ret -// CHECK: define internal void [[OMP_OUTLINED_0]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}, i{{[0-9]+}}*{{.+}} [[T_VAR_IN:%.+]], [2 x i{{[0-9]+}}]* {{.+}} [[VEC_IN:%.+]], [2 x [[S_FLOAT_TY]]]* {{.+}} [[S_ARR_IN:%.+]], [[S_FLOAT_TY]]* {{.+}} [[VAR_IN:%.+]], i{{[0-9]+}}*{{.+}} [[SVAR_IN:%.+]]) +// CHECK: define internal void [[OMP_OUTLINED_0]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}, i{{[0-9]+}}*{{.+}} [[T_VAR_IN:%.+]], [2 x i{{[0-9]+}}]* {{.+}} [[VEC_IN:%.+]], [2 x [[S_FLOAT_TY]]]* {{.+}} [[S_ARR_IN:%.+]], [[S_FLOAT_TY]]* {{.+}} [[VAR_IN:%.+]], i{{[0-9]+}}*{{.+}} [[SVAR_IN:%.+]]) // CHECK: alloca i{{[0-9]+}}*, // CHECK: alloca i{{[0-9]+}}*, @@ -373,13 +373,13 @@ // CHECK: call void @__kmpc_for_static_fini( // call destructors: var.. -// CHECK-DAG: call {{.+}} [[S_FLOAT_TY_DEF_DESTR]]([[S_FLOAT_TY]]* [[VAR_PRIV]]) +// CHECK-DAG: call {{.+}} [[S_FLOAT_TY_DEF_DESTR]]([[S_FLOAT_TY]]* frozen [[VAR_PRIV]]) // ..and s_arr // CHECK: {{.+}}: // CHECK: [[S_ARR_EL_PAST:%.+]] = phi [[S_FLOAT_TY]]* // CHECK: [[S_ARR_PRIV_ITEM:%.+]] = getelementptr {{.+}}, {{.+}} [[S_ARR_EL_PAST]], -// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_DESTR]]([[S_FLOAT_TY]]* [[S_ARR_PRIV_ITEM]]) +// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_DESTR]]([[S_FLOAT_TY]]* frozen [[S_ARR_PRIV_ITEM]]) // CHECK: ret void @@ -387,7 +387,7 @@ // However, the support for 'firstprivate' of 'parallel' is only used when 'parallel' // is found alone. Therefore we only have one 'firstprivate' support for 'parallel for' // in combination -// CHECK: define internal void [[OMP_PARFOR_OUTLINED_0]]({{.+}}, {{.+}}, {{.+}}, {{.+}}, [2 x i{{[0-9]+}}]* {{.+}} [[VEC_IN:%.+]], i{{[0-9]+}} [[T_VAR_IN:%.+]], [2 x [[S_FLOAT_TY]]]* {{.+}} [[S_ARR_IN:%.+]], [[S_FLOAT_TY]]* {{.+}} [[VAR_IN:%.+]], i{{[0-9]+}} [[SVAR_IN:%.+]]) +// CHECK: define internal void [[OMP_PARFOR_OUTLINED_0]]({{.+}}, {{.+}}, {{.+}}, {{.+}}, [2 x i{{[0-9]+}}]* {{.+}} [[VEC_IN:%.+]], i{{[0-9]+}} frozen [[T_VAR_IN:%.+]], [2 x [[S_FLOAT_TY]]]* {{.+}} [[S_ARR_IN:%.+]], [[S_FLOAT_TY]]* {{.+}} [[VAR_IN:%.+]], i{{[0-9]+}} frozen [[SVAR_IN:%.+]]) // addr alloca's // CHECK: [[VEC_ADDR:%.+]] = alloca [2 x i{{[0-9]+}}]*, @@ -449,29 +449,29 @@ // CHECK: call void @__kmpc_for_static_fini( // call destructors: var.. -// CHECK-DAG: call {{.+}} [[S_FLOAT_TY_DEF_DESTR]]([[S_FLOAT_TY]]* [[VAR_PRIV]]) +// CHECK-DAG: call {{.+}} [[S_FLOAT_TY_DEF_DESTR]]([[S_FLOAT_TY]]* frozen [[VAR_PRIV]]) // ..and s_arr // CHECK: {{.+}}: // CHECK: [[S_ARR_EL_PAST:%.+]] = phi [[S_FLOAT_TY]]* // CHECK: [[S_ARR_PRIV_ITEM:%.+]] = getelementptr {{.+}}, {{.+}} [[S_ARR_EL_PAST]], -// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_DESTR]]([[S_FLOAT_TY]]* [[S_ARR_PRIV_ITEM]]) +// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_DESTR]]([[S_FLOAT_TY]]* frozen [[S_ARR_PRIV_ITEM]]) // CHECK: ret void // template tmain with S_INT_TY // CHECK-LABEL: define{{.*}} i{{[0-9]+}} @{{.+}}tmain{{.+}}() // CHECK: [[TEST:%.+]] = alloca [[S_INT_TY]], -// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR:@.+]]([[S_INT_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR:@.+]]([[S_INT_TY]]* frozen [[TEST]]) // CHECK: call i{{[0-9]+}} @__tgt_target_teams( // CHECK: call void [[OFFLOAD_FUN_0:@.+]]( -// CHECK: call {{.*}} [[S_INT_TY_DEF_DESTR:@.+]]([[S_INT_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_INT_TY_DEF_DESTR:@.+]]([[S_INT_TY]]* frozen [[TEST]]) -// CHECK: define{{.+}} [[OFFLOAD_FUN_0]](i{{[0-9]+}} [[T_VAR_IN:%.+]], [2 x i{{[0-9]+}}]* {{.+}} [[VEC_IN:%.+]], [2 x [[S_INT_TY]]]* {{.+}} [[S_ARR_IN:%.+]], [[S_INT_TY]]* {{.+}} [[VAR_IN:%.+]]) +// CHECK: define{{.+}} [[OFFLOAD_FUN_0]](i{{[0-9]+}} frozen [[T_VAR_IN:%.+]], [2 x i{{[0-9]+}}]* {{.+}} [[VEC_IN:%.+]], [2 x [[S_INT_TY]]]* {{.+}} [[S_ARR_IN:%.+]], [[S_INT_TY]]* {{.+}} [[VAR_IN:%.+]]) // CHECK: call void (%{{.+}}*, i{{[0-9]+}}, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)*, ...) @__kmpc_fork_teams(%{{.+}}* @{{.+}}, i{{[0-9]+}} 4, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)* bitcast (void (i{{[0-9]+}}*, i{{[0-9]+}}*, i{{[0-9]+}}*, [2 x i{{[0-9]+}}]*, [2 x [[S_INT_TY]]]*, [[S_INT_TY]]*)* [[OMP_OUTLINED_0:@.+]] to void // CHECK: ret -// CHECK: define internal void [[OMP_OUTLINED_0]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}, i{{[0-9]+}}*{{.+}} [[T_VAR_IN:%.+]], [2 x i{{[0-9]+}}]* {{.+}} [[VEC_IN:%.+]], [2 x [[S_INT_TY]]]* {{.+}} [[S_ARR_IN:%.+]], [[S_INT_TY]]* {{.+}} [[VAR_IN:%.+]]) +// CHECK: define internal void [[OMP_OUTLINED_0]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}, i{{[0-9]+}}*{{.+}} [[T_VAR_IN:%.+]], [2 x i{{[0-9]+}}]* {{.+}} [[VEC_IN:%.+]], [2 x [[S_INT_TY]]]* {{.+}} [[S_ARR_IN:%.+]], [[S_INT_TY]]* {{.+}} [[VAR_IN:%.+]]) // CHECK: alloca i{{[0-9]+}}*, // CHECK: alloca i{{[0-9]+}}*, @@ -549,13 +549,13 @@ // CHECK: call void @__kmpc_for_static_fini( // call destructors: var.. -// CHECK-DAG: call {{.+}} [[S_INT_TY_DEF_DESTR]]([[S_INT_TY]]* [[VAR_PRIV]]) +// CHECK-DAG: call {{.+}} [[S_INT_TY_DEF_DESTR]]([[S_INT_TY]]* frozen [[VAR_PRIV]]) // ..and s_arr // CHECK: {{.+}}: // CHECK: [[S_ARR_EL_PAST:%.+]] = phi [[S_INT_TY]]* // CHECK: [[S_ARR_PRIV_ITEM:%.+]] = getelementptr {{.+}}, {{.+}} [[S_ARR_EL_PAST]], -// CHECK: call {{.*}} [[S_INT_TY_DEF_DESTR]]([[S_INT_TY]]* [[S_ARR_PRIV_ITEM]]) +// CHECK: call {{.*}} [[S_INT_TY_DEF_DESTR]]([[S_INT_TY]]* frozen [[S_ARR_PRIV_ITEM]]) // CHECK: ret void @@ -563,7 +563,7 @@ // However, the support for 'firstprivate' of 'parallel' is only used when 'parallel' // is found alone. Therefore we only have one 'firstprivate' support for 'parallel for' // in combination -// CHECK: define internal void [[OMP_PARFOR_OUTLINED_0]]({{.+}}, {{.+}}, {{.+}}, {{.+}}, [2 x i{{[0-9]+}}]* {{.+}} [[VEC_IN:%.+]], i{{[0-9]+}} [[T_VAR_IN:%.+]], [2 x [[S_INT_TY]]]* {{.+}} [[S_ARR_IN:%.+]], [[S_INT_TY]]* {{.+}} [[VAR_IN:%.+]]) +// CHECK: define internal void [[OMP_PARFOR_OUTLINED_0]]({{.+}}, {{.+}}, {{.+}}, {{.+}}, [2 x i{{[0-9]+}}]* {{.+}} [[VEC_IN:%.+]], i{{[0-9]+}} frozen [[T_VAR_IN:%.+]], [2 x [[S_INT_TY]]]* {{.+}} [[S_ARR_IN:%.+]], [[S_INT_TY]]* {{.+}} [[VAR_IN:%.+]]) // addr alloca's // CHECK: [[VEC_ADDR:%.+]] = alloca [2 x i{{[0-9]+}}]*, @@ -623,13 +623,13 @@ // CHECK: call void @__kmpc_for_static_fini( // call destructors: var.. -// CHECK-DAG: call {{.+}} [[S_INT_TY_DEF_DESTR]]([[S_INT_TY]]* [[VAR_PRIV]]) +// CHECK-DAG: call {{.+}} [[S_INT_TY_DEF_DESTR]]([[S_INT_TY]]* frozen [[VAR_PRIV]]) // ..and s_arr // CHECK: {{.+}}: // CHECK: [[S_ARR_EL_PAST:%.+]] = phi [[S_INT_TY]]* // CHECK: [[S_ARR_PRIV_ITEM:%.+]] = getelementptr {{.+}}, {{.+}} [[S_ARR_EL_PAST]], -// CHECK: call {{.*}} [[S_INT_TY_DEF_DESTR]]([[S_INT_TY]]* [[S_ARR_PRIV_ITEM]]) +// CHECK: call {{.*}} [[S_INT_TY_DEF_DESTR]]([[S_INT_TY]]* frozen [[S_ARR_PRIV_ITEM]]) // CHECK: ret void diff --git a/clang/test/OpenMP/distribute_parallel_for_simd_lastprivate_codegen.cpp b/clang/test/OpenMP/distribute_parallel_for_simd_lastprivate_codegen.cpp --- a/clang/test/OpenMP/distribute_parallel_for_simd_lastprivate_codegen.cpp +++ b/clang/test/OpenMP/distribute_parallel_for_simd_lastprivate_codegen.cpp @@ -1,31 +1,31 @@ -// RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix LAMBDA --check-prefix LAMBDA-64 -// RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s -// RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix LAMBDA --check-prefix LAMBDA-64 -// RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix LAMBDA --check-prefix LAMBDA-32 -// RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s -// RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix LAMBDA --check-prefix LAMBDA-32 - -// RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck --check-prefix SIMD-ONLY0 %s -// RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s -// RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck --check-prefix SIMD-ONLY0 %s -// RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck --check-prefix SIMD-ONLY0 %s -// RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s -// RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck --check-prefix SIMD-ONLY0 %s +// RUN: %clang_cc1 -disable-frozen-args -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix LAMBDA --check-prefix LAMBDA-64 +// RUN: %clang_cc1 -disable-frozen-args -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -DLAMBDA -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix LAMBDA --check-prefix LAMBDA-64 +// RUN: %clang_cc1 -disable-frozen-args -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix LAMBDA --check-prefix LAMBDA-32 +// RUN: %clang_cc1 -disable-frozen-args -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix LAMBDA --check-prefix LAMBDA-32 + +// RUN: %clang_cc1 -disable-frozen-args -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck --check-prefix SIMD-ONLY0 %s +// RUN: %clang_cc1 -disable-frozen-args -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -DLAMBDA -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck --check-prefix SIMD-ONLY0 %s +// RUN: %clang_cc1 -disable-frozen-args -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck --check-prefix SIMD-ONLY0 %s +// RUN: %clang_cc1 -disable-frozen-args -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck --check-prefix SIMD-ONLY0 %s // SIMD-ONLY0-NOT: {{__kmpc|__tgt}} -// RUN: %clang_cc1 -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix CHECK --check-prefix CHECK-64 -// RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix CHECK --check-prefix CHECK-64 -// RUN: %clang_cc1 -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix CHECK --check-prefix CHECK-32 -// RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix CHECK --check-prefix CHECK-32 - -// RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck --check-prefix SIMD-ONLY1 %s -// RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck --check-prefix SIMD-ONLY1 %s -// RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck --check-prefix SIMD-ONLY1 %s -// RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck --check-prefix SIMD-ONLY1 %s +// RUN: %clang_cc1 -disable-frozen-args -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix CHECK --check-prefix CHECK-64 +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix CHECK --check-prefix CHECK-64 +// RUN: %clang_cc1 -disable-frozen-args -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix CHECK --check-prefix CHECK-32 +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix CHECK --check-prefix CHECK-32 + +// RUN: %clang_cc1 -disable-frozen-args -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck --check-prefix SIMD-ONLY1 %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck --check-prefix SIMD-ONLY1 %s +// RUN: %clang_cc1 -disable-frozen-args -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck --check-prefix SIMD-ONLY1 %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck --check-prefix SIMD-ONLY1 %s // SIMD-ONLY1-NOT: {{__kmpc|__tgt}} // expected-no-diagnostics #ifndef HEADER diff --git a/clang/test/OpenMP/distribute_parallel_for_simd_loop_messages.cpp b/clang/test/OpenMP/distribute_parallel_for_simd_loop_messages.cpp --- a/clang/test/OpenMP/distribute_parallel_for_simd_loop_messages.cpp +++ b/clang/test/OpenMP/distribute_parallel_for_simd_loop_messages.cpp @@ -195,7 +195,7 @@ for (ii = 0; ii < 10; ++++ii) c[ii] = a[ii]; -// Ok but undefined behavior (in general, cannot check that incr +// Ok but undefined behavior (in frozen general, cannot check incr that // is really loop-invariant). #pragma omp target #pragma omp teams diff --git a/clang/test/OpenMP/distribute_parallel_for_simd_private_codegen.cpp b/clang/test/OpenMP/distribute_parallel_for_simd_private_codegen.cpp --- a/clang/test/OpenMP/distribute_parallel_for_simd_private_codegen.cpp +++ b/clang/test/OpenMP/distribute_parallel_for_simd_private_codegen.cpp @@ -79,7 +79,7 @@ #pragma omp teams #pragma omp distribute parallel for simd private(g, g1, svar, sfvar) for (int i = 0; i < 2; ++i) { - // LAMBDA: define{{.*}} internal{{.*}} void [[OMP_OUTLINED]](i32* noalias %{{.+}}, i32* noalias %{{.+}}) + // LAMBDA: define{{.*}} internal{{.*}} void [[OMP_OUTLINED]](i32* frozen noalias %{{.+}}, i32* frozen noalias %{{.+}}) // LAMBDA: [[G_PRIVATE_ADDR:%.+]] = alloca double, // LAMBDA: [[G1_PRIVATE_ADDR:%.+]] = alloca double, // LAMBDA: [[TMP_PRIVATE_ADDR:%.+]] = alloca double*, @@ -115,11 +115,11 @@ // LAMBDA: store i{{[0-9]+}}* [[SVAR_PRIVATE_ADDR]], i{{[0-9]+}}** [[SVAR_PRIVATE_ADDR_REF]] // LAMBDA: [[SFVAR_PRIVATE_ADDR_REF:%.+]] = getelementptr inbounds %{{.+}}, %{{.+}}* [[ARG:%.+]], i{{[0-9]+}} 0, i{{[0-9]+}} 3 // LAMBDA: store float* [[SFVAR_PRIVATE_ADDR]], float** [[SFVAR_PRIVATE_ADDR_REF]] - // LAMBDA: call{{.*}} void [[INNER_LAMBDA:@.+]](%{{.+}}* [[ARG]]) + // LAMBDA: call{{.*}} void [[INNER_LAMBDA:@.+]](%{{.+}}* frozen [[ARG]]) // LAMBDA: call {{.*}}void @__kmpc_for_static_fini( // LAMBDA: ret void [&]() { - // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* [[ARG_PTR:%.+]]) + // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* frozen [[ARG_PTR:%.+]]) // LAMBDA: store %{{.+}}* [[ARG_PTR]], %{{.+}}** [[ARG_PTR_REF:%.+]], g = 2; g1 = 2; @@ -163,18 +163,18 @@ // CHECK: define{{.*}} i{{[0-9]+}} @main() // CHECK: [[TEST:%.+]] = alloca [[S_FLOAT_TY]], -// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR:@.+]]([[S_FLOAT_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR:@.+]]([[S_FLOAT_TY]]* frozen [[TEST]]) // CHECK: call i{{[0-9]+}} @__tgt_target_teams( // CHECK: call void [[OFFLOAD_FUN_0:@.+]]( -// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_DESTR:@.+]]([[S_FLOAT_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_DESTR:@.+]]([[S_FLOAT_TY]]* frozen [[TEST]]) // CHECK: ret // CHECK: define{{.+}} [[OFFLOAD_FUN_0]]() // CHECK: call void (%{{.+}}*, i{{[0-9]+}}, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)*, ...) @__kmpc_fork_teams(%{{.+}}* @{{.+}}, i{{[0-9]+}} 0, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)* bitcast (void (i{{[0-9]+}}*, i{{[0-9]+}}*)* [[OMP_OUTLINED_0:@.+]] to void // CHECK: ret // -// CHECK: define internal void [[OMP_OUTLINED_0]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}) +// CHECK: define internal void [[OMP_OUTLINED_0]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}) // CHECK: [[T_VAR_PRIV:%.+]] = alloca i{{[0-9]+}}, // CHECK: [[VEC_PRIV:%.+]] = alloca [2 x i{{[0-9]+}}], // CHECK: [[S_ARR_PRIV:%.+]] = alloca [2 x [[S_FLOAT_TY]]], @@ -188,22 +188,22 @@ // this is the ctor loop // CHECK: {{.+}}: // CHECK: [[S_ARR_PRIV_ITEM:%.+]] = phi [[S_FLOAT_TY]]* -// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR]]([[S_FLOAT_TY]]* [[S_ARR_PRIV_ITEM]]) +// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR]]([[S_FLOAT_TY]]* frozen [[S_ARR_PRIV_ITEM]]) // CHECK-NOT: [[T_VAR_PRIV]] // CHECK-NOT: [[VEC_PRIV]] -// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR]]([[S_FLOAT_TY]]* [[VAR_PRIV]]) +// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR]]([[S_FLOAT_TY]]* frozen [[VAR_PRIV]]) // CHECK: call void @__kmpc_for_static_init_4( // CHECK: call{{.+}} @__kmpc_fork_call({{.+}}, {{.+}}, {{.+}}[[OMP_PARFOR_OUTLINED_0:@.+]] to {{.+}}, // CHECK: call void @__kmpc_for_static_fini( // call destructors: var.. -// CHECK-DAG: call {{.+}} [[S_FLOAT_TY_DEF_DESTR]]([[S_FLOAT_TY]]* [[VAR_PRIV]]) +// CHECK-DAG: call {{.+}} [[S_FLOAT_TY_DEF_DESTR]]([[S_FLOAT_TY]]* frozen [[VAR_PRIV]]) // ..and s_arr // CHECK: {{.+}}: // CHECK: [[S_ARR_EL_PAST:%.+]] = phi [[S_FLOAT_TY]]* // CHECK: [[S_ARR_PRIV_ITEM:%.+]] = getelementptr {{.+}}, {{.+}} [[S_ARR_EL_PAST]], -// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_DESTR]]([[S_FLOAT_TY]]* [[S_ARR_PRIV_ITEM]]) +// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_DESTR]]([[S_FLOAT_TY]]* frozen [[S_ARR_PRIV_ITEM]]) // CHECK: ret void @@ -225,31 +225,31 @@ // this is the ctor loop // CHECK: {{.+}}: // CHECK: [[S_ARR_PRIV_ITEM:%.+]] = phi [[S_FLOAT_TY]]* -// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR]]([[S_FLOAT_TY]]* [[S_ARR_PRIV_ITEM]]) +// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR]]([[S_FLOAT_TY]]* frozen [[S_ARR_PRIV_ITEM]]) // CHECK-NOT: [[T_VAR_PRIV]] // CHECK-NOT: [[VEC_PRIV]] -// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR]]([[S_FLOAT_TY]]* [[VAR_PRIV]]) +// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR]]([[S_FLOAT_TY]]* frozen [[VAR_PRIV]]) // CHECK: call void @__kmpc_for_static_init_4( // CHECK: call void @__kmpc_for_static_fini( // call destructors: var.. -// CHECK-DAG: call {{.+}} [[S_FLOAT_TY_DEF_DESTR]]([[S_FLOAT_TY]]* [[VAR_PRIV]]) +// CHECK-DAG: call {{.+}} [[S_FLOAT_TY_DEF_DESTR]]([[S_FLOAT_TY]]* frozen [[VAR_PRIV]]) // ..and s_arr // CHECK: {{.+}}: // CHECK: [[S_ARR_EL_PAST:%.+]] = phi [[S_FLOAT_TY]]* // CHECK: [[S_ARR_PRIV_ITEM:%.+]] = getelementptr {{.+}}, {{.+}} [[S_ARR_EL_PAST]], -// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_DESTR]]([[S_FLOAT_TY]]* [[S_ARR_PRIV_ITEM]]) +// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_DESTR]]([[S_FLOAT_TY]]* frozen [[S_ARR_PRIV_ITEM]]) // CHECK: ret void // template tmain with S_INT_TY // CHECK: define{{.*}} i{{[0-9]+}} [[TMAIN_INT:@.+]]() // CHECK: [[TEST:%.+]] = alloca [[S_INT_TY]], -// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR:@.+]]([[S_INT_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR:@.+]]([[S_INT_TY]]* frozen [[TEST]]) // CHECK: call i{{[0-9]+}} @__tgt_target_teams( // CHECK: call void [[OFFLOAD_FUN_1:@.+]]( -// CHECK: call {{.*}} [[S_INT_TY_DEF_DESTR:@.+]]([[S_INT_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_INT_TY_DEF_DESTR:@.+]]([[S_INT_TY]]* frozen [[TEST]]) // CHECK: ret // CHECK: ret @@ -258,7 +258,7 @@ // CHECK: call void (%{{.+}}*, i{{[0-9]+}}, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)*, ...) @__kmpc_fork_teams(%{{.+}}* @{{.+}}, i{{[0-9]+}} 0, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)* bitcast (void (i{{[0-9]+}}*, i{{[0-9]+}}*)* [[OMP_OUTLINED_1:@.+]] to void // CHECK: ret // -// CHECK: define internal void [[OMP_OUTLINED_1]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}) +// CHECK: define internal void [[OMP_OUTLINED_1]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}) // CHECK: [[T_VAR_PRIV:%.+]] = alloca i{{[0-9]+}}, // CHECK: [[VEC_PRIV:%.+]] = alloca [2 x i{{[0-9]+}}], // CHECK: [[S_ARR_PRIV:%.+]] = alloca [2 x [[S_INT_TY]]], @@ -270,10 +270,10 @@ // CHECK-NOT: [[VEC_PRIV]] // CHECK: {{.+}}: // CHECK: [[S_ARR_PRIV_ITEM:%.+]] = phi [[S_INT_TY]]* -// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR]]([[S_INT_TY]]* [[S_ARR_PRIV_ITEM]]) +// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR]]([[S_INT_TY]]* frozen [[S_ARR_PRIV_ITEM]]) // CHECK-NOT: [[T_VAR_PRIV]] // CHECK-NOT: [[VEC_PRIV]] -// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR]]([[S_INT_TY]]* [[VAR_PRIV]]) +// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR]]([[S_INT_TY]]* frozen [[VAR_PRIV]]) // CHECK: call void @__kmpc_for_static_init_4( // CHECK: call{{.+}} @__kmpc_fork_call({{.+}}, {{.+}}, {{.+}}[[OMP_PARFOR_OUTLINED_1:@.+]] to {{.+}}, // CHECK: call void @__kmpc_for_static_fini( @@ -292,21 +292,21 @@ // this is the ctor loop // CHECK: {{.+}}: // CHECK: [[S_ARR_PRIV_ITEM:%.+]] = phi [[S_INT_TY]]* -// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR]]([[S_INT_TY]]* [[S_ARR_PRIV_ITEM]]) +// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR]]([[S_INT_TY]]* frozen [[S_ARR_PRIV_ITEM]]) // CHECK-NOT: [[T_VAR_PRIV]] // CHECK-NOT: [[VEC_PRIV]] -// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR]]([[S_INT_TY]]* [[VAR_PRIV]]) +// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR]]([[S_INT_TY]]* frozen [[VAR_PRIV]]) // CHECK: call void @__kmpc_for_static_init_4( // CHECK: call void @__kmpc_for_static_fini( // call destructors: var.. -// CHECK-DAG: call {{.+}} [[S_INT_TY_DEF_DESTR]]([[S_INT_TY]]* [[VAR_PRIV]]) +// CHECK-DAG: call {{.+}} [[S_INT_TY_DEF_DESTR]]([[S_INT_TY]]* frozen [[VAR_PRIV]]) // ..and s_arr // CHECK: {{.+}}: // CHECK: [[S_ARR_EL_PAST:%.+]] = phi [[S_INT_TY]]* // CHECK: [[S_ARR_PRIV_ITEM:%.+]] = getelementptr {{.+}}, {{.+}} [[S_ARR_EL_PAST]], -// CHECK: call {{.*}} [[S_INT_TY_DEF_DESTR]]([[S_INT_TY]]* [[S_ARR_PRIV_ITEM]]) +// CHECK: call {{.*}} [[S_INT_TY_DEF_DESTR]]([[S_INT_TY]]* frozen [[S_ARR_PRIV_ITEM]]) // CHECK: ret void diff --git a/clang/test/OpenMP/distribute_private_codegen.cpp b/clang/test/OpenMP/distribute_private_codegen.cpp --- a/clang/test/OpenMP/distribute_private_codegen.cpp +++ b/clang/test/OpenMP/distribute_private_codegen.cpp @@ -79,7 +79,7 @@ #pragma omp teams #pragma omp distribute private(g, g1, svar, sfvar) for (int i = 0; i < 2; ++i) { - // LAMBDA: define{{.*}} internal{{.*}} void [[OMP_OUTLINED]](i32* noalias %{{.+}}, i32* noalias %{{.+}}) + // LAMBDA: define{{.*}} internal{{.*}} void [[OMP_OUTLINED]](i32* frozen noalias %{{.+}}, i32* frozen noalias %{{.+}}) // LAMBDA: [[G_PRIVATE_ADDR:%.+]] = alloca double, // LAMBDA: [[G1_PRIVATE_ADDR:%.+]] = alloca double, // LAMBDA: [[TMP_PRIVATE_ADDR:%.+]] = alloca double*, @@ -103,10 +103,10 @@ // LAMBDA: store i{{[0-9]+}}* [[SVAR_PRIVATE_ADDR]], i{{[0-9]+}}** [[SVAR_PRIVATE_ADDR_REF]] // LAMBDA: [[SFVAR_PRIVATE_ADDR_REF:%.+]] = getelementptr inbounds %{{.+}}, %{{.+}}* [[ARG:%.+]], i{{[0-9]+}} 0, i{{[0-9]+}} 3 // LAMBDA: store float* [[SFVAR_PRIVATE_ADDR]], float** [[SFVAR_PRIVATE_ADDR_REF]] - // LAMBDA: call{{.*}} void [[INNER_LAMBDA:@.+]](%{{.+}}* [[ARG]]) + // LAMBDA: call{{.*}} void [[INNER_LAMBDA:@.+]](%{{.+}}* frozen [[ARG]]) // LAMBDA: call {{.*}}void @__kmpc_for_static_fini( [&]() { - // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* [[ARG_PTR:%.+]]) + // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* frozen [[ARG_PTR:%.+]]) // LAMBDA: store %{{.+}}* [[ARG_PTR]], %{{.+}}** [[ARG_PTR_REF:%.+]], g = 2; g1 = 2; @@ -158,7 +158,7 @@ // CHECK: define{{.*}} i{{[0-9]+}} @main() // CHECK: [[TEST:%.+]] = alloca [[S_FLOAT_TY]], -// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR:@.+]]([[S_FLOAT_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR:@.+]]([[S_FLOAT_TY]]* frozen [[TEST]]) // CHECK: call i{{[0-9]+}} @__tgt_target_teams( // CHECK: call void [[OFFLOAD_FUN:@.+]]( // CHECK: ret @@ -167,7 +167,7 @@ // CHECK: call void (%{{.+}}*, i{{[0-9]+}}, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)*, ...) @__kmpc_fork_teams(%{{.+}}* @{{.+}}, i{{[0-9]+}} 0, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)* bitcast (void (i{{[0-9]+}}*, i{{[0-9]+}}*)* [[OMP_OUTLINED:@.+]] to void // CHECK: ret // -// CHECK: define internal void [[OMP_OUTLINED]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}) +// CHECK: define internal void [[OMP_OUTLINED]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}) // CHECK: [[T_VAR_PRIV:%.+]] = alloca i{{[0-9]+}}, // CHECK: [[VEC_PRIV:%.+]] = alloca [2 x i{{[0-9]+}}], // CHECK: [[S_ARR_PRIV:%.+]] = alloca [2 x [[S_FLOAT_TY]]], @@ -180,17 +180,17 @@ // CHECK-NOT: [[VEC_PRIV]] // CHECK: {{.+}}: // CHECK: [[S_ARR_PRIV_ITEM:%.+]] = phi [[S_FLOAT_TY]]* -// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR]]([[S_FLOAT_TY]]* [[S_ARR_PRIV_ITEM]]) +// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR]]([[S_FLOAT_TY]]* frozen [[S_ARR_PRIV_ITEM]]) // CHECK-NOT: [[T_VAR_PRIV]] // CHECK-NOT: [[VEC_PRIV]] -// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR]]([[S_FLOAT_TY]]* [[VAR_PRIV]]) +// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR]]([[S_FLOAT_TY]]* frozen [[VAR_PRIV]]) // CHECK: call void @__kmpc_for_static_init_4( // CHECK: call void @__kmpc_for_static_fini( // CHECK: ret void // CHECK: define{{.*}} i{{[0-9]+}} [[TMAIN_INT:@.+]]() // CHECK: [[TEST:%.+]] = alloca [[S_INT_TY]], -// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR:@.+]]([[S_INT_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR:@.+]]([[S_INT_TY]]* frozen [[TEST]]) // CHECK: call i{{[0-9]+}} @__tgt_target_teams( // CHECK: call void [[OFFLOAD_FUN_1:@.+]]( // CHECK: ret @@ -200,7 +200,7 @@ // CHECK: call void (%{{.+}}*, i{{[0-9]+}}, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)*, ...) @__kmpc_fork_teams(%{{.+}}* @{{.+}}, i{{[0-9]+}} 0, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)* bitcast (void (i{{[0-9]+}}*, i{{[0-9]+}}*)* [[OMP_OUTLINED_1:@.+]] to void // CHECK: ret // -// CHECK: define internal void [[OMP_OUTLINED_1]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}) +// CHECK: define internal void [[OMP_OUTLINED_1]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}) // CHECK: [[T_VAR_PRIV:%.+]] = alloca i{{[0-9]+}}, // CHECK: [[VEC_PRIV:%.+]] = alloca [2 x i{{[0-9]+}}], // CHECK: [[S_ARR_PRIV:%.+]] = alloca [2 x [[S_INT_TY]]], @@ -212,10 +212,10 @@ // CHECK-NOT: [[VEC_PRIV]] // CHECK: {{.+}}: // CHECK: [[S_ARR_PRIV_ITEM:%.+]] = phi [[S_INT_TY]]* -// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR]]([[S_INT_TY]]* [[S_ARR_PRIV_ITEM]]) +// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR]]([[S_INT_TY]]* frozen [[S_ARR_PRIV_ITEM]]) // CHECK-NOT: [[T_VAR_PRIV]] // CHECK-NOT: [[VEC_PRIV]] -// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR]]([[S_INT_TY]]* [[VAR_PRIV]]) +// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR]]([[S_INT_TY]]* frozen [[VAR_PRIV]]) // CHECK: call void @__kmpc_for_static_init_4( // CHECK: call void @__kmpc_for_static_fini( // CHECK: ret void diff --git a/clang/test/OpenMP/distribute_simd_codegen.cpp b/clang/test/OpenMP/distribute_simd_codegen.cpp --- a/clang/test/OpenMP/distribute_simd_codegen.cpp +++ b/clang/test/OpenMP/distribute_simd_codegen.cpp @@ -85,7 +85,7 @@ } } -// CHECK: define {{.*}}void @{{.+}}(i32* noalias [[GBL_TIDP:%.+]], i32* noalias [[BND_TID:%.+]], float** nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[APTR:%.+]], float** nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[BPTR:%.+]], float** nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[CPTR:%.+]], float** nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[DPTR:%.+]]) +// CHECK: define {{.*}}void @{{.+}}(i32* frozen noalias [[GBL_TIDP:%.+]], i32* frozen noalias [[BND_TID:%.+]], float** frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[APTR:%.+]], float** frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[BPTR:%.+]], float** frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[CPTR:%.+]], float** frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[DPTR:%.+]]) // CHECK: [[TID_ADDR:%.+]] = alloca i32* // CHECK: [[IV:%.+iv]] = alloca i32 // CHECK: [[LB:%.+lb]] = alloca i32 @@ -152,7 +152,7 @@ } } -// CHECK: define {{.*}}void @.omp_outlined.{{.*}}(i32* noalias [[GBL_TIDP:%.+]], i32* noalias [[BND_TID:%.+]], float** nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[APTR:%.+]], float** nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[BPTR:%.+]], float** nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[CPTR:%.+]], float** nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[DPTR:%.+]]) +// CHECK: define {{.*}}void @.omp_outlined.{{.*}}(i32* frozen noalias [[GBL_TIDP:%.+]], i32* frozen noalias [[BND_TID:%.+]], float** frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[APTR:%.+]], float** frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[BPTR:%.+]], float** frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[CPTR:%.+]], float** frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[DPTR:%.+]]) // CHECK: [[TID_ADDR:%.+]] = alloca i32* // CHECK: [[IV:%.+iv]] = alloca i32 // CHECK: [[LB:%.+lb]] = alloca i32 @@ -219,7 +219,7 @@ } } -// CHECK: define {{.*}}void @.omp_outlined.{{.*}}(i32* noalias [[GBL_TIDP:%.+]], i32* noalias [[BND_TID:%.+]], float** nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[APTR:%.+]], float** nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[BPTR:%.+]], float** nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[CPTR:%.+]], float** nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[DPTR:%.+]]) +// CHECK: define {{.*}}void @.omp_outlined.{{.*}}(i32* frozen noalias [[GBL_TIDP:%.+]], i32* frozen noalias [[BND_TID:%.+]], float** frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[APTR:%.+]], float** frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[BPTR:%.+]], float** frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[CPTR:%.+]], float** frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[DPTR:%.+]]) // CHECK: [[TID_ADDR:%.+]] = alloca i32* // CHECK: [[IV:%.+iv]] = alloca i32 // CHECK: [[LB:%.+lb]] = alloca i32 @@ -284,7 +284,7 @@ } // a is passed as a parameter to the outlined functions -// CHECK: define {{.*}}void @.omp_outlined.{{.*}}(i32* noalias [[GBL_TIDP:%.+]], i32* noalias [[BND_TID:%.+]], i8* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[APARM:%.+]]) +// CHECK: define {{.*}}void @.omp_outlined.{{.*}}(i32* frozen noalias [[GBL_TIDP:%.+]], i32* frozen noalias [[BND_TID:%.+]], i8* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[APARM:%.+]]) // CHECK: store i8* [[APARM]], i8** [[APTRADDR:%.+]] // ..many loads of %0.. // CHECK: [[A2:%.+]] = load i8*, i8** [[APTRADDR]] diff --git a/clang/test/OpenMP/distribute_simd_firstprivate_codegen.cpp b/clang/test/OpenMP/distribute_simd_firstprivate_codegen.cpp --- a/clang/test/OpenMP/distribute_simd_firstprivate_codegen.cpp +++ b/clang/test/OpenMP/distribute_simd_firstprivate_codegen.cpp @@ -79,7 +79,7 @@ #pragma omp teams #pragma omp distribute simd firstprivate(g, g1, svar, sfvar) for (int i = 0; i < 2; ++i) { - // LAMBDA: define internal{{.*}} void [[OMP_OUTLINED]](i32* noalias %{{.+}}, i32* noalias %{{.+}}, double*{{.*}} [[G_IN:%.+]], double*{{.+}} [[G1_IN:%.+]], i{{[0-9]+}}*{{.+}} [[SVAR_IN:%.+]], float*{{.+}} [[SFVAR_IN:%.+]]) + // LAMBDA: define internal{{.*}} void [[OMP_OUTLINED]](i32* frozen noalias %{{.+}}, i32* frozen noalias %{{.+}}, double*{{.*}} [[G_IN:%.+]], double*{{.+}} [[G1_IN:%.+]], i{{[0-9]+}}*{{.+}} [[SVAR_IN:%.+]], float*{{.+}} [[SFVAR_IN:%.+]]) // Private alloca's for conversion // LAMBDA: [[G_ADDR:%.+]] = alloca double*, // LAMBDA: [[G1_ADDR:%.+]] = alloca double*, @@ -138,7 +138,7 @@ // LAMBDA-DAG: [[SFVAR_CONV_VAL2:%.+]] = fptrunc double [[SFVAR_ADD]] to float // LAMBDA-DAG: store float [[SFVAR_CONV_VAL2:%.+]], float* [[SFVAR_PRIVATE]], - // call inner lambda (use refs to private alloca's) + // call inner lambda (use alloca's private refs to) // LAMBDA: [[GEP_0:%.+]] = getelementptr{{.+}}, i{{[0-9]+}} 0, i{{[0-9]+}} 0 // LAMBDA: store double* [[G_PRIVATE]], double** [[GEP_0]], // LAMBDA: [[GEP_1:%.+]] = getelementptr{{.+}}, i{{[0-9]+}} 0, i{{[0-9]+}} 1 @@ -151,7 +151,7 @@ // LAMBDA: call{{.*}} void [[INNER_LAMBDA:@.+]](%{{.+}}* {{.+}}) // LAMBDA: call {{.*}}void @__kmpc_for_static_fini( [&]() { - // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* [[ARG_PTR:%.+]]) + // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* frozen [[ARG_PTR:%.+]]) // LAMBDA: store %{{.+}}* [[ARG_PTR]], %{{.+}}** [[ARG_PTR_REF:%.+]], g += 2; g1 += 2; @@ -207,7 +207,7 @@ // CHECK: define{{.*}} i{{[0-9]+}} @main() // CHECK: [[TEST:%.+]] = alloca [[S_FLOAT_TY]], -// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR:@.+]]([[S_FLOAT_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR:@.+]]([[S_FLOAT_TY]]* frozen [[TEST]]) // CHECK: call i{{[0-9]+}} @__tgt_target_teams( // CHECK: call void [[OFFLOAD_FUN:@.+]]( // CHECK: ret @@ -305,7 +305,7 @@ // Template // CHECK: define{{.*}} i{{[0-9]+}} [[TMAIN_INT:@.+]]() // CHECK: [[TEST:%.+]] = alloca [[S_INT_TY]], -// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR:@.+]]([[S_INT_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR:@.+]]([[S_INT_TY]]* frozen [[TEST]]) // CHECK: call i{{[0-9]+}} @__tgt_target_teams( // CHECK: call void [[OFFLOAD_FUN_1:@.+]]( // CHECK: ret diff --git a/clang/test/OpenMP/distribute_simd_lastprivate_codegen.cpp b/clang/test/OpenMP/distribute_simd_lastprivate_codegen.cpp --- a/clang/test/OpenMP/distribute_simd_lastprivate_codegen.cpp +++ b/clang/test/OpenMP/distribute_simd_lastprivate_codegen.cpp @@ -1,31 +1,31 @@ -// RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix LAMBDA --check-prefix LAMBDA-64 -// RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s -// RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix LAMBDA --check-prefix LAMBDA-64 -// RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix LAMBDA --check-prefix LAMBDA-32 -// RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s -// RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix LAMBDA --check-prefix LAMBDA-32 - -// RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck --check-prefix SIMD-ONLY0 %s -// RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s -// RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck --check-prefix SIMD-ONLY0 %s -// RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck --check-prefix SIMD-ONLY0 %s -// RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s -// RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck --check-prefix SIMD-ONLY0 %s +// RUN: %clang_cc1 -disable-frozen-args -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix LAMBDA --check-prefix LAMBDA-64 +// RUN: %clang_cc1 -disable-frozen-args -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -DLAMBDA -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix LAMBDA --check-prefix LAMBDA-64 +// RUN: %clang_cc1 -disable-frozen-args -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix LAMBDA --check-prefix LAMBDA-32 +// RUN: %clang_cc1 -disable-frozen-args -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix LAMBDA --check-prefix LAMBDA-32 + +// RUN: %clang_cc1 -disable-frozen-args -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck --check-prefix SIMD-ONLY0 %s +// RUN: %clang_cc1 -disable-frozen-args -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -DLAMBDA -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck --check-prefix SIMD-ONLY0 %s +// RUN: %clang_cc1 -disable-frozen-args -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck --check-prefix SIMD-ONLY0 %s +// RUN: %clang_cc1 -disable-frozen-args -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck --check-prefix SIMD-ONLY0 %s // SIMD-ONLY0-NOT: {{__kmpc|__tgt}} -// RUN: %clang_cc1 -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix CHECK --check-prefix CHECK-64 -// RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix CHECK --check-prefix CHECK-64 -// RUN: %clang_cc1 -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix CHECK --check-prefix CHECK-32 -// RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix CHECK --check-prefix CHECK-32 - -// RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck --check-prefix SIMD-ONLY1 %s -// RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck --check-prefix SIMD-ONLY1 %s -// RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck --check-prefix SIMD-ONLY1 %s -// RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck --check-prefix SIMD-ONLY1 %s +// RUN: %clang_cc1 -disable-frozen-args -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix CHECK --check-prefix CHECK-64 +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix CHECK --check-prefix CHECK-64 +// RUN: %clang_cc1 -disable-frozen-args -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix CHECK --check-prefix CHECK-32 +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix CHECK --check-prefix CHECK-32 + +// RUN: %clang_cc1 -disable-frozen-args -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck --check-prefix SIMD-ONLY1 %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck --check-prefix SIMD-ONLY1 %s +// RUN: %clang_cc1 -disable-frozen-args -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck --check-prefix SIMD-ONLY1 %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck --check-prefix SIMD-ONLY1 %s // SIMD-ONLY1-NOT: {{__kmpc|__tgt}} // expected-no-diagnostics #ifndef HEADER diff --git a/clang/test/OpenMP/distribute_simd_loop_messages.cpp b/clang/test/OpenMP/distribute_simd_loop_messages.cpp --- a/clang/test/OpenMP/distribute_simd_loop_messages.cpp +++ b/clang/test/OpenMP/distribute_simd_loop_messages.cpp @@ -202,7 +202,7 @@ for (ii = 0; ii < 10; ++ ++ ii) c[ii] = a[ii]; - // Ok but undefined behavior (in general, cannot check that incr + // Ok but undefined behavior (in frozen general, cannot check incr that // is really loop-invariant). #pragma omp target #pragma omp teams diff --git a/clang/test/OpenMP/distribute_simd_private_codegen.cpp b/clang/test/OpenMP/distribute_simd_private_codegen.cpp --- a/clang/test/OpenMP/distribute_simd_private_codegen.cpp +++ b/clang/test/OpenMP/distribute_simd_private_codegen.cpp @@ -79,7 +79,7 @@ #pragma omp teams #pragma omp distribute simd private(g, g1, svar, sfvar) for (int i = 0; i < 2; ++i) { - // LAMBDA: define{{.*}} internal{{.*}} void [[OMP_OUTLINED]](i32* noalias %{{.+}}, i32* noalias %{{.+}}) + // LAMBDA: define{{.*}} internal{{.*}} void [[OMP_OUTLINED]](i32* frozen noalias %{{.+}}, i32* frozen noalias %{{.+}}) // LAMBDA: [[G_PRIVATE_ADDR:%.+]] = alloca double, // LAMBDA: [[G1_PRIVATE_ADDR:%.+]] = alloca double, // LAMBDA: [[TMP_PRIVATE_ADDR:%.+]] = alloca double*, @@ -103,10 +103,10 @@ // LAMBDA: store i{{[0-9]+}}* [[SVAR_PRIVATE_ADDR]], i{{[0-9]+}}** [[SVAR_PRIVATE_ADDR_REF]] // LAMBDA: [[SFVAR_PRIVATE_ADDR_REF:%.+]] = getelementptr inbounds %{{.+}}, %{{.+}}* [[ARG:%.+]], i{{[0-9]+}} 0, i{{[0-9]+}} 3 // LAMBDA: store float* [[SFVAR_PRIVATE_ADDR]], float** [[SFVAR_PRIVATE_ADDR_REF]] - // LAMBDA: call{{.*}} void [[INNER_LAMBDA:@.+]](%{{.+}}* [[ARG]]) + // LAMBDA: call{{.*}} void [[INNER_LAMBDA:@.+]](%{{.+}}* frozen [[ARG]]) // LAMBDA: call {{.*}}void @__kmpc_for_static_fini( [&]() { - // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* [[ARG_PTR:%.+]]) + // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* frozen [[ARG_PTR:%.+]]) // LAMBDA: store %{{.+}}* [[ARG_PTR]], %{{.+}}** [[ARG_PTR_REF:%.+]], g = 2; g1 = 2; @@ -158,7 +158,7 @@ // CHECK: define{{.*}} i{{[0-9]+}} @main() // CHECK: [[TEST:%.+]] = alloca [[S_FLOAT_TY]], -// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR:@.+]]([[S_FLOAT_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR:@.+]]([[S_FLOAT_TY]]* frozen [[TEST]]) // CHECK: call i{{[0-9]+}} @__tgt_target_teams( // CHECK: call void [[OFFLOAD_FUN:@.+]]( // CHECK: ret @@ -167,7 +167,7 @@ // CHECK: call void (%{{.+}}*, i{{[0-9]+}}, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)*, ...) @__kmpc_fork_teams(%{{.+}}* @{{.+}}, i{{[0-9]+}} 0, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)* bitcast (void (i{{[0-9]+}}*, i{{[0-9]+}}*)* [[OMP_OUTLINED:@.+]] to void // CHECK: ret // -// CHECK: define internal void [[OMP_OUTLINED]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}) +// CHECK: define internal void [[OMP_OUTLINED]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}) // CHECK: [[T_VAR_PRIV:%.+]] = alloca i{{[0-9]+}}, // CHECK: [[VEC_PRIV:%.+]] = alloca [2 x i{{[0-9]+}}], // CHECK: [[S_ARR_PRIV:%.+]] = alloca [2 x [[S_FLOAT_TY]]], @@ -180,17 +180,17 @@ // CHECK-NOT: [[VEC_PRIV]] // CHECK: {{.+}}: // CHECK: [[S_ARR_PRIV_ITEM:%.+]] = phi [[S_FLOAT_TY]]* -// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR]]([[S_FLOAT_TY]]* [[S_ARR_PRIV_ITEM]]) +// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR]]([[S_FLOAT_TY]]* frozen [[S_ARR_PRIV_ITEM]]) // CHECK-NOT: [[T_VAR_PRIV]] // CHECK-NOT: [[VEC_PRIV]] -// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR]]([[S_FLOAT_TY]]* [[VAR_PRIV]]) +// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR]]([[S_FLOAT_TY]]* frozen [[VAR_PRIV]]) // CHECK: call void @__kmpc_for_static_init_4( // CHECK: call void @__kmpc_for_static_fini( // CHECK: ret void // CHECK: define{{.*}} i{{[0-9]+}} [[TMAIN_INT:@.+]]() // CHECK: [[TEST:%.+]] = alloca [[S_INT_TY]], -// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR:@.+]]([[S_INT_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR:@.+]]([[S_INT_TY]]* frozen [[TEST]]) // CHECK: call i{{[0-9]+}} @__tgt_target_teams( // CHECK: call void [[OFFLOAD_FUN_1:@.+]]( // CHECK: ret @@ -200,7 +200,7 @@ // CHECK: call void (%{{.+}}*, i{{[0-9]+}}, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)*, ...) @__kmpc_fork_teams(%{{.+}}* @{{.+}}, i{{[0-9]+}} 0, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)* bitcast (void (i{{[0-9]+}}*, i{{[0-9]+}}*)* [[OMP_OUTLINED_1:@.+]] to void // CHECK: ret // -// CHECK: define internal void [[OMP_OUTLINED_1]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}) +// CHECK: define internal void [[OMP_OUTLINED_1]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}) // CHECK: [[T_VAR_PRIV:%.+]] = alloca i{{[0-9]+}}, // CHECK: [[VEC_PRIV:%.+]] = alloca [2 x i{{[0-9]+}}], // CHECK: [[S_ARR_PRIV:%.+]] = alloca [2 x [[S_INT_TY]]], @@ -212,10 +212,10 @@ // CHECK-NOT: [[VEC_PRIV]] // CHECK: {{.+}}: // CHECK: [[S_ARR_PRIV_ITEM:%.+]] = phi [[S_INT_TY]]* -// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR]]([[S_INT_TY]]* [[S_ARR_PRIV_ITEM]]) +// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR]]([[S_INT_TY]]* frozen [[S_ARR_PRIV_ITEM]]) // CHECK-NOT: [[T_VAR_PRIV]] // CHECK-NOT: [[VEC_PRIV]] -// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR]]([[S_INT_TY]]* [[VAR_PRIV]]) +// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR]]([[S_INT_TY]]* frozen [[VAR_PRIV]]) // CHECK: call void @__kmpc_for_static_init_4( // CHECK: call void @__kmpc_for_static_fini( // CHECK: ret void diff --git a/clang/test/OpenMP/distribute_simd_reduction_codegen.cpp b/clang/test/OpenMP/distribute_simd_reduction_codegen.cpp --- a/clang/test/OpenMP/distribute_simd_reduction_codegen.cpp +++ b/clang/test/OpenMP/distribute_simd_reduction_codegen.cpp @@ -53,7 +53,7 @@ #pragma omp teams #pragma omp distribute simd reduction(+: sivar) for (int i = 0; i < 2; ++i) { - // LAMBDA: define{{.*}} internal{{.*}} void @[[LOFFL1]](i{{64|32}} [[SIVAR_ARG:%.+]]) + // LAMBDA: define{{.*}} internal{{.*}} void @[[LOFFL1]](i{{64|32}} frozen [[SIVAR_ARG:%.+]]) // LAMBDA: [[SIVAR_ADDR:%.+]] = alloca i{{.+}}, // LAMBDA: store{{.+}} [[SIVAR_ARG]], {{.+}} [[SIVAR_ADDR]], // LAMBDA: [[SIVAR_CONV:%.+]] = bitcast{{.+}} [[SIVAR_ADDR]] to @@ -96,7 +96,7 @@ sivar += i; [&]() { - // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* [[ARG_PTR:%.+]]) + // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* frozen [[ARG_PTR:%.+]]) // LAMBDA: store %{{.+}}* [[ARG_PTR]], %{{.+}}** [[ARG_PTR_REF:%.+]], sivar += 4; @@ -124,11 +124,11 @@ // CHECK: define {{.*}}i{{[0-9]+}} @main() // CHECK: call i32 @__tgt_target_teams(i64 -1, i8* @{{[^,]+}}, i32 1, i8** %{{[^,]+}}, i8** %{{[^,]+}}, i{{64|32}}* {{.+}}@{{[^,]+}}, i32 0, i32 0), i64* {{.+}}@{{[^,]+}}, i32 0, i32 0), i32 0, i32 1) -// CHECK: call void @[[OFFL1:.+]](i{{64|32}} %{{.+}}) +// CHECK: call void @[[OFFL1:.+]](i{{64|32}} frozen %{{.+}}) // CHECK: {{%.+}} = call{{.*}} i32 @[[TMAIN_INT:.+]]() // CHECK: ret -// CHECK: define{{.*}} void @[[OFFL1]](i{{64|32}} [[SIVAR_ARG:%.+]]) +// CHECK: define{{.*}} void @[[OFFL1]](i{{64|32}} frozen [[SIVAR_ARG:%.+]]) // CHECK: [[SIVAR_ADDR:%.+]] = alloca i{{.+}}, // CHECK: store{{.+}} [[SIVAR_ARG]], {{.+}} [[SIVAR_ADDR]], // CHECK-64: [[SIVAR_CONV:%.+]] = bitcast{{.+}} [[SIVAR_ADDR]] to @@ -173,7 +173,7 @@ // CHECK: call void @[[TOFFL1:.+]]({{.+}}) // CHECK: ret -// CHECK: define{{.*}} void @[[TOFFL1]](i{{64|32}} [[TVAR_ARG:%.+]]) +// CHECK: define{{.*}} void @[[TOFFL1]](i{{64|32}} frozen [[TVAR_ARG:%.+]]) // CHECK: [[TVAR_ADDR:%.+]] = alloca i{{.+}}, // CHECK: store{{.+}} [[TVAR_ARG]], {{.+}} [[TVAR_ADDR]], // CHECK-64: [[TVAR_CONV:%.+]] = bitcast{{.+}} [[TVAR_ADDR]] to diff --git a/clang/test/OpenMP/for_codegen.cpp b/clang/test/OpenMP/for_codegen.cpp --- a/clang/test/OpenMP/for_codegen.cpp +++ b/clang/test/OpenMP/for_codegen.cpp @@ -543,7 +543,7 @@ #pragma omp for schedule(static, 5) // TERM_DEBUG-NOT: __kmpc_global_thread_num // TERM_DEBUG: call void @__kmpc_for_static_init_4u({{.+}}), !dbg [[DBG_LOC:![0-9]+]] - // TERM_DEBUG: invoke i32 {{.*}}foo{{.*}}() + // TERM_DEBUG: invoke frozen i32 {{.*}}foo{{.*}}() // TERM_DEBUG: unwind label %[[TERM_LPAD:.+]], // TERM_DEBUG-NOT: __kmpc_global_thread_num // TERM_DEBUG: call void @__kmpc_for_static_fini({{.+}}), !dbg [[DBG_LOC]] diff --git a/clang/test/OpenMP/for_firstprivate_codegen.cpp b/clang/test/OpenMP/for_firstprivate_codegen.cpp --- a/clang/test/OpenMP/for_firstprivate_codegen.cpp +++ b/clang/test/OpenMP/for_firstprivate_codegen.cpp @@ -67,7 +67,7 @@ // CHECK: [[SIVAR:@.+]] = internal global i{{[0-9]+}} 0, // CHECK-DAG: [[IMPLICIT_BARRIER_LOC:@.+]] = private unnamed_addr global %{{.+}} { i32 0, i32 66, i32 0, i32 0, i8* -// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR:@.+]]([[S_FLOAT_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR:@.+]]([[S_FLOAT_TY]]* frozen [[TEST]]) // CHECK: ([[S_FLOAT_TY]]*)* [[S_FLOAT_TY_DESTR:@[^ ]+]] {{[^,]+}}, {{.+}}([[S_FLOAT_TY]]* [[TEST]] int main() { static int sivar; @@ -81,7 +81,7 @@ #pragma omp parallel #pragma omp for firstprivate(g, g1, sivar) for (int i = 0; i < 2; ++i) { - // LAMBDA: define{{.*}} internal{{.*}} void [[OMP_REGION]](i32* noalias %{{.+}}, i32* noalias %{{.+}}, i32* nonnull align 4 dereferenceable(4) [[SIVAR_REF:%.+]]) + // LAMBDA: define{{.*}} internal{{.*}} void [[OMP_REGION]](i32* frozen noalias %{{.+}}, i32* frozen noalias %{{.+}}, i32* frozen nonnull align 4 dereferenceable(4) [[SIVAR_REF:%.+]]) // Skip temp vars for loop // LAMBDA: alloca i{{[0-9]+}}, // LAMBDA: alloca i{{[0-9]+}}, @@ -121,11 +121,11 @@ // LAMBDA: store i{{[0-9]+}}* [[G1_PRIVATE_ADDR]], i{{[0-9]+}}** [[G1_PRIVATE_ADDR_REF]] // LAMBDA: [[SIVAR_PRIVATE_ADDR_REF:%.+]] = getelementptr inbounds %{{.+}}, %{{.+}}* [[ARG:%.+]], i{{[0-9]+}} 0, i{{[0-9]+}} 2 // LAMBDA: store i{{[0-9]+}}* [[SIVAR2_PRIVATE_ADDR]], i{{[0-9]+}}** [[SIVAR_PRIVATE_ADDR_REF]] - // LAMBDA: call void [[INNER_LAMBDA:@.+]](%{{.+}}* [[ARG]]) + // LAMBDA: call void [[INNER_LAMBDA:@.+]](%{{.+}}* frozen [[ARG]]) // LAMBDA: call void @__kmpc_for_static_fini( // LAMBDA: call void @__kmpc_barrier( [&]() { - // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* [[ARG_PTR:%.+]]) + // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* frozen [[ARG_PTR:%.+]]) // LAMBDA: store %{{.+}}* [[ARG_PTR]], %{{.+}}** [[ARG_PTR_REF:%.+]], g = 4; g1 = 5; @@ -155,7 +155,7 @@ #pragma omp parallel #pragma omp for firstprivate(g, g1, sivar) for (int i = 0; i < 2; ++i) { - // BLOCKS: define{{.*}} internal{{.*}} void [[OMP_REGION]](i32* noalias %{{.+}}, i32* noalias %{{.+}}, i32* nonnull align 4 dereferenceable(4) [[SIVAR_REF:%.+]]) + // BLOCKS: define{{.*}} internal{{.*}} void [[OMP_REGION]](i32* frozen noalias %{{.+}}, i32* frozen noalias %{{.+}}, i32* frozen nonnull align 4 dereferenceable(4) [[SIVAR_REF:%.+]]) // Skip temp vars for loop // BLOCKS: alloca i{{[0-9]+}}, // BLOCKS: alloca i{{[0-9]+}}, @@ -250,15 +250,15 @@ // CHECK: br i1 [[IS_EMPTY]], label %[[S_ARR_BODY_DONE:.+]], label %[[S_ARR_BODY:.+]] // CHECK: [[S_ARR_BODY]] // CHECK: getelementptr inbounds ([2 x [[S_FLOAT_TY]]], [2 x [[S_FLOAT_TY]]]* [[S_ARR]], i{{[0-9]+}} 0, i{{[0-9]+}} 0) -// CHECK: call {{.*}} [[ST_TY_DEFAULT_CONSTR:@.+]]([[ST_TY]]* [[ST_TY_TEMP:%.+]]) -// CHECK: call {{.*}} [[S_FLOAT_TY_COPY_CONSTR:@.+]]([[S_FLOAT_TY]]* {{.+}}, [[S_FLOAT_TY]]* {{.+}}, [[ST_TY]]* [[ST_TY_TEMP]]) -// CHECK: call {{.*}} [[ST_TY_DESTR:@.+]]([[ST_TY]]* [[ST_TY_TEMP]]) +// CHECK: call {{.*}} [[ST_TY_DEFAULT_CONSTR:@.+]]([[ST_TY]]* frozen [[ST_TY_TEMP:%.+]]) +// CHECK: call {{.*}} [[S_FLOAT_TY_COPY_CONSTR:@.+]]([[S_FLOAT_TY]]* {{.+}}, [[S_FLOAT_TY]]* {{.+}}, [[ST_TY]]* frozen [[ST_TY_TEMP]]) +// CHECK: call {{.*}} [[ST_TY_DESTR:@.+]]([[ST_TY]]* frozen [[ST_TY_TEMP]]) // CHECK: br i1 {{.+}}, label %{{.+}}, label %[[S_ARR_BODY]] // firstprivate var(var) -// CHECK: call {{.*}} [[ST_TY_DEFAULT_CONSTR]]([[ST_TY]]* [[ST_TY_TEMP:%.+]]) -// CHECK: call {{.*}} [[S_FLOAT_TY_COPY_CONSTR]]([[S_FLOAT_TY]]* [[VAR_PRIV]], [[S_FLOAT_TY]]* {{.*}} [[VAR]], [[ST_TY]]* [[ST_TY_TEMP]]) -// CHECK: call {{.*}} [[ST_TY_DESTR]]([[ST_TY]]* [[ST_TY_TEMP]]) +// CHECK: call {{.*}} [[ST_TY_DEFAULT_CONSTR]]([[ST_TY]]* frozen [[ST_TY_TEMP:%.+]]) +// CHECK: call {{.*}} [[S_FLOAT_TY_COPY_CONSTR]]([[S_FLOAT_TY]]* frozen [[VAR_PRIV]], [[S_FLOAT_TY]]* {{.*}} [[VAR]], [[ST_TY]]* frozen [[ST_TY_TEMP]]) +// CHECK: call {{.*}} [[ST_TY_DESTR]]([[ST_TY]]* frozen [[ST_TY_TEMP]]) // firstprivate (sivar) // CHECK: [[SIVAR_VAL:%.+]] = load i{{[0-9]+}}, i{{[0-9]+}}* [[SIVAR]] @@ -271,7 +271,7 @@ // CHECK: call void @__kmpc_for_static_fini( // ~(firstprivate var), ~(firstprivate s_arr) -// CHECK-DAG: call {{.*}} [[S_FLOAT_TY_DESTR]]([[S_FLOAT_TY]]* [[VAR_PRIV]]) +// CHECK-DAG: call {{.*}} [[S_FLOAT_TY_DESTR]]([[S_FLOAT_TY]]* frozen [[VAR_PRIV]]) // CHECK-DAG: call {{.*}} [[S_FLOAT_TY_DESTR]]([[S_FLOAT_TY]]* // CHECK: call void @__kmpc_barrier(%{{.+}}* [[IMPLICIT_BARRIER_LOC]], i{{[0-9]+}} [[GTID]]) @@ -282,12 +282,12 @@ // CHECK: define {{.*}} i{{[0-9]+}} [[TMAIN_INT]]() // CHECK: [[TEST:%.+]] = alloca [[S_INT_TY]], // CHECK: [[TVAR:%.+]] = alloca i32, -// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR:@.+]]([[S_INT_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR:@.+]]([[S_INT_TY]]* frozen [[TEST]]) // CHECK: call void (%{{.+}}*, i{{[0-9]+}}, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)*, ...) @__kmpc_fork_call(%{{.+}}* @{{.+}}, i{{[0-9]+}} 4, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)* bitcast (void (i{{[0-9]+}}*, i{{[0-9]+}}*, i32*, [2 x i32]*, [2 x [[S_INT_TY]]]*, [[S_INT_TY]]*)* [[TMAIN_MICROTASK:@.+]] to void (i32*, i32*, ...)*), i32* [[TVAR]], // CHECK: call {{.*}} [[S_INT_TY_DESTR:@.+]]([[S_INT_TY]]* // CHECK: ret // -// CHECK: define internal void [[TMAIN_MICROTASK]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}, i32* nonnull align 4 dereferenceable(4) %{{.+}}, [2 x i32]* nonnull align 4 dereferenceable(8) %{{.+}}, [2 x [[S_INT_TY]]]* nonnull align 4 dereferenceable(8) %{{.+}}, [[S_INT_TY]]* nonnull align 4 dereferenceable(4) %{{.+}}) +// CHECK: define internal void [[TMAIN_MICROTASK]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}, i32* frozen nonnull align 4 dereferenceable(4) %{{.+}}, [2 x i32]* frozen nonnull align 4 dereferenceable(8) %{{.+}}, [2 x [[S_INT_TY]]]* frozen nonnull align 4 dereferenceable(8) %{{.+}}, [[S_INT_TY]]* frozen nonnull align 4 dereferenceable(4) %{{.+}}) // Skip temp vars for loop // CHECK: alloca i{{[0-9]+}}, // CHECK: alloca i{{[0-9]+}}, @@ -317,16 +317,16 @@ // CHECK: [[IS_EMPTY:%.+]] = icmp eq [[S_INT_TY]]* [[S_ARR_PRIV_BEGIN]], [[S_ARR_PRIV_END]] // CHECK: br i1 [[IS_EMPTY]], label %[[S_ARR_BODY_DONE:.+]], label %[[S_ARR_BODY:.+]] // CHECK: [[S_ARR_BODY]] -// CHECK: call {{.*}} [[ST_TY_DEFAULT_CONSTR:@.+]]([[ST_TY]]* [[ST_TY_TEMP:%.+]]) -// CHECK: call {{.*}} [[S_INT_TY_COPY_CONSTR:@.+]]([[S_INT_TY]]* {{.+}}, [[S_INT_TY]]* {{.+}}, [[ST_TY]]* [[ST_TY_TEMP]]) -// CHECK: call {{.*}} [[ST_TY_DESTR:@.+]]([[ST_TY]]* [[ST_TY_TEMP]]) +// CHECK: call {{.*}} [[ST_TY_DEFAULT_CONSTR:@.+]]([[ST_TY]]* frozen [[ST_TY_TEMP:%.+]]) +// CHECK: call {{.*}} [[S_INT_TY_COPY_CONSTR:@.+]]([[S_INT_TY]]* {{.+}}, [[S_INT_TY]]* {{.+}}, [[ST_TY]]* frozen [[ST_TY_TEMP]]) +// CHECK: call {{.*}} [[ST_TY_DESTR:@.+]]([[ST_TY]]* frozen [[ST_TY_TEMP]]) // CHECK: br i1 {{.+}}, label %{{.+}}, label %[[S_ARR_BODY]] // firstprivate var(var) // CHECK: [[VAR_REF:%.+]] = load [[S_INT_TY]]*, [[S_INT_TY]]** % -// CHECK: call {{.*}} [[ST_TY_DEFAULT_CONSTR]]([[ST_TY]]* [[ST_TY_TEMP:%.+]]) -// CHECK: call {{.*}} [[S_INT_TY_COPY_CONSTR]]([[S_INT_TY]]* [[VAR_PRIV]], [[S_INT_TY]]* {{.*}} [[VAR_REF]], [[ST_TY]]* [[ST_TY_TEMP]]) -// CHECK: call {{.*}} [[ST_TY_DESTR]]([[ST_TY]]* [[ST_TY_TEMP]]) +// CHECK: call {{.*}} [[ST_TY_DEFAULT_CONSTR]]([[ST_TY]]* frozen [[ST_TY_TEMP:%.+]]) +// CHECK: call {{.*}} [[S_INT_TY_COPY_CONSTR]]([[S_INT_TY]]* frozen [[VAR_PRIV]], [[S_INT_TY]]* {{.*}} [[VAR_REF]], [[ST_TY]]* frozen [[ST_TY_TEMP]]) +// CHECK: call {{.*}} [[ST_TY_DESTR]]([[ST_TY]]* frozen [[ST_TY_TEMP]]) // No synchronization for initialization. // CHECK-NOT: call void @__kmpc_barrier( @@ -335,7 +335,7 @@ // CHECK: call void @__kmpc_for_static_fini( // ~(firstprivate var), ~(firstprivate s_arr) -// CHECK-DAG: call {{.*}} [[S_INT_TY_DESTR]]([[S_INT_TY]]* [[VAR_PRIV]]) +// CHECK-DAG: call {{.*}} [[S_INT_TY_DESTR]]([[S_INT_TY]]* frozen [[VAR_PRIV]]) // CHECK-DAG: call {{.*}} [[S_INT_TY_DESTR]]([[S_INT_TY]]* // CHECK: [[GTID_REF:%.+]] = load i{{[0-9]+}}*, i{{[0-9]+}}** [[GTID_ADDR_ADDR]] // CHECK: [[GTID:%.+]] = load i{{[0-9]+}}, i{{[0-9]+}}* [[GTID_REF]] diff --git a/clang/test/OpenMP/for_lastprivate_codegen.cpp b/clang/test/OpenMP/for_lastprivate_codegen.cpp --- a/clang/test/OpenMP/for_lastprivate_codegen.cpp +++ b/clang/test/OpenMP/for_lastprivate_codegen.cpp @@ -235,7 +235,7 @@ // LAMBDA: call void @__kmpc_for_static_fini(% // LAMBDA: ret - // LAMBDA: define internal void [[SS_MICROTASK]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}, [[SS_TY]]* %{{.+}}) + // LAMBDA: define internal void [[SS_MICROTASK]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}, [[SS_TY]]* frozen %{{.+}}) // LAMBDA: getelementptr {{.*}}[[SS_TY]], [[SS_TY]]* %{{.*}}, i32 0, i32 0 // LAMBDA-NOT: getelementptr {{.*}}[[SS_TY]], [[SS_TY]]* %{{.*}}, i32 0, i32 1 // LAMBDA: getelementptr {{.*}}[[SS_TY]], [[SS_TY]]* %{{.*}}, i32 0, i32 2 @@ -249,7 +249,7 @@ // LAMBDA: br label // LAMBDA: ret void - // LAMBDA: define internal void @{{.+}}(i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}, [[SS_TY]]* %{{.+}}, i32* {{.+}}, i32* {{.+}}, i32* {{.+}}) + // LAMBDA: define internal void @{{.+}}(i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}, [[SS_TY]]* frozen %{{.+}}, i32* {{.+}}, i32* {{.+}}, i32* {{.+}}) // LAMBDA: alloca i{{[0-9]+}}, // LAMBDA: alloca i{{[0-9]+}}, // LAMBDA: alloca i{{[0-9]+}}, @@ -278,10 +278,10 @@ // LAMBDA: br label // LAMBDA: ret void - // LAMBDA: define internal void @{{.+}}(i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}, [[SS_TY]]* %{{.+}}) + // LAMBDA: define internal void @{{.+}}(i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}, [[SS_TY]]* frozen %{{.+}}) // LAMBDA: ret void - // LAMBDA: define{{.*}} internal{{.*}} void [[OMP_REGION]](i32* noalias %{{.+}}, i32* noalias %{{.+}}, i32* nonnull align 4 dereferenceable(4) [[SIVAR:%.+]]) + // LAMBDA: define{{.*}} internal{{.*}} void [[OMP_REGION]](i32* frozen noalias %{{.+}}, i32* frozen noalias %{{.+}}, i32* frozen nonnull align 4 dereferenceable(4) [[SIVAR:%.+]]) // LAMBDA: alloca i{{[0-9]+}}, // LAMBDA: alloca i{{[0-9]+}}, // LAMBDA: alloca i{{[0-9]+}}, @@ -308,7 +308,7 @@ // LAMBDA: store i{{[0-9]+}}* [[G1_PRIVATE_ADDR]], i{{[0-9]+}}** [[G1_PRIVATE_ADDR_REF]] // LAMBDA: [[SIVAR_PRIVATE_ADDR_REF:%.+]] = getelementptr inbounds %{{.+}}, %{{.+}}* [[ARG:%.+]], i{{[0-9]+}} 0, i{{[0-9]+}} 2 // LAMBDA: store i{{[0-9]+}}* [[SIVAR_PRIVATE_ADDR]], i{{[0-9]+}}** [[SIVAR_PRIVATE_ADDR_REF]] - // LAMBDA: call void [[INNER_LAMBDA:@.+]](%{{.+}}* [[ARG]]) + // LAMBDA: call void [[INNER_LAMBDA:@.+]](%{{.+}}* frozen [[ARG]]) // LAMBDA: call void @__kmpc_for_static_fini(%{{.+}}* @{{.+}}, i32 [[GTID]]) g = 1; g1 = 1; @@ -331,7 +331,7 @@ // LAMBDA: [[LAST_DONE]] // LAMBDA: call void @__kmpc_barrier(%{{.+}}* @{{.+}}, i{{[0-9]+}} [[GTID]]) [&]() { - // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* [[ARG_PTR:%.+]]) + // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* frozen [[ARG_PTR:%.+]]) // LAMBDA: store %{{.+}}* [[ARG_PTR]], %{{.+}}** [[ARG_PTR_REF:%.+]], g = 2; g1 = 2; @@ -361,7 +361,7 @@ #pragma omp parallel #pragma omp for lastprivate(g, g1, sivar) for (int i = 0; i < 2; ++i) { - // BLOCKS: define{{.*}} internal{{.*}} void [[OMP_REGION]](i32* noalias %{{.+}}, i32* noalias %{{.+}}, i32* nonnull align 4 dereferenceable(4) [[SIVAR:%.+]]) + // BLOCKS: define{{.*}} internal{{.*}} void [[OMP_REGION]](i32* frozen noalias %{{.+}}, i32* frozen noalias %{{.+}}, i32* frozen nonnull align 4 dereferenceable(4) [[SIVAR:%.+]]) // BLOCKS: alloca i{{[0-9]+}}, // BLOCKS: alloca i{{[0-9]+}}, // BLOCKS: alloca i{{[0-9]+}}, @@ -430,7 +430,7 @@ // BLOCKS: call void @__kmpc_for_static_fini(% // BLOCKS: ret -// BLOCKS: define internal void [[SS_MICROTASK]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}, [[SS_TY]]* %{{.+}}) +// BLOCKS: define internal void [[SS_MICROTASK]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}, [[SS_TY]]* frozen %{{.+}}) // BLOCKS: getelementptr {{.*}}[[SS_TY]], [[SS_TY]]* %{{.*}}, i32 0, i32 0 // BLOCKS-NOT: getelementptr {{.*}}[[SS_TY]], [[SS_TY]]* %{{.*}}, i32 0, i32 1 // BLOCKS: getelementptr {{.*}}[[SS_TY]], [[SS_TY]]* %{{.*}}, i32 0, i32 2 @@ -444,7 +444,7 @@ // BLOCKS: br label // BLOCKS: ret void -// BLOCKS: define internal void @{{.+}}(i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}, [[SS_TY]]* %{{.+}}, i32* {{.+}}, i32* {{.+}}, i32* {{.+}}) +// BLOCKS: define internal void @{{.+}}(i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}, [[SS_TY]]* frozen %{{.+}}, i32* {{.+}}, i32* {{.+}}, i32* {{.+}}) // BLOCKS: alloca i{{[0-9]+}}, // BLOCKS: alloca i{{[0-9]+}}, // BLOCKS: alloca i{{[0-9]+}}, @@ -505,9 +505,9 @@ #endif } -// CHECK: define i{{[0-9]+}} @main() +// CHECK: define frozen i{{[0-9]+}} @main() // CHECK: [[TEST:%.+]] = alloca [[S_FLOAT_TY]], -// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR:@.+]]([[S_FLOAT_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR:@.+]]([[S_FLOAT_TY]]* frozen [[TEST]]) // CHECK: call void (%{{.+}}*, i{{[0-9]+}}, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)*, ...) @__kmpc_fork_call(%{{.+}}* @{{.+}}, i{{[0-9]+}} 5, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)* bitcast (void (i{{[0-9]+}}*, i{{[0-9]+}}*, i32*, [2 x i32]*, [2 x [[S_FLOAT_TY]]]*, [[S_FLOAT_TY]]*, i32*)* [[MAIN_MICROTASK:@.+]] to void // CHECK: call void (%{{.+}}*, i{{[0-9]+}}, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)*, ...) @__kmpc_fork_call(%{{.+}}* @{{.+}}, i{{[0-9]+}} 0, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)* bitcast (void (i{{[0-9]+}}*, i{{[0-9]+}}*)* [[MAIN_MICROTASK1:@.+]] to void // CHECK: call void (%{{.+}}*, i{{[0-9]+}}, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)*, ...) @__kmpc_fork_call(%{{.+}}* @{{.+}}, i{{[0-9]+}} 0, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)* bitcast (void (i{{[0-9]+}}*, i{{[0-9]+}}*)* [[MAIN_MICROTASK2:@.+]] to void @@ -516,7 +516,7 @@ // CHECK: call void [[S_FLOAT_TY_DESTR:@.+]]([[S_FLOAT_TY]]* // CHECK: ret -// CHECK: define internal void [[MAIN_MICROTASK]](i32* noalias [[GTID_ADDR:%.+]], i32* noalias %{{.+}}, i32* nonnull align 4 dereferenceable(4) %{{.+}}, [2 x i32]* nonnull align 4 dereferenceable(8) %{{.+}}, [2 x [[S_FLOAT_TY]]]* nonnull align 4 dereferenceable(8) %{{.+}}, [[S_FLOAT_TY]]* nonnull align 4 dereferenceable(4) %{{.+}}) +// CHECK: define internal void [[MAIN_MICROTASK]](i32* frozen noalias [[GTID_ADDR:%.+]], i32* frozen noalias %{{.+}}, i32* frozen nonnull align 4 dereferenceable(4) %{{.+}}, [2 x i32]* frozen nonnull align 4 dereferenceable(8) %{{.+}}, [2 x [[S_FLOAT_TY]]]* frozen nonnull align 4 dereferenceable(8) %{{.+}}, [[S_FLOAT_TY]]* frozen nonnull align 4 dereferenceable(4) %{{.+}}) // CHECK: alloca i{{[0-9]+}}, // CHECK: alloca i{{[0-9]+}}, // CHECK: alloca i{{[0-9]+}}, @@ -539,8 +539,8 @@ // CHECK-NOT: [[T_VAR_PRIV]] // CHECK-NOT: [[VEC_PRIV]] // CHECK: [[S_ARR_PRIV_ITEM:%.+]] = phi [[S_FLOAT_TY]]* -// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR]]([[S_FLOAT_TY]]* [[S_ARR_PRIV_ITEM]]) -// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR]]([[S_FLOAT_TY]]* [[VAR_PRIV]]) +// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR]]([[S_FLOAT_TY]]* frozen [[S_ARR_PRIV_ITEM]]) +// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR]]([[S_FLOAT_TY]]* frozen [[VAR_PRIV]]) // CHECK: call {{.+}} @__kmpc_for_static_init_4(%{{.+}}* @{{.+}}, i32 %{{.+}}, i32 34, i32* [[IS_LAST_ADDR:%.+]], i32* %{{.+}}, i32* %{{.+}}, i32* %{{.+}}, i32 1, i32 1) // // CHECK: call void @__kmpc_for_static_fini(%{{.+}}* @{{.+}}, i32 %{{.+}}) @@ -573,11 +573,11 @@ // CHECK: [[S_ARR_BODY_DONE]] // original var=private_var; -// CHECK: call {{.*}} [[S_FLOAT_TY_COPY_ASSIGN:@.+]]([[S_FLOAT_TY]]* [[VAR_REF]], [[S_FLOAT_TY]]* {{.*}} [[VAR_PRIV]]) +// CHECK: call {{.*}} [[S_FLOAT_TY_COPY_ASSIGN:@.+]]([[S_FLOAT_TY]]* frozen [[VAR_REF]], [[S_FLOAT_TY]]* {{.*}} [[VAR_PRIV]]) // CHECK: [[SIVAR_VAL:%.+]] = load i{{[0-9]+}}, i{{[0-9]+}}* [[SIVAR_PRIV]], // CHECK: br label %[[LAST_DONE]] // CHECK: [[LAST_DONE]] -// CHECK-DAG: call void [[S_FLOAT_TY_DESTR]]([[S_FLOAT_TY]]* [[VAR_PRIV]]) +// CHECK-DAG: call void [[S_FLOAT_TY_DESTR]]([[S_FLOAT_TY]]* frozen [[VAR_PRIV]]) // CHECK-DAG: call void [[S_FLOAT_TY_DESTR]]([[S_FLOAT_TY]]* // CHECK: [[GTID_REF:%.+]] = load i{{[0-9]+}}*, i{{[0-9]+}}** [[GTID_ADDR_REF]] // CHECK: [[GTID:%.+]] = load i{{[0-9]+}}, i{{[0-9]+}}* [[GTID_REF]] @@ -585,7 +585,7 @@ // CHECK: ret void // -// CHECK: define internal void [[MAIN_MICROTASK1]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}) +// CHECK: define internal void [[MAIN_MICROTASK1]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}) // CHECK: [[F_PRIV:%.+]] = alloca float, // CHECK-NOT: alloca float // CHECK: [[X_PRIV:%.+]] = alloca double, @@ -625,7 +625,7 @@ // CHECK: call void @__kmpc_barrier(%{{.+}}* [[IMPLICIT_BARRIER_LOC]], i{{[0-9]+}} [[GTID]]) // CHECK: ret void -// CHECK: define internal void [[MAIN_MICROTASK2]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}) +// CHECK: define internal void [[MAIN_MICROTASK2]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}) // CHECK-NOT: alloca float // Check for default initialization. @@ -658,7 +658,7 @@ // CHECK-NEXT: call void @__kmpc_barrier(%{{.+}}* [[IMPLICIT_BARRIER_LOC]], i{{[0-9]+}} [[GTID]]) // CHECK-NEXT: ret void -// CHECK: define internal void [[MAIN_MICROTASK3]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}) +// CHECK: define internal void [[MAIN_MICROTASK3]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}) // CHECK: [[GTID_REF:%.+]] = load i{{[0-9]+}}*, i{{[0-9]+}}** [[GTID_ADDR_REF]] // CHECK: [[GTID:%.+]] = load i{{[0-9]+}}, i{{[0-9]+}}* [[GTID_REF]] @@ -715,7 +715,7 @@ // CHECK: define {{.*}} i{{[0-9]+}} [[TMAIN_INT]]() // CHECK: [[TEST:%.+]] = alloca [[S_INT_TY]], -// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR:@.+]]([[S_INT_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR:@.+]]([[S_INT_TY]]* frozen [[TEST]]) // CHECK: call void (%{{.+}}*, i{{[0-9]+}}, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)*, ...) @__kmpc_fork_call(%{{.+}}* @{{.+}}, i{{[0-9]+}} 4, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)* bitcast (void (i{{[0-9]+}}*, i{{[0-9]+}}*, i32*, [2 x i32]*, [2 x [[S_INT_TY]]]*, [[S_INT_TY]]*)* [[TMAIN_MICROTASK:@.+]] to void // CHECK: call void [[S_INT_TY_DESTR:@.+]]([[S_INT_TY]]* // CHECK: ret @@ -734,7 +734,7 @@ // CHECK: call void @__kmpc_for_static_fini(% // CHECK: ret -// CHECK: define internal void [[SS_MICROTASK]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}, [[SS_TY]]* %{{.+}}) +// CHECK: define internal void [[SS_MICROTASK]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}, [[SS_TY]]* frozen %{{.+}}) // CHECK: alloca i{{[0-9]+}}, // CHECK: alloca i{{[0-9]+}}, // CHECK: alloca i{{[0-9]+}}, @@ -766,7 +766,7 @@ // CHECK: br label // CHECK: ret void -// CHECK: define internal void [[TMAIN_MICROTASK]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}, i32* nonnull align 4 dereferenceable(4) %{{.+}}, [2 x i32]* nonnull align 4 dereferenceable(8) %{{.+}}, [2 x [[S_INT_TY]]]* nonnull align 4 dereferenceable(8) %{{.+}}, [[S_INT_TY]]* nonnull align 4 dereferenceable(4) %{{.+}}) +// CHECK: define internal void [[TMAIN_MICROTASK]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}, i32* frozen nonnull align 4 dereferenceable(4) %{{.+}}, [2 x i32]* frozen nonnull align 4 dereferenceable(8) %{{.+}}, [2 x [[S_INT_TY]]]* frozen nonnull align 4 dereferenceable(8) %{{.+}}, [[S_INT_TY]]* frozen nonnull align 4 dereferenceable(4) %{{.+}}) // CHECK: alloca i{{[0-9]+}}, // CHECK: alloca i{{[0-9]+}}, // CHECK: alloca i{{[0-9]+}}, @@ -787,9 +787,9 @@ // CHECK-NOT: [[T_VAR_PRIV]] // CHECK-NOT: [[VEC_PRIV]] // CHECK: [[S_ARR_PRIV_ITEM:%.+]] = phi [[S_INT_TY]]* -// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR]]([[S_INT_TY]]* [[S_ARR_PRIV_ITEM]]) +// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR]]([[S_INT_TY]]* frozen [[S_ARR_PRIV_ITEM]]) // CHECK: [[VAR_REF:%.+]] = load [[S_INT_TY]]*, [[S_INT_TY]]** % -// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR]]([[S_INT_TY]]* [[VAR_PRIV]]) +// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR]]([[S_INT_TY]]* frozen [[VAR_PRIV]]) // CHECK: store [[S_INT_TY]]* [[VAR_PRIV]], [[S_INT_TY]]** [[VAR_PRIV_REF]] // CHECK: call {{.+}} @__kmpc_for_static_init_4(%{{.+}}* @{{.+}}, i32 %{{.+}}, i32 34, i32* [[IS_LAST_ADDR:%.+]], i32* %{{.+}}, i32* %{{.+}}, i32* %{{.+}}, i32 1, i32 1) // @@ -824,10 +824,10 @@ // original var=private_var; // CHECK: [[VAR_PRIV1:%.+]] = load [[S_INT_TY]]*, [[S_INT_TY]]** [[VAR_PRIV_REF]], -// CHECK: call {{.*}} [[S_INT_TY_COPY_ASSIGN:@.+]]([[S_INT_TY]]* [[VAR_REF]], [[S_INT_TY]]* {{.*}} [[VAR_PRIV1]]) +// CHECK: call {{.*}} [[S_INT_TY_COPY_ASSIGN:@.+]]([[S_INT_TY]]* frozen [[VAR_REF]], [[S_INT_TY]]* {{.*}} [[VAR_PRIV1]]) // CHECK: br label %[[LAST_DONE]] // CHECK: [[LAST_DONE]] -// CHECK-DAG: call void [[S_INT_TY_DESTR]]([[S_INT_TY]]* [[VAR_PRIV]]) +// CHECK-DAG: call void [[S_INT_TY_DESTR]]([[S_INT_TY]]* frozen [[VAR_PRIV]]) // CHECK-DAG: call void [[S_INT_TY_DESTR]]([[S_INT_TY]]* // CHECK: [[GTID_REF:%.+]] = load i{{[0-9]+}}*, i{{[0-9]+}}** [[GTID_ADDR_REF]] // CHECK: [[GTID:%.+]] = load i{{[0-9]+}}, i{{[0-9]+}}* [[GTID_REF]] diff --git a/clang/test/OpenMP/for_linear_codegen.cpp b/clang/test/OpenMP/for_linear_codegen.cpp --- a/clang/test/OpenMP/for_linear_codegen.cpp +++ b/clang/test/OpenMP/for_linear_codegen.cpp @@ -153,7 +153,7 @@ // LAMBDA: call void (%{{.+}}*, i{{[0-9]+}}, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)*, ...) @__kmpc_fork_call(%{{.+}}* @{{.+}}, i{{[0-9]+}} 1, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)* bitcast (void (i{{[0-9]+}}*, i{{[0-9]+}}*, [[SS_TY]]*)* [[SS_MICROTASK:@.+]] to void // LAMBDA: ret - // LAMBDA: define internal void [[SS_MICROTASK]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}, [[SS_TY]]* %{{.+}}) + // LAMBDA: define internal void [[SS_MICROTASK]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}, [[SS_TY]]* frozen %{{.+}}) // LAMBDA: getelementptr {{.*}}[[SS_TY]], [[SS_TY]]* %{{.*}}, i32 0, i32 0 // LAMBDA-NOT: getelementptr {{.*}}[[SS_TY]], [[SS_TY]]* %{{.*}}, i32 0, i32 1 // LAMBDA: getelementptr {{.*}}[[SS_TY]], [[SS_TY]]* %{{.*}}, i32 0, i32 2 @@ -167,7 +167,7 @@ // LAMBDA: br label // LAMBDA: ret void - // LAMBDA: define internal void @{{.+}}(i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}, [[SS_TY]]* %{{.+}}, i32* {{.+}}, i32* {{.+}}, i32* {{.+}}) + // LAMBDA: define internal void @{{.+}}(i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}, [[SS_TY]]* frozen %{{.+}}, i32* {{.+}}, i32* {{.+}}, i32* {{.+}}) // LAMBDA: alloca i{{[0-9]+}}, // LAMBDA: alloca i{{[0-9]+}}, // LAMBDA: alloca i{{[0-9]+}}, @@ -200,7 +200,7 @@ // LAMBDA: br label // LAMBDA: ret void - // LAMBDA: define{{.*}} internal{{.*}} void [[OMP_REGION]](i32* noalias %{{.+}}, i32* noalias %{{.+}}) + // LAMBDA: define{{.*}} internal{{.*}} void [[OMP_REGION]](i32* frozen noalias %{{.+}}, i32* frozen noalias %{{.+}}) // LAMBDA: alloca i{{[0-9]+}}, // LAMBDA: alloca i{{[0-9]+}}, // LAMBDA: [[G_START_ADDR:%.+]] = alloca i{{[0-9]+}}, @@ -224,13 +224,13 @@ // LAMBDA: store i32 [[ADD]], i32* [[G_PRIVATE_ADDR]], // LAMBDA: [[G_PRIVATE_ADDR_REF:%.+]] = getelementptr inbounds %{{.+}}, %{{.+}}* [[ARG:%.+]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 // LAMBDA: store i{{[0-9]+}}* [[G_PRIVATE_ADDR]], i{{[0-9]+}}** [[G_PRIVATE_ADDR_REF]] - // LAMBDA: call void [[INNER_LAMBDA:@.+]](%{{.+}}* [[ARG]]) + // LAMBDA: call void [[INNER_LAMBDA:@.+]](%{{.+}}* frozen [[ARG]]) // LAMBDA: call void @__kmpc_for_static_fini(%{{.+}}* @{{.+}}, i32 [[GTID]]) g += 5; g1 += 5; // LAMBDA: call void @__kmpc_barrier(%{{.+}}* @{{.+}}, i{{[0-9]+}} [[GTID]]) [&]() { - // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* [[ARG_PTR:%.+]]) + // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* frozen [[ARG_PTR:%.+]]) // LAMBDA: store %{{.+}}* [[ARG_PTR]], %{{.+}}** [[ARG_PTR_REF:%.+]], g = 2; g1 = 2; @@ -253,7 +253,7 @@ #pragma omp parallel #pragma omp for linear(g, g1:5) for (int i = 0; i < 2; ++i) { - // BLOCKS: define{{.*}} internal{{.*}} void [[OMP_REGION]](i32* noalias %{{.+}}, i32* noalias %{{.+}}) + // BLOCKS: define{{.*}} internal{{.*}} void [[OMP_REGION]](i32* frozen noalias %{{.+}}, i32* frozen noalias %{{.+}}) // BLOCKS: alloca i{{[0-9]+}}, // BLOCKS: alloca i{{[0-9]+}}, // BLOCKS: [[G_START_ADDR:%.+]] = alloca i{{[0-9]+}}, @@ -306,7 +306,7 @@ // BLOCKS: call void (%{{.+}}*, i{{[0-9]+}}, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)*, ...) @__kmpc_fork_call(%{{.+}}* @{{.+}}, i{{[0-9]+}} 1, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)* bitcast (void (i{{[0-9]+}}*, i{{[0-9]+}}*, [[SS_TY]]*)* [[SS_MICROTASK:@.+]] to void // BLOCKS: ret -// BLOCKS: define internal void [[SS_MICROTASK]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}, [[SS_TY]]* %{{.+}}) +// BLOCKS: define internal void [[SS_MICROTASK]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}, [[SS_TY]]* frozen %{{.+}}) // BLOCKS: getelementptr {{.*}}[[SS_TY]], [[SS_TY]]* %{{.*}}, i32 0, i32 0 // BLOCKS-NOT: getelementptr {{.*}}[[SS_TY]], [[SS_TY]]* %{{.*}}, i32 0, i32 1 // BLOCKS: getelementptr {{.*}}[[SS_TY]], [[SS_TY]]* %{{.*}}, i32 0, i32 2 @@ -320,7 +320,7 @@ // BLOCKS: br label // BLOCKS: ret void -// BLOCKS: define internal void @{{.+}}(i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}, [[SS_TY]]* %{{.+}}, i32* {{.+}}, i32* {{.+}}, i32* {{.+}}) +// BLOCKS: define internal void @{{.+}}(i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}, [[SS_TY]]* frozen %{{.+}}, i32* {{.+}}, i32* {{.+}}, i32* {{.+}}) // BLOCKS: alloca i{{[0-9]+}}, // BLOCKS: alloca i{{[0-9]+}}, // BLOCKS: alloca i{{[0-9]+}}, @@ -365,15 +365,15 @@ #endif } -// CHECK: define i{{[0-9]+}} @main() +// CHECK: define frozen i{{[0-9]+}} @main() // CHECK: [[TEST:%.+]] = alloca [[S_FLOAT_TY]], -// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR:@.+]]([[S_FLOAT_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR:@.+]]([[S_FLOAT_TY]]* frozen [[TEST]]) // CHECK: call void (%{{.+}}*, i{{[0-9]+}}, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)*, ...) @__kmpc_fork_call(%{{.+}}* @{{.+}}, i{{[0-9]+}} 2, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)* bitcast (void (i{{[0-9]+}}*, i{{[0-9]+}}*, float**, i64*)* [[MAIN_MICROTASK:@.+]] to void // CHECK: = call {{.+}} [[TMAIN_INT:@.+]]() // CHECK: call void [[S_FLOAT_TY_DESTR:@.+]]([[S_FLOAT_TY]]* // CHECK: ret -// CHECK: define internal void [[MAIN_MICROTASK]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}, float** nonnull align 8 dereferenceable(8) %{{.+}}, i64* nonnull align 8 dereferenceable(8) %{{.+}}) +// CHECK: define internal void [[MAIN_MICROTASK]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}, float** frozen nonnull align 8 dereferenceable(8) %{{.+}}, i64* frozen nonnull align 8 dereferenceable(8) %{{.+}}) // CHECK: alloca i{{[0-9]+}}, // CHECK: alloca i{{[0-9]+}}, // CHECK: [[PVAR_START:%.+]] = alloca float*, @@ -420,7 +420,7 @@ // CHECK: define {{.*}} i{{[0-9]+}} [[TMAIN_INT]]() // CHECK: [[TEST:%.+]] = alloca [[S_INT_TY]], -// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR:@.+]]([[S_INT_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR:@.+]]([[S_INT_TY]]* frozen [[TEST]]) // CHECK: call void (%{{.+}}*, i{{[0-9]+}}, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)*, ...) @__kmpc_fork_call(%{{.+}}* @{{.+}}, i{{[0-9]+}} 2, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)* bitcast (void (i{{[0-9]+}}*, i{{[0-9]+}}*, i32**, i32*)* [[TMAIN_MICROTASK:@.+]] to void // CHECK: call void [[S_INT_TY_DESTR:@.+]]([[S_INT_TY]]* // CHECK: ret @@ -434,7 +434,7 @@ // CHECK: call void (%{{.+}}*, i{{[0-9]+}}, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)*, ...) @__kmpc_fork_call(%{{.+}}* @{{.+}}, i{{[0-9]+}} 1, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)* bitcast (void (i{{[0-9]+}}*, i{{[0-9]+}}*, [[SS_TY]]*)* [[SS_MICROTASK:@.+]] to void // CHECK: ret -// CHECK: define internal void [[SS_MICROTASK]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}, [[SS_TY]]* %{{.+}}) +// CHECK: define internal void [[SS_MICROTASK]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}, [[SS_TY]]* frozen %{{.+}}) // CHECK: alloca i{{[0-9]+}}, // CHECK: alloca i{{[0-9]+}}, // CHECK: alloca i{{[0-9]+}}, @@ -471,7 +471,7 @@ // CHECK: br label // CHECK: ret void -// CHECK: define internal void [[TMAIN_MICROTASK]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}, i32** nonnull align 8 dereferenceable(8) %{{.+}}, i32* nonnull align 4 dereferenceable(4) %{{.+}}) +// CHECK: define internal void [[TMAIN_MICROTASK]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}, i32** frozen nonnull align 8 dereferenceable(8) %{{.+}}, i32* frozen nonnull align 4 dereferenceable(4) %{{.+}}) // CHECK: alloca i{{[0-9]+}}, // CHECK: alloca i{{[0-9]+}}, // CHECK: [[PVAR_START:%.+]] = alloca i32*, diff --git a/clang/test/OpenMP/for_loop_messages.cpp b/clang/test/OpenMP/for_loop_messages.cpp --- a/clang/test/OpenMP/for_loop_messages.cpp +++ b/clang/test/OpenMP/for_loop_messages.cpp @@ -176,7 +176,7 @@ c[ii] = a[ii]; #pragma omp parallel -// Ok but undefined behavior (in general, cannot check that incr +// Ok but undefined behavior (in frozen general, cannot check incr that // is really loop-invariant). #pragma omp for for (ii = 0; ii < 10; ii = ii + ii) diff --git a/clang/test/OpenMP/for_private_codegen.cpp b/clang/test/OpenMP/for_private_codegen.cpp --- a/clang/test/OpenMP/for_private_codegen.cpp +++ b/clang/test/OpenMP/for_private_codegen.cpp @@ -57,7 +57,7 @@ #pragma omp parallel #pragma omp for private(g, g1, svar, sfvar) for (int i = 0; i < 2; ++i) { - // LAMBDA: define{{.*}} internal{{.*}} void [[OMP_REGION]](i32* noalias %{{.+}}, i32* noalias %{{.+}}) + // LAMBDA: define{{.*}} internal{{.*}} void [[OMP_REGION]](i32* frozen noalias %{{.+}}, i32* frozen noalias %{{.+}}) // LAMBDA: [[G_PRIVATE_ADDR:%.+]] = alloca double, // LAMBDA: [[G1_PRIVATE_ADDR:%.+]] = alloca double, // LAMBDA: [[G1_PRIVATE_REF:%.+]] = alloca double*, @@ -82,10 +82,10 @@ // LAMBDA: store i{{[0-9]+}}* [[SVAR_PRIVATE_ADDR]], i{{[0-9]+}}** [[SVAR_PRIVATE_ADDR_REF]] // LAMBDA: [[SFVAR_PRIVATE_ADDR_REF:%.+]] = getelementptr inbounds %{{.+}}, %{{.+}}* [[ARG:%.+]], i{{[0-9]+}} 0, i{{[0-9]+}} 3 // LAMBDA: store float* [[SFVAR_PRIVATE_ADDR]], float** [[SFVAR_PRIVATE_ADDR_REF]] - // LAMBDA: call{{.*}} void [[INNER_LAMBDA:@.+]](%{{.+}}* [[ARG]]) + // LAMBDA: call{{.*}} void [[INNER_LAMBDA:@.+]](%{{.+}}* frozen [[ARG]]) // LAMBDA: call {{.*}}void @__kmpc_for_static_fini( [&]() { - // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* [[ARG_PTR:%.+]]) + // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* frozen [[ARG_PTR:%.+]]) // LAMBDA: store %{{.+}}* [[ARG_PTR]], %{{.+}}** [[ARG_PTR_REF:%.+]], g = 2; g1 = 2; @@ -119,7 +119,7 @@ #pragma omp parallel #pragma omp for private(g, g1, svar, sfvar) for (int i = 0; i < 2; ++i) { - // BLOCKS: define{{.*}} internal{{.*}} void [[OMP_REGION]](i32* noalias %{{.+}}, i32* noalias %{{.+}}) + // BLOCKS: define{{.*}} internal{{.*}} void [[OMP_REGION]](i32* frozen noalias %{{.+}}, i32* frozen noalias %{{.+}}) // BLOCKS: [[G_PRIVATE_ADDR:%.+]] = alloca double, // BLOCKS: [[SVAR_PRIVATE_ADDR:%.+]] = alloca i{{[0-9]+}}, // BLOCKS: [[SFVAR_PRIVATE_ADDR:%.+]] = alloca float, @@ -184,15 +184,15 @@ #endif } -// CHECK: define i{{[0-9]+}} @main() +// CHECK: define frozen i{{[0-9]+}} @main() // CHECK: [[TEST:%.+]] = alloca [[S_FLOAT_TY]], -// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR:@.+]]([[S_FLOAT_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR:@.+]]([[S_FLOAT_TY]]* frozen [[TEST]]) // CHECK: call void (%{{.+}}*, i{{[0-9]+}}, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)*, ...) @__kmpc_fork_call(%{{.+}}* @{{.+}}, i{{[0-9]+}} 0, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)* bitcast (void (i{{[0-9]+}}*, i{{[0-9]+}}*)* [[MAIN_MICROTASK:@.+]] to void -// CHECK: = call i{{.+}} [[TMAIN_INT:@.+]]() +// CHECK: = call frozen i{{.+}} [[TMAIN_INT:@.+]]() // CHECK: call void [[S_FLOAT_TY_DESTR:@.+]]([[S_FLOAT_TY]]* // CHECK: ret // -// CHECK: define internal void [[MAIN_MICROTASK]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}) +// CHECK: define internal void [[MAIN_MICROTASK]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}) // CHECK: [[T_VAR_PRIV:%.+]] = alloca i{{[0-9]+}}, // CHECK: [[VEC_PRIV:%.+]] = alloca [2 x i{{[0-9]+}}], // CHECK: [[S_ARR_PRIV:%.+]] = alloca [2 x [[S_FLOAT_TY]]], @@ -205,24 +205,24 @@ // CHECK-NOT: [[VEC_PRIV]] // CHECK: {{.+}}: // CHECK: [[S_ARR_PRIV_ITEM:%.+]] = phi [[S_FLOAT_TY]]* -// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR]]([[S_FLOAT_TY]]* [[S_ARR_PRIV_ITEM]]) +// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR]]([[S_FLOAT_TY]]* frozen [[S_ARR_PRIV_ITEM]]) // CHECK-NOT: [[T_VAR_PRIV]] // CHECK-NOT: [[VEC_PRIV]] -// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR]]([[S_FLOAT_TY]]* [[VAR_PRIV]]) +// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR]]([[S_FLOAT_TY]]* frozen [[VAR_PRIV]]) // CHECK: call void @__kmpc_for_static_init_4( // CHECK: call void @__kmpc_for_static_fini( -// CHECK-DAG: call void [[S_FLOAT_TY_DESTR]]([[S_FLOAT_TY]]* [[VAR_PRIV]]) +// CHECK-DAG: call void [[S_FLOAT_TY_DESTR]]([[S_FLOAT_TY]]* frozen [[VAR_PRIV]]) // CHECK-DAG: call void [[S_FLOAT_TY_DESTR]]([[S_FLOAT_TY]]* // CHECK: ret void // CHECK: define {{.*}} i{{[0-9]+}} [[TMAIN_INT]]() // CHECK: [[TEST:%.+]] = alloca [[S_INT_TY]], -// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR:@.+]]([[S_INT_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR:@.+]]([[S_INT_TY]]* frozen [[TEST]]) // CHECK: call void (%{{.+}}*, i{{[0-9]+}}, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)*, ...) @__kmpc_fork_call(%{{.+}}* @{{.+}}, i{{[0-9]+}} 0, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)* bitcast (void (i{{[0-9]+}}*, i{{[0-9]+}}*)* [[TMAIN_MICROTASK:@.+]] to void // CHECK: call void [[S_INT_TY_DESTR:@.+]]([[S_INT_TY]]* // CHECK: ret // -// CHECK: define internal void [[TMAIN_MICROTASK]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}) +// CHECK: define internal void [[TMAIN_MICROTASK]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}) // CHECK: [[T_VAR_PRIV:%.+]] = alloca i{{[0-9]+}}, // CHECK: [[VEC_PRIV:%.+]] = alloca [2 x i{{[0-9]+}}], // CHECK: [[S_ARR_PRIV:%.+]] = alloca [2 x [[S_INT_TY]]], @@ -234,13 +234,13 @@ // CHECK-NOT: [[VEC_PRIV]] // CHECK: {{.+}}: // CHECK: [[S_ARR_PRIV_ITEM:%.+]] = phi [[S_INT_TY]]* -// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR]]([[S_INT_TY]]* [[S_ARR_PRIV_ITEM]]) +// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR]]([[S_INT_TY]]* frozen [[S_ARR_PRIV_ITEM]]) // CHECK-NOT: [[T_VAR_PRIV]] // CHECK-NOT: [[VEC_PRIV]] -// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR]]([[S_INT_TY]]* [[VAR_PRIV]]) +// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR]]([[S_INT_TY]]* frozen [[VAR_PRIV]]) // CHECK: call void @__kmpc_for_static_init_4( // CHECK: call void @__kmpc_for_static_fini( -// CHECK-DAG: call void [[S_INT_TY_DESTR]]([[S_INT_TY]]* [[VAR_PRIV]]) +// CHECK-DAG: call void [[S_INT_TY_DESTR]]([[S_INT_TY]]* frozen [[VAR_PRIV]]) // CHECK-DAG: call void [[S_INT_TY_DESTR]]([[S_INT_TY]]* // CHECK: ret void #endif diff --git a/clang/test/OpenMP/for_reduction_codegen.cpp b/clang/test/OpenMP/for_reduction_codegen.cpp --- a/clang/test/OpenMP/for_reduction_codegen.cpp +++ b/clang/test/OpenMP/for_reduction_codegen.cpp @@ -78,7 +78,7 @@ #pragma omp parallel #pragma omp for reduction(+:g, g1) for (int i = 0; i < 2; ++i) { - // LAMBDA: define{{.*}} internal{{.*}} void [[OMP_REGION]](i32* noalias %{{.+}}, i32* noalias %{{.+}}) + // LAMBDA: define{{.*}} internal{{.*}} void [[OMP_REGION]](i32* frozen noalias %{{.+}}, i32* frozen noalias %{{.+}}) // LAMBDA: [[G_PRIVATE_ADDR:%.+]] = alloca double, // Reduction list for runtime. @@ -91,7 +91,7 @@ // LAMBDA: store double 1.0{{.+}}, double* [[G_PRIVATE_ADDR]], // LAMBDA: [[G_PRIVATE_ADDR_REF:%.+]] = getelementptr inbounds %{{.+}}, %{{.+}}* [[ARG:%.+]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 // LAMBDA: store double* [[G_PRIVATE_ADDR]], double** [[G_PRIVATE_ADDR_REF]] - // LAMBDA: call void [[INNER_LAMBDA:@.+]](%{{.+}}* [[ARG]]) + // LAMBDA: call void [[INNER_LAMBDA:@.+]](%{{.+}}* frozen [[ARG]]) // LAMBDA: call void @__kmpc_for_static_fini( // LAMBDA: [[G_PRIV_REF:%.+]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[RED_LIST]], i64 0, i64 0 @@ -117,7 +117,7 @@ // LAMBDA: [[REDUCTION_DONE]] // LAMBDA: ret void [&]() { - // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* [[ARG_PTR:%.+]]) + // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* frozen [[ARG_PTR:%.+]]) // LAMBDA: store %{{.+}}* [[ARG_PTR]], %{{.+}}** [[ARG_PTR_REF:%.+]], g = 2; g1 = 2; @@ -139,7 +139,7 @@ #pragma omp parallel #pragma omp for reduction(-:g, g1) for (int i = 0; i < 2; ++i) { - // BLOCKS: define{{.*}} internal{{.*}} void [[OMP_REGION]](i32* noalias %{{.+}}, i32* noalias %{{.+}}) + // BLOCKS: define{{.*}} internal{{.*}} void [[OMP_REGION]](i32* frozen noalias %{{.+}}, i32* frozen noalias %{{.+}}) // BLOCKS: [[G_PRIVATE_ADDR:%.+]] = alloca double, // Reduction list for runtime. @@ -262,7 +262,7 @@ // CHECK: define {{.*}}i{{[0-9]+}} @main() // CHECK: [[TEST:%.+]] = alloca [[S_FLOAT_TY]], -// CHECK: call {{.*}} [[S_FLOAT_TY_CONSTR:@.+]]([[S_FLOAT_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_FLOAT_TY_CONSTR:@.+]]([[S_FLOAT_TY]]* frozen [[TEST]]) // CHECK: call void (%{{.+}}*, i{{[0-9]+}}, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)*, ...) @__kmpc_fork_call(%{{.+}}* @{{.+}}, i{{[0-9]+}} 6, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)* bitcast (void (i{{[0-9]+}}*, i{{[0-9]+}}*, float*, [[S_FLOAT_TY]]*, [[S_FLOAT_TY]]*, float*, [2 x i32]*, [4 x [[S_FLOAT_TY]]]*)* [[MAIN_MICROTASK:@.+]] to void // CHECK: call void (%{{.+}}*, i{{[0-9]+}}, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)*, ...) @__kmpc_fork_call(%{{.+}}* @{{.+}}, i{{[0-9]+}} 5, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)* bitcast (void (i{{[0-9]+}}*, i{{[0-9]+}}*, i64, i64, i32*, [2 x i32]*, [10 x [4 x [[S_FLOAT_TY]]]]*)* [[MAIN_MICROTASK1:@.+]] to void // CHECK: call void (%{{.+}}*, i{{[0-9]+}}, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)*, ...) @__kmpc_fork_call(%{{.+}}* @{{.+}}, i{{[0-9]+}} 4, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)* bitcast (void (i{{[0-9]+}}*, i{{[0-9]+}}*, i64, i64, i32*, [10 x [4 x [[S_FLOAT_TY]]]]*)* [[MAIN_MICROTASK2:@.+]] to void @@ -280,7 +280,7 @@ // CHECK: call {{.*}} [[S_FLOAT_TY_DESTR:@.+]]([[S_FLOAT_TY]]* // CHECK: ret // -// CHECK: define internal void [[MAIN_MICROTASK]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}, float* nonnull align 4 dereferenceable(4) %{{.+}}, [[S_FLOAT_TY]]* nonnull align 4 dereferenceable(4) %{{.+}}, [[S_FLOAT_TY]]* nonnull align 4 dereferenceable(4) %{{.+}}, float* nonnull align 4 dereferenceable(4) %{{.+}}, [2 x i32]* nonnull align 4 dereferenceable(8) %vec, [4 x [[S_FLOAT_TY]]]* nonnull align 4 dereferenceable(16) %{{.+}}) +// CHECK: define internal void [[MAIN_MICROTASK]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}, float* frozen nonnull align 4 dereferenceable(4) %{{.+}}, [[S_FLOAT_TY]]* frozen nonnull align 4 dereferenceable(4) %{{.+}}, [[S_FLOAT_TY]]* frozen nonnull align 4 dereferenceable(4) %{{.+}}, float* frozen nonnull align 4 dereferenceable(4) %{{.+}}, [2 x i32]* frozen nonnull align 4 dereferenceable(8) %vec, [4 x [[S_FLOAT_TY]]]* frozen nonnull align 4 dereferenceable(16) %{{.+}}) // CHECK: [[T_VAR_PRIV:%.+]] = alloca float, // CHECK: [[VAR_PRIV:%.+]] = alloca [[S_FLOAT_TY]], // CHECK: [[VAR1_PRIV:%.+]] = alloca [[S_FLOAT_TY]], @@ -302,10 +302,10 @@ // CHECK: [[VAR_REF:%.+]] = load [[S_FLOAT_TY]]*, [[S_FLOAT_TY]]** % // For & reduction operation initial value of private variable is ones in all bits. -// CHECK: call {{.*}} [[S_FLOAT_TY_CONSTR:@.+]]([[S_FLOAT_TY]]* [[VAR_PRIV]]) +// CHECK: call {{.*}} [[S_FLOAT_TY_CONSTR:@.+]]([[S_FLOAT_TY]]* frozen [[VAR_PRIV]]) // For && reduction operation initial value of private variable is 1.0. -// CHECK: call {{.*}} [[S_FLOAT_TY_CONSTR:@.+]]([[S_FLOAT_TY]]* [[VAR1_PRIV]]) +// CHECK: call {{.*}} [[S_FLOAT_TY_CONSTR:@.+]]([[S_FLOAT_TY]]* frozen [[VAR1_PRIV]]) // For min reduction operation initial value of private variable is largest repesentable value. // CHECK: store float 0x47EFFFFFE0000000, float* [[T_VAR1_PRIV]], @@ -351,23 +351,23 @@ // CHECK: store float [[UP]], float* [[T_VAR_REF]], // var = var.operator &(var_reduction); -// CHECK: [[UP:%.+]] = call nonnull align 4 dereferenceable(4) [[S_FLOAT_TY]]* @{{.+}}([[S_FLOAT_TY]]* [[VAR_REF]], [[S_FLOAT_TY]]* nonnull align 4 dereferenceable(4) [[VAR_PRIV]]) +// CHECK: [[UP:%.+]] = call frozen nonnull align 4 dereferenceable(4) [[S_FLOAT_TY]]* @{{.+}}([[S_FLOAT_TY]]* frozen [[VAR_REF]], [[S_FLOAT_TY]]* frozen nonnull align 4 dereferenceable(4) [[VAR_PRIV]]) // CHECK: [[BC1:%.+]] = bitcast [[S_FLOAT_TY]]* [[VAR_REF]] to i8* // CHECK: [[BC2:%.+]] = bitcast [[S_FLOAT_TY]]* [[UP]] to i8* // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[BC1]], i8* align 4 [[BC2]], i64 4, i1 false) // var1 = var1.operator &&(var1_reduction); -// CHECK: [[TO_FLOAT:%.+]] = call float @{{.+}}([[S_FLOAT_TY]]* [[VAR1_REF]]) +// CHECK: [[TO_FLOAT:%.+]] = call frozen float @{{.+}}([[S_FLOAT_TY]]* frozen [[VAR1_REF]]) // CHECK: [[VAR1_BOOL:%.+]] = fcmp une float [[TO_FLOAT]], 0.0 // CHECK: br i1 [[VAR1_BOOL]], label %[[TRUE:.+]], label %[[END2:.+]] // CHECK: [[TRUE]] -// CHECK: [[TO_FLOAT:%.+]] = call float @{{.+}}([[S_FLOAT_TY]]* [[VAR1_PRIV]]) +// CHECK: [[TO_FLOAT:%.+]] = call frozen float @{{.+}}([[S_FLOAT_TY]]* frozen [[VAR1_PRIV]]) // CHECK: [[VAR1_REDUCTION_BOOL:%.+]] = fcmp une float [[TO_FLOAT]], 0.0 // CHECK: br label %[[END2]] // CHECK: [[END2]] // CHECK: [[COND_LVALUE:%.+]] = phi i1 [ false, %{{.+}} ], [ [[VAR1_REDUCTION_BOOL]], %[[TRUE]] ] // CHECK: [[CONV:%.+]] = uitofp i1 [[COND_LVALUE]] to float -// CHECK: call void @{{.+}}([[S_FLOAT_TY]]* [[COND_LVALUE:%.+]], float [[CONV]]) +// CHECK: call void @{{.+}}([[S_FLOAT_TY]]* frozen [[COND_LVALUE:%.+]], float frozen [[CONV]]) // CHECK: [[BC1:%.+]] = bitcast [[S_FLOAT_TY]]* [[VAR1_REF]] to i8* // CHECK: [[BC2:%.+]] = bitcast [[S_FLOAT_TY]]* [[COND_LVALUE]] to i8* // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[BC1]], i8* align 4 [[BC2]], i64 4, i1 false) @@ -405,7 +405,7 @@ // var = var.operator &(var_reduction); // CHECK: call void @__kmpc_critical( -// CHECK: [[UP:%.+]] = call nonnull align 4 dereferenceable(4) [[S_FLOAT_TY]]* @{{.+}}([[S_FLOAT_TY]]* [[VAR_REF]], [[S_FLOAT_TY]]* nonnull align 4 dereferenceable(4) [[VAR_PRIV]]) +// CHECK: [[UP:%.+]] = call frozen nonnull align 4 dereferenceable(4) [[S_FLOAT_TY]]* @{{.+}}([[S_FLOAT_TY]]* frozen [[VAR_REF]], [[S_FLOAT_TY]]* frozen nonnull align 4 dereferenceable(4) [[VAR_PRIV]]) // CHECK: [[BC1:%.+]] = bitcast [[S_FLOAT_TY]]* [[VAR_REF]] to i8* // CHECK: [[BC2:%.+]] = bitcast [[S_FLOAT_TY]]* [[UP]] to i8* // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[BC1]], i8* align 4 [[BC2]], i64 4, i1 false) @@ -413,17 +413,17 @@ // var1 = var1.operator &&(var1_reduction); // CHECK: call void @__kmpc_critical( -// CHECK: [[TO_FLOAT:%.+]] = call float @{{.+}}([[S_FLOAT_TY]]* [[VAR1_REF]]) +// CHECK: [[TO_FLOAT:%.+]] = call frozen float @{{.+}}([[S_FLOAT_TY]]* frozen [[VAR1_REF]]) // CHECK: [[VAR1_BOOL:%.+]] = fcmp une float [[TO_FLOAT]], 0.0 // CHECK: br i1 [[VAR1_BOOL]], label %[[TRUE:.+]], label %[[END2:.+]] // CHECK: [[TRUE]] -// CHECK: [[TO_FLOAT:%.+]] = call float @{{.+}}([[S_FLOAT_TY]]* [[VAR1_PRIV]]) +// CHECK: [[TO_FLOAT:%.+]] = call frozen float @{{.+}}([[S_FLOAT_TY]]* frozen [[VAR1_PRIV]]) // CHECK: [[VAR1_REDUCTION_BOOL:%.+]] = fcmp une float [[TO_FLOAT]], 0.0 // CHECK: br label %[[END2]] // CHECK: [[END2]] // CHECK: [[COND_LVALUE:%.+]] = phi i1 [ false, %{{.+}} ], [ [[VAR1_REDUCTION_BOOL]], %[[TRUE]] ] // CHECK: [[CONV:%.+]] = uitofp i1 [[COND_LVALUE]] to float -// CHECK: call void @{{.+}}([[S_FLOAT_TY]]* [[COND_LVALUE:%.+]], float [[CONV]]) +// CHECK: call void @{{.+}}([[S_FLOAT_TY]]* frozen [[COND_LVALUE:%.+]], float frozen [[CONV]]) // CHECK: [[BC1:%.+]] = bitcast [[S_FLOAT_TY]]* [[VAR1_REF]] to i8* // CHECK: [[BC2:%.+]] = bitcast [[S_FLOAT_TY]]* [[COND_LVALUE]] to i8* // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[BC1]], i8* align 4 [[BC2]], i64 4, i1 false) @@ -453,7 +453,7 @@ // break; // CHECK: br label %[[RED_DONE]] // CHECK: [[RED_DONE]] -// CHECK-DAG: call {{.*}} [[S_FLOAT_TY_DESTR]]([[S_FLOAT_TY]]* [[VAR_PRIV]]) +// CHECK-DAG: call {{.*}} [[S_FLOAT_TY_DESTR]]([[S_FLOAT_TY]]* frozen [[VAR_PRIV]]) // CHECK-DAG: call {{.*}} [[S_FLOAT_TY_DESTR]]([[S_FLOAT_TY]]* // CHECK: call void @__kmpc_barrier(%{{.+}}* [[IMPLICIT_BARRIER_LOC]], i{{[0-9]+}} [[GTID]]) @@ -465,7 +465,7 @@ // *(Type-1*)lhs[-1] = ReductionOperation-1(*(Type-1*)lhs[-1], // *(Type-1*)rhs[-1]); // } -// CHECK: define internal void [[REDUCTION_FUNC]](i8* %0, i8* %1) +// CHECK: define internal void [[REDUCTION_FUNC]](i8* frozen %0, i8* frozen %1) // t_var_lhs = (float*)lhs[0]; // CHECK: [[T_VAR_RHS_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST_RHS:%.+]], i64 0, i64 0 // CHECK: [[T_VAR_RHS_VOID:%.+]] = load i8*, i8** [[T_VAR_RHS_REF]], @@ -509,23 +509,23 @@ // CHECK: store float [[UP]], float* [[T_VAR_LHS]], // var_lhs = var_lhs.operator &(var_rhs); -// CHECK: [[UP:%.+]] = call nonnull align 4 dereferenceable(4) [[S_FLOAT_TY]]* @{{.+}}([[S_FLOAT_TY]]* [[VAR_LHS]], [[S_FLOAT_TY]]* nonnull align 4 dereferenceable(4) [[VAR_RHS]]) +// CHECK: [[UP:%.+]] = call frozen nonnull align 4 dereferenceable(4) [[S_FLOAT_TY]]* @{{.+}}([[S_FLOAT_TY]]* frozen [[VAR_LHS]], [[S_FLOAT_TY]]* frozen nonnull align 4 dereferenceable(4) [[VAR_RHS]]) // CHECK: [[BC1:%.+]] = bitcast [[S_FLOAT_TY]]* [[VAR_LHS]] to i8* // CHECK: [[BC2:%.+]] = bitcast [[S_FLOAT_TY]]* [[UP]] to i8* // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[BC1]], i8* align 4 [[BC2]], i64 4, i1 false) // var1_lhs = var1_lhs.operator &&(var1_rhs); -// CHECK: [[TO_FLOAT:%.+]] = call float @{{.+}}([[S_FLOAT_TY]]* [[VAR1_LHS]]) +// CHECK: [[TO_FLOAT:%.+]] = call frozen float @{{.+}}([[S_FLOAT_TY]]* frozen [[VAR1_LHS]]) // CHECK: [[VAR1_BOOL:%.+]] = fcmp une float [[TO_FLOAT]], 0.0 // CHECK: br i1 [[VAR1_BOOL]], label %[[TRUE:.+]], label %[[END2:.+]] // CHECK: [[TRUE]] -// CHECK: [[TO_FLOAT:%.+]] = call float @{{.+}}([[S_FLOAT_TY]]* [[VAR1_RHS]]) +// CHECK: [[TO_FLOAT:%.+]] = call frozen float @{{.+}}([[S_FLOAT_TY]]* frozen [[VAR1_RHS]]) // CHECK: [[VAR1_REDUCTION_BOOL:%.+]] = fcmp une float [[TO_FLOAT]], 0.0 // CHECK: br label %[[END2]] // CHECK: [[END2]] // CHECK: [[COND_LVALUE:%.+]] = phi i1 [ false, %{{.+}} ], [ [[VAR1_REDUCTION_BOOL]], %[[TRUE]] ] // CHECK: [[CONV:%.+]] = uitofp i1 [[COND_LVALUE]] to float -// CHECK: call void @{{.+}}([[S_FLOAT_TY]]* [[COND_LVALUE:%.+]], float [[CONV]]) +// CHECK: call void @{{.+}}([[S_FLOAT_TY]]* frozen [[COND_LVALUE:%.+]], float frozen [[CONV]]) // CHECK: [[BC1:%.+]] = bitcast [[S_FLOAT_TY]]* [[VAR1_LHS]] to i8* // CHECK: [[BC2:%.+]] = bitcast [[S_FLOAT_TY]]* [[COND_LVALUE]] to i8* // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[BC1]], i8* align 4 [[BC2]], i64 4, i1 false) @@ -539,7 +539,7 @@ // CHECK: store float [[UP]], float* [[T_VAR1_LHS]], // CHECK: ret void -// CHECK: define internal void [[MAIN_MICROTASK1]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}, i64 %{{.+}}, i64 %{{.+}}, i32* {{.+}} %{{.+}}, [2 x i32]* nonnull align 4 dereferenceable(8) %{{.+}}, [10 x [4 x [[S_FLOAT_TY]]]]* nonnull align 4 dereferenceable(160) %{{.+}}) +// CHECK: define internal void [[MAIN_MICROTASK1]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}, i64 frozen %{{.+}}, i64 frozen %{{.+}}, i32* {{.+}} %{{.+}}, [2 x i32]* frozen nonnull align 4 dereferenceable(8) %{{.+}}, [10 x [4 x [[S_FLOAT_TY]]]]* frozen nonnull align 4 dereferenceable(160) %{{.+}}) // Reduction list for runtime. // CHECK: [[RED_LIST:%.+]] = alloca [4 x i8*], @@ -573,7 +573,7 @@ // CHECK: [[ISEMPTY:%.+]] = icmp eq [[S_FLOAT_TY]]* [[ARRS_PRIV]], [[END]] // CHECK: br i1 [[ISEMPTY]], // CHECK: phi [[S_FLOAT_TY]]* -// CHECK: call void @_ZN1SIfEC1Ev([[S_FLOAT_TY]]* % +// CHECK: call void @_ZN1SIfEC1Ev([[S_FLOAT_TY]]* frozen % // CHECK: [[DONE:%.+]] = icmp eq [[S_FLOAT_TY]]* %{{.+}}, [[END]] // CHECK: br i1 [[DONE]], @@ -629,7 +629,7 @@ // CHECK: [[ISEMPTY:%.+]] = icmp eq [[S_FLOAT_TY]]* [[ARRS_LB]], [[END]] // CHECK: br i1 [[ISEMPTY]], // CHECK: phi [[S_FLOAT_TY]]* -// CHECK: [[AND:%.+]] = call nonnull align 4 dereferenceable(4) [[S_FLOAT_TY]]* @_ZN1SIfEanERKS0_([[S_FLOAT_TY]]* %{{.+}}, [[S_FLOAT_TY]]* nonnull align 4 dereferenceable(4) %{{.+}}) +// CHECK: [[AND:%.+]] = call frozen nonnull align 4 dereferenceable(4) [[S_FLOAT_TY]]* @_ZN1SIfEanERKS0_([[S_FLOAT_TY]]* frozen %{{.+}}, [[S_FLOAT_TY]]* frozen nonnull align 4 dereferenceable(4) %{{.+}}) // CHECK: [[BITCAST:%.+]] = bitcast [[S_FLOAT_TY]]* [[AND]] to i8* // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 %{{.+}}, i8* align 4 [[BITCAST]], i64 4, i1 false) // CHECK: [[DONE:%.+]] = icmp eq [[S_FLOAT_TY]]* %{{.+}}, [[END]] @@ -659,7 +659,7 @@ // CHECK: br i1 [[ISEMPTY]], // CHECK: phi [[S_FLOAT_TY]]* // CHECK: call void @__kmpc_critical( -// CHECK: [[AND:%.+]] = call nonnull align 4 dereferenceable(4) [[S_FLOAT_TY]]* @_ZN1SIfEanERKS0_([[S_FLOAT_TY]]* %{{.+}}, [[S_FLOAT_TY]]* nonnull align 4 dereferenceable(4) %{{.+}}) +// CHECK: [[AND:%.+]] = call frozen nonnull align 4 dereferenceable(4) [[S_FLOAT_TY]]* @_ZN1SIfEanERKS0_([[S_FLOAT_TY]]* frozen %{{.+}}, [[S_FLOAT_TY]]* frozen nonnull align 4 dereferenceable(4) %{{.+}}) // CHECK: [[BITCAST:%.+]] = bitcast [[S_FLOAT_TY]]* [[AND]] to i8* // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 %{{.+}}, i8* align 4 [[BITCAST]], i64 4, i1 false) // CHECK: call void @__kmpc_end_critical( @@ -675,7 +675,7 @@ // CHECK: [[ISEMPTY:%.+]] = icmp eq [[S_FLOAT_TY]]* [[ARRS_PRIV]], [[END]] // CHECK: br i1 [[ISEMPTY]], // CHECK: phi [[S_FLOAT_TY]]* -// CHECK: call void @_ZN1SIfED1Ev([[S_FLOAT_TY]]* % +// CHECK: call void @_ZN1SIfED1Ev([[S_FLOAT_TY]]* frozen % // CHECK: [[DONE:%.+]] = icmp eq [[S_FLOAT_TY]]* %{{.+}}, [[ARRS_PRIV]] // CHECK: br i1 [[DONE]], // CHECK: call void @llvm.stackrestore(i8* @@ -688,7 +688,7 @@ // *(Type-1*)lhs[-1] = ReductionOperation-1(*(Type-1*)lhs[-1], // *(Type-1*)rhs[-1]); // } -// CHECK: define internal void [[REDUCTION_FUNC]](i8* %0, i8* %1) +// CHECK: define internal void [[REDUCTION_FUNC]](i8* frozen %0, i8* frozen %1) // arr_rhs = (int*)rhs[0]; // CHECK: [[ARR_RHS_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST_RHS:%.+]], i64 0, i64 0 // CHECK: [[ARR_RHS_VOID:%.+]] = load i8*, i8** [[ARR_RHS_REF]], @@ -732,7 +732,7 @@ // CHECK: [[ISEMPTY:%.+]] = icmp eq [[S_FLOAT_TY]]* [[ARRS_LB]], [[END]] // CHECK: br i1 [[ISEMPTY]], // CHECK: phi [[S_FLOAT_TY]]* -// CHECK: [[AND:%.+]] = call nonnull align 4 dereferenceable(4) [[S_FLOAT_TY]]* @_ZN1SIfEanERKS0_([[S_FLOAT_TY]]* %{{.+}}, [[S_FLOAT_TY]]* nonnull align 4 dereferenceable(4) %{{.+}}) +// CHECK: [[AND:%.+]] = call frozen nonnull align 4 dereferenceable(4) [[S_FLOAT_TY]]* @_ZN1SIfEanERKS0_([[S_FLOAT_TY]]* frozen %{{.+}}, [[S_FLOAT_TY]]* frozen nonnull align 4 dereferenceable(4) %{{.+}}) // CHECK: [[BITCAST:%.+]] = bitcast [[S_FLOAT_TY]]* [[AND]] to i8* // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 %{{.+}}, i8* align 4 [[BITCAST]], i64 4, i1 false) // CHECK: [[DONE:%.+]] = icmp eq [[S_FLOAT_TY]]* %{{.+}}, [[END]] @@ -740,7 +740,7 @@ // CHECK: ret void -// CHECK: define internal void [[MAIN_MICROTASK2]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}, i64 %{{.+}}, i64 %{{.+}}, i32* {{.+}} %{{.+}}, [10 x [4 x [[S_FLOAT_TY]]]]* nonnull align 4 dereferenceable(160) %{{.+}}) +// CHECK: define internal void [[MAIN_MICROTASK2]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}, i64 frozen %{{.+}}, i64 frozen %{{.+}}, i32* {{.+}} %{{.+}}, [10 x [4 x [[S_FLOAT_TY]]]]* frozen nonnull align 4 dereferenceable(160) %{{.+}}) // CHECK: [[ARRS_PRIV:%.+]] = alloca [10 x [4 x [[S_FLOAT_TY]]]], @@ -768,7 +768,7 @@ // CHECK: [[ISEMPTY:%.+]] = icmp eq [[S_FLOAT_TY]]* [[BEGIN]], [[END]] // CHECK: br i1 [[ISEMPTY]], // CHECK: phi [[S_FLOAT_TY]]* -// CHECK: call void @_ZN1SIfEC1Ev([[S_FLOAT_TY]]* % +// CHECK: call void @_ZN1SIfEC1Ev([[S_FLOAT_TY]]* frozen % // CHECK: [[DONE:%.+]] = icmp eq [[S_FLOAT_TY]]* %{{.+}}, [[END]] // CHECK: br i1 [[DONE]], // CHECK: [[LHS_BEGIN:%.+]] = bitcast [10 x [4 x [[S_FLOAT_TY]]]]* %{{.+}} to [[S_FLOAT_TY]]* @@ -823,7 +823,7 @@ // CHECK: [[ISEMPTY:%.+]] = icmp eq [[S_FLOAT_TY]]* [[LHS_BEGIN]], [[END]] // CHECK: br i1 [[ISEMPTY]], // CHECK: phi [[S_FLOAT_TY]]* -// CHECK: [[AND:%.+]] = call nonnull align 4 dereferenceable(4) [[S_FLOAT_TY]]* @_ZN1SIfEanERKS0_([[S_FLOAT_TY]]* %{{.+}}, [[S_FLOAT_TY]]* nonnull align 4 dereferenceable(4) %{{.+}}) +// CHECK: [[AND:%.+]] = call frozen nonnull align 4 dereferenceable(4) [[S_FLOAT_TY]]* @_ZN1SIfEanERKS0_([[S_FLOAT_TY]]* frozen %{{.+}}, [[S_FLOAT_TY]]* frozen nonnull align 4 dereferenceable(4) %{{.+}}) // CHECK: [[BITCAST:%.+]] = bitcast [[S_FLOAT_TY]]* [[AND]] to i8* // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 %{{.+}}, i8* align 4 [[BITCAST]], i64 4, i1 false) // CHECK: [[DONE:%.+]] = icmp eq [[S_FLOAT_TY]]* %{{.+}}, [[END]] @@ -853,7 +853,7 @@ // CHECK: br i1 [[ISEMPTY]], // CHECK: phi [[S_FLOAT_TY]]* // CHECK: call void @__kmpc_critical( -// CHECK: [[AND:%.+]] = call nonnull align 4 dereferenceable(4) [[S_FLOAT_TY]]* @_ZN1SIfEanERKS0_([[S_FLOAT_TY]]* %{{.+}}, [[S_FLOAT_TY]]* nonnull align 4 dereferenceable(4) %{{.+}}) +// CHECK: [[AND:%.+]] = call frozen nonnull align 4 dereferenceable(4) [[S_FLOAT_TY]]* @_ZN1SIfEanERKS0_([[S_FLOAT_TY]]* frozen %{{.+}}, [[S_FLOAT_TY]]* frozen nonnull align 4 dereferenceable(4) %{{.+}}) // CHECK: [[BITCAST:%.+]] = bitcast [[S_FLOAT_TY]]* [[AND]] to i8* // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 %{{.+}}, i8* align 4 [[BITCAST]], i64 4, i1 false) // CHECK: call void @__kmpc_end_critical( @@ -869,7 +869,7 @@ // CHECK: [[END:%.+]] = getelementptr inbounds [[S_FLOAT_TY]], [[S_FLOAT_TY]]* [[BEGIN]], i64 40 // CHECK: br // CHECK: phi [[S_FLOAT_TY]]* -// CHECK: call void @_ZN1SIfED1Ev([[S_FLOAT_TY]]* % +// CHECK: call void @_ZN1SIfED1Ev([[S_FLOAT_TY]]* frozen % // CHECK: [[DONE:%.+]] = icmp eq [[S_FLOAT_TY]]* %{{.+}}, [[BEGIN]] // CHECK: br i1 [[DONE]], // CHECK: call void @llvm.stackrestore(i8* @@ -883,7 +883,7 @@ // *(Type-1*)lhs[-1] = ReductionOperation-1(*(Type-1*)lhs[-1], // *(Type-1*)rhs[-1]); // } -// CHECK: define internal void [[REDUCTION_FUNC]](i8* %0, i8* %1) +// CHECK: define internal void [[REDUCTION_FUNC]](i8* frozen %0, i8* frozen %1) // arr_rhs = (int*)rhs[0]; // CHECK: [[ARR_RHS_REF:%.+]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[RED_LIST_RHS:%.+]], i64 0, i64 0 // CHECK: [[ARR_RHS_VOID:%.+]] = load i8*, i8** [[ARR_RHS_REF]], @@ -922,7 +922,7 @@ // CHECK: [[ISEMPTY:%.+]] = icmp eq [[S_FLOAT_TY]]* [[ARRS_LB]], [[END]] // CHECK: br i1 [[ISEMPTY]], // CHECK: phi [[S_FLOAT_TY]]* -// CHECK: [[AND:%.+]] = call nonnull align 4 dereferenceable(4) [[S_FLOAT_TY]]* @_ZN1SIfEanERKS0_([[S_FLOAT_TY]]* %{{.+}}, [[S_FLOAT_TY]]* nonnull align 4 dereferenceable(4) %{{.+}}) +// CHECK: [[AND:%.+]] = call frozen nonnull align 4 dereferenceable(4) [[S_FLOAT_TY]]* @_ZN1SIfEanERKS0_([[S_FLOAT_TY]]* frozen %{{.+}}, [[S_FLOAT_TY]]* frozen nonnull align 4 dereferenceable(4) %{{.+}}) // CHECK: [[BITCAST:%.+]] = bitcast [[S_FLOAT_TY]]* [[AND]] to i8* // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 %{{.+}}, i8* align 4 [[BITCAST]], i64 4, i1 false) // CHECK: [[DONE:%.+]] = icmp eq [[S_FLOAT_TY]]* %{{.+}}, [[END]] @@ -930,7 +930,7 @@ // CHECK: ret void -// CHECK: define internal void [[MAIN_MICROTASK3]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}, i32* {{.*}} %{{.+}}) +// CHECK: define internal void [[MAIN_MICROTASK3]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}, i32* {{.*}} %{{.+}}) // CHECK: [[VLA1_ORIG_ADDR:%.+]] = alloca i64 // CHECK: [[VLA2_ORIG_ADDR:%.+]] = alloca i64 @@ -958,7 +958,7 @@ // CHECK: ret void -// CHECK: define internal void [[MAIN_MICROTASK4]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}, [[S_FLOAT_TY]]*** nonnull align 8 dereferenceable(8) %{{.+}}) +// CHECK: define internal void [[MAIN_MICROTASK4]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}, [[S_FLOAT_TY]]*** frozen nonnull align 8 dereferenceable(8) %{{.+}}) // CHECK: [[VAR2_ORIG_ADDR:%.+]] = alloca [[S_FLOAT_TY]]***, @@ -986,7 +986,7 @@ // CHECK: store [[S_FLOAT_TY]]* [[PSEUDO_VAR2_PRIV]], [[S_FLOAT_TY]]** [[REF]] // CHECK: ret void -// CHECK: define internal void [[MAIN_MICROTASK5]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}, [[S_FLOAT_TY]]*** nonnull align 8 dereferenceable(8) %{{.+}}) +// CHECK: define internal void [[MAIN_MICROTASK5]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}, [[S_FLOAT_TY]]*** frozen nonnull align 8 dereferenceable(8) %{{.+}}) // CHECK: [[VAR2_ORIG_ADDR:%.+]] = alloca [[S_FLOAT_TY]]***, // CHECK: [[VAR2_PRIV:%.+]] = alloca [1 x [6 x [[S_FLOAT_TY]]]], @@ -1015,7 +1015,7 @@ // CHECK: store [[S_FLOAT_TY]]* [[VAR2_PRIV]], [[S_FLOAT_TY]]** [[REF]] // CHECK: ret void -// CHECK: define internal void [[MAIN_MICROTASK6]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}, [[S_FLOAT_TY]]*** nonnull align 8 dereferenceable(8) %{{.+}}) +// CHECK: define internal void [[MAIN_MICROTASK6]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}, [[S_FLOAT_TY]]*** frozen nonnull align 8 dereferenceable(8) %{{.+}}) // CHECK: [[VAR2_ORIG_ADDR:%.+]] = alloca [[S_FLOAT_TY]]***, // CHECK: [[VAR2_PRIV:%.+]] = alloca [1 x [6 x [[S_FLOAT_TY]]]], @@ -1044,7 +1044,7 @@ // CHECK: store [[S_FLOAT_TY]]* [[VAR2_PRIV]], [[S_FLOAT_TY]]** [[REF]] // CHECK: ret void -// CHECK: define internal void [[MAIN_MICROTASK7]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}, [[S_FLOAT_TY]]*** nonnull align 8 dereferenceable(8) %{{.+}}) +// CHECK: define internal void [[MAIN_MICROTASK7]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}, [[S_FLOAT_TY]]*** frozen nonnull align 8 dereferenceable(8) %{{.+}}) // CHECK: [[VAR2_ORIG_ADDR:%.+]] = alloca [[S_FLOAT_TY]]***, // CHECK: [[VAR2_PRIV:%.+]] = alloca [[S_FLOAT_TY]], @@ -1072,7 +1072,7 @@ // CHECK: store [[S_FLOAT_TY]]* [[PSEUDO_VAR2_PRIV]], [[S_FLOAT_TY]]** [[REF]] // CHECK: ret void -// CHECK: define internal void [[MAIN_MICROTASK8]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}, [5 x [[S_FLOAT_TY]]]* nonnull align 4 dereferenceable(20) %{{.+}}) +// CHECK: define internal void [[MAIN_MICROTASK8]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}, [5 x [[S_FLOAT_TY]]]* frozen nonnull align 4 dereferenceable(20) %{{.+}}) // CHECK: [[VVAR2_ORIG_ADDR:%.+]] = alloca [5 x [[S_FLOAT_TY]]]*, // CHECK: [[VVAR2_PRIV:%.+]] = alloca [5 x [[S_FLOAT_TY]]], @@ -1093,7 +1093,7 @@ // CHECK: [[VVAR2_PRIV:%.+]] = getelementptr [[S_FLOAT_TY]], [[S_FLOAT_TY]]* [[VVAR2_PRIV_PTR]], i64 [[OFFSET]] // CHECK: ret void -// CHECK: define internal void [[MAIN_MICROTASK9]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}, [4 x [[S_FLOAT_TY]]]* nonnull align 4 dereferenceable(16) %{{.+}}) +// CHECK: define internal void [[MAIN_MICROTASK9]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}, [4 x [[S_FLOAT_TY]]]* frozen nonnull align 4 dereferenceable(16) %{{.+}}) // CHECK: [[VAR3_ORIG_ADDR:%.+]] = alloca [4 x [[S_FLOAT_TY]]]*, // CHECK: [[VAR3_PRIV:%.+]] = alloca [2 x [[S_FLOAT_TY]]], @@ -1126,7 +1126,7 @@ // CHECK: ret void -// CHECK: define internal void [[MAIN_MICROTASK10]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}, [4 x [[S_FLOAT_TY]]]* nonnull align 4 dereferenceable(16) %{{.+}}) +// CHECK: define internal void [[MAIN_MICROTASK10]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}, [4 x [[S_FLOAT_TY]]]* frozen nonnull align 4 dereferenceable(16) %{{.+}}) // CHECK: [[VAR3_ORIG_ADDR:%.+]] = alloca [4 x [[S_FLOAT_TY]]]*, // CHECK: [[VAR3_PRIV:%.+]] = alloca [2 x [[S_FLOAT_TY]]], @@ -1159,7 +1159,7 @@ // CHECK: ret void -// CHECK: define internal void [[MAIN_MICROTASK11]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}, [4 x [[S_FLOAT_TY]]]* nonnull align 4 dereferenceable(16) %{{.+}}) +// CHECK: define internal void [[MAIN_MICROTASK11]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}, [4 x [[S_FLOAT_TY]]]* frozen nonnull align 4 dereferenceable(16) %{{.+}}) // CHECK: [[VAR3_ORIG_ADDR:%.+]] = alloca [4 x [[S_FLOAT_TY]]]*, @@ -1192,7 +1192,7 @@ // CHECK: ret void -// CHECK: define internal void [[MAIN_MICROTASK12]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}, [4 x [[S_FLOAT_TY]]]* nonnull align 4 dereferenceable(16) %{{.+}}) +// CHECK: define internal void [[MAIN_MICROTASK12]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}, [4 x [[S_FLOAT_TY]]]* frozen nonnull align 4 dereferenceable(16) %{{.+}}) // CHECK: [[VAR3_ORIG_ADDR:%.+]] = alloca [4 x [[S_FLOAT_TY]]]*, // CHECK: [[VAR3_PRIV:%.+]] = alloca [4 x [[S_FLOAT_TY]]], @@ -1217,7 +1217,7 @@ // CHECK: define {{.*}} i{{[0-9]+}} [[TMAIN_INT_42]]() // CHECK: [[TEST:%.+]] = alloca [[S_INT_TY]], -// CHECK: call {{.*}} [[S_INT_TY_CONSTR:@.+]]([[S_INT_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_INT_TY_CONSTR:@.+]]([[S_INT_TY]]* frozen [[TEST]]) // CHECK: call void (%{{.+}}*, i{{[0-9]+}}, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)*, ...) @__kmpc_fork_call(%{{.+}}* @{{.+}}, i{{[0-9]+}} 6, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)* bitcast (void (i{{[0-9]+}}*, i{{[0-9]+}}*, i32*, [[S_INT_TY]]*, [[S_INT_TY]]*, i32*, [2 x i32]*, [2 x [[S_INT_TY]]]*)* [[TMAIN_MICROTASK:@.+]] to void // Not interested in this one: // CHECK: call void (%{{.+}}*, i{{[0-9]+}}, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)*, ...) @__kmpc_fork_call(%{{.+}}* @{{.+}}, i{{[0-9]+}} 4, @@ -1225,7 +1225,7 @@ // CHECK: call {{.*}} [[S_INT_TY_DESTR:@.+]]([[S_INT_TY]]* // CHECK: ret // -// CHECK: define internal void [[TMAIN_MICROTASK]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}, i32* nonnull align 4 dereferenceable(4) %{{.+}}, [[S_INT_TY]]* nonnull align 4 dereferenceable(4) %{{.+}}, [[S_INT_TY]]* nonnull align 4 dereferenceable(4) %{{.+}}, i32* nonnull align 4 dereferenceable(4) %{{.+}}, [2 x i32]* nonnull align 4 dereferenceable(8) %{{.+}}, [2 x [[S_INT_TY]]]* nonnull align 4 dereferenceable(8) %{{.+}}) +// CHECK: define internal void [[TMAIN_MICROTASK]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}, i32* frozen nonnull align 4 dereferenceable(4) %{{.+}}, [[S_INT_TY]]* frozen nonnull align 4 dereferenceable(4) %{{.+}}, [[S_INT_TY]]* frozen nonnull align 4 dereferenceable(4) %{{.+}}, i32* frozen nonnull align 4 dereferenceable(4) %{{.+}}, [2 x i32]* frozen nonnull align 4 dereferenceable(8) %{{.+}}, [2 x [[S_INT_TY]]]* frozen nonnull align 4 dereferenceable(8) %{{.+}}) // CHECK: alloca i{{[0-9]+}}, // CHECK: alloca i{{[0-9]+}}, // CHECK: alloca i{{[0-9]+}}, @@ -1252,10 +1252,10 @@ // For & reduction operation initial value of private variable is ones in all bits. // CHECK: [[VAR_REF:%.+]] = load [[S_INT_TY]]*, [[S_INT_TY]]** % -// CHECK: call {{.*}} [[S_INT_TY_CONSTR:@.+]]([[S_INT_TY]]* [[VAR_PRIV]]) +// CHECK: call {{.*}} [[S_INT_TY_CONSTR:@.+]]([[S_INT_TY]]* frozen [[VAR_PRIV]]) // For && reduction operation initial value of private variable is 1.0. -// CHECK: call {{.*}} [[S_INT_TY_CONSTR:@.+]]([[S_INT_TY]]* [[VAR1_PRIV]]) +// CHECK: call {{.*}} [[S_INT_TY_CONSTR:@.+]]([[S_INT_TY]]* frozen [[VAR1_PRIV]]) // For min reduction operation initial value of private variable is largest repesentable value. // CHECK: store i{{[0-9]+}} 2147483647, i{{[0-9]+}}* [[T_VAR1_PRIV]], @@ -1300,23 +1300,23 @@ // CHECK: store i{{[0-9]+}} [[UP]], i{{[0-9]+}}* [[T_VAR_REF]], // var = var.operator &(var_reduction); -// CHECK: [[UP:%.+]] = call nonnull align 4 dereferenceable(4) [[S_INT_TY]]* @{{.+}}([[S_INT_TY]]* [[VAR_REF]], [[S_INT_TY]]* nonnull align 4 dereferenceable(4) [[VAR_PRIV]]) +// CHECK: [[UP:%.+]] = call frozen nonnull align 4 dereferenceable(4) [[S_INT_TY]]* @{{.+}}([[S_INT_TY]]* frozen [[VAR_REF]], [[S_INT_TY]]* frozen nonnull align 4 dereferenceable(4) [[VAR_PRIV]]) // CHECK: [[BC1:%.+]] = bitcast [[S_INT_TY]]* [[VAR_REF]] to i8* // CHECK: [[BC2:%.+]] = bitcast [[S_INT_TY]]* [[UP]] to i8* // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[BC1]], i8* align 4 [[BC2]], i64 4, i1 false) // var1 = var1.operator &&(var1_reduction); -// CHECK: [[TO_INT:%.+]] = call i{{[0-9]+}} @{{.+}}([[S_INT_TY]]* [[VAR1_REF]]) +// CHECK: [[TO_INT:%.+]] = call frozen i{{[0-9]+}} @{{.+}}([[S_INT_TY]]* frozen [[VAR1_REF]]) // CHECK: [[VAR1_BOOL:%.+]] = icmp ne i{{[0-9]+}} [[TO_INT]], 0 // CHECK: br i1 [[VAR1_BOOL]], label %[[TRUE:.+]], label %[[END2:.+]] // CHECK: [[TRUE]] -// CHECK: [[TO_INT:%.+]] = call i{{[0-9]+}} @{{.+}}([[S_INT_TY]]* [[VAR1_PRIV]]) +// CHECK: [[TO_INT:%.+]] = call frozen i{{[0-9]+}} @{{.+}}([[S_INT_TY]]* frozen [[VAR1_PRIV]]) // CHECK: [[VAR1_REDUCTION_BOOL:%.+]] = icmp ne i{{[0-9]+}} [[TO_INT]], 0 // CHECK: br label %[[END2]] // CHECK: [[END2]] // CHECK: [[COND_LVALUE:%.+]] = phi i1 [ false, %{{.+}} ], [ [[VAR1_REDUCTION_BOOL]], %[[TRUE]] ] // CHECK: [[CONV:%.+]] = zext i1 [[COND_LVALUE]] to i32 -// CHECK: call void @{{.+}}([[S_INT_TY]]* [[COND_LVALUE:%.+]], i32 [[CONV]]) +// CHECK: call void @{{.+}}([[S_INT_TY]]* frozen [[COND_LVALUE:%.+]], i32 frozen [[CONV]]) // CHECK: [[BC1:%.+]] = bitcast [[S_INT_TY]]* [[VAR1_REF]] to i8* // CHECK: [[BC2:%.+]] = bitcast [[S_INT_TY]]* [[COND_LVALUE]] to i8* // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[BC1]], i8* align 4 [[BC2]], i64 4, i1 false) @@ -1342,7 +1342,7 @@ // var = var.operator &(var_reduction); // CHECK: call void @__kmpc_critical( -// CHECK: [[UP:%.+]] = call nonnull align 4 dereferenceable(4) [[S_INT_TY]]* @{{.+}}([[S_INT_TY]]* [[VAR_REF]], [[S_INT_TY]]* nonnull align 4 dereferenceable(4) [[VAR_PRIV]]) +// CHECK: [[UP:%.+]] = call frozen nonnull align 4 dereferenceable(4) [[S_INT_TY]]* @{{.+}}([[S_INT_TY]]* frozen [[VAR_REF]], [[S_INT_TY]]* frozen nonnull align 4 dereferenceable(4) [[VAR_PRIV]]) // CHECK: [[BC1:%.+]] = bitcast [[S_INT_TY]]* [[VAR_REF]] to i8* // CHECK: [[BC2:%.+]] = bitcast [[S_INT_TY]]* [[UP]] to i8* // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[BC1]], i8* align 4 [[BC2]], i64 4, i1 false) @@ -1350,17 +1350,17 @@ // var1 = var1.operator &&(var1_reduction); // CHECK: call void @__kmpc_critical( -// CHECK: [[TO_INT:%.+]] = call i{{[0-9]+}} @{{.+}}([[S_INT_TY]]* [[VAR1_REF]]) +// CHECK: [[TO_INT:%.+]] = call frozen i{{[0-9]+}} @{{.+}}([[S_INT_TY]]* frozen [[VAR1_REF]]) // CHECK: [[VAR1_BOOL:%.+]] = icmp ne i{{[0-9]+}} [[TO_INT]], 0 // CHECK: br i1 [[VAR1_BOOL]], label %[[TRUE:.+]], label %[[END2:.+]] // CHECK: [[TRUE]] -// CHECK: [[TO_INT:%.+]] = call i{{[0-9]+}} @{{.+}}([[S_INT_TY]]* [[VAR1_PRIV]]) +// CHECK: [[TO_INT:%.+]] = call frozen i{{[0-9]+}} @{{.+}}([[S_INT_TY]]* frozen [[VAR1_PRIV]]) // CHECK: [[VAR1_REDUCTION_BOOL:%.+]] = icmp ne i{{[0-9]+}} [[TO_INT]], 0 // CHECK: br label %[[END2]] // CHECK: [[END2]] // CHECK: [[COND_LVALUE:%.+]] = phi i1 [ false, %{{.+}} ], [ [[VAR1_REDUCTION_BOOL]], %[[TRUE]] ] // CHECK: [[CONV:%.+]] = zext i1 [[COND_LVALUE]] to i32 -// CHECK: call void @{{.+}}([[S_INT_TY]]* [[COND_LVALUE:%.+]], i32 [[CONV]]) +// CHECK: call void @{{.+}}([[S_INT_TY]]* frozen [[COND_LVALUE:%.+]], i32 frozen [[CONV]]) // CHECK: [[BC1:%.+]] = bitcast [[S_INT_TY]]* [[VAR1_REF]] to i8* // CHECK: [[BC2:%.+]] = bitcast [[S_INT_TY]]* [[COND_LVALUE]] to i8* // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[BC1]], i8* align 4 [[BC2]], i64 4, i1 false) @@ -1373,7 +1373,7 @@ // break; // CHECK: br label %[[RED_DONE]] // CHECK: [[RED_DONE]] -// CHECK-DAG: call {{.*}} [[S_INT_TY_DESTR]]([[S_INT_TY]]* [[VAR_PRIV]]) +// CHECK-DAG: call {{.*}} [[S_INT_TY_DESTR]]([[S_INT_TY]]* frozen [[VAR_PRIV]]) // CHECK-DAG: call {{.*}} [[S_INT_TY_DESTR]]([[S_INT_TY]]* // CHECK: ret void @@ -1383,7 +1383,7 @@ // *(Type-1*)lhs[-1] = ReductionOperation-1(*(Type-1*)lhs[-1], // *(Type-1*)rhs[-1]); // } -// CHECK: define internal void [[REDUCTION_FUNC]](i8* %0, i8* %1) +// CHECK: define internal void [[REDUCTION_FUNC]](i8* frozen %0, i8* frozen %1) // t_var_lhs = (i{{[0-9]+}}*)lhs[0]; // CHECK: [[T_VAR_RHS_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST_RHS:%.+]], i64 0, i64 0 // CHECK: [[T_VAR_RHS_VOID:%.+]] = load i8*, i8** [[T_VAR_RHS_REF]], @@ -1427,23 +1427,23 @@ // CHECK: store i{{[0-9]+}} [[UP]], i{{[0-9]+}}* [[T_VAR_LHS]], // var_lhs = var_lhs.operator &(var_rhs); -// CHECK: [[UP:%.+]] = call nonnull align 4 dereferenceable(4) [[S_INT_TY]]* @{{.+}}([[S_INT_TY]]* [[VAR_LHS]], [[S_INT_TY]]* nonnull align 4 dereferenceable(4) [[VAR_RHS]]) +// CHECK: [[UP:%.+]] = call frozen nonnull align 4 dereferenceable(4) [[S_INT_TY]]* @{{.+}}([[S_INT_TY]]* frozen [[VAR_LHS]], [[S_INT_TY]]* frozen nonnull align 4 dereferenceable(4) [[VAR_RHS]]) // CHECK: [[BC1:%.+]] = bitcast [[S_INT_TY]]* [[VAR_LHS]] to i8* // CHECK: [[BC2:%.+]] = bitcast [[S_INT_TY]]* [[UP]] to i8* // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[BC1]], i8* align 4 [[BC2]], i64 4, i1 false) // var1_lhs = var1_lhs.operator &&(var1_rhs); -// CHECK: [[TO_INT:%.+]] = call i{{[0-9]+}} @{{.+}}([[S_INT_TY]]* [[VAR1_LHS]]) +// CHECK: [[TO_INT:%.+]] = call frozen i{{[0-9]+}} @{{.+}}([[S_INT_TY]]* frozen [[VAR1_LHS]]) // CHECK: [[VAR1_BOOL:%.+]] = icmp ne i{{[0-9]+}} [[TO_INT]], 0 // CHECK: br i1 [[VAR1_BOOL]], label %[[TRUE:.+]], label %[[END2:.+]] // CHECK: [[TRUE]] -// CHECK: [[TO_INT:%.+]] = call i{{[0-9]+}} @{{.+}}([[S_INT_TY]]* [[VAR1_RHS]]) +// CHECK: [[TO_INT:%.+]] = call frozen i{{[0-9]+}} @{{.+}}([[S_INT_TY]]* frozen [[VAR1_RHS]]) // CHECK: [[VAR1_REDUCTION_BOOL:%.+]] = icmp ne i{{[0-9]+}} [[TO_INT]], 0 // CHECK: br label %[[END2]] // CHECK: [[END2]] // CHECK: [[COND_LVALUE:%.+]] = phi i1 [ false, %{{.+}} ], [ [[VAR1_REDUCTION_BOOL]], %[[TRUE]] ] // CHECK: [[CONV:%.+]] = zext i1 [[COND_LVALUE]] to i32 -// CHECK: call void @{{.+}}([[S_INT_TY]]* [[COND_LVALUE:%.+]], i32 [[CONV]]) +// CHECK: call void @{{.+}}([[S_INT_TY]]* frozen [[COND_LVALUE:%.+]], i32 frozen [[CONV]]) // CHECK: [[BC1:%.+]] = bitcast [[S_INT_TY]]* [[VAR1_LHS]] to i8* // CHECK: [[BC2:%.+]] = bitcast [[S_INT_TY]]* [[COND_LVALUE]] to i8* // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[BC1]], i8* align 4 [[BC2]], i64 4, i1 false) @@ -1457,7 +1457,7 @@ // CHECK: store i{{[0-9]+}} [[UP]], i{{[0-9]+}}* [[T_VAR1_LHS]], // CHECK: ret void -// CHECK: define internal void [[TMAIN_MICROTASK2]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}, [42 x [[S_INT_TY]]]* nonnull align 4 dereferenceable(168) %{{.*}}, [2 x i32]* nonnull align 4 dereferenceable(8) %{{.*}}, i32* nonnull align 4 dereferenceable(4) %{{.*}}, [2 x [[S_INT_TY]]]* nonnull align 4 dereferenceable(8) %{{.*}}, [[S_INT_TY]]* nonnull align 4 dereferenceable(4) %{{.*}}) +// CHECK: define internal void [[TMAIN_MICROTASK2]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}, [42 x [[S_INT_TY]]]* frozen nonnull align 4 dereferenceable(168) %{{.*}}, [2 x i32]* frozen nonnull align 4 dereferenceable(8) %{{.*}}, i32* frozen nonnull align 4 dereferenceable(4) %{{.*}}, [2 x [[S_INT_TY]]]* frozen nonnull align 4 dereferenceable(8) %{{.*}}, [[S_INT_TY]]* frozen nonnull align 4 dereferenceable(4) %{{.*}}) // CHECK: [[ARR_ORIG_ADDR:%.+]] = alloca [42 x [[S_INT_TY]]]*, // CHECK: [[ARR_PRIV:%.+]] = alloca [40 x [[S_INT_TY]]], diff --git a/clang/test/OpenMP/for_reduction_codegen_UDR.cpp b/clang/test/OpenMP/for_reduction_codegen_UDR.cpp --- a/clang/test/OpenMP/for_reduction_codegen_UDR.cpp +++ b/clang/test/OpenMP/for_reduction_codegen_UDR.cpp @@ -62,7 +62,7 @@ void bazz() { S s; // CHECK: [[S_ADDR:%.+]] = alloca [[S_INT_TY]], -// CHECK: call {{.*}} [[S_INT_TY_CONSTR:@.+]]([[S_INT_TY]]* [[S_ADDR]]) +// CHECK: call {{.*}} [[S_INT_TY_CONSTR:@.+]]([[S_INT_TY]]* frozen [[S_ADDR]]) // CHECK: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @{{.+}}, i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [[S_INT_TY]]*)* [[BAZZ_OUTLINE:@.+]] to void (i32*, i32*, ...)*), [[S_INT_TY]]* [[S_ADDR]]) // CHECK: call {{.*}} [[S_INT_TY_DESTR:@.+]]([[S_INT_TY]]* // CHECK: ret void @@ -74,15 +74,15 @@ // CHECK: define internal void [[BAZZ_OUTLINE]](i32* {{.+}}, i32* {{.+}}, [[S_INT_TY]]* {{.+}}) // CHECK: [[S_PRIV_ADDR:%.+]] = alloca [[S_INT_TY]], -// CHECK: call void [[BAZZ_INIT:@.+]]([[S_INT_TY]]* [[S_PRIV_ADDR]], [[S_INT_TY]]* [[S_ORIG_ADDR:%.+]]) -// CHECK: call void @{{.+}}([[S_INT_TY]]* [[S_ORIG_ADDR]], [[S_INT_TY]]* [[S_PRIV_ADDR]]) -// CHECK-NEXT: call void [[S_INT_TY_DESTR]]([[S_INT_TY]]* [[S_PRIV_ADDR]]) +// CHECK: call void [[BAZZ_INIT:@.+]]([[S_INT_TY]]* frozen [[S_PRIV_ADDR]], [[S_INT_TY]]* frozen [[S_ORIG_ADDR:%.+]]) +// CHECK: call void @{{.+}}([[S_INT_TY]]* frozen [[S_ORIG_ADDR]], [[S_INT_TY]]* frozen [[S_PRIV_ADDR]]) +// CHECK-NEXT: call void [[S_INT_TY_DESTR]]([[S_INT_TY]]* frozen [[S_PRIV_ADDR]]) // CHECK-NEXT: ret void // CHECK: define internal void [[BAZZ_INIT]]([[S_INT_TY]]* {{.*}}[[S_PRIV_ADDR:%.+]], [[S_INT_TY]]* {{.*}}[[S_ORIG_ADDR:%.+]]) // CHECK: store [[S_INT_TY]]* [[S_PRIV_ADDR]], [[S_INT_TY]]** [[S_PRIV_ADDR_REF:%.+]], // CHECK: [[S_PRIV_ADDR:%.+]] = load [[S_INT_TY]]*, [[S_INT_TY]]** [[S_PRIV_ADDR_REF]], -// CHECK: call void [[S_INT_TY_CONSTR]]([[S_INT_TY]]* [[S_PRIV_ADDR]]) +// CHECK: call void [[S_INT_TY_CONSTR]]([[S_INT_TY]]* frozen [[S_PRIV_ADDR]]) // CHECK-NEXT: ret void #pragma omp declare reduction(operator&& : int : omp_out = 111 & omp_in) @@ -173,7 +173,7 @@ // CHECK: define {{.*}}i{{[0-9]+}} @main() // CHECK: [[TEST:%.+]] = alloca [[S_FLOAT_TY]], -// CHECK: call {{.*}} [[S_FLOAT_TY_CONSTR:@.+]]([[S_FLOAT_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_FLOAT_TY_CONSTR:@.+]]([[S_FLOAT_TY]]* frozen [[TEST]]) // CHECK: call void (%{{.+}}*, i{{[0-9]+}}, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)*, ...) @__kmpc_fork_call(%{{.+}}* @{{.+}}, i{{[0-9]+}} 6, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)* bitcast (void (i{{[0-9]+}}*, i{{[0-9]+}}*, float*, [[S_FLOAT_TY]]*, [[S_FLOAT_TY]]*, float*, [2 x i32]*, [4 x [[S_FLOAT_TY]]]*)* [[MAIN_MICROTASK:@.+]] to void // CHECK: call void (%{{.+}}*, i{{[0-9]+}}, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)*, ...) @__kmpc_fork_call(%{{.+}}* @{{.+}}, i{{[0-9]+}} 5, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)* bitcast (void (i{{[0-9]+}}*, i{{[0-9]+}}*, i64, i64, i32*, [2 x i32]*, [10 x [4 x [[S_FLOAT_TY]]]]*)* [[MAIN_MICROTASK1:@.+]] to void // CHECK: call void (%{{.+}}*, i{{[0-9]+}}, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)*, ...) @__kmpc_fork_call(%{{.+}}* @{{.+}}, i{{[0-9]+}} 4, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)* bitcast (void (i{{[0-9]+}}*, i{{[0-9]+}}*, i64, i64, i32*, [10 x [4 x [[S_FLOAT_TY]]]]*)* [[MAIN_MICROTASK2:@.+]] to void @@ -185,7 +185,7 @@ // CHECK: call {{.*}} [[S_FLOAT_TY_DESTR:@.+]]([[S_FLOAT_TY]]* // CHECK: ret // -// CHECK: define internal void [[MAIN_MICROTASK]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}, float* nonnull align 4 dereferenceable(4) %{{.+}}, [[S_FLOAT_TY]]* nonnull align 4 dereferenceable(12) %{{.+}}, [[S_FLOAT_TY]]* nonnull align 4 dereferenceable(12) %{{.+}}, float* nonnull align 4 dereferenceable(4) %{{.+}}, [2 x i32]* nonnull align 4 dereferenceable(8) %vec, [4 x [[S_FLOAT_TY]]]* nonnull align 4 dereferenceable(48) %{{.+}}) +// CHECK: define internal void [[MAIN_MICROTASK]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}, float* frozen nonnull align 4 dereferenceable(4) %{{.+}}, [[S_FLOAT_TY]]* frozen nonnull align 4 dereferenceable(12) %{{.+}}, [[S_FLOAT_TY]]* frozen nonnull align 4 dereferenceable(12) %{{.+}}, float* frozen nonnull align 4 dereferenceable(4) %{{.+}}, [2 x i32]* frozen nonnull align 4 dereferenceable(8) %vec, [4 x [[S_FLOAT_TY]]]* frozen nonnull align 4 dereferenceable(48) %{{.+}}) // CHECK: [[T_VAR_PRIV:%.+]] = alloca float, // CHECK: [[VAR_PRIV:%.+]] = alloca [[S_FLOAT_TY]], // CHECK: [[VAR1_PRIV:%.+]] = alloca [[S_FLOAT_TY]], @@ -201,7 +201,7 @@ // CHECK: [[T_VAR1_REF:%.+]] = load float*, float** % // For + reduction operation initial value of private variable is -1. -// CHECK: call void [[RED_INIT1:@.+]](float* %{{.+}}, float* %{{.+}}) +// CHECK: call void [[RED_INIT1:@.+]](float* frozen %{{.+}}, float* frozen %{{.+}}) // For & reduction operation initial value of private variable is defined by call of 'init()' function. // CHECK: call void [[RED_INIT2:@.+]]( @@ -247,7 +247,7 @@ // case 1: // t_var += t_var_reduction; -// CHECK: call void [[RED_COMB1:@.+]](float* %{{.+}}, float* %{{.+}}) +// CHECK: call void [[RED_COMB1:@.+]](float* frozen %{{.+}}, float* frozen %{{.+}}) // var = var.operator &(var_reduction); // CHECK: call void [[RED_COMB2:@.+]]( @@ -267,7 +267,7 @@ // case 2: // t_var += t_var_reduction; // CHECK: call void @__kmpc_critical( -// CHECK: call void [[RED_COMB1]](float* %{{.+}}, float* %{{.+}}) +// CHECK: call void [[RED_COMB1]](float* frozen %{{.+}}, float* frozen %{{.+}}) // CHECK: call void @__kmpc_end_critical( // var = var.operator &(var_reduction); @@ -291,16 +291,16 @@ // break; // CHECK: br label %[[RED_DONE]] // CHECK: [[RED_DONE]] -// CHECK-DAG: call {{.*}} [[S_FLOAT_TY_DESTR]]([[S_FLOAT_TY]]* [[VAR_PRIV]]) +// CHECK-DAG: call {{.*}} [[S_FLOAT_TY_DESTR]]([[S_FLOAT_TY]]* frozen [[VAR_PRIV]]) // CHECK-DAG: call {{.*}} [[S_FLOAT_TY_DESTR]]([[S_FLOAT_TY]]* // CHECK: call void @__kmpc_barrier(%{{.+}}* [[IMPLICIT_BARRIER_LOC]], i{{[0-9]+}} [[GTID]]) // CHECK: ret void -// CHECK: define internal void [[RED_COMB1]](float* noalias %0, float* noalias %1) +// CHECK: define internal void [[RED_COMB1]](float* frozen noalias %0, float* frozen noalias %1) // CHECK: fsub float 2.220000e+02, % -// CHECK: define internal void [[RED_INIT1]](float* noalias %0, float* noalias %1) +// CHECK: define internal void [[RED_INIT1]](float* frozen noalias %0, float* frozen noalias %1) // CHECK: store float -1.0{{.+}}, float* // CHECK: define internal void [[RED_COMB2]]( @@ -321,7 +321,7 @@ // *(Type-1*)lhs[-1] = ReductionOperation-1(*(Type-1*)lhs[-1], // *(Type-1*)rhs[-1]); // } -// CHECK: define internal void [[REDUCTION_FUNC]](i8* %0, i8* %1) +// CHECK: define internal void [[REDUCTION_FUNC]](i8* frozen %0, i8* frozen %1) // t_var_lhs = (float*)lhs[0]; // CHECK: [[T_VAR_RHS_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST_RHS:%.+]], i64 0, i64 0 // CHECK: [[T_VAR_RHS_VOID:%.+]] = load i8*, i8** [[T_VAR_RHS_REF]], @@ -359,7 +359,7 @@ // CHECK: [[T_VAR1_LHS:%.+]] = bitcast i8* [[T_VAR1_LHS_VOID]] to float* // t_var_lhs += t_var_rhs; -// CHECK: call void [[RED_COMB1]](float* %{{.+}}, float* %{{.+}}) +// CHECK: call void [[RED_COMB1]](float* frozen %{{.+}}, float* frozen %{{.+}}) // var_lhs = var_lhs.operator &(var_rhs); // CHECK: call void [[RED_COMB2]]( @@ -374,7 +374,7 @@ // CHECK: define internal void [[RED_COMB4]]( // CHECK: fadd float 5.550000e+02, % -// CHECK: define internal void [[MAIN_MICROTASK1]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}, i64 %{{.+}}, i64 %{{.+}}, i32* {{.+}} %{{.+}}, [2 x i32]* nonnull align 4 dereferenceable(8) %{{.+}}, [10 x [4 x [[S_FLOAT_TY]]]]* nonnull align 4 dereferenceable(480) %{{.+}}) +// CHECK: define internal void [[MAIN_MICROTASK1]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}, i64 frozen %{{.+}}, i64 frozen %{{.+}}, i32* {{.+}} %{{.+}}, [2 x i32]* frozen nonnull align 4 dereferenceable(8) %{{.+}}, [10 x [4 x [[S_FLOAT_TY]]]]* frozen nonnull align 4 dereferenceable(480) %{{.+}}) // Reduction list for runtime. // CHECK: [[RED_LIST:%.+]] = alloca [4 x i8*], @@ -397,7 +397,7 @@ // CHECK: [[ISEMPTY:%.+]] = icmp eq i32* [[ARR_PRIV]], [[END]] // CHECK: br i1 [[ISEMPTY]], // CHECK: phi i32* -// CHECK: call void [[RED_INIT5:@.+]](i32* %{{.+}}, i32* %{{.+}}) +// CHECK: call void [[RED_INIT5:@.+]](i32* frozen %{{.+}}, i32* frozen %{{.+}}) // CHECK: [[DONE:%.+]] = icmp eq i32* %{{.+}}, [[END]] // CHECK: br i1 [[DONE]], @@ -454,7 +454,7 @@ // CHECK: [[ISEMPTY:%.+]] = icmp eq i32* [[LB1_0]], [[END]] // CHECK: br i1 [[ISEMPTY]], // CHECK: phi i32* -// CHECK: call void [[RED_COMB5:@.+]](i32* %{{.+}}, i32* %{{.+}}) +// CHECK: call void [[RED_COMB5:@.+]](i32* frozen %{{.+}}, i32* frozen %{{.+}}) // CHECK: [[DONE:%.+]] = icmp eq i32* %{{.+}}, [[END]] // CHECK: br i1 [[DONE]], @@ -507,17 +507,17 @@ // CHECK: [[ISEMPTY:%.+]] = icmp eq [[S_FLOAT_TY]]* [[ARRS_PRIV]], [[END]] // CHECK: br i1 [[ISEMPTY]], // CHECK: phi [[S_FLOAT_TY]]* -// CHECK: call void @_ZN1SIfED1Ev([[S_FLOAT_TY]]* % +// CHECK: call void @_ZN1SIfED1Ev([[S_FLOAT_TY]]* frozen % // CHECK: [[DONE:%.+]] = icmp eq [[S_FLOAT_TY]]* %{{.+}}, [[ARRS_PRIV]] // CHECK: br i1 [[DONE]], // CHECK: call void @llvm.stackrestore(i8* // CHECK: ret void -// CHECK: define internal void [[RED_COMB5]](i32* noalias %0, i32* noalias %1) +// CHECK: define internal void [[RED_COMB5]](i32* frozen noalias %0, i32* frozen noalias %1) // CHECK: mul nsw i32 555, % -// CHECK: define internal void [[RED_INIT5]](i32* noalias %0, i32* noalias %1) +// CHECK: define internal void [[RED_INIT5]](i32* frozen noalias %0, i32* frozen noalias %1) // CHECK: store i32 888, i32* % // void reduce_func(void *lhs[], void *rhs[]) { @@ -526,7 +526,7 @@ // *(Type-1*)lhs[-1] = ReductionOperation-1(*(Type-1*)lhs[-1], // *(Type-1*)rhs[-1]); // } -// CHECK: define internal void [[REDUCTION_FUNC]](i8* %0, i8* %1) +// CHECK: define internal void [[REDUCTION_FUNC]](i8* frozen %0, i8* frozen %1) // arr_rhs = (int*)rhs[0]; // CHECK: [[ARR_RHS_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST_RHS:%.+]], i64 0, i64 0 // CHECK: [[ARR_RHS_VOID:%.+]] = load i8*, i8** [[ARR_RHS_REF]], @@ -575,7 +575,7 @@ // CHECK: ret void -// CHECK: define internal void [[MAIN_MICROTASK2]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}, i64 %{{.+}}, i64 %{{.+}}, i32* {{.+}} %{{.+}}, [10 x [4 x [[S_FLOAT_TY]]]]* nonnull align 4 dereferenceable(480) %{{.+}}) +// CHECK: define internal void [[MAIN_MICROTASK2]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}, i64 frozen %{{.+}}, i64 frozen %{{.+}}, i32* {{.+}} %{{.+}}, [10 x [4 x [[S_FLOAT_TY]]]]* frozen nonnull align 4 dereferenceable(480) %{{.+}}) // CHECK: [[ARRS_PRIV:%.+]] = alloca [10 x [4 x [[S_FLOAT_TY]]]], @@ -702,7 +702,7 @@ // CHECK: [[END:%.+]] = getelementptr inbounds [[S_FLOAT_TY]], [[S_FLOAT_TY]]* [[BEGIN]], i64 40 // CHECK: br // CHECK: phi [[S_FLOAT_TY]]* -// CHECK: call void @_ZN1SIfED1Ev([[S_FLOAT_TY]]* % +// CHECK: call void @_ZN1SIfED1Ev([[S_FLOAT_TY]]* frozen % // CHECK: [[DONE:%.+]] = icmp eq [[S_FLOAT_TY]]* %{{.+}}, [[BEGIN]] // CHECK: br i1 [[DONE]], // CHECK: call void @llvm.stackrestore(i8* @@ -716,7 +716,7 @@ // *(Type-1*)lhs[-1] = ReductionOperation-1(*(Type-1*)lhs[-1], // *(Type-1*)rhs[-1]); // } -// CHECK: define internal void [[REDUCTION_FUNC]](i8* %0, i8* %1) +// CHECK: define internal void [[REDUCTION_FUNC]](i8* frozen %0, i8* frozen %1) // arr_rhs = (int*)rhs[0]; // CHECK: [[ARR_RHS_REF:%.+]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[RED_LIST_RHS:%.+]], i64 0, i64 0 // CHECK: [[ARR_RHS_VOID:%.+]] = load i8*, i8** [[ARR_RHS_REF]], @@ -760,7 +760,7 @@ // CHECK: ret void -// CHECK: define internal void [[MAIN_MICROTASK3]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}, [[S_FLOAT_TY]]*** nonnull align 8 dereferenceable(8) %{{.+}}) +// CHECK: define internal void [[MAIN_MICROTASK3]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}, [[S_FLOAT_TY]]*** frozen nonnull align 8 dereferenceable(8) %{{.+}}) // CHECK: [[VAR2_ORIG_ADDR:%.+]] = alloca [[S_FLOAT_TY]]***, @@ -788,7 +788,7 @@ // CHECK: store [[S_FLOAT_TY]]* [[PSEUDO_VAR2_PRIV]], [[S_FLOAT_TY]]** [[REF]] // CHECK: ret void -// CHECK: define internal void [[MAIN_MICROTASK4]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}, [5 x [[S_FLOAT_TY]]]* nonnull align 4 dereferenceable(60) %{{.+}}) +// CHECK: define internal void [[MAIN_MICROTASK4]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}, [5 x [[S_FLOAT_TY]]]* frozen nonnull align 4 dereferenceable(60) %{{.+}}) // CHECK: [[VVAR2_ORIG_ADDR:%.+]] = alloca [5 x [[S_FLOAT_TY]]]*, // CHECK: [[VVAR2_PRIV:%.+]] = alloca [5 x [[S_FLOAT_TY]]], @@ -809,7 +809,7 @@ // CHECK: [[VVAR2_PRIV:%.+]] = getelementptr [[S_FLOAT_TY]], [[S_FLOAT_TY]]* [[VVAR2_PRIV_PTR]], i64 [[OFFSET]] // CHECK: ret void -// CHECK: define internal void [[MAIN_MICROTASK5]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}, [4 x [[S_FLOAT_TY]]]* nonnull align 4 dereferenceable(48) %{{.+}}) +// CHECK: define internal void [[MAIN_MICROTASK5]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}, [4 x [[S_FLOAT_TY]]]* frozen nonnull align 4 dereferenceable(48) %{{.+}}) // CHECK: [[VAR3_ORIG_ADDR:%.+]] = alloca [4 x [[S_FLOAT_TY]]]*, // CHECK: [[VAR3_PRIV:%.+]] = alloca [2 x [[S_FLOAT_TY]]], @@ -842,7 +842,7 @@ // CHECK: ret void -// CHECK: define internal void [[MAIN_MICROTASK6]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}, [4 x [[S_FLOAT_TY]]]* nonnull align 4 dereferenceable(48) %{{.+}}) +// CHECK: define internal void [[MAIN_MICROTASK6]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}, [4 x [[S_FLOAT_TY]]]* frozen nonnull align 4 dereferenceable(48) %{{.+}}) // CHECK: [[VAR3_ORIG_ADDR:%.+]] = alloca [4 x [[S_FLOAT_TY]]]*, @@ -868,7 +868,7 @@ // CHECK: define {{.*}} i{{[0-9]+}} [[TMAIN_INT_42]]() // CHECK: [[TEST:%.+]] = alloca [[S_INT_TY]], -// CHECK: call {{.*}} [[S_INT_TY_CONSTR]]([[S_INT_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_INT_TY_CONSTR]]([[S_INT_TY]]* frozen [[TEST]]) // CHECK: call void (%{{.+}}*, i{{[0-9]+}}, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)*, ...) @__kmpc_fork_call(%{{.+}}* @{{.+}}, i{{[0-9]+}} 6, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)* bitcast (void (i{{[0-9]+}}*, i{{[0-9]+}}*, i32*, [[S_INT_TY]]*, [[S_INT_TY]]*, i32*, [2 x i32]*, [2 x [[S_INT_TY]]]*)* [[TMAIN_MICROTASK:@.+]] to void // Not interested in this one: // CHECK: call void (%{{.+}}*, i{{[0-9]+}}, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)*, ...) @__kmpc_fork_call(%{{.+}}* @{{.+}}, i{{[0-9]+}} 4, @@ -877,7 +877,7 @@ // CHECK: call {{.*}} [[S_INT_TY_DESTR]]([[S_INT_TY]]* // CHECK: ret // -// CHECK: define internal void [[TMAIN_MICROTASK]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}, i32* nonnull align 4 dereferenceable(4) %{{.+}}, [[S_INT_TY]]* nonnull align 4 dereferenceable(12) %{{.+}}, [[S_INT_TY]]* nonnull align 4 dereferenceable(12) %{{.+}}, i32* nonnull align 4 dereferenceable(4) %{{.+}}, [2 x i32]* nonnull align 4 dereferenceable(8) %{{.+}}, [2 x [[S_INT_TY]]]* nonnull align 4 dereferenceable(24) %{{.+}}) +// CHECK: define internal void [[TMAIN_MICROTASK]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}, i32* frozen nonnull align 4 dereferenceable(4) %{{.+}}, [[S_INT_TY]]* frozen nonnull align 4 dereferenceable(12) %{{.+}}, [[S_INT_TY]]* frozen nonnull align 4 dereferenceable(12) %{{.+}}, i32* frozen nonnull align 4 dereferenceable(4) %{{.+}}, [2 x i32]* frozen nonnull align 4 dereferenceable(8) %{{.+}}, [2 x [[S_INT_TY]]]* frozen nonnull align 4 dereferenceable(24) %{{.+}}) // CHECK: alloca i{{[0-9]+}}, // CHECK: alloca i{{[0-9]+}}, // CHECK: alloca i{{[0-9]+}}, @@ -985,14 +985,14 @@ // break; // CHECK: br label %[[RED_DONE]] // CHECK: [[RED_DONE]] -// CHECK-DAG: call {{.*}} [[S_INT_TY_DESTR]]([[S_INT_TY]]* [[VAR_PRIV]]) +// CHECK-DAG: call {{.*}} [[S_INT_TY_DESTR]]([[S_INT_TY]]* frozen [[VAR_PRIV]]) // CHECK-DAG: call {{.*}} [[S_INT_TY_DESTR]]([[S_INT_TY]]* // CHECK: ret void -// CHECK: define internal void [[RED_COMB6]](i32* noalias %0, i32* noalias %1) +// CHECK: define internal void [[RED_COMB6]](i32* frozen noalias %0, i32* frozen noalias %1) // CHECK: add nsw i32 1513, % -// CHECK: define internal void [[RED_INIT6]](i32* noalias %0, i32* noalias %1) +// CHECK: define internal void [[RED_INIT6]](i32* frozen noalias %0, i32* frozen noalias %1) // CHECK: store i32 321, i32* % // CHECK: define internal void [[RED_COMB7]]( @@ -1001,10 +1001,10 @@ // CHECK: define internal void [[RED_INIT7]]( // CHECK: call void @_Z5init2R6BaseS1RKS_( -// CHECK: define internal void [[RED_COMB8]](i32* noalias %0, i32* noalias %1) +// CHECK: define internal void [[RED_COMB8]](i32* frozen noalias %0, i32* frozen noalias %1) // CHECK: sub nsw i32 47, % -// CHECK: define internal void [[RED_INIT8]](i32* noalias %0, i32* noalias %1) +// CHECK: define internal void [[RED_INIT8]](i32* frozen noalias %0, i32* frozen noalias %1) // CHECK: sdiv i32 432, % // void reduce_func(void *lhs[], void *rhs[]) { @@ -1013,7 +1013,7 @@ // *(Type-1*)lhs[-1] = ReductionOperation-1(*(Type-1*)lhs[-1], // *(Type-1*)rhs[-1]); // } -// CHECK: define internal void [[REDUCTION_FUNC]](i8* %0, i8* %1) +// CHECK: define internal void [[REDUCTION_FUNC]](i8* frozen %0, i8* frozen %1) // t_var_lhs = (i{{[0-9]+}}*)lhs[0]; // CHECK: [[T_VAR_RHS_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST_RHS:%.+]], i64 0, i64 0 // CHECK: [[T_VAR_RHS_VOID:%.+]] = load i8*, i8** [[T_VAR_RHS_REF]], @@ -1063,7 +1063,7 @@ // CHECK: call void [[RED_COMB8]]( // CHECK: ret void -// CHECK: define internal void [[TMAIN_MICROTASK2]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}, [42 x [[S_INT_TY]]]* nonnull align 4 dereferenceable(504) %{{.*}}, [2 x i32]* nonnull align 4 dereferenceable(8) %{{.*}}, i32* nonnull align 4 dereferenceable(4) %{{.*}}, [2 x [[S_INT_TY]]]* nonnull align 4 dereferenceable(24) %{{.*}}, [[S_INT_TY]]* nonnull align 4 dereferenceable(12) %{{.*}}) +// CHECK: define internal void [[TMAIN_MICROTASK2]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}, [42 x [[S_INT_TY]]]* frozen nonnull align 4 dereferenceable(504) %{{.*}}, [2 x i32]* frozen nonnull align 4 dereferenceable(8) %{{.*}}, i32* frozen nonnull align 4 dereferenceable(4) %{{.*}}, [2 x [[S_INT_TY]]]* frozen nonnull align 4 dereferenceable(24) %{{.*}}, [[S_INT_TY]]* frozen nonnull align 4 dereferenceable(12) %{{.*}}) // CHECK: [[ARR_ORIG_ADDR:%.+]] = alloca [42 x [[S_INT_TY]]]*, // CHECK: [[ARR_PRIV:%.+]] = alloca [40 x [[S_INT_TY]]], diff --git a/clang/test/OpenMP/for_reduction_task_codegen.cpp b/clang/test/OpenMP/for_reduction_task_codegen.cpp --- a/clang/test/OpenMP/for_reduction_task_codegen.cpp +++ b/clang/test/OpenMP/for_reduction_task_codegen.cpp @@ -22,7 +22,7 @@ // CHECK: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @{{.+}}, i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i8***)* [[OUTLINED:@.+]] to void (i32*, i32*, ...)*), i32* %{{.+}}, i8*** %{{.+}}) -// CHECK: define internal void [[OUTLINED]](i32* noalias %{{.+}}, i32* noalias %{{.+}}, i32* {{.+}}, i8*** {{.+}}) +// CHECK: define internal void [[OUTLINED]](i32* frozen noalias %{{.+}}, i32* frozen noalias %{{.+}}, i32* {{.+}}, i8*** {{.+}}) // CHECK: alloca i32, // CHECK: [[ARGC_FP_ADDR:%.+]] = alloca i32, // CHECK: [[TR:%.+]] = alloca [2 x %struct.kmp_taskred_input_t], @@ -95,26 +95,26 @@ // CHECK: call void @__kmpc_task_reduction_modifier_fini(%struct.ident_t* @{{.+}}, i32 %{{.+}}, i32 1) // CHECK: call i32 @__kmpc_reduce( -// CHECK: define internal void [[ARGC_INIT]](i8* noalias %{{.+}}, i8* noalias %{{.+}}) +// CHECK: define internal void [[ARGC_INIT]](i8* frozen noalias %{{.+}}, i8* frozen noalias %{{.+}}) // CHECK: store i32 0, i32* %{{.+}}, -// CHECK: define internal void [[ARGC_COMB]](i8* %{{.+}}, i8* %{{.+}}) +// CHECK: define internal void [[ARGC_COMB]](i8* frozen %{{.+}}, i8* frozen %{{.+}}) // CHECK: [[ADD:%.+]] = add nsw i32 %{{.+}}, %{{.+}} // CHECK: store i32 [[ADD]], i32* %{{.+}}, -// CHECK: define internal void [[ARGV_INIT]](i8* noalias %{{.+}}, i8* noalias %{{.+}}) +// CHECK: define internal void [[ARGV_INIT]](i8* frozen noalias %{{.+}}, i8* frozen noalias %{{.+}}) // CHECK: phi i8* // CHECK: store i8 0, i8* [[EL:%.+]], // CHECK: getelementptr i8, i8* [[EL]], i32 1 -// CHECK: define internal void [[ARGV_COMB]](i8* %{{.+}}, i8* %{{.+}}) +// CHECK: define internal void [[ARGV_COMB]](i8* frozen %{{.+}}, i8* frozen %{{.+}}) // CHECK: phi i8* // CHECK: [[ADD:%.+]] = add nsw i32 %{{.+}}, %{{.+}} // CHECK: [[CONV:%.+]] = trunc i32 [[ADD]] to i8 // CHECK: store i8 [[CONV]], i8* [[EL:%.+]], // CHECK: getelementptr i8, i8* [[EL]], i32 1 -// CHECK: define internal {{.*}}i32 [[TASK]](i32 {{.+}}, [[TASK_TY]]* {{.+}}) +// CHECK: define internal {{.*}}frozen i32 [[TASK]](i32 {{.+}}, [[TASK_TY]]* {{.+}}) // CHECK-DAG: call i8* @__kmpc_task_reduction_get_th_data(i32 %{{.+}}, i8* [[TG:%.+]], i8* [[ARGC_REF:%.+]]) // CHECK_DAG: [[TG]] = load i8*, i8** [[TG_ADDR:%.+]], // CHECK-DAG: [[ARGC_REF]] = bitcast i32* [[ARGC_ADDR:%.+]] to i8* diff --git a/clang/test/OpenMP/for_scan_codegen.cpp b/clang/test/OpenMP/for_scan_codegen.cpp --- a/clang/test/OpenMP/for_scan_codegen.cpp +++ b/clang/test/OpenMP/for_scan_codegen.cpp @@ -13,7 +13,7 @@ void foo(); void bar(); -// CHECK: define void @{{.*}}baz{{.*}}(i32 %n) +// CHECK: define void @{{.*}}baz{{.*}}(i32 frozen %n) void baz(int n) { static float a[10]; static double b; diff --git a/clang/test/OpenMP/for_simd_codegen.cpp b/clang/test/OpenMP/for_simd_codegen.cpp --- a/clang/test/OpenMP/for_simd_codegen.cpp +++ b/clang/test/OpenMP/for_simd_codegen.cpp @@ -792,7 +792,7 @@ #pragma omp parallel #pragma omp for simd // TERM_DEBUG-NOT: __kmpc_global_thread_num - // TERM_DEBUG: invoke i32 {{.*}}bar{{.*}}() + // TERM_DEBUG: invoke frozen i32 {{.*}}bar{{.*}}() // TERM_DEBUG: unwind label %[[TERM_LPAD:.+]], // TERM_DEBUG-NOT: __kmpc_global_thread_num // TERM_DEBUG: [[TERM_LPAD]] diff --git a/clang/test/OpenMP/for_simd_loop_messages.cpp b/clang/test/OpenMP/for_simd_loop_messages.cpp --- a/clang/test/OpenMP/for_simd_loop_messages.cpp +++ b/clang/test/OpenMP/for_simd_loop_messages.cpp @@ -171,7 +171,7 @@ c[ii] = a[ii]; #pragma omp parallel -// Ok but undefined behavior (in general, cannot check that incr +// Ok but undefined behavior (in frozen general, cannot check incr that // is really loop-invariant). #pragma omp for simd for (ii = 0; ii < 10; ii = ii + ii) diff --git a/clang/test/OpenMP/function-attr.cpp b/clang/test/OpenMP/function-attr.cpp --- a/clang/test/OpenMP/function-attr.cpp +++ b/clang/test/OpenMP/function-attr.cpp @@ -14,7 +14,7 @@ ~S() {} }; -// CHECK: define internal void @.omp.copyprivate.copy_func(i8* %0, i8* %1) [[ATTR0:#[0-9]+]] { +// CHECK: define internal void @.omp.copyprivate.copy_func(i8* frozen %0, i8* frozen %1) [[ATTR0:#[0-9]+]] { void foo0(); @@ -30,8 +30,8 @@ } // CHECK: define internal void @.omp_task_privates_map.({{.*}}) [[ATTR3:#[0-9]+]] { -// CHECK: define internal i32 @.omp_task_entry.({{.*}}) [[ATTR0]] { -// CHECK: define internal i32 @.omp_task_destructor.({{.*}}) [[ATTR0]] { +// CHECK: define internal frozen i32 @.omp_task_entry.({{.*}}) [[ATTR0]] { +// CHECK: define internal frozen i32 @.omp_task_destructor.({{.*}}) [[ATTR0]] { int foo2() { S s_arr[] = {1, 2}; @@ -41,7 +41,7 @@ return 0; } -// CHECK: define internal void @.omp.reduction.reduction_func(i8* %0, i8* %1) [[ATTR0]] { +// CHECK: define internal void @.omp.reduction.reduction_func(i8* frozen %0, i8* frozen %1) [[ATTR0]] { float foo3(int n, float *a, float *b) { int i; diff --git a/clang/test/OpenMP/master_taskloop_codegen.cpp b/clang/test/OpenMP/master_taskloop_codegen.cpp --- a/clang/test/OpenMP/master_taskloop_codegen.cpp +++ b/clang/test/OpenMP/master_taskloop_codegen.cpp @@ -107,7 +107,7 @@ } } -// CHECK: define internal i32 [[TASK1]]( +// CHECK: define internal frozen i32 [[TASK1]]( // CHECK: [[DOWN:%.+]] = getelementptr inbounds [[TD_TY:%.+]], [[TD_TY]]* %{{.+}}, i32 0, i32 5 // CHECK: [[DOWN_VAL:%.+]] = load i64, i64* [[DOWN]], // CHECK: [[UP:%.+]] = getelementptr inbounds [[TD_TY]], [[TD_TY]]* %{{.+}}, i32 0, i32 6 @@ -137,7 +137,7 @@ // CHECK: br label % // CHECK: ret i32 0 -// CHECK: define internal i32 [[TASK2]]( +// CHECK: define internal frozen i32 [[TASK2]]( // CHECK: [[DOWN:%.+]] = getelementptr inbounds [[TD_TY:%.+]], [[TD_TY]]* %{{.+}}, i32 0, i32 5 // CHECK: [[DOWN_VAL:%.+]] = load i64, i64* [[DOWN]], // CHECK: [[UP:%.+]] = getelementptr inbounds [[TD_TY]], [[TD_TY]]* %{{.+}}, i32 0, i32 6 @@ -167,7 +167,7 @@ // CHECK: br label % // CHECK: ret i32 0 -// CHECK: define internal i32 [[TASK3]]( +// CHECK: define internal frozen i32 [[TASK3]]( // CHECK: [[DOWN:%.+]] = getelementptr inbounds [[TD_TY:%.+]], [[TD_TY]]* %{{.+}}, i32 0, i32 5 // CHECK: [[DOWN_VAL:%.+]] = load i64, i64* [[DOWN]], // CHECK: [[UP:%.+]] = getelementptr inbounds [[TD_TY]], [[TD_TY]]* %{{.+}}, i32 0, i32 6 @@ -185,7 +185,7 @@ // CHECK: br label // CHECK: ret i32 0 -// CHECK: define internal i32 [[TASK_CANCEL]]( +// CHECK: define internal frozen i32 [[TASK_CANCEL]]( // CHECK: [[RES:%.+]] = call i32 @__kmpc_cancel(%struct.ident_t* @{{.+}}, i32 %{{.+}}, i32 4) // CHECK: [[IS_CANCEL:%.+]] = icmp ne i32 [[RES]], 0 // CHECK: br i1 [[IS_CANCEL]], label %[[EXIT:.+]], label %[[CONTINUE:[^,]+]] @@ -227,7 +227,7 @@ } } s(1); -// CHECK: define internal i32 [[TASK4]]( +// CHECK: define internal frozen i32 [[TASK4]]( // CHECK: [[DOWN:%.+]] = getelementptr inbounds [[TD_TY:%.+]], [[TD_TY]]* %{{.+}}, i32 0, i32 5 // CHECK: [[DOWN_VAL:%.+]] = load i64, i64* [[DOWN]], // CHECK: [[UP:%.+]] = getelementptr inbounds [[TD_TY]], [[TD_TY]]* %{{.+}}, i32 0, i32 6 diff --git a/clang/test/OpenMP/master_taskloop_firstprivate_codegen.cpp b/clang/test/OpenMP/master_taskloop_firstprivate_codegen.cpp --- a/clang/test/OpenMP/master_taskloop_firstprivate_codegen.cpp +++ b/clang/test/OpenMP/master_taskloop_firstprivate_codegen.cpp @@ -85,7 +85,7 @@ // LAMBDA: ret #pragma omp master taskloop firstprivate(g, sivar) for (int i = 0; i < 10; ++i) { - // LAMBDA: define {{.+}} void [[INNER_LAMBDA:@.+]](%{{.+}}* [[ARG_PTR:%.+]]) + // LAMBDA: define {{.+}} void [[INNER_LAMBDA:@.+]](%{{.+}}* frozen [[ARG_PTR:%.+]]) // LAMBDA: store %{{.+}}* [[ARG_PTR]], %{{.+}}** [[ARG_PTR_REF:%.+]], // LAMBDA: [[ARG_PTR:%.+]] = load %{{.+}}*, %{{.+}}** [[ARG_PTR_REF]] // LAMBDA: [[G_PTR_REF:%.+]] = getelementptr inbounds %{{.+}}, %{{.+}}* [[ARG_PTR]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 @@ -93,7 +93,7 @@ // LAMBDA: store volatile double 2.0{{.+}}, double* [[G_REF]] // LAMBDA: store double* %{{.+}}, double** %{{.+}}, - // LAMBDA: define internal i32 [[TASK_ENTRY]](i32 %0, %{{.+}}* noalias %1) + // LAMBDA: define internal frozen i32 [[TASK_ENTRY]](i32 frozen %0, %{{.+}}* frozen noalias %1) g = 1; sivar = 11; // LAMBDA: store double 1.0{{.+}}, double* %{{.+}}, @@ -144,7 +144,7 @@ // BLOCKS: store double* %{{.+}}, double** %{{.+}}, // BLOCKS: store i{{[0-9]+}}* %{{.+}}, i{{[0-9]+}}** %{{.+}}, - // BLOCKS: define internal i32 [[TASK_ENTRY]](i32 %0, %{{.+}}* noalias %1) + // BLOCKS: define internal frozen i32 [[TASK_ENTRY]](i32 frozen %0, %{{.+}}* frozen noalias %1) g = 1; sivar = 11; // BLOCKS: store double 1.0{{.+}}, double* %{{.+}}, @@ -177,7 +177,7 @@ } // CHECK: [[SIVAR:.+]] = internal global i{{[0-9]+}} 0, -// CHECK: define i{{[0-9]+}} @main() +// CHECK: define frozen i{{[0-9]+}} @main() // CHECK: alloca [[S_DOUBLE_TY]], // CHECK: [[TEST:%.+]] = alloca [[S_DOUBLE_TY]], // CHECK: [[T_VAR_ADDR:%.+]] = alloca i32, @@ -186,7 +186,7 @@ // CHECK: [[VAR_ADDR:%.+]] = alloca [[S_DOUBLE_TY]], // CHECK: [[GTID:%.+]] = call i32 @__kmpc_global_thread_num([[LOC:%.+]]) -// CHECK: call {{.*}} [[S_DOUBLE_TY_COPY_CONSTR:@.+]]([[S_DOUBLE_TY]]* [[TEST]], +// CHECK: call {{.*}} [[S_DOUBLE_TY_COPY_CONSTR:@.+]]([[S_DOUBLE_TY]]* frozen [[TEST]] // CHECK: [[RES:%.+]] = call {{.*}}i32 @__kmpc_master( // CHECK-NEXT: [[IS_MASTER:%.+]] = icmp ne i32 [[RES]], 0 @@ -221,7 +221,7 @@ // s_arr; // CHECK: [[PRIVATE_S_ARR_REF:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 // CHECK: bitcast [2 x [[S_DOUBLE_TY]]]* %{{.+}} to [[S_DOUBLE_TY]]* -// CHECK: call void [[S_DOUBLE_TY_COPY_CONSTR]]([[S_DOUBLE_TY]]* [[S_ARR_CUR:%[^,]+]], +// CHECK: call void [[S_DOUBLE_TY_COPY_CONSTR]]([[S_DOUBLE_TY]]* frozen [[S_ARR_CUR:%[^,]+]] // CHECK: getelementptr [[S_DOUBLE_TY]], [[S_DOUBLE_TY]]* [[S_ARR_CUR]], i{{.+}} 1 // CHECK: getelementptr [[S_DOUBLE_TY]], [[S_DOUBLE_TY]]* %{{.+}}, i{{.+}} 1 // CHECK: icmp eq @@ -229,7 +229,7 @@ // var; // CHECK: [[PRIVATE_VAR_REF:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 1 -// CHECK-NEXT: call void [[S_DOUBLE_TY_COPY_CONSTR]]([[S_DOUBLE_TY]]* [[PRIVATE_VAR_REF]], [[S_DOUBLE_TY]]* {{.*}}, +// CHECK-NEXT: call void [[S_DOUBLE_TY_COPY_CONSTR]]([[S_DOUBLE_TY]]* frozen [[PRIVATE_VAR_REF]], [[S_DOUBLE_TY]]* {{.*}} // t_var; // CHECK: [[PRIVATE_T_VAR_REF:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 2 @@ -258,7 +258,7 @@ // CHECK-NEXT: br label {{%?}}[[EXIT]] // CHECK: [[EXIT]] -// CHECK: = call i{{.+}} [[TMAIN_INT:@.+]]() +// CHECK: = call frozen i{{.+}} [[TMAIN_INT:@.+]]() // No destructors must be called for private copies of s_arr and var. // CHECK-NOT: getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 2 @@ -269,7 +269,7 @@ // CHECK: ret // -// CHECK: define internal void [[PRIVATES_MAP_FN:@.+]]([[PRIVATES_MAIN_TY]]* noalias %0, [[S_DOUBLE_TY]]** noalias %1, i32** noalias %2, [2 x [[S_DOUBLE_TY]]]** noalias %3, [2 x i32]** noalias %4, i32** noalias %5) +// CHECK: define internal void [[PRIVATES_MAP_FN:@.+]]([[PRIVATES_MAIN_TY]]* frozen noalias %0, [[S_DOUBLE_TY]]** frozen noalias %1, i32** frozen noalias %2, [2 x [[S_DOUBLE_TY]]]** frozen noalias %3, [2 x i32]** frozen noalias %4, i32** frozen noalias %5) // CHECK: [[PRIVATES:%.+]] = load [[PRIVATES_MAIN_TY]]*, [[PRIVATES_MAIN_TY]]** // CHECK: [[PRIV_S_VAR:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i32 0, i32 0 // CHECK: [[ARG3:%.+]] = load [2 x [[S_DOUBLE_TY]]]**, [2 x [[S_DOUBLE_TY]]]*** %{{.+}}, @@ -288,7 +288,7 @@ // CHECK: store i{{[0-9]+}}* [[PRIV_SIVAR]], i{{[0-9]+}}** [[ARG5]], // CHECK: ret void -// CHECK: define internal i32 [[TASK_ENTRY]](i32 %0, [[KMP_TASK_MAIN_TY]]* noalias %1) +// CHECK: define internal frozen i32 [[TASK_ENTRY]](i32 frozen %0, [[KMP_TASK_MAIN_TY]]* frozen noalias %1) // CHECK: [[PRIV_VAR_ADDR:%.+]] = alloca [[S_DOUBLE_TY]]*, // CHECK: [[PRIV_T_VAR_ADDR:%.+]] = alloca i32*, @@ -315,7 +315,7 @@ // CHECK: ret -// CHECK: define internal void [[MAIN_DUP]]([[KMP_TASK_MAIN_TY]]* %0, [[KMP_TASK_MAIN_TY]]* %1, i32 %2) +// CHECK: define internal void [[MAIN_DUP]]([[KMP_TASK_MAIN_TY]]* frozen %0, [[KMP_TASK_MAIN_TY]]* frozen %1, i32 frozen %2) // CHECK: getelementptr inbounds [[KMP_TASK_MAIN_TY]], [[KMP_TASK_MAIN_TY]]* %{{.+}}, i32 0, i32 1 // CHECK: getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* %{{.+}}, i32 0, i32 0 // CHECK: getelementptr inbounds [2 x [[S_DOUBLE_TY]]], [2 x [[S_DOUBLE_TY]]]* %{{.+}}, i32 0, i32 0 @@ -332,15 +332,15 @@ // CHECK: call {{.*}} [[S_DOUBLE_TY_COPY_CONSTR]]([[S_DOUBLE_TY]]* // CHECK: ret void -// CHECK: define internal i32 [[DESTRUCTORS]](i32 %0, [[KMP_TASK_MAIN_TY]]* noalias %1) +// CHECK: define internal frozen i32 [[DESTRUCTORS]](i32 frozen %0, [[KMP_TASK_MAIN_TY]]* frozen noalias %1) // CHECK: [[PRIVATES:%.+]] = getelementptr inbounds [[KMP_TASK_MAIN_TY]], [[KMP_TASK_MAIN_TY]]* [[RES_KMP_TASK:%.+]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 // CHECK: [[PRIVATE_S_ARR_REF:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 0 // CHECK: [[PRIVATE_VAR_REF:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 1 -// CHECK: call void [[S_DOUBLE_TY_DESTR]]([[S_DOUBLE_TY]]* [[PRIVATE_VAR_REF]]) +// CHECK: call void [[S_DOUBLE_TY_DESTR]]([[S_DOUBLE_TY]]* frozen [[PRIVATE_VAR_REF]]) // CHECK: getelementptr inbounds [2 x [[S_DOUBLE_TY]]], [2 x [[S_DOUBLE_TY]]]* [[PRIVATE_S_ARR_REF]], i{{.+}} 0, i{{.+}} 0 // CHECK: getelementptr inbounds [[S_DOUBLE_TY]], [[S_DOUBLE_TY]]* %{{.+}}, i{{.+}} 2 // CHECK: [[PRIVATE_S_ARR_ELEM_REF:%.+]] = getelementptr inbounds [[S_DOUBLE_TY]], [[S_DOUBLE_TY]]* %{{.+}}, i{{.+}} -1 -// CHECK: call void [[S_DOUBLE_TY_DESTR]]([[S_DOUBLE_TY]]* [[PRIVATE_S_ARR_ELEM_REF]]) +// CHECK: call void [[S_DOUBLE_TY_DESTR]]([[S_DOUBLE_TY]]* frozen [[PRIVATE_S_ARR_ELEM_REF]]) // CHECK: icmp eq // CHECK: br i1 // CHECK: ret i32 @@ -354,7 +354,7 @@ // CHECK: [[VAR_ADDR:%.+]] = alloca [[S_INT_TY]], // CHECK: [[GTID:%.+]] = call i32 @__kmpc_global_thread_num([[LOC:%.+]]) -// CHECK: call {{.*}} [[S_INT_TY_COPY_CONSTR:@.+]]([[S_INT_TY]]* [[TEST]], +// CHECK: call {{.*}} [[S_INT_TY_COPY_CONSTR:@.+]]([[S_INT_TY]]* frozen [[TEST]] // Store original variables in capture struct. // CHECK: [[S_ARR_REF:%.+]] = getelementptr inbounds [[CAP_TMAIN_TY]], [[CAP_TMAIN_TY]]* %{{.+}}, i{{[0-9]+}} 0, i{{[0-9]+}} 0 @@ -397,14 +397,14 @@ // CHECK: getelementptr inbounds [2 x [[S_INT_TY]]], [2 x [[S_INT_TY]]]* [[PRIVATE_S_ARR_REF]], i{{.+}} 0, i{{.+}} 0 // CHECK: bitcast [2 x [[S_INT_TY]]]* %{{.+}} to [[S_INT_TY]]* // CHECK: getelementptr [[S_INT_TY]], [[S_INT_TY]]* %{{.+}}, i{{.+}} 2 -// CHECK: call void [[S_INT_TY_COPY_CONSTR]]([[S_INT_TY]]* [[S_ARR_CUR:%[^,]+]], +// CHECK: call void [[S_INT_TY_COPY_CONSTR]]([[S_INT_TY]]* frozen [[S_ARR_CUR:%[^,]+]] // CHECK: getelementptr [[S_INT_TY]], [[S_INT_TY]]* [[S_ARR_CUR]], i{{.+}} 1 // CHECK: icmp eq // CHECK: br i1 // var; // CHECK: [[PRIVATE_VAR_REF:%.+]] = getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 3 -// CHECK-NEXT: call void [[S_INT_TY_COPY_CONSTR]]([[S_INT_TY]]* [[PRIVATE_VAR_REF]], +// CHECK-NEXT: call void [[S_INT_TY_COPY_CONSTR]]([[S_INT_TY]]* frozen [[PRIVATE_VAR_REF]] // Provide pointer to destructor function, which will destroy private variables at the end of the task. // CHECK: [[DESTRUCTORS_REF:%.+]] = getelementptr inbounds [[KMP_TASK_T_TY]], [[KMP_TASK_T_TY]]* [[TASK]], i{{.+}} 0, i{{.+}} 3 @@ -423,7 +423,7 @@ // CHECK: ret // -// CHECK: define internal void [[PRIVATES_MAP_FN:@.+]]([[PRIVATES_TMAIN_TY]]* noalias %0, i32** noalias %1, [2 x i32]** noalias %2, [2 x [[S_INT_TY]]]** noalias %3, [[S_INT_TY]]** noalias %4) +// CHECK: define internal void [[PRIVATES_MAP_FN:@.+]]([[PRIVATES_TMAIN_TY]]* frozen noalias %0, i32** frozen noalias %1, [2 x i32]** frozen noalias %2, [2 x [[S_INT_TY]]]** frozen noalias %3, [[S_INT_TY]]** frozen noalias %4) // CHECK: [[PRIVATES:%.+]] = load [[PRIVATES_TMAIN_TY]]*, [[PRIVATES_TMAIN_TY]]** // CHECK: [[PRIV_T_VAR:%.+]] = getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i32 0, i32 0 // CHECK: [[ARG1:%.+]] = load i32**, i32*** %{{.+}}, @@ -439,7 +439,7 @@ // CHECK: store [[S_INT_TY]]* [[PRIV_VAR]], [[S_INT_TY]]** [[ARG4]], // CHECK: ret void -// CHECK: define internal i32 [[TASK_ENTRY]](i32 %0, [[KMP_TASK_TMAIN_TY]]* noalias %1) +// CHECK: define internal frozen i32 [[TASK_ENTRY]](i32 frozen %0, [[KMP_TASK_TMAIN_TY]]* frozen noalias %1) // CHECK: alloca i32*, // CHECK-DAG: [[PRIV_T_VAR_ADDR:%.+]] = alloca i32*, // CHECK-DAG: [[PRIV_VEC_ADDR:%.+]] = alloca [2 x i32]*, @@ -461,7 +461,7 @@ // CHECK: ret -// CHECK: define internal void [[TMAIN_DUP]]([[KMP_TASK_TMAIN_TY]]* %0, [[KMP_TASK_TMAIN_TY]]* %1, i32 %2) +// CHECK: define internal void [[TMAIN_DUP]]([[KMP_TASK_TMAIN_TY]]* frozen %0, [[KMP_TASK_TMAIN_TY]]* frozen %1, i32 frozen %2) // CHECK: getelementptr inbounds [[KMP_TASK_TMAIN_TY]], [[KMP_TASK_TMAIN_TY]]* %{{.+}}, i32 0, i32 2 // CHECK: getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* %{{.+}}, i32 0, i32 2 // CHECK: getelementptr inbounds [2 x [[S_INT_TY]]], [2 x [[S_INT_TY]]]* %{{.+}}, i32 0, i32 0 @@ -478,15 +478,15 @@ // CHECK: call {{.*}} [[S_INT_TY_COPY_CONSTR]]([[S_INT_TY]]* // CHECK: ret void -// CHECK: define internal i32 [[DESTRUCTORS]](i32 %0, [[KMP_TASK_TMAIN_TY]]* noalias %1) +// CHECK: define internal frozen i32 [[DESTRUCTORS]](i32 frozen %0, [[KMP_TASK_TMAIN_TY]]* frozen noalias %1) // CHECK: [[PRIVATES:%.+]] = getelementptr inbounds [[KMP_TASK_TMAIN_TY]], [[KMP_TASK_TMAIN_TY]]* [[RES_KMP_TASK:%.+]], i{{[0-9]+}} 0, i{{[0-9]+}} 2 // CHECK: [[PRIVATE_S_ARR_REF:%.+]] = getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 2 // CHECK: [[PRIVATE_VAR_REF:%.+]] = getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 3 -// CHECK: call void [[S_INT_TY_DESTR]]([[S_INT_TY]]* [[PRIVATE_VAR_REF]]) +// CHECK: call void [[S_INT_TY_DESTR]]([[S_INT_TY]]* frozen [[PRIVATE_VAR_REF]]) // CHECK: getelementptr inbounds [2 x [[S_INT_TY]]], [2 x [[S_INT_TY]]]* [[PRIVATE_S_ARR_REF]], i{{.+}} 0, i{{.+}} 0 // CHECK: getelementptr inbounds [[S_INT_TY]], [[S_INT_TY]]* %{{.+}}, i{{.+}} 2 // CHECK: [[PRIVATE_S_ARR_ELEM_REF:%.+]] = getelementptr inbounds [[S_INT_TY]], [[S_INT_TY]]* %{{.+}}, i{{.+}} -1 -// CHECK: call void [[S_INT_TY_DESTR]]([[S_INT_TY]]* [[PRIVATE_S_ARR_ELEM_REF]]) +// CHECK: call void [[S_INT_TY_DESTR]]([[S_INT_TY]]* frozen [[PRIVATE_S_ARR_ELEM_REF]]) // CHECK: icmp eq // CHECK: br i1 // CHECK: ret i32 diff --git a/clang/test/OpenMP/master_taskloop_lastprivate_codegen.cpp b/clang/test/OpenMP/master_taskloop_lastprivate_codegen.cpp --- a/clang/test/OpenMP/master_taskloop_lastprivate_codegen.cpp +++ b/clang/test/OpenMP/master_taskloop_lastprivate_codegen.cpp @@ -73,7 +73,7 @@ // LAMBDA: ret #pragma omp master taskloop lastprivate(g, sivar) for (int i = 0; i < 10; ++i) { - // LAMBDA: define {{.+}} void [[INNER_LAMBDA:@.+]](%{{.+}}* [[ARG_PTR:%.+]]) + // LAMBDA: define {{.+}} void [[INNER_LAMBDA:@.+]](%{{.+}}* frozen [[ARG_PTR:%.+]]) // LAMBDA: store %{{.+}}* [[ARG_PTR]], %{{.+}}** [[ARG_PTR_REF:%.+]], // LAMBDA: [[ARG_PTR:%.+]] = load %{{.+}}*, %{{.+}}** [[ARG_PTR_REF]] // LAMBDA: [[G_PTR_REF:%.+]] = getelementptr inbounds %{{.+}}, %{{.+}}* [[ARG_PTR]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 @@ -81,7 +81,7 @@ // LAMBDA: store double 2.0{{.+}}, double* [[G_REF]] // LAMBDA: store double* %{{.+}}, double** %{{.+}}, - // LAMBDA: define internal i32 [[TASK_ENTRY]](i32 %0, %{{.+}}* noalias %1) + // LAMBDA: define internal frozen i32 [[TASK_ENTRY]](i32 frozen %0, %{{.+}}* frozen noalias %1) g = 1; sivar = 11; // LAMBDA: store double 1.0{{.+}}, double* %{{.+}}, @@ -124,7 +124,7 @@ // BLOCKS: store double* %{{.+}}, double** %{{.+}}, // BLOCKS: store i{{[0-9]+}}* %{{.+}}, i{{[0-9]+}}** %{{.+}}, - // BLOCKS: define internal i32 [[TASK_ENTRY]](i32 %0, %{{.+}}* noalias %1) + // BLOCKS: define internal frozen i32 [[TASK_ENTRY]](i32 frozen %0, %{{.+}}* frozen noalias %1) g = 1; sivar = 11; // BLOCKS: store double 1.0{{.+}}, double* %{{.+}}, @@ -163,7 +163,7 @@ } // CHECK: [[SIVAR:.+]] = internal global i{{[0-9]+}} 0, -// CHECK: define i{{[0-9]+}} @main() +// CHECK: define frozen i{{[0-9]+}} @main() // CHECK: alloca [[S_DOUBLE_TY]], // CHECK: [[TEST:%.+]] = alloca [[S_DOUBLE_TY]], // CHECK: [[T_VAR_ADDR:%.+]] = alloca i32, @@ -172,7 +172,7 @@ // CHECK: [[VAR_ADDR:%.+]] = alloca [[S_DOUBLE_TY]], // CHECK: [[GTID:%.+]] = call i32 @__kmpc_global_thread_num([[LOC:%.+]]) -// CHECK: call {{.*}} [[S_DOUBLE_TY_CONSTR:@.+]]([[S_DOUBLE_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_DOUBLE_TY_CONSTR:@.+]]([[S_DOUBLE_TY]]* frozen [[TEST]]) // CHECK: [[RES:%.+]] = call {{.*}}i32 @__kmpc_master( // CHECK-NEXT: [[IS_MASTER:%.+]] = icmp ne i32 [[RES]], 0 @@ -212,14 +212,14 @@ // Constructors for s_arr and var. // s_arr; // CHECK: [[PRIVATE_S_ARR_REF:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 -// CHECK: call {{.*}} [[S_DOUBLE_TY_CONSTR]]([[S_DOUBLE_TY]]* [[S_ARR_CUR:%[^,]+]]) +// CHECK: call {{.*}} [[S_DOUBLE_TY_CONSTR]]([[S_DOUBLE_TY]]* frozen [[S_ARR_CUR:%[^,]+]]) // CHECK: getelementptr inbounds [[S_DOUBLE_TY]], [[S_DOUBLE_TY]]* [[S_ARR_CUR]], i{{.+}} 1 // CHECK: icmp eq // CHECK: br i1 // var; // CHECK: [[PRIVATE_VAR_REF:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 1 -// CHECK: call {{.*}} [[S_DOUBLE_TY_CONSTR]]([[S_DOUBLE_TY]]* [[PRIVATE_VAR_REF]]) +// CHECK: call {{.*}} [[S_DOUBLE_TY_CONSTR]]([[S_DOUBLE_TY]]* frozen [[PRIVATE_VAR_REF]]) // t_var; // vec; @@ -236,7 +236,7 @@ // CHECK-NEXT: br label {{%?}}[[EXIT]] // CHECK: [[EXIT]] -// CHECK: = call i{{.+}} [[TMAIN_INT:@.+]]() +// CHECK: = call frozen i{{.+}} [[TMAIN_INT:@.+]]() // No destructors must be called for private copies of s_arr and var. // CHECK-NOT: getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 2 @@ -247,7 +247,7 @@ // CHECK: ret // -// CHECK: define internal void [[PRIVATES_MAP_FN:@.+]]([[PRIVATES_MAIN_TY]]* noalias %0, [[S_DOUBLE_TY]]** noalias %1, i32** noalias %2, [2 x [[S_DOUBLE_TY]]]** noalias %3, [2 x i32]** noalias %4, i32** noalias %5) +// CHECK: define internal void [[PRIVATES_MAP_FN:@.+]]([[PRIVATES_MAIN_TY]]* frozen noalias %0, [[S_DOUBLE_TY]]** frozen noalias %1, i32** frozen noalias %2, [2 x [[S_DOUBLE_TY]]]** frozen noalias %3, [2 x i32]** frozen noalias %4, i32** frozen noalias %5) // CHECK: [[PRIVATES:%.+]] = load [[PRIVATES_MAIN_TY]]*, [[PRIVATES_MAIN_TY]]** // CHECK: [[PRIV_S_VAR:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i32 0, i32 0 // CHECK: [[ARG3:%.+]] = load [2 x [[S_DOUBLE_TY]]]**, [2 x [[S_DOUBLE_TY]]]*** %{{.+}}, @@ -266,7 +266,7 @@ // CHECK: store i{{[0-9]+}}* [[PRIV_SIVAR]], i{{[0-9]+}}** [[ARG5]], // CHECK: ret void -// CHECK: define internal i32 [[TASK_ENTRY]](i32 %0, [[KMP_TASK_MAIN_TY]]* noalias %1) +// CHECK: define internal frozen i32 [[TASK_ENTRY]](i32 frozen %0, [[KMP_TASK_MAIN_TY]]* frozen noalias %1) // CHECK: [[PRIV_VAR_ADDR:%.+]] = alloca [[S_DOUBLE_TY]]*, // CHECK: [[PRIV_T_VAR_ADDR:%.+]] = alloca i32*, @@ -312,7 +312,7 @@ // CHECK: br label // CHECK: ret -// CHECK: define internal void [[MAIN_DUP]]([[KMP_TASK_MAIN_TY]]* %0, [[KMP_TASK_MAIN_TY]]* %1, i32 %2) +// CHECK: define internal void [[MAIN_DUP]]([[KMP_TASK_MAIN_TY]]* frozen %0, [[KMP_TASK_MAIN_TY]]* frozen %1, i32 frozen %2) // CHECK: getelementptr inbounds [[KMP_TASK_MAIN_TY]], [[KMP_TASK_MAIN_TY]]* %{{.+}}, i32 0, i32 0 // CHECK: getelementptr inbounds [[KMP_TASK_T_TY]], [[KMP_TASK_T_TY]]* %{{.+}}, i32 0, i32 8 // CHECK: load i32, i32* % @@ -333,15 +333,15 @@ // CHECK: call {{.*}} [[S_DOUBLE_TY_CONSTR]]([[S_DOUBLE_TY]]* // CHECK: ret void -// CHECK: define internal i32 [[DESTRUCTORS]](i32 %0, [[KMP_TASK_MAIN_TY]]* noalias %1) +// CHECK: define internal frozen i32 [[DESTRUCTORS]](i32 frozen %0, [[KMP_TASK_MAIN_TY]]* frozen noalias %1) // CHECK: [[PRIVATES:%.+]] = getelementptr inbounds [[KMP_TASK_MAIN_TY]], [[KMP_TASK_MAIN_TY]]* [[RES_KMP_TASK:%.+]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 // CHECK: [[PRIVATE_S_ARR_REF:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 0 // CHECK: [[PRIVATE_VAR_REF:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 1 -// CHECK: call {{.*}} [[S_DOUBLE_TY_DESTR]]([[S_DOUBLE_TY]]* [[PRIVATE_VAR_REF]]) +// CHECK: call {{.*}} [[S_DOUBLE_TY_DESTR]]([[S_DOUBLE_TY]]* frozen [[PRIVATE_VAR_REF]]) // CHECK: getelementptr inbounds [2 x [[S_DOUBLE_TY]]], [2 x [[S_DOUBLE_TY]]]* [[PRIVATE_S_ARR_REF]], i{{.+}} 0, i{{.+}} 0 // CHECK: getelementptr inbounds [[S_DOUBLE_TY]], [[S_DOUBLE_TY]]* %{{.+}}, i{{.+}} 2 // CHECK: [[PRIVATE_S_ARR_ELEM_REF:%.+]] = getelementptr inbounds [[S_DOUBLE_TY]], [[S_DOUBLE_TY]]* %{{.+}}, i{{.+}} -1 -// CHECK: call {{.*}} [[S_DOUBLE_TY_DESTR]]([[S_DOUBLE_TY]]* [[PRIVATE_S_ARR_ELEM_REF]]) +// CHECK: call {{.*}} [[S_DOUBLE_TY_DESTR]]([[S_DOUBLE_TY]]* frozen [[PRIVATE_S_ARR_ELEM_REF]]) // CHECK: icmp eq // CHECK: br i1 // CHECK: ret i32 @@ -355,7 +355,7 @@ // CHECK: [[VAR_ADDR:%.+]] = alloca [[S_INT_TY]], // CHECK: [[GTID:%.+]] = call i32 @__kmpc_global_thread_num([[LOC:%.+]]) -// CHECK: call {{.*}} [[S_INT_TY_CONSTR:@.+]]([[S_INT_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_INT_TY_CONSTR:@.+]]([[S_INT_TY]]* frozen [[TEST]]) // Store original variables in capture struct. // CHECK: [[VEC_REF:%.+]] = getelementptr inbounds [[CAP_TMAIN_TY]], [[CAP_TMAIN_TY]]* %{{.+}}, i{{[0-9]+}} 0, i{{[0-9]+}} 0 @@ -393,14 +393,14 @@ // CHECK: [[PRIVATE_S_ARR_REF:%.+]] = getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i{{[0-9]+}} 0, i{{[0-9]+}} 2 // CHECK: getelementptr inbounds [2 x [[S_INT_TY]]], [2 x [[S_INT_TY]]]* [[PRIVATE_S_ARR_REF]], i{{.+}} 0, i{{.+}} 0 // CHECK: getelementptr inbounds [[S_INT_TY]], [[S_INT_TY]]* %{{.+}}, i{{.+}} 2 -// CHECK: call {{.*}} [[S_INT_TY_CONSTR]]([[S_INT_TY]]* [[S_ARR_CUR:%[^,]+]]) +// CHECK: call {{.*}} [[S_INT_TY_CONSTR]]([[S_INT_TY]]* frozen [[S_ARR_CUR:%[^,]+]]) // CHECK: getelementptr inbounds [[S_INT_TY]], [[S_INT_TY]]* [[S_ARR_CUR]], i{{.+}} 1 // CHECK: icmp eq // CHECK: br i1 // var; // CHECK: [[PRIVATE_VAR_REF:%.+]] = getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 3 -// CHECK: call {{.*}} [[S_INT_TY_CONSTR]]([[S_INT_TY]]* [[PRIVATE_VAR_REF]]) +// CHECK: call {{.*}} [[S_INT_TY_CONSTR]]([[S_INT_TY]]* frozen [[PRIVATE_VAR_REF]]) // Provide pointer to destructor function, which will destroy private variables at the end of the task. // CHECK: [[DESTRUCTORS_REF:%.+]] = getelementptr inbounds [[KMP_TASK_T_TY]], [[KMP_TASK_T_TY]]* [[TASK]], i{{.+}} 0, i{{.+}} 3 @@ -419,7 +419,7 @@ // CHECK: ret // -// CHECK: define internal void [[PRIVATES_MAP_FN:@.+]]([[PRIVATES_TMAIN_TY]]* noalias %0, i32** noalias %1, [2 x i32]** noalias %2, [2 x [[S_INT_TY]]]** noalias %3, [[S_INT_TY]]** noalias %4) +// CHECK: define internal void [[PRIVATES_MAP_FN:@.+]]([[PRIVATES_TMAIN_TY]]* frozen noalias %0, i32** frozen noalias %1, [2 x i32]** frozen noalias %2, [2 x [[S_INT_TY]]]** frozen noalias %3, [[S_INT_TY]]** frozen noalias %4) // CHECK: [[PRIVATES:%.+]] = load [[PRIVATES_TMAIN_TY]]*, [[PRIVATES_TMAIN_TY]]** // CHECK: [[PRIV_T_VAR:%.+]] = getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i32 0, i32 0 // CHECK: [[ARG1:%.+]] = load i32**, i32*** %{{.+}}, @@ -435,7 +435,7 @@ // CHECK: store [[S_INT_TY]]* [[PRIV_VAR]], [[S_INT_TY]]** [[ARG4]], // CHECK: ret void -// CHECK: define internal i32 [[TASK_ENTRY]](i32 %0, [[KMP_TASK_TMAIN_TY]]* noalias %1) +// CHECK: define internal frozen i32 [[TASK_ENTRY]](i32 frozen %0, [[KMP_TASK_TMAIN_TY]]* frozen noalias %1) // CHECK: alloca i32*, // CHECK-DAG: [[PRIV_T_VAR_ADDR:%.+]] = alloca i32*, // CHECK-DAG: [[PRIV_VEC_ADDR:%.+]] = alloca [2 x i32]*, @@ -474,7 +474,7 @@ // CHECK: br label // CHECK: ret -// CHECK: define internal void [[TMAIN_DUP]]([[KMP_TASK_TMAIN_TY]]* %0, [[KMP_TASK_TMAIN_TY]]* %1, i32 %2) +// CHECK: define internal void [[TMAIN_DUP]]([[KMP_TASK_TMAIN_TY]]* frozen %0, [[KMP_TASK_TMAIN_TY]]* frozen %1, i32 frozen %2) // CHECK: getelementptr inbounds [[KMP_TASK_TMAIN_TY]], [[KMP_TASK_TMAIN_TY]]* %{{.+}}, i32 0, i32 0 // CHECK: getelementptr inbounds [[KMP_TASK_T_TY]], [[KMP_TASK_T_TY]]* %{{.+}}, i32 0, i32 8 // CHECK: load i32, i32* % @@ -495,15 +495,15 @@ // CHECK: call {{.*}} [[S_INT_TY_CONSTR]]([[S_INT_TY]]* // CHECK: ret void -// CHECK: define internal i32 [[DESTRUCTORS]](i32 %0, [[KMP_TASK_TMAIN_TY]]* noalias %1) +// CHECK: define internal frozen i32 [[DESTRUCTORS]](i32 frozen %0, [[KMP_TASK_TMAIN_TY]]* frozen noalias %1) // CHECK: [[PRIVATES:%.+]] = getelementptr inbounds [[KMP_TASK_TMAIN_TY]], [[KMP_TASK_TMAIN_TY]]* [[RES_KMP_TASK:%.+]], i{{[0-9]+}} 0, i{{[0-9]+}} 2 // CHECK: [[PRIVATE_S_ARR_REF:%.+]] = getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 2 // CHECK: [[PRIVATE_VAR_REF:%.+]] = getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 3 -// CHECK: call void [[S_INT_TY_DESTR]]([[S_INT_TY]]* [[PRIVATE_VAR_REF]]) +// CHECK: call void [[S_INT_TY_DESTR]]([[S_INT_TY]]* frozen [[PRIVATE_VAR_REF]]) // CHECK: getelementptr inbounds [2 x [[S_INT_TY]]], [2 x [[S_INT_TY]]]* [[PRIVATE_S_ARR_REF]], i{{.+}} 0, i{{.+}} 0 // CHECK: getelementptr inbounds [[S_INT_TY]], [[S_INT_TY]]* %{{.+}}, i{{.+}} 2 // CHECK: [[PRIVATE_S_ARR_ELEM_REF:%.+]] = getelementptr inbounds [[S_INT_TY]], [[S_INT_TY]]* %{{.+}}, i{{.+}} -1 -// CHECK: call void [[S_INT_TY_DESTR]]([[S_INT_TY]]* [[PRIVATE_S_ARR_ELEM_REF]]) +// CHECK: call void [[S_INT_TY_DESTR]]([[S_INT_TY]]* frozen [[PRIVATE_S_ARR_ELEM_REF]]) // CHECK: icmp eq // CHECK: br i1 // CHECK: ret i32 diff --git a/clang/test/OpenMP/master_taskloop_loop_messages.cpp b/clang/test/OpenMP/master_taskloop_loop_messages.cpp --- a/clang/test/OpenMP/master_taskloop_loop_messages.cpp +++ b/clang/test/OpenMP/master_taskloop_loop_messages.cpp @@ -177,7 +177,7 @@ c[ii] = a[ii]; #pragma omp parallel -// Ok but undefined behavior (in general, cannot check that incr +// Ok but undefined behavior (in frozen general, cannot check incr that // is really loop-invariant). #pragma omp master taskloop for (ii = 0; ii < 10; ii = ii + ii) diff --git a/clang/test/OpenMP/master_taskloop_private_codegen.cpp b/clang/test/OpenMP/master_taskloop_private_codegen.cpp --- a/clang/test/OpenMP/master_taskloop_private_codegen.cpp +++ b/clang/test/OpenMP/master_taskloop_private_codegen.cpp @@ -67,7 +67,7 @@ // LAMBDA: ret #pragma omp master taskloop private(g, sivar) for (int i = 0; i < 10; ++i) { - // LAMBDA: define {{.+}} void [[INNER_LAMBDA:@.+]](%{{.+}}* [[ARG_PTR:%.+]]) + // LAMBDA: define {{.+}} void [[INNER_LAMBDA:@.+]](%{{.+}}* frozen [[ARG_PTR:%.+]]) // LAMBDA: store %{{.+}}* [[ARG_PTR]], %{{.+}}** [[ARG_PTR_REF:%.+]], // LAMBDA: [[ARG_PTR:%.+]] = load %{{.+}}*, %{{.+}}** [[ARG_PTR_REF]] // LAMBDA: [[G_PTR_REF:%.+]] = getelementptr inbounds %{{.+}}, %{{.+}}* [[ARG_PTR]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 @@ -77,7 +77,7 @@ // LAMBDA: [[SIVAR_REF:%.+]] = load i{{[0-9]+}}*, i{{[0-9]+}}** [[SIVAR_PTR_REF]] // LAMBDA: store i{{[0-9]+}} 3, i{{[0-9]+}}* [[SIVAR_REF]] - // LAMBDA: define internal i32 [[TASK_ENTRY]](i32 %0, %{{.+}}* noalias %1) + // LAMBDA: define internal frozen i32 [[TASK_ENTRY]](i32 frozen %0, %{{.+}}* frozen noalias %1) g = 1; sivar = 2; // LAMBDA: store double 1.0{{.+}}, double* %{{.+}}, @@ -112,7 +112,7 @@ // BLOCKS-NOT: [[SIVAR]]{{[[^:word:]]}} // BLOCKS: ret - // BLOCKS: define internal i32 [[TASK_ENTRY]](i32 %0, %{{.+}}* noalias %1) + // BLOCKS: define internal frozen i32 [[TASK_ENTRY]](i32 frozen %0, %{{.+}}* frozen noalias %1) g = 1; sivar = 3; // BLOCKS: store double 1.0{{.+}}, double* %{{.+}}, @@ -145,7 +145,7 @@ #endif } -// CHECK: define i{{[0-9]+}} @main() +// CHECK: define frozen i{{[0-9]+}} @main() // CHECK: [[TEST:%.+]] = alloca [[S_DOUBLE_TY]], // CHECK: [[T_VAR_ADDR:%.+]] = alloca i32, // CHECK: [[VEC_ADDR:%.+]] = alloca [2 x i32], @@ -153,7 +153,7 @@ // CHECK: [[VAR_ADDR:%.+]] = alloca [[S_DOUBLE_TY]], // CHECK: [[GTID:%.+]] = call i32 @__kmpc_global_thread_num([[LOC:%.+]]) -// CHECK: call {{.*}} [[S_DOUBLE_TY_DEF_CONSTR:@.+]]([[S_DOUBLE_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_DOUBLE_TY_DEF_CONSTR:@.+]]([[S_DOUBLE_TY]]* frozen [[TEST]]) // CHECK: [[RES:%.+]] = call {{.*}}i32 @__kmpc_master( // CHECK-NEXT: [[IS_MASTER:%.+]] = icmp ne i32 [[RES]], 0 @@ -180,14 +180,14 @@ // CHECK: [[PRIVATE_S_ARR_REF:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 // CHECK: getelementptr inbounds [2 x [[S_DOUBLE_TY]]], [2 x [[S_DOUBLE_TY]]]* [[PRIVATE_S_ARR_REF]], i{{.+}} 0, i{{.+}} 0 // CHECK: getelementptr inbounds [[S_DOUBLE_TY]], [[S_DOUBLE_TY]]* %{{.+}}, i{{.+}} 2 -// CHECK: call void [[S_DOUBLE_TY_DEF_CONSTR]]([[S_DOUBLE_TY]]* [[S_ARR_CUR:%.+]]) +// CHECK: call void [[S_DOUBLE_TY_DEF_CONSTR]]([[S_DOUBLE_TY]]* frozen [[S_ARR_CUR:%.+]]) // CHECK: getelementptr inbounds [[S_DOUBLE_TY]], [[S_DOUBLE_TY]]* [[S_ARR_CUR]], i{{.+}} 1 // CHECK: icmp eq // CHECK: br i1 // var; // CHECK: [[PRIVATE_VAR_REF:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 1 -// CHECK: call void [[S_DOUBLE_TY_DEF_CONSTR]]([[S_DOUBLE_TY]]* [[PRIVATE_VAR_REF:%.+]]) +// CHECK: call void [[S_DOUBLE_TY_DEF_CONSTR]]([[S_DOUBLE_TY]]* frozen [[PRIVATE_VAR_REF:%.+]]) // Provide pointer to destructor function, which will destroy private variables at the end of the task. // CHECK: [[DESTRUCTORS_REF:%.+]] = getelementptr inbounds [[KMP_TASK_T_TY]], [[KMP_TASK_T_TY]]* [[TASK]], i{{.+}} 0, i{{.+}} 3 @@ -201,7 +201,7 @@ // CHECK: [[EXIT]] // CHECK: call i32 @__kmpc_omp_task([[LOC]], i32 [[GTID]], i8* -// CHECK: = call i{{.+}} [[TMAIN_INT:@.+]]() +// CHECK: = call frozen i{{.+}} [[TMAIN_INT:@.+]]() // No destructors must be called for private copies of s_arr and var. // CHECK-NOT: getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 2 @@ -212,7 +212,7 @@ // CHECK: ret // -// CHECK: define internal void [[PRIVATES_MAP_FN:@.+]]([[PRIVATES_MAIN_TY]]* noalias %0, [[S_DOUBLE_TY]]** noalias %1, i32** noalias %2, [2 x [[S_DOUBLE_TY]]]** noalias %3, [2 x i32]** noalias %4, i32** noalias %5) +// CHECK: define internal void [[PRIVATES_MAP_FN:@.+]]([[PRIVATES_MAIN_TY]]* frozen noalias %0, [[S_DOUBLE_TY]]** frozen noalias %1, i32** frozen noalias %2, [2 x [[S_DOUBLE_TY]]]** frozen noalias %3, [2 x i32]** frozen noalias %4, i32** frozen noalias %5) // CHECK: [[PRIVATES:%.+]] = load [[PRIVATES_MAIN_TY]]*, [[PRIVATES_MAIN_TY]]** // CHECK: [[PRIV_S_VAR:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i32 0, i32 0 // CHECK: [[ARG3:%.+]] = load [2 x [[S_DOUBLE_TY]]]**, [2 x [[S_DOUBLE_TY]]]*** %{{.+}}, @@ -228,7 +228,7 @@ // CHECK: store [2 x i32]* [[PRIV_VEC]], [2 x i32]** [[ARG4]], // CHECK: ret void -// CHECK: define internal i32 [[TASK_ENTRY]](i32 %0, [[KMP_TASK_MAIN_TY]]* noalias %1) +// CHECK: define internal frozen i32 [[TASK_ENTRY]](i32 frozen %0, [[KMP_TASK_MAIN_TY]]* frozen noalias %1) // CHECK: [[PRIV_VAR_ADDR:%.+]] = alloca [[S_DOUBLE_TY]]*, // CHECK: [[PRIV_T_VAR_ADDR:%.+]] = alloca i32*, @@ -253,7 +253,7 @@ // CHECK: ret -// CHECK: define internal void [[MAIN_DUP]]([[KMP_TASK_MAIN_TY]]* %0, [[KMP_TASK_MAIN_TY]]* %1, i32 %2) +// CHECK: define internal void [[MAIN_DUP]]([[KMP_TASK_MAIN_TY]]* frozen %0, [[KMP_TASK_MAIN_TY]]* frozen %1, i32 frozen %2) // CHECK: getelementptr inbounds [[KMP_TASK_MAIN_TY]], [[KMP_TASK_MAIN_TY]]* %{{.+}}, i32 0, i32 1 // CHECK: getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* %{{.+}}, i32 0, i32 0 // CHECK: getelementptr inbounds [2 x [[S_DOUBLE_TY]]], [2 x [[S_DOUBLE_TY]]]* %{{.+}}, i32 0, i32 0 @@ -270,15 +270,15 @@ // CHECK: call {{.*}} [[S_DOUBLE_TY_DEF_CONSTR]]([[S_DOUBLE_TY]]* // CHECK: ret void -// CHECK: define internal i32 [[DESTRUCTORS]](i32 %0, [[KMP_TASK_MAIN_TY]]* noalias %1) +// CHECK: define internal frozen i32 [[DESTRUCTORS]](i32 frozen %0, [[KMP_TASK_MAIN_TY]]* frozen noalias %1) // CHECK: [[PRIVATES:%.+]] = getelementptr inbounds [[KMP_TASK_MAIN_TY]], [[KMP_TASK_MAIN_TY]]* [[RES_KMP_TASK:%.+]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 // CHECK: [[PRIVATE_S_ARR_REF:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 0 // CHECK: [[PRIVATE_VAR_REF:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 1 -// CHECK: call void [[S_DOUBLE_TY_DESTR]]([[S_DOUBLE_TY]]* [[PRIVATE_VAR_REF]]) +// CHECK: call void [[S_DOUBLE_TY_DESTR]]([[S_DOUBLE_TY]]* frozen [[PRIVATE_VAR_REF]]) // CHECK: getelementptr inbounds [2 x [[S_DOUBLE_TY]]], [2 x [[S_DOUBLE_TY]]]* [[PRIVATE_S_ARR_REF]], i{{.+}} 0, i{{.+}} 0 // CHECK: getelementptr inbounds [[S_DOUBLE_TY]], [[S_DOUBLE_TY]]* %{{.+}}, i{{.+}} 2 // CHECK: [[PRIVATE_S_ARR_ELEM_REF:%.+]] = getelementptr inbounds [[S_DOUBLE_TY]], [[S_DOUBLE_TY]]* %{{.+}}, i{{.+}} -1 -// CHECK: call void [[S_DOUBLE_TY_DESTR]]([[S_DOUBLE_TY]]* [[PRIVATE_S_ARR_ELEM_REF]]) +// CHECK: call void [[S_DOUBLE_TY_DESTR]]([[S_DOUBLE_TY]]* frozen [[PRIVATE_S_ARR_ELEM_REF]]) // CHECK: icmp eq // CHECK: br i1 // CHECK: ret i32 @@ -291,7 +291,7 @@ // CHECK: [[VAR_ADDR:%.+]] = alloca [[S_INT_TY]], // CHECK: [[GTID:%.+]] = call i32 @__kmpc_global_thread_num([[LOC:%.+]]) -// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR:@.+]]([[S_INT_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR:@.+]]([[S_INT_TY]]* frozen [[TEST]]) // Do not store original variables in capture struct. // CHECK-NOT: getelementptr inbounds [[CAP_TMAIN_TY]], @@ -314,14 +314,14 @@ // CHECK: [[PRIVATE_S_ARR_REF:%.+]] = getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i{{[0-9]+}} 0, i{{[0-9]+}} 2 // CHECK: getelementptr inbounds [2 x [[S_INT_TY]]], [2 x [[S_INT_TY]]]* [[PRIVATE_S_ARR_REF]], i{{.+}} 0, i{{.+}} 0 // CHECK: getelementptr inbounds [[S_INT_TY]], [[S_INT_TY]]* %{{.+}}, i{{.+}} 2 -// CHECK: call void [[S_INT_TY_DEF_CONSTR]]([[S_INT_TY]]* [[S_ARR_CUR:%.+]]) +// CHECK: call void [[S_INT_TY_DEF_CONSTR]]([[S_INT_TY]]* frozen [[S_ARR_CUR:%.+]]) // CHECK: getelementptr inbounds [[S_INT_TY]], [[S_INT_TY]]* [[S_ARR_CUR]], i{{.+}} 1 // CHECK: icmp eq // CHECK: br i1 // var; // CHECK: [[PRIVATE_VAR_REF:%.+]] = getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 3 -// CHECK: call void [[S_INT_TY_DEF_CONSTR]]([[S_INT_TY]]* [[PRIVATE_VAR_REF:%.+]]) +// CHECK: call void [[S_INT_TY_DEF_CONSTR]]([[S_INT_TY]]* frozen [[PRIVATE_VAR_REF:%.+]]) // Provide pointer to destructor function, which will destroy private variables at the end of the task. // CHECK: [[DESTRUCTORS_REF:%.+]] = getelementptr inbounds [[KMP_TASK_T_TY]], [[KMP_TASK_T_TY]]* [[TASK]], i{{.+}} 0, i{{.+}} 3 @@ -340,7 +340,7 @@ // CHECK: ret // -// CHECK: define internal void [[PRIVATES_MAP_FN:@.+]]([[PRIVATES_TMAIN_TY]]* noalias %0, i32** noalias %1, [2 x i32]** noalias %2, [2 x [[S_INT_TY]]]** noalias %3, [[S_INT_TY]]** noalias %4) +// CHECK: define internal void [[PRIVATES_MAP_FN:@.+]]([[PRIVATES_TMAIN_TY]]* frozen noalias %0, i32** frozen noalias %1, [2 x i32]** frozen noalias %2, [2 x [[S_INT_TY]]]** frozen noalias %3, [[S_INT_TY]]** frozen noalias %4) // CHECK: [[PRIVATES:%.+]] = load [[PRIVATES_TMAIN_TY]]*, [[PRIVATES_TMAIN_TY]]** // CHECK: [[PRIV_T_VAR:%.+]] = getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i32 0, i32 0 // CHECK: [[ARG1:%.+]] = load i32**, i32*** %{{.+}}, @@ -356,7 +356,7 @@ // CHECK: store [[S_INT_TY]]* [[PRIV_VAR]], [[S_INT_TY]]** [[ARG4]], // CHECK: ret void -// CHECK: define internal i32 [[TASK_ENTRY]](i32 %0, [[KMP_TASK_TMAIN_TY]]* noalias %1) +// CHECK: define internal frozen i32 [[TASK_ENTRY]](i32 frozen %0, [[KMP_TASK_TMAIN_TY]]* frozen noalias %1) // CHECK: alloca i32*, // CHECK-DAG: [[PRIV_T_VAR_ADDR:%.+]] = alloca i32*, @@ -379,7 +379,7 @@ // CHECK: ret -// CHECK: define internal void [[TMAIN_DUP]]([[KMP_TASK_TMAIN_TY]]* %0, [[KMP_TASK_TMAIN_TY]]* %1, i32 %2) +// CHECK: define internal void [[TMAIN_DUP]]([[KMP_TASK_TMAIN_TY]]* frozen %0, [[KMP_TASK_TMAIN_TY]]* frozen %1, i32 frozen %2) // CHECK: getelementptr inbounds [[KMP_TASK_TMAIN_TY]], [[KMP_TASK_TMAIN_TY]]* %{{.+}}, i32 0, i32 2 // CHECK: getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* %{{.+}}, i32 0, i32 2 // CHECK: getelementptr inbounds [2 x [[S_INT_TY]]], [2 x [[S_INT_TY]]]* %{{.+}}, i32 0, i32 0 @@ -396,15 +396,15 @@ // CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR]]([[S_INT_TY]]* // CHECK: ret void -// CHECK: define internal i32 [[DESTRUCTORS]](i32 %0, [[KMP_TASK_TMAIN_TY]]* noalias %1) +// CHECK: define internal frozen i32 [[DESTRUCTORS]](i32 frozen %0, [[KMP_TASK_TMAIN_TY]]* frozen noalias %1) // CHECK: [[PRIVATES:%.+]] = getelementptr inbounds [[KMP_TASK_TMAIN_TY]], [[KMP_TASK_TMAIN_TY]]* [[RES_KMP_TASK:%.+]], i{{[0-9]+}} 0, i{{[0-9]+}} 2 // CHECK: [[PRIVATE_S_ARR_REF:%.+]] = getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 2 // CHECK: [[PRIVATE_VAR_REF:%.+]] = getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 3 -// CHECK: call void [[S_INT_TY_DESTR]]([[S_INT_TY]]* [[PRIVATE_VAR_REF]]) +// CHECK: call void [[S_INT_TY_DESTR]]([[S_INT_TY]]* frozen [[PRIVATE_VAR_REF]]) // CHECK: getelementptr inbounds [2 x [[S_INT_TY]]], [2 x [[S_INT_TY]]]* [[PRIVATE_S_ARR_REF]], i{{.+}} 0, i{{.+}} 0 // CHECK: getelementptr inbounds [[S_INT_TY]], [[S_INT_TY]]* %{{.+}}, i{{.+}} 2 // CHECK: [[PRIVATE_S_ARR_ELEM_REF:%.+]] = getelementptr inbounds [[S_INT_TY]], [[S_INT_TY]]* %{{.+}}, i{{.+}} -1 -// CHECK: call void [[S_INT_TY_DESTR]]([[S_INT_TY]]* [[PRIVATE_S_ARR_ELEM_REF]]) +// CHECK: call void [[S_INT_TY_DESTR]]([[S_INT_TY]]* frozen [[PRIVATE_S_ARR_ELEM_REF]]) // CHECK: icmp eq // CHECK: br i1 // CHECK: ret i32 diff --git a/clang/test/OpenMP/master_taskloop_reduction_codegen.cpp b/clang/test/OpenMP/master_taskloop_reduction_codegen.cpp --- a/clang/test/OpenMP/master_taskloop_reduction_codegen.cpp +++ b/clang/test/OpenMP/master_taskloop_reduction_codegen.cpp @@ -172,52 +172,52 @@ // CHECK: ret i32 -// CHECK: define internal void @[[RED_INIT1]](i8* noalias %{{.+}}, i8* noalias %{{.+}}) +// CHECK: define internal void @[[RED_INIT1]](i8* frozen noalias %{{.+}}, i8* frozen noalias %{{.+}}) // CHECK: store float 0.000000e+00, float* % // CHECK: ret void -// CHECK: define internal void @[[RED_COMB1]](i8* %0, i8* %1) +// CHECK: define internal void @[[RED_COMB1]](i8* frozen %0, i8* frozen %1) // CHECK: fadd float % // CHECK: store float %{{.+}}, float* % // CHECK: ret void -// CHECK: define internal void @[[RED_INIT2]](i8* noalias %{{.+}}, i8* noalias %{{.+}}) +// CHECK: define internal void @[[RED_INIT2]](i8* frozen noalias %{{.+}}, i8* frozen noalias %{{.+}}) // CHECK: call i8* @__kmpc_threadprivate_cached( // CHECK-NOT: call i8* @__kmpc_threadprivate_cached( // CHECK: call void [[OMP_INIT1:@.+]]( // CHECK: ret void -// CHECK: define internal void [[OMP_COMB1:@.+]](%struct.S* noalias %0, %struct.S* noalias %1) +// CHECK: define internal void [[OMP_COMB1:@.+]](%struct.S* frozen noalias %0, %struct.S* frozen noalias %1) // CHECK: fadd float % -// CHECK: define internal void [[OMP_INIT1]](%struct.S* noalias %0, %struct.S* noalias %1) +// CHECK: define internal void [[OMP_INIT1]](%struct.S* frozen noalias %0, %struct.S* frozen noalias %1) // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64( -// CHECK: define internal void @[[RED_FINI2]](i8* %0) +// CHECK: define internal void @[[RED_FINI2]](i8* frozen %0) // CHECK: call i8* @__kmpc_threadprivate_cached( // CHECK: call void @ // CHECK: ret void -// CHECK: define internal void @[[RED_COMB2]](i8* %0, i8* %1) +// CHECK: define internal void @[[RED_COMB2]](i8* frozen %0, i8* frozen %1) // CHECK: call i8* @__kmpc_threadprivate_cached( // CHECK: call void [[OMP_COMB1]]( // CHECK: ret void -// CHECK: define internal void @[[RED_INIT3]](i8* noalias %{{.+}}, i8* noalias %{{.+}}) +// CHECK: define internal void @[[RED_INIT3]](i8* frozen noalias %{{.+}}, i8* frozen noalias %{{.+}}) // CHECK: store float 0.000000e+00, float* % // CHECK: ret void -// CHECK: define internal void @[[RED_COMB3]](i8* %0, i8* %1) +// CHECK: define internal void @[[RED_COMB3]](i8* frozen %0, i8* frozen %1) // CHECK: fadd float % // CHECK: store float %{{.+}}, float* % // CHECK: ret void -// CHECK: define internal void @[[RED_INIT4]](i8* noalias %{{.+}}, i8* noalias %{{.+}}) +// CHECK: define internal void @[[RED_INIT4]](i8* frozen noalias %{{.+}}, i8* frozen noalias %{{.+}}) // CHECK: call i8* @__kmpc_threadprivate_cached( // CHECK: store float 0.000000e+00, float* % // CHECK: ret void -// CHECK: define internal void @[[RED_COMB4]](i8* %0, i8* %1) +// CHECK: define internal void @[[RED_COMB4]](i8* frozen %0, i8* frozen %1) // CHECK: call i8* @__kmpc_threadprivate_cached( // CHECK: fadd float % // CHECK: store float %{{.+}}, float* % diff --git a/clang/test/OpenMP/master_taskloop_simd_codegen.cpp b/clang/test/OpenMP/master_taskloop_simd_codegen.cpp --- a/clang/test/OpenMP/master_taskloop_simd_codegen.cpp +++ b/clang/test/OpenMP/master_taskloop_simd_codegen.cpp @@ -96,7 +96,7 @@ ; } -// CHECK: define internal i32 [[TASK1]]( +// CHECK: define internal frozen i32 [[TASK1]]( // CHECK: [[DOWN:%.+]] = getelementptr inbounds [[TD_TY:%.+]], [[TD_TY]]* %{{.+}}, i32 0, i32 5 // CHECK: [[DOWN_VAL:%.+]] = load i64, i64* [[DOWN]], // CHECK: [[UP:%.+]] = getelementptr inbounds [[TD_TY]], [[TD_TY]]* %{{.+}}, i32 0, i32 6 @@ -126,7 +126,7 @@ // CHECK: br label %{{.*}}!llvm.loop // CHECK: ret i32 0 -// CHECK: define internal i32 [[TASK2]]( +// CHECK: define internal frozen i32 [[TASK2]]( // CHECK: [[DOWN:%.+]] = getelementptr inbounds [[TD_TY:%.+]], [[TD_TY]]* %{{.+}}, i32 0, i32 5 // CHECK: [[DOWN_VAL:%.+]] = load i64, i64* [[DOWN]], // CHECK: [[UP:%.+]] = getelementptr inbounds [[TD_TY]], [[TD_TY]]* %{{.+}}, i32 0, i32 6 @@ -156,7 +156,7 @@ // CHECK: br label %{{.*}}!llvm.loop // CHECK: ret i32 0 -// CHECK: define internal i32 [[TASK3]]( +// CHECK: define internal frozen i32 [[TASK3]]( // CHECK: [[DOWN:%.+]] = getelementptr inbounds [[TD_TY:%.+]], [[TD_TY]]* %{{.+}}, i32 0, i32 5 // CHECK: [[DOWN_VAL:%.+]] = load i64, i64* [[DOWN]], // CHECK: [[UP:%.+]] = getelementptr inbounds [[TD_TY]], [[TD_TY]]* %{{.+}}, i32 0, i32 6 @@ -208,7 +208,7 @@ } } s(1); -// CHECK: define internal i32 [[TASK4]]( +// CHECK: define internal frozen i32 [[TASK4]]( // CHECK: [[DOWN:%.+]] = getelementptr inbounds [[TD_TY:%.+]], [[TD_TY]]* %{{.+}}, i32 0, i32 5 // CHECK: [[DOWN_VAL:%.+]] = load i64, i64* [[DOWN]], // CHECK: [[UP:%.+]] = getelementptr inbounds [[TD_TY]], [[TD_TY]]* %{{.+}}, i32 0, i32 6 diff --git a/clang/test/OpenMP/master_taskloop_simd_firstprivate_codegen.cpp b/clang/test/OpenMP/master_taskloop_simd_firstprivate_codegen.cpp --- a/clang/test/OpenMP/master_taskloop_simd_firstprivate_codegen.cpp +++ b/clang/test/OpenMP/master_taskloop_simd_firstprivate_codegen.cpp @@ -78,7 +78,7 @@ // LAMBDA: ret #pragma omp master taskloop simd firstprivate(g, sivar) for (int i = 0; i < 10; ++i) { - // LAMBDA: define {{.+}} void [[INNER_LAMBDA:@.+]](%{{.+}}* [[ARG_PTR:%.+]]) + // LAMBDA: define {{.+}} void [[INNER_LAMBDA:@.+]](%{{.+}}* frozen [[ARG_PTR:%.+]]) // LAMBDA: store %{{.+}}* [[ARG_PTR]], %{{.+}}** [[ARG_PTR_REF:%.+]], // LAMBDA: [[ARG_PTR:%.+]] = load %{{.+}}*, %{{.+}}** [[ARG_PTR_REF]] // LAMBDA: [[G_PTR_REF:%.+]] = getelementptr inbounds %{{.+}}, %{{.+}}* [[ARG_PTR]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 @@ -86,7 +86,7 @@ // LAMBDA: store volatile double 2.0{{.+}}, double* [[G_REF]] // LAMBDA: store double* %{{.+}}, double** %{{.+}}, - // LAMBDA: define internal i32 [[TASK_ENTRY]](i32 %0, %{{.+}}* noalias %1) + // LAMBDA: define internal frozen i32 [[TASK_ENTRY]](i32 frozen %0, %{{.+}}* frozen noalias %1) g = 1; sivar = 11; // LAMBDA: store double 1.0{{.+}}, double* %{{.+}}, @@ -130,7 +130,7 @@ // BLOCKS: store double* %{{.+}}, double** %{{.+}}, // BLOCKS: store i{{[0-9]+}}* %{{.+}}, i{{[0-9]+}}** %{{.+}}, - // BLOCKS: define internal i32 [[TASK_ENTRY]](i32 %0, %{{.+}}* noalias %1) + // BLOCKS: define internal frozen i32 [[TASK_ENTRY]](i32 frozen %0, %{{.+}}* frozen noalias %1) g = 1; sivar = 11; // BLOCKS: store double 1.0{{.+}}, double* %{{.+}}, @@ -163,7 +163,7 @@ } // CHECK: [[SIVAR:.+]] = internal global i{{[0-9]+}} 0, -// CHECK: define i{{[0-9]+}} @main() +// CHECK: define frozen i{{[0-9]+}} @main() // CHECK: alloca [[S_DOUBLE_TY]], // CHECK: [[TEST:%.+]] = alloca [[S_DOUBLE_TY]], // CHECK: [[T_VAR_ADDR:%.+]] = alloca i32, @@ -172,7 +172,7 @@ // CHECK: [[VAR_ADDR:%.+]] = alloca [[S_DOUBLE_TY]], // CHECK: [[GTID:%.+]] = call i32 @__kmpc_global_thread_num([[LOC:%.+]]) -// CHECK: call {{.*}} [[S_DOUBLE_TY_COPY_CONSTR:@.+]]([[S_DOUBLE_TY]]* [[TEST]], +// CHECK: call {{.*}} [[S_DOUBLE_TY_COPY_CONSTR:@.+]]([[S_DOUBLE_TY]]* frozen [[TEST]] // Store original variables in capture struct. // CHECK: [[S_ARR_REF:%.+]] = getelementptr inbounds [[CAP_MAIN_TY]], [[CAP_MAIN_TY]]* %{{.+}}, i{{[0-9]+}} 0, i{{[0-9]+}} 0 @@ -203,7 +203,7 @@ // s_arr; // CHECK: [[PRIVATE_S_ARR_REF:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 // CHECK: bitcast [2 x [[S_DOUBLE_TY]]]* %{{.+}} to [[S_DOUBLE_TY]]* -// CHECK: call void [[S_DOUBLE_TY_COPY_CONSTR]]([[S_DOUBLE_TY]]* [[S_ARR_CUR:%[^,]+]], +// CHECK: call void [[S_DOUBLE_TY_COPY_CONSTR]]([[S_DOUBLE_TY]]* frozen [[S_ARR_CUR:%[^,]+]] // CHECK: getelementptr [[S_DOUBLE_TY]], [[S_DOUBLE_TY]]* [[S_ARR_CUR]], i{{.+}} 1 // CHECK: getelementptr [[S_DOUBLE_TY]], [[S_DOUBLE_TY]]* %{{.+}}, i{{.+}} 1 // CHECK: icmp eq @@ -211,7 +211,7 @@ // var; // CHECK: [[PRIVATE_VAR_REF:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 1 -// CHECK-NEXT: call void [[S_DOUBLE_TY_COPY_CONSTR]]([[S_DOUBLE_TY]]* [[PRIVATE_VAR_REF]], [[S_DOUBLE_TY]]* {{.*}}, +// CHECK-NEXT: call void [[S_DOUBLE_TY_COPY_CONSTR]]([[S_DOUBLE_TY]]* frozen [[PRIVATE_VAR_REF]], [[S_DOUBLE_TY]]* {{.*}} // t_var; // CHECK: [[PRIVATE_T_VAR_REF:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 2 @@ -237,7 +237,7 @@ // Start task. // CHECK: call void @__kmpc_taskloop([[LOC]], i32 [[GTID]], i8* [[RES]], i32 1, i64* %{{.+}}, i64* %{{.+}}, i64 %{{.+}}, i32 1, i32 0, i64 0, i8* bitcast (void ([[KMP_TASK_MAIN_TY]]*, [[KMP_TASK_MAIN_TY]]*, i32)* [[MAIN_DUP:@.+]] to i8*)) -// CHECK: = call i{{.+}} [[TMAIN_INT:@.+]]() +// CHECK: = call frozen i{{.+}} [[TMAIN_INT:@.+]]() // No destructors must be called for private copies of s_arr and var. // CHECK-NOT: getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 2 @@ -248,7 +248,7 @@ // CHECK: ret // -// CHECK: define internal void [[PRIVATES_MAP_FN:@.+]]([[PRIVATES_MAIN_TY]]* noalias %0, [[S_DOUBLE_TY]]** noalias %1, i32** noalias %2, [2 x [[S_DOUBLE_TY]]]** noalias %3, [2 x i32]** noalias %4, i32** noalias %5) +// CHECK: define internal void [[PRIVATES_MAP_FN:@.+]]([[PRIVATES_MAIN_TY]]* frozen noalias %0, [[S_DOUBLE_TY]]** frozen noalias %1, i32** frozen noalias %2, [2 x [[S_DOUBLE_TY]]]** frozen noalias %3, [2 x i32]** frozen noalias %4, i32** frozen noalias %5) // CHECK: [[PRIVATES:%.+]] = load [[PRIVATES_MAIN_TY]]*, [[PRIVATES_MAIN_TY]]** // CHECK: [[PRIV_S_VAR:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i32 0, i32 0 // CHECK: [[ARG3:%.+]] = load [2 x [[S_DOUBLE_TY]]]**, [2 x [[S_DOUBLE_TY]]]*** %{{.+}}, @@ -267,7 +267,7 @@ // CHECK: store i{{[0-9]+}}* [[PRIV_SIVAR]], i{{[0-9]+}}** [[ARG5]], // CHECK: ret void -// CHECK: define internal i32 [[TASK_ENTRY]](i32 %0, [[KMP_TASK_MAIN_TY]]* noalias %1) +// CHECK: define internal frozen i32 [[TASK_ENTRY]](i32 frozen %0, [[KMP_TASK_MAIN_TY]]* frozen noalias %1) // CHECK: [[PRIV_VAR_ADDR:%.+]] = alloca [[S_DOUBLE_TY]]*, // CHECK: [[PRIV_T_VAR_ADDR:%.+]] = alloca i32*, @@ -294,7 +294,7 @@ // CHECK: ret -// CHECK: define internal void [[MAIN_DUP]]([[KMP_TASK_MAIN_TY]]* %0, [[KMP_TASK_MAIN_TY]]* %1, i32 %2) +// CHECK: define internal void [[MAIN_DUP]]([[KMP_TASK_MAIN_TY]]* frozen %0, [[KMP_TASK_MAIN_TY]]* frozen %1, i32 frozen %2) // CHECK: getelementptr inbounds [[KMP_TASK_MAIN_TY]], [[KMP_TASK_MAIN_TY]]* %{{.+}}, i32 0, i32 1 // CHECK: getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* %{{.+}}, i32 0, i32 0 // CHECK: getelementptr inbounds [2 x [[S_DOUBLE_TY]]], [2 x [[S_DOUBLE_TY]]]* %{{.+}}, i32 0, i32 0 @@ -311,15 +311,15 @@ // CHECK: call {{.*}} [[S_DOUBLE_TY_COPY_CONSTR]]([[S_DOUBLE_TY]]* // CHECK: ret void -// CHECK: define internal i32 [[DESTRUCTORS]](i32 %0, [[KMP_TASK_MAIN_TY]]* noalias %1) +// CHECK: define internal frozen i32 [[DESTRUCTORS]](i32 frozen %0, [[KMP_TASK_MAIN_TY]]* frozen noalias %1) // CHECK: [[PRIVATES:%.+]] = getelementptr inbounds [[KMP_TASK_MAIN_TY]], [[KMP_TASK_MAIN_TY]]* [[RES_KMP_TASK:%.+]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 // CHECK: [[PRIVATE_S_ARR_REF:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 0 // CHECK: [[PRIVATE_VAR_REF:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 1 -// CHECK: call void [[S_DOUBLE_TY_DESTR]]([[S_DOUBLE_TY]]* [[PRIVATE_VAR_REF]]) +// CHECK: call void [[S_DOUBLE_TY_DESTR]]([[S_DOUBLE_TY]]* frozen [[PRIVATE_VAR_REF]]) // CHECK: getelementptr inbounds [2 x [[S_DOUBLE_TY]]], [2 x [[S_DOUBLE_TY]]]* [[PRIVATE_S_ARR_REF]], i{{.+}} 0, i{{.+}} 0 // CHECK: getelementptr inbounds [[S_DOUBLE_TY]], [[S_DOUBLE_TY]]* %{{.+}}, i{{.+}} 2 // CHECK: [[PRIVATE_S_ARR_ELEM_REF:%.+]] = getelementptr inbounds [[S_DOUBLE_TY]], [[S_DOUBLE_TY]]* %{{.+}}, i{{.+}} -1 -// CHECK: call void [[S_DOUBLE_TY_DESTR]]([[S_DOUBLE_TY]]* [[PRIVATE_S_ARR_ELEM_REF]]) +// CHECK: call void [[S_DOUBLE_TY_DESTR]]([[S_DOUBLE_TY]]* frozen [[PRIVATE_S_ARR_ELEM_REF]]) // CHECK: icmp eq // CHECK: br i1 // CHECK: ret i32 @@ -333,7 +333,7 @@ // CHECK: [[VAR_ADDR:%.+]] = alloca [[S_INT_TY]], // CHECK: [[GTID:%.+]] = call i32 @__kmpc_global_thread_num([[LOC:%.+]]) -// CHECK: call {{.*}} [[S_INT_TY_COPY_CONSTR:@.+]]([[S_INT_TY]]* [[TEST]], +// CHECK: call {{.*}} [[S_INT_TY_COPY_CONSTR:@.+]]([[S_INT_TY]]* frozen [[TEST]] // Store original variables in capture struct. // CHECK: [[S_ARR_REF:%.+]] = getelementptr inbounds [[CAP_TMAIN_TY]], [[CAP_TMAIN_TY]]* %{{.+}}, i{{[0-9]+}} 0, i{{[0-9]+}} 0 @@ -376,14 +376,14 @@ // CHECK: getelementptr inbounds [2 x [[S_INT_TY]]], [2 x [[S_INT_TY]]]* [[PRIVATE_S_ARR_REF]], i{{.+}} 0, i{{.+}} 0 // CHECK: bitcast [2 x [[S_INT_TY]]]* %{{.+}} to [[S_INT_TY]]* // CHECK: getelementptr [[S_INT_TY]], [[S_INT_TY]]* %{{.+}}, i{{.+}} 2 -// CHECK: call void [[S_INT_TY_COPY_CONSTR]]([[S_INT_TY]]* [[S_ARR_CUR:%[^,]+]], +// CHECK: call void [[S_INT_TY_COPY_CONSTR]]([[S_INT_TY]]* frozen [[S_ARR_CUR:%[^,]+]] // CHECK: getelementptr [[S_INT_TY]], [[S_INT_TY]]* [[S_ARR_CUR]], i{{.+}} 1 // CHECK: icmp eq // CHECK: br i1 // var; // CHECK: [[PRIVATE_VAR_REF:%.+]] = getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 3 -// CHECK-NEXT: call void [[S_INT_TY_COPY_CONSTR]]([[S_INT_TY]]* [[PRIVATE_VAR_REF]], +// CHECK-NEXT: call void [[S_INT_TY_COPY_CONSTR]]([[S_INT_TY]]* frozen [[PRIVATE_VAR_REF]] // Provide pointer to destructor function, which will destroy private variables at the end of the task. // CHECK: [[DESTRUCTORS_REF:%.+]] = getelementptr inbounds [[KMP_TASK_T_TY]], [[KMP_TASK_T_TY]]* [[TASK]], i{{.+}} 0, i{{.+}} 3 @@ -402,7 +402,7 @@ // CHECK: ret // -// CHECK: define internal void [[PRIVATES_MAP_FN:@.+]]([[PRIVATES_TMAIN_TY]]* noalias %0, i32** noalias %1, [2 x i32]** noalias %2, [2 x [[S_INT_TY]]]** noalias %3, [[S_INT_TY]]** noalias %4) +// CHECK: define internal void [[PRIVATES_MAP_FN:@.+]]([[PRIVATES_TMAIN_TY]]* frozen noalias %0, i32** frozen noalias %1, [2 x i32]** frozen noalias %2, [2 x [[S_INT_TY]]]** frozen noalias %3, [[S_INT_TY]]** frozen noalias %4) // CHECK: [[PRIVATES:%.+]] = load [[PRIVATES_TMAIN_TY]]*, [[PRIVATES_TMAIN_TY]]** // CHECK: [[PRIV_T_VAR:%.+]] = getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i32 0, i32 0 // CHECK: [[ARG1:%.+]] = load i32**, i32*** %{{.+}}, @@ -418,7 +418,7 @@ // CHECK: store [[S_INT_TY]]* [[PRIV_VAR]], [[S_INT_TY]]** [[ARG4]], // CHECK: ret void -// CHECK: define internal i32 [[TASK_ENTRY]](i32 %0, [[KMP_TASK_TMAIN_TY]]* noalias %1) +// CHECK: define internal frozen i32 [[TASK_ENTRY]](i32 frozen %0, [[KMP_TASK_TMAIN_TY]]* frozen noalias %1) // CHECK: alloca i32*, // CHECK-DAG: [[PRIV_T_VAR_ADDR:%.+]] = alloca i32*, // CHECK-DAG: [[PRIV_VEC_ADDR:%.+]] = alloca [2 x i32]*, @@ -440,7 +440,7 @@ // CHECK: ret -// CHECK: define internal void [[TMAIN_DUP]]([[KMP_TASK_TMAIN_TY]]* %0, [[KMP_TASK_TMAIN_TY]]* %1, i32 %2) +// CHECK: define internal void [[TMAIN_DUP]]([[KMP_TASK_TMAIN_TY]]* frozen %0, [[KMP_TASK_TMAIN_TY]]* frozen %1, i32 frozen %2) // CHECK: getelementptr inbounds [[KMP_TASK_TMAIN_TY]], [[KMP_TASK_TMAIN_TY]]* %{{.+}}, i32 0, i32 2 // CHECK: getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* %{{.+}}, i32 0, i32 2 // CHECK: getelementptr inbounds [2 x [[S_INT_TY]]], [2 x [[S_INT_TY]]]* %{{.+}}, i32 0, i32 0 @@ -457,15 +457,15 @@ // CHECK: call {{.*}} [[S_INT_TY_COPY_CONSTR]]([[S_INT_TY]]* // CHECK: ret void -// CHECK: define internal i32 [[DESTRUCTORS]](i32 %0, [[KMP_TASK_TMAIN_TY]]* noalias %1) +// CHECK: define internal frozen i32 [[DESTRUCTORS]](i32 frozen %0, [[KMP_TASK_TMAIN_TY]]* frozen noalias %1) // CHECK: [[PRIVATES:%.+]] = getelementptr inbounds [[KMP_TASK_TMAIN_TY]], [[KMP_TASK_TMAIN_TY]]* [[RES_KMP_TASK:%.+]], i{{[0-9]+}} 0, i{{[0-9]+}} 2 // CHECK: [[PRIVATE_S_ARR_REF:%.+]] = getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 2 // CHECK: [[PRIVATE_VAR_REF:%.+]] = getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 3 -// CHECK: call void [[S_INT_TY_DESTR]]([[S_INT_TY]]* [[PRIVATE_VAR_REF]]) +// CHECK: call void [[S_INT_TY_DESTR]]([[S_INT_TY]]* frozen [[PRIVATE_VAR_REF]]) // CHECK: getelementptr inbounds [2 x [[S_INT_TY]]], [2 x [[S_INT_TY]]]* [[PRIVATE_S_ARR_REF]], i{{.+}} 0, i{{.+}} 0 // CHECK: getelementptr inbounds [[S_INT_TY]], [[S_INT_TY]]* %{{.+}}, i{{.+}} 2 // CHECK: [[PRIVATE_S_ARR_ELEM_REF:%.+]] = getelementptr inbounds [[S_INT_TY]], [[S_INT_TY]]* %{{.+}}, i{{.+}} -1 -// CHECK: call void [[S_INT_TY_DESTR]]([[S_INT_TY]]* [[PRIVATE_S_ARR_ELEM_REF]]) +// CHECK: call void [[S_INT_TY_DESTR]]([[S_INT_TY]]* frozen [[PRIVATE_S_ARR_ELEM_REF]]) // CHECK: icmp eq // CHECK: br i1 // CHECK: ret i32 diff --git a/clang/test/OpenMP/master_taskloop_simd_lastprivate_codegen.cpp b/clang/test/OpenMP/master_taskloop_simd_lastprivate_codegen.cpp --- a/clang/test/OpenMP/master_taskloop_simd_lastprivate_codegen.cpp +++ b/clang/test/OpenMP/master_taskloop_simd_lastprivate_codegen.cpp @@ -71,7 +71,7 @@ // LAMBDA: ret #pragma omp master taskloop simd lastprivate(g, sivar) for (int i = 0; i < 10; ++i) { - // LAMBDA: define {{.+}} void [[INNER_LAMBDA:@.+]](%{{.+}}* [[ARG_PTR:%.+]]) + // LAMBDA: define {{.+}} void [[INNER_LAMBDA:@.+]](%{{.+}}* frozen [[ARG_PTR:%.+]]) // LAMBDA: store %{{.+}}* [[ARG_PTR]], %{{.+}}** [[ARG_PTR_REF:%.+]], // LAMBDA: [[ARG_PTR:%.+]] = load %{{.+}}*, %{{.+}}** [[ARG_PTR_REF]] // LAMBDA: [[G_PTR_REF:%.+]] = getelementptr inbounds %{{.+}}, %{{.+}}* [[ARG_PTR]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 @@ -79,7 +79,7 @@ // LAMBDA: store double 2.0{{.+}}, double* [[G_REF]] // LAMBDA: store double* %{{.+}}, double** %{{.+}}, - // LAMBDA: define internal i32 [[TASK_ENTRY]](i32 %0, %{{.+}}* noalias %1) + // LAMBDA: define internal frozen i32 [[TASK_ENTRY]](i32 frozen %0, %{{.+}}* frozen noalias %1) g = 1; sivar = 11; // LAMBDA: store double 1.0{{.+}}, double* %{{.+}}, @@ -122,7 +122,7 @@ // BLOCKS: store double* %{{.+}}, double** %{{.+}}, // BLOCKS: store i{{[0-9]+}}* %{{.+}}, i{{[0-9]+}}** %{{.+}}, - // BLOCKS: define internal i32 [[TASK_ENTRY]](i32 %0, %{{.+}}* noalias %1) + // BLOCKS: define internal frozen i32 [[TASK_ENTRY]](i32 frozen %0, %{{.+}}* frozen noalias %1) g = 1; sivar = 11; // BLOCKS: store double 1.0{{.+}}, double* %{{.+}}, @@ -161,7 +161,7 @@ } // CHECK: [[SIVAR:.+]] = internal global i{{[0-9]+}} 0, -// CHECK: define i{{[0-9]+}} @main() +// CHECK: define frozen i{{[0-9]+}} @main() // CHECK: alloca [[S_DOUBLE_TY]], // CHECK: [[TEST:%.+]] = alloca [[S_DOUBLE_TY]], // CHECK: [[T_VAR_ADDR:%.+]] = alloca i32, @@ -170,7 +170,7 @@ // CHECK: [[VAR_ADDR:%.+]] = alloca [[S_DOUBLE_TY]], // CHECK: [[GTID:%.+]] = call i32 @__kmpc_global_thread_num([[LOC:%.+]]) -// CHECK: call {{.*}} [[S_DOUBLE_TY_CONSTR:@.+]]([[S_DOUBLE_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_DOUBLE_TY_CONSTR:@.+]]([[S_DOUBLE_TY]]* frozen [[TEST]]) // Store original variables in capture struct. // CHECK: [[VEC_REF:%.+]] = getelementptr inbounds [[CAP_MAIN_TY]], [[CAP_MAIN_TY]]* %{{.+}}, i{{[0-9]+}} 0, i{{[0-9]+}} 0 @@ -206,14 +206,14 @@ // Constructors for s_arr and var. // s_arr; // CHECK: [[PRIVATE_S_ARR_REF:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 -// CHECK: call {{.*}} [[S_DOUBLE_TY_CONSTR]]([[S_DOUBLE_TY]]* [[S_ARR_CUR:%[^,]+]]) +// CHECK: call {{.*}} [[S_DOUBLE_TY_CONSTR]]([[S_DOUBLE_TY]]* frozen [[S_ARR_CUR:%[^,]+]]) // CHECK: getelementptr inbounds [[S_DOUBLE_TY]], [[S_DOUBLE_TY]]* [[S_ARR_CUR]], i{{.+}} 1 // CHECK: icmp eq // CHECK: br i1 // var; // CHECK: [[PRIVATE_VAR_REF:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 1 -// CHECK: call {{.*}} [[S_DOUBLE_TY_CONSTR]]([[S_DOUBLE_TY]]* [[PRIVATE_VAR_REF]]) +// CHECK: call {{.*}} [[S_DOUBLE_TY_CONSTR]]([[S_DOUBLE_TY]]* frozen [[PRIVATE_VAR_REF]]) // t_var; // vec; @@ -227,7 +227,7 @@ // Start task. // CHECK: call void @__kmpc_taskloop([[LOC]], i32 [[GTID]], i8* [[RES]], i32 1, i64* %{{.+}}, i64* %{{.+}}, i64 %{{.+}}, i32 1, i32 0, i64 0, i8* bitcast (void ([[KMP_TASK_MAIN_TY]]*, [[KMP_TASK_MAIN_TY]]*, i32)* [[MAIN_DUP:@.+]] to i8*)) -// CHECK: = call i{{.+}} [[TMAIN_INT:@.+]]() +// CHECK: = call frozen i{{.+}} [[TMAIN_INT:@.+]]() // No destructors must be called for private copies of s_arr and var. // CHECK-NOT: getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 2 @@ -238,7 +238,7 @@ // CHECK: ret // -// CHECK: define internal void [[PRIVATES_MAP_FN:@.+]]([[PRIVATES_MAIN_TY]]* noalias %0, [[S_DOUBLE_TY]]** noalias %1, i32** noalias %2, [2 x [[S_DOUBLE_TY]]]** noalias %3, [2 x i32]** noalias %4, i32** noalias %5) +// CHECK: define internal void [[PRIVATES_MAP_FN:@.+]]([[PRIVATES_MAIN_TY]]* frozen noalias %0, [[S_DOUBLE_TY]]** frozen noalias %1, i32** frozen noalias %2, [2 x [[S_DOUBLE_TY]]]** frozen noalias %3, [2 x i32]** frozen noalias %4, i32** frozen noalias %5) // CHECK: [[PRIVATES:%.+]] = load [[PRIVATES_MAIN_TY]]*, [[PRIVATES_MAIN_TY]]** // CHECK: [[PRIV_S_VAR:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i32 0, i32 0 // CHECK: [[ARG3:%.+]] = load [2 x [[S_DOUBLE_TY]]]**, [2 x [[S_DOUBLE_TY]]]*** %{{.+}}, @@ -257,7 +257,7 @@ // CHECK: store i{{[0-9]+}}* [[PRIV_SIVAR]], i{{[0-9]+}}** [[ARG5]], // CHECK: ret void -// CHECK: define internal i32 [[TASK_ENTRY]](i32 %0, [[KMP_TASK_MAIN_TY]]* noalias %1) +// CHECK: define internal frozen i32 [[TASK_ENTRY]](i32 frozen %0, [[KMP_TASK_MAIN_TY]]* frozen noalias %1) // CHECK: [[PRIV_VAR_ADDR:%.+]] = alloca [[S_DOUBLE_TY]]*, // CHECK: [[PRIV_T_VAR_ADDR:%.+]] = alloca i32*, @@ -303,7 +303,7 @@ // CHECK: br label // CHECK: ret -// CHECK: define internal void [[MAIN_DUP]]([[KMP_TASK_MAIN_TY]]* %0, [[KMP_TASK_MAIN_TY]]* %1, i32 %2) +// CHECK: define internal void [[MAIN_DUP]]([[KMP_TASK_MAIN_TY]]* frozen %0, [[KMP_TASK_MAIN_TY]]* frozen %1, i32 frozen %2) // CHECK: getelementptr inbounds [[KMP_TASK_MAIN_TY]], [[KMP_TASK_MAIN_TY]]* %{{.+}}, i32 0, i32 0 // CHECK: getelementptr inbounds [[KMP_TASK_T_TY]], [[KMP_TASK_T_TY]]* %{{.+}}, i32 0, i32 8 // CHECK: load i32, i32* % @@ -324,15 +324,15 @@ // CHECK: call {{.*}} [[S_DOUBLE_TY_CONSTR]]([[S_DOUBLE_TY]]* // CHECK: ret void -// CHECK: define internal i32 [[DESTRUCTORS]](i32 %0, [[KMP_TASK_MAIN_TY]]* noalias %1) +// CHECK: define internal frozen i32 [[DESTRUCTORS]](i32 frozen %0, [[KMP_TASK_MAIN_TY]]* frozen noalias %1) // CHECK: [[PRIVATES:%.+]] = getelementptr inbounds [[KMP_TASK_MAIN_TY]], [[KMP_TASK_MAIN_TY]]* [[RES_KMP_TASK:%.+]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 // CHECK: [[PRIVATE_S_ARR_REF:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 0 // CHECK: [[PRIVATE_VAR_REF:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 1 -// CHECK: call {{.*}} [[S_DOUBLE_TY_DESTR]]([[S_DOUBLE_TY]]* [[PRIVATE_VAR_REF]]) +// CHECK: call {{.*}} [[S_DOUBLE_TY_DESTR]]([[S_DOUBLE_TY]]* frozen [[PRIVATE_VAR_REF]]) // CHECK: getelementptr inbounds [2 x [[S_DOUBLE_TY]]], [2 x [[S_DOUBLE_TY]]]* [[PRIVATE_S_ARR_REF]], i{{.+}} 0, i{{.+}} 0 // CHECK: getelementptr inbounds [[S_DOUBLE_TY]], [[S_DOUBLE_TY]]* %{{.+}}, i{{.+}} 2 // CHECK: [[PRIVATE_S_ARR_ELEM_REF:%.+]] = getelementptr inbounds [[S_DOUBLE_TY]], [[S_DOUBLE_TY]]* %{{.+}}, i{{.+}} -1 -// CHECK: call {{.*}} [[S_DOUBLE_TY_DESTR]]([[S_DOUBLE_TY]]* [[PRIVATE_S_ARR_ELEM_REF]]) +// CHECK: call {{.*}} [[S_DOUBLE_TY_DESTR]]([[S_DOUBLE_TY]]* frozen [[PRIVATE_S_ARR_ELEM_REF]]) // CHECK: icmp eq // CHECK: br i1 // CHECK: ret i32 @@ -346,7 +346,7 @@ // CHECK: [[VAR_ADDR:%.+]] = alloca [[S_INT_TY]], // CHECK: [[GTID:%.+]] = call i32 @__kmpc_global_thread_num([[LOC:%.+]]) -// CHECK: call {{.*}} [[S_INT_TY_CONSTR:@.+]]([[S_INT_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_INT_TY_CONSTR:@.+]]([[S_INT_TY]]* frozen [[TEST]]) // Store original variables in capture struct. // CHECK: [[VEC_REF:%.+]] = getelementptr inbounds [[CAP_TMAIN_TY]], [[CAP_TMAIN_TY]]* %{{.+}}, i{{[0-9]+}} 0, i{{[0-9]+}} 0 @@ -384,14 +384,14 @@ // CHECK: [[PRIVATE_S_ARR_REF:%.+]] = getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i{{[0-9]+}} 0, i{{[0-9]+}} 2 // CHECK: getelementptr inbounds [2 x [[S_INT_TY]]], [2 x [[S_INT_TY]]]* [[PRIVATE_S_ARR_REF]], i{{.+}} 0, i{{.+}} 0 // CHECK: getelementptr inbounds [[S_INT_TY]], [[S_INT_TY]]* %{{.+}}, i{{.+}} 2 -// CHECK: call {{.*}} [[S_INT_TY_CONSTR]]([[S_INT_TY]]* [[S_ARR_CUR:%[^,]+]]) +// CHECK: call {{.*}} [[S_INT_TY_CONSTR]]([[S_INT_TY]]* frozen [[S_ARR_CUR:%[^,]+]]) // CHECK: getelementptr inbounds [[S_INT_TY]], [[S_INT_TY]]* [[S_ARR_CUR]], i{{.+}} 1 // CHECK: icmp eq // CHECK: br i1 // var; // CHECK: [[PRIVATE_VAR_REF:%.+]] = getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 3 -// CHECK: call {{.*}} [[S_INT_TY_CONSTR]]([[S_INT_TY]]* [[PRIVATE_VAR_REF]]) +// CHECK: call {{.*}} [[S_INT_TY_CONSTR]]([[S_INT_TY]]* frozen [[PRIVATE_VAR_REF]]) // Provide pointer to destructor function, which will destroy private variables at the end of the task. // CHECK: [[DESTRUCTORS_REF:%.+]] = getelementptr inbounds [[KMP_TASK_T_TY]], [[KMP_TASK_T_TY]]* [[TASK]], i{{.+}} 0, i{{.+}} 3 @@ -410,7 +410,7 @@ // CHECK: ret // -// CHECK: define internal void [[PRIVATES_MAP_FN:@.+]]([[PRIVATES_TMAIN_TY]]* noalias %0, i32** noalias %1, [2 x i32]** noalias %2, [2 x [[S_INT_TY]]]** noalias %3, [[S_INT_TY]]** noalias %4) +// CHECK: define internal void [[PRIVATES_MAP_FN:@.+]]([[PRIVATES_TMAIN_TY]]* frozen noalias %0, i32** frozen noalias %1, [2 x i32]** frozen noalias %2, [2 x [[S_INT_TY]]]** frozen noalias %3, [[S_INT_TY]]** frozen noalias %4) // CHECK: [[PRIVATES:%.+]] = load [[PRIVATES_TMAIN_TY]]*, [[PRIVATES_TMAIN_TY]]** // CHECK: [[PRIV_T_VAR:%.+]] = getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i32 0, i32 0 // CHECK: [[ARG1:%.+]] = load i32**, i32*** %{{.+}}, @@ -426,7 +426,7 @@ // CHECK: store [[S_INT_TY]]* [[PRIV_VAR]], [[S_INT_TY]]** [[ARG4]], // CHECK: ret void -// CHECK: define internal i32 [[TASK_ENTRY]](i32 %0, [[KMP_TASK_TMAIN_TY]]* noalias %1) +// CHECK: define internal frozen i32 [[TASK_ENTRY]](i32 frozen %0, [[KMP_TASK_TMAIN_TY]]* frozen noalias %1) // CHECK: alloca i32*, // CHECK-DAG: [[PRIV_T_VAR_ADDR:%.+]] = alloca i32*, // CHECK-DAG: [[PRIV_VEC_ADDR:%.+]] = alloca [2 x i32]*, @@ -465,7 +465,7 @@ // CHECK: br label // CHECK: ret -// CHECK: define internal void [[TMAIN_DUP]]([[KMP_TASK_TMAIN_TY]]* %0, [[KMP_TASK_TMAIN_TY]]* %1, i32 %2) +// CHECK: define internal void [[TMAIN_DUP]]([[KMP_TASK_TMAIN_TY]]* frozen %0, [[KMP_TASK_TMAIN_TY]]* frozen %1, i32 frozen %2) // CHECK: getelementptr inbounds [[KMP_TASK_TMAIN_TY]], [[KMP_TASK_TMAIN_TY]]* %{{.+}}, i32 0, i32 0 // CHECK: getelementptr inbounds [[KMP_TASK_T_TY]], [[KMP_TASK_T_TY]]* %{{.+}}, i32 0, i32 8 // CHECK: load i32, i32* % @@ -486,15 +486,15 @@ // CHECK: call {{.*}} [[S_INT_TY_CONSTR]]([[S_INT_TY]]* // CHECK: ret void -// CHECK: define internal i32 [[DESTRUCTORS]](i32 %0, [[KMP_TASK_TMAIN_TY]]* noalias %1) +// CHECK: define internal frozen i32 [[DESTRUCTORS]](i32 frozen %0, [[KMP_TASK_TMAIN_TY]]* frozen noalias %1) // CHECK: [[PRIVATES:%.+]] = getelementptr inbounds [[KMP_TASK_TMAIN_TY]], [[KMP_TASK_TMAIN_TY]]* [[RES_KMP_TASK:%.+]], i{{[0-9]+}} 0, i{{[0-9]+}} 2 // CHECK: [[PRIVATE_S_ARR_REF:%.+]] = getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 2 // CHECK: [[PRIVATE_VAR_REF:%.+]] = getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 3 -// CHECK: call void [[S_INT_TY_DESTR]]([[S_INT_TY]]* [[PRIVATE_VAR_REF]]) +// CHECK: call void [[S_INT_TY_DESTR]]([[S_INT_TY]]* frozen [[PRIVATE_VAR_REF]]) // CHECK: getelementptr inbounds [2 x [[S_INT_TY]]], [2 x [[S_INT_TY]]]* [[PRIVATE_S_ARR_REF]], i{{.+}} 0, i{{.+}} 0 // CHECK: getelementptr inbounds [[S_INT_TY]], [[S_INT_TY]]* %{{.+}}, i{{.+}} 2 // CHECK: [[PRIVATE_S_ARR_ELEM_REF:%.+]] = getelementptr inbounds [[S_INT_TY]], [[S_INT_TY]]* %{{.+}}, i{{.+}} -1 -// CHECK: call void [[S_INT_TY_DESTR]]([[S_INT_TY]]* [[PRIVATE_S_ARR_ELEM_REF]]) +// CHECK: call void [[S_INT_TY_DESTR]]([[S_INT_TY]]* frozen [[PRIVATE_S_ARR_ELEM_REF]]) // CHECK: icmp eq // CHECK: br i1 // CHECK: ret i32 diff --git a/clang/test/OpenMP/master_taskloop_simd_loop_messages.cpp b/clang/test/OpenMP/master_taskloop_simd_loop_messages.cpp --- a/clang/test/OpenMP/master_taskloop_simd_loop_messages.cpp +++ b/clang/test/OpenMP/master_taskloop_simd_loop_messages.cpp @@ -176,7 +176,7 @@ c[ii] = a[ii]; #pragma omp parallel -// Ok but undefined behavior (in general, cannot check that incr +// Ok but undefined behavior (in frozen general, cannot check incr that // is really loop-invariant). #pragma omp master taskloop simd for (ii = 0; ii < 10; ii = ii + ii) diff --git a/clang/test/OpenMP/master_taskloop_simd_private_codegen.cpp b/clang/test/OpenMP/master_taskloop_simd_private_codegen.cpp --- a/clang/test/OpenMP/master_taskloop_simd_private_codegen.cpp +++ b/clang/test/OpenMP/master_taskloop_simd_private_codegen.cpp @@ -67,7 +67,7 @@ // LAMBDA: ret #pragma omp master taskloop simd private(g, sivar) for (int i = 0; i < 10; ++i) { - // LAMBDA: define {{.+}} void [[INNER_LAMBDA:@.+]](%{{.+}}* [[ARG_PTR:%.+]]) + // LAMBDA: define {{.+}} void [[INNER_LAMBDA:@.+]](%{{.+}}* frozen [[ARG_PTR:%.+]]) // LAMBDA: store %{{.+}}* [[ARG_PTR]], %{{.+}}** [[ARG_PTR_REF:%.+]], // LAMBDA: [[ARG_PTR:%.+]] = load %{{.+}}*, %{{.+}}** [[ARG_PTR_REF]] // LAMBDA: [[G_PTR_REF:%.+]] = getelementptr inbounds %{{.+}}, %{{.+}}* [[ARG_PTR]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 @@ -77,7 +77,7 @@ // LAMBDA: [[SIVAR_REF:%.+]] = load i{{[0-9]+}}*, i{{[0-9]+}}** [[SIVAR_PTR_REF]] // LAMBDA: store i{{[0-9]+}} 3, i{{[0-9]+}}* [[SIVAR_REF]] - // LAMBDA: define internal i32 [[TASK_ENTRY]](i32 %0, %{{.+}}* noalias %1) + // LAMBDA: define internal frozen i32 [[TASK_ENTRY]](i32 frozen %0, %{{.+}}* frozen noalias %1) g = 1; sivar = 2; // LAMBDA: store double 1.0{{.+}}, double* %{{.+}}, @@ -112,7 +112,7 @@ // BLOCKS-NOT: [[SIVAR]]{{[[^:word:]]}} // BLOCKS: ret - // BLOCKS: define internal i32 [[TASK_ENTRY]](i32 %0, %{{.+}}* noalias %1) + // BLOCKS: define internal frozen i32 [[TASK_ENTRY]](i32 frozen %0, %{{.+}}* frozen noalias %1) g = 1; sivar = 3; // BLOCKS: store double 1.0{{.+}}, double* %{{.+}}, @@ -145,7 +145,7 @@ #endif } -// CHECK: define i{{[0-9]+}} @main() +// CHECK: define frozen i{{[0-9]+}} @main() // CHECK: [[TEST:%.+]] = alloca [[S_DOUBLE_TY]], // CHECK: [[T_VAR_ADDR:%.+]] = alloca i32, // CHECK: [[VEC_ADDR:%.+]] = alloca [2 x i32], @@ -153,7 +153,7 @@ // CHECK: [[VAR_ADDR:%.+]] = alloca [[S_DOUBLE_TY]], // CHECK: [[GTID:%.+]] = call i32 @__kmpc_global_thread_num([[LOC:%.+]]) -// CHECK: call {{.*}} [[S_DOUBLE_TY_DEF_CONSTR:@.+]]([[S_DOUBLE_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_DOUBLE_TY_DEF_CONSTR:@.+]]([[S_DOUBLE_TY]]* frozen [[TEST]]) // Do not store original variables in capture struct. // CHECK-NOT: getelementptr inbounds [[CAP_MAIN_TY]], @@ -176,14 +176,14 @@ // CHECK: [[PRIVATE_S_ARR_REF:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 // CHECK: getelementptr inbounds [2 x [[S_DOUBLE_TY]]], [2 x [[S_DOUBLE_TY]]]* [[PRIVATE_S_ARR_REF]], i{{.+}} 0, i{{.+}} 0 // CHECK: getelementptr inbounds [[S_DOUBLE_TY]], [[S_DOUBLE_TY]]* %{{.+}}, i{{.+}} 2 -// CHECK: call void [[S_DOUBLE_TY_DEF_CONSTR]]([[S_DOUBLE_TY]]* [[S_ARR_CUR:%.+]]) +// CHECK: call void [[S_DOUBLE_TY_DEF_CONSTR]]([[S_DOUBLE_TY]]* frozen [[S_ARR_CUR:%.+]]) // CHECK: getelementptr inbounds [[S_DOUBLE_TY]], [[S_DOUBLE_TY]]* [[S_ARR_CUR]], i{{.+}} 1 // CHECK: icmp eq // CHECK: br i1 // var; // CHECK: [[PRIVATE_VAR_REF:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 1 -// CHECK: call void [[S_DOUBLE_TY_DEF_CONSTR]]([[S_DOUBLE_TY]]* [[PRIVATE_VAR_REF:%.+]]) +// CHECK: call void [[S_DOUBLE_TY_DEF_CONSTR]]([[S_DOUBLE_TY]]* frozen [[PRIVATE_VAR_REF:%.+]]) // Provide pointer to destructor function, which will destroy private variables at the end of the task. // CHECK: [[DESTRUCTORS_REF:%.+]] = getelementptr inbounds [[KMP_TASK_T_TY]], [[KMP_TASK_T_TY]]* [[TASK]], i{{.+}} 0, i{{.+}} 3 @@ -194,7 +194,7 @@ // CHECK: call void @__kmpc_taskloop([[LOC]], i32 [[GTID]], i8* [[RES]], i32 1, i64* %{{.+}}, i64* %{{.+}}, i64 %{{.+}}, i32 1, i32 0, i64 0, i8* bitcast (void ([[KMP_TASK_MAIN_TY]]*, [[KMP_TASK_MAIN_TY]]*, i32)* [[MAIN_DUP:@.+]] to i8*)) // CHECK: call i32 @__kmpc_omp_task([[LOC]], i32 [[GTID]], i8* -// CHECK: = call i{{.+}} [[TMAIN_INT:@.+]]() +// CHECK: = call frozen i{{.+}} [[TMAIN_INT:@.+]]() // No destructors must be called for private copies of s_arr and var. // CHECK-NOT: getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 2 @@ -205,7 +205,7 @@ // CHECK: ret // -// CHECK: define internal void [[PRIVATES_MAP_FN:@.+]]([[PRIVATES_MAIN_TY]]* noalias %0, [[S_DOUBLE_TY]]** noalias %1, i32** noalias %2, [2 x [[S_DOUBLE_TY]]]** noalias %3, [2 x i32]** noalias %4, i32** noalias %5) +// CHECK: define internal void [[PRIVATES_MAP_FN:@.+]]([[PRIVATES_MAIN_TY]]* frozen noalias %0, [[S_DOUBLE_TY]]** frozen noalias %1, i32** frozen noalias %2, [2 x [[S_DOUBLE_TY]]]** frozen noalias %3, [2 x i32]** frozen noalias %4, i32** frozen noalias %5) // CHECK: [[PRIVATES:%.+]] = load [[PRIVATES_MAIN_TY]]*, [[PRIVATES_MAIN_TY]]** // CHECK: [[PRIV_S_VAR:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i32 0, i32 0 // CHECK: [[ARG3:%.+]] = load [2 x [[S_DOUBLE_TY]]]**, [2 x [[S_DOUBLE_TY]]]*** %{{.+}}, @@ -221,7 +221,7 @@ // CHECK: store [2 x i32]* [[PRIV_VEC]], [2 x i32]** [[ARG4]], // CHECK: ret void -// CHECK: define internal i32 [[TASK_ENTRY]](i32 %0, [[KMP_TASK_MAIN_TY]]* noalias %1) +// CHECK: define internal frozen i32 [[TASK_ENTRY]](i32 frozen %0, [[KMP_TASK_MAIN_TY]]* frozen noalias %1) // CHECK: [[PRIV_VAR_ADDR:%.+]] = alloca [[S_DOUBLE_TY]]*, // CHECK: [[PRIV_T_VAR_ADDR:%.+]] = alloca i32*, @@ -246,7 +246,7 @@ // CHECK: ret -// CHECK: define internal void [[MAIN_DUP]]([[KMP_TASK_MAIN_TY]]* %0, [[KMP_TASK_MAIN_TY]]* %1, i32 %2) +// CHECK: define internal void [[MAIN_DUP]]([[KMP_TASK_MAIN_TY]]* frozen %0, [[KMP_TASK_MAIN_TY]]* frozen %1, i32 frozen %2) // CHECK: getelementptr inbounds [[KMP_TASK_MAIN_TY]], [[KMP_TASK_MAIN_TY]]* %{{.+}}, i32 0, i32 1 // CHECK: getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* %{{.+}}, i32 0, i32 0 // CHECK: getelementptr inbounds [2 x [[S_DOUBLE_TY]]], [2 x [[S_DOUBLE_TY]]]* %{{.+}}, i32 0, i32 0 @@ -263,15 +263,15 @@ // CHECK: call {{.*}} [[S_DOUBLE_TY_DEF_CONSTR]]([[S_DOUBLE_TY]]* // CHECK: ret void -// CHECK: define internal i32 [[DESTRUCTORS]](i32 %0, [[KMP_TASK_MAIN_TY]]* noalias %1) +// CHECK: define internal frozen i32 [[DESTRUCTORS]](i32 frozen %0, [[KMP_TASK_MAIN_TY]]* frozen noalias %1) // CHECK: [[PRIVATES:%.+]] = getelementptr inbounds [[KMP_TASK_MAIN_TY]], [[KMP_TASK_MAIN_TY]]* [[RES_KMP_TASK:%.+]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 // CHECK: [[PRIVATE_S_ARR_REF:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 0 // CHECK: [[PRIVATE_VAR_REF:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 1 -// CHECK: call void [[S_DOUBLE_TY_DESTR]]([[S_DOUBLE_TY]]* [[PRIVATE_VAR_REF]]) +// CHECK: call void [[S_DOUBLE_TY_DESTR]]([[S_DOUBLE_TY]]* frozen [[PRIVATE_VAR_REF]]) // CHECK: getelementptr inbounds [2 x [[S_DOUBLE_TY]]], [2 x [[S_DOUBLE_TY]]]* [[PRIVATE_S_ARR_REF]], i{{.+}} 0, i{{.+}} 0 // CHECK: getelementptr inbounds [[S_DOUBLE_TY]], [[S_DOUBLE_TY]]* %{{.+}}, i{{.+}} 2 // CHECK: [[PRIVATE_S_ARR_ELEM_REF:%.+]] = getelementptr inbounds [[S_DOUBLE_TY]], [[S_DOUBLE_TY]]* %{{.+}}, i{{.+}} -1 -// CHECK: call void [[S_DOUBLE_TY_DESTR]]([[S_DOUBLE_TY]]* [[PRIVATE_S_ARR_ELEM_REF]]) +// CHECK: call void [[S_DOUBLE_TY_DESTR]]([[S_DOUBLE_TY]]* frozen [[PRIVATE_S_ARR_ELEM_REF]]) // CHECK: icmp eq // CHECK: br i1 // CHECK: ret i32 @@ -284,7 +284,7 @@ // CHECK: [[VAR_ADDR:%.+]] = alloca [[S_INT_TY]], // CHECK: [[GTID:%.+]] = call i32 @__kmpc_global_thread_num([[LOC:%.+]]) -// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR:@.+]]([[S_INT_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR:@.+]]([[S_INT_TY]]* frozen [[TEST]]) // Do not store original variables in capture struct. // CHECK-NOT: getelementptr inbounds [[CAP_TMAIN_TY]], @@ -307,14 +307,14 @@ // CHECK: [[PRIVATE_S_ARR_REF:%.+]] = getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i{{[0-9]+}} 0, i{{[0-9]+}} 2 // CHECK: getelementptr inbounds [2 x [[S_INT_TY]]], [2 x [[S_INT_TY]]]* [[PRIVATE_S_ARR_REF]], i{{.+}} 0, i{{.+}} 0 // CHECK: getelementptr inbounds [[S_INT_TY]], [[S_INT_TY]]* %{{.+}}, i{{.+}} 2 -// CHECK: call void [[S_INT_TY_DEF_CONSTR]]([[S_INT_TY]]* [[S_ARR_CUR:%.+]]) +// CHECK: call void [[S_INT_TY_DEF_CONSTR]]([[S_INT_TY]]* frozen [[S_ARR_CUR:%.+]]) // CHECK: getelementptr inbounds [[S_INT_TY]], [[S_INT_TY]]* [[S_ARR_CUR]], i{{.+}} 1 // CHECK: icmp eq // CHECK: br i1 // var; // CHECK: [[PRIVATE_VAR_REF:%.+]] = getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 3 -// CHECK: call void [[S_INT_TY_DEF_CONSTR]]([[S_INT_TY]]* [[PRIVATE_VAR_REF:%.+]]) +// CHECK: call void [[S_INT_TY_DEF_CONSTR]]([[S_INT_TY]]* frozen [[PRIVATE_VAR_REF:%.+]]) // Provide pointer to destructor function, which will destroy private variables at the end of the task. // CHECK: [[DESTRUCTORS_REF:%.+]] = getelementptr inbounds [[KMP_TASK_T_TY]], [[KMP_TASK_T_TY]]* [[TASK]], i{{.+}} 0, i{{.+}} 3 @@ -333,7 +333,7 @@ // CHECK: ret // -// CHECK: define internal void [[PRIVATES_MAP_FN:@.+]]([[PRIVATES_TMAIN_TY]]* noalias %0, i32** noalias %1, [2 x i32]** noalias %2, [2 x [[S_INT_TY]]]** noalias %3, [[S_INT_TY]]** noalias %4) +// CHECK: define internal void [[PRIVATES_MAP_FN:@.+]]([[PRIVATES_TMAIN_TY]]* frozen noalias %0, i32** frozen noalias %1, [2 x i32]** frozen noalias %2, [2 x [[S_INT_TY]]]** frozen noalias %3, [[S_INT_TY]]** frozen noalias %4) // CHECK: [[PRIVATES:%.+]] = load [[PRIVATES_TMAIN_TY]]*, [[PRIVATES_TMAIN_TY]]** // CHECK: [[PRIV_T_VAR:%.+]] = getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i32 0, i32 0 // CHECK: [[ARG1:%.+]] = load i32**, i32*** %{{.+}}, @@ -349,7 +349,7 @@ // CHECK: store [[S_INT_TY]]* [[PRIV_VAR]], [[S_INT_TY]]** [[ARG4]], // CHECK: ret void -// CHECK: define internal i32 [[TASK_ENTRY]](i32 %0, [[KMP_TASK_TMAIN_TY]]* noalias %1) +// CHECK: define internal frozen i32 [[TASK_ENTRY]](i32 frozen %0, [[KMP_TASK_TMAIN_TY]]* frozen noalias %1) // CHECK: alloca i32*, // CHECK-DAG: [[PRIV_T_VAR_ADDR:%.+]] = alloca i32*, @@ -372,7 +372,7 @@ // CHECK: ret -// CHECK: define internal void [[TMAIN_DUP]]([[KMP_TASK_TMAIN_TY]]* %0, [[KMP_TASK_TMAIN_TY]]* %1, i32 %2) +// CHECK: define internal void [[TMAIN_DUP]]([[KMP_TASK_TMAIN_TY]]* frozen %0, [[KMP_TASK_TMAIN_TY]]* frozen %1, i32 frozen %2) // CHECK: getelementptr inbounds [[KMP_TASK_TMAIN_TY]], [[KMP_TASK_TMAIN_TY]]* %{{.+}}, i32 0, i32 2 // CHECK: getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* %{{.+}}, i32 0, i32 2 // CHECK: getelementptr inbounds [2 x [[S_INT_TY]]], [2 x [[S_INT_TY]]]* %{{.+}}, i32 0, i32 0 @@ -389,15 +389,15 @@ // CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR]]([[S_INT_TY]]* // CHECK: ret void -// CHECK: define internal i32 [[DESTRUCTORS]](i32 %0, [[KMP_TASK_TMAIN_TY]]* noalias %1) +// CHECK: define internal frozen i32 [[DESTRUCTORS]](i32 frozen %0, [[KMP_TASK_TMAIN_TY]]* frozen noalias %1) // CHECK: [[PRIVATES:%.+]] = getelementptr inbounds [[KMP_TASK_TMAIN_TY]], [[KMP_TASK_TMAIN_TY]]* [[RES_KMP_TASK:%.+]], i{{[0-9]+}} 0, i{{[0-9]+}} 2 // CHECK: [[PRIVATE_S_ARR_REF:%.+]] = getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 2 // CHECK: [[PRIVATE_VAR_REF:%.+]] = getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 3 -// CHECK: call void [[S_INT_TY_DESTR]]([[S_INT_TY]]* [[PRIVATE_VAR_REF]]) +// CHECK: call void [[S_INT_TY_DESTR]]([[S_INT_TY]]* frozen [[PRIVATE_VAR_REF]]) // CHECK: getelementptr inbounds [2 x [[S_INT_TY]]], [2 x [[S_INT_TY]]]* [[PRIVATE_S_ARR_REF]], i{{.+}} 0, i{{.+}} 0 // CHECK: getelementptr inbounds [[S_INT_TY]], [[S_INT_TY]]* %{{.+}}, i{{.+}} 2 // CHECK: [[PRIVATE_S_ARR_ELEM_REF:%.+]] = getelementptr inbounds [[S_INT_TY]], [[S_INT_TY]]* %{{.+}}, i{{.+}} -1 -// CHECK: call void [[S_INT_TY_DESTR]]([[S_INT_TY]]* [[PRIVATE_S_ARR_ELEM_REF]]) +// CHECK: call void [[S_INT_TY_DESTR]]([[S_INT_TY]]* frozen [[PRIVATE_S_ARR_ELEM_REF]]) // CHECK: icmp eq // CHECK: br i1 // CHECK: ret i32 diff --git a/clang/test/OpenMP/master_taskloop_simd_reduction_codegen.cpp b/clang/test/OpenMP/master_taskloop_simd_reduction_codegen.cpp --- a/clang/test/OpenMP/master_taskloop_simd_reduction_codegen.cpp +++ b/clang/test/OpenMP/master_taskloop_simd_reduction_codegen.cpp @@ -165,51 +165,51 @@ // CHECK: ret i32 -// CHECK: define internal void @[[RED_INIT1]](i8* noalias %{{.+}}, i8* noalias %{{.+}}) +// CHECK: define internal void @[[RED_INIT1]](i8* frozen noalias %{{.+}}, i8* frozen noalias %{{.+}}) // CHECK: store float 0.000000e+00, float* % // CHECK: ret void -// CHECK: define internal void @[[RED_COMB1]](i8* %0, i8* %1) +// CHECK: define internal void @[[RED_COMB1]](i8* frozen %0, i8* frozen %1) // CHECK: fadd float % // CHECK: store float %{{.+}}, float* % // CHECK: ret void -// CHECK: define internal void @[[RED_INIT2]](i8* noalias %{{.+}}, i8* noalias %{{.+}}) +// CHECK: define internal void @[[RED_INIT2]](i8* frozen noalias %{{.+}}, i8* frozen noalias %{{.+}}) // CHECK: call i8* @__kmpc_threadprivate_cached( // CHECK: call void [[OMP_INIT1:@.+]]( // CHECK: ret void -// CHECK: define internal void [[OMP_COMB1:@.+]](%struct.S* noalias %0, %struct.S* noalias %1) +// CHECK: define internal void [[OMP_COMB1:@.+]](%struct.S* frozen noalias %0, %struct.S* frozen noalias %1) // CHECK: fadd float % -// CHECK: define internal void [[OMP_INIT1]](%struct.S* noalias %0, %struct.S* noalias %1) +// CHECK: define internal void [[OMP_INIT1]](%struct.S* frozen noalias %0, %struct.S* frozen noalias %1) // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64( -// CHECK: define internal void @[[RED_FINI2]](i8* %0) +// CHECK: define internal void @[[RED_FINI2]](i8* frozen %0) // CHECK: call i8* @__kmpc_threadprivate_cached( // CHECK: call void @ // CHECK: ret void -// CHECK: define internal void @[[RED_COMB2]](i8* %0, i8* %1) +// CHECK: define internal void @[[RED_COMB2]](i8* frozen %0, i8* frozen %1) // CHECK: call i8* @__kmpc_threadprivate_cached( // CHECK: call void [[OMP_COMB1]]( // CHECK: ret void -// CHECK: define internal void @[[RED_INIT3]](i8* noalias %{{.+}}, i8* noalias %{{.+}}) +// CHECK: define internal void @[[RED_INIT3]](i8* frozen noalias %{{.+}}, i8* frozen noalias %{{.+}}) // CHECK: store float 0.000000e+00, float* % // CHECK: ret void -// CHECK: define internal void @[[RED_COMB3]](i8* %0, i8* %1) +// CHECK: define internal void @[[RED_COMB3]](i8* frozen %0, i8* frozen %1) // CHECK: fadd float % // CHECK: store float %{{.+}}, float* % // CHECK: ret void -// CHECK: define internal void @[[RED_INIT4]](i8* noalias %{{.+}}, i8* noalias %{{.+}}) +// CHECK: define internal void @[[RED_INIT4]](i8* frozen noalias %{{.+}}, i8* frozen noalias %{{.+}}) // CHECK: call i8* @__kmpc_threadprivate_cached( // CHECK: store float 0.000000e+00, float* % // CHECK: ret void -// CHECK: define internal void @[[RED_COMB4]](i8* %0, i8* %1) +// CHECK: define internal void @[[RED_COMB4]](i8* frozen %0, i8* frozen %1) // CHECK: call i8* @__kmpc_threadprivate_cached( // CHECK: fadd float % // CHECK: store float %{{.+}}, float* % diff --git a/clang/test/OpenMP/nvptx_allocate_codegen.cpp b/clang/test/OpenMP/nvptx_allocate_codegen.cpp --- a/clang/test/OpenMP/nvptx_allocate_codegen.cpp +++ b/clang/test/OpenMP/nvptx_allocate_codegen.cpp @@ -88,7 +88,7 @@ double bar_b; int bar_c; #pragma omp allocate(bar_c) allocator(omp_cgroup_mem_alloc) - // CHECK: call void [[OUTLINED:@.+]](i32* %{{.+}}, i32* %{{.+}}) + // CHECK: call void [[OUTLINED:@.+]](i32* frozen %{{.+}}, i32* frozen %{{.+}}) #pragma omp parallel private(bar_a, bar_b) allocate(omp_thread_mem_alloc \ : bar_a) allocate(omp_pteam_mem_alloc \ : bar_b) @@ -96,7 +96,7 @@ bar_b = bar_a; baz(bar_a); } -// CHECK: define internal void [[OUTLINED]](i32* noalias %{{.+}}, i32* noalias %{{.+}}) +// CHECK: define internal void [[OUTLINED]](i32* frozen noalias %{{.+}}, i32* frozen noalias %{{.+}}) // CHECK-NOT: alloca double, // CHECK: alloca float, // CHECK-NOT: alloca double, diff --git a/clang/test/OpenMP/nvptx_data_sharing.cpp b/clang/test/OpenMP/nvptx_data_sharing.cpp --- a/clang/test/OpenMP/nvptx_data_sharing.cpp +++ b/clang/test/OpenMP/nvptx_data_sharing.cpp @@ -88,11 +88,11 @@ // CK1: [[SHARGSTMP14:%.+]] = getelementptr inbounds i8*, i8** [[SHARGSTMP13]], i64 0 // CK1: [[SHARGSTMP15:%.+]] = bitcast i8** [[SHARGSTMP14]] to i32** // CK1: [[SHARGSTMP16:%.+]] = load i32*, i32** [[SHARGSTMP15]] -// CK1: call void @__omp_outlined__{{.*}}({{.*}}, i32* [[SHARGSTMP16]]) +// CK1: call void @__omp_outlined__{{.*}}({{.*}}, i32* frozen [[SHARGSTMP16]]) /// outlined function for the second parallel region /// -// CK1: define internal void @{{.+}}(i32* noalias %{{.+}}, i32* noalias %{{.+}}, i32* nonnull align {{[0-9]+}} dereferenceable{{.+}}, i32* nonnull align {{[0-9]+}} dereferenceable{{.+}}) +// CK1: define internal void @{{.+}}(i32* frozen noalias %{{.+}}, i32* frozen noalias %{{.+}}, i32* frozen nonnull align {{[0-9]+}} dereferenceable{{.+}}, i32* frozen nonnull align {{[0-9]+}} dereferenceable{{.+}}) // CK1-NOT: call i8* @__kmpc_data_sharing_push_stack( // CK1: [[C_ADDR:%.+]] = alloca i32, // CK1: store i32* [[C_ADDR]], i32** % @@ -110,7 +110,7 @@ // CK1: [[SHARGSTMP9:%.+]] = getelementptr inbounds i8*, i8** [[SHARGSTMP5]], i64 1 // CK1: [[SHARGSTMP10:%.+]] = bitcast i8** [[SHARGSTMP9]] to i32** // CK1: [[SHARGSTMP11:%.+]] = load i32*, i32** [[SHARGSTMP10]] -// CK1: call void @__omp_outlined__{{.*}}({{.*}}, i32* [[SHARGSTMP8]], i32* [[SHARGSTMP11]]) +// CK1: call void @__omp_outlined__{{.*}}({{.*}}, i32* frozen [[SHARGSTMP8]], i32* frozen [[SHARGSTMP11]]) #endif diff --git a/clang/test/OpenMP/nvptx_declare_target_var_ctor_dtor_codegen.cpp b/clang/test/OpenMP/nvptx_declare_target_var_ctor_dtor_codegen.cpp --- a/clang/test/OpenMP/nvptx_declare_target_var_ctor_dtor_codegen.cpp +++ b/clang/test/OpenMP/nvptx_declare_target_var_ctor_dtor_codegen.cpp @@ -34,20 +34,20 @@ #pragma omp declare target (bar) int caz() { return 0; } -// DEVICE-DAG: define{{ hidden | }}i32 [[FOO:@.*foo.*]]() -// DEVICE-DAG: define{{ hidden | }}i32 [[BAR:@.*bar.*]]() -// DEVICE-DAG: define{{ hidden | }}i32 [[BAZ:@.*baz.*]]() -// DEVICE-DAG: define{{ hidden | }}i32 [[DOO:@.*doo.*]]() -// DEVICE-DAG: define{{ hidden | }}i32 [[CAR:@.*car.*]]() -// DEVICE-DAG: define{{ hidden | }}i32 [[CAZ:@.*caz.*]]() +// DEVICE-DAG: define{{ hidden | }}frozen i32 [[FOO:@.*foo.*]]() +// DEVICE-DAG: define{{ hidden | }}frozen i32 [[BAR:@.*bar.*]]() +// DEVICE-DAG: define{{ hidden | }}frozen i32 [[BAZ:@.*baz.*]]() +// DEVICE-DAG: define{{ hidden | }}frozen i32 [[DOO:@.*doo.*]]() +// DEVICE-DAG: define{{ hidden | }}frozen i32 [[CAR:@.*car.*]]() +// DEVICE-DAG: define{{ hidden | }}frozen i32 [[CAZ:@.*caz.*]]() static int c = foo() + bar() + baz(); #pragma omp declare target (c) // HOST-DAG: @[[C_CTOR:__omp_offloading__.+_c_l44_ctor]] = private constant i8 0 // DEVICE-DAG: define internal void [[C_CTOR:@__omp_offloading__.+_c_l44_ctor]]() -// DEVICE-DAG: call i32 [[FOO]]() -// DEVICE-DAG: call i32 [[BAR]]() -// DEVICE-DAG: call i32 [[BAZ]]() +// DEVICE-DAG: call frozen i32 [[FOO]]() +// DEVICE-DAG: call frozen i32 [[BAR]]() +// DEVICE-DAG: call frozen i32 [[BAZ]]() // DEVICE-DAG: ret void struct S { @@ -62,9 +62,9 @@ #pragma omp end declare target // HOST-DAG: @[[CD_CTOR:__omp_offloading__.+_cd_l61_ctor]] = private constant i8 0 // DEVICE-DAG: define internal void [[CD_CTOR:@__omp_offloading__.+_cd_l61_ctor]]() -// DEVICE-DAG: call i32 [[DOO]]() -// DEVICE-DAG: call i32 [[CAR]]() -// DEVICE-DAG: call i32 [[CAZ]]() +// DEVICE-DAG: call frozen i32 [[DOO]]() +// DEVICE-DAG: call frozen i32 [[CAR]]() +// DEVICE-DAG: call frozen i32 [[CAZ]]() // DEVICE-DAG: ret void // HOST-DAG: @[[CD_DTOR:__omp_offloading__.+_cd_l61_dtor]] = private constant i8 0 @@ -91,11 +91,11 @@ return 0; } -// DEVICE: define weak void @__omp_offloading_{{.*}}_{{.*}}maini1{{.*}}_l[[@LINE-7]](i32* nonnull align {{[0-9]+}} dereferenceable{{[^,]*}} +// DEVICE: define weak void @__omp_offloading_{{.*}}_{{.*}}maini1{{.*}}_l[[@LINE-7]](i32* frozen nonnull align {{[0-9]+}} dereferenceable{{[^,]*}} // DEVICE: [[C:%.+]] = load i32, i32* [[C_ADDR]], // DEVICE: store i32 [[C]], i32* % -// HOST: define internal void @__omp_offloading_{{.*}}_{{.*}}maini1{{.*}}_l[[@LINE-11]](i32* nonnull align {{[0-9]+}} dereferenceable{{.*}}) +// HOST: define internal void @__omp_offloading_{{.*}}_{{.*}}maini1{{.*}}_l[[@LINE-11]](i32* frozen nonnull align {{[0-9]+}} dereferenceable{{.*}}) // HOST: [[C:%.*]] = load i32, i32* @[[C_ADDR]], // HOST: store i32 [[C]], i32* % diff --git a/clang/test/OpenMP/nvptx_declare_variant_name_mangling.cpp b/clang/test/OpenMP/nvptx_declare_variant_name_mangling.cpp --- a/clang/test/OpenMP/nvptx_declare_variant_name_mangling.cpp +++ b/clang/test/OpenMP/nvptx_declare_variant_name_mangling.cpp @@ -8,8 +8,8 @@ // CHECK-DAG: @_Z3bazv // CHECK-DAG: @"_Z54bar$ompvariant$S2$s8$Pnvptx$Pnvptx64$S3$s10$Pmatch_anyv" // CHECK-DAG: @"_Z54baz$ompvariant$S2$s8$Pnvptx$Pnvptx64$S3$s10$Pmatch_anyv" -// CHECK-DAG: call i32 @"_Z54bar$ompvariant$S2$s8$Pnvptx$Pnvptx64$S3$s10$Pmatch_anyv"() -// CHECK-DAG: call i32 @"_Z54baz$ompvariant$S2$s8$Pnvptx$Pnvptx64$S3$s10$Pmatch_anyv"() +// CHECK-DAG: call frozen i32 @"_Z54bar$ompvariant$S2$s8$Pnvptx$Pnvptx64$S3$s10$Pmatch_anyv"() +// CHECK-DAG: call frozen i32 @"_Z54baz$ompvariant$S2$s8$Pnvptx$Pnvptx64$S3$s10$Pmatch_anyv"() #ifndef HEADER #define HEADER diff --git a/clang/test/OpenMP/nvptx_distribute_parallel_generic_mode_codegen.cpp b/clang/test/OpenMP/nvptx_distribute_parallel_generic_mode_codegen.cpp --- a/clang/test/OpenMP/nvptx_distribute_parallel_generic_mode_codegen.cpp +++ b/clang/test/OpenMP/nvptx_distribute_parallel_generic_mode_codegen.cpp @@ -28,7 +28,7 @@ // CHECK-DAG: [[KERNEL_SHARED:@.+]] = internal unnamed_addr constant i16 1 // CHECK-DAG: @__omp_offloading_{{.*}}_main_l17_exec_mode = weak constant i8 0 -// CHECK: define weak void @__omp_offloading_{{.*}}_main_l17([10 x i32]* nonnull align 4 dereferenceable(40) %{{.+}}, [10 x i32]* nonnull align 4 dereferenceable(40) %{{.+}}, i32* nonnull align 4 dereferenceable(4) %{{.+}}, i{{64|32}} %{{.+}}, [10 x i32]* nonnull align 4 dereferenceable(40) %{{.+}}) +// CHECK: define weak void @__omp_offloading_{{.*}}_main_l17([10 x i32]* frozen nonnull align 4 dereferenceable(40) %{{.+}}, [10 x i32]* frozen nonnull align 4 dereferenceable(40) %{{.+}}, i32* frozen nonnull align 4 dereferenceable(4) %{{.+}}, i{{64|32}} frozen %{{.+}}, [10 x i32]* frozen nonnull align 4 dereferenceable(40) %{{.+}}) // CHECK: [[SHARED:%.+]] = load i16, i16* [[KERNEL_SHARED]], // CHECK: [[SIZE:%.+]] = load i{{64|32}}, i{{64|32}}* [[KERNEL_SIZE]], // CHECK: call void @__kmpc_get_team_static_memory(i16 1, i8* addrspacecast (i8 addrspace(3)* getelementptr inbounds ([[MEM_TY]], [[MEM_TY]] addrspace(3)* [[SHARED_GLOBAL_RD]], i32 0, i32 0, i32 0) to i8*), i{{64|32}} [[SIZE]], i16 [[SHARED]], i8** addrspacecast (i8* addrspace(3)* [[KERNEL_PTR]] to i8**)) diff --git a/clang/test/OpenMP/nvptx_lambda_capturing.cpp b/clang/test/OpenMP/nvptx_lambda_capturing.cpp --- a/clang/test/OpenMP/nvptx_lambda_capturing.cpp +++ b/clang/test/OpenMP/nvptx_lambda_capturing.cpp @@ -1,12 +1,12 @@ // REQUIRES: powerpc-registered-target // REQUIRES: nvptx-registered-target -// RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm %s -o - | FileCheck %s --check-prefix HOST -// RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm-bc %s -o %t-ppc-host.bc -// RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple nvptx64-nvidia-cuda -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s --check-prefixes=CLASS,FUN,CHECK -// RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple nvptx64-nvidia-cuda -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -emit-pch -o %t -// RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple nvptx64-nvidia-cuda -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -include-pch %t -o - | FileCheck %s --check-prefixes=CLASS,CHECK -// RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple nvptx64-nvidia-cuda -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -include-pch %t -o - | FileCheck %s --check-prefixes=FUN,CHECK +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm %s -o - | FileCheck %s --check-prefix HOST +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm-bc %s -o %t-ppc-host.bc +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -x c++ -std=c++11 -triple nvptx64-nvidia-cuda -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s --check-prefixes=CLASS,FUN,CHECK +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -x c++ -std=c++11 -triple nvptx64-nvidia-cuda -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -emit-pch -o %t +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -x c++ -std=c++11 -triple nvptx64-nvidia-cuda -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -include-pch %t -o - | FileCheck %s --check-prefixes=CLASS,CHECK +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -x c++ -std=c++11 -triple nvptx64-nvidia-cuda -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -include-pch %t -o - | FileCheck %s --check-prefixes=FUN,CHECK // expected-no-diagnostics #ifndef HEADER @@ -40,7 +40,7 @@ // CLASS: [[THIS_REF:%.+]] = getelementptr inbounds [[CAP1]], [[CAP1]]* [[L]], i32 0, i32 0 // CLASS: store [[S]]* [[S_:%.+]], [[S]]** [[THIS_REF]], // CLASS: [[L:%.+]] = load [[CAP1]]*, [[CAP1]]** [[L_ADDR]], -// CLASS: call i32 [[LAMBDA1:@.+foo.+]]([[CAP1]]* [[L]]) +// CLASS: call frozen i32 [[LAMBDA1:@.+foo.+]]([[CAP1]]* [[L]]) // CLASS: ret void // CLASS: define weak void @__omp_offloading_{{.+}}foo{{.+}}_l69([[S]]* %{{.+}}, [[CAP1]]* nonnull align 8 dereferenceable(8) %{{.+}}) @@ -50,7 +50,7 @@ // CLASS: [[THIS_REF:%.+]] = getelementptr inbounds [[CAP1]], [[CAP1]]* [[L]], i32 0, i32 0 // CLASS: store [[S]]* %{{.+}}, [[S]]** [[THIS_REF]], // CLASS: [[L:%.+]] = load [[CAP1]]*, [[CAP1]]** [[L_ADDR]], -// CLASS: call i32 [[LAMBDA1]]([[CAP1]]* [[L]]) +// CLASS: call frozen i32 [[LAMBDA1]]([[CAP1]]* [[L]]) // CLASS: ret void template @@ -94,7 +94,7 @@ // FUN: [[A_CAP:%.+]] = getelementptr inbounds [[CAP2]], [[CAP2]]* [[L]], i32 0, i32 4 // FUN: store i32* %{{.+}}, i32** [[A_CAP]], // FUN: [[L:%.+]] = load [[CAP2]]*, [[CAP2]]** [[L_ADDR]], -// FUN: call i64 [[LAMBDA2:@.+main.+]]([[CAP2]]* [[L]]) +// FUN: call frozen i64 [[LAMBDA2:@.+main.+]]([[CAP2]]* [[L]]) // FUN: ret void // FUN: define weak void @__omp_offloading_{{.+}}_main_l126(i32* nonnull align 4 dereferenceable(4) %{{.+}}, i32* nonnull align 4 dereferenceable(4) %{{.+}} i32* nonnull align 4 dereferenceable(4) %{{.+}}, i32* %{{.+}}, i32* nonnull align 4 dereferenceable(4) %{{.+}}, [[CAP2]]* nonnull align 8 dereferenceable(40) %{{.+}}) @@ -112,7 +112,7 @@ // FUN: [[A_CAP:%.+]] = getelementptr inbounds [[CAP2]], [[CAP2]]* [[L]], i32 0, i32 4 // FUN: store i32* %{{.+}}, i32** [[A_CAP]], // FUN: [[L:%.+]] = load [[CAP2]]*, [[CAP2]]** [[L_ADDR]], -// FUN: call i64 [[LAMBDA2]]([[CAP2]]* [[L]]) +// FUN: call frozen i64 [[LAMBDA2]]([[CAP2]]* [[L]]) // FUN: ret void int main(int argc, char **argv) { diff --git a/clang/test/OpenMP/nvptx_parallel_codegen.cpp b/clang/test/OpenMP/nvptx_parallel_codegen.cpp --- a/clang/test/OpenMP/nvptx_parallel_codegen.cpp +++ b/clang/test/OpenMP/nvptx_parallel_codegen.cpp @@ -341,7 +341,7 @@ // CHECK: [[IS_SHARED:%.+]] = load i16, i16* [[KERNEL_SHARED]], // CHECK: call void @__kmpc_restore_team_static_memory(i16 0, i16 [[IS_SHARED]]) -// CHECK-LABEL: define internal void @{{.+}}(i32* noalias %{{.+}}, i32* noalias %{{.+}}, i32* nonnull align {{[0-9]+}} dereferenceable{{.*}}) +// CHECK-LABEL: define internal void @{{.+}}(i32* frozen noalias %{{.+}}, i32* frozen noalias %{{.+}}, i32* frozen nonnull align {{[0-9]+}} dereferenceable{{.*}}) // CHECK: [[CC:%.+]] = alloca i32, // CHECK: [[MASK:%.+]] = call i32 @__kmpc_warp_active_thread_mask(){{$}} // CHECK: [[TID:%.+]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x() diff --git a/clang/test/OpenMP/nvptx_target_codegen.cpp b/clang/test/OpenMP/nvptx_target_codegen.cpp --- a/clang/test/OpenMP/nvptx_target_codegen.cpp +++ b/clang/test/OpenMP/nvptx_target_codegen.cpp @@ -1,9 +1,9 @@ // Test target codegen - host bc file has to be created first. -// RUN: %clang_cc1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm-bc %s -o %t-ppc-host.bc -// RUN: %clang_cc1 -verify -fopenmp -x c++ -triple nvptx64-unknown-unknown -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - -disable-llvm-optzns | FileCheck %s --check-prefix CHECK --check-prefix CHECK-64 -// RUN: %clang_cc1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=nvptx-nvidia-cuda -emit-llvm-bc %s -o %t-x86-host.bc -// RUN: %clang_cc1 -verify -fopenmp -x c++ -triple nvptx-unknown-unknown -fopenmp-targets=nvptx-nvidia-cuda -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - -disable-llvm-optzns | FileCheck %s --check-prefix CHECK --check-prefix CHECK-32 -// RUN: %clang_cc1 -verify -fopenmp -fexceptions -fcxx-exceptions -x c++ -triple nvptx-unknown-unknown -fopenmp-targets=nvptx-nvidia-cuda -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - -disable-llvm-optzns | FileCheck %s --check-prefix CHECK --check-prefix CHECK-32 +// RUN: %clang_cc1 -disable-frozen-args -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm-bc %s -o %t-ppc-host.bc +// RUN: %clang_cc1 -disable-frozen-args -verify -fopenmp -x c++ -triple nvptx64-unknown-unknown -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - -disable-llvm-optzns | FileCheck %s --check-prefix CHECK --check-prefix CHECK-64 +// RUN: %clang_cc1 -disable-frozen-args -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=nvptx-nvidia-cuda -emit-llvm-bc %s -o %t-x86-host.bc +// RUN: %clang_cc1 -disable-frozen-args -verify -fopenmp -x c++ -triple nvptx-unknown-unknown -fopenmp-targets=nvptx-nvidia-cuda -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - -disable-llvm-optzns | FileCheck %s --check-prefix CHECK --check-prefix CHECK-32 +// RUN: %clang_cc1 -disable-frozen-args -verify -fopenmp -fexceptions -fcxx-exceptions -x c++ -triple nvptx-unknown-unknown -fopenmp-targets=nvptx-nvidia-cuda -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - -disable-llvm-optzns | FileCheck %s --check-prefix CHECK --check-prefix CHECK-32 // expected-no-diagnostics #ifndef HEADER @@ -562,7 +562,7 @@ // CHECK-64-DAG:load i32, i32* [[REF_B]] // CHECK-32-DAG:load i32, i32* [[LOCAL_B]] // CHECK-DAG: getelementptr inbounds i16, i16* [[REF_C]], i[[SZ]] %{{.+}} - // CHECK: call i32 [[BAZ:@.*baz.*]](i32 % + // CHECK: call frozen i32 [[BAZ:@.*baz.*]](i32 % // CHECK: br label {{%?}}[[TERMINATE:.+]] // // CHECK: [[TERMINATE]] @@ -573,7 +573,7 @@ // CHECK: [[EXIT]] // CHECK: ret void - // CHECK: define{{ hidden | }}i32 [[BAZ]](i32 [[F:%.*]], double* nonnull align {{[0-9]+}} dereferenceable{{.*}}) + // CHECK: define{{ hidden | }}frozen i32 [[BAZ]](i32 [[F:%.*]], double* nonnull align {{[0-9]+}} dereferenceable{{.*}}) // CHECK: alloca i32, // CHECK: [[LOCAL_F_PTR:%.+]] = alloca i32, // CHECK: [[ZERO_ADDR:%.+]] = alloca i32, diff --git a/clang/test/OpenMP/nvptx_target_firstprivate_codegen.cpp b/clang/test/OpenMP/nvptx_target_firstprivate_codegen.cpp --- a/clang/test/OpenMP/nvptx_target_firstprivate_codegen.cpp +++ b/clang/test/OpenMP/nvptx_target_firstprivate_codegen.cpp @@ -33,7 +33,7 @@ b[a] += e.X; } - // TCHECK: define {{.*}}void @__omp_offloading_{{.+}}([10 x float] addrspace(1)* noalias [[B_IN:%.+]], i{{[0-9]+}} [[A_IN:%.+]], [[TTII]]* noalias [[E_IN:%.+]]) + // TCHECK: define {{.*}}void @__omp_offloading_{{.+}}([10 x float] addrspace(1)* frozen noalias [[B_IN:%.+]], i{{[0-9]+}} frozen [[A_IN:%.+]], [[TTII]]* frozen noalias [[E_IN:%.+]]) // TCHECK-NOT: alloca [[TTII]], // TCHECK: [[A_ADDR:%.+]] = alloca i{{[0-9]+}}, // TCHECK-NOT: alloca [[TTII]], @@ -97,7 +97,7 @@ ptr[0]++; } - // TCHECK: define weak void @__omp_offloading_{{.+}}(double* [[PTR_IN:%.+]]) + // TCHECK: define weak void @__omp_offloading_{{.+}}(double* frozen [[PTR_IN:%.+]]) // TCHECK: [[PTR_ADDR:%.+]] = alloca double*, // TCHECK-NOT: alloca double*, // TCHECK: store double* [[PTR_IN]], double** [[PTR_ADDR]], @@ -175,7 +175,7 @@ return (int)b; } - // TCHECK: define internal void @__omp_offloading_{{.+}}([[S1]]* [[TH:%.+]], i{{[0-9]+}} [[B_IN:%.+]]) + // TCHECK: define internal void @__omp_offloading_{{.+}}([[S1]]* frozen [[TH:%.+]], i{{[0-9]+}} frozen [[B_IN:%.+]]) // TCHECK: [[TH_ADDR:%.+]] = alloca [[S1]]*, // TCHECK: [[B_ADDR:%.+]] = alloca i{{[0-9]+}}, // TCHECK-NOT: alloca i{{[0-9]+}}, @@ -204,7 +204,7 @@ // template -// TCHECK: define internal void @__omp_offloading_{{.+}}(i{{[0-9]+}} [[A_IN:%.+]], [10 x i{{[0-9]+}}]*{{.+}} [[B_IN:%.+]]) +// TCHECK: define internal void @__omp_offloading_{{.+}}(i{{[0-9]+}} frozen [[A_IN:%.+]], [10 x i{{[0-9]+}}]*{{.+}} [[B_IN:%.+]]) // TCHECK: [[A_ADDR:%.+]] = alloca i{{[0-9]+}}, // TCHECK: [[B_ADDR:%.+]] = alloca [10 x i{{[0-9]+}}]*, // TCHECK-NOT: alloca i{{[0-9]+}}, diff --git a/clang/test/OpenMP/nvptx_target_parallel_codegen.cpp b/clang/test/OpenMP/nvptx_target_parallel_codegen.cpp --- a/clang/test/OpenMP/nvptx_target_parallel_codegen.cpp +++ b/clang/test/OpenMP/nvptx_target_parallel_codegen.cpp @@ -64,7 +64,7 @@ // CHECK: br label {{%?}}[[EXEC:.+]] // // CHECK: [[EXEC]] - // CHECK: {{call|invoke}} void [[OP1:@.+]]({{.+}}, {{.+}}, i16* [[AA]]) + // CHECK: {{call|invoke}} void [[OP1:@.+]]({{.+}}, {{.+}}, i16* frozen [[AA]]) // CHECK: br label {{%?}}[[DONE:.+]] // // CHECK: [[DONE]] @@ -75,7 +75,7 @@ // CHECK: ret void // CHECK: } - // CHECK: define internal void [[OP1]](i32* noalias %.global_tid., i32* noalias %.bound_tid., i16* {{[^%]*}}[[ARG:%.+]]) + // CHECK: define internal void [[OP1]](i32* frozen noalias %.global_tid., i32* frozen noalias %.bound_tid., i16* {{[^%]*}}[[ARG:%.+]]) // CHECK: = alloca i32*, align // CHECK: = alloca i32*, align // CHECK: [[AA_ADDR:%.+]] = alloca i16*, align @@ -107,7 +107,7 @@ // CHECK: br label {{%?}}[[EXEC:.+]] // // CHECK: [[EXEC]] - // CHECK: {{call|invoke}} void [[OP2:@.+]]({{.+}}, {{.+}}, i32* [[A]], i16* [[AA]], [10 x i32]* [[B]]) + // CHECK: {{call|invoke}} void [[OP2:@.+]]({{.+}}, {{.+}}, i32* frozen [[A]], i16* frozen [[AA]], [10 x i32]* frozen [[B]]) // CHECK: br label {{%?}}[[DONE:.+]] // // CHECK: [[DONE]] @@ -118,7 +118,7 @@ // CHECK: ret void // CHECK: } - // CHECK: define internal void [[OP2]](i32* noalias %.global_tid., i32* noalias %.bound_tid., i32* {{[^%]*}}[[ARG1:%.+]], i16* {{[^%]*}}[[ARG2:%.+]], [10 x i32]* {{[^%]*}}[[ARG3:%.+]]) + // CHECK: define internal void [[OP2]](i32* frozen noalias %.global_tid., i32* frozen noalias %.bound_tid., i32* {{[^%]*}}[[ARG1:%.+]], i16* {{[^%]*}}[[ARG2:%.+]], [10 x i32]* {{[^%]*}}[[ARG3:%.+]]) // CHECK: = alloca i32*, align // CHECK: = alloca i32*, align // CHECK: [[A_ADDR:%.+]] = alloca i32*, align diff --git a/clang/test/OpenMP/nvptx_target_parallel_num_threads_codegen.cpp b/clang/test/OpenMP/nvptx_target_parallel_num_threads_codegen.cpp --- a/clang/test/OpenMP/nvptx_target_parallel_num_threads_codegen.cpp +++ b/clang/test/OpenMP/nvptx_target_parallel_num_threads_codegen.cpp @@ -50,12 +50,12 @@ // CHECK: call void @__kmpc_data_sharing_init_stack_spmd() // CHECK: [[GTID:%.+]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @{{.+}}) // CHECK: store i32 [[GTID]], i32* [[THREADID:%.+]], - // CHECK: call void [[OUTLINED:@.+]](i32* [[THREADID]], i32* %{{.+}}, i16* [[AA]]) + // CHECK: call void [[OUTLINED:@.+]](i32* frozen [[THREADID]], i32* frozen %{{.+}}, i16* frozen [[AA]]) // CHECK: call void @__kmpc_spmd_kernel_deinit_v2(i16 1) // CHECK: ret void // CHECK: } - // CHECK: define internal void [[OUTLINED]](i32* noalias %{{.+}}, i32* noalias %{{.+}}, i16* {{[^%]*}}[[ARG:%.+]]) + // CHECK: define internal void [[OUTLINED]](i32* frozen noalias %{{.+}}, i32* frozen noalias %{{.+}}, i16* {{[^%]*}}[[ARG:%.+]]) // CHECK: = alloca i32*, align // CHECK: = alloca i32*, align // CHECK: [[AA_ADDR:%.+]] = alloca i16*, align @@ -81,12 +81,12 @@ // CHECK: call void @__kmpc_data_sharing_init_stack_spmd() // CHECK: [[GTID:%.+]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @{{.+}}) // CHECK: store i32 [[GTID]], i32* [[THREADID:%.+]], - // CHECK: call void [[OUTLINED:@.+]](i32* [[THREADID]], i32* %{{.+}}, i32* [[A]], i16* [[AA]], [10 x i32]* [[B]]) + // CHECK: call void [[OUTLINED:@.+]](i32* frozen [[THREADID]], i32* frozen %{{.+}}, i32* frozen [[A]], i16* frozen [[AA]], [10 x i32]* frozen [[B]]) // CHECK: call void @__kmpc_spmd_kernel_deinit_v2(i16 1) // CHECK: ret void // CHECK: } - // CHECK: define internal void [[OUTLINED]](i32* noalias %{{.+}}, i32* noalias %{{.+}}, i32* {{[^%]*}}[[ARG1:%.+]], i16* {{[^%]*}}[[ARG2:%.+]], [10 x i32]* {{[^%]*}}[[ARG3:%.+]]) + // CHECK: define internal void [[OUTLINED]](i32* frozen noalias %{{.+}}, i32* frozen noalias %{{.+}}, i32* {{[^%]*}}[[ARG1:%.+]], i16* {{[^%]*}}[[ARG2:%.+]], [10 x i32]* {{[^%]*}}[[ARG3:%.+]]) // CHECK: = alloca i32*, align // CHECK: = alloca i32*, align // CHECK: [[A_ADDR:%.+]] = alloca i32*, align diff --git a/clang/test/OpenMP/nvptx_target_parallel_reduction_codegen.cpp b/clang/test/OpenMP/nvptx_target_parallel_reduction_codegen.cpp --- a/clang/test/OpenMP/nvptx_target_parallel_reduction_codegen.cpp +++ b/clang/test/OpenMP/nvptx_target_parallel_reduction_codegen.cpp @@ -87,7 +87,7 @@ // // Reduction function - // CHECK: define internal void [[REDUCTION_FUNC:@.+]](i8* %0, i8* %1) + // CHECK: define internal void [[REDUCTION_FUNC:@.+]](i8* frozen %0, i8* frozen %1) // CHECK: [[VAR_RHS_REF:%.+]] = getelementptr inbounds [[RLT]], [[RLT]]* [[RED_LIST_RHS:%.+]], i{{32|64}} 0, i{{32|64}} 0 // CHECK: [[VAR_RHS_VOID:%.+]] = load i8*, i8** [[VAR_RHS_REF]], // CHECK: [[VAR_RHS:%.+]] = bitcast i8* [[VAR_RHS_VOID]] to double* @@ -104,7 +104,7 @@ // // Shuffle and reduce function - // CHECK: define internal void [[SHUFFLE_REDUCE_FN]](i8* %0, i16 {{.*}}, i16 {{.*}}, i16 {{.*}}) + // CHECK: define internal void [[SHUFFLE_REDUCE_FN]](i8* frozen %0, i16 {{.*}}, i16 {{.*}}, i16 {{.*}}) // CHECK: [[REMOTE_RED_LIST:%.+]] = alloca [[RLT]], align // CHECK: [[REMOTE_ELT:%.+]] = alloca double // @@ -149,7 +149,7 @@ // CHECK: [[DO_REDUCE]] // CHECK: [[RED_LIST1_VOID:%.+]] = bitcast [[RLT]]* [[RED_LIST]] to i8* // CHECK: [[RED_LIST2_VOID:%.+]] = bitcast [[RLT]]* [[REMOTE_RED_LIST]] to i8* - // CHECK: call void [[REDUCTION_FUNC]](i8* [[RED_LIST1_VOID]], i8* [[RED_LIST2_VOID]]) + // CHECK: call void [[REDUCTION_FUNC]](i8* frozen [[RED_LIST1_VOID]], i8* frozen [[RED_LIST2_VOID]]) // CHECK: br label {{%?}}[[REDUCE_CONT:.+]] // // CHECK: [[REDUCE_ELSE]] @@ -181,7 +181,7 @@ // // Inter warp copy function - // CHECK: define internal void [[WARP_COPY_FN]](i8* %0, i32 %1) + // CHECK: define internal void [[WARP_COPY_FN]](i8* frozen %0, i32 frozen %1) // CHECK-DAG: [[LANEID:%.+]] = and i32 {{.+}}, 31 // CHECK-DAG: [[WARPID:%.+]] = ashr i32 {{.+}}, 5 // CHECK-DAG: [[RED_LIST:%.+]] = bitcast i8* {{.+}} to [[RLT]]* @@ -293,7 +293,7 @@ // // Reduction function - // CHECK: define internal void [[REDUCTION_FUNC:@.+]](i8* %0, i8* %1) + // CHECK: define internal void [[REDUCTION_FUNC:@.+]](i8* frozen %0, i8* frozen %1) // CHECK: [[VAR1_RHS_REF:%.+]] = getelementptr inbounds [[RLT]], [[RLT]]* [[RED_LIST_RHS:%.+]], i{{32|64}} 0, i{{32|64}} 0 // CHECK: [[VAR1_RHS:%.+]] = load i8*, i8** [[VAR1_RHS_REF]], // @@ -324,7 +324,7 @@ // // Shuffle and reduce function - // CHECK: define internal void [[SHUFFLE_REDUCE_FN]](i8* %0, i16 {{.*}}, i16 {{.*}}, i16 {{.*}}) + // CHECK: define internal void [[SHUFFLE_REDUCE_FN]](i8* frozen %0, i16 {{.*}}, i16 {{.*}}, i16 {{.*}}) // CHECK: [[REMOTE_RED_LIST:%.+]] = alloca [[RLT]], align // CHECK: [[REMOTE_ELT1:%.+]] = alloca i8 // CHECK: [[REMOTE_ELT2:%.+]] = alloca float @@ -384,7 +384,7 @@ // CHECK: [[DO_REDUCE]] // CHECK: [[RED_LIST1_VOID:%.+]] = bitcast [[RLT]]* [[RED_LIST]] to i8* // CHECK: [[RED_LIST2_VOID:%.+]] = bitcast [[RLT]]* [[REMOTE_RED_LIST]] to i8* - // CHECK: call void [[REDUCTION_FUNC]](i8* [[RED_LIST1_VOID]], i8* [[RED_LIST2_VOID]]) + // CHECK: call void [[REDUCTION_FUNC]](i8* frozen [[RED_LIST1_VOID]], i8* frozen [[RED_LIST2_VOID]]) // CHECK: br label {{%?}}[[REDUCE_CONT:.+]] // // CHECK: [[REDUCE_ELSE]] @@ -423,7 +423,7 @@ // // Inter warp copy function - // CHECK: define internal void [[WARP_COPY_FN]](i8* %0, i32 %1) + // CHECK: define internal void [[WARP_COPY_FN]](i8* frozen %0, i32 frozen %1) // CHECK-DAG: [[LANEID:%.+]] = and i32 {{.+}}, 31 // CHECK-DAG: [[WARPID:%.+]] = ashr i32 {{.+}}, 5 // CHECK-DAG: [[RED_LIST:%.+]] = bitcast i8* {{.+}} to [[RLT]]* @@ -590,7 +590,7 @@ // // Reduction function - // CHECK: define internal void [[REDUCTION_FUNC:@.+]](i8* %0, i8* %1) + // CHECK: define internal void [[REDUCTION_FUNC:@.+]](i8* frozen %0, i8* frozen %1) // CHECK: [[VAR1_RHS_REF:%.+]] = getelementptr inbounds [[RLT]], [[RLT]]* [[RED_LIST_RHS:%.+]], i{{32|64}} 0, i{{32|64}} 0 // CHECK: [[VAR1_RHS_VOID:%.+]] = load i8*, i8** [[VAR1_RHS_REF]], // CHECK: [[VAR1_RHS:%.+]] = bitcast i8* [[VAR1_RHS_VOID]] to i32* @@ -635,7 +635,7 @@ // // Shuffle and reduce function - // CHECK: define internal void [[SHUFFLE_REDUCE_FN]](i8* %0, i16 {{.*}}, i16 {{.*}}, i16 {{.*}}) + // CHECK: define internal void [[SHUFFLE_REDUCE_FN]](i8* frozen %0, i16 {{.*}}, i16 {{.*}}, i16 {{.*}}) // CHECK: [[REMOTE_RED_LIST:%.+]] = alloca [[RLT]], align // CHECK: [[REMOTE_ELT1:%.+]] = alloca i32 // CHECK: [[REMOTE_ELT2:%.+]] = alloca i16 @@ -695,7 +695,7 @@ // CHECK: [[DO_REDUCE]] // CHECK: [[RED_LIST1_VOID:%.+]] = bitcast [[RLT]]* [[RED_LIST]] to i8* // CHECK: [[RED_LIST2_VOID:%.+]] = bitcast [[RLT]]* [[REMOTE_RED_LIST]] to i8* - // CHECK: call void [[REDUCTION_FUNC]](i8* [[RED_LIST1_VOID]], i8* [[RED_LIST2_VOID]]) + // CHECK: call void [[REDUCTION_FUNC]](i8* frozen [[RED_LIST1_VOID]], i8* frozen [[RED_LIST2_VOID]]) // CHECK: br label {{%?}}[[REDUCE_CONT:.+]] // // CHECK: [[REDUCE_ELSE]] @@ -736,7 +736,7 @@ // // Inter warp copy function - // CHECK: define internal void [[WARP_COPY_FN]](i8* %0, i32 %1) + // CHECK: define internal void [[WARP_COPY_FN]](i8* frozen %0, i32 frozen %1) // CHECK-DAG: [[LANEID:%.+]] = and i32 {{.+}}, 31 // CHECK-DAG: [[WARPID:%.+]] = ashr i32 {{.+}}, 5 // CHECK-DAG: [[RED_LIST:%.+]] = bitcast i8* {{.+}} to [[RLT]]* diff --git a/clang/test/OpenMP/nvptx_target_teams_codegen.cpp b/clang/test/OpenMP/nvptx_target_teams_codegen.cpp --- a/clang/test/OpenMP/nvptx_target_teams_codegen.cpp +++ b/clang/test/OpenMP/nvptx_target_teams_codegen.cpp @@ -94,7 +94,7 @@ // CHECK: [[EXIT]] // CHECK: ret void - // CHECK: define {{.*}}void [[T1:@__omp_offloading_.+template.+l27]](i[[SZ:32|64]] [[A:%[^)]+]]) + // CHECK: define {{.*}}void [[T1:@__omp_offloading_.+template.+l27]](i[[SZ:32|64]] frozen [[A:%[^)]+]]) // CHECK: store i[[SZ]] [[A]], i[[SZ]]* [[A_ADDR:%.+]], align // CHECK: [[CONV:%.+]] = bitcast i[[SZ]]* [[A_ADDR]] to i8* @@ -127,7 +127,7 @@ // CHECK: [[ACP:%.+]] = bitcast i[[SZ]]* [[AC:%.+]] to i8* // CHECK: store i8 [[A_VAL]], i8* [[ACP]], align // CHECK: [[ACV:%.+]] = load i[[SZ]], i[[SZ]]* [[AC]], align - // CHECK: call void [[PARALLEL:@.+]](i32* %{{.+}}, i32* %{{.+}}, i[[SZ]] [[ACV]]) + // CHECK: call void [[PARALLEL:@.+]](i32* frozen %{{.+}}, i32* frozen %{{.+}}, i[[SZ]] frozen [[ACV]]) // CHECK: br label {{%?}}[[TERMINATE:.+]] // // CHECK: [[TERMINATE]] @@ -138,7 +138,7 @@ // CHECK: [[EXIT]] // CHECK: ret void - // CHECK: define internal void [[PARALLEL]](i32* noalias %{{.+}}, i32* noalias %{{.+}}, i[[SZ]] [[A_VAL:%.+]]) + // CHECK: define internal void [[PARALLEL]](i32* frozen noalias %{{.+}}, i32* frozen noalias %{{.+}}, i[[SZ]] frozen [[A_VAL:%.+]]) // CHECK: [[A_ADDR:%.+]] = alloca i[[SZ]], // CHECK: store i[[SZ]] [[A_VAL]], i[[SZ]]* [[A_ADDR]], // CHECK: [[CONV:%.+]] = bitcast i[[SZ]]* [[A_ADDR]] to i8* @@ -180,7 +180,7 @@ // CHECK: [[EXIT]] // CHECK: ret void - // CHECK: define {{.*}}void [[T2:@__omp_offloading_.+template.+l32]](i[[SZ:32|64]] [[AA:%[^)]+]]) + // CHECK: define {{.*}}void [[T2:@__omp_offloading_.+template.+l32]](i[[SZ:32|64]] frozen [[AA:%[^)]+]]) // CHECK: store i[[SZ]] [[AA]], i[[SZ]]* [[AA_ADDR:%.+]], align // CHECK: [[CONV:%.+]] = bitcast i[[SZ]]* [[AA_ADDR]] to i16* @@ -213,7 +213,7 @@ // CHECK: [[ACP:%.+]] = bitcast i[[SZ]]* [[AC:%.+]] to i16* // CHECK: store i16 [[AA_VAL]], i16* [[ACP]], align // CHECK: [[ACV:%.+]] = load i[[SZ]], i[[SZ]]* [[AC]], align - // CHECK: call void [[PARALLEL:@.+]](i32* %{{.+}}, i32* %{{.+}}, i[[SZ]] [[ACV]]) + // CHECK: call void [[PARALLEL:@.+]](i32* frozen %{{.+}}, i32* frozen %{{.+}}, i[[SZ]] frozen [[ACV]]) // CHECK: br label {{%?}}[[TERMINATE:.+]] // // CHECK: [[TERMINATE]] @@ -224,7 +224,7 @@ // CHECK: [[EXIT]] // CHECK: ret void - // CHECK: define internal void [[PARALLEL]](i32* noalias %{{.+}}, i32* noalias %{{.+}}, i[[SZ]] [[A_VAL:%.+]]) + // CHECK: define internal void [[PARALLEL]](i32* frozen noalias %{{.+}}, i32* frozen noalias %{{.+}}, i[[SZ]] frozen [[A_VAL:%.+]]) // CHECK: [[A_ADDR:%.+]] = alloca i[[SZ]], // CHECK: store i[[SZ]] [[A_VAL]], i[[SZ]]* [[A_ADDR]], // CHECK: [[CONV:%.+]] = bitcast i[[SZ]]* [[A_ADDR]] to i16* @@ -236,23 +236,23 @@ // CHECK: call void @__kmpc_data_sharing_init_stack_spmd // CHECK-NOT: call i8* @__kmpc_data_sharing_push_stack( // CHECK-NOT: call void @__kmpc_serialized_parallel( -// CHECK: call void [[L0:@.+]](i32* %{{.+}}, i32* %{{.+}}, i[[SZ]] %{{.+}}) +// CHECK: call void [[L0:@.+]](i32* frozen %{{.+}}, i32* frozen %{{.+}}, i[[SZ]] frozen %{{.+}}) // CHECK-NOT: call void @__kmpc_end_serialized_parallel( // CHECK-NOT: call void @__kmpc_data_sharing_pop_stack( // CHECK: call void @__kmpc_spmd_kernel_deinit_v2(i16 1) // CHECK: ret -// CHECK: define internal void [[L0]](i32* noalias %{{.+}}, i32* noalias %{{.+}}, i[[SZ]] %{{.+}}) -// CHECK: call void [[L1:@.+]](i32* %{{.+}}, i32* %{{.+}}, i16* %{{.+}}) +// CHECK: define internal void [[L0]](i32* frozen noalias %{{.+}}, i32* frozen noalias %{{.+}}, i[[SZ]] frozen %{{.+}}) +// CHECK: call void [[L1:@.+]](i32* frozen %{{.+}}, i32* frozen %{{.+}}, i16* frozen %{{.+}}) // CHECK: ret void -// CHECK: define internal void [[L1]](i32* noalias %{{.+}}, i32* noalias %{{.+}}, i16* nonnull align {{[0-9]+}} dereferenceable +// CHECK: define internal void [[L1]](i32* frozen noalias %{{.+}}, i32* frozen noalias %{{.+}}, i16* frozen nonnull align {{[0-9]+}} dereferenceable // CHECK: call void @__kmpc_serialized_parallel( -// CHECK: call void [[L2:@.+]](i32* %{{.+}}, i32* %{{.+}}, i16* %{{.+}}) +// CHECK: call void [[L2:@.+]](i32* frozen %{{.+}}, i32* frozen %{{.+}}, i16* frozen %{{.+}}) // CHECK: call void @__kmpc_end_serialized_parallel( // CHECK: ret void -// CHECK: define internal void [[L2]](i32* noalias %{{.+}}, i32* noalias %{{.+}}, i16* nonnull align {{[0-9]+}} dereferenceable +// CHECK: define internal void [[L2]](i32* frozen noalias %{{.+}}, i32* frozen noalias %{{.+}}, i16* frozen nonnull align {{[0-9]+}} dereferenceable // CHECK: store i16 1, i16* % // CHECK: ret void diff --git a/clang/test/OpenMP/nvptx_target_teams_distribute_codegen.cpp b/clang/test/OpenMP/nvptx_target_teams_distribute_codegen.cpp --- a/clang/test/OpenMP/nvptx_target_teams_distribute_codegen.cpp +++ b/clang/test/OpenMP/nvptx_target_teams_distribute_codegen.cpp @@ -63,7 +63,7 @@ // CHECK-DAG: [[MWS:%.+]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize() // CHECK: [[MTMP1:%.+]] = sub nuw i32 [[MNTH]], [[MWS]] // CHECK: call void @__kmpc_kernel_init(i32 [[MTMP1]] - // CHECK: call void [[PARALLEL:@.+]](i32* %{{.+}}, i32* %{{.+}}) + // CHECK: call void [[PARALLEL:@.+]](i32* frozen %{{.+}}, i32* frozen %{{.+}}) // CHECK: br label {{%?}}[[TERMINATE:.+]] // // CHECK: [[TERMINATE]] @@ -74,7 +74,7 @@ // CHECK: [[EXIT]] // CHECK: ret void - // CHECK: define internal void [[PARALLEL]](i32* noalias %{{.+}}, i32* noalias %{{.+}}) + // CHECK: define internal void [[PARALLEL]](i32* frozen noalias %{{.+}}, i32* frozen noalias %{{.+}}) // CHECK: [[SHARED:%.+]] = load i16, i16* [[KERNEL_SHARED]], // CHECK: [[SIZE:%.+]] = load i{{64|32}}, i{{64|32}}* [[KERNEL_SIZE]], // CHECK: call void @__kmpc_get_team_static_memory(i16 0, i8* addrspacecast (i8 addrspace(3)* getelementptr inbounds ([[MEM_TY]], [[MEM_TY]] addrspace(3)* @{{.+}}, i32 0, i32 0, i32 0) to i8*), i{{64|32}} [[SIZE]], i16 [[SHARED]], i8** addrspacecast (i8* addrspace(3)* [[BUF:@.+]] to i8**)) diff --git a/clang/test/OpenMP/nvptx_target_teams_distribute_parallel_for_codegen.cpp b/clang/test/OpenMP/nvptx_target_teams_distribute_parallel_for_codegen.cpp --- a/clang/test/OpenMP/nvptx_target_teams_distribute_parallel_for_codegen.cpp +++ b/clang/test/OpenMP/nvptx_target_teams_distribute_parallel_for_codegen.cpp @@ -1,10 +1,10 @@ // Test target codegen - host bc file has to be created first. -// RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -fopenmp-cuda-mode -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm-bc %s -o %t-ppc-host.bc -// RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -fopenmp-cuda-mode -x c++ -triple nvptx64-unknown-unknown -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s --check-prefix CHECK --check-prefix CHECK-64 --check-prefix CHECK-DIV64 -// RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -fopenmp-cuda-mode -x c++ -triple nvptx64-unknown-unknown -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -fopenmp-optimistic-collapse -o - | FileCheck %s --check-prefix CHECK --check-prefix CHECK-DIV32 -// RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -fopenmp-cuda-mode -x c++ -triple i386-unknown-unknown -fopenmp-targets=nvptx-nvidia-cuda -emit-llvm-bc %s -o %t-x86-host.bc -// RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -fopenmp-cuda-mode -x c++ -triple nvptx-unknown-unknown -fopenmp-targets=nvptx-nvidia-cuda -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --check-prefix CHECK --check-prefix CHECK-32 -// RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -fopenmp-cuda-mode -fexceptions -fcxx-exceptions -x c++ -triple nvptx-unknown-unknown -fopenmp-targets=nvptx-nvidia-cuda -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --check-prefix CHECK --check-prefix CHECK-32 +// RUN: %clang_cc1 -disable-frozen-args -verify -fopenmp -fopenmp-version=45 -fopenmp-cuda-mode -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm-bc %s -o %t-ppc-host.bc +// RUN: %clang_cc1 -disable-frozen-args -verify -fopenmp -fopenmp-version=45 -fopenmp-cuda-mode -x c++ -triple nvptx64-unknown-unknown -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s --check-prefix CHECK --check-prefix CHECK-64 --check-prefix CHECK-DIV64 +// RUN: %clang_cc1 -disable-frozen-args -verify -fopenmp -fopenmp-version=45 -fopenmp-cuda-mode -x c++ -triple nvptx64-unknown-unknown -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -fopenmp-optimistic-collapse -o - | FileCheck %s --check-prefix CHECK --check-prefix CHECK-DIV32 +// RUN: %clang_cc1 -disable-frozen-args -verify -fopenmp -fopenmp-version=45 -fopenmp-cuda-mode -x c++ -triple i386-unknown-unknown -fopenmp-targets=nvptx-nvidia-cuda -emit-llvm-bc %s -o %t-x86-host.bc +// RUN: %clang_cc1 -disable-frozen-args -verify -fopenmp -fopenmp-version=45 -fopenmp-cuda-mode -x c++ -triple nvptx-unknown-unknown -fopenmp-targets=nvptx-nvidia-cuda -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --check-prefix CHECK --check-prefix CHECK-32 +// RUN: %clang_cc1 -disable-frozen-args -verify -fopenmp -fopenmp-version=45 -fopenmp-cuda-mode -fexceptions -fcxx-exceptions -x c++ -triple nvptx-unknown-unknown -fopenmp-targets=nvptx-nvidia-cuda -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --check-prefix CHECK --check-prefix CHECK-32 // expected-no-diagnostics #ifndef HEADER #define HEADER diff --git a/clang/test/OpenMP/nvptx_target_teams_distribute_parallel_for_generic_mode_codegen.cpp b/clang/test/OpenMP/nvptx_target_teams_distribute_parallel_for_generic_mode_codegen.cpp --- a/clang/test/OpenMP/nvptx_target_teams_distribute_parallel_for_generic_mode_codegen.cpp +++ b/clang/test/OpenMP/nvptx_target_teams_distribute_parallel_for_generic_mode_codegen.cpp @@ -21,20 +21,20 @@ // CHECK: @__omp_offloading_{{.*}}_main_l16_exec_mode = weak constant i8 0 -// CHECK: define weak void @__omp_offloading_{{.*}}_main_l16(i{{64|32}} %{{[^,].*}}, i32* nonnull align {{[0-9]+}} dereferenceable{{[^,]*}}, i{{64|32}} %{{[^,)]*}}) +// CHECK: define weak void @__omp_offloading_{{.*}}_main_l16(i{{64|32}} frozen %{{[^,].*}}, i32* frozen nonnull align {{[0-9]+}} dereferenceable{{[^,]*}}, i{{64|32}} frozen %{{[^,)]*}}) // CHECK: call void @__kmpc_spmd_kernel_init( // CHECK: [[TID:%.+]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @ // CHECK: call void @__kmpc_spmd_kernel_deinit_v2(i16 0) // CHECK: call void @__kmpc_for_static_init_4( -// CHECK: call void [[PARALLEL:@.+]](i32* %{{.*}}, i32* %{{.+}}, i{{64|32}} %{{.+}}, i{{64|32}} %{{.*}}, i{{64|32}} %{{.*}}, i32* %{{.*}}) +// CHECK: call void [[PARALLEL:@.+]](i32* frozen %{{.*}}, i32* frozen %{{.+}}, i{{64|32}} frozen %{{.+}}, i{{64|32}} frozen %{{.*}}, i{{64|32}} frozen %{{.*}}, i32* frozen %{{.*}}) // CHECK: br label % // CHECK: call void @__kmpc_for_static_fini(%struct.ident_t* @ -// CHECK: define internal void [[PARALLEL]](i32* noalias %{{.+}}, i32* noalias %{{.+}}, i{{64|32}} %{{.+}}, i{{64|32}} %{{.+}}, i{{64|32}} [[ARGC:%.+]], i32* nonnull align {{[0-9]+}} dereferenceable{{.*}}) +// CHECK: define internal void [[PARALLEL]](i32* frozen noalias %{{.+}}, i32* frozen noalias %{{.+}}, i{{64|32}} frozen %{{.+}}, i{{64|32}} frozen %{{.+}}, i{{64|32}} frozen [[ARGC:%.+]], i32* frozen nonnull align {{[0-9]+}} dereferenceable{{.*}}) // CHECK-NOT: call i8* @__kmpc_data_sharing_push_stack( // CHECK: alloca i{{[0-9]+}}, // CHECK: alloca i{{[0-9]+}}, @@ -55,10 +55,10 @@ // CHECK-64: [[ARGC:%.+]] = bitcast i64* [[ARGC_ADDR]] to i32* // CHECK: call void @__kmpc_for_static_init_4( -// CHECK: call i32 [[FOO:@.+foo.+]](i32* [[I]]) -// CHECK: call i32 [[FOO]](i32* %{{.+}}) -// CHECK-32: call i32 [[FOO]](i32* [[ARGC_ADDR]]) -// CHECK-64: call i32 [[FOO]](i32* [[ARGC]]) +// CHECK: call frozen i32 [[FOO:@.+foo.+]](i32* frozen [[I]]) +// CHECK: call frozen i32 [[FOO]](i32* frozen %{{.+}}) +// CHECK-32: call frozen i32 [[FOO]](i32* frozen [[ARGC_ADDR]]) +// CHECK-64: call frozen i32 [[FOO]](i32* frozen [[ARGC]]) // CHECK: call void @__kmpc_for_static_fini( // CHECK-NOT: call void @__kmpc_data_sharing_pop_stack( diff --git a/clang/test/OpenMP/nvptx_target_teams_distribute_parallel_for_simd_codegen.cpp b/clang/test/OpenMP/nvptx_target_teams_distribute_parallel_for_simd_codegen.cpp --- a/clang/test/OpenMP/nvptx_target_teams_distribute_parallel_for_simd_codegen.cpp +++ b/clang/test/OpenMP/nvptx_target_teams_distribute_parallel_for_simd_codegen.cpp @@ -122,7 +122,7 @@ // CHECK: call void @__kmpc_for_static_fini( // CHECK: ret void -// CHECK: define {{.*}}void {{@__omp_offloading_.+}}({{.+}}, i{{32|64}} [[F_IN:%.+]]) +// CHECK: define {{.*}}void {{@__omp_offloading_.+}}({{.+}}, i{{32|64}} frozen [[F_IN:%.+]]) // CHECK: store {{.+}} [[F_IN]], {{.+}}* {{.+}}, // CHECK-DAG: [[THREAD_LIMIT:%.+]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x() // CHECK: call void @__kmpc_spmd_kernel_init(i32 [[THREAD_LIMIT]], i16 0, i16 0) diff --git a/clang/test/OpenMP/nvptx_target_teams_distribute_simd_codegen.cpp b/clang/test/OpenMP/nvptx_target_teams_distribute_simd_codegen.cpp --- a/clang/test/OpenMP/nvptx_target_teams_distribute_simd_codegen.cpp +++ b/clang/test/OpenMP/nvptx_target_teams_distribute_simd_codegen.cpp @@ -86,7 +86,7 @@ // CHECK: call void @__kmpc_for_static_fini( // CHECK: ret void -// CHECK: define {{.*}}void {{@__omp_offloading_.+}}_l46({{.+}}, i{{32|64}} [[F_IN:%.+]]) +// CHECK: define {{.*}}void {{@__omp_offloading_.+}}_l46({{.+}}, i{{32|64}} frozen [[F_IN:%.+]]) // CHECK: store {{.+}} [[F_IN]], {{.+}}* {{.+}}, // CHECK: call void @__kmpc_spmd_kernel_init(i32 %{{.+}}, i16 0, i16 0) // CHECK: call void @__kmpc_spmd_kernel_deinit_v2(i16 0) diff --git a/clang/test/OpenMP/nvptx_teams_codegen.cpp b/clang/test/OpenMP/nvptx_teams_codegen.cpp --- a/clang/test/OpenMP/nvptx_teams_codegen.cpp +++ b/clang/test/OpenMP/nvptx_teams_codegen.cpp @@ -36,7 +36,7 @@ // CK1-DAG: [[KERNEL_SHARED2:@.+]] = internal unnamed_addr constant i16 1 // only nvptx side: do not outline teams region and do not call fork_teams -// CK1: define {{.*}}void @{{[^,]+}}(i{{[0-9]+}} [[ARGC:%.+]]) +// CK1: define {{.*}}void @{{[^,]+}}(i{{[0-9]+}} frozen [[ARGC:%.+]]) // CK1: [[ARGCADDR:%.+]] = alloca i{{[0-9]+}}, // CK1: store {{.+}} 0, {{.+}}, // CK1: store i{{[0-9]+}} [[ARGC]], i{{[0-9]+}}* [[ARGCADDR]], @@ -50,16 +50,16 @@ // CK1-32: [[ARG:%.+]] = load i{{[0-9]+}}, i{{[0-9]+}}* [[ARGCADDR]] // CK1: [[ARGCADDR:%.+]] = getelementptr inbounds %struct.{{.*}}, %struct.{{.*}}* %{{.*}}, i{{[0-9]+}} 0, i{{[0-9]+}} 0 // CK1: store i{{[0-9]+}} [[ARG]], i{{[0-9]+}}* [[ARGCADDR]], -// CK1: call void [[OUTLINED:@.+]](i32* %{{.+}}, i32* %{{.+}}, i32* [[ARGCADDR]]) +// CK1: call void [[OUTLINED:@.+]](i32* frozen %{{.+}}, i32* frozen %{{.+}}, i32* frozen [[ARGCADDR]]) // CK1: ret void // CK1-NEXT: } // CK1: define internal void [[OUTLINED]]( // CK1: store i{{[0-9]+}} 0, i{{[0-9]+}}* % -// CK1-NOT: call {{.*}}void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams( +// CK1-NOT: call {{.*}}void (%struct.ident_t*, i32, void (i32*, i32*, ...)* frozen, ...) @__kmpc_fork_teams // target region in template -// CK1: define {{.*}}void @{{[^,]+}}(i{{.+}}** [[ARGC:%.+]]) +// CK1: define {{.*}}void @{{[^,]+}}(i{{.+}}** frozen [[ARGC:%.+]]) // CK1: [[ARGCADDR:%.+]] = alloca i{{.+}}**, // CK1: store i{{.+}}** [[ARGC]], i{{.+}}*** [[ARGCADDR]] // CK1: [[IS_SHARED:%.+]] = load i16, i16* [[KERNEL_SHARED2]], @@ -70,13 +70,13 @@ // CK1: [[ARG:%.+]] = load i{{[0-9]+}}**, i{{[0-9]+}}*** [[ARGCADDR]] // CK1: [[ARGCADDR:%.+]] = getelementptr inbounds %struct.{{.*}}, %struct.{{.*}}* %{{.*}}, i{{[0-9]+}} 0, i{{[0-9]+}} 0 // CK1: store i{{[0-9]+}}** [[ARG]], i{{[0-9]+}}*** [[ARGCADDR]], -// CK1: call void [[OUTLINED:@.+]](i32* %{{.+}}, i32* %{{.+}}, i8*** [[ARGCADDR]]) +// CK1: call void [[OUTLINED:@.+]](i32* frozen %{{.+}}, i32* frozen %{{.+}}, i8*** frozen [[ARGCADDR]]) // CK1: ret void // CK1-NEXT: } // CK1: define internal void [[OUTLINED]]( // CK1: store i{{[0-9]+}}** null, i{{[0-9]+}}*** % -// CK1-NOT: call {{.*}}void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams( +// CK1-NOT: call {{.*}}void (%struct.ident_t*, i32, void (i32*, i32*, ...)* frozen, ...) @__kmpc_fork_teams #endif // CK1 @@ -120,7 +120,7 @@ // CK2-DAG: [[KERNEL_SHARED1:@.+]] = internal unnamed_addr constant i16 1 // CK2-DAG: [[KERNEL_SHARED2:@.+]] = internal unnamed_addr constant i16 1 -// CK2: define {{.*}}void @{{[^,]+}}(i{{[0-9]+}} [[A_IN:%.+]], i{{[0-9]+}} [[B_IN:%.+]], i{{[0-9]+}} [[ARGC_IN:.+]]) +// CK2: define {{.*}}void @{{[^,]+}}(i{{[0-9]+}} frozen [[A_IN:%.+]], i{{[0-9]+}} frozen [[B_IN:%.+]], i{{[0-9]+}} frozen [[ARGC_IN:.+]]) // CK2: [[AADDR:%.+]] = alloca i{{[0-9]+}}, // CK2: [[BADDR:%.+]] = alloca i{{[0-9]+}}, // CK2: [[ARGCADDR:%.+]] = alloca i{{[0-9]+}}, @@ -140,15 +140,15 @@ // CK2: [[ARGCADDR:%.+]] = getelementptr inbounds %struct.{{.*}}, %struct.{{.*}}* %{{.*}}, i{{[0-9]+}} 0, i{{[0-9]+}} 0 // CK2: store i{{[0-9]+}} [[ARG]], i{{[0-9]+}}* [[ARGCADDR]], // CK2: {{%.+}} = call i32 @__kmpc_global_thread_num( -// CK2: call void [[OUTLINED:@.+]](i32* %{{.+}}, i32* %{{.+}}, i32* [[ARGCADDR]]) +// CK2: call void [[OUTLINED:@.+]](i32* frozen %{{.+}}, i32* frozen %{{.+}}, i32* frozen [[ARGCADDR]]) // CK2: ret // CK2: define internal void [[OUTLINED]]( // CK2: store i{{[0-9]+}} 0, i{{[0-9]+}}* % // CK2-NOT: {{.+}} = call void @__kmpc_push_num_teams( -// CK2-NOT: call {{.*}}void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams( +// CK2-NOT: call {{.*}}void (%struct.ident_t*, i32, void (i32*, i32*, ...)* frozen, ...) @__kmpc_fork_teams -// CK2: define {{.*}}void @{{[^,]+}}(i{{[0-9]+}} [[A_IN:%.+]], i{{[0-9]+}} [[BP:%.+]], i{{[0-9]+}}** [[ARGC:%.+]]) +// CK2: define {{.*}}void @{{[^,]+}}(i{{[0-9]+}} frozen [[A_IN:%.+]], i{{[0-9]+}} frozen [[BP:%.+]], i{{[0-9]+}}** frozen [[ARGC:%.+]]) // CK2: [[AADDR:%.+]] = alloca i{{[0-9]+}}, // CK2: [[BADDR:%.+]] = alloca i{{[0-9]+}}, // CK2: [[ARGCADDR:%.+]] = alloca i{{[0-9]+}}**, @@ -164,13 +164,13 @@ // CK2: [[ARGCADDR:%.+]] = getelementptr inbounds %struct.{{.*}}, %struct.{{.*}}* %{{.*}}, i{{[0-9]+}} 0, i{{[0-9]+}} 0 // CK2: store i{{[0-9]+}}** [[ARG]], i{{[0-9]+}}*** [[ARGCADDR]], // CK2: {{%.+}} = call i32 @__kmpc_global_thread_num( -// CK2: call void [[OUTLINED:@.+]](i32* %{{.+}}, i32* %{{.+}}, i8*** [[ARGCADDR]]) +// CK2: call void [[OUTLINED:@.+]](i32* frozen %{{.+}}, i32* frozen %{{.+}}, i8*** frozen [[ARGCADDR]]) // CK2: ret void // CK2: define internal void [[OUTLINED]]( // CK2: store i{{[0-9]+}}** null, i{{[0-9]+}}*** % // CK2-NOT: {{.+}} = call void @__kmpc_push_num_teams( -// CK2-NOT: call {{.*}}void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams( +// CK2-NOT: call {{.*}}void (%struct.ident_t*, i32, void (i32*, i32*, ...)* frozen, ...) @__kmpc_fork_teams #endif // CK2 #endif diff --git a/clang/test/OpenMP/nvptx_teams_reduction_codegen.cpp b/clang/test/OpenMP/nvptx_teams_reduction_codegen.cpp --- a/clang/test/OpenMP/nvptx_teams_reduction_codegen.cpp +++ b/clang/test/OpenMP/nvptx_teams_reduction_codegen.cpp @@ -104,7 +104,7 @@ // // Reduction function - // CHECK: define internal void [[REDUCTION_FUNC:@.+]](i8* %0, i8* %1) + // CHECK: define internal void [[REDUCTION_FUNC:@.+]](i8* frozen %0, i8* frozen %1) // CHECK: [[VAR_RHS_REF:%.+]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[RED_LIST_RHS:%.+]], i{{32|64}} 0, i{{32|64}} 0 // CHECK: [[VAR_RHS_VOID:%.+]] = load i8*, i8** [[VAR_RHS_REF]], // CHECK: [[VAR_RHS:%.+]] = bitcast i8* [[VAR_RHS_VOID]] to double* @@ -121,7 +121,7 @@ // // Shuffle and reduce function - // CHECK: define internal void [[SHUFFLE_AND_REDUCE]](i8* %0, i16 {{.*}}, i16 {{.*}}, i16 {{.*}}) + // CHECK: define internal void [[SHUFFLE_AND_REDUCE]](i8* frozen %0, i16 {{.*}}, i16 {{.*}}, i16 {{.*}}) // CHECK: [[REMOTE_RED_LIST:%.+]] = alloca [1 x i8*], align // CHECK: [[REMOTE_ELT:%.+]] = alloca double // @@ -166,7 +166,7 @@ // CHECK: [[DO_REDUCE]] // CHECK: [[RED_LIST1_VOID:%.+]] = bitcast [1 x i8*]* [[RED_LIST]] to i8* // CHECK: [[RED_LIST2_VOID:%.+]] = bitcast [1 x i8*]* [[REMOTE_RED_LIST]] to i8* - // CHECK: call void [[REDUCTION_FUNC]](i8* [[RED_LIST1_VOID]], i8* [[RED_LIST2_VOID]]) + // CHECK: call void [[REDUCTION_FUNC]](i8* frozen [[RED_LIST1_VOID]], i8* frozen [[RED_LIST2_VOID]]) // CHECK: br label {{%?}}[[REDUCE_CONT:.+]] // // CHECK: [[REDUCE_ELSE]] @@ -198,7 +198,7 @@ // // Inter warp copy function - // CHECK: define internal void [[INTER_WARP_COPY]](i8* %0, i32 %1) + // CHECK: define internal void [[INTER_WARP_COPY]](i8* frozen %0, i32 frozen %1) // CHECK-DAG: [[LANEID:%.+]] = and i32 {{.+}}, 31 // CHECK-DAG: [[WARPID:%.+]] = ashr i32 {{.+}}, 5 // CHECK-DAG: [[RED_LIST:%.+]] = bitcast i8* {{.+}} to [1 x i8*]* @@ -253,7 +253,7 @@ // CHECK: br label // CHECK: ret - // CHECK: define internal void [[RED_LIST_TO_GLOBAL_COPY]](i8* %0, i32 %1, i8* %2) + // CHECK: define internal void [[RED_LIST_TO_GLOBAL_COPY]](i8* frozen %0, i32 frozen %1, i8* frozen %2) // CHECK: [[GLOBAL_PTR:%.+]] = alloca i8*, // CHECK: [[IDX_PTR:%.+]] = alloca i32, // CHECK: [[RL_PTR:%.+]] = alloca i8*, @@ -274,7 +274,7 @@ // CHECK: store double [[LOC_RED1]], double* [[GLOBAL_RED1_IDX_PTR]], // CHECK: ret void - // CHECK: define internal void [[RED_LIST_TO_GLOBAL_RED]](i8* %0, i32 %1, i8* %2) + // CHECK: define internal void [[RED_LIST_TO_GLOBAL_RED]](i8* frozen %0, i32 frozen %1, i8* frozen %2) // CHECK: [[GLOBAL_PTR:%.+]] = alloca i8*, // CHECK: [[IDX_PTR:%.+]] = alloca i32, // CHECK: [[RL_PTR:%.+]] = alloca i8*, @@ -292,10 +292,10 @@ // CHECK: store i8* [[GLOBAL_RED1_IDX_PTR_BC]], i8** [[LOCAL_RL_RED1_PTR]] // CHECK: [[LOCAL_RL_BC:%.+]] = bitcast [1 x i8*]* [[LOCAL_RL]] to i8* // CHECK: [[RL_BC:%.+]] = load i8*, i8** [[RL_PTR]], - // CHECK: call void [[REDUCTION_FUNC]](i8* [[LOCAL_RL_BC]], i8* [[RL_BC]]) + // CHECK: call void [[REDUCTION_FUNC]](i8* frozen [[LOCAL_RL_BC]], i8* frozen [[RL_BC]]) // CHECK: ret void - // CHECK: define internal void [[GLOBAL_TO_RED_LIST_COPY]](i8* %0, i32 %1, i8* %2) + // CHECK: define internal void [[GLOBAL_TO_RED_LIST_COPY]](i8* frozen %0, i32 frozen %1, i8* frozen %2) // CHECK: [[GLOBAL_PTR:%.+]] = alloca i8*, // CHECK: [[IDX_PTR:%.+]] = alloca i32, // CHECK: [[RL_PTR:%.+]] = alloca i8*, @@ -316,7 +316,7 @@ // CHECK: store double [[GLOBAL_RED1]], double* [[RL_RED1]], // CHECK: ret void - // CHECK: define internal void [[GLOBAL_TO_RED_LIST_RED]](i8* %0, i32 %1, i8* %2) + // CHECK: define internal void [[GLOBAL_TO_RED_LIST_RED]](i8* frozen %0, i32 frozen %1, i8* frozen %2) // CHECK: [[GLOBAL_PTR:%.+]] = alloca i8*, // CHECK: [[IDX_PTR:%.+]] = alloca i32, // CHECK: [[RL_PTR:%.+]] = alloca i8*, @@ -334,7 +334,7 @@ // CHECK: store i8* [[GLOBAL_RED1_IDX_PTR_BC]], i8** [[LOCAL_RL_RED1_PTR]] // CHECK: [[LOCAL_RL_BC:%.+]] = bitcast [1 x i8*]* [[LOCAL_RL]] to i8* // CHECK: [[RL_BC:%.+]] = load i8*, i8** [[RL_PTR]], - // CHECK: call void [[REDUCTION_FUNC]](i8* [[RL_BC]], i8* [[LOCAL_RL_BC]]) + // CHECK: call void [[REDUCTION_FUNC]](i8* frozen [[RL_BC]], i8* frozen [[LOCAL_RL_BC]]) // CHECK: ret void // CHECK-LABEL: define {{.*}}void {{@__omp_offloading_.+template.+l47}}_worker() @@ -386,7 +386,7 @@ // // Reduction function - // CHECK: define internal void [[REDUCTION_FUNC:@.+]](i8* %0, i8* %1) + // CHECK: define internal void [[REDUCTION_FUNC:@.+]](i8* frozen %0, i8* frozen %1) // CHECK: [[VAR1_RHS_REF:%.+]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[RED_LIST_RHS:%.+]], i{{32|64}} 0, i{{32|64}} 0 // CHECK: [[VAR1_RHS:%.+]] = load i8*, i8** [[VAR1_RHS_REF]], // @@ -417,7 +417,7 @@ // // Shuffle and reduce function - // CHECK: define internal void [[SHUFFLE_AND_REDUCE]](i8* %0, i16 {{.*}}, i16 {{.*}}, i16 {{.*}}) + // CHECK: define internal void [[SHUFFLE_AND_REDUCE]](i8* frozen %0, i16 {{.*}}, i16 {{.*}}, i16 {{.*}}) // CHECK: [[REMOTE_RED_LIST:%.+]] = alloca [2 x i8*], align // CHECK: [[REMOTE_ELT1:%.+]] = alloca i8 // CHECK: [[REMOTE_ELT2:%.+]] = alloca float @@ -477,7 +477,7 @@ // CHECK: [[DO_REDUCE]] // CHECK: [[RED_LIST1_VOID:%.+]] = bitcast [2 x i8*]* [[RED_LIST]] to i8* // CHECK: [[RED_LIST2_VOID:%.+]] = bitcast [2 x i8*]* [[REMOTE_RED_LIST]] to i8* - // CHECK: call void [[REDUCTION_FUNC]](i8* [[RED_LIST1_VOID]], i8* [[RED_LIST2_VOID]]) + // CHECK: call void [[REDUCTION_FUNC]](i8* frozen [[RED_LIST1_VOID]], i8* frozen [[RED_LIST2_VOID]]) // CHECK: br label {{%?}}[[REDUCE_CONT:.+]] // // CHECK: [[REDUCE_ELSE]] @@ -516,7 +516,7 @@ // // Inter warp copy function - // CHECK: define internal void [[INTER_WARP_COPY]](i8* %0, i32 %1) + // CHECK: define internal void [[INTER_WARP_COPY]](i8* frozen %0, i32 frozen %1) // CHECK-DAG: [[LANEID:%.+]] = and i32 {{.+}}, 31 // CHECK-DAG: [[WARPID:%.+]] = ashr i32 {{.+}}, 5 // CHECK-DAG: [[RED_LIST:%.+]] = bitcast i8* {{.+}} to [2 x i8*]* @@ -600,7 +600,7 @@ // CHECK: [[READ_CONT]] // CHECK: ret - // CHECK: define internal void [[RED_LIST_TO_GLOBAL_COPY]](i8* %0, i32 %1, i8* %2) + // CHECK: define internal void [[RED_LIST_TO_GLOBAL_COPY]](i8* frozen %0, i32 frozen %1, i8* frozen %2) // CHECK: [[GLOBAL_PTR:%.+]] = alloca i8*, // CHECK: [[IDX_PTR:%.+]] = alloca i32, // CHECK: [[RL_PTR:%.+]] = alloca i8*, @@ -627,7 +627,7 @@ // CHECK: store float [[LOC_RED1]], float* [[GLOBAL_RED1_IDX_PTR]], // CHECK: ret void - // CHECK: define internal void [[RED_LIST_TO_GLOBAL_RED]](i8* %0, i32 %1, i8* %2) + // CHECK: define internal void [[RED_LIST_TO_GLOBAL_RED]](i8* frozen %0, i32 frozen %1, i8* frozen %2) // CHECK: [[GLOBAL_PTR:%.+]] = alloca i8*, // CHECK: [[IDX_PTR:%.+]] = alloca i32, // CHECK: [[RL_PTR:%.+]] = alloca i8*, @@ -649,10 +649,10 @@ // CHECK: store i8* [[GLOBAL_RED1_IDX_PTR_BC]], i8** [[LOCAL_RL_RED1_PTR]] // CHECK: [[LOCAL_RL_BC:%.+]] = bitcast [2 x i8*]* [[LOCAL_RL]] to i8* // CHECK: [[RL_BC:%.+]] = load i8*, i8** [[RL_PTR]], - // CHECK: call void [[REDUCTION_FUNC]](i8* [[LOCAL_RL_BC]], i8* [[RL_BC]]) + // CHECK: call void [[REDUCTION_FUNC]](i8* frozen [[LOCAL_RL_BC]], i8* frozen [[RL_BC]]) // CHECK: ret void - // CHECK: define internal void [[GLOBAL_TO_RED_LIST_COPY]](i8* %0, i32 %1, i8* %2) + // CHECK: define internal void [[GLOBAL_TO_RED_LIST_COPY]](i8* frozen %0, i32 frozen %1, i8* frozen %2) // CHECK: [[GLOBAL_PTR:%.+]] = alloca i8*, // CHECK: [[IDX_PTR:%.+]] = alloca i32, // CHECK: [[RL_PTR:%.+]] = alloca i8*, @@ -679,7 +679,7 @@ // CHECK: store float [[GLOBAL_RED1]], float* [[RL_RED1]], // CHECK: ret void - // CHECK: define internal void [[GLOBAL_TO_RED_LIST_RED]](i8* %0, i32 %1, i8* %2) + // CHECK: define internal void [[GLOBAL_TO_RED_LIST_RED]](i8* frozen %0, i32 frozen %1, i8* frozen %2) // CHECK: [[GLOBAL_PTR:%.+]] = alloca i8*, // CHECK: [[IDX_PTR:%.+]] = alloca i32, // CHECK: [[RL_PTR:%.+]] = alloca i8*, @@ -701,7 +701,7 @@ // CHECK: store i8* [[GLOBAL_RED1_IDX_PTR_BC]], i8** [[LOCAL_RL_RED1_PTR]] // CHECK: [[LOCAL_RL_BC:%.+]] = bitcast [2 x i8*]* [[LOCAL_RL]] to i8* // CHECK: [[RL_BC:%.+]] = load i8*, i8** [[RL_PTR]], - // CHECK: call void [[REDUCTION_FUNC]](i8* [[RL_BC]], i8* [[LOCAL_RL_BC]]) + // CHECK: call void [[REDUCTION_FUNC]](i8* frozen [[RL_BC]], i8* frozen [[LOCAL_RL_BC]]) // CHECK: ret void // CHECK-LABEL: define {{.*}}void {{@__omp_offloading_.+template.+l54}}( @@ -715,7 +715,7 @@ // CHECK: store i32 0, // CHECK: store i32 0, i32* [[A_ADDR:%.+]], align // CHECK: store i16 -32768, i16* [[B_ADDR:%.+]], align - // CHECK: call void [[OUTLINED:@.+]](i32* {{.+}}, i32* {{.+}}, i32* [[A_ADDR]], i16* [[B_ADDR]]) + // CHECK: call void [[OUTLINED:@.+]](i32* {{.+}}, i32* {{.+}}, i32* frozen [[A_ADDR]], i16* frozen [[B_ADDR]]) // CHECK: [[GEP1:%.+]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[RED_LIST:%.+]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 // CHECK: [[BC:%.+]] = bitcast i32* [[A_ADDR]] to i8* // CHECK: store i8* [[BC]], i8** [[GEP1]], @@ -756,7 +756,7 @@ // // CHECK: [[EXIT]] - // CHECK: define internal void [[OUTLINED]](i32* noalias %{{.+}}, i32* noalias %{{.+}}, i32* nonnull align {{[0-9]+}} dereferenceable{{.+}}, i16* nonnull align {{[0-9]+}} dereferenceable{{.+}}) + // CHECK: define internal void [[OUTLINED]](i32* frozen noalias %{{.+}}, i32* frozen noalias %{{.+}}, i32* frozen nonnull align {{[0-9]+}} dereferenceable{{.+}}, i16* frozen nonnull align {{[0-9]+}} dereferenceable{{.+}}) // // CHECK: store i32 0, i32* [[A:%.+]], align // CHECK: store i16 -32768, i16* [[B:%.+]], align @@ -822,7 +822,7 @@ // // Reduction function - // CHECK: define internal void [[PAR_REDUCTION_FUNC:@.+]](i8* %0, i8* %1) + // CHECK: define internal void [[PAR_REDUCTION_FUNC:@.+]](i8* frozen %0, i8* frozen %1) // CHECK: [[VAR1_RHS_REF:%.+]] = getelementptr inbounds [[RLT]], [[RLT]]* [[RED_LIST_RHS:%.+]], i[[SZ]] 0, i[[SZ]] 0 // CHECK: [[VAR1_RHS_VOID:%.+]] = load i8*, i8** [[VAR1_RHS_REF]], // CHECK: [[VAR1_RHS:%.+]] = bitcast i8* [[VAR1_RHS_VOID]] to i32* @@ -866,7 +866,7 @@ // CHECK: ret void // // Shuffle and reduce function - // CHECK: define internal void [[PAR_SHUFFLE_REDUCE_FN]](i8* %0, i16 {{.*}}, i16 {{.*}}, i16 {{.*}}) + // CHECK: define internal void [[PAR_SHUFFLE_REDUCE_FN]](i8* frozen %0, i16 {{.*}}, i16 {{.*}}, i16 {{.*}}) // CHECK: [[REMOTE_RED_LIST:%.+]] = alloca [[RLT]], align // CHECK: [[REMOTE_ELT1:%.+]] = alloca i32 // CHECK: [[REMOTE_ELT2:%.+]] = alloca i16 @@ -926,7 +926,7 @@ // CHECK: [[DO_REDUCE]] // CHECK: [[RED_LIST1_VOID:%.+]] = bitcast [[RLT]]* [[RED_LIST]] to i8* // CHECK: [[RED_LIST2_VOID:%.+]] = bitcast [[RLT]]* [[REMOTE_RED_LIST]] to i8* - // CHECK: call void [[PAR_REDUCTION_FUNC]](i8* [[RED_LIST1_VOID]], i8* [[RED_LIST2_VOID]]) + // CHECK: call void [[PAR_REDUCTION_FUNC]](i8* frozen [[RED_LIST1_VOID]], i8* frozen [[RED_LIST2_VOID]]) // CHECK: br label {{%?}}[[REDUCE_CONT:.+]] // // CHECK: [[REDUCE_ELSE]] @@ -967,7 +967,7 @@ // // Inter warp copy function - // CHECK: define internal void [[PAR_WARP_COPY_FN]](i8* %0, i32 %1) + // CHECK: define internal void [[PAR_WARP_COPY_FN]](i8* frozen %0, i32 frozen %1) // CHECK-DAG: [[LANEID:%.+]] = and i32 {{.+}}, 31 // CHECK-DAG: [[WARPID:%.+]] = ashr i32 {{.+}}, 5 // CHECK-DAG: [[RED_LIST:%.+]] = bitcast i8* {{.+}} to [[RLT]]* @@ -1054,7 +1054,7 @@ // // Reduction function - // CHECK: define internal void [[REDUCTION_FUNC:@.+]](i8* %0, i8* %1) + // CHECK: define internal void [[REDUCTION_FUNC:@.+]](i8* frozen %0, i8* frozen %1) // CHECK: [[VAR1_RHS_REF:%.+]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[RED_LIST_RHS:%.+]], i[[SZ]] 0, i[[SZ]] 0 // CHECK: [[VAR1_RHS_VOID:%.+]] = load i8*, i8** [[VAR1_RHS_REF]], // CHECK: [[VAR1_RHS:%.+]] = bitcast i8* [[VAR1_RHS_VOID]] to i32* @@ -1099,7 +1099,7 @@ // // Shuffle and reduce function - // CHECK: define internal void [[SHUFFLE_AND_REDUCE]](i8* %0, i16 {{.*}}, i16 {{.*}}, i16 {{.*}}) + // CHECK: define internal void [[SHUFFLE_AND_REDUCE]](i8* frozen %0, i16 {{.*}}, i16 {{.*}}, i16 {{.*}}) // CHECK: [[REMOTE_RED_LIST:%.+]] = alloca [2 x i8*], align // CHECK: [[REMOTE_ELT1:%.+]] = alloca i32 // CHECK: [[REMOTE_ELT2:%.+]] = alloca i16 @@ -1159,7 +1159,7 @@ // CHECK: [[DO_REDUCE]] // CHECK: [[RED_LIST1_VOID:%.+]] = bitcast [2 x i8*]* [[RED_LIST]] to i8* // CHECK: [[RED_LIST2_VOID:%.+]] = bitcast [2 x i8*]* [[REMOTE_RED_LIST]] to i8* - // CHECK: call void [[REDUCTION_FUNC]](i8* [[RED_LIST1_VOID]], i8* [[RED_LIST2_VOID]]) + // CHECK: call void [[REDUCTION_FUNC]](i8* frozen [[RED_LIST1_VOID]], i8* frozen [[RED_LIST2_VOID]]) // CHECK: br label {{%?}}[[REDUCE_CONT:.+]] // // CHECK: [[REDUCE_ELSE]] @@ -1200,7 +1200,7 @@ // // Inter warp copy function - // CHECK: define internal void [[INTER_WARP_COPY]](i8* %0, i32 %1) + // CHECK: define internal void [[INTER_WARP_COPY]](i8* frozen %0, i32 frozen %1) // CHECK-DAG: [[LANEID:%.+]] = and i32 {{.+}}, 31 // CHECK-DAG: [[WARPID:%.+]] = ashr i32 {{.+}}, 5 // CHECK-DAG: [[RED_LIST:%.+]] = bitcast i8* {{.+}} to [[RLT]]* @@ -1286,7 +1286,7 @@ // CHECK: [[READ_CONT]] // CHECK: ret - // CHECK: define internal void [[RED_LIST_TO_GLOBAL_COPY]](i8* %0, i32 %1, i8* %2) + // CHECK: define internal void [[RED_LIST_TO_GLOBAL_COPY]](i8* frozen %0, i32 frozen %1, i8* frozen %2) // CHECK: [[GLOBAL_PTR:%.+]] = alloca i8*, // CHECK: [[IDX_PTR:%.+]] = alloca i32, // CHECK: [[RL_PTR:%.+]] = alloca i8*, @@ -1314,7 +1314,7 @@ // CHECK: store i16 [[LOC_RED1]], i16* [[GLOBAL_RED1_IDX_PTR]], // CHECK: ret void - // CHECK: define internal void [[RED_LIST_TO_GLOBAL_RED]](i8* %0, i32 %1, i8* %2) + // CHECK: define internal void [[RED_LIST_TO_GLOBAL_RED]](i8* frozen %0, i32 frozen %1, i8* frozen %2) // CHECK: [[GLOBAL_PTR:%.+]] = alloca i8*, // CHECK: [[IDX_PTR:%.+]] = alloca i32, // CHECK: [[RL_PTR:%.+]] = alloca i8*, @@ -1337,10 +1337,10 @@ // CHECK: store i8* [[GLOBAL_RED1_IDX_PTR_BC]], i8** [[LOCAL_RL_RED1_PTR]] // CHECK: [[LOCAL_RL_BC:%.+]] = bitcast [2 x i8*]* [[LOCAL_RL]] to i8* // CHECK: [[RL_BC:%.+]] = load i8*, i8** [[RL_PTR]], - // CHECK: call void [[REDUCTION_FUNC]](i8* [[LOCAL_RL_BC]], i8* [[RL_BC]]) + // CHECK: call void [[REDUCTION_FUNC]](i8* frozen [[LOCAL_RL_BC]], i8* frozen [[RL_BC]]) // CHECK: ret void - // CHECK: define internal void [[GLOBAL_TO_RED_LIST_COPY]](i8* %0, i32 %1, i8* %2) + // CHECK: define internal void [[GLOBAL_TO_RED_LIST_COPY]](i8* frozen %0, i32 frozen %1, i8* frozen %2) // CHECK: [[GLOBAL_PTR:%.+]] = alloca i8*, // CHECK: [[IDX_PTR:%.+]] = alloca i32, // CHECK: [[RL_PTR:%.+]] = alloca i8*, @@ -1368,7 +1368,7 @@ // CHECK: store i16 [[GLOBAL_RED1]], i16* [[RL_RED1]], // CHECK: ret void - // CHECK: define internal void [[GLOBAL_TO_RED_LIST_RED]](i8* %0, i32 %1, i8* %2) + // CHECK: define internal void [[GLOBAL_TO_RED_LIST_RED]](i8* frozen %0, i32 frozen %1, i8* frozen %2) // CHECK: [[GLOBAL_PTR:%.+]] = alloca i8*, // CHECK: [[IDX_PTR:%.+]] = alloca i32, // CHECK: [[RL_PTR:%.+]] = alloca i8*, @@ -1391,7 +1391,7 @@ // CHECK: store i8* [[GLOBAL_RED1_IDX_PTR_BC]], i8** [[LOCAL_RL_RED1_PTR]] // CHECK: [[LOCAL_RL_BC:%.+]] = bitcast [2 x i8*]* [[LOCAL_RL]] to i8* // CHECK: [[RL_BC:%.+]] = load i8*, i8** [[RL_PTR]], - // CHECK: call void [[REDUCTION_FUNC]](i8* [[RL_BC]], i8* [[LOCAL_RL_BC]]) + // CHECK: call void [[REDUCTION_FUNC]](i8* frozen [[RL_BC]], i8* frozen [[LOCAL_RL_BC]]) // CHECK: ret void #endif diff --git a/clang/test/OpenMP/nvptx_unsupported_type_codegen.cpp b/clang/test/OpenMP/nvptx_unsupported_type_codegen.cpp --- a/clang/test/OpenMP/nvptx_unsupported_type_codegen.cpp +++ b/clang/test/OpenMP/nvptx_unsupported_type_codegen.cpp @@ -34,7 +34,7 @@ #pragma omp declare target T a = T(); T f = a; -// CHECK: define{{ hidden | }}void @{{.+}}foo{{.+}}([[T]]* byval([[T]]) align {{.+}}) +// CHECK: define{{ hidden | }}void @{{.+}}foo{{.+}}([[T]]* frozen byval([[T]]) align {{.+}}) void foo(T a = T()) { return; } @@ -54,7 +54,7 @@ } T1 a1 = T1(); T1 f1 = a1; -// CHECK: define{{ hidden | }}void @{{.+}}foo1{{.+}}([[T1]]* byval([[T1]]) align {{.+}}) +// CHECK: define{{ hidden | }}void @{{.+}}foo1{{.+}}([[T1]]* frozen byval([[T1]]) align {{.+}}) void foo1(T1 a = T1()) { return; } diff --git a/clang/test/OpenMP/openmp_offload_codegen.cpp b/clang/test/OpenMP/openmp_offload_codegen.cpp --- a/clang/test/OpenMP/openmp_offload_codegen.cpp +++ b/clang/test/OpenMP/openmp_offload_codegen.cpp @@ -25,7 +25,7 @@ } } -// CK1-DEVICE: {{.*}}void @__omp_offloading_{{.*}}(i32* nonnull align 4 dereferenceable(4){{.*}} +// CK1-DEVICE: {{.*}}void @__omp_offloading_{{.*}}(i32* frozen nonnull align 4 dereferenceable(4){{.*}} // CK1: {{.*}}void {{.*}}target_maps_parallel_integer{{.*}} { diff --git a/clang/test/OpenMP/ordered_codegen.cpp b/clang/test/OpenMP/ordered_codegen.cpp --- a/clang/test/OpenMP/ordered_codegen.cpp +++ b/clang/test/OpenMP/ordered_codegen.cpp @@ -222,7 +222,7 @@ // CHECK-LABEL: foo_simd void foo_simd(int low, int up) { // CHECK: store float 0.000000e+00, float* %{{.+}}, align {{[0-9]+}}, !llvm.access.group ! - // CHECK-NEXT: call void [[CAP_FUNC:@.+]](i32* %{{.+}}), !llvm.access.group ! + // CHECK-NEXT: call void [[CAP_FUNC:@.+]](i32* frozen %{{.+}}), !llvm.access.group ! #pragma omp simd for (int i = low; i < up; ++i) { f[i] = 0.0; @@ -230,7 +230,7 @@ f[i] = 1.0; } // CHECK: store float 0.000000e+00, float* %{{.+}}, align {{[0-9]+}} - // CHECK-NEXT: call void [[CAP_FUNC:@.+]](i32* %{{.+}}) + // CHECK-NEXT: call void [[CAP_FUNC:@.+]](i32* frozen %{{.+}}) #pragma omp for simd ordered for (int i = low; i < up; ++i) { f[i] = 0.0; @@ -239,7 +239,7 @@ } } -// CHECK: define internal void [[CAP_FUNC]](i32* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %{{.+}}) # +// CHECK: define internal void [[CAP_FUNC]](i32* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %{{.+}}) # // CHECK: store float 1.000000e+00, float* %{{.+}}, align // CHECK-NEXT: ret void diff --git a/clang/test/OpenMP/parallel_codegen.cpp b/clang/test/OpenMP/parallel_codegen.cpp --- a/clang/test/OpenMP/parallel_codegen.cpp +++ b/clang/test/OpenMP/parallel_codegen.cpp @@ -1,16 +1,16 @@ -// RUN: %clang_cc1 -verify -fopenmp -x c++ -emit-llvm %s -triple %itanium_abi_triple -fexceptions -fcxx-exceptions -o - | FileCheck %s --check-prefixes=ALL,CHECK -// RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -debug-info-kind=limited -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefixes=ALL-DEBUG,CHECK-DEBUG %s -// RUN: %clang_cc1 -verify -fopenmp -fopenmp-enable-irbuilder -DIRBUILDER -x c++ -emit-llvm %s -triple %itanium_abi_triple -fexceptions -fcxx-exceptions -o - | FileCheck %s --check-prefixes=ALL,IRBUILDER -// RUN: %clang_cc1 -fopenmp -fopenmp-enable-irbuilder -DIRBUILDER -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp -fopenmp-enable-irbuilder -DIRBUILDER -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -debug-info-kind=limited -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefixes=ALL-DEBUG,IRBUILDER-DEBUG %s - -// RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -emit-llvm %s -triple %itanium_abi_triple -fexceptions -fcxx-exceptions -o - | FileCheck --check-prefix SIMD-ONLY0 %s -// RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp-simd -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -debug-info-kind=limited -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY0 %s -// RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-enable-irbuilder -x c++ -emit-llvm %s -triple %itanium_abi_triple -fexceptions -fcxx-exceptions -o - | FileCheck --check-prefix SIMD-ONLY0 %s -// RUN: %clang_cc1 -fopenmp-simd -fopenmp-enable-irbuilder -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp-simd -fopenmp-enable-irbuilder -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -debug-info-kind=limited -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY0 %s +// RUN: %clang_cc1 -disable-frozen-args -verify -fopenmp -x c++ -emit-llvm %s -triple %itanium_abi_triple -fexceptions -fcxx-exceptions -o - | FileCheck %s --check-prefixes=ALL,CHECK +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -debug-info-kind=limited -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefixes=ALL-DEBUG,CHECK-DEBUG %s +// RUN: %clang_cc1 -disable-frozen-args -verify -fopenmp -fopenmp-enable-irbuilder -DIRBUILDER -x c++ -emit-llvm %s -triple %itanium_abi_triple -fexceptions -fcxx-exceptions -o - | FileCheck %s --check-prefixes=ALL,IRBUILDER +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -fopenmp-enable-irbuilder -DIRBUILDER -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -fopenmp-enable-irbuilder -DIRBUILDER -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -debug-info-kind=limited -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefixes=ALL-DEBUG,IRBUILDER-DEBUG %s + +// RUN: %clang_cc1 -disable-frozen-args -verify -fopenmp-simd -x c++ -emit-llvm %s -triple %itanium_abi_triple -fexceptions -fcxx-exceptions -o - | FileCheck --check-prefix SIMD-ONLY0 %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp-simd -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp-simd -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -debug-info-kind=limited -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY0 %s +// RUN: %clang_cc1 -disable-frozen-args -verify -fopenmp-simd -fopenmp-enable-irbuilder -x c++ -emit-llvm %s -triple %itanium_abi_triple -fexceptions -fcxx-exceptions -o - | FileCheck --check-prefix SIMD-ONLY0 %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp-simd -fopenmp-enable-irbuilder -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp-simd -fopenmp-enable-irbuilder -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -debug-info-kind=limited -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY0 %s // SIMD-ONLY0-NOT: {{__kmpc|__tgt}} // expected-no-diagnostics #ifndef HEADER @@ -60,7 +60,7 @@ return tmain(argv); } -// ALL-LABEL: define {{[a-z\_\b]*[ ]?i32}} @main({{i32[ ]?[a-z]*}} %argc, i8** %argv) +// ALL-LABEL: define frozen {{[a-z\_\b]*[ ]?i32}} @main({{i32[ ]?[a-z]*}} %argc, i8** %argv) // ALL: store i32 %argc, i32* [[ARGC_ADDR:%.+]], // ALL: [[VLA:%.+]] = alloca i32, i{{[0-9]+}} [[VLA_SIZE:%[^,]+]], // CHECK: call {{.*}}void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* [[DEF_LOC_2]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i{{[0-9]+}}, i32*)* [[OMP_OUTLINED:@.+]] to void (i32*, i32*, ...)*), i{{[0-9]+}} [[VLA_SIZE]], i32* [[VLA]]) @@ -68,10 +68,10 @@ // CHECK: call {{.*}}void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* [[DEF_LOC_2]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i{{[0-9]+}}, i32*)* [[OMP_OUTLINED2:@.+]] to void (i32*, i32*, ...)*), i{{[0-9]+}} [[VLA_SIZE]], i32* [[VLA]]) // IRBUILDER: call {{.*}}void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* [[DEF_LOC_2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* [[OMP_OUTLINED:@.+]] to void (i32*, i32*, ...)*), i32* [[VLA]]) // ALL: [[ARGV:%.+]] = load i8**, i8*** {{%[a-z0-9.]+}} -// ALL-NEXT: [[RET:%.+]] = call {{[a-z\_\b]*[ ]?i32}} [[TMAIN:@.+tmain.+]](i8** [[ARGV]]) +// ALL-NEXT: [[RET:%.+]] = call frozen {{[a-z\_\b]*[ ]?i32}} [[TMAIN:@.+tmain.+]](i8** [[ARGV]]) // ALL: ret i32 // ALL-NEXT: } -// ALL-DEBUG-LABEL: define i32 @main(i32 %argc, i8** %argv) +// ALL-DEBUG-LABEL: define frozen i32 @main(i32 %argc, i8** %argv) // CHECK-DEBUG: [[LOC_2_ADDR:%.+]] = alloca %struct.ident_t // CHECK-DEBUG: [[KMPC_LOC_VOIDPTR:%.+]] = bitcast %struct.ident_t* [[LOC_2_ADDR]] to i8* // CHECK-DEBUG-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[KMPC_LOC_VOIDPTR]], i8* align 8 bitcast (%struct.ident_t* [[DEF_LOC_2]] to i8*), i64 24, i1 false) @@ -82,7 +82,7 @@ // CHECK-DEBUG: call {{.*}}void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* [[LOC_2_ADDR]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i32*)* [[OMP_OUTLINED:@.+]] to void (i32*, i32*, ...)*), i64 [[VLA_SIZE]], i32* [[VLA]]) // IRBUILDER-DEBUG: call {{.*}}void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @{{.*}}, i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* [[OMP_OUTLINED:@.+]] to void (i32*, i32*, ...)*), i32* [[VLA]]) // ALL-DEBUG: [[ARGV:%.+]] = load i8**, i8*** {{%[a-z0-9.]+}} -// ALL-DEBUG: [[RET:%.+]] = call i32 [[TMAIN:@.+tmain.+]](i8** [[ARGV]]) +// ALL-DEBUG: [[RET:%.+]] = call frozen i32 [[TMAIN:@.+tmain.+]](i8** [[ARGV]]) // ALL-DEBUG: ret i32 // ALL-DEBUG-NEXT: } @@ -137,13 +137,13 @@ // CHECK-DEBUG-DAG: define internal void [[OMP_OUTLINED]](i32* noalias %.global_tid., i32* noalias %.bound_tid., i64 [[VLA_SIZE:%.+]], i32* {{.+}} [[VLA_ADDR:%[^)]+]]) // CHECK-DEBUG-DAG: call void [[OMP_OUTLINED_DEBUG]] -// ALL: define linkonce_odr {{[a-z\_\b]*[ ]?i32}} [[TMAIN]](i8** %argc) +// ALL: define linkonce_odr frozen {{[a-z\_\b]*[ ]?i32}} [[TMAIN]](i8** %argc) // ALL: store i8** %argc, i8*** [[ARGC_ADDR:%.+]], // CHECK: call {{.*}}void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* [[DEF_LOC_2]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i8***, i{{64|32}})* [[OMP_OUTLINED:@.+]] to void (i32*, i32*, ...)*), i8*** [[ARGC_ADDR]], i{{64|32}} %{{.+}}) // IRBUILDER: call {{.*}}void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* [[DEF_LOC_2]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i8***, i{{64|32}})* [[OMP_OUTLINED:@.+]] to void (i32*, i32*, ...)*), i8*** [[ARGC_ADDR]], i{{64|32}} %{{.+}}) // ALL: ret i32 0 // ALL-NEXT: } -// ALL-DEBUG: define linkonce_odr i32 [[TMAIN]](i8** %argc) +// ALL-DEBUG: define linkonce_odr frozen i32 [[TMAIN]](i8** %argc) // CHECK-DEBUG-DAG: [[LOC_2_ADDR:%.+]] = alloca %struct.ident_t // CHECK-DEBUG: [[KMPC_LOC_VOIDPTR:%.+]] = bitcast %struct.ident_t* [[LOC_2_ADDR]] to i8* // CHECK-DEBUG-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[KMPC_LOC_VOIDPTR]], i8* align 8 bitcast (%struct.ident_t* [[DEF_LOC_2]] to i8*), i64 24, i1 false) diff --git a/clang/test/OpenMP/parallel_copyin_codegen.cpp b/clang/test/OpenMP/parallel_copyin_codegen.cpp --- a/clang/test/OpenMP/parallel_copyin_codegen.cpp +++ b/clang/test/OpenMP/parallel_copyin_codegen.cpp @@ -105,8 +105,8 @@ #pragma omp parallel copyin(g) { - // LAMBDA: define{{.*}} internal{{.*}} void [[OMP_REGION]](i32* noalias %{{.+}}, i32* noalias %{{.+}}) - // TLS-LAMBDA: define{{.*}} internal{{.*}} void [[OMP_REGION]](i32* noalias %{{.+}}, i32* noalias %{{.+}}, i32* nonnull align 4 dereferenceable(4) %{{.+}}) + // LAMBDA: define{{.*}} internal{{.*}} void [[OMP_REGION]](i32* frozen noalias %{{.+}}, i32* frozen noalias %{{.+}}) + // TLS-LAMBDA: define{{.*}} internal{{.*}} void [[OMP_REGION]](i32* frozen noalias %{{.+}}, i32* frozen noalias %{{.+}}, i32* frozen nonnull align 4 dereferenceable(4) %{{.+}}) // threadprivate_g = g; // LAMBDA: call {{.*}}i8* @__kmpc_threadprivate_cached({{.+}} [[G]] @@ -134,7 +134,7 @@ // TLS-LAMBDA: call{{.*}} void [[INNER_LAMBDA:@.+]](%{{.+}}* [&]() { - // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* [[ARG_PTR:%.+]]) + // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* frozen [[ARG_PTR:%.+]]) // LAMBDA: store %{{.+}}* [[ARG_PTR]], %{{.+}}** [[ARG_PTR_REF:%.+]], g = 2; // LAMBDA: [[ARG_PTR:%.+]] = load %{{.+}}*, %{{.+}}** [[ARG_PTR_REF]] @@ -160,8 +160,8 @@ #pragma omp parallel copyin(g) { - // BLOCKS: define{{.*}} internal{{.*}} void [[OMP_REGION]](i32* noalias %{{.+}}, i32* noalias %{{.+}}) - // TLS-BLOCKS: define{{.*}} internal{{.*}} void [[OMP_REGION]](i32* noalias %{{.+}}, i32* noalias %{{.+}}, i32* nonnull align 4 dereferenceable(4) %{{.+}}) + // BLOCKS: define{{.*}} internal{{.*}} void [[OMP_REGION]](i32* frozen noalias %{{.+}}, i32* frozen noalias %{{.+}}) + // TLS-BLOCKS: define{{.*}} internal{{.*}} void [[OMP_REGION]](i32* frozen noalias %{{.+}}, i32* frozen noalias %{{.+}}, i32* frozen nonnull align 4 dereferenceable(4) %{{.+}}) // threadprivate_g = g; // BLOCKS: call {{.*}}i8* @__kmpc_threadprivate_cached({{.+}} [[G]] @@ -232,7 +232,7 @@ // CHECK-LABEL: @main // CHECK: [[TEST:%.+]] = alloca [[S_FLOAT_TY]], -// CHECK: call {{.*}} [[S_FLOAT_TY_COPY_ASSIGN:@.+]]([[S_FLOAT_TY]]* [[TEST]], [[S_FLOAT_TY]]* +// CHECK: call {{.*}} [[S_FLOAT_TY_COPY_ASSIGN:@.+]]([[S_FLOAT_TY]]* frozen [[TEST]], [[S_FLOAT_TY]]* // CHECK: call {{.*}}void (%{{.+}}*, i{{[0-9]+}}, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)*, ...) @__kmpc_fork_call(%{{.+}}* @{{.+}}, i{{[0-9]+}} 0, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)* bitcast (void (i{{[0-9]+}}*, i{{[0-9]+}}*)* [[MAIN_MICROTASK:@.+]] to void (i32*, i32*, ...)*)) // CHECK: call {{.*}}void (%{{.+}}*, i{{[0-9]+}}, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)*, ...) @__kmpc_fork_call(%{{.+}}* @{{.+}}, i{{[0-9]+}} 0, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)* bitcast (void (i{{[0-9]+}}*, i{{[0-9]+}}*)* [[MAIN_MICROTASK1:@.+]] to void (i32*, i32*, ...)*)) // CHECK: = call {{.*}}i{{.+}} [[TMAIN_INT:@.+]]() @@ -241,19 +241,19 @@ // TLS-CHECK-LABEL: @main // TLS-CHECK: [[TEST:%.+]] = alloca [[S_FLOAT_TY]], -// TLS-CHECK: call {{.*}} [[S_FLOAT_TY_COPY_ASSIGN:@.+]]([[S_FLOAT_TY]]* [[TEST]], [[S_FLOAT_TY]]* +// TLS-CHECK: call {{.*}} [[S_FLOAT_TY_COPY_ASSIGN:@.+]]([[S_FLOAT_TY]]* frozen [[TEST]], [[S_FLOAT_TY]]* // TLS-CHECK: call {{.*}}void (%{{.+}}*, i{{[0-9]+}}, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)*, ...) @__kmpc_fork_call(%{{.+}}* @{{.+}}, i{{[0-9]+}} 4, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)* bitcast (void (i{{[0-9]+}}*, i{{[0-9]+}}*, i32*, [2 x i32]*, [2 x [[S_FLOAT_TY]]]*, [[S_FLOAT_TY]]*)* [[MAIN_MICROTASK:@.+]] to void (i32*, i32*, ...)*), // TLS-CHECK: call {{.*}}void (%{{.+}}*, i{{[0-9]+}}, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)*, ...) @__kmpc_fork_call(%{{.+}}* @{{.+}}, i{{[0-9]+}} 1, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)* bitcast (void (i{{[0-9]+}}*, i{{[0-9]+}}*, i32*)* [[MAIN_MICROTASK1:@.+]] to void (i32*, i32*, ...)*), // TLS-CHECK: = call {{.*}}i{{.+}} [[TMAIN_INT:@.+]]() // TLS-CHECK: call {{.*}} [[S_FLOAT_TY_DESTR:@.+]]([[S_FLOAT_TY]]* // TLS-CHECK: ret -// CHECK: define internal {{.*}}void [[MAIN_MICROTASK]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}) +// CHECK: define internal {{.*}}void [[MAIN_MICROTASK]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}) // CHECK: store i{{[0-9]+}}* [[GTID_ADDR]], i{{[0-9]+}}** [[GTID_ADDR_ADDR:%.+]], // CHECK: [[GTID_ADDR:%.+]] = load i32*, i32** [[GTID_ADDR_ADDR]], // CHECK: [[GTID:%.+]] = load i32, i32* [[GTID_ADDR]], -// TLS-CHECK: define internal {{.*}}void [[MAIN_MICROTASK]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}, +// TLS-CHECK: define internal {{.*}}void [[MAIN_MICROTASK]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}} // TLS-CHECK: store i{{[0-9]+}}* [[GTID_ADDR]], i{{[0-9]+}}** [[GTID_ADDR_ADDR:%.+]], // threadprivate_t_var = t_var; @@ -306,7 +306,7 @@ // threadprivate_var = var; // CHECK: call {{.*}}i8* @__kmpc_threadprivate_cached({{.+}} [[VAR]] -// CHECK: call {{.*}} [[S_FLOAT_TY_COPY_ASSIGN]]([[S_FLOAT_TY]]* {{%.+}}, [[S_FLOAT_TY]]* {{.*}}[[VAR]]) +// CHECK: call {{.*}} [[S_FLOAT_TY_COPY_ASSIGN]]([[S_FLOAT_TY]]* frozen {{%.+}}, [[S_FLOAT_TY]]* {{.*}}[[VAR]]) // CHECK: [[DONE]] // TLS-CHECK: call {{.*}} [[S_FLOAT_TY_COPY_ASSIGN]]([[S_FLOAT_TY]]* {{.*}}[[VAR]], [[S_FLOAT_TY]]* {{.*}}[[MASTER_REF4]]) @@ -319,12 +319,12 @@ // TLS-CHECK: call {{.*}}void @__kmpc_barrier(%{{.+}}* [[IMPLICIT_BARRIER_LOC]], i32 [[GTID]]) // TLS-CHECK: ret void -// CHECK: define internal {{.*}}void [[MAIN_MICROTASK1]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}) +// CHECK: define internal {{.*}}void [[MAIN_MICROTASK1]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}) // CHECK: store i{{[0-9]+}}* [[GTID_ADDR]], i{{[0-9]+}}** [[GTID_ADDR_ADDR:%.+]], // CHECK: [[GTID_ADDR:%.+]] = load i32*, i32** [[GTID_ADDR_ADDR]], // CHECK: [[GTID:%.+]] = load i32, i32* [[GTID_ADDR]], -// TLS-CHECK: define internal {{.*}}void [[MAIN_MICROTASK1]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}) +// TLS-CHECK: define internal {{.*}}void [[MAIN_MICROTASK1]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}) // TLS-CHECK: store i{{[0-9]+}}* [[GTID_ADDR]], i{{[0-9]+}}** [[GTID_ADDR_ADDR:%.+]], // threadprivate_t_var = t_var; @@ -358,7 +358,7 @@ // CHECK: define {{.*}} i{{[0-9]+}} [[TMAIN_INT]]() // CHECK: [[TEST:%.+]] = alloca [[S_INT_TY]], -// CHECK: call {{.*}} [[S_INT_TY_COPY_ASSIGN:@.+]]([[S_INT_TY]]* [[TEST]], [[S_INT_TY]]* +// CHECK: call {{.*}} [[S_INT_TY_COPY_ASSIGN:@.+]]([[S_INT_TY]]* frozen [[TEST]], [[S_INT_TY]]* // CHECK: call {{.*}}void (%{{.+}}*, i{{[0-9]+}}, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)*, ...) @__kmpc_fork_call(%{{.+}}* @{{.+}}, i{{[0-9]+}} 0, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)* bitcast (void (i{{[0-9]+}}*, i{{[0-9]+}}*)* [[TMAIN_MICROTASK:@.+]] to void (i32*, i32*, ...)*)) // CHECK: call {{.*}}void (%{{.+}}*, i{{[0-9]+}}, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)*, ...) @__kmpc_fork_call(%{{.+}}* @{{.+}}, i{{[0-9]+}} 0, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)* bitcast (void (i{{[0-9]+}}*, i{{[0-9]+}}*)* [[TMAIN_MICROTASK1:@.+]] to void (i32*, i32*, ...)*)) // CHECK: call {{.*}} [[S_INT_TY_DESTR:@.+]]([[S_INT_TY]]* @@ -366,16 +366,16 @@ // TLS-CHECK: define {{.*}} i{{[0-9]+}} [[TMAIN_INT]]() // TLS-CHECK: [[TEST:%.+]] = alloca [[S_INT_TY]], -// TLS-CHECK: call {{.*}} [[S_INT_TY_COPY_ASSIGN:@.+]]([[S_INT_TY]]* [[TEST]], [[S_INT_TY]]* +// TLS-CHECK: call {{.*}} [[S_INT_TY_COPY_ASSIGN:@.+]]([[S_INT_TY]]* frozen [[TEST]], [[S_INT_TY]]* // TLS-CHECK: call {{.*}}void (%{{.+}}*, i{{[0-9]+}}, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)*, ...) @__kmpc_fork_call(%{{.+}}* @{{.+}}, i{{[0-9]+}} 4, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)* bitcast (void (i{{[0-9]+}}*, i{{[0-9]+}}*, i32*, [2 x i32]*, [2 x [[S_INT_TY]]]*, [[S_INT_TY]]*)* [[TMAIN_MICROTASK:@.+]] to void (i32*, i32*, ...)*), // TLS-CHECK: call {{.*}}void (%{{.+}}*, i{{[0-9]+}}, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)*, ...) @__kmpc_fork_call(%{{.+}}* @{{.+}}, i{{[0-9]+}} 1, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)* bitcast (void (i{{[0-9]+}}*, i{{[0-9]+}}*, i32*)* [[TMAIN_MICROTASK1:@.+]] to void (i32*, i32*, ...)*), // -// CHECK: define internal {{.*}}void [[TMAIN_MICROTASK]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}) +// CHECK: define internal {{.*}}void [[TMAIN_MICROTASK]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}) // CHECK: store i{{[0-9]+}}* [[GTID_ADDR]], i{{[0-9]+}}** [[GTID_ADDR_ADDR:%.+]], // CHECK: [[GTID_ADDR:%.+]] = load i32*, i32** [[GTID_ADDR_ADDR]], // CHECK: [[GTID:%.+]] = load i32, i32* [[GTID_ADDR]], // -// TLS-CHECK: define internal {{.*}}void [[TMAIN_MICROTASK]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}) +// TLS-CHECK: define internal {{.*}}void [[TMAIN_MICROTASK]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}) // TLS-CHECK: store i{{[0-9]+}}* [[GTID_ADDR]], i{{[0-9]+}}** [[GTID_ADDR_ADDR:%.+]], // threadprivate_t_var = t_var; @@ -428,7 +428,7 @@ // threadprivate_var = var; // CHECK: call {{.*}}i8* @__kmpc_threadprivate_cached({{.+}} [[TMAIN_VAR]] -// CHECK: call {{.*}} [[S_INT_TY_COPY_ASSIGN]]([[S_INT_TY]]* {{%.+}}, [[S_INT_TY]]* {{.*}}[[TMAIN_VAR]]) +// CHECK: call {{.*}} [[S_INT_TY_COPY_ASSIGN]]([[S_INT_TY]]* frozen {{%.+}}, [[S_INT_TY]]* {{.*}}[[TMAIN_VAR]]) // CHECK: [[DONE]] // TLS-CHECK: call {{.*}} [[S_INT_TY_COPY_ASSIGN]]([[S_INT_TY]]* {{.*}}[[TMAIN_VAR]], [[S_INT_TY]]* {{.*}}[[MASTER_REF3]]) @@ -441,12 +441,12 @@ // TLS-CHECK: call {{.*}}void @__kmpc_barrier(%{{.+}}* [[IMPLICIT_BARRIER_LOC]], i32 [[GTID]]) // TLS-CHECK: ret void -// CHECK: define internal {{.*}}void [[TMAIN_MICROTASK1]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}) +// CHECK: define internal {{.*}}void [[TMAIN_MICROTASK1]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}) // CHECK: store i{{[0-9]+}}* [[GTID_ADDR]], i{{[0-9]+}}** [[GTID_ADDR_ADDR:%.+]], // CHECK: [[GTID_ADDR:%.+]] = load i32*, i32** [[GTID_ADDR_ADDR]], // CHECK: [[GTID:%.+]] = load i32, i32* [[GTID_ADDR]], -// TLS-CHECK: define internal {{.*}}void [[TMAIN_MICROTASK1]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}, +// TLS-CHECK: define internal {{.*}}void [[TMAIN_MICROTASK1]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}} // TLS-CHECK: store i{{[0-9]+}}* [[GTID_ADDR]], i{{[0-9]+}}** [[GTID_ADDR_ADDR:%.+]], // threadprivate_t_var = t_var; @@ -495,13 +495,13 @@ // ARRAY: @__kmpc_fork_call( // ARRAY: call i8* @__kmpc_threadprivate_cached( // ARRAY: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 %{{.+}}, i8* align 4 bitcast ([2 x i32]* @{{.+}} to i8*), i64 8, i1 false) -// ARRAY: call nonnull align 4 dereferenceable(8) %struct.St* @{{.+}}(%struct.St* %{{.+}}, %struct.St* nonnull align 4 dereferenceable(8) %{{.+}}) +// ARRAY: call frozen nonnull align 4 dereferenceable(8) %struct.St* @{{.+}}(%struct.St* frozen %{{.+}}, %struct.St* frozen nonnull align 4 dereferenceable(8) %{{.+}}) // TLS-ARRAY: @__kmpc_fork_call( // TLS-ARRAY: [[REFT:%.+]] = load [2 x i32]*, [2 x i32]** [[ADDR:%.+]], // TLS-ARRAY: [[REF:%.+]] = bitcast [2 x i32]* [[REFT]] to i8* // TLS-ARRAY: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 bitcast ([2 x i32]* @{{.+}} to i8*), i8* align 4 [[REF]], i64 8, i1 false) -// TLS-ARRAY: call nonnull align 4 dereferenceable(8) %struct.St* @{{.+}}(%struct.St* %{{.+}}, %struct.St* nonnull align 4 dereferenceable(8) %{{.+}}) +// TLS-ARRAY: call frozen nonnull align 4 dereferenceable(8) %struct.St* @{{.+}}(%struct.St* frozen %{{.+}}, %struct.St* frozen nonnull align 4 dereferenceable(8) %{{.+}}) #pragma omp threadprivate(a, s) #pragma omp parallel copyin(a, s) diff --git a/clang/test/OpenMP/parallel_firstprivate_codegen.cpp b/clang/test/OpenMP/parallel_firstprivate_codegen.cpp --- a/clang/test/OpenMP/parallel_firstprivate_codegen.cpp +++ b/clang/test/OpenMP/parallel_firstprivate_codegen.cpp @@ -170,12 +170,12 @@ // LAMBDA: call void (%{{.+}}*, i{{[0-9]+}}, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)*, ...) @__kmpc_fork_call(%{{.+}}* @{{.+}}, i{{[0-9]+}} 5, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)* bitcast (void (i{{[0-9]+}}*, i{{[0-9]+}}*, [[SS_TY]]*, [[iz:i64|i32]], {{i64|i32}}, {{i64|i32}}, [4 x i{{[0-9]+}}]*)* [[SS_MICROTASK:@.+]] to void // LAMBDA: ret - // LAMBDA: define internal void [[SS_MICROTASK]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}, [[SS_TY]]* %{{.+}}, [[iz]] {{.+}}, [[iz]] {{.+}}, [[iz]] {{.+}}, [4 x i{{[0-9]+}}]* {{.+}}) + // LAMBDA: define internal void [[SS_MICROTASK]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}, [[SS_TY]]* frozen %{{.+}}, [[iz]] {{.+}}, [[iz]] {{.+}}, [[iz]] {{.+}}, [4 x i{{[0-9]+}}]* {{.+}}) // LAMBDA-NOT: getelementptr {{.*}}[[SS_TY]], [[SS_TY]]* % // LAMBDA: call{{.*}} void // LAMBDA: ret void - // LAMBDA: define internal void @{{.+}}(i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}, [[SS_TY]]* %{{.+}}, [[iz]] {{.+}}, [[iz]] {{.+}}, [[iz]] {{.+}}) + // LAMBDA: define internal void @{{.+}}(i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}, [[SS_TY]]* frozen %{{.+}}, [[iz]] {{.+}}, [[iz]] {{.+}}, [[iz]] {{.+}}) // LAMBDA: [[A_PRIV:%.+]] = alloca i{{[0-9]+}}, // LAMBDA: [[B_PRIV:%.+]] = alloca i{{[0-9]+}}, // LAMBDA: [[C_PRIV:%.+]] = alloca i{{[0-9]+}}, @@ -201,7 +201,7 @@ // LAMBDA-NEXT: store i{{[0-9]+}} [[DIV]], i{{[0-9]+}}* [[C_PRIV]], // LAMBDA-NEXT: ret void - // LAMBDA: define{{.*}} internal{{.*}} void [[OMP_REGION]](i32* noalias %{{.+}}, i32* noalias %{{.+}}, i32* nonnull align 4 dereferenceable(4) %{{.+}}, [[iz]] {{.*}}%{{.+}}) + // LAMBDA: define{{.*}} internal{{.*}} void [[OMP_REGION]](i32* frozen noalias %{{.+}}, i32* frozen noalias %{{.+}}, i32* frozen nonnull align 4 dereferenceable(4) %{{.+}}, [[iz]] {{.*}}%{{.+}}) // LAMBDA: [[SIVAR_PRIVATE_ADDR:%.+]] = alloca i{{[0-9]+}}, // LAMBDA: [[G_PRIVATE_ADDR:%.+]] = alloca i{{[0-9]+}}, align 128 // LAMBDA: [[G_REF:%.+]] = load i{{[0-9]+}}*, i{{[0-9]+}}** [[G_REF_ADDR:%.+]] @@ -219,9 +219,9 @@ // LAMBDA: [[SIVAR_PRIVATE_ADDR_REF:%.+]] = getelementptr inbounds %{{.+}}, %{{.+}}* [[ARG:%.+]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 // LAMBDA-64: store i{{[0-9]+}}* [[SIVAR_PRIVATE_CONV]], i{{[0-9]+}}** [[SIVAR_PRIVATE_ADDR_REF]] // LAMBDA-32: store i{{[0-9]+}}* [[SIVAR_PRIVATE_ADDR]], i{{[0-9]+}}** [[SIVAR_PRIVATE_ADDR_REF]] - // LAMBDA: call{{.*}} void [[INNER_LAMBDA:@.+]](%{{.+}}* [[ARG]]) + // LAMBDA: call{{.*}} void [[INNER_LAMBDA:@.+]](%{{.+}}* frozen [[ARG]]) [&]() { - // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* [[ARG_PTR:%.+]]) + // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* frozen [[ARG_PTR:%.+]]) // LAMBDA: store %{{.+}}* [[ARG_PTR]], %{{.+}}** [[ARG_PTR_REF:%.+]], g = 2; sivar = 4; @@ -245,7 +245,7 @@ // BLOCKS: call {{.*}}void {{.+}} @__kmpc_fork_call({{.+}}, i32 2, {{.+}}* [[OMP_REGION:@.+]] to {{.+}}, i32* [[G]], {{.+}}) #pragma omp parallel firstprivate(g, sivar) { - // BLOCKS: define{{.*}} internal{{.*}} void [[OMP_REGION]](i32* noalias %{{.+}}, i32* noalias %{{.+}}, i32* nonnull align 4 dereferenceable(4) %{{.+}}, [[iz:i64|i32]] {{.*}}%{{.+}}) + // BLOCKS: define{{.*}} internal{{.*}} void [[OMP_REGION]](i32* frozen noalias %{{.+}}, i32* frozen noalias %{{.+}}, i32* frozen nonnull align 4 dereferenceable(4) %{{.+}}, [[iz:i64|i32]] {{.*}}%{{.+}}) // BLOCKS: [[SIVAR_PRIVATE_ADDR:%.+]] = alloca i{{[0-9]+}}, // BLOCKS: [[G_PRIVATE_ADDR:%.+]] = alloca i{{[0-9]+}}, align 128 // BLOCKS: [[G_REF:%.+]] = load i{{[0-9]+}}*, i{{[0-9]+}}** [[G_REF_ADDR:%.+]] @@ -293,12 +293,12 @@ // BLOCKS: call void (%{{.+}}*, i{{[0-9]+}}, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)*, ...) @__kmpc_fork_call(%{{.+}}* @{{.+}}, i{{[0-9]+}} 5, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)* bitcast (void (i{{[0-9]+}}*, i{{[0-9]+}}*, [[SS_TY]]*, [[iz]], [[iz]], [[iz]], [4 x i{{[0-9]+}}]*)* [[SS_MICROTASK:@.+]] to void // BLOCKS: ret -// BLOCKS: define internal void [[SS_MICROTASK]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}, [[SS_TY]]* %{{.+}}, [[iz]] {{.+}}, [[iz]] {{.+}}, [[iz]] {{.+}}, [4 x i{{[0-9]+}}]* {{.+}}) +// BLOCKS: define internal void [[SS_MICROTASK]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}, [[SS_TY]]* frozen %{{.+}}, [[iz]] {{.+}}, [[iz]] {{.+}}, [[iz]] {{.+}}, [4 x i{{[0-9]+}}]* {{.+}}) // BLOCKS-NOT: getelementptr {{.*}}[[SS_TY]], [[SS_TY]]* % // BLOCKS: call{{.*}} void // BLOCKS: ret void -// BLOCKS: define internal void @{{.+}}(i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}, [[SS_TY]]* %{{.+}}, [[iz]] {{.+}}, [[iz]] {{.+}}, [[iz]] {{.+}}) +// BLOCKS: define internal void @{{.+}}(i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}, [[SS_TY]]* frozen %{{.+}}, [[iz]] {{.+}}, [[iz]] {{.+}}, [[iz]] {{.+}}) // BLOCKS: [[A_PRIV:%.+]] = alloca i{{[0-9]+}}, // BLOCKS: [[B_PRIV:%.+]] = alloca i{{[0-9]+}}, // BLOCKS: [[C_PRIV:%.+]] = alloca i{{[0-9]+}}, @@ -349,7 +349,7 @@ // CHECK: [[SIVARCAST:%.+]] = alloca [[iz]], // CHECK: [[A:%.+]] = alloca i32, // CHECK: [[T_VARCAST1:%.+]] = alloca [[iz:i64|i32]], -// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR:@.+]]([[S_FLOAT_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR:@.+]]([[S_FLOAT_TY]]* frozen [[TEST]]) // CHECK: [[T_VARVAL:%.+]] = load i32, i32* [[T_VAR]], // CHECK-64: [[T_VARCONV:%.+]] = bitcast i64* [[T_VARCAST]] to i32* // CHECK-64: store i32 [[T_VARVAL]], i32* [[T_VARCONV]], @@ -371,7 +371,7 @@ // CHECK: call {{.*}} [[S_FLOAT_TY_DESTR:@.+]]([[S_FLOAT_TY]]* // CHECK: ret // -// CHECK: define internal {{.*}}void [[MAIN_MICROTASK]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}, [2 x i32]* nonnull align 4 dereferenceable(8) %{{.+}}, [[iz]] {{.*}}%{{.+}}, [2 x [[S_FLOAT_TY]]]* nonnull align 4 dereferenceable(8) %{{.+}}, [[S_FLOAT_TY]]* nonnull align 4 dereferenceable(4) %{{.+}}, [[iz]] {{.*}}[[SIVAR:%.+]]) +// CHECK: define internal {{.*}}void [[MAIN_MICROTASK]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}, [2 x i32]* frozen nonnull align 4 dereferenceable(8) %{{.+}}, [[iz]] {{.*}}%{{.+}}, [2 x [[S_FLOAT_TY]]]* frozen nonnull align 4 dereferenceable(8) %{{.+}}, [[S_FLOAT_TY]]* frozen nonnull align 4 dereferenceable(4) %{{.+}}, [[iz]] {{.*}}[[SIVAR:%.+]]) // CHECK: [[T_VAR_PRIV:%.+]] = alloca i{{[0-9]+}}, // CHECK: [[SIVAR7_PRIV:%.+]] = alloca i{{[0-9]+}}, // CHECK: [[VEC_PRIV:%.+]] = alloca [2 x i{{[0-9]+}}], @@ -395,23 +395,23 @@ // CHECK: [[IS_EMPTY:%.+]] = icmp eq [[S_FLOAT_TY]]* [[S_ARR_PRIV_BEGIN]], [[S_ARR_PRIV_END]] // CHECK: br i1 [[IS_EMPTY]], label %[[S_ARR_BODY_DONE:.+]], label %[[S_ARR_BODY:.+]] // CHECK: [[S_ARR_BODY]] -// CHECK: call {{.*}} [[ST_TY_DEFAULT_CONSTR:@.+]]([[ST_TY]]* [[ST_TY_TEMP:%.+]]) -// CHECK: call {{.*}} [[S_FLOAT_TY_COPY_CONSTR:@.+]]([[S_FLOAT_TY]]* {{.+}}, [[S_FLOAT_TY]]* {{.+}}, [[ST_TY]]* [[ST_TY_TEMP]]) -// CHECK: call {{.*}} [[ST_TY_DESTR:@.+]]([[ST_TY]]* [[ST_TY_TEMP]]) +// CHECK: call {{.*}} [[ST_TY_DEFAULT_CONSTR:@.+]]([[ST_TY]]* frozen [[ST_TY_TEMP:%.+]]) +// CHECK: call {{.*}} [[S_FLOAT_TY_COPY_CONSTR:@.+]]([[S_FLOAT_TY]]* {{.+}}, [[S_FLOAT_TY]]* {{.+}}, [[ST_TY]]* frozen [[ST_TY_TEMP]]) +// CHECK: call {{.*}} [[ST_TY_DESTR:@.+]]([[ST_TY]]* frozen [[ST_TY_TEMP]]) // CHECK: br i1 {{.+}}, label %{{.+}}, label %[[S_ARR_BODY]] -// CHECK: call {{.*}} [[ST_TY_DEFAULT_CONSTR]]([[ST_TY]]* [[ST_TY_TEMP:%.+]]) -// CHECK: call {{.*}} [[S_FLOAT_TY_COPY_CONSTR]]([[S_FLOAT_TY]]* [[VAR_PRIV]], [[S_FLOAT_TY]]* {{.*}} [[VAR_REF]], [[ST_TY]]* [[ST_TY_TEMP]]) -// CHECK: call {{.*}} [[ST_TY_DESTR]]([[ST_TY]]* [[ST_TY_TEMP]]) +// CHECK: call {{.*}} [[ST_TY_DEFAULT_CONSTR]]([[ST_TY]]* frozen [[ST_TY_TEMP:%.+]]) +// CHECK: call {{.*}} [[S_FLOAT_TY_COPY_CONSTR]]([[S_FLOAT_TY]]* frozen [[VAR_PRIV]], [[S_FLOAT_TY]]* {{.*}} [[VAR_REF]], [[ST_TY]]* frozen [[ST_TY_TEMP]]) +// CHECK: call {{.*}} [[ST_TY_DESTR]]([[ST_TY]]* frozen [[ST_TY_TEMP]]) // CHECK-64: store i{{[0-9]+}} 2, i{{[0-9]+}}* [[SIVAR7_CONV]], // CHECK-32: store i{{[0-9]+}} 2, i{{[0-9]+}}* [[SIVAR7_PRIV]], -// CHECK-DAG: call {{.*}} [[S_FLOAT_TY_DESTR]]([[S_FLOAT_TY]]* [[VAR_PRIV]]) +// CHECK-DAG: call {{.*}} [[S_FLOAT_TY_DESTR]]([[S_FLOAT_TY]]* frozen [[VAR_PRIV]]) // CHECK-DAG: call {{.*}} [[S_FLOAT_TY_DESTR]]([[S_FLOAT_TY]]* // CHECK: ret void -// CHECK: define internal void [[MAIN_MICROTASK1]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}, [[iz]] [[T_VAR:%.+]]) +// CHECK: define internal void [[MAIN_MICROTASK1]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}, [[iz]] frozen [[T_VAR:%.+]]) // CHECK: [[GTID_ADDR:%.+]] = alloca i32*, // CHECK: store [[iz]] [[T_VAR]], [[iz]]* [[T_VAR_ADDR:%.+]], // CHECK-64: [[BC:%.+]] = bitcast [[iz]]* [[T_VAR_ADDR]] to i32* @@ -429,7 +429,7 @@ // CHECK: define {{.*}} i{{[0-9]+}} [[TMAIN_INT]]() // CHECK: [[TEST:%.+]] = alloca [[S_INT_TY]], -// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR:@.+]]([[S_INT_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR:@.+]]([[S_INT_TY]]* frozen [[TEST]]) // CHECK: call {{.*}}void (%{{.+}}*, i{{[0-9]+}}, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)*, ...) @__kmpc_fork_call(%{{.+}}* @{{.+}}, i{{[0-9]+}} 4, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)* bitcast (void (i{{[0-9]+}}*, i{{[0-9]+}}*, [2 x i32]*, i32*, [2 x [[S_INT_TY]]]*, [[S_INT_TY]]*)* [[TMAIN_MICROTASK:@.+]] to void // CHECK: call {{.*}} [[S_INT_TY_DESTR:@.+]]([[S_INT_TY]]* // CHECK: ret @@ -446,7 +446,7 @@ // CHECK: call void (%{{.+}}*, i{{[0-9]+}}, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)*, ...) @__kmpc_fork_call(%{{.+}}* @{{.+}}, i{{[0-9]+}} 5, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)* bitcast (void (i{{[0-9]+}}*, i{{[0-9]+}}*, [[SS_TY]]*, [[iz]], [[iz]], [[iz]], [4 x i32]*)* [[SS_MICROTASK:@.+]] to void // CHECK: ret -// CHECK: define internal void [[SS_MICROTASK]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}, [[SS_TY]]* %{{.+}}, [[iz]] {{.+}}, [[iz]] {{.+}}, [[iz]] {{.+}}, [4 x i{{[0-9]+}}]* {{.+}}) +// CHECK: define internal void [[SS_MICROTASK]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}, [[SS_TY]]* frozen %{{.+}}, [[iz]] {{.+}}, [[iz]] {{.+}}, [[iz]] {{.+}}, [4 x i{{[0-9]+}}]* {{.+}}) // CHECK: [[A_PRIV:%.+]] = alloca i{{[0-9]+}}, // CHECK: [[B_PRIV:%.+]] = alloca i{{[0-9]+}}, // CHECK: [[C_PRIV:%.+]] = alloca i{{[0-9]+}}, @@ -483,7 +483,7 @@ // CHECK-NEXT: store i32 1111, i32* [[E_PRIV_2]], // CHECK-NEXT: ret void -// CHECK: define internal {{.*}}void [[TMAIN_MICROTASK]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}, [2 x i32]* nonnull align 4 dereferenceable(8) %{{.+}}, i32* nonnull align 4 dereferenceable(4) %{{.+}}, [2 x [[S_INT_TY]]]* nonnull align 4 dereferenceable(8) %{{.+}}, [[S_INT_TY]]* nonnull align 4 dereferenceable(4) %{{.+}}) +// CHECK: define internal {{.*}}void [[TMAIN_MICROTASK]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}, [2 x i32]* frozen nonnull align 4 dereferenceable(8) %{{.+}}, i32* frozen nonnull align 4 dereferenceable(4) %{{.+}}, [2 x [[S_INT_TY]]]* frozen nonnull align 4 dereferenceable(8) %{{.+}}, [[S_INT_TY]]* frozen nonnull align 4 dereferenceable(4) %{{.+}}) // CHECK: [[T_VAR_PRIV:%.+]] = alloca i{{[0-9]+}}, align 128 // CHECK: [[VEC_PRIV:%.+]] = alloca [2 x i{{[0-9]+}}], align 128 // CHECK: [[S_ARR_PRIV:%.+]] = alloca [2 x [[S_INT_TY]]], align 128 @@ -506,15 +506,15 @@ // CHECK: [[IS_EMPTY:%.+]] = icmp eq [[S_INT_TY]]* [[S_ARR_PRIV_BEGIN]], [[S_ARR_PRIV_END]] // CHECK: br i1 [[IS_EMPTY]], label %[[S_ARR_BODY_DONE:.+]], label %[[S_ARR_BODY:.+]] // CHECK: [[S_ARR_BODY]] -// CHECK: call {{.*}} [[ST_TY_DEFAULT_CONSTR]]([[ST_TY]]* [[ST_TY_TEMP:%.+]]) -// CHECK: call {{.*}} [[S_INT_TY_COPY_CONSTR:@.+]]([[S_INT_TY]]* {{.+}}, [[S_INT_TY]]* {{.+}}, [[ST_TY]]* [[ST_TY_TEMP]]) -// CHECK: call {{.*}} [[ST_TY_DESTR]]([[ST_TY]]* [[ST_TY_TEMP]]) +// CHECK: call {{.*}} [[ST_TY_DEFAULT_CONSTR]]([[ST_TY]]* frozen [[ST_TY_TEMP:%.+]]) +// CHECK: call {{.*}} [[S_INT_TY_COPY_CONSTR:@.+]]([[S_INT_TY]]* {{.+}}, [[S_INT_TY]]* {{.+}}, [[ST_TY]]* frozen [[ST_TY_TEMP]]) +// CHECK: call {{.*}} [[ST_TY_DESTR]]([[ST_TY]]* frozen [[ST_TY_TEMP]]) // CHECK: br i1 {{.+}}, label %{{.+}}, label %[[S_ARR_BODY]] -// CHECK: call {{.*}} [[ST_TY_DEFAULT_CONSTR]]([[ST_TY]]* [[ST_TY_TEMP:%.+]]) -// CHECK: call {{.*}} [[S_INT_TY_COPY_CONSTR]]([[S_INT_TY]]* [[VAR_PRIV]], [[S_INT_TY]]* {{.*}} [[VAR_REF]], [[ST_TY]]* [[ST_TY_TEMP]]) -// CHECK: call {{.*}} [[ST_TY_DESTR]]([[ST_TY]]* [[ST_TY_TEMP]]) +// CHECK: call {{.*}} [[ST_TY_DEFAULT_CONSTR]]([[ST_TY]]* frozen [[ST_TY_TEMP:%.+]]) +// CHECK: call {{.*}} [[S_INT_TY_COPY_CONSTR]]([[S_INT_TY]]* frozen [[VAR_PRIV]], [[S_INT_TY]]* {{.*}} [[VAR_REF]], [[ST_TY]]* frozen [[ST_TY_TEMP]]) +// CHECK: call {{.*}} [[ST_TY_DESTR]]([[ST_TY]]* frozen [[ST_TY_TEMP]]) // CHECK-NOT: call {{.*}}void @__kmpc_barrier( -// CHECK-DAG: call {{.*}} [[S_INT_TY_DESTR]]([[S_INT_TY]]* [[VAR_PRIV]]) +// CHECK-DAG: call {{.*}} [[S_INT_TY_DESTR]]([[S_INT_TY]]* frozen [[VAR_PRIV]]) // CHECK-DAG: call {{.*}} [[S_INT_TY_DESTR]]([[S_INT_TY]]* // CHECK: ret void diff --git a/clang/test/OpenMP/parallel_for_codegen.cpp b/clang/test/OpenMP/parallel_for_codegen.cpp --- a/clang/test/OpenMP/parallel_for_codegen.cpp +++ b/clang/test/OpenMP/parallel_for_codegen.cpp @@ -50,7 +50,7 @@ void without_schedule_clause(float *a, float *b, float *c, float *d) { #pragma omp parallel for // CHECK: call void ([[IDENT_T_TY]]*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call([[IDENT_T_TY]]* [[DEFAULT_LOC:[@%].+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, float**, float**, float**, float**)* [[OMP_PARALLEL_FUNC:@.+]] to void (i32*, i32*, ...)*), -// CHECK: define internal void [[OMP_PARALLEL_FUNC]](i32* noalias [[GTID_PARAM_ADDR:%.+]], i32* noalias %{{.+}}, float** nonnull align 8 dereferenceable(8) %{{.+}}, float** nonnull align 8 dereferenceable(8) %{{.+}}, float** nonnull align 8 dereferenceable(8) %{{.+}}, float** nonnull align 8 dereferenceable(8) %{{.+}}) +// CHECK: define internal void [[OMP_PARALLEL_FUNC]](i32* frozen noalias [[GTID_PARAM_ADDR:%.+]], i32* frozen noalias %{{.+}}, float** frozen nonnull align 8 dereferenceable(8) %{{.+}}, float** frozen nonnull align 8 dereferenceable(8) %{{.+}}, float** frozen nonnull align 8 dereferenceable(8) %{{.+}}, float** frozen nonnull align 8 dereferenceable(8) %{{.+}}) // CHECK: store i32* [[GTID_PARAM_ADDR]], i32** [[GTID_REF_ADDR:%.+]], // CHECK: call void @__kmpc_for_static_init_4([[IDENT_T_TY]]* [[LOOP_LOC]], i32 [[GTID:%.+]], i32 34, i32* [[IS_LAST:%[^,]+]], i32* [[OMP_LB:%[^,]+]], i32* [[OMP_UB:%[^,]+]], i32* [[OMP_ST:%[^,]+]], i32 1, i32 1) // UB = min(UB, GlobalUB) @@ -91,7 +91,7 @@ void static_not_chunked(float *a, float *b, float *c, float *d) { #pragma omp parallel for schedule(static) // CHECK: call void ([[IDENT_T_TY]]*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call([[IDENT_T_TY]]* [[DEFAULT_LOC:[@%].+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, float**, float**, float**, float**)* [[OMP_PARALLEL_FUNC:@.+]] to void (i32*, i32*, ...)*), -// CHECK: define internal void [[OMP_PARALLEL_FUNC]](i32* noalias [[GTID_PARAM_ADDR:%.+]], i32* noalias %{{.+}}, float** nonnull align 8 dereferenceable(8) %{{.+}}, float** nonnull align 8 dereferenceable(8) %{{.+}}, float** nonnull align 8 dereferenceable(8) %{{.+}}, float** nonnull align 8 dereferenceable(8) %{{.+}}) +// CHECK: define internal void [[OMP_PARALLEL_FUNC]](i32* frozen noalias [[GTID_PARAM_ADDR:%.+]], i32* frozen noalias %{{.+}}, float** frozen nonnull align 8 dereferenceable(8) %{{.+}}, float** frozen nonnull align 8 dereferenceable(8) %{{.+}}, float** frozen nonnull align 8 dereferenceable(8) %{{.+}}, float** frozen nonnull align 8 dereferenceable(8) %{{.+}}) // CHECK: store i32* [[GTID_PARAM_ADDR]], i32** [[GTID_REF_ADDR:%.+]], // CHECK: call void @__kmpc_for_static_init_4([[IDENT_T_TY]]* [[LOOP_LOC]], i32 [[GTID:%.+]], i32 34, i32* [[IS_LAST:%[^,]+]], i32* [[OMP_LB:%[^,]+]], i32* [[OMP_UB:%[^,]+]], i32* [[OMP_ST:%[^,]+]], i32 1, i32 1) // UB = min(UB, GlobalUB) @@ -132,7 +132,7 @@ void static_chunked(float *a, float *b, float *c, float *d) { #pragma omp parallel for schedule(static, 5) // CHECK: call void ([[IDENT_T_TY]]*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call([[IDENT_T_TY]]* [[DEFAULT_LOC:[@%].+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, float**, float**, float**, float**)* [[OMP_PARALLEL_FUNC:@.+]] to void (i32*, i32*, ...)*), -// CHECK: define internal void [[OMP_PARALLEL_FUNC]](i32* noalias [[GTID_PARAM_ADDR:%.+]], i32* noalias %{{.+}}, float** nonnull align 8 dereferenceable(8) %{{.+}}, float** nonnull align 8 dereferenceable(8) %{{.+}}, float** nonnull align 8 dereferenceable(8) %{{.+}}, float** nonnull align 8 dereferenceable(8) %{{.+}}) +// CHECK: define internal void [[OMP_PARALLEL_FUNC]](i32* frozen noalias [[GTID_PARAM_ADDR:%.+]], i32* frozen noalias %{{.+}}, float** frozen nonnull align 8 dereferenceable(8) %{{.+}}, float** frozen nonnull align 8 dereferenceable(8) %{{.+}}, float** frozen nonnull align 8 dereferenceable(8) %{{.+}}, float** frozen nonnull align 8 dereferenceable(8) %{{.+}}) // CHECK: store i32* [[GTID_PARAM_ADDR]], i32** [[GTID_REF_ADDR:%.+]], // CHECK: call void @__kmpc_for_static_init_4u([[IDENT_T_TY]]* [[LOOP_LOC]], i32 [[GTID:%.+]], i32 33, i32* [[IS_LAST:%[^,]+]], i32* [[OMP_LB:%[^,]+]], i32* [[OMP_UB:%[^,]+]], i32* [[OMP_ST:%[^,]+]], i32 1, i32 5) // UB = min(UB, GlobalUB) @@ -192,7 +192,7 @@ void dynamic1(float *a, float *b, float *c, float *d) { #pragma omp parallel for schedule(dynamic) // CHECK: call void ([[IDENT_T_TY]]*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call([[IDENT_T_TY]]* [[DEFAULT_LOC:[@%].+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, float**, float**, float**, float**)* [[OMP_PARALLEL_FUNC:@.+]] to void (i32*, i32*, ...)*), -// CHECK: define internal void [[OMP_PARALLEL_FUNC]](i32* noalias [[GTID_PARAM_ADDR:%.+]], i32* noalias %{{.+}}, float** nonnull align 8 dereferenceable(8) %{{.+}}, float** nonnull align 8 dereferenceable(8) %{{.+}}, float** nonnull align 8 dereferenceable(8) %{{.+}}, float** nonnull align 8 dereferenceable(8) %{{.+}}) +// CHECK: define internal void [[OMP_PARALLEL_FUNC]](i32* frozen noalias [[GTID_PARAM_ADDR:%.+]], i32* frozen noalias %{{.+}}, float** frozen nonnull align 8 dereferenceable(8) %{{.+}}, float** frozen nonnull align 8 dereferenceable(8) %{{.+}}, float** frozen nonnull align 8 dereferenceable(8) %{{.+}}, float** frozen nonnull align 8 dereferenceable(8) %{{.+}}) // CHECK: store i32* [[GTID_PARAM_ADDR]], i32** [[GTID_REF_ADDR:%.+]], // CHECK: call void @__kmpc_dispatch_init_8u([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID:%.+]], i32 35, i64 0, i64 16908287, i64 1, i64 1) // @@ -235,7 +235,7 @@ void guided7(float *a, float *b, float *c, float *d) { #pragma omp parallel for schedule(guided, 7) // CHECK: call void ([[IDENT_T_TY]]*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call([[IDENT_T_TY]]* [[DEFAULT_LOC:[@%].+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, float**, float**, float**, float**)* [[OMP_PARALLEL_FUNC:@.+]] to void (i32*, i32*, ...)*), -// CHECK: define internal void [[OMP_PARALLEL_FUNC]](i32* noalias [[GTID_PARAM_ADDR:%.+]], i32* noalias %{{.+}}, float** nonnull align 8 dereferenceable(8) %{{.+}}, float** nonnull align 8 dereferenceable(8) %{{.+}}, float** nonnull align 8 dereferenceable(8) %{{.+}}, float** nonnull align 8 dereferenceable(8) %{{.+}}) +// CHECK: define internal void [[OMP_PARALLEL_FUNC]](i32* frozen noalias [[GTID_PARAM_ADDR:%.+]], i32* frozen noalias %{{.+}}, float** frozen nonnull align 8 dereferenceable(8) %{{.+}}, float** frozen nonnull align 8 dereferenceable(8) %{{.+}}, float** frozen nonnull align 8 dereferenceable(8) %{{.+}}, float** frozen nonnull align 8 dereferenceable(8) %{{.+}}) // CHECK: store i32* [[GTID_PARAM_ADDR]], i32** [[GTID_REF_ADDR:%.+]], // CHECK: call void @__kmpc_dispatch_init_8u([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID:%.+]], i32 36, i64 0, i64 16908287, i64 1, i64 7) // @@ -280,7 +280,7 @@ unsigned int y = 0; #pragma omp parallel for schedule(auto) collapse(2) // CHECK: call void ([[IDENT_T_TY]]*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call([[IDENT_T_TY]]* [[DEFAULT_LOC:[@%].+]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, float**, float**, float**, float**)* [[OMP_PARALLEL_FUNC:@.+]] to void (i32*, i32*, ...)*), -// CHECK: define internal void [[OMP_PARALLEL_FUNC]](i32* noalias [[GTID_PARAM_ADDR:%.+]], i32* noalias %{{.+}}, i32* nonnull align 4 dereferenceable(4) %{{.+}}, float** nonnull align 8 dereferenceable(8) %{{.+}}, float** nonnull align 8 dereferenceable(8) %{{.+}}, float** nonnull align 8 dereferenceable(8) %{{.+}}, float** nonnull align 8 dereferenceable(8) %{{.+}}) +// CHECK: define internal void [[OMP_PARALLEL_FUNC]](i32* frozen noalias [[GTID_PARAM_ADDR:%.+]], i32* frozen noalias %{{.+}}, i32* frozen nonnull align 4 dereferenceable(4) %{{.+}}, float** frozen nonnull align 8 dereferenceable(8) %{{.+}}, float** frozen nonnull align 8 dereferenceable(8) %{{.+}}, float** frozen nonnull align 8 dereferenceable(8) %{{.+}}, float** frozen nonnull align 8 dereferenceable(8) %{{.+}}) // CHECK: store i32* [[GTID_PARAM_ADDR]], i32** [[GTID_REF_ADDR:%.+]], // CHECK: call void @__kmpc_dispatch_init_8([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID:%.+]], i32 38, i64 0, i64 [[LAST_ITER:%[^,]+]], i64 1, i64 1) // @@ -324,7 +324,7 @@ int x = 0; #pragma omp parallel for collapse(2) schedule(runtime) // CHECK: call void ([[IDENT_T_TY]]*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call([[IDENT_T_TY]]* [[DEFAULT_LOC:[@%].+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, float**, float**, float**, float**)* [[OMP_PARALLEL_FUNC:@.+]] to void (i32*, i32*, ...)*), -// CHECK: define internal void [[OMP_PARALLEL_FUNC]](i32* noalias [[GTID_PARAM_ADDR:%.+]], i32* noalias %{{.+}}, float** nonnull align 8 dereferenceable(8) %{{.+}}, float** nonnull align 8 dereferenceable(8) %{{.+}}, float** nonnull align 8 dereferenceable(8) %{{.+}}, float** nonnull align 8 dereferenceable(8) %{{.+}}) +// CHECK: define internal void [[OMP_PARALLEL_FUNC]](i32* frozen noalias [[GTID_PARAM_ADDR:%.+]], i32* frozen noalias %{{.+}}, float** frozen nonnull align 8 dereferenceable(8) %{{.+}}, float** frozen nonnull align 8 dereferenceable(8) %{{.+}}, float** frozen nonnull align 8 dereferenceable(8) %{{.+}}, float** frozen nonnull align 8 dereferenceable(8) %{{.+}}) // CHECK: store i32* [[GTID_PARAM_ADDR]], i32** [[GTID_REF_ADDR:%.+]], // CHECK: call void @__kmpc_dispatch_init_4([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID:%.+]], i32 37, i32 0, i32 199, i32 1, i32 1) // @@ -371,7 +371,7 @@ #pragma omp parallel for schedule(static, 5) private(arr) default(none) firstprivate(n) shared(a) // TERM_DEBUG-NOT: __kmpc_global_thread_num // TERM_DEBUG: call void @__kmpc_for_static_init_4u({{.+}}), !dbg [[DBG_LOC_START:![0-9]+]] - // TERM_DEBUG: invoke i32 {{.*}}foo{{.*}}() + // TERM_DEBUG: invoke frozen i32 {{.*}}foo{{.*}}() // TERM_DEBUG: unwind label %[[TERM_LPAD:.+]], // TERM_DEBUG-NOT: __kmpc_global_thread_num // TERM_DEBUG: call void @__kmpc_for_static_fini({{.+}}), !dbg [[DBG_LOC_START]] @@ -478,7 +478,7 @@ (void)a; } -// OMP5: define internal void @.omp_outlined.(i32* {{.+}}, i32* {{.+}}, [10 x i32]* nonnull align 4 dereferenceable(40) %arr) +// OMP5: define internal void @.omp_outlined.(i32* {{.+}}, i32* {{.+}}, [10 x i32]* frozen nonnull align 4 dereferenceable(40) %arr) // OMP5: [[ARR_ADDR:%.+]] = alloca [10 x i32]*, // OMP5: [[IV:%.+]] = alloca i64, // OMP5: [[RANGE_ADDR:%.+]] = alloca [10 x i32]*, diff --git a/clang/test/OpenMP/parallel_for_linear_codegen.cpp b/clang/test/OpenMP/parallel_for_linear_codegen.cpp --- a/clang/test/OpenMP/parallel_for_linear_codegen.cpp +++ b/clang/test/OpenMP/parallel_for_linear_codegen.cpp @@ -54,7 +54,7 @@ // LAMBDA: call void {{.+}} @__kmpc_fork_call({{.+}}, i32 1, {{.+}}* [[OMP_REGION:@.+]] to {{.+}}, i32* [[G]]) #pragma omp parallel for linear(g:5) for (int i = 0; i < 2; ++i) { - // LAMBDA: define{{.*}} internal{{.*}} void [[OMP_REGION]](i32* noalias %{{.+}}, i32* noalias %{{.+}}, i32* nonnull align 4 dereferenceable(4) %{{.+}}) + // LAMBDA: define{{.*}} internal{{.*}} void [[OMP_REGION]](i32* frozen noalias %{{.+}}, i32* frozen noalias %{{.+}}, i32* frozen nonnull align 4 dereferenceable(4) %{{.+}}) // LAMBDA: alloca i{{[0-9]+}}, // LAMBDA: alloca i{{[0-9]+}}, // LAMBDA: [[G_START_ADDR:%.+]] = alloca i{{[0-9]+}}, @@ -78,11 +78,11 @@ // LAMBDA: store i32 [[ADD]], i32* [[G_PRIVATE_ADDR]], // LAMBDA: [[G_PRIVATE_ADDR_REF:%.+]] = getelementptr inbounds %{{.+}}, %{{.+}}* [[ARG:%.+]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 // LAMBDA: store i{{[0-9]+}}* [[G_PRIVATE_ADDR]], i{{[0-9]+}}** [[G_PRIVATE_ADDR_REF]] - // LAMBDA: call void [[INNER_LAMBDA:@.+]](%{{.+}}* [[ARG]]) + // LAMBDA: call void [[INNER_LAMBDA:@.+]](%{{.+}}* frozen [[ARG]]) // LAMBDA: call void @__kmpc_for_static_fini(%{{.+}}* @{{.+}}, i32 [[GTID]]) g += 5; [&]() { - // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* [[ARG_PTR:%.+]]) + // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* frozen [[ARG_PTR:%.+]]) // LAMBDA: store %{{.+}}* [[ARG_PTR]], %{{.+}}** [[ARG_PTR_REF:%.+]], g = 2; // LAMBDA: [[ARG_PTR:%.+]] = load %{{.+}}*, %{{.+}}** [[ARG_PTR_REF]] @@ -102,7 +102,7 @@ // BLOCKS: call void {{.+}} @__kmpc_fork_call({{.+}}, i32 1, {{.+}}* [[OMP_REGION:@.+]] to {{.+}}, i32* [[G]]) #pragma omp parallel for linear(g:5) for (int i = 0; i < 2; ++i) { - // BLOCKS: define{{.*}} internal{{.*}} void [[OMP_REGION]](i32* noalias %{{.+}}, i32* noalias %{{.+}}, i32* nonnull align 4 dereferenceable(4) %{{.+}}) + // BLOCKS: define{{.*}} internal{{.*}} void [[OMP_REGION]](i32* frozen noalias %{{.+}}, i32* frozen noalias %{{.+}}, i32* frozen nonnull align 4 dereferenceable(4) %{{.+}}) // BLOCKS: alloca i{{[0-9]+}}, // BLOCKS: alloca i{{[0-9]+}}, // BLOCKS: [[G_START_ADDR:%.+]] = alloca i{{[0-9]+}}, @@ -154,15 +154,15 @@ #endif } -// CHECK: define i{{[0-9]+}} @main() +// CHECK: define frozen i{{[0-9]+}} @main() // CHECK: [[TEST:%.+]] = alloca [[S_FLOAT_TY]], -// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR:@.+]]([[S_FLOAT_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR:@.+]]([[S_FLOAT_TY]]* frozen [[TEST]]) // CHECK: call void (%{{.+}}*, i{{[0-9]+}}, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)*, ...) @__kmpc_fork_call(%{{.+}}* @{{.+}}, i{{[0-9]+}} 2, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)* bitcast (void (i{{[0-9]+}}*, i{{[0-9]+}}*, float**, i64*)* [[MAIN_MICROTASK:@.+]] to void // CHECK: = call {{.+}} [[TMAIN_INT:@.+]]() // CHECK: call void [[S_FLOAT_TY_DESTR:@.+]]([[S_FLOAT_TY]]* // CHECK: ret -// CHECK: define internal void [[MAIN_MICROTASK]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}, float** nonnull align 8 dereferenceable(8) %{{.+}}, i64* nonnull align 8 dereferenceable(8) %{{.+}}) +// CHECK: define internal void [[MAIN_MICROTASK]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}, float** frozen nonnull align 8 dereferenceable(8) %{{.+}}, i64* frozen nonnull align 8 dereferenceable(8) %{{.+}}) // CHECK: alloca i{{[0-9]+}}, // CHECK: alloca i{{[0-9]+}}, // CHECK: [[PVAR_START:%.+]] = alloca float*, @@ -207,12 +207,12 @@ // CHECK: define {{.*}} i{{[0-9]+}} [[TMAIN_INT]]() // CHECK: [[TEST:%.+]] = alloca [[S_INT_TY]], -// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR:@.+]]([[S_INT_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR:@.+]]([[S_INT_TY]]* frozen [[TEST]]) // CHECK: call void (%{{.+}}*, i{{[0-9]+}}, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)*, ...) @__kmpc_fork_call(%{{.+}}* @{{.+}}, i{{[0-9]+}} 2, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)* bitcast (void (i{{[0-9]+}}*, i{{[0-9]+}}*, i32**, i32*)* [[TMAIN_MICROTASK:@.+]] to void // CHECK: call void [[S_INT_TY_DESTR:@.+]]([[S_INT_TY]]* // CHECK: ret // -// CHECK: define internal void [[TMAIN_MICROTASK]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}, i32** nonnull align 8 dereferenceable(8) %{{.+}}, i32* nonnull align 4 dereferenceable(4) %{{.+}}) +// CHECK: define internal void [[TMAIN_MICROTASK]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}, i32** frozen nonnull align 8 dereferenceable(8) %{{.+}}, i32* frozen nonnull align 4 dereferenceable(4) %{{.+}}) // CHECK: alloca i{{[0-9]+}}, // CHECK: alloca i{{[0-9]+}}, // CHECK: [[PVAR_START:%.+]] = alloca i32*, diff --git a/clang/test/OpenMP/parallel_for_loop_messages.cpp b/clang/test/OpenMP/parallel_for_loop_messages.cpp --- a/clang/test/OpenMP/parallel_for_loop_messages.cpp +++ b/clang/test/OpenMP/parallel_for_loop_messages.cpp @@ -145,7 +145,7 @@ for (ii = 0; ii < 10; ++++ii) c[ii] = a[ii]; -// Ok but undefined behavior (in general, cannot check that incr +// Ok but undefined behavior (in frozen general, cannot check incr that // is really loop-invariant). #pragma omp parallel for for (ii = 0; ii < 10; ii = ii + ii) diff --git a/clang/test/OpenMP/parallel_for_reduction_task_codegen.cpp b/clang/test/OpenMP/parallel_for_reduction_task_codegen.cpp --- a/clang/test/OpenMP/parallel_for_reduction_task_codegen.cpp +++ b/clang/test/OpenMP/parallel_for_reduction_task_codegen.cpp @@ -21,7 +21,7 @@ // CHECK: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @{{.+}}, i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i8***)* [[OUTLINED:@.+]] to void (i32*, i32*, ...)*), i32* %{{.+}}, i8*** %{{.+}}) -// CHECK: define internal void [[OUTLINED]](i32* noalias %{{.+}}, i32* noalias %{{.+}}, i32* {{.+}}, i8*** {{.+}}) +// CHECK: define internal void [[OUTLINED]](i32* frozen noalias %{{.+}}, i32* frozen noalias %{{.+}}, i32* {{.+}}, i8*** {{.+}}) // CHECK: alloca i32, // CHECK: [[ARGC_FP_ADDR:%.+]] = alloca i32, // CHECK: [[TR:%.+]] = alloca [2 x %struct.kmp_taskred_input_t], @@ -94,26 +94,26 @@ // CHECK: call void @__kmpc_task_reduction_modifier_fini(%struct.ident_t* @{{.+}}, i32 %{{.+}}, i32 1) // CHECK: call i32 @__kmpc_reduce_nowait( -// CHECK: define internal void [[ARGC_INIT]](i8* noalias %{{.+}}, i8* noalias %{{.+}}) +// CHECK: define internal void [[ARGC_INIT]](i8* frozen noalias %{{.+}}, i8* frozen noalias %{{.+}}) // CHECK: store i32 0, i32* %{{.+}}, -// CHECK: define internal void [[ARGC_COMB]](i8* %{{.+}}, i8* %{{.+}}) +// CHECK: define internal void [[ARGC_COMB]](i8* frozen %{{.+}}, i8* frozen %{{.+}}) // CHECK: [[ADD:%.+]] = add nsw i32 %{{.+}}, %{{.+}} // CHECK: store i32 [[ADD]], i32* %{{.+}}, -// CHECK: define internal void [[ARGV_INIT]](i8* noalias %{{.+}}, i8* noalias %{{.+}}) +// CHECK: define internal void [[ARGV_INIT]](i8* frozen noalias %{{.+}}, i8* frozen noalias %{{.+}}) // CHECK: phi i8* // CHECK: store i8 0, i8* [[EL:%.+]], // CHECK: getelementptr i8, i8* [[EL]], i32 1 -// CHECK: define internal void [[ARGV_COMB]](i8* %{{.+}}, i8* %{{.+}}) +// CHECK: define internal void [[ARGV_COMB]](i8* frozen %{{.+}}, i8* frozen %{{.+}}) // CHECK: phi i8* // CHECK: [[ADD:%.+]] = add nsw i32 %{{.+}}, %{{.+}} // CHECK: [[CONV:%.+]] = trunc i32 [[ADD]] to i8 // CHECK: store i8 [[CONV]], i8* [[EL:%.+]], // CHECK: getelementptr i8, i8* [[EL]], i32 1 -// CHECK: define internal {{.*}}i32 [[TASK]](i32 {{.+}}, [[TASK_TY]]* {{.+}}) +// CHECK: define internal {{.*}}frozen i32 [[TASK]](i32 {{.+}}, [[TASK_TY]]* {{.+}}) // CHECK-DAG: call i8* @__kmpc_task_reduction_get_th_data(i32 %{{.+}}, i8* [[TG:%.+]], i8* [[ARGC_REF:%.+]]) // CHECK_DAG: [[TG]] = load i8*, i8** [[TG_ADDR:%.+]], // CHECK-DAG: [[ARGC_REF]] = bitcast i32* [[ARGC_ADDR:%.+]] to i8* diff --git a/clang/test/OpenMP/parallel_for_simd_codegen.cpp b/clang/test/OpenMP/parallel_for_simd_codegen.cpp --- a/clang/test/OpenMP/parallel_for_simd_codegen.cpp +++ b/clang/test/OpenMP/parallel_for_simd_codegen.cpp @@ -807,7 +807,7 @@ void parallel_simd(float *a) { #pragma omp parallel for simd // TERM_DEBUG-NOT: __kmpc_global_thread_num - // TERM_DEBUG: invoke i32 {{.*}}bar{{.*}}() + // TERM_DEBUG: invoke frozen i32 {{.*}}bar{{.*}}() // TERM_DEBUG: unwind label %[[TERM_LPAD:.+]], // TERM_DEBUG-NOT: __kmpc_global_thread_num // TERM_DEBUG: [[TERM_LPAD]] diff --git a/clang/test/OpenMP/parallel_for_simd_loop_messages.cpp b/clang/test/OpenMP/parallel_for_simd_loop_messages.cpp --- a/clang/test/OpenMP/parallel_for_simd_loop_messages.cpp +++ b/clang/test/OpenMP/parallel_for_simd_loop_messages.cpp @@ -145,7 +145,7 @@ for (ii = 0; ii < 10; ++++ii) c[ii] = a[ii]; -// Ok but undefined behavior (in general, cannot check that incr +// Ok but undefined behavior (in frozen general, cannot check incr that // is really loop-invariant). #pragma omp parallel for simd for (ii = 0; ii < 10; ii = ii + ii) diff --git a/clang/test/OpenMP/parallel_if_codegen.cpp b/clang/test/OpenMP/parallel_if_codegen.cpp --- a/clang/test/OpenMP/parallel_if_codegen.cpp +++ b/clang/test/OpenMP/parallel_if_codegen.cpp @@ -28,14 +28,14 @@ // CHECK: ret void } -// CHECK: define internal {{.*}}void [[GTID_TEST_REGION1]](i{{.+}}* noalias [[GTID_PARAM:%.+]], i32* noalias +// CHECK: define internal {{.*}}void [[GTID_TEST_REGION1]](i{{.+}}* frozen noalias [[GTID_PARAM:%.+]], i32* frozen noalias // CHECK: store i32 0, i32* [[BND_ZERO_ADDR:%.+]], // CHECK: store i{{[0-9]+}}* [[GTID_PARAM]], i{{[0-9]+}}** [[GTID_ADDR_REF:%.+]], // CHECK: [[GTID_ADDR:%.+]] = load i{{[0-9]+}}*, i{{[0-9]+}}** [[GTID_ADDR_REF]] // CHECK: [[GTID:%.+]] = load i{{[0-9]+}}, i{{[0-9]+}}* [[GTID_ADDR]] // CHECK: call {{.*}}void @__kmpc_serialized_parallel(%{{.+}}* @{{.+}}, i{{.+}} [[GTID]]) // CHECK: [[GTID_ADDR:%.+]] = load i{{[0-9]+}}*, i{{[0-9]+}}** [[GTID_ADDR_REF]] -// CHECK: call void [[GTID_TEST_REGION2:@.+]](i{{[0-9]+}}* [[GTID_ADDR]], i{{[0-9]+}}* [[BND_ZERO_ADDR]] +// CHECK: call void [[GTID_TEST_REGION2:@.+]](i{{[0-9]+}}* frozen [[GTID_ADDR]], i{{[0-9]+}}* frozen [[BND_ZERO_ADDR]] // CHECK: call {{.*}}void @__kmpc_end_serialized_parallel(%{{.+}}* @{{.+}}, i{{.+}} [[GTID]]) // CHECK: ret void @@ -64,7 +64,7 @@ fn4(); // CHECK: call {{.*}}void @__kmpc_serialized_parallel(%{{.+}}* @{{.+}}, i32 [[GTID]]) // CHECK: store i32 [[GTID]], i32* [[GTID_ADDR:%.+]], -// CHECK: call void [[CAP_FN5:@.+]](i32* [[GTID_ADDR]], i32* [[BND_ZERO_ADDR1]]) +// CHECK: call void [[CAP_FN5:@.+]](i32* frozen [[GTID_ADDR]], i32* frozen [[BND_ZERO_ADDR1]]) // CHECK: call {{.*}}void @__kmpc_end_serialized_parallel(%{{.+}}* @{{.+}}, i32 [[GTID]]) #pragma omp parallel if (false) fn5(); @@ -76,7 +76,7 @@ // CHECK: [[OMP_ELSE]] // CHECK: call {{.*}}void @__kmpc_serialized_parallel(%{{.+}}* @{{.+}}, i32 [[GTID]]) // CHECK: store i32 [[GTID]], i32* [[GTID_ADDR:%.+]], -// CHECK: call void [[CAP_FN6]](i32* [[GTID_ADDR]], i32* [[BND_ZERO_ADDR2]]) +// CHECK: call void [[CAP_FN6]](i32* frozen [[GTID_ADDR]], i32* frozen [[BND_ZERO_ADDR2]]) // CHECK: call {{.*}}void @__kmpc_end_serialized_parallel(%{{.+}}* @{{.+}}, i32 [[GTID]]) // CHECK: br label %[[OMP_END]] // CHECK: [[OMP_END]] @@ -105,7 +105,7 @@ // CHECK: call {{.*}}void {{.+}} @__kmpc_fork_call(%{{.+}}* @{{.+}}, i{{.+}} 0, void {{.+}}* [[CAP_FN1:@.+]] to void // CHECK: call {{.*}}void @__kmpc_serialized_parallel(%{{.+}}* @{{.+}}, i32 [[GTID]]) // CHECK: store i32 [[GTID]], i32* [[GTID_ADDR:%.+]], -// CHECK: call void [[CAP_FN2:@.+]](i32* [[GTID_ADDR]], i32* [[BND_ZERO_ADDR1]]) +// CHECK: call void [[CAP_FN2:@.+]](i32* frozen [[GTID_ADDR]], i32* frozen [[BND_ZERO_ADDR1]]) // CHECK: call {{.*}}void @__kmpc_end_serialized_parallel(%{{.+}}* @{{.+}}, i32 [[GTID]]) // CHECK: br i1 %{{.+}}, label %[[OMP_THEN:.+]], label %[[OMP_ELSE:.+]] // CHECK: [[OMP_THEN]] @@ -114,7 +114,7 @@ // CHECK: [[OMP_ELSE]] // CHECK: call {{.*}}void @__kmpc_serialized_parallel(%{{.+}}* @{{.+}}, i32 [[GTID]]) // CHECK: store i32 [[GTID]], i32* [[GTID_ADDR:%.+]], -// CHECK: call void [[CAP_FN3]](i32* [[GTID_ADDR]], i32* [[BND_ZERO_ADDR2]]) +// CHECK: call void [[CAP_FN3]](i32* frozen [[GTID_ADDR]], i32* frozen [[BND_ZERO_ADDR2]]) // CHECK: call {{.*}}void @__kmpc_end_serialized_parallel(%{{.+}}* @{{.+}}, i32 [[GTID]]) // CHECK: br label %[[OMP_END]] // CHECK: [[OMP_END]] diff --git a/clang/test/OpenMP/parallel_master_codegen.cpp b/clang/test/OpenMP/parallel_master_codegen.cpp --- a/clang/test/OpenMP/parallel_master_codegen.cpp +++ b/clang/test/OpenMP/parallel_master_codegen.cpp @@ -28,7 +28,7 @@ // CK1-LABEL: define void @{{.+}}parallel_master{{.+}} // CK1: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* [[DEF_LOC]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* [[OMP_OUTLINED:@.+]] to void (i32*, i32*, ...)*)) -// CK1: define internal {{.*}}void [[OMP_OUTLINED]](i32* noalias [[GTID:%.+]], i32* noalias [[BTID:%.+]]) +// CK1: define internal {{.*}}void [[OMP_OUTLINED]](i32* frozen noalias [[GTID:%.+]], i32* frozen noalias [[BTID:%.+]]) // CK1-NOT: __kmpc_global_thread_num // CK1: call i32 @__kmpc_master({{.+}}) // CK1: invoke void {{.*}}foo{{.*}}() @@ -64,7 +64,7 @@ // CK2: [[A_PRIV:%.+]] = alloca i32 // CK2: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* [[DEF_LOC]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* [[OMP_OUTLINED:@.+]] to void (i32*, i32*, ...)*)) -// CK2: define internal {{.*}}void [[OMP_OUTLINED]](i32* noalias [[GTID:%.+]], i32* noalias [[BTID:%.+]]) +// CK2: define internal {{.*}}void [[OMP_OUTLINED]](i32* frozen noalias [[GTID:%.+]], i32* frozen noalias [[BTID:%.+]]) // CK2-NOT: __kmpc_global_thread_num // CK2: call i32 @__kmpc_master({{.+}}) // CK2: [[A_VAL:%.+]] = load i32, i32* [[A_PRIV]] @@ -100,7 +100,7 @@ // CK3: [[A_VAL:%.+]] = alloca i32 // CK3: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* {{.+}}, i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* [[OMP_OUTLINED:@.+]] to void -// CK3: define internal {{.*}}void [[OMP_OUTLINED]](i32* noalias [[GTID:%.+]], i32* noalias [[BTID:%.+]], i32* nonnull align 4 dereferenceable(4) [[A_VAL]]) +// CK3: define internal {{.*}}void [[OMP_OUTLINED]](i32* frozen noalias [[GTID:%.+]], i32* frozen noalias [[BTID:%.+]], i32* frozen nonnull align 4 dereferenceable(4) [[A_VAL]]) // CK3: [[GTID_ADDR:%.+]] = alloca i32* // CK3: [[BTID_ADDR:%.+]] = alloca i32* // CK3: [[A_ADDR:%.+]] = alloca i32* @@ -148,7 +148,7 @@ // CK4: [[ONE:%.+]] = load i64, i64* [[A_CASTED]] // CK4: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* [[DEF_LOC]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* [[OMP_OUTLINED:@.+]] to void (i32*, i32*, ...)*), i64 [[ONE]]) -// CK4: define internal {{.*}}void [[OMP_OUTLINED]](i32* noalias [[GLOBAL_TID:%.+]], i32* noalias [[BOUND_TID:%.+]], i64 [[A_VAL]]) +// CK4: define internal {{.*}}void [[OMP_OUTLINED]](i32* frozen noalias [[GLOBAL_TID:%.+]], i32* frozen noalias [[BOUND_TID:%.+]], i64 frozen [[A_VAL]]) // CK4: [[GLOBAL_TID_ADDR:%.+]] = alloca i32* // CK4: [[BOUND_TID_ADDR:%.+]] = alloca i32* // CK4: [[A_ADDR:%.+]] = alloca i64 @@ -213,7 +213,7 @@ // TLS-CHECK: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* [[DEF_LOC_2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* [[OMP_OUTLINED:@.+]] to void (i32*, i32*, ...)*) // TLS-CHECK: ret void -// CK5: define internal {{.*}}void [[OMP_OUTLINED]](i32* noalias [[GLOBAL_TID:%.+]], i32* noalias [[BOUND_TID:%.+]]) +// CK5: define internal {{.*}}void [[OMP_OUTLINED]](i32* frozen noalias [[GLOBAL_TID:%.+]], i32* frozen noalias [[BOUND_TID:%.+]]) // CK5: [[GLOBAL_TID_ADDR:%.+]] = alloca i32* // CK5: [[BOUND_TID_ADDR:%.+]] = alloca i32* // CK5: store i32* [[GLOBAL_TID]], i32** [[GLOBAL_TID_ADDR]] @@ -225,7 +225,7 @@ // CK5: [[FOUR:%.+]] = ptrtoint i32* [[THREE]] to i64 // CK5: [[FIVE:%.+]] = icmp ne i64 ptrtoint (i32* [[A]] to i64), [[FOUR]] // CK5: br i1 [[FIVE]], label [[COPYIN_NOT_MASTER:%.+]], label [[COPYIN_NOT_MASTER_END:%.+]] -// TLS-CHECK: define internal {{.*}}void [[OMP_OUTLINED]](i32* noalias [[GLOBAL_TID:%.+]], i32* noalias [[BOUND_TID:%.+]], i32* {{.+}} [[A_VAR:%.+]]) +// TLS-CHECK: define internal {{.*}}void [[OMP_OUTLINED]](i32* frozen noalias [[GLOBAL_TID:%.+]], i32* frozen noalias [[BOUND_TID:%.+]], i32* {{.+}} [[A_VAR:%.+]]) // TLS-CHECK: [[GLOBAL_TID_ADDR:%.+]] = alloca i32* // TLS-CHECK: [[BOUND_TID_ADDR:%.+]] = alloca i32* // TLS-CHECK: [[A_ADDR:%.+]] = alloca i32* @@ -302,7 +302,7 @@ // CK6: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* [[DEF_LOC_1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* [[OMP_OUTLINED:@.+]] to void (i32*, i32*, ...)*), i32* [[G_VAR]]) // CK6: ret void -// CK6: define internal void [[OMP_OUTLINED]](i32* noalias [[GLOBAL_TID:%.+]], i32* noalias [[BOUND_TID:%.+]], i32* {{.+}} [[G_VAR]]) +// CK6: define internal void [[OMP_OUTLINED]](i32* frozen noalias [[GLOBAL_TID:%.+]], i32* frozen noalias [[BOUND_TID:%.+]], i32* {{.+}} [[G_VAR]]) // CK6: [[GTID_ADDR:%.+]] = alloca i32* // CK6: [[BTID_ADDR:%.+]] = alloca i32* // CK6: [[G_ADDR:%.+]] = alloca i32* @@ -338,7 +338,7 @@ // CK6: [[ELEVEN:%.+]] = load i32, i32* [[G_1]] // CK6: [[TWELVE:%.+]] = atomicrmw add i32* [[ZERO]], i32 [[ELEVEN]] monotonic -// CK6: define internal void [[RED_FUNC]](i8* [[ZERO]], i8* [[ONE]]) +// CK6: define internal void [[RED_FUNC]](i8* frozen [[ZERO]], i8* frozen [[ONE]]) // CK6: ret void #endif #ifdef CK7 @@ -364,11 +364,11 @@ // CK7-LABEL: parallel_master_if // CK7: [[ZERO:%.+]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* [[DEF_LOC_1]]) // CK7: call void @__kmpc_serialized_parallel(%struct.ident_t* [[DEF_LOC_1]], i32 [[ZERO]]) -// CK7: call void [[OUTLINED:@.+]](i32* [[THREAD_TEMP:%.+]], i32* [[BND_ADDR:%.+]]) +// CK7: call void [[OUTLINED:@.+]](i32* frozen [[THREAD_TEMP:%.+]], i32* frozen [[BND_ADDR:%.+]]) // CK7: call void @__kmpc_end_serialized_parallel(%struct.ident_t* [[DEF_LOC_1]], i32 [[ZERO]]) // CK7: ret void -// CK7: define internal void @.omp_outlined.(i32* noalias [[GTID:%.+]], i32* noalias [[BTID:%.+]]) +// CK7: define internal void @.omp_outlined.(i32* frozen noalias [[GTID:%.+]], i32* frozen noalias [[BTID:%.+]]) // CK7: [[EXECUTE:%.+]] = call i32 @__kmpc_master(%struct.ident_t* @0, i32 %1) // CK7: call void @__kmpc_end_master(%struct.ident_t* [[DEF_LOC_1]], i32 %1) @@ -472,7 +472,7 @@ // CK9: [[ONE:%.+]] = load i64, i64* [[A_CASTED]] // CK9: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* [[DEF_LOC]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i8***)* [[OMP_OUTLINED:@.+]] to void (i32*, i32*, ...)*), i64 [[ONE]], i8*** %{{.+}}) -// CK9: define internal {{.*}}void [[OMP_OUTLINED]](i32* noalias [[GLOBAL_TID:%.+]], i32* noalias [[BOUND_TID:%.+]], i64 [[A_VAL]], i8*** {{.*}}) +// CK9: define internal {{.*}}void [[OMP_OUTLINED]](i32* frozen noalias [[GLOBAL_TID:%.+]], i32* frozen noalias [[BOUND_TID:%.+]], i64 frozen [[A_VAL]], i8*** {{.*}}) // CK9: [[GLOBAL_TID_ADDR:%.+]] = alloca i32* // CK9: [[BOUND_TID_ADDR:%.+]] = alloca i32* // CK9: [[A_ADDR:%.+]] = alloca i64, diff --git a/clang/test/OpenMP/parallel_master_reduction_task_codegen.cpp b/clang/test/OpenMP/parallel_master_reduction_task_codegen.cpp --- a/clang/test/OpenMP/parallel_master_reduction_task_codegen.cpp +++ b/clang/test/OpenMP/parallel_master_reduction_task_codegen.cpp @@ -21,7 +21,7 @@ // CHECK: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @{{.+}}, i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i8***)* [[OUTLINED:@.+]] to void (i32*, i32*, ...)*), i32* %{{.+}}, i8*** %{{.+}}) -// CHECK: define internal void [[OUTLINED]](i32* noalias %{{.+}}, i32* noalias %{{.+}}, i32* {{.+}}, i8*** {{.+}}) +// CHECK: define internal void [[OUTLINED]](i32* frozen noalias %{{.+}}, i32* frozen noalias %{{.+}}, i32* {{.+}}, i8*** {{.+}}) // CHECK: [[ARGC_FP_ADDR:%.+]] = alloca i32, // CHECK: [[TR:%.+]] = alloca [2 x %struct.kmp_taskred_input_t], // CHECK: [[TG:%.+]] = alloca i8*, @@ -93,26 +93,26 @@ // CHECK: call void @__kmpc_task_reduction_modifier_fini(%struct.ident_t* @{{.+}}, i32 %{{.+}}, i32 0) // CHECK: call i32 @__kmpc_reduce_nowait( -// CHECK: define internal void [[ARGC_INIT]](i8* noalias %{{.+}}, i8* noalias %{{.+}}) +// CHECK: define internal void [[ARGC_INIT]](i8* frozen noalias %{{.+}}, i8* frozen noalias %{{.+}}) // CHECK: store i32 0, i32* %{{.+}}, -// CHECK: define internal void [[ARGC_COMB]](i8* %{{.+}}, i8* %{{.+}}) +// CHECK: define internal void [[ARGC_COMB]](i8* frozen %{{.+}}, i8* frozen %{{.+}}) // CHECK: [[ADD:%.+]] = add nsw i32 %{{.+}}, %{{.+}} // CHECK: store i32 [[ADD]], i32* %{{.+}}, -// CHECK: define internal void [[ARGV_INIT]](i8* noalias %{{.+}}, i8* noalias %{{.+}}) +// CHECK: define internal void [[ARGV_INIT]](i8* frozen noalias %{{.+}}, i8* frozen noalias %{{.+}}) // CHECK: phi i8* // CHECK: store i8 0, i8* [[EL:%.+]], // CHECK: getelementptr i8, i8* [[EL]], i32 1 -// CHECK: define internal void [[ARGV_COMB]](i8* %{{.+}}, i8* %{{.+}}) +// CHECK: define internal void [[ARGV_COMB]](i8* frozen %{{.+}}, i8* frozen %{{.+}}) // CHECK: phi i8* // CHECK: [[ADD:%.+]] = add nsw i32 %{{.+}}, %{{.+}} // CHECK: [[CONV:%.+]] = trunc i32 [[ADD]] to i8 // CHECK: store i8 [[CONV]], i8* [[EL:%.+]], // CHECK: getelementptr i8, i8* [[EL]], i32 1 -// CHECK: define internal {{.*}}i32 [[TASK]](i32 {{.+}}, [[TASK_TY]]* {{.+}}) +// CHECK: define internal {{.*}}frozen i32 [[TASK]](i32 {{.+}}, [[TASK_TY]]* {{.+}}) // CHECK-DAG: call i8* @__kmpc_task_reduction_get_th_data(i32 %{{.+}}, i8* [[TG:%.+]], i8* [[ARGC_REF:%.+]]) // CHECK_DAG: [[TG]] = load i8*, i8** [[TG_ADDR:%.+]], // CHECK-DAG: [[ARGC_REF]] = bitcast i32* [[ARGC_ADDR:%.+]] to i8* diff --git a/clang/test/OpenMP/parallel_master_taskloop_codegen.cpp b/clang/test/OpenMP/parallel_master_taskloop_codegen.cpp --- a/clang/test/OpenMP/parallel_master_taskloop_codegen.cpp +++ b/clang/test/OpenMP/parallel_master_taskloop_codegen.cpp @@ -17,11 +17,11 @@ // CHECK: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* [[DEFLOC]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* [[OMP_OUTLINED2:@.+]] to void (i32*, i32*, ...)*), i64 [[GRAINSIZE:%.+]]) // CHECK: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* [[DEFLOC]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i8***, i64, i64)* [[OMP_OUTLINED3:@.+]] to void (i32*, i32*, ...)*), i32* [[ARGC:%.+]], i8*** [[ARGV:%.+]], i64 [[COND:%.+]], i64 [[NUM_TASKS:%.+]]) // CHECK: call void @__kmpc_serialized_parallel(%struct.ident_t* [[DEFLOC]], i32 [[GTID]]) -// CHECK: call void [[OMP_OUTLINED3]](i32* %{{.+}}, i32* %{{.+}}, i32* [[ARGC]], i8*** [[ARGV]], i64 [[COND]], i64 [[NUM_TASKS]]) +// CHECK: call void [[OMP_OUTLINED3]](i32* frozen %{{.+}}, i32* frozen %{{.+}}, i32* frozen [[ARGC]], i8*** frozen [[ARGV]], i64 frozen [[COND]], i64 frozen [[NUM_TASKS]]) // CHECK: call void @__kmpc_end_serialized_parallel(%struct.ident_t* [[DEFLOC]], i32 [[GTID]]) // CHECK: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* [[DEFLOC]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* [[OMP_OUTLINED4:@.+]] to void (i32*, i32*, ...)*)) -// CHECK: define internal void [[OMP_OUTLINED1]](i32* noalias %{{.+}}, i32* noalias %{{.+}}, i64 %{{.+}}) +// CHECK: define internal void [[OMP_OUTLINED1]](i32* frozen noalias %{{.+}}, i32* frozen noalias %{{.+}}, i64 frozen %{{.+}}) // CHECK: [[PRIO_ADDR:%.+]] = bitcast i64* %{{.+}} to i32* // CHECK: [[RES:%.+]] = call {{.*}}i32 @__kmpc_master(%struct.ident_t* [[DEFLOC]], i32 [[GTID:%.+]]) // CHECK-NEXT: [[IS_MASTER:%.+]] = icmp ne i32 [[RES]], 0 @@ -49,7 +49,7 @@ // CHECK: [[EXIT]] -// CHECK: define internal i32 [[TASK1]]( +// CHECK: define internal frozen i32 [[TASK1]]( // CHECK: [[DOWN:%.+]] = getelementptr inbounds [[TD_TY:%.+]], [[TD_TY]]* %{{.+}}, i32 0, i32 5 // CHECK: [[DOWN_VAL:%.+]] = load i64, i64* [[DOWN]], // CHECK: [[UP:%.+]] = getelementptr inbounds [[TD_TY]], [[TD_TY]]* %{{.+}}, i32 0, i32 6 @@ -82,7 +82,7 @@ #pragma omp parallel master taskloop priority(argc) for (int i = 0; i < 10; ++i) ; -// CHECK: define internal void [[OMP_OUTLINED2]](i32* noalias %{{.+}}, i32* noalias %{{.+}}, i64 %{{.+}}) +// CHECK: define internal void [[OMP_OUTLINED2]](i32* frozen noalias %{{.+}}, i32* frozen noalias %{{.+}}, i64 frozen %{{.+}}) // CHECK: [[RES:%.+]] = call {{.*}}i32 @__kmpc_master(%struct.ident_t* [[DEFLOC]], i32 [[GTID:%.+]]) // CHECK-NEXT: [[IS_MASTER:%.+]] = icmp ne i32 [[RES]], 0 // CHECK-NEXT: br i1 [[IS_MASTER]], label {{%?}}[[THEN:.+]], label {{%?}}[[EXIT:.+]] @@ -104,7 +104,7 @@ // CHECK: [[EXIT]] -// CHECK: define internal i32 [[TASK2]]( +// CHECK: define internal frozen i32 [[TASK2]]( // CHECK: [[DOWN:%.+]] = getelementptr inbounds [[TD_TY:%.+]], [[TD_TY]]* %{{.+}}, i32 0, i32 5 // CHECK: [[DOWN_VAL:%.+]] = load i64, i64* [[DOWN]], // CHECK: [[UP:%.+]] = getelementptr inbounds [[TD_TY]], [[TD_TY]]* %{{.+}}, i32 0, i32 6 @@ -137,7 +137,7 @@ #pragma omp parallel master taskloop nogroup grainsize(argc) for (int i = 0; i < 10; ++i) ; -// CHECK: define internal void [[OMP_OUTLINED3]](i32* noalias %{{.+}}, i32* noalias %{{.+}}, i32* nonnull align 4 dereferenceable(4) %{{.+}}, i8*** nonnull align 8 dereferenceable(8) %{{.+}}, i64 %{{.+}}, i64 %{{.+}}) +// CHECK: define internal void [[OMP_OUTLINED3]](i32* frozen noalias %{{.+}}, i32* frozen noalias %{{.+}}, i32* frozen nonnull align 4 dereferenceable(4) %{{.+}}, i8*** frozen nonnull align 8 dereferenceable(8) %{{.+}}, i64 frozen %{{.+}}, i64 frozen %{{.+}}) // CHECK: [[RES:%.+]] = call {{.*}}i32 @__kmpc_master(%struct.ident_t* [[DEFLOC]], i32 [[GTID:%.+]]) // CHECK-NEXT: [[IS_MASTER:%.+]] = icmp ne i32 [[RES]], 0 // CHECK-NEXT: br i1 [[IS_MASTER]], label {{%?}}[[THEN:.+]], label {{%?}}[[EXIT:.+]] @@ -163,7 +163,7 @@ // CHECK-NEXT: br label {{%?}}[[EXIT]] // CHECK: [[EXIT]] -// CHECK: define internal i32 [[TASK3]]( +// CHECK: define internal frozen i32 [[TASK3]]( // CHECK: [[DOWN:%.+]] = getelementptr inbounds [[TD_TY:%.+]], [[TD_TY]]* %{{.+}}, i32 0, i32 5 // CHECK: [[DOWN_VAL:%.+]] = load i64, i64* [[DOWN]], // CHECK: [[UP:%.+]] = getelementptr inbounds [[TD_TY]], [[TD_TY]]* %{{.+}}, i32 0, i32 6 @@ -211,7 +211,7 @@ S(int c) { // CHECK: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* [[DEFLOC]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S*, i32*, i64)* [[OMP_OUTLINED4:@.+]] to void (i32*, i32*, ...)*), %struct.S* %{{.+}}, i32* %{{.+}}, i64 %{{.+}}) -// CHECK: define internal void [[OMP_OUTLINED4]](i32* noalias %{{.+}}, i32* noalias %{{.+}}, %struct.S* %{{.+}}, i32* nonnull align 4 dereferenceable(4) %{{.+}}, i64 %{{.+}}) +// CHECK: define internal void [[OMP_OUTLINED4]](i32* frozen noalias %{{.+}}, i32* frozen noalias %{{.+}}, %struct.S* frozen %{{.+}}, i32* frozen nonnull align 4 dereferenceable(4) %{{.+}}, i64 frozen %{{.+}}) // CHECK: [[CONV:%.+]] = bitcast i64* %{{.+}} to i8* // CHECK: [[CONDI8:%.+]] = load i8, i8* [[CONV]], // CHECK: [[COND:%.+]] = trunc i8 [[CONDI8]] to i1 @@ -234,7 +234,7 @@ } } s(1); -// CHECK: define internal i32 [[TASK4]]( +// CHECK: define internal frozen i32 [[TASK4]]( // CHECK: [[DOWN:%.+]] = getelementptr inbounds [[TD_TY:%.+]], [[TD_TY]]* %{{.+}}, i32 0, i32 5 // CHECK: [[DOWN_VAL:%.+]] = load i64, i64* [[DOWN]], // CHECK: [[UP:%.+]] = getelementptr inbounds [[TD_TY]], [[TD_TY]]* %{{.+}}, i32 0, i32 6 diff --git a/clang/test/OpenMP/parallel_master_taskloop_firstprivate_codegen.cpp b/clang/test/OpenMP/parallel_master_taskloop_firstprivate_codegen.cpp --- a/clang/test/OpenMP/parallel_master_taskloop_firstprivate_codegen.cpp +++ b/clang/test/OpenMP/parallel_master_taskloop_firstprivate_codegen.cpp @@ -85,7 +85,7 @@ // LAMBDA: ret #pragma omp parallel master taskloop firstprivate(g, sivar) for (int i = 0; i < 10; ++i) { - // LAMBDA: define {{.+}} void [[INNER_LAMBDA:@.+]](%{{.+}}* [[ARG_PTR:%.+]]) + // LAMBDA: define {{.+}} void [[INNER_LAMBDA:@.+]](%{{.+}}* frozen [[ARG_PTR:%.+]]) // LAMBDA: store %{{.+}}* [[ARG_PTR]], %{{.+}}** [[ARG_PTR_REF:%.+]], // LAMBDA: [[ARG_PTR:%.+]] = load %{{.+}}*, %{{.+}}** [[ARG_PTR_REF]] // LAMBDA: [[G_PTR_REF:%.+]] = getelementptr inbounds %{{.+}}, %{{.+}}* [[ARG_PTR]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 @@ -93,7 +93,7 @@ // LAMBDA: store double 2.0{{.+}}, double* [[G_REF]] // LAMBDA: store double* %{{.+}}, double** %{{.+}}, - // LAMBDA: define internal i32 [[TASK_ENTRY]](i32 %0, %{{.+}}* noalias %1) + // LAMBDA: define internal frozen i32 [[TASK_ENTRY]](i32 frozen %0, %{{.+}}* frozen noalias %1) g = 1; sivar = 11; // LAMBDA: store double 1.0{{.+}}, double* %{{.+}}, @@ -144,7 +144,7 @@ // BLOCKS: store double* %{{.+}}, double** %{{.+}}, // BLOCKS: store i{{[0-9]+}}* %{{.+}}, i{{[0-9]+}}** %{{.+}}, - // BLOCKS: define internal i32 [[TASK_ENTRY]](i32 %0, %{{.+}}* noalias %1) + // BLOCKS: define internal frozen i32 [[TASK_ENTRY]](i32 frozen %0, %{{.+}}* frozen noalias %1) g = 1; sivar = 11; // BLOCKS: store double 1.0{{.+}}, double* %{{.+}}, @@ -177,7 +177,7 @@ } // CHECK: [[SIVAR:.+]] = internal global i{{[0-9]+}} 0, -// CHECK: define i{{[0-9]+}} @main() +// CHECK: define frozen i{{[0-9]+}} @main() // CHECK: alloca [[S_DOUBLE_TY]], // CHECK: [[TEST:%.+]] = alloca [[S_DOUBLE_TY]], // CHECK: [[T_VAR_ADDR:%.+]] = alloca i32, @@ -185,7 +185,7 @@ // CHECK: [[S_ARR_ADDR:%.+]] = alloca [2 x [[S_DOUBLE_TY]]], // CHECK: [[VAR_ADDR:%.+]] = alloca [[S_DOUBLE_TY]], -// CHECK: call {{.*}} [[S_DOUBLE_TY_COPY_CONSTR:@.+]]([[S_DOUBLE_TY]]* [[TEST]], +// CHECK: call {{.*}} [[S_DOUBLE_TY_COPY_CONSTR:@.+]]([[S_DOUBLE_TY]]* frozen [[TEST]] // CHECK: [[RES:%.+]] = call {{.*}}i32 @__kmpc_master( // CHECK-NEXT: [[IS_MASTER:%.+]] = icmp ne i32 [[RES]], 0 @@ -220,7 +220,7 @@ // s_arr; // CHECK: [[PRIVATE_S_ARR_REF:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 // CHECK: bitcast [2 x [[S_DOUBLE_TY]]]* %{{.+}} to [[S_DOUBLE_TY]]* -// CHECK: call void [[S_DOUBLE_TY_COPY_CONSTR]]([[S_DOUBLE_TY]]* [[S_ARR_CUR:%[^,]+]], +// CHECK: call void [[S_DOUBLE_TY_COPY_CONSTR]]([[S_DOUBLE_TY]]* frozen [[S_ARR_CUR:%[^,]+]] // CHECK: getelementptr [[S_DOUBLE_TY]], [[S_DOUBLE_TY]]* [[S_ARR_CUR]], i{{.+}} 1 // CHECK: getelementptr [[S_DOUBLE_TY]], [[S_DOUBLE_TY]]* %{{.+}}, i{{.+}} 1 // CHECK: icmp eq @@ -228,7 +228,7 @@ // var; // CHECK: [[PRIVATE_VAR_REF:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 1 -// CHECK-NEXT: call void [[S_DOUBLE_TY_COPY_CONSTR]]([[S_DOUBLE_TY]]* [[PRIVATE_VAR_REF]], [[S_DOUBLE_TY]]* {{.*}}, +// CHECK-NEXT: call void [[S_DOUBLE_TY_COPY_CONSTR]]([[S_DOUBLE_TY]]* frozen [[PRIVATE_VAR_REF]], [[S_DOUBLE_TY]]* {{.*}} // t_var; // CHECK: [[PRIVATE_T_VAR_REF:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 2 @@ -257,7 +257,7 @@ // CHECK-NEXT: br label {{%?}}[[EXIT]] // CHECK: [[EXIT]] -// CHECK: define internal void [[PRIVATES_MAP_FN:@.+]]([[PRIVATES_MAIN_TY]]* noalias %0, [[S_DOUBLE_TY]]** noalias %1, i32** noalias %2, [2 x [[S_DOUBLE_TY]]]** noalias %3, [2 x i32]** noalias %4, i32** noalias %5) +// CHECK: define internal void [[PRIVATES_MAP_FN:@.+]]([[PRIVATES_MAIN_TY]]* frozen noalias %0, [[S_DOUBLE_TY]]** frozen noalias %1, i32** frozen noalias %2, [2 x [[S_DOUBLE_TY]]]** frozen noalias %3, [2 x i32]** frozen noalias %4, i32** frozen noalias %5) // CHECK: [[PRIVATES:%.+]] = load [[PRIVATES_MAIN_TY]]*, [[PRIVATES_MAIN_TY]]** // CHECK: [[PRIV_S_VAR:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i32 0, i32 0 // CHECK: [[ARG3:%.+]] = load [2 x [[S_DOUBLE_TY]]]**, [2 x [[S_DOUBLE_TY]]]*** %{{.+}}, @@ -276,7 +276,7 @@ // CHECK: store i{{[0-9]+}}* [[PRIV_SIVAR]], i{{[0-9]+}}** [[ARG5]], // CHECK: ret void -// CHECK: define internal i32 [[TASK_ENTRY]](i32 %0, [[KMP_TASK_MAIN_TY]]* noalias %1) +// CHECK: define internal frozen i32 [[TASK_ENTRY]](i32 frozen %0, [[KMP_TASK_MAIN_TY]]* frozen noalias %1) // CHECK: [[PRIV_VAR_ADDR:%.+]] = alloca [[S_DOUBLE_TY]]*, // CHECK: [[PRIV_T_VAR_ADDR:%.+]] = alloca i32*, @@ -303,7 +303,7 @@ // CHECK: ret -// CHECK: define internal void [[MAIN_DUP]]([[KMP_TASK_MAIN_TY]]* %0, [[KMP_TASK_MAIN_TY]]* %1, i32 %2) +// CHECK: define internal void [[MAIN_DUP]]([[KMP_TASK_MAIN_TY]]* frozen %0, [[KMP_TASK_MAIN_TY]]* frozen %1, i32 frozen %2) // CHECK: getelementptr inbounds [[KMP_TASK_MAIN_TY]], [[KMP_TASK_MAIN_TY]]* %{{.+}}, i32 0, i32 1 // CHECK: getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* %{{.+}}, i32 0, i32 0 // CHECK: getelementptr inbounds [2 x [[S_DOUBLE_TY]]], [2 x [[S_DOUBLE_TY]]]* %{{.+}}, i32 0, i32 0 @@ -320,15 +320,15 @@ // CHECK: call {{.*}} [[S_DOUBLE_TY_COPY_CONSTR]]([[S_DOUBLE_TY]]* // CHECK: ret void -// CHECK: define internal i32 [[DESTRUCTORS]](i32 %{{.+}}, [[KMP_TASK_MAIN_TY]]* noalias %{{.+}}) +// CHECK: define internal frozen i32 [[DESTRUCTORS]](i32 frozen %{{.+}}, [[KMP_TASK_MAIN_TY]]* frozen noalias %{{.+}}) // CHECK: [[PRIVATES:%.+]] = getelementptr inbounds [[KMP_TASK_MAIN_TY]], [[KMP_TASK_MAIN_TY]]* [[RES_KMP_TASK:%.+]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 // CHECK: [[PRIVATE_S_ARR_REF:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 0 // CHECK: [[PRIVATE_VAR_REF:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 1 -// CHECK: call void @_ZN1SIdED1Ev([[S_DOUBLE_TY]]* [[PRIVATE_VAR_REF]]) +// CHECK: call void @_ZN1SIdED1Ev([[S_DOUBLE_TY]]* frozen [[PRIVATE_VAR_REF]]) // CHECK: getelementptr inbounds [2 x [[S_DOUBLE_TY]]], [2 x [[S_DOUBLE_TY]]]* [[PRIVATE_S_ARR_REF]], i{{.+}} 0, i{{.+}} 0 // CHECK: getelementptr inbounds [[S_DOUBLE_TY]], [[S_DOUBLE_TY]]* %{{.+}}, i{{.+}} 2 // CHECK: [[PRIVATE_S_ARR_ELEM_REF:%.+]] = getelementptr inbounds [[S_DOUBLE_TY]], [[S_DOUBLE_TY]]* %{{.+}}, i{{.+}} -1 -// CHECK: call void @_ZN1SIdED1Ev([[S_DOUBLE_TY]]* [[PRIVATE_S_ARR_ELEM_REF]]) +// CHECK: call void @_ZN1SIdED1Ev([[S_DOUBLE_TY]]* frozen [[PRIVATE_S_ARR_ELEM_REF]]) // CHECK: icmp eq // CHECK: br i1 // CHECK: ret i32 @@ -340,7 +340,7 @@ // CHECK: [[S_ARR_ADDR:%.+]] = alloca [2 x [[S_INT_TY]]], // CHECK: [[VAR_ADDR:%.+]] = alloca [[S_INT_TY]], -// CHECK: call {{.*}} [[S_INT_TY_COPY_CONSTR:@.+]]([[S_INT_TY]]* [[TEST]], +// CHECK: call {{.*}} [[S_INT_TY_COPY_CONSTR:@.+]]([[S_INT_TY]]* frozen [[TEST]] // Store original variables in capture struct. // CHECK: [[S_ARR_REF:%.+]] = getelementptr inbounds [[CAP_TMAIN_TY]], [[CAP_TMAIN_TY]]* %{{.+}}, i{{[0-9]+}} 0, i{{[0-9]+}} 0 @@ -383,14 +383,14 @@ // CHECK: getelementptr inbounds [2 x [[S_INT_TY]]], [2 x [[S_INT_TY]]]* [[PRIVATE_S_ARR_REF]], i{{.+}} 0, i{{.+}} 0 // CHECK: bitcast [2 x [[S_INT_TY]]]* %{{.+}} to [[S_INT_TY]]* // CHECK: getelementptr [[S_INT_TY]], [[S_INT_TY]]* %{{.+}}, i{{.+}} 2 -// CHECK: call void [[S_INT_TY_COPY_CONSTR]]([[S_INT_TY]]* [[S_ARR_CUR:%[^,]+]], +// CHECK: call void [[S_INT_TY_COPY_CONSTR]]([[S_INT_TY]]* frozen [[S_ARR_CUR:%[^,]+]] // CHECK: getelementptr [[S_INT_TY]], [[S_INT_TY]]* [[S_ARR_CUR]], i{{.+}} 1 // CHECK: icmp eq // CHECK: br i1 // var; // CHECK: [[PRIVATE_VAR_REF:%.+]] = getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 3 -// CHECK-NEXT: call void [[S_INT_TY_COPY_CONSTR]]([[S_INT_TY]]* [[PRIVATE_VAR_REF]], +// CHECK-NEXT: call void [[S_INT_TY_COPY_CONSTR]]([[S_INT_TY]]* frozen [[PRIVATE_VAR_REF]] // Provide pointer to destructor function, which will destroy private variables at the end of the task. // CHECK: [[DESTRUCTORS_REF:%.+]] = getelementptr inbounds [[KMP_TASK_T_TY]], [[KMP_TASK_T_TY]]* [[TASK]], i{{.+}} 0, i{{.+}} 3 @@ -400,7 +400,7 @@ // Start task. // CHECK: call void @__kmpc_taskloop(%struct.ident_t* @{{.+}}, i32 %{{.+}}, i8* [[RES]], i32 1, i64* %{{.+}}, i64* %{{.+}}, i64 %{{.+}}, i32 1, i32 0, i64 0, i8* bitcast (void ([[KMP_TASK_TMAIN_TY]]*, [[KMP_TASK_TMAIN_TY]]*, i32)* [[TMAIN_DUP:@.+]] to i8*)) -// CHECK: define internal void [[PRIVATES_MAP_FN:@.+]]([[PRIVATES_TMAIN_TY]]* noalias %{{.+}}, i32** noalias %{{.+}}, [2 x i32]** noalias %{{.+}}, [2 x [[S_INT_TY]]]** noalias %{{.+}}, [[S_INT_TY]]** noalias %{{.+}}) +// CHECK: define internal void [[PRIVATES_MAP_FN:@.+]]([[PRIVATES_TMAIN_TY]]* frozen noalias %{{.+}}, i32** frozen noalias %{{.+}}, [2 x i32]** frozen noalias %{{.+}}, [2 x [[S_INT_TY]]]** frozen noalias %{{.+}}, [[S_INT_TY]]** frozen noalias %{{.+}}) // CHECK: [[PRIVATES:%.+]] = load [[PRIVATES_TMAIN_TY]]*, [[PRIVATES_TMAIN_TY]]** // CHECK: [[PRIV_T_VAR:%.+]] = getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i32 0, i32 0 // CHECK: [[ARG1:%.+]] = load i32**, i32*** %{{.+}}, @@ -416,7 +416,7 @@ // CHECK: store [[S_INT_TY]]* [[PRIV_VAR]], [[S_INT_TY]]** [[ARG4]], // CHECK: ret void -// CHECK: define internal i32 [[TASK_ENTRY]](i32 %0, [[KMP_TASK_TMAIN_TY]]* noalias %1) +// CHECK: define internal frozen i32 [[TASK_ENTRY]](i32 frozen %0, [[KMP_TASK_TMAIN_TY]]* frozen noalias %1) // CHECK: alloca i32*, // CHECK-DAG: [[PRIV_T_VAR_ADDR:%.+]] = alloca i32*, // CHECK-DAG: [[PRIV_VEC_ADDR:%.+]] = alloca [2 x i32]*, @@ -438,7 +438,7 @@ // CHECK: ret -// CHECK: define internal void [[TMAIN_DUP]]([[KMP_TASK_TMAIN_TY]]* %0, [[KMP_TASK_TMAIN_TY]]* %1, i32 %2) +// CHECK: define internal void [[TMAIN_DUP]]([[KMP_TASK_TMAIN_TY]]* frozen %0, [[KMP_TASK_TMAIN_TY]]* frozen %1, i32 frozen %2) // CHECK: getelementptr inbounds [[KMP_TASK_TMAIN_TY]], [[KMP_TASK_TMAIN_TY]]* %{{.+}}, i32 0, i32 2 // CHECK: getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* %{{.+}}, i32 0, i32 2 // CHECK: getelementptr inbounds [2 x [[S_INT_TY]]], [2 x [[S_INT_TY]]]* %{{.+}}, i32 0, i32 0 @@ -455,15 +455,15 @@ // CHECK: call {{.*}} [[S_INT_TY_COPY_CONSTR]]([[S_INT_TY]]* // CHECK: ret void -// CHECK: define internal i32 [[DESTRUCTORS]](i32 %0, [[KMP_TASK_TMAIN_TY]]* noalias %1) +// CHECK: define internal frozen i32 [[DESTRUCTORS]](i32 frozen %0, [[KMP_TASK_TMAIN_TY]]* frozen noalias %1) // CHECK: [[PRIVATES:%.+]] = getelementptr inbounds [[KMP_TASK_TMAIN_TY]], [[KMP_TASK_TMAIN_TY]]* [[RES_KMP_TASK:%.+]], i{{[0-9]+}} 0, i{{[0-9]+}} 2 // CHECK: [[PRIVATE_S_ARR_REF:%.+]] = getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 2 // CHECK: [[PRIVATE_VAR_REF:%.+]] = getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 3 -// CHECK: call void @_ZN1SIiED1Ev([[S_INT_TY]]* [[PRIVATE_VAR_REF]]) +// CHECK: call void @_ZN1SIiED1Ev([[S_INT_TY]]* frozen [[PRIVATE_VAR_REF]]) // CHECK: getelementptr inbounds [2 x [[S_INT_TY]]], [2 x [[S_INT_TY]]]* [[PRIVATE_S_ARR_REF]], i{{.+}} 0, i{{.+}} 0 // CHECK: getelementptr inbounds [[S_INT_TY]], [[S_INT_TY]]* %{{.+}}, i{{.+}} 2 // CHECK: [[PRIVATE_S_ARR_ELEM_REF:%.+]] = getelementptr inbounds [[S_INT_TY]], [[S_INT_TY]]* %{{.+}}, i{{.+}} -1 -// CHECK: call void @_ZN1SIiED1Ev([[S_INT_TY]]* [[PRIVATE_S_ARR_ELEM_REF]]) +// CHECK: call void @_ZN1SIiED1Ev([[S_INT_TY]]* frozen [[PRIVATE_S_ARR_ELEM_REF]]) // CHECK: icmp eq // CHECK: br i1 // CHECK: ret i32 diff --git a/clang/test/OpenMP/parallel_master_taskloop_lastprivate_codegen.cpp b/clang/test/OpenMP/parallel_master_taskloop_lastprivate_codegen.cpp --- a/clang/test/OpenMP/parallel_master_taskloop_lastprivate_codegen.cpp +++ b/clang/test/OpenMP/parallel_master_taskloop_lastprivate_codegen.cpp @@ -73,7 +73,7 @@ // LAMBDA: ret #pragma omp parallel master taskloop lastprivate(g, sivar) for (int i = 0; i < 10; ++i) { - // LAMBDA: define {{.+}} void [[INNER_LAMBDA:@.+]](%{{.+}}* [[ARG_PTR:%.+]]) + // LAMBDA: define {{.+}} void [[INNER_LAMBDA:@.+]](%{{.+}}* frozen [[ARG_PTR:%.+]]) // LAMBDA: store %{{.+}}* [[ARG_PTR]], %{{.+}}** [[ARG_PTR_REF:%.+]], // LAMBDA: [[ARG_PTR:%.+]] = load %{{.+}}*, %{{.+}}** [[ARG_PTR_REF]] // LAMBDA: [[G_PTR_REF:%.+]] = getelementptr inbounds %{{.+}}, %{{.+}}* [[ARG_PTR]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 @@ -81,7 +81,7 @@ // LAMBDA: store double 2.0{{.+}}, double* [[G_REF]] // LAMBDA: store double* %{{.+}}, double** %{{.+}}, - // LAMBDA: define internal i32 [[TASK_ENTRY]](i32 %0, %{{.+}}* noalias %1) + // LAMBDA: define internal frozen i32 [[TASK_ENTRY]](i32 frozen %0, %{{.+}}* frozen noalias %1) g = 1; sivar = 11; // LAMBDA: store double 1.0{{.+}}, double* %{{.+}}, @@ -124,7 +124,7 @@ // BLOCKS: store double* %{{.+}}, double** %{{.+}}, // BLOCKS: store i{{[0-9]+}}* %{{.+}}, i{{[0-9]+}}** %{{.+}}, - // BLOCKS: define internal i32 [[TASK_ENTRY]](i32 %0, %{{.+}}* noalias %1) + // BLOCKS: define internal frozen i32 [[TASK_ENTRY]](i32 frozen %0, %{{.+}}* frozen noalias %1) g = 1; sivar = 11; // BLOCKS: store double 1.0{{.+}}, double* %{{.+}}, @@ -163,7 +163,7 @@ } // CHECK: [[SIVAR:.+]] = internal global i{{[0-9]+}} 0, -// CHECK: define i{{[0-9]+}} @main() +// CHECK: define frozen i{{[0-9]+}} @main() // CHECK: alloca [[S_DOUBLE_TY]], // CHECK: [[TEST:%.+]] = alloca [[S_DOUBLE_TY]], // CHECK: [[T_VAR_ADDR:%.+]] = alloca i32, @@ -171,7 +171,7 @@ // CHECK: [[S_ARR_ADDR:%.+]] = alloca [2 x [[S_DOUBLE_TY]]], // CHECK: [[VAR_ADDR:%.+]] = alloca [[S_DOUBLE_TY]], -// CHECK: call {{.*}} [[S_DOUBLE_TY_CONSTR:@.+]]([[S_DOUBLE_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_DOUBLE_TY_CONSTR:@.+]]([[S_DOUBLE_TY]]* frozen [[TEST]]) // CHECK: [[RES:%.+]] = call {{.*}}i32 @__kmpc_master( // CHECK-NEXT: [[IS_MASTER:%.+]] = icmp ne i32 [[RES]], 0 @@ -211,14 +211,14 @@ // Constructors for s_arr and var. // s_arr; // CHECK: [[PRIVATE_S_ARR_REF:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 -// CHECK: call {{.*}} [[S_DOUBLE_TY_CONSTR]]([[S_DOUBLE_TY]]* [[S_ARR_CUR:%[^,]+]]) +// CHECK: call {{.*}} [[S_DOUBLE_TY_CONSTR]]([[S_DOUBLE_TY]]* frozen [[S_ARR_CUR:%[^,]+]]) // CHECK: getelementptr inbounds [[S_DOUBLE_TY]], [[S_DOUBLE_TY]]* [[S_ARR_CUR]], i{{.+}} 1 // CHECK: icmp eq // CHECK: br i1 // var; // CHECK: [[PRIVATE_VAR_REF:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 1 -// CHECK: call {{.*}} [[S_DOUBLE_TY_CONSTR]]([[S_DOUBLE_TY]]* [[PRIVATE_VAR_REF]]) +// CHECK: call {{.*}} [[S_DOUBLE_TY_CONSTR]]([[S_DOUBLE_TY]]* frozen [[PRIVATE_VAR_REF]]) // t_var; // vec; @@ -235,7 +235,7 @@ // CHECK-NEXT: br label {{%?}}[[EXIT]] // CHECK: [[EXIT]] -// CHECK: define internal void [[PRIVATES_MAP_FN:@.+]]([[PRIVATES_MAIN_TY]]* noalias %0, [[S_DOUBLE_TY]]** noalias %1, i32** noalias %2, [2 x [[S_DOUBLE_TY]]]** noalias %3, [2 x i32]** noalias %4, i32** noalias %5) +// CHECK: define internal void [[PRIVATES_MAP_FN:@.+]]([[PRIVATES_MAIN_TY]]* frozen noalias %0, [[S_DOUBLE_TY]]** frozen noalias %1, i32** frozen noalias %2, [2 x [[S_DOUBLE_TY]]]** frozen noalias %3, [2 x i32]** frozen noalias %4, i32** frozen noalias %5) // CHECK: [[PRIVATES:%.+]] = load [[PRIVATES_MAIN_TY]]*, [[PRIVATES_MAIN_TY]]** // CHECK: [[PRIV_S_VAR:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i32 0, i32 0 // CHECK: [[ARG3:%.+]] = load [2 x [[S_DOUBLE_TY]]]**, [2 x [[S_DOUBLE_TY]]]*** %{{.+}}, @@ -254,7 +254,7 @@ // CHECK: store i{{[0-9]+}}* [[PRIV_SIVAR]], i{{[0-9]+}}** [[ARG5]], // CHECK: ret void -// CHECK: define internal i32 [[TASK_ENTRY]](i32 %0, [[KMP_TASK_MAIN_TY]]* noalias %1) +// CHECK: define internal frozen i32 [[TASK_ENTRY]](i32 frozen %0, [[KMP_TASK_MAIN_TY]]* frozen noalias %1) // CHECK: [[PRIV_VAR_ADDR:%.+]] = alloca [[S_DOUBLE_TY]]*, // CHECK: [[PRIV_T_VAR_ADDR:%.+]] = alloca i32*, @@ -300,7 +300,7 @@ // CHECK: br label // CHECK: ret -// CHECK: define internal void [[MAIN_DUP]]([[KMP_TASK_MAIN_TY]]* %0, [[KMP_TASK_MAIN_TY]]* %1, i32 %2) +// CHECK: define internal void [[MAIN_DUP]]([[KMP_TASK_MAIN_TY]]* frozen %0, [[KMP_TASK_MAIN_TY]]* frozen %1, i32 frozen %2) // CHECK: getelementptr inbounds [[KMP_TASK_MAIN_TY]], [[KMP_TASK_MAIN_TY]]* %{{.+}}, i32 0, i32 0 // CHECK: getelementptr inbounds [[KMP_TASK_T_TY]], [[KMP_TASK_T_TY]]* %{{.+}}, i32 0, i32 8 // CHECK: load i32, i32* % @@ -321,15 +321,15 @@ // CHECK: call {{.*}} [[S_DOUBLE_TY_CONSTR]]([[S_DOUBLE_TY]]* // CHECK: ret void -// CHECK: define internal i32 [[DESTRUCTORS]](i32 %0, [[KMP_TASK_MAIN_TY]]* noalias %1) +// CHECK: define internal frozen i32 [[DESTRUCTORS]](i32 frozen %0, [[KMP_TASK_MAIN_TY]]* frozen noalias %1) // CHECK: [[PRIVATES:%.+]] = getelementptr inbounds [[KMP_TASK_MAIN_TY]], [[KMP_TASK_MAIN_TY]]* [[RES_KMP_TASK:%.+]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 // CHECK: [[PRIVATE_S_ARR_REF:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 0 // CHECK: [[PRIVATE_VAR_REF:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 1 -// CHECK: call {{.*}} @_ZN1SIdED1Ev([[S_DOUBLE_TY]]* [[PRIVATE_VAR_REF]]) +// CHECK: call {{.*}} @_ZN1SIdED1Ev([[S_DOUBLE_TY]]* frozen [[PRIVATE_VAR_REF]]) // CHECK: getelementptr inbounds [2 x [[S_DOUBLE_TY]]], [2 x [[S_DOUBLE_TY]]]* [[PRIVATE_S_ARR_REF]], i{{.+}} 0, i{{.+}} 0 // CHECK: getelementptr inbounds [[S_DOUBLE_TY]], [[S_DOUBLE_TY]]* %{{.+}}, i{{.+}} 2 // CHECK: [[PRIVATE_S_ARR_ELEM_REF:%.+]] = getelementptr inbounds [[S_DOUBLE_TY]], [[S_DOUBLE_TY]]* %{{.+}}, i{{.+}} -1 -// CHECK: call {{.*}} @_ZN1SIdED1Ev([[S_DOUBLE_TY]]* [[PRIVATE_S_ARR_ELEM_REF]]) +// CHECK: call {{.*}} @_ZN1SIdED1Ev([[S_DOUBLE_TY]]* frozen [[PRIVATE_S_ARR_ELEM_REF]]) // CHECK: icmp eq // CHECK: br i1 // CHECK: ret i32 @@ -342,7 +342,7 @@ // CHECK: [[S_ARR_ADDR:%.+]] = alloca [2 x [[S_INT_TY]]], // CHECK: [[VAR_ADDR:%.+]] = alloca [[S_INT_TY]], -// CHECK: call {{.*}} [[S_INT_TY_CONSTR:@.+]]([[S_INT_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_INT_TY_CONSTR:@.+]]([[S_INT_TY]]* frozen [[TEST]]) // Store original variables in capture struct. // CHECK: [[VEC_REF:%.+]] = getelementptr inbounds [[CAP_TMAIN_TY]], [[CAP_TMAIN_TY]]* %{{.+}}, i{{[0-9]+}} 0, i{{[0-9]+}} 0 @@ -380,14 +380,14 @@ // CHECK: [[PRIVATE_S_ARR_REF:%.+]] = getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i{{[0-9]+}} 0, i{{[0-9]+}} 2 // CHECK: getelementptr inbounds [2 x [[S_INT_TY]]], [2 x [[S_INT_TY]]]* [[PRIVATE_S_ARR_REF]], i{{.+}} 0, i{{.+}} 0 // CHECK: getelementptr inbounds [[S_INT_TY]], [[S_INT_TY]]* %{{.+}}, i{{.+}} 2 -// CHECK: call {{.*}} [[S_INT_TY_CONSTR]]([[S_INT_TY]]* [[S_ARR_CUR:%[^,]+]]) +// CHECK: call {{.*}} [[S_INT_TY_CONSTR]]([[S_INT_TY]]* frozen [[S_ARR_CUR:%[^,]+]]) // CHECK: getelementptr inbounds [[S_INT_TY]], [[S_INT_TY]]* [[S_ARR_CUR]], i{{.+}} 1 // CHECK: icmp eq // CHECK: br i1 // var; // CHECK: [[PRIVATE_VAR_REF:%.+]] = getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 3 -// CHECK: call {{.*}} [[S_INT_TY_CONSTR]]([[S_INT_TY]]* [[PRIVATE_VAR_REF]]) +// CHECK: call {{.*}} [[S_INT_TY_CONSTR]]([[S_INT_TY]]* frozen [[PRIVATE_VAR_REF]]) // Provide pointer to destructor function, which will destroy private variables at the end of the task. // CHECK: [[DESTRUCTORS_REF:%.+]] = getelementptr inbounds [[KMP_TASK_T_TY]], [[KMP_TASK_T_TY]]* [[TASK]], i{{.+}} 0, i{{.+}} 3 @@ -401,7 +401,7 @@ // CHECK-NOT: getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 2 // CHECK-NOT: getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 3 -// CHECK: define internal void [[PRIVATES_MAP_FN:@.+]]([[PRIVATES_TMAIN_TY]]* noalias %0, i32** noalias %1, [2 x i32]** noalias %2, [2 x [[S_INT_TY]]]** noalias %3, [[S_INT_TY]]** noalias %4) +// CHECK: define internal void [[PRIVATES_MAP_FN:@.+]]([[PRIVATES_TMAIN_TY]]* frozen noalias %0, i32** frozen noalias %1, [2 x i32]** frozen noalias %2, [2 x [[S_INT_TY]]]** frozen noalias %3, [[S_INT_TY]]** frozen noalias %4) // CHECK: [[PRIVATES:%.+]] = load [[PRIVATES_TMAIN_TY]]*, [[PRIVATES_TMAIN_TY]]** // CHECK: [[PRIV_T_VAR:%.+]] = getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i32 0, i32 0 // CHECK: [[ARG1:%.+]] = load i32**, i32*** %{{.+}}, @@ -417,7 +417,7 @@ // CHECK: store [[S_INT_TY]]* [[PRIV_VAR]], [[S_INT_TY]]** [[ARG4]], // CHECK: ret void -// CHECK: define internal i32 [[TASK_ENTRY]](i32 %0, [[KMP_TASK_TMAIN_TY]]* noalias %1) +// CHECK: define internal frozen i32 [[TASK_ENTRY]](i32 frozen %0, [[KMP_TASK_TMAIN_TY]]* frozen noalias %1) // CHECK: alloca i32*, // CHECK-DAG: [[PRIV_T_VAR_ADDR:%.+]] = alloca i32*, // CHECK-DAG: [[PRIV_VEC_ADDR:%.+]] = alloca [2 x i32]*, @@ -456,7 +456,7 @@ // CHECK: br label // CHECK: ret -// CHECK: define internal void [[TMAIN_DUP]]([[KMP_TASK_TMAIN_TY]]* %0, [[KMP_TASK_TMAIN_TY]]* %1, i32 %2) +// CHECK: define internal void [[TMAIN_DUP]]([[KMP_TASK_TMAIN_TY]]* frozen %0, [[KMP_TASK_TMAIN_TY]]* frozen %1, i32 frozen %2) // CHECK: getelementptr inbounds [[KMP_TASK_TMAIN_TY]], [[KMP_TASK_TMAIN_TY]]* %{{.+}}, i32 0, i32 0 // CHECK: getelementptr inbounds [[KMP_TASK_T_TY]], [[KMP_TASK_T_TY]]* %{{.+}}, i32 0, i32 8 // CHECK: load i32, i32* % @@ -477,15 +477,15 @@ // CHECK: call {{.*}} [[S_INT_TY_CONSTR]]([[S_INT_TY]]* // CHECK: ret void -// CHECK: define internal i32 [[DESTRUCTORS]](i32 %0, [[KMP_TASK_TMAIN_TY]]* noalias %1) +// CHECK: define internal frozen i32 [[DESTRUCTORS]](i32 frozen %0, [[KMP_TASK_TMAIN_TY]]* frozen noalias %1) // CHECK: [[PRIVATES:%.+]] = getelementptr inbounds [[KMP_TASK_TMAIN_TY]], [[KMP_TASK_TMAIN_TY]]* [[RES_KMP_TASK:%.+]], i{{[0-9]+}} 0, i{{[0-9]+}} 2 // CHECK: [[PRIVATE_S_ARR_REF:%.+]] = getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 2 // CHECK: [[PRIVATE_VAR_REF:%.+]] = getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 3 -// CHECK: call void @_ZN1SIiED1Ev([[S_INT_TY]]* [[PRIVATE_VAR_REF]]) +// CHECK: call void @_ZN1SIiED1Ev([[S_INT_TY]]* frozen [[PRIVATE_VAR_REF]]) // CHECK: getelementptr inbounds [2 x [[S_INT_TY]]], [2 x [[S_INT_TY]]]* [[PRIVATE_S_ARR_REF]], i{{.+}} 0, i{{.+}} 0 // CHECK: getelementptr inbounds [[S_INT_TY]], [[S_INT_TY]]* %{{.+}}, i{{.+}} 2 // CHECK: [[PRIVATE_S_ARR_ELEM_REF:%.+]] = getelementptr inbounds [[S_INT_TY]], [[S_INT_TY]]* %{{.+}}, i{{.+}} -1 -// CHECK: call void @_ZN1SIiED1Ev([[S_INT_TY]]* [[PRIVATE_S_ARR_ELEM_REF]]) +// CHECK: call void @_ZN1SIiED1Ev([[S_INT_TY]]* frozen [[PRIVATE_S_ARR_ELEM_REF]]) // CHECK: icmp eq // CHECK: br i1 // CHECK: ret i32 diff --git a/clang/test/OpenMP/parallel_master_taskloop_loop_messages.cpp b/clang/test/OpenMP/parallel_master_taskloop_loop_messages.cpp --- a/clang/test/OpenMP/parallel_master_taskloop_loop_messages.cpp +++ b/clang/test/OpenMP/parallel_master_taskloop_loop_messages.cpp @@ -177,7 +177,7 @@ c[ii] = a[ii]; #pragma omp parallel -// Ok but undefined behavior (in general, cannot check that incr +// Ok but undefined behavior (in frozen general, cannot check incr that // is really loop-invariant). #pragma omp parallel master taskloop for (ii = 0; ii < 10; ii = ii + ii) diff --git a/clang/test/OpenMP/parallel_master_taskloop_private_codegen.cpp b/clang/test/OpenMP/parallel_master_taskloop_private_codegen.cpp --- a/clang/test/OpenMP/parallel_master_taskloop_private_codegen.cpp +++ b/clang/test/OpenMP/parallel_master_taskloop_private_codegen.cpp @@ -67,7 +67,7 @@ // LAMBDA: ret #pragma omp parallel master taskloop private(g, sivar) for (int i = 0; i < 10; ++i) { - // LAMBDA: define {{.+}} void [[INNER_LAMBDA:@.+]](%{{.+}}* [[ARG_PTR:%.+]]) + // LAMBDA: define {{.+}} void [[INNER_LAMBDA:@.+]](%{{.+}}* frozen [[ARG_PTR:%.+]]) // LAMBDA: store %{{.+}}* [[ARG_PTR]], %{{.+}}** [[ARG_PTR_REF:%.+]], // LAMBDA: [[ARG_PTR:%.+]] = load %{{.+}}*, %{{.+}}** [[ARG_PTR_REF]] // LAMBDA: [[G_PTR_REF:%.+]] = getelementptr inbounds %{{.+}}, %{{.+}}* [[ARG_PTR]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 @@ -77,7 +77,7 @@ // LAMBDA: [[SIVAR_REF:%.+]] = load i{{[0-9]+}}*, i{{[0-9]+}}** [[SIVAR_PTR_REF]] // LAMBDA: store i{{[0-9]+}} 3, i{{[0-9]+}}* [[SIVAR_REF]] - // LAMBDA: define internal i32 [[TASK_ENTRY]](i32 %0, %{{.+}}* noalias %1) + // LAMBDA: define internal frozen i32 [[TASK_ENTRY]](i32 frozen %0, %{{.+}}* frozen noalias %1) g = 1; sivar = 2; // LAMBDA: store double 1.0{{.+}}, double* %{{.+}}, @@ -112,7 +112,7 @@ // BLOCKS-NOT: [[SIVAR]]{{[[^:word:]]}} // BLOCKS: ret - // BLOCKS: define internal i32 [[TASK_ENTRY]](i32 %0, %{{.+}}* noalias %1) + // BLOCKS: define internal frozen i32 [[TASK_ENTRY]](i32 frozen %0, %{{.+}}* frozen noalias %1) g = 1; sivar = 3; // BLOCKS: store double 1.0{{.+}}, double* %{{.+}}, @@ -145,14 +145,14 @@ #endif } -// CHECK: define i{{[0-9]+}} @main() +// CHECK: define frozen i{{[0-9]+}} @main() // CHECK: [[TEST:%.+]] = alloca [[S_DOUBLE_TY]], // CHECK: [[T_VAR_ADDR:%.+]] = alloca i32, // CHECK: [[VEC_ADDR:%.+]] = alloca [2 x i32], // CHECK: [[S_ARR_ADDR:%.+]] = alloca [2 x [[S_DOUBLE_TY]]], // CHECK: [[VAR_ADDR:%.+]] = alloca [[S_DOUBLE_TY]], -// CHECK: call {{.*}} [[S_DOUBLE_TY_DEF_CONSTR:@.+]]([[S_DOUBLE_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_DOUBLE_TY_DEF_CONSTR:@.+]]([[S_DOUBLE_TY]]* frozen [[TEST]]) // CHECK: [[RES:%.+]] = call {{.*}}i32 @__kmpc_master( // CHECK-NEXT: [[IS_MASTER:%.+]] = icmp ne i32 [[RES]], 0 @@ -179,14 +179,14 @@ // CHECK: [[PRIVATE_S_ARR_REF:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 // CHECK: getelementptr inbounds [2 x [[S_DOUBLE_TY]]], [2 x [[S_DOUBLE_TY]]]* [[PRIVATE_S_ARR_REF]], i{{.+}} 0, i{{.+}} 0 // CHECK: getelementptr inbounds [[S_DOUBLE_TY]], [[S_DOUBLE_TY]]* %{{.+}}, i{{.+}} 2 -// CHECK: call void [[S_DOUBLE_TY_DEF_CONSTR]]([[S_DOUBLE_TY]]* [[S_ARR_CUR:%.+]]) +// CHECK: call void [[S_DOUBLE_TY_DEF_CONSTR]]([[S_DOUBLE_TY]]* frozen [[S_ARR_CUR:%.+]]) // CHECK: getelementptr inbounds [[S_DOUBLE_TY]], [[S_DOUBLE_TY]]* [[S_ARR_CUR]], i{{.+}} 1 // CHECK: icmp eq // CHECK: br i1 // var; // CHECK: [[PRIVATE_VAR_REF:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 1 -// CHECK: call void [[S_DOUBLE_TY_DEF_CONSTR]]([[S_DOUBLE_TY]]* [[PRIVATE_VAR_REF:%.+]]) +// CHECK: call void [[S_DOUBLE_TY_DEF_CONSTR]]([[S_DOUBLE_TY]]* frozen [[PRIVATE_VAR_REF:%.+]]) // Provide pointer to destructor function, which will destroy private variables at the end of the task. // CHECK: [[DESTRUCTORS_REF:%.+]] = getelementptr inbounds [[KMP_TASK_T_TY]], [[KMP_TASK_T_TY]]* [[TASK]], i{{.+}} 0, i{{.+}} 3 @@ -204,7 +204,7 @@ // CHECK-NOT: getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 3 // -// CHECK: define internal void [[PRIVATES_MAP_FN:@.+]]([[PRIVATES_MAIN_TY]]* noalias %0, [[S_DOUBLE_TY]]** noalias %1, i32** noalias %2, [2 x [[S_DOUBLE_TY]]]** noalias %3, [2 x i32]** noalias %4, i32** noalias %5) +// CHECK: define internal void [[PRIVATES_MAP_FN:@.+]]([[PRIVATES_MAIN_TY]]* frozen noalias %0, [[S_DOUBLE_TY]]** frozen noalias %1, i32** frozen noalias %2, [2 x [[S_DOUBLE_TY]]]** frozen noalias %3, [2 x i32]** frozen noalias %4, i32** frozen noalias %5) // CHECK: [[PRIVATES:%.+]] = load [[PRIVATES_MAIN_TY]]*, [[PRIVATES_MAIN_TY]]** // CHECK: [[PRIV_S_VAR:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i32 0, i32 0 // CHECK: [[ARG3:%.+]] = load [2 x [[S_DOUBLE_TY]]]**, [2 x [[S_DOUBLE_TY]]]*** %{{.+}}, @@ -220,7 +220,7 @@ // CHECK: store [2 x i32]* [[PRIV_VEC]], [2 x i32]** [[ARG4]], // CHECK: ret void -// CHECK: define internal i32 [[TASK_ENTRY]](i32 %0, [[KMP_TASK_MAIN_TY]]* noalias %1) +// CHECK: define internal frozen i32 [[TASK_ENTRY]](i32 frozen %0, [[KMP_TASK_MAIN_TY]]* frozen noalias %1) // CHECK: [[PRIV_VAR_ADDR:%.+]] = alloca [[S_DOUBLE_TY]]*, // CHECK: [[PRIV_T_VAR_ADDR:%.+]] = alloca i32*, @@ -245,7 +245,7 @@ // CHECK: ret -// CHECK: define internal void [[MAIN_DUP]]([[KMP_TASK_MAIN_TY]]* %0, [[KMP_TASK_MAIN_TY]]* %1, i32 %2) +// CHECK: define internal void [[MAIN_DUP]]([[KMP_TASK_MAIN_TY]]* frozen %0, [[KMP_TASK_MAIN_TY]]* frozen %1, i32 frozen %2) // CHECK: getelementptr inbounds [[KMP_TASK_MAIN_TY]], [[KMP_TASK_MAIN_TY]]* %{{.+}}, i32 0, i32 1 // CHECK: getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* %{{.+}}, i32 0, i32 0 // CHECK: getelementptr inbounds [2 x [[S_DOUBLE_TY]]], [2 x [[S_DOUBLE_TY]]]* %{{.+}}, i32 0, i32 0 @@ -262,15 +262,15 @@ // CHECK: call {{.*}} [[S_DOUBLE_TY_DEF_CONSTR]]([[S_DOUBLE_TY]]* // CHECK: ret void -// CHECK: define internal i32 [[DESTRUCTORS]](i32 %0, [[KMP_TASK_MAIN_TY]]* noalias %1) +// CHECK: define internal frozen i32 [[DESTRUCTORS]](i32 frozen %0, [[KMP_TASK_MAIN_TY]]* frozen noalias %1) // CHECK: [[PRIVATES:%.+]] = getelementptr inbounds [[KMP_TASK_MAIN_TY]], [[KMP_TASK_MAIN_TY]]* [[RES_KMP_TASK:%.+]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 // CHECK: [[PRIVATE_S_ARR_REF:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 0 // CHECK: [[PRIVATE_VAR_REF:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 1 -// CHECK: call void @_ZN1SIdED1Ev([[S_DOUBLE_TY]]* [[PRIVATE_VAR_REF]]) +// CHECK: call void @_ZN1SIdED1Ev([[S_DOUBLE_TY]]* frozen [[PRIVATE_VAR_REF]]) // CHECK: getelementptr inbounds [2 x [[S_DOUBLE_TY]]], [2 x [[S_DOUBLE_TY]]]* [[PRIVATE_S_ARR_REF]], i{{.+}} 0, i{{.+}} 0 // CHECK: getelementptr inbounds [[S_DOUBLE_TY]], [[S_DOUBLE_TY]]* %{{.+}}, i{{.+}} 2 // CHECK: [[PRIVATE_S_ARR_ELEM_REF:%.+]] = getelementptr inbounds [[S_DOUBLE_TY]], [[S_DOUBLE_TY]]* %{{.+}}, i{{.+}} -1 -// CHECK: call void @_ZN1SIdED1Ev([[S_DOUBLE_TY]]* [[PRIVATE_S_ARR_ELEM_REF]]) +// CHECK: call void @_ZN1SIdED1Ev([[S_DOUBLE_TY]]* frozen [[PRIVATE_S_ARR_ELEM_REF]]) // CHECK: icmp eq // CHECK: br i1 // CHECK: ret i32 @@ -281,7 +281,7 @@ // CHECK: [[S_ARR_ADDR:%.+]] = alloca [2 x [[S_INT_TY]]], // CHECK: [[VAR_ADDR:%.+]] = alloca [[S_INT_TY]], -// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR:@.+]]([[S_INT_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR:@.+]]([[S_INT_TY]]* frozen [[TEST]]) // Do not store original variables in capture struct. // CHECK-NOT: getelementptr inbounds [[CAP_TMAIN_TY]], @@ -304,14 +304,14 @@ // CHECK: [[PRIVATE_S_ARR_REF:%.+]] = getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i{{[0-9]+}} 0, i{{[0-9]+}} 2 // CHECK: getelementptr inbounds [2 x [[S_INT_TY]]], [2 x [[S_INT_TY]]]* [[PRIVATE_S_ARR_REF]], i{{.+}} 0, i{{.+}} 0 // CHECK: getelementptr inbounds [[S_INT_TY]], [[S_INT_TY]]* %{{.+}}, i{{.+}} 2 -// CHECK: call void [[S_INT_TY_DEF_CONSTR]]([[S_INT_TY]]* [[S_ARR_CUR:%.+]]) +// CHECK: call void [[S_INT_TY_DEF_CONSTR]]([[S_INT_TY]]* frozen [[S_ARR_CUR:%.+]]) // CHECK: getelementptr inbounds [[S_INT_TY]], [[S_INT_TY]]* [[S_ARR_CUR]], i{{.+}} 1 // CHECK: icmp eq // CHECK: br i1 // var; // CHECK: [[PRIVATE_VAR_REF:%.+]] = getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 3 -// CHECK: call void [[S_INT_TY_DEF_CONSTR]]([[S_INT_TY]]* [[PRIVATE_VAR_REF:%.+]]) +// CHECK: call void [[S_INT_TY_DEF_CONSTR]]([[S_INT_TY]]* frozen [[PRIVATE_VAR_REF:%.+]]) // Provide pointer to destructor function, which will destroy private variables at the end of the task. // CHECK: [[DESTRUCTORS_REF:%.+]] = getelementptr inbounds [[KMP_TASK_T_TY]], [[KMP_TASK_T_TY]]* [[TASK]], i{{.+}} 0, i{{.+}} 3 @@ -326,7 +326,7 @@ // CHECK-NOT: getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 3 // -// CHECK: define internal void [[PRIVATES_MAP_FN:@.+]]([[PRIVATES_TMAIN_TY]]* noalias %0, i32** noalias %1, [2 x i32]** noalias %2, [2 x [[S_INT_TY]]]** noalias %3, [[S_INT_TY]]** noalias %4) +// CHECK: define internal void [[PRIVATES_MAP_FN:@.+]]([[PRIVATES_TMAIN_TY]]* frozen noalias %0, i32** frozen noalias %1, [2 x i32]** frozen noalias %2, [2 x [[S_INT_TY]]]** frozen noalias %3, [[S_INT_TY]]** frozen noalias %4) // CHECK: [[PRIVATES:%.+]] = load [[PRIVATES_TMAIN_TY]]*, [[PRIVATES_TMAIN_TY]]** // CHECK: [[PRIV_T_VAR:%.+]] = getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i32 0, i32 0 // CHECK: [[ARG1:%.+]] = load i32**, i32*** %{{.+}}, @@ -342,7 +342,7 @@ // CHECK: store [[S_INT_TY]]* [[PRIV_VAR]], [[S_INT_TY]]** [[ARG4]], // CHECK: ret void -// CHECK: define internal i32 [[TASK_ENTRY]](i32 %0, [[KMP_TASK_TMAIN_TY]]* noalias %1) +// CHECK: define internal frozen i32 [[TASK_ENTRY]](i32 frozen %0, [[KMP_TASK_TMAIN_TY]]* frozen noalias %1) // CHECK: alloca i32*, // CHECK-DAG: [[PRIV_T_VAR_ADDR:%.+]] = alloca i32*, @@ -365,7 +365,7 @@ // CHECK: ret -// CHECK: define internal void [[TMAIN_DUP]]([[KMP_TASK_TMAIN_TY]]* %0, [[KMP_TASK_TMAIN_TY]]* %1, i32 %2) +// CHECK: define internal void [[TMAIN_DUP]]([[KMP_TASK_TMAIN_TY]]* frozen %0, [[KMP_TASK_TMAIN_TY]]* frozen %1, i32 frozen %2) // CHECK: getelementptr inbounds [[KMP_TASK_TMAIN_TY]], [[KMP_TASK_TMAIN_TY]]* %{{.+}}, i32 0, i32 2 // CHECK: getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* %{{.+}}, i32 0, i32 2 // CHECK: getelementptr inbounds [2 x [[S_INT_TY]]], [2 x [[S_INT_TY]]]* %{{.+}}, i32 0, i32 0 @@ -382,15 +382,15 @@ // CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR]]([[S_INT_TY]]* // CHECK: ret void -// CHECK: define internal i32 [[DESTRUCTORS]](i32 %0, [[KMP_TASK_TMAIN_TY]]* noalias %1) +// CHECK: define internal frozen i32 [[DESTRUCTORS]](i32 frozen %0, [[KMP_TASK_TMAIN_TY]]* frozen noalias %1) // CHECK: [[PRIVATES:%.+]] = getelementptr inbounds [[KMP_TASK_TMAIN_TY]], [[KMP_TASK_TMAIN_TY]]* [[RES_KMP_TASK:%.+]], i{{[0-9]+}} 0, i{{[0-9]+}} 2 // CHECK: [[PRIVATE_S_ARR_REF:%.+]] = getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 2 // CHECK: [[PRIVATE_VAR_REF:%.+]] = getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 3 -// CHECK: call void @_ZN1SIiED1Ev([[S_INT_TY]]* [[PRIVATE_VAR_REF]]) +// CHECK: call void @_ZN1SIiED1Ev([[S_INT_TY]]* frozen [[PRIVATE_VAR_REF]]) // CHECK: getelementptr inbounds [2 x [[S_INT_TY]]], [2 x [[S_INT_TY]]]* [[PRIVATE_S_ARR_REF]], i{{.+}} 0, i{{.+}} 0 // CHECK: getelementptr inbounds [[S_INT_TY]], [[S_INT_TY]]* %{{.+}}, i{{.+}} 2 // CHECK: [[PRIVATE_S_ARR_ELEM_REF:%.+]] = getelementptr inbounds [[S_INT_TY]], [[S_INT_TY]]* %{{.+}}, i{{.+}} -1 -// CHECK: call void @_ZN1SIiED1Ev([[S_INT_TY]]* [[PRIVATE_S_ARR_ELEM_REF]]) +// CHECK: call void @_ZN1SIiED1Ev([[S_INT_TY]]* frozen [[PRIVATE_S_ARR_ELEM_REF]]) // CHECK: icmp eq // CHECK: br i1 // CHECK: ret i32 diff --git a/clang/test/OpenMP/parallel_master_taskloop_reduction_codegen.cpp b/clang/test/OpenMP/parallel_master_taskloop_reduction_codegen.cpp --- a/clang/test/OpenMP/parallel_master_taskloop_reduction_codegen.cpp +++ b/clang/test/OpenMP/parallel_master_taskloop_reduction_codegen.cpp @@ -170,51 +170,51 @@ // CHECK-NEXT: br label {{%?}}[[EXIT]] // CHECK: [[EXIT]] -// CHECK: define internal void @[[RED_INIT1]](i8* noalias %{{.+}}, i8* noalias %{{.+}}) +// CHECK: define internal void @[[RED_INIT1]](i8* frozen noalias %{{.+}}, i8* frozen noalias %{{.+}}) // CHECK: store float 0.000000e+00, float* % // CHECK: ret void -// CHECK: define internal void @[[RED_COMB1]](i8* %0, i8* %1) +// CHECK: define internal void @[[RED_COMB1]](i8* frozen %0, i8* frozen %1) // CHECK: fadd float % // CHECK: store float %{{.+}}, float* % // CHECK: ret void -// CHECK: define internal void @[[RED_INIT2]](i8* noalias %{{.+}}, i8* noalias %{{.+}}) +// CHECK: define internal void @[[RED_INIT2]](i8* frozen noalias %{{.+}}, i8* frozen noalias %{{.+}}) // CHECK: call i8* @__kmpc_threadprivate_cached( // CHECK: call void [[OMP_INIT1:@.+]]( // CHECK: ret void -// CHECK: define internal void [[OMP_COMB1:@.+]](%struct.S* noalias %0, %struct.S* noalias %1) +// CHECK: define internal void [[OMP_COMB1:@.+]](%struct.S* frozen noalias %0, %struct.S* frozen noalias %1) // CHECK: fadd float % -// CHECK: define internal void [[OMP_INIT1]](%struct.S* noalias %0, %struct.S* noalias %1) +// CHECK: define internal void [[OMP_INIT1]](%struct.S* frozen noalias %0, %struct.S* frozen noalias %1) // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64( -// CHECK: define internal void @[[RED_FINI2]](i8* %0) +// CHECK: define internal void @[[RED_FINI2]](i8* frozen %0) // CHECK: call i8* @__kmpc_threadprivate_cached( // CHECK: call void @ // CHECK: ret void -// CHECK: define internal void @[[RED_COMB2]](i8* %0, i8* %1) +// CHECK: define internal void @[[RED_COMB2]](i8* frozen %0, i8* frozen %1) // CHECK: call i8* @__kmpc_threadprivate_cached( // CHECK: call void [[OMP_COMB1]]( // CHECK: ret void -// CHECK: define internal void @[[RED_INIT3]](i8* noalias %{{.+}}, i8* noalias %{{.+}}) +// CHECK: define internal void @[[RED_INIT3]](i8* frozen noalias %{{.+}}, i8* frozen noalias %{{.+}}) // CHECK: store float 0.000000e+00, float* % // CHECK: ret void -// CHECK: define internal void @[[RED_COMB3]](i8* %0, i8* %1) +// CHECK: define internal void @[[RED_COMB3]](i8* frozen %0, i8* frozen %1) // CHECK: fadd float % // CHECK: store float %{{.+}}, float* % // CHECK: ret void -// CHECK: define internal void @[[RED_INIT4]](i8* noalias %{{.+}}, i8* noalias %{{.+}}) +// CHECK: define internal void @[[RED_INIT4]](i8* frozen noalias %{{.+}}, i8* frozen noalias %{{.+}}) // CHECK: call i8* @__kmpc_threadprivate_cached( // CHECK: store float 0.000000e+00, float* % // CHECK: ret void -// CHECK: define internal void @[[RED_COMB4]](i8* %0, i8* %1) +// CHECK: define internal void @[[RED_COMB4]](i8* frozen %0, i8* frozen %1) // CHECK: call i8* @__kmpc_threadprivate_cached( // CHECK: fadd float % // CHECK: store float %{{.+}}, float* % diff --git a/clang/test/OpenMP/parallel_master_taskloop_simd_codegen.cpp b/clang/test/OpenMP/parallel_master_taskloop_simd_codegen.cpp --- a/clang/test/OpenMP/parallel_master_taskloop_simd_codegen.cpp +++ b/clang/test/OpenMP/parallel_master_taskloop_simd_codegen.cpp @@ -23,11 +23,11 @@ // CHECK: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* [[DEFLOC]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* [[OMP_OUTLINED2:@.+]] to void (i32*, i32*, ...)*), i64 [[GRAINSIZE:%.+]]) // CHECK: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* [[DEFLOC]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, i8***, i64, i64)* [[OMP_OUTLINED3:@.+]] to void (i32*, i32*, ...)*), i32* [[I:%.+]], i32* [[ARGC:%.+]], i8*** [[ARGV:%.+]], i64 [[COND:%.+]], i64 [[NUM_TASKS:%.+]]) // CHECK: call void @__kmpc_serialized_parallel(%struct.ident_t* [[DEFLOC]], i32 [[GTID]]) -// CHECK: call void [[OMP_OUTLINED3]](i32* %{{.+}}, i32* %{{.+}}, i32* [[I]], i32* [[ARGC]], i8*** [[ARGV]], i64 [[COND]], i64 [[NUM_TASKS]]) +// CHECK: call void [[OMP_OUTLINED3]](i32* frozen %{{.+}}, i32* frozen %{{.+}}, i32* frozen [[I]], i32* frozen [[ARGC]], i8*** frozen [[ARGV]], i64 frozen [[COND]], i64 frozen [[NUM_TASKS]]) // CHECK: call void @__kmpc_end_serialized_parallel(%struct.ident_t* [[DEFLOC]], i32 [[GTID]]) -// CHECK: define internal void [[OMP_OUTLINED1]](i32* noalias %{{.+}}, i32* noalias %{{.+}}, i64 %{{.+}}) +// CHECK: define internal void [[OMP_OUTLINED1]](i32* frozen noalias %{{.+}}, i32* frozen noalias %{{.+}}, i64 frozen %{{.+}}) // CHECK: [[PRIO_ADDR:%.+]] = bitcast i64* %{{.+}} to i32* // CHECK: [[RES:%.+]] = call {{.*}}i32 @__kmpc_master(%struct.ident_t* [[DEFLOC]], i32 [[GTID:%.+]]) // CHECK-NEXT: [[IS_MASTER:%.+]] = icmp ne i32 [[RES]], 0 @@ -55,7 +55,7 @@ // CHECK: [[EXIT]] -// CHECK: define internal i32 [[TASK1]]( +// CHECK: define internal frozen i32 [[TASK1]]( // CHECK: [[DOWN:%.+]] = getelementptr inbounds [[TD_TY:%.+]], [[TD_TY]]* %{{.+}}, i32 0, i32 5 // CHECK: [[DOWN_VAL:%.+]] = load i64, i64* [[DOWN]], // CHECK: [[UP:%.+]] = getelementptr inbounds [[TD_TY]], [[TD_TY]]* %{{.+}}, i32 0, i32 6 @@ -88,7 +88,7 @@ #pragma omp parallel master taskloop simd priority(argc) safelen(8) for (int i = 0; i < 10; ++i) ; -// CHECK: define internal void [[OMP_OUTLINED2]](i32* noalias %{{.+}}, i32* noalias %{{.+}}, i64 %{{.+}}) +// CHECK: define internal void [[OMP_OUTLINED2]](i32* frozen noalias %{{.+}}, i32* frozen noalias %{{.+}}, i64 frozen %{{.+}}) // CHECK: [[RES:%.+]] = call {{.*}}i32 @__kmpc_master(%struct.ident_t* [[DEFLOC]], i32 [[GTID:%.+]]) // CHECK-NEXT: [[IS_MASTER:%.+]] = icmp ne i32 [[RES]], 0 // CHECK-NEXT: br i1 [[IS_MASTER]], label {{%?}}[[THEN:.+]], label {{%?}}[[EXIT:.+]] @@ -110,7 +110,7 @@ // CHECK: [[EXIT]] -// CHECK: define internal i32 [[TASK2]]( +// CHECK: define internal frozen i32 [[TASK2]]( // CHECK: [[DOWN:%.+]] = getelementptr inbounds [[TD_TY:%.+]], [[TD_TY]]* %{{.+}}, i32 0, i32 5 // CHECK: [[DOWN_VAL:%.+]] = load i64, i64* [[DOWN]], // CHECK: [[UP:%.+]] = getelementptr inbounds [[TD_TY]], [[TD_TY]]* %{{.+}}, i32 0, i32 6 @@ -143,7 +143,7 @@ #pragma omp parallel master taskloop simd nogroup grainsize(argc) simdlen(16) for (int i = 0; i < 10; ++i) ; -// CHECK: define internal void [[OMP_OUTLINED3]](i32* noalias %{{.+}}, i32* noalias %{{.+}}, i32* nonnull align 4 dereferenceable(4) %{{.+}}, i8*** nonnull align 8 dereferenceable(8) %{{.+}}, i64 %{{.+}}, i64 %{{.+}}) +// CHECK: define internal void [[OMP_OUTLINED3]](i32* frozen noalias %{{.+}}, i32* frozen noalias %{{.+}}, i32* frozen nonnull align 4 dereferenceable(4) %{{.+}}, i8*** frozen nonnull align 8 dereferenceable(8) %{{.+}}, i64 frozen %{{.+}}, i64 frozen %{{.+}}) // CHECK: [[RES:%.+]] = call {{.*}}i32 @__kmpc_master(%struct.ident_t* [[DEFLOC]], i32 [[GTID:%.+]]) // CHECK-NEXT: [[IS_MASTER:%.+]] = icmp ne i32 [[RES]], 0 // CHECK-NEXT: br i1 [[IS_MASTER]], label {{%?}}[[THEN:.+]], label {{%?}}[[EXIT:.+]] @@ -170,7 +170,7 @@ // CHECK-NEXT: br label {{%?}}[[EXIT]] // CHECK: [[EXIT]] -// CHECK: define internal i32 [[TASK3]]( +// CHECK: define internal frozen i32 [[TASK3]]( // CHECK: [[DOWN:%.+]] = getelementptr inbounds [[TD_TY:%.+]], [[TD_TY]]* %{{.+}}, i32 0, i32 5 // CHECK: [[DOWN_VAL:%.+]] = load i64, i64* [[DOWN]], // CHECK: [[UP:%.+]] = getelementptr inbounds [[TD_TY]], [[TD_TY]]* %{{.+}}, i32 0, i32 6 @@ -201,7 +201,7 @@ S(int c) { // CHECK: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* [[DEFLOC]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S*, i32*, i64)* [[OMP_OUTLINED4:@.+]] to void (i32*, i32*, ...)*), %struct.S* %{{.+}}, i32* %{{.+}}, i64 %{{.+}}) -// CHECK: define internal void [[OMP_OUTLINED4]](i32* noalias %{{.+}}, i32* noalias %{{.+}}, %struct.S* %{{.+}}, i32* nonnull align 4 dereferenceable(4) %{{.+}}, i64 %{{.+}}) +// CHECK: define internal void [[OMP_OUTLINED4]](i32* frozen noalias %{{.+}}, i32* frozen noalias %{{.+}}, %struct.S* frozen %{{.+}}, i32* frozen nonnull align 4 dereferenceable(4) %{{.+}}, i64 frozen %{{.+}}) // CHECK: [[CONV:%.+]] = bitcast i64* %{{.+}} to i8* // CHECK: [[CONDI8:%.+]] = load i8, i8* [[CONV]], // CHECK: [[COND:%.+]] = trunc i8 [[CONDI8]] to i1 @@ -224,7 +224,7 @@ } } s(1); -// CHECK: define internal i32 [[TASK4]]( +// CHECK: define internal frozen i32 [[TASK4]]( // CHECK: [[DOWN:%.+]] = getelementptr inbounds [[TD_TY:%.+]], [[TD_TY]]* %{{.+}}, i32 0, i32 5 // CHECK: [[DOWN_VAL:%.+]] = load i64, i64* [[DOWN]], // CHECK: [[UP:%.+]] = getelementptr inbounds [[TD_TY]], [[TD_TY]]* %{{.+}}, i32 0, i32 6 diff --git a/clang/test/OpenMP/parallel_master_taskloop_simd_firstprivate_codegen.cpp b/clang/test/OpenMP/parallel_master_taskloop_simd_firstprivate_codegen.cpp --- a/clang/test/OpenMP/parallel_master_taskloop_simd_firstprivate_codegen.cpp +++ b/clang/test/OpenMP/parallel_master_taskloop_simd_firstprivate_codegen.cpp @@ -85,7 +85,7 @@ // LAMBDA: ret #pragma omp parallel master taskloop simd firstprivate(g, sivar) for (int i = 0; i < 10; ++i) { - // LAMBDA: define {{.+}} void [[INNER_LAMBDA:@.+]](%{{.+}}* [[ARG_PTR:%.+]]) + // LAMBDA: define {{.+}} void [[INNER_LAMBDA:@.+]](%{{.+}}* frozen [[ARG_PTR:%.+]]) // LAMBDA: store %{{.+}}* [[ARG_PTR]], %{{.+}}** [[ARG_PTR_REF:%.+]], // LAMBDA: [[ARG_PTR:%.+]] = load %{{.+}}*, %{{.+}}** [[ARG_PTR_REF]] // LAMBDA: [[G_PTR_REF:%.+]] = getelementptr inbounds %{{.+}}, %{{.+}}* [[ARG_PTR]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 @@ -93,7 +93,7 @@ // LAMBDA: store double 2.0{{.+}}, double* [[G_REF]] // LAMBDA: store double* %{{.+}}, double** %{{.+}}, - // LAMBDA: define internal i32 [[TASK_ENTRY]](i32 %0, %{{.+}}* noalias %1) + // LAMBDA: define internal frozen i32 [[TASK_ENTRY]](i32 frozen %0, %{{.+}}* frozen noalias %1) g = 1; sivar = 11; // LAMBDA: store double 1.0{{.+}}, double* %{{.+}}, @@ -144,7 +144,7 @@ // BLOCKS: store double* %{{.+}}, double** %{{.+}}, // BLOCKS: store i{{[0-9]+}}* %{{.+}}, i{{[0-9]+}}** %{{.+}}, - // BLOCKS: define internal i32 [[TASK_ENTRY]](i32 %0, %{{.+}}* noalias %1) + // BLOCKS: define internal frozen i32 [[TASK_ENTRY]](i32 frozen %0, %{{.+}}* frozen noalias %1) g = 1; sivar = 11; // BLOCKS: store double 1.0{{.+}}, double* %{{.+}}, @@ -177,7 +177,7 @@ } // CHECK: [[SIVAR:.+]] = internal global i{{[0-9]+}} 0, -// CHECK: define i{{[0-9]+}} @main() +// CHECK: define frozen i{{[0-9]+}} @main() // CHECK: alloca [[S_DOUBLE_TY]], // CHECK: [[TEST:%.+]] = alloca [[S_DOUBLE_TY]], // CHECK: [[T_VAR_ADDR:%.+]] = alloca i32, @@ -185,7 +185,7 @@ // CHECK: [[S_ARR_ADDR:%.+]] = alloca [2 x [[S_DOUBLE_TY]]], // CHECK: [[VAR_ADDR:%.+]] = alloca [[S_DOUBLE_TY]], -// CHECK: call {{.*}} [[S_DOUBLE_TY_COPY_CONSTR:@.+]]([[S_DOUBLE_TY]]* [[TEST]], +// CHECK: call {{.*}} [[S_DOUBLE_TY_COPY_CONSTR:@.+]]([[S_DOUBLE_TY]]* frozen [[TEST]] // CHECK: [[RES:%.+]] = call {{.*}}i32 @__kmpc_master( // CHECK-NEXT: [[IS_MASTER:%.+]] = icmp ne i32 [[RES]], 0 @@ -220,7 +220,7 @@ // s_arr; // CHECK: [[PRIVATE_S_ARR_REF:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 // CHECK: bitcast [2 x [[S_DOUBLE_TY]]]* %{{.+}} to [[S_DOUBLE_TY]]* -// CHECK: call void [[S_DOUBLE_TY_COPY_CONSTR]]([[S_DOUBLE_TY]]* [[S_ARR_CUR:%[^,]+]], +// CHECK: call void [[S_DOUBLE_TY_COPY_CONSTR]]([[S_DOUBLE_TY]]* frozen [[S_ARR_CUR:%[^,]+]] // CHECK: getelementptr [[S_DOUBLE_TY]], [[S_DOUBLE_TY]]* [[S_ARR_CUR]], i{{.+}} 1 // CHECK: getelementptr [[S_DOUBLE_TY]], [[S_DOUBLE_TY]]* %{{.+}}, i{{.+}} 1 // CHECK: icmp eq @@ -228,7 +228,7 @@ // var; // CHECK: [[PRIVATE_VAR_REF:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 1 -// CHECK-NEXT: call void [[S_DOUBLE_TY_COPY_CONSTR]]([[S_DOUBLE_TY]]* [[PRIVATE_VAR_REF]], [[S_DOUBLE_TY]]* {{.*}}, +// CHECK-NEXT: call void [[S_DOUBLE_TY_COPY_CONSTR]]([[S_DOUBLE_TY]]* frozen [[PRIVATE_VAR_REF]], [[S_DOUBLE_TY]]* {{.*}} // t_var; // CHECK: [[PRIVATE_T_VAR_REF:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 2 @@ -257,7 +257,7 @@ // CHECK-NEXT: br label {{%?}}[[EXIT]] // CHECK: [[EXIT]] -// CHECK: define internal void [[PRIVATES_MAP_FN:@.+]]([[PRIVATES_MAIN_TY]]* noalias %0, [[S_DOUBLE_TY]]** noalias %1, i32** noalias %2, [2 x [[S_DOUBLE_TY]]]** noalias %3, [2 x i32]** noalias %4, i32** noalias %5) +// CHECK: define internal void [[PRIVATES_MAP_FN:@.+]]([[PRIVATES_MAIN_TY]]* frozen noalias %0, [[S_DOUBLE_TY]]** frozen noalias %1, i32** frozen noalias %2, [2 x [[S_DOUBLE_TY]]]** frozen noalias %3, [2 x i32]** frozen noalias %4, i32** frozen noalias %5) // CHECK: [[PRIVATES:%.+]] = load [[PRIVATES_MAIN_TY]]*, [[PRIVATES_MAIN_TY]]** // CHECK: [[PRIV_S_VAR:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i32 0, i32 0 // CHECK: [[ARG3:%.+]] = load [2 x [[S_DOUBLE_TY]]]**, [2 x [[S_DOUBLE_TY]]]*** %{{.+}}, @@ -276,7 +276,7 @@ // CHECK: store i{{[0-9]+}}* [[PRIV_SIVAR]], i{{[0-9]+}}** [[ARG5]], // CHECK: ret void -// CHECK: define internal i32 [[TASK_ENTRY]](i32 %0, [[KMP_TASK_MAIN_TY]]* noalias %1) +// CHECK: define internal frozen i32 [[TASK_ENTRY]](i32 frozen %0, [[KMP_TASK_MAIN_TY]]* frozen noalias %1) // CHECK: [[PRIV_VAR_ADDR:%.+]] = alloca [[S_DOUBLE_TY]]*, // CHECK: [[PRIV_T_VAR_ADDR:%.+]] = alloca i32*, @@ -303,7 +303,7 @@ // CHECK: ret -// CHECK: define internal void [[MAIN_DUP]]([[KMP_TASK_MAIN_TY]]* %0, [[KMP_TASK_MAIN_TY]]* %1, i32 %2) +// CHECK: define internal void [[MAIN_DUP]]([[KMP_TASK_MAIN_TY]]* frozen %0, [[KMP_TASK_MAIN_TY]]* frozen %1, i32 frozen %2) // CHECK: getelementptr inbounds [[KMP_TASK_MAIN_TY]], [[KMP_TASK_MAIN_TY]]* %{{.+}}, i32 0, i32 1 // CHECK: getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* %{{.+}}, i32 0, i32 0 // CHECK: getelementptr inbounds [2 x [[S_DOUBLE_TY]]], [2 x [[S_DOUBLE_TY]]]* %{{.+}}, i32 0, i32 0 @@ -320,15 +320,15 @@ // CHECK: call {{.*}} [[S_DOUBLE_TY_COPY_CONSTR]]([[S_DOUBLE_TY]]* // CHECK: ret void -// CHECK: define internal i32 [[DESTRUCTORS]](i32 %{{.+}}, [[KMP_TASK_MAIN_TY]]* noalias %{{.+}}) +// CHECK: define internal frozen i32 [[DESTRUCTORS]](i32 frozen %{{.+}}, [[KMP_TASK_MAIN_TY]]* frozen noalias %{{.+}}) // CHECK: [[PRIVATES:%.+]] = getelementptr inbounds [[KMP_TASK_MAIN_TY]], [[KMP_TASK_MAIN_TY]]* [[RES_KMP_TASK:%.+]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 // CHECK: [[PRIVATE_S_ARR_REF:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 0 // CHECK: [[PRIVATE_VAR_REF:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 1 -// CHECK: call void @_ZN1SIdED1Ev([[S_DOUBLE_TY]]* [[PRIVATE_VAR_REF]]) +// CHECK: call void @_ZN1SIdED1Ev([[S_DOUBLE_TY]]* frozen [[PRIVATE_VAR_REF]]) // CHECK: getelementptr inbounds [2 x [[S_DOUBLE_TY]]], [2 x [[S_DOUBLE_TY]]]* [[PRIVATE_S_ARR_REF]], i{{.+}} 0, i{{.+}} 0 // CHECK: getelementptr inbounds [[S_DOUBLE_TY]], [[S_DOUBLE_TY]]* %{{.+}}, i{{.+}} 2 // CHECK: [[PRIVATE_S_ARR_ELEM_REF:%.+]] = getelementptr inbounds [[S_DOUBLE_TY]], [[S_DOUBLE_TY]]* %{{.+}}, i{{.+}} -1 -// CHECK: call void @_ZN1SIdED1Ev([[S_DOUBLE_TY]]* [[PRIVATE_S_ARR_ELEM_REF]]) +// CHECK: call void @_ZN1SIdED1Ev([[S_DOUBLE_TY]]* frozen [[PRIVATE_S_ARR_ELEM_REF]]) // CHECK: icmp eq // CHECK: br i1 // CHECK: ret i32 @@ -340,7 +340,7 @@ // CHECK: [[S_ARR_ADDR:%.+]] = alloca [2 x [[S_INT_TY]]], // CHECK: [[VAR_ADDR:%.+]] = alloca [[S_INT_TY]], -// CHECK: call {{.*}} [[S_INT_TY_COPY_CONSTR:@.+]]([[S_INT_TY]]* [[TEST]], +// CHECK: call {{.*}} [[S_INT_TY_COPY_CONSTR:@.+]]([[S_INT_TY]]* frozen [[TEST]] // Store original variables in capture struct. // CHECK: [[S_ARR_REF:%.+]] = getelementptr inbounds [[CAP_TMAIN_TY]], [[CAP_TMAIN_TY]]* %{{.+}}, i{{[0-9]+}} 0, i{{[0-9]+}} 0 @@ -383,14 +383,14 @@ // CHECK: getelementptr inbounds [2 x [[S_INT_TY]]], [2 x [[S_INT_TY]]]* [[PRIVATE_S_ARR_REF]], i{{.+}} 0, i{{.+}} 0 // CHECK: bitcast [2 x [[S_INT_TY]]]* %{{.+}} to [[S_INT_TY]]* // CHECK: getelementptr [[S_INT_TY]], [[S_INT_TY]]* %{{.+}}, i{{.+}} 2 -// CHECK: call void [[S_INT_TY_COPY_CONSTR]]([[S_INT_TY]]* [[S_ARR_CUR:%[^,]+]], +// CHECK: call void [[S_INT_TY_COPY_CONSTR]]([[S_INT_TY]]* frozen [[S_ARR_CUR:%[^,]+]] // CHECK: getelementptr [[S_INT_TY]], [[S_INT_TY]]* [[S_ARR_CUR]], i{{.+}} 1 // CHECK: icmp eq // CHECK: br i1 // var; // CHECK: [[PRIVATE_VAR_REF:%.+]] = getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 3 -// CHECK-NEXT: call void [[S_INT_TY_COPY_CONSTR]]([[S_INT_TY]]* [[PRIVATE_VAR_REF]], +// CHECK-NEXT: call void [[S_INT_TY_COPY_CONSTR]]([[S_INT_TY]]* frozen [[PRIVATE_VAR_REF]] // Provide pointer to destructor function, which will destroy private variables at the end of the task. // CHECK: [[DESTRUCTORS_REF:%.+]] = getelementptr inbounds [[KMP_TASK_T_TY]], [[KMP_TASK_T_TY]]* [[TASK]], i{{.+}} 0, i{{.+}} 3 @@ -400,7 +400,7 @@ // Start task. // CHECK: call void @__kmpc_taskloop(%struct.ident_t* @{{.+}}, i32 %{{.+}}, i8* [[RES]], i32 1, i64* %{{.+}}, i64* %{{.+}}, i64 %{{.+}}, i32 1, i32 0, i64 0, i8* bitcast (void ([[KMP_TASK_TMAIN_TY]]*, [[KMP_TASK_TMAIN_TY]]*, i32)* [[TMAIN_DUP:@.+]] to i8*)) -// CHECK: define internal void [[PRIVATES_MAP_FN:@.+]]([[PRIVATES_TMAIN_TY]]* noalias %{{.+}}, i32** noalias %{{.+}}, [2 x i32]** noalias %{{.+}}, [2 x [[S_INT_TY]]]** noalias %{{.+}}, [[S_INT_TY]]** noalias %{{.+}}) +// CHECK: define internal void [[PRIVATES_MAP_FN:@.+]]([[PRIVATES_TMAIN_TY]]* frozen noalias %{{.+}}, i32** frozen noalias %{{.+}}, [2 x i32]** frozen noalias %{{.+}}, [2 x [[S_INT_TY]]]** frozen noalias %{{.+}}, [[S_INT_TY]]** frozen noalias %{{.+}}) // CHECK: [[PRIVATES:%.+]] = load [[PRIVATES_TMAIN_TY]]*, [[PRIVATES_TMAIN_TY]]** // CHECK: [[PRIV_T_VAR:%.+]] = getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i32 0, i32 0 // CHECK: [[ARG1:%.+]] = load i32**, i32*** %{{.+}}, @@ -416,7 +416,7 @@ // CHECK: store [[S_INT_TY]]* [[PRIV_VAR]], [[S_INT_TY]]** [[ARG4]], // CHECK: ret void -// CHECK: define internal i32 [[TASK_ENTRY]](i32 %0, [[KMP_TASK_TMAIN_TY]]* noalias %1) +// CHECK: define internal frozen i32 [[TASK_ENTRY]](i32 frozen %0, [[KMP_TASK_TMAIN_TY]]* frozen noalias %1) // CHECK: alloca i32*, // CHECK-DAG: [[PRIV_T_VAR_ADDR:%.+]] = alloca i32*, // CHECK-DAG: [[PRIV_VEC_ADDR:%.+]] = alloca [2 x i32]*, @@ -438,7 +438,7 @@ // CHECK: ret -// CHECK: define internal void [[TMAIN_DUP]]([[KMP_TASK_TMAIN_TY]]* %0, [[KMP_TASK_TMAIN_TY]]* %1, i32 %2) +// CHECK: define internal void [[TMAIN_DUP]]([[KMP_TASK_TMAIN_TY]]* frozen %0, [[KMP_TASK_TMAIN_TY]]* frozen %1, i32 frozen %2) // CHECK: getelementptr inbounds [[KMP_TASK_TMAIN_TY]], [[KMP_TASK_TMAIN_TY]]* %{{.+}}, i32 0, i32 2 // CHECK: getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* %{{.+}}, i32 0, i32 2 // CHECK: getelementptr inbounds [2 x [[S_INT_TY]]], [2 x [[S_INT_TY]]]* %{{.+}}, i32 0, i32 0 @@ -455,15 +455,15 @@ // CHECK: call {{.*}} [[S_INT_TY_COPY_CONSTR]]([[S_INT_TY]]* // CHECK: ret void -// CHECK: define internal i32 [[DESTRUCTORS]](i32 %0, [[KMP_TASK_TMAIN_TY]]* noalias %1) +// CHECK: define internal frozen i32 [[DESTRUCTORS]](i32 frozen %0, [[KMP_TASK_TMAIN_TY]]* frozen noalias %1) // CHECK: [[PRIVATES:%.+]] = getelementptr inbounds [[KMP_TASK_TMAIN_TY]], [[KMP_TASK_TMAIN_TY]]* [[RES_KMP_TASK:%.+]], i{{[0-9]+}} 0, i{{[0-9]+}} 2 // CHECK: [[PRIVATE_S_ARR_REF:%.+]] = getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 2 // CHECK: [[PRIVATE_VAR_REF:%.+]] = getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 3 -// CHECK: call void @_ZN1SIiED1Ev([[S_INT_TY]]* [[PRIVATE_VAR_REF]]) +// CHECK: call void @_ZN1SIiED1Ev([[S_INT_TY]]* frozen [[PRIVATE_VAR_REF]]) // CHECK: getelementptr inbounds [2 x [[S_INT_TY]]], [2 x [[S_INT_TY]]]* [[PRIVATE_S_ARR_REF]], i{{.+}} 0, i{{.+}} 0 // CHECK: getelementptr inbounds [[S_INT_TY]], [[S_INT_TY]]* %{{.+}}, i{{.+}} 2 // CHECK: [[PRIVATE_S_ARR_ELEM_REF:%.+]] = getelementptr inbounds [[S_INT_TY]], [[S_INT_TY]]* %{{.+}}, i{{.+}} -1 -// CHECK: call void @_ZN1SIiED1Ev([[S_INT_TY]]* [[PRIVATE_S_ARR_ELEM_REF]]) +// CHECK: call void @_ZN1SIiED1Ev([[S_INT_TY]]* frozen [[PRIVATE_S_ARR_ELEM_REF]]) // CHECK: icmp eq // CHECK: br i1 // CHECK: ret i32 diff --git a/clang/test/OpenMP/parallel_master_taskloop_simd_lastprivate_codegen.cpp b/clang/test/OpenMP/parallel_master_taskloop_simd_lastprivate_codegen.cpp --- a/clang/test/OpenMP/parallel_master_taskloop_simd_lastprivate_codegen.cpp +++ b/clang/test/OpenMP/parallel_master_taskloop_simd_lastprivate_codegen.cpp @@ -73,7 +73,7 @@ // LAMBDA: ret #pragma omp parallel master taskloop simd lastprivate(g, sivar) for (int i = 0; i < 10; ++i) { - // LAMBDA: define {{.+}} void [[INNER_LAMBDA:@.+]](%{{.+}}* [[ARG_PTR:%.+]]) + // LAMBDA: define {{.+}} void [[INNER_LAMBDA:@.+]](%{{.+}}* frozen [[ARG_PTR:%.+]]) // LAMBDA: store %{{.+}}* [[ARG_PTR]], %{{.+}}** [[ARG_PTR_REF:%.+]], // LAMBDA: [[ARG_PTR:%.+]] = load %{{.+}}*, %{{.+}}** [[ARG_PTR_REF]] // LAMBDA: [[G_PTR_REF:%.+]] = getelementptr inbounds %{{.+}}, %{{.+}}* [[ARG_PTR]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 @@ -81,7 +81,7 @@ // LAMBDA: store double 2.0{{.+}}, double* [[G_REF]] // LAMBDA: store double* %{{.+}}, double** %{{.+}}, - // LAMBDA: define internal i32 [[TASK_ENTRY]](i32 %0, %{{.+}}* noalias %1) + // LAMBDA: define internal frozen i32 [[TASK_ENTRY]](i32 frozen %0, %{{.+}}* frozen noalias %1) g = 1; sivar = 11; // LAMBDA: store double 1.0{{.+}}, double* %{{.+}},{{.*}}!llvm.access.group @@ -124,7 +124,7 @@ // BLOCKS: store double* %{{.+}}, double** %{{.+}}, // BLOCKS: store i{{[0-9]+}}* %{{.+}}, i{{[0-9]+}}** %{{.+}}, - // BLOCKS: define internal i32 [[TASK_ENTRY]](i32 %0, %{{.+}}* noalias %1) + // BLOCKS: define internal frozen i32 [[TASK_ENTRY]](i32 frozen %0, %{{.+}}* frozen noalias %1) g = 1; sivar = 11; // BLOCKS: store double 1.0{{.+}}, double* %{{.+}},{{.*}}!llvm.access.group @@ -163,7 +163,7 @@ } // CHECK: [[SIVAR:.+]] = internal global i{{[0-9]+}} 0, -// CHECK: define i{{[0-9]+}} @main() +// CHECK: define frozen i{{[0-9]+}} @main() // CHECK: alloca [[S_DOUBLE_TY]], // CHECK: [[TEST:%.+]] = alloca [[S_DOUBLE_TY]], // CHECK: [[T_VAR_ADDR:%.+]] = alloca i32, @@ -171,7 +171,7 @@ // CHECK: [[S_ARR_ADDR:%.+]] = alloca [2 x [[S_DOUBLE_TY]]], // CHECK: [[VAR_ADDR:%.+]] = alloca [[S_DOUBLE_TY]], -// CHECK: call {{.*}} [[S_DOUBLE_TY_CONSTR:@.+]]([[S_DOUBLE_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_DOUBLE_TY_CONSTR:@.+]]([[S_DOUBLE_TY]]* frozen [[TEST]]) // CHECK: [[RES:%.+]] = call {{.*}}i32 @__kmpc_master( // CHECK-NEXT: [[IS_MASTER:%.+]] = icmp ne i32 [[RES]], 0 @@ -211,14 +211,14 @@ // Constructors for s_arr and var. // s_arr; // CHECK: [[PRIVATE_S_ARR_REF:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 -// CHECK: call {{.*}} [[S_DOUBLE_TY_CONSTR]]([[S_DOUBLE_TY]]* [[S_ARR_CUR:%[^,]+]]) +// CHECK: call {{.*}} [[S_DOUBLE_TY_CONSTR]]([[S_DOUBLE_TY]]* frozen [[S_ARR_CUR:%[^,]+]]) // CHECK: getelementptr inbounds [[S_DOUBLE_TY]], [[S_DOUBLE_TY]]* [[S_ARR_CUR]], i{{.+}} 1 // CHECK: icmp eq // CHECK: br i1 // var; // CHECK: [[PRIVATE_VAR_REF:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 1 -// CHECK: call {{.*}} [[S_DOUBLE_TY_CONSTR]]([[S_DOUBLE_TY]]* [[PRIVATE_VAR_REF]]) +// CHECK: call {{.*}} [[S_DOUBLE_TY_CONSTR]]([[S_DOUBLE_TY]]* frozen [[PRIVATE_VAR_REF]]) // t_var; // vec; @@ -235,7 +235,7 @@ // CHECK-NEXT: br label {{%?}}[[EXIT]] // CHECK: [[EXIT]] -// CHECK: define internal void [[PRIVATES_MAP_FN:@.+]]([[PRIVATES_MAIN_TY]]* noalias %0, [[S_DOUBLE_TY]]** noalias %1, i32** noalias %2, [2 x [[S_DOUBLE_TY]]]** noalias %3, [2 x i32]** noalias %4, i32** noalias %5) +// CHECK: define internal void [[PRIVATES_MAP_FN:@.+]]([[PRIVATES_MAIN_TY]]* frozen noalias %0, [[S_DOUBLE_TY]]** frozen noalias %1, i32** frozen noalias %2, [2 x [[S_DOUBLE_TY]]]** frozen noalias %3, [2 x i32]** frozen noalias %4, i32** frozen noalias %5) // CHECK: [[PRIVATES:%.+]] = load [[PRIVATES_MAIN_TY]]*, [[PRIVATES_MAIN_TY]]** // CHECK: [[PRIV_S_VAR:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i32 0, i32 0 // CHECK: [[ARG3:%.+]] = load [2 x [[S_DOUBLE_TY]]]**, [2 x [[S_DOUBLE_TY]]]*** %{{.+}}, @@ -254,7 +254,7 @@ // CHECK: store i{{[0-9]+}}* [[PRIV_SIVAR]], i{{[0-9]+}}** [[ARG5]], // CHECK: ret void -// CHECK: define internal i32 [[TASK_ENTRY]](i32 %0, [[KMP_TASK_MAIN_TY]]* noalias %1) +// CHECK: define internal frozen i32 [[TASK_ENTRY]](i32 frozen %0, [[KMP_TASK_MAIN_TY]]* frozen noalias %1) // CHECK: [[PRIV_VAR_ADDR:%.+]] = alloca [[S_DOUBLE_TY]]*, // CHECK: [[PRIV_T_VAR_ADDR:%.+]] = alloca i32*, @@ -300,7 +300,7 @@ // CHECK: br label // CHECK: ret -// CHECK: define internal void [[MAIN_DUP]]([[KMP_TASK_MAIN_TY]]* %0, [[KMP_TASK_MAIN_TY]]* %1, i32 %2) +// CHECK: define internal void [[MAIN_DUP]]([[KMP_TASK_MAIN_TY]]* frozen %0, [[KMP_TASK_MAIN_TY]]* frozen %1, i32 frozen %2) // CHECK: getelementptr inbounds [[KMP_TASK_MAIN_TY]], [[KMP_TASK_MAIN_TY]]* %{{.+}}, i32 0, i32 0 // CHECK: getelementptr inbounds [[KMP_TASK_T_TY]], [[KMP_TASK_T_TY]]* %{{.+}}, i32 0, i32 8 // CHECK: load i32, i32* % @@ -321,15 +321,15 @@ // CHECK: call {{.*}} [[S_DOUBLE_TY_CONSTR]]([[S_DOUBLE_TY]]* // CHECK: ret void -// CHECK: define internal i32 [[DESTRUCTORS]](i32 %0, [[KMP_TASK_MAIN_TY]]* noalias %1) +// CHECK: define internal frozen i32 [[DESTRUCTORS]](i32 frozen %0, [[KMP_TASK_MAIN_TY]]* frozen noalias %1) // CHECK: [[PRIVATES:%.+]] = getelementptr inbounds [[KMP_TASK_MAIN_TY]], [[KMP_TASK_MAIN_TY]]* [[RES_KMP_TASK:%.+]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 // CHECK: [[PRIVATE_S_ARR_REF:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 0 // CHECK: [[PRIVATE_VAR_REF:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 1 -// CHECK: call {{.*}} @_ZN1SIdED1Ev([[S_DOUBLE_TY]]* [[PRIVATE_VAR_REF]]) +// CHECK: call {{.*}} @_ZN1SIdED1Ev([[S_DOUBLE_TY]]* frozen [[PRIVATE_VAR_REF]]) // CHECK: getelementptr inbounds [2 x [[S_DOUBLE_TY]]], [2 x [[S_DOUBLE_TY]]]* [[PRIVATE_S_ARR_REF]], i{{.+}} 0, i{{.+}} 0 // CHECK: getelementptr inbounds [[S_DOUBLE_TY]], [[S_DOUBLE_TY]]* %{{.+}}, i{{.+}} 2 // CHECK: [[PRIVATE_S_ARR_ELEM_REF:%.+]] = getelementptr inbounds [[S_DOUBLE_TY]], [[S_DOUBLE_TY]]* %{{.+}}, i{{.+}} -1 -// CHECK: call {{.*}} @_ZN1SIdED1Ev([[S_DOUBLE_TY]]* [[PRIVATE_S_ARR_ELEM_REF]]) +// CHECK: call {{.*}} @_ZN1SIdED1Ev([[S_DOUBLE_TY]]* frozen [[PRIVATE_S_ARR_ELEM_REF]]) // CHECK: icmp eq // CHECK: br i1 // CHECK: ret i32 @@ -342,7 +342,7 @@ // CHECK: [[S_ARR_ADDR:%.+]] = alloca [2 x [[S_INT_TY]]], // CHECK: [[VAR_ADDR:%.+]] = alloca [[S_INT_TY]], -// CHECK: call {{.*}} [[S_INT_TY_CONSTR:@.+]]([[S_INT_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_INT_TY_CONSTR:@.+]]([[S_INT_TY]]* frozen [[TEST]]) // Store original variables in capture struct. // CHECK: [[VEC_REF:%.+]] = getelementptr inbounds [[CAP_TMAIN_TY]], [[CAP_TMAIN_TY]]* %{{.+}}, i{{[0-9]+}} 0, i{{[0-9]+}} 0 @@ -380,14 +380,14 @@ // CHECK: [[PRIVATE_S_ARR_REF:%.+]] = getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i{{[0-9]+}} 0, i{{[0-9]+}} 2 // CHECK: getelementptr inbounds [2 x [[S_INT_TY]]], [2 x [[S_INT_TY]]]* [[PRIVATE_S_ARR_REF]], i{{.+}} 0, i{{.+}} 0 // CHECK: getelementptr inbounds [[S_INT_TY]], [[S_INT_TY]]* %{{.+}}, i{{.+}} 2 -// CHECK: call {{.*}} [[S_INT_TY_CONSTR]]([[S_INT_TY]]* [[S_ARR_CUR:%[^,]+]]) +// CHECK: call {{.*}} [[S_INT_TY_CONSTR]]([[S_INT_TY]]* frozen [[S_ARR_CUR:%[^,]+]]) // CHECK: getelementptr inbounds [[S_INT_TY]], [[S_INT_TY]]* [[S_ARR_CUR]], i{{.+}} 1 // CHECK: icmp eq // CHECK: br i1 // var; // CHECK: [[PRIVATE_VAR_REF:%.+]] = getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 3 -// CHECK: call {{.*}} [[S_INT_TY_CONSTR]]([[S_INT_TY]]* [[PRIVATE_VAR_REF]]) +// CHECK: call {{.*}} [[S_INT_TY_CONSTR]]([[S_INT_TY]]* frozen [[PRIVATE_VAR_REF]]) // Provide pointer to destructor function, which will destroy private variables at the end of the task. // CHECK: [[DESTRUCTORS_REF:%.+]] = getelementptr inbounds [[KMP_TASK_T_TY]], [[KMP_TASK_T_TY]]* [[TASK]], i{{.+}} 0, i{{.+}} 3 @@ -401,7 +401,7 @@ // CHECK-NOT: getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 2 // CHECK-NOT: getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 3 -// CHECK: define internal void [[PRIVATES_MAP_FN:@.+]]([[PRIVATES_TMAIN_TY]]* noalias %0, i32** noalias %1, [2 x i32]** noalias %2, [2 x [[S_INT_TY]]]** noalias %3, [[S_INT_TY]]** noalias %4) +// CHECK: define internal void [[PRIVATES_MAP_FN:@.+]]([[PRIVATES_TMAIN_TY]]* frozen noalias %0, i32** frozen noalias %1, [2 x i32]** frozen noalias %2, [2 x [[S_INT_TY]]]** frozen noalias %3, [[S_INT_TY]]** frozen noalias %4) // CHECK: [[PRIVATES:%.+]] = load [[PRIVATES_TMAIN_TY]]*, [[PRIVATES_TMAIN_TY]]** // CHECK: [[PRIV_T_VAR:%.+]] = getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i32 0, i32 0 // CHECK: [[ARG1:%.+]] = load i32**, i32*** %{{.+}}, @@ -417,7 +417,7 @@ // CHECK: store [[S_INT_TY]]* [[PRIV_VAR]], [[S_INT_TY]]** [[ARG4]], // CHECK: ret void -// CHECK: define internal i32 [[TASK_ENTRY]](i32 %0, [[KMP_TASK_TMAIN_TY]]* noalias %1) +// CHECK: define internal frozen i32 [[TASK_ENTRY]](i32 frozen %0, [[KMP_TASK_TMAIN_TY]]* frozen noalias %1) // CHECK: alloca i32*, // CHECK-DAG: [[PRIV_T_VAR_ADDR:%.+]] = alloca i32*, // CHECK-DAG: [[PRIV_VEC_ADDR:%.+]] = alloca [2 x i32]*, @@ -456,7 +456,7 @@ // CHECK: br label // CHECK: ret -// CHECK: define internal void [[TMAIN_DUP]]([[KMP_TASK_TMAIN_TY]]* %0, [[KMP_TASK_TMAIN_TY]]* %1, i32 %2) +// CHECK: define internal void [[TMAIN_DUP]]([[KMP_TASK_TMAIN_TY]]* frozen %0, [[KMP_TASK_TMAIN_TY]]* frozen %1, i32 frozen %2) // CHECK: getelementptr inbounds [[KMP_TASK_TMAIN_TY]], [[KMP_TASK_TMAIN_TY]]* %{{.+}}, i32 0, i32 0 // CHECK: getelementptr inbounds [[KMP_TASK_T_TY]], [[KMP_TASK_T_TY]]* %{{.+}}, i32 0, i32 8 // CHECK: load i32, i32* % @@ -477,15 +477,15 @@ // CHECK: call {{.*}} [[S_INT_TY_CONSTR]]([[S_INT_TY]]* // CHECK: ret void -// CHECK: define internal i32 [[DESTRUCTORS]](i32 %0, [[KMP_TASK_TMAIN_TY]]* noalias %1) +// CHECK: define internal frozen i32 [[DESTRUCTORS]](i32 frozen %0, [[KMP_TASK_TMAIN_TY]]* frozen noalias %1) // CHECK: [[PRIVATES:%.+]] = getelementptr inbounds [[KMP_TASK_TMAIN_TY]], [[KMP_TASK_TMAIN_TY]]* [[RES_KMP_TASK:%.+]], i{{[0-9]+}} 0, i{{[0-9]+}} 2 // CHECK: [[PRIVATE_S_ARR_REF:%.+]] = getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 2 // CHECK: [[PRIVATE_VAR_REF:%.+]] = getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 3 -// CHECK: call void @_ZN1SIiED1Ev([[S_INT_TY]]* [[PRIVATE_VAR_REF]]) +// CHECK: call void @_ZN1SIiED1Ev([[S_INT_TY]]* frozen [[PRIVATE_VAR_REF]]) // CHECK: getelementptr inbounds [2 x [[S_INT_TY]]], [2 x [[S_INT_TY]]]* [[PRIVATE_S_ARR_REF]], i{{.+}} 0, i{{.+}} 0 // CHECK: getelementptr inbounds [[S_INT_TY]], [[S_INT_TY]]* %{{.+}}, i{{.+}} 2 // CHECK: [[PRIVATE_S_ARR_ELEM_REF:%.+]] = getelementptr inbounds [[S_INT_TY]], [[S_INT_TY]]* %{{.+}}, i{{.+}} -1 -// CHECK: call void @_ZN1SIiED1Ev([[S_INT_TY]]* [[PRIVATE_S_ARR_ELEM_REF]]) +// CHECK: call void @_ZN1SIiED1Ev([[S_INT_TY]]* frozen [[PRIVATE_S_ARR_ELEM_REF]]) // CHECK: icmp eq // CHECK: br i1 // CHECK: ret i32 diff --git a/clang/test/OpenMP/parallel_master_taskloop_simd_loop_messages.cpp b/clang/test/OpenMP/parallel_master_taskloop_simd_loop_messages.cpp --- a/clang/test/OpenMP/parallel_master_taskloop_simd_loop_messages.cpp +++ b/clang/test/OpenMP/parallel_master_taskloop_simd_loop_messages.cpp @@ -177,7 +177,7 @@ c[ii] = a[ii]; #pragma omp parallel -// Ok but undefined behavior (in general, cannot check that incr +// Ok but undefined behavior (in frozen general, cannot check incr that // is really loop-invariant). #pragma omp parallel master taskloop simd for (ii = 0; ii < 10; ii = ii + ii) diff --git a/clang/test/OpenMP/parallel_master_taskloop_simd_private_codegen.cpp b/clang/test/OpenMP/parallel_master_taskloop_simd_private_codegen.cpp --- a/clang/test/OpenMP/parallel_master_taskloop_simd_private_codegen.cpp +++ b/clang/test/OpenMP/parallel_master_taskloop_simd_private_codegen.cpp @@ -67,7 +67,7 @@ // LAMBDA: ret #pragma omp parallel master taskloop simd private(g, sivar) for (int i = 0; i < 10; ++i) { - // LAMBDA: define {{.+}} void [[INNER_LAMBDA:@.+]](%{{.+}}* [[ARG_PTR:%.+]]) + // LAMBDA: define {{.+}} void [[INNER_LAMBDA:@.+]](%{{.+}}* frozen [[ARG_PTR:%.+]]) // LAMBDA: store %{{.+}}* [[ARG_PTR]], %{{.+}}** [[ARG_PTR_REF:%.+]], // LAMBDA: [[ARG_PTR:%.+]] = load %{{.+}}*, %{{.+}}** [[ARG_PTR_REF]] // LAMBDA: [[G_PTR_REF:%.+]] = getelementptr inbounds %{{.+}}, %{{.+}}* [[ARG_PTR]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 @@ -77,7 +77,7 @@ // LAMBDA: [[SIVAR_REF:%.+]] = load i{{[0-9]+}}*, i{{[0-9]+}}** [[SIVAR_PTR_REF]] // LAMBDA: store i{{[0-9]+}} 3, i{{[0-9]+}}* [[SIVAR_REF]] - // LAMBDA: define internal i32 [[TASK_ENTRY]](i32 %0, %{{.+}}* noalias %1) + // LAMBDA: define internal frozen i32 [[TASK_ENTRY]](i32 frozen %0, %{{.+}}* frozen noalias %1) g = 1; sivar = 2; // LAMBDA: store double 1.0{{.+}}, double* %{{.+}}, @@ -112,7 +112,7 @@ // BLOCKS-NOT: [[SIVAR]]{{[[^:word:]]}} // BLOCKS: ret - // BLOCKS: define internal i32 [[TASK_ENTRY]](i32 %0, %{{.+}}* noalias %1) + // BLOCKS: define internal frozen i32 [[TASK_ENTRY]](i32 frozen %0, %{{.+}}* frozen noalias %1) g = 1; sivar = 3; // BLOCKS: store double 1.0{{.+}}, double* %{{.+}}, @@ -145,14 +145,14 @@ #endif } -// CHECK: define i{{[0-9]+}} @main() +// CHECK: define frozen i{{[0-9]+}} @main() // CHECK: [[TEST:%.+]] = alloca [[S_DOUBLE_TY]], // CHECK: [[T_VAR_ADDR:%.+]] = alloca i32, // CHECK: [[VEC_ADDR:%.+]] = alloca [2 x i32], // CHECK: [[S_ARR_ADDR:%.+]] = alloca [2 x [[S_DOUBLE_TY]]], // CHECK: [[VAR_ADDR:%.+]] = alloca [[S_DOUBLE_TY]], -// CHECK: call {{.*}} [[S_DOUBLE_TY_DEF_CONSTR:@.+]]([[S_DOUBLE_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_DOUBLE_TY_DEF_CONSTR:@.+]]([[S_DOUBLE_TY]]* frozen [[TEST]]) // CHECK: [[RES:%.+]] = call {{.*}}i32 @__kmpc_master( // CHECK-NEXT: [[IS_MASTER:%.+]] = icmp ne i32 [[RES]], 0 @@ -179,14 +179,14 @@ // CHECK: [[PRIVATE_S_ARR_REF:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 // CHECK: getelementptr inbounds [2 x [[S_DOUBLE_TY]]], [2 x [[S_DOUBLE_TY]]]* [[PRIVATE_S_ARR_REF]], i{{.+}} 0, i{{.+}} 0 // CHECK: getelementptr inbounds [[S_DOUBLE_TY]], [[S_DOUBLE_TY]]* %{{.+}}, i{{.+}} 2 -// CHECK: call void [[S_DOUBLE_TY_DEF_CONSTR]]([[S_DOUBLE_TY]]* [[S_ARR_CUR:%.+]]) +// CHECK: call void [[S_DOUBLE_TY_DEF_CONSTR]]([[S_DOUBLE_TY]]* frozen [[S_ARR_CUR:%.+]]) // CHECK: getelementptr inbounds [[S_DOUBLE_TY]], [[S_DOUBLE_TY]]* [[S_ARR_CUR]], i{{.+}} 1 // CHECK: icmp eq // CHECK: br i1 // var; // CHECK: [[PRIVATE_VAR_REF:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 1 -// CHECK: call void [[S_DOUBLE_TY_DEF_CONSTR]]([[S_DOUBLE_TY]]* [[PRIVATE_VAR_REF:%.+]]) +// CHECK: call void [[S_DOUBLE_TY_DEF_CONSTR]]([[S_DOUBLE_TY]]* frozen [[PRIVATE_VAR_REF:%.+]]) // Provide pointer to destructor function, which will destroy private variables at the end of the task. // CHECK: [[DESTRUCTORS_REF:%.+]] = getelementptr inbounds [[KMP_TASK_T_TY]], [[KMP_TASK_T_TY]]* [[TASK]], i{{.+}} 0, i{{.+}} 3 @@ -204,7 +204,7 @@ // CHECK-NOT: getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 3 // -// CHECK: define internal void [[PRIVATES_MAP_FN:@.+]]([[PRIVATES_MAIN_TY]]* noalias %0, [[S_DOUBLE_TY]]** noalias %1, i32** noalias %2, [2 x [[S_DOUBLE_TY]]]** noalias %3, [2 x i32]** noalias %4, i32** noalias %5) +// CHECK: define internal void [[PRIVATES_MAP_FN:@.+]]([[PRIVATES_MAIN_TY]]* frozen noalias %0, [[S_DOUBLE_TY]]** frozen noalias %1, i32** frozen noalias %2, [2 x [[S_DOUBLE_TY]]]** frozen noalias %3, [2 x i32]** frozen noalias %4, i32** frozen noalias %5) // CHECK: [[PRIVATES:%.+]] = load [[PRIVATES_MAIN_TY]]*, [[PRIVATES_MAIN_TY]]** // CHECK: [[PRIV_S_VAR:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i32 0, i32 0 // CHECK: [[ARG3:%.+]] = load [2 x [[S_DOUBLE_TY]]]**, [2 x [[S_DOUBLE_TY]]]*** %{{.+}}, @@ -220,7 +220,7 @@ // CHECK: store [2 x i32]* [[PRIV_VEC]], [2 x i32]** [[ARG4]], // CHECK: ret void -// CHECK: define internal i32 [[TASK_ENTRY]](i32 %0, [[KMP_TASK_MAIN_TY]]* noalias %1) +// CHECK: define internal frozen i32 [[TASK_ENTRY]](i32 frozen %0, [[KMP_TASK_MAIN_TY]]* frozen noalias %1) // CHECK: [[PRIV_VAR_ADDR:%.+]] = alloca [[S_DOUBLE_TY]]*, // CHECK: [[PRIV_T_VAR_ADDR:%.+]] = alloca i32*, @@ -245,7 +245,7 @@ // CHECK: ret -// CHECK: define internal void [[MAIN_DUP]]([[KMP_TASK_MAIN_TY]]* %0, [[KMP_TASK_MAIN_TY]]* %1, i32 %2) +// CHECK: define internal void [[MAIN_DUP]]([[KMP_TASK_MAIN_TY]]* frozen %0, [[KMP_TASK_MAIN_TY]]* frozen %1, i32 frozen %2) // CHECK: getelementptr inbounds [[KMP_TASK_MAIN_TY]], [[KMP_TASK_MAIN_TY]]* %{{.+}}, i32 0, i32 1 // CHECK: getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* %{{.+}}, i32 0, i32 0 // CHECK: getelementptr inbounds [2 x [[S_DOUBLE_TY]]], [2 x [[S_DOUBLE_TY]]]* %{{.+}}, i32 0, i32 0 @@ -262,15 +262,15 @@ // CHECK: call {{.*}} [[S_DOUBLE_TY_DEF_CONSTR]]([[S_DOUBLE_TY]]* // CHECK: ret void -// CHECK: define internal i32 [[DESTRUCTORS]](i32 %0, [[KMP_TASK_MAIN_TY]]* noalias %1) +// CHECK: define internal frozen i32 [[DESTRUCTORS]](i32 frozen %0, [[KMP_TASK_MAIN_TY]]* frozen noalias %1) // CHECK: [[PRIVATES:%.+]] = getelementptr inbounds [[KMP_TASK_MAIN_TY]], [[KMP_TASK_MAIN_TY]]* [[RES_KMP_TASK:%.+]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 // CHECK: [[PRIVATE_S_ARR_REF:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 0 // CHECK: [[PRIVATE_VAR_REF:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 1 -// CHECK: call void @_ZN1SIdED1Ev([[S_DOUBLE_TY]]* [[PRIVATE_VAR_REF]]) +// CHECK: call void @_ZN1SIdED1Ev([[S_DOUBLE_TY]]* frozen [[PRIVATE_VAR_REF]]) // CHECK: getelementptr inbounds [2 x [[S_DOUBLE_TY]]], [2 x [[S_DOUBLE_TY]]]* [[PRIVATE_S_ARR_REF]], i{{.+}} 0, i{{.+}} 0 // CHECK: getelementptr inbounds [[S_DOUBLE_TY]], [[S_DOUBLE_TY]]* %{{.+}}, i{{.+}} 2 // CHECK: [[PRIVATE_S_ARR_ELEM_REF:%.+]] = getelementptr inbounds [[S_DOUBLE_TY]], [[S_DOUBLE_TY]]* %{{.+}}, i{{.+}} -1 -// CHECK: call void @_ZN1SIdED1Ev([[S_DOUBLE_TY]]* [[PRIVATE_S_ARR_ELEM_REF]]) +// CHECK: call void @_ZN1SIdED1Ev([[S_DOUBLE_TY]]* frozen [[PRIVATE_S_ARR_ELEM_REF]]) // CHECK: icmp eq // CHECK: br i1 // CHECK: ret i32 @@ -281,7 +281,7 @@ // CHECK: [[S_ARR_ADDR:%.+]] = alloca [2 x [[S_INT_TY]]], // CHECK: [[VAR_ADDR:%.+]] = alloca [[S_INT_TY]], -// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR:@.+]]([[S_INT_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR:@.+]]([[S_INT_TY]]* frozen [[TEST]]) // Do not store original variables in capture struct. // CHECK-NOT: getelementptr inbounds [[CAP_TMAIN_TY]], @@ -304,14 +304,14 @@ // CHECK: [[PRIVATE_S_ARR_REF:%.+]] = getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i{{[0-9]+}} 0, i{{[0-9]+}} 2 // CHECK: getelementptr inbounds [2 x [[S_INT_TY]]], [2 x [[S_INT_TY]]]* [[PRIVATE_S_ARR_REF]], i{{.+}} 0, i{{.+}} 0 // CHECK: getelementptr inbounds [[S_INT_TY]], [[S_INT_TY]]* %{{.+}}, i{{.+}} 2 -// CHECK: call void [[S_INT_TY_DEF_CONSTR]]([[S_INT_TY]]* [[S_ARR_CUR:%.+]]) +// CHECK: call void [[S_INT_TY_DEF_CONSTR]]([[S_INT_TY]]* frozen [[S_ARR_CUR:%.+]]) // CHECK: getelementptr inbounds [[S_INT_TY]], [[S_INT_TY]]* [[S_ARR_CUR]], i{{.+}} 1 // CHECK: icmp eq // CHECK: br i1 // var; // CHECK: [[PRIVATE_VAR_REF:%.+]] = getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 3 -// CHECK: call void [[S_INT_TY_DEF_CONSTR]]([[S_INT_TY]]* [[PRIVATE_VAR_REF:%.+]]) +// CHECK: call void [[S_INT_TY_DEF_CONSTR]]([[S_INT_TY]]* frozen [[PRIVATE_VAR_REF:%.+]]) // Provide pointer to destructor function, which will destroy private variables at the end of the task. // CHECK: [[DESTRUCTORS_REF:%.+]] = getelementptr inbounds [[KMP_TASK_T_TY]], [[KMP_TASK_T_TY]]* [[TASK]], i{{.+}} 0, i{{.+}} 3 @@ -326,7 +326,7 @@ // CHECK-NOT: getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 3 // -// CHECK: define internal void [[PRIVATES_MAP_FN:@.+]]([[PRIVATES_TMAIN_TY]]* noalias %0, i32** noalias %1, [2 x i32]** noalias %2, [2 x [[S_INT_TY]]]** noalias %3, [[S_INT_TY]]** noalias %4) +// CHECK: define internal void [[PRIVATES_MAP_FN:@.+]]([[PRIVATES_TMAIN_TY]]* frozen noalias %0, i32** frozen noalias %1, [2 x i32]** frozen noalias %2, [2 x [[S_INT_TY]]]** frozen noalias %3, [[S_INT_TY]]** frozen noalias %4) // CHECK: [[PRIVATES:%.+]] = load [[PRIVATES_TMAIN_TY]]*, [[PRIVATES_TMAIN_TY]]** // CHECK: [[PRIV_T_VAR:%.+]] = getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i32 0, i32 0 // CHECK: [[ARG1:%.+]] = load i32**, i32*** %{{.+}}, @@ -342,7 +342,7 @@ // CHECK: store [[S_INT_TY]]* [[PRIV_VAR]], [[S_INT_TY]]** [[ARG4]], // CHECK: ret void -// CHECK: define internal i32 [[TASK_ENTRY]](i32 %0, [[KMP_TASK_TMAIN_TY]]* noalias %1) +// CHECK: define internal frozen i32 [[TASK_ENTRY]](i32 frozen %0, [[KMP_TASK_TMAIN_TY]]* frozen noalias %1) // CHECK: alloca i32*, // CHECK-DAG: [[PRIV_T_VAR_ADDR:%.+]] = alloca i32*, @@ -365,7 +365,7 @@ // CHECK: ret -// CHECK: define internal void [[TMAIN_DUP]]([[KMP_TASK_TMAIN_TY]]* %0, [[KMP_TASK_TMAIN_TY]]* %1, i32 %2) +// CHECK: define internal void [[TMAIN_DUP]]([[KMP_TASK_TMAIN_TY]]* frozen %0, [[KMP_TASK_TMAIN_TY]]* frozen %1, i32 frozen %2) // CHECK: getelementptr inbounds [[KMP_TASK_TMAIN_TY]], [[KMP_TASK_TMAIN_TY]]* %{{.+}}, i32 0, i32 2 // CHECK: getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* %{{.+}}, i32 0, i32 2 // CHECK: getelementptr inbounds [2 x [[S_INT_TY]]], [2 x [[S_INT_TY]]]* %{{.+}}, i32 0, i32 0 @@ -382,15 +382,15 @@ // CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR]]([[S_INT_TY]]* // CHECK: ret void -// CHECK: define internal i32 [[DESTRUCTORS]](i32 %0, [[KMP_TASK_TMAIN_TY]]* noalias %1) +// CHECK: define internal frozen i32 [[DESTRUCTORS]](i32 frozen %0, [[KMP_TASK_TMAIN_TY]]* frozen noalias %1) // CHECK: [[PRIVATES:%.+]] = getelementptr inbounds [[KMP_TASK_TMAIN_TY]], [[KMP_TASK_TMAIN_TY]]* [[RES_KMP_TASK:%.+]], i{{[0-9]+}} 0, i{{[0-9]+}} 2 // CHECK: [[PRIVATE_S_ARR_REF:%.+]] = getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 2 // CHECK: [[PRIVATE_VAR_REF:%.+]] = getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 3 -// CHECK: call void @_ZN1SIiED1Ev([[S_INT_TY]]* [[PRIVATE_VAR_REF]]) +// CHECK: call void @_ZN1SIiED1Ev([[S_INT_TY]]* frozen [[PRIVATE_VAR_REF]]) // CHECK: getelementptr inbounds [2 x [[S_INT_TY]]], [2 x [[S_INT_TY]]]* [[PRIVATE_S_ARR_REF]], i{{.+}} 0, i{{.+}} 0 // CHECK: getelementptr inbounds [[S_INT_TY]], [[S_INT_TY]]* %{{.+}}, i{{.+}} 2 // CHECK: [[PRIVATE_S_ARR_ELEM_REF:%.+]] = getelementptr inbounds [[S_INT_TY]], [[S_INT_TY]]* %{{.+}}, i{{.+}} -1 -// CHECK: call void @_ZN1SIiED1Ev([[S_INT_TY]]* [[PRIVATE_S_ARR_ELEM_REF]]) +// CHECK: call void @_ZN1SIiED1Ev([[S_INT_TY]]* frozen [[PRIVATE_S_ARR_ELEM_REF]]) // CHECK: icmp eq // CHECK: br i1 // CHECK: ret i32 diff --git a/clang/test/OpenMP/parallel_master_taskloop_simd_reduction_codegen.cpp b/clang/test/OpenMP/parallel_master_taskloop_simd_reduction_codegen.cpp --- a/clang/test/OpenMP/parallel_master_taskloop_simd_reduction_codegen.cpp +++ b/clang/test/OpenMP/parallel_master_taskloop_simd_reduction_codegen.cpp @@ -170,51 +170,51 @@ // CHECK-NEXT: br label {{%?}}[[EXIT]] // CHECK: [[EXIT]] -// CHECK: define internal void @[[RED_INIT1]](i8* noalias %{{.+}}, i8* noalias %{{.+}}) +// CHECK: define internal void @[[RED_INIT1]](i8* frozen noalias %{{.+}}, i8* frozen noalias %{{.+}}) // CHECK: store float 0.000000e+00, float* % // CHECK: ret void -// CHECK: define internal void @[[RED_COMB1]](i8* %0, i8* %1) +// CHECK: define internal void @[[RED_COMB1]](i8* frozen %0, i8* frozen %1) // CHECK: fadd float % // CHECK: store float %{{.+}}, float* % // CHECK: ret void -// CHECK: define internal void @[[RED_INIT2]](i8* noalias %{{.+}}, i8* noalias %{{.+}}) +// CHECK: define internal void @[[RED_INIT2]](i8* frozen noalias %{{.+}}, i8* frozen noalias %{{.+}}) // CHECK: call i8* @__kmpc_threadprivate_cached( // CHECK: call void [[OMP_INIT1:@.+]]( // CHECK: ret void -// CHECK: define internal void [[OMP_COMB1:@.+]](%struct.S* noalias %0, %struct.S* noalias %1) +// CHECK: define internal void [[OMP_COMB1:@.+]](%struct.S* frozen noalias %0, %struct.S* frozen noalias %1) // CHECK: fadd float % -// CHECK: define internal void [[OMP_INIT1]](%struct.S* noalias %0, %struct.S* noalias %1) +// CHECK: define internal void [[OMP_INIT1]](%struct.S* frozen noalias %0, %struct.S* frozen noalias %1) // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64( -// CHECK: define internal void @[[RED_FINI2]](i8* %0) +// CHECK: define internal void @[[RED_FINI2]](i8* frozen %0) // CHECK: call i8* @__kmpc_threadprivate_cached( // CHECK: call void @ // CHECK: ret void -// CHECK: define internal void @[[RED_COMB2]](i8* %0, i8* %1) +// CHECK: define internal void @[[RED_COMB2]](i8* frozen %0, i8* frozen %1) // CHECK: call i8* @__kmpc_threadprivate_cached( // CHECK: call void [[OMP_COMB1]]( // CHECK: ret void -// CHECK: define internal void @[[RED_INIT3]](i8* noalias %{{.+}}, i8* noalias %{{.+}}) +// CHECK: define internal void @[[RED_INIT3]](i8* frozen noalias %{{.+}}, i8* frozen noalias %{{.+}}) // CHECK: store float 0.000000e+00, float* % // CHECK: ret void -// CHECK: define internal void @[[RED_COMB3]](i8* %0, i8* %1) +// CHECK: define internal void @[[RED_COMB3]](i8* frozen %0, i8* frozen %1) // CHECK: fadd float % // CHECK: store float %{{.+}}, float* % // CHECK: ret void -// CHECK: define internal void @[[RED_INIT4]](i8* noalias %{{.+}}, i8* noalias %{{.+}}) +// CHECK: define internal void @[[RED_INIT4]](i8* frozen noalias %{{.+}}, i8* frozen noalias %{{.+}}) // CHECK: call i8* @__kmpc_threadprivate_cached( // CHECK: store float 0.000000e+00, float* % // CHECK: ret void -// CHECK: define internal void @[[RED_COMB4]](i8* %0, i8* %1) +// CHECK: define internal void @[[RED_COMB4]](i8* frozen %0, i8* frozen %1) // CHECK: call i8* @__kmpc_threadprivate_cached( // CHECK: fadd float % // CHECK: store float %{{.+}}, float* % diff --git a/clang/test/OpenMP/parallel_num_threads_codegen.cpp b/clang/test/OpenMP/parallel_num_threads_codegen.cpp --- a/clang/test/OpenMP/parallel_num_threads_codegen.cpp +++ b/clang/test/OpenMP/parallel_num_threads_codegen.cpp @@ -49,8 +49,8 @@ // CHECK-DAG: [[S_ADDR:%.+]] = alloca [[S_TY]] // CHECK-DAG: [[A_ADDR:%.+]] = alloca i8 // CHECK-DAG: [[GTID:%.+]] = call {{.*}}i32 @__kmpc_global_thread_num([[IDENT_T_TY]]* [[DEF_LOC_2]]) -// CHECK-DAG: call {{.*}} [[S_TY_CONSTR:@.+]]([[S_TY]]* [[S_ADDR]], [[INTPTR_T_TY]] [[INTPTR_T_TY_ATTR:(signext )?]]0) -// CHECK: [[S_CHAR_OP:%.+]] = invoke{{.*}} i8 [[S_TY_CHAR_OP:@.+]]([[S_TY]]* [[S_ADDR]]) +// CHECK-DAG: call {{.*}} [[S_TY_CONSTR:@.+]]([[S_TY]]* frozen [[S_ADDR]], [[INTPTR_T_TY]] frozen [[INTPTR_T_TY_ATTR:(signext )?]]0) +// CHECK: [[S_CHAR_OP:%.+]] = invoke{{.*}} i8 [[S_TY_CHAR_OP:@.+]]([[S_TY]]* frozen [[S_ADDR]]) // CHECK: store i8 [[S_CHAR_OP]], i8* [[A_ADDR]] // CHECK: call {{.*}}void @__kmpc_push_num_threads([[IDENT_T_TY]]* [[DEF_LOC_2]], i32 [[GTID]], i32 2) // CHECK: call {{.*}}void {{.*}} @__kmpc_fork_call( @@ -60,7 +60,7 @@ // CHECK: call {{.*}}void {{.*}} @__kmpc_fork_call( // CHECK: invoke{{.*}} [[INT_TY:i[0-9]+]] [[TMAIN_CHAR_5:@.+]]() // CHECK: invoke{{.*}} [[INT_TY]] [[TMAIN_S_1:@.+]]() -// CHECK: call {{.*}} [[S_TY_DESTR:@.+]]([[S_TY]]* [[S_ADDR]]) +// CHECK: call {{.*}} [[S_TY_DESTR:@.+]]([[S_TY]]* frozen [[S_ADDR]]) // CHECK: ret [[INT_TY]] // CHECK: } @@ -77,11 +77,11 @@ // CHECK: [[GTID:%.+]] = call {{.*}}i32 @__kmpc_global_thread_num([[IDENT_T_TY]]* [[DEF_LOC_2]]) // CHECK: call {{.*}}void @__kmpc_push_num_threads([[IDENT_T_TY]]* [[DEF_LOC_2]], i32 [[GTID]], i32 1) // CHECK: call {{.*}}void {{.*}} @__kmpc_fork_call( -// CHECK: {{(invoke|call)}} {{.*}} [[S_TY_CONSTR]]([[S_TY]]* [[S_TEMP:%.+]], [[INTPTR_T_TY]] [[INTPTR_T_TY_ATTR]]23) -// CHECK: [[S_CHAR_OP:%.+]] = invoke{{.*}} i8 [[S_TY_CHAR_OP]]([[S_TY]]* [[S_TEMP]]) +// CHECK: {{(invoke|call)}} {{.*}} [[S_TY_CONSTR]]([[S_TY]]* frozen [[S_TEMP:%.+]], [[INTPTR_T_TY]] frozen [[INTPTR_T_TY_ATTR]]23) +// CHECK: [[S_CHAR_OP:%.+]] = invoke{{.*}} i8 [[S_TY_CHAR_OP]]([[S_TY]]* frozen [[S_TEMP]]) // CHECK: [[RES:%.+]] = sext {{.*}}i8 [[S_CHAR_OP]] to i32 // CHECK: call {{.*}}void @__kmpc_push_num_threads([[IDENT_T_TY]]* [[DEF_LOC_2]], i32 [[GTID]], i32 [[RES]]) -// CHECK: {{(invoke|call)}} {{.*}} [[S_TY_DESTR]]([[S_TY]]* [[S_TEMP]]) +// CHECK: {{(invoke|call)}} {{.*}} [[S_TY_DESTR]]([[S_TY]]* frozen [[S_TEMP]]) // CHECK: call {{.*}}void {{.*}} @__kmpc_fork_call( // CHECK: ret [[INT_TY]] 0 // CHECK: } diff --git a/clang/test/OpenMP/parallel_private_codegen.cpp b/clang/test/OpenMP/parallel_private_codegen.cpp --- a/clang/test/OpenMP/parallel_private_codegen.cpp +++ b/clang/test/OpenMP/parallel_private_codegen.cpp @@ -134,12 +134,12 @@ // LAMBDA: call void (%{{.+}}*, i{{[0-9]+}}, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)*, ...) @__kmpc_fork_call(%{{.+}}* @{{.+}}, i{{[0-9]+}} 1, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)* bitcast (void (i{{[0-9]+}}*, i{{[0-9]+}}*, [[SS_TY]]*)* [[SS_MICROTASK:@.+]] to void // LAMBDA: ret - // LAMBDA: define internal void [[SS_MICROTASK]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}, [[SS_TY]]* %{{.+}}) + // LAMBDA: define internal void [[SS_MICROTASK]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}, [[SS_TY]]* frozen %{{.+}}) // LAMBDA-NOT: getelementptr {{.*}}[[SS_TY]], [[SS_TY]]* % // LAMBDA: call{{.*}} void // LAMBDA: ret void - // LAMBDA: define internal void @{{.+}}(i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}, [[SS_TY]]* %{{.+}}) + // LAMBDA: define internal void @{{.+}}(i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}, [[SS_TY]]* frozen %{{.+}}) // LAMBDA: [[A_PRIV:%.+]] = alloca i{{[0-9]+}}, // LAMBDA: [[B_PRIV:%.+]] = alloca i{{[0-9]+}}, // LAMBDA: [[C_PRIV:%.+]] = alloca i{{[0-9]+}}, @@ -158,7 +158,7 @@ // LAMBDA-NEXT: store i{{[0-9]+}} [[DIV]], i{{[0-9]+}}* [[C_PRIV]], // LAMBDA-NEXT: ret void - // LAMBDA: define{{.*}} internal{{.*}} void [[OMP_REGION]](i32* noalias %{{.+}}, i32* noalias %{{.+}}) + // LAMBDA: define{{.*}} internal{{.*}} void [[OMP_REGION]](i32* frozen noalias %{{.+}}, i32* frozen noalias %{{.+}}) // LAMBDA: [[G_PRIVATE_ADDR:%.+]] = alloca i{{[0-9]+}}, // LAMBDA: [[SIVAR_PRIVATE_ADDR:%.+]] = alloca i{{[0-9]+}}, g = 1; @@ -171,9 +171,9 @@ // LAMBDA: [[SIVAR_PRIVATE_ADDR_REF:%.+]] = getelementptr inbounds %{{.+}}, %{{.+}}* [[ARG:%.+]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 // LAMBDA: store i{{[0-9]+}}* [[SIVAR_PRIVATE_ADDR]], i{{[0-9]+}}** [[SIVAR_PRIVATE_ADDR_REF]] - // LAMBDA: call{{.*}} void [[INNER_LAMBDA:@.+]](%{{.+}}* [[ARG]]) + // LAMBDA: call{{.*}} void [[INNER_LAMBDA:@.+]](%{{.+}}* frozen [[ARG]]) [&]() { - // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* [[ARG_PTR:%.+]]) + // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* frozen [[ARG_PTR:%.+]]) // LAMBDA: store %{{.+}}* [[ARG_PTR]], %{{.+}}** [[ARG_PTR_REF:%.+]], g = 2; sivar = 4; @@ -199,7 +199,7 @@ // BLOCKS: call{{.*}} void {{.+}} @__kmpc_fork_call({{.+}}, i32 0, {{.+}}* [[OMP_REGION:@.+]] to {{.+}}) #pragma omp parallel private(g, sivar) { - // BLOCKS: define{{.*}} internal{{.*}} void [[OMP_REGION]](i32* noalias %{{.+}}, i32* noalias %{{.+}}) + // BLOCKS: define{{.*}} internal{{.*}} void [[OMP_REGION]](i32* frozen noalias %{{.+}}, i32* frozen noalias %{{.+}}) // BLOCKS: [[G_PRIVATE_ADDR:%.+]] = alloca i{{[0-9]+}}, // BLOCKS: [[SIVAR_PRIVATE_ADDR:%.+]] = alloca i{{[0-9]+}}, g = 1; @@ -234,12 +234,12 @@ // BLOCKS: call void (%{{.+}}*, i{{[0-9]+}}, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)*, ...) @__kmpc_fork_call(%{{.+}}* @{{.+}}, i{{[0-9]+}} 1, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)* bitcast (void (i{{[0-9]+}}*, i{{[0-9]+}}*, [[SS_TY]]*)* [[SS_MICROTASK:@.+]] to void // BLOCKS: ret -// BLOCKS: define internal void [[SS_MICROTASK]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}, [[SS_TY]]* %{{.+}}) +// BLOCKS: define internal void [[SS_MICROTASK]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}, [[SS_TY]]* frozen %{{.+}}) // BLOCKS-NOT: getelementptr {{.*}}[[SS_TY]], [[SS_TY]]* % // BLOCKS: call{{.*}} void // BLOCKS: ret void -// BLOCKS: define internal void @{{.+}}(i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}, [[SS_TY]]* %{{.+}}) +// BLOCKS: define internal void @{{.+}}(i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}, [[SS_TY]]* frozen %{{.+}}) // BLOCKS: [[A_PRIV:%.+]] = alloca i{{[0-9]+}}, // BLOCKS: [[B_PRIV:%.+]] = alloca i{{[0-9]+}}, // BLOCKS: [[C_PRIV:%.+]] = alloca i{{[0-9]+}}, @@ -273,15 +273,15 @@ #endif } -// CHECK: define i{{[0-9]+}} @main() +// CHECK: define frozen i{{[0-9]+}} @main() // CHECK: [[TEST:%.+]] = alloca [[S_FLOAT_TY]], -// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR:@.+]]([[S_FLOAT_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR:@.+]]([[S_FLOAT_TY]]* frozen [[TEST]]) // CHECK: call void (%{{.+}}*, i{{[0-9]+}}, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)*, ...) @__kmpc_fork_call(%{{.+}}* @{{.+}}, i{{[0-9]+}} 0, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)* bitcast (void (i{{[0-9]+}}*, i{{[0-9]+}}*)* [[MAIN_MICROTASK:@.+]] to void -// CHECK: = call i{{.+}} [[TMAIN_INT:@.+]]() +// CHECK: = call frozen i{{.+}} [[TMAIN_INT:@.+]]() // CHECK: call void [[S_FLOAT_TY_DESTR:@.+]]([[S_FLOAT_TY]]* // CHECK: ret // -// CHECK: define internal void [[MAIN_MICROTASK]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}) +// CHECK: define internal void [[MAIN_MICROTASK]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}) // CHECK: [[T_VAR_PRIV:%.+]] = alloca i{{[0-9]+}}, // CHECK: [[VEC_PRIV:%.+]] = alloca [2 x i{{[0-9]+}}], // CHECK: [[S_ARR_PRIV:%.+]] = alloca [2 x [[S_FLOAT_TY]]], @@ -292,17 +292,17 @@ // CHECK-NOT: [[VEC_PRIV]] // CHECK: {{.+}}: // CHECK: [[S_ARR_PRIV_ITEM:%.+]] = phi [[S_FLOAT_TY]]* -// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR]]([[S_FLOAT_TY]]* [[S_ARR_PRIV_ITEM]]) +// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR]]([[S_FLOAT_TY]]* frozen [[S_ARR_PRIV_ITEM]]) // CHECK-NOT: [[T_VAR_PRIV]] // CHECK-NOT: [[VEC_PRIV]] -// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR]]([[S_FLOAT_TY]]* [[VAR_PRIV]]) -// CHECK-DAG: call void [[S_FLOAT_TY_DESTR]]([[S_FLOAT_TY]]* [[VAR_PRIV]]) +// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR]]([[S_FLOAT_TY]]* frozen [[VAR_PRIV]]) +// CHECK-DAG: call void [[S_FLOAT_TY_DESTR]]([[S_FLOAT_TY]]* frozen [[VAR_PRIV]]) // CHECK-DAG: call void [[S_FLOAT_TY_DESTR]]([[S_FLOAT_TY]]* // CHECK: ret void // CHECK: define {{.*}} i{{[0-9]+}} [[TMAIN_INT]]() // CHECK: [[TEST:%.+]] = alloca [[S_INT_TY]], -// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR:@.+]]([[S_INT_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR:@.+]]([[S_INT_TY]]* frozen [[TEST]]) // CHECK: call void (%{{.+}}*, i{{[0-9]+}}, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)*, ...) @__kmpc_fork_call(%{{.+}}* @{{.+}}, i{{[0-9]+}} 0, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)* bitcast (void (i{{[0-9]+}}*, i{{[0-9]+}}*)* [[TMAIN_MICROTASK:@.+]] to void // CHECK: call void [[S_INT_TY_DESTR:@.+]]([[S_INT_TY]]* // CHECK: ret @@ -313,7 +313,7 @@ // CHECK: call void (%{{.+}}*, i{{[0-9]+}}, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)*, ...) @__kmpc_fork_call(%{{.+}}* @{{.+}}, i{{[0-9]+}} 1, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)* bitcast (void (i{{[0-9]+}}*, i{{[0-9]+}}*, [[SS_TY]]*)* [[SS_MICROTASK:@.+]] to void // CHECK: ret -// CHECK: define internal void [[SS_MICROTASK]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}, [[SS_TY]]* %{{.+}}) +// CHECK: define internal void [[SS_MICROTASK]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}, [[SS_TY]]* frozen %{{.+}}) // CHECK: [[A_PRIV:%.+]] = alloca i{{[0-9]+}}, // CHECK: [[B_PRIV:%.+]] = alloca i{{[0-9]+}}, // CHECK: [[C_PRIV:%.+]] = alloca i{{[0-9]+}}, @@ -332,7 +332,7 @@ // CHECK-NEXT: store i{{[0-9]+}} [[DIV]], i{{[0-9]+}}* [[C_PRIV]], // CHECK-NEXT: ret void -// CHECK: define internal void [[TMAIN_MICROTASK]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}) +// CHECK: define internal void [[TMAIN_MICROTASK]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}) // CHECK: [[T_VAR_PRIV:%.+]] = alloca i{{[0-9]+}}, align 128 // CHECK: [[VEC_PRIV:%.+]] = alloca [2 x i{{[0-9]+}}], align 128 // CHECK: [[S_ARR_PRIV:%.+]] = alloca [2 x [[S_INT_TY]]], align 128 @@ -343,20 +343,20 @@ // CHECK-NOT: [[SIVAR_PRIV]] // CHECK: {{.+}}: // CHECK: [[S_ARR_PRIV_ITEM:%.+]] = phi [[S_INT_TY]]* -// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR]]([[S_INT_TY]]* [[S_ARR_PRIV_ITEM]]) +// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR]]([[S_INT_TY]]* frozen [[S_ARR_PRIV_ITEM]]) // CHECK-NOT: [[T_VAR_PRIV]] // CHECK-NOT: [[VEC_PRIV]] -// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR]]([[S_INT_TY]]* [[VAR_PRIV]]) -// CHECK-DAG: call void [[S_INT_TY_DESTR]]([[S_INT_TY]]* [[VAR_PRIV]]) +// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR]]([[S_INT_TY]]* frozen [[VAR_PRIV]]) +// CHECK-DAG: call void [[S_INT_TY_DESTR]]([[S_INT_TY]]* frozen [[VAR_PRIV]]) // CHECK-DAG: call void [[S_INT_TY_DESTR]]([[S_INT_TY]]* // CHECK: ret void -// CHECK: define {{.+}} @{{.+}}([[SST_TY]]* % +// CHECK: define {{.+}} @{{.+}}([[SST_TY]]* frozen % // CHECK: store i{{[0-9]+}} 0, i{{[0-9]+}}* % // CHECK: call void (%{{.+}}*, i{{[0-9]+}}, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)*, ...) @__kmpc_fork_call(%{{.+}}* @{{.+}}, i{{[0-9]+}} 1, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)* bitcast (void (i{{[0-9]+}}*, i{{[0-9]+}}*, [[SST_TY]]*)* [[SST_MICROTASK:@.+]] to void // CHECK: ret -// CHECK: define internal void [[SST_MICROTASK]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}, [[SST_TY]]* %{{.+}}) +// CHECK: define internal void [[SST_MICROTASK]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}, [[SST_TY]]* frozen %{{.+}}) // CHECK: [[GTID_ADDR_PTR:%.+]] = alloca i32*, // CHECK: [[GTID_ADDR:%.+]] = load i32*, i32** [[GTID_ADDR_PTR]], // CHECK: [[GTID:%.+]] = load i32, i32* [[GTID_ADDR]], diff --git a/clang/test/OpenMP/parallel_reduction_codegen.cpp b/clang/test/OpenMP/parallel_reduction_codegen.cpp --- a/clang/test/OpenMP/parallel_reduction_codegen.cpp +++ b/clang/test/OpenMP/parallel_reduction_codegen.cpp @@ -140,12 +140,12 @@ // LAMBDA: store i8 %{{.+}}, i8* [[B_REF]], // LAMBDA: ret - // LAMBDA: define internal void [[SS_MICROTASK]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}, [[SS_TY]]* %{{.+}}, i32* {{.+}}, i32* {{.+}}, i32* {{.+}}) + // LAMBDA: define internal void [[SS_MICROTASK]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}, [[SS_TY]]* frozen %{{.+}}, i32* {{.+}}, i32* {{.+}}, i32* {{.+}}) // LAMBDA-NOT: getelementptr {{.*}}[[SS_TY]], [[SS_TY]]* % // LAMBDA: call{{.*}} void // LAMBDA: ret void - // LAMBDA: define internal void @{{.+}}(i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}, [[SS_TY]]* + // LAMBDA: define internal void @{{.+}}(i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}, [[SS_TY]]* // LAMBDA: [[A_PRIV:%.+]] = alloca i{{[0-9]+}}, // LAMBDA: [[B_PRIV:%.+]] = alloca i{{[0-9]+}}, // LAMBDA: [[C_PRIV:%.+]] = alloca i{{[0-9]+}}, @@ -168,7 +168,7 @@ // LAMBDA: call i32 @__kmpc_reduce_nowait( // LAMBDA: ret void - // LAMBDA: define{{.*}} internal{{.*}} void [[OMP_REGION]](i32* noalias %{{.+}}, i32* noalias %{{.+}}, i32* nonnull align 4 dereferenceable(4) %{{.+}}) + // LAMBDA: define{{.*}} internal{{.*}} void [[OMP_REGION]](i32* frozen noalias %{{.+}}, i32* frozen noalias %{{.+}}, i32* frozen nonnull align 4 dereferenceable(4) %{{.+}}) // LAMBDA: [[G_PRIVATE_ADDR:%.+]] = alloca i{{[0-9]+}}, // Reduction list for runtime. @@ -180,7 +180,7 @@ // LAMBDA: store i{{[0-9]+}} 1, i{{[0-9]+}}* [[G_PRIVATE_ADDR]], align 128 // LAMBDA: [[G_PRIVATE_ADDR_REF:%.+]] = getelementptr inbounds %{{.+}}, %{{.+}}* [[ARG:%.+]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 // LAMBDA: store i{{[0-9]+}}* [[G_PRIVATE_ADDR]], i{{[0-9]+}}** [[G_PRIVATE_ADDR_REF]] - // LAMBDA: call void [[INNER_LAMBDA:@.+]](%{{.+}}* [[ARG]]) + // LAMBDA: call void [[INNER_LAMBDA:@.+]](%{{.+}}* frozen [[ARG]]) // LAMBDA: [[G_PRIV_REF:%.+]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[RED_LIST]], i64 0, i64 0 // LAMBDA: [[BITCAST:%.+]] = bitcast i32* [[G_PRIVATE_ADDR]] to i8* @@ -203,7 +203,7 @@ // LAMBDA: [[REDUCTION_DONE]] // LAMBDA: ret void [&]() { - // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* [[ARG_PTR:%.+]]) + // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* frozen [[ARG_PTR:%.+]]) // LAMBDA: store %{{.+}}* [[ARG_PTR]], %{{.+}}** [[ARG_PTR_REF:%.+]], g = 2; // LAMBDA: [[ARG_PTR:%.+]] = load %{{.+}}*, %{{.+}}** [[ARG_PTR_REF]] @@ -224,7 +224,7 @@ // BLOCKS: call void {{.+}} @__kmpc_fork_call({{.+}}, i32 1, {{.+}}* [[OMP_REGION:@.+]] to {{.+}}, i32* [[G]]) #pragma omp parallel reduction(-:g) { - // BLOCKS: define{{.*}} internal{{.*}} void [[OMP_REGION]](i32* noalias %{{.+}}, i32* noalias %{{.+}}, i32* nonnull align 4 dereferenceable(4) %{{.+}}) + // BLOCKS: define{{.*}} internal{{.*}} void [[OMP_REGION]](i32* frozen noalias %{{.+}}, i32* frozen noalias %{{.+}}, i32* frozen nonnull align 4 dereferenceable(4) %{{.+}}) // BLOCKS: [[G_PRIVATE_ADDR:%.+]] = alloca i{{[0-9]+}}, // Reduction list for runtime. @@ -284,12 +284,12 @@ // BLOCKS: store i8 %{{.+}}, i8* [[B_REF]], // BLOCKS: ret -// BLOCKS: define internal void [[SS_MICROTASK]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}, [[SS_TY]]* %{{.+}}, i32* {{.+}}, i32* {{.+}}, i32* {{.+}}) +// BLOCKS: define internal void [[SS_MICROTASK]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}, [[SS_TY]]* frozen %{{.+}}, i32* {{.+}}, i32* {{.+}}, i32* {{.+}}) // BLOCKS-NOT: getelementptr {{.*}}[[SS_TY]], [[SS_TY]]* % // BLOCKS: call{{.*}} void // BLOCKS: ret void -// BLOCKS: define internal void @{{.+}}(i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}, [[SS_TY]]* %{{.+}}, i32* {{.+}}, i32* {{.+}}, i32* {{.+}}) +// BLOCKS: define internal void @{{.+}}(i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}, [[SS_TY]]* frozen %{{.+}}, i32* {{.+}}, i32* {{.+}}, i32* {{.+}}) // BLOCKS: [[A_PRIV:%.+]] = alloca i{{[0-9]+}}, // BLOCKS: [[B_PRIV:%.+]] = alloca i{{[0-9]+}}, // BLOCKS: [[C_PRIV:%.+]] = alloca i{{[0-9]+}}, @@ -337,7 +337,7 @@ // CHECK: define {{.*}}i{{[0-9]+}} @main() // CHECK: [[TEST:%.+]] = alloca [[S_FLOAT_TY]], -// CHECK: call {{.*}} [[S_FLOAT_TY_CONSTR:@.+]]([[S_FLOAT_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_FLOAT_TY_CONSTR:@.+]]([[S_FLOAT_TY]]* frozen [[TEST]]) // CHECK: call void (%{{.+}}*, i{{[0-9]+}}, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)*, ...) @__kmpc_fork_call(%{{.+}}* @{{.+}}, i{{[0-9]+}} 6, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)* bitcast (void (i{{[0-9]+}}*, i{{[0-9]+}}*, [2 x i32]*, float*, [2 x [[S_FLOAT_TY]]]*, [[S_FLOAT_TY]]*, [[S_FLOAT_TY]]*, float*)* [[MAIN_MICROTASK:@.+]] to void // CHECK: call void (%{{.+}}*, i{{[0-9]+}}, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)*, ...) @__kmpc_fork_call(%{{.+}}* @{{.+}}, i{{[0-9]+}} 6, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)* bitcast (void (i{{[0-9]+}}*, i{{[0-9]+}}*, [2 x i32]*, float*, [2 x [[S_FLOAT_TY]]]*, [[S_FLOAT_TY]]*, [[S_FLOAT_TY]]*, float*)* [[MAIN_MICROTASK1:@.+]] to void // CHECK: call void (%{{.+}}*, i{{[0-9]+}}, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)*, ...) @__kmpc_fork_call(%{{.+}}* @{{.+}}, i{{[0-9]+}} 1, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)* bitcast (void (i{{[0-9]+}}*, i{{[0-9]+}}*, { float, float }*)* [[MAIN_MICROTASK2:@.+]] to void @@ -345,7 +345,7 @@ // CHECK: call {{.*}} [[S_FLOAT_TY_DESTR:@.+]]([[S_FLOAT_TY]]* // CHECK: ret // -// CHECK: define internal void [[MAIN_MICROTASK]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}, +// CHECK: define internal void [[MAIN_MICROTASK]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}} // CHECK: [[T_VAR_PRIV:%.+]] = alloca float, // CHECK: [[VAR_PRIV:%.+]] = alloca [[S_FLOAT_TY]], // CHECK: [[VAR1_PRIV:%.+]] = alloca [[S_FLOAT_TY]], @@ -365,10 +365,10 @@ // CHECK: store float 0.0{{.+}}, float* [[T_VAR_PRIV]], // For & reduction operation initial value of private variable is ones in all bits. -// CHECK: call {{.*}} [[S_FLOAT_TY_CONSTR:@.+]]([[S_FLOAT_TY]]* [[VAR_PRIV]]) +// CHECK: call {{.*}} [[S_FLOAT_TY_CONSTR:@.+]]([[S_FLOAT_TY]]* frozen [[VAR_PRIV]]) // For && reduction operation initial value of private variable is 1.0. -// CHECK: call {{.*}} [[S_FLOAT_TY_CONSTR:@.+]]([[S_FLOAT_TY]]* [[VAR1_PRIV]]) +// CHECK: call {{.*}} [[S_FLOAT_TY_CONSTR:@.+]]([[S_FLOAT_TY]]* frozen [[VAR1_PRIV]]) // For min reduction operation initial value of private variable is largest repesentable value. // CHECK: store float 0x47EFFFFFE0000000, float* [[T_VAR1_PRIV]], @@ -411,23 +411,23 @@ // CHECK: store float [[UP]], float* [[T_VAR_REF]], // var = var.operator &(var_reduction); -// CHECK: [[UP:%.+]] = call nonnull align 4 dereferenceable(4) [[S_FLOAT_TY]]* @{{.+}}([[S_FLOAT_TY]]* [[VAR_REF]], [[S_FLOAT_TY]]* nonnull align 4 dereferenceable(4) [[VAR_PRIV]]) +// CHECK: [[UP:%.+]] = call frozen nonnull align 4 dereferenceable(4) [[S_FLOAT_TY]]* @{{.+}}([[S_FLOAT_TY]]* frozen [[VAR_REF]], [[S_FLOAT_TY]]* frozen nonnull align 4 dereferenceable(4) [[VAR_PRIV]]) // CHECK: [[BC1:%.+]] = bitcast [[S_FLOAT_TY]]* [[VAR_REF]] to i8* // CHECK: [[BC2:%.+]] = bitcast [[S_FLOAT_TY]]* [[UP]] to i8* // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[BC1]], i8* align 4 [[BC2]], i64 4, i1 false) // var1 = var1.operator &&(var1_reduction); -// CHECK: [[TO_FLOAT:%.+]] = call float @{{.+}}([[S_FLOAT_TY]]* [[VAR1_REF]]) +// CHECK: [[TO_FLOAT:%.+]] = call frozen float @{{.+}}([[S_FLOAT_TY]]* frozen [[VAR1_REF]]) // CHECK: [[VAR1_BOOL:%.+]] = fcmp une float [[TO_FLOAT]], 0.0 // CHECK: br i1 [[VAR1_BOOL]], label %[[TRUE:.+]], label %[[END2:.+]] // CHECK: [[TRUE]] -// CHECK: [[TO_FLOAT:%.+]] = call float @{{.+}}([[S_FLOAT_TY]]* [[VAR1_PRIV]]) +// CHECK: [[TO_FLOAT:%.+]] = call frozen float @{{.+}}([[S_FLOAT_TY]]* frozen [[VAR1_PRIV]]) // CHECK: [[VAR1_REDUCTION_BOOL:%.+]] = fcmp une float [[TO_FLOAT]], 0.0 // CHECK: br label %[[END2]] // CHECK: [[END2]] // CHECK: [[COND_LVALUE:%.+]] = phi i1 [ false, %{{.+}} ], [ [[VAR1_REDUCTION_BOOL]], %[[TRUE]] ] // CHECK: [[CONV:%.+]] = uitofp i1 [[COND_LVALUE]] to float -// CHECK: call void @{{.+}}([[S_FLOAT_TY]]* [[COND_LVALUE:%.+]], float [[CONV]]) +// CHECK: call void @{{.+}}([[S_FLOAT_TY]]* frozen [[COND_LVALUE:%.+]], float frozen [[CONV]]) // CHECK: [[BC1:%.+]] = bitcast [[S_FLOAT_TY]]* [[VAR1_REF]] to i8* // CHECK: [[BC2:%.+]] = bitcast [[S_FLOAT_TY]]* [[COND_LVALUE]] to i8* // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[BC1]], i8* align 4 [[BC2]], i64 4, i1 false) @@ -465,7 +465,7 @@ // var = var.operator &(var_reduction); // CHECK: call void @__kmpc_critical( -// CHECK: [[UP:%.+]] = call nonnull align 4 dereferenceable(4) [[S_FLOAT_TY]]* @{{.+}}([[S_FLOAT_TY]]* [[VAR_REF]], [[S_FLOAT_TY]]* nonnull align 4 dereferenceable(4) [[VAR_PRIV]]) +// CHECK: [[UP:%.+]] = call frozen nonnull align 4 dereferenceable(4) [[S_FLOAT_TY]]* @{{.+}}([[S_FLOAT_TY]]* frozen [[VAR_REF]], [[S_FLOAT_TY]]* frozen nonnull align 4 dereferenceable(4) [[VAR_PRIV]]) // CHECK: [[BC1:%.+]] = bitcast [[S_FLOAT_TY]]* [[VAR_REF]] to i8* // CHECK: [[BC2:%.+]] = bitcast [[S_FLOAT_TY]]* [[UP]] to i8* // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[BC1]], i8* align 4 [[BC2]], i64 4, i1 false) @@ -473,17 +473,17 @@ // var1 = var1.operator &&(var1_reduction); // CHECK: call void @__kmpc_critical( -// CHECK: [[TO_FLOAT:%.+]] = call float @{{.+}}([[S_FLOAT_TY]]* [[VAR1_REF]]) +// CHECK: [[TO_FLOAT:%.+]] = call frozen float @{{.+}}([[S_FLOAT_TY]]* frozen [[VAR1_REF]]) // CHECK: [[VAR1_BOOL:%.+]] = fcmp une float [[TO_FLOAT]], 0.0 // CHECK: br i1 [[VAR1_BOOL]], label %[[TRUE:.+]], label %[[END2:.+]] // CHECK: [[TRUE]] -// CHECK: [[TO_FLOAT:%.+]] = call float @{{.+}}([[S_FLOAT_TY]]* [[VAR1_PRIV]]) +// CHECK: [[TO_FLOAT:%.+]] = call frozen float @{{.+}}([[S_FLOAT_TY]]* frozen [[VAR1_PRIV]]) // CHECK: [[VAR1_REDUCTION_BOOL:%.+]] = fcmp une float [[TO_FLOAT]], 0.0 // CHECK: br label %[[END2]] // CHECK: [[END2]] // CHECK: [[COND_LVALUE:%.+]] = phi i1 [ false, %{{.+}} ], [ [[VAR1_REDUCTION_BOOL]], %[[TRUE]] ] // CHECK: [[CONV:%.+]] = uitofp i1 [[COND_LVALUE]] to float -// CHECK: call void @{{.+}}([[S_FLOAT_TY]]* [[COND_LVALUE:%.+]], float [[CONV]]) +// CHECK: call void @{{.+}}([[S_FLOAT_TY]]* frozen [[COND_LVALUE:%.+]], float frozen [[CONV]]) // CHECK: [[BC1:%.+]] = bitcast [[S_FLOAT_TY]]* [[VAR1_REF]] to i8* // CHECK: [[BC2:%.+]] = bitcast [[S_FLOAT_TY]]* [[COND_LVALUE]] to i8* // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[BC1]], i8* align 4 [[BC2]], i64 4, i1 false) @@ -511,7 +511,7 @@ // CHECK: br label %[[RED_DONE]] // CHECK: [[RED_DONE]] -// CHECK-DAG: call {{.*}} [[S_FLOAT_TY_DESTR]]([[S_FLOAT_TY]]* [[VAR_PRIV]]) +// CHECK-DAG: call {{.*}} [[S_FLOAT_TY_DESTR]]([[S_FLOAT_TY]]* frozen [[VAR_PRIV]]) // CHECK-DAG: call {{.*}} [[S_FLOAT_TY_DESTR]]([[S_FLOAT_TY]]* // CHECK: ret void @@ -521,7 +521,7 @@ // *(Type-1*)lhs[-1] = ReductionOperation-1(*(Type-1*)lhs[-1], // *(Type-1*)rhs[-1]); // } -// CHECK: define internal void [[REDUCTION_FUNC]](i8* %0, i8* %1) +// CHECK: define internal void [[REDUCTION_FUNC]](i8* frozen %0, i8* frozen %1) // t_var_lhs = (float*)lhs[0]; // CHECK: [[T_VAR_RHS_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST_RHS:%.+]], i64 0, i64 0 // CHECK: [[T_VAR_RHS_VOID:%.+]] = load i8*, i8** [[T_VAR_RHS_REF]], @@ -565,23 +565,23 @@ // CHECK: store float [[UP]], float* [[T_VAR_LHS]], // var_lhs = var_lhs.operator &(var_rhs); -// CHECK: [[UP:%.+]] = call nonnull align 4 dereferenceable(4) [[S_FLOAT_TY]]* @{{.+}}([[S_FLOAT_TY]]* [[VAR_LHS]], [[S_FLOAT_TY]]* nonnull align 4 dereferenceable(4) [[VAR_RHS]]) +// CHECK: [[UP:%.+]] = call frozen nonnull align 4 dereferenceable(4) [[S_FLOAT_TY]]* @{{.+}}([[S_FLOAT_TY]]* frozen [[VAR_LHS]], [[S_FLOAT_TY]]* frozen nonnull align 4 dereferenceable(4) [[VAR_RHS]]) // CHECK: [[BC1:%.+]] = bitcast [[S_FLOAT_TY]]* [[VAR_LHS]] to i8* // CHECK: [[BC2:%.+]] = bitcast [[S_FLOAT_TY]]* [[UP]] to i8* // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[BC1]], i8* align 4 [[BC2]], i64 4, i1 false) // var1_lhs = var1_lhs.operator &&(var1_rhs); -// CHECK: [[TO_FLOAT:%.+]] = call float @{{.+}}([[S_FLOAT_TY]]* [[VAR1_LHS]]) +// CHECK: [[TO_FLOAT:%.+]] = call frozen float @{{.+}}([[S_FLOAT_TY]]* frozen [[VAR1_LHS]]) // CHECK: [[VAR1_BOOL:%.+]] = fcmp une float [[TO_FLOAT]], 0.0 // CHECK: br i1 [[VAR1_BOOL]], label %[[TRUE:.+]], label %[[END2:.+]] // CHECK: [[TRUE]] -// CHECK: [[TO_FLOAT:%.+]] = call float @{{.+}}([[S_FLOAT_TY]]* [[VAR1_RHS]]) +// CHECK: [[TO_FLOAT:%.+]] = call frozen float @{{.+}}([[S_FLOAT_TY]]* frozen [[VAR1_RHS]]) // CHECK: [[VAR1_REDUCTION_BOOL:%.+]] = fcmp une float [[TO_FLOAT]], 0.0 // CHECK: br label %[[END2]] // CHECK: [[END2]] // CHECK: [[COND_LVALUE:%.+]] = phi i1 [ false, %{{.+}} ], [ [[VAR1_REDUCTION_BOOL]], %[[TRUE]] ] // CHECK: [[CONV:%.+]] = uitofp i1 [[COND_LVALUE]] to float -// CHECK: call void @{{.+}}([[S_FLOAT_TY]]* [[COND_LVALUE:%.+]], float [[CONV]]) +// CHECK: call void @{{.+}}([[S_FLOAT_TY]]* frozen [[COND_LVALUE:%.+]], float frozen [[CONV]]) // CHECK: [[BC1:%.+]] = bitcast [[S_FLOAT_TY]]* [[VAR1_LHS]] to i8* // CHECK: [[BC2:%.+]] = bitcast [[S_FLOAT_TY]]* [[COND_LVALUE]] to i8* // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[BC1]], i8* align 4 [[BC2]], i64 4, i1 false) @@ -595,7 +595,7 @@ // CHECK: store float [[UP]], float* [[T_VAR1_LHS]], // CHECK: ret void -// CHECK: define internal void [[MAIN_MICROTASK1]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}, +// CHECK: define internal void [[MAIN_MICROTASK1]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}} // CHECK: [[T_VAR_PRIV:%.+]] = alloca float, // CHECK: [[VAR_PRIV:%.+]] = alloca [[S_FLOAT_TY]], // CHECK: [[VAR1_PRIV:%.+]] = alloca [[S_FLOAT_TY]], @@ -612,10 +612,10 @@ // CHECK: store float 0.0{{.+}}, float* [[T_VAR_PRIV]], // For & reduction operation initial value of private variable is ones in all bits. -// CHECK: call {{.*}} [[S_FLOAT_TY_CONSTR:@.+]]([[S_FLOAT_TY]]* [[VAR_PRIV]]) +// CHECK: call {{.*}} [[S_FLOAT_TY_CONSTR:@.+]]([[S_FLOAT_TY]]* frozen [[VAR_PRIV]]) // For && reduction operation initial value of private variable is 1.0. -// CHECK: call {{.*}} [[S_FLOAT_TY_CONSTR:@.+]]([[S_FLOAT_TY]]* [[VAR1_PRIV]]) +// CHECK: call {{.*}} [[S_FLOAT_TY_CONSTR:@.+]]([[S_FLOAT_TY]]* frozen [[VAR1_PRIV]]) // For min reduction operation initial value of private variable is largest repesentable value. // CHECK: store float 0x47EFFFFFE0000000, float* [[T_VAR1_PRIV]], @@ -626,7 +626,7 @@ // CHECK: define {{.*}} i{{[0-9]+}} [[TMAIN_INT]]() // CHECK: [[TEST:%.+]] = alloca [[S_INT_TY]], -// CHECK: call {{.*}} [[S_INT_TY_CONSTR:@.+]]([[S_INT_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_INT_TY_CONSTR:@.+]]([[S_INT_TY]]* frozen [[TEST]]) // CHECK: call void (%{{.+}}*, i{{[0-9]+}}, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)*, ...) @__kmpc_fork_call(%{{.+}}* @{{.+}}, i{{[0-9]+}} 6, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)* bitcast (void (i{{[0-9]+}}*, i{{[0-9]+}}*, [2 x i32]*, i32*, [2 x [[S_INT_TY]]]*, [[S_INT_TY]]*, [[S_INT_TY]]*, i32*)* [[TMAIN_MICROTASK:@.+]] to void // CHECK: call {{.*}} [[S_INT_TY_DESTR:@.+]]([[S_INT_TY]]* // CHECK: ret @@ -645,7 +645,7 @@ // CHECK: store i8 %{{.+}}, i8* [[B_REF]], // CHECK: ret -// CHECK: define internal void [[SS_MICROTASK]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}, [[SS_TY]]* +// CHECK: define internal void [[SS_MICROTASK]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}, [[SS_TY]]* // CHECK: [[A_PRIV:%.+]] = alloca i{{[0-9]+}}, // CHECK: [[B_PRIV:%.+]] = alloca i{{[0-9]+}}, // CHECK: [[C_PRIV:%.+]] = alloca i{{[0-9]+}}, @@ -668,7 +668,7 @@ // CHECK: call i32 @__kmpc_reduce_nowait( // CHECK: ret void -// CHECK: define internal void [[TMAIN_MICROTASK]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}, +// CHECK: define internal void [[TMAIN_MICROTASK]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}} // CHECK: [[T_VAR_PRIV:%.+]] = alloca i{{[0-9]+}}, align 128 // CHECK: [[VAR_PRIV:%.+]] = alloca [[S_INT_TY]], align 128 // CHECK: [[VAR1_PRIV:%.+]] = alloca [[S_INT_TY]], align 128 @@ -688,10 +688,10 @@ // CHECK: store i{{[0-9]+}} 0, i{{[0-9]+}}* [[T_VAR_PRIV]], // For & reduction operation initial value of private variable is ones in all bits. -// CHECK: call {{.*}} [[S_INT_TY_CONSTR:@.+]]([[S_INT_TY]]* [[VAR_PRIV]]) +// CHECK: call {{.*}} [[S_INT_TY_CONSTR:@.+]]([[S_INT_TY]]* frozen [[VAR_PRIV]]) // For && reduction operation initial value of private variable is 1.0. -// CHECK: call {{.*}} [[S_INT_TY_CONSTR:@.+]]([[S_INT_TY]]* [[VAR1_PRIV]]) +// CHECK: call {{.*}} [[S_INT_TY_CONSTR:@.+]]([[S_INT_TY]]* frozen [[VAR1_PRIV]]) // For min reduction operation initial value of private variable is largest repesentable value. // CHECK: store i{{[0-9]+}} 2147483647, i{{[0-9]+}}* [[T_VAR1_PRIV]], @@ -734,22 +734,22 @@ // CHECK: store i{{[0-9]+}} [[UP]], i{{[0-9]+}}* [[T_VAR_REF]], // var = var.operator &(var_reduction); -// CHECK: [[UP:%.+]] = call nonnull align 4 dereferenceable(4) [[S_INT_TY]]* @{{.+}}([[S_INT_TY]]* [[VAR_REF]], [[S_INT_TY]]* nonnull align 4 dereferenceable(4) [[VAR_PRIV]]) +// CHECK: [[UP:%.+]] = call frozen nonnull align 4 dereferenceable(4) [[S_INT_TY]]* @{{.+}}([[S_INT_TY]]* frozen [[VAR_REF]], [[S_INT_TY]]* frozen nonnull align 4 dereferenceable(4) [[VAR_PRIV]]) // CHECK: [[BC1:%.+]] = bitcast [[S_INT_TY]]* [[VAR_REF]] to i8* // CHECK: [[BC2:%.+]] = bitcast [[S_INT_TY]]* [[UP]] to i8* // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 128 [[BC1]], i8* align 4 [[BC2]], i64 4, i1 false) // var1 = var1.operator &&(var1_reduction); -// CHECK: [[TO_INT:%.+]] = call i{{[0-9]+}} @{{.+}}([[S_INT_TY]]* [[VAR1_REF]]) +// CHECK: [[TO_INT:%.+]] = call frozen i{{[0-9]+}} @{{.+}}([[S_INT_TY]]* frozen [[VAR1_REF]]) // CHECK: [[VAR1_BOOL:%.+]] = icmp ne i{{[0-9]+}} [[TO_INT]], 0 // CHECK: br i1 [[VAR1_BOOL]], label %[[TRUE:.+]], label %[[END2:.+]] // CHECK: [[TRUE]] -// CHECK: [[TO_INT:%.+]] = call i{{[0-9]+}} @{{.+}}([[S_INT_TY]]* [[VAR1_PRIV]]) +// CHECK: [[TO_INT:%.+]] = call frozen i{{[0-9]+}} @{{.+}}([[S_INT_TY]]* frozen [[VAR1_PRIV]]) // CHECK: [[VAR1_REDUCTION_BOOL:%.+]] = icmp ne i{{[0-9]+}} [[TO_INT]], 0 // CHECK: [[END2]] // CHECK: [[COND_LVALUE:%.+]] = phi i1 [ false, %{{.+}} ], [ [[VAR1_REDUCTION_BOOL]], %[[TRUE]] ] // CHECK: [[CONV:%.+]] = zext i1 [[COND_LVALUE]] to i32 -// CHECK: call void @{{.+}}([[S_INT_TY]]* [[COND_LVALUE:%.+]], i32 [[CONV]]) +// CHECK: call void @{{.+}}([[S_INT_TY]]* frozen [[COND_LVALUE:%.+]], i32 frozen [[CONV]]) // CHECK: [[BC1:%.+]] = bitcast [[S_INT_TY]]* [[VAR1_REF]] to i8* // CHECK: [[BC2:%.+]] = bitcast [[S_INT_TY]]* [[COND_LVALUE]] to i8* // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 128 [[BC1]], i8* align 4 [[BC2]], i64 4, i1 false) @@ -775,7 +775,7 @@ // var = var.operator &(var_reduction); // CHECK: call void @__kmpc_critical( -// CHECK: [[UP:%.+]] = call nonnull align 4 dereferenceable(4) [[S_INT_TY]]* @{{.+}}([[S_INT_TY]]* [[VAR_REF]], [[S_INT_TY]]* nonnull align 4 dereferenceable(4) [[VAR_PRIV]]) +// CHECK: [[UP:%.+]] = call frozen nonnull align 4 dereferenceable(4) [[S_INT_TY]]* @{{.+}}([[S_INT_TY]]* frozen [[VAR_REF]], [[S_INT_TY]]* frozen nonnull align 4 dereferenceable(4) [[VAR_PRIV]]) // CHECK: [[BC1:%.+]] = bitcast [[S_INT_TY]]* [[VAR_REF]] to i8* // CHECK: [[BC2:%.+]] = bitcast [[S_INT_TY]]* [[UP]] to i8* // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 128 [[BC1]], i8* align 4 [[BC2]], i64 4, i1 false) @@ -783,17 +783,17 @@ // var1 = var1.operator &&(var1_reduction); // CHECK: call void @__kmpc_critical( -// CHECK: [[TO_INT:%.+]] = call i{{[0-9]+}} @{{.+}}([[S_INT_TY]]* [[VAR1_REF]]) +// CHECK: [[TO_INT:%.+]] = call frozen i{{[0-9]+}} @{{.+}}([[S_INT_TY]]* frozen [[VAR1_REF]]) // CHECK: [[VAR1_BOOL:%.+]] = icmp ne i{{[0-9]+}} [[TO_INT]], 0 // CHECK: br i1 [[VAR1_BOOL]], label %[[TRUE:.+]], label %[[END2:.+]] // CHECK: [[TRUE]] -// CHECK: [[TO_INT:%.+]] = call i{{[0-9]+}} @{{.+}}([[S_INT_TY]]* [[VAR1_PRIV]]) +// CHECK: [[TO_INT:%.+]] = call frozen i{{[0-9]+}} @{{.+}}([[S_INT_TY]]* frozen [[VAR1_PRIV]]) // CHECK: [[VAR1_REDUCTION_BOOL:%.+]] = icmp ne i{{[0-9]+}} [[TO_INT]], 0 // CHECK: br label %[[END2]] // CHECK: [[END2]] // CHECK: [[COND_LVALUE:%.+]] = phi i1 [ false, %{{.+}} ], [ [[VAR1_REDUCTION_BOOL]], %[[TRUE]] ] // CHECK: [[CONV:%.+]] = zext i1 [[COND_LVALUE]] to i32 -// CHECK: call void @{{.+}}([[S_INT_TY]]* [[COND_LVALUE:%.+]], i32 [[CONV]]) +// CHECK: call void @{{.+}}([[S_INT_TY]]* frozen [[COND_LVALUE:%.+]], i32 frozen [[CONV]]) // CHECK: [[BC1:%.+]] = bitcast [[S_INT_TY]]* [[VAR1_REF]] to i8* // CHECK: [[BC2:%.+]] = bitcast [[S_INT_TY]]* [[COND_LVALUE]] to i8* // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 128 [[BC1]], i8* align 4 [[BC2]], i64 4, i1 false) @@ -807,7 +807,7 @@ // CHECK: br label %[[RED_DONE]] // CHECK: [[RED_DONE]] -// CHECK-DAG: call {{.*}} [[S_INT_TY_DESTR]]([[S_INT_TY]]* [[VAR_PRIV]]) +// CHECK-DAG: call {{.*}} [[S_INT_TY_DESTR]]([[S_INT_TY]]* frozen [[VAR_PRIV]]) // CHECK-DAG: call {{.*}} [[S_INT_TY_DESTR]]([[S_INT_TY]]* // CHECK: ret void @@ -817,7 +817,7 @@ // *(Type-1*)lhs[-1] = ReductionOperation-1(*(Type-1*)lhs[-1], // *(Type-1*)rhs[-1]); // } -// CHECK: define internal void [[REDUCTION_FUNC]](i8* %0, i8* %1) +// CHECK: define internal void [[REDUCTION_FUNC]](i8* frozen %0, i8* frozen %1) // t_var_lhs = (i{{[0-9]+}}*)lhs[0]; // CHECK: [[T_VAR_RHS_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST_RHS:%.+]], i64 0, i64 0 // CHECK: [[T_VAR_RHS_VOID:%.+]] = load i8*, i8** [[T_VAR_RHS_REF]], @@ -861,23 +861,23 @@ // CHECK: store i{{[0-9]+}} [[UP]], i{{[0-9]+}}* [[T_VAR_LHS]], // var_lhs = var_lhs.operator &(var_rhs); -// CHECK: [[UP:%.+]] = call nonnull align 4 dereferenceable(4) [[S_INT_TY]]* @{{.+}}([[S_INT_TY]]* [[VAR_LHS]], [[S_INT_TY]]* nonnull align 4 dereferenceable(4) [[VAR_RHS]]) +// CHECK: [[UP:%.+]] = call frozen nonnull align 4 dereferenceable(4) [[S_INT_TY]]* @{{.+}}([[S_INT_TY]]* frozen [[VAR_LHS]], [[S_INT_TY]]* frozen nonnull align 4 dereferenceable(4) [[VAR_RHS]]) // CHECK: [[BC1:%.+]] = bitcast [[S_INT_TY]]* [[VAR_LHS]] to i8* // CHECK: [[BC2:%.+]] = bitcast [[S_INT_TY]]* [[UP]] to i8* // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 128 [[BC1]], i8* align 4 [[BC2]], i64 4, i1 false) // var1_lhs = var1_lhs.operator &&(var1_rhs); -// CHECK: [[TO_INT:%.+]] = call i{{[0-9]+}} @{{.+}}([[S_INT_TY]]* [[VAR1_LHS]]) +// CHECK: [[TO_INT:%.+]] = call frozen i{{[0-9]+}} @{{.+}}([[S_INT_TY]]* frozen [[VAR1_LHS]]) // CHECK: [[VAR1_BOOL:%.+]] = icmp ne i{{[0-9]+}} [[TO_INT]], 0 // CHECK: br i1 [[VAR1_BOOL]], label %[[TRUE:.+]], label %[[END2:.+]] // CHECK: [[TRUE]] -// CHECK: [[TO_INT:%.+]] = call i{{[0-9]+}} @{{.+}}([[S_INT_TY]]* [[VAR1_RHS]]) +// CHECK: [[TO_INT:%.+]] = call frozen i{{[0-9]+}} @{{.+}}([[S_INT_TY]]* frozen [[VAR1_RHS]]) // CHECK: [[VAR1_REDUCTION_BOOL:%.+]] = icmp ne i{{[0-9]+}} [[TO_INT]], 0 // CHECK: br label %[[END2]] // CHECK: [[END2]] // CHECK: [[COND_LVALUE:%.+]] = phi i1 [ false, %{{.+}} ], [ [[VAR1_REDUCTION_BOOL]], %[[TRUE]] ] // CHECK: [[CONV:%.+]] = zext i1 [[COND_LVALUE]] to i32 -// CHECK: call void @{{.+}}([[S_INT_TY]]* [[COND_LVALUE:%.+]], i32 [[CONV]]) +// CHECK: call void @{{.+}}([[S_INT_TY]]* frozen [[COND_LVALUE:%.+]], i32 frozen [[CONV]]) // CHECK: [[BC1:%.+]] = bitcast [[S_INT_TY]]* [[VAR1_LHS]] to i8* // CHECK: [[BC2:%.+]] = bitcast [[S_INT_TY]]* [[COND_LVALUE]] to i8* // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 128 [[BC1]], i8* align 4 [[BC2]], i64 4, i1 false) diff --git a/clang/test/OpenMP/parallel_reduction_task_codegen.cpp b/clang/test/OpenMP/parallel_reduction_task_codegen.cpp --- a/clang/test/OpenMP/parallel_reduction_task_codegen.cpp +++ b/clang/test/OpenMP/parallel_reduction_task_codegen.cpp @@ -21,7 +21,7 @@ // CHECK: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @{{.+}}, i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i8***)* [[OUTLINED:@.+]] to void (i32*, i32*, ...)*), i32* %{{.+}}, i8*** %{{.+}}) -// CHECK: define internal void [[OUTLINED]](i32* noalias %{{.+}}, i32* noalias %{{.+}}, i32* {{.+}}, i8*** {{.+}}) +// CHECK: define internal void [[OUTLINED]](i32* frozen noalias %{{.+}}, i32* frozen noalias %{{.+}}, i32* {{.+}}, i8*** {{.+}}) // CHECK: [[ARGC_FP_ADDR:%.+]] = alloca i32, // CHECK: [[TR:%.+]] = alloca [2 x %struct.kmp_taskred_input_t], // CHECK: [[TG:%.+]] = alloca i8*, @@ -93,26 +93,26 @@ // CHECK: call void @__kmpc_task_reduction_modifier_fini(%struct.ident_t* @{{.+}}, i32 %{{.+}}, i32 0) // CHECK: call i32 @__kmpc_reduce_nowait( -// CHECK: define internal void [[ARGC_INIT]](i8* noalias %{{.+}}, i8* noalias %{{.+}}) +// CHECK: define internal void [[ARGC_INIT]](i8* frozen noalias %{{.+}}, i8* frozen noalias %{{.+}}) // CHECK: store i32 0, i32* %{{.+}}, -// CHECK: define internal void [[ARGC_COMB]](i8* %{{.+}}, i8* %{{.+}}) +// CHECK: define internal void [[ARGC_COMB]](i8* frozen %{{.+}}, i8* frozen %{{.+}}) // CHECK: [[ADD:%.+]] = add nsw i32 %{{.+}}, %{{.+}} // CHECK: store i32 [[ADD]], i32* %{{.+}}, -// CHECK: define internal void [[ARGV_INIT]](i8* noalias %{{.+}}, i8* noalias %{{.+}}) +// CHECK: define internal void [[ARGV_INIT]](i8* frozen noalias %{{.+}}, i8* frozen noalias %{{.+}}) // CHECK: phi i8* // CHECK: store i8 0, i8* [[EL:%.+]], // CHECK: getelementptr i8, i8* [[EL]], i32 1 -// CHECK: define internal void [[ARGV_COMB]](i8* %{{.+}}, i8* %{{.+}}) +// CHECK: define internal void [[ARGV_COMB]](i8* frozen %{{.+}}, i8* frozen %{{.+}}) // CHECK: phi i8* // CHECK: [[ADD:%.+]] = add nsw i32 %{{.+}}, %{{.+}} // CHECK: [[CONV:%.+]] = trunc i32 [[ADD]] to i8 // CHECK: store i8 [[CONV]], i8* [[EL:%.+]], // CHECK: getelementptr i8, i8* [[EL]], i32 1 -// CHECK: define internal {{.*}}i32 [[TASK]](i32 {{.+}}, [[TASK_TY]]* {{.+}}) +// CHECK: define internal {{.*}}frozen i32 [[TASK]](i32 {{.+}}, [[TASK_TY]]* {{.+}}) // CHECK-DAG: call i8* @__kmpc_task_reduction_get_th_data(i32 %{{.+}}, i8* [[TG:%.+]], i8* [[ARGC_REF:%.+]]) // CHECK_DAG: [[TG]] = load i8*, i8** [[TG_ADDR:%.+]], // CHECK-DAG: [[ARGC_REF]] = bitcast i32* [[ARGC_ADDR:%.+]] to i8* diff --git a/clang/test/OpenMP/parallel_sections_codegen.cpp b/clang/test/OpenMP/parallel_sections_codegen.cpp --- a/clang/test/OpenMP/parallel_sections_codegen.cpp +++ b/clang/test/OpenMP/parallel_sections_codegen.cpp @@ -27,7 +27,7 @@ int main() { // CHECK: call void (%{{.+}}*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%{{.+}}* @{{.+}}, i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* [[OMP_PARALLEL_FUNC:@.+]] to void (i32*, i32*, ...)*)) // CHECK-LABEL: } -// CHECK: define internal void [[OMP_PARALLEL_FUNC]](i32* noalias [[GTID_PARAM_ADDR:%.+]], i32* noalias %{{.+}}) +// CHECK: define internal void [[OMP_PARALLEL_FUNC]](i32* frozen noalias [[GTID_PARAM_ADDR:%.+]], i32* frozen noalias %{{.+}}) // CHECK: store i32* [[GTID_PARAM_ADDR]], i32** [[GTID_REF_ADDR:%.+]], #pragma omp parallel sections { diff --git a/clang/test/OpenMP/parallel_sections_reduction_task_codegen.cpp b/clang/test/OpenMP/parallel_sections_reduction_task_codegen.cpp --- a/clang/test/OpenMP/parallel_sections_reduction_task_codegen.cpp +++ b/clang/test/OpenMP/parallel_sections_reduction_task_codegen.cpp @@ -21,7 +21,7 @@ // CHECK: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @{{.+}}, i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i8***)* [[OUTLINED:@.+]] to void (i32*, i32*, ...)*), i32* %{{.+}}, i8*** %{{.+}}) -// CHECK: define internal void [[OUTLINED]](i32* noalias %{{.+}}, i32* noalias %{{.+}}, i32* {{.+}}, i8*** {{.+}}) +// CHECK: define internal void [[OUTLINED]](i32* frozen noalias %{{.+}}, i32* frozen noalias %{{.+}}, i32* {{.+}}, i8*** {{.+}}) // CHECK: alloca i32, // CHECK: alloca i32, // CHECK: alloca i32, @@ -98,26 +98,26 @@ // CHECK: call void @__kmpc_task_reduction_modifier_fini(%struct.ident_t* @{{.+}}, i32 %{{.+}}, i32 1) // CHECK: call i32 @__kmpc_reduce_nowait( -// CHECK: define internal void [[ARGC_INIT]](i8* noalias %{{.+}}, i8* noalias %{{.+}}) +// CHECK: define internal void [[ARGC_INIT]](i8* frozen noalias %{{.+}}, i8* frozen noalias %{{.+}}) // CHECK: store i32 0, i32* %{{.+}}, -// CHECK: define internal void [[ARGC_COMB]](i8* %{{.+}}, i8* %{{.+}}) +// CHECK: define internal void [[ARGC_COMB]](i8* frozen %{{.+}}, i8* frozen %{{.+}}) // CHECK: [[ADD:%.+]] = add nsw i32 %{{.+}}, %{{.+}} // CHECK: store i32 [[ADD]], i32* %{{.+}}, -// CHECK: define internal void [[ARGV_INIT]](i8* noalias %{{.+}}, i8* noalias %{{.+}}) +// CHECK: define internal void [[ARGV_INIT]](i8* frozen noalias %{{.+}}, i8* frozen noalias %{{.+}}) // CHECK: phi i8* // CHECK: store i8 0, i8* [[EL:%.+]], // CHECK: getelementptr i8, i8* [[EL]], i32 1 -// CHECK: define internal void [[ARGV_COMB]](i8* %{{.+}}, i8* %{{.+}}) +// CHECK: define internal void [[ARGV_COMB]](i8* frozen %{{.+}}, i8* frozen %{{.+}}) // CHECK: phi i8* // CHECK: [[ADD:%.+]] = add nsw i32 %{{.+}}, %{{.+}} // CHECK: [[CONV:%.+]] = trunc i32 [[ADD]] to i8 // CHECK: store i8 [[CONV]], i8* [[EL:%.+]], // CHECK: getelementptr i8, i8* [[EL]], i32 1 -// CHECK: define internal {{.*}}i32 [[TASK]](i32 {{.+}}, [[TASK_TY]]* {{.+}}) +// CHECK: define internal {{.*}}frozen i32 [[TASK]](i32 {{.+}}, [[TASK_TY]]* {{.+}}) // CHECK-DAG: call i8* @__kmpc_task_reduction_get_th_data(i32 %{{.+}}, i8* [[TG:%.+]], i8* [[ARGC_REF:%.+]]) // CHECK_DAG: [[TG]] = load i8*, i8** [[TG_ADDR:%.+]], // CHECK-DAG: [[ARGC_REF]] = bitcast i32* [[ARGC_ADDR:%.+]] to i8* diff --git a/clang/test/OpenMP/scan_codegen.cpp b/clang/test/OpenMP/scan_codegen.cpp --- a/clang/test/OpenMP/scan_codegen.cpp +++ b/clang/test/OpenMP/scan_codegen.cpp @@ -106,7 +106,7 @@ // CHECK: br label %[[ARRAY_INIT:.+]] // CHECK: [[ARRAY_INIT]]: // CHECK: [[S_CUR:%.+]] = phi %struct.S* [ [[S_BEGIN]], %{{.+}} ], [ [[S_NEXT:%.+]], %[[ARRAY_INIT]] ] - // CHECK: call void [[CONSTR:@.+]](%struct.S* [[S_CUR]]) + // CHECK: call void [[CONSTR:@.+]](%struct.S* frozen [[S_CUR]]) // CHECK: [[S_NEXT]] = getelementptr inbounds %struct.S, %struct.S* [[S_CUR]], i{{.+}} 1 // CHECK: [[IS_DONE:%.+]] = icmp eq %struct.S* [[S_NEXT]], [[S_END]] // CHECK: br i1 [[IS_DONE]], label %[[DONE:.+]], label %[[ARRAY_INIT]] @@ -135,7 +135,7 @@ // CHECK: br i1 [[IS_DONE]], label %[[DONE:.+]], label %[[ARRAY_INIT:[^,]+]] // CHECK: [[ARRAY_INIT]]: // CHECK: [[S_CUR:%.+]] = phi %struct.S* [ [[S_BEGIN]], %[[OMP_BODY]] ], [ [[S_NEXT:%.+]], %[[ARRAY_INIT]] ] - // CHECK: call void [[CONSTR]](%struct.S* [[S_CUR]]) + // CHECK: call void [[CONSTR]](%struct.S* frozen [[S_CUR]]) // CHECK: [[S_NEXT]] = getelementptr {{.*}}%struct.S, %struct.S* [[S_CUR]], i{{.+}} 1 // CHECK: [[IS_DONE:%.+]] = icmp eq %struct.S* [[S_NEXT]], [[S_END]] // CHECK: br i1 [[IS_DONE]], label %[[DONE:.+]], label %[[ARRAY_INIT]] @@ -172,7 +172,7 @@ // CHECK: br label %[[BODY:[^,]+]] // CHECK: [[BODY]]: // CHECK: [[CUR:%.+]] = phi %struct.S* [ [[TEMP_ARR_BEG]], %[[REDUCE]] ], [ [[NEXT:%.+]], %[[BODY]] ] - // CHECK: call void [[CONSTR]](%struct.S* [[CUR]]) + // CHECK: call void [[CONSTR]](%struct.S* frozen [[CUR]]) // CHECK: [[NEXT]] = getelementptr inbounds %struct.S, %struct.S* [[CUR]], i64 1 // CHECK: [[IS_DONE:%.+]] = icmp eq %struct.S* [[NEXT]], [[TEMP_ARR_END]] // CHECK: br i1 [[IS_DONE]], label %[[EXIT:[^,]+]], label %[[BODY]] @@ -186,7 +186,7 @@ // CHECK: [[BODY]]: // CHECK: [[CUR_SRC:%.+]] = phi %struct.S* [ [[LHS_BEGIN]], %{{.+}} ], [ [[SRC_NEXT:%.+]], %[[BODY]] ] // CHECK: [[CUR_DEST:%.+]] = phi %struct.S* [ [[TEMP_ARR_BEG]], %{{.+}} ], [ [[DEST_NEXT:%.+]], %[[BODY]] ] - // CHECK: call {{.*}}%struct.S* [[S_COPY:@.+]](%struct.S* [[CUR_DEST]], %struct.S* {{.*}}[[CUR_SRC]]) + // CHECK: call {{.*}}%struct.S* [[S_COPY:@.+]](%struct.S* frozen [[CUR_DEST]], %struct.S* {{.*}}[[CUR_SRC]]) // CHECK: [[DEST_NEXT:%.+]] = getelementptr %struct.S, %struct.S* [[CUR_DEST]], i32 1 // CHECK: [[SRC_NEXT:%.+]] = getelementptr %struct.S, %struct.S* [[CUR_SRC]], i32 1 // CHECK: [[IS_DONE:%.+]] = icmp eq %struct.S* [[DEST_NEXT]], [[TEMP_ARR_END]] @@ -200,8 +200,8 @@ // CHECK: [[ARRAY_REDUCE_COPY]]: // CHECK: [[SRC_CUR:%.+]] = phi %struct.S* [ [[RHS_BEGIN]], %[[EXIT]] ], [ [[SRC_NEXT:%.+]], %[[ARRAY_REDUCE_COPY]] ] // CHECK: [[DEST_CUR:%.+]] = phi %struct.S* [ [[LHS_BEGIN]], %[[EXIT]] ], [ [[DEST_NEXT:%.+]], %[[ARRAY_REDUCE_COPY]] ] - // CHECK: [[SUM:%.+]] = call {{.*}}%struct.S* @{{.+}}(%struct.S* [[DEST_CUR]], %struct.S* {{.*}}[[SRC_CUR]]) - // CHECK: call {{.*}}%struct.S* [[S_COPY]](%struct.S* [[DEST_CUR]], %struct.S* {{.*}}[[SUM]]) + // CHECK: [[SUM:%.+]] = call {{.*}}%struct.S* @{{.+}}(%struct.S* frozen [[DEST_CUR]], %struct.S* {{.*}}[[SRC_CUR]]) + // CHECK: call {{.*}}%struct.S* [[S_COPY]](%struct.S* frozen [[DEST_CUR]], %struct.S* {{.*}}[[SUM]]) // CHECK: [[DEST_NEXT]] = getelementptr {{.*}}%struct.S, %struct.S* [[DEST_CUR]], i{{.+}} 1 // CHECK: [[SRC_NEXT]] = getelementptr {{.*}}%struct.S, %struct.S* [[SRC_CUR]], i{{.+}} 1 // CHECK: [[IS_DONE:%.+]] = icmp eq %struct.S* [[DEST_NEXT]], [[LHS_END]] @@ -216,7 +216,7 @@ // CHECK: [[BODY]]: // CHECK: [[CUR_SRC:%.+]] = phi %struct.S* [ [[TEMP_ARR_BEG]], %[[DONE]] ], [ [[SRC_NEXT:%.+]], %[[BODY]] ] // CHECK: [[CUR_DEST:%.+]] = phi %struct.S* [ [[RHS_BEGIN]], %[[DONE]] ], [ [[DEST_NEXT:%.+]], %[[BODY]] ] - // CHECK: call {{.*}}%struct.S* [[S_COPY]](%struct.S* [[CUR_DEST]], %struct.S* {{.*}}[[CUR_SRC]]) + // CHECK: call {{.*}}%struct.S* [[S_COPY]](%struct.S* frozen [[CUR_DEST]], %struct.S* {{.*}}[[CUR_SRC]]) // CHECK: [[DEST_NEXT]] = getelementptr %struct.S, %struct.S* [[CUR_DEST]], i32 1 // CHECK: [[SRC_NEXT]] = getelementptr %struct.S, %struct.S* [[CUR_SRC]], i32 1 // CHECK: [[IS_DONE:%.+]] = icmp eq %struct.S* [[DEST_NEXT]], [[RHS_END]] @@ -230,7 +230,7 @@ // CHECK: [[BODY]]: // CHECK: [[CUR:%.+]] = phi %struct.S* [ [[TEMP_ARR_END]], %[[DONE]] ], [ [[PREV:%.+]], %[[BODY]] ] // CHECK: [[PREV]] = getelementptr inbounds %struct.S, %struct.S* [[CUR]], i64 -1 - // CHECK: call void [[DESTR:@.+]](%struct.S* [[PREV]]) + // CHECK: call void [[DESTR:@.+]](%struct.S* frozen [[PREV]]) // CHECK: [[IS_DONE:%.+]] = icmp eq %struct.S* [[PREV]], [[TEMP_ARR_BEG]] // CHECK: br i1 [[IS_DONE]], label %[[EXIT:[^,]+]], label %[[BODY]] // CHECK: [[EXIT]]: @@ -256,7 +256,7 @@ // CHECK: [[ARRAY_DESTR]]: // CHECK: [[S_CUR:%.+]] = phi %struct.S* [ [[S_END]], %[[CONTINUE]] ], [ [[S_PREV:%.+]], %[[ARRAY_DESTR]] ] // CHECK: [[S_PREV]] = getelementptr {{.*}}%struct.S, %struct.S* [[S_CUR]], i{{.+}} -1 - // CHECK: call void [[DESTR]](%struct.S* [[S_PREV]]) + // CHECK: call void [[DESTR]](%struct.S* frozen [[S_PREV]]) // CHECK: [[IS_DONE:%.+]] = icmp eq %struct.S* [[S_PREV]], [[S_BEGIN]] // CHECK: br i1 [[IS_DONE]], label %[[DONE:.+]], label %[[ARRAY_DESTR]] // CHECK: [[DONE]]: diff --git a/clang/test/OpenMP/sections_firstprivate_codegen.cpp b/clang/test/OpenMP/sections_firstprivate_codegen.cpp --- a/clang/test/OpenMP/sections_firstprivate_codegen.cpp +++ b/clang/test/OpenMP/sections_firstprivate_codegen.cpp @@ -67,7 +67,7 @@ // CHECK-DAG: [[SIVAR:@.+]] = internal global i{{[0-9]+}} 0, // CHECK-DAG: [[SECTIONS_BARRIER_LOC:@.+]] = private unnamed_addr global %{{.+}} { i32 0, i32 194, i32 0, i32 0, i8* -// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR:@.+]]([[S_FLOAT_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR:@.+]]([[S_FLOAT_TY]]* frozen [[TEST]]) // CHECK: ([[S_FLOAT_TY]]*)* [[S_FLOAT_TY_DESTR:@[^ ]+]] {{[^,]+}}, {{.+}}([[S_FLOAT_TY]]* [[TEST]] int main() { static int sivar; @@ -81,7 +81,7 @@ #pragma omp parallel #pragma omp sections firstprivate(g, sivar) { - // LAMBDA: define{{.*}} internal{{.*}} void [[OMP_REGION]](i32* noalias %{{.+}}, i32* noalias %{{.+}}, i32* nonnull align 4 dereferenceable(4) [[SIVAR_REF:%.+]]) + // LAMBDA: define{{.*}} internal{{.*}} void [[OMP_REGION]](i32* frozen noalias %{{.+}}, i32* frozen noalias %{{.+}}, i32* frozen nonnull align 4 dereferenceable(4) [[SIVAR_REF:%.+]]) // Skip temp vars for loop // LAMBDA: alloca i{{[0-9]+}}, // LAMBDA: alloca i{{[0-9]+}}, @@ -111,12 +111,12 @@ // LAMBDA: store i{{[0-9]+}}* [[G_PRIVATE_ADDR]], i{{[0-9]+}}** [[G_PRIVATE_ADDR_REF]] // LAMBDA: [[SIVAR_PRIVATE_ADDR_REF:%.+]] = getelementptr inbounds %{{.+}}, %{{.+}}* [[ARG:%.+]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 // LAMBDA: store i{{[0-9]+}}* [[SIVAR1_PRIVATE_ADDR]], i{{[0-9]+}}** [[SIVAR_PRIVATE_ADDR_REF]] - // LAMBDA: call void [[INNER_LAMBDA:@.+]](%{{.+}}* [[ARG]]) + // LAMBDA: call void [[INNER_LAMBDA:@.+]](%{{.+}}* frozen [[ARG]]) // LAMBDA: call void @__kmpc_for_static_fini( // LAMBDA: call void @__kmpc_barrier( #pragma omp section [&]() { - // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* [[ARG_PTR:%.+]]) + // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* frozen [[ARG_PTR:%.+]]) // LAMBDA: store %{{.+}}* [[ARG_PTR]], %{{.+}}** [[ARG_PTR_REF:%.+]], g = 2; sivar = 20; @@ -141,7 +141,7 @@ #pragma omp parallel #pragma omp sections firstprivate(g, sivar) { - // BLOCKS: define{{.*}} internal{{.*}} void [[OMP_REGION]](i32* noalias %{{.+}}, i32* noalias %{{.+}}, i32* nonnull align 4 dereferenceable(4) [[SIVAR_REF:%.+]]) + // BLOCKS: define{{.*}} internal{{.*}} void [[OMP_REGION]](i32* frozen noalias %{{.+}}, i32* frozen noalias %{{.+}}, i32* frozen nonnull align 4 dereferenceable(4) [[SIVAR_REF:%.+]]) // Skip temp vars for loop // BLOCKS: alloca i{{[0-9]+}}, // BLOCKS: alloca i{{[0-9]+}}, @@ -234,15 +234,15 @@ // CHECK: br i1 [[IS_EMPTY]], label %[[S_ARR_BODY_DONE:.+]], label %[[S_ARR_BODY:.+]] // CHECK: [[S_ARR_BODY]] // CHECK: getelementptr inbounds ([2 x [[S_FLOAT_TY]]], [2 x [[S_FLOAT_TY]]]* [[S_ARR]], i{{[0-9]+}} 0, i{{[0-9]+}} 0) -// CHECK: call {{.*}} [[ST_TY_DEFAULT_CONSTR:@.+]]([[ST_TY]]* [[ST_TY_TEMP:%.+]]) -// CHECK: call {{.*}} [[S_FLOAT_TY_COPY_CONSTR:@.+]]([[S_FLOAT_TY]]* {{.+}}, [[S_FLOAT_TY]]* {{.+}}, [[ST_TY]]* [[ST_TY_TEMP]]) -// CHECK: call {{.*}} [[ST_TY_DESTR:@.+]]([[ST_TY]]* [[ST_TY_TEMP]]) +// CHECK: call {{.*}} [[ST_TY_DEFAULT_CONSTR:@.+]]([[ST_TY]]* frozen [[ST_TY_TEMP:%.+]]) +// CHECK: call {{.*}} [[S_FLOAT_TY_COPY_CONSTR:@.+]]([[S_FLOAT_TY]]* {{.+}}, [[S_FLOAT_TY]]* {{.+}}, [[ST_TY]]* frozen [[ST_TY_TEMP]]) +// CHECK: call {{.*}} [[ST_TY_DESTR:@.+]]([[ST_TY]]* frozen [[ST_TY_TEMP]]) // CHECK: br i1 {{.+}}, label %{{.+}}, label %[[S_ARR_BODY]] // firstprivate var(var) -// CHECK: call {{.*}} [[ST_TY_DEFAULT_CONSTR]]([[ST_TY]]* [[ST_TY_TEMP:%.+]]) -// CHECK: call {{.*}} [[S_FLOAT_TY_COPY_CONSTR]]([[S_FLOAT_TY]]* [[VAR_PRIV]], [[S_FLOAT_TY]]* {{.*}} [[VAR]], [[ST_TY]]* [[ST_TY_TEMP]]) -// CHECK: call {{.*}} [[ST_TY_DESTR]]([[ST_TY]]* [[ST_TY_TEMP]]) +// CHECK: call {{.*}} [[ST_TY_DEFAULT_CONSTR]]([[ST_TY]]* frozen [[ST_TY_TEMP:%.+]]) +// CHECK: call {{.*}} [[S_FLOAT_TY_COPY_CONSTR]]([[S_FLOAT_TY]]* frozen [[VAR_PRIV]], [[S_FLOAT_TY]]* {{.*}} [[VAR]], [[ST_TY]]* frozen [[ST_TY_TEMP]]) +// CHECK: call {{.*}} [[ST_TY_DESTR]]([[ST_TY]]* frozen [[ST_TY_TEMP]]) // firstprivate isvar // CHECK: [[SIVAR_VAL:%.+]] = load i{{[0-9]+}}, i{{[0-9]+}}* [[SIVAR]], @@ -253,7 +253,7 @@ // CHECK: call void @__kmpc_for_static_fini( // ~(firstprivate var), ~(firstprivate s_arr) -// CHECK-DAG: call {{.*}} [[S_FLOAT_TY_DESTR]]([[S_FLOAT_TY]]* [[VAR_PRIV]]) +// CHECK-DAG: call {{.*}} [[S_FLOAT_TY_DESTR]]([[S_FLOAT_TY]]* frozen [[VAR_PRIV]]) // CHECK-DAG: call {{.*}} [[S_FLOAT_TY_DESTR]]([[S_FLOAT_TY]]* // CHECK: = call {{.*}}i{{.+}} [[TMAIN_INT:@.+]]() @@ -262,12 +262,12 @@ // CHECK: define {{.*}} i{{[0-9]+}} [[TMAIN_INT]]() // CHECK: [[TEST:%.+]] = alloca [[S_INT_TY]], -// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR:@.+]]([[S_INT_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR:@.+]]([[S_INT_TY]]* frozen [[TEST]]) // CHECK: call void (%{{.+}}*, i{{[0-9]+}}, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)*, ...) @__kmpc_fork_call(%{{.+}}* @{{.+}}, i{{[0-9]+}} 4, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)* bitcast (void (i{{[0-9]+}}*, i{{[0-9]+}}*, i32*, [2 x i32]*, [2 x [[S_INT_TY]]]*, [[S_INT_TY]]*)* [[TMAIN_MICROTASK:@.+]] to void // CHECK: call {{.*}} [[S_INT_TY_DESTR:@.+]]([[S_INT_TY]]* // CHECK: ret // -// CHECK: define internal void [[TMAIN_MICROTASK]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}, +// CHECK: define internal void [[TMAIN_MICROTASK]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}} // Skip temp vars for loop // CHECK: alloca i{{[0-9]+}}, // CHECK: alloca i{{[0-9]+}}, @@ -300,15 +300,15 @@ // CHECK: [[IS_EMPTY:%.+]] = icmp eq [[S_INT_TY]]* [[S_ARR_PRIV_BEGIN]], [[S_ARR_PRIV_END]] // CHECK: br i1 [[IS_EMPTY]], label %[[S_ARR_BODY_DONE:.+]], label %[[S_ARR_BODY:.+]] // CHECK: [[S_ARR_BODY]] -// CHECK: call {{.*}} [[ST_TY_DEFAULT_CONSTR:@.+]]([[ST_TY]]* [[ST_TY_TEMP:%.+]]) -// CHECK: call {{.*}} [[S_INT_TY_COPY_CONSTR:@.+]]([[S_INT_TY]]* {{.+}}, [[S_INT_TY]]* {{.+}}, [[ST_TY]]* [[ST_TY_TEMP]]) -// CHECK: call {{.*}} [[ST_TY_DESTR:@.+]]([[ST_TY]]* [[ST_TY_TEMP]]) +// CHECK: call {{.*}} [[ST_TY_DEFAULT_CONSTR:@.+]]([[ST_TY]]* frozen [[ST_TY_TEMP:%.+]]) +// CHECK: call {{.*}} [[S_INT_TY_COPY_CONSTR:@.+]]([[S_INT_TY]]* {{.+}}, [[S_INT_TY]]* {{.+}}, [[ST_TY]]* frozen [[ST_TY_TEMP]]) +// CHECK: call {{.*}} [[ST_TY_DESTR:@.+]]([[ST_TY]]* frozen [[ST_TY_TEMP]]) // CHECK: br i1 {{.+}}, label %{{.+}}, label %[[S_ARR_BODY]] // firstprivate var(var) -// CHECK: call {{.*}} [[ST_TY_DEFAULT_CONSTR]]([[ST_TY]]* [[ST_TY_TEMP:%.+]]) -// CHECK: call {{.*}} [[S_INT_TY_COPY_CONSTR]]([[S_INT_TY]]* [[VAR_PRIV]], [[S_INT_TY]]* {{.*}} [[VAR_REF]], [[ST_TY]]* [[ST_TY_TEMP]]) -// CHECK: call {{.*}} [[ST_TY_DESTR]]([[ST_TY]]* [[ST_TY_TEMP]]) +// CHECK: call {{.*}} [[ST_TY_DEFAULT_CONSTR]]([[ST_TY]]* frozen [[ST_TY_TEMP:%.+]]) +// CHECK: call {{.*}} [[S_INT_TY_COPY_CONSTR]]([[S_INT_TY]]* frozen [[VAR_PRIV]], [[S_INT_TY]]* {{.*}} [[VAR_REF]], [[ST_TY]]* frozen [[ST_TY_TEMP]]) +// CHECK: call {{.*}} [[ST_TY_DESTR]]([[ST_TY]]* frozen [[ST_TY_TEMP]]) // No synchronization for initialization. // CHECK-NOT: call void @__kmpc_barrier( @@ -317,7 +317,7 @@ // CHECK: call void @__kmpc_for_static_fini( // ~(firstprivate var), ~(firstprivate s_arr) -// CHECK-DAG: call {{.*}} [[S_INT_TY_DESTR]]([[S_INT_TY]]* [[VAR_PRIV]]) +// CHECK-DAG: call {{.*}} [[S_INT_TY_DESTR]]([[S_INT_TY]]* frozen [[VAR_PRIV]]) // CHECK-DAG: call {{.*}} [[S_INT_TY_DESTR]]([[S_INT_TY]]* // CHECK: [[GTID_REF:%.+]] = load i{{[0-9]+}}*, i{{[0-9]+}}** [[GTID_ADDR_ADDR]] // CHECK: [[GTID:%.+]] = load i{{[0-9]+}}, i{{[0-9]+}}* [[GTID_REF]] diff --git a/clang/test/OpenMP/sections_lastprivate_codegen.cpp b/clang/test/OpenMP/sections_lastprivate_codegen.cpp --- a/clang/test/OpenMP/sections_lastprivate_codegen.cpp +++ b/clang/test/OpenMP/sections_lastprivate_codegen.cpp @@ -84,7 +84,7 @@ #pragma omp parallel #pragma omp sections lastprivate(g, sivar) { - // LAMBDA: define{{.*}} internal{{.*}} void [[OMP_REGION]](i32* noalias [[GTID:%.+]], i32* noalias %{{.+}}, i32* nonnull align 4 dereferenceable(4) [[SIVAR_REF:%.+]]) + // LAMBDA: define{{.*}} internal{{.*}} void [[OMP_REGION]](i32* frozen noalias [[GTID:%.+]], i32* frozen noalias %{{.+}}, i32* frozen nonnull align 4 dereferenceable(4) [[SIVAR_REF:%.+]]) // LAMBDA: alloca i{{[0-9]+}}, // LAMBDA: alloca i{{[0-9]+}}, // LAMBDA: alloca i{{[0-9]+}}, @@ -106,7 +106,7 @@ // LAMBDA: store i{{[0-9]+}}* [[G_PRIVATE_ADDR]], i{{[0-9]+}}** [[G_PRIVATE_ADDR_REF]] // LAMBDA: [[SIVAR_PRIVATE_ADDR_REF:%.+]] = getelementptr inbounds %{{.+}}, %{{.+}}* [[ARG:%.+]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 // LAMBDA: store i{{[0-9]+}}* [[SIVAR1_PRIVATE_ADDR]], i{{[0-9]+}}** [[SIVAR_PRIVATE_ADDR_REF]] - // LAMBDA: call void [[INNER_LAMBDA:@.+]](%{{.+}}* [[ARG]]) + // LAMBDA: call void [[INNER_LAMBDA:@.+]](%{{.+}}* frozen [[ARG]]) // LAMBDA: call void @__kmpc_for_static_fini(%{{.+}}* @{{.+}}, i32 [[GTID_ADDR_REF]]) { g = 1; @@ -131,7 +131,7 @@ // LAMBDA: call void @__kmpc_barrier(%{{.+}}* @{{.+}}, i{{[0-9]+}} [[GTID_ADDR_REF]]) #pragma omp section [&]() { - // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* [[ARG_PTR:%.+]]) + // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* frozen [[ARG_PTR:%.+]]) // LAMBDA: store %{{.+}}* [[ARG_PTR]], %{{.+}}** [[ARG_PTR_REF:%.+]], g = 2; sivar = 23; @@ -156,7 +156,7 @@ #pragma omp parallel #pragma omp sections lastprivate(g, sivar) { - // BLOCKS: define{{.*}} internal{{.*}} void [[OMP_REGION]](i32* noalias [[GTID:%.+]], i32* noalias %{{.+}}, i32* nonnull align 4 dereferenceable(4) [[SIVAR:%.+]]) + // BLOCKS: define{{.*}} internal{{.*}} void [[OMP_REGION]](i32* frozen noalias [[GTID:%.+]], i32* frozen noalias %{{.+}}, i32* frozen nonnull align 4 dereferenceable(4) [[SIVAR:%.+]]) // BLOCKS: alloca i{{[0-9]+}}, // BLOCKS: alloca i{{[0-9]+}}, // BLOCKS: alloca i{{[0-9]+}}, @@ -244,9 +244,9 @@ #endif } -// CHECK: define i{{[0-9]+}} @main() +// CHECK: define frozen i{{[0-9]+}} @main() // CHECK: [[TEST:%.+]] = alloca [[S_FLOAT_TY]], -// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR:@.+]]([[S_FLOAT_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR:@.+]]([[S_FLOAT_TY]]* frozen [[TEST]]) // CHECK: call void (%{{.+}}*, i{{[0-9]+}}, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)*, ...) @__kmpc_fork_call(%{{.+}}* @{{.+}}, i{{[0-9]+}} 5, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)* bitcast (void (i{{[0-9]+}}*, i{{[0-9]+}}*, i32*, [2 x i32]*, [2 x [[S_FLOAT_TY]]]*, [[S_FLOAT_TY]]*, i{{[0-9]+}}*)* [[MAIN_MICROTASK:@.+]] to void @@ -255,7 +255,7 @@ // CHECK: call void [[S_FLOAT_TY_DESTR:@.+]]([[S_FLOAT_TY]]* // CHECK: ret -// CHECK: define internal void [[MAIN_MICROTASK]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}, +// CHECK: define internal void [[MAIN_MICROTASK]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}} // CHECK: alloca i{{[0-9]+}}, // CHECK: alloca i{{[0-9]+}}, // CHECK: alloca i{{[0-9]+}}, @@ -282,7 +282,7 @@ // CHECK: ret void // -// CHECK: define internal void [[MAIN_MICROTASK1]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}) +// CHECK: define internal void [[MAIN_MICROTASK1]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}) // OMP45: [[X_PRIV:%.+]] = alloca double, // OMP50: [[X_STRUCT:%.+]] = alloca [[STRUCT:%struct[.].*]], // CHECK-NOT: alloca double @@ -333,12 +333,12 @@ // CHECK: define {{.*}} i{{[0-9]+}} [[TMAIN_INT]]() // CHECK: [[TEST:%.+]] = alloca [[S_INT_TY]], -// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR:@.+]]([[S_INT_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR:@.+]]([[S_INT_TY]]* frozen [[TEST]]) // CHECK: call void (%{{.+}}*, i{{[0-9]+}}, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)*, ...) @__kmpc_fork_call(%{{.+}}* @{{.+}}, i{{[0-9]+}} 4, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)* bitcast (void (i{{[0-9]+}}*, i{{[0-9]+}}*, i32*, [2 x i32]*, [2 x [[S_INT_TY]]]*, [[S_INT_TY]]*)* [[TMAIN_MICROTASK:@.+]] to void // CHECK: call void [[S_INT_TY_DESTR:@.+]]([[S_INT_TY]]* // CHECK: ret // -// CHECK: define internal void [[TMAIN_MICROTASK]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}, +// CHECK: define internal void [[TMAIN_MICROTASK]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}} // CHECK: alloca i{{[0-9]+}}, // CHECK: alloca i{{[0-9]+}}, // CHECK: alloca i{{[0-9]+}}, @@ -359,8 +359,8 @@ // CHECK-NOT: [[T_VAR_PRIV]] // CHECK-NOT: [[VEC_PRIV]] // CHECK: [[S_ARR_PRIV_ITEM:%.+]] = phi [[S_INT_TY]]* -// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR]]([[S_INT_TY]]* [[S_ARR_PRIV_ITEM]]) -// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR]]([[S_INT_TY]]* [[VAR_PRIV]]) +// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR]]([[S_INT_TY]]* frozen [[S_ARR_PRIV_ITEM]]) +// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR]]([[S_INT_TY]]* frozen [[VAR_PRIV]]) // CHECK: call {{.+}} @__kmpc_for_static_init_4(%{{.+}}* @{{.+}}, i32 %{{.+}}, i32 34, i32* [[IS_LAST_ADDR:%.+]], i32* %{{.+}}, i32* %{{.+}}, i32* %{{.+}}, i32 1, i32 1) // // CHECK: call void @__kmpc_for_static_fini(%{{.+}}* @{{.+}}, i32 %{{.+}}) @@ -397,10 +397,10 @@ // CHECK: [[S_ARR_BODY_DONE]] // original var=private_var; -// CHECK: call {{.*}} [[S_INT_TY_COPY_ASSIGN:@.+]]([[S_INT_TY]]* [[VAR_REF]], [[S_INT_TY]]* {{.*}} [[VAR_PRIV]]) +// CHECK: call {{.*}} [[S_INT_TY_COPY_ASSIGN:@.+]]([[S_INT_TY]]* frozen [[VAR_REF]], [[S_INT_TY]]* {{.*}} [[VAR_PRIV]]) // CHECK: br label %[[LAST_DONE]] // CHECK: [[LAST_DONE]] -// CHECK-DAG: call void [[S_INT_TY_DESTR]]([[S_INT_TY]]* [[VAR_PRIV]]) +// CHECK-DAG: call void [[S_INT_TY_DESTR]]([[S_INT_TY]]* frozen [[VAR_PRIV]]) // CHECK-DAG: call void [[S_INT_TY_DESTR]]([[S_INT_TY]]* // CHECK: [[GTID_REF:%.+]] = load i{{[0-9]+}}*, i{{[0-9]+}}** [[GTID_ADDR_REF]] // CHECK: [[GTID:%.+]] = load i{{[0-9]+}}, i{{[0-9]+}}* [[GTID_REF]] diff --git a/clang/test/OpenMP/sections_private_codegen.cpp b/clang/test/OpenMP/sections_private_codegen.cpp --- a/clang/test/OpenMP/sections_private_codegen.cpp +++ b/clang/test/OpenMP/sections_private_codegen.cpp @@ -56,7 +56,7 @@ #pragma omp parallel #pragma omp sections private(g, sivar) { - // LAMBDA: define{{.*}} internal{{.*}} void [[OMP_REGION]](i32* noalias %{{.+}}, i32* noalias %{{.+}}) + // LAMBDA: define{{.*}} internal{{.*}} void [[OMP_REGION]](i32* frozen noalias %{{.+}}, i32* frozen noalias %{{.+}}) // LAMBDA: [[G_PRIVATE_ADDR:%.+]] = alloca double, // LAMBDA: [[SIVAR_PRIVATE_ADDR:%.+]] = alloca i{{[0-9]+}}, { @@ -70,11 +70,11 @@ // LAMBDA: store double* [[G_PRIVATE_ADDR]], double** [[G_PRIVATE_ADDR_REF]] // LAMBDA: [[SIVAR_PRIVATE_ADDR_REF:%.+]] = getelementptr inbounds %{{.+}}, %{{.+}}* [[ARG:%.+]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 // LAMBDA: store i{{[0-9]+}}* [[SIVAR_PRIVATE_ADDR]], i{{[0-9]+}}** [[SIVAR_PRIVATE_ADDR_REF]] - // LAMBDA: call{{.*}} void [[INNER_LAMBDA:@.+]](%{{.+}}* [[ARG]]) + // LAMBDA: call{{.*}} void [[INNER_LAMBDA:@.+]](%{{.+}}* frozen [[ARG]]) // LAMBDA: call {{.*}}void @__kmpc_for_static_fini( #pragma omp section [&]() { - // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* [[ARG_PTR:%.+]]) + // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* frozen [[ARG_PTR:%.+]]) // LAMBDA: store %{{.+}}* [[ARG_PTR]], %{{.+}}** [[ARG_PTR_REF:%.+]], g = 2; sivar = 22; @@ -101,7 +101,7 @@ #pragma omp parallel #pragma omp sections private(g, sivar) { - // BLOCKS: define{{.*}} internal{{.*}} void [[OMP_REGION]](i32* noalias %{{.+}}, i32* noalias %{{.+}}) + // BLOCKS: define{{.*}} internal{{.*}} void [[OMP_REGION]](i32* frozen noalias %{{.+}}, i32* frozen noalias %{{.+}}) // BLOCKS: [[G_PRIVATE_ADDR:%.+]] = alloca double, // BLOCKS: [[SIVAR_PRIVATE_ADDR:%.+]] = alloca i{{[0-9]+}}, { @@ -154,15 +154,15 @@ #endif } -// CHECK: define i{{[0-9]+}} @main() +// CHECK: define frozen i{{[0-9]+}} @main() // CHECK: [[TEST:%.+]] = alloca [[S_FLOAT_TY]], -// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR:@.+]]([[S_FLOAT_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR:@.+]]([[S_FLOAT_TY]]* frozen [[TEST]]) // CHECK: call void (%{{.+}}*, i{{[0-9]+}}, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)*, ...) @__kmpc_fork_call(%{{.+}}* @{{.+}}, i{{[0-9]+}} 0, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)* bitcast (void (i{{[0-9]+}}*, i{{[0-9]+}}*)* [[MAIN_MICROTASK:@.+]] to void -// CHECK: = call i{{.+}} [[TMAIN_INT:@.+]]() +// CHECK: = call frozen i{{.+}} [[TMAIN_INT:@.+]]() // CHECK: call void [[S_FLOAT_TY_DESTR:@.+]]([[S_FLOAT_TY]]* // CHECK: ret // -// CHECK: define internal void [[MAIN_MICROTASK]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}) +// CHECK: define internal void [[MAIN_MICROTASK]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}) // CHECK: alloca i{{[0-9]+}}, // CHECK: alloca i{{[0-9]+}}, // CHECK: alloca i{{[0-9]+}}, @@ -181,27 +181,27 @@ // CHECK-NOT: [[SIVAR_PRIV]] // CHECK: {{.+}}: // CHECK: [[S_ARR_PRIV_ITEM:%.+]] = phi [[S_FLOAT_TY]]* -// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR]]([[S_FLOAT_TY]]* [[S_ARR_PRIV_ITEM]]) +// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR]]([[S_FLOAT_TY]]* frozen [[S_ARR_PRIV_ITEM]]) // CHECK-NOT: [[T_VAR_PRIV]] // CHECK-NOT: [[VEC_PRIV]] -// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR]]([[S_FLOAT_TY]]* [[VAR_PRIV]]) +// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR]]([[S_FLOAT_TY]]* frozen [[VAR_PRIV]]) // CHECK: call void @__kmpc_for_static_init_4( // CHECK: call void @__kmpc_for_static_fini( -// CHECK-DAG: call void [[S_FLOAT_TY_DESTR]]([[S_FLOAT_TY]]* [[VAR_PRIV]]) +// CHECK-DAG: call void [[S_FLOAT_TY_DESTR]]([[S_FLOAT_TY]]* frozen [[VAR_PRIV]]) // CHECK-DAG: call void [[S_FLOAT_TY_DESTR]]([[S_FLOAT_TY]]* // CHECK: call void @__kmpc_barrier( // CHECK: ret void // CHECK: define {{.*}} i{{[0-9]+}} [[TMAIN_INT]]() // CHECK: [[TEST:%.+]] = alloca [[S_INT_TY]], -// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR:@.+]]([[S_INT_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR:@.+]]([[S_INT_TY]]* frozen [[TEST]]) // CHECK: call void (%{{.+}}*, i{{[0-9]+}}, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)*, ...) @__kmpc_fork_call(%{{.+}}* @{{.+}}, i{{[0-9]+}} 0, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)* bitcast (void (i{{[0-9]+}}*, i{{[0-9]+}}*)* [[TMAIN_MICROTASK:@.+]] to void // CHECK: call void [[S_INT_TY_DESTR:@.+]]([[S_INT_TY]]* // CHECK: ret // -// CHECK: define internal void [[TMAIN_MICROTASK]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}) +// CHECK: define internal void [[TMAIN_MICROTASK]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}) // CHECK: alloca i32, // CHECK: alloca i32, // CHECK: alloca i32, @@ -218,13 +218,13 @@ // CHECK-NOT: [[VEC_PRIV]] // CHECK: {{.+}}: // CHECK: [[S_ARR_PRIV_ITEM:%.+]] = phi [[S_INT_TY]]* -// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR]]([[S_INT_TY]]* [[S_ARR_PRIV_ITEM]]) +// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR]]([[S_INT_TY]]* frozen [[S_ARR_PRIV_ITEM]]) // CHECK-NOT: [[T_VAR_PRIV]] // CHECK-NOT: [[VEC_PRIV]] -// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR]]([[S_INT_TY]]* [[VAR_PRIV]]) +// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR]]([[S_INT_TY]]* frozen [[VAR_PRIV]]) // CHECK: call void @__kmpc_for_static_init_4( // CHECK: call void @__kmpc_for_static_fini( -// CHECK-DAG: call void [[S_INT_TY_DESTR]]([[S_INT_TY]]* [[VAR_PRIV]]) +// CHECK-DAG: call void [[S_INT_TY_DESTR]]([[S_INT_TY]]* frozen [[VAR_PRIV]]) // CHECK-DAG: call void [[S_INT_TY_DESTR]]([[S_INT_TY]]* // CHECK: ret void #endif diff --git a/clang/test/OpenMP/sections_reduction_codegen.cpp b/clang/test/OpenMP/sections_reduction_codegen.cpp --- a/clang/test/OpenMP/sections_reduction_codegen.cpp +++ b/clang/test/OpenMP/sections_reduction_codegen.cpp @@ -61,7 +61,7 @@ #pragma omp parallel #pragma omp sections reduction(+:g) { - // LAMBDA: define{{.*}} internal{{.*}} void [[OMP_REGION]](i32* noalias %{{.+}}, i32* noalias %{{.+}}) + // LAMBDA: define{{.*}} internal{{.*}} void [[OMP_REGION]](i32* frozen noalias %{{.+}}, i32* frozen noalias %{{.+}}) // LAMBDA: [[G_PRIVATE_ADDR:%.+]] = alloca double, // Reduction list for runtime. @@ -73,7 +73,7 @@ // LAMBDA: store double 1.0{{.+}}, double* [[G_PRIVATE_ADDR]], // LAMBDA: [[G_PRIVATE_ADDR_REF:%.+]] = getelementptr inbounds %{{.+}}, %{{.+}}* [[ARG:%.+]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 // LAMBDA: store double* [[G_PRIVATE_ADDR]], double** [[G_PRIVATE_ADDR_REF]] - // LAMBDA: call void [[INNER_LAMBDA:@.+]](%{{.+}}* [[ARG]]) + // LAMBDA: call void [[INNER_LAMBDA:@.+]](%{{.+}}* frozen [[ARG]]) // LAMBDA: call void @__kmpc_for_static_fini( // LAMBDA: [[G_PRIV_REF:%.+]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[RED_LIST]], i64 0, i64 0 @@ -100,7 +100,7 @@ // LAMBDA: ret void #pragma omp section [&]() { - // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* [[ARG_PTR:%.+]]) + // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* frozen [[ARG_PTR:%.+]]) // LAMBDA: store %{{.+}}* [[ARG_PTR]], %{{.+}}** [[ARG_PTR_REF:%.+]], g = 2; // LAMBDA: [[ARG_PTR:%.+]] = load %{{.+}}*, %{{.+}}** [[ARG_PTR_REF]] @@ -121,7 +121,7 @@ #pragma omp parallel #pragma omp sections reduction(-:g) { - // BLOCKS: define{{.*}} internal{{.*}} void [[OMP_REGION]](i32* noalias %{{.+}}, i32* noalias %{{.+}}) + // BLOCKS: define{{.*}} internal{{.*}} void [[OMP_REGION]](i32* frozen noalias %{{.+}}, i32* frozen noalias %{{.+}}) // BLOCKS: [[G_PRIVATE_ADDR:%.+]] = alloca double, // Reduction list for runtime. @@ -193,13 +193,13 @@ // CHECK: define {{.*}}i{{[0-9]+}} @main() // CHECK: [[TEST:%.+]] = alloca [[S_FLOAT_TY]], -// CHECK: call {{.*}} [[S_FLOAT_TY_CONSTR:@.+]]([[S_FLOAT_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_FLOAT_TY_CONSTR:@.+]]([[S_FLOAT_TY]]* frozen [[TEST]]) // CHECK: call void (%{{.+}}*, i{{[0-9]+}}, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)*, ...) @__kmpc_fork_call(%{{.+}}* @{{.+}}, i{{[0-9]+}} 6, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)* bitcast (void (i{{[0-9]+}}*, i{{[0-9]+}}*, float*, [[S_FLOAT_TY]]*, [[S_FLOAT_TY]]*, float*, [2 x i32]*, [2 x [[S_FLOAT_TY]]]*)* [[MAIN_MICROTASK:@.+]] to void // CHECK: = call {{.*}}i{{.+}} [[TMAIN_INT:@.+]]() // CHECK: call {{.*}} [[S_FLOAT_TY_DESTR:@.+]]([[S_FLOAT_TY]]* // CHECK: ret // -// CHECK: define internal void [[MAIN_MICROTASK]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}, +// CHECK: define internal void [[MAIN_MICROTASK]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}} // CHECK: alloca float, // CHECK: alloca [[S_FLOAT_TY]], // CHECK: alloca [[S_FLOAT_TY]], @@ -210,7 +210,7 @@ // CHECK: [[GTID_REF:%.+]] = load i{{[0-9]+}}*, i{{[0-9]+}}** [[GTID_ADDR_ADDR]] // CHECK: [[GTID:%.+]] = load i{{[0-9]+}}, i{{[0-9]+}}* [[GTID_REF]] -// CHECK-NOT: call {{.*}} [[S_FLOAT_TY_DESTR]]([[S_FLOAT_TY]]* [[VAR_PRIV]]) +// CHECK-NOT: call {{.*}} [[S_FLOAT_TY_DESTR]]([[S_FLOAT_TY]]* frozen [[VAR_PRIV]]) // CHECK-NOT: call {{.*}} [[S_FLOAT_TY_DESTR]]([[S_FLOAT_TY]]* // CHECK: call void @__kmpc_for_static_init_4( @@ -222,12 +222,12 @@ // CHECK: define {{.*}} i{{[0-9]+}} [[TMAIN_INT]]() // CHECK: [[TEST:%.+]] = alloca [[S_INT_TY]], -// CHECK: call {{.*}} [[S_INT_TY_CONSTR:@.+]]([[S_INT_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_INT_TY_CONSTR:@.+]]([[S_INT_TY]]* frozen [[TEST]]) // CHECK: call void (%{{.+}}*, i{{[0-9]+}}, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)*, ...) @__kmpc_fork_call(%{{.+}}* @{{.+}}, i{{[0-9]+}} 6, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)* bitcast (void (i{{[0-9]+}}*, i{{[0-9]+}}*, i32*, [[S_INT_TY]]*, [[S_INT_TY]]*, i32*, [2 x i32]*, [2 x [[S_INT_TY]]]*)* [[TMAIN_MICROTASK:@.+]] to void // CHECK: call {{.*}} [[S_INT_TY_DESTR:@.+]]([[S_INT_TY]]* // CHECK: ret // -// CHECK: define internal void [[TMAIN_MICROTASK]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}, +// CHECK: define internal void [[TMAIN_MICROTASK]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}} // CHECK: alloca i{{[0-9]+}}, // CHECK: alloca i{{[0-9]+}}, // CHECK: alloca i{{[0-9]+}}, @@ -252,10 +252,10 @@ // CHECK: store i{{[0-9]+}} 0, i{{[0-9]+}}* [[T_VAR_PRIV]], // For & reduction operation initial value of private variable is ones in all bits. -// CHECK: call {{.*}} [[S_INT_TY_CONSTR:@.+]]([[S_INT_TY]]* [[VAR_PRIV]]) +// CHECK: call {{.*}} [[S_INT_TY_CONSTR:@.+]]([[S_INT_TY]]* frozen [[VAR_PRIV]]) // For && reduction operation initial value of private variable is 1.0. -// CHECK: call {{.*}} [[S_INT_TY_CONSTR:@.+]]([[S_INT_TY]]* [[VAR1_PRIV]]) +// CHECK: call {{.*}} [[S_INT_TY_CONSTR:@.+]]([[S_INT_TY]]* frozen [[VAR1_PRIV]]) // For min reduction operation initial value of private variable is largest repesentable value. // CHECK: store i{{[0-9]+}} 2147483647, i{{[0-9]+}}* [[T_VAR1_PRIV]], @@ -300,23 +300,23 @@ // CHECK: store i{{[0-9]+}} [[UP]], i{{[0-9]+}}* [[T_VAR_REF]], // var = var.operator &(var_reduction); -// CHECK: [[UP:%.+]] = call nonnull align 4 dereferenceable(4) [[S_INT_TY]]* @{{.+}}([[S_INT_TY]]* [[VAR_REF]], [[S_INT_TY]]* nonnull align 4 dereferenceable(4) [[VAR_PRIV]]) +// CHECK: [[UP:%.+]] = call frozen nonnull align 4 dereferenceable(4) [[S_INT_TY]]* @{{.+}}([[S_INT_TY]]* frozen [[VAR_REF]], [[S_INT_TY]]* frozen nonnull align 4 dereferenceable(4) [[VAR_PRIV]]) // CHECK: [[BC1:%.+]] = bitcast [[S_INT_TY]]* [[VAR_REF]] to i8* // CHECK: [[BC2:%.+]] = bitcast [[S_INT_TY]]* [[UP]] to i8* // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[BC1]], i8* align 4 [[BC2]], i64 4, i1 false) // var1 = var1.operator &&(var1_reduction); -// CHECK: [[TO_INT:%.+]] = call i{{[0-9]+}} @{{.+}}([[S_INT_TY]]* [[VAR1_REF]]) +// CHECK: [[TO_INT:%.+]] = call frozen i{{[0-9]+}} @{{.+}}([[S_INT_TY]]* frozen [[VAR1_REF]]) // CHECK: [[VAR1_BOOL:%.+]] = icmp ne i{{[0-9]+}} [[TO_INT]], 0 // CHECK: br i1 [[VAR1_BOOL]], label %[[TRUE:.+]], label %[[END2:.+]] // CHECK: [[TRUE]] -// CHECK: [[TO_INT:%.+]] = call i{{[0-9]+}} @{{.+}}([[S_INT_TY]]* [[VAR1_PRIV]]) +// CHECK: [[TO_INT:%.+]] = call frozen i{{[0-9]+}} @{{.+}}([[S_INT_TY]]* frozen [[VAR1_PRIV]]) // CHECK: [[VAR1_REDUCTION_BOOL:%.+]] = icmp ne i{{[0-9]+}} [[TO_INT]], 0 // CHECK: br label %[[END2]] // CHECK: [[END2]] // CHECK: [[COND_LVALUE:%.+]] = phi i1 [ false, %{{.+}} ], [ [[VAR1_REDUCTION_BOOL]], %[[TRUE]] ] // CHECK: [[CONV:%.+]] = zext i1 [[COND_LVALUE]] to i32 -// CHECK: call void @{{.+}}([[S_INT_TY]]* [[COND_LVALUE:%.+]], i32 [[CONV]]) +// CHECK: call void @{{.+}}([[S_INT_TY]]* frozen [[COND_LVALUE:%.+]], i32 frozen [[CONV]]) // CHECK: [[BC1:%.+]] = bitcast [[S_INT_TY]]* [[VAR1_REF]] to i8* // CHECK: [[BC2:%.+]] = bitcast [[S_INT_TY]]* [[COND_LVALUE]] to i8* // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[BC1]], i8* align 4 [[BC2]], i64 4, i1 false) @@ -342,7 +342,7 @@ // var = var.operator &(var_reduction); // CHECK: call void @__kmpc_critical( -// CHECK: [[UP:%.+]] = call nonnull align 4 dereferenceable(4) [[S_INT_TY]]* @{{.+}}([[S_INT_TY]]* [[VAR_REF]], [[S_INT_TY]]* nonnull align 4 dereferenceable(4) [[VAR_PRIV]]) +// CHECK: [[UP:%.+]] = call frozen nonnull align 4 dereferenceable(4) [[S_INT_TY]]* @{{.+}}([[S_INT_TY]]* frozen [[VAR_REF]], [[S_INT_TY]]* frozen nonnull align 4 dereferenceable(4) [[VAR_PRIV]]) // CHECK: [[BC1:%.+]] = bitcast [[S_INT_TY]]* [[VAR_REF]] to i8* // CHECK: [[BC2:%.+]] = bitcast [[S_INT_TY]]* [[UP]] to i8* // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[BC1]], i8* align 4 [[BC2]], i64 4, i1 false) @@ -350,17 +350,17 @@ // var1 = var1.operator &&(var1_reduction); // CHECK: call void @__kmpc_critical( -// CHECK: [[TO_INT:%.+]] = call i{{[0-9]+}} @{{.+}}([[S_INT_TY]]* [[VAR1_REF]]) +// CHECK: [[TO_INT:%.+]] = call frozen i{{[0-9]+}} @{{.+}}([[S_INT_TY]]* frozen [[VAR1_REF]]) // CHECK: [[VAR1_BOOL:%.+]] = icmp ne i{{[0-9]+}} [[TO_INT]], 0 // CHECK: br i1 [[VAR1_BOOL]], label %[[TRUE:.+]], label %[[END2:.+]] // CHECK: [[TRUE]] -// CHECK: [[TO_INT:%.+]] = call i{{[0-9]+}} @{{.+}}([[S_INT_TY]]* [[VAR1_PRIV]]) +// CHECK: [[TO_INT:%.+]] = call frozen i{{[0-9]+}} @{{.+}}([[S_INT_TY]]* frozen [[VAR1_PRIV]]) // CHECK: [[VAR1_REDUCTION_BOOL:%.+]] = icmp ne i{{[0-9]+}} [[TO_INT]], 0 // CHECK: br label %[[END2]] // CHECK: [[END2]] // CHECK: [[COND_LVALUE:%.+]] = phi i1 [ false, %{{.+}} ], [ [[VAR1_REDUCTION_BOOL]], %[[TRUE]] ] // CHECK: [[CONV:%.+]] = zext i1 [[COND_LVALUE]] to i32 -// CHECK: call void @{{.+}}([[S_INT_TY]]* [[COND_LVALUE:%.+]], i32 [[CONV]]) +// CHECK: call void @{{.+}}([[S_INT_TY]]* frozen [[COND_LVALUE:%.+]], i32 frozen [[CONV]]) // CHECK: [[BC1:%.+]] = bitcast [[S_INT_TY]]* [[VAR1_REF]] to i8* // CHECK: [[BC2:%.+]] = bitcast [[S_INT_TY]]* [[COND_LVALUE]] to i8* // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[BC1]], i8* align 4 [[BC2]], i64 4, i1 false) @@ -373,7 +373,7 @@ // break; // CHECK: br label %[[RED_DONE]] // CHECK: [[RED_DONE]] -// CHECK-DAG: call {{.*}} [[S_INT_TY_DESTR]]([[S_INT_TY]]* [[VAR_PRIV]]) +// CHECK-DAG: call {{.*}} [[S_INT_TY_DESTR]]([[S_INT_TY]]* frozen [[VAR_PRIV]]) // CHECK-DAG: call {{.*}} [[S_INT_TY_DESTR]]([[S_INT_TY]]* // CHECK: ret void @@ -383,7 +383,7 @@ // *(Type-1*)lhs[-1] = ReductionOperation-1(*(Type-1*)lhs[-1], // *(Type-1*)rhs[-1]); // } -// CHECK: define internal void [[REDUCTION_FUNC]](i8* %0, i8* %1) +// CHECK: define internal void [[REDUCTION_FUNC]](i8* frozen %0, i8* frozen %1) // t_var_lhs = (i{{[0-9]+}}*)lhs[0]; // CHECK: [[T_VAR_RHS_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST_RHS:%.+]], i64 0, i64 0 // CHECK: [[T_VAR_RHS_VOID:%.+]] = load i8*, i8** [[T_VAR_RHS_REF]], @@ -427,23 +427,23 @@ // CHECK: store i{{[0-9]+}} [[UP]], i{{[0-9]+}}* [[T_VAR_LHS]], // var_lhs = var_lhs.operator &(var_rhs); -// CHECK: [[UP:%.+]] = call nonnull align 4 dereferenceable(4) [[S_INT_TY]]* @{{.+}}([[S_INT_TY]]* [[VAR_LHS]], [[S_INT_TY]]* nonnull align 4 dereferenceable(4) [[VAR_RHS]]) +// CHECK: [[UP:%.+]] = call frozen nonnull align 4 dereferenceable(4) [[S_INT_TY]]* @{{.+}}([[S_INT_TY]]* frozen [[VAR_LHS]], [[S_INT_TY]]* frozen nonnull align 4 dereferenceable(4) [[VAR_RHS]]) // CHECK: [[BC1:%.+]] = bitcast [[S_INT_TY]]* [[VAR_LHS]] to i8* // CHECK: [[BC2:%.+]] = bitcast [[S_INT_TY]]* [[UP]] to i8* // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[BC1]], i8* align 4 [[BC2]], i64 4, i1 false) // var1_lhs = var1_lhs.operator &&(var1_rhs); -// CHECK: [[TO_INT:%.+]] = call i{{[0-9]+}} @{{.+}}([[S_INT_TY]]* [[VAR1_LHS]]) +// CHECK: [[TO_INT:%.+]] = call frozen i{{[0-9]+}} @{{.+}}([[S_INT_TY]]* frozen [[VAR1_LHS]]) // CHECK: [[VAR1_BOOL:%.+]] = icmp ne i{{[0-9]+}} [[TO_INT]], 0 // CHECK: br i1 [[VAR1_BOOL]], label %[[TRUE:.+]], label %[[END2:.+]] // CHECK: [[TRUE]] -// CHECK: [[TO_INT:%.+]] = call i{{[0-9]+}} @{{.+}}([[S_INT_TY]]* [[VAR1_RHS]]) +// CHECK: [[TO_INT:%.+]] = call frozen i{{[0-9]+}} @{{.+}}([[S_INT_TY]]* frozen [[VAR1_RHS]]) // CHECK: [[VAR1_REDUCTION_BOOL:%.+]] = icmp ne i{{[0-9]+}} [[TO_INT]], 0 // CHECK: br label %[[END2]] // CHECK: [[END2]] // CHECK: [[COND_LVALUE:%.+]] = phi i1 [ false, %{{.+}} ], [ [[VAR1_REDUCTION_BOOL]], %[[TRUE]] ] // CHECK: [[CONV:%.+]] = zext i1 [[COND_LVALUE]] to i32 -// CHECK: call void @{{.+}}([[S_INT_TY]]* [[COND_LVALUE:%.+]], i32 [[CONV]]) +// CHECK: call void @{{.+}}([[S_INT_TY]]* frozen [[COND_LVALUE:%.+]], i32 frozen [[CONV]]) // CHECK: [[BC1:%.+]] = bitcast [[S_INT_TY]]* [[VAR1_LHS]] to i8* // CHECK: [[BC2:%.+]] = bitcast [[S_INT_TY]]* [[COND_LVALUE]] to i8* // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[BC1]], i8* align 4 [[BC2]], i64 4, i1 false) diff --git a/clang/test/OpenMP/sections_reduction_task_codegen.cpp b/clang/test/OpenMP/sections_reduction_task_codegen.cpp --- a/clang/test/OpenMP/sections_reduction_task_codegen.cpp +++ b/clang/test/OpenMP/sections_reduction_task_codegen.cpp @@ -22,7 +22,7 @@ // CHECK: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @{{.+}}, i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i8***)* [[OUTLINED:@.+]] to void (i32*, i32*, ...)*), i32* %{{.+}}, i8*** %{{.+}}) -// CHECK: define internal void [[OUTLINED]](i32* noalias %{{.+}}, i32* noalias %{{.+}}, i32* {{.+}}, i8*** {{.+}}) +// CHECK: define internal void [[OUTLINED]](i32* frozen noalias %{{.+}}, i32* frozen noalias %{{.+}}, i32* {{.+}}, i8*** {{.+}}) // CHECK: alloca i32, // CHECK: alloca i32, // CHECK: alloca i32, @@ -99,26 +99,26 @@ // CHECK: call void @__kmpc_task_reduction_modifier_fini(%struct.ident_t* @{{.+}}, i32 %{{.+}}, i32 1) // CHECK: call i32 @__kmpc_reduce( -// CHECK: define internal void [[ARGC_INIT]](i8* noalias %{{.+}}, i8* noalias %{{.+}}) +// CHECK: define internal void [[ARGC_INIT]](i8* frozen noalias %{{.+}}, i8* frozen noalias %{{.+}}) // CHECK: store i32 0, i32* %{{.+}}, -// CHECK: define internal void [[ARGC_COMB]](i8* %{{.+}}, i8* %{{.+}}) +// CHECK: define internal void [[ARGC_COMB]](i8* frozen %{{.+}}, i8* frozen %{{.+}}) // CHECK: [[ADD:%.+]] = add nsw i32 %{{.+}}, %{{.+}} // CHECK: store i32 [[ADD]], i32* %{{.+}}, -// CHECK: define internal void [[ARGV_INIT]](i8* noalias %{{.+}}, i8* noalias %{{.+}}) +// CHECK: define internal void [[ARGV_INIT]](i8* frozen noalias %{{.+}}, i8* frozen noalias %{{.+}}) // CHECK: phi i8* // CHECK: store i8 0, i8* [[EL:%.+]], // CHECK: getelementptr i8, i8* [[EL]], i32 1 -// CHECK: define internal void [[ARGV_COMB]](i8* %{{.+}}, i8* %{{.+}}) +// CHECK: define internal void [[ARGV_COMB]](i8* frozen %{{.+}}, i8* frozen %{{.+}}) // CHECK: phi i8* // CHECK: [[ADD:%.+]] = add nsw i32 %{{.+}}, %{{.+}} // CHECK: [[CONV:%.+]] = trunc i32 [[ADD]] to i8 // CHECK: store i8 [[CONV]], i8* [[EL:%.+]], // CHECK: getelementptr i8, i8* [[EL]], i32 1 -// CHECK: define internal {{.*}}i32 [[TASK]](i32 {{.+}}, [[TASK_TY]]* {{.+}}) +// CHECK: define internal {{.*}}frozen i32 [[TASK]](i32 {{.+}}, [[TASK_TY]]* {{.+}}) // CHECK-DAG: call i8* @__kmpc_task_reduction_get_th_data(i32 %{{.+}}, i8* [[TG:%.+]], i8* [[ARGC_REF:%.+]]) // CHECK_DAG: [[TG]] = load i8*, i8** [[TG_ADDR:%.+]], // CHECK-DAG: [[ARGC_REF]] = bitcast i32* [[ARGC_ADDR:%.+]] to i8* diff --git a/clang/test/OpenMP/simd_codegen.cpp b/clang/test/OpenMP/simd_codegen.cpp --- a/clang/test/OpenMP/simd_codegen.cpp +++ b/clang/test/OpenMP/simd_codegen.cpp @@ -805,7 +805,7 @@ #pragma omp parallel #pragma omp simd // TERM_DEBUG-NOT: __kmpc_global_thread_num - // TERM_DEBUG: invoke i32 {{.*}}bar{{.*}}() + // TERM_DEBUG: invoke frozen i32 {{.*}}bar{{.*}}() // TERM_DEBUG: unwind label %[[TERM_LPAD:[^,]+]], // TERM_DEBUG-NOT: __kmpc_global_thread_num // TERM_DEBUG: [[TERM_LPAD]] diff --git a/clang/test/OpenMP/simd_loop_messages.cpp b/clang/test/OpenMP/simd_loop_messages.cpp --- a/clang/test/OpenMP/simd_loop_messages.cpp +++ b/clang/test/OpenMP/simd_loop_messages.cpp @@ -152,7 +152,7 @@ for (ii = 0; ii < 10; ++ ++ ii) c[ii] = a[ii]; - // Ok but undefined behavior (in general, cannot check that incr + // Ok but undefined behavior (in frozen general, cannot check incr that // is really loop-invariant). #pragma omp simd for (ii = 0; ii < 10; ii = ii + ii) diff --git a/clang/test/OpenMP/single_codegen.cpp b/clang/test/OpenMP/single_codegen.cpp --- a/clang/test/OpenMP/single_codegen.cpp +++ b/clang/test/OpenMP/single_codegen.cpp @@ -149,7 +149,7 @@ return a; } -// CHECK: void [[COPY_FUNC]](i8* %0, i8* %1) +// CHECK: void [[COPY_FUNC]](i8* frozen %0, i8* frozen %1) // CHECK: store i8* %0, i8** [[DST_ADDR_REF:%.+]], // CHECK: store i8* %1, i8** [[SRC_ADDR_REF:%.+]], // CHECK: [[DST_ADDR_VOID_PTR:%.+]] = load i8*, i8** [[DST_ADDR_REF]], @@ -168,14 +168,14 @@ // CHECK: [[SRC_C_ADDR_REF:%.+]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[SRC_ADDR]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 // CHECK: [[SRC_C_ADDR_VOID_PTR:%.+]] = load i8*, i8** [[SRC_C_ADDR_REF]], // CHECK: [[SRC_C_ADDR:%.+]] = bitcast i8* [[SRC_C_ADDR_VOID_PTR]] to [[TEST_CLASS_TY]]* -// CHECK: call{{.*}} [[TEST_CLASS_TY_ASSIGN:@.+]]([[TEST_CLASS_TY]]* [[DST_C_ADDR]], [[TEST_CLASS_TY]]* {{.*}}[[SRC_C_ADDR]]) +// CHECK: call{{.*}} [[TEST_CLASS_TY_ASSIGN:@.+]]([[TEST_CLASS_TY]]* frozen [[DST_C_ADDR]], [[TEST_CLASS_TY]]* {{.*}}[[SRC_C_ADDR]]) // CHECK: [[DST_TC_ADDR_REF:%.+]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DST_ADDR]], i{{[0-9]+}} 0, i{{[0-9]+}} 2 // CHECK: [[DST_TC_ADDR_VOID_PTR:%.+]] = load i8*, i8** [[DST_TC_ADDR_REF]], // CHECK: [[DST_TC_ADDR:%.+]] = bitcast i8* [[DST_TC_ADDR_VOID_PTR]] to [[TEST_CLASS_TY]]* // CHECK: [[SRC_TC_ADDR_REF:%.+]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[SRC_ADDR]], i{{[0-9]+}} 0, i{{[0-9]+}} 2 // CHECK: [[SRC_TC_ADDR_VOID_PTR:%.+]] = load i8*, i8** [[SRC_TC_ADDR_REF]], // CHECK: [[SRC_TC_ADDR:%.+]] = bitcast i8* [[SRC_TC_ADDR_VOID_PTR]] to [[TEST_CLASS_TY]]* -// CHECK: call{{.*}} [[TEST_CLASS_TY_ASSIGN]]([[TEST_CLASS_TY]]* [[DST_TC_ADDR]], [[TEST_CLASS_TY]]* {{.*}}[[SRC_TC_ADDR]]) +// CHECK: call{{.*}} [[TEST_CLASS_TY_ASSIGN]]([[TEST_CLASS_TY]]* frozen [[DST_TC_ADDR]], [[TEST_CLASS_TY]]* {{.*}}[[SRC_TC_ADDR]]) // CHECK: [[DST_A2_ADDR_REF:%.+]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DST_ADDR]], i{{[0-9]+}} 0, i{{[0-9]+}} 3 // CHECK: [[DST_A2_ADDR:%.+]] = load i8*, i8** [[DST_A2_ADDR_REF]], // CHECK: [[SRC_A2_ADDR_REF:%.+]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[SRC_ADDR]], i{{[0-9]+}} 0, i{{[0-9]+}} 3 @@ -188,7 +188,7 @@ // CHECK: [[SRC_TC2_ADDR_VOID_PTR:%.+]] = load i8*, i8** [[SRC_TC2_ADDR_REF]], // CHECK: [[SRC_TC2_ADDR:%.+]] = bitcast i8* [[SRC_TC2_ADDR_VOID_PTR]] to [[TEST_CLASS_TY]]* // CHECK: br i1 -// CHECK: call{{.*}} [[TEST_CLASS_TY_ASSIGN]]([[TEST_CLASS_TY]]* %{{.+}}, [[TEST_CLASS_TY]]* {{.*}}) +// CHECK: call{{.*}} [[TEST_CLASS_TY_ASSIGN]]([[TEST_CLASS_TY]]* frozen %{{.+}}, [[TEST_CLASS_TY]]* {{.*}}) // CHECK: br i1 // CHECK: ret void @@ -234,7 +234,7 @@ // CHECK: call void ([[IDENT_T_TY]]*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call([[IDENT_T_TY]]* @{{.+}}, i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [[SS_TY]]*, i64, i64, i64)* [[SS_MICROTASK:@.+]] to void // CHECK-NEXT: ret void -// CHECK: define internal void [[SS_MICROTASK]](i32* {{[^,]+}}, i32* {{[^,]+}}, [[SS_TY]]* {{.+}}, i64 {{.+}}, i64 {{.+}}, i64 {{.+}}) +// CHECK: define internal void [[SS_MICROTASK]](i32* frozen {{[^,]+}}, i32* frozen {{[^,]+}}, [[SS_TY]]* {{.+}}, i64 {{.+}}, i64 {{.+}}, i64 {{.+}}) // Private a // CHECK: alloca i64, // Private b @@ -264,7 +264,7 @@ // CHECK-NEXT: load i32*, i32** % // CHECK-NEXT: store i32* % // CHECK-LABEL: invoke void @_ZZN2SSC1ERiENKUlvE_clEv( -// CHECK-SAME: [[CAP_TY]]* [[CAP]]) +// CHECK-SAME: [[CAP_TY]]* frozen [[CAP]]) // CHECK: call void @__kmpc_end_single([[IDENT_T_TY]]* @{{.+}}, i32 %{{.+}}) // CHECK: store i32 1, i32* [[DID_IT]], @@ -326,10 +326,10 @@ // CHECK-NEXT: call void ([[IDENT_T_TY]]*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call([[IDENT_T_TY]]* @{{.+}}, i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [[SS_TY]]*, i64, i64, i64)* [[SS_MICROTASK1:@.+]] to void // CHECK-NEXT: ret void -// CHECK: define internal void [[COPY_FUNC]](i8* %0, i8* %1) +// CHECK: define internal void [[COPY_FUNC]](i8* frozen %0, i8* frozen %1) // CHECK: ret void -// CHECK: define internal void [[SS_MICROTASK1]](i32* {{[^,]+}}, i32* {{[^,]+}}, [[SS_TY]]* {{.+}}, i64 {{.+}}, i64 {{.+}}, i64 {{.+}}) +// CHECK: define internal void [[SS_MICROTASK1]](i32* frozen {{[^,]+}}, i32* frozen {{[^,]+}}, [[SS_TY]]* {{.+}}, i64 {{.+}}, i64 {{.+}}, i64 {{.+}}) // Private a // CHECK: alloca i64, // Private b @@ -382,7 +382,7 @@ // CHECK-NEXT: call void @__kmpc_copyprivate([[IDENT_T_TY]]* @{{.+}}, i32 %{{.+}}, i64 24, i8* %{{.+}}, void (i8*, i8*)* [[COPY_FUNC:@[^,]+]], i32 %{{.+}}) // CHECK-NEXT: ret void -// CHECK: define internal void [[COPY_FUNC]](i8* %0, i8* %1) +// CHECK: define internal void [[COPY_FUNC]](i8* frozen %0, i8* frozen %1) // CHECK: ret void // CHECK-LABEL: @_ZN3SSTIdEC2Ev @@ -398,7 +398,7 @@ // CHECK-NEXT: call void ([[IDENT_T_TY]]*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call([[IDENT_T_TY]]* @{{.+}}, i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [[SST_TY]]*, i64)* [[SST_MICROTASK:@.+]] to void // CHECK-NEXT: ret void -// CHECK: define internal void [[SST_MICROTASK]](i32* {{[^,]+}}, i32* {{[^,]+}}, [[SST_TY]]* {{.+}}, i64 {{.+}}) +// CHECK: define internal void [[SST_MICROTASK]](i32* frozen {{[^,]+}}, i32* frozen {{[^,]+}}, [[SST_TY]]* {{.+}}, i64 {{.+}}) // CHECK: [[RES:%.+]] = call i32 @__kmpc_single([[IDENT_T_TY]]* @{{.+}}, i32 %{{.+}}) // CHECK-NEXT: icmp ne i32 [[RES]], 0 // CHECK-NEXT: br i1 @@ -432,7 +432,7 @@ // CHECK-LABEL: call void @_ZZZN3SSTIdEC1EvENKUlvE_clEvENKUlvE_clEv( // CHECK-NEXT: ret void -// CHECK: define internal void [[COPY_FUNC]](i8* %0, i8* %1) +// CHECK: define internal void [[COPY_FUNC]](i8* frozen %0, i8* frozen %1) // CHECK: ret void // CHECK-LABEL: @_ZZZN3SSTIdEC1EvENKUlvE_clEvENKUlvE_clEv( diff --git a/clang/test/OpenMP/single_firstprivate_codegen.cpp b/clang/test/OpenMP/single_firstprivate_codegen.cpp --- a/clang/test/OpenMP/single_firstprivate_codegen.cpp +++ b/clang/test/OpenMP/single_firstprivate_codegen.cpp @@ -65,7 +65,7 @@ S var(3); // CHECK-DAG: [[SINGLE_BARRIER_LOC:@.+]] = private unnamed_addr global %{{.+}} { i32 0, i32 322, i32 0, i32 0, i8* -// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR:@.+]]([[S_FLOAT_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR:@.+]]([[S_FLOAT_TY]]* frozen [[TEST]]) // CHECK: ([[S_FLOAT_TY]]*)* [[S_FLOAT_TY_DESTR:@[^ ]+]] {{[^,]+}}, {{.+}}([[S_FLOAT_TY]]* [[TEST]] int main() { static int sivar; @@ -79,7 +79,7 @@ #pragma omp parallel #pragma omp single firstprivate(g, sivar) { - // LAMBDA: define{{.*}} internal{{.*}} void [[OMP_REGION]](i32* noalias %{{.+}}, i32* noalias %{{.+}}, i32* nonnull align 4 dereferenceable(4) [[ARG:%.+]]) + // LAMBDA: define{{.*}} internal{{.*}} void [[OMP_REGION]](i32* frozen noalias %{{.+}}, i32* frozen noalias %{{.+}}, i32* frozen nonnull align 4 dereferenceable(4) [[ARG:%.+]]) // LAMBDA: [[G_PRIVATE_ADDR:%.+]] = alloca i{{[0-9]+}}, // LAMBDA: [[SIVAR_PRIVATE_ADDR:%.+]] = alloca i{{[0-9]+}}, // LAMBDA: %{{.+}} = alloca [[CAP_MAIN_TY:%.+]], @@ -96,11 +96,11 @@ // LAMBDA: store i{{[0-9]+}}* [[G_PRIVATE_ADDR]], i{{[0-9]+}}** [[G_PRIVATE_ADDR_REF]] // LAMBDA: [[SIVAR_PRIVATE_ADDR_REF:%.+]] = getelementptr inbounds %{{.+}}, %{{.+}}* [[ARG:%.+]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 // LAMBDA: store i{{[0-9]+}}* [[SIVAR_PRIVATE_ADDR]], i{{[0-9]+}}** [[SIVAR_PRIVATE_ADDR_REF]] - // LAMBDA: call void [[INNER_LAMBDA:@.+]](%{{.+}}* [[ARG]]) + // LAMBDA: call void [[INNER_LAMBDA:@.+]](%{{.+}}* frozen [[ARG]]) // LAMBDA: call void @__kmpc_end_single( // LAMBDA: call void @__kmpc_barrier( [&]() { - // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* [[ARG_PTR:%.+]]) + // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* frozen [[ARG_PTR:%.+]]) // LAMBDA: store %{{.+}}* [[ARG_PTR]], %{{.+}}** [[ARG_PTR_REF:%.+]], g = 2; sivar = 31; @@ -125,7 +125,7 @@ #pragma omp parallel #pragma omp single firstprivate(g, sivar) { - // BLOCKS: define{{.*}} internal{{.*}} void [[OMP_REGION]](i32* noalias %{{.+}}, i32* noalias %{{.+}}, i32* nonnull align 4 dereferenceable(4) [[SIVAR_REF:%.+]]) + // BLOCKS: define{{.*}} internal{{.*}} void [[OMP_REGION]](i32* frozen noalias %{{.+}}, i32* frozen noalias %{{.+}}, i32* frozen nonnull align 4 dereferenceable(4) [[SIVAR_REF:%.+]]) // BLOCKS: [[G_PRIVATE_ADDR:%.+]] = alloca i{{[0-9]+}}, // BLOCKS: [[SIVAR1_PRIVATE_ADDR:%.+]] = alloca i{{[0-9]+}}, // BLOCKS: store i{{[0-9]+}}* [[SIVAR_REF]], i{{[0-9]+}}** %{{.+}}, @@ -201,22 +201,22 @@ // CHECK: br i1 [[IS_EMPTY]], label %[[S_ARR_BODY_DONE:.+]], label %[[S_ARR_BODY:.+]] // CHECK: [[S_ARR_BODY]] // CHECK: getelementptr inbounds ([2 x [[S_FLOAT_TY]]], [2 x [[S_FLOAT_TY]]]* [[S_ARR]], i{{[0-9]+}} 0, i{{[0-9]+}} 0) -// CHECK: call {{.*}} [[ST_TY_DEFAULT_CONSTR:@.+]]([[ST_TY]]* [[ST_TY_TEMP:%.+]]) -// CHECK: call {{.*}} [[S_FLOAT_TY_COPY_CONSTR:@.+]]([[S_FLOAT_TY]]* {{.+}}, [[S_FLOAT_TY]]* {{.+}}, [[ST_TY]]* [[ST_TY_TEMP]]) -// CHECK: call {{.*}} [[ST_TY_DESTR:@.+]]([[ST_TY]]* [[ST_TY_TEMP]]) +// CHECK: call {{.*}} [[ST_TY_DEFAULT_CONSTR:@.+]]([[ST_TY]]* frozen [[ST_TY_TEMP:%.+]]) +// CHECK: call {{.*}} [[S_FLOAT_TY_COPY_CONSTR:@.+]]([[S_FLOAT_TY]]* {{.+}}, [[S_FLOAT_TY]]* {{.+}}, [[ST_TY]]* frozen [[ST_TY_TEMP]]) +// CHECK: call {{.*}} [[ST_TY_DESTR:@.+]]([[ST_TY]]* frozen [[ST_TY_TEMP]]) // CHECK: br i1 {{.+}}, label %{{.+}}, label %[[S_ARR_BODY]] // firstprivate var(var) -// CHECK: call {{.*}} [[ST_TY_DEFAULT_CONSTR]]([[ST_TY]]* [[ST_TY_TEMP:%.+]]) -// CHECK: call {{.*}} [[S_FLOAT_TY_COPY_CONSTR]]([[S_FLOAT_TY]]* [[VAR_PRIV]], [[S_FLOAT_TY]]* {{.*}} [[VAR]], [[ST_TY]]* [[ST_TY_TEMP]]) -// CHECK: call {{.*}} [[ST_TY_DESTR]]([[ST_TY]]* [[ST_TY_TEMP]]) +// CHECK: call {{.*}} [[ST_TY_DEFAULT_CONSTR]]([[ST_TY]]* frozen [[ST_TY_TEMP:%.+]]) +// CHECK: call {{.*}} [[S_FLOAT_TY_COPY_CONSTR]]([[S_FLOAT_TY]]* frozen [[VAR_PRIV]], [[S_FLOAT_TY]]* {{.*}} [[VAR]], [[ST_TY]]* frozen [[ST_TY_TEMP]]) +// CHECK: call {{.*}} [[ST_TY_DESTR]]([[ST_TY]]* frozen [[ST_TY_TEMP]]) // firstprivate isvar // CHEC: [[SIVAR_VAL:%.+]] = load i{{[0-9]+}}, i{{[0-9]+}}* [[SIVAR]], // CHEC: store i{{[0-9]+}} [[SIVAR_VAL]], i{{[0-9]+}}* [[SIVAR_PRIV]], // ~(firstprivate var), ~(firstprivate s_arr) -// CHECK-DAG: call {{.*}} [[S_FLOAT_TY_DESTR]]([[S_FLOAT_TY]]* [[VAR_PRIV]]) +// CHECK-DAG: call {{.*}} [[S_FLOAT_TY_DESTR]]([[S_FLOAT_TY]]* frozen [[VAR_PRIV]]) // CHECK-DAG: call {{.*}} [[S_FLOAT_TY_DESTR]]([[S_FLOAT_TY]]* // CHECK: call void @__kmpc_end_single( @@ -228,12 +228,12 @@ // CHECK: define {{.*}} i{{[0-9]+}} [[TMAIN_INT]]() // CHECK: [[TEST:%.+]] = alloca [[S_INT_TY]], -// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR:@.+]]([[S_INT_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR:@.+]]([[S_INT_TY]]* frozen [[TEST]]) // CHECK: call void (%{{.+}}*, i{{[0-9]+}}, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)*, ...) @__kmpc_fork_call(%{{.+}}* @{{.+}}, i{{[0-9]+}} 4, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)* bitcast (void (i{{[0-9]+}}*, i{{[0-9]+}}*, i32*, [2 x i32]*, [2 x [[S_INT_TY]]]*, [[S_INT_TY]]*)* [[TMAIN_MICROTASK:@.+]] to void // CHECK: call {{.*}} [[S_INT_TY_DESTR:@.+]]([[S_INT_TY]]* // CHECK: ret // -// CHECK: define internal void [[TMAIN_MICROTASK]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}, i32* nonnull align 4 dereferenceable(4) %{{.+}}, [2 x i32]* nonnull align 4 dereferenceable(8) %{{.+}}, [2 x [[S_INT_TY]]]* nonnull align 4 dereferenceable(8) %{{.+}}, [[S_INT_TY]]* nonnull align 4 dereferenceable(4) %{{.+}}) +// CHECK: define internal void [[TMAIN_MICROTASK]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}, i32* frozen nonnull align 4 dereferenceable(4) %{{.+}}, [2 x i32]* frozen nonnull align 4 dereferenceable(8) %{{.+}}, [2 x [[S_INT_TY]]]* frozen nonnull align 4 dereferenceable(8) %{{.+}}, [[S_INT_TY]]* frozen nonnull align 4 dereferenceable(4) %{{.+}}) // CHECK: [[T_VAR_PRIV:%.+]] = alloca i{{[0-9]+}}, // CHECK: [[VEC_PRIV:%.+]] = alloca [2 x i{{[0-9]+}}], // CHECK: [[S_ARR_PRIV:%.+]] = alloca [2 x [[S_INT_TY]]], @@ -264,18 +264,18 @@ // CHECK: [[IS_EMPTY:%.+]] = icmp eq [[S_INT_TY]]* [[S_ARR_PRIV_BEGIN]], [[S_ARR_PRIV_END]] // CHECK: br i1 [[IS_EMPTY]], label %[[S_ARR_BODY_DONE:.+]], label %[[S_ARR_BODY:.+]] // CHECK: [[S_ARR_BODY]] -// CHECK: call {{.*}} [[ST_TY_DEFAULT_CONSTR:@.+]]([[ST_TY]]* [[ST_TY_TEMP:%.+]]) -// CHECK: call {{.*}} [[S_INT_TY_COPY_CONSTR:@.+]]([[S_INT_TY]]* {{.+}}, [[S_INT_TY]]* {{.+}}, [[ST_TY]]* [[ST_TY_TEMP]]) -// CHECK: call {{.*}} [[ST_TY_DESTR:@.+]]([[ST_TY]]* [[ST_TY_TEMP]]) +// CHECK: call {{.*}} [[ST_TY_DEFAULT_CONSTR:@.+]]([[ST_TY]]* frozen [[ST_TY_TEMP:%.+]]) +// CHECK: call {{.*}} [[S_INT_TY_COPY_CONSTR:@.+]]([[S_INT_TY]]* {{.+}}, [[S_INT_TY]]* {{.+}}, [[ST_TY]]* frozen [[ST_TY_TEMP]]) +// CHECK: call {{.*}} [[ST_TY_DESTR:@.+]]([[ST_TY]]* frozen [[ST_TY_TEMP]]) // CHECK: br i1 {{.+}}, label %{{.+}}, label %[[S_ARR_BODY]] // firstprivate var(var) -// CHECK: call {{.*}} [[ST_TY_DEFAULT_CONSTR]]([[ST_TY]]* [[ST_TY_TEMP:%.+]]) -// CHECK: call {{.*}} [[S_INT_TY_COPY_CONSTR]]([[S_INT_TY]]* [[VAR_PRIV]], [[S_INT_TY]]* {{.*}} [[VAR_REF]], [[ST_TY]]* [[ST_TY_TEMP]]) -// CHECK: call {{.*}} [[ST_TY_DESTR]]([[ST_TY]]* [[ST_TY_TEMP]]) +// CHECK: call {{.*}} [[ST_TY_DEFAULT_CONSTR]]([[ST_TY]]* frozen [[ST_TY_TEMP:%.+]]) +// CHECK: call {{.*}} [[S_INT_TY_COPY_CONSTR]]([[S_INT_TY]]* frozen [[VAR_PRIV]], [[S_INT_TY]]* {{.*}} [[VAR_REF]], [[ST_TY]]* frozen [[ST_TY_TEMP]]) +// CHECK: call {{.*}} [[ST_TY_DESTR]]([[ST_TY]]* frozen [[ST_TY_TEMP]]) // ~(firstprivate var), ~(firstprivate s_arr) -// CHECK-DAG: call {{.*}} [[S_INT_TY_DESTR]]([[S_INT_TY]]* [[VAR_PRIV]]) +// CHECK-DAG: call {{.*}} [[S_INT_TY_DESTR]]([[S_INT_TY]]* frozen [[VAR_PRIV]]) // CHECK-DAG: call {{.*}} [[S_INT_TY_DESTR]]([[S_INT_TY]]* // CHECK: call void @__kmpc_end_single( diff --git a/clang/test/OpenMP/single_private_codegen.cpp b/clang/test/OpenMP/single_private_codegen.cpp --- a/clang/test/OpenMP/single_private_codegen.cpp +++ b/clang/test/OpenMP/single_private_codegen.cpp @@ -55,7 +55,7 @@ #pragma omp parallel #pragma omp single private(g, sivar) { - // LAMBDA: define{{.*}} internal{{.*}} void [[OMP_REGION]](i32* noalias %{{.+}}, i32* noalias %{{.+}}) + // LAMBDA: define{{.*}} internal{{.*}} void [[OMP_REGION]](i32* frozen noalias %{{.+}}, i32* frozen noalias %{{.+}}) // LAMBDA: [[G_PRIVATE_ADDR:%.+]] = alloca double, // LAMBDA: [[SIVAR_PRIVATE_ADDR:%.+]] = alloca i{{[0-9]+}}, g = 1; @@ -67,10 +67,10 @@ // LAMBDA: store double* [[G_PRIVATE_ADDR]], double** [[G_PRIVATE_ADDR_REF]] // LAMBDA: [[SIVAR_PRIVATE_ADDR_REF:%.+]] = getelementptr inbounds %{{.+}}, %{{.+}}* [[ARG:%.+]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 // LAMBDA: store i{{[0-9]+}}* [[SIVAR_PRIVATE_ADDR]], i{{[0-9]+}}** [[SIVAR_PRIVATE_ADDR_REF]] - // LAMBDA: call{{.*}} void [[INNER_LAMBDA:@.+]](%{{.+}}* [[ARG]]) + // LAMBDA: call{{.*}} void [[INNER_LAMBDA:@.+]](%{{.+}}* frozen [[ARG]]) // LAMBDA: call {{.*}}void @__kmpc_end_single( [&]() { - // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* [[ARG_PTR:%.+]]) + // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* frozen [[ARG_PTR:%.+]]) // LAMBDA: store %{{.+}}* [[ARG_PTR]], %{{.+}}** [[ARG_PTR_REF:%.+]], g = 2; sivar = 211; @@ -95,7 +95,7 @@ #pragma omp parallel #pragma omp single private(g, sivar) { - // BLOCKS: define{{.*}} internal{{.*}} void [[OMP_REGION]](i32* noalias %{{.+}}, i32* noalias %{{.+}}) + // BLOCKS: define{{.*}} internal{{.*}} void [[OMP_REGION]](i32* frozen noalias %{{.+}}, i32* frozen noalias %{{.+}}) // BLOCKS: [[G_PRIVATE_ADDR:%.+]] = alloca double, // BLOCKS: [[SIVAR_PRIVATE_ADDR:%.+]] = alloca i{{[0-9]+}}, g = 1; @@ -143,15 +143,15 @@ #endif } -// CHECK: define i{{[0-9]+}} @main() +// CHECK: define frozen i{{[0-9]+}} @main() // CHECK: [[TEST:%.+]] = alloca [[S_FLOAT_TY]], -// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR:@.+]]([[S_FLOAT_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR:@.+]]([[S_FLOAT_TY]]* frozen [[TEST]]) // CHECK: call void (%{{.+}}*, i{{[0-9]+}}, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)*, ...) @__kmpc_fork_call(%{{.+}}* @{{.+}}, i{{[0-9]+}} 0, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)* bitcast (void (i{{[0-9]+}}*, i{{[0-9]+}}*)* [[MAIN_MICROTASK:@.+]] to void -// CHECK: = call i{{.+}} [[TMAIN_INT:@.+]]() +// CHECK: = call frozen i{{.+}} [[TMAIN_INT:@.+]]() // CHECK: call void [[S_FLOAT_TY_DESTR:@.+]]([[S_FLOAT_TY]]* // CHECK: ret // -// CHECK: define internal void [[MAIN_MICROTASK]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}) +// CHECK: define internal void [[MAIN_MICROTASK]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}) // CHECK: [[T_VAR_PRIV:%.+]] = alloca i{{[0-9]+}}, // CHECK: [[VEC_PRIV:%.+]] = alloca [2 x i{{[0-9]+}}], // CHECK: [[S_ARR_PRIV:%.+]] = alloca [2 x [[S_FLOAT_TY]]], @@ -166,24 +166,24 @@ // CHECK-NOT: [[SIVAR_PRIV]] // CHECK: {{.+}}: // CHECK: [[S_ARR_PRIV_ITEM:%.+]] = phi [[S_FLOAT_TY]]* -// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR]]([[S_FLOAT_TY]]* [[S_ARR_PRIV_ITEM]]) +// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR]]([[S_FLOAT_TY]]* frozen [[S_ARR_PRIV_ITEM]]) // CHECK-NOT: [[T_VAR_PRIV]] // CHECK-NOT: [[VEC_PRIV]] // CHECK-NOT: [[SIVAR_PRIV]] -// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR]]([[S_FLOAT_TY]]* [[VAR_PRIV]]) -// CHECK-DAG: call void [[S_FLOAT_TY_DESTR]]([[S_FLOAT_TY]]* [[VAR_PRIV]]) +// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR]]([[S_FLOAT_TY]]* frozen [[VAR_PRIV]]) +// CHECK-DAG: call void [[S_FLOAT_TY_DESTR]]([[S_FLOAT_TY]]* frozen [[VAR_PRIV]]) // CHECK-DAG: call void [[S_FLOAT_TY_DESTR]]([[S_FLOAT_TY]]* // CHECK: call void @__kmpc_end_single( // CHECK: ret void // CHECK: define {{.*}} i{{[0-9]+}} [[TMAIN_INT]]() // CHECK: [[TEST:%.+]] = alloca [[S_INT_TY]], -// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR:@.+]]([[S_INT_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR:@.+]]([[S_INT_TY]]* frozen [[TEST]]) // CHECK: call void (%{{.+}}*, i{{[0-9]+}}, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)*, ...) @__kmpc_fork_call(%{{.+}}* @{{.+}}, i{{[0-9]+}} 0, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)* bitcast (void (i{{[0-9]+}}*, i{{[0-9]+}}*)* [[TMAIN_MICROTASK:@.+]] to void // CHECK: call void [[S_INT_TY_DESTR:@.+]]([[S_INT_TY]]* // CHECK: ret // -// CHECK: define internal void [[TMAIN_MICROTASK]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}) +// CHECK: define internal void [[TMAIN_MICROTASK]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}) // CHECK: [[T_VAR_PRIV:%.+]] = alloca i{{[0-9]+}}, // CHECK: [[VEC_PRIV:%.+]] = alloca [2 x i{{[0-9]+}}], // CHECK: [[S_ARR_PRIV:%.+]] = alloca [2 x [[S_INT_TY]]], @@ -196,11 +196,11 @@ // CHECK-NOT: [[VEC_PRIV]] // CHECK: {{.+}}: // CHECK: [[S_ARR_PRIV_ITEM:%.+]] = phi [[S_INT_TY]]* -// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR]]([[S_INT_TY]]* [[S_ARR_PRIV_ITEM]]) +// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR]]([[S_INT_TY]]* frozen [[S_ARR_PRIV_ITEM]]) // CHECK-NOT: [[T_VAR_PRIV]] // CHECK-NOT: [[VEC_PRIV]] -// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR]]([[S_INT_TY]]* [[VAR_PRIV]]) -// CHECK-DAG: call void [[S_INT_TY_DESTR]]([[S_INT_TY]]* [[VAR_PRIV]]) +// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR]]([[S_INT_TY]]* frozen [[VAR_PRIV]]) +// CHECK-DAG: call void [[S_INT_TY_DESTR]]([[S_INT_TY]]* frozen [[VAR_PRIV]]) // CHECK-DAG: call void [[S_INT_TY_DESTR]]([[S_INT_TY]]* // CHECK: call void @__kmpc_end_single( // CHECK: ret void diff --git a/clang/test/OpenMP/target_codegen.cpp b/clang/test/OpenMP/target_codegen.cpp --- a/clang/test/OpenMP/target_codegen.cpp +++ b/clang/test/OpenMP/target_codegen.cpp @@ -146,7 +146,7 @@ // CHECK: [[ERROR:%.+]] = icmp ne i32 [[RET]], 0 // CHECK-NEXT: br i1 [[ERROR]], label %[[FAIL:[^,]+]], label %[[END:[^,]+]] // CHECK: [[FAIL]] - // CHECK: call void [[HVT0_:@.+]](i[[SZ]]* [[BP0]], i[[SZ]] [[BP1]]) + // CHECK: call void [[HVT0_:@.+]](i[[SZ]]* frozen [[BP0]], i[[SZ]] frozen [[BP1]]) // CHECK-NEXT: br label %[[END]] // CHECK: [[END]] #pragma omp target device(global + a) nowait @@ -156,7 +156,7 @@ local1 = global; } - // CHECK: call void [[HVT1:@.+]](i[[SZ]] {{[^,]+}}) + // CHECK: call void [[HVT1:@.+]](i[[SZ]] frozen {{[^,]+}}) #pragma omp target if(0) firstprivate(global) { global += 1; @@ -175,7 +175,7 @@ // CHECK: [[ERROR:%.+]] = icmp ne i32 [[RET]], 0 // CHECK-NEXT: br i1 [[ERROR]], label %[[FAIL:[^,]+]], label %[[END:[^,]+]] // CHECK: [[FAIL]] - // CHECK: call void [[HVT2:@.+]](i[[SZ]] {{[^,]+}}) + // CHECK: call void [[HVT2:@.+]](i[[SZ]] frozen {{[^,]+}}) // CHECK-NEXT: br label %[[END]] // CHECK: [[END]] #pragma omp target if(1) @@ -362,7 +362,7 @@ // CHECK: define internal void [[HVT0]]() -// CHECK: define internal void [[HVT1]](i[[SZ]] %{{.+}}) +// CHECK: define internal void [[HVT1]](i[[SZ]] frozen %{{.+}}) // Create stack storage and store argument in there. // CHECK: [[AA_ADDR:%.+]] = alloca i[[SZ]], align // CHECK: store i[[SZ]] %{{.+}}, i[[SZ]]* [[AA_ADDR]], align @@ -370,7 +370,7 @@ // CHECK-64: load i32, i32* [[AA_CADDR]], align // CHECK-32: load i32, i32* [[AA_ADDR]], align -// CHECK: define internal void [[HVT2]](i[[SZ]] %{{.+}}) +// CHECK: define internal void [[HVT2]](i[[SZ]] frozen %{{.+}}) // Create stack storage and store argument in there. // CHECK: [[AA_ADDR:%.+]] = alloca i[[SZ]], align // CHECK: store i[[SZ]] %{{.+}}, i[[SZ]]* [[AA_ADDR]], align @@ -712,7 +712,7 @@ // CHECK-NEXT: [[ERROR:%.+]] = icmp ne i32 [[RET]], 0 // CHECK-NEXT: br i1 [[ERROR]], label %[[FAIL:[^,]+]], label %[[END:[^,]+]] // CHECK: [[FAIL]] -// CHECK: call void [[HVT0:@.+]]([[S2]]* [[LOCAL_THIS1]]) +// CHECK: call void [[HVT0:@.+]]([[S2]]* frozen [[LOCAL_THIS1]]) // CHECK-NEXT: br label %[[END]] // CHECK: [[END]] diff --git a/clang/test/OpenMP/target_codegen_global_capture.cpp b/clang/test/OpenMP/target_codegen_global_capture.cpp --- a/clang/test/OpenMP/target_codegen_global_capture.cpp +++ b/clang/test/OpenMP/target_codegen_global_capture.cpp @@ -1,16 +1,16 @@ -// RUN: %clang_cc1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix CHECK --check-prefix CHECK-64 -// RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix CHECK --check-prefix CHECK-64 -// RUN: %clang_cc1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix CHECK --check-prefix CHECK-32 -// RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix CHECK --check-prefix CHECK-32 - -// RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck --check-prefix SIMD-ONLY0 %s -// RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY0 %s -// RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck --check-prefix SIMD-ONLY0 %s -// RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY0 %s +// RUN: %clang_cc1 -disable-frozen-args -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix CHECK --check-prefix CHECK-64 +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix CHECK --check-prefix CHECK-64 +// RUN: %clang_cc1 -disable-frozen-args -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix CHECK --check-prefix CHECK-32 +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix CHECK --check-prefix CHECK-32 + +// RUN: %clang_cc1 -disable-frozen-args -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck --check-prefix SIMD-ONLY0 %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY0 %s +// RUN: %clang_cc1 -disable-frozen-args -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck --check-prefix SIMD-ONLY0 %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY0 %s // SIMD-ONLY0-NOT: {{__kmpc|__tgt}} // expected-no-diagnostics #ifndef HEADER diff --git a/clang/test/OpenMP/target_defaultmap_codegen.cpp b/clang/test/OpenMP/target_defaultmap_codegen.cpp --- a/clang/test/OpenMP/target_defaultmap_codegen.cpp +++ b/clang/test/OpenMP/target_defaultmap_codegen.cpp @@ -40,7 +40,7 @@ // CK1-DAG: store { double, double }* [[PTR:%[^,]+]], { double, double }** [[CBP1]] // CK1-DAG: store { double, double }* [[PTR]], { double, double }** [[CP1]] - // CK1: call void [[KERNEL:@.+]]({ double, double }* [[PTR]]) + // CK1: call void [[KERNEL:@.+]]({ double, double }* frozen [[PTR]]) #pragma omp target defaultmap(alloc:scalar) { dc *= dc; @@ -90,7 +90,7 @@ // CK2-DAG: store { double, double }* [[PTR:%[^,]+]], { double, double }** [[CBP1]] // CK2-DAG: store { double, double }* [[PTR]], { double, double }** [[CP1]] - // CK2: call void [[KERNEL:@.+]]({ double, double }* [[PTR]]) + // CK2: call void [[KERNEL:@.+]]({ double, double }* frozen [[PTR]]) #pragma omp target defaultmap(to:scalar) { dc *= dc; @@ -140,7 +140,7 @@ // CK3-DAG: store { double, double }* [[PTR:%[^,]+]], { double, double }** [[CBP1]] // CK3-DAG: store { double, double }* [[PTR]], { double, double }** [[CP1]] - // CK3: call void [[KERNEL:@.+]]({ double, double }* [[PTR]]) + // CK3: call void [[KERNEL:@.+]]({ double, double }* frozen [[PTR]]) #pragma omp target defaultmap(from:scalar) { dc *= dc; @@ -204,15 +204,15 @@ // CK4-32-DAG: store double* [[DECL:%[^,]+]], double** [[CBP1]] // CK4-32-DAG: store double* [[DECL]], double** [[CP1]] - // CK4-64: call void [[KERNEL:@.+]](i[[sz]] [[VAL]]) - // CK4-32: call void [[KERNEL:@.+]](double* [[DECL]]) + // CK4-64: call void [[KERNEL:@.+]](i[[sz]] frozen [[VAL]]) + // CK4-32: call void [[KERNEL:@.+]](double* frozen [[DECL]]) #pragma omp target defaultmap(firstprivate:scalar) { d += 1.0; } } -// CK4-64: define internal void [[KERNEL]](i[[sz]] [[ARG:%.+]]) +// CK4-64: define internal void [[KERNEL]](i[[sz]] frozen [[ARG:%.+]]) // CK4-64: [[ADDR:%.+]] = alloca i[[sz]], // CK4-64: store i[[sz]] [[ARG]], i[[sz]]* [[ADDR]], // CK4-64: [[CADDR:%.+]] = bitcast i64* [[ADDR]] to double* @@ -262,7 +262,7 @@ // CK5-DAG: store [2 x double]* [[DECL:%[^,]+]], [2 x double]** [[CBP1]] // CK5-DAG: store [2 x double]* [[DECL]], [2 x double]** [[CP1]] - // CK5: call void [[KERNEL:@.+]]([2 x double]* [[DECL]]) + // CK5: call void [[KERNEL:@.+]]([2 x double]* frozen [[DECL]]) #pragma omp target defaultmap(alloc: aggregate) { darr[0] += 1.0; @@ -313,7 +313,7 @@ // CK6-DAG: store [2 x double]* [[DECL:%[^,]+]], [2 x double]** [[CBP1]] // CK6-DAG: store [2 x double]* [[DECL]], [2 x double]** [[CP1]] - // CK6: call void [[KERNEL:@.+]]([2 x double]* [[DECL]]) + // CK6: call void [[KERNEL:@.+]]([2 x double]* frozen [[DECL]]) #pragma omp target defaultmap(to) { darr[0] += 1.0; @@ -364,7 +364,7 @@ // CK7-DAG: store [2 x double]* [[DECL:%[^,]+]], [2 x double]** [[CBP1]] // CK7-DAG: store [2 x double]* [[DECL]], [2 x double]** [[CP1]] - // CK7: call void [[KERNEL:@.+]]([2 x double]* [[DECL]]) + // CK7: call void [[KERNEL:@.+]]([2 x double]* frozen [[DECL]]) #pragma omp target defaultmap(from: aggregate) { darr[0] += 1.0; @@ -415,7 +415,7 @@ // CK8-DAG: store [2 x double]* [[DECL:%[^,]+]], [2 x double]** [[CBP1]] // CK8-DAG: store [2 x double]* [[DECL]], [2 x double]** [[CP1]] - // CK8: call void [[KERNEL:@.+]]([2 x double]* [[DECL]]) + // CK8: call void [[KERNEL:@.+]]([2 x double]* frozen [[DECL]]) #pragma omp target defaultmap(tofrom) { darr[0] += 1.0; @@ -470,7 +470,7 @@ // CK9-DAG: store [10 x i32]* [[VAR0:%.+]], [10 x i32]** [[CBP0]] // CK9-DAG: store [10 x i32]* [[VAR0]], [10 x i32]** [[CP0]] - // CK9: call void [[CALL09:@.+]]([10 x i32]* {{[^,]+}}) + // CK9: call void [[CALL09:@.+]]([10 x i32]* frozen {{[^,]+}}) #pragma omp target defaultmap(firstprivate:aggregate) { pvtArr[5]++; @@ -519,7 +519,7 @@ // CK10-DAG: store i32** [[VAR0:%.+]], i32*** [[CBP0]] // CK10-DAG: store i32** [[VAR0]], i32*** [[CP0]] - // CK10: call void [[CALL:@.+]](i32** {{[^,]+}}) + // CK10: call void [[CALL:@.+]](i32** frozen {{[^,]+}}) #pragma omp target defaultmap(alloc: pointer) { pa[50]++; @@ -567,7 +567,7 @@ // CK11-DAG: store i32** [[VAR0:%.+]], i32*** [[CBP0]] // CK11-DAG: store i32** [[VAR0]], i32*** [[CP0]] - // CK11: call void [[CALL09:@.+]](i32** {{[^,]+}}) + // CK11: call void [[CALL09:@.+]](i32** frozen {{[^,]+}}) #pragma omp target defaultmap(to: pointer) { pa[50]++; @@ -615,7 +615,7 @@ // CK12-DAG: store i32** [[VAR0:%.+]], i32*** [[CBP0]] // CK12-DAG: store i32** [[VAR0]], i32*** [[CP0]] - // CK12: call void [[CALL09:@.+]](i32** {{[^,]+}}) + // CK12: call void [[CALL09:@.+]](i32** frozen {{[^,]+}}) #pragma omp target defaultmap(from: pointer) { pa[50]++; @@ -663,7 +663,7 @@ // CK13-DAG: store i32** [[VAR0:%.+]], i32*** [[CBP0]] // CK13-DAG: store i32** [[VAR0]], i32*** [[CP0]] - // CK13: call void [[CALL09:@.+]](i32** {{[^,]+}}) + // CK13: call void [[CALL09:@.+]](i32** frozen {{[^,]+}}) #pragma omp target defaultmap(tofrom: pointer) { pa[50]++; @@ -711,7 +711,7 @@ // CK14-DAG: store i32* [[VAR0:%.+]], i32** [[CBP0]] // CK14-DAG: store i32* [[VAR0]], i32** [[CP0]] - // CK14: call void [[CALL09:@.+]](i32* {{[^,]+}}) + // CK14: call void [[CALL09:@.+]](i32* frozen {{[^,]+}}) #pragma omp target defaultmap(firstprivate: pointer) { pa[50]++; @@ -783,14 +783,14 @@ // CK15-DAG: store i64 [[VALS2:%.+]], i64* [[S2]], // CK15-DAG: [[VALS2]] = {{mul nuw i64 %.+, 8|sext i32 %.+ to i64}} - // CK15: call void [[KERNEL:@.+]](i[[sz]] {{.+}}, i[[sz]] {{.+}}, double* [[DECL]]) + // CK15: call void [[KERNEL:@.+]](i[[sz]] {{.+}}, i[[sz]] {{.+}}, double* frozen [[DECL]]) #pragma omp target defaultmap(alloc: aggregate) { vla[1][3] += 1.0; } } -// CK15: define internal void [[KERNEL]](i[[sz]] [[VLA0:%.+]], i[[sz]] [[VLA1:%.+]], double* {{.*}}[[ARG:%.+]]) +// CK15: define internal void [[KERNEL]](i[[sz]] frozen [[VLA0:%.+]], i[[sz]] frozen [[VLA1:%.+]], double* {{.*}}[[ARG:%.+]]) // CK15: [[ADDR0:%.+]] = alloca i[[sz]], // CK15: [[ADDR1:%.+]] = alloca i[[sz]], // CK15: [[ADDR2:%.+]] = alloca double*, @@ -845,7 +845,7 @@ // CK16-DAG: store [[ST]]* [[DECL:%.+]], [[ST]]** [[CBP1]] // CK16-DAG: store [[ST]]* [[DECL]], [[ST]]** [[CP1]] - // CK16: call void [[KERNEL:@.+]]([[ST]]* [[DECL]]) + // CK16: call void [[KERNEL:@.+]]([[ST]]* frozen [[DECL]]) #pragma omp target defaultmap(alloc: aggregate) { s.a += 1; @@ -902,7 +902,7 @@ // CK17-DAG: store [[ST]]* [[DECL:%.+]], [[ST]]** [[CBP1]] // CK17-DAG: store [[ST]]* [[DECL]], [[ST]]** [[CP1]] - // CK17: call void [[KERNEL:@.+]]([[ST]]* [[DECL]]) + // CK17: call void [[KERNEL:@.+]]([[ST]]* frozen [[DECL]]) #pragma omp target defaultmap(to: aggregate) { s.a += 1; @@ -959,7 +959,7 @@ // CK18-DAG: store [[ST]]* [[DECL:%.+]], [[ST]]** [[CBP1]] // CK18-DAG: store [[ST]]* [[DECL]], [[ST]]** [[CP1]] - // CK18: call void [[KERNEL:@.+]]([[ST]]* [[DECL]]) + // CK18: call void [[KERNEL:@.+]]([[ST]]* frozen [[DECL]]) #pragma omp target defaultmap(from: aggregate) { s.a += 1; @@ -1016,7 +1016,7 @@ // CK19-DAG: store [[ST]]* [[DECL:%.+]], [[ST]]** [[CBP1]] // CK19-DAG: store [[ST]]* [[DECL]], [[ST]]** [[CP1]] - // CK19: call void [[KERNEL:@.+]]([[ST]]* [[DECL]]) + // CK19: call void [[KERNEL:@.+]]([[ST]]* frozen [[DECL]]) #pragma omp target defaultmap(tofrom: aggregate) { s.a += 1; @@ -1081,15 +1081,15 @@ // CK20-32-DAG: store double* [[DECL:%[^,]+]], double** [[CBP1]] // CK20-32-DAG: store double* [[DECL]], double** [[CP1]] - // CK20-64: call void [[KERNEL:@.+]](i[[sz]] [[VAL]]) - // CK20-32: call void [[KERNEL:@.+]](double* [[DECL]]) + // CK20-64: call void [[KERNEL:@.+]](i[[sz]] frozen [[VAL]]) + // CK20-32: call void [[KERNEL:@.+]](double* frozen [[DECL]]) #pragma omp target defaultmap(default: scalar) { d += 1.0; } } -// CK20-64: define internal void [[KERNEL]](i[[sz]] [[ARG:%.+]]) +// CK20-64: define internal void [[KERNEL]](i[[sz]] frozen [[ARG:%.+]]) // CK20-64: [[ADDR:%.+]] = alloca i[[sz]], // CK20-64: store i[[sz]] [[ARG]], i[[sz]]* [[ADDR]], // CK20-64: [[CADDR:%.+]] = bitcast i64* [[ADDR]] to double* @@ -1145,7 +1145,7 @@ // CK21-DAG: store [[ST]]* [[DECL:%.+]], [[ST]]** [[CBP1]] // CK21-DAG: store [[ST]]* [[DECL]], [[ST]]** [[CP1]] - // CK21: call void [[KERNEL:@.+]]([[ST]]* [[DECL]]) + // CK21: call void [[KERNEL:@.+]]([[ST]]* frozen [[DECL]]) #pragma omp target defaultmap(default: aggregate) { s.a += 1; @@ -1196,7 +1196,7 @@ // CK22-DAG: store double* [[PTR:%[^,]+]], double** [[CBP1]] // CK22-DAG: store double* [[PTR]], double** [[CP1]] - // CK22: call void [[KERNEL:@.+]](double* [[PTR]]) + // CK22: call void [[KERNEL:@.+]](double* frozen [[PTR]]) #pragma omp target defaultmap(default: pointer) { ddyn[0] += 1.0; @@ -1269,7 +1269,7 @@ // CK23-DAG: store double* [[VAL]], double** [[CP1]] // CK23-DAG: [[VAL]] = load double*, double** [[ADDR:@g]], - // CK23: call void [[KERNEL:@.+]](double* [[VAL]]) + // CK23: call void [[KERNEL:@.+]](double* frozen [[VAL]]) #pragma omp target is_device_ptr(g) defaultmap(none:pointer) { ++g; @@ -1286,7 +1286,7 @@ // CK23-DAG: store float* [[VAL]], float** [[CP1]] // CK23-DAG: [[VAL]] = load float*, float** [[ADDR:%.+]], - // CK23: call void [[KERNEL:@.+]](float* [[VAL]]) + // CK23: call void [[KERNEL:@.+]](float* frozen [[VAL]]) #pragma omp target is_device_ptr(l) defaultmap(none:pointer) { ++l; @@ -1303,7 +1303,7 @@ // CK23-DAG: store i32* [[VAL]], i32** [[CP1]] // CK23-DAG: [[VAL]] = load i32*, i32** [[ADDR:%.+]], - // CK23: call void [[KERNEL:@.+]](i32* [[VAL]]) + // CK23: call void [[KERNEL:@.+]](i32* frozen [[VAL]]) #pragma omp target is_device_ptr(t) defaultmap(none:pointer) { ++t; @@ -1321,7 +1321,7 @@ // CK23-DAG: [[VAL]] = load float*, float** [[ADDR:%.+]], // CK23-DAG: [[ADDR]] = load float**, float*** [[ADDR2:%.+]], - // CK23: call void [[KERNEL:@.+]](float* [[VAL]]) + // CK23: call void [[KERNEL:@.+]](float* frozen [[VAL]]) #pragma omp target is_device_ptr(lr) defaultmap(none:pointer) { ++lr; @@ -1339,7 +1339,7 @@ // CK23-DAG: [[VAL]] = load i32*, i32** [[ADDR:%.+]], // CK23-DAG: [[ADDR]] = load i32**, i32*** [[ADDR2:%.+]], - // CK23: call void [[KERNEL:@.+]](i32* [[VAL]]) + // CK23: call void [[KERNEL:@.+]](i32* frozen [[VAL]]) #pragma omp target is_device_ptr(tr) defaultmap(none:pointer) { ++tr; @@ -1357,7 +1357,7 @@ // CK23-DAG: [[VAL]] = load i32*, i32** [[ADDR:%.+]], // CK23-DAG: [[ADDR]] = load i32**, i32*** [[ADDR2:%.+]], - // CK23: call void [[KERNEL:@.+]](i32* [[VAL]]) + // CK23: call void [[KERNEL:@.+]](i32* frozen [[VAL]]) #pragma omp target is_device_ptr(tr,lr) defaultmap(none:pointer) { ++tr; @@ -1384,7 +1384,7 @@ // CK23-DAG: [[_VAL]] = load float*, float** [[_ADDR:%.+]], // CK23-DAG: [[_ADDR]] = load float**, float*** [[_ADDR2:%.+]], - // CK23: call void [[KERNEL:@.+]](i32* [[VAL]], float* [[_VAL]]) + // CK23: call void [[KERNEL:@.+]](i32* frozen [[VAL]], float* frozen [[_VAL]]) #pragma omp target is_device_ptr(tr,lr) defaultmap(none:pointer) { ++tr,++lr; @@ -1439,7 +1439,7 @@ // CK24-DAG: store i32* [[VAR0:%.+]], i32** [[CBP0]] // CK24-DAG: store i32* [[VAR0]], i32** [[CP0]] - // CK24: call void [[CALL00:@.+]](i32* {{[^,]+}}) + // CK24: call void [[CALL00:@.+]](i32* frozen {{[^,]+}}) #pragma omp target map(close, tofrom: a) defaultmap(none:scalar) { a++; @@ -1458,7 +1458,7 @@ // CK24-DAG: store i32* [[VAR0:%.+]], i32** [[CBP0]] // CK24-DAG: store i32* [[VAR0]], i32** [[CP0]] - // CK24: call void [[CALL01:@.+]](i32* {{[^,]+}}) + // CK24: call void [[CALL01:@.+]](i32* frozen {{[^,]+}}) #pragma omp target map(always close tofrom: a) defaultmap(none:scalar) { a++; diff --git a/clang/test/OpenMP/target_depend_codegen.cpp b/clang/test/OpenMP/target_depend_codegen.cpp --- a/clang/test/OpenMP/target_depend_codegen.cpp +++ b/clang/test/OpenMP/target_depend_codegen.cpp @@ -88,7 +88,7 @@ // CHECK: [[DEP:%.+]] = bitcast %struct.kmp_depend_info* [[DEP_START]] to i8* // CHECK: call void @__kmpc_omp_wait_deps(%struct.ident_t* @0, i32 [[GTID]], i32 4, i8* [[DEP]], i32 0, i8* null) // CHECK: call void @__kmpc_omp_task_begin_if0(%struct.ident_t* @0, i32 [[GTID]], i8* [[TASK]]) - // CHECK: call i32 [[TASK_ENTRY0]](i32 [[GTID]], [[TASK_TY0]]* [[BC_TASK]]) + // CHECK: call i32 [[TASK_ENTRY0]](i32 frozen [[GTID]], [[TASK_TY0]]* frozen [[BC_TASK]]) // CHECK: call void @__kmpc_omp_task_complete_if0(%struct.ident_t* @0, i32 [[GTID]], i8* [[TASK]]) #pragma omp target device(global + a) depend(in: global) depend(out: a, b, cn[4]) { @@ -158,7 +158,7 @@ // CHECK: [[DEP:%.+]] = bitcast %struct.kmp_depend_info* %{{.+}} to i8* // CHECK: call void @__kmpc_omp_wait_deps(%struct.ident_t* @0, i32 [[GTID]], i32 1, i8* [[DEP]], i32 0, i8* null) // CHECK: call void @__kmpc_omp_task_begin_if0(%struct.ident_t* @0, i32 [[GTID]], i8* [[TASK]]) - // CHECK: call i32 [[TASK_ENTRY2]](i32 [[GTID]], [[TASK_TY2]]* [[BC_TASK]]) + // CHECK: call i32 [[TASK_ENTRY2]](i32 frozen [[GTID]], [[TASK_TY2]]* frozen [[BC_TASK]]) // CHECK: call void @__kmpc_omp_task_complete_if0(%struct.ident_t* @0, i32 [[GTID]], i8* [[TASK]]) #pragma omp target if(0) firstprivate(global) depend(out:global) { @@ -173,7 +173,7 @@ // CHECK: define internal void [[HVT0:@.+]]() -// CHECK: define internal{{.*}} i32 [[TASK_ENTRY0]](i32{{.*}}, [[TASK_TY0]]* noalias %1) +// CHECK: define internal{{.*}} i32 [[TASK_ENTRY0]](i32{{.*}}, [[TASK_TY0]]* frozen noalias %1) // CHECK: store void (i8*, ...)* null, void (i8*, ...)** % // CHECK: [[DEVICE_CAP:%.+]] = getelementptr inbounds %{{.+}}, %{{.+}}* %{{.+}}, i32 0, i32 0 // CHECK: [[DEV:%.+]] = load i32, i32* [[DEVICE_CAP]], @@ -187,9 +187,9 @@ // CHECK: [[END]] // CHECK: ret i32 0 -// CHECK: define internal void [[HVT1:@.+]](i[[SZ]]* %{{.+}}, i[[SZ]] %{{.+}}) +// CHECK: define internal void [[HVT1:@.+]](i[[SZ]]* frozen %{{.+}}, i[[SZ]] frozen %{{.+}}) -// CHECK: define internal{{.*}} i32 [[TASK_ENTRY1_]](i32{{.*}}, [[TASK_TY1_]]* noalias %1) +// CHECK: define internal{{.*}} i32 [[TASK_ENTRY1_]](i32{{.*}}, [[TASK_TY1_]]* frozen noalias %1) // CHECK: call void (i8*, ...) % // CHECK: [[SZT:%.+]] = getelementptr inbounds [2 x i64], [2 x i64]* %{{.+}}, i[[SZ]] 0, i[[SZ]] 0 // CHECK: [[DEVICE_CAP:%.+]] = getelementptr inbounds %{{.+}}, %{{.+}}* %{{.+}}, i32 0, i32 2 @@ -206,12 +206,12 @@ // CHECK-64: store i32 [[BP1_I32]], i32* [[BP1_CAST]], // CHECK-32: store i32 [[BP1_I32]], i32* [[BP1_PTR:%.+]], // CHECK: [[BP1:%.+]] = load i[[SZ]], i[[SZ]]* [[BP1_PTR]], -// CHECK: call void [[HVT1]](i[[SZ]]* [[BP0]], i[[SZ]] [[BP1]]) +// CHECK: call void [[HVT1]](i[[SZ]]* frozen [[BP0]], i[[SZ]] frozen [[BP1]]) // CHECK-NEXT: br label %[[END]] // CHECK: [[END]] // CHECK: ret i32 0 -// CHECK: define internal{{.*}} i32 [[TASK_ENTRY1__]](i32{{.*}}, [[TASK_TY1__]]* noalias %1) +// CHECK: define internal{{.*}} i32 [[TASK_ENTRY1__]](i32{{.*}}, [[TASK_TY1__]]* frozen noalias %1) // CHECK: call void (i8*, ...) % // CHECK: [[DEVICE_CAP:%.+]] = getelementptr inbounds %{{.+}}, %{{.+}}* %{{.+}}, i32 0, i32 2 // CHECK: [[BP0:%.+]] = load i[[SZ]]*, i[[SZ]]** % @@ -220,10 +220,10 @@ // CHECK-64: store i32 [[BP1_I32]], i32* [[BP1_CAST]], // CHECK-32: store i32 [[BP1_I32]], i32* [[BP1_PTR:%.+]], // CHECK: [[BP1:%.+]] = load i[[SZ]], i[[SZ]]* [[BP1_PTR]], -// CHECK: call void [[HVT1]](i[[SZ]]* [[BP0]], i[[SZ]] [[BP1]]) +// CHECK: call void [[HVT1]](i[[SZ]]* frozen [[BP0]], i[[SZ]] frozen [[BP1]]) // CHECK: ret i32 0 -// CHECK: define internal void [[HVT2:@.+]](i[[SZ]] %{{.+}}) +// CHECK: define internal void [[HVT2:@.+]](i[[SZ]] frozen %{{.+}}) // Create stack storage and store argument in there. // CHECK: [[AA_ADDR:%.+]] = alloca i[[SZ]], align // CHECK: store i[[SZ]] %{{.+}}, i[[SZ]]* [[AA_ADDR]], align @@ -231,14 +231,14 @@ // CHECK-64: load i32, i32* [[AA_CADDR]], align // CHECK-32: load i32, i32* [[AA_ADDR]], align -// CHECK: define internal{{.*}} i32 [[TASK_ENTRY2]](i32{{.*}}, [[TASK_TY2]]* noalias %1) +// CHECK: define internal{{.*}} i32 [[TASK_ENTRY2]](i32{{.*}}, [[TASK_TY2]]* frozen noalias %1) // CHECK: call void (i8*, ...) % // CHECK: [[BP1_I32:%.+]] = load i32, i32* % // CHECK-64: [[BP1_CAST:%.+]] = bitcast i[[SZ]]* [[BP1_PTR:%.+]] to i32* // CHECK-64: store i32 [[BP1_I32]], i32* [[BP1_CAST]], // CHECK-32: store i32 [[BP1_I32]], i32* [[BP1_PTR:%.+]], // CHECK: [[BP1:%.+]] = load i[[SZ]], i[[SZ]]* [[BP1_PTR]], -// CHECK: call void [[HVT2]](i[[SZ]] [[BP1]]) +// CHECK: call void [[HVT2]](i[[SZ]] frozen [[BP1]]) // CHECK: ret i32 0 // CHECK: define internal void @.omp_offloading.requires_reg() diff --git a/clang/test/OpenMP/target_enter_data_depend_codegen.cpp b/clang/test/OpenMP/target_enter_data_depend_codegen.cpp --- a/clang/test/OpenMP/target_enter_data_depend_codegen.cpp +++ b/clang/test/OpenMP/target_enter_data_depend_codegen.cpp @@ -1,16 +1,16 @@ -// RUN: %clang_cc1 -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix CK1 --check-prefix CK1-64 -// RUN: %clang_cc1 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix CK1 --check-prefix CK1-64 -// RUN: %clang_cc1 -verify -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix CK1 --check-prefix CK1-32 -// RUN: %clang_cc1 -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix CK1 --check-prefix CK1-32 +// RUN: %clang_cc1 -disable-frozen-args -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix CK1 --check-prefix CK1-64 +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix CK1 --check-prefix CK1-64 +// RUN: %clang_cc1 -disable-frozen-args -verify -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix CK1 --check-prefix CK1-32 +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix CK1 --check-prefix CK1-32 -// RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck --check-prefix SIMD-ONLY0 %s -// RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY0 %s -// RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck --check-prefix SIMD-ONLY0 %s -// RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY0 %s +// RUN: %clang_cc1 -disable-frozen-args -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck --check-prefix SIMD-ONLY0 %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY0 %s +// RUN: %clang_cc1 -disable-frozen-args -verify -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck --check-prefix SIMD-ONLY0 %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY0 %s // SIMD-ONLY0-NOT: {{__kmpc|__tgt}} // expected-no-diagnostics diff --git a/clang/test/OpenMP/target_exit_data_depend_codegen.cpp b/clang/test/OpenMP/target_exit_data_depend_codegen.cpp --- a/clang/test/OpenMP/target_exit_data_depend_codegen.cpp +++ b/clang/test/OpenMP/target_exit_data_depend_codegen.cpp @@ -1,16 +1,16 @@ -// RUN: %clang_cc1 -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix CK1 --check-prefix CK1-64 -// RUN: %clang_cc1 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix CK1 --check-prefix CK1-64 -// RUN: %clang_cc1 -verify -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix CK1 --check-prefix CK1-32 -// RUN: %clang_cc1 -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix CK1 --check-prefix CK1-32 +// RUN: %clang_cc1 -disable-frozen-args -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix CK1 --check-prefix CK1-64 +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix CK1 --check-prefix CK1-64 +// RUN: %clang_cc1 -disable-frozen-args -verify -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix CK1 --check-prefix CK1-32 +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix CK1 --check-prefix CK1-32 -// RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck --check-prefix SIMD-ONLY0 %s -// RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY0 %s -// RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck --check-prefix SIMD-ONLY0 %s -// RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY0 %s +// RUN: %clang_cc1 -disable-frozen-args -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck --check-prefix SIMD-ONLY0 %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY0 %s +// RUN: %clang_cc1 -disable-frozen-args -verify -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck --check-prefix SIMD-ONLY0 %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY0 %s // SIMD-ONLY0-NOT: {{__kmpc|__tgt}} // expected-no-diagnostics diff --git a/clang/test/OpenMP/target_firstprivate_codegen.cpp b/clang/test/OpenMP/target_firstprivate_codegen.cpp --- a/clang/test/OpenMP/target_firstprivate_codegen.cpp +++ b/clang/test/OpenMP/target_firstprivate_codegen.cpp @@ -132,7 +132,7 @@ // CHECK: [[PTR_GEP_ARG:%.+]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[PTR_ARR]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 // CHECK: {{.+}} = call i32 @__tgt_target(i64 -1, {{.+}}, i32 2, i8** [[BASE_PTR_GEP_ARG]], i8** [[PTR_GEP_ARG]], i[[SZ]]* getelementptr inbounds ([2 x i[[SZ]]], [2 x i[[SZ]]]* [[SIZET]], i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* [[MAPT]], i32 0, i32 0)) - // TCHECK: define weak void @__omp_offloading_{{.+}}(i{{[0-9]+}} [[A_IN:%.+]], i32** nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[P_IN:%.+]]) + // TCHECK: define weak void @__omp_offloading_{{.+}}(i{{[0-9]+}} frozen [[A_IN:%.+]], i32** frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[P_IN:%.+]]) // TCHECK: [[A_ADDR:%.+]] = alloca i{{[0-9]+}}, // TCHECK: [[P_ADDR:%.+]] = alloca i32**, // TCHECK: [[P_PRIV:%.+]] = alloca i32*, @@ -258,7 +258,7 @@ // make sure that firstprivate variables are generated in all cases and that we use those instances for operations inside the // target region - // TCHECK: define {{.*}}void @__omp_offloading_{{.+}}(i{{[0-9]+}} [[A2_IN:%.+]], [10 x float]* {{.+}} [[B_IN:%.+]], i{{[0-9]+}} [[BN_SZ:%.+]], float* {{.+}} [[BN_IN:%.+]], [5 x [10 x double]]* {{.+}} [[C_IN:%.+]], i{{[0-9]+}} [[CN_SZ1:%.+]], i{{[0-9]+}} [[CN_SZ2:%.+]], double* {{.+}} [[CN_IN:%.+]], [[TT]]* {{.+}} [[D_IN:%.+]]) + // TCHECK: define {{.*}}void @__omp_offloading_{{.+}}(i{{[0-9]+}} frozen [[A2_IN:%.+]], [10 x float]* {{.+}} [[B_IN:%.+]], i{{[0-9]+}} frozen [[BN_SZ:%.+]], float* {{.+}} [[BN_IN:%.+]], [5 x [10 x double]]* {{.+}} [[C_IN:%.+]], i{{[0-9]+}} frozen [[CN_SZ1:%.+]], i{{[0-9]+}} frozen [[CN_SZ2:%.+]], double* {{.+}} [[CN_IN:%.+]], [[TT]]* {{.+}} [[D_IN:%.+]]) // TCHECK: [[A2_ADDR:%.+]] = alloca i{{[0-9]+}}, // TCHECK: [[B_ADDR:%.+]] = alloca [10 x float]*, // TCHECK: [[VLA_ADDR:%.+]] = alloca i{{[0-9]+}}, @@ -355,7 +355,7 @@ // CHECK: [[PTR_GEP_ARG3:%.+]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[PTR_ARR3]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 // CHECK: {{.+}} = call i32 @__tgt_target(i64 -1, {{.+}}, i32 2, i8** [[BASE_PTR_GEP_ARG3]], i8** [[PTR_GEP_ARG3]], i[[SZ]]* getelementptr inbounds ([2 x i[[SZ]]], [2 x i[[SZ]]]* [[SIZET3]], i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* [[MAPT3]], i32 0, i32 0)) - // TCHECK: define weak void @__omp_offloading_{{.+}}(double* [[PTR_IN:%.+]], [[TTII]]* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[E:%.+]]) + // TCHECK: define weak void @__omp_offloading_{{.+}}(double* frozen [[PTR_IN:%.+]], [[TTII]]* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[E:%.+]]) // TCHECK-NOT: alloca [[TTII]], // TCHECK: [[PTR_ADDR:%.+]] = alloca double*, // TCHECK-NOT: alloca [[TTII]], @@ -395,7 +395,7 @@ return a; } -// TCHECK: define weak void @__omp_offloading_{{.+}}(i{{[0-9]+}} [[A_IN:%.+]], i{{[0-9]+}} [[A3_IN:%.+]], [10 x i{{[0-9]+}}]*{{.+}} [[B_IN:%.+]]) +// TCHECK: define weak void @__omp_offloading_{{.+}}(i{{[0-9]+}} frozen [[A_IN:%.+]], i{{[0-9]+}} frozen [[A3_IN:%.+]], [10 x i{{[0-9]+}}]*{{.+}} [[B_IN:%.+]]) // TCHECK: [[A_ADDR:%.+]] = alloca i{{[0-9]+}}, // TCHECK: [[A3_ADDR:%.+]] = alloca i{{[0-9]+}}, // TCHECK: [[B_ADDR:%.+]] = alloca [10 x i{{[0-9]+}}]*, @@ -502,7 +502,7 @@ // only check that we use the map types stored in the global variable // CHECK: call i32 @__tgt_target(i64 -1, {{.+}}, i32 6, i8** {{.+}}, i8** {{.+}}, i{{[0-9]+}}* {{.+}}, i64* getelementptr inbounds ([6 x i64], [6 x i64]* [[MAPT4]], i32 0, i32 0)) - // TCHECK: define weak void @__omp_offloading_{{.+}}([[S1]]* [[TH:%.+]], i{{[0-9]+}} [[B_IN:%.+]], i{{[0-9]+}} [[VLA:%.+]], i{{[0-9]+}} [[VLA1:%.+]], i{{[0-9]+}}{{.+}} [[C_IN:%.+]]) + // TCHECK: define weak void @__omp_offloading_{{.+}}([[S1]]* frozen [[TH:%.+]], i{{[0-9]+}} frozen [[B_IN:%.+]], i{{[0-9]+}} frozen [[VLA:%.+]], i{{[0-9]+}} frozen [[VLA1:%.+]], i{{[0-9]+}}{{.+}} [[C_IN:%.+]]) // TCHECK: [[TH_ADDR:%.+]] = alloca [[S1]]*, // TCHECK: [[B_ADDR:%.+]] = alloca i{{[0-9]+}}, // TCHECK: [[VLA_ADDR:%.+]] = alloca i{{[0-9]+}}, @@ -610,7 +610,7 @@ // CHECK: call i32 @__tgt_target(i64 -1, {{.+}}, i32 2, i8** {{.+}}, i8** {{.+}}, i[[SZ]]* getelementptr inbounds ([2 x i[[SZ]]], [2 x i[[SZ]]]* [[SIZET6]], i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* [[MAPT6]], i32 0, i32 0)) -// TCHECK: define weak void @__omp_offloading_{{.+}}(i{{[0-9]+}} [[A_IN:%.+]], [10 x i{{[0-9]+}}]*{{.+}} [[B_IN:%.+]]) +// TCHECK: define weak void @__omp_offloading_{{.+}}(i{{[0-9]+}} frozen [[A_IN:%.+]], [10 x i{{[0-9]+}}]*{{.+}} [[B_IN:%.+]]) // TCHECK: [[A_ADDR:%.+]] = alloca i{{[0-9]+}}, // TCHECK: [[B_ADDR:%.+]] = alloca [10 x i{{[0-9]+}}]*, // TCHECK-NOT: alloca i{{[0-9]+}}, diff --git a/clang/test/OpenMP/target_is_device_ptr_codegen.cpp b/clang/test/OpenMP/target_is_device_ptr_codegen.cpp --- a/clang/test/OpenMP/target_is_device_ptr_codegen.cpp +++ b/clang/test/OpenMP/target_is_device_ptr_codegen.cpp @@ -60,7 +60,7 @@ // CK1-DAG: store double* [[VAL]], double** [[CP1]] // CK1-DAG: [[VAL]] = load double*, double** [[ADDR:@g]], - // CK1: call void [[KERNEL:@.+]](double* [[VAL]]) + // CK1: call void [[KERNEL:@.+]](double* frozen [[VAL]]) #pragma omp target is_device_ptr(g) { ++g; @@ -77,7 +77,7 @@ // CK1-DAG: store float* [[VAL]], float** [[CP1]] // CK1-DAG: [[VAL]] = load float*, float** [[ADDR:%.+]], - // CK1: call void [[KERNEL:@.+]](float* [[VAL]]) + // CK1: call void [[KERNEL:@.+]](float* frozen [[VAL]]) #pragma omp target is_device_ptr(l) { ++l; @@ -94,7 +94,7 @@ // CK1-DAG: store i32* [[VAL]], i32** [[CP1]] // CK1-DAG: [[VAL]] = load i32*, i32** [[ADDR:%.+]], - // CK1: call void [[KERNEL:@.+]](i32* [[VAL]]) + // CK1: call void [[KERNEL:@.+]](i32* frozen [[VAL]]) #pragma omp target is_device_ptr(t) { ++t; @@ -112,7 +112,7 @@ // CK1-DAG: [[VAL]] = load float*, float** [[ADDR:%.+]], // CK1-DAG: [[ADDR]] = load float**, float*** [[ADDR2:%.+]], - // CK1: call void [[KERNEL:@.+]](float* [[VAL]]) + // CK1: call void [[KERNEL:@.+]](float* frozen [[VAL]]) #pragma omp target is_device_ptr(lr) { ++lr; @@ -130,7 +130,7 @@ // CK1-DAG: [[VAL]] = load i32*, i32** [[ADDR:%.+]], // CK1-DAG: [[ADDR]] = load i32**, i32*** [[ADDR2:%.+]], - // CK1: call void [[KERNEL:@.+]](i32* [[VAL]]) + // CK1: call void [[KERNEL:@.+]](i32* frozen [[VAL]]) #pragma omp target is_device_ptr(tr) { ++tr; @@ -148,7 +148,7 @@ // CK1-DAG: [[VAL]] = load i32*, i32** [[ADDR:%.+]], // CK1-DAG: [[ADDR]] = load i32**, i32*** [[ADDR2:%.+]], - // CK1: call void [[KERNEL:@.+]](i32* [[VAL]]) + // CK1: call void [[KERNEL:@.+]](i32* frozen [[VAL]]) #pragma omp target is_device_ptr(tr,lr) { ++tr; @@ -175,7 +175,7 @@ // CK1-DAG: [[_VAL]] = load float*, float** [[_ADDR:%.+]], // CK1-DAG: [[_ADDR]] = load float**, float*** [[_ADDR2:%.+]], - // CK1: call void [[KERNEL:@.+]](i32* [[VAL]], float* [[_VAL]]) + // CK1: call void [[KERNEL:@.+]](i32* frozen [[VAL]], float* frozen [[_VAL]]) #pragma omp target is_device_ptr(tr,lr) { ++tr,++lr; diff --git a/clang/test/OpenMP/target_map_codegen.cpp b/clang/test/OpenMP/target_map_codegen.cpp --- a/clang/test/OpenMP/target_map_codegen.cpp +++ b/clang/test/OpenMP/target_map_codegen.cpp @@ -7,19 +7,19 @@ /// ///==========================================================================/// -// RUN: %clang_cc1 -DCK1 -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK1 --check-prefix CK1-64 -// RUN: %clang_cc1 -DCK1 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK1 --check-prefix CK1-64 -// RUN: %clang_cc1 -DCK1 -verify -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK1 --check-prefix CK1-32 -// RUN: %clang_cc1 -DCK1 -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK1 --check-prefix CK1-32 - -// RUN: %clang_cc1 -DCK1 -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY0 %s -// RUN: %clang_cc1 -DCK1 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY0 %s -// RUN: %clang_cc1 -DCK1 -verify -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY0 %s -// RUN: %clang_cc1 -DCK1 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY0 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK1 -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK1 --check-prefix CK1-64 +// RUN: %clang_cc1 -disable-frozen-args -DCK1 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK1 --check-prefix CK1-64 +// RUN: %clang_cc1 -disable-frozen-args -DCK1 -verify -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK1 --check-prefix CK1-32 +// RUN: %clang_cc1 -disable-frozen-args -DCK1 -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK1 --check-prefix CK1-32 + +// RUN: %clang_cc1 -disable-frozen-args -DCK1 -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY0 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK1 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY0 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK1 -verify -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY0 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK1 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY0 %s // SIMD-ONLY0-NOT: {{__kmpc|__tgt}} #ifdef CK1 @@ -82,19 +82,19 @@ ///==========================================================================/// -// RUN: %clang_cc1 -DCK2 -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK2 --check-prefix CK2-64 -// RUN: %clang_cc1 -DCK2 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK2 --check-prefix CK2-64 -// RUN: %clang_cc1 -DCK2 -verify -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK2 --check-prefix CK2-32 -// RUN: %clang_cc1 -DCK2 -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK2 --check-prefix CK2-32 - -// RUN: %clang_cc1 -DCK2 -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY1 %s -// RUN: %clang_cc1 -DCK2 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY1 %s -// RUN: %clang_cc1 -DCK2 -verify -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY1 %s -// RUN: %clang_cc1 -DCK2 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY1 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK2 -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK2 --check-prefix CK2-64 +// RUN: %clang_cc1 -disable-frozen-args -DCK2 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK2 --check-prefix CK2-64 +// RUN: %clang_cc1 -disable-frozen-args -DCK2 -verify -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK2 --check-prefix CK2-32 +// RUN: %clang_cc1 -disable-frozen-args -DCK2 -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK2 --check-prefix CK2-32 + +// RUN: %clang_cc1 -disable-frozen-args -DCK2 -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY1 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK2 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY1 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK2 -verify -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY1 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK2 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY1 %s // SIMD-ONLY1-NOT: {{__kmpc|__tgt}} #ifdef CK2 @@ -172,19 +172,19 @@ // CK2: getelementptr inbounds i32, i32* [[TT]], i32 1 #endif ///==========================================================================/// -// RUN: %clang_cc1 -DCK3 -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK3 --check-prefix CK3-64 -// RUN: %clang_cc1 -DCK3 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK3 --check-prefix CK3-64 -// RUN: %clang_cc1 -DCK3 -verify -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK3 --check-prefix CK3-32 -// RUN: %clang_cc1 -DCK3 -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK3 --check-prefix CK3-32 - -// RUN: %clang_cc1 -DCK3 -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY2 %s -// RUN: %clang_cc1 -DCK3 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY2 %s -// RUN: %clang_cc1 -DCK3 -verify -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY2 %s -// RUN: %clang_cc1 -DCK3 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY2 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK3 -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK3 --check-prefix CK3-64 +// RUN: %clang_cc1 -disable-frozen-args -DCK3 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK3 --check-prefix CK3-64 +// RUN: %clang_cc1 -disable-frozen-args -DCK3 -verify -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK3 --check-prefix CK3-32 +// RUN: %clang_cc1 -disable-frozen-args -DCK3 -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK3 --check-prefix CK3-32 + +// RUN: %clang_cc1 -disable-frozen-args -DCK3 -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY2 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK3 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY2 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK3 -verify -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY2 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK3 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY2 %s // SIMD-ONLY2-NOT: {{__kmpc|__tgt}} #ifdef CK3 @@ -226,19 +226,19 @@ #endif ///==========================================================================/// -// RUN: %clang_cc1 -DCK4 -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK4 --check-prefix CK4-64 -// RUN: %clang_cc1 -DCK4 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK4 --check-prefix CK4-64 -// RUN: %clang_cc1 -DCK4 -verify -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK4 --check-prefix CK4-32 -// RUN: %clang_cc1 -DCK4 -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK4 --check-prefix CK4-32 - -// RUN: %clang_cc1 -DCK4 -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY3 %s -// RUN: %clang_cc1 -DCK4 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY3 %s -// RUN: %clang_cc1 -DCK4 -verify -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY3 %s -// RUN: %clang_cc1 -DCK4 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY3 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK4 -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK4 --check-prefix CK4-64 +// RUN: %clang_cc1 -disable-frozen-args -DCK4 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK4 --check-prefix CK4-64 +// RUN: %clang_cc1 -disable-frozen-args -DCK4 -verify -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK4 --check-prefix CK4-32 +// RUN: %clang_cc1 -disable-frozen-args -DCK4 -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK4 --check-prefix CK4-32 + +// RUN: %clang_cc1 -disable-frozen-args -DCK4 -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY3 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK4 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY3 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK4 -verify -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY3 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK4 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY3 %s // SIMD-ONLY3-NOT: {{__kmpc|__tgt}} #ifdef CK4 @@ -292,19 +292,19 @@ // CK4: define internal void [[KERNELP2]](i32* {{[^,]+}}, i32* {{[^,]+}}, i32* {{[^,]+}}) #endif ///==========================================================================/// -// RUN: %clang_cc1 -DCK5 -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK5 --check-prefix CK5-64 -// RUN: %clang_cc1 -DCK5 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK5 --check-prefix CK5-64 -// RUN: %clang_cc1 -DCK5 -verify -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK5 --check-prefix CK5-32 -// RUN: %clang_cc1 -DCK5 -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK5 --check-prefix CK5-32 - -// RUN: %clang_cc1 -DCK5 -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY4 %s -// RUN: %clang_cc1 -DCK5 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY4 %s -// RUN: %clang_cc1 -DCK5 -verify -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY4 %s -// RUN: %clang_cc1 -DCK5 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY4 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK5 -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK5 --check-prefix CK5-64 +// RUN: %clang_cc1 -disable-frozen-args -DCK5 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK5 --check-prefix CK5-64 +// RUN: %clang_cc1 -disable-frozen-args -DCK5 -verify -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK5 --check-prefix CK5-32 +// RUN: %clang_cc1 -disable-frozen-args -DCK5 -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK5 --check-prefix CK5-32 + +// RUN: %clang_cc1 -disable-frozen-args -DCK5 -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY4 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK5 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY4 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK5 -verify -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY4 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK5 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY4 %s // SIMD-ONLY4-NOT: {{__kmpc|__tgt}} #ifdef CK5 @@ -353,19 +353,19 @@ #endif ///==========================================================================/// -// RUN: %clang_cc1 -DCK6 -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK6 --check-prefix CK6-64 -// RUN: %clang_cc1 -DCK6 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK6 --check-prefix CK6-64 -// RUN: %clang_cc1 -DCK6 -verify -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK6 --check-prefix CK6-32 -// RUN: %clang_cc1 -DCK6 -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK6 --check-prefix CK6-32 - -// RUN: %clang_cc1 -DCK6 -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY5 %s -// RUN: %clang_cc1 -DCK6 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY5 %s -// RUN: %clang_cc1 -DCK6 -verify -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY5 %s -// RUN: %clang_cc1 -DCK6 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY5 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK6 -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK6 --check-prefix CK6-64 +// RUN: %clang_cc1 -disable-frozen-args -DCK6 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK6 --check-prefix CK6-64 +// RUN: %clang_cc1 -disable-frozen-args -DCK6 -verify -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK6 --check-prefix CK6-32 +// RUN: %clang_cc1 -disable-frozen-args -DCK6 -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK6 --check-prefix CK6-32 + +// RUN: %clang_cc1 -disable-frozen-args -DCK6 -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY5 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK6 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY5 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK6 -verify -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY5 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK6 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY5 %s // SIMD-ONLY5-NOT: {{__kmpc|__tgt}} #ifdef CK6 // CK6-LABEL: @.__omp_offloading_{{.*}}implicit_maps_host_global{{.*}}_l397.region_id = weak constant i8 0 @@ -409,19 +409,19 @@ #endif ///==========================================================================/// -// RUN: %clang_cc1 -DCK7 -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK7 --check-prefix CK7-64 -// RUN: %clang_cc1 -DCK7 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK7 --check-prefix CK7-64 -// RUN: %clang_cc1 -DCK7 -verify -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK7 --check-prefix CK7-32 -// RUN: %clang_cc1 -DCK7 -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK7 --check-prefix CK7-32 - -// RUN: %clang_cc1 -DCK7 -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY6 %s -// RUN: %clang_cc1 -DCK7 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY6 %s -// RUN: %clang_cc1 -DCK7 -verify -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY6 %s -// RUN: %clang_cc1 -DCK7 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY6 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK7 -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK7 --check-prefix CK7-64 +// RUN: %clang_cc1 -disable-frozen-args -DCK7 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK7 --check-prefix CK7-64 +// RUN: %clang_cc1 -disable-frozen-args -DCK7 -verify -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK7 --check-prefix CK7-32 +// RUN: %clang_cc1 -disable-frozen-args -DCK7 -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK7 --check-prefix CK7-32 + +// RUN: %clang_cc1 -disable-frozen-args -DCK7 -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY6 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK7 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY6 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK7 -verify -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY6 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK7 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY6 %s // SIMD-ONLY6-NOT: {{__kmpc|__tgt}} #ifdef CK7 @@ -481,19 +481,19 @@ #endif ///==========================================================================/// -// RUN: %clang_cc1 -DCK8 -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK8 -// RUN: %clang_cc1 -DCK8 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK8 -// RUN: %clang_cc1 -DCK8 -verify -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK8 -// RUN: %clang_cc1 -DCK8 -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK8 - -// RUN: %clang_cc1 -DCK8 -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY7 %s -// RUN: %clang_cc1 -DCK8 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY7 %s -// RUN: %clang_cc1 -DCK8 -verify -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY7 %s -// RUN: %clang_cc1 -DCK8 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY7 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK8 -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK8 +// RUN: %clang_cc1 -disable-frozen-args -DCK8 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK8 +// RUN: %clang_cc1 -disable-frozen-args -DCK8 -verify -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK8 +// RUN: %clang_cc1 -disable-frozen-args -DCK8 -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK8 + +// RUN: %clang_cc1 -disable-frozen-args -DCK8 -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY7 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK8 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY7 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK8 -verify -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY7 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK8 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY7 %s // SIMD-ONLY7-NOT: {{__kmpc|__tgt}} #ifdef CK8 @@ -535,19 +535,19 @@ #endif ///==========================================================================/// -// RUN: %clang_cc1 -DCK9 -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK9 -// RUN: %clang_cc1 -DCK9 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK9 -// RUN: %clang_cc1 -DCK9 -verify -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK9 -// RUN: %clang_cc1 -DCK9 -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK9 - -// RUN: %clang_cc1 -DCK9 -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY8 %s -// RUN: %clang_cc1 -DCK9 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY8 %s -// RUN: %clang_cc1 -DCK9 -verify -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY8 %s -// RUN: %clang_cc1 -DCK9 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY8 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK9 -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK9 +// RUN: %clang_cc1 -disable-frozen-args -DCK9 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK9 +// RUN: %clang_cc1 -disable-frozen-args -DCK9 -verify -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK9 +// RUN: %clang_cc1 -disable-frozen-args -DCK9 -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK9 + +// RUN: %clang_cc1 -disable-frozen-args -DCK9 -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY8 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK9 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY8 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK9 -verify -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY8 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK9 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY8 %s // SIMD-ONLY8-NOT: {{__kmpc|__tgt}} #ifdef CK9 @@ -586,19 +586,19 @@ // CK9: {{.+}} = getelementptr inbounds [2 x double], [2 x double]* [[REF]], i{{64|32}} 0, i{{64|32}} 0 #endif ///==========================================================================/// -// RUN: %clang_cc1 -DCK10 -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK10 -// RUN: %clang_cc1 -DCK10 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK10 -// RUN: %clang_cc1 -DCK10 -verify -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK10 -// RUN: %clang_cc1 -DCK10 -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK10 - -// RUN: %clang_cc1 -DCK10 -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY9 %s -// RUN: %clang_cc1 -DCK10 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY9 %s -// RUN: %clang_cc1 -DCK10 -verify -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY9 %s -// RUN: %clang_cc1 -DCK10 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY9 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK10 -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK10 +// RUN: %clang_cc1 -disable-frozen-args -DCK10 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK10 +// RUN: %clang_cc1 -disable-frozen-args -DCK10 -verify -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK10 +// RUN: %clang_cc1 -disable-frozen-args -DCK10 -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK10 + +// RUN: %clang_cc1 -disable-frozen-args -DCK10 -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY9 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK10 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY9 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK10 -verify -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY9 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK10 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY9 %s // SIMD-ONLY9-NOT: {{__kmpc|__tgt}} #ifdef CK10 @@ -638,19 +638,19 @@ #endif ///==========================================================================/// -// RUN: %clang_cc1 -DCK11 -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK11 -// RUN: %clang_cc1 -DCK11 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK11 -// RUN: %clang_cc1 -DCK11 -verify -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK11 -// RUN: %clang_cc1 -DCK11 -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK11 - -// RUN: %clang_cc1 -DCK11 -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY10 %s -// RUN: %clang_cc1 -DCK11 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY10 %s -// RUN: %clang_cc1 -DCK11 -verify -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY10 %s -// RUN: %clang_cc1 -DCK11 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY10 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK11 -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK11 +// RUN: %clang_cc1 -disable-frozen-args -DCK11 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK11 +// RUN: %clang_cc1 -disable-frozen-args -DCK11 -verify -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK11 +// RUN: %clang_cc1 -disable-frozen-args -DCK11 -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK11 + +// RUN: %clang_cc1 -disable-frozen-args -DCK11 -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY10 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK11 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY10 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK11 -verify -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY10 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK11 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY10 %s // SIMD-ONLY10-NOT: {{__kmpc|__tgt}} #ifdef CK11 @@ -688,19 +688,19 @@ // CK11: {{.+}} = getelementptr inbounds { double, double }, { double, double }* [[REF]], i32 0, i32 0 #endif ///==========================================================================/// -// RUN: %clang_cc1 -DCK12 -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK12 --check-prefix CK12-64 -// RUN: %clang_cc1 -DCK12 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK12 --check-prefix CK12-64 -// RUN: %clang_cc1 -DCK12 -verify -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK12 --check-prefix CK12-32 -// RUN: %clang_cc1 -DCK12 -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK12 --check-prefix CK12-32 - -// RUN: %clang_cc1 -DCK12 -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY11 %s -// RUN: %clang_cc1 -DCK12 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY11 %s -// RUN: %clang_cc1 -DCK12 -verify -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY11 %s -// RUN: %clang_cc1 -DCK12 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY11 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK12 -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK12 --check-prefix CK12-64 +// RUN: %clang_cc1 -disable-frozen-args -DCK12 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK12 --check-prefix CK12-64 +// RUN: %clang_cc1 -disable-frozen-args -DCK12 -verify -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK12 --check-prefix CK12-32 +// RUN: %clang_cc1 -disable-frozen-args -DCK12 -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK12 --check-prefix CK12-32 + +// RUN: %clang_cc1 -disable-frozen-args -DCK12 -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY11 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK12 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY11 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK12 -verify -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY11 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK12 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY11 %s // SIMD-ONLY11-NOT: {{__kmpc|__tgt}} #ifdef CK12 @@ -759,19 +759,19 @@ // CK12-32: {{.+}} = getelementptr inbounds { float, float }, { float, float }* [[REF]], i32 0, i32 0 #endif ///==========================================================================/// -// RUN: %clang_cc1 -DCK13 -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK13 -// RUN: %clang_cc1 -DCK13 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK13 -// RUN: %clang_cc1 -DCK13 -verify -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK13 -// RUN: %clang_cc1 -DCK13 -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK13 - -// RUN: %clang_cc1 -DCK13 -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY12 %s -// RUN: %clang_cc1 -DCK13 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY12 %s -// RUN: %clang_cc1 -DCK13 -verify -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY12 %s -// RUN: %clang_cc1 -DCK13 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY12 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK13 -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK13 +// RUN: %clang_cc1 -disable-frozen-args -DCK13 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK13 +// RUN: %clang_cc1 -disable-frozen-args -DCK13 -verify -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK13 +// RUN: %clang_cc1 -disable-frozen-args -DCK13 -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK13 + +// RUN: %clang_cc1 -disable-frozen-args -DCK13 -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY12 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK13 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY12 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK13 -verify -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY12 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK13 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY12 %s // SIMD-ONLY12-NOT: {{__kmpc|__tgt}} #ifdef CK13 @@ -841,19 +841,19 @@ // CK13: {{.+}} = getelementptr inbounds double, double* [[REF]], i[[sz]] %{{.+}} #endif ///==========================================================================/// -// RUN: %clang_cc1 -DCK14 -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK14 --check-prefix CK14-64 -// RUN: %clang_cc1 -DCK14 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK14 --check-prefix CK14-64 -// RUN: %clang_cc1 -DCK14 -verify -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK14 --check-prefix CK14-32 -// RUN: %clang_cc1 -DCK14 -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK14 --check-prefix CK14-32 - -// RUN: %clang_cc1 -DCK14 -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY13 %s -// RUN: %clang_cc1 -DCK14 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY13 %s -// RUN: %clang_cc1 -DCK14 -verify -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY13 %s -// RUN: %clang_cc1 -DCK14 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY13 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK14 -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK14 --check-prefix CK14-64 +// RUN: %clang_cc1 -disable-frozen-args -DCK14 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK14 --check-prefix CK14-64 +// RUN: %clang_cc1 -disable-frozen-args -DCK14 -verify -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK14 --check-prefix CK14-32 +// RUN: %clang_cc1 -disable-frozen-args -DCK14 -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK14 --check-prefix CK14-32 + +// RUN: %clang_cc1 -disable-frozen-args -DCK14 -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY13 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK14 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY13 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK14 -verify -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY13 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK14 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY13 %s // SIMD-ONLY13-NOT: {{__kmpc|__tgt}} #ifdef CK14 @@ -950,19 +950,19 @@ #endif ///==========================================================================/// -// RUN: %clang_cc1 -DCK15 -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK15 --check-prefix CK15-64 -// RUN: %clang_cc1 -DCK15 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK15 --check-prefix CK15-64 -// RUN: %clang_cc1 -DCK15 -verify -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK15 --check-prefix CK15-32 -// RUN: %clang_cc1 -DCK15 -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK15 --check-prefix CK15-32 - -// RUN: %clang_cc1 -DCK15 -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY14 %s -// RUN: %clang_cc1 -DCK15 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY14 %s -// RUN: %clang_cc1 -DCK15 -verify -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY14 %s -// RUN: %clang_cc1 -DCK15 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY14 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK15 -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK15 --check-prefix CK15-64 +// RUN: %clang_cc1 -disable-frozen-args -DCK15 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK15 --check-prefix CK15-64 +// RUN: %clang_cc1 -disable-frozen-args -DCK15 -verify -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK15 --check-prefix CK15-32 +// RUN: %clang_cc1 -disable-frozen-args -DCK15 -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK15 --check-prefix CK15-32 + +// RUN: %clang_cc1 -disable-frozen-args -DCK15 -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY14 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK15 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY14 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK15 -verify -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY14 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK15 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY14 %s // SIMD-ONLY14-NOT: {{__kmpc|__tgt}} #ifdef CK15 @@ -1129,19 +1129,19 @@ #endif ///==========================================================================/// -// RUN: %clang_cc1 -DCK16 -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK16 --check-prefix CK16-64 -// RUN: %clang_cc1 -DCK16 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK16 --check-prefix CK16-64 -// RUN: %clang_cc1 -DCK16 -verify -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK16 --check-prefix CK16-32 -// RUN: %clang_cc1 -DCK16 -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK16 --check-prefix CK16-32 - -// RUN: %clang_cc1 -DCK16 -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY15 %s -// RUN: %clang_cc1 -DCK16 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY15 %s -// RUN: %clang_cc1 -DCK16 -verify -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY15 %s -// RUN: %clang_cc1 -DCK16 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY15 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK16 -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK16 --check-prefix CK16-64 +// RUN: %clang_cc1 -disable-frozen-args -DCK16 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK16 --check-prefix CK16-64 +// RUN: %clang_cc1 -disable-frozen-args -DCK16 -verify -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK16 --check-prefix CK16-32 +// RUN: %clang_cc1 -disable-frozen-args -DCK16 -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK16 --check-prefix CK16-32 + +// RUN: %clang_cc1 -disable-frozen-args -DCK16 -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY15 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK16 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY15 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK16 -verify -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY15 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK16 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY15 %s // SIMD-ONLY15-NOT: {{__kmpc|__tgt}} #ifdef CK16 @@ -1190,19 +1190,19 @@ #endif ///==========================================================================/// -// RUN: %clang_cc1 -DCK17 -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK17 -// RUN: %clang_cc1 -DCK17 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK17 -// RUN: %clang_cc1 -DCK17 -verify -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK17 -// RUN: %clang_cc1 -DCK17 -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK17 - -// RUN: %clang_cc1 -DCK17 -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY16 %s -// RUN: %clang_cc1 -DCK17 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY16 %s -// RUN: %clang_cc1 -DCK17 -verify -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY16 %s -// RUN: %clang_cc1 -DCK17 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY16 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK17 -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK17 +// RUN: %clang_cc1 -disable-frozen-args -DCK17 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK17 +// RUN: %clang_cc1 -disable-frozen-args -DCK17 -verify -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK17 +// RUN: %clang_cc1 -disable-frozen-args -DCK17 -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK17 + +// RUN: %clang_cc1 -disable-frozen-args -DCK17 -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY16 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK17 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY16 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK17 -verify -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY16 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK17 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY16 %s // SIMD-ONLY16-NOT: {{__kmpc|__tgt}} #ifdef CK17 @@ -1247,19 +1247,19 @@ // CK17: {{.+}} = getelementptr inbounds [[ST]], [[ST]]* [[REF]], i32 0, i32 0 #endif ///==========================================================================/// -// RUN: %clang_cc1 -DCK18 -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK18 --check-prefix CK18-64 -// RUN: %clang_cc1 -DCK18 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK18 --check-prefix CK18-64 -// RUN: %clang_cc1 -DCK18 -verify -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK18 --check-prefix CK18-32 -// RUN: %clang_cc1 -DCK18 -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK18 --check-prefix CK18-32 - -// RUN: %clang_cc1 -DCK18 -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY17 %s -// RUN: %clang_cc1 -DCK18 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY17 %s -// RUN: %clang_cc1 -DCK18 -verify -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY17 %s -// RUN: %clang_cc1 -DCK18 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY17 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK18 -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK18 --check-prefix CK18-64 +// RUN: %clang_cc1 -disable-frozen-args -DCK18 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK18 --check-prefix CK18-64 +// RUN: %clang_cc1 -disable-frozen-args -DCK18 -verify -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK18 --check-prefix CK18-32 +// RUN: %clang_cc1 -disable-frozen-args -DCK18 -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK18 --check-prefix CK18-32 + +// RUN: %clang_cc1 -disable-frozen-args -DCK18 -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY17 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK18 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY17 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK18 -verify -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY17 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK18 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY17 %s // SIMD-ONLY17-NOT: {{__kmpc|__tgt}} #ifdef CK18 @@ -1307,19 +1307,19 @@ #endif ///==========================================================================/// -// RUN: %clang_cc1 -DCK19 -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK19 --check-prefix CK19-64 -// RUN: %clang_cc1 -DCK19 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK19 --check-prefix CK19-64 -// RUN: %clang_cc1 -DCK19 -verify -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK19 --check-prefix CK19-32 -// RUN: %clang_cc1 -DCK19 -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK19 --check-prefix CK19-32 - -// RUN: %clang_cc1 -DCK19 -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY18 %s -// RUN: %clang_cc1 -DCK19 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY18 %s -// RUN: %clang_cc1 -DCK19 -verify -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY18 %s -// RUN: %clang_cc1 -DCK19 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY18 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK19 -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK19 --check-prefix CK19-64 +// RUN: %clang_cc1 -disable-frozen-args -DCK19 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK19 --check-prefix CK19-64 +// RUN: %clang_cc1 -disable-frozen-args -DCK19 -verify -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK19 --check-prefix CK19-32 +// RUN: %clang_cc1 -disable-frozen-args -DCK19 -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK19 --check-prefix CK19-32 + +// RUN: %clang_cc1 -disable-frozen-args -DCK19 -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY18 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK19 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY18 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK19 -verify -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY18 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK19 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY18 %s // SIMD-ONLY18-NOT: {{__kmpc|__tgt}} #ifdef CK19 @@ -2798,19 +2798,19 @@ #endif ///==========================================================================/// -// RUN: %clang_cc1 -DCK20 -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK20 --check-prefix CK20-64 -// RUN: %clang_cc1 -DCK20 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK20 --check-prefix CK20-64 -// RUN: %clang_cc1 -DCK20 -verify -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK20 --check-prefix CK20-32 -// RUN: %clang_cc1 -DCK20 -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK20 --check-prefix CK20-32 - -// RUN: %clang_cc1 -DCK20 -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY19 %s -// RUN: %clang_cc1 -DCK20 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY19 %s -// RUN: %clang_cc1 -DCK20 -verify -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY19 %s -// RUN: %clang_cc1 -DCK20 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY19 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK20 -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK20 --check-prefix CK20-64 +// RUN: %clang_cc1 -disable-frozen-args -DCK20 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK20 --check-prefix CK20-64 +// RUN: %clang_cc1 -disable-frozen-args -DCK20 -verify -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK20 --check-prefix CK20-32 +// RUN: %clang_cc1 -disable-frozen-args -DCK20 -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK20 --check-prefix CK20-32 + +// RUN: %clang_cc1 -disable-frozen-args -DCK20 -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY19 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK20 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY19 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK20 -verify -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY19 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK20 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY19 %s // SIMD-ONLY19-NOT: {{__kmpc|__tgt}} #ifdef CK20 @@ -2926,19 +2926,19 @@ #endif ///==========================================================================/// -// RUN: %clang_cc1 -DCK21 -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK21 --check-prefix CK21-64 -// RUN: %clang_cc1 -DCK21 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK21 --check-prefix CK21-64 -// RUN: %clang_cc1 -DCK21 -verify -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK21 --check-prefix CK21-32 -// RUN: %clang_cc1 -DCK21 -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK21 --check-prefix CK21-32 - -// RUN: %clang_cc1 -DCK21 -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY20 %s -// RUN: %clang_cc1 -DCK21 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY20 %s -// RUN: %clang_cc1 -DCK21 -verify -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY20 %s -// RUN: %clang_cc1 -DCK21 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY20 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK21 -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK21 --check-prefix CK21-64 +// RUN: %clang_cc1 -disable-frozen-args -DCK21 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK21 --check-prefix CK21-64 +// RUN: %clang_cc1 -disable-frozen-args -DCK21 -verify -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK21 --check-prefix CK21-32 +// RUN: %clang_cc1 -disable-frozen-args -DCK21 -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK21 --check-prefix CK21-32 + +// RUN: %clang_cc1 -disable-frozen-args -DCK21 -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY20 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK21 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY20 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK21 -verify -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY20 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK21 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY20 %s // SIMD-ONLY20-NOT: {{__kmpc|__tgt}} #ifdef CK21 // CK21: [[ST:%.+]] = type { i32, i32, float* } @@ -3158,19 +3158,19 @@ // CK21: define {{.+}}[[CALL05]] #endif ///==========================================================================/// -// RUN: %clang_cc1 -DCK22 -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK22 --check-prefix CK22-64 -// RUN: %clang_cc1 -DCK22 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK22 --check-prefix CK22-64 -// RUN: %clang_cc1 -DCK22 -verify -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK22 --check-prefix CK22-32 -// RUN: %clang_cc1 -DCK22 -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK22 --check-prefix CK22-32 - -// RUN: %clang_cc1 -DCK22 -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY21 %s -// RUN: %clang_cc1 -DCK22 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY21 %s -// RUN: %clang_cc1 -DCK22 -verify -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY21 %s -// RUN: %clang_cc1 -DCK22 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY21 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK22 -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK22 --check-prefix CK22-64 +// RUN: %clang_cc1 -disable-frozen-args -DCK22 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK22 --check-prefix CK22-64 +// RUN: %clang_cc1 -disable-frozen-args -DCK22 -verify -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK22 --check-prefix CK22-32 +// RUN: %clang_cc1 -disable-frozen-args -DCK22 -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK22 --check-prefix CK22-32 + +// RUN: %clang_cc1 -disable-frozen-args -DCK22 -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY21 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK22 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY21 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK22 -verify -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY21 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK22 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY21 %s // SIMD-ONLY21-NOT: {{__kmpc|__tgt}} #ifdef CK22 @@ -3528,19 +3528,19 @@ // CK22: define {{.+}}[[CALL14]] #endif ///==========================================================================/// -// RUN: %clang_cc1 -std=c++11 -DCK23 -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK23 --check-prefix CK23-64 -// RUN: %clang_cc1 -std=c++11 -DCK23 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -std=c++11 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK23 --check-prefix CK23-64 -// RUN: %clang_cc1 -std=c++11 -DCK23 -verify -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK23 --check-prefix CK23-32 -// RUN: %clang_cc1 -std=c++11 -DCK23 -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -std=c++11 -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK23 --check-prefix CK23-32 - -// RUN: %clang_cc1 -std=c++11 -DCK23 -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY22 %s -// RUN: %clang_cc1 -std=c++11 -DCK23 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -std=c++11 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY22 %s -// RUN: %clang_cc1 -std=c++11 -DCK23 -verify -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY22 %s -// RUN: %clang_cc1 -std=c++11 -DCK23 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -std=c++11 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY22 %s +// RUN: %clang_cc1 -disable-frozen-args -std=c++11 -DCK23 -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK23 --check-prefix CK23-64 +// RUN: %clang_cc1 -disable-frozen-args -std=c++11 -DCK23 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -std=c++11 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK23 --check-prefix CK23-64 +// RUN: %clang_cc1 -disable-frozen-args -std=c++11 -DCK23 -verify -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK23 --check-prefix CK23-32 +// RUN: %clang_cc1 -disable-frozen-args -std=c++11 -DCK23 -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -std=c++11 -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK23 --check-prefix CK23-32 + +// RUN: %clang_cc1 -disable-frozen-args -std=c++11 -DCK23 -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY22 %s +// RUN: %clang_cc1 -disable-frozen-args -std=c++11 -DCK23 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -std=c++11 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY22 %s +// RUN: %clang_cc1 -disable-frozen-args -std=c++11 -DCK23 -verify -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY22 %s +// RUN: %clang_cc1 -disable-frozen-args -std=c++11 -DCK23 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -std=c++11 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY22 %s // SIMD-ONLY22-NOT: {{__kmpc|__tgt}} #ifdef CK23 @@ -3709,19 +3709,19 @@ // CK23: define {{.+}}[[CALL05]] #endif ///==========================================================================/// -// RUN: %clang_cc1 -DCK24 -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK24 --check-prefix CK24-64 -// RUN: %clang_cc1 -DCK24 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK24 --check-prefix CK24-64 -// RUN: %clang_cc1 -DCK24 -verify -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK24 --check-prefix CK24-32 -// RUN: %clang_cc1 -DCK24 -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK24 --check-prefix CK24-32 - -// RUN: %clang_cc1 -DCK24 -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY23 %s -// RUN: %clang_cc1 -DCK24 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY23 %s -// RUN: %clang_cc1 -DCK24 -verify -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY23 %s -// RUN: %clang_cc1 -DCK24 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY23 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK24 -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK24 --check-prefix CK24-64 +// RUN: %clang_cc1 -disable-frozen-args -DCK24 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK24 --check-prefix CK24-64 +// RUN: %clang_cc1 -disable-frozen-args -DCK24 -verify -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK24 --check-prefix CK24-32 +// RUN: %clang_cc1 -disable-frozen-args -DCK24 -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK24 --check-prefix CK24-32 + +// RUN: %clang_cc1 -disable-frozen-args -DCK24 -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY23 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK24 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY23 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK24 -verify -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY23 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK24 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY23 %s // SIMD-ONLY23-NOT: {{__kmpc|__tgt}} #ifdef CK24 @@ -4324,19 +4324,19 @@ // CK24: define {{.+}}[[CALL24]] #endif ///==========================================================================/// -// RUN: %clang_cc1 -DCK25 -std=c++11 -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK25 --check-prefix CK25-64 -// RUN: %clang_cc1 -DCK25 -std=c++11 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp -std=c++11 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK25 --check-prefix CK25-64 -// RUN: %clang_cc1 -DCK25 -std=c++11 -verify -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK25 --check-prefix CK25-32 -// RUN: %clang_cc1 -DCK25 -std=c++11 -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp -std=c++11 -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK25 --check-prefix CK25-32 - -// RUN: %clang_cc1 -DCK25 -std=c++11 -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY24 %s -// RUN: %clang_cc1 -DCK25 -std=c++11 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp-simd -std=c++11 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY24 %s -// RUN: %clang_cc1 -DCK25 -std=c++11 -verify -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY24 %s -// RUN: %clang_cc1 -DCK25 -std=c++11 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp-simd -std=c++11 -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY24 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK25 -std=c++11 -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK25 --check-prefix CK25-64 +// RUN: %clang_cc1 -disable-frozen-args -DCK25 -std=c++11 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -std=c++11 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK25 --check-prefix CK25-64 +// RUN: %clang_cc1 -disable-frozen-args -DCK25 -std=c++11 -verify -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK25 --check-prefix CK25-32 +// RUN: %clang_cc1 -disable-frozen-args -DCK25 -std=c++11 -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -std=c++11 -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK25 --check-prefix CK25-32 + +// RUN: %clang_cc1 -disable-frozen-args -DCK25 -std=c++11 -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY24 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK25 -std=c++11 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp-simd -std=c++11 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY24 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK25 -std=c++11 -verify -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY24 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK25 -std=c++11 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp-simd -std=c++11 -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY24 %s // SIMD-ONLY24-NOT: {{__kmpc|__tgt}} #ifdef CK25 // CK25: [[ST:%.+]] = type { i32, float } @@ -4439,19 +4439,19 @@ // CK25: define {{.+}}[[LAMBDA2]] #endif ///==========================================================================/// -// RUN: %clang_cc1 -DCK26 -std=c++11 -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK26 --check-prefix CK26-64 -// RUN: %clang_cc1 -DCK26 -std=c++11 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp -std=c++11 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK26 --check-prefix CK26-64 -// RUN: %clang_cc1 -DCK26 -std=c++11 -verify -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK26 --check-prefix CK26-32 -// RUN: %clang_cc1 -DCK26 -std=c++11 -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp -std=c++11 -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK26 --check-prefix CK26-32 - -// RUN: %clang_cc1 -DCK26 -std=c++11 -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY25 %s -// RUN: %clang_cc1 -DCK26 -std=c++11 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp-simd -std=c++11 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY25 %s -// RUN: %clang_cc1 -DCK26 -std=c++11 -verify -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY25 %s -// RUN: %clang_cc1 -DCK26 -std=c++11 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp-simd -std=c++11 -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY25 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK26 -std=c++11 -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK26 --check-prefix CK26-64 +// RUN: %clang_cc1 -disable-frozen-args -DCK26 -std=c++11 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -std=c++11 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK26 --check-prefix CK26-64 +// RUN: %clang_cc1 -disable-frozen-args -DCK26 -std=c++11 -verify -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK26 --check-prefix CK26-32 +// RUN: %clang_cc1 -disable-frozen-args -DCK26 -std=c++11 -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -std=c++11 -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK26 --check-prefix CK26-32 + +// RUN: %clang_cc1 -disable-frozen-args -DCK26 -std=c++11 -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY25 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK26 -std=c++11 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp-simd -std=c++11 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY25 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK26 -std=c++11 -verify -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY25 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK26 -std=c++11 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp-simd -std=c++11 -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY25 %s // SIMD-ONLY25-NOT: {{__kmpc|__tgt}} #ifdef CK26 // CK26: [[ST:%.+]] = type { i32, float*, i32, float* } @@ -4643,19 +4643,19 @@ } #endif ///==========================================================================/// -// RUN: %clang_cc1 -DCK27 -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK27 --check-prefix CK27-64 -// RUN: %clang_cc1 -DCK27 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK27 --check-prefix CK27-64 -// RUN: %clang_cc1 -DCK27 -verify -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK27 --check-prefix CK27-32 -// RUN: %clang_cc1 -DCK27 -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK27 --check-prefix CK27-32 - -// RUN: %clang_cc1 -DCK27 -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY26 %s -// RUN: %clang_cc1 -DCK27 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY26 %s -// RUN: %clang_cc1 -DCK27 -verify -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY26 %s -// RUN: %clang_cc1 -DCK27 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY26 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK27 -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK27 --check-prefix CK27-64 +// RUN: %clang_cc1 -disable-frozen-args -DCK27 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK27 --check-prefix CK27-64 +// RUN: %clang_cc1 -disable-frozen-args -DCK27 -verify -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK27 --check-prefix CK27-32 +// RUN: %clang_cc1 -disable-frozen-args -DCK27 -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK27 --check-prefix CK27-32 + +// RUN: %clang_cc1 -disable-frozen-args -DCK27 -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY26 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK27 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY26 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK27 -verify -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY26 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK27 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY26 %s // SIMD-ONLY26-NOT: {{__kmpc|__tgt}} #ifdef CK27 @@ -4872,19 +4872,19 @@ // CK27: define {{.+}}[[CALL07]] #endif ///==========================================================================/// -// RUN: %clang_cc1 -DCK28 -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK28 --check-prefix CK28-64 -// RUN: %clang_cc1 -DCK28 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK28 --check-prefix CK28-64 -// RUN: %clang_cc1 -DCK28 -verify -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK28 --check-prefix CK28-32 -// RUN: %clang_cc1 -DCK28 -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK28 --check-prefix CK28-32 - -// RUN: %clang_cc1 -DCK28 -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY27 %s -// RUN: %clang_cc1 -DCK28 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY27 %s -// RUN: %clang_cc1 -DCK28 -verify -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY27 %s -// RUN: %clang_cc1 -DCK28 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY27 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK28 -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK28 --check-prefix CK28-64 +// RUN: %clang_cc1 -disable-frozen-args -DCK28 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK28 --check-prefix CK28-64 +// RUN: %clang_cc1 -disable-frozen-args -DCK28 -verify -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK28 --check-prefix CK28-32 +// RUN: %clang_cc1 -disable-frozen-args -DCK28 -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK28 --check-prefix CK28-32 + +// RUN: %clang_cc1 -disable-frozen-args -DCK28 -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY27 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK28 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY27 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK28 -verify -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY27 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK28 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY27 %s // SIMD-ONLY27-NOT: {{__kmpc|__tgt}} #ifdef CK28 @@ -4945,19 +4945,19 @@ } #endif ///==========================================================================/// -// RUN: %clang_cc1 -DCK29 -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK29 --check-prefix CK29-64 -// RUN: %clang_cc1 -DCK29 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK29 --check-prefix CK29-64 -// RUN: %clang_cc1 -DCK29 -verify -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK29 --check-prefix CK29-32 -// RUN: %clang_cc1 -DCK29 -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK29 --check-prefix CK29-32 - -// RUN: %clang_cc1 -DCK29 -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY28 %s -// RUN: %clang_cc1 -DCK29 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY28 %s -// RUN: %clang_cc1 -DCK29 -verify -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY28 %s -// RUN: %clang_cc1 -DCK29 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY28 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK29 -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK29 --check-prefix CK29-64 +// RUN: %clang_cc1 -disable-frozen-args -DCK29 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK29 --check-prefix CK29-64 +// RUN: %clang_cc1 -disable-frozen-args -DCK29 -verify -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK29 --check-prefix CK29-32 +// RUN: %clang_cc1 -disable-frozen-args -DCK29 -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK29 --check-prefix CK29-32 + +// RUN: %clang_cc1 -disable-frozen-args -DCK29 -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY28 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK29 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY28 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK29 -verify -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY28 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK29 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY28 %s // SIMD-ONLY28-NOT: {{__kmpc|__tgt}} #ifdef CK29 @@ -5134,19 +5134,19 @@ } #endif ///==========================================================================/// -// RUN: %clang_cc1 -DCK30 -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK30 --check-prefix CK30-64 -// RUN: %clang_cc1 -DCK30 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK30 --check-prefix CK30-64 -// RUN: %clang_cc1 -DCK30 -verify -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK30 --check-prefix CK30-32 -// RUN: %clang_cc1 -DCK30 -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK30 --check-prefix CK30-32 - -// RUN: %clang_cc1 -DCK30 -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY30 %s -// RUN: %clang_cc1 -DCK30 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY30 %s -// RUN: %clang_cc1 -DCK30 -verify -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY30 %s -// RUN: %clang_cc1 -DCK30 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY30 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK30 -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK30 --check-prefix CK30-64 +// RUN: %clang_cc1 -disable-frozen-args -DCK30 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK30 --check-prefix CK30-64 +// RUN: %clang_cc1 -disable-frozen-args -DCK30 -verify -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK30 --check-prefix CK30-32 +// RUN: %clang_cc1 -disable-frozen-args -DCK30 -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK30 --check-prefix CK30-32 + +// RUN: %clang_cc1 -disable-frozen-args -DCK30 -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY30 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK30 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY30 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK30 -verify -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY30 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK30 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY30 %s // SIMD-ONLY30-NOT: {{__kmpc|__tgt}} #ifdef CK30 @@ -5283,19 +5283,19 @@ #endif ///==========================================================================/// -// RUN: %clang_cc1 -DCK31 -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK31 --check-prefix CK31-64 -// RUN: %clang_cc1 -DCK31 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK31 --check-prefix CK31-64 -// RUN: %clang_cc1 -DCK31 -verify -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK31 --check-prefix CK31-32 -// RUN: %clang_cc1 -DCK31 -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK31 --check-prefix CK31-32 - -// RUN: %clang_cc1 -DCK31 -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY18 %s -// RUN: %clang_cc1 -DCK31 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY18 %s -// RUN: %clang_cc1 -DCK31 -verify -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY18 %s -// RUN: %clang_cc1 -DCK31 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY18 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK31 -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK31 --check-prefix CK31-64 +// RUN: %clang_cc1 -disable-frozen-args -DCK31 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK31 --check-prefix CK31-64 +// RUN: %clang_cc1 -disable-frozen-args -DCK31 -verify -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK31 --check-prefix CK31-32 +// RUN: %clang_cc1 -disable-frozen-args -DCK31 -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix CK31 --check-prefix CK31-32 + +// RUN: %clang_cc1 -disable-frozen-args -DCK31 -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY18 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK31 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY18 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK31 -verify -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY18 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK31 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY18 %s // SIMD-ONLY18-NOT: {{__kmpc|__tgt}} #ifdef CK31 @@ -5355,19 +5355,19 @@ #endif ///==========================================================================/// -// RUN: %clang_cc1 -DCK32 -verify -fopenmp -fopenmp-version=50 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix CK32 --check-prefix CK32-64 -// RUN: %clang_cc1 -DCK32 -fopenmp -fopenmp-version=50 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp -fopenmp-version=50 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix CK32 --check-prefix CK32-64 -// RUN: %clang_cc1 -DCK32 -verify -fopenmp -fopenmp-version=50 -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix CK32 --check-prefix CK32-32 -// RUN: %clang_cc1 -DCK32 -fopenmp -fopenmp-version=50 -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp -fopenmp-version=50 -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix CK32 --check-prefix CK32-32 - -// RUN: %clang_cc1 -DCK32 -verify -fopenmp-simd -fopenmp-version=50 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck --check-prefix SIMD-ONLY32 %s -// RUN: %clang_cc1 -DCK32 -fopenmp-simd -fopenmp-version=50 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=50 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY32 %s -// RUN: %clang_cc1 -DCK32 -verify -fopenmp-simd -fopenmp-version=50 -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck --check-prefix SIMD-ONLY32 %s -// RUN: %clang_cc1 -DCK32 -fopenmp-simd -fopenmp-version=50 -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=50 -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY32 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK32 -verify -fopenmp -fopenmp-version=50 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix CK32 --check-prefix CK32-64 +// RUN: %clang_cc1 -disable-frozen-args -DCK32 -fopenmp -fopenmp-version=50 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -fopenmp-version=50 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix CK32 --check-prefix CK32-64 +// RUN: %clang_cc1 -disable-frozen-args -DCK32 -verify -fopenmp -fopenmp-version=50 -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix CK32 --check-prefix CK32-32 +// RUN: %clang_cc1 -disable-frozen-args -DCK32 -fopenmp -fopenmp-version=50 -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -fopenmp-version=50 -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix CK32 --check-prefix CK32-32 + +// RUN: %clang_cc1 -disable-frozen-args -DCK32 -verify -fopenmp-simd -fopenmp-version=50 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck --check-prefix SIMD-ONLY32 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK32 -fopenmp-simd -fopenmp-version=50 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp-simd -fopenmp-version=50 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY32 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK32 -verify -fopenmp-simd -fopenmp-version=50 -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck --check-prefix SIMD-ONLY32 %s +// RUN: %clang_cc1 -disable-frozen-args -DCK32 -fopenmp-simd -fopenmp-version=50 -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp-simd -fopenmp-version=50 -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY32 %s // SIMD-ONLY32-NOT: {{__kmpc|__tgt}} #ifdef CK32 diff --git a/clang/test/OpenMP/target_parallel_codegen.cpp b/clang/test/OpenMP/target_parallel_codegen.cpp --- a/clang/test/OpenMP/target_parallel_codegen.cpp +++ b/clang/test/OpenMP/target_parallel_codegen.cpp @@ -314,12 +314,12 @@ // CHECK: call {{.*}}void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* [[DEF_LOC]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* [[OMP_OUTLINED:@.+]] to void (i32*, i32*, ...)*)) // // -// CHECK: define internal {{.*}}void [[OMP_OUTLINED]](i32* noalias %.global_tid., i32* noalias %.bound_tid.) +// CHECK: define internal {{.*}}void [[OMP_OUTLINED]](i32* frozen noalias %.global_tid., i32* frozen noalias %.bound_tid.) // CHECK: ret void // CHECK-NEXT: } -// CHECK: define internal void [[HVT1]](i[[SZ]] %{{.+}}) +// CHECK: define internal void [[HVT1]](i[[SZ]] frozen %{{.+}}) // Create stack storage and store argument in there. // CHECK: [[AA_ADDR:%.+]] = alloca i[[SZ]], align // CHECK: [[AA_CASTED:%.+]] = alloca i[[SZ]], align @@ -334,7 +334,7 @@ // CHECK: call {{.*}}void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* [[DEF_LOC]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i[[SZ]])* [[OMP_OUTLINED1:@.+]] to void (i32*, i32*, ...)*), i[[SZ]] [[PARAM]]) // // -// CHECK: define internal {{.*}}void [[OMP_OUTLINED1]](i32* noalias %.global_tid., i32* noalias %.bound_tid., i[[SZ]] %{{.+}}) +// CHECK: define internal {{.*}}void [[OMP_OUTLINED1]](i32* frozen noalias %.global_tid., i32* frozen noalias %.bound_tid., i[[SZ]] frozen %{{.+}}) // CHECK: [[AA_ADDR:%.+]] = alloca i[[SZ]], align // CHECK: store i[[SZ]] %{{.+}}, i[[SZ]]* [[AA_ADDR]], align // CHECK-64: [[AA_CADDR:%.+]] = bitcast i[[SZ]]* [[AA_ADDR]] to i32* @@ -343,7 +343,7 @@ // CHECK: ret void // CHECK-NEXT: } -// CHECK: define internal void [[HVT2]](i[[SZ]] %{{.+}}) +// CHECK: define internal void [[HVT2]](i[[SZ]] frozen %{{.+}}) // Create stack storage and store argument in there. // CHECK: [[AA_ADDR:%.+]] = alloca i[[SZ]], align // CHECK: [[AA_CASTED:%.+]] = alloca i[[SZ]], align @@ -356,7 +356,7 @@ // CHECK: call {{.*}}void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* [[DEF_LOC]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i[[SZ]])* [[OMP_OUTLINED2:@.+]] to void (i32*, i32*, ...)*), i[[SZ]] [[PARAM]]) // // -// CHECK: define internal {{.*}}void [[OMP_OUTLINED2]](i32* noalias %.global_tid., i32* noalias %.bound_tid., i[[SZ]] %{{.+}}) +// CHECK: define internal {{.*}}void [[OMP_OUTLINED2]](i32* frozen noalias %.global_tid., i32* frozen noalias %.bound_tid., i[[SZ]] frozen %{{.+}}) // CHECK: [[AA_ADDR:%.+]] = alloca i[[SZ]], align // CHECK: store i[[SZ]] %{{.+}}, i[[SZ]]* [[AA_ADDR]], align // CHECK: [[AA_CADDR:%.+]] = bitcast i[[SZ]]* [[AA_ADDR]] to i16* @@ -393,7 +393,7 @@ // CHECK-DAG: call {{.*}}void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* [[DEF_LOC]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i[[SZ]], i[[SZ]])* [[OMP_OUTLINED3:@.+]] to void (i32*, i32*, ...)*), i[[SZ]] [[PARAM1]], i[[SZ]] [[PARAM2]]) // // -// CHECK: define internal {{.*}}void [[OMP_OUTLINED3]](i32* noalias %.global_tid., i32* noalias %.bound_tid., i[[SZ]] %{{.+}}, i[[SZ]] %{{.+}}) +// CHECK: define internal {{.*}}void [[OMP_OUTLINED3]](i32* frozen noalias %.global_tid., i32* frozen noalias %.bound_tid., i[[SZ]] frozen %{{.+}}, i[[SZ]] frozen %{{.+}}) // CHECK: [[A_ADDR:%.+]] = alloca i[[SZ]], align // CHECK: [[AA_ADDR:%.+]] = alloca i[[SZ]], align // CHECK-DAG: store i[[SZ]] %{{.+}}, i[[SZ]]* [[A_ADDR]], align @@ -445,7 +445,7 @@ // CHECK: call {{.*}}void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* [[DEF_LOC]], i32 9, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i[[SZ]], [10 x float]*, i[[SZ]], float*, [5 x [10 x double]]*, i[[SZ]], i[[SZ]], double*, [[TT]]*)* [[OMP_OUTLINED4:@.+]] to void (i32*, i32*, ...)*), i[[SZ]] [[REF_A]], [10 x float]* [[REF_B]], i[[SZ]] [[VAL_VLA1]], float* [[REF_BN]], [5 x [10 x double]]* [[REF_C]], i[[SZ]] [[VAL_VLA2]], i[[SZ]] [[VAL_VLA3]], double* [[REF_CN]], [[TT]]* [[REF_D]]) // // -// CHECK: define internal {{.*}}void [[OMP_OUTLINED4]](i32* noalias %.global_tid., i32* noalias %.bound_tid., i[[SZ]] %{{.+}}, [10 x float]* {{.+}}, i[[SZ]] %{{.+}}, float* {{.+}}, [5 x [10 x double]]* {{.+}}, i[[SZ]] %{{.+}}, i[[SZ]] %{{.+}}, double* {{.+}}, [[TT]]* {{.+}}) +// CHECK: define internal {{.*}}void [[OMP_OUTLINED4]](i32* frozen noalias %.global_tid., i32* frozen noalias %.bound_tid., i[[SZ]] frozen %{{.+}}, [10 x float]* {{.+}}, i[[SZ]] frozen %{{.+}}, float* {{.+}}, [5 x [10 x double]]* {{.+}}, i[[SZ]] frozen %{{.+}}, i[[SZ]] frozen %{{.+}}, double* {{.+}}, [[TT]]* {{.+}}) // To reduce complexity, we're only going as far as validating the signature of the outlined parallel function. template @@ -727,7 +727,7 @@ // CHECK: call {{.*}}void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* [[DEF_LOC]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [[S1]]*, i[[SZ]], i[[SZ]], i[[SZ]], i16*)* [[OMP_OUTLINED5:@.+]] to void (i32*, i32*, ...)*), [[S1]]* [[REF_THIS]], i[[SZ]] [[REF_B]], i[[SZ]] [[VAL_VLA1]], i[[SZ]] [[VAL_VLA2]], i16* [[REF_C]]) // // -// CHECK: define internal {{.*}}void [[OMP_OUTLINED5]](i32* noalias %.global_tid., i32* noalias %.bound_tid., [[S1]]* %{{.+}}, i[[SZ]] %{{.+}}, i[[SZ]] %{{.+}}, i[[SZ]] %{{.+}}, i16* {{.+}}) +// CHECK: define internal {{.*}}void [[OMP_OUTLINED5]](i32* frozen noalias %.global_tid., i32* frozen noalias %.bound_tid., [[S1]]* frozen %{{.+}}, i[[SZ]] frozen %{{.+}}, i[[SZ]] frozen %{{.+}}, i[[SZ]] frozen %{{.+}}, i16* {{.+}}) // To reduce complexity, we're only going as far as validating the signature of the outlined parallel function. @@ -770,7 +770,7 @@ // CHECK: call {{.*}}void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* [[DEF_LOC]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i[[SZ]], i[[SZ]], i[[SZ]], [10 x i32]*)* [[OMP_OUTLINED6:@.+]] to void (i32*, i32*, ...)*), i[[SZ]] [[REF_A]], i[[SZ]] [[REF_AA]], i[[SZ]] [[REF_AAA]], [10 x i32]* [[REF_B]]) // // -// CHECK: define internal {{.*}}void [[OMP_OUTLINED6]](i32* noalias %.global_tid., i32* noalias %.bound_tid., i[[SZ]] %{{.+}}, i[[SZ]] %{{.+}}, i[[SZ]] %{{.+}}, [10 x i32]* {{.+}}) +// CHECK: define internal {{.*}}void [[OMP_OUTLINED6]](i32* frozen noalias %.global_tid., i32* frozen noalias %.bound_tid., i[[SZ]] frozen %{{.+}}, i[[SZ]] frozen %{{.+}}, i[[SZ]] frozen %{{.+}}, [10 x i32]* {{.+}}) // To reduce complexity, we're only going as far as validating the signature of the outlined parallel function. // CHECK: define internal void [[HVT5]] @@ -803,7 +803,7 @@ // CHECK: call {{.*}}void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* [[DEF_LOC]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i[[SZ]], i[[SZ]], [10 x i32]*)* [[OMP_OUTLINED7:@.+]] to void (i32*, i32*, ...)*), i[[SZ]] [[REF_A]], i[[SZ]] [[REF_AA]], [10 x i32]* [[REF_B]]) // // -// CHECK: define internal {{.*}}void [[OMP_OUTLINED7]](i32* noalias %.global_tid., i32* noalias %.bound_tid., i[[SZ]] %{{.+}}, i[[SZ]] %{{.+}}, [10 x i32]* {{.+}}) +// CHECK: define internal {{.*}}void [[OMP_OUTLINED7]](i32* frozen noalias %.global_tid., i32* frozen noalias %.bound_tid., i[[SZ]] frozen %{{.+}}, i[[SZ]] frozen %{{.+}}, [10 x i32]* {{.+}}) // To reduce complexity, we're only going as far as validating the signature of the outlined parallel function. // CHECK: define internal void @.omp_offloading.requires_reg() diff --git a/clang/test/OpenMP/target_parallel_debug_codegen.cpp b/clang/test/OpenMP/target_parallel_debug_codegen.cpp --- a/clang/test/OpenMP/target_parallel_debug_codegen.cpp +++ b/clang/test/OpenMP/target_parallel_debug_codegen.cpp @@ -65,62 +65,62 @@ return 0; } -// CHECK: define internal void @__omp_offloading{{[^(]+}}([10 x [10 x [10 x i32]]] addrspace(1)* {{[^,]+}}, i32 {{[^,]+}}, [10 x [10 x i32]]* {{[^,]+}}, i8 addrspace(1)* noalias{{[^,]+}}) +// CHECK: define internal void @__omp_offloading{{[^(]+}}([10 x [10 x [10 x i32]]] addrspace(1)* frozen {{[^,]+}}, i32 frozen {{[^,]+}}, [10 x [10 x i32]]* frozen {{[^,]+}}, i8 addrspace(1)* frozen noalias{{[^,]+}}) // CHECK: addrspacecast [10 x [10 x [10 x i32]]] addrspace(1)* %{{.+}} to [10 x [10 x [10 x i32]]]* -// CHECK: call void [[NONDEBUG_WRAPPER:.+]](i32* {{[^,]+}}, i32* {{[^,]+}}, [10 x [10 x [10 x i32]]]* {{[^,]+}}, i64 {{[^,]+}}, [10 x [10 x i32]]* {{[^,]+}}, i8* {{[^)]+}}) +// CHECK: call void [[NONDEBUG_WRAPPER:.+]](i32* frozen {{[^,]+}}, i32* frozen {{[^,]+}}, [10 x [10 x [10 x i32]]]* frozen {{[^,]+}}, i64 frozen {{[^,]+}}, [10 x [10 x i32]]* frozen {{[^,]+}}, i8* frozen {{[^)]+}}) -// CHECK: define internal void [[DEBUG_PARALLEL:@.+]](i32* {{[^,]+}}, i32* {{[^,]+}}, [10 x [10 x [10 x i32]]] addrspace(1)* noalias{{[^,]+}}, i32 {{[^,]+}}, [10 x [10 x i32]]* noalias{{[^,]+}}, i8 addrspace(1)* noalias{{[^)]+}}) +// CHECK: define internal void [[DEBUG_PARALLEL:@.+]](i32* frozen {{[^,]+}}, i32* frozen {{[^,]+}}, [10 x [10 x [10 x i32]]] addrspace(1)* frozen noalias{{[^,]+}}, i32 frozen {{[^,]+}}, [10 x [10 x i32]]* frozen noalias{{[^,]+}}, i8 addrspace(1)* frozen noalias{{[^)]+}}) // CHECK: addrspacecast [10 x [10 x [10 x i32]]] addrspace(1)* %{{.+}} to [10 x [10 x [10 x i32]]]* -// CHECK: define internal void [[NONDEBUG_WRAPPER]](i32* {{[^,]+}}, i32* {{[^,]+}}, [10 x [10 x [10 x i32]]]* nonnull align {{[0-9]+}} dereferenceable{{[^,]+}}, i64 {{[^,]+}}, [10 x [10 x i32]]* nonnull align {{[0-9]+}} dereferenceable{{[^,]+}}, i8* nonnull align {{[0-9]+}} dereferenceable{{[^)]+}}) +// CHECK: define internal void [[NONDEBUG_WRAPPER]](i32* frozen {{[^,]+}}, i32* frozen {{[^,]+}}, [10 x [10 x [10 x i32]]]* frozen nonnull align {{[0-9]+}} dereferenceable{{[^,]+}}, i64 frozen {{[^,]+}}, [10 x [10 x i32]]* frozen nonnull align {{[0-9]+}} dereferenceable{{[^,]+}}, i8* frozen nonnull align {{[0-9]+}} dereferenceable{{[^)]+}}) // CHECK: addrspacecast [10 x [10 x [10 x i32]]]* %{{.+}} to [10 x [10 x [10 x i32]]] addrspace(1)* -// CHECK: call void [[DEBUG_PARALLEL]](i32* {{[^,]+}}, i32* {{[^,]+}}, [10 x [10 x [10 x i32]]] addrspace(1)* {{[^,]+}}, i32 {{[^,]+}}, [10 x [10 x i32]]* {{[^,]+}}, i8 addrspace(1)* {{[^)]+}}) +// CHECK: call void [[DEBUG_PARALLEL]](i32* frozen {{[^,]+}}, i32* frozen {{[^,]+}}, [10 x [10 x [10 x i32]]] addrspace(1)* frozen {{[^,]+}}, i32 frozen {{[^,]+}}, [10 x [10 x i32]]* frozen {{[^,]+}}, i8 addrspace(1)* frozen {{[^)]+}}) -// CHECK: define weak void @__omp_offloading_{{[^(]+}}([10 x [10 x [10 x i32]]]* nonnull align {{[0-9]+}} dereferenceable{{[^,]+}}, i64 {{[^,]+}}, [10 x [10 x i32]]* nonnull align {{[0-9]+}} dereferenceable{{[^,]+}}, i8* nonnull align {{[0-9]+}} dereferenceable{{[^)]+}}) +// CHECK: define weak void @__omp_offloading_{{[^(]+}}([10 x [10 x [10 x i32]]]* frozen nonnull align {{[0-9]+}} dereferenceable{{[^,]+}}, i64 frozen {{[^,]+}}, [10 x [10 x i32]]* frozen nonnull align {{[0-9]+}} dereferenceable{{[^,]+}}, i8* frozen nonnull align {{[0-9]+}} dereferenceable{{[^)]+}}) // CHECK: addrspacecast [10 x [10 x [10 x i32]]]* %{{.+}} to [10 x [10 x [10 x i32]]] addrspace(1)* -// CHECK: call void @__omp_offloading_{{[^(]+}}([10 x [10 x [10 x i32]]] addrspace(1)* {{[^,]+}}, i32 {{[^,]+}}, [10 x [10 x i32]]* {{[^,]+}}, i8 addrspace(1)* {{[^)]+}}) +// CHECK: call void @__omp_offloading_{{[^(]+}}([10 x [10 x [10 x i32]]] addrspace(1)* frozen {{[^,]+}}, i32 frozen {{[^,]+}}, [10 x [10 x i32]]* frozen {{[^,]+}}, i8 addrspace(1)* frozen {{[^)]+}}) -// CHECK: define internal void @__omp_offloading_{{[^(]+}}([10 x [10 x [10 x i32]]] addrspace(1)* noalias{{[^,]+}}, i32 {{[^,]+}}, [10 x [10 x i32]] addrspace(1)* noalias{{[^,]+}}, i8 addrspace(1)* noalias{{[^)]+}}) +// CHECK: define internal void @__omp_offloading_{{[^(]+}}([10 x [10 x [10 x i32]]] addrspace(1)* frozen noalias{{[^,]+}}, i32 frozen {{[^,]+}}, [10 x [10 x i32]] addrspace(1)* frozen noalias{{[^,]+}}, i8 addrspace(1)* frozen noalias{{[^)]+}}) // CHECK: addrspacecast [10 x [10 x [10 x i32]]] addrspace(1)* %{{.+}} to [10 x [10 x [10 x i32]]]* // CHECK: addrspacecast [10 x [10 x i32]] addrspace(1)* %{{.+}} to [10 x [10 x i32]]* -// CHECK: call void [[NONDEBUG_WRAPPER:.+]](i32* {{[^,]+}}, i32* {{[^,]+}}, [10 x [10 x [10 x i32]]]* {{[^,]+}}, i64 {{[^,]+}}, [10 x [10 x i32]]* {{[^,]+}}, i8* {{[^)]+}}) +// CHECK: call void [[NONDEBUG_WRAPPER:.+]](i32* frozen {{[^,]+}}, i32* frozen {{[^,]+}}, [10 x [10 x [10 x i32]]]* frozen {{[^,]+}}, i64 frozen {{[^,]+}}, [10 x [10 x i32]]* frozen {{[^,]+}}, i8* frozen {{[^)]+}}) -// CHECK: define internal void [[DEBUG_PARALLEL:@.+]](i32* {{[^,]+}}, i32* {{[^,]+}}, [10 x [10 x [10 x i32]]] addrspace(1)* noalias{{[^,]+}}, i32 {{[^,]+}}, [10 x [10 x i32]] addrspace(1)* noalias{{[^,]+}}, i8 addrspace(1)* {{[^)]+}}) +// CHECK: define internal void [[DEBUG_PARALLEL:@.+]](i32* frozen {{[^,]+}}, i32* frozen {{[^,]+}}, [10 x [10 x [10 x i32]]] addrspace(1)* frozen noalias{{[^,]+}}, i32 frozen {{[^,]+}}, [10 x [10 x i32]] addrspace(1)* frozen noalias{{[^,]+}}, i8 addrspace(1)* frozen {{[^)]+}}) // CHECK: addrspacecast [10 x [10 x [10 x i32]]] addrspace(1)* %{{.+}} to [10 x [10 x [10 x i32]]]* // CHECK: addrspacecast [10 x [10 x i32]] addrspace(1)* %{{.+}} to [10 x [10 x i32]]* -// CHECK: define internal void [[NONDEBUG_WRAPPER]](i32* {{[^,]+}}, i32* {{[^,]+}}, [10 x [10 x [10 x i32]]]* nonnull align {{[0-9]+}} dereferenceable{{[^,]+}}, i64 {{[^,]+}}, [10 x [10 x i32]]* nonnull align {{[0-9]+}} dereferenceable{{[^,]+}}, i8* nonnull align {{[0-9]+}} dereferenceable{{[^)]+}}) +// CHECK: define internal void [[NONDEBUG_WRAPPER]](i32* frozen {{[^,]+}}, i32* frozen {{[^,]+}}, [10 x [10 x [10 x i32]]]* frozen nonnull align {{[0-9]+}} dereferenceable{{[^,]+}}, i64 frozen {{[^,]+}}, [10 x [10 x i32]]* frozen nonnull align {{[0-9]+}} dereferenceable{{[^,]+}}, i8* frozen nonnull align {{[0-9]+}} dereferenceable{{[^)]+}}) // CHECK: addrspacecast [10 x [10 x [10 x i32]]]* %{{.+}} to [10 x [10 x [10 x i32]]] addrspace(1)* // CHECK: addrspacecast [10 x [10 x i32]]* %{{.+}} to [10 x [10 x i32]] addrspace(1)* -// CHECK: call void [[DEBUG_PARALLEL]](i32* {{[^,]+}}, i32* {{[^,]+}}, [10 x [10 x [10 x i32]]] addrspace(1)* {{[^,]+}}, i32 {{[^,]+}}, [10 x [10 x i32]] addrspace(1)* {{[^,]+}}, i8 addrspace(1)* {{[^)]+}}) +// CHECK: call void [[DEBUG_PARALLEL]](i32* frozen {{[^,]+}}, i32* frozen {{[^,]+}}, [10 x [10 x [10 x i32]]] addrspace(1)* frozen {{[^,]+}}, i32 frozen {{[^,]+}}, [10 x [10 x i32]] addrspace(1)* frozen {{[^,]+}}, i8 addrspace(1)* frozen {{[^)]+}}) -// CHECK: define weak void @__omp_offloading_{{[^(]+}}([10 x [10 x [10 x i32]]]* nonnull align {{[0-9]+}} dereferenceable{{[^,]+}}, i64 {{[^,]+}}, [10 x [10 x i32]]* nonnull align {{[0-9]+}} dereferenceable{{[^,]+}}, i8* nonnull align {{[0-9]+}} dereferenceable{{[^)]+}}) +// CHECK: define weak void @__omp_offloading_{{[^(]+}}([10 x [10 x [10 x i32]]]* frozen nonnull align {{[0-9]+}} dereferenceable{{[^,]+}}, i64 frozen {{[^,]+}}, [10 x [10 x i32]]* frozen nonnull align {{[0-9]+}} dereferenceable{{[^,]+}}, i8* frozen nonnull align {{[0-9]+}} dereferenceable{{[^)]+}}) // CHECK: addrspacecast [10 x [10 x [10 x i32]]]* %{{.+}} to [10 x [10 x [10 x i32]]] addrspace(1)* // CHECK: addrspacecast [10 x [10 x i32]]* %{{.+}} to [10 x [10 x i32]] addrspace(1)* -// CHECK: call void @__omp_offloading_{{[^(]+}}([10 x [10 x [10 x i32]]] addrspace(1)* {{[^,]+}}, i32 {{[^,]+}}, [10 x [10 x i32]] addrspace(1)* {{[^,]+}}, i8 addrspace(1)* {{[^)]+}}) +// CHECK: call void @__omp_offloading_{{[^(]+}}([10 x [10 x [10 x i32]]] addrspace(1)* frozen {{[^,]+}}, i32 frozen {{[^,]+}}, [10 x [10 x i32]] addrspace(1)* frozen {{[^,]+}}, i8 addrspace(1)* frozen {{[^)]+}}) -// CHECK: define internal void @__omp_offloading_{{[^(]+}}([10 x [10 x [10 x i32]]] addrspace(1)* noalias{{[^,]+}}, i32 addrspace(1)* noalias{{[^,]+}}, [10 x [10 x i32]] addrspace(1)* noalias{{[^,]+}}, i8 addrspace(1)* noalias{{[^)]+}}) +// CHECK: define internal void @__omp_offloading_{{[^(]+}}([10 x [10 x [10 x i32]]] addrspace(1)* frozen noalias{{[^,]+}}, i32 addrspace(1)* frozen noalias{{[^,]+}}, [10 x [10 x i32]] addrspace(1)* frozen noalias{{[^,]+}}, i8 addrspace(1)* frozen noalias{{[^)]+}}) // CHECK: addrspacecast [10 x [10 x [10 x i32]]] addrspace(1)* %{{.+}} to [10 x [10 x [10 x i32]]]* // CHECK: addrspacecast i32 addrspace(1)* %{{.+}} to i32* // CHECK: addrspacecast [10 x [10 x i32]] addrspace(1)* %{{.+}} to [10 x [10 x i32]]* -// CHECK: call void @[[NONDEBUG_WRAPPER:.+]](i32* {{[^,]+}}, i32* {{[^,]+}}, [10 x [10 x [10 x i32]]]* {{[^,]+}}, i32* {{[^,]+}}, [10 x [10 x i32]]* {{[^,]+}}, i8* {{[^)]+}}) +// CHECK: call void @[[NONDEBUG_WRAPPER:.+]](i32* frozen {{[^,]+}}, i32* frozen {{[^,]+}}, [10 x [10 x [10 x i32]]]* frozen {{[^,]+}}, i32* frozen {{[^,]+}}, [10 x [10 x i32]]* frozen {{[^,]+}}, i8* frozen {{[^)]+}}) -// CHECK: define internal void @[[DEBUG_PARALLEL:.+]](i32* {{[^,]+}}, i32* {{[^,]+}}, [10 x [10 x [10 x i32]]] addrspace(1)* noalias{{[^,]+}}, i32 addrspace(1)* noalias{{[^,]+}}, [10 x [10 x i32]] addrspace(1)* noalias{{[^,]+}}, i8 addrspace(1)* noalias{{[^)]+}}) +// CHECK: define internal void @[[DEBUG_PARALLEL:.+]](i32* frozen {{[^,]+}}, i32* frozen {{[^,]+}}, [10 x [10 x [10 x i32]]] addrspace(1)* frozen noalias{{[^,]+}}, i32 addrspace(1)* frozen noalias{{[^,]+}}, [10 x [10 x i32]] addrspace(1)* frozen noalias{{[^,]+}}, i8 addrspace(1)* frozen noalias{{[^)]+}}) // CHECK: addrspacecast [10 x [10 x [10 x i32]]] addrspace(1)* %{{.+}} to [10 x [10 x [10 x i32]]]* // CHECK: addrspacecast i32 addrspace(1)* %{{.+}} to i32* // CHECK: addrspacecast [10 x [10 x i32]] addrspace(1)* %{{.+}} to [10 x [10 x i32]]* -// CHECK: define internal void @[[NONDEBUG_WRAPPER]](i32* {{[^,]+}}, i32* {{[^,]+}}, [10 x [10 x [10 x i32]]]* nonnull align {{[0-9]+}} dereferenceable{{[^,]+}}, i32* nonnull align {{[0-9]+}} dereferenceable{{[^,]+}}, [10 x [10 x i32]]* nonnull align {{[0-9]+}} dereferenceable{{[^,]+}}, i8* nonnull align {{[0-9]+}} dereferenceable{{[^)]+}}) +// CHECK: define internal void @[[NONDEBUG_WRAPPER]](i32* frozen {{[^,]+}}, i32* frozen {{[^,]+}}, [10 x [10 x [10 x i32]]]* frozen nonnull align {{[0-9]+}} dereferenceable{{[^,]+}}, i32* frozen nonnull align {{[0-9]+}} dereferenceable{{[^,]+}}, [10 x [10 x i32]]* frozen nonnull align {{[0-9]+}} dereferenceable{{[^,]+}}, i8* frozen nonnull align {{[0-9]+}} dereferenceable{{[^)]+}}) // CHECK: addrspacecast [10 x [10 x [10 x i32]]]* %{{.+}} to [10 x [10 x [10 x i32]]] addrspace(1)* // CHECK: addrspacecast i32* %{{.+}} to i32 addrspace(1)* // CHECK: addrspacecast [10 x [10 x i32]]* %{{.+}} to [10 x [10 x i32]] addrspace(1)* -// CHECK: call void @[[DEBUG_PARALLEL]](i32* {{[^,]+}}, i32* {{[^,]+}}, [10 x [10 x [10 x i32]]] addrspace(1)* {{[^,]+}}, i32 addrspace(1)* {{[^,]+}}, [10 x [10 x i32]] addrspace(1)* {{[^,]+}}, i8 addrspace(1)* {{[^)]+}}) +// CHECK: call void @[[DEBUG_PARALLEL]](i32* frozen {{[^,]+}}, i32* frozen {{[^,]+}}, [10 x [10 x [10 x i32]]] addrspace(1)* frozen {{[^,]+}}, i32 addrspace(1)* frozen {{[^,]+}}, [10 x [10 x i32]] addrspace(1)* frozen {{[^,]+}}, i8 addrspace(1)* frozen {{[^)]+}}) -// CHECK: define weak void @__omp_offloading_{{[^(]+}}([10 x [10 x [10 x i32]]]* nonnull align {{[0-9]+}} dereferenceable{{[^,]+}}, i32* nonnull align {{[0-9]+}} dereferenceable{{[^,]+}}, [10 x [10 x i32]]* nonnull align {{[0-9]+}} dereferenceable{{[^,]+}}, i8* nonnull align {{[0-9]+}} dereferenceable{{[^)]+}}) +// CHECK: define weak void @__omp_offloading_{{[^(]+}}([10 x [10 x [10 x i32]]]* frozen nonnull align {{[0-9]+}} dereferenceable{{[^,]+}}, i32* frozen nonnull align {{[0-9]+}} dereferenceable{{[^,]+}}, [10 x [10 x i32]]* frozen nonnull align {{[0-9]+}} dereferenceable{{[^,]+}}, i8* frozen nonnull align {{[0-9]+}} dereferenceable{{[^)]+}}) // CHECK: addrspacecast [10 x [10 x [10 x i32]]]* %{{.+}} to [10 x [10 x [10 x i32]]] addrspace(1)* // CHECK: addrspacecast i32* %{{.+}} to i32 addrspace(1)* // CHECK: addrspacecast [10 x [10 x i32]]* %{{.+}} to [10 x [10 x i32]] addrspace(1)* -// CHECK: call void @__omp_offloading_{{[^(]+}}([10 x [10 x [10 x i32]]] addrspace(1)* {{[^,]+}}, i32 addrspace(1)* {{[^,]+}}, [10 x [10 x i32]] addrspace(1)* {{[^,]+}}, i8 addrspace(1)* {{[^)]+}}) +// CHECK: call void @__omp_offloading_{{[^(]+}}([10 x [10 x [10 x i32]]] addrspace(1)* frozen {{[^,]+}}, i32 addrspace(1)* frozen {{[^,]+}}, [10 x [10 x i32]] addrspace(1)* frozen {{[^,]+}}, i8 addrspace(1)* frozen {{[^)]+}}) // CHECK: !DILocalVariable(name: ".global_tid.", // CHECK-SAME: DIFlagArtificial diff --git a/clang/test/OpenMP/target_parallel_depend_codegen.cpp b/clang/test/OpenMP/target_parallel_depend_codegen.cpp --- a/clang/test/OpenMP/target_parallel_depend_codegen.cpp +++ b/clang/test/OpenMP/target_parallel_depend_codegen.cpp @@ -89,7 +89,7 @@ // CHECK: [[DEP:%.+]] = bitcast %struct.kmp_depend_info* %{{.+}} to i8* // CHECK: call void @__kmpc_omp_wait_deps(%struct.ident_t* @0, i32 [[GTID]], i32 4, i8* [[DEP]], i32 0, i8* null) // CHECK: call void @__kmpc_omp_task_begin_if0(%struct.ident_t* @0, i32 [[GTID]], i8* [[TASK]]) - // CHECK: call i32 [[TASK_ENTRY0]](i32 [[GTID]], [[TASK_TY0]]* [[BC_TASK]]) + // CHECK: call i32 [[TASK_ENTRY0]](i32 frozen [[GTID]], [[TASK_TY0]]* frozen [[BC_TASK]]) // CHECK: call void @__kmpc_omp_task_complete_if0(%struct.ident_t* @0, i32 [[GTID]], i8* [[TASK]]) #pragma omp target parallel device(global + a) depend(in: global) depend(out: a, b, cn[4]) { @@ -162,7 +162,7 @@ // CHECK: [[DEP:%.+]] = bitcast %struct.kmp_depend_info* %{{.+}} to i8* // CHECK: call void @__kmpc_omp_wait_deps(%struct.ident_t* @0, i32 [[GTID]], i32 1, i8* [[DEP]], i32 0, i8* null) // CHECK: call void @__kmpc_omp_task_begin_if0(%struct.ident_t* @0, i32 [[GTID]], i8* [[TASK]]) - // CHECK: call i32 [[TASK_ENTRY2]](i32 [[GTID]], [[TASK_TY2]]* [[BC_TASK]]) + // CHECK: call i32 [[TASK_ENTRY2]](i32 frozen [[GTID]], [[TASK_TY2]]* frozen [[BC_TASK]]) // CHECK: call void @__kmpc_omp_task_complete_if0(%struct.ident_t* @0, i32 [[GTID]], i8* [[TASK]]) #pragma omp target parallel if(0) firstprivate(global) depend(out:global) { @@ -177,7 +177,7 @@ // CHECK: define internal void [[HVT0:@.+]]() -// CHECK: define internal{{.*}} i32 [[TASK_ENTRY0]](i32{{.*}}, [[TASK_TY0]]* noalias %1) +// CHECK: define internal{{.*}} i32 [[TASK_ENTRY0]](i32{{.*}}, [[TASK_TY0]]* frozen noalias %1) // CHECK: store void (i8*, ...)* null, void (i8*, ...)** % // CHECK: [[DEVICE_CAP:%.+]] = getelementptr inbounds %{{.+}}, %{{.+}}* %{{.+}}, i32 0, i32 0 // CHECK: [[DEV:%.+]] = load i32, i32* [[DEVICE_CAP]], @@ -191,9 +191,9 @@ // CHECK: [[END]] // CHECK: ret i32 0 -// CHECK: define internal void [[HVT1:@.+]](i[[SZ]]* %{{.+}}, i[[SZ]] %{{.+}}) +// CHECK: define internal void [[HVT1:@.+]](i[[SZ]]* frozen %{{.+}}, i[[SZ]] frozen %{{.+}}) -// CHECK: define internal{{.*}} i32 [[TASK_ENTRY1_]](i32{{.*}}, [[TASK_TY1_]]* noalias %1) +// CHECK: define internal{{.*}} i32 [[TASK_ENTRY1_]](i32{{.*}}, [[TASK_TY1_]]* frozen noalias %1) // CHECK: call void (i8*, ...) % // CHECK: [[SZT:%.+]] = getelementptr inbounds [2 x i64], [2 x i64]* %{{.+}}, i[[SZ]] 0, i[[SZ]] 0 // CHECK: [[DEVICE_CAP:%.+]] = getelementptr inbounds %{{.+}}, %{{.+}}* %{{.+}}, i32 0, i32 2 @@ -210,12 +210,12 @@ // CHECK-64: store i32 [[BP1_I32]], i32* [[BP1_CAST]], // CHECK-32: store i32 [[BP1_I32]], i32* [[BP1_PTR:%.+]], // CHECK: [[BP1:%.+]] = load i[[SZ]], i[[SZ]]* [[BP1_PTR]], -// CHECK: call void [[HVT1]](i[[SZ]]* [[BP0]], i[[SZ]] [[BP1]]) +// CHECK: call void [[HVT1]](i[[SZ]]* frozen [[BP0]], i[[SZ]] frozen [[BP1]]) // CHECK-NEXT: br label %[[END]] // CHECK: [[END]] // CHECK: ret i32 0 -// CHECK: define internal{{.*}} i32 [[TASK_ENTRY1__]](i32{{.*}}, [[TASK_TY1__]]* noalias %1) +// CHECK: define internal{{.*}} i32 [[TASK_ENTRY1__]](i32{{.*}}, [[TASK_TY1__]]* frozen noalias %1) // CHECK: call void (i8*, ...) % // CHECK: [[DEVICE_CAP:%.+]] = getelementptr inbounds %{{.+}}, %{{.+}}* %{{.+}}, i32 0, i32 2 // CHECK: [[BP0:%.+]] = load i[[SZ]]*, i[[SZ]]** % @@ -224,10 +224,10 @@ // CHECK-64: store i32 [[BP1_I32]], i32* [[BP1_CAST]], // CHECK-32: store i32 [[BP1_I32]], i32* [[BP1_PTR:%.+]], // CHECK: [[BP1:%.+]] = load i[[SZ]], i[[SZ]]* [[BP1_PTR]], -// CHECK: call void [[HVT1]](i[[SZ]]* [[BP0]], i[[SZ]] [[BP1]]) +// CHECK: call void [[HVT1]](i[[SZ]]* frozen [[BP0]], i[[SZ]] frozen [[BP1]]) // CHECK: ret i32 0 -// CHECK: define internal void [[HVT2:@.+]](i[[SZ]] %{{.+}}) +// CHECK: define internal void [[HVT2:@.+]](i[[SZ]] frozen %{{.+}}) // Create stack storage and store argument in there. // CHECK: [[AA_ADDR:%.+]] = alloca i[[SZ]], align // CHECK: store i[[SZ]] %{{.+}}, i[[SZ]]* [[AA_ADDR]], align @@ -235,14 +235,14 @@ // CHECK-64: load i32, i32* [[AA_CADDR]], align // CHECK-32: load i32, i32* [[AA_ADDR]], align -// CHECK: define internal{{.*}} i32 [[TASK_ENTRY2]](i32{{.*}}, [[TASK_TY2]]* noalias %1) +// CHECK: define internal{{.*}} i32 [[TASK_ENTRY2]](i32{{.*}}, [[TASK_TY2]]* frozen noalias %1) // CHECK: call void (i8*, ...) % // CHECK: [[BP1_I32:%.+]] = load i32, i32* % // CHECK-64: [[BP1_CAST:%.+]] = bitcast i[[SZ]]* [[BP1_PTR:%.+]] to i32* // CHECK-64: store i32 [[BP1_I32]], i32* [[BP1_CAST]], // CHECK-32: store i32 [[BP1_I32]], i32* [[BP1_PTR:%.+]], // CHECK: [[BP1:%.+]] = load i[[SZ]], i[[SZ]]* [[BP1_PTR]], -// CHECK: call void [[HVT2]](i[[SZ]] [[BP1]]) +// CHECK: call void [[HVT2]](i[[SZ]] frozen [[BP1]]) // CHECK: ret i32 0 // CHECK: define internal void @.omp_offloading.requires_reg() diff --git a/clang/test/OpenMP/target_parallel_for_codegen.cpp b/clang/test/OpenMP/target_parallel_for_codegen.cpp --- a/clang/test/OpenMP/target_parallel_for_codegen.cpp +++ b/clang/test/OpenMP/target_parallel_for_codegen.cpp @@ -334,14 +334,14 @@ // CHECK: call {{.*}}void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* [[DEF_LOC]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* [[OMP_OUTLINED:@.+]] to void (i32*, i32*, ...)*)) // // -// CHECK: define internal {{.*}}void [[OMP_OUTLINED]](i32* noalias %.global_tid., i32* noalias %.bound_tid.) +// CHECK: define internal {{.*}}void [[OMP_OUTLINED]](i32* frozen noalias %.global_tid., i32* frozen noalias %.bound_tid.) // CHECK: call i32 @__kmpc_cancel(%struct.ident_t* @ // CHECK: call i32 @__kmpc_cancellationpoint(%struct.ident_t* @ // CHECK: ret void // CHECK: } -// CHECK: define internal void [[HVT1]](i[[SZ]] %{{.+}}, i{{32|64}}{{[*]*.*}} %{{.+}}) +// CHECK: define internal void [[HVT1]](i[[SZ]] frozen %{{.+}}, i{{32|64}}{{[*]*.*}} %{{.+}}) // Create stack storage and store argument in there. // CHECK: [[AA_ADDR:%.+]] = alloca i[[SZ]], align // CHECK: alloca i{{32|64}}{{[*]*}}, align @@ -357,7 +357,7 @@ // CHECK: call {{.*}}void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* [[DEF_LOC]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i[[SZ]], i{{32|64}}{{[*]*}})* [[OMP_OUTLINED1:@.+]] to void (i32*, i32*, ...)*), i[[SZ]] [[PARAM]], i{{32|64}}{{[*]*}} %{{.+}}) // // -// CHECK: define internal {{.*}}void [[OMP_OUTLINED1]](i32* noalias %.global_tid., i32* noalias %.bound_tid., i[[SZ]] %{{.+}}) +// CHECK: define internal {{.*}}void [[OMP_OUTLINED1]](i32* frozen noalias %.global_tid., i32* frozen noalias %.bound_tid., i[[SZ]] frozen %{{.+}}) // CHECK: [[AA_ADDR:%.+]] = alloca i[[SZ]], align // CHECK: store i[[SZ]] %{{.+}}, i[[SZ]]* [[AA_ADDR]], align // CHECK-64: [[AA_CADDR:%.+]] = bitcast i[[SZ]]* [[AA_ADDR]] to i32* @@ -366,7 +366,7 @@ // CHECK: ret void // CHECK-NEXT: } -// CHECK: define internal void [[HVT2]](i[[SZ]] %{{.+}}, i[[SZ]] %{{.+}}, i[[SZ]] %{{.+}}) +// CHECK: define internal void [[HVT2]](i[[SZ]] frozen %{{.+}}, i[[SZ]] frozen %{{.+}}, i[[SZ]] frozen %{{.+}}) // Create stack storage and store argument in there. // CHECK: [[AA_ADDR:%.+]] = alloca i[[SZ]], align // CHECK: alloca i[[SZ]], align @@ -381,7 +381,7 @@ // CHECK: call {{.*}}void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* [[DEF_LOC]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i[[SZ]], i[[SZ]], i[[SZ]])* [[OMP_OUTLINED2:@.+]] to void (i32*, i32*, ...)*), i[[SZ]] [[PARAM]], i[[SZ]] {{.+}}, i[[SZ]] {{.+}}) // // -// CHECK: define internal {{.*}}void [[OMP_OUTLINED2]](i32* noalias %.global_tid., i32* noalias %.bound_tid., i[[SZ]] %{{.+}}, i[[SZ]] %{{.+}}, i[[SZ]] %{{.+}}) +// CHECK: define internal {{.*}}void [[OMP_OUTLINED2]](i32* frozen noalias %.global_tid., i32* frozen noalias %.bound_tid., i[[SZ]] frozen %{{.+}}, i[[SZ]] frozen %{{.+}}, i[[SZ]] frozen %{{.+}}) // CHECK: [[AA_ADDR:%.+]] = alloca i[[SZ]], align // CHECK: store i[[SZ]] %{{.+}}, i[[SZ]]* [[AA_ADDR]], align // CHECK: [[AA_CADDR:%.+]] = bitcast i[[SZ]]* [[AA_ADDR]] to i16* @@ -412,7 +412,7 @@ // CHECK-DAG: call {{.*}}void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* [[DEF_LOC]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i[[SZ]], i[[SZ]])* [[OMP_OUTLINED3:@.+]] to void (i32*, i32*, ...)*), i[[SZ]] [[PARAM1]], i[[SZ]] [[PARAM2]]) // // -// CHECK: define internal {{.*}}void [[OMP_OUTLINED3]](i32* noalias %.global_tid., i32* noalias %.bound_tid., i[[SZ]] %{{.+}}, i[[SZ]] %{{.+}}) +// CHECK: define internal {{.*}}void [[OMP_OUTLINED3]](i32* frozen noalias %.global_tid., i32* frozen noalias %.bound_tid., i[[SZ]] frozen %{{.+}}, i[[SZ]] frozen %{{.+}}) // CHECK: [[A_ADDR:%.+]] = alloca i[[SZ]], align // CHECK: [[AA_ADDR:%.+]] = alloca i[[SZ]], align // CHECK-DAG: store i[[SZ]] %{{.+}}, i[[SZ]]* [[A_ADDR]], align @@ -465,7 +465,7 @@ // CHECK: call {{.*}}void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* [[DEF_LOC]], i32 10, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i[[SZ]], [10 x float]*, i[[SZ]], float*, [5 x [10 x double]]*, i[[SZ]], i[[SZ]], double*, [[TT]]*, i[[SZ]])* [[OMP_OUTLINED4:@.+]] to void (i32*, i32*, ...)*), i[[SZ]] [[REF_A]], [10 x float]* [[REF_B]], i[[SZ]] [[VAL_VLA1]], float* [[REF_BN]], [5 x [10 x double]]* [[REF_C]], i[[SZ]] [[VAL_VLA2]], i[[SZ]] [[VAL_VLA3]], double* [[REF_CN]], [[TT]]* [[REF_D]], i[[SZ]] %{{.+}}) // // -// CHECK: define internal {{.*}}void [[OMP_OUTLINED4]](i32* noalias %.global_tid., i32* noalias %.bound_tid., i[[SZ]] %{{.+}}, [10 x float]* {{.+}}, i[[SZ]] %{{.+}}, float* {{.+}}, [5 x [10 x double]]* {{.+}}, i[[SZ]] %{{.+}}, i[[SZ]] %{{.+}}, double* {{.+}}, [[TT]]* {{.+}}) +// CHECK: define internal {{.*}}void [[OMP_OUTLINED4]](i32* frozen noalias %.global_tid., i32* frozen noalias %.bound_tid., i[[SZ]] frozen %{{.+}}, [10 x float]* {{.+}}, i[[SZ]] frozen %{{.+}}, float* {{.+}}, [5 x [10 x double]]* {{.+}}, i[[SZ]] frozen %{{.+}}, i[[SZ]] frozen %{{.+}}, double* {{.+}}, [[TT]]* {{.+}}) // To reduce complexity, we're only going as far as validating the signature of the outlined parallel function. template @@ -755,7 +755,7 @@ // CHECK: call {{.*}}void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* [[DEF_LOC]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [[S1]]*, i[[SZ]], i[[SZ]], i[[SZ]], i16*)* [[OMP_OUTLINED5:@.+]] to void (i32*, i32*, ...)*), [[S1]]* [[REF_THIS]], i[[SZ]] [[REF_B]], i[[SZ]] [[VAL_VLA1]], i[[SZ]] [[VAL_VLA2]], i16* [[REF_C]]) // // -// CHECK: define internal {{.*}}void [[OMP_OUTLINED5]](i32* noalias %.global_tid., i32* noalias %.bound_tid., [[S1]]* %{{.+}}, i[[SZ]] %{{.+}}, i[[SZ]] %{{.+}}, i[[SZ]] %{{.+}}, i16* {{.+}}) +// CHECK: define internal {{.*}}void [[OMP_OUTLINED5]](i32* frozen noalias %.global_tid., i32* frozen noalias %.bound_tid., [[S1]]* frozen %{{.+}}, i[[SZ]] frozen %{{.+}}, i[[SZ]] frozen %{{.+}}, i[[SZ]] frozen %{{.+}}, i16* {{.+}}) // To reduce complexity, we're only going as far as validating the signature of the outlined parallel function. @@ -798,7 +798,7 @@ // CHECK: call {{.*}}void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* [[DEF_LOC]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i[[SZ]], i[[SZ]], i[[SZ]], [10 x i32]*)* [[OMP_OUTLINED6:@.+]] to void (i32*, i32*, ...)*), i[[SZ]] [[REF_A]], i[[SZ]] [[REF_AA]], i[[SZ]] [[REF_AAA]], [10 x i32]* [[REF_B]]) // // -// CHECK: define internal {{.*}}void [[OMP_OUTLINED6]](i32* noalias %.global_tid., i32* noalias %.bound_tid., i[[SZ]] %{{.+}}, i[[SZ]] %{{.+}}, i[[SZ]] %{{.+}}, [10 x i32]* {{.+}}) +// CHECK: define internal {{.*}}void [[OMP_OUTLINED6]](i32* frozen noalias %.global_tid., i32* frozen noalias %.bound_tid., i[[SZ]] frozen %{{.+}}, i[[SZ]] frozen %{{.+}}, i[[SZ]] frozen %{{.+}}, [10 x i32]* {{.+}}) // To reduce complexity, we're only going as far as validating the signature of the outlined parallel function. // CHECK: define internal void [[HVT5]] @@ -831,7 +831,7 @@ // CHECK: call {{.*}}void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* [[DEF_LOC]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i[[SZ]], i[[SZ]], [10 x i32]*)* [[OMP_OUTLINED7:@.+]] to void (i32*, i32*, ...)*), i[[SZ]] [[REF_A]], i[[SZ]] [[REF_AA]], [10 x i32]* [[REF_B]]) // // -// CHECK: define internal {{.*}}void [[OMP_OUTLINED7]](i32* noalias %.global_tid., i32* noalias %.bound_tid., i[[SZ]] %{{.+}}, i[[SZ]] %{{.+}}, [10 x i32]* {{.+}}) +// CHECK: define internal {{.*}}void [[OMP_OUTLINED7]](i32* frozen noalias %.global_tid., i32* frozen noalias %.bound_tid., i[[SZ]] frozen %{{.+}}, i[[SZ]] frozen %{{.+}}, [10 x i32]* {{.+}}) // To reduce complexity, we're only going as far as validating the signature of the outlined parallel function. // CHECK: define internal void @.omp_offloading.requires_reg() diff --git a/clang/test/OpenMP/target_parallel_for_debug_codegen.cpp b/clang/test/OpenMP/target_parallel_for_debug_codegen.cpp --- a/clang/test/OpenMP/target_parallel_for_debug_codegen.cpp +++ b/clang/test/OpenMP/target_parallel_for_debug_codegen.cpp @@ -54,62 +54,62 @@ return 0; } -// CHECK: define internal void @__omp_offloading{{[^(]+}}([10 x [10 x [10 x i32]]] addrspace(1)* {{[^,]+}}, i32 {{[^,]+}}, [10 x [10 x i32]]* {{[^,]+}}, i8 addrspace(1)* noalias{{[^,]+}}, i1 {{[^)]+}}) +// CHECK: define internal void @__omp_offloading{{[^(]+}}([10 x [10 x [10 x i32]]] addrspace(1)* frozen {{[^,]+}}, i32 frozen {{[^,]+}}, [10 x [10 x i32]]* frozen {{[^,]+}}, i8 addrspace(1)* frozen noalias{{[^,]+}}, i1 frozen {{[^)]+}}) // CHECK: addrspacecast [10 x [10 x [10 x i32]]] addrspace(1)* %{{.+}} to [10 x [10 x [10 x i32]]]* -// CHECK: call void [[NONDEBUG_WRAPPER:.+]](i32* {{[^,]+}}, i32* {{[^,]+}}, [10 x [10 x [10 x i32]]]* {{[^,]+}}, i64 {{[^,]+}}, [10 x [10 x i32]]* {{[^,]+}}, i8* {{[^)]+}}) +// CHECK: call void [[NONDEBUG_WRAPPER:.+]](i32* frozen {{[^,]+}}, i32* frozen {{[^,]+}}, [10 x [10 x [10 x i32]]]* frozen {{[^,]+}}, i64 frozen {{[^,]+}}, [10 x [10 x i32]]* frozen {{[^,]+}}, i8* frozen {{[^)]+}}) -// CHECK: define internal void [[DEBUG_PARALLEL:.+]](i32* {{[^,]+}}, i32* {{[^,]+}}, [10 x [10 x [10 x i32]]] addrspace(1)* noalias{{[^,]+}}, i32 {{[^,]+}}, [10 x [10 x i32]]* noalias{{[^,]+}}, i8 addrspace(1)* noalias{{[^)]+}}) +// CHECK: define internal void [[DEBUG_PARALLEL:.+]](i32* frozen {{[^,]+}}, i32* frozen {{[^,]+}}, [10 x [10 x [10 x i32]]] addrspace(1)* frozen noalias{{[^,]+}}, i32 frozen {{[^,]+}}, [10 x [10 x i32]]* frozen noalias{{[^,]+}}, i8 addrspace(1)* frozen noalias{{[^)]+}}) // CHECK: addrspacecast [10 x [10 x [10 x i32]]] addrspace(1)* %{{.+}} to [10 x [10 x [10 x i32]]]* -// CHECK: define internal void [[NONDEBUG_WRAPPER]](i32* {{[^,]+}}, i32* {{[^,]+}}, [10 x [10 x [10 x i32]]]* nonnull align {{[0-9]+}} dereferenceable{{[^,]+}}, i64 {{[^,]+}}, [10 x [10 x i32]]* nonnull align {{[0-9]+}} dereferenceable{{[^,]+}}, i8* nonnull align {{[0-9]+}} dereferenceable{{[^)]+}}) +// CHECK: define internal void [[NONDEBUG_WRAPPER]](i32* frozen {{[^,]+}}, i32* frozen {{[^,]+}}, [10 x [10 x [10 x i32]]]* frozen nonnull align {{[0-9]+}} dereferenceable{{[^,]+}}, i64 frozen {{[^,]+}}, [10 x [10 x i32]]* frozen nonnull align {{[0-9]+}} dereferenceable{{[^,]+}}, i8* frozen nonnull align {{[0-9]+}} dereferenceable{{[^)]+}}) // CHECK: addrspacecast [10 x [10 x [10 x i32]]]* %{{.+}} to [10 x [10 x [10 x i32]]] addrspace(1)* -// CHECK: call void [[DEBUG_PARALLEL]](i32* {{[^,]+}}, i32* {{[^,]+}}, [10 x [10 x [10 x i32]]] addrspace(1)* {{[^,]+}}, i32 {{[^,]+}}, [10 x [10 x i32]]* {{[^,]+}}, i8 addrspace(1)* {{[^)]+}}) +// CHECK: call void [[DEBUG_PARALLEL]](i32* frozen {{[^,]+}}, i32* frozen {{[^,]+}}, [10 x [10 x [10 x i32]]] addrspace(1)* frozen {{[^,]+}}, i32 frozen {{[^,]+}}, [10 x [10 x i32]]* frozen {{[^,]+}}, i8 addrspace(1)* frozen {{[^)]+}}) -// CHECK: define weak void @__omp_offloading_{{[^(]+}}([10 x [10 x [10 x i32]]]* nonnull align {{[0-9]+}} dereferenceable{{[^,]+}}, i64 {{[^,]+}}, [10 x [10 x i32]]* nonnull align {{[0-9]+}} dereferenceable{{[^,]+}}, i8* nonnull align {{[0-9]+}} dereferenceable{{[^)]+}}) +// CHECK: define weak void @__omp_offloading_{{[^(]+}}([10 x [10 x [10 x i32]]]* frozen nonnull align {{[0-9]+}} dereferenceable{{[^,]+}}, i64 frozen {{[^,]+}}, [10 x [10 x i32]]* frozen nonnull align {{[0-9]+}} dereferenceable{{[^,]+}}, i8* frozen nonnull align {{[0-9]+}} dereferenceable{{[^)]+}}) // CHECK: addrspacecast [10 x [10 x [10 x i32]]]* %{{.+}} to [10 x [10 x [10 x i32]]] addrspace(1)* -// CHECK: call void @__omp_offloading_{{[^(]+}}([10 x [10 x [10 x i32]]] addrspace(1)* {{[^,]+}}, i32 {{[^,]+}}, [10 x [10 x i32]]* {{[^,]+}}, i8 addrspace(1)* {{[^)]+}}) +// CHECK: call void @__omp_offloading_{{[^(]+}}([10 x [10 x [10 x i32]]] addrspace(1)* frozen {{[^,]+}}, i32 frozen {{[^,]+}}, [10 x [10 x i32]]* frozen {{[^,]+}}, i8 addrspace(1)* frozen {{[^)]+}}) -// CHECK: define internal void @__omp_offloading_{{[^(]+}}([10 x [10 x [10 x i32]]] addrspace(1)* noalias{{[^,]+}}, i32 {{[^,]+}}, [10 x [10 x i32]] addrspace(1)* noalias{{[^,]+}}, i8 addrspace(1)* noalias{{[^)]+}}) +// CHECK: define internal void @__omp_offloading_{{[^(]+}}([10 x [10 x [10 x i32]]] addrspace(1)* frozen noalias{{[^,]+}}, i32 frozen {{[^,]+}}, [10 x [10 x i32]] addrspace(1)* frozen noalias{{[^,]+}}, i8 addrspace(1)* frozen noalias{{[^)]+}}) // CHECK: addrspacecast [10 x [10 x [10 x i32]]] addrspace(1)* %{{.+}} to [10 x [10 x [10 x i32]]]* // CHECK: addrspacecast [10 x [10 x i32]] addrspace(1)* %{{.+}} to [10 x [10 x i32]]* -// CHECK: call void [[NONDEBUG_WRAPPER:.+]](i32* {{[^,]+}}, i32* {{[^,]+}}, [10 x [10 x [10 x i32]]]* {{[^,]+}}, i64 {{[^,]+}}, [10 x [10 x i32]]* {{[^,]+}}, i8* {{[^)]+}}) +// CHECK: call void [[NONDEBUG_WRAPPER:.+]](i32* frozen {{[^,]+}}, i32* frozen {{[^,]+}}, [10 x [10 x [10 x i32]]]* frozen {{[^,]+}}, i64 frozen {{[^,]+}}, [10 x [10 x i32]]* frozen {{[^,]+}}, i8* frozen {{[^)]+}}) -// CHECK: define internal void [[DEBUG_PARALLEL:@.+]](i32* {{[^,]+}}, i32* {{[^,]+}}, [10 x [10 x [10 x i32]]] addrspace(1)* noalias{{[^,]+}}, i32 {{[^,]+}}, [10 x [10 x i32]] addrspace(1)* noalias{{[^,]+}}, i8 addrspace(1)* {{[^)]+}}) +// CHECK: define internal void [[DEBUG_PARALLEL:@.+]](i32* frozen {{[^,]+}}, i32* frozen {{[^,]+}}, [10 x [10 x [10 x i32]]] addrspace(1)* frozen noalias{{[^,]+}}, i32 frozen {{[^,]+}}, [10 x [10 x i32]] addrspace(1)* frozen noalias{{[^,]+}}, i8 addrspace(1)* frozen {{[^)]+}}) // CHECK: addrspacecast [10 x [10 x [10 x i32]]] addrspace(1)* %{{.+}} to [10 x [10 x [10 x i32]]]* // CHECK: addrspacecast [10 x [10 x i32]] addrspace(1)* %{{.+}} to [10 x [10 x i32]]* -// CHECK: define internal void [[NONDEBUG_WRAPPER]](i32* {{[^,]+}}, i32* {{[^,]+}}, [10 x [10 x [10 x i32]]]* nonnull align {{[0-9]+}} dereferenceable{{[^,]+}}, i64 {{[^,]+}}, [10 x [10 x i32]]* nonnull align {{[0-9]+}} dereferenceable{{[^,]+}}, i8* nonnull align {{[0-9]+}} dereferenceable{{[^)]+}}) +// CHECK: define internal void [[NONDEBUG_WRAPPER]](i32* frozen {{[^,]+}}, i32* frozen {{[^,]+}}, [10 x [10 x [10 x i32]]]* frozen nonnull align {{[0-9]+}} dereferenceable{{[^,]+}}, i64 frozen {{[^,]+}}, [10 x [10 x i32]]* frozen nonnull align {{[0-9]+}} dereferenceable{{[^,]+}}, i8* frozen nonnull align {{[0-9]+}} dereferenceable{{[^)]+}}) // CHECK: addrspacecast [10 x [10 x [10 x i32]]]* %{{.+}} to [10 x [10 x [10 x i32]]] addrspace(1)* // CHECK: addrspacecast [10 x [10 x i32]]* %{{.+}} to [10 x [10 x i32]] addrspace(1)* -// CHECK: call void [[DEBUG_PARALLEL]](i32* {{[^,]+}}, i32* {{[^,]+}}, [10 x [10 x [10 x i32]]] addrspace(1)* {{[^,]+}}, i32 {{[^,]+}}, [10 x [10 x i32]] addrspace(1)* {{[^,]+}}, i8 addrspace(1)* {{[^)]+}}) +// CHECK: call void [[DEBUG_PARALLEL]](i32* frozen {{[^,]+}}, i32* frozen {{[^,]+}}, [10 x [10 x [10 x i32]]] addrspace(1)* frozen {{[^,]+}}, i32 frozen {{[^,]+}}, [10 x [10 x i32]] addrspace(1)* frozen {{[^,]+}}, i8 addrspace(1)* frozen {{[^)]+}}) -// CHECK: define weak void @__omp_offloading_{{[^(]+}}([10 x [10 x [10 x i32]]]* nonnull align {{[0-9]+}} dereferenceable{{[^,]+}}, i64 {{[^,]+}}, [10 x [10 x i32]]* nonnull align {{[0-9]+}} dereferenceable{{[^,]+}}, i8* nonnull align {{[0-9]+}} dereferenceable{{[^)]+}}) +// CHECK: define weak void @__omp_offloading_{{[^(]+}}([10 x [10 x [10 x i32]]]* frozen nonnull align {{[0-9]+}} dereferenceable{{[^,]+}}, i64 frozen {{[^,]+}}, [10 x [10 x i32]]* frozen nonnull align {{[0-9]+}} dereferenceable{{[^,]+}}, i8* frozen nonnull align {{[0-9]+}} dereferenceable{{[^)]+}}) // CHECK: addrspacecast [10 x [10 x [10 x i32]]]* %{{.+}} to [10 x [10 x [10 x i32]]] addrspace(1)* // CHECK: addrspacecast [10 x [10 x i32]]* %{{.+}} to [10 x [10 x i32]] addrspace(1)* -// CHECK: call void @__omp_offloading_{{[^(]+}}([10 x [10 x [10 x i32]]] addrspace(1)* {{[^,]+}}, i32 {{[^,]+}}, [10 x [10 x i32]] addrspace(1)* {{[^,]+}}, i8 addrspace(1)* {{[^)]+}}) +// CHECK: call void @__omp_offloading_{{[^(]+}}([10 x [10 x [10 x i32]]] addrspace(1)* frozen {{[^,]+}}, i32 frozen {{[^,]+}}, [10 x [10 x i32]] addrspace(1)* frozen {{[^,]+}}, i8 addrspace(1)* frozen {{[^)]+}}) -// CHECK: define internal void @__omp_offloading_{{[^(]+}}([10 x [10 x [10 x i32]]] addrspace(1)* noalias{{[^,]+}}, i32 addrspace(1)* noalias{{[^,]+}}, [10 x [10 x i32]] addrspace(1)* noalias{{[^,]+}}, i8 addrspace(1)* noalias{{[^)]+}}) +// CHECK: define internal void @__omp_offloading_{{[^(]+}}([10 x [10 x [10 x i32]]] addrspace(1)* frozen noalias{{[^,]+}}, i32 addrspace(1)* frozen noalias{{[^,]+}}, [10 x [10 x i32]] addrspace(1)* frozen noalias{{[^,]+}}, i8 addrspace(1)* frozen noalias{{[^)]+}}) // CHECK: addrspacecast [10 x [10 x [10 x i32]]] addrspace(1)* %{{.+}} to [10 x [10 x [10 x i32]]]* // CHECK: addrspacecast i32 addrspace(1)* %{{.+}} to i32* // CHECK: addrspacecast [10 x [10 x i32]] addrspace(1)* %{{.+}} to [10 x [10 x i32]]* -// CHECK: call void @[[NONDEBUG_WRAPPER:.+]](i32* {{[^,]+}}, i32* {{[^,]+}}, [10 x [10 x [10 x i32]]]* {{[^,]+}}, i32* {{[^,]+}}, [10 x [10 x i32]]* {{[^,]+}}, i8* {{[^)]+}}) +// CHECK: call void @[[NONDEBUG_WRAPPER:.+]](i32* frozen {{[^,]+}}, i32* frozen {{[^,]+}}, [10 x [10 x [10 x i32]]]* frozen {{[^,]+}}, i32* frozen {{[^,]+}}, [10 x [10 x i32]]* frozen {{[^,]+}}, i8* frozen {{[^)]+}}) -// CHECK: define internal void @[[DEBUG_PARALLEL:.+]](i32* {{[^,]+}}, i32* {{[^,]+}}, [10 x [10 x [10 x i32]]] addrspace(1)* noalias{{[^,]+}}, i32 addrspace(1)* noalias{{[^,]+}}, [10 x [10 x i32]] addrspace(1)* noalias{{[^,]+}}, i8 addrspace(1)* noalias{{[^)]+}}) +// CHECK: define internal void @[[DEBUG_PARALLEL:.+]](i32* frozen {{[^,]+}}, i32* frozen {{[^,]+}}, [10 x [10 x [10 x i32]]] addrspace(1)* frozen noalias{{[^,]+}}, i32 addrspace(1)* frozen noalias{{[^,]+}}, [10 x [10 x i32]] addrspace(1)* frozen noalias{{[^,]+}}, i8 addrspace(1)* frozen noalias{{[^)]+}}) // CHECK: addrspacecast [10 x [10 x [10 x i32]]] addrspace(1)* %{{.+}} to [10 x [10 x [10 x i32]]]* // CHECK: addrspacecast i32 addrspace(1)* %{{.+}} to i32* // CHECK: addrspacecast [10 x [10 x i32]] addrspace(1)* %{{.+}} to [10 x [10 x i32]]* -// CHECK: define internal void @[[NONDEBUG_WRAPPER]](i32* {{[^,]+}}, i32* {{[^,]+}}, [10 x [10 x [10 x i32]]]* nonnull align {{[0-9]+}} dereferenceable{{[^,]+}}, i32* nonnull align {{[0-9]+}} dereferenceable{{[^,]+}}, [10 x [10 x i32]]* nonnull align {{[0-9]+}} dereferenceable{{[^,]+}}, i8* nonnull align {{[0-9]+}} dereferenceable{{[^)]+}}) +// CHECK: define internal void @[[NONDEBUG_WRAPPER]](i32* frozen {{[^,]+}}, i32* frozen {{[^,]+}}, [10 x [10 x [10 x i32]]]* frozen nonnull align {{[0-9]+}} dereferenceable{{[^,]+}}, i32* frozen nonnull align {{[0-9]+}} dereferenceable{{[^,]+}}, [10 x [10 x i32]]* frozen nonnull align {{[0-9]+}} dereferenceable{{[^,]+}}, i8* frozen nonnull align {{[0-9]+}} dereferenceable{{[^)]+}}) // CHECK: addrspacecast [10 x [10 x [10 x i32]]]* %{{.+}} to [10 x [10 x [10 x i32]]] addrspace(1)* // CHECK: addrspacecast i32* %{{.+}} to i32 addrspace(1)* // CHECK: addrspacecast [10 x [10 x i32]]* %{{.+}} to [10 x [10 x i32]] addrspace(1)* -// CHECK: call void @[[DEBUG_PARALLEL]](i32* {{[^,]+}}, i32* {{[^,]+}}, [10 x [10 x [10 x i32]]] addrspace(1)* {{[^,]+}}, i32 addrspace(1)* {{[^,]+}}, [10 x [10 x i32]] addrspace(1)* {{[^,]+}}, i8 addrspace(1)* {{[^)]+}}) +// CHECK: call void @[[DEBUG_PARALLEL]](i32* frozen {{[^,]+}}, i32* frozen {{[^,]+}}, [10 x [10 x [10 x i32]]] addrspace(1)* frozen {{[^,]+}}, i32 addrspace(1)* frozen {{[^,]+}}, [10 x [10 x i32]] addrspace(1)* frozen {{[^,]+}}, i8 addrspace(1)* frozen {{[^)]+}}) -// CHECK: define weak void @__omp_offloading_{{[^(]+}}([10 x [10 x [10 x i32]]]* nonnull align {{[0-9]+}} dereferenceable{{[^,]+}}, i32* nonnull align {{[0-9]+}} dereferenceable{{[^,]+}}, [10 x [10 x i32]]* nonnull align {{[0-9]+}} dereferenceable{{[^,]+}}, i8* nonnull align {{[0-9]+}} dereferenceable{{[^)]+}}) +// CHECK: define weak void @__omp_offloading_{{[^(]+}}([10 x [10 x [10 x i32]]]* frozen nonnull align {{[0-9]+}} dereferenceable{{[^,]+}}, i32* frozen nonnull align {{[0-9]+}} dereferenceable{{[^,]+}}, [10 x [10 x i32]]* frozen nonnull align {{[0-9]+}} dereferenceable{{[^,]+}}, i8* frozen nonnull align {{[0-9]+}} dereferenceable{{[^)]+}}) // CHECK: addrspacecast [10 x [10 x [10 x i32]]]* %{{.+}} to [10 x [10 x [10 x i32]]] addrspace(1)* // CHECK: addrspacecast i32* %{{.+}} to i32 addrspace(1)* // CHECK: addrspacecast [10 x [10 x i32]]* %{{.+}} to [10 x [10 x i32]] addrspace(1)* -// CHECK: call void @__omp_offloading_{{[^(]+}}([10 x [10 x [10 x i32]]] addrspace(1)* {{[^,]+}}, i32 addrspace(1)* {{[^,]+}}, [10 x [10 x i32]] addrspace(1)* {{[^,]+}}, i8 addrspace(1)* {{[^)]+}}) +// CHECK: call void @__omp_offloading_{{[^(]+}}([10 x [10 x [10 x i32]]] addrspace(1)* frozen {{[^,]+}}, i32 addrspace(1)* frozen {{[^,]+}}, [10 x [10 x i32]] addrspace(1)* frozen {{[^,]+}}, i8 addrspace(1)* frozen {{[^)]+}}) // CHECK-DAG: distinct !DISubprogram(name: "[[NONDEBUG_WRAPPER]]", // CHECK-DAG: distinct !DISubprogram(name: "[[DEBUG_PARALLEL]]", diff --git a/clang/test/OpenMP/target_parallel_for_depend_codegen.cpp b/clang/test/OpenMP/target_parallel_for_depend_codegen.cpp --- a/clang/test/OpenMP/target_parallel_for_depend_codegen.cpp +++ b/clang/test/OpenMP/target_parallel_for_depend_codegen.cpp @@ -89,7 +89,7 @@ // CHECK: [[DEP:%.+]] = bitcast %struct.kmp_depend_info* %{{.+}} to i8* // CHECK: call void @__kmpc_omp_wait_deps(%struct.ident_t* [[IN]], i32 [[GTID]], i32 4, i8* [[DEP]], i32 0, i8* null) // CHECK: call void @__kmpc_omp_task_begin_if0(%struct.ident_t* [[IN]], i32 [[GTID]], i8* [[TASK]]) - // CHECK: call i32 [[TASK_ENTRY0]](i32 [[GTID]], [[TASK_TY0]]* [[BC_TASK]]) + // CHECK: call i32 [[TASK_ENTRY0]](i32 frozen [[GTID]], [[TASK_TY0]]* frozen [[BC_TASK]]) // CHECK: call void @__kmpc_omp_task_complete_if0(%struct.ident_t* [[IN]], i32 [[GTID]], i8* [[TASK]]) #pragma omp target parallel for device(global + a) depend(in: global) depend(out: a, b, cn[4]) for (int i = 0; i < 10; ++i) { @@ -162,7 +162,7 @@ // CHECK: [[DEP:%.+]] = bitcast %struct.kmp_depend_info* %{{.+}} to i8* // CHECK: call void @__kmpc_omp_wait_deps(%struct.ident_t* [[IN]], i32 [[GTID]], i32 1, i8* [[DEP]], i32 0, i8* null) // CHECK: call void @__kmpc_omp_task_begin_if0(%struct.ident_t* [[IN]], i32 [[GTID]], i8* [[TASK]]) - // CHECK: call i32 [[TASK_ENTRY2]](i32 [[GTID]], [[TASK_TY2]]* [[BC_TASK]]) + // CHECK: call i32 [[TASK_ENTRY2]](i32 frozen [[GTID]], [[TASK_TY2]]* frozen [[BC_TASK]]) // CHECK: call void @__kmpc_omp_task_complete_if0(%struct.ident_t* [[IN]], i32 [[GTID]], i8* [[TASK]]) #pragma omp target parallel for if(0) firstprivate(global) depend(out:global) for (int i = 0; i < global; ++i) { @@ -177,7 +177,7 @@ // CHECK: define internal void [[HVT0:@.+]]() -// CHECK: define internal{{.*}} i32 [[TASK_ENTRY0]](i32{{.*}}, [[TASK_TY0]]* noalias %1) +// CHECK: define internal{{.*}} i32 [[TASK_ENTRY0]](i32{{.*}}, [[TASK_TY0]]* frozen noalias %1) // CHECK: store void (i8*, ...)* null, void (i8*, ...)** % // CHECK: [[DEVICE_CAP:%.+]] = getelementptr inbounds %{{.+}}, %{{.+}}* %{{.+}}, i32 0, i32 0 // CHECK: [[DEV:%.+]] = load i32, i32* [[DEVICE_CAP]], @@ -191,9 +191,9 @@ // CHECK: [[END]] // CHECK: ret i32 0 -// CHECK: define internal void [[HVT1:@.+]](i[[SZ]]* %{{.+}}, i[[SZ]] %{{.+}}) +// CHECK: define internal void [[HVT1:@.+]](i[[SZ]]* frozen %{{.+}}, i[[SZ]] frozen %{{.+}}) -// CHECK: define internal{{.*}} i32 [[TASK_ENTRY1_]](i32{{.*}}, [[TASK_TY1_]]* noalias %1) +// CHECK: define internal{{.*}} i32 [[TASK_ENTRY1_]](i32{{.*}}, [[TASK_TY1_]]* frozen noalias %1) // CHECK: call void (i8*, ...) % // CHECK: [[SZT:%.+]] = getelementptr inbounds [2 x i64], [2 x i64]* %{{.+}}, i[[SZ]] 0, i[[SZ]] 0 // CHECK: [[DEVICE_CAP:%.+]] = getelementptr inbounds %{{.+}}, %{{.+}}* %{{.+}}, i32 0, i32 2 @@ -210,12 +210,12 @@ // CHECK-64: store i32 [[BP1_I32]], i32* [[BP1_CAST]], // CHECK-32: store i32 [[BP1_I32]], i32* [[BP1_PTR:%.+]], // CHECK: [[BP1:%.+]] = load i[[SZ]], i[[SZ]]* [[BP1_PTR]], -// CHECK: call void [[HVT1]](i[[SZ]]* [[BP0]], i[[SZ]] [[BP1]]) +// CHECK: call void [[HVT1]](i[[SZ]]* frozen [[BP0]], i[[SZ]] frozen [[BP1]]) // CHECK-NEXT: br label %[[END]] // CHECK: [[END]] // CHECK: ret i32 0 -// CHECK: define internal{{.*}} i32 [[TASK_ENTRY1__]](i32{{.*}}, [[TASK_TY1__]]* noalias %1) +// CHECK: define internal{{.*}} i32 [[TASK_ENTRY1__]](i32{{.*}}, [[TASK_TY1__]]* frozen noalias %1) // CHECK: call void (i8*, ...) % // CHECK: [[DEVICE_CAP:%.+]] = getelementptr inbounds %{{.+}}, %{{.+}}* %{{.+}}, i32 0, i32 2 // CHECK: [[BP0:%.+]] = load i[[SZ]]*, i[[SZ]]** % @@ -224,10 +224,10 @@ // CHECK-64: store i32 [[BP1_I32]], i32* [[BP1_CAST]], // CHECK-32: store i32 [[BP1_I32]], i32* [[BP1_PTR:%.+]], // CHECK: [[BP1:%.+]] = load i[[SZ]], i[[SZ]]* [[BP1_PTR]], -// CHECK: call void [[HVT1]](i[[SZ]]* [[BP0]], i[[SZ]] [[BP1]]) +// CHECK: call void [[HVT1]](i[[SZ]]* frozen [[BP0]], i[[SZ]] frozen [[BP1]]) // CHECK: ret i32 0 -// CHECK: define internal void [[HVT2:@.+]](i[[SZ]] %{{.+}}) +// CHECK: define internal void [[HVT2:@.+]](i[[SZ]] frozen %{{.+}}) // Create stack storage and store argument in there. // CHECK: [[AA_ADDR:%.+]] = alloca i[[SZ]], align // CHECK: store i[[SZ]] %{{.+}}, i[[SZ]]* [[AA_ADDR]], align @@ -235,14 +235,14 @@ // CHECK-64: load i32, i32* [[AA_CADDR]], align // CHECK-32: load i32, i32* [[AA_ADDR]], align -// CHECK: define internal{{.*}} i32 [[TASK_ENTRY2]](i32{{.*}}, [[TASK_TY2]]* noalias %1) +// CHECK: define internal{{.*}} i32 [[TASK_ENTRY2]](i32{{.*}}, [[TASK_TY2]]* frozen noalias %1) // CHECK: call void (i8*, ...) % // CHECK: [[BP1_I32:%.+]] = load i32, i32* % // CHECK-64: [[BP1_CAST:%.+]] = bitcast i[[SZ]]* [[BP1_PTR:%.+]] to i32* // CHECK-64: store i32 [[BP1_I32]], i32* [[BP1_CAST]], // CHECK-32: store i32 [[BP1_I32]], i32* [[BP1_PTR:%.+]], // CHECK: [[BP1:%.+]] = load i[[SZ]], i[[SZ]]* [[BP1_PTR]], -// CHECK: call void [[HVT2]](i[[SZ]] [[BP1]]) +// CHECK: call void [[HVT2]](i[[SZ]] frozen [[BP1]]) // CHECK: ret i32 0 diff --git a/clang/test/OpenMP/target_parallel_for_loop_messages.cpp b/clang/test/OpenMP/target_parallel_for_loop_messages.cpp --- a/clang/test/OpenMP/target_parallel_for_loop_messages.cpp +++ b/clang/test/OpenMP/target_parallel_for_loop_messages.cpp @@ -145,7 +145,7 @@ for (ii = 0; ii < 10; ++++ii) c[ii] = a[ii]; -// Ok but undefined behavior (in general, cannot check that incr +// Ok but undefined behavior (in frozen general, cannot check incr that // is really loop-invariant). #pragma omp target parallel for for (ii = 0; ii < 10; ii = ii + ii) diff --git a/clang/test/OpenMP/target_parallel_for_reduction_task_codegen.cpp b/clang/test/OpenMP/target_parallel_for_reduction_task_codegen.cpp --- a/clang/test/OpenMP/target_parallel_for_reduction_task_codegen.cpp +++ b/clang/test/OpenMP/target_parallel_for_reduction_task_codegen.cpp @@ -21,7 +21,7 @@ // CHECK: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @{{.+}}, i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i8***)* [[OUTLINED:@.+]] to void (i32*, i32*, ...)*), i32* %{{.+}}, i8*** %{{.+}}) -// CHECK: define internal void [[OUTLINED]](i32* noalias %{{.+}}, i32* noalias %{{.+}}, i32* {{.+}}, i8*** {{.+}}) +// CHECK: define internal void [[OUTLINED]](i32* frozen noalias %{{.+}}, i32* frozen noalias %{{.+}}, i32* {{.+}}, i8*** {{.+}}) // CHECK: alloca i32, // CHECK: [[ARGC_FP_ADDR:%.+]] = alloca i32, // CHECK: [[TR:%.+]] = alloca [2 x %struct.kmp_taskred_input_t], @@ -94,26 +94,26 @@ // CHECK: call void @__kmpc_task_reduction_modifier_fini(%struct.ident_t* @{{.+}}, i32 %{{.+}}, i32 1) // CHECK: call i32 @__kmpc_reduce_nowait( -// CHECK: define internal void [[ARGC_INIT]](i8* noalias %{{.+}}, i8* noalias %{{.+}}) +// CHECK: define internal void [[ARGC_INIT]](i8* frozen noalias %{{.+}}, i8* frozen noalias %{{.+}}) // CHECK: store i32 0, i32* %{{.+}}, -// CHECK: define internal void [[ARGC_COMB]](i8* %{{.+}}, i8* %{{.+}}) +// CHECK: define internal void [[ARGC_COMB]](i8* frozen %{{.+}}, i8* frozen %{{.+}}) // CHECK: [[ADD:%.+]] = add nsw i32 %{{.+}}, %{{.+}} // CHECK: store i32 [[ADD]], i32* %{{.+}}, -// CHECK: define internal void [[ARGV_INIT]](i8* noalias %{{.+}}, i8* noalias %{{.+}}) +// CHECK: define internal void [[ARGV_INIT]](i8* frozen noalias %{{.+}}, i8* frozen noalias %{{.+}}) // CHECK: phi i8* // CHECK: store i8 0, i8* [[EL:%.+]], // CHECK: getelementptr i8, i8* [[EL]], i32 1 -// CHECK: define internal void [[ARGV_COMB]](i8* %{{.+}}, i8* %{{.+}}) +// CHECK: define internal void [[ARGV_COMB]](i8* frozen %{{.+}}, i8* frozen %{{.+}}) // CHECK: phi i8* // CHECK: [[ADD:%.+]] = add nsw i32 %{{.+}}, %{{.+}} // CHECK: [[CONV:%.+]] = trunc i32 [[ADD]] to i8 // CHECK: store i8 [[CONV]], i8* [[EL:%.+]], // CHECK: getelementptr i8, i8* [[EL]], i32 1 -// CHECK: define internal {{.*}}i32 [[TASK]](i32 {{.+}}, [[TASK_TY]]* {{.+}}) +// CHECK: define internal {{.*}}frozen i32 [[TASK]](i32 {{.+}}, [[TASK_TY]]* {{.+}}) // CHECK-DAG: call i8* @__kmpc_task_reduction_get_th_data(i32 %{{.+}}, i8* [[TG:%.+]], i8* [[ARGC_REF:%.+]]) // CHECK_DAG: [[TG]] = load i8*, i8** [[TG_ADDR:%.+]], // CHECK-DAG: [[ARGC_REF]] = bitcast i32* [[ARGC_ADDR:%.+]] to i8* diff --git a/clang/test/OpenMP/target_parallel_for_simd_codegen.cpp b/clang/test/OpenMP/target_parallel_for_simd_codegen.cpp --- a/clang/test/OpenMP/target_parallel_for_simd_codegen.cpp +++ b/clang/test/OpenMP/target_parallel_for_simd_codegen.cpp @@ -360,13 +360,13 @@ // CHECK: call {{.*}}void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* [[DEF_LOC]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* [[OMP_OUTLINED:@.+]] to void (i32*, i32*, ...)*)) // // -// CHECK: define internal {{.*}}void [[OMP_OUTLINED]](i32* noalias %.global_tid., i32* noalias %.bound_tid.) +// CHECK: define internal {{.*}}void [[OMP_OUTLINED]](i32* frozen noalias %.global_tid., i32* frozen noalias %.bound_tid.) // CHECK: !llvm.loop // CHECK: ret void // CHECK-NEXT: } -// CHECK: define internal void [[HVT1]](i[[SZ]] %{{.+}}, i{{32|64}}{{[*]*.*}} %{{.+}}) +// CHECK: define internal void [[HVT1]](i[[SZ]] frozen %{{.+}}, i{{32|64}}{{[*]*.*}} %{{.+}}) // Create stack storage and store argument in there. // CHECK: [[AA_ADDR:%.+]] = alloca i[[SZ]], align // CHECK: alloca i{{32|64}}{{[*]*}}, align @@ -382,7 +382,7 @@ // CHECK: call {{.*}}void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* [[DEF_LOC]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i[[SZ]], i{{32|64}}{{[*]*}})* [[OMP_OUTLINED1:@.+]] to void (i32*, i32*, ...)*), i[[SZ]] [[PARAM]], i{{32|64}}{{[*]*}} %{{.+}}) // // -// CHECK: define internal {{.*}}void [[OMP_OUTLINED1]](i32* noalias %.global_tid., i32* noalias %.bound_tid., i[[SZ]] %{{.+}}) +// CHECK: define internal {{.*}}void [[OMP_OUTLINED1]](i32* frozen noalias %.global_tid., i32* frozen noalias %.bound_tid., i[[SZ]] frozen %{{.+}}) // CHECK: [[AA_ADDR:%.+]] = alloca i[[SZ]], align // CHECK: store i[[SZ]] %{{.+}}, i[[SZ]]* [[AA_ADDR]], align // CHECK-64: [[AA_CADDR:%.+]] = bitcast i[[SZ]]* [[AA_ADDR]] to i32* @@ -393,7 +393,7 @@ // CHECK: ret void // CHECK-NEXT: } -// CHECK: define internal void [[HVT2]](i[[SZ]] %{{.+}}, i[[SZ]] %{{.+}}, i[[SZ]] %{{.+}}) +// CHECK: define internal void [[HVT2]](i[[SZ]] frozen %{{.+}}, i[[SZ]] frozen %{{.+}}, i[[SZ]] frozen %{{.+}}) // Create stack storage and store argument in there. // CHECK: [[AA_ADDR:%.+]] = alloca i[[SZ]], align // CHECK: alloca i[[SZ]], align @@ -408,7 +408,7 @@ // CHECK: call {{.*}}void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* [[DEF_LOC]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i[[SZ]], i[[SZ]], i[[SZ]])* [[OMP_OUTLINED2:@.+]] to void (i32*, i32*, ...)*), i[[SZ]] [[PARAM]], i[[SZ]] {{.+}}, i[[SZ]] {{.+}}) // // -// CHECK: define internal {{.*}}void [[OMP_OUTLINED2]](i32* noalias %.global_tid., i32* noalias %.bound_tid., i[[SZ]] %{{.+}}, i[[SZ]] %{{.+}}, i[[SZ]] %{{.+}}) +// CHECK: define internal {{.*}}void [[OMP_OUTLINED2]](i32* frozen noalias %.global_tid., i32* frozen noalias %.bound_tid., i[[SZ]] frozen %{{.+}}, i[[SZ]] frozen %{{.+}}, i[[SZ]] frozen %{{.+}}) // CHECK: [[AA_ADDR:%.+]] = alloca i[[SZ]], align // CHECK: store i[[SZ]] %{{.+}}, i[[SZ]]* [[AA_ADDR]], align // CHECK: [[AA_CADDR:%.+]] = bitcast i[[SZ]]* [[AA_ADDR]] to i16* @@ -440,7 +440,7 @@ // CHECK-DAG: call {{.*}}void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* [[DEF_LOC]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i[[SZ]], i[[SZ]])* [[OMP_OUTLINED3:@.+]] to void (i32*, i32*, ...)*), i[[SZ]] [[PARAM1]], i[[SZ]] [[PARAM2]]) // // -// CHECK: define internal {{.*}}void [[OMP_OUTLINED3]](i32* noalias %.global_tid., i32* noalias %.bound_tid., i[[SZ]] %{{.+}}, i[[SZ]] %{{.+}}) +// CHECK: define internal {{.*}}void [[OMP_OUTLINED3]](i32* frozen noalias %.global_tid., i32* frozen noalias %.bound_tid., i[[SZ]] frozen %{{.+}}, i[[SZ]] frozen %{{.+}}) // CHECK: [[A_ADDR:%.+]] = alloca i[[SZ]], align // CHECK: [[AA_ADDR:%.+]] = alloca i[[SZ]], align // CHECK-DAG: store i[[SZ]] %{{.+}}, i[[SZ]]* [[A_ADDR]], align @@ -494,7 +494,7 @@ // CHECK: call {{.*}}void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* [[DEF_LOC]], i32 10, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i[[SZ]], [10 x float]*, i[[SZ]], float*, [5 x [10 x double]]*, i[[SZ]], i[[SZ]], double*, [[TT]]*, i[[SZ]])* [[OMP_OUTLINED4:@.+]] to void (i32*, i32*, ...)*), i[[SZ]] [[REF_A]], [10 x float]* [[REF_B]], i[[SZ]] [[VAL_VLA1]], float* [[REF_BN]], [5 x [10 x double]]* [[REF_C]], i[[SZ]] [[VAL_VLA2]], i[[SZ]] [[VAL_VLA3]], double* [[REF_CN]], [[TT]]* [[REF_D]], i[[SZ]] %{{.+}}) // // -// CHECK: define internal {{.*}}void [[OMP_OUTLINED4]](i32* noalias %.global_tid., i32* noalias %.bound_tid., i[[SZ]] %{{.+}}, [10 x float]* {{.+}}, i[[SZ]] %{{.+}}, float* {{.+}}, [5 x [10 x double]]* {{.+}}, i[[SZ]] %{{.+}}, i[[SZ]] %{{.+}}, double* {{.+}}, [[TT]]* {{.+}}) +// CHECK: define internal {{.*}}void [[OMP_OUTLINED4]](i32* frozen noalias %.global_tid., i32* frozen noalias %.bound_tid., i[[SZ]] frozen %{{.+}}, [10 x float]* {{.+}}, i[[SZ]] frozen %{{.+}}, float* {{.+}}, [5 x [10 x double]]* {{.+}}, i[[SZ]] frozen %{{.+}}, i[[SZ]] frozen %{{.+}}, double* {{.+}}, [[TT]]* {{.+}}) // To reduce complexity, we're only going as far as validating the signature of the outlined parallel function. template @@ -834,8 +834,8 @@ // OMP50: call {{.*}}void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* [[DEF_LOC]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [[S1]]*, i[[SZ]], i[[SZ]], i[[SZ]], i16*, i[[SZ]])* [[OMP_OUTLINED5:@.+]] to void (i32*, i32*, ...)*), [[S1]]* [[REF_THIS]], i[[SZ]] [[REF_B]], i[[SZ]] [[VAL_VLA1]], i[[SZ]] [[VAL_VLA2]], i16* [[REF_C]], i[[SZ]] [[SIMD_COND]]) // // -// OMP45: define internal {{.*}}void [[OMP_OUTLINED5]](i32* noalias %.global_tid., i32* noalias %.bound_tid., [[S1]]* %{{.+}}, i[[SZ]] %{{.+}}, i[[SZ]] %{{.+}}, i[[SZ]] %{{.+}}, i16* {{.+}}) -// OMP50: define internal {{.*}}void [[OMP_OUTLINED5]](i32* noalias %.global_tid., i32* noalias %.bound_tid., [[S1]]* %{{.+}}, i[[SZ]] %{{.+}}, i[[SZ]] %{{.+}}, i[[SZ]] %{{.+}}, i16* {{.+}}, i[[SZ]] %{{.+}}) +// OMP45: define internal {{.*}}void [[OMP_OUTLINED5]](i32* frozen noalias %.global_tid., i32* frozen noalias %.bound_tid., [[S1]]* frozen %{{.+}}, i[[SZ]] frozen %{{.+}}, i[[SZ]] frozen %{{.+}}, i[[SZ]] frozen %{{.+}}, i16* {{.+}}) +// OMP50: define internal {{.*}}void [[OMP_OUTLINED5]](i32* frozen noalias %.global_tid., i32* frozen noalias %.bound_tid., [[S1]]* frozen %{{.+}}, i[[SZ]] frozen %{{.+}}, i[[SZ]] frozen %{{.+}}, i[[SZ]] frozen %{{.+}}, i16* {{.+}}, i[[SZ]] frozen %{{.+}}) // To reduce complexity, we're only going as far as validating the signature of the outlined parallel function. // OMP45-NOT: !nontemporal // OMP50: store double{{.*}}!nontemporal @@ -881,7 +881,7 @@ // CHECK: call {{.*}}void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* [[DEF_LOC]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i[[SZ]], i[[SZ]], i[[SZ]], [10 x i32]*)* [[OMP_OUTLINED6:@.+]] to void (i32*, i32*, ...)*), i[[SZ]] [[REF_A]], i[[SZ]] [[REF_AA]], i[[SZ]] [[REF_AAA]], [10 x i32]* [[REF_B]]) // // -// CHECK: define internal {{.*}}void [[OMP_OUTLINED6]](i32* noalias %.global_tid., i32* noalias %.bound_tid., i[[SZ]] %{{.+}}, i[[SZ]] %{{.+}}, i[[SZ]] %{{.+}}, [10 x i32]* {{.+}}) +// CHECK: define internal {{.*}}void [[OMP_OUTLINED6]](i32* frozen noalias %.global_tid., i32* frozen noalias %.bound_tid., i[[SZ]] frozen %{{.+}}, i[[SZ]] frozen %{{.+}}, i[[SZ]] frozen %{{.+}}, [10 x i32]* {{.+}}) // To reduce complexity, we're only going as far as validating the signature of the outlined parallel function. // CHECK: define internal void [[HVT5]] @@ -914,7 +914,7 @@ // CHECK: call {{.*}}void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* [[DEF_LOC]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i[[SZ]], i[[SZ]], [10 x i32]*)* [[OMP_OUTLINED7:@.+]] to void (i32*, i32*, ...)*), i[[SZ]] [[REF_A]], i[[SZ]] [[REF_AA]], [10 x i32]* [[REF_B]]) // // -// CHECK: define internal {{.*}}void [[OMP_OUTLINED7]](i32* noalias %.global_tid., i32* noalias %.bound_tid., i[[SZ]] %{{.+}}, i[[SZ]] %{{.+}}, [10 x i32]* {{.+}}) +// CHECK: define internal {{.*}}void [[OMP_OUTLINED7]](i32* frozen noalias %.global_tid., i32* frozen noalias %.bound_tid., i[[SZ]] frozen %{{.+}}, i[[SZ]] frozen %{{.+}}, [10 x i32]* {{.+}}) // To reduce complexity, we're only going as far as validating the signature of the outlined parallel function. // OMP45-NOT: !{!"llvm.loop.vectorize.enable", i1 false} diff --git a/clang/test/OpenMP/target_parallel_for_simd_depend_codegen.cpp b/clang/test/OpenMP/target_parallel_for_simd_depend_codegen.cpp --- a/clang/test/OpenMP/target_parallel_for_simd_depend_codegen.cpp +++ b/clang/test/OpenMP/target_parallel_for_simd_depend_codegen.cpp @@ -89,7 +89,7 @@ // CHECK: [[DEP:%.+]] = bitcast %struct.kmp_depend_info* %{{.+}} to i8* // CHECK: call void @__kmpc_omp_wait_deps(%struct.ident_t* [[IN]], i32 [[GTID]], i32 4, i8* [[DEP]], i32 0, i8* null) // CHECK: call void @__kmpc_omp_task_begin_if0(%struct.ident_t* [[IN]], i32 [[GTID]], i8* [[TASK]]) - // CHECK: call i32 [[TASK_ENTRY0]](i32 [[GTID]], [[TASK_TY0]]* [[BC_TASK]]) + // CHECK: call i32 [[TASK_ENTRY0]](i32 frozen [[GTID]], [[TASK_TY0]]* frozen [[BC_TASK]]) // CHECK: call void @__kmpc_omp_task_complete_if0(%struct.ident_t* [[IN]], i32 [[GTID]], i8* [[TASK]]) #pragma omp target parallel for simd device(global + a) depend(in: global) depend(out: a, b, cn[4]) for (int i = 0; i < 10; ++i) { @@ -162,7 +162,7 @@ // CHECK: [[DEP:%.+]] = bitcast %struct.kmp_depend_info* %{{.+}} to i8* // CHECK: call void @__kmpc_omp_wait_deps(%struct.ident_t* [[IN]], i32 [[GTID]], i32 1, i8* [[DEP]], i32 0, i8* null) // CHECK: call void @__kmpc_omp_task_begin_if0(%struct.ident_t* [[IN]], i32 [[GTID]], i8* [[TASK]]) - // CHECK: call i32 [[TASK_ENTRY2]](i32 [[GTID]], [[TASK_TY2]]* [[BC_TASK]]) + // CHECK: call i32 [[TASK_ENTRY2]](i32 frozen [[GTID]], [[TASK_TY2]]* frozen [[BC_TASK]]) // CHECK: call void @__kmpc_omp_task_complete_if0(%struct.ident_t* [[IN]], i32 [[GTID]], i8* [[TASK]]) #pragma omp target parallel for simd if(0) firstprivate(global) depend(out:global) for (int i = 0; i < global; ++i) { @@ -177,7 +177,7 @@ // CHECK: define internal void [[HVT0:@.+]]() -// CHECK: define internal{{.*}} i32 [[TASK_ENTRY0]](i32{{.*}}, [[TASK_TY0]]* noalias %1) +// CHECK: define internal{{.*}} i32 [[TASK_ENTRY0]](i32{{.*}}, [[TASK_TY0]]* frozen noalias %1) // CHECK: store void (i8*, ...)* null, void (i8*, ...)** % // CHECK: [[DEVICE_CAP:%.+]] = getelementptr inbounds %{{.+}}, %{{.+}}* %{{.+}}, i32 0, i32 0 // CHECK: [[DEV:%.+]] = load i32, i32* [[DEVICE_CAP]], @@ -191,9 +191,9 @@ // CHECK: [[END]] // CHECK: ret i32 0 -// CHECK: define internal void [[HVT1:@.+]](i[[SZ]]* %{{.+}}, i[[SZ]] %{{.+}}) +// CHECK: define internal void [[HVT1:@.+]](i[[SZ]]* frozen %{{.+}}, i[[SZ]] frozen %{{.+}}) -// CHECK: define internal{{.*}} i32 [[TASK_ENTRY1_]](i32{{.*}}, [[TASK_TY1_]]* noalias %1) +// CHECK: define internal{{.*}} i32 [[TASK_ENTRY1_]](i32{{.*}}, [[TASK_TY1_]]* frozen noalias %1) // CHECK: call void (i8*, ...) % // CHECK: [[SZT:%.+]] = getelementptr inbounds [2 x i64], [2 x i64]* %{{.+}}, i[[SZ]] 0, i[[SZ]] 0 // CHECK: [[DEVICE_CAP:%.+]] = getelementptr inbounds %{{.+}}, %{{.+}}* %{{.+}}, i32 0, i32 2 @@ -210,12 +210,12 @@ // CHECK-64: store i32 [[BP1_I32]], i32* [[BP1_CAST]], // CHECK-32: store i32 [[BP1_I32]], i32* [[BP1_PTR:%.+]], // CHECK: [[BP1:%.+]] = load i[[SZ]], i[[SZ]]* [[BP1_PTR]], -// CHECK: call void [[HVT1]](i[[SZ]]* [[BP0]], i[[SZ]] [[BP1]]) +// CHECK: call void [[HVT1]](i[[SZ]]* frozen [[BP0]], i[[SZ]] frozen [[BP1]]) // CHECK-NEXT: br label %[[END]] // CHECK: [[END]] // CHECK: ret i32 0 -// CHECK: define internal{{.*}} i32 [[TASK_ENTRY1__]](i32{{.*}}, [[TASK_TY1__]]* noalias %1) +// CHECK: define internal{{.*}} i32 [[TASK_ENTRY1__]](i32{{.*}}, [[TASK_TY1__]]* frozen noalias %1) // CHECK: call void (i8*, ...) % // CHECK: [[DEVICE_CAP:%.+]] = getelementptr inbounds %{{.+}}, %{{.+}}* %{{.+}}, i32 0, i32 2 // CHECK: [[BP0:%.+]] = load i[[SZ]]*, i[[SZ]]** % @@ -224,10 +224,10 @@ // CHECK-64: store i32 [[BP1_I32]], i32* [[BP1_CAST]], // CHECK-32: store i32 [[BP1_I32]], i32* [[BP1_PTR:%.+]], // CHECK: [[BP1:%.+]] = load i[[SZ]], i[[SZ]]* [[BP1_PTR]], -// CHECK: call void [[HVT1]](i[[SZ]]* [[BP0]], i[[SZ]] [[BP1]]) +// CHECK: call void [[HVT1]](i[[SZ]]* frozen [[BP0]], i[[SZ]] frozen [[BP1]]) // CHECK: ret i32 0 -// CHECK: define internal void [[HVT2:@.+]](i[[SZ]] %{{.+}}) +// CHECK: define internal void [[HVT2:@.+]](i[[SZ]] frozen %{{.+}}) // Create stack storage and store argument in there. // CHECK: [[AA_ADDR:%.+]] = alloca i[[SZ]], align // CHECK: store i[[SZ]] %{{.+}}, i[[SZ]]* [[AA_ADDR]], align @@ -235,14 +235,14 @@ // CHECK-64: load i32, i32* [[AA_CADDR]], align // CHECK-32: load i32, i32* [[AA_ADDR]], align -// CHECK: define internal{{.*}} i32 [[TASK_ENTRY2]](i32{{.*}}, [[TASK_TY2]]* noalias %1) +// CHECK: define internal{{.*}} i32 [[TASK_ENTRY2]](i32{{.*}}, [[TASK_TY2]]* frozen noalias %1) // CHECK: call void (i8*, ...) % // CHECK: [[BP1_I32:%.+]] = load i32, i32* % // CHECK-64: [[BP1_CAST:%.+]] = bitcast i[[SZ]]* [[BP1_PTR:%.+]] to i32* // CHECK-64: store i32 [[BP1_I32]], i32* [[BP1_CAST]], // CHECK-32: store i32 [[BP1_I32]], i32* [[BP1_PTR:%.+]], // CHECK: [[BP1:%.+]] = load i[[SZ]], i[[SZ]]* [[BP1_PTR]], -// CHECK: call void [[HVT2]](i[[SZ]] [[BP1]]) +// CHECK: call void [[HVT2]](i[[SZ]] frozen [[BP1]]) // CHECK: ret i32 0 diff --git a/clang/test/OpenMP/target_parallel_for_simd_loop_messages.cpp b/clang/test/OpenMP/target_parallel_for_simd_loop_messages.cpp --- a/clang/test/OpenMP/target_parallel_for_simd_loop_messages.cpp +++ b/clang/test/OpenMP/target_parallel_for_simd_loop_messages.cpp @@ -145,7 +145,7 @@ for (ii = 0; ii < 10; ++++ii) c[ii] = a[ii]; -// Ok but undefined behavior (in general, cannot check that incr +// Ok but undefined behavior (in frozen general, cannot check incr that // is really loop-invariant). #pragma omp target parallel for simd for (ii = 0; ii < 10; ii = ii + ii) diff --git a/clang/test/OpenMP/target_parallel_for_simd_uses_allocators_codegen.cpp b/clang/test/OpenMP/target_parallel_for_simd_uses_allocators_codegen.cpp --- a/clang/test/OpenMP/target_parallel_for_simd_uses_allocators_codegen.cpp +++ b/clang/test/OpenMP/target_parallel_for_simd_uses_allocators_codegen.cpp @@ -69,7 +69,7 @@ // CHECK: [[CMP:%.+]] = icmp ne i32 [[RES]], 0 // CHECK: br i1 [[CMP]], label %[[FAILED:.+]], label %[[DONE:.+]] // CHECK: [[FAILED]]: -// CHECK: call void @[[TGT_REGION]]([10 x %struct.omp_alloctrait_t]* %{{[^,]+}}) +// CHECK: call void @[[TGT_REGION]]([10 x %struct.omp_alloctrait_t]* frozen %{{[^,]+}}) #pragma omp target parallel for simd uses_allocators(omp_null_allocator, omp_thread_mem_alloc, my_allocator(traits)) for (int i = 0; i < 10; ++i) ; diff --git a/clang/test/OpenMP/target_parallel_for_uses_allocators_codegen.cpp b/clang/test/OpenMP/target_parallel_for_uses_allocators_codegen.cpp --- a/clang/test/OpenMP/target_parallel_for_uses_allocators_codegen.cpp +++ b/clang/test/OpenMP/target_parallel_for_uses_allocators_codegen.cpp @@ -69,7 +69,7 @@ // CHECK: [[CMP:%.+]] = icmp ne i32 [[RES]], 0 // CHECK: br i1 [[CMP]], label %[[FAILED:.+]], label %[[DONE:.+]] // CHECK: [[FAILED]]: -// CHECK: call void @[[TGT_REGION]]([10 x %struct.omp_alloctrait_t]* %{{[^,]+}}) +// CHECK: call void @[[TGT_REGION]]([10 x %struct.omp_alloctrait_t]* frozen %{{[^,]+}}) #pragma omp target parallel for uses_allocators(omp_null_allocator, omp_thread_mem_alloc, my_allocator(traits)) for (int i = 0; i < 10; ++i) ; diff --git a/clang/test/OpenMP/target_parallel_if_codegen.cpp b/clang/test/OpenMP/target_parallel_if_codegen.cpp --- a/clang/test/OpenMP/target_parallel_if_codegen.cpp +++ b/clang/test/OpenMP/target_parallel_if_codegen.cpp @@ -137,7 +137,7 @@ } // -// CHECK: define {{.*}}[[FS1]]([[S1]]* {{%.+}}, i32 {{[^%]*}}[[PARM:%.+]]) +// CHECK: define {{.*}}[[FS1]]([[S1]]* frozen {{%.+}}, i32 {{[^%]*}}[[PARM:%.+]]) // // CHECK-DAG: store i32 [[PARM]], i32* [[N_ADDR:%.+]], align // CHECK: [[NV:%.+]] = load i32, i32* [[N_ADDR]], align @@ -157,7 +157,7 @@ // CHECK: br i1 [[ERROR]], label %[[FAIL:.+]], label %[[END:[^,]+]] // // CHECK: [[FAIL]] -// CHECK: call void [[HVT1:@.+]]([[S1]]* {{%.+}}, i[[SZ]] {{%.+}}, i[[SZ]] [[ARG]]) +// CHECK: call void [[HVT1:@.+]]([[S1]]* frozen {{%.+}}, i[[SZ]] frozen {{%.+}}, i[[SZ]] frozen [[ARG]]) // CHECK: br label {{%?}}[[END]] // CHECK: [[END]] // @@ -183,12 +183,12 @@ // CHECK: [[ERROR:%.+]] = icmp ne i32 [[RET]], 0 // CHECK-NEXT: br i1 [[ERROR]], label %[[FAIL:.+]], label %[[END:[^,]+]] // CHECK: [[FAIL]] -// CHECK: call void [[HVT2:@.+]]([[S1]]* {{%.+}}, i[[SZ]] [[ARG]]) +// CHECK: call void [[HVT2:@.+]]([[S1]]* frozen {{%.+}}, i[[SZ]] frozen [[ARG]]) // CHECK-NEXT: br label %[[END]] // CHECK: [[END]] // CHECK-NEXT: br label %[[IFEND:.+]] // CHECK: [[IF_ELSE]] -// CHECK: call void [[HVT2]]([[S1]]* {{%.+}}, i[[SZ]] [[ARG]]) +// CHECK: call void [[HVT2]]([[S1]]* frozen {{%.+}}, i[[SZ]] frozen [[ARG]]) // CHECK-NEXT: br label %[[IFEND]] // CHECK: [[IFEND]] @@ -216,12 +216,12 @@ // CHECK: [[ERROR:%.+]] = icmp ne i32 [[RET]], 0 // CHECK-NEXT: br i1 [[ERROR]], label %[[FAIL:.+]], label %[[END:[^,]+]] // CHECK: [[FAIL]] -// CHECK: call void [[HVT3:@.+]](i[[SZ]] [[ARG]]) +// CHECK: call void [[HVT3:@.+]](i[[SZ]] frozen [[ARG]]) // CHECK-NEXT: br label %[[END]] // CHECK: [[END]] // CHECK-NEXT: br label %[[IFEND:.+]] // CHECK: [[IF_ELSE]] -// CHECK: call void [[HVT3]](i[[SZ]] [[ARG]]) +// CHECK: call void [[HVT3]](i[[SZ]] frozen [[ARG]]) // CHECK-NEXT: br label %[[IFEND]] // CHECK: [[IFEND]] // @@ -283,7 +283,7 @@ // Check that the offloading functions are emitted and that the parallel function // is appropriately guarded. -// CHECK: define internal void [[HVT1]]([[S1]]* {{%.+}}, i[[SZ]] [[PARM1:%.+]], i[[SZ]] [[PARM2:%.+]]) +// CHECK: define internal void [[HVT1]]([[S1]]* frozen {{%.+}}, i[[SZ]] frozen [[PARM1:%.+]], i[[SZ]] frozen [[PARM2:%.+]]) // CHECK-DAG: store i[[SZ]] [[PARM1]], i[[SZ]]* [[B_ADDR:%.+]], align // CHECK-DAG: store i[[SZ]] [[PARM2]], i[[SZ]]* [[CAPE_ADDR:%.+]], align // CHECK-64: [[CONVB:%.+]] = bitcast i[[SZ]]* [[B_ADDR]] to i32* @@ -305,7 +305,7 @@ // // CHECK: [[IF_ELSE]] // CHECK: call void @__kmpc_serialized_parallel( -// CHECK: call void [[OMP_OUTLINED3]](i32* {{%.+}}, i32* {{%.+}}, [[S1]]* {{.+}}, i[[SZ]] [[ARG]]) +// CHECK: call void [[OMP_OUTLINED3]](i32* frozen {{%.+}}, i32* frozen {{%.+}}, [[S1]]* {{.+}}, i[[SZ]] frozen [[ARG]]) // CHECK: call void @__kmpc_end_serialized_parallel( // CHECK: br label {{%?}}[[END]] // @@ -314,7 +314,7 @@ // -// CHECK: define internal void [[HVT2]]([[S1]]* {{%.+}}, i[[SZ]] [[PARM:%.+]]) +// CHECK: define internal void [[HVT2]]([[S1]]* frozen {{%.+}}, i[[SZ]] frozen [[PARM:%.+]]) // CHECK-DAG: store i[[SZ]] [[PARM]], i[[SZ]]* [[CAPE_ADDR:%.+]], align // CHECK: [[CONV:%.+]] = bitcast i[[SZ]]* [[CAPE_ADDR]] to i8* // CHECK: [[IFC:%.+]] = load i8, i8* [[CONV]], align @@ -327,7 +327,7 @@ // // CHECK: [[IF_ELSE]] // CHECK: call void @__kmpc_serialized_parallel( -// CHECK: call void [[OMP_OUTLINED4]](i32* {{%.+}}, i32* {{%.+}}, [[S1]]* {{.+}}) +// CHECK: call void [[OMP_OUTLINED4]](i32* frozen {{%.+}}, i32* frozen {{%.+}}, [[S1]]* {{.+}}) // CHECK: call void @__kmpc_end_serialized_parallel( // CHECK: br label {{%?}}[[END]] // @@ -342,7 +342,7 @@ -// CHECK: define internal void [[HVT3]](i[[SZ]] [[PARM:%.+]]) +// CHECK: define internal void [[HVT3]](i[[SZ]] frozen [[PARM:%.+]]) // CHECK-DAG: store i[[SZ]] [[PARM]], i[[SZ]]* [[CAPE_ADDR:%.+]], align // CHECK: [[CONV:%.+]] = bitcast i[[SZ]]* [[CAPE_ADDR]] to i8* // CHECK: [[IFC:%.+]] = load i8, i8* [[CONV]], align @@ -355,7 +355,7 @@ // // CHECK: [[IF_ELSE]] // CHECK: call void @__kmpc_serialized_parallel( -// CHECK: call void [[OMP_OUTLINED1]](i32* {{%.+}}, i32* {{%.+}}) +// CHECK: call void [[OMP_OUTLINED1]](i32* frozen {{%.+}}, i32* frozen {{%.+}}) // CHECK: call void @__kmpc_end_serialized_parallel( // CHECK: br label {{%?}}[[END]] // @@ -375,7 +375,7 @@ // CHECK: define internal void [[HVT5]]( // CHECK-NOT: @__kmpc_fork_call // CHECK: call void @__kmpc_serialized_parallel( -// CHECK: call void [[OMP_OUTLINED5:@.+]](i32* {{%.+}}, i32* {{%.+}}, i[[SZ]] {{.+}}) +// CHECK: call void [[OMP_OUTLINED5:@.+]](i32* frozen {{%.+}}, i32* frozen {{%.+}}, i[[SZ]] {{.+}}) // CHECK: call void @__kmpc_end_serialized_parallel( // CHECK: ret // @@ -384,7 +384,7 @@ // CHECK: define internal void [[HVT6]]( // CHECK-NOT: call void @__kmpc_serialized_parallel( -// CHECK-NOT: call void [[OMP_OUTLINED5:@.+]](i32* {{%.+}}, i32* {{%.+}}, i[[SZ]] {{.+}}) +// CHECK-NOT: call void [[OMP_OUTLINED5:@.+]](i32* frozen {{%.+}}, i32* frozen {{%.+}}, i[[SZ]] {{.+}}) // CHECK-NOT: call void @__kmpc_end_serialized_parallel( // CHECK: call {{.*}}void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* [[DEF_LOC]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i[[SZ]], i[[SZ]])* [[OMP_OUTLINED5:@.+]] to void (i32*, i32*, ...)*), // CHECK: ret diff --git a/clang/test/OpenMP/target_parallel_num_threads_codegen.cpp b/clang/test/OpenMP/target_parallel_num_threads_codegen.cpp --- a/clang/test/OpenMP/target_parallel_num_threads_codegen.cpp +++ b/clang/test/OpenMP/target_parallel_num_threads_codegen.cpp @@ -138,7 +138,7 @@ // -// CHECK: define {{.*}}[[FS1]]([[S1]]* {{%.+}}, i32 {{[^%]*}}[[PARM:%.+]]) +// CHECK: define {{.*}}[[FS1]]([[S1]]* frozen {{%.+}}, i32 {{[^%]*}}[[PARM:%.+]]) // // CHECK-DAG: store i32 [[PARM]], i32* [[N_ADDR:%.+]], align // CHECK: store i32 1, i32* [[B:%.+]], align @@ -158,7 +158,7 @@ // CHECK: br i1 [[ERROR]], label %[[FAIL:.+]], label %[[END:[^,]+]] // // CHECK: [[FAIL]] -// CHECK: call void [[HVT1:@.+]]([[S1]]* {{%.+}}, i[[SZ]] {{%.+}}, i[[SZ]] [[ARG]]) +// CHECK: call void [[HVT1:@.+]]([[S1]]* frozen {{%.+}}, i[[SZ]] frozen {{%.+}}, i[[SZ]] frozen [[ARG]]) // CHECK: br label {{%?}}[[END]] // CHECK: [[END]] // @@ -169,7 +169,7 @@ // CHECK: br i1 [[ERROR]], label %[[FAIL:.+]], label %[[END:[^,]+]] // // CHECK: [[FAIL]] -// CHECK: call void [[HVT2:@.+]]([[S1]]* {{[^,]+}}) +// CHECK: call void [[HVT2:@.+]]([[S1]]* frozen {{[^,]+}}) // CHECK: br label {{%?}}[[END]] // CHECK: [[END]] // @@ -197,7 +197,7 @@ // CHECK: br i1 [[ERROR]], label %[[FAIL:.+]], label %[[END:[^,]+]] // // CHECK: [[FAIL]] -// CHECK: call void [[HVT3:@.+]](i[[SZ]] [[ARG]]) +// CHECK: call void [[HVT3:@.+]](i[[SZ]] frozen [[ARG]]) // CHECK: br label {{%?}}[[END]] // CHECK: [[END]] // @@ -218,7 +218,7 @@ // CHECK: br i1 [[ERROR]], label %[[FAIL:.+]], label %[[END:[^,]+]] // // CHECK: [[FAIL]] -// CHECK: call void [[HVT4:@.+]](i[[SZ]] [[ARG]]) +// CHECK: call void [[HVT4:@.+]](i[[SZ]] frozen [[ARG]]) // CHECK: br label {{%?}}[[END]] // CHECK: [[END]] // @@ -258,7 +258,7 @@ // CHECK: br i1 [[ERROR]], label %[[FAIL:.+]], label %[[END:[^,]+]] // // CHECK: [[FAIL]] -// CHECK: call void [[HVT6:@.+]](i[[SZ]] {{%.+}}, i[[SZ]] {{%.+}}, i[[SZ]] [[ARG]]) +// CHECK: call void [[HVT6:@.+]](i[[SZ]] frozen {{%.+}}, i[[SZ]] frozen {{%.+}}, i[[SZ]] frozen [[ARG]]) // CHECK: br label {{%?}}[[END]] // CHECK: [[END]] // @@ -271,7 +271,7 @@ // Check that the offloading functions are emitted and that the parallel function // is appropriately guarded. -// CHECK: define internal void [[HVT1]]([[S1]]* {{%.+}}, i[[SZ]] [[PARM1:%.+]], i[[SZ]] [[PARM2:%.+]]) +// CHECK: define internal void [[HVT1]]([[S1]]* frozen {{%.+}}, i[[SZ]] frozen [[PARM1:%.+]], i[[SZ]] frozen [[PARM2:%.+]]) // CHECK-DAG: store i[[SZ]] [[PARM2]], i[[SZ]]* [[CAPE_ADDR:%.+]], align // CHECK-64: [[CONV:%.+]] = bitcast i[[SZ]]* [[CAPE_ADDR]] to i32* // CHECK-64: [[NT:%.+]] = load i32, i32* [[CONV]], align @@ -282,7 +282,7 @@ // -// CHECK: define internal void [[HVT2]]([[S1]]* {{%.+}}) +// CHECK: define internal void [[HVT2]]([[S1]]* frozen {{%.+}}) // CHECK: call void @__kmpc_push_num_threads(%struct.ident_t* {{[^,]+}}, i32 {{[^,]+}}, i32 1024) // CHECK: call {{.*}}void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* [[DEF_LOC]], i32 1, // @@ -295,7 +295,7 @@ -// CHECK: define internal void [[HVT3]](i[[SZ]] [[PARM:%.+]]) +// CHECK: define internal void [[HVT3]](i[[SZ]] frozen [[PARM:%.+]]) // CHECK-DAG: store i[[SZ]] [[PARM]], i[[SZ]]* [[CAPE_ADDR:%.+]], align // CHECK-64: [[CONV:%.+]] = bitcast i[[SZ]]* [[CAPE_ADDR]] to i32* // CHECK-64: [[NT:%.+]] = load i32, i32* [[CONV]], align @@ -304,7 +304,7 @@ // CHECK: call {{.*}}void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* [[DEF_LOC]], i32 0, // // -// CHECK: define internal void [[HVT4]](i[[SZ]] [[PARM:%.+]]) +// CHECK: define internal void [[HVT4]](i[[SZ]] frozen [[PARM:%.+]]) // CHECK-DAG: store i[[SZ]] [[PARM]], i[[SZ]]* [[CAPE_ADDR:%.+]], align // CHECK-64: [[CONV:%.+]] = bitcast i[[SZ]]* [[CAPE_ADDR]] to i32* // CHECK-64: [[NT:%.+]] = load i32, i32* [[CONV]], align @@ -325,7 +325,7 @@ // -// CHECK: define internal void [[HVT6]](i[[SZ]] [[PARM1:%.+]], i[[SZ]] [[PARM2:%.+]], i[[SZ]] [[PARM3:%.+]]) +// CHECK: define internal void [[HVT6]](i[[SZ]] frozen [[PARM1:%.+]], i[[SZ]] frozen [[PARM2:%.+]], i[[SZ]] frozen [[PARM3:%.+]]) // CHECK-DAG: store i[[SZ]] [[PARM3]], i[[SZ]]* [[CAPE_ADDR:%.+]], align // CHECK: [[CONV:%.+]] = bitcast i[[SZ]]* [[CAPE_ADDR]] to i16* // CHECK: [[T:%.+]] = load i16, i16* [[CONV]], align diff --git a/clang/test/OpenMP/target_parallel_reduction_task_codegen.cpp b/clang/test/OpenMP/target_parallel_reduction_task_codegen.cpp --- a/clang/test/OpenMP/target_parallel_reduction_task_codegen.cpp +++ b/clang/test/OpenMP/target_parallel_reduction_task_codegen.cpp @@ -21,7 +21,7 @@ // CHECK: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @{{.+}}, i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i8***)* [[OUTLINED:@.+]] to void (i32*, i32*, ...)*), i32* %{{.+}}, i8*** %{{.+}}) -// CHECK: define internal void [[OUTLINED]](i32* noalias %{{.+}}, i32* noalias %{{.+}}, i32* {{.+}}, i8*** {{.+}}) +// CHECK: define internal void [[OUTLINED]](i32* frozen noalias %{{.+}}, i32* frozen noalias %{{.+}}, i32* {{.+}}, i8*** {{.+}}) // CHECK: [[ARGC_FP_ADDR:%.+]] = alloca i32, // CHECK: [[TR:%.+]] = alloca [2 x %struct.kmp_taskred_input_t], // CHECK: [[TG:%.+]] = alloca i8*, @@ -93,26 +93,26 @@ // CHECK: call void @__kmpc_task_reduction_modifier_fini(%struct.ident_t* @{{.+}}, i32 %{{.+}}, i32 0) // CHECK: call i32 @__kmpc_reduce_nowait( -// CHECK: define internal void [[ARGC_INIT]](i8* noalias %{{.+}}, i8* noalias %{{.+}}) +// CHECK: define internal void [[ARGC_INIT]](i8* frozen noalias %{{.+}}, i8* frozen noalias %{{.+}}) // CHECK: store i32 0, i32* %{{.+}}, -// CHECK: define internal void [[ARGC_COMB]](i8* %{{.+}}, i8* %{{.+}}) +// CHECK: define internal void [[ARGC_COMB]](i8* frozen %{{.+}}, i8* frozen %{{.+}}) // CHECK: [[ADD:%.+]] = add nsw i32 %{{.+}}, %{{.+}} // CHECK: store i32 [[ADD]], i32* %{{.+}}, -// CHECK: define internal void [[ARGV_INIT]](i8* noalias %{{.+}}, i8* noalias %{{.+}}) +// CHECK: define internal void [[ARGV_INIT]](i8* frozen noalias %{{.+}}, i8* frozen noalias %{{.+}}) // CHECK: phi i8* // CHECK: store i8 0, i8* [[EL:%.+]], // CHECK: getelementptr i8, i8* [[EL]], i32 1 -// CHECK: define internal void [[ARGV_COMB]](i8* %{{.+}}, i8* %{{.+}}) +// CHECK: define internal void [[ARGV_COMB]](i8* frozen %{{.+}}, i8* frozen %{{.+}}) // CHECK: phi i8* // CHECK: [[ADD:%.+]] = add nsw i32 %{{.+}}, %{{.+}} // CHECK: [[CONV:%.+]] = trunc i32 [[ADD]] to i8 // CHECK: store i8 [[CONV]], i8* [[EL:%.+]], // CHECK: getelementptr i8, i8* [[EL]], i32 1 -// CHECK: define internal {{.*}}i32 [[TASK]](i32 {{.+}}, [[TASK_TY]]* {{.+}}) +// CHECK: define internal {{.*}}frozen i32 [[TASK]](i32 {{.+}}, [[TASK_TY]]* {{.+}}) // CHECK-DAG: call i8* @__kmpc_task_reduction_get_th_data(i32 %{{.+}}, i8* [[TG:%.+]], i8* [[ARGC_REF:%.+]]) // CHECK_DAG: [[TG]] = load i8*, i8** [[TG_ADDR:%.+]], // CHECK-DAG: [[ARGC_REF]] = bitcast i32* [[ARGC_ADDR:%.+]] to i8* diff --git a/clang/test/OpenMP/target_parallel_uses_allocators_codegen.cpp b/clang/test/OpenMP/target_parallel_uses_allocators_codegen.cpp --- a/clang/test/OpenMP/target_parallel_uses_allocators_codegen.cpp +++ b/clang/test/OpenMP/target_parallel_uses_allocators_codegen.cpp @@ -69,7 +69,7 @@ // CHECK: [[CMP:%.+]] = icmp ne i32 [[RES]], 0 // CHECK: br i1 [[CMP]], label %[[FAILED:.+]], label %[[DONE:.+]] // CHECK: [[FAILED]]: -// CHECK: call void @[[TGT_REGION]]([10 x %struct.omp_alloctrait_t]* %{{[^,]+}}) +// CHECK: call void @[[TGT_REGION]]([10 x %struct.omp_alloctrait_t]* frozen %{{[^,]+}}) #pragma omp target parallel uses_allocators(omp_null_allocator, omp_thread_mem_alloc, my_allocator(traits)) ; } diff --git a/clang/test/OpenMP/target_private_codegen.cpp b/clang/test/OpenMP/target_private_codegen.cpp --- a/clang/test/OpenMP/target_private_codegen.cpp +++ b/clang/test/OpenMP/target_private_codegen.cpp @@ -85,7 +85,7 @@ } // make sure that private variables are generated in all cases and that we use those instances for operations inside the // target region - // TCHECK: define weak void @__omp_offloading_{{.+}}(i{{[0-9]+}} [[VLA:%.+]], i{{[0-9]+}} [[VLA1:%.+]], i{{[0-9]+}} [[VLA3:%.+]]) + // TCHECK: define weak void @__omp_offloading_{{.+}}(i{{[0-9]+}} frozen [[VLA:%.+]], i{{[0-9]+}} frozen [[VLA1:%.+]], i{{[0-9]+}} frozen [[VLA3:%.+]]) // TCHECK: [[VLA_ADDR:%.+]] = alloca i{{[0-9]+}}, // TCHECK: [[VLA_ADDR2:%.+]] = alloca i{{[0-9]+}}, // TCHECK: [[VLA_ADDR4:%.+]] = alloca i{{[0-9]+}}, @@ -207,7 +207,7 @@ return c[1][1] + (int)b; } - // TCHECK: define weak void @__omp_offloading_{{.+}}([[S1]]* [[TH:%.+]], i{{[0-9]+}} [[VLA:%.+]], i{{[0-9]+}} [[VLA1:%.+]]) + // TCHECK: define weak void @__omp_offloading_{{.+}}([[S1]]* frozen [[TH:%.+]], i{{[0-9]+}} frozen [[VLA:%.+]], i{{[0-9]+}} frozen [[VLA1:%.+]]) // TCHECK: [[TH_ADDR:%.+]] = alloca [[S1]]*, // TCHECK: [[VLA_ADDR:%.+]] = alloca i{{[0-9]+}}, // TCHECK: [[VLA_ADDR2:%.+]] = alloca i{{[0-9]+}}, diff --git a/clang/test/OpenMP/target_reduction_codegen.cpp b/clang/test/OpenMP/target_reduction_codegen.cpp --- a/clang/test/OpenMP/target_reduction_codegen.cpp +++ b/clang/test/OpenMP/target_reduction_codegen.cpp @@ -154,7 +154,7 @@ return c[1][1] + (int)b; } - // TCHECK: define weak void @__omp_offloading_{{.+}}([[S1]]* [[TH:%.+]], i32*{{.+}}, i{{[0-9]+}} [[VLA:%.+]], i{{[0-9]+}} [[VLA1:%.+]], i16*{{.+}}) + // TCHECK: define weak void @__omp_offloading_{{.+}}([[S1]]* frozen [[TH:%.+]], i32*{{.+}}, i{{[0-9]+}} frozen [[VLA:%.+]], i{{[0-9]+}} frozen [[VLA1:%.+]], i16*{{.+}}) // TCHECK: [[TH_ADDR:%.+]] = alloca [[S1]]*, // TCHECK: [[B_ADDR:%.+]] = alloca i{{[0-9]+}}*, // TCHECK: [[VLA_ADDR:%.+]] = alloca i{{[0-9]+}}, diff --git a/clang/test/OpenMP/target_simd_codegen.cpp b/clang/test/OpenMP/target_simd_codegen.cpp --- a/clang/test/OpenMP/target_simd_codegen.cpp +++ b/clang/test/OpenMP/target_simd_codegen.cpp @@ -357,7 +357,7 @@ // CHECK-NEXT: } -// CHECK: define internal void [[HVT1]](i[[SZ]] %{{.+}}, i{{32|64}}{{[*]*.*}} %{{.+}}) +// CHECK: define internal void [[HVT1]](i[[SZ]] frozen %{{.+}}, i{{32|64}}{{[*]*.*}} %{{.+}}) // CHECK: [[AA_ADDR:%.+]] = alloca i[[SZ]], align // CHECK: store i[[SZ]] %{{.+}}, i[[SZ]]* [[AA_ADDR]], align // CHECK-64: [[AA_CADDR:%.+]] = bitcast i[[SZ]]* [[AA_ADDR]] to i32* @@ -368,7 +368,7 @@ // CHECK: ret void // CHECK-NEXT: } -// CHECK: define internal void [[HVT2]](i[[SZ]] %{{.+}}, i[[SZ]] %{{.+}}, i[[SZ]] %{{.+}}) +// CHECK: define internal void [[HVT2]](i[[SZ]] frozen %{{.+}}, i[[SZ]] frozen %{{.+}}, i[[SZ]] frozen %{{.+}}) // CHECK: [[AA_ADDR:%.+]] = alloca i[[SZ]], align // CHECK: store i[[SZ]] %{{.+}}, i[[SZ]]* [[AA_ADDR]], align // CHECK: [[AA_CADDR:%.+]] = bitcast i[[SZ]]* [[AA_ADDR]] to i16* diff --git a/clang/test/OpenMP/target_simd_depend_codegen.cpp b/clang/test/OpenMP/target_simd_depend_codegen.cpp --- a/clang/test/OpenMP/target_simd_depend_codegen.cpp +++ b/clang/test/OpenMP/target_simd_depend_codegen.cpp @@ -89,7 +89,7 @@ // CHECK: [[DEP:%.+]] = bitcast %struct.kmp_depend_info* %{{.+}} to i8* // CHECK: call void @__kmpc_omp_wait_deps(%struct.ident_t* @0, i32 [[GTID]], i32 4, i8* [[DEP]], i32 0, i8* null) // CHECK: call void @__kmpc_omp_task_begin_if0(%struct.ident_t* @0, i32 [[GTID]], i8* [[TASK]]) - // CHECK: call i32 [[TASK_ENTRY0]](i32 [[GTID]], [[TASK_TY0]]* [[BC_TASK]]) + // CHECK: call i32 [[TASK_ENTRY0]](i32 frozen [[GTID]], [[TASK_TY0]]* frozen [[BC_TASK]]) // CHECK: call void @__kmpc_omp_task_complete_if0(%struct.ident_t* @0, i32 [[GTID]], i8* [[TASK]]) #pragma omp target simd device(global + a) depend(in: global) depend(out: a, b, cn[4]) for (int i = 0; i < 10; ++i) { @@ -162,7 +162,7 @@ // CHECK: [[DEP:%.+]] = bitcast %struct.kmp_depend_info* %{{.+}} to i8* // CHECK: call void @__kmpc_omp_wait_deps(%struct.ident_t* @0, i32 [[GTID]], i32 1, i8* [[DEP]], i32 0, i8* null) // CHECK: call void @__kmpc_omp_task_begin_if0(%struct.ident_t* @0, i32 [[GTID]], i8* [[TASK]]) - // CHECK: call i32 [[TASK_ENTRY2]](i32 [[GTID]], [[TASK_TY2]]* [[BC_TASK]]) + // CHECK: call i32 [[TASK_ENTRY2]](i32 frozen [[GTID]], [[TASK_TY2]]* frozen [[BC_TASK]]) // CHECK: call void @__kmpc_omp_task_complete_if0(%struct.ident_t* @0, i32 [[GTID]], i8* [[TASK]]) #pragma omp target simd if(0) firstprivate(global) depend(out:global) for (int i = 0; i < global; ++i) { @@ -177,7 +177,7 @@ // CHECK: define internal void [[HVT0:@.+]]() -// CHECK: define internal{{.*}} i32 [[TASK_ENTRY0]](i32{{.*}}, [[TASK_TY0]]* noalias %1) +// CHECK: define internal{{.*}} i32 [[TASK_ENTRY0]](i32{{.*}}, [[TASK_TY0]]* frozen noalias %1) // CHECK: store void (i8*, ...)* null, void (i8*, ...)** % // CHECK: [[DEVICE_CAP:%.+]] = getelementptr inbounds %{{.+}}, %{{.+}}* %{{.+}}, i32 0, i32 0 // CHECK: [[DEV:%.+]] = load i32, i32* [[DEVICE_CAP]], @@ -191,9 +191,9 @@ // CHECK: [[END]] // CHECK: ret i32 0 -// CHECK: define internal void [[HVT1:@.+]](i[[SZ]]* %{{.+}}, i[[SZ]] %{{.+}}) +// CHECK: define internal void [[HVT1:@.+]](i[[SZ]]* frozen %{{.+}}, i[[SZ]] frozen %{{.+}}) -// CHECK: define internal{{.*}} i32 [[TASK_ENTRY1_]](i32{{.*}}, [[TASK_TY1_]]* noalias %1) +// CHECK: define internal{{.*}} i32 [[TASK_ENTRY1_]](i32{{.*}}, [[TASK_TY1_]]* frozen noalias %1) // CHECK: call void (i8*, ...) % // CHECK: [[SZT:%.+]] = getelementptr inbounds [2 x i64], [2 x i64]* %{{.+}}, i[[SZ]] 0, i[[SZ]] 0 // CHECK: [[DEVICE_CAP:%.+]] = getelementptr inbounds %{{.+}}, %{{.+}}* %{{.+}}, i32 0, i32 2 @@ -210,12 +210,12 @@ // CHECK-64: store i32 [[BP1_I32]], i32* [[BP1_CAST]], // CHECK-32: store i32 [[BP1_I32]], i32* [[BP1_PTR:%.+]], // CHECK: [[BP1:%.+]] = load i[[SZ]], i[[SZ]]* [[BP1_PTR]], -// CHECK: call void [[HVT1]](i[[SZ]]* [[BP0]], i[[SZ]] [[BP1]]) +// CHECK: call void [[HVT1]](i[[SZ]]* frozen [[BP0]], i[[SZ]] frozen [[BP1]]) // CHECK-NEXT: br label %[[END]] // CHECK: [[END]] // CHECK: ret i32 0 -// CHECK: define internal{{.*}} i32 [[TASK_ENTRY1__]](i32{{.*}}, [[TASK_TY1__]]* noalias %1) +// CHECK: define internal{{.*}} i32 [[TASK_ENTRY1__]](i32{{.*}}, [[TASK_TY1__]]* frozen noalias %1) // CHECK: call void (i8*, ...) % // CHECK: [[DEVICE_CAP:%.+]] = getelementptr inbounds %{{.+}}, %{{.+}}* %{{.+}}, i32 0, i32 2 // CHECK: [[BP0:%.+]] = load i[[SZ]]*, i[[SZ]]** % @@ -224,10 +224,10 @@ // CHECK-64: store i32 [[BP1_I32]], i32* [[BP1_CAST]], // CHECK-32: store i32 [[BP1_I32]], i32* [[BP1_PTR:%.+]], // CHECK: [[BP1:%.+]] = load i[[SZ]], i[[SZ]]* [[BP1_PTR]], -// CHECK: call void [[HVT1]](i[[SZ]]* [[BP0]], i[[SZ]] [[BP1]]) +// CHECK: call void [[HVT1]](i[[SZ]]* frozen [[BP0]], i[[SZ]] frozen [[BP1]]) // CHECK: ret i32 0 -// CHECK: define internal void [[HVT2:@.+]](i[[SZ]] %{{.+}}) +// CHECK: define internal void [[HVT2:@.+]](i[[SZ]] frozen %{{.+}}) // Create stack storage and store argument in there. // CHECK: [[AA_ADDR:%.+]] = alloca i[[SZ]], align // CHECK: store i[[SZ]] %{{.+}}, i[[SZ]]* [[AA_ADDR]], align @@ -235,14 +235,14 @@ // CHECK-64: load i32, i32* [[AA_CADDR]], align // CHECK-32: load i32, i32* [[AA_ADDR]], align -// CHECK: define internal{{.*}} i32 [[TASK_ENTRY2]](i32{{.*}}, [[TASK_TY2]]* noalias %1) +// CHECK: define internal{{.*}} i32 [[TASK_ENTRY2]](i32{{.*}}, [[TASK_TY2]]* frozen noalias %1) // CHECK: call void (i8*, ...) % // CHECK: [[BP1_I32:%.+]] = load i32, i32* % // CHECK-64: [[BP1_CAST:%.+]] = bitcast i[[SZ]]* [[BP1_PTR:%.+]] to i32* // CHECK-64: store i32 [[BP1_I32]], i32* [[BP1_CAST]], // CHECK-32: store i32 [[BP1_I32]], i32* [[BP1_PTR:%.+]], // CHECK: [[BP1:%.+]] = load i[[SZ]], i[[SZ]]* [[BP1_PTR]], -// CHECK: call void [[HVT2]](i[[SZ]] [[BP1]]) +// CHECK: call void [[HVT2]](i[[SZ]] frozen [[BP1]]) // CHECK: ret i32 0 diff --git a/clang/test/OpenMP/target_simd_loop_messages.cpp b/clang/test/OpenMP/target_simd_loop_messages.cpp --- a/clang/test/OpenMP/target_simd_loop_messages.cpp +++ b/clang/test/OpenMP/target_simd_loop_messages.cpp @@ -145,7 +145,7 @@ for (ii = 0; ii < 10; ++++ii) c[ii] = a[ii]; -// Ok but undefined behavior (in general, cannot check that incr +// Ok but undefined behavior (in frozen general, cannot check incr that // is really loop-invariant). #pragma omp target simd for (ii = 0; ii < 10; ii = ii + ii) diff --git a/clang/test/OpenMP/target_simd_uses_allocators_codegen.cpp b/clang/test/OpenMP/target_simd_uses_allocators_codegen.cpp --- a/clang/test/OpenMP/target_simd_uses_allocators_codegen.cpp +++ b/clang/test/OpenMP/target_simd_uses_allocators_codegen.cpp @@ -69,7 +69,7 @@ // CHECK: [[CMP:%.+]] = icmp ne i32 [[RES]], 0 // CHECK: br i1 [[CMP]], label %[[FAILED:.+]], label %[[DONE:.+]] // CHECK: [[FAILED]]: -// CHECK: call void @[[TGT_REGION]]([10 x %struct.omp_alloctrait_t]* %{{[^,]+}}) +// CHECK: call void @[[TGT_REGION]]([10 x %struct.omp_alloctrait_t]* frozen %{{[^,]+}}) #pragma omp target simd uses_allocators(omp_null_allocator, omp_thread_mem_alloc, my_allocator(traits)) for (int i = 0; i < 10; ++i) ; diff --git a/clang/test/OpenMP/target_teams_codegen.cpp b/clang/test/OpenMP/target_teams_codegen.cpp --- a/clang/test/OpenMP/target_teams_codegen.cpp +++ b/clang/test/OpenMP/target_teams_codegen.cpp @@ -343,18 +343,18 @@ // Check that the offloading functions are emitted and that the arguments are // correct and loaded correctly for the target regions in foo(). -// CHECK: define internal void [[HVT0]](i[[SZ]] {{[^,]+}}, i[[SZ]] {{[^,]+}}, i[[SZ]] {{[^)]+}}) +// CHECK: define internal void [[HVT0]](i[[SZ]] frozen {{[^,]+}}, i[[SZ]] frozen {{[^,]+}}, i[[SZ]] frozen {{[^)]+}}) // CHECK: call {{.*}}void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* [[DEF_LOC]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i[[SZ]])* [[OMP_OUTLINED:@.+]] to void (i32*, i32*, ...)*), i[[SZ]] {{[^)]+}}) // // -// CHECK: define internal {{.*}}void [[OMP_OUTLINED]](i32* noalias %.global_tid., i32* noalias %.bound_tid., i[[SZ]] {{[^)]+}}) +// CHECK: define internal {{.*}}void [[OMP_OUTLINED]](i32* frozen noalias %.global_tid., i32* frozen noalias %.bound_tid., i[[SZ]] frozen {{[^)]+}}) // CHECK: alloca i[[SZ]], // CHECK: bitcast i[[SZ]]* {{.+}} to i16* // CHECK: ret void // CHECK-NEXT: } -// CHECK: define internal void [[HVT1]](i[[SZ]] %{{.+}}) +// CHECK: define internal void [[HVT1]](i[[SZ]] frozen %{{.+}}) // Create stack storage and store argument in there. // CHECK: [[AA_ADDR:%.+]] = alloca i[[SZ]], align // CHECK: [[AA_CASTED:%.+]] = alloca i[[SZ]], align @@ -369,7 +369,7 @@ // CHECK: call {{.*}}void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* [[DEF_LOC]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i[[SZ]])* [[OMP_OUTLINED1:@.+]] to void (i32*, i32*, ...)*), i[[SZ]] [[PARAM]]) // // -// CHECK: define internal {{.*}}void [[OMP_OUTLINED1]](i32* noalias %.global_tid., i32* noalias %.bound_tid., i[[SZ]] %{{.+}}) +// CHECK: define internal {{.*}}void [[OMP_OUTLINED1]](i32* frozen noalias %.global_tid., i32* frozen noalias %.bound_tid., i[[SZ]] frozen %{{.+}}) // CHECK: [[AA_ADDR:%.+]] = alloca i[[SZ]], align // CHECK: store i[[SZ]] %{{.+}}, i[[SZ]]* [[AA_ADDR]], align // CHECK-64: [[AA_CADDR:%.+]] = bitcast i[[SZ]]* [[AA_ADDR]] to i32* @@ -378,7 +378,7 @@ // CHECK: ret void // CHECK-NEXT: } -// CHECK: define internal void [[HVT2]](i[[SZ]] %{{.+}}) +// CHECK: define internal void [[HVT2]](i[[SZ]] frozen %{{.+}}) // Create stack storage and store argument in there. // CHECK: [[AA_ADDR:%.+]] = alloca i[[SZ]], align // CHECK: [[AA_CASTED:%.+]] = alloca i[[SZ]], align @@ -391,7 +391,7 @@ // CHECK: call {{.*}}void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* [[DEF_LOC]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i[[SZ]])* [[OMP_OUTLINED2:@.+]] to void (i32*, i32*, ...)*), i[[SZ]] [[PARAM]]) // // -// CHECK: define internal {{.*}}void [[OMP_OUTLINED2]](i32* noalias %.global_tid., i32* noalias %.bound_tid., i[[SZ]] %{{.+}}) +// CHECK: define internal {{.*}}void [[OMP_OUTLINED2]](i32* frozen noalias %.global_tid., i32* frozen noalias %.bound_tid., i[[SZ]] frozen %{{.+}}) // CHECK: [[AA_ADDR:%.+]] = alloca i[[SZ]], align // CHECK: store i[[SZ]] %{{.+}}, i[[SZ]]* [[AA_ADDR]], align // CHECK: [[AA_CADDR:%.+]] = bitcast i[[SZ]]* [[AA_ADDR]] to i16* @@ -422,7 +422,7 @@ // CHECK-DAG: call {{.*}}void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* [[DEF_LOC]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i[[SZ]], i[[SZ]])* [[OMP_OUTLINED3:@.+]] to void (i32*, i32*, ...)*), i[[SZ]] [[PARAM1]], i[[SZ]] [[PARAM2]]) // // -// CHECK: define internal {{.*}}void [[OMP_OUTLINED3]](i32* noalias %.global_tid., i32* noalias %.bound_tid., i[[SZ]] %{{.+}}, i[[SZ]] %{{.+}}) +// CHECK: define internal {{.*}}void [[OMP_OUTLINED3]](i32* frozen noalias %.global_tid., i32* frozen noalias %.bound_tid., i[[SZ]] frozen %{{.+}}, i[[SZ]] frozen %{{.+}}) // CHECK: [[A_ADDR:%.+]] = alloca i[[SZ]], align // CHECK: [[AA_ADDR:%.+]] = alloca i[[SZ]], align // CHECK-DAG: store i[[SZ]] %{{.+}}, i[[SZ]]* [[A_ADDR]], align @@ -474,16 +474,16 @@ // CHECK: call {{.*}}void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* [[DEF_LOC]], i32 9, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i[[SZ]], [10 x float]*, i[[SZ]], float*, [5 x [10 x double]]*, i[[SZ]], i[[SZ]], double*, [[TT]]*)* [[OMP_OUTLINED4:@.+]] to void (i32*, i32*, ...)*), i[[SZ]] [[REF_A]], [10 x float]* [[REF_B]], i[[SZ]] [[VAL_VLA1]], float* [[REF_BN]], [5 x [10 x double]]* [[REF_C]], i[[SZ]] [[VAL_VLA2]], i[[SZ]] [[VAL_VLA3]], double* [[REF_CN]], [[TT]]* [[REF_D]]) // // -// CHECK: define internal {{.*}}void [[OMP_OUTLINED4]](i32* noalias %.global_tid., i32* noalias %.bound_tid., i[[SZ]] %{{.+}}, [10 x float]* {{.+}}, i[[SZ]] %{{.+}}, float* {{.+}}, [5 x [10 x double]]* {{.+}}, i[[SZ]] %{{.+}}, i[[SZ]] %{{.+}}, double* {{.+}}, [[TT]]* {{.+}}) +// CHECK: define internal {{.*}}void [[OMP_OUTLINED4]](i32* frozen noalias %.global_tid., i32* frozen noalias %.bound_tid., i[[SZ]] frozen %{{.+}}, [10 x float]* {{.+}}, i[[SZ]] frozen %{{.+}}, float* {{.+}}, [5 x [10 x double]]* {{.+}}, i[[SZ]] frozen %{{.+}}, i[[SZ]] frozen %{{.+}}, double* {{.+}}, [[TT]]* {{.+}}) // To reduce complexity, we're only going as far as validating the signature of the outlined parallel function. -// CHECK: define {{.*}}void @__omp_offloading_{{.*}}foo{{.*}}_l334(i[[SZ]] %{{.+}}) -// CHECK: define internal void {{@.+}}(i32* {{.+}}, i32* {{.+}}, i[[SZ]] %{{.+}}) -// CHECK: define {{.*}}void @__omp_offloading_{{.*}}foo{{.*}}_l337(i[[SZ]] %{{.+}}) -// CHECK: define internal void {{@.+}}(i32* {{.+}}, i32* {{.+}}, i32* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %{{.+}}) +// CHECK: define {{.*}}void @__omp_offloading_{{.*}}foo{{.*}}_l334(i[[SZ]] frozen %{{.+}}) +// CHECK: define internal void {{@.+}}(i32* {{.+}}, i32* {{.+}}, i[[SZ]] frozen %{{.+}}) +// CHECK: define {{.*}}void @__omp_offloading_{{.*}}foo{{.*}}_l337(i[[SZ]] frozen %{{.+}}) +// CHECK: define internal void {{@.+}}(i32* {{.+}}, i32* {{.+}}, i32* frozen nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %{{.+}}) void bazzzz(int n, int f[n]) { -// CHECK: define internal void @__omp_offloading_{{.+}}bazzzz{{.+}}_l489(i[[SZ]] %{{[^,]+}}) +// CHECK: define internal void @__omp_offloading_{{.+}}bazzzz{{.+}}_l489(i[[SZ]] frozen %{{[^,]+}}) // CHECK: [[VLA:%.+]] = load i[[SZ]], i[[SZ]]* % // CHECK: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @{{.+}}, i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i[[SZ]])* @{{.+}} to void (i32*, i32*, ...)*), i[[SZ]] [[VLA]]) #pragma omp target teams private(f) @@ -776,7 +776,7 @@ // CHECK: call {{.*}}void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* [[DEF_LOC]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [[S1]]*, i[[SZ]], i[[SZ]], i[[SZ]], i16*)* [[OMP_OUTLINED5:@.+]] to void (i32*, i32*, ...)*), [[S1]]* [[REF_THIS]], i[[SZ]] [[REF_B]], i[[SZ]] [[VAL_VLA1]], i[[SZ]] [[VAL_VLA2]], i16* [[REF_C]]) // // -// CHECK: define internal {{.*}}void [[OMP_OUTLINED5]](i32* noalias %.global_tid., i32* noalias %.bound_tid., [[S1]]* %{{.+}}, i[[SZ]] %{{.+}}, i[[SZ]] %{{.+}}, i[[SZ]] %{{.+}}, i16* {{.+}}) +// CHECK: define internal {{.*}}void [[OMP_OUTLINED5]](i32* frozen noalias %.global_tid., i32* frozen noalias %.bound_tid., [[S1]]* frozen %{{.+}}, i[[SZ]] frozen %{{.+}}, i[[SZ]] frozen %{{.+}}, i[[SZ]] frozen %{{.+}}, i16* {{.+}}) // To reduce complexity, we're only going as far as validating the signature of the outlined parallel function. @@ -819,7 +819,7 @@ // CHECK: call {{.*}}void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* [[DEF_LOC]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i[[SZ]], i[[SZ]], i[[SZ]], [10 x i32]*)* [[OMP_OUTLINED6:@.+]] to void (i32*, i32*, ...)*), i[[SZ]] [[REF_A]], i[[SZ]] [[REF_AA]], i[[SZ]] [[REF_AAA]], [10 x i32]* [[REF_B]]) // // -// CHECK: define internal {{.*}}void [[OMP_OUTLINED6]](i32* noalias %.global_tid., i32* noalias %.bound_tid., i[[SZ]] %{{.+}}, i[[SZ]] %{{.+}}, i[[SZ]] %{{.+}}, [10 x i32]* {{.+}}) +// CHECK: define internal {{.*}}void [[OMP_OUTLINED6]](i32* frozen noalias %.global_tid., i32* frozen noalias %.bound_tid., i[[SZ]] frozen %{{.+}}, i[[SZ]] frozen %{{.+}}, i[[SZ]] frozen %{{.+}}, [10 x i32]* {{.+}}) // To reduce complexity, we're only going as far as validating the signature of the outlined parallel function. // CHECK: define internal void [[HVT5]] @@ -852,7 +852,7 @@ // CHECK: call {{.*}}void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* [[DEF_LOC]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i[[SZ]], i[[SZ]], [10 x i32]*)* [[OMP_OUTLINED7:@.+]] to void (i32*, i32*, ...)*), i[[SZ]] [[REF_A]], i[[SZ]] [[REF_AA]], [10 x i32]* [[REF_B]]) // // -// CHECK: define internal {{.*}}void [[OMP_OUTLINED7]](i32* noalias %.global_tid., i32* noalias %.bound_tid., i[[SZ]] %{{.+}}, i[[SZ]] %{{.+}}, [10 x i32]* {{.+}}) +// CHECK: define internal {{.*}}void [[OMP_OUTLINED7]](i32* frozen noalias %.global_tid., i32* frozen noalias %.bound_tid., i[[SZ]] frozen %{{.+}}, i[[SZ]] frozen %{{.+}}, [10 x i32]* {{.+}}) // To reduce complexity, we're only going as far as validating the signature of the outlined parallel function. #endif diff --git a/clang/test/OpenMP/target_teams_depend_codegen.cpp b/clang/test/OpenMP/target_teams_depend_codegen.cpp --- a/clang/test/OpenMP/target_teams_depend_codegen.cpp +++ b/clang/test/OpenMP/target_teams_depend_codegen.cpp @@ -89,7 +89,7 @@ // CHECK: [[DEP:%.+]] = bitcast %struct.kmp_depend_info* %{{.+}} to i8* // CHECK: call void @__kmpc_omp_wait_deps(%struct.ident_t* @0, i32 [[GTID]], i32 4, i8* [[DEP]], i32 0, i8* null) // CHECK: call void @__kmpc_omp_task_begin_if0(%struct.ident_t* @0, i32 [[GTID]], i8* [[TASK]]) - // CHECK: call i32 [[TASK_ENTRY0]](i32 [[GTID]], [[TASK_TY0]]* [[BC_TASK]]) + // CHECK: call i32 [[TASK_ENTRY0]](i32 frozen [[GTID]], [[TASK_TY0]]* frozen [[BC_TASK]]) // CHECK: call void @__kmpc_omp_task_complete_if0(%struct.ident_t* @0, i32 [[GTID]], i8* [[TASK]]) #pragma omp target teams device(global + a) depend(in: global) depend(out: a, b, cn[4]) { @@ -162,7 +162,7 @@ // CHECK: [[DEP:%.+]] = bitcast %struct.kmp_depend_info* %{{.+}} to i8* // CHECK: call void @__kmpc_omp_wait_deps(%struct.ident_t* @0, i32 [[GTID]], i32 1, i8* [[DEP]], i32 0, i8* null) // CHECK: call void @__kmpc_omp_task_begin_if0(%struct.ident_t* @0, i32 [[GTID]], i8* [[TASK]]) - // CHECK: call i32 [[TASK_ENTRY2]](i32 [[GTID]], [[TASK_TY2]]* [[BC_TASK]]) + // CHECK: call i32 [[TASK_ENTRY2]](i32 frozen [[GTID]], [[TASK_TY2]]* frozen [[BC_TASK]]) // CHECK: call void @__kmpc_omp_task_complete_if0(%struct.ident_t* @0, i32 [[GTID]], i8* [[TASK]]) #pragma omp target teams if(0) firstprivate(global) depend(out:global) { @@ -177,7 +177,7 @@ // CHECK: define internal void [[HVT0:@.+]]() -// CHECK: define internal{{.*}} i32 [[TASK_ENTRY0]](i32{{.*}}, [[TASK_TY0]]* noalias %1) +// CHECK: define internal{{.*}} i32 [[TASK_ENTRY0]](i32{{.*}}, [[TASK_TY0]]* frozen noalias %1) // CHECK: store void (i8*, ...)* null, void (i8*, ...)** % // CHECK: [[DEVICE_CAP:%.+]] = getelementptr inbounds %{{.+}}, %{{.+}}* %{{.+}}, i32 0, i32 0 // CHECK: [[DEV:%.+]] = load i32, i32* [[DEVICE_CAP]], @@ -191,9 +191,9 @@ // CHECK: [[END]] // CHECK: ret i32 0 -// CHECK: define internal void [[HVT1:@.+]](i[[SZ]]* %{{.+}}, i[[SZ]] %{{.+}}) +// CHECK: define internal void [[HVT1:@.+]](i[[SZ]]* frozen %{{.+}}, i[[SZ]] frozen %{{.+}}) -// CHECK: define internal{{.*}} i32 [[TASK_ENTRY1_]](i32{{.*}}, [[TASK_TY1_]]* noalias %1) +// CHECK: define internal{{.*}} i32 [[TASK_ENTRY1_]](i32{{.*}}, [[TASK_TY1_]]* frozen noalias %1) // CHECK: call void (i8*, ...) % // CHECK: [[SZT:%.+]] = getelementptr inbounds [2 x i64], [2 x i64]* %{{.+}}, i[[SZ]] 0, i[[SZ]] 0 // CHECK: [[DEVICE_CAP:%.+]] = getelementptr inbounds %{{.+}}, %{{.+}}* %{{.+}}, i32 0, i32 2 @@ -210,12 +210,12 @@ // CHECK-64: store i32 [[BP1_I32]], i32* [[BP1_CAST]], // CHECK-32: store i32 [[BP1_I32]], i32* [[BP1_PTR:%.+]], // CHECK: [[BP1:%.+]] = load i[[SZ]], i[[SZ]]* [[BP1_PTR]], -// CHECK: call void [[HVT1]](i[[SZ]]* [[BP0]], i[[SZ]] [[BP1]]) +// CHECK: call void [[HVT1]](i[[SZ]]* frozen [[BP0]], i[[SZ]] frozen [[BP1]]) // CHECK-NEXT: br label %[[END]] // CHECK: [[END]] // CHECK: ret i32 0 -// CHECK: define internal{{.*}} i32 [[TASK_ENTRY1__]](i32{{.*}}, [[TASK_TY1__]]* noalias %1) +// CHECK: define internal{{.*}} i32 [[TASK_ENTRY1__]](i32{{.*}}, [[TASK_TY1__]]* frozen noalias %1) // CHECK: call void (i8*, ...) % // CHECK: [[DEVICE_CAP:%.+]] = getelementptr inbounds %{{.+}}, %{{.+}}* %{{.+}}, i32 0, i32 2 // CHECK: [[BP0:%.+]] = load i[[SZ]]*, i[[SZ]]** % @@ -224,10 +224,10 @@ // CHECK-64: store i32 [[BP1_I32]], i32* [[BP1_CAST]], // CHECK-32: store i32 [[BP1_I32]], i32* [[BP1_PTR:%.+]], // CHECK: [[BP1:%.+]] = load i[[SZ]], i[[SZ]]* [[BP1_PTR]], -// CHECK: call void [[HVT1]](i[[SZ]]* [[BP0]], i[[SZ]] [[BP1]]) +// CHECK: call void [[HVT1]](i[[SZ]]* frozen [[BP0]], i[[SZ]] frozen [[BP1]]) // CHECK: ret i32 0 -// CHECK: define internal void [[HVT2:@.+]](i[[SZ]] %{{.+}}) +// CHECK: define internal void [[HVT2:@.+]](i[[SZ]] frozen %{{.+}}) // Create stack storage and store argument in there. // CHECK: [[AA_ADDR:%.+]] = alloca i[[SZ]], align // CHECK: store i[[SZ]] %{{.+}}, i[[SZ]]* [[AA_ADDR]], align @@ -235,14 +235,14 @@ // CHECK-64: load i32, i32* [[AA_CADDR]], align // CHECK-32: load i32, i32* [[AA_ADDR]], align -// CHECK: define internal{{.*}} i32 [[TASK_ENTRY2]](i32{{.*}}, [[TASK_TY2]]* noalias %1) +// CHECK: define internal{{.*}} i32 [[TASK_ENTRY2]](i32{{.*}}, [[TASK_TY2]]* frozen noalias %1) // CHECK: call void (i8*, ...) % // CHECK: [[BP1_I32:%.+]] = load i32, i32* % // CHECK-64: [[BP1_CAST:%.+]] = bitcast i[[SZ]]* [[BP1_PTR:%.+]] to i32* // CHECK-64: store i32 [[BP1_I32]], i32* [[BP1_CAST]], // CHECK-32: store i32 [[BP1_I32]], i32* [[BP1_PTR:%.+]], // CHECK: [[BP1:%.+]] = load i[[SZ]], i[[SZ]]* [[BP1_PTR]], -// CHECK: call void [[HVT2]](i[[SZ]] [[BP1]]) +// CHECK: call void [[HVT2]](i[[SZ]] frozen [[BP1]]) // CHECK: ret i32 0 diff --git a/clang/test/OpenMP/target_teams_distribute_codegen.cpp b/clang/test/OpenMP/target_teams_distribute_codegen.cpp --- a/clang/test/OpenMP/target_teams_distribute_codegen.cpp +++ b/clang/test/OpenMP/target_teams_distribute_codegen.cpp @@ -342,18 +342,18 @@ // Check that the offloading functions are emitted and that the arguments are // correct and loaded correctly for the target regions in foo(). -// CHECK: define internal void [[HVT0]](i[[SZ]] {{[^,]+}}, i[[SZ]] {{[^,]+}}, i[[SZ]] {{[^)]+}}) +// CHECK: define internal void [[HVT0]](i[[SZ]] frozen {{[^,]+}}, i[[SZ]] frozen {{[^,]+}}, i[[SZ]] frozen {{[^)]+}}) // CHECK: call {{.*}}void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* [[DEF_LOC]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i[[SZ]])* [[OMP_OUTLINED:@.+]] to void (i32*, i32*, ...)*), i[[SZ]] {{[^)]+}}) // // -// CHECK: define internal {{.*}}void [[OMP_OUTLINED]](i32* noalias %.global_tid., i32* noalias %.bound_tid., i[[SZ]] {{[^)]+}}) +// CHECK: define internal {{.*}}void [[OMP_OUTLINED]](i32* frozen noalias %.global_tid., i32* frozen noalias %.bound_tid., i[[SZ]] frozen {{[^)]+}}) // CHECK: alloca i[[SZ]], // CHECK: bitcast i[[SZ]]* {{.+}} to i16* // CHECK: ret void // CHECK-NEXT: } -// CHECK: define internal void [[HVT1]](i[[SZ]] %{{.+}}) +// CHECK: define internal void [[HVT1]](i[[SZ]] frozen %{{.+}}) // Create stack storage and store argument in there. // CHECK: [[AA_ADDR:%.+]] = alloca i[[SZ]], align // CHECK: [[AA_CASTED:%.+]] = alloca i[[SZ]], align @@ -368,7 +368,7 @@ // CHECK: call {{.*}}void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* [[DEF_LOC]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i[[SZ]])* [[OMP_OUTLINED1:@.+]] to void (i32*, i32*, ...)*), i[[SZ]] [[PARAM]]) // // -// CHECK: define internal {{.*}}void [[OMP_OUTLINED1]](i32* noalias %.global_tid., i32* noalias %.bound_tid., i[[SZ]] %{{.+}}) +// CHECK: define internal {{.*}}void [[OMP_OUTLINED1]](i32* frozen noalias %.global_tid., i32* frozen noalias %.bound_tid., i[[SZ]] frozen %{{.+}}) // CHECK: [[AA_ADDR:%.+]] = alloca i[[SZ]], align // CHECK: store i[[SZ]] %{{.+}}, i[[SZ]]* [[AA_ADDR]], align // CHECK-64: [[AA_CADDR:%.+]] = bitcast i[[SZ]]* [[AA_ADDR]] to i32* @@ -377,7 +377,7 @@ // CHECK: ret void // CHECK-NEXT: } -// CHECK: define internal void [[HVT2]](i[[SZ]] %{{.+}}) +// CHECK: define internal void [[HVT2]](i[[SZ]] frozen %{{.+}}) // Create stack storage and store argument in there. // CHECK: [[AA_ADDR:%.+]] = alloca i[[SZ]], align // CHECK: [[AA_CASTED:%.+]] = alloca i[[SZ]], align @@ -390,7 +390,7 @@ // CHECK: call {{.*}}void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* [[DEF_LOC]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i[[SZ]])* [[OMP_OUTLINED2:@.+]] to void (i32*, i32*, ...)*), i[[SZ]] [[PARAM]]) // // -// CHECK: define internal {{.*}}void [[OMP_OUTLINED2]](i32* noalias %.global_tid., i32* noalias %.bound_tid., i[[SZ]] %{{.+}}) +// CHECK: define internal {{.*}}void [[OMP_OUTLINED2]](i32* frozen noalias %.global_tid., i32* frozen noalias %.bound_tid., i[[SZ]] frozen %{{.+}}) // CHECK: [[AA_ADDR:%.+]] = alloca i[[SZ]], align // CHECK: store i[[SZ]] %{{.+}}, i[[SZ]]* [[AA_ADDR]], align // CHECK: [[AA_CADDR:%.+]] = bitcast i[[SZ]]* [[AA_ADDR]] to i16* @@ -421,7 +421,7 @@ // CHECK-DAG: call {{.*}}void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* [[DEF_LOC]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i[[SZ]], i[[SZ]])* [[OMP_OUTLINED3:@.+]] to void (i32*, i32*, ...)*), i[[SZ]] [[PARAM1]], i[[SZ]] [[PARAM2]]) // // -// CHECK: define internal {{.*}}void [[OMP_OUTLINED3]](i32* noalias %.global_tid., i32* noalias %.bound_tid., i[[SZ]] %{{.+}}, i[[SZ]] %{{.+}}) +// CHECK: define internal {{.*}}void [[OMP_OUTLINED3]](i32* frozen noalias %.global_tid., i32* frozen noalias %.bound_tid., i[[SZ]] frozen %{{.+}}, i[[SZ]] frozen %{{.+}}) // CHECK: [[A_ADDR:%.+]] = alloca i[[SZ]], align // CHECK: [[AA_ADDR:%.+]] = alloca i[[SZ]], align // CHECK-DAG: store i[[SZ]] %{{.+}}, i[[SZ]]* [[A_ADDR]], align @@ -474,7 +474,7 @@ // CHECK: call {{.*}}void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* [[DEF_LOC]], i32 10, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i[[SZ]], [10 x float]*, i[[SZ]], float*, [5 x [10 x double]]*, i[[SZ]], i[[SZ]], double*, [[TT]]*, i[[SZ]])* [[OMP_OUTLINED4:@.+]] to void (i32*, i32*, ...)*), i[[SZ]] [[REF_A]], [10 x float]* [[REF_B]], i[[SZ]] [[VAL_VLA1]], float* [[REF_BN]], [5 x [10 x double]]* [[REF_C]], i[[SZ]] [[VAL_VLA2]], i[[SZ]] [[VAL_VLA3]], double* [[REF_CN]], [[TT]]* [[REF_D]], i[[SZ]] %{{.+}}) // // -// CHECK: define internal {{.*}}void [[OMP_OUTLINED4]](i32* noalias %.global_tid., i32* noalias %.bound_tid., i[[SZ]] %{{.+}}, [10 x float]* {{.+}}, i[[SZ]] %{{.+}}, float* {{.+}}, [5 x [10 x double]]* {{.+}}, i[[SZ]] %{{.+}}, i[[SZ]] %{{.+}}, double* {{.+}}, [[TT]]* {{.+}}) +// CHECK: define internal {{.*}}void [[OMP_OUTLINED4]](i32* frozen noalias %.global_tid., i32* frozen noalias %.bound_tid., i[[SZ]] frozen %{{.+}}, [10 x float]* {{.+}}, i[[SZ]] frozen %{{.+}}, float* {{.+}}, [5 x [10 x double]]* {{.+}}, i[[SZ]] frozen %{{.+}}, i[[SZ]] frozen %{{.+}}, double* {{.+}}, [[TT]]* {{.+}}) // To reduce complexity, we're only going as far as validating the signature of the outlined parallel function. template @@ -773,7 +773,7 @@ // CHECK: call {{.*}}void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* [[DEF_LOC]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [[S1]]*, i[[SZ]], i[[SZ]], i[[SZ]], i16*)* [[OMP_OUTLINED5:@.+]] to void (i32*, i32*, ...)*), [[S1]]* [[REF_THIS]], i[[SZ]] [[REF_B]], i[[SZ]] [[VAL_VLA1]], i[[SZ]] [[VAL_VLA2]], i16* [[REF_C]]) // // -// CHECK: define internal {{.*}}void [[OMP_OUTLINED5]](i32* noalias %.global_tid., i32* noalias %.bound_tid., [[S1]]* %{{.+}}, i[[SZ]] %{{.+}}, i[[SZ]] %{{.+}}, i[[SZ]] %{{.+}}, i16* {{.+}}) +// CHECK: define internal {{.*}}void [[OMP_OUTLINED5]](i32* frozen noalias %.global_tid., i32* frozen noalias %.bound_tid., [[S1]]* frozen %{{.+}}, i[[SZ]] frozen %{{.+}}, i[[SZ]] frozen %{{.+}}, i[[SZ]] frozen %{{.+}}, i16* {{.+}}) // To reduce complexity, we're only going as far as validating the signature of the outlined parallel function. @@ -818,7 +818,7 @@ // CHECK: call {{.*}}void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* [[DEF_LOC]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i[[SZ]], i[[SZ]], i[[SZ]], i[[SZ]], [10 x i32]*)* [[OMP_OUTLINED6:@.+]] to void (i32*, i32*, ...)*), i[[SZ]] [[REF_A]], i[[SZ]] {{.+}}, i[[SZ]] [[REF_AA]], i[[SZ]] [[REF_AAA]], [10 x i32]* [[REF_B]]) // // -// CHECK: define internal {{.*}}void [[OMP_OUTLINED6]](i32* noalias %.global_tid., i32* noalias %.bound_tid., i[[SZ]] %{{.+}}, i[[SZ]] %{{.+}}, i[[SZ]] %{{.+}}, [10 x i32]* {{.+}}) +// CHECK: define internal {{.*}}void [[OMP_OUTLINED6]](i32* frozen noalias %.global_tid., i32* frozen noalias %.bound_tid., i[[SZ]] frozen %{{.+}}, i[[SZ]] frozen %{{.+}}, i[[SZ]] frozen %{{.+}}, [10 x i32]* {{.+}}) // To reduce complexity, we're only going as far as validating the signature of the outlined parallel function. // CHECK: define internal void [[HVT5]] @@ -851,7 +851,7 @@ // CHECK: call {{.*}}void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* [[DEF_LOC]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i[[SZ]], i[[SZ]], [10 x i32]*)* [[OMP_OUTLINED7:@.+]] to void (i32*, i32*, ...)*), i[[SZ]] [[REF_A]], i[[SZ]] [[REF_AA]], [10 x i32]* [[REF_B]]) // // -// CHECK: define internal {{.*}}void [[OMP_OUTLINED7]](i32* noalias %.global_tid., i32* noalias %.bound_tid., i[[SZ]] %{{.+}}, i[[SZ]] %{{.+}}, [10 x i32]* {{.+}}) +// CHECK: define internal {{.*}}void [[OMP_OUTLINED7]](i32* frozen noalias %.global_tid., i32* frozen noalias %.bound_tid., i[[SZ]] frozen %{{.+}}, i[[SZ]] frozen %{{.+}}, [10 x i32]* {{.+}}) // To reduce complexity, we're only going as far as validating the signature of the outlined parallel function. #endif diff --git a/clang/test/OpenMP/target_teams_distribute_depend_codegen.cpp b/clang/test/OpenMP/target_teams_distribute_depend_codegen.cpp --- a/clang/test/OpenMP/target_teams_distribute_depend_codegen.cpp +++ b/clang/test/OpenMP/target_teams_distribute_depend_codegen.cpp @@ -89,7 +89,7 @@ // CHECK: [[DEP:%.+]] = bitcast %struct.kmp_depend_info* %{{.+}} to i8* // CHECK: call void @__kmpc_omp_wait_deps(%struct.ident_t* [[ID]], i32 [[GTID]], i32 4, i8* [[DEP]], i32 0, i8* null) // CHECK: call void @__kmpc_omp_task_begin_if0(%struct.ident_t* [[ID]], i32 [[GTID]], i8* [[TASK]]) - // CHECK: call i32 [[TASK_ENTRY0]](i32 [[GTID]], [[TASK_TY0]]* [[BC_TASK]]) + // CHECK: call i32 [[TASK_ENTRY0]](i32 frozen [[GTID]], [[TASK_TY0]]* frozen [[BC_TASK]]) // CHECK: call void @__kmpc_omp_task_complete_if0(%struct.ident_t* [[ID]], i32 [[GTID]], i8* [[TASK]]) #pragma omp target teams distribute device(global + a) depend(in: global) depend(out: a, b, cn[4]) for (int i = 0; i < 10; ++i) { @@ -162,7 +162,7 @@ // CHECK: [[DEP:%.+]] = bitcast %struct.kmp_depend_info* %{{.+}} to i8* // CHECK: call void @__kmpc_omp_wait_deps(%struct.ident_t* [[ID]], i32 [[GTID]], i32 1, i8* [[DEP]], i32 0, i8* null) // CHECK: call void @__kmpc_omp_task_begin_if0(%struct.ident_t* [[ID]], i32 [[GTID]], i8* [[TASK]]) - // CHECK: call i32 [[TASK_ENTRY2]](i32 [[GTID]], [[TASK_TY2]]* [[BC_TASK]]) + // CHECK: call i32 [[TASK_ENTRY2]](i32 frozen [[GTID]], [[TASK_TY2]]* frozen [[BC_TASK]]) // CHECK: call void @__kmpc_omp_task_complete_if0(%struct.ident_t* [[ID]], i32 [[GTID]], i8* [[TASK]]) #pragma omp target teams distribute if(0) firstprivate(global) depend(out:global) for (int i = 0; i < global; ++i) { @@ -177,7 +177,7 @@ // CHECK: define internal void [[HVT0:@.+]]() -// CHECK: define internal{{.*}} i32 [[TASK_ENTRY0]](i32{{.*}}, [[TASK_TY0]]* noalias %1) +// CHECK: define internal{{.*}} i32 [[TASK_ENTRY0]](i32{{.*}}, [[TASK_TY0]]* frozen noalias %1) // CHECK: store void (i8*, ...)* null, void (i8*, ...)** % // CHECK: [[DEVICE_CAP:%.+]] = getelementptr inbounds %{{.+}}, %{{.+}}* %{{.+}}, i32 0, i32 0 // CHECK: [[DEV:%.+]] = load i32, i32* [[DEVICE_CAP]], @@ -191,9 +191,9 @@ // CHECK: [[END]] // CHECK: ret i32 0 -// CHECK: define internal void [[HVT1:@.+]](i[[SZ]]* %{{.+}}, i[[SZ]] %{{.+}}) +// CHECK: define internal void [[HVT1:@.+]](i[[SZ]]* frozen %{{.+}}, i[[SZ]] frozen %{{.+}}) -// CHECK: define internal{{.*}} i32 [[TASK_ENTRY1_]](i32{{.*}}, [[TASK_TY1_]]* noalias %1) +// CHECK: define internal{{.*}} i32 [[TASK_ENTRY1_]](i32{{.*}}, [[TASK_TY1_]]* frozen noalias %1) // CHECK: call void (i8*, ...) % // CHECK: [[SZT:%.+]] = getelementptr inbounds [2 x i64], [2 x i64]* %{{.+}}, i[[SZ]] 0, i[[SZ]] 0 // CHECK: [[DEVICE_CAP:%.+]] = getelementptr inbounds %{{.+}}, %{{.+}}* %{{.+}}, i32 0, i32 2 @@ -210,12 +210,12 @@ // CHECK-64: store i32 [[BP1_I32]], i32* [[BP1_CAST]], // CHECK-32: store i32 [[BP1_I32]], i32* [[BP1_PTR:%.+]], // CHECK: [[BP1:%.+]] = load i[[SZ]], i[[SZ]]* [[BP1_PTR]], -// CHECK: call void [[HVT1]](i[[SZ]]* [[BP0]], i[[SZ]] [[BP1]]) +// CHECK: call void [[HVT1]](i[[SZ]]* frozen [[BP0]], i[[SZ]] frozen [[BP1]]) // CHECK-NEXT: br label %[[END]] // CHECK: [[END]] // CHECK: ret i32 0 -// CHECK: define internal{{.*}} i32 [[TASK_ENTRY1__]](i32{{.*}}, [[TASK_TY1__]]* noalias %1) +// CHECK: define internal{{.*}} i32 [[TASK_ENTRY1__]](i32{{.*}}, [[TASK_TY1__]]* frozen noalias %1) // CHECK: call void (i8*, ...) % // CHECK: [[DEVICE_CAP:%.+]] = getelementptr inbounds %{{.+}}, %{{.+}}* %{{.+}}, i32 0, i32 2 // CHECK: [[BP0:%.+]] = load i[[SZ]]*, i[[SZ]]** % @@ -224,10 +224,10 @@ // CHECK-64: store i32 [[BP1_I32]], i32* [[BP1_CAST]], // CHECK-32: store i32 [[BP1_I32]], i32* [[BP1_PTR:%.+]], // CHECK: [[BP1:%.+]] = load i[[SZ]], i[[SZ]]* [[BP1_PTR]], -// CHECK: call void [[HVT1]](i[[SZ]]* [[BP0]], i[[SZ]] [[BP1]]) +// CHECK: call void [[HVT1]](i[[SZ]]* frozen [[BP0]], i[[SZ]] frozen [[BP1]]) // CHECK: ret i32 0 -// CHECK: define internal void [[HVT2:@.+]](i[[SZ]] %{{.+}}) +// CHECK: define internal void [[HVT2:@.+]](i[[SZ]] frozen %{{.+}}) // Create stack storage and store argument in there. // CHECK: [[AA_ADDR:%.+]] = alloca i[[SZ]], align // CHECK: store i[[SZ]] %{{.+}}, i[[SZ]]* [[AA_ADDR]], align @@ -235,14 +235,14 @@ // CHECK-64: load i32, i32* [[AA_CADDR]], align // CHECK-32: load i32, i32* [[AA_ADDR]], align -// CHECK: define internal{{.*}} i32 [[TASK_ENTRY2]](i32{{.*}}, [[TASK_TY2]]* noalias %1) +// CHECK: define internal{{.*}} i32 [[TASK_ENTRY2]](i32{{.*}}, [[TASK_TY2]]* frozen noalias %1) // CHECK: call void (i8*, ...) % // CHECK: [[BP1_I32:%.+]] = load i32, i32* % // CHECK-64: [[BP1_CAST:%.+]] = bitcast i[[SZ]]* [[BP1_PTR:%.+]] to i32* // CHECK-64: store i32 [[BP1_I32]], i32* [[BP1_CAST]], // CHECK-32: store i32 [[BP1_I32]], i32* [[BP1_PTR:%.+]], // CHECK: [[BP1:%.+]] = load i[[SZ]], i[[SZ]]* [[BP1_PTR]], -// CHECK: call void [[HVT2]](i[[SZ]] [[BP1]]) +// CHECK: call void [[HVT2]](i[[SZ]] frozen [[BP1]]) // CHECK: ret i32 0 diff --git a/clang/test/OpenMP/target_teams_distribute_firstprivate_codegen.cpp b/clang/test/OpenMP/target_teams_distribute_firstprivate_codegen.cpp --- a/clang/test/OpenMP/target_teams_distribute_firstprivate_codegen.cpp +++ b/clang/test/OpenMP/target_teams_distribute_firstprivate_codegen.cpp @@ -86,11 +86,11 @@ [&]() { // LAMBDA: define{{.*}} internal{{.*}} void [[OUTER_LAMBDA]]( // LAMBDA: call i32 @__tgt_target_teams(i64 -1, i8* @{{[^,]+}}, i32 3, i8** %{{[^,]+}}, i8** %{{[^,]+}}, i{{64|32}}* {{.+}}@{{[^,]+}}, i32 0, i32 0), i64* {{.+}}@{{[^,]+}}, i32 0, i32 0), i32 0, i32 0) - // LAMBDA: call void @[[LOFFL1:.+]](i{{64|32}} %{{.+}}) + // LAMBDA: call void @[[LOFFL1:.+]](i{{64|32}} frozen %{{.+}}) // LAMBDA: ret #pragma omp target teams distribute firstprivate(g, g1, sivar) for (int i = 0; i < 2; ++i) { - // LAMBDA: define{{.*}} internal{{.*}} void @[[LOFFL1]](i{{64|32}} {{%.+}}, i{{64|32}} {{%.+}}) + // LAMBDA: define{{.*}} internal{{.*}} void @[[LOFFL1]](i{{64|32}} frozen {{%.+}}, i{{64|32}} frozen {{%.+}}) // LAMBDA: {{%.+}} = alloca i{{[0-9]+}}, // LAMBDA: {{%.+}} = alloca i{{[0-9]+}}, // LAMBDA: {{%.+}} = alloca i{{[0-9]+}}, @@ -132,7 +132,7 @@ // LAMBDA: call void [[INNER_LAMBDA:@.+]]( // LAMBDA: call void @__kmpc_for_static_fini( [&]() { - // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* [[ARG_PTR:%.+]]) + // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* frozen [[ARG_PTR:%.+]]) // LAMBDA: store %{{.+}}* [[ARG_PTR]], %{{.+}}** [[ARG_PTR_REF:%.+]], g = 2; g1 = 2; diff --git a/clang/test/OpenMP/target_teams_distribute_lastprivate_codegen.cpp b/clang/test/OpenMP/target_teams_distribute_lastprivate_codegen.cpp --- a/clang/test/OpenMP/target_teams_distribute_lastprivate_codegen.cpp +++ b/clang/test/OpenMP/target_teams_distribute_lastprivate_codegen.cpp @@ -75,8 +75,8 @@ // LAMBDA: call {{.*}}void {{.+}} @__kmpc_fork_teams({{.+}}, i32 4, {{.+}}* [[OMP_OUTLINED:@.+]] to {{.+}}) #pragma omp target teams distribute lastprivate(g, g1, svar, sfvar) for (int i = 0; i < 2; ++i) { - // LAMBDA-64: define{{.*}} internal{{.*}} void [[OMP_OUTLINED]](i32* noalias %{{.+}}, i32* noalias %{{.+}}, i64 [[G_IN:%.+]], i64 [[G1_IN:%.+]], i64 [[SVAR_IN:%.+]], i64 [[SFVAR_IN:%.+]]) - // LAMBDA-32: define{{.*}} internal{{.*}} void [[OMP_OUTLINED]](i32* noalias %{{.+}}, i32* noalias %{{.+}}, double*{{.+}} [[G_IN:%.+]], double*{{.+}} [[G1_IN:%.+]], i32 [[SVAR_IN:%.+]], i32 [[SFVAR_IN:%.+]]) + // LAMBDA-64: define{{.*}} internal{{.*}} void [[OMP_OUTLINED]](i32* frozen noalias %{{.+}}, i32* frozen noalias %{{.+}}, i64 frozen [[G_IN:%.+]], i64 frozen [[G1_IN:%.+]], i64 frozen [[SVAR_IN:%.+]], i64 frozen [[SFVAR_IN:%.+]]) + // LAMBDA-32: define{{.*}} internal{{.*}} void [[OMP_OUTLINED]](i32* frozen noalias %{{.+}}, i32* frozen noalias %{{.+}}, double*{{.+}} [[G_IN:%.+]], double*{{.+}} [[G1_IN:%.+]], i32 frozen [[SVAR_IN:%.+]], i32 frozen [[SFVAR_IN:%.+]]) // LAMBDA-64: [[G_PRIVATE_ADDR:%.+]] = alloca i64, // LAMBDA-32: [[G_PRIVATE_ADDR:%.+]] = alloca double*, // LAMBDA-64: [[G1_PRIVATE_ADDR:%.+]] = alloca i64, @@ -136,7 +136,7 @@ // LAMBDA: store i{{[0-9]+}}* [[SVAR_PRIVATE]], i{{[0-9]+}}** [[SVAR_PRIVATE_ADDR_REF]] // LAMBDA: [[SFVAR_PRIVATE_ADDR_REF:%.+]] = getelementptr inbounds %{{.+}}, %{{.+}}* [[ARG:%.+]], i{{[0-9]+}} 0, i{{[0-9]+}} 3 // LAMBDA: store float* [[SFVAR_PRIVATE]], float** [[SFVAR_PRIVATE_ADDR_REF]] - // LAMBDA: call{{.*}} void [[INNER_LAMBDA:@.+]](%{{.+}}* [[ARG]]) + // LAMBDA: call{{.*}} void [[INNER_LAMBDA:@.+]](%{{.+}}* frozen [[ARG]]) // LAMBDA: call {{.*}}void @__kmpc_for_static_fini( // LAMBDA: [[OMP_IS_LAST_VAL:%.+]] = load i{{[0-9]+}}, i{{[0-9]+}}* [[OMP_IS_LAST]], // LAMBDA: [[IS_LAST_IT:%.+]] = icmp ne i{{[0-9]+}} [[OMP_IS_LAST_VAL]], 0 @@ -158,7 +158,7 @@ // LAMBDA: [[OMP_LASTPRIV_DONE]]: // LAMBDA: ret [&]() { - // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* [[ARG_PTR:%.+]]) + // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* frozen [[ARG_PTR:%.+]]) // LAMBDA: store %{{.+}}* [[ARG_PTR]], %{{.+}}** [[ARG_PTR_REF:%.+]], g = 2; g1 = 2; @@ -202,7 +202,7 @@ // CHECK: define{{.*}} i{{[0-9]+}} @main() // CHECK: [[TEST:%.+]] = alloca [[S_FLOAT_TY]], -// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR:@.+]]([[S_FLOAT_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR:@.+]]([[S_FLOAT_TY]]* frozen [[TEST]]) // CHECK: call i{{[0-9]+}} @__tgt_target_teams( // CHECK: call void [[OFFLOAD_FUN:@.+]]([2 x i{{[0-9]+}}]* {{.+}}, i{{[0-9]+}} {{.+}}, [2 x [[S_FLOAT_TY]]]* {{.+}}, [[S_FLOAT_TY]]* {{.+}}, i{{[0-9]+}} {{.+}}) // CHECK: ret @@ -211,7 +211,7 @@ // CHECK: call void (%{{.+}}*, i{{[0-9]+}}, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)*, ...) @__kmpc_fork_teams( // CHECK: ret // -// CHECK: define internal void [[OMP_OUTLINED:@.+]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}, [2 x i{{[0-9]+}}]*{{.+}} [[VEC_IN:%.+]], i{{[0-9]+}} [[T_VAR_IN:%.+]], [2 x [[S_FLOAT_TY]]]*{{.+}} [[S_ARR_IN:%.+]], [[S_FLOAT_TY]]*{{.+}} [[VAR_IN:%.+]], i{{[0-9]+}} [[S_VAR_IN:%.+]]) +// CHECK: define internal void [[OMP_OUTLINED:@.+]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}, [2 x i{{[0-9]+}}]*{{.+}} [[VEC_IN:%.+]], i{{[0-9]+}} frozen [[T_VAR_IN:%.+]], [2 x [[S_FLOAT_TY]]]*{{.+}} [[S_ARR_IN:%.+]], [[S_FLOAT_TY]]*{{.+}} [[VAR_IN:%.+]], i{{[0-9]+}} frozen [[S_VAR_IN:%.+]]) // CHECK: {{.+}} = alloca i{{[0-9]+}}*, // CHECK: {{.+}} = alloca i{{[0-9]+}}*, // CHECK: [[VEC_ADDR:%.+]] = alloca [2 x i{{[0-9]+}}]*, @@ -302,7 +302,7 @@ // template tmain // CHECK: define{{.*}} i{{[0-9]+}} [[TMAIN_INT:@.+]]() // CHECK: [[TEST:%.+]] = alloca [[S_INT_TY]], -// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR:@.+]]([[S_INT_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR:@.+]]([[S_INT_TY]]* frozen [[TEST]]) // CHECK: call i{{[0-9]+}} @__tgt_target_teams( // CHECK: call void [[OFFLOAD_FUN_1:@.+]]([2 x i{{[0-9]+}}]* {{.+}}, i{{[0-9]+}} {{.+}}, [2 x [[S_INT_TY]]]* {{.+}}, [[S_INT_TY]]* {{.+}}) // CHECK: ret @@ -312,7 +312,7 @@ // CHECK: call void (%{{.+}}*, i{{[0-9]+}}, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)*, ...) @__kmpc_fork_teams(%{{.+}}* @{{.+}}, i{{[0-9]+}} 4, // CHECK: ret -// CHECK: define internal void [[OMP_OUTLINED_1:@.+]](i{{[0-9]+}}* noalias [[GTID_ADDR1:%.+]], i{{[0-9]+}}* noalias %{{.+}}, [2 x i{{[0-9]+}}]*{{.+}} [[VEC_IN1:%.+]], i{{[0-9]+}} [[T_VAR_IN1:%.+]], [2 x [[S_INT_TY]]]*{{.+}} [[S_ARR_IN1:%.+]], [[S_INT_TY]]*{{.+}} [[VAR_IN1:%.+]]) +// CHECK: define internal void [[OMP_OUTLINED_1:@.+]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR1:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}, [2 x i{{[0-9]+}}]*{{.+}} [[VEC_IN1:%.+]], i{{[0-9]+}} frozen [[T_VAR_IN1:%.+]], [2 x [[S_INT_TY]]]*{{.+}} [[S_ARR_IN1:%.+]], [[S_INT_TY]]*{{.+}} [[VAR_IN1:%.+]]) // skip alloca of global_tid and bound_tid // CHECK: {{.+}} = alloca i{{[0-9]+}}*, // CHECK: {{.+}} = alloca i{{[0-9]+}}*, diff --git a/clang/test/OpenMP/target_teams_distribute_loop_messages.cpp b/clang/test/OpenMP/target_teams_distribute_loop_messages.cpp --- a/clang/test/OpenMP/target_teams_distribute_loop_messages.cpp +++ b/clang/test/OpenMP/target_teams_distribute_loop_messages.cpp @@ -145,7 +145,7 @@ for (ii = 0; ii < 10; ++++ii) c[ii] = a[ii]; -// Ok but undefined behavior (in general, cannot check that incr +// Ok but undefined behavior (in frozen general, cannot check incr that // is really loop-invariant). #pragma omp target teams distribute for (ii = 0; ii < 10; ii = ii + ii) diff --git a/clang/test/OpenMP/target_teams_distribute_parallel_for_codegen.cpp b/clang/test/OpenMP/target_teams_distribute_parallel_for_codegen.cpp --- a/clang/test/OpenMP/target_teams_distribute_parallel_for_codegen.cpp +++ b/clang/test/OpenMP/target_teams_distribute_parallel_for_codegen.cpp @@ -63,7 +63,7 @@ // HCK1: call void @__kmpc_push_target_tripcount(i64 -1, i64 %{{.+}}) // HCK1: call i32 @__tgt_target_teams(i64 -1, i8* @{{[^,]+}}, i32 4, i8** %{{[^,]+}}, i8** %{{[^,]+}}, - // HCK1: call void @[[OFFL1:.+]](i{{32|64}} [[N_PAR]], {{.+}}, i{{32|64}} [[TE_PAR]], i{{32|64}} [[TH_PAR]]) + // HCK1: call void @[[OFFL1:.+]](i{{32|64}} frozen [[N_PAR]], {{.+}}, i{{32|64}} frozen [[TE_PAR]], i{{32|64}} frozen [[TH_PAR]]) #pragma omp target teams distribute parallel for num_teams(te), thread_limit(th) for(int i = 0; i < n; i++) { a[i] = 0; @@ -71,7 +71,7 @@ } // HCK1: call i32 @__tgt_target_teams(i64 -1, i8* @{{[^,]+}}, i32 3, i8** %{{[^,]+}}, i8** %{{[^,]+}}, i{{64|32}}* {{.+}}@{{[^,]+}}, i32 0, i32 0), i64* {{.+}}@{{[^,]+}}, i32 0, i32 0), - // HCK1: call void @[[OFFL2:.+]](i{{64|32}} %{{.+}}) + // HCK1: call void @[[OFFL2:.+]](i{{64|32}} frozen %{{.+}}) {{{ #pragma omp target teams distribute parallel for is_device_ptr(g) for(int i = 0; i < n; i++) { @@ -80,8 +80,8 @@ }}} // outlined target regions - // HCK1: define internal void @[[OFFL1]](i{{32|64}} [[N_ARG:%.+]], i{{32|64}} [[TE_ARG:%.+]], i{{32|64}} [[TH_ARG:%.+]]) - // TCK1: define weak void @{{.+}}target_teams_fun{{.*}}(i{{32|64}} [[N_ARG:%.+]], {{.+}}, i{{32|64}} [[TE_ARG:%.+]], i{{32|64}} [[TH_ARG:%.+]]) + // HCK1: define internal void @[[OFFL1]](i{{32|64}} frozen [[N_ARG:%.+]], i{{32|64}} frozen [[TE_ARG:%.+]], i{{32|64}} frozen [[TH_ARG:%.+]]) + // TCK1: define weak void @{{.+}}target_teams_fun{{.*}}(i{{32|64}} frozen [[N_ARG:%.+]], {{.+}}, i{{32|64}} frozen [[TE_ARG:%.+]], i{{32|64}} frozen [[TH_ARG:%.+]]) // CK1: [[N_ADDR:%.+]] = alloca i{{32|64}}, // CK1: [[TE_ADDR:%.+]] = alloca i{{32|64}}, // CK1: [[TH_ADDR:%.+]] = alloca i{{32|64}}, diff --git a/clang/test/OpenMP/target_teams_distribute_parallel_for_depend_codegen.cpp b/clang/test/OpenMP/target_teams_distribute_parallel_for_depend_codegen.cpp --- a/clang/test/OpenMP/target_teams_distribute_parallel_for_depend_codegen.cpp +++ b/clang/test/OpenMP/target_teams_distribute_parallel_for_depend_codegen.cpp @@ -89,7 +89,7 @@ // CHECK: [[DEP:%.+]] = bitcast %struct.kmp_depend_info* %{{.+}} to i8* // CHECK: call void @__kmpc_omp_wait_deps(%struct.ident_t* [[ID]], i32 [[GTID]], i32 4, i8* [[DEP]], i32 0, i8* null) // CHECK: call void @__kmpc_omp_task_begin_if0(%struct.ident_t* [[ID]], i32 [[GTID]], i8* [[TASK]]) - // CHECK: call i32 [[TASK_ENTRY0]](i32 [[GTID]], [[TASK_TY0]]* [[BC_TASK]]) + // CHECK: call i32 [[TASK_ENTRY0]](i32 frozen [[GTID]], [[TASK_TY0]]* frozen [[BC_TASK]]) // CHECK: call void @__kmpc_omp_task_complete_if0(%struct.ident_t* [[ID]], i32 [[GTID]], i8* [[TASK]]) #pragma omp target teams distribute parallel for device(global + a) depend(in: global) depend(out: a, b, cn[4]) for (int i = 0; i < 10; ++i) { @@ -162,7 +162,7 @@ // CHECK: [[DEP:%.+]] = bitcast %struct.kmp_depend_info* %{{.+}} to i8* // CHECK: call void @__kmpc_omp_wait_deps(%struct.ident_t* [[ID]], i32 [[GTID]], i32 1, i8* [[DEP]], i32 0, i8* null) // CHECK: call void @__kmpc_omp_task_begin_if0(%struct.ident_t* [[ID]], i32 [[GTID]], i8* [[TASK]]) - // CHECK: call i32 [[TASK_ENTRY2]](i32 [[GTID]], [[TASK_TY2]]* [[BC_TASK]]) + // CHECK: call i32 [[TASK_ENTRY2]](i32 frozen [[GTID]], [[TASK_TY2]]* frozen [[BC_TASK]]) // CHECK: call void @__kmpc_omp_task_complete_if0(%struct.ident_t* [[ID]], i32 [[GTID]], i8* [[TASK]]) #pragma omp target teams distribute parallel for if(0) firstprivate(global) depend(out:global) for (int i = 0; i < global; ++i) { @@ -177,7 +177,7 @@ // CHECK: define internal void [[HVT0:@.+]]() -// CHECK: define internal{{.*}} i32 [[TASK_ENTRY0]](i32{{.*}}, [[TASK_TY0]]* noalias %1) +// CHECK: define internal{{.*}} i32 [[TASK_ENTRY0]](i32{{.*}}, [[TASK_TY0]]* frozen noalias %1) // CHECK: store void (i8*, ...)* null, void (i8*, ...)** % // CHECK: [[DEVICE_CAP:%.+]] = getelementptr inbounds %{{.+}}, %{{.+}}* %{{.+}}, i32 0, i32 0 // CHECK: [[DEV:%.+]] = load i32, i32* [[DEVICE_CAP]], @@ -191,9 +191,9 @@ // CHECK: [[END]] // CHECK: ret i32 0 -// CHECK: define internal void [[HVT1:@.+]](i[[SZ]]* %{{.+}}, i[[SZ]] %{{.+}}) +// CHECK: define internal void [[HVT1:@.+]](i[[SZ]]* frozen %{{.+}}, i[[SZ]] frozen %{{.+}}) -// CHECK: define internal{{.*}} i32 [[TASK_ENTRY1_]](i32{{.*}}, [[TASK_TY1_]]* noalias %1) +// CHECK: define internal{{.*}} i32 [[TASK_ENTRY1_]](i32{{.*}}, [[TASK_TY1_]]* frozen noalias %1) // CHECK: call void (i8*, ...) % // CHECK: [[SZT:%.+]] = getelementptr inbounds [2 x i64], [2 x i64]* %{{.+}}, i[[SZ]] 0, i[[SZ]] 0 // CHECK: [[DEVICE_CAP:%.+]] = getelementptr inbounds %{{.+}}, %{{.+}}* %{{.+}}, i32 0, i32 2 @@ -210,12 +210,12 @@ // CHECK-64: store i32 [[BP1_I32]], i32* [[BP1_CAST]], // CHECK-32: store i32 [[BP1_I32]], i32* [[BP1_PTR:%.+]], // CHECK: [[BP1:%.+]] = load i[[SZ]], i[[SZ]]* [[BP1_PTR]], -// CHECK: call void [[HVT1]](i[[SZ]]* [[BP0]], i[[SZ]] [[BP1]]) +// CHECK: call void [[HVT1]](i[[SZ]]* frozen [[BP0]], i[[SZ]] frozen [[BP1]]) // CHECK-NEXT: br label %[[END]] // CHECK: [[END]] // CHECK: ret i32 0 -// CHECK: define internal{{.*}} i32 [[TASK_ENTRY1__]](i32{{.*}}, [[TASK_TY1__]]* noalias %1) +// CHECK: define internal{{.*}} i32 [[TASK_ENTRY1__]](i32{{.*}}, [[TASK_TY1__]]* frozen noalias %1) // CHECK: call void (i8*, ...) % // CHECK: [[DEVICE_CAP:%.+]] = getelementptr inbounds %{{.+}}, %{{.+}}* %{{.+}}, i32 0, i32 2 // CHECK: [[BP0:%.+]] = load i[[SZ]]*, i[[SZ]]** % @@ -224,10 +224,10 @@ // CHECK-64: store i32 [[BP1_I32]], i32* [[BP1_CAST]], // CHECK-32: store i32 [[BP1_I32]], i32* [[BP1_PTR:%.+]], // CHECK: [[BP1:%.+]] = load i[[SZ]], i[[SZ]]* [[BP1_PTR]], -// CHECK: call void [[HVT1]](i[[SZ]]* [[BP0]], i[[SZ]] [[BP1]]) +// CHECK: call void [[HVT1]](i[[SZ]]* frozen [[BP0]], i[[SZ]] frozen [[BP1]]) // CHECK: ret i32 0 -// CHECK: define internal void [[HVT2:@.+]](i[[SZ]] %{{.+}}) +// CHECK: define internal void [[HVT2:@.+]](i[[SZ]] frozen %{{.+}}) // Create stack storage and store argument in there. // CHECK: [[AA_ADDR:%.+]] = alloca i[[SZ]], align // CHECK: store i[[SZ]] %{{.+}}, i[[SZ]]* [[AA_ADDR]], align @@ -235,14 +235,14 @@ // CHECK-64: load i32, i32* [[AA_CADDR]], align // CHECK-32: load i32, i32* [[AA_ADDR]], align -// CHECK: define internal{{.*}} i32 [[TASK_ENTRY2]](i32{{.*}}, [[TASK_TY2]]* noalias %1) +// CHECK: define internal{{.*}} i32 [[TASK_ENTRY2]](i32{{.*}}, [[TASK_TY2]]* frozen noalias %1) // CHECK: call void (i8*, ...) % // CHECK: [[BP1_I32:%.+]] = load i32, i32* % // CHECK-64: [[BP1_CAST:%.+]] = bitcast i[[SZ]]* [[BP1_PTR:%.+]] to i32* // CHECK-64: store i32 [[BP1_I32]], i32* [[BP1_CAST]], // CHECK-32: store i32 [[BP1_I32]], i32* [[BP1_PTR:%.+]], // CHECK: [[BP1:%.+]] = load i[[SZ]], i[[SZ]]* [[BP1_PTR]], -// CHECK: call void [[HVT2]](i[[SZ]] [[BP1]]) +// CHECK: call void [[HVT2]](i[[SZ]] frozen [[BP1]]) // CHECK: ret i32 0 diff --git a/clang/test/OpenMP/target_teams_distribute_parallel_for_firstprivate_codegen.cpp b/clang/test/OpenMP/target_teams_distribute_parallel_for_firstprivate_codegen.cpp --- a/clang/test/OpenMP/target_teams_distribute_parallel_for_firstprivate_codegen.cpp +++ b/clang/test/OpenMP/target_teams_distribute_parallel_for_firstprivate_codegen.cpp @@ -110,12 +110,12 @@ [&]() { // HLAMBDA: define{{.*}} internal{{.*}} void [[OUTER_LAMBDA]]( // HLAMBDA: call i32 @__tgt_target_teams(i64 -1, i8* @{{[^,]+}}, i32 3, i8** %{{[^,]+}}, i8** %{{[^,]+}}, i{{64|32}}* {{.+}}@{{[^,]+}}, i32 0, i32 0), i64* {{.+}}@{{[^,]+}}, i32 0, i32 0), i32 0, i32 0) - // HLAMBDA: call void @[[LOFFL1:.+]](i{{64|32}} %{{.+}}) + // HLAMBDA: call void @[[LOFFL1:.+]](i{{64|32}} frozen %{{.+}}) // HLAMBDA: ret #pragma omp target teams distribute parallel for firstprivate(g, g1, sivar) for (int i = 0; i < 2; ++i) { - // HLAMBDA: define{{.*}} internal{{.*}} void @[[LOFFL1]](i{{64|32}} {{%.+}}, i{{64|32}} {{%.+}}) - // TLAMBDA: define weak void @[[LOFFL1:.+]](i{{64|32}} {{%.+}}, i{{64|32}} {{%.+}}) + // HLAMBDA: define{{.*}} internal{{.*}} void @[[LOFFL1]](i{{64|32}} frozen {{%.+}}, i{{64|32}} frozen {{%.+}}) + // TLAMBDA: define weak void @[[LOFFL1:.+]](i{{64|32}} frozen {{%.+}}, i{{64|32}} frozen {{%.+}}) // LAMBDA: {{%.+}} = alloca i{{[0-9]+}}, // LAMBDA: {{%.+}} = alloca i{{[0-9]+}}, // LAMBDA: {{%.+}} = alloca i{{[0-9]+}}, @@ -181,7 +181,7 @@ // LAMBDA: call void @__kmpc_for_static_fini( // LAMBDA: ret void [&]() { - // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* [[ARG_PTR:%.+]]) + // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* frozen [[ARG_PTR:%.+]]) // LAMBDA: store %{{.+}}* [[ARG_PTR]], %{{.+}}** [[ARG_PTR_REF:%.+]], g = 2; g1 = 2; diff --git a/clang/test/OpenMP/target_teams_distribute_parallel_for_lastprivate_codegen.cpp b/clang/test/OpenMP/target_teams_distribute_parallel_for_lastprivate_codegen.cpp --- a/clang/test/OpenMP/target_teams_distribute_parallel_for_lastprivate_codegen.cpp +++ b/clang/test/OpenMP/target_teams_distribute_parallel_for_lastprivate_codegen.cpp @@ -124,7 +124,7 @@ // LAMBDA: [[OMP_LASTPRIV_DONE]]: // LAMBDA: ret - // LAMBDA: define{{.*}} internal{{.*}} void @[[LPAR_OUTL]](i32* noalias %{{.+}}, i32* noalias %{{.+}}, {{.+}}, {{.+}}, {{.+}} [[G1_IN:%.+]], {{.+}} [[SVAR_IN:%.+]], {{.+}} [[SFVAR_IN:%.+]], {{.+}} [[G_IN:%.+]]) + // LAMBDA: define{{.*}} internal{{.*}} void @[[LPAR_OUTL]](i32* frozen noalias %{{.+}}, i32* frozen noalias %{{.+}}, {{.+}}, {{.+}}, {{.+}} [[G1_IN:%.+]], {{.+}} [[SVAR_IN:%.+]], {{.+}} [[SFVAR_IN:%.+]], {{.+}} [[G_IN:%.+]]) // skip tid and prev variables // LAMBDA: alloca // LAMBDA: alloca @@ -174,7 +174,7 @@ // LAMBDA: ret [&]() { - // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* [[ARG_PTR:%.+]]) + // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* frozen [[ARG_PTR:%.+]]) // LAMBDA: store %{{.+}}* [[ARG_PTR]], %{{.+}}** [[ARG_PTR_REF:%.+]], g = 2; g1 = 2; @@ -218,7 +218,7 @@ // CHECK: define{{.*}} i{{[0-9]+}} @main() // CHECK: [[TEST:%.+]] = alloca [[S_FLOAT_TY]], -// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR:@.+]]([[S_FLOAT_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR:@.+]]([[S_FLOAT_TY]]* frozen [[TEST]]) // CHECK: call i{{[0-9]+}} @__tgt_target_teams( // CHECK: call void [[OFFLOAD_FUN:@.+]]( // CHECK: ret @@ -227,7 +227,7 @@ // CHECK: call void (%{{.+}}*, i{{[0-9]+}}, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)*, ...) @__kmpc_fork_teams( // CHECK: ret // -// CHECK: define internal void [[OMP_OUTLINED:@.+]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}, [2 x i{{[0-9]+}}]*{{.+}} [[VEC_IN:%.+]], i{{[0-9]+}}{{.+}} [[T_VAR_IN:%.+]], [2 x [[S_FLOAT_TY]]]*{{.+}} [[S_ARR_IN:%.+]], [[S_FLOAT_TY]]*{{.+}} [[VAR_IN:%.+]], i{{[0-9]+}}{{.*}} [[S_VAR_IN:%.+]]) +// CHECK: define internal void [[OMP_OUTLINED:@.+]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}, [2 x i{{[0-9]+}}]*{{.+}} [[VEC_IN:%.+]], i{{[0-9]+}}{{.+}} [[T_VAR_IN:%.+]], [2 x [[S_FLOAT_TY]]]*{{.+}} [[S_ARR_IN:%.+]], [[S_FLOAT_TY]]*{{.+}} [[VAR_IN:%.+]], i{{[0-9]+}}{{.*}} [[S_VAR_IN:%.+]]) // CHECK: {{.+}} = alloca i{{[0-9]+}}*, // CHECK: {{.+}} = alloca i{{[0-9]+}}*, // CHECK: [[VEC_ADDR:%.+]] = alloca [2 x i{{[0-9]+}}]*, @@ -281,7 +281,7 @@ // CHECK-32-DAG: store {{.+}}, {{.+}} [[SVAR_ADDR]], // CHECK: ret void -// CHECK: define internal void [[OMP_OUTLINED:@.+]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}, {{.+}}, {{.+}}, [2 x i{{[0-9]+}}]*{{.+}} [[VEC_IN:%.+]], i{{[0-9]+}}{{.+}} [[T_VAR_IN:%.+]], [2 x [[S_FLOAT_TY]]]*{{.+}} [[S_ARR_IN:%.+]], [[S_FLOAT_TY]]*{{.+}} [[VAR_IN:%.+]], i{{[0-9]+}}{{.*}} [[S_VAR_IN:%.+]]) +// CHECK: define internal void [[OMP_OUTLINED:@.+]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}, {{.+}}, {{.+}}, [2 x i{{[0-9]+}}]*{{.+}} [[VEC_IN:%.+]], i{{[0-9]+}}{{.+}} [[T_VAR_IN:%.+]], [2 x [[S_FLOAT_TY]]]*{{.+}} [[S_ARR_IN:%.+]], [[S_FLOAT_TY]]*{{.+}} [[VAR_IN:%.+]], i{{[0-9]+}}{{.*}} [[S_VAR_IN:%.+]]) // gbl and bound tid vars, prev lb and ub vars // CHECK: {{.+}} = alloca i{{[0-9]+}}*, @@ -343,7 +343,7 @@ // template tmain // CHECK: define{{.*}} i{{[0-9]+}} [[TMAIN_INT:@.+]]() // CHECK: [[TEST:%.+]] = alloca [[S_INT_TY]], -// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR:@.+]]([[S_INT_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR:@.+]]([[S_INT_TY]]* frozen [[TEST]]) // CHECK: call i{{[0-9]+}} @__tgt_target_teams( // CHECK: call void [[OFFLOAD_FUN_1:@.+]]( // CHECK: ret @@ -352,7 +352,7 @@ // CHECK: call void (%{{.+}}*, i{{[0-9]+}}, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)*, ...) @__kmpc_fork_teams(%{{.+}}* @{{.+}}, i{{[0-9]+}} 4, // CHECK: ret -// CHECK: define internal void [[OMP_OUTLINED_1:@.+]](i{{[0-9]+}}* noalias [[GTID_ADDR1:%.+]], i{{[0-9]+}}* noalias %{{.+}}, [2 x i{{[0-9]+}}]*{{.+}} [[VEC_IN1:%.+]], i{{[0-9]+}}{{.+}} [[T_VAR_IN1:%.+]], [2 x [[S_INT_TY]]]*{{.+}} [[S_ARR_IN1:%.+]], [[S_INT_TY]]*{{.+}} [[VAR_IN1:%.+]]) +// CHECK: define internal void [[OMP_OUTLINED_1:@.+]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR1:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}, [2 x i{{[0-9]+}}]*{{.+}} [[VEC_IN1:%.+]], i{{[0-9]+}}{{.+}} [[T_VAR_IN1:%.+]], [2 x [[S_INT_TY]]]*{{.+}} [[S_ARR_IN1:%.+]], [[S_INT_TY]]*{{.+}} [[VAR_IN1:%.+]]) // skip alloca of global_tid and bound_tid // CHECK: {{.+}} = alloca i{{[0-9]+}}*, // CHECK: {{.+}} = alloca i{{[0-9]+}}*, @@ -401,7 +401,7 @@ // CHECK-DAG: call void @llvm.memcpy.{{.+}}(i8* align {{[0-9]+}} [[VAR_ADDR_BCAST]], // CHECK: ret void -// CHECK: define internal void [[TPAR_OUTL:@.+]](i{{[0-9]+}}* noalias [[GTID_ADDR1:%.+]], i{{[0-9]+}}* noalias %{{.+}}, {{.+}}, {{.+}}, [2 x i{{[0-9]+}}]*{{.+}} [[VEC_IN1:%.+]], i{{[0-9]+}}{{.+}} [[T_VAR_IN1:%.+]], [2 x [[S_INT_TY]]]*{{.+}} [[S_ARR_IN1:%.+]], [[S_INT_TY]]*{{.+}} [[VAR_IN1:%.+]]) +// CHECK: define internal void [[TPAR_OUTL:@.+]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR1:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}, {{.+}}, {{.+}}, [2 x i{{[0-9]+}}]*{{.+}} [[VEC_IN1:%.+]], i{{[0-9]+}}{{.+}} [[T_VAR_IN1:%.+]], [2 x [[S_INT_TY]]]*{{.+}} [[S_ARR_IN1:%.+]], [[S_INT_TY]]*{{.+}} [[VAR_IN1:%.+]]) // skip alloca of global_tid and bound_tid, and prev lb and ub vars // CHECK: {{.+}} = alloca i{{[0-9]+}}*, // CHECK: {{.+}} = alloca i{{[0-9]+}}*, diff --git a/clang/test/OpenMP/target_teams_distribute_parallel_for_loop_messages.cpp b/clang/test/OpenMP/target_teams_distribute_parallel_for_loop_messages.cpp --- a/clang/test/OpenMP/target_teams_distribute_parallel_for_loop_messages.cpp +++ b/clang/test/OpenMP/target_teams_distribute_parallel_for_loop_messages.cpp @@ -145,7 +145,7 @@ for (ii = 0; ii < 10; ++++ii) c[ii] = a[ii]; -// Ok but undefined behavior (in general, cannot check that incr +// Ok but undefined behavior (in frozen general, cannot check incr that // is really loop-invariant). #pragma omp target teams distribute parallel for for (ii = 0; ii < 10; ii = ii + ii) diff --git a/clang/test/OpenMP/target_teams_distribute_parallel_for_private_codegen.cpp b/clang/test/OpenMP/target_teams_distribute_parallel_for_private_codegen.cpp --- a/clang/test/OpenMP/target_teams_distribute_parallel_for_private_codegen.cpp +++ b/clang/test/OpenMP/target_teams_distribute_parallel_for_private_codegen.cpp @@ -167,7 +167,7 @@ // LAMBDA: call void @__kmpc_for_static_fini( // LAMBDA: ret void [&]() { - // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* [[ARG_PTR:%.+]]) + // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* frozen [[ARG_PTR:%.+]]) // LAMBDA: store %{{.+}}* [[ARG_PTR]], %{{.+}}** [[ARG_PTR_REF:%.+]], g = 2; g1 = 2; diff --git a/clang/test/OpenMP/target_teams_distribute_parallel_for_reduction_codegen.cpp b/clang/test/OpenMP/target_teams_distribute_parallel_for_reduction_codegen.cpp --- a/clang/test/OpenMP/target_teams_distribute_parallel_for_reduction_codegen.cpp +++ b/clang/test/OpenMP/target_teams_distribute_parallel_for_reduction_codegen.cpp @@ -142,7 +142,7 @@ sivar += i; [&]() { - // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* [[ARG_PTR:%.+]]) + // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* frozen [[ARG_PTR:%.+]]) // LAMBDA: store %{{.+}}* [[ARG_PTR]], %{{.+}}** [[ARG_PTR_REF:%.+]], sivar += 4; @@ -170,7 +170,7 @@ // CHECK: define {{.*}}i{{[0-9]+}} @main() // CHECK: call i32 @__tgt_target_teams(i64 -1, i8* @{{[^,]+}}, i32 1, i8** %{{[^,]+}}, i8** %{{[^,]+}}, i{{64|32}}* {{.+}}@{{[^,]+}}, i32 0, i32 0), i64* {{.+}}@{{[^,]+}}, i32 0, i32 0), i32 0, i32 0) -// CHECK: call void @[[OFFL1:.+]](i{{64|32}}* @{{.+}}) +// CHECK: call void @[[OFFL1:.+]](i{{64|32}}* frozen @{{.+}}) // CHECK: {{%.+}} = call{{.*}} i32 @[[TMAIN_INT:.+]]() // CHECK: ret diff --git a/clang/test/OpenMP/target_teams_distribute_parallel_for_reduction_task_codegen.cpp b/clang/test/OpenMP/target_teams_distribute_parallel_for_reduction_task_codegen.cpp --- a/clang/test/OpenMP/target_teams_distribute_parallel_for_reduction_task_codegen.cpp +++ b/clang/test/OpenMP/target_teams_distribute_parallel_for_reduction_task_codegen.cpp @@ -21,7 +21,7 @@ // CHECK: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @{{.+}}, i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i8***)* [[OUTLINED:@.+]] to void (i32*, i32*, ...)*), i64 %{{.+}}, i64 %{{.+}}, i32* %{{.+}}, i8*** %{{.+}}) -// CHECK: define internal void [[OUTLINED]](i32* noalias %{{.+}}, i32* noalias %{{.+}}, i64 %{{.+}}, i64 %{{.+}}, i32* {{.+}}, i8*** {{.+}}) +// CHECK: define internal void [[OUTLINED]](i32* frozen noalias %{{.+}}, i32* frozen noalias %{{.+}}, i64 frozen %{{.+}}, i64 frozen %{{.+}}, i32* {{.+}}, i8*** {{.+}}) // CHECK: alloca i32, // CHECK: [[ARGC_FP_ADDR:%.+]] = alloca i32, // CHECK: [[TR:%.+]] = alloca [2 x [[TASKRED_TY:%struct.kmp_taskred_input_t.*]]], @@ -94,26 +94,26 @@ // CHECK: call void @__kmpc_task_reduction_modifier_fini(%struct.ident_t* @{{.+}}, i32 %{{.+}}, i32 1) // CHECK: call i32 @__kmpc_reduce_nowait( -// CHECK: define internal void [[ARGC_INIT]](i8* noalias %{{.+}}, i8* noalias %{{.+}}) +// CHECK: define internal void [[ARGC_INIT]](i8* frozen noalias %{{.+}}, i8* frozen noalias %{{.+}}) // CHECK: store i32 0, i32* %{{.+}}, -// CHECK: define internal void [[ARGC_COMB]](i8* %{{.+}}, i8* %{{.+}}) +// CHECK: define internal void [[ARGC_COMB]](i8* frozen %{{.+}}, i8* frozen %{{.+}}) // CHECK: [[ADD:%.+]] = add nsw i32 %{{.+}}, %{{.+}} // CHECK: store i32 [[ADD]], i32* %{{.+}}, -// CHECK: define internal void [[ARGV_INIT]](i8* noalias %{{.+}}, i8* noalias %{{.+}}) +// CHECK: define internal void [[ARGV_INIT]](i8* frozen noalias %{{.+}}, i8* frozen noalias %{{.+}}) // CHECK: phi i8* // CHECK: store i8 0, i8* [[EL:%.+]], // CHECK: getelementptr i8, i8* [[EL]], i32 1 -// CHECK: define internal void [[ARGV_COMB]](i8* %{{.+}}, i8* %{{.+}}) +// CHECK: define internal void [[ARGV_COMB]](i8* frozen %{{.+}}, i8* frozen %{{.+}}) // CHECK: phi i8* // CHECK: [[ADD:%.+]] = add nsw i32 %{{.+}}, %{{.+}} // CHECK: [[CONV:%.+]] = trunc i32 [[ADD]] to i8 // CHECK: store i8 [[CONV]], i8* [[EL:%.+]], // CHECK: getelementptr i8, i8* [[EL]], i32 1 -// CHECK: define internal {{.*}}i32 [[TASK]](i32 {{.+}}, [[TASK_TY]]* {{.+}}) +// CHECK: define internal {{.*}}frozen i32 [[TASK]](i32 {{.+}}, [[TASK_TY]]* {{.+}}) // CHECK-DAG: call i8* @__kmpc_task_reduction_get_th_data(i32 %{{.+}}, i8* [[TG:%.+]], i8* [[ARGC_REF:%.+]]) // CHECK_DAG: [[TG]] = load i8*, i8** [[TG_ADDR:%.+]], // CHECK-DAG: [[ARGC_REF]] = bitcast i32* [[ARGC_ADDR:%.+]] to i8* diff --git a/clang/test/OpenMP/target_teams_distribute_parallel_for_simd_codegen.cpp b/clang/test/OpenMP/target_teams_distribute_parallel_for_simd_codegen.cpp --- a/clang/test/OpenMP/target_teams_distribute_parallel_for_simd_codegen.cpp +++ b/clang/test/OpenMP/target_teams_distribute_parallel_for_simd_codegen.cpp @@ -63,7 +63,7 @@ // HCK1: call void @__kmpc_push_target_tripcount(i64 -1, i64 %{{.+}}) // HCK1: call i32 @__tgt_target_teams(i64 -1, i8* @{{[^,]+}}, i32 5, i8** %{{[^,]+}}, i8** %{{[^,]+}}, -// HCK1: call void @[[OFFL1:.+]](i{{32|64}} [[I_PAR]], i{{32|64}} [[N_PAR]], {{.+}}, i{{32|64}} [[TE_PAR]], i{{32|64}} [[TH_PAR]]) +// HCK1: call void @[[OFFL1:.+]](i{{32|64}} frozen [[I_PAR]], i{{32|64}} frozen [[N_PAR]], {{.+}}, i{{32|64}} frozen [[TE_PAR]], i{{32|64}} frozen [[TH_PAR]]) int i; #pragma omp target teams distribute parallel for simd num_teams(te), thread_limit(th) aligned(a : 8) safelen(16) simdlen(4) linear(i : n) for(i = 0; i < n; i++) { @@ -71,7 +71,7 @@ } // HCK1: call i32 @__tgt_target_teams(i64 -1, i8* @{{[^,]+}}, i32 3, i8** %{{[^,]+}}, i8** %{{[^,]+}}, i{{64|32}}* {{.+}}@{{[^,]+}}, i32 0, i32 0), i64* {{.+}}@{{[^,]+}}, i32 0, i32 0), - // HCK1: call void @[[OFFL2:.+]](i{{64|32}} %{{.+}}) + // HCK1: call void @[[OFFL2:.+]](i{{64|32}} frozen %{{.+}}) {{{ #pragma omp target teams distribute parallel for simd is_device_ptr(g) simdlen(8) for(int i = 0; i < n; i++) { @@ -80,8 +80,8 @@ }}} // outlined target regions - // HCK1: define internal void @[[OFFL1]](i{{32|64}} [[I_ARG:%.+]], i{{32|64}} [[N_ARG:%.+]], {{.+}}, i{{32|64}} [[TE_ARG:%.+]], i{{32|64}} [[TH_ARG:%.+]]) - // TCK1: define weak void @{{.+}}target_teams_fun{{.*}}(i{{32|64}} [[I_ARG:%.+]], i{{32|64}} [[N_ARG:%.+]], {{.+}}, i{{32|64}} [[TE_ARG:%.+]], i{{32|64}} [[TH_ARG:%.+]]) + // HCK1: define internal void @[[OFFL1]](i{{32|64}} frozen [[I_ARG:%.+]], i{{32|64}} frozen [[N_ARG:%.+]], {{.+}}, i{{32|64}} frozen [[TE_ARG:%.+]], i{{32|64}} frozen [[TH_ARG:%.+]]) + // TCK1: define weak void @{{.+}}target_teams_fun{{.*}}(i{{32|64}} frozen [[I_ARG:%.+]], i{{32|64}} frozen [[N_ARG:%.+]], {{.+}}, i{{32|64}} frozen [[TE_ARG:%.+]], i{{32|64}} frozen [[TH_ARG:%.+]]) // CK1: [[I_ADDR:%.+]] = alloca i{{32|64}}, // CK1: [[N_ADDR:%.+]] = alloca i{{32|64}}, // CK1: [[TE_ADDR:%.+]] = alloca i{{32|64}}, diff --git a/clang/test/OpenMP/target_teams_distribute_parallel_for_simd_depend_codegen.cpp b/clang/test/OpenMP/target_teams_distribute_parallel_for_simd_depend_codegen.cpp --- a/clang/test/OpenMP/target_teams_distribute_parallel_for_simd_depend_codegen.cpp +++ b/clang/test/OpenMP/target_teams_distribute_parallel_for_simd_depend_codegen.cpp @@ -89,7 +89,7 @@ // CHECK: [[DEP:%.+]] = bitcast %struct.kmp_depend_info* %{{.+}} to i8* // CHECK: call void @__kmpc_omp_wait_deps(%struct.ident_t* [[ID]], i32 [[GTID]], i32 4, i8* [[DEP]], i32 0, i8* null) // CHECK: call void @__kmpc_omp_task_begin_if0(%struct.ident_t* [[ID]], i32 [[GTID]], i8* [[TASK]]) - // CHECK: call i32 [[TASK_ENTRY0]](i32 [[GTID]], [[TASK_TY0]]* [[BC_TASK]]) + // CHECK: call i32 [[TASK_ENTRY0]](i32 frozen [[GTID]], [[TASK_TY0]]* frozen [[BC_TASK]]) // CHECK: call void @__kmpc_omp_task_complete_if0(%struct.ident_t* [[ID]], i32 [[GTID]], i8* [[TASK]]) #pragma omp target teams distribute parallel for simd device(global + a) depend(in: global) depend(out: a, b, cn[4]) for (int i = 0; i < 10; ++i) { @@ -162,7 +162,7 @@ // CHECK: [[DEP:%.+]] = bitcast %struct.kmp_depend_info* %{{.+}} to i8* // CHECK: call void @__kmpc_omp_wait_deps(%struct.ident_t* [[ID]], i32 [[GTID]], i32 1, i8* [[DEP]], i32 0, i8* null) // CHECK: call void @__kmpc_omp_task_begin_if0(%struct.ident_t* [[ID]], i32 [[GTID]], i8* [[TASK]]) - // CHECK: call i32 [[TASK_ENTRY2]](i32 [[GTID]], [[TASK_TY2]]* [[BC_TASK]]) + // CHECK: call i32 [[TASK_ENTRY2]](i32 frozen [[GTID]], [[TASK_TY2]]* frozen [[BC_TASK]]) // CHECK: call void @__kmpc_omp_task_complete_if0(%struct.ident_t* [[ID]], i32 [[GTID]], i8* [[TASK]]) #pragma omp target teams distribute parallel for simd if(0) firstprivate(global) depend(out:global) for (int i = 0; i < global; ++i) { @@ -177,7 +177,7 @@ // CHECK: define internal void [[HVT0:@.+]]() -// CHECK: define internal{{.*}} i32 [[TASK_ENTRY0]](i32{{.*}}, [[TASK_TY0]]* noalias %1) +// CHECK: define internal{{.*}} i32 [[TASK_ENTRY0]](i32{{.*}}, [[TASK_TY0]]* frozen noalias %1) // CHECK: store void (i8*, ...)* null, void (i8*, ...)** % // CHECK: [[DEVICE_CAP:%.+]] = getelementptr inbounds %{{.+}}, %{{.+}}* %{{.+}}, i32 0, i32 0 // CHECK: [[DEV:%.+]] = load i32, i32* [[DEVICE_CAP]], @@ -191,9 +191,9 @@ // CHECK: [[END]] // CHECK: ret i32 0 -// CHECK: define internal void [[HVT1:@.+]](i[[SZ]]* %{{.+}}, i[[SZ]] %{{.+}}) +// CHECK: define internal void [[HVT1:@.+]](i[[SZ]]* frozen %{{.+}}, i[[SZ]] frozen %{{.+}}) -// CHECK: define internal{{.*}} i32 [[TASK_ENTRY1_]](i32{{.*}}, [[TASK_TY1_]]* noalias %1) +// CHECK: define internal{{.*}} i32 [[TASK_ENTRY1_]](i32{{.*}}, [[TASK_TY1_]]* frozen noalias %1) // CHECK: call void (i8*, ...) % // CHECK: [[SZT:%.+]] = getelementptr inbounds [2 x i64], [2 x i64]* %{{.+}}, i[[SZ]] 0, i[[SZ]] 0 // CHECK: [[DEVICE_CAP:%.+]] = getelementptr inbounds %{{.+}}, %{{.+}}* %{{.+}}, i32 0, i32 2 @@ -210,12 +210,12 @@ // CHECK-64: store i32 [[BP1_I32]], i32* [[BP1_CAST]], // CHECK-32: store i32 [[BP1_I32]], i32* [[BP1_PTR:%.+]], // CHECK: [[BP1:%.+]] = load i[[SZ]], i[[SZ]]* [[BP1_PTR]], -// CHECK: call void [[HVT1]](i[[SZ]]* [[BP0]], i[[SZ]] [[BP1]]) +// CHECK: call void [[HVT1]](i[[SZ]]* frozen [[BP0]], i[[SZ]] frozen [[BP1]]) // CHECK-NEXT: br label %[[END]] // CHECK: [[END]] // CHECK: ret i32 0 -// CHECK: define internal{{.*}} i32 [[TASK_ENTRY1__]](i32{{.*}}, [[TASK_TY1__]]* noalias %1) +// CHECK: define internal{{.*}} i32 [[TASK_ENTRY1__]](i32{{.*}}, [[TASK_TY1__]]* frozen noalias %1) // CHECK: call void (i8*, ...) % // CHECK: [[DEVICE_CAP:%.+]] = getelementptr inbounds %{{.+}}, %{{.+}}* %{{.+}}, i32 0, i32 2 // CHECK: [[BP0:%.+]] = load i[[SZ]]*, i[[SZ]]** % @@ -224,10 +224,10 @@ // CHECK-64: store i32 [[BP1_I32]], i32* [[BP1_CAST]], // CHECK-32: store i32 [[BP1_I32]], i32* [[BP1_PTR:%.+]], // CHECK: [[BP1:%.+]] = load i[[SZ]], i[[SZ]]* [[BP1_PTR]], -// CHECK: call void [[HVT1]](i[[SZ]]* [[BP0]], i[[SZ]] [[BP1]]) +// CHECK: call void [[HVT1]](i[[SZ]]* frozen [[BP0]], i[[SZ]] frozen [[BP1]]) // CHECK: ret i32 0 -// CHECK: define internal void [[HVT2:@.+]](i[[SZ]] %{{.+}}) +// CHECK: define internal void [[HVT2:@.+]](i[[SZ]] frozen %{{.+}}) // Create stack storage and store argument in there. // CHECK: [[AA_ADDR:%.+]] = alloca i[[SZ]], align // CHECK: store i[[SZ]] %{{.+}}, i[[SZ]]* [[AA_ADDR]], align @@ -235,14 +235,14 @@ // CHECK-64: load i32, i32* [[AA_CADDR]], align // CHECK-32: load i32, i32* [[AA_ADDR]], align -// CHECK: define internal{{.*}} i32 [[TASK_ENTRY2]](i32{{.*}}, [[TASK_TY2]]* noalias %1) +// CHECK: define internal{{.*}} i32 [[TASK_ENTRY2]](i32{{.*}}, [[TASK_TY2]]* frozen noalias %1) // CHECK: call void (i8*, ...) % // CHECK: [[BP1_I32:%.+]] = load i32, i32* % // CHECK-64: [[BP1_CAST:%.+]] = bitcast i[[SZ]]* [[BP1_PTR:%.+]] to i32* // CHECK-64: store i32 [[BP1_I32]], i32* [[BP1_CAST]], // CHECK-32: store i32 [[BP1_I32]], i32* [[BP1_PTR:%.+]], // CHECK: [[BP1:%.+]] = load i[[SZ]], i[[SZ]]* [[BP1_PTR]], -// CHECK: call void [[HVT2]](i[[SZ]] [[BP1]]) +// CHECK: call void [[HVT2]](i[[SZ]] frozen [[BP1]]) // CHECK: ret i32 0 diff --git a/clang/test/OpenMP/target_teams_distribute_parallel_for_simd_firstprivate_codegen.cpp b/clang/test/OpenMP/target_teams_distribute_parallel_for_simd_firstprivate_codegen.cpp --- a/clang/test/OpenMP/target_teams_distribute_parallel_for_simd_firstprivate_codegen.cpp +++ b/clang/test/OpenMP/target_teams_distribute_parallel_for_simd_firstprivate_codegen.cpp @@ -110,12 +110,12 @@ [&]() { // HLAMBDA: define{{.*}} internal{{.*}} void [[OUTER_LAMBDA]]( // HLAMBDA: call i32 @__tgt_target_teams(i64 -1, i8* @{{[^,]+}}, i32 3, i8** %{{[^,]+}}, i8** %{{[^,]+}}, i{{64|32}}* {{.+}}@{{[^,]+}}, i32 0, i32 0), i64* {{.+}}@{{[^,]+}}, i32 0, i32 0), i32 0, i32 0) - // HLAMBDA: call void @[[LOFFL1:.+]](i{{64|32}} %{{.+}}) + // HLAMBDA: call void @[[LOFFL1:.+]](i{{64|32}} frozen %{{.+}}) // HLAMBDA: ret #pragma omp target teams distribute parallel for simd firstprivate(g, g1, sivar) for (int i = 0; i < 2; ++i) { - // HLAMBDA: define{{.*}} internal{{.*}} void @[[LOFFL1]](i{{64|32}} {{%.+}}, i{{64|32}} {{%.+}}) - // TLAMBDA: define weak void @[[LOFFL1:.+]](i{{64|32}} {{%.+}}, i{{64|32}} {{%.+}}) + // HLAMBDA: define{{.*}} internal{{.*}} void @[[LOFFL1]](i{{64|32}} frozen {{%.+}}, i{{64|32}} frozen {{%.+}}) + // TLAMBDA: define weak void @[[LOFFL1:.+]](i{{64|32}} frozen {{%.+}}, i{{64|32}} frozen {{%.+}}) // LAMBDA: {{%.+}} = alloca i{{[0-9]+}}, // LAMBDA: {{%.+}} = alloca i{{[0-9]+}}, // LAMBDA: {{%.+}} = alloca i{{[0-9]+}}, @@ -181,7 +181,7 @@ // LAMBDA: call void @__kmpc_for_static_fini( // LAMBDA: ret void [&]() { - // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* [[ARG_PTR:%.+]]) + // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* frozen [[ARG_PTR:%.+]]) // LAMBDA: store %{{.+}}* [[ARG_PTR]], %{{.+}}** [[ARG_PTR_REF:%.+]], g = 2; g1 = 2; diff --git a/clang/test/OpenMP/target_teams_distribute_parallel_for_simd_lastprivate_codegen.cpp b/clang/test/OpenMP/target_teams_distribute_parallel_for_simd_lastprivate_codegen.cpp --- a/clang/test/OpenMP/target_teams_distribute_parallel_for_simd_lastprivate_codegen.cpp +++ b/clang/test/OpenMP/target_teams_distribute_parallel_for_simd_lastprivate_codegen.cpp @@ -125,7 +125,7 @@ // LAMBDA: [[OMP_LASTPRIV_DONE]]: // LAMBDA: ret - // LAMBDA: define{{.*}} internal{{.*}} void @[[LPAR_OUTL]](i32* noalias %{{.+}}, i32* noalias %{{.+}}, {{.+}}, {{.+}}, {{.+}} [[G1_IN:%.+]], {{.+}} [[SVAR_IN:%.+]], {{.+}} [[SFVAR_IN:%.+]], {{.+}} [[G_IN:%.+]]) + // LAMBDA: define{{.*}} internal{{.*}} void @[[LPAR_OUTL]](i32* frozen noalias %{{.+}}, i32* frozen noalias %{{.+}}, {{.+}}, {{.+}}, {{.+}} [[G1_IN:%.+]], {{.+}} [[SVAR_IN:%.+]], {{.+}} [[SFVAR_IN:%.+]], {{.+}} [[G_IN:%.+]]) // skip tid and prev variables // LAMBDA: alloca // LAMBDA: alloca @@ -176,7 +176,7 @@ // LAMBDA: ret [&]() { - // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* [[ARG_PTR:%.+]]) + // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* frozen [[ARG_PTR:%.+]]) // LAMBDA: store %{{.+}}* [[ARG_PTR]], %{{.+}}** [[ARG_PTR_REF:%.+]], g = 2; g1 = 2; @@ -220,7 +220,7 @@ // CHECK: define{{.*}} i{{[0-9]+}} @main() // CHECK: [[TEST:%.+]] = alloca [[S_FLOAT_TY]], -// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR:@.+]]([[S_FLOAT_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR:@.+]]([[S_FLOAT_TY]]* frozen [[TEST]]) // CHECK: call i{{[0-9]+}} @__tgt_target_teams( // CHECK: call void [[OFFLOAD_FUN:@.+]]( // CHECK: ret @@ -229,7 +229,7 @@ // CHECK: call void (%{{.+}}*, i{{[0-9]+}}, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)*, ...) @__kmpc_fork_teams( // CHECK: ret // -// CHECK: define internal void [[OMP_OUTLINED:@.+]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}, [2 x i{{[0-9]+}}]*{{.+}} [[VEC_IN:%.+]], i{{[0-9]+}}{{.+}} [[T_VAR_IN:%.+]], [2 x [[S_FLOAT_TY]]]*{{.+}} [[S_ARR_IN:%.+]], [[S_FLOAT_TY]]*{{.+}} [[VAR_IN:%.+]], i{{[0-9]+}}{{.*}} [[S_VAR_IN:%.+]]) +// CHECK: define internal void [[OMP_OUTLINED:@.+]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}, [2 x i{{[0-9]+}}]*{{.+}} [[VEC_IN:%.+]], i{{[0-9]+}}{{.+}} [[T_VAR_IN:%.+]], [2 x [[S_FLOAT_TY]]]*{{.+}} [[S_ARR_IN:%.+]], [[S_FLOAT_TY]]*{{.+}} [[VAR_IN:%.+]], i{{[0-9]+}}{{.*}} [[S_VAR_IN:%.+]]) // CHECK: {{.+}} = alloca i{{[0-9]+}}*, // CHECK: {{.+}} = alloca i{{[0-9]+}}*, // CHECK: [[VEC_ADDR:%.+]] = alloca [2 x i{{[0-9]+}}]*, @@ -283,7 +283,7 @@ // CHECK-32-DAG: store {{.+}}, {{.+}} [[SVAR_ADDR]], // CHECK: ret void -// CHECK: define internal void [[OMP_OUTLINED:@.+]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}, {{.+}}, {{.+}}, [2 x i{{[0-9]+}}]*{{.+}} [[VEC_IN:%.+]], i{{[0-9]+}}{{.+}} [[T_VAR_IN:%.+]], [2 x [[S_FLOAT_TY]]]*{{.+}} [[S_ARR_IN:%.+]], [[S_FLOAT_TY]]*{{.+}} [[VAR_IN:%.+]], i{{[0-9]+}}{{.*}} [[S_VAR_IN:%.+]]) +// CHECK: define internal void [[OMP_OUTLINED:@.+]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}, {{.+}}, {{.+}}, [2 x i{{[0-9]+}}]*{{.+}} [[VEC_IN:%.+]], i{{[0-9]+}}{{.+}} [[T_VAR_IN:%.+]], [2 x [[S_FLOAT_TY]]]*{{.+}} [[S_ARR_IN:%.+]], [[S_FLOAT_TY]]*{{.+}} [[VAR_IN:%.+]], i{{[0-9]+}}{{.*}} [[S_VAR_IN:%.+]]) // gbl and bound tid vars, prev lb and ub vars // CHECK: {{.+}} = alloca i{{[0-9]+}}*, @@ -345,7 +345,7 @@ // template tmain // CHECK: define{{.*}} i{{[0-9]+}} [[TMAIN_INT:@.+]]() // CHECK: [[TEST:%.+]] = alloca [[S_INT_TY]], -// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR:@.+]]([[S_INT_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR:@.+]]([[S_INT_TY]]* frozen [[TEST]]) // CHECK: call i{{[0-9]+}} @__tgt_target_teams( // CHECK: call void [[OFFLOAD_FUN_1:@.+]]( // CHECK: ret @@ -354,7 +354,7 @@ // CHECK: call void (%{{.+}}*, i{{[0-9]+}}, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)*, ...) @__kmpc_fork_teams(%{{.+}}* @{{.+}}, i{{[0-9]+}} 4, // CHECK: ret -// CHECK: define internal void [[OMP_OUTLINED_1:@.+]](i{{[0-9]+}}* noalias [[GTID_ADDR1:%.+]], i{{[0-9]+}}* noalias %{{.+}}, [2 x i{{[0-9]+}}]*{{.+}} [[VEC_IN1:%.+]], i{{[0-9]+}}{{.+}} [[T_VAR_IN1:%.+]], [2 x [[S_INT_TY]]]*{{.+}} [[S_ARR_IN1:%.+]], [[S_INT_TY]]*{{.+}} [[VAR_IN1:%.+]]) +// CHECK: define internal void [[OMP_OUTLINED_1:@.+]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR1:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}, [2 x i{{[0-9]+}}]*{{.+}} [[VEC_IN1:%.+]], i{{[0-9]+}}{{.+}} [[T_VAR_IN1:%.+]], [2 x [[S_INT_TY]]]*{{.+}} [[S_ARR_IN1:%.+]], [[S_INT_TY]]*{{.+}} [[VAR_IN1:%.+]]) // skip alloca of global_tid and bound_tid // CHECK: {{.+}} = alloca i{{[0-9]+}}*, // CHECK: {{.+}} = alloca i{{[0-9]+}}*, @@ -403,7 +403,7 @@ // CHECK-DAG: call void @llvm.memcpy.{{.+}}(i8* align {{[0-9]+}} [[VAR_ADDR_BCAST]], // CHECK: ret void -// CHECK: define internal void [[TPAR_OUTL:@.+]](i{{[0-9]+}}* noalias [[GTID_ADDR1:%.+]], i{{[0-9]+}}* noalias %{{.+}}, {{.+}}, {{.+}}, [2 x i{{[0-9]+}}]*{{.+}} [[VEC_IN1:%.+]], i{{[0-9]+}}{{.+}} [[T_VAR_IN1:%.+]], [2 x [[S_INT_TY]]]*{{.+}} [[S_ARR_IN1:%.+]], [[S_INT_TY]]*{{.+}} [[VAR_IN1:%.+]]) +// CHECK: define internal void [[TPAR_OUTL:@.+]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR1:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}, {{.+}}, {{.+}}, [2 x i{{[0-9]+}}]*{{.+}} [[VEC_IN1:%.+]], i{{[0-9]+}}{{.+}} [[T_VAR_IN1:%.+]], [2 x [[S_INT_TY]]]*{{.+}} [[S_ARR_IN1:%.+]], [[S_INT_TY]]*{{.+}} [[VAR_IN1:%.+]]) // skip alloca of global_tid and bound_tid, and prev lb and ub vars // CHECK: {{.+}} = alloca i{{[0-9]+}}*, // CHECK: {{.+}} = alloca i{{[0-9]+}}*, diff --git a/clang/test/OpenMP/target_teams_distribute_parallel_for_simd_loop_messages.cpp b/clang/test/OpenMP/target_teams_distribute_parallel_for_simd_loop_messages.cpp --- a/clang/test/OpenMP/target_teams_distribute_parallel_for_simd_loop_messages.cpp +++ b/clang/test/OpenMP/target_teams_distribute_parallel_for_simd_loop_messages.cpp @@ -145,7 +145,7 @@ for (ii = 0; ii < 10; ++++ii) c[ii] = a[ii]; -// Ok but undefined behavior (in general, cannot check that incr +// Ok but undefined behavior (in frozen general, cannot check incr that // is really loop-invariant). #pragma omp target teams distribute parallel for simd for (ii = 0; ii < 10; ii = ii + ii) diff --git a/clang/test/OpenMP/target_teams_distribute_parallel_for_simd_private_codegen.cpp b/clang/test/OpenMP/target_teams_distribute_parallel_for_simd_private_codegen.cpp --- a/clang/test/OpenMP/target_teams_distribute_parallel_for_simd_private_codegen.cpp +++ b/clang/test/OpenMP/target_teams_distribute_parallel_for_simd_private_codegen.cpp @@ -167,7 +167,7 @@ // LAMBDA: call void @__kmpc_for_static_fini( // LAMBDA: ret void [&]() { - // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* [[ARG_PTR:%.+]]) + // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* frozen [[ARG_PTR:%.+]]) // LAMBDA: store %{{.+}}* [[ARG_PTR]], %{{.+}}** [[ARG_PTR_REF:%.+]], g = 2; g1 = 2; diff --git a/clang/test/OpenMP/target_teams_distribute_parallel_for_simd_reduction_codegen.cpp b/clang/test/OpenMP/target_teams_distribute_parallel_for_simd_reduction_codegen.cpp --- a/clang/test/OpenMP/target_teams_distribute_parallel_for_simd_reduction_codegen.cpp +++ b/clang/test/OpenMP/target_teams_distribute_parallel_for_simd_reduction_codegen.cpp @@ -142,7 +142,7 @@ sivar += i; [&]() { - // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* [[ARG_PTR:%.+]]) + // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* frozen [[ARG_PTR:%.+]]) // LAMBDA: store %{{.+}}* [[ARG_PTR]], %{{.+}}** [[ARG_PTR_REF:%.+]], sivar += 4; @@ -170,7 +170,7 @@ // CHECK: define {{.*}}i{{[0-9]+}} @main() // CHECK: call i32 @__tgt_target_teams(i64 -1, i8* @{{[^,]+}}, i32 1, i8** %{{[^,]+}}, i8** %{{[^,]+}}, i{{64|32}}* {{.+}}@{{[^,]+}}, i32 0, i32 0), i64* {{.+}}@{{[^,]+}}, i32 0, i32 0), i32 0, i32 0) -// CHECK: call void @[[OFFL1:.+]](i{{64|32}}* @{{.+}}) +// CHECK: call void @[[OFFL1:.+]](i{{64|32}}* frozen @{{.+}}) // CHECK: {{%.+}} = call{{.*}} i32 @[[TMAIN_INT:.+]]() // CHECK: ret diff --git a/clang/test/OpenMP/target_teams_distribute_parallel_for_simd_uses_allocators_codegen.cpp b/clang/test/OpenMP/target_teams_distribute_parallel_for_simd_uses_allocators_codegen.cpp --- a/clang/test/OpenMP/target_teams_distribute_parallel_for_simd_uses_allocators_codegen.cpp +++ b/clang/test/OpenMP/target_teams_distribute_parallel_for_simd_uses_allocators_codegen.cpp @@ -69,7 +69,7 @@ // CHECK: [[CMP:%.+]] = icmp ne i32 [[RES]], 0 // CHECK: br i1 [[CMP]], label %[[FAILED:.+]], label %[[DONE:.+]] // CHECK: [[FAILED]]: -// CHECK: call void @[[TGT_REGION]]([10 x %struct.omp_alloctrait_t]* %{{[^,]+}}) +// CHECK: call void @[[TGT_REGION]]([10 x %struct.omp_alloctrait_t]* frozen %{{[^,]+}}) #pragma omp target teams distribute parallel for simd uses_allocators(omp_null_allocator, omp_thread_mem_alloc, my_allocator(traits)) for (int i = 0; i < 10; ++i) ; diff --git a/clang/test/OpenMP/target_teams_distribute_parallel_for_uses_allocators_codegen.cpp b/clang/test/OpenMP/target_teams_distribute_parallel_for_uses_allocators_codegen.cpp --- a/clang/test/OpenMP/target_teams_distribute_parallel_for_uses_allocators_codegen.cpp +++ b/clang/test/OpenMP/target_teams_distribute_parallel_for_uses_allocators_codegen.cpp @@ -69,7 +69,7 @@ // CHECK: [[CMP:%.+]] = icmp ne i32 [[RES]], 0 // CHECK: br i1 [[CMP]], label %[[FAILED:.+]], label %[[DONE:.+]] // CHECK: [[FAILED]]: -// CHECK: call void @[[TGT_REGION]]([10 x %struct.omp_alloctrait_t]* %{{[^,]+}}) +// CHECK: call void @[[TGT_REGION]]([10 x %struct.omp_alloctrait_t]* frozen %{{[^,]+}}) #pragma omp target teams distribute parallel for uses_allocators(omp_null_allocator, omp_thread_mem_alloc, my_allocator(traits)) for (int i = 0; i < 10; ++i) ; diff --git a/clang/test/OpenMP/target_teams_distribute_private_codegen.cpp b/clang/test/OpenMP/target_teams_distribute_private_codegen.cpp --- a/clang/test/OpenMP/target_teams_distribute_private_codegen.cpp +++ b/clang/test/OpenMP/target_teams_distribute_private_codegen.cpp @@ -119,7 +119,7 @@ // LAMBDA: call void [[INNER_LAMBDA:@.+]]( // LAMBDA: call void @__kmpc_for_static_fini( [&]() { - // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* [[ARG_PTR:%.+]]) + // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* frozen [[ARG_PTR:%.+]]) // LAMBDA: store %{{.+}}* [[ARG_PTR]], %{{.+}}** [[ARG_PTR_REF:%.+]], g = 2; g1 = 2; diff --git a/clang/test/OpenMP/target_teams_distribute_reduction_codegen.cpp b/clang/test/OpenMP/target_teams_distribute_reduction_codegen.cpp --- a/clang/test/OpenMP/target_teams_distribute_reduction_codegen.cpp +++ b/clang/test/OpenMP/target_teams_distribute_reduction_codegen.cpp @@ -97,7 +97,7 @@ sivar += i; [&]() { - // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* [[ARG_PTR:%.+]]) + // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* frozen [[ARG_PTR:%.+]]) // LAMBDA: store %{{.+}}* [[ARG_PTR]], %{{.+}}** [[ARG_PTR_REF:%.+]], sivar += 4; diff --git a/clang/test/OpenMP/target_teams_distribute_simd_codegen.cpp b/clang/test/OpenMP/target_teams_distribute_simd_codegen.cpp --- a/clang/test/OpenMP/target_teams_distribute_simd_codegen.cpp +++ b/clang/test/OpenMP/target_teams_distribute_simd_codegen.cpp @@ -365,18 +365,18 @@ // Check that the offloading functions are emitted and that the arguments are // correct and loaded correctly for the target regions in foo(). -// CHECK: define internal void [[HVT0]](i[[SZ]] {{[^,]+}}, i[[SZ]] {{[^,]+}}, i[[SZ]] {{[^)]+}}) +// CHECK: define internal void [[HVT0]](i[[SZ]] frozen {{[^,]+}}, i[[SZ]] frozen {{[^,]+}}, i[[SZ]] frozen {{[^)]+}}) // CHECK: call {{.*}}void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* [[DEF_LOC]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i[[SZ]])* [[OMP_OUTLINED:@.+]] to void (i32*, i32*, ...)*), i[[SZ]] {{[^)]+}}) // // -// CHECK: define internal {{.*}}void [[OMP_OUTLINED]](i32* noalias %.global_tid., i32* noalias %.bound_tid., i[[SZ]] {{[^)]+}}) +// CHECK: define internal {{.*}}void [[OMP_OUTLINED]](i32* frozen noalias %.global_tid., i32* frozen noalias %.bound_tid., i[[SZ]] frozen {{[^)]+}}) // CHECK: alloca i[[SZ]], // CHECK: bitcast i[[SZ]]* {{.+}} to i16* // CHECK: ret void // CHECK-NEXT: } -// CHECK: define internal void [[HVT1]](i[[SZ]] %{{.+}}) +// CHECK: define internal void [[HVT1]](i[[SZ]] frozen %{{.+}}) // Create stack storage and store argument in there. // CHECK: [[AA_ADDR:%.+]] = alloca i[[SZ]], align // CHECK: [[AA_CASTED:%.+]] = alloca i[[SZ]], align @@ -391,7 +391,7 @@ // CHECK: call {{.*}}void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* [[DEF_LOC]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i[[SZ]])* [[OMP_OUTLINED1:@.+]] to void (i32*, i32*, ...)*), i[[SZ]] [[PARAM]]) // // -// CHECK: define internal {{.*}}void [[OMP_OUTLINED1]](i32* noalias %.global_tid., i32* noalias %.bound_tid., i[[SZ]] %{{.+}}) +// CHECK: define internal {{.*}}void [[OMP_OUTLINED1]](i32* frozen noalias %.global_tid., i32* frozen noalias %.bound_tid., i[[SZ]] frozen %{{.+}}) // CHECK: [[AA_ADDR:%.+]] = alloca i[[SZ]], align // CHECK: store i[[SZ]] %{{.+}}, i[[SZ]]* [[AA_ADDR]], align // CHECK-64: [[AA_CADDR:%.+]] = bitcast i[[SZ]]* [[AA_ADDR]] to i32* @@ -402,7 +402,7 @@ // CHECK: ret void // CHECK-NEXT: } -// CHECK: define internal void [[HVT2]](i[[SZ]] %{{.+}}) +// CHECK: define internal void [[HVT2]](i[[SZ]] frozen %{{.+}}) // Create stack storage and store argument in there. // CHECK: [[AA_ADDR:%.+]] = alloca i[[SZ]], align // CHECK: [[AA_CASTED:%.+]] = alloca i[[SZ]], align @@ -415,7 +415,7 @@ // CHECK: call {{.*}}void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* [[DEF_LOC]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i[[SZ]])* [[OMP_OUTLINED2:@.+]] to void (i32*, i32*, ...)*), i[[SZ]] [[PARAM]]) // // -// CHECK: define internal {{.*}}void [[OMP_OUTLINED2]](i32* noalias %.global_tid., i32* noalias %.bound_tid., i[[SZ]] %{{.+}}) +// CHECK: define internal {{.*}}void [[OMP_OUTLINED2]](i32* frozen noalias %.global_tid., i32* frozen noalias %.bound_tid., i[[SZ]] frozen %{{.+}}) // CHECK: [[AA_ADDR:%.+]] = alloca i[[SZ]], align // CHECK: store i[[SZ]] %{{.+}}, i[[SZ]]* [[AA_ADDR]], align // CHECK: [[AA_CADDR:%.+]] = bitcast i[[SZ]]* [[AA_ADDR]] to i16* @@ -446,7 +446,7 @@ // CHECK-DAG: call {{.*}}void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* [[DEF_LOC]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i[[SZ]], i[[SZ]])* [[OMP_OUTLINED3:@.+]] to void (i32*, i32*, ...)*), i[[SZ]] [[PARAM1]], i[[SZ]] [[PARAM2]]) // // -// CHECK: define internal {{.*}}void [[OMP_OUTLINED3]](i32* noalias %.global_tid., i32* noalias %.bound_tid., i[[SZ]] %{{.+}}, i[[SZ]] %{{.+}}) +// CHECK: define internal {{.*}}void [[OMP_OUTLINED3]](i32* frozen noalias %.global_tid., i32* frozen noalias %.bound_tid., i[[SZ]] frozen %{{.+}}, i[[SZ]] frozen %{{.+}}) // CHECK: [[A_ADDR:%.+]] = alloca i[[SZ]], align // CHECK: [[AA_ADDR:%.+]] = alloca i[[SZ]], align // CHECK-DAG: store i[[SZ]] %{{.+}}, i[[SZ]]* [[A_ADDR]], align @@ -498,7 +498,7 @@ // CHECK: call {{.*}}void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* [[DEF_LOC]], i32 9, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i[[SZ]], [10 x float]*, i[[SZ]], float*, [5 x [10 x double]]*, i[[SZ]], i[[SZ]], double*, [[TT]]*)* [[OMP_OUTLINED4:@.+]] to void (i32*, i32*, ...)*), i[[SZ]] [[REF_A]], [10 x float]* [[REF_B]], i[[SZ]] [[VAL_VLA1]], float* [[REF_BN]], [5 x [10 x double]]* [[REF_C]], i[[SZ]] [[VAL_VLA2]], i[[SZ]] [[VAL_VLA3]], double* [[REF_CN]], [[TT]]* [[REF_D]]) // // -// CHECK: define internal {{.*}}void [[OMP_OUTLINED4]](i32* noalias %.global_tid., i32* noalias %.bound_tid., i[[SZ]] %{{.+}}, [10 x float]* {{.+}}, i[[SZ]] %{{.+}}, float* {{.+}}, [5 x [10 x double]]* {{.+}}, i[[SZ]] %{{.+}}, i[[SZ]] %{{.+}}, double* {{.+}}, [[TT]]* {{.+}}) +// CHECK: define internal {{.*}}void [[OMP_OUTLINED4]](i32* frozen noalias %.global_tid., i32* frozen noalias %.bound_tid., i[[SZ]] frozen %{{.+}}, [10 x float]* {{.+}}, i[[SZ]] frozen %{{.+}}, float* {{.+}}, [5 x [10 x double]]* {{.+}}, i[[SZ]] frozen %{{.+}}, i[[SZ]] frozen %{{.+}}, double* {{.+}}, [[TT]]* {{.+}}) // To reduce complexity, we're only going as far as validating the signature of the outlined parallel function. template @@ -835,8 +835,8 @@ // OMP50: call {{.*}}void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* [[DEF_LOC]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [[S1]]*, i[[SZ]], i[[SZ]], i[[SZ]], i16*, i[[SZ]])* [[OMP_OUTLINED5:@.+]] to void (i32*, i32*, ...)*), [[S1]]* [[REF_THIS]], i[[SZ]] [[REF_B]], i[[SZ]] [[VAL_VLA1]], i[[SZ]] [[VAL_VLA2]], i16* [[REF_C]], i[[SZ]] [[IF_CAST]]) // // -// OMP45: define internal {{.*}}void [[OMP_OUTLINED5]](i32* noalias %.global_tid., i32* noalias %.bound_tid., [[S1]]* %{{.+}}, i[[SZ]] %{{.+}}, i[[SZ]] %{{.+}}, i[[SZ]] %{{.+}}, i16* {{.+}}) -// OMP50: define internal {{.*}}void [[OMP_OUTLINED5]](i32* noalias %.global_tid., i32* noalias %.bound_tid., [[S1]]* %{{.+}}, i[[SZ]] %{{.+}}, i[[SZ]] %{{.+}}, i[[SZ]] %{{.+}}, i16* {{.+}}, i[[SZ]] %{{.+}}) +// OMP45: define internal {{.*}}void [[OMP_OUTLINED5]](i32* frozen noalias %.global_tid., i32* frozen noalias %.bound_tid., [[S1]]* frozen %{{.+}}, i[[SZ]] frozen %{{.+}}, i[[SZ]] frozen %{{.+}}, i[[SZ]] frozen %{{.+}}, i16* {{.+}}) +// OMP50: define internal {{.*}}void [[OMP_OUTLINED5]](i32* frozen noalias %.global_tid., i32* frozen noalias %.bound_tid., [[S1]]* frozen %{{.+}}, i[[SZ]] frozen %{{.+}}, i[[SZ]] frozen %{{.+}}, i[[SZ]] frozen %{{.+}}, i16* {{.+}}, i[[SZ]] frozen %{{.+}}) // To reduce complexity, we're only going as far as validating the signature of the outlined parallel function. @@ -881,7 +881,7 @@ // CHECK: call {{.*}}void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* [[DEF_LOC]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i[[SZ]], i[[SZ]], i[[SZ]], i[[SZ]], [10 x i32]*)* [[OMP_OUTLINED6:@.+]] to void (i32*, i32*, ...)*), i[[SZ]] [[REF_A]], i[[SZ]] {{.+}}, i[[SZ]] [[REF_AA]], i[[SZ]] [[REF_AAA]], [10 x i32]* [[REF_B]]) // // -// CHECK: define internal {{.*}}void [[OMP_OUTLINED6]](i32* noalias %.global_tid., i32* noalias %.bound_tid., i[[SZ]] %{{.+}}, i[[SZ]] %{{.+}}, i[[SZ]] %{{.+}}, [10 x i32]* {{.+}}) +// CHECK: define internal {{.*}}void [[OMP_OUTLINED6]](i32* frozen noalias %.global_tid., i32* frozen noalias %.bound_tid., i[[SZ]] frozen %{{.+}}, i[[SZ]] frozen %{{.+}}, i[[SZ]] frozen %{{.+}}, [10 x i32]* {{.+}}) // To reduce complexity, we're only going as far as validating the signature of the outlined parallel function. // CHECK: define internal void [[HVT5]] @@ -914,7 +914,7 @@ // CHECK: call {{.*}}void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* [[DEF_LOC]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i[[SZ]], i[[SZ]], [10 x i32]*)* [[OMP_OUTLINED7:@.+]] to void (i32*, i32*, ...)*), i[[SZ]] [[REF_A]], i[[SZ]] [[REF_AA]], [10 x i32]* [[REF_B]]) // // -// CHECK: define internal {{.*}}void [[OMP_OUTLINED7]](i32* noalias %.global_tid., i32* noalias %.bound_tid., i[[SZ]] %{{.+}}, i[[SZ]] %{{.+}}, [10 x i32]* {{.+}}) +// CHECK: define internal {{.*}}void [[OMP_OUTLINED7]](i32* frozen noalias %.global_tid., i32* frozen noalias %.bound_tid., i[[SZ]] frozen %{{.+}}, i[[SZ]] frozen %{{.+}}, [10 x i32]* {{.+}}) // To reduce complexity, we're only going as far as validating the signature of the outlined parallel function. // OMP45-NOT: !{!"llvm.loop.vectorize.enable", i1 false} diff --git a/clang/test/OpenMP/target_teams_distribute_simd_depend_codegen.cpp b/clang/test/OpenMP/target_teams_distribute_simd_depend_codegen.cpp --- a/clang/test/OpenMP/target_teams_distribute_simd_depend_codegen.cpp +++ b/clang/test/OpenMP/target_teams_distribute_simd_depend_codegen.cpp @@ -89,7 +89,7 @@ // CHECK: [[DEP:%.+]] = bitcast %struct.kmp_depend_info* %{{.+}} to i8* // CHECK: call void @__kmpc_omp_wait_deps(%struct.ident_t* [[ID]], i32 [[GTID]], i32 4, i8* [[DEP]], i32 0, i8* null) // CHECK: call void @__kmpc_omp_task_begin_if0(%struct.ident_t* [[ID]], i32 [[GTID]], i8* [[TASK]]) - // CHECK: call i32 [[TASK_ENTRY0]](i32 [[GTID]], [[TASK_TY0]]* [[BC_TASK]]) + // CHECK: call i32 [[TASK_ENTRY0]](i32 frozen [[GTID]], [[TASK_TY0]]* frozen [[BC_TASK]]) // CHECK: call void @__kmpc_omp_task_complete_if0(%struct.ident_t* [[ID]], i32 [[GTID]], i8* [[TASK]]) #pragma omp target teams distribute simd device(global + a) depend(in: global) depend(out: a, b, cn[4]) for (int i = 0; i < 10; ++i) { @@ -162,7 +162,7 @@ // CHECK: [[DEP:%.+]] = bitcast %struct.kmp_depend_info* %{{.+}} to i8* // CHECK: call void @__kmpc_omp_wait_deps(%struct.ident_t* [[ID]], i32 [[GTID]], i32 1, i8* [[DEP]], i32 0, i8* null) // CHECK: call void @__kmpc_omp_task_begin_if0(%struct.ident_t* [[ID]], i32 [[GTID]], i8* [[TASK]]) - // CHECK: call i32 [[TASK_ENTRY2]](i32 [[GTID]], [[TASK_TY2]]* [[BC_TASK]]) + // CHECK: call i32 [[TASK_ENTRY2]](i32 frozen [[GTID]], [[TASK_TY2]]* frozen [[BC_TASK]]) // CHECK: call void @__kmpc_omp_task_complete_if0(%struct.ident_t* [[ID]], i32 [[GTID]], i8* [[TASK]]) #pragma omp target teams distribute simd if(0) firstprivate(global) depend(out:global) for (int i = 0; i < global; ++i) { @@ -177,7 +177,7 @@ // CHECK: define internal void [[HVT0:@.+]]() -// CHECK: define internal{{.*}} i32 [[TASK_ENTRY0]](i32{{.*}}, [[TASK_TY0]]* noalias %1) +// CHECK: define internal{{.*}} i32 [[TASK_ENTRY0]](i32{{.*}}, [[TASK_TY0]]* frozen noalias %1) // CHECK: store void (i8*, ...)* null, void (i8*, ...)** % // CHECK: [[DEVICE_CAP:%.+]] = getelementptr inbounds %{{.+}}, %{{.+}}* %{{.+}}, i32 0, i32 0 // CHECK: [[DEV:%.+]] = load i32, i32* [[DEVICE_CAP]], @@ -191,9 +191,9 @@ // CHECK: [[END]] // CHECK: ret i32 0 -// CHECK: define internal void [[HVT1:@.+]](i[[SZ]]* %{{.+}}, i[[SZ]] %{{.+}}) +// CHECK: define internal void [[HVT1:@.+]](i[[SZ]]* frozen %{{.+}}, i[[SZ]] frozen %{{.+}}) -// CHECK: define internal{{.*}} i32 [[TASK_ENTRY1_]](i32{{.*}}, [[TASK_TY1_]]* noalias %1) +// CHECK: define internal{{.*}} i32 [[TASK_ENTRY1_]](i32{{.*}}, [[TASK_TY1_]]* frozen noalias %1) // CHECK: call void (i8*, ...) % // CHECK: [[SZT:%.+]] = getelementptr inbounds [2 x i64], [2 x i64]* %{{.+}}, i[[SZ]] 0, i[[SZ]] 0 // CHECK: [[DEVICE_CAP:%.+]] = getelementptr inbounds %{{.+}}, %{{.+}}* %{{.+}}, i32 0, i32 2 @@ -210,12 +210,12 @@ // CHECK-64: store i32 [[BP1_I32]], i32* [[BP1_CAST]], // CHECK-32: store i32 [[BP1_I32]], i32* [[BP1_PTR:%.+]], // CHECK: [[BP1:%.+]] = load i[[SZ]], i[[SZ]]* [[BP1_PTR]], -// CHECK: call void [[HVT1]](i[[SZ]]* [[BP0]], i[[SZ]] [[BP1]]) +// CHECK: call void [[HVT1]](i[[SZ]]* frozen [[BP0]], i[[SZ]] frozen [[BP1]]) // CHECK-NEXT: br label %[[END]] // CHECK: [[END]] // CHECK: ret i32 0 -// CHECK: define internal{{.*}} i32 [[TASK_ENTRY1__]](i32{{.*}}, [[TASK_TY1__]]* noalias %1) +// CHECK: define internal{{.*}} i32 [[TASK_ENTRY1__]](i32{{.*}}, [[TASK_TY1__]]* frozen noalias %1) // CHECK: call void (i8*, ...) % // CHECK: [[DEVICE_CAP:%.+]] = getelementptr inbounds %{{.+}}, %{{.+}}* %{{.+}}, i32 0, i32 2 // CHECK: [[BP0:%.+]] = load i[[SZ]]*, i[[SZ]]** % @@ -224,10 +224,10 @@ // CHECK-64: store i32 [[BP1_I32]], i32* [[BP1_CAST]], // CHECK-32: store i32 [[BP1_I32]], i32* [[BP1_PTR:%.+]], // CHECK: [[BP1:%.+]] = load i[[SZ]], i[[SZ]]* [[BP1_PTR]], -// CHECK: call void [[HVT1]](i[[SZ]]* [[BP0]], i[[SZ]] [[BP1]]) +// CHECK: call void [[HVT1]](i[[SZ]]* frozen [[BP0]], i[[SZ]] frozen [[BP1]]) // CHECK: ret i32 0 -// CHECK: define internal void [[HVT2:@.+]](i[[SZ]] %{{.+}}) +// CHECK: define internal void [[HVT2:@.+]](i[[SZ]] frozen %{{.+}}) // Create stack storage and store argument in there. // CHECK: [[AA_ADDR:%.+]] = alloca i[[SZ]], align // CHECK: store i[[SZ]] %{{.+}}, i[[SZ]]* [[AA_ADDR]], align @@ -235,14 +235,14 @@ // CHECK-64: load i32, i32* [[AA_CADDR]], align // CHECK-32: load i32, i32* [[AA_ADDR]], align -// CHECK: define internal{{.*}} i32 [[TASK_ENTRY2]](i32{{.*}}, [[TASK_TY2]]* noalias %1) +// CHECK: define internal{{.*}} i32 [[TASK_ENTRY2]](i32{{.*}}, [[TASK_TY2]]* frozen noalias %1) // CHECK: call void (i8*, ...) % // CHECK: [[BP1_I32:%.+]] = load i32, i32* % // CHECK-64: [[BP1_CAST:%.+]] = bitcast i[[SZ]]* [[BP1_PTR:%.+]] to i32* // CHECK-64: store i32 [[BP1_I32]], i32* [[BP1_CAST]], // CHECK-32: store i32 [[BP1_I32]], i32* [[BP1_PTR:%.+]], // CHECK: [[BP1:%.+]] = load i[[SZ]], i[[SZ]]* [[BP1_PTR]], -// CHECK: call void [[HVT2]](i[[SZ]] [[BP1]]) +// CHECK: call void [[HVT2]](i[[SZ]] frozen [[BP1]]) // CHECK: ret i32 0 diff --git a/clang/test/OpenMP/target_teams_distribute_simd_firstprivate_codegen.cpp b/clang/test/OpenMP/target_teams_distribute_simd_firstprivate_codegen.cpp --- a/clang/test/OpenMP/target_teams_distribute_simd_firstprivate_codegen.cpp +++ b/clang/test/OpenMP/target_teams_distribute_simd_firstprivate_codegen.cpp @@ -86,11 +86,11 @@ [&]() { // LAMBDA: define{{.*}} internal{{.*}} void [[OUTER_LAMBDA]]( // LAMBDA: call i32 @__tgt_target_teams(i64 -1, i8* @{{[^,]+}}, i32 3, i8** %{{[^,]+}}, i8** %{{[^,]+}}, i{{64|32}}* {{.+}}@{{[^,]+}}, i32 0, i32 0), i64* {{.+}}@{{[^,]+}}, i32 0, i32 0), i32 0, i32 1) - // LAMBDA: call void @[[LOFFL1:.+]](i{{64|32}} %{{.+}}) + // LAMBDA: call void @[[LOFFL1:.+]](i{{64|32}} frozen %{{.+}}) // LAMBDA: ret #pragma omp target teams distribute simd firstprivate(g, g1, sivar) for (int i = 0; i < 2; ++i) { - // LAMBDA: define{{.*}} internal{{.*}} void @[[LOFFL1]](i{{64|32}} {{%.+}}, i{{64|32}} {{%.+}}) + // LAMBDA: define{{.*}} internal{{.*}} void @[[LOFFL1]](i{{64|32}} frozen {{%.+}}, i{{64|32}} frozen {{%.+}}) // LAMBDA: {{%.+}} = alloca i{{[0-9]+}}, // LAMBDA: {{%.+}} = alloca i{{[0-9]+}}, // LAMBDA: {{%.+}} = alloca i{{[0-9]+}}, @@ -132,7 +132,7 @@ // LAMBDA: call void [[INNER_LAMBDA:@.+]]( // LAMBDA: call void @__kmpc_for_static_fini( [&]() { - // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* [[ARG_PTR:%.+]]) + // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* frozen [[ARG_PTR:%.+]]) // LAMBDA: store %{{.+}}* [[ARG_PTR]], %{{.+}}** [[ARG_PTR_REF:%.+]], g = 2; g1 = 2; diff --git a/clang/test/OpenMP/target_teams_distribute_simd_lastprivate_codegen.cpp b/clang/test/OpenMP/target_teams_distribute_simd_lastprivate_codegen.cpp --- a/clang/test/OpenMP/target_teams_distribute_simd_lastprivate_codegen.cpp +++ b/clang/test/OpenMP/target_teams_distribute_simd_lastprivate_codegen.cpp @@ -75,8 +75,8 @@ // LAMBDA: call {{.*}}void {{.+}} @__kmpc_fork_teams({{.+}}, i32 4, {{.+}}* [[OMP_OUTLINED:@.+]] to {{.+}}) #pragma omp target teams distribute simd lastprivate(g, g1, svar, sfvar) for (int i = 0; i < 2; ++i) { - // LAMBDA-64: define{{.*}} internal{{.*}} void [[OMP_OUTLINED]](i32* noalias %{{.+}}, i32* noalias %{{.+}}, i64 [[G_IN:%.+]], i64 [[G1_IN:%.+]], i64 [[SVAR_IN:%.+]], i64 [[SFVAR_IN:%.+]]) - // LAMBDA-32: define{{.*}} internal{{.*}} void [[OMP_OUTLINED]](i32* noalias %{{.+}}, i32* noalias %{{.+}}, double*{{.+}} [[G_IN:%.+]], double*{{.+}} [[G1_IN:%.+]], i32 [[SVAR_IN:%.+]], i32 [[SFVAR_IN:%.+]]) + // LAMBDA-64: define{{.*}} internal{{.*}} void [[OMP_OUTLINED]](i32* frozen noalias %{{.+}}, i32* frozen noalias %{{.+}}, i64 frozen [[G_IN:%.+]], i64 frozen [[G1_IN:%.+]], i64 frozen [[SVAR_IN:%.+]], i64 frozen [[SFVAR_IN:%.+]]) + // LAMBDA-32: define{{.*}} internal{{.*}} void [[OMP_OUTLINED]](i32* frozen noalias %{{.+}}, i32* frozen noalias %{{.+}}, double*{{.+}} [[G_IN:%.+]], double*{{.+}} [[G1_IN:%.+]], i32 frozen [[SVAR_IN:%.+]], i32 frozen [[SFVAR_IN:%.+]]) // LAMBDA-64: [[G_PRIVATE_ADDR:%.+]] = alloca i64, // LAMBDA-32: [[G_PRIVATE_ADDR:%.+]] = alloca double*, // LAMBDA-64: [[G1_PRIVATE_ADDR:%.+]] = alloca i64, @@ -137,7 +137,7 @@ // LAMBDA: store i{{[0-9]+}}* [[SVAR_PRIVATE]], i{{[0-9]+}}** [[SVAR_PRIVATE_ADDR_REF]] // LAMBDA: [[SFVAR_PRIVATE_ADDR_REF:%.+]] = getelementptr inbounds %{{.+}}, %{{.+}}* [[ARG:%.+]], i{{[0-9]+}} 0, i{{[0-9]+}} 3 // LAMBDA: store float* [[SFVAR_PRIVATE]], float** [[SFVAR_PRIVATE_ADDR_REF]] - // LAMBDA: call{{.*}} void [[INNER_LAMBDA:@.+]](%{{.+}}* [[ARG]]) + // LAMBDA: call{{.*}} void [[INNER_LAMBDA:@.+]](%{{.+}}* frozen [[ARG]]) // LAMBDA: call {{.*}}void @__kmpc_for_static_fini( // LAMBDA: store i32 2, i32* % // LAMBDA: [[OMP_IS_LAST_VAL:%.+]] = load i{{[0-9]+}}, i{{[0-9]+}}* [[OMP_IS_LAST]], @@ -160,7 +160,7 @@ // LAMBDA: [[OMP_LASTPRIV_DONE]]: // LAMBDA: ret [&]() { - // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* [[ARG_PTR:%.+]]) + // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* frozen [[ARG_PTR:%.+]]) // LAMBDA: store %{{.+}}* [[ARG_PTR]], %{{.+}}** [[ARG_PTR_REF:%.+]], g = 2; g1 = 2; @@ -204,7 +204,7 @@ // CHECK: define{{.*}} i{{[0-9]+}} @main() // CHECK: [[TEST:%.+]] = alloca [[S_FLOAT_TY]], -// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR:@.+]]([[S_FLOAT_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR:@.+]]([[S_FLOAT_TY]]* frozen [[TEST]]) // CHECK: call i{{[0-9]+}} @__tgt_target_teams( // CHECK: call void [[OFFLOAD_FUN:@.+]]([2 x i{{[0-9]+}}]* {{.+}}, i{{[0-9]+}} {{.+}}, [2 x [[S_FLOAT_TY]]]* {{.+}}, [[S_FLOAT_TY]]* {{.+}}, i{{[0-9]+}} {{.+}}) // CHECK: ret @@ -213,7 +213,7 @@ // CHECK: call void (%{{.+}}*, i{{[0-9]+}}, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)*, ...) @__kmpc_fork_teams( // CHECK: ret // -// CHECK: define internal void [[OMP_OUTLINED:@.+]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}, [2 x i{{[0-9]+}}]*{{.+}} [[VEC_IN:%.+]], i{{[0-9]+}} [[T_VAR_IN:%.+]], [2 x [[S_FLOAT_TY]]]*{{.+}} [[S_ARR_IN:%.+]], [[S_FLOAT_TY]]*{{.+}} [[VAR_IN:%.+]], i{{[0-9]+}} [[S_VAR_IN:%.+]]) +// CHECK: define internal void [[OMP_OUTLINED:@.+]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}, [2 x i{{[0-9]+}}]*{{.+}} [[VEC_IN:%.+]], i{{[0-9]+}} frozen [[T_VAR_IN:%.+]], [2 x [[S_FLOAT_TY]]]*{{.+}} [[S_ARR_IN:%.+]], [[S_FLOAT_TY]]*{{.+}} [[VAR_IN:%.+]], i{{[0-9]+}} frozen [[S_VAR_IN:%.+]]) // CHECK: {{.+}} = alloca i{{[0-9]+}}*, // CHECK: {{.+}} = alloca i{{[0-9]+}}*, // CHECK: [[VEC_ADDR:%.+]] = alloca [2 x i{{[0-9]+}}]*, @@ -305,7 +305,7 @@ // template tmain // CHECK: define{{.*}} i{{[0-9]+}} [[TMAIN_INT:@.+]]() // CHECK: [[TEST:%.+]] = alloca [[S_INT_TY]], -// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR:@.+]]([[S_INT_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR:@.+]]([[S_INT_TY]]* frozen [[TEST]]) // CHECK: call i{{[0-9]+}} @__tgt_target_teams( // CHECK: call void [[OFFLOAD_FUN_1:@.+]]([2 x i{{[0-9]+}}]* {{.+}}, i{{[0-9]+}} {{.+}}, [2 x [[S_INT_TY]]]* {{.+}}, [[S_INT_TY]]* {{.+}}) // CHECK: ret @@ -315,7 +315,7 @@ // CHECK: call void (%{{.+}}*, i{{[0-9]+}}, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)*, ...) @__kmpc_fork_teams(%{{.+}}* @{{.+}}, i{{[0-9]+}} 4, // CHECK: ret -// CHECK: define internal void [[OMP_OUTLINED_1:@.+]](i{{[0-9]+}}* noalias [[GTID_ADDR1:%.+]], i{{[0-9]+}}* noalias %{{.+}}, [2 x i{{[0-9]+}}]*{{.+}} [[VEC_IN1:%.+]], i{{[0-9]+}} [[T_VAR_IN1:%.+]], [2 x [[S_INT_TY]]]*{{.+}} [[S_ARR_IN1:%.+]], [[S_INT_TY]]*{{.+}} [[VAR_IN1:%.+]]) +// CHECK: define internal void [[OMP_OUTLINED_1:@.+]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR1:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}, [2 x i{{[0-9]+}}]*{{.+}} [[VEC_IN1:%.+]], i{{[0-9]+}} frozen [[T_VAR_IN1:%.+]], [2 x [[S_INT_TY]]]*{{.+}} [[S_ARR_IN1:%.+]], [[S_INT_TY]]*{{.+}} [[VAR_IN1:%.+]]) // skip alloca of global_tid and bound_tid // CHECK: {{.+}} = alloca i{{[0-9]+}}*, // CHECK: {{.+}} = alloca i{{[0-9]+}}*, diff --git a/clang/test/OpenMP/target_teams_distribute_simd_loop_messages.cpp b/clang/test/OpenMP/target_teams_distribute_simd_loop_messages.cpp --- a/clang/test/OpenMP/target_teams_distribute_simd_loop_messages.cpp +++ b/clang/test/OpenMP/target_teams_distribute_simd_loop_messages.cpp @@ -143,7 +143,7 @@ for (ii = 0; ii < 10; ++++ii) c[ii] = a[ii]; -// Ok but undefined behavior (in general, cannot check that incr +// Ok but undefined behavior (in frozen general, cannot check incr that // is really loop-invariant). #pragma omp target teams distribute simd for (ii = 0; ii < 10; ii = ii + ii) diff --git a/clang/test/OpenMP/target_teams_distribute_simd_private_codegen.cpp b/clang/test/OpenMP/target_teams_distribute_simd_private_codegen.cpp --- a/clang/test/OpenMP/target_teams_distribute_simd_private_codegen.cpp +++ b/clang/test/OpenMP/target_teams_distribute_simd_private_codegen.cpp @@ -119,7 +119,7 @@ // LAMBDA: call void [[INNER_LAMBDA:@.+]]( // LAMBDA: call void @__kmpc_for_static_fini( [&]() { - // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* [[ARG_PTR:%.+]]) + // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* frozen [[ARG_PTR:%.+]]) // LAMBDA: store %{{.+}}* [[ARG_PTR]], %{{.+}}** [[ARG_PTR_REF:%.+]], g = 2; g1 = 2; diff --git a/clang/test/OpenMP/target_teams_distribute_simd_reduction_codegen.cpp b/clang/test/OpenMP/target_teams_distribute_simd_reduction_codegen.cpp --- a/clang/test/OpenMP/target_teams_distribute_simd_reduction_codegen.cpp +++ b/clang/test/OpenMP/target_teams_distribute_simd_reduction_codegen.cpp @@ -97,7 +97,7 @@ sivar += i; [&]() { - // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* [[ARG_PTR:%.+]]) + // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* frozen [[ARG_PTR:%.+]]) // LAMBDA: store %{{.+}}* [[ARG_PTR]], %{{.+}}** [[ARG_PTR_REF:%.+]], sivar += 4; diff --git a/clang/test/OpenMP/target_teams_distribute_simd_uses_allocators_codegen.cpp b/clang/test/OpenMP/target_teams_distribute_simd_uses_allocators_codegen.cpp --- a/clang/test/OpenMP/target_teams_distribute_simd_uses_allocators_codegen.cpp +++ b/clang/test/OpenMP/target_teams_distribute_simd_uses_allocators_codegen.cpp @@ -69,7 +69,7 @@ // CHECK: [[CMP:%.+]] = icmp ne i32 [[RES]], 0 // CHECK: br i1 [[CMP]], label %[[FAILED:.+]], label %[[DONE:.+]] // CHECK: [[FAILED]]: -// CHECK: call void @[[TGT_REGION]]([10 x %struct.omp_alloctrait_t]* %{{[^,]+}}) +// CHECK: call void @[[TGT_REGION]]([10 x %struct.omp_alloctrait_t]* frozen %{{[^,]+}}) #pragma omp target teams distribute simd uses_allocators(omp_null_allocator, omp_thread_mem_alloc, my_allocator(traits)) for (int i = 0; i < 10; ++i) ; diff --git a/clang/test/OpenMP/target_teams_distribute_uses_allocators_codegen.cpp b/clang/test/OpenMP/target_teams_distribute_uses_allocators_codegen.cpp --- a/clang/test/OpenMP/target_teams_distribute_uses_allocators_codegen.cpp +++ b/clang/test/OpenMP/target_teams_distribute_uses_allocators_codegen.cpp @@ -69,7 +69,7 @@ // CHECK: [[CMP:%.+]] = icmp ne i32 [[RES]], 0 // CHECK: br i1 [[CMP]], label %[[FAILED:.+]], label %[[DONE:.+]] // CHECK: [[FAILED]]: -// CHECK: call void @[[TGT_REGION]]([10 x %struct.omp_alloctrait_t]* %{{[^,]+}}) +// CHECK: call void @[[TGT_REGION]]([10 x %struct.omp_alloctrait_t]* frozen %{{[^,]+}}) #pragma omp target teams distribute uses_allocators(omp_null_allocator, omp_thread_mem_alloc, my_allocator(traits)) for (int i = 0; i < 10; ++i) ; diff --git a/clang/test/OpenMP/target_teams_map_codegen.cpp b/clang/test/OpenMP/target_teams_map_codegen.cpp --- a/clang/test/OpenMP/target_teams_map_codegen.cpp +++ b/clang/test/OpenMP/target_teams_map_codegen.cpp @@ -62,7 +62,7 @@ // CHECK: define {{.*}} void @[[OFFLOAD_FIRSTPRIVATE]](i{{[0-9]*}}* {{[^,]*}}%x, i{{[0-9]*}}* {{[^,]*}}%y) // CHECK: call void ({{.*}}@[[OUTLINE_FIRSTPRIVATE:.omp_outlined.[.0-9]*]] // -// CHECK: define {{.*}} void @[[OUTLINE_FIRSTPRIVATE]]({{.*}} %.global_tid., {{.*}} %.bound_tid., i{{[0-9]*}} %x, i{{[0-9]*}} %y) +// CHECK: define {{.*}} void @[[OUTLINE_FIRSTPRIVATE]]({{.*}} %.global_tid., {{.*}} %.bound_tid., i{{[0-9]*}} frozen %x, i{{[0-9]*}} frozen %y) void mapWithFirstprivate() { int x, y; #pragma omp target teams firstprivate(x) map(x,y) firstprivate(y) @@ -89,7 +89,7 @@ // CHECK: define {{.*}} void @[[OFFLOAD_FROM]](i{{[0-9]*}}* {{[^,]*}}%x) // CHECK: call void ({{.*}}@[[OUTLINE_FROM:.omp_outlined.[.0-9]*]] // -// CHECK: define {{.*}} void @[[OUTLINE_FROM]]({{.*}} %.global_tid., {{.*}} %.bound_tid., i{{[0-9]*}} %x) +// CHECK: define {{.*}} void @[[OUTLINE_FROM]]({{.*}} %.global_tid., {{.*}} %.bound_tid., i{{[0-9]*}} frozen %x) void mapFrom() { int x; #pragma omp target teams firstprivate(x) map(from:x) @@ -102,7 +102,7 @@ // CHECK: define {{.*}} void @[[OFFLOAD_TO]](i{{[0-9]*}}* {{[^,]*}}%x) // CHECK: call void ({{.*}}@[[OUTLINE_TO:.omp_outlined.[.0-9]*]] // -// CHECK: define {{.*}} void @[[OUTLINE_TO]]({{.*}} %.global_tid., {{.*}} %.bound_tid., i{{[0-9]*}} %x) +// CHECK: define {{.*}} void @[[OUTLINE_TO]]({{.*}} %.global_tid., {{.*}} %.bound_tid., i{{[0-9]*}} frozen %x) void mapTo() { int x; #pragma omp target teams firstprivate(x) map(to:x) @@ -115,7 +115,7 @@ // CHECK: define {{.*}} void @[[OFFLOAD_ALLOC]](i{{[0-9]*}}* {{[^,]*}}%x) // CHECK: call void ({{.*}}@[[OUTLINE_ALLOC:.omp_outlined.[.0-9]*]] // -// CHECK: define {{.*}} void @[[OUTLINE_ALLOC]]({{.*}} %.global_tid., {{.*}} %.bound_tid., i{{[0-9]*}} %x) +// CHECK: define {{.*}} void @[[OUTLINE_ALLOC]]({{.*}} %.global_tid., {{.*}} %.bound_tid., i{{[0-9]*}} frozen %x) void mapAlloc() { int x; #pragma omp target teams firstprivate(x) map(alloc:x) diff --git a/clang/test/OpenMP/target_teams_num_teams_codegen.cpp b/clang/test/OpenMP/target_teams_num_teams_codegen.cpp --- a/clang/test/OpenMP/target_teams_num_teams_codegen.cpp +++ b/clang/test/OpenMP/target_teams_num_teams_codegen.cpp @@ -138,7 +138,7 @@ // -// CHECK: define {{.*}}[[FS1]]([[S1]]* {{%.+}}, i32 {{[^%]*}}[[PARM:%.+]]) +// CHECK: define {{.*}}[[FS1]]([[S1]]* frozen {{%.+}}, i32 {{[^%]*}}[[PARM:%.+]]) // // CHECK-DAG: store i32 [[PARM]], i32* [[N_ADDR:%.+]], align // CHECK: store i32 1, i32* [[B:%.+]], align @@ -158,7 +158,7 @@ // CHECK: br i1 [[ERROR]], label %[[FAIL:.+]], label %[[END:[^,]+]] // // CHECK: [[FAIL]] -// CHECK: call void [[HVT1:@.+]]([[S1]]* {{%.+}}, i[[SZ]] {{%.+}}, i[[SZ]] [[ARG]]) +// CHECK: call void [[HVT1:@.+]]([[S1]]* frozen {{%.+}}, i[[SZ]] frozen {{%.+}}, i[[SZ]] frozen [[ARG]]) // CHECK: br label {{%?}}[[END]] // CHECK: [[END]] // @@ -169,7 +169,7 @@ // CHECK: br i1 [[ERROR]], label %[[FAIL:.+]], label %[[END:[^,]+]] // // CHECK: [[FAIL]] -// CHECK: call void [[HVT2:@.+]]([[S1]]* {{[^,]+}}) +// CHECK: call void [[HVT2:@.+]]([[S1]]* frozen {{[^,]+}}) // CHECK: br label {{%?}}[[END]] // CHECK: [[END]] // @@ -197,7 +197,7 @@ // CHECK: br i1 [[ERROR]], label %[[FAIL:.+]], label %[[END:[^,]+]] // // CHECK: [[FAIL]] -// CHECK: call void [[HVT3:@.+]](i[[SZ]] [[ARG]]) +// CHECK: call void [[HVT3:@.+]](i[[SZ]] frozen [[ARG]]) // CHECK: br label {{%?}}[[END]] // CHECK: [[END]] // @@ -218,7 +218,7 @@ // CHECK: br i1 [[ERROR]], label %[[FAIL:.+]], label %[[END:[^,]+]] // // CHECK: [[FAIL]] -// CHECK: call void [[HVT4:@.+]](i[[SZ]] [[ARG]]) +// CHECK: call void [[HVT4:@.+]](i[[SZ]] frozen [[ARG]]) // CHECK: br label {{%?}}[[END]] // CHECK: [[END]] // @@ -258,7 +258,7 @@ // CHECK: br i1 [[ERROR]], label %[[FAIL:.+]], label %[[END:[^,]+]] // // CHECK: [[FAIL]] -// CHECK: call void [[HVT6:@.+]](i[[SZ]] {{%.+}}, i[[SZ]] {{%.+}}, i[[SZ]] [[ARG]]) +// CHECK: call void [[HVT6:@.+]](i[[SZ]] frozen {{%.+}}, i[[SZ]] frozen {{%.+}}, i[[SZ]] frozen [[ARG]]) // CHECK: br label {{%?}}[[END]] // CHECK: [[END]] // @@ -271,7 +271,7 @@ // Check that the offloading functions are emitted and that the parallel function // is appropriately guarded. -// CHECK: define internal void [[HVT1]]([[S1]]* {{%.+}}, i[[SZ]] [[PARM1:%.+]], i[[SZ]] [[PARM2:%.+]]) +// CHECK: define internal void [[HVT1]]([[S1]]* frozen {{%.+}}, i[[SZ]] frozen [[PARM1:%.+]], i[[SZ]] frozen [[PARM2:%.+]]) // CHECK-DAG: store i[[SZ]] [[PARM2]], i[[SZ]]* [[CAPE_ADDR:%.+]], align // CHECK-64: [[CONV:%.+]] = bitcast i[[SZ]]* [[CAPE_ADDR]] to i32* // CHECK-64: [[NT:%.+]] = load i32, i32* [[CONV]], align @@ -281,13 +281,13 @@ // // -// CHECK: define internal void [[HVT2]]([[S1]]* {{%.+}}) +// CHECK: define internal void [[HVT2]]([[S1]]* frozen {{%.+}}) // CHECK: call void @__kmpc_push_num_teams(%struct.ident_t* {{[^,]+}}, i32 {{[^,]+}}, i32 1024, i32 0) // CHECK: call {{.*}}void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* [[DEF_LOC]], i32 1, // // -// CHECK: define internal void [[HVT3]](i[[SZ]] [[PARM:%.+]]) +// CHECK: define internal void [[HVT3]](i[[SZ]] frozen [[PARM:%.+]]) // CHECK-DAG: store i[[SZ]] [[PARM]], i[[SZ]]* [[CAPE_ADDR:%.+]], align // CHECK-64: [[CONV:%.+]] = bitcast i[[SZ]]* [[CAPE_ADDR]] to i32* // CHECK-64: [[NT:%.+]] = load i32, i32* [[CONV]], align @@ -296,7 +296,7 @@ // CHECK: call {{.*}}void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* [[DEF_LOC]], i32 0, // // -// CHECK: define internal void [[HVT4]](i[[SZ]] [[PARM:%.+]]) +// CHECK: define internal void [[HVT4]](i[[SZ]] frozen [[PARM:%.+]]) // CHECK-DAG: store i[[SZ]] [[PARM]], i[[SZ]]* [[CAPE_ADDR:%.+]], align // CHECK-64: [[CONV:%.+]] = bitcast i[[SZ]]* [[CAPE_ADDR]] to i32* // CHECK-64: [[NT:%.+]] = load i32, i32* [[CONV]], align @@ -312,7 +312,7 @@ // // -// CHECK: define internal void [[HVT6]](i[[SZ]] [[PARM1:%.+]], i[[SZ]] [[PARM2:%.+]], i[[SZ]] [[PARM3:%.+]]) +// CHECK: define internal void [[HVT6]](i[[SZ]] frozen [[PARM1:%.+]], i[[SZ]] frozen [[PARM2:%.+]], i[[SZ]] frozen [[PARM3:%.+]]) // CHECK-DAG: store i[[SZ]] [[PARM3]], i[[SZ]]* [[CAPE_ADDR:%.+]], align // CHECK: [[CONV:%.+]] = bitcast i[[SZ]]* [[CAPE_ADDR]] to i16* // CHECK: [[T:%.+]] = load i16, i16* [[CONV]], align diff --git a/clang/test/OpenMP/target_teams_thread_limit_codegen.cpp b/clang/test/OpenMP/target_teams_thread_limit_codegen.cpp --- a/clang/test/OpenMP/target_teams_thread_limit_codegen.cpp +++ b/clang/test/OpenMP/target_teams_thread_limit_codegen.cpp @@ -138,7 +138,7 @@ // -// CHECK: define {{.*}}[[FS1]]([[S1]]* {{%.+}}, i32 {{[^%]*}}[[PARM:%.+]]) +// CHECK: define {{.*}}[[FS1]]([[S1]]* frozen {{%.+}}, i32 {{[^%]*}}[[PARM:%.+]]) // // CHECK-DAG: store i32 [[PARM]], i32* [[N_ADDR:%.+]], align // CHECK: store i32 1, i32* [[B:%.+]], align @@ -158,7 +158,7 @@ // CHECK: br i1 [[ERROR]], label %[[FAIL:.+]], label %[[END:[^,]+]] // // CHECK: [[FAIL]] -// CHECK: call void [[HVT1:@.+]]([[S1]]* {{%.+}}, i[[SZ]] {{%.+}}, i[[SZ]] [[ARG]]) +// CHECK: call void [[HVT1:@.+]]([[S1]]* frozen {{%.+}}, i[[SZ]] frozen {{%.+}}, i[[SZ]] frozen [[ARG]]) // CHECK: br label {{%?}}[[END]] // CHECK: [[END]] // @@ -169,7 +169,7 @@ // CHECK: br i1 [[ERROR]], label %[[FAIL:.+]], label %[[END:[^,]+]] // // CHECK: [[FAIL]] -// CHECK: call void [[HVT2:@.+]]([[S1]]* {{[^,]+}}) +// CHECK: call void [[HVT2:@.+]]([[S1]]* frozen {{[^,]+}}) // CHECK: br label {{%?}}[[END]] // CHECK: [[END]] // @@ -206,7 +206,7 @@ // CHECK: br i1 [[ERROR]], label %[[FAIL:.+]], label %[[END:[^,]+]] // // CHECK: [[FAIL]] -// CHECK: call void [[HVT3:@.+]](i[[SZ]] [[ARG1]], i[[SZ]] [[ARG2]]) +// CHECK: call void [[HVT3:@.+]](i[[SZ]] frozen [[ARG1]], i[[SZ]] frozen [[ARG2]]) // CHECK: br label {{%?}}[[END]] // CHECK: [[END]] // @@ -227,7 +227,7 @@ // CHECK: br i1 [[ERROR]], label %[[FAIL:.+]], label %[[END:[^,]+]] // // CHECK: [[FAIL]] -// CHECK: call void [[HVT4:@.+]](i[[SZ]] [[ARG]]) +// CHECK: call void [[HVT4:@.+]](i[[SZ]] frozen [[ARG]]) // CHECK: br label {{%?}}[[END]] // CHECK: [[END]] // @@ -267,7 +267,7 @@ // CHECK: br i1 [[ERROR]], label %[[FAIL:.+]], label %[[END:[^,]+]] // // CHECK: [[FAIL]] -// CHECK: call void [[HVT6:@.+]](i[[SZ]] {{%.+}}, i[[SZ]] {{%.+}}, i[[SZ]] [[ARG]]) +// CHECK: call void [[HVT6:@.+]](i[[SZ]] frozen {{%.+}}, i[[SZ]] frozen {{%.+}}, i[[SZ]] frozen [[ARG]]) // CHECK: br label {{%?}}[[END]] // CHECK: [[END]] // @@ -280,7 +280,7 @@ // Check that the offloading functions are emitted and that the parallel function // is appropriately guarded. -// CHECK: define internal void [[HVT1]]([[S1]]* {{%.+}}, i[[SZ]] [[PARM1:%.+]], i[[SZ]] [[PARM2:%.+]]) +// CHECK: define internal void [[HVT1]]([[S1]]* frozen {{%.+}}, i[[SZ]] frozen [[PARM1:%.+]], i[[SZ]] frozen [[PARM2:%.+]]) // CHECK-DAG: store i[[SZ]] [[PARM2]], i[[SZ]]* [[CAPE_ADDR:%.+]], align // CHECK-64: [[CONV:%.+]] = bitcast i[[SZ]]* [[CAPE_ADDR]] to i32* // CHECK-64: [[TL:%.+]] = load i32, i32* [[CONV]], align @@ -290,13 +290,13 @@ // // -// CHECK: define internal void [[HVT2]]([[S1]]* {{%.+}}) +// CHECK: define internal void [[HVT2]]([[S1]]* frozen {{%.+}}) // CHECK: call void @__kmpc_push_num_teams(%struct.ident_t* {{[^,]+}}, i32 {{[^,]+}}, i32 0, i32 1024) // CHECK: call {{.*}}void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* [[DEF_LOC]], i32 1, // // -// CHECK: define internal void [[HVT3]](i[[SZ]] [[PARM1:%.+]], i[[SZ]] [[PARM2:%.+]]) +// CHECK: define internal void [[HVT3]](i[[SZ]] frozen [[PARM1:%.+]], i[[SZ]] frozen [[PARM2:%.+]]) // CHECK-DAG: store i[[SZ]] [[PARM1]], i[[SZ]]* [[CAPE_ADDR1:%.+]], align // CHECK-DAG: store i[[SZ]] [[PARM2]], i[[SZ]]* [[CAPE_ADDR2:%.+]], align // CHECK-64: [[CONV1:%.+]] = bitcast i[[SZ]]* [[CAPE_ADDR1]] to i32* @@ -309,7 +309,7 @@ // CHECK: call {{.*}}void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* [[DEF_LOC]], i32 0, // // -// CHECK: define internal void [[HVT4]](i[[SZ]] [[PARM:%.+]]) +// CHECK: define internal void [[HVT4]](i[[SZ]] frozen [[PARM:%.+]]) // CHECK-DAG: store i[[SZ]] [[PARM]], i[[SZ]]* [[CAPE_ADDR:%.+]], align // CHECK-64: [[CONV:%.+]] = bitcast i[[SZ]]* [[CAPE_ADDR]] to i32* // CHECK-64: [[TL:%.+]] = load i32, i32* [[CONV]], align @@ -325,7 +325,7 @@ // // -// CHECK: define internal void [[HVT6]](i[[SZ]] [[PARM1:%.+]], i[[SZ]] [[PARM2:%.+]], i[[SZ]] [[PARM3:%.+]]) +// CHECK: define internal void [[HVT6]](i[[SZ]] frozen [[PARM1:%.+]], i[[SZ]] frozen [[PARM2:%.+]], i[[SZ]] frozen [[PARM3:%.+]]) // CHECK-DAG: store i[[SZ]] [[PARM3]], i[[SZ]]* [[CAPE_ADDR:%.+]], align // CHECK: [[CONV:%.+]] = bitcast i[[SZ]]* [[CAPE_ADDR]] to i16* // CHECK: [[T:%.+]] = load i16, i16* [[CONV]], align diff --git a/clang/test/OpenMP/target_teams_uses_allocators_codegen.cpp b/clang/test/OpenMP/target_teams_uses_allocators_codegen.cpp --- a/clang/test/OpenMP/target_teams_uses_allocators_codegen.cpp +++ b/clang/test/OpenMP/target_teams_uses_allocators_codegen.cpp @@ -69,7 +69,7 @@ // CHECK: [[CMP:%.+]] = icmp ne i32 [[RES]], 0 // CHECK: br i1 [[CMP]], label %[[FAILED:.+]], label %[[DONE:.+]] // CHECK: [[FAILED]]: -// CHECK: call void @[[TGT_REGION]]([10 x %struct.omp_alloctrait_t]* %{{[^,]+}}) +// CHECK: call void @[[TGT_REGION]]([10 x %struct.omp_alloctrait_t]* frozen %{{[^,]+}}) #pragma omp target teams uses_allocators(omp_null_allocator, omp_thread_mem_alloc, my_allocator(traits)) ; } diff --git a/clang/test/OpenMP/target_update_depend_codegen.cpp b/clang/test/OpenMP/target_update_depend_codegen.cpp --- a/clang/test/OpenMP/target_update_depend_codegen.cpp +++ b/clang/test/OpenMP/target_update_depend_codegen.cpp @@ -1,16 +1,16 @@ -// RUN: %clang_cc1 -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix CK1 --check-prefix CK1-64 -// RUN: %clang_cc1 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix CK1 --check-prefix CK1-64 -// RUN: %clang_cc1 -verify -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix CK1 --check-prefix CK1-32 -// RUN: %clang_cc1 -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix CK1 --check-prefix CK1-32 +// RUN: %clang_cc1 -disable-frozen-args -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix CK1 --check-prefix CK1-64 +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix CK1 --check-prefix CK1-64 +// RUN: %clang_cc1 -disable-frozen-args -verify -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix CK1 --check-prefix CK1-32 +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix CK1 --check-prefix CK1-32 -// RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck --check-prefix SIMD-ONLY0 %s -// RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY0 %s -// RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck --check-prefix SIMD-ONLY0 %s -// RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s -// RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY0 %s +// RUN: %clang_cc1 -disable-frozen-args -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck --check-prefix SIMD-ONLY0 %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY0 %s +// RUN: %clang_cc1 -disable-frozen-args -verify -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck --check-prefix SIMD-ONLY0 %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s +// RUN: %clang_cc1 -disable-frozen-args -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY0 %s // SIMD-ONLY0-NOT: {{__kmpc|__tgt}} // expected-no-diagnostics diff --git a/clang/test/OpenMP/target_uses_allocators_codegen.cpp b/clang/test/OpenMP/target_uses_allocators_codegen.cpp --- a/clang/test/OpenMP/target_uses_allocators_codegen.cpp +++ b/clang/test/OpenMP/target_uses_allocators_codegen.cpp @@ -69,7 +69,7 @@ // CHECK: [[CMP:%.+]] = icmp ne i32 [[RES]], 0 // CHECK: br i1 [[CMP]], label %[[FAILED:.+]], label %[[DONE:.+]] // CHECK: [[FAILED]]: -// CHECK: call void @[[TGT_REGION]]([10 x %struct.omp_alloctrait_t]* %{{[^,]+}}) +// CHECK: call void @[[TGT_REGION]]([10 x %struct.omp_alloctrait_t]* frozen %{{[^,]+}}) #pragma omp target uses_allocators(omp_null_allocator, omp_thread_mem_alloc, my_allocator(traits)) ; } diff --git a/clang/test/OpenMP/task_codegen.cpp b/clang/test/OpenMP/task_codegen.cpp --- a/clang/test/OpenMP/task_codegen.cpp +++ b/clang/test/OpenMP/task_codegen.cpp @@ -272,30 +272,30 @@ } return a; } -// CHECK: define internal i32 [[TASK_ENTRY1]](i32 %0, [[KMP_TASK_T]]{{.*}}* noalias %1) +// CHECK: define internal frozen i32 [[TASK_ENTRY1]](i32 frozen %0, [[KMP_TASK_T]]{{.*}}* frozen noalias %1) // CHECK: store i32 15, i32* [[A_PTR:@.+]] // CHECK: [[A_VAL:%.+]] = load i32, i32* [[A_PTR]] // CHECK: [[A_VAL_I8:%.+]] = trunc i32 [[A_VAL]] to i8 // CHECK: store i8 [[A_VAL_I8]], i8* %{{.+}} // CHECK: store i32 10, i32* %{{.+}} -// CHECK: define internal i32 [[TASK_ENTRY2]](i32 %0, [[KMP_TASK_T]]{{.*}}* noalias %1) +// CHECK: define internal frozen i32 [[TASK_ENTRY2]](i32 frozen %0, [[KMP_TASK_T]]{{.*}}* frozen noalias %1) // CHECK: store i32 1, i32* [[A_PTR]] -// CHECK: define internal i32 [[TASK_ENTRY3]](i32 %0, [[KMP_TASK_T]]{{.*}}* noalias %1) +// CHECK: define internal frozen i32 [[TASK_ENTRY3]](i32 frozen %0, [[KMP_TASK_T]]{{.*}}* frozen noalias %1) // CHECK: store i32 2, i32* [[A_PTR]] -// CHECK: define internal i32 [[TASK_ENTRY4]](i32 %0, [[KMP_TASK_T]]{{.*}}* noalias %1) +// CHECK: define internal frozen i32 [[TASK_ENTRY4]](i32 frozen %0, [[KMP_TASK_T]]{{.*}}* frozen noalias %1) // CHECK: store i32 3, i32* [[A_PTR]] -// CHECK: define internal i32 [[TASK_ENTRY5]](i32 %0, [[KMP_TASK_T]]{{.*}}* noalias %1) +// CHECK: define internal frozen i32 [[TASK_ENTRY5]](i32 frozen %0, [[KMP_TASK_T]]{{.*}}* frozen noalias %1) // CHECK: store i32 4, i32* [[A_PTR]] // CHECK: store i32 5, i32* [[C_PTR:%.+]], align 128 -// CHECK: define internal i32 +// CHECK: define internal frozen i32 // CHECK: store i32 4, i32* [[A_PTR]] -// CHECK: define internal i32 [[TASK_ENTRY6]](i32 %0, [[KMP_TASK_T]]{{.*}}* noalias %1) +// CHECK: define internal frozen i32 [[TASK_ENTRY6]](i32 frozen %0, [[KMP_TASK_T]]{{.*}}* frozen noalias %1) // CHECK: switch i32 %{{.+}}, label // CHECK: load i32*, i32** % // CHECK: store i32 1, i32* % diff --git a/clang/test/OpenMP/task_firstprivate_codegen.cpp b/clang/test/OpenMP/task_firstprivate_codegen.cpp --- a/clang/test/OpenMP/task_firstprivate_codegen.cpp +++ b/clang/test/OpenMP/task_firstprivate_codegen.cpp @@ -81,7 +81,7 @@ // LAMBDA: ret #pragma omp task firstprivate(g, sivar, local) { - // LAMBDA: define {{.+}} void [[INNER_LAMBDA:@.+]](%{{.+}}* [[ARG_PTR:%.+]]) + // LAMBDA: define {{.+}} void [[INNER_LAMBDA:@.+]](%{{.+}}* frozen [[ARG_PTR:%.+]]) // LAMBDA: store %{{.+}}* [[ARG_PTR]], %{{.+}}** [[ARG_PTR_REF:%.+]], // LAMBDA: [[ARG_PTR:%.+]] = load %{{.+}}*, %{{.+}}** [[ARG_PTR_REF]] // LAMBDA: [[G_PTR_REF:%.+]] = getelementptr inbounds %{{.+}}, %{{.+}}* [[ARG_PTR]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 @@ -89,7 +89,7 @@ // LAMBDA: store volatile double 2.0{{.+}}, double* [[G_REF]] // LAMBDA: store double* %{{.+}}, double** %{{.+}}, - // LAMBDA: define internal i32 [[TASK_ENTRY]](i32 %0, %{{.+}}* noalias %1) + // LAMBDA: define internal frozen i32 [[TASK_ENTRY]](i32 frozen %0, %{{.+}}* frozen noalias %1) g = 1; sivar = 11; // LAMBDA: store double 1.0{{.+}}, double* %{{.+}}, @@ -138,7 +138,7 @@ // BLOCKS: store double* %{{.+}}, double** %{{.+}}, // BLOCKS: store i{{[0-9]+}}* %{{.+}}, i{{[0-9]+}}** %{{.+}}, - // BLOCKS: define internal i32 [[TASK_ENTRY]](i32 %0, %{{.+}}* noalias %1) + // BLOCKS: define internal frozen i32 [[TASK_ENTRY]](i32 frozen %0, %{{.+}}* frozen noalias %1) g = 1; sivar = 11; // BLOCKS: store double 1.0{{.+}}, double* %{{.+}}, @@ -172,7 +172,7 @@ } // CHECK: [[SIVAR_ADDR:.+]] = internal global i{{[0-9]+}} 0, -// CHECK: define i{{[0-9]+}} @main() +// CHECK: define frozen i{{[0-9]+}} @main() // CHECK: alloca [[S_DOUBLE_TY]], // CHECK: [[TEST:%.+]] = alloca [[S_DOUBLE_TY]], // CHECK: [[T_VAR_ADDR:%.+]] = alloca i32, @@ -181,7 +181,7 @@ // CHECK: [[VAR_ADDR:%.+]] = alloca [[S_DOUBLE_TY]], // CHECK: [[GTID:%.+]] = call i32 @__kmpc_global_thread_num([[LOC:%.+]]) -// CHECK: call {{.*}} [[S_DOUBLE_TY_COPY_CONSTR:@.+]]([[S_DOUBLE_TY]]* [[TEST]], +// CHECK: call {{.*}} [[S_DOUBLE_TY_COPY_CONSTR:@.+]]([[S_DOUBLE_TY]]* frozen [[TEST]] // Allocate task. // Returns struct kmp_task_t { @@ -200,7 +200,7 @@ // s_arr; // CHECK: [[PRIVATE_S_ARR_REF:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 // CHECK: bitcast [2 x [[S_DOUBLE_TY]]]* [[S_ARR_ADDR]] to [[S_DOUBLE_TY]]* -// CHECK: call void [[S_DOUBLE_TY_COPY_CONSTR]]([[S_DOUBLE_TY]]* [[S_ARR_CUR:%[^,]+]], +// CHECK: call void [[S_DOUBLE_TY_COPY_CONSTR]]([[S_DOUBLE_TY]]* frozen [[S_ARR_CUR:%[^,]+]] // CHECK: getelementptr [[S_DOUBLE_TY]], [[S_DOUBLE_TY]]* [[S_ARR_CUR]], i{{.+}} 1 // CHECK: getelementptr [[S_DOUBLE_TY]], [[S_DOUBLE_TY]]* %{{.+}}, i{{.+}} 1 // CHECK: icmp eq @@ -208,7 +208,7 @@ // var; // CHECK: [[PRIVATE_VAR_REF:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 1 -// CHECK-NEXT: call void [[S_DOUBLE_TY_COPY_CONSTR]]([[S_DOUBLE_TY]]* [[PRIVATE_VAR_REF]], [[S_DOUBLE_TY]]* {{.*}}[[VAR_ADDR]], +// CHECK-NEXT: call void [[S_DOUBLE_TY_COPY_CONSTR]]([[S_DOUBLE_TY]]* frozen [[PRIVATE_VAR_REF]], [[S_DOUBLE_TY]]* {{.*}}[[VAR_ADDR]] // t_var; // CHECK: [[PRIVATE_T_VAR_REF:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 2 @@ -234,7 +234,7 @@ // Start task. // CHECK: call i32 @__kmpc_omp_task([[LOC]], i32 [[GTID]], i8* [[RES]]) -// CHECK: = call i{{.+}} [[TMAIN_INT:@.+]]() +// CHECK: = call frozen i{{.+}} [[TMAIN_INT:@.+]]() // No destructors must be called for private copies of s_arr and var. // CHECK-NOT: getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 2 @@ -245,7 +245,7 @@ // CHECK: ret // -// CHECK: define internal void [[PRIVATES_MAP_FN:@.+]]([[PRIVATES_MAIN_TY]]* noalias %0, i32** noalias %1, [2 x [[S_DOUBLE_TY]]]** noalias %2, [2 x i32]** noalias %3, i32** noalias %4, [[S_DOUBLE_TY]]** noalias %5) +// CHECK: define internal void [[PRIVATES_MAP_FN:@.+]]([[PRIVATES_MAIN_TY]]* frozen noalias %0, i32** frozen noalias %1, [2 x [[S_DOUBLE_TY]]]** frozen noalias %2, [2 x i32]** frozen noalias %3, i32** frozen noalias %4, [[S_DOUBLE_TY]]** frozen noalias %5) // CHECK: [[PRIVATES:%.+]] = load [[PRIVATES_MAIN_TY]]*, [[PRIVATES_MAIN_TY]]** // CHECK: [[PRIV_S_VAR:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i32 0, i32 0 // CHECK: [[ARG3:%.+]] = load [2 x [[S_DOUBLE_TY]]]**, [2 x [[S_DOUBLE_TY]]]*** %{{.+}}, @@ -264,7 +264,7 @@ // CHECK: store i{{[0-9]+}}* [[PRIV_SIVAR]], i{{[0-9]+}}** [[ARG5]], // CHECK: ret void -// CHECK: define internal i32 [[TASK_ENTRY]](i32 %0, [[KMP_TASK_MAIN_TY]]* noalias %1) +// CHECK: define internal frozen i32 [[TASK_ENTRY]](i32 frozen %0, [[KMP_TASK_MAIN_TY]]* frozen noalias %1) // CHECK: alloca i32*, // CHECK: [[PRIV_T_VAR_ADDR:%.+]] = alloca i32*, @@ -292,15 +292,15 @@ // CHECK: ret -// CHECK: define internal i32 [[DESTRUCTORS]](i32 %0, [[KMP_TASK_MAIN_TY]]* noalias %1) +// CHECK: define internal frozen i32 [[DESTRUCTORS]](i32 frozen %0, [[KMP_TASK_MAIN_TY]]* frozen noalias %1) // CHECK: [[PRIVATES:%.+]] = getelementptr inbounds [[KMP_TASK_MAIN_TY]], [[KMP_TASK_MAIN_TY]]* [[RES_KMP_TASK:%.+]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 // CHECK: [[PRIVATE_S_ARR_REF:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 0 // CHECK: [[PRIVATE_VAR_REF:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 1 -// CHECK: call void [[S_DOUBLE_TY_DESTR]]([[S_DOUBLE_TY]]* [[PRIVATE_VAR_REF]]) +// CHECK: call void [[S_DOUBLE_TY_DESTR]]([[S_DOUBLE_TY]]* frozen [[PRIVATE_VAR_REF]]) // CHECK: getelementptr inbounds [2 x [[S_DOUBLE_TY]]], [2 x [[S_DOUBLE_TY]]]* [[PRIVATE_S_ARR_REF]], i{{.+}} 0, i{{.+}} 0 // CHECK: getelementptr inbounds [[S_DOUBLE_TY]], [[S_DOUBLE_TY]]* %{{.+}}, i{{.+}} 2 // CHECK: [[PRIVATE_S_ARR_ELEM_REF:%.+]] = getelementptr inbounds [[S_DOUBLE_TY]], [[S_DOUBLE_TY]]* %{{.+}}, i{{.+}} -1 -// CHECK: call void [[S_DOUBLE_TY_DESTR]]([[S_DOUBLE_TY]]* [[PRIVATE_S_ARR_ELEM_REF]]) +// CHECK: call void [[S_DOUBLE_TY_DESTR]]([[S_DOUBLE_TY]]* frozen [[PRIVATE_S_ARR_ELEM_REF]]) // CHECK: icmp eq // CHECK: br i1 // CHECK: ret i32 @@ -314,7 +314,7 @@ // CHECK: [[VAR_ADDR:%.+]] = alloca [[S_INT_TY]], // CHECK: [[GTID:%.+]] = call i32 @__kmpc_global_thread_num([[LOC:%.+]]) -// CHECK: call {{.*}} [[S_INT_TY_COPY_CONSTR:@.+]]([[S_INT_TY]]* [[TEST]], +// CHECK: call {{.*}} [[S_INT_TY_COPY_CONSTR:@.+]]([[S_INT_TY]]* frozen [[TEST]] // Allocate task. // Returns struct kmp_task_t { @@ -345,14 +345,14 @@ // CHECK: getelementptr inbounds [2 x [[S_INT_TY]]], [2 x [[S_INT_TY]]]* [[PRIVATE_S_ARR_REF]], i{{.+}} 0, i{{.+}} 0 // CHECK: bitcast [2 x [[S_INT_TY]]]* [[S_ARR_ADDR]] to [[S_INT_TY]]* // CHECK: getelementptr [[S_INT_TY]], [[S_INT_TY]]* %{{.+}}, i{{.+}} 2 -// CHECK: call void [[S_INT_TY_COPY_CONSTR]]([[S_INT_TY]]* [[S_ARR_CUR:%[^,]+]], +// CHECK: call void [[S_INT_TY_COPY_CONSTR]]([[S_INT_TY]]* frozen [[S_ARR_CUR:%[^,]+]] // CHECK: getelementptr [[S_INT_TY]], [[S_INT_TY]]* [[S_ARR_CUR]], i{{.+}} 1 // CHECK: icmp eq // CHECK: br i1 // var; // CHECK: [[PRIVATE_VAR_REF:%.+]] = getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 3 -// CHECK-NEXT: call void [[S_INT_TY_COPY_CONSTR]]([[S_INT_TY]]* [[PRIVATE_VAR_REF]], +// CHECK-NEXT: call void [[S_INT_TY_COPY_CONSTR]]([[S_INT_TY]]* frozen [[PRIVATE_VAR_REF]] // Provide pointer to destructor function, which will destroy private variables at the end of the task. // CHECK: [[DESTRUCTORS_REF:%.+]] = getelementptr inbounds [[KMP_TASK_T_TY]], [[KMP_TASK_T_TY]]* [[TASK]], i{{.+}} 0, i{{.+}} 3 @@ -371,7 +371,7 @@ // CHECK: ret // -// CHECK: define internal void [[PRIVATES_MAP_FN:@.+]]([[PRIVATES_TMAIN_TY]]* noalias %0, i32** noalias %1, [2 x i32]** noalias %2, [2 x [[S_INT_TY]]]** noalias %3, [[S_INT_TY]]** noalias %4) +// CHECK: define internal void [[PRIVATES_MAP_FN:@.+]]([[PRIVATES_TMAIN_TY]]* frozen noalias %0, i32** frozen noalias %1, [2 x i32]** frozen noalias %2, [2 x [[S_INT_TY]]]** frozen noalias %3, [[S_INT_TY]]** frozen noalias %4) // CHECK: [[PRIVATES:%.+]] = load [[PRIVATES_TMAIN_TY]]*, [[PRIVATES_TMAIN_TY]]** // CHECK: [[PRIV_T_VAR:%.+]] = getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i32 0, i32 0 // CHECK: [[ARG1:%.+]] = load i32**, i32*** %{{.+}}, @@ -387,7 +387,7 @@ // CHECK: store [[S_INT_TY]]* [[PRIV_VAR]], [[S_INT_TY]]** [[ARG4]], // CHECK: ret void -// CHECK: define internal i32 [[TASK_ENTRY]](i32 %0, [[KMP_TASK_TMAIN_TY]]* noalias %1) +// CHECK: define internal frozen i32 [[TASK_ENTRY]](i32 frozen %0, [[KMP_TASK_TMAIN_TY]]* frozen noalias %1) // CHECK: alloca i32*, // CHECK-DAG: [[PRIV_T_VAR_ADDR:%.+]] = alloca i32*, // CHECK-DAG: [[PRIV_VEC_ADDR:%.+]] = alloca [2 x i32]*, @@ -409,15 +409,15 @@ // CHECK: ret -// CHECK: define internal i32 [[DESTRUCTORS]](i32 %0, [[KMP_TASK_TMAIN_TY]]* noalias %1) +// CHECK: define internal frozen i32 [[DESTRUCTORS]](i32 frozen %0, [[KMP_TASK_TMAIN_TY]]* frozen noalias %1) // CHECK: [[PRIVATES:%.+]] = getelementptr inbounds [[KMP_TASK_TMAIN_TY]], [[KMP_TASK_TMAIN_TY]]* [[RES_KMP_TASK:%.+]], i{{[0-9]+}} 0, i{{[0-9]+}} 2 // CHECK: [[PRIVATE_S_ARR_REF:%.+]] = getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 2 // CHECK: [[PRIVATE_VAR_REF:%.+]] = getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 3 -// CHECK: call void [[S_INT_TY_DESTR]]([[S_INT_TY]]* [[PRIVATE_VAR_REF]]) +// CHECK: call void [[S_INT_TY_DESTR]]([[S_INT_TY]]* frozen [[PRIVATE_VAR_REF]]) // CHECK: getelementptr inbounds [2 x [[S_INT_TY]]], [2 x [[S_INT_TY]]]* [[PRIVATE_S_ARR_REF]], i{{.+}} 0, i{{.+}} 0 // CHECK: getelementptr inbounds [[S_INT_TY]], [[S_INT_TY]]* %{{.+}}, i{{.+}} 2 // CHECK: [[PRIVATE_S_ARR_ELEM_REF:%.+]] = getelementptr inbounds [[S_INT_TY]], [[S_INT_TY]]* %{{.+}}, i{{.+}} -1 -// CHECK: call void [[S_INT_TY_DESTR]]([[S_INT_TY]]* [[PRIVATE_S_ARR_ELEM_REF]]) +// CHECK: call void [[S_INT_TY_DESTR]]([[S_INT_TY]]* frozen [[PRIVATE_S_ARR_ELEM_REF]]) // CHECK: icmp eq // CHECK: br i1 // CHECK: ret i32 diff --git a/clang/test/OpenMP/task_if_codegen.cpp b/clang/test/OpenMP/task_if_codegen.cpp --- a/clang/test/OpenMP/task_if_codegen.cpp +++ b/clang/test/OpenMP/task_if_codegen.cpp @@ -32,18 +32,18 @@ // CHECK: ret void } -// CHECK: define internal void [[GTID_TEST_REGION1]](i32* noalias [[GTID_PARAM:%.+]], i +// CHECK: define internal void [[GTID_TEST_REGION1]](i32* frozen noalias [[GTID_PARAM:%.+]], i // CHECK: store i32* [[GTID_PARAM]], i32** [[GTID_ADDR_REF:%.+]], // CHECK: [[GTID_ADDR:%.+]] = load i32*, i32** [[GTID_ADDR_REF]] // CHECK: [[GTID:%.+]] = load i32, i32* [[GTID_ADDR]] // CHECK: [[ORIG_TASK_PTR:%.+]] = call i8* @__kmpc_omp_task_alloc( // CHECK: [[TASK_PTR:%.+]] = bitcast i8* [[ORIG_TASK_PTR]] to // CHECK: call void @__kmpc_omp_task_begin_if0(%{{.+}}* @{{.+}}, i{{.+}} [[GTID]], i8* [[ORIG_TASK_PTR]]) -// CHECK: call i32 [[GTID_TEST_REGION2:@.+]](i32 [[GTID]], %{{.+}}* [[TASK_PTR]]) +// CHECK: call i32 [[GTID_TEST_REGION2:@.+]](i32 frozen [[GTID]], %{{.+}}* frozen [[TASK_PTR]]) // CHECK: call void @__kmpc_omp_task_complete_if0(%{{.+}}* @{{.+}}, i{{.+}} [[GTID]], i8* [[ORIG_TASK_PTR]]) // CHECK: ret void -// CHECK: define internal i32 [[GTID_TEST_REGION2]]( +// CHECK: define internal frozen i32 [[GTID_TEST_REGION2]]( // CHECK: call void @{{.+}}gtid_test // CHECK: ret i32 @@ -74,7 +74,7 @@ // CHECK: [[ORIG_TASK_PTR:%.+]] = call i8* @__kmpc_omp_task_alloc({{[^,]+}}, i32 [[GTID]], i32 1, i64 40, i64 1, i32 (i32, i8*)* bitcast (i32 (i32, %{{[^*]+}}*)* [[CAP_FN8:[^ ]+]] to i32 (i32, i8*)*)) // CHECK: [[TASK_PTR:%.+]] = bitcast i8* [[ORIG_TASK_PTR]] to // CHECK: call void @__kmpc_omp_task_begin_if0(%{{.+}}* @{{.+}}, i{{.+}} [[GTID]], i8* [[ORIG_TASK_PTR]]) -// CHECK: call i32 [[CAP_FN8]](i32 [[GTID]], %{{.+}}* [[TASK_PTR]]) +// CHECK: call i32 [[CAP_FN8]](i32 frozen [[GTID]], %{{.+}}* frozen [[TASK_PTR]]) // CHECK: call void @__kmpc_omp_task_complete_if0(%{{.+}}* @{{.+}}, i{{.+}} [[GTID]], i8* [[ORIG_TASK_PTR]]) #pragma omp task if (false) fn8(); @@ -87,7 +87,7 @@ // CHECK: br label %[[OMP_END:.+]] // CHECK: [[OMP_ELSE]] // CHECK: call void @__kmpc_omp_task_begin_if0(%{{.+}}* @{{.+}}, i{{.+}} [[GTID]], i8* [[ORIG_TASK_PTR]]) -// CHECK: call i32 [[CAP_FN9]](i32 [[GTID]], %{{.+}}* [[TASK_PTR]]) +// CHECK: call i32 [[CAP_FN9]](i32 frozen [[GTID]], %{{.+}}* frozen [[TASK_PTR]]) // CHECK: call void @__kmpc_omp_task_complete_if0(%{{.+}}* @{{.+}}, i{{.+}} [[GTID]], i8* [[ORIG_TASK_PTR]]) // CHECK: br label %[[OMP_END]] // CHECK: [[OMP_END]] @@ -102,7 +102,7 @@ // CHECK: [[OMP_ELSE]] // CHECK: call void @__kmpc_omp_wait_deps(%{{.+}}* @{{.+}}, i32 [[GTID]], i32 1, i8* [[LIST]], i32 0, i8* null) // CHECK: call void @__kmpc_omp_task_begin_if0(%{{.+}}* @{{.+}}, i{{.+}} [[GTID]], i8* [[ORIG_TASK_PTR]]) -// CHECK: call i32 [[CAP_FN10]](i32 [[GTID]], %{{.+}}* [[TASK_PTR]]) +// CHECK: call i32 [[CAP_FN10]](i32 frozen [[GTID]], %{{.+}}* frozen [[TASK_PTR]]) // CHECK: call void @__kmpc_omp_task_complete_if0(%{{.+}}* @{{.+}}, i{{.+}} [[GTID]], i8* [[ORIG_TASK_PTR]]) // CHECK: br label %[[OMP_END]] // CHECK: [[OMP_END]] @@ -112,19 +112,19 @@ return tmain(Arg); } -// CHECK: define internal i32 [[CAP_FN7]] +// CHECK: define internal frozen i32 [[CAP_FN7]] // CHECK: call void @{{.+}}fn7 // CHECK: ret i32 -// CHECK: define internal i32 [[CAP_FN8]] +// CHECK: define internal frozen i32 [[CAP_FN8]] // CHECK: call void @{{.+}}fn8 // CHECK: ret i32 -// CHECK: define internal i32 [[CAP_FN9]] +// CHECK: define internal frozen i32 [[CAP_FN9]] // CHECK: call void @{{.+}}fn9 // CHECK: ret i32 -// CHECK: define internal i32 [[CAP_FN10]] +// CHECK: define internal frozen i32 [[CAP_FN10]] // CHECK: call void @{{.+}}fn10 // CHECK: ret i32 @@ -136,7 +136,7 @@ // CHECK: [[ORIG_TASK_PTR:%.+]] = call i8* @__kmpc_omp_task_alloc( // CHECK: [[TASK_PTR:%.+]] = bitcast i8* [[ORIG_TASK_PTR]] to // CHECK: call void @__kmpc_omp_task_begin_if0(%{{.+}}* @{{.+}}, i{{.+}} [[GTID]], i8* [[ORIG_TASK_PTR]]) -// CHECK: call i32 [[CAP_FN2:@.+]](i32 [[GTID]], %{{.+}}* [[TASK_PTR]]) +// CHECK: call i32 [[CAP_FN2:@.+]](i32 frozen [[GTID]], %{{.+}}* frozen [[TASK_PTR]]) // CHECK: call void @__kmpc_omp_task_complete_if0(%{{.+}}* @{{.+}}, i{{.+}} [[GTID]], i8* [[ORIG_TASK_PTR]]) // CHECK: [[ORIG_TASK_PTR:%.+]] = call i8* @__kmpc_omp_task_alloc(%{{[^,]+}}, i32 [[GTID]], i32 1, i64 40, i64 1, i32 (i32, i8*)* bitcast (i32 (i32, %{{[^*]+}}*)* [[CAP_FN3:[^ ]+]] to i32 (i32, i8*)*)) @@ -147,7 +147,7 @@ // CHECK: br label %[[OMP_END:.+]] // CHECK: [[OMP_ELSE]] // CHECK: call void @__kmpc_omp_task_begin_if0(%{{.+}}* @{{.+}}, i{{.+}} [[GTID]], i8* [[ORIG_TASK_PTR]]) -// CHECK: call i32 [[CAP_FN3]](i32 [[GTID]], %{{.+}}* [[TASK_PTR]]) +// CHECK: call i32 [[CAP_FN3]](i32 frozen [[GTID]], %{{.+}}* frozen [[TASK_PTR]]) // CHECK: call void @__kmpc_omp_task_complete_if0(%{{.+}}* @{{.+}}, i{{.+}} [[GTID]], i8* [[ORIG_TASK_PTR]]) // CHECK: br label %[[OMP_END]] // CHECK: [[OMP_END]] @@ -161,7 +161,7 @@ // CHECK: [[OMP_ELSE]] // CHECK: call void @__kmpc_omp_wait_deps(%{{.+}}* @{{.+}}, i32 [[GTID]], i32 1, i8* [[LIST]], i32 0, i8* null) // CHECK: call void @__kmpc_omp_task_begin_if0(%{{.+}}* @{{.+}}, i{{.+}} [[GTID]], i8* [[ORIG_TASK_PTR]]) -// CHECK: call i32 [[CAP_FN4]](i32 [[GTID]], %{{.+}}* [[TASK_PTR]]) +// CHECK: call i32 [[CAP_FN4]](i32 frozen [[GTID]], %{{.+}}* frozen [[TASK_PTR]]) // CHECK: call void @__kmpc_omp_task_complete_if0(%{{.+}}* @{{.+}}, i{{.+}} [[GTID]], i8* [[ORIG_TASK_PTR]]) // CHECK: br label %[[OMP_END]] // CHECK: [[OMP_END]] @@ -175,7 +175,7 @@ // CHECK: [[OMP_ELSE]] // CHECK: call void @__kmpc_omp_wait_deps(%{{.+}}* @{{.+}}, i32 [[GTID]], i32 1, i8* [[LIST]], i32 0, i8* null) // CHECK: call void @__kmpc_omp_task_begin_if0(%{{.+}}* @{{.+}}, i{{.+}} [[GTID]], i8* [[ORIG_TASK_PTR]]) -// CHECK: call i32 [[CAP_FN5]](i32 [[GTID]], %{{.+}}* [[TASK_PTR]]) +// CHECK: call i32 [[CAP_FN5]](i32 frozen [[GTID]], %{{.+}}* frozen [[TASK_PTR]]) // CHECK: call void @__kmpc_omp_task_complete_if0(%{{.+}}* @{{.+}}, i{{.+}} [[GTID]], i8* [[ORIG_TASK_PTR]]) // CHECK: br label %[[OMP_END]] // CHECK: [[OMP_END]] @@ -189,32 +189,32 @@ // CHECK: [[OMP_ELSE]] // CHECK: call void @__kmpc_omp_wait_deps(%{{.+}}* @{{.+}}, i32 [[GTID]], i32 1, i8* [[LIST]], i32 0, i8* null) // CHECK: call void @__kmpc_omp_task_begin_if0(%{{.+}}* @{{.+}}, i{{.+}} [[GTID]], i8* [[ORIG_TASK_PTR]]) -// CHECK: call i32 [[CAP_FN6]](i32 [[GTID]], %{{.+}}* [[TASK_PTR]]) +// CHECK: call i32 [[CAP_FN6]](i32 frozen [[GTID]], %{{.+}}* frozen [[TASK_PTR]]) // CHECK: call void @__kmpc_omp_task_complete_if0(%{{.+}}* @{{.+}}, i{{.+}} [[GTID]], i8* [[ORIG_TASK_PTR]]) // CHECK: br label %[[OMP_END]] // CHECK: [[OMP_END]] -// CHECK: define internal i32 [[CAP_FN1]] +// CHECK: define internal frozen i32 [[CAP_FN1]] // CHECK: call void @{{.+}}fn1 // CHECK: ret i32 -// CHECK: define internal i32 [[CAP_FN2]] +// CHECK: define internal frozen i32 [[CAP_FN2]] // CHECK: call void @{{.+}}fn2 // CHECK: ret i32 -// CHECK: define internal i32 [[CAP_FN3]] +// CHECK: define internal frozen i32 [[CAP_FN3]] // CHECK: call void @{{.+}}fn3 // CHECK: ret i32 -// CHECK: define internal i32 [[CAP_FN4]] +// CHECK: define internal frozen i32 [[CAP_FN4]] // CHECK: call void @{{.+}}fn4 // CHECK: ret i32 -// CHECK: define internal i32 [[CAP_FN5]] +// CHECK: define internal frozen i32 [[CAP_FN5]] // CHECK: call void @{{.+}}fn5 // CHECK: ret i32 -// CHECK: define internal i32 [[CAP_FN6]] +// CHECK: define internal frozen i32 [[CAP_FN6]] // CHECK: call void @{{.+}}fn6 // CHECK: ret i32 diff --git a/clang/test/OpenMP/task_private_codegen.cpp b/clang/test/OpenMP/task_private_codegen.cpp --- a/clang/test/OpenMP/task_private_codegen.cpp +++ b/clang/test/OpenMP/task_private_codegen.cpp @@ -67,7 +67,7 @@ // LAMBDA: ret #pragma omp task private(g, sivar) { - // LAMBDA: define {{.+}} void [[INNER_LAMBDA:@.+]](%{{.+}}* [[ARG_PTR:%.+]]) + // LAMBDA: define {{.+}} void [[INNER_LAMBDA:@.+]](%{{.+}}* frozen [[ARG_PTR:%.+]]) // LAMBDA: store %{{.+}}* [[ARG_PTR]], %{{.+}}** [[ARG_PTR_REF:%.+]], // LAMBDA: [[ARG_PTR:%.+]] = load %{{.+}}*, %{{.+}}** [[ARG_PTR_REF]] // LAMBDA: [[G_PTR_REF:%.+]] = getelementptr inbounds %{{.+}}, %{{.+}}* [[ARG_PTR]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 @@ -77,7 +77,7 @@ // LAMBDA: [[SIVAR_REF:%.+]] = load i{{[0-9]+}}*, i{{[0-9]+}}** [[SIVAR_PTR_REF]] // LAMBDA: store i{{[0-9]+}} 3, i{{[0-9]+}}* [[SIVAR_REF]] - // LAMBDA: define internal i32 [[TASK_ENTRY]](i32 %0, %{{.+}}* noalias %1) + // LAMBDA: define internal frozen i32 [[TASK_ENTRY]](i32 frozen %0, %{{.+}}* frozen noalias %1) g = 1; sivar = 2; // LAMBDA: store double 1.0{{.+}}, double* %{{.+}}, @@ -112,7 +112,7 @@ // BLOCKS-NOT: [[SIVAR]]{{[[^:word:]]}} // BLOCKS: ret - // BLOCKS: define internal i32 [[TASK_ENTRY]](i32 %0, %{{.+}}* noalias %1) + // BLOCKS: define internal frozen i32 [[TASK_ENTRY]](i32 frozen %0, %{{.+}}* frozen noalias %1) g = 1; sivar = 3; // BLOCKS: store double 1.0{{.+}}, double* %{{.+}}, @@ -145,7 +145,7 @@ #endif } -// CHECK: define i{{[0-9]+}} @main() +// CHECK: define frozen i{{[0-9]+}} @main() // CHECK: [[TEST:%.+]] = alloca [[S_DOUBLE_TY]], // CHECK: [[T_VAR_ADDR:%.+]] = alloca i32, // CHECK: [[VEC_ADDR:%.+]] = alloca [2 x i32], @@ -153,7 +153,7 @@ // CHECK: [[VAR_ADDR:%.+]] = alloca [[S_DOUBLE_TY]], // CHECK: [[GTID:%.+]] = call i32 @__kmpc_global_thread_num([[LOC:%.+]]) -// CHECK: call {{.*}} [[S_DOUBLE_TY_DEF_CONSTR:@.+]]([[S_DOUBLE_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_DOUBLE_TY_DEF_CONSTR:@.+]]([[S_DOUBLE_TY]]* frozen [[TEST]]) // Do not store original variables in capture struct. // CHECK-NOT: getelementptr inbounds [[CAP_MAIN_TY]], @@ -176,14 +176,14 @@ // CHECK: [[PRIVATE_S_ARR_REF:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 // CHECK: getelementptr inbounds [2 x [[S_DOUBLE_TY]]], [2 x [[S_DOUBLE_TY]]]* [[PRIVATE_S_ARR_REF]], i{{.+}} 0, i{{.+}} 0 // CHECK: getelementptr inbounds [[S_DOUBLE_TY]], [[S_DOUBLE_TY]]* %{{.+}}, i{{.+}} 2 -// CHECK: call void [[S_DOUBLE_TY_DEF_CONSTR]]([[S_DOUBLE_TY]]* [[S_ARR_CUR:%.+]]) +// CHECK: call void [[S_DOUBLE_TY_DEF_CONSTR]]([[S_DOUBLE_TY]]* frozen [[S_ARR_CUR:%.+]]) // CHECK: getelementptr inbounds [[S_DOUBLE_TY]], [[S_DOUBLE_TY]]* [[S_ARR_CUR]], i{{.+}} 1 // CHECK: icmp eq // CHECK: br i1 // var; // CHECK: [[PRIVATE_VAR_REF:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 1 -// CHECK: call void [[S_DOUBLE_TY_DEF_CONSTR]]([[S_DOUBLE_TY]]* [[PRIVATE_VAR_REF:%.+]]) +// CHECK: call void [[S_DOUBLE_TY_DEF_CONSTR]]([[S_DOUBLE_TY]]* frozen [[PRIVATE_VAR_REF:%.+]]) // Provide pointer to destructor function, which will destroy private variables at the end of the task. // CHECK: [[DESTRUCTORS_REF:%.+]] = getelementptr inbounds [[KMP_TASK_T_TY]], [[KMP_TASK_T_TY]]* [[TASK]], i{{.+}} 0, i{{.+}} 3 @@ -194,7 +194,7 @@ // CHECK: call i32 @__kmpc_omp_task([[LOC]], i32 [[GTID]], i8* [[RES]]) // CHECK: call i32 @__kmpc_omp_task([[LOC]], i32 [[GTID]], i8* -// CHECK: = call i{{.+}} [[TMAIN_INT:@.+]]() +// CHECK: = call frozen i{{.+}} [[TMAIN_INT:@.+]]() // No destructors must be called for private copies of s_arr and var. // CHECK-NOT: getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 2 @@ -205,7 +205,7 @@ // CHECK: ret // -// CHECK: define internal void [[PRIVATES_MAP_FN:@.+]]([[PRIVATES_MAIN_TY]]* noalias %0, [[S_DOUBLE_TY]]** noalias %1, i32** noalias %2, [2 x [[S_DOUBLE_TY]]]** noalias %3, [2 x i32]** noalias %4, i32** noalias %5) +// CHECK: define internal void [[PRIVATES_MAP_FN:@.+]]([[PRIVATES_MAIN_TY]]* frozen noalias %0, [[S_DOUBLE_TY]]** frozen noalias %1, i32** frozen noalias %2, [2 x [[S_DOUBLE_TY]]]** frozen noalias %3, [2 x i32]** frozen noalias %4, i32** frozen noalias %5) // CHECK: [[PRIVATES:%.+]] = load [[PRIVATES_MAIN_TY]]*, [[PRIVATES_MAIN_TY]]** // CHECK: [[PRIV_S_VAR:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i32 0, i32 0 // CHECK: [[ARG3:%.+]] = load [2 x [[S_DOUBLE_TY]]]**, [2 x [[S_DOUBLE_TY]]]*** %{{.+}}, @@ -221,7 +221,7 @@ // CHECK: store [2 x i32]* [[PRIV_VEC]], [2 x i32]** [[ARG4]], // CHECK: ret void -// CHECK: define internal i32 [[TASK_ENTRY]](i32 %0, [[KMP_TASK_MAIN_TY]]* noalias %1) +// CHECK: define internal frozen i32 [[TASK_ENTRY]](i32 frozen %0, [[KMP_TASK_MAIN_TY]]* frozen noalias %1) // CHECK: [[PRIV_VAR_ADDR:%.+]] = alloca [[S_DOUBLE_TY]]*, // CHECK: [[PRIV_T_VAR_ADDR:%.+]] = alloca i32*, @@ -246,15 +246,15 @@ // CHECK: ret -// CHECK: define internal i32 [[DESTRUCTORS]](i32 %0, [[KMP_TASK_MAIN_TY]]* noalias %1) +// CHECK: define internal frozen i32 [[DESTRUCTORS]](i32 frozen %0, [[KMP_TASK_MAIN_TY]]* frozen noalias %1) // CHECK: [[PRIVATES:%.+]] = getelementptr inbounds [[KMP_TASK_MAIN_TY]], [[KMP_TASK_MAIN_TY]]* [[RES_KMP_TASK:%.+]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 // CHECK: [[PRIVATE_S_ARR_REF:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 0 // CHECK: [[PRIVATE_VAR_REF:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 1 -// CHECK: call void [[S_DOUBLE_TY_DESTR]]([[S_DOUBLE_TY]]* [[PRIVATE_VAR_REF]]) +// CHECK: call void [[S_DOUBLE_TY_DESTR]]([[S_DOUBLE_TY]]* frozen [[PRIVATE_VAR_REF]]) // CHECK: getelementptr inbounds [2 x [[S_DOUBLE_TY]]], [2 x [[S_DOUBLE_TY]]]* [[PRIVATE_S_ARR_REF]], i{{.+}} 0, i{{.+}} 0 // CHECK: getelementptr inbounds [[S_DOUBLE_TY]], [[S_DOUBLE_TY]]* %{{.+}}, i{{.+}} 2 // CHECK: [[PRIVATE_S_ARR_ELEM_REF:%.+]] = getelementptr inbounds [[S_DOUBLE_TY]], [[S_DOUBLE_TY]]* %{{.+}}, i{{.+}} -1 -// CHECK: call void [[S_DOUBLE_TY_DESTR]]([[S_DOUBLE_TY]]* [[PRIVATE_S_ARR_ELEM_REF]]) +// CHECK: call void [[S_DOUBLE_TY_DESTR]]([[S_DOUBLE_TY]]* frozen [[PRIVATE_S_ARR_ELEM_REF]]) // CHECK: icmp eq // CHECK: br i1 // CHECK: ret i32 @@ -267,7 +267,7 @@ // CHECK: [[VAR_ADDR:%.+]] = alloca [[S_INT_TY]], // CHECK: [[GTID:%.+]] = call i32 @__kmpc_global_thread_num([[LOC:%.+]]) -// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR:@.+]]([[S_INT_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR:@.+]]([[S_INT_TY]]* frozen [[TEST]]) // Do not store original variables in capture struct. // CHECK-NOT: getelementptr inbounds [[CAP_TMAIN_TY]], @@ -290,14 +290,14 @@ // CHECK: [[PRIVATE_S_ARR_REF:%.+]] = getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i{{[0-9]+}} 0, i{{[0-9]+}} 2 // CHECK: getelementptr inbounds [2 x [[S_INT_TY]]], [2 x [[S_INT_TY]]]* [[PRIVATE_S_ARR_REF]], i{{.+}} 0, i{{.+}} 0 // CHECK: getelementptr inbounds [[S_INT_TY]], [[S_INT_TY]]* %{{.+}}, i{{.+}} 2 -// CHECK: call void [[S_INT_TY_DEF_CONSTR]]([[S_INT_TY]]* [[S_ARR_CUR:%.+]]) +// CHECK: call void [[S_INT_TY_DEF_CONSTR]]([[S_INT_TY]]* frozen [[S_ARR_CUR:%.+]]) // CHECK: getelementptr inbounds [[S_INT_TY]], [[S_INT_TY]]* [[S_ARR_CUR]], i{{.+}} 1 // CHECK: icmp eq // CHECK: br i1 // var; // CHECK: [[PRIVATE_VAR_REF:%.+]] = getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 3 -// CHECK: call void [[S_INT_TY_DEF_CONSTR]]([[S_INT_TY]]* [[PRIVATE_VAR_REF:%.+]]) +// CHECK: call void [[S_INT_TY_DEF_CONSTR]]([[S_INT_TY]]* frozen [[PRIVATE_VAR_REF:%.+]]) // Provide pointer to destructor function, which will destroy private variables at the end of the task. // CHECK: [[DESTRUCTORS_REF:%.+]] = getelementptr inbounds [[KMP_TASK_T_TY]], [[KMP_TASK_T_TY]]* [[TASK]], i{{.+}} 0, i{{.+}} 3 @@ -316,7 +316,7 @@ // CHECK: ret // -// CHECK: define internal void [[PRIVATES_MAP_FN:@.+]]([[PRIVATES_TMAIN_TY]]* noalias %0, i32** noalias %1, [2 x i32]** noalias %2, [2 x [[S_INT_TY]]]** noalias %3, [[S_INT_TY]]** noalias %4) +// CHECK: define internal void [[PRIVATES_MAP_FN:@.+]]([[PRIVATES_TMAIN_TY]]* frozen noalias %0, i32** frozen noalias %1, [2 x i32]** frozen noalias %2, [2 x [[S_INT_TY]]]** frozen noalias %3, [[S_INT_TY]]** frozen noalias %4) // CHECK: [[PRIVATES:%.+]] = load [[PRIVATES_TMAIN_TY]]*, [[PRIVATES_TMAIN_TY]]** // CHECK: [[PRIV_T_VAR:%.+]] = getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i32 0, i32 0 // CHECK: [[ARG1:%.+]] = load i32**, i32*** %{{.+}}, @@ -332,7 +332,7 @@ // CHECK: store [[S_INT_TY]]* [[PRIV_VAR]], [[S_INT_TY]]** [[ARG4]], // CHECK: ret void -// CHECK: define internal i32 [[TASK_ENTRY]](i32 %0, [[KMP_TASK_TMAIN_TY]]* noalias %1) +// CHECK: define internal frozen i32 [[TASK_ENTRY]](i32 frozen %0, [[KMP_TASK_TMAIN_TY]]* frozen noalias %1) // CHECK: alloca i32*, // CHECK-DAG: [[PRIV_T_VAR_ADDR:%.+]] = alloca i32*, @@ -355,15 +355,15 @@ // CHECK: ret -// CHECK: define internal i32 [[DESTRUCTORS]](i32 %0, [[KMP_TASK_TMAIN_TY]]* noalias %1) +// CHECK: define internal frozen i32 [[DESTRUCTORS]](i32 frozen %0, [[KMP_TASK_TMAIN_TY]]* frozen noalias %1) // CHECK: [[PRIVATES:%.+]] = getelementptr inbounds [[KMP_TASK_TMAIN_TY]], [[KMP_TASK_TMAIN_TY]]* [[RES_KMP_TASK:%.+]], i{{[0-9]+}} 0, i{{[0-9]+}} 2 // CHECK: [[PRIVATE_S_ARR_REF:%.+]] = getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 2 // CHECK: [[PRIVATE_VAR_REF:%.+]] = getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 3 -// CHECK: call void [[S_INT_TY_DESTR]]([[S_INT_TY]]* [[PRIVATE_VAR_REF]]) +// CHECK: call void [[S_INT_TY_DESTR]]([[S_INT_TY]]* frozen [[PRIVATE_VAR_REF]]) // CHECK: getelementptr inbounds [2 x [[S_INT_TY]]], [2 x [[S_INT_TY]]]* [[PRIVATE_S_ARR_REF]], i{{.+}} 0, i{{.+}} 0 // CHECK: getelementptr inbounds [[S_INT_TY]], [[S_INT_TY]]* %{{.+}}, i{{.+}} 2 // CHECK: [[PRIVATE_S_ARR_ELEM_REF:%.+]] = getelementptr inbounds [[S_INT_TY]], [[S_INT_TY]]* %{{.+}}, i{{.+}} -1 -// CHECK: call void [[S_INT_TY_DESTR]]([[S_INT_TY]]* [[PRIVATE_S_ARR_ELEM_REF]]) +// CHECK: call void [[S_INT_TY_DESTR]]([[S_INT_TY]]* frozen [[PRIVATE_S_ARR_ELEM_REF]]) // CHECK: icmp eq // CHECK: br i1 // CHECK: ret i32 diff --git a/clang/test/OpenMP/taskgroup_task_reduction_codegen.cpp b/clang/test/OpenMP/taskgroup_task_reduction_codegen.cpp --- a/clang/test/OpenMP/taskgroup_task_reduction_codegen.cpp +++ b/clang/test/OpenMP/taskgroup_task_reduction_codegen.cpp @@ -165,54 +165,54 @@ // CHECK: call void @__kmpc_end_taskgroup(%struct.ident_t* {{[^,]+}}, i32 [[GTID]]) // CHECK: call void @__kmpc_end_taskgroup(%struct.ident_t* {{[^,]+}}, i32 [[GTID]]) -// CHECK-DAG: define internal void @[[AINIT]](i8* noalias %{{.+}}, i8* noalias %{{.+}}) +// CHECK-DAG: define internal void @[[AINIT]](i8* frozen noalias %{{.+}}, i8* frozen noalias %{{.+}}) // CHECK-DAG: store i32 0, i32* % // CHECK-DAG: ret void // CHECK-DAG: } -// CHECK-DAG: define internal void @[[ACOMB]](i8* %0, i8* %1) +// CHECK-DAG: define internal void @[[ACOMB]](i8* frozen %0, i8* frozen %1) // CHECK-DAG: add nsw i32 % // CHECK-DAG: store i32 % // CHECK-DAG: ret void // CHECK-DAG: } -// CHECK-DAG: define internal void @[[BINIT]](i8* noalias %{{.+}}, i8* noalias %{{.+}}) +// CHECK-DAG: define internal void @[[BINIT]](i8* frozen noalias %{{.+}}, i8* frozen noalias %{{.+}}) // CHECK-DAG: store float 0.000000e+00, float* % // CHECK-DAG: ret void // CHECK-DAG: } -// CHECK-DAG: define internal void @[[BCOMB]](i8* %0, i8* %1) +// CHECK-DAG: define internal void @[[BCOMB]](i8* frozen %0, i8* frozen %1) // CHECK-DAG: fadd float % // CHECK-DAG: store float % // CHECK-DAG: ret void // CHECK-DAG: } -// CHECK-DAG: define internal void @[[ARGCINIT]](i8* noalias %{{.+}}, i8* noalias %{{.+}}) +// CHECK-DAG: define internal void @[[ARGCINIT]](i8* frozen noalias %{{.+}}, i8* frozen noalias %{{.+}}) // CHECK-DAG: store i32 0, i32* % // CHECK-DAG: ret void // CHECK-DAG: } -// CHECK-DAG: define internal void @[[ARGCCOMB]](i8* %0, i8* %1) +// CHECK-DAG: define internal void @[[ARGCCOMB]](i8* frozen %0, i8* frozen %1) // CHECK-DAG: add nsw i32 % // CHECK-DAG: store i32 % // CHECK-DAG: ret void // CHECK-DAG: } -// CHECK-DAG: define internal void @[[CINIT]](i8* noalias %{{.+}}, i8* noalias %{{.+}}) +// CHECK-DAG: define internal void @[[CINIT]](i8* frozen noalias %{{.+}}, i8* frozen noalias %{{.+}}) // CHECK-DAG: phi %struct.S* [ // CHECK-DAG: call {{.+}}(%struct.S* {{.+}}) // CHECK-DAG: br i1 % // CHECK-DAG: ret void // CHECK-DAG: } -// CHECK-DAG: define internal void @[[CFINI]](i8* %0) +// CHECK-DAG: define internal void @[[CFINI]](i8* frozen %0) // CHECK-DAG: phi %struct.S* [ // CHECK-DAG: call {{.+}}(%struct.S* {{.+}}) // CHECK-DAG: br i1 % // CHECK-DAG: ret void // CHECK-DAG: } -// CHECK-DAG: define internal void @[[CCOMB]](i8* %0, i8* %1) +// CHECK-DAG: define internal void @[[CCOMB]](i8* frozen %0, i8* frozen %1) // CHECK-DAG: phi %struct.S* [ // CHECK-DAG: phi %struct.S* [ // CHECK-DAG: call {{.+}}(%struct.S* {{.+}}, %struct.S* {{.+}}, %struct.S* {{.+}}) @@ -222,7 +222,7 @@ // CHECK-DAG: ret void // CHECK_DAG: } -// CHECK-DAG: define internal void @[[VLAINIT]](i8* noalias %{{.+}}, i8* noalias %{{.+}}) +// CHECK-DAG: define internal void @[[VLAINIT]](i8* frozen noalias %{{.+}}, i8* frozen noalias %{{.+}}) // CHECK-DAG: call i32 @__kmpc_global_thread_num(%struct.ident_t* {{[^,]+}}) // CHECK-DAG: call i8* @__kmpc_threadprivate_cached(%struct.ident_t* // CHECK-DAG: phi i16* [ @@ -231,7 +231,7 @@ // CHECK-DAG: ret void // CHECK-DAG: } -// CHECK-DAG: define internal void @[[VLACOMB]](i8* %0, i8* %1) +// CHECK-DAG: define internal void @[[VLACOMB]](i8* frozen %0, i8* frozen %1) // CHECK-DAG: call i32 @__kmpc_global_thread_num(%struct.ident_t* {{[^,]+}}) // CHECK-DAG: call i8* @__kmpc_threadprivate_cached(%struct.ident_t* // CHECK-DAG: phi i16* [ diff --git a/clang/test/OpenMP/taskloop_codegen.cpp b/clang/test/OpenMP/taskloop_codegen.cpp --- a/clang/test/OpenMP/taskloop_codegen.cpp +++ b/clang/test/OpenMP/taskloop_codegen.cpp @@ -79,7 +79,7 @@ } } -// CHECK: define internal i32 [[TASK1]]( +// CHECK: define internal frozen i32 [[TASK1]]( // CHECK: [[DOWN:%.+]] = getelementptr inbounds [[TD_TY:%.+]], [[TD_TY]]* %{{.+}}, i32 0, i32 5 // CHECK: [[DOWN_VAL:%.+]] = load i64, i64* [[DOWN]], // CHECK: [[UP:%.+]] = getelementptr inbounds [[TD_TY]], [[TD_TY]]* %{{.+}}, i32 0, i32 6 @@ -109,7 +109,7 @@ // CHECK: br label % // CHECK: ret i32 0 -// CHECK: define internal i32 [[TASK2]]( +// CHECK: define internal frozen i32 [[TASK2]]( // CHECK: [[DOWN:%.+]] = getelementptr inbounds [[TD_TY:%.+]], [[TD_TY]]* %{{.+}}, i32 0, i32 5 // CHECK: [[DOWN_VAL:%.+]] = load i64, i64* [[DOWN]], // CHECK: [[UP:%.+]] = getelementptr inbounds [[TD_TY]], [[TD_TY]]* %{{.+}}, i32 0, i32 6 @@ -139,7 +139,7 @@ // CHECK: br label % // CHECK: ret i32 0 -// CHECK: define internal i32 [[TASK3]]( +// CHECK: define internal frozen i32 [[TASK3]]( // CHECK: [[DOWN:%.+]] = getelementptr inbounds [[TD_TY:%.+]], [[TD_TY]]* %{{.+}}, i32 0, i32 5 // CHECK: [[DOWN_VAL:%.+]] = load i64, i64* [[DOWN]], // CHECK: [[UP:%.+]] = getelementptr inbounds [[TD_TY]], [[TD_TY]]* %{{.+}}, i32 0, i32 6 @@ -157,7 +157,7 @@ // CHECK: br label // CHECK: ret i32 0 -// CHECK: define internal i32 [[TASK_CANCEL]]( +// CHECK: define internal frozen i32 [[TASK_CANCEL]]( // CHECK: [[RES:%.+]] = call i32 @__kmpc_cancel(%struct.ident_t* @{{.+}}, i32 %{{.+}}, i32 4) // CHECK: [[IS_CANCEL:%.+]] = icmp ne i32 [[RES]], 0 // CHECK: br i1 [[IS_CANCEL]], label %[[EXIT:.+]], label %[[CONTINUE:[^,]+]] @@ -199,7 +199,7 @@ } } s(1); -// CHECK: define internal i32 [[TASK4]]( +// CHECK: define internal frozen i32 [[TASK4]]( // CHECK: [[DOWN:%.+]] = getelementptr inbounds [[TD_TY:%.+]], [[TD_TY]]* %{{.+}}, i32 0, i32 5 // CHECK: [[DOWN_VAL:%.+]] = load i64, i64* [[DOWN]], // CHECK: [[UP:%.+]] = getelementptr inbounds [[TD_TY]], [[TD_TY]]* %{{.+}}, i32 0, i32 6 diff --git a/clang/test/OpenMP/taskloop_firstprivate_codegen.cpp b/clang/test/OpenMP/taskloop_firstprivate_codegen.cpp --- a/clang/test/OpenMP/taskloop_firstprivate_codegen.cpp +++ b/clang/test/OpenMP/taskloop_firstprivate_codegen.cpp @@ -78,7 +78,7 @@ // LAMBDA: ret #pragma omp taskloop firstprivate(g, sivar) for (int i = 0; i < 10; ++i) { - // LAMBDA: define {{.+}} void [[INNER_LAMBDA:@.+]](%{{.+}}* [[ARG_PTR:%.+]]) + // LAMBDA: define {{.+}} void [[INNER_LAMBDA:@.+]](%{{.+}}* frozen [[ARG_PTR:%.+]]) // LAMBDA: store %{{.+}}* [[ARG_PTR]], %{{.+}}** [[ARG_PTR_REF:%.+]], // LAMBDA: [[ARG_PTR:%.+]] = load %{{.+}}*, %{{.+}}** [[ARG_PTR_REF]] // LAMBDA: [[G_PTR_REF:%.+]] = getelementptr inbounds %{{.+}}, %{{.+}}* [[ARG_PTR]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 @@ -86,7 +86,7 @@ // LAMBDA: store volatile double 2.0{{.+}}, double* [[G_REF]] // LAMBDA: store double* %{{.+}}, double** %{{.+}}, - // LAMBDA: define internal i32 [[TASK_ENTRY]](i32 %0, %{{.+}}* noalias %1) + // LAMBDA: define internal frozen i32 [[TASK_ENTRY]](i32 frozen %0, %{{.+}}* frozen noalias %1) g = 1; sivar = 11; // LAMBDA: store double 1.0{{.+}}, double* %{{.+}}, @@ -130,7 +130,7 @@ // BLOCKS: store double* %{{.+}}, double** %{{.+}}, // BLOCKS: store i{{[0-9]+}}* %{{.+}}, i{{[0-9]+}}** %{{.+}}, - // BLOCKS: define internal i32 [[TASK_ENTRY]](i32 %0, %{{.+}}* noalias %1) + // BLOCKS: define internal frozen i32 [[TASK_ENTRY]](i32 frozen %0, %{{.+}}* frozen noalias %1) g = 1; sivar = 11; // BLOCKS: store double 1.0{{.+}}, double* %{{.+}}, @@ -163,7 +163,7 @@ } // CHECK: [[SIVAR:.+]] = internal global i{{[0-9]+}} 0, -// CHECK: define i{{[0-9]+}} @main() +// CHECK: define frozen i{{[0-9]+}} @main() // CHECK: alloca [[S_DOUBLE_TY]], // CHECK: [[TEST:%.+]] = alloca [[S_DOUBLE_TY]], // CHECK: [[T_VAR_ADDR:%.+]] = alloca i32, @@ -172,7 +172,7 @@ // CHECK: [[VAR_ADDR:%.+]] = alloca [[S_DOUBLE_TY]], // CHECK: [[GTID:%.+]] = call i32 @__kmpc_global_thread_num([[LOC:%.+]]) -// CHECK: call {{.*}} [[S_DOUBLE_TY_COPY_CONSTR:@.+]]([[S_DOUBLE_TY]]* [[TEST]], +// CHECK: call {{.*}} [[S_DOUBLE_TY_COPY_CONSTR:@.+]]([[S_DOUBLE_TY]]* frozen [[TEST]] // Store original variables in capture struct. // CHECK: [[S_ARR_REF:%.+]] = getelementptr inbounds [[CAP_MAIN_TY]], [[CAP_MAIN_TY]]* %{{.+}}, i{{[0-9]+}} 0, i{{[0-9]+}} 0 @@ -203,7 +203,7 @@ // s_arr; // CHECK: [[PRIVATE_S_ARR_REF:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 // CHECK: bitcast [2 x [[S_DOUBLE_TY]]]* %{{.+}} to [[S_DOUBLE_TY]]* -// CHECK: call void [[S_DOUBLE_TY_COPY_CONSTR]]([[S_DOUBLE_TY]]* [[S_ARR_CUR:%[^,]+]], +// CHECK: call void [[S_DOUBLE_TY_COPY_CONSTR]]([[S_DOUBLE_TY]]* frozen [[S_ARR_CUR:%[^,]+]] // CHECK: getelementptr [[S_DOUBLE_TY]], [[S_DOUBLE_TY]]* [[S_ARR_CUR]], i{{.+}} 1 // CHECK: getelementptr [[S_DOUBLE_TY]], [[S_DOUBLE_TY]]* %{{.+}}, i{{.+}} 1 // CHECK: icmp eq @@ -211,7 +211,7 @@ // var; // CHECK: [[PRIVATE_VAR_REF:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 1 -// CHECK-NEXT: call void [[S_DOUBLE_TY_COPY_CONSTR]]([[S_DOUBLE_TY]]* [[PRIVATE_VAR_REF]], [[S_DOUBLE_TY]]* {{.*}}, +// CHECK-NEXT: call void [[S_DOUBLE_TY_COPY_CONSTR]]([[S_DOUBLE_TY]]* frozen [[PRIVATE_VAR_REF]], [[S_DOUBLE_TY]]* {{.*}} // t_var; // CHECK: [[PRIVATE_T_VAR_REF:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 2 @@ -237,7 +237,7 @@ // Start task. // CHECK: call void @__kmpc_taskloop([[LOC]], i32 [[GTID]], i8* [[RES]], i32 1, i64* %{{.+}}, i64* %{{.+}}, i64 %{{.+}}, i32 1, i32 0, i64 0, i8* bitcast (void ([[KMP_TASK_MAIN_TY]]*, [[KMP_TASK_MAIN_TY]]*, i32)* [[MAIN_DUP:@.+]] to i8*)) -// CHECK: = call i{{.+}} [[TMAIN_INT:@.+]]() +// CHECK: = call frozen i{{.+}} [[TMAIN_INT:@.+]]() // No destructors must be called for private copies of s_arr and var. // CHECK-NOT: getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 2 @@ -248,7 +248,7 @@ // CHECK: ret // -// CHECK: define internal void [[PRIVATES_MAP_FN:@.+]]([[PRIVATES_MAIN_TY]]* noalias %0, [[S_DOUBLE_TY]]** noalias %1, i32** noalias %2, [2 x [[S_DOUBLE_TY]]]** noalias %3, [2 x i32]** noalias %4, i32** noalias %5) +// CHECK: define internal void [[PRIVATES_MAP_FN:@.+]]([[PRIVATES_MAIN_TY]]* frozen noalias %0, [[S_DOUBLE_TY]]** frozen noalias %1, i32** frozen noalias %2, [2 x [[S_DOUBLE_TY]]]** frozen noalias %3, [2 x i32]** frozen noalias %4, i32** frozen noalias %5) // CHECK: [[PRIVATES:%.+]] = load [[PRIVATES_MAIN_TY]]*, [[PRIVATES_MAIN_TY]]** // CHECK: [[PRIV_S_VAR:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i32 0, i32 0 // CHECK: [[ARG3:%.+]] = load [2 x [[S_DOUBLE_TY]]]**, [2 x [[S_DOUBLE_TY]]]*** %{{.+}}, @@ -267,7 +267,7 @@ // CHECK: store i{{[0-9]+}}* [[PRIV_SIVAR]], i{{[0-9]+}}** [[ARG5]], // CHECK: ret void -// CHECK: define internal i32 [[TASK_ENTRY]](i32 %0, [[KMP_TASK_MAIN_TY]]* noalias %1) +// CHECK: define internal frozen i32 [[TASK_ENTRY]](i32 frozen %0, [[KMP_TASK_MAIN_TY]]* frozen noalias %1) // CHECK: [[PRIV_VAR_ADDR:%.+]] = alloca [[S_DOUBLE_TY]]*, // CHECK: [[PRIV_T_VAR_ADDR:%.+]] = alloca i32*, @@ -294,7 +294,7 @@ // CHECK: ret -// CHECK: define internal void [[MAIN_DUP]]([[KMP_TASK_MAIN_TY]]* %0, [[KMP_TASK_MAIN_TY]]* %1, i32 %2) +// CHECK: define internal void [[MAIN_DUP]]([[KMP_TASK_MAIN_TY]]* frozen %0, [[KMP_TASK_MAIN_TY]]* frozen %1, i32 frozen %2) // CHECK: getelementptr inbounds [[KMP_TASK_MAIN_TY]], [[KMP_TASK_MAIN_TY]]* %{{.+}}, i32 0, i32 1 // CHECK: getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* %{{.+}}, i32 0, i32 0 // CHECK: getelementptr inbounds [2 x [[S_DOUBLE_TY]]], [2 x [[S_DOUBLE_TY]]]* %{{.+}}, i32 0, i32 0 @@ -311,15 +311,15 @@ // CHECK: call {{.*}} [[S_DOUBLE_TY_COPY_CONSTR]]([[S_DOUBLE_TY]]* // CHECK: ret void -// CHECK: define internal i32 [[DESTRUCTORS]](i32 %0, [[KMP_TASK_MAIN_TY]]* noalias %1) +// CHECK: define internal frozen i32 [[DESTRUCTORS]](i32 frozen %0, [[KMP_TASK_MAIN_TY]]* frozen noalias %1) // CHECK: [[PRIVATES:%.+]] = getelementptr inbounds [[KMP_TASK_MAIN_TY]], [[KMP_TASK_MAIN_TY]]* [[RES_KMP_TASK:%.+]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 // CHECK: [[PRIVATE_S_ARR_REF:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 0 // CHECK: [[PRIVATE_VAR_REF:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 1 -// CHECK: call void [[S_DOUBLE_TY_DESTR]]([[S_DOUBLE_TY]]* [[PRIVATE_VAR_REF]]) +// CHECK: call void [[S_DOUBLE_TY_DESTR]]([[S_DOUBLE_TY]]* frozen [[PRIVATE_VAR_REF]]) // CHECK: getelementptr inbounds [2 x [[S_DOUBLE_TY]]], [2 x [[S_DOUBLE_TY]]]* [[PRIVATE_S_ARR_REF]], i{{.+}} 0, i{{.+}} 0 // CHECK: getelementptr inbounds [[S_DOUBLE_TY]], [[S_DOUBLE_TY]]* %{{.+}}, i{{.+}} 2 // CHECK: [[PRIVATE_S_ARR_ELEM_REF:%.+]] = getelementptr inbounds [[S_DOUBLE_TY]], [[S_DOUBLE_TY]]* %{{.+}}, i{{.+}} -1 -// CHECK: call void [[S_DOUBLE_TY_DESTR]]([[S_DOUBLE_TY]]* [[PRIVATE_S_ARR_ELEM_REF]]) +// CHECK: call void [[S_DOUBLE_TY_DESTR]]([[S_DOUBLE_TY]]* frozen [[PRIVATE_S_ARR_ELEM_REF]]) // CHECK: icmp eq // CHECK: br i1 // CHECK: ret i32 @@ -333,7 +333,7 @@ // CHECK: [[VAR_ADDR:%.+]] = alloca [[S_INT_TY]], // CHECK: [[GTID:%.+]] = call i32 @__kmpc_global_thread_num([[LOC:%.+]]) -// CHECK: call {{.*}} [[S_INT_TY_COPY_CONSTR:@.+]]([[S_INT_TY]]* [[TEST]], +// CHECK: call {{.*}} [[S_INT_TY_COPY_CONSTR:@.+]]([[S_INT_TY]]* frozen [[TEST]] // Store original variables in capture struct. // CHECK: [[S_ARR_REF:%.+]] = getelementptr inbounds [[CAP_TMAIN_TY]], [[CAP_TMAIN_TY]]* %{{.+}}, i{{[0-9]+}} 0, i{{[0-9]+}} 0 @@ -376,14 +376,14 @@ // CHECK: getelementptr inbounds [2 x [[S_INT_TY]]], [2 x [[S_INT_TY]]]* [[PRIVATE_S_ARR_REF]], i{{.+}} 0, i{{.+}} 0 // CHECK: bitcast [2 x [[S_INT_TY]]]* %{{.+}} to [[S_INT_TY]]* // CHECK: getelementptr [[S_INT_TY]], [[S_INT_TY]]* %{{.+}}, i{{.+}} 2 -// CHECK: call void [[S_INT_TY_COPY_CONSTR]]([[S_INT_TY]]* [[S_ARR_CUR:%[^,]+]], +// CHECK: call void [[S_INT_TY_COPY_CONSTR]]([[S_INT_TY]]* frozen [[S_ARR_CUR:%[^,]+]] // CHECK: getelementptr [[S_INT_TY]], [[S_INT_TY]]* [[S_ARR_CUR]], i{{.+}} 1 // CHECK: icmp eq // CHECK: br i1 // var; // CHECK: [[PRIVATE_VAR_REF:%.+]] = getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 3 -// CHECK-NEXT: call void [[S_INT_TY_COPY_CONSTR]]([[S_INT_TY]]* [[PRIVATE_VAR_REF]], +// CHECK-NEXT: call void [[S_INT_TY_COPY_CONSTR]]([[S_INT_TY]]* frozen [[PRIVATE_VAR_REF]] // Provide pointer to destructor function, which will destroy private variables at the end of the task. // CHECK: [[DESTRUCTORS_REF:%.+]] = getelementptr inbounds [[KMP_TASK_T_TY]], [[KMP_TASK_T_TY]]* [[TASK]], i{{.+}} 0, i{{.+}} 3 @@ -402,7 +402,7 @@ // CHECK: ret // -// CHECK: define internal void [[PRIVATES_MAP_FN:@.+]]([[PRIVATES_TMAIN_TY]]* noalias %0, i32** noalias %1, [2 x i32]** noalias %2, [2 x [[S_INT_TY]]]** noalias %3, [[S_INT_TY]]** noalias %4) +// CHECK: define internal void [[PRIVATES_MAP_FN:@.+]]([[PRIVATES_TMAIN_TY]]* frozen noalias %0, i32** frozen noalias %1, [2 x i32]** frozen noalias %2, [2 x [[S_INT_TY]]]** frozen noalias %3, [[S_INT_TY]]** frozen noalias %4) // CHECK: [[PRIVATES:%.+]] = load [[PRIVATES_TMAIN_TY]]*, [[PRIVATES_TMAIN_TY]]** // CHECK: [[PRIV_T_VAR:%.+]] = getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i32 0, i32 0 // CHECK: [[ARG1:%.+]] = load i32**, i32*** %{{.+}}, @@ -418,7 +418,7 @@ // CHECK: store [[S_INT_TY]]* [[PRIV_VAR]], [[S_INT_TY]]** [[ARG4]], // CHECK: ret void -// CHECK: define internal i32 [[TASK_ENTRY]](i32 %0, [[KMP_TASK_TMAIN_TY]]* noalias %1) +// CHECK: define internal frozen i32 [[TASK_ENTRY]](i32 frozen %0, [[KMP_TASK_TMAIN_TY]]* frozen noalias %1) // CHECK: alloca i32*, // CHECK-DAG: [[PRIV_T_VAR_ADDR:%.+]] = alloca i32*, // CHECK-DAG: [[PRIV_VEC_ADDR:%.+]] = alloca [2 x i32]*, @@ -440,7 +440,7 @@ // CHECK: ret -// CHECK: define internal void [[TMAIN_DUP]]([[KMP_TASK_TMAIN_TY]]* %0, [[KMP_TASK_TMAIN_TY]]* %1, i32 %2) +// CHECK: define internal void [[TMAIN_DUP]]([[KMP_TASK_TMAIN_TY]]* frozen %0, [[KMP_TASK_TMAIN_TY]]* frozen %1, i32 frozen %2) // CHECK: getelementptr inbounds [[KMP_TASK_TMAIN_TY]], [[KMP_TASK_TMAIN_TY]]* %{{.+}}, i32 0, i32 2 // CHECK: getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* %{{.+}}, i32 0, i32 2 // CHECK: getelementptr inbounds [2 x [[S_INT_TY]]], [2 x [[S_INT_TY]]]* %{{.+}}, i32 0, i32 0 @@ -457,15 +457,15 @@ // CHECK: call {{.*}} [[S_INT_TY_COPY_CONSTR]]([[S_INT_TY]]* // CHECK: ret void -// CHECK: define internal i32 [[DESTRUCTORS]](i32 %0, [[KMP_TASK_TMAIN_TY]]* noalias %1) +// CHECK: define internal frozen i32 [[DESTRUCTORS]](i32 frozen %0, [[KMP_TASK_TMAIN_TY]]* frozen noalias %1) // CHECK: [[PRIVATES:%.+]] = getelementptr inbounds [[KMP_TASK_TMAIN_TY]], [[KMP_TASK_TMAIN_TY]]* [[RES_KMP_TASK:%.+]], i{{[0-9]+}} 0, i{{[0-9]+}} 2 // CHECK: [[PRIVATE_S_ARR_REF:%.+]] = getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 2 // CHECK: [[PRIVATE_VAR_REF:%.+]] = getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 3 -// CHECK: call void [[S_INT_TY_DESTR]]([[S_INT_TY]]* [[PRIVATE_VAR_REF]]) +// CHECK: call void [[S_INT_TY_DESTR]]([[S_INT_TY]]* frozen [[PRIVATE_VAR_REF]]) // CHECK: getelementptr inbounds [2 x [[S_INT_TY]]], [2 x [[S_INT_TY]]]* [[PRIVATE_S_ARR_REF]], i{{.+}} 0, i{{.+}} 0 // CHECK: getelementptr inbounds [[S_INT_TY]], [[S_INT_TY]]* %{{.+}}, i{{.+}} 2 // CHECK: [[PRIVATE_S_ARR_ELEM_REF:%.+]] = getelementptr inbounds [[S_INT_TY]], [[S_INT_TY]]* %{{.+}}, i{{.+}} -1 -// CHECK: call void [[S_INT_TY_DESTR]]([[S_INT_TY]]* [[PRIVATE_S_ARR_ELEM_REF]]) +// CHECK: call void [[S_INT_TY_DESTR]]([[S_INT_TY]]* frozen [[PRIVATE_S_ARR_ELEM_REF]]) // CHECK: icmp eq // CHECK: br i1 // CHECK: ret i32 diff --git a/clang/test/OpenMP/taskloop_lastprivate_codegen.cpp b/clang/test/OpenMP/taskloop_lastprivate_codegen.cpp --- a/clang/test/OpenMP/taskloop_lastprivate_codegen.cpp +++ b/clang/test/OpenMP/taskloop_lastprivate_codegen.cpp @@ -73,7 +73,7 @@ // LAMBDA: ret #pragma omp taskloop lastprivate(g, sivar) for (int i = 0; i < 10; ++i) { - // LAMBDA: define {{.+}} void [[INNER_LAMBDA:@.+]](%{{.+}}* [[ARG_PTR:%.+]]) + // LAMBDA: define {{.+}} void [[INNER_LAMBDA:@.+]](%{{.+}}* frozen [[ARG_PTR:%.+]]) // LAMBDA: store %{{.+}}* [[ARG_PTR]], %{{.+}}** [[ARG_PTR_REF:%.+]], // LAMBDA: [[ARG_PTR:%.+]] = load %{{.+}}*, %{{.+}}** [[ARG_PTR_REF]] // LAMBDA: [[G_PTR_REF:%.+]] = getelementptr inbounds %{{.+}}, %{{.+}}* [[ARG_PTR]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 @@ -81,7 +81,7 @@ // LAMBDA: store double 2.0{{.+}}, double* [[G_REF]] // LAMBDA: store double* %{{.+}}, double** %{{.+}}, - // LAMBDA: define internal i32 [[TASK_ENTRY]](i32 %0, %{{.+}}* noalias %1) + // LAMBDA: define internal frozen i32 [[TASK_ENTRY]](i32 frozen %0, %{{.+}}* frozen noalias %1) g = 1; sivar = 11; // LAMBDA: store double 1.0{{.+}}, double* %{{.+}}, @@ -124,7 +124,7 @@ // BLOCKS: store double* %{{.+}}, double** %{{.+}}, // BLOCKS: store i{{[0-9]+}}* %{{.+}}, i{{[0-9]+}}** %{{.+}}, - // BLOCKS: define internal i32 [[TASK_ENTRY]](i32 %0, %{{.+}}* noalias %1) + // BLOCKS: define internal frozen i32 [[TASK_ENTRY]](i32 frozen %0, %{{.+}}* frozen noalias %1) g = 1; sivar = 11; // BLOCKS: store double 1.0{{.+}}, double* %{{.+}}, @@ -163,7 +163,7 @@ } // CHECK: [[SIVAR:.+]] = internal global i{{[0-9]+}} 0, -// CHECK: define i{{[0-9]+}} @main() +// CHECK: define frozen i{{[0-9]+}} @main() // CHECK: alloca [[S_DOUBLE_TY]], // CHECK: [[TEST:%.+]] = alloca [[S_DOUBLE_TY]], // CHECK: [[T_VAR_ADDR:%.+]] = alloca i32, @@ -172,7 +172,7 @@ // CHECK: [[VAR_ADDR:%.+]] = alloca [[S_DOUBLE_TY]], // CHECK: [[GTID:%.+]] = call i32 @__kmpc_global_thread_num([[LOC:%.+]]) -// CHECK: call {{.*}} [[S_DOUBLE_TY_CONSTR:@.+]]([[S_DOUBLE_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_DOUBLE_TY_CONSTR:@.+]]([[S_DOUBLE_TY]]* frozen [[TEST]]) // Store original variables in capture struct. // CHECK: [[VEC_REF:%.+]] = getelementptr inbounds [[CAP_MAIN_TY]], [[CAP_MAIN_TY]]* %{{.+}}, i{{[0-9]+}} 0, i{{[0-9]+}} 0 @@ -208,14 +208,14 @@ // Constructors for s_arr and var. // s_arr; // CHECK: [[PRIVATE_S_ARR_REF:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 -// CHECK: call {{.*}} [[S_DOUBLE_TY_CONSTR]]([[S_DOUBLE_TY]]* [[S_ARR_CUR:%[^,]+]]) +// CHECK: call {{.*}} [[S_DOUBLE_TY_CONSTR]]([[S_DOUBLE_TY]]* frozen [[S_ARR_CUR:%[^,]+]]) // CHECK: getelementptr inbounds [[S_DOUBLE_TY]], [[S_DOUBLE_TY]]* [[S_ARR_CUR]], i{{.+}} 1 // CHECK: icmp eq // CHECK: br i1 // var; // CHECK: [[PRIVATE_VAR_REF:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 1 -// CHECK: call {{.*}} [[S_DOUBLE_TY_CONSTR]]([[S_DOUBLE_TY]]* [[PRIVATE_VAR_REF]]) +// CHECK: call {{.*}} [[S_DOUBLE_TY_CONSTR]]([[S_DOUBLE_TY]]* frozen [[PRIVATE_VAR_REF]]) // t_var; // vec; @@ -229,7 +229,7 @@ // Start task. // CHECK: call void @__kmpc_taskloop([[LOC]], i32 [[GTID]], i8* [[RES]], i32 1, i64* %{{.+}}, i64* %{{.+}}, i64 %{{.+}}, i32 1, i32 0, i64 0, i8* bitcast (void ([[KMP_TASK_MAIN_TY]]*, [[KMP_TASK_MAIN_TY]]*, i32)* [[MAIN_DUP:@.+]] to i8*)) -// CHECK: = call i{{.+}} [[TMAIN_INT:@.+]]() +// CHECK: = call frozen i{{.+}} [[TMAIN_INT:@.+]]() // No destructors must be called for private copies of s_arr and var. // CHECK-NOT: getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 2 @@ -240,7 +240,7 @@ // CHECK: ret // -// CHECK: define internal void [[PRIVATES_MAP_FN:@.+]]([[PRIVATES_MAIN_TY]]* noalias %0, [[S_DOUBLE_TY]]** noalias %1, i32** noalias %2, [2 x [[S_DOUBLE_TY]]]** noalias %3, [2 x i32]** noalias %4, i32** noalias %5) +// CHECK: define internal void [[PRIVATES_MAP_FN:@.+]]([[PRIVATES_MAIN_TY]]* frozen noalias %0, [[S_DOUBLE_TY]]** frozen noalias %1, i32** frozen noalias %2, [2 x [[S_DOUBLE_TY]]]** frozen noalias %3, [2 x i32]** frozen noalias %4, i32** frozen noalias %5) // CHECK: [[PRIVATES:%.+]] = load [[PRIVATES_MAIN_TY]]*, [[PRIVATES_MAIN_TY]]** // CHECK: [[PRIV_S_VAR:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i32 0, i32 0 // CHECK: [[ARG3:%.+]] = load [2 x [[S_DOUBLE_TY]]]**, [2 x [[S_DOUBLE_TY]]]*** %{{.+}}, @@ -259,7 +259,7 @@ // CHECK: store i{{[0-9]+}}* [[PRIV_SIVAR]], i{{[0-9]+}}** [[ARG5]], // CHECK: ret void -// CHECK: define internal i32 [[TASK_ENTRY]](i32 %0, [[KMP_TASK_MAIN_TY]]* noalias %1) +// CHECK: define internal frozen i32 [[TASK_ENTRY]](i32 frozen %0, [[KMP_TASK_MAIN_TY]]* frozen noalias %1) // CHECK: [[PRIV_VAR_ADDR:%.+]] = alloca [[S_DOUBLE_TY]]*, // CHECK: [[PRIV_T_VAR_ADDR:%.+]] = alloca i32*, @@ -305,7 +305,7 @@ // CHECK: br label // CHECK: ret -// CHECK: define internal void [[MAIN_DUP]]([[KMP_TASK_MAIN_TY]]* %0, [[KMP_TASK_MAIN_TY]]* %1, i32 %2) +// CHECK: define internal void [[MAIN_DUP]]([[KMP_TASK_MAIN_TY]]* frozen %0, [[KMP_TASK_MAIN_TY]]* frozen %1, i32 frozen %2) // CHECK: getelementptr inbounds [[KMP_TASK_MAIN_TY]], [[KMP_TASK_MAIN_TY]]* %{{.+}}, i32 0, i32 0 // CHECK: getelementptr inbounds [[KMP_TASK_T_TY]], [[KMP_TASK_T_TY]]* %{{.+}}, i32 0, i32 8 // CHECK: load i32, i32* % @@ -326,15 +326,15 @@ // CHECK: call {{.*}} [[S_DOUBLE_TY_CONSTR]]([[S_DOUBLE_TY]]* // CHECK: ret void -// CHECK: define internal i32 [[DESTRUCTORS]](i32 %0, [[KMP_TASK_MAIN_TY]]* noalias %1) +// CHECK: define internal frozen i32 [[DESTRUCTORS]](i32 frozen %0, [[KMP_TASK_MAIN_TY]]* frozen noalias %1) // CHECK: [[PRIVATES:%.+]] = getelementptr inbounds [[KMP_TASK_MAIN_TY]], [[KMP_TASK_MAIN_TY]]* [[RES_KMP_TASK:%.+]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 // CHECK: [[PRIVATE_S_ARR_REF:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 0 // CHECK: [[PRIVATE_VAR_REF:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 1 -// CHECK: call {{.*}} [[S_DOUBLE_TY_DESTR]]([[S_DOUBLE_TY]]* [[PRIVATE_VAR_REF]]) +// CHECK: call {{.*}} [[S_DOUBLE_TY_DESTR]]([[S_DOUBLE_TY]]* frozen [[PRIVATE_VAR_REF]]) // CHECK: getelementptr inbounds [2 x [[S_DOUBLE_TY]]], [2 x [[S_DOUBLE_TY]]]* [[PRIVATE_S_ARR_REF]], i{{.+}} 0, i{{.+}} 0 // CHECK: getelementptr inbounds [[S_DOUBLE_TY]], [[S_DOUBLE_TY]]* %{{.+}}, i{{.+}} 2 // CHECK: [[PRIVATE_S_ARR_ELEM_REF:%.+]] = getelementptr inbounds [[S_DOUBLE_TY]], [[S_DOUBLE_TY]]* %{{.+}}, i{{.+}} -1 -// CHECK: call {{.*}} [[S_DOUBLE_TY_DESTR]]([[S_DOUBLE_TY]]* [[PRIVATE_S_ARR_ELEM_REF]]) +// CHECK: call {{.*}} [[S_DOUBLE_TY_DESTR]]([[S_DOUBLE_TY]]* frozen [[PRIVATE_S_ARR_ELEM_REF]]) // CHECK: icmp eq // CHECK: br i1 // CHECK: ret i32 @@ -348,7 +348,7 @@ // CHECK: [[VAR_ADDR:%.+]] = alloca [[S_INT_TY]], // CHECK: [[GTID:%.+]] = call i32 @__kmpc_global_thread_num([[LOC:%.+]]) -// CHECK: call {{.*}} [[S_INT_TY_CONSTR:@.+]]([[S_INT_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_INT_TY_CONSTR:@.+]]([[S_INT_TY]]* frozen [[TEST]]) // Store original variables in capture struct. // CHECK: [[VEC_REF:%.+]] = getelementptr inbounds [[CAP_TMAIN_TY]], [[CAP_TMAIN_TY]]* %{{.+}}, i{{[0-9]+}} 0, i{{[0-9]+}} 0 @@ -386,14 +386,14 @@ // CHECK: [[PRIVATE_S_ARR_REF:%.+]] = getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i{{[0-9]+}} 0, i{{[0-9]+}} 2 // CHECK: getelementptr inbounds [2 x [[S_INT_TY]]], [2 x [[S_INT_TY]]]* [[PRIVATE_S_ARR_REF]], i{{.+}} 0, i{{.+}} 0 // CHECK: getelementptr inbounds [[S_INT_TY]], [[S_INT_TY]]* %{{.+}}, i{{.+}} 2 -// CHECK: call {{.*}} [[S_INT_TY_CONSTR]]([[S_INT_TY]]* [[S_ARR_CUR:%[^,]+]]) +// CHECK: call {{.*}} [[S_INT_TY_CONSTR]]([[S_INT_TY]]* frozen [[S_ARR_CUR:%[^,]+]]) // CHECK: getelementptr inbounds [[S_INT_TY]], [[S_INT_TY]]* [[S_ARR_CUR]], i{{.+}} 1 // CHECK: icmp eq // CHECK: br i1 // var; // CHECK: [[PRIVATE_VAR_REF:%.+]] = getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 3 -// CHECK: call {{.*}} [[S_INT_TY_CONSTR]]([[S_INT_TY]]* [[PRIVATE_VAR_REF]]) +// CHECK: call {{.*}} [[S_INT_TY_CONSTR]]([[S_INT_TY]]* frozen [[PRIVATE_VAR_REF]]) // Provide pointer to destructor function, which will destroy private variables at the end of the task. // CHECK: [[DESTRUCTORS_REF:%.+]] = getelementptr inbounds [[KMP_TASK_T_TY]], [[KMP_TASK_T_TY]]* [[TASK]], i{{.+}} 0, i{{.+}} 3 @@ -412,7 +412,7 @@ // CHECK: ret // -// CHECK: define internal void [[PRIVATES_MAP_FN:@.+]]([[PRIVATES_TMAIN_TY]]* noalias %0, i32** noalias %1, [2 x i32]** noalias %2, [2 x [[S_INT_TY]]]** noalias %3, [[S_INT_TY]]** noalias %4) +// CHECK: define internal void [[PRIVATES_MAP_FN:@.+]]([[PRIVATES_TMAIN_TY]]* frozen noalias %0, i32** frozen noalias %1, [2 x i32]** frozen noalias %2, [2 x [[S_INT_TY]]]** frozen noalias %3, [[S_INT_TY]]** frozen noalias %4) // CHECK: [[PRIVATES:%.+]] = load [[PRIVATES_TMAIN_TY]]*, [[PRIVATES_TMAIN_TY]]** // CHECK: [[PRIV_T_VAR:%.+]] = getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i32 0, i32 0 // CHECK: [[ARG1:%.+]] = load i32**, i32*** %{{.+}}, @@ -428,7 +428,7 @@ // CHECK: store [[S_INT_TY]]* [[PRIV_VAR]], [[S_INT_TY]]** [[ARG4]], // CHECK: ret void -// CHECK: define internal i32 [[TASK_ENTRY]](i32 %0, [[KMP_TASK_TMAIN_TY]]* noalias %1) +// CHECK: define internal frozen i32 [[TASK_ENTRY]](i32 frozen %0, [[KMP_TASK_TMAIN_TY]]* frozen noalias %1) // CHECK: alloca i32*, // CHECK-DAG: [[PRIV_T_VAR_ADDR:%.+]] = alloca i32*, // CHECK-DAG: [[PRIV_VEC_ADDR:%.+]] = alloca [2 x i32]*, @@ -467,7 +467,7 @@ // CHECK: br label // CHECK: ret -// CHECK: define internal void [[TMAIN_DUP]]([[KMP_TASK_TMAIN_TY]]* %0, [[KMP_TASK_TMAIN_TY]]* %1, i32 %2) +// CHECK: define internal void [[TMAIN_DUP]]([[KMP_TASK_TMAIN_TY]]* frozen %0, [[KMP_TASK_TMAIN_TY]]* frozen %1, i32 frozen %2) // CHECK: getelementptr inbounds [[KMP_TASK_TMAIN_TY]], [[KMP_TASK_TMAIN_TY]]* %{{.+}}, i32 0, i32 0 // CHECK: getelementptr inbounds [[KMP_TASK_T_TY]], [[KMP_TASK_T_TY]]* %{{.+}}, i32 0, i32 8 // CHECK: load i32, i32* % @@ -488,15 +488,15 @@ // CHECK: call {{.*}} [[S_INT_TY_CONSTR]]([[S_INT_TY]]* // CHECK: ret void -// CHECK: define internal i32 [[DESTRUCTORS]](i32 %0, [[KMP_TASK_TMAIN_TY]]* noalias %1) +// CHECK: define internal frozen i32 [[DESTRUCTORS]](i32 frozen %0, [[KMP_TASK_TMAIN_TY]]* frozen noalias %1) // CHECK: [[PRIVATES:%.+]] = getelementptr inbounds [[KMP_TASK_TMAIN_TY]], [[KMP_TASK_TMAIN_TY]]* [[RES_KMP_TASK:%.+]], i{{[0-9]+}} 0, i{{[0-9]+}} 2 // CHECK: [[PRIVATE_S_ARR_REF:%.+]] = getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 2 // CHECK: [[PRIVATE_VAR_REF:%.+]] = getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 3 -// CHECK: call void [[S_INT_TY_DESTR]]([[S_INT_TY]]* [[PRIVATE_VAR_REF]]) +// CHECK: call void [[S_INT_TY_DESTR]]([[S_INT_TY]]* frozen [[PRIVATE_VAR_REF]]) // CHECK: getelementptr inbounds [2 x [[S_INT_TY]]], [2 x [[S_INT_TY]]]* [[PRIVATE_S_ARR_REF]], i{{.+}} 0, i{{.+}} 0 // CHECK: getelementptr inbounds [[S_INT_TY]], [[S_INT_TY]]* %{{.+}}, i{{.+}} 2 // CHECK: [[PRIVATE_S_ARR_ELEM_REF:%.+]] = getelementptr inbounds [[S_INT_TY]], [[S_INT_TY]]* %{{.+}}, i{{.+}} -1 -// CHECK: call void [[S_INT_TY_DESTR]]([[S_INT_TY]]* [[PRIVATE_S_ARR_ELEM_REF]]) +// CHECK: call void [[S_INT_TY_DESTR]]([[S_INT_TY]]* frozen [[PRIVATE_S_ARR_ELEM_REF]]) // CHECK: icmp eq // CHECK: br i1 // CHECK: ret i32 diff --git a/clang/test/OpenMP/taskloop_loop_messages.cpp b/clang/test/OpenMP/taskloop_loop_messages.cpp --- a/clang/test/OpenMP/taskloop_loop_messages.cpp +++ b/clang/test/OpenMP/taskloop_loop_messages.cpp @@ -177,7 +177,7 @@ c[ii] = a[ii]; #pragma omp parallel -// Ok but undefined behavior (in general, cannot check that incr +// Ok but undefined behavior (in frozen general, cannot check incr that // is really loop-invariant). #pragma omp taskloop for (ii = 0; ii < 10; ii = ii + ii) diff --git a/clang/test/OpenMP/taskloop_private_codegen.cpp b/clang/test/OpenMP/taskloop_private_codegen.cpp --- a/clang/test/OpenMP/taskloop_private_codegen.cpp +++ b/clang/test/OpenMP/taskloop_private_codegen.cpp @@ -67,7 +67,7 @@ // LAMBDA: ret #pragma omp taskloop private(g, sivar) for (int i = 0; i < 10; ++i) { - // LAMBDA: define {{.+}} void [[INNER_LAMBDA:@.+]](%{{.+}}* [[ARG_PTR:%.+]]) + // LAMBDA: define {{.+}} void [[INNER_LAMBDA:@.+]](%{{.+}}* frozen [[ARG_PTR:%.+]]) // LAMBDA: store %{{.+}}* [[ARG_PTR]], %{{.+}}** [[ARG_PTR_REF:%.+]], // LAMBDA: [[ARG_PTR:%.+]] = load %{{.+}}*, %{{.+}}** [[ARG_PTR_REF]] // LAMBDA: [[G_PTR_REF:%.+]] = getelementptr inbounds %{{.+}}, %{{.+}}* [[ARG_PTR]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 @@ -77,7 +77,7 @@ // LAMBDA: [[SIVAR_REF:%.+]] = load i{{[0-9]+}}*, i{{[0-9]+}}** [[SIVAR_PTR_REF]] // LAMBDA: store i{{[0-9]+}} 3, i{{[0-9]+}}* [[SIVAR_REF]] - // LAMBDA: define internal i32 [[TASK_ENTRY]](i32 %0, %{{.+}}* noalias %1) + // LAMBDA: define internal frozen i32 [[TASK_ENTRY]](i32 frozen %0, %{{.+}}* frozen noalias %1) g = 1; sivar = 2; // LAMBDA: store double 1.0{{.+}}, double* %{{.+}}, @@ -112,7 +112,7 @@ // BLOCKS-NOT: [[SIVAR]]{{[[^:word:]]}} // BLOCKS: ret - // BLOCKS: define internal i32 [[TASK_ENTRY]](i32 %0, %{{.+}}* noalias %1) + // BLOCKS: define internal frozen i32 [[TASK_ENTRY]](i32 frozen %0, %{{.+}}* frozen noalias %1) g = 1; sivar = 3; // BLOCKS: store double 1.0{{.+}}, double* %{{.+}}, @@ -145,7 +145,7 @@ #endif } -// CHECK: define i{{[0-9]+}} @main() +// CHECK: define frozen i{{[0-9]+}} @main() // CHECK: [[TEST:%.+]] = alloca [[S_DOUBLE_TY]], // CHECK: [[T_VAR_ADDR:%.+]] = alloca i32, // CHECK: [[VEC_ADDR:%.+]] = alloca [2 x i32], @@ -153,7 +153,7 @@ // CHECK: [[VAR_ADDR:%.+]] = alloca [[S_DOUBLE_TY]], // CHECK: [[GTID:%.+]] = call i32 @__kmpc_global_thread_num([[LOC:%.+]]) -// CHECK: call {{.*}} [[S_DOUBLE_TY_DEF_CONSTR:@.+]]([[S_DOUBLE_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_DOUBLE_TY_DEF_CONSTR:@.+]]([[S_DOUBLE_TY]]* frozen [[TEST]]) // Do not store original variables in capture struct. // CHECK-NOT: getelementptr inbounds [[CAP_MAIN_TY]], @@ -176,14 +176,14 @@ // CHECK: [[PRIVATE_S_ARR_REF:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 // CHECK: getelementptr inbounds [2 x [[S_DOUBLE_TY]]], [2 x [[S_DOUBLE_TY]]]* [[PRIVATE_S_ARR_REF]], i{{.+}} 0, i{{.+}} 0 // CHECK: getelementptr inbounds [[S_DOUBLE_TY]], [[S_DOUBLE_TY]]* %{{.+}}, i{{.+}} 2 -// CHECK: call void [[S_DOUBLE_TY_DEF_CONSTR]]([[S_DOUBLE_TY]]* [[S_ARR_CUR:%.+]]) +// CHECK: call void [[S_DOUBLE_TY_DEF_CONSTR]]([[S_DOUBLE_TY]]* frozen [[S_ARR_CUR:%.+]]) // CHECK: getelementptr inbounds [[S_DOUBLE_TY]], [[S_DOUBLE_TY]]* [[S_ARR_CUR]], i{{.+}} 1 // CHECK: icmp eq // CHECK: br i1 // var; // CHECK: [[PRIVATE_VAR_REF:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 1 -// CHECK: call void [[S_DOUBLE_TY_DEF_CONSTR]]([[S_DOUBLE_TY]]* [[PRIVATE_VAR_REF:%.+]]) +// CHECK: call void [[S_DOUBLE_TY_DEF_CONSTR]]([[S_DOUBLE_TY]]* frozen [[PRIVATE_VAR_REF:%.+]]) // Provide pointer to destructor function, which will destroy private variables at the end of the task. // CHECK: [[DESTRUCTORS_REF:%.+]] = getelementptr inbounds [[KMP_TASK_T_TY]], [[KMP_TASK_T_TY]]* [[TASK]], i{{.+}} 0, i{{.+}} 3 @@ -194,7 +194,7 @@ // CHECK: call void @__kmpc_taskloop([[LOC]], i32 [[GTID]], i8* [[RES]], i32 1, i64* %{{.+}}, i64* %{{.+}}, i64 %{{.+}}, i32 1, i32 0, i64 0, i8* bitcast (void ([[KMP_TASK_MAIN_TY]]*, [[KMP_TASK_MAIN_TY]]*, i32)* [[MAIN_DUP:@.+]] to i8*)) // CHECK: call i32 @__kmpc_omp_task([[LOC]], i32 [[GTID]], i8* -// CHECK: = call i{{.+}} [[TMAIN_INT:@.+]]() +// CHECK: = call frozen i{{.+}} [[TMAIN_INT:@.+]]() // No destructors must be called for private copies of s_arr and var. // CHECK-NOT: getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 2 @@ -205,7 +205,7 @@ // CHECK: ret // -// CHECK: define internal void [[PRIVATES_MAP_FN:@.+]]([[PRIVATES_MAIN_TY]]* noalias %0, [[S_DOUBLE_TY]]** noalias %1, i32** noalias %2, [2 x [[S_DOUBLE_TY]]]** noalias %3, [2 x i32]** noalias %4, i32** noalias %5) +// CHECK: define internal void [[PRIVATES_MAP_FN:@.+]]([[PRIVATES_MAIN_TY]]* frozen noalias %0, [[S_DOUBLE_TY]]** frozen noalias %1, i32** frozen noalias %2, [2 x [[S_DOUBLE_TY]]]** frozen noalias %3, [2 x i32]** frozen noalias %4, i32** frozen noalias %5) // CHECK: [[PRIVATES:%.+]] = load [[PRIVATES_MAIN_TY]]*, [[PRIVATES_MAIN_TY]]** // CHECK: [[PRIV_S_VAR:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i32 0, i32 0 // CHECK: [[ARG3:%.+]] = load [2 x [[S_DOUBLE_TY]]]**, [2 x [[S_DOUBLE_TY]]]*** %{{.+}}, @@ -221,7 +221,7 @@ // CHECK: store [2 x i32]* [[PRIV_VEC]], [2 x i32]** [[ARG4]], // CHECK: ret void -// CHECK: define internal i32 [[TASK_ENTRY]](i32 %0, [[KMP_TASK_MAIN_TY]]* noalias %1) +// CHECK: define internal frozen i32 [[TASK_ENTRY]](i32 frozen %0, [[KMP_TASK_MAIN_TY]]* frozen noalias %1) // CHECK: [[PRIV_VAR_ADDR:%.+]] = alloca [[S_DOUBLE_TY]]*, // CHECK: [[PRIV_T_VAR_ADDR:%.+]] = alloca i32*, @@ -246,7 +246,7 @@ // CHECK: ret -// CHECK: define internal void [[MAIN_DUP]]([[KMP_TASK_MAIN_TY]]* %0, [[KMP_TASK_MAIN_TY]]* %1, i32 %2) +// CHECK: define internal void [[MAIN_DUP]]([[KMP_TASK_MAIN_TY]]* frozen %0, [[KMP_TASK_MAIN_TY]]* frozen %1, i32 frozen %2) // CHECK: getelementptr inbounds [[KMP_TASK_MAIN_TY]], [[KMP_TASK_MAIN_TY]]* %{{.+}}, i32 0, i32 1 // CHECK: getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* %{{.+}}, i32 0, i32 0 // CHECK: getelementptr inbounds [2 x [[S_DOUBLE_TY]]], [2 x [[S_DOUBLE_TY]]]* %{{.+}}, i32 0, i32 0 @@ -263,15 +263,15 @@ // CHECK: call {{.*}} [[S_DOUBLE_TY_DEF_CONSTR]]([[S_DOUBLE_TY]]* // CHECK: ret void -// CHECK: define internal i32 [[DESTRUCTORS]](i32 %0, [[KMP_TASK_MAIN_TY]]* noalias %1) +// CHECK: define internal frozen i32 [[DESTRUCTORS]](i32 frozen %0, [[KMP_TASK_MAIN_TY]]* frozen noalias %1) // CHECK: [[PRIVATES:%.+]] = getelementptr inbounds [[KMP_TASK_MAIN_TY]], [[KMP_TASK_MAIN_TY]]* [[RES_KMP_TASK:%.+]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 // CHECK: [[PRIVATE_S_ARR_REF:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 0 // CHECK: [[PRIVATE_VAR_REF:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 1 -// CHECK: call void [[S_DOUBLE_TY_DESTR]]([[S_DOUBLE_TY]]* [[PRIVATE_VAR_REF]]) +// CHECK: call void [[S_DOUBLE_TY_DESTR]]([[S_DOUBLE_TY]]* frozen [[PRIVATE_VAR_REF]]) // CHECK: getelementptr inbounds [2 x [[S_DOUBLE_TY]]], [2 x [[S_DOUBLE_TY]]]* [[PRIVATE_S_ARR_REF]], i{{.+}} 0, i{{.+}} 0 // CHECK: getelementptr inbounds [[S_DOUBLE_TY]], [[S_DOUBLE_TY]]* %{{.+}}, i{{.+}} 2 // CHECK: [[PRIVATE_S_ARR_ELEM_REF:%.+]] = getelementptr inbounds [[S_DOUBLE_TY]], [[S_DOUBLE_TY]]* %{{.+}}, i{{.+}} -1 -// CHECK: call void [[S_DOUBLE_TY_DESTR]]([[S_DOUBLE_TY]]* [[PRIVATE_S_ARR_ELEM_REF]]) +// CHECK: call void [[S_DOUBLE_TY_DESTR]]([[S_DOUBLE_TY]]* frozen [[PRIVATE_S_ARR_ELEM_REF]]) // CHECK: icmp eq // CHECK: br i1 // CHECK: ret i32 @@ -284,7 +284,7 @@ // CHECK: [[VAR_ADDR:%.+]] = alloca [[S_INT_TY]], // CHECK: [[GTID:%.+]] = call i32 @__kmpc_global_thread_num([[LOC:%.+]]) -// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR:@.+]]([[S_INT_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR:@.+]]([[S_INT_TY]]* frozen [[TEST]]) // Do not store original variables in capture struct. // CHECK-NOT: getelementptr inbounds [[CAP_TMAIN_TY]], @@ -307,14 +307,14 @@ // CHECK: [[PRIVATE_S_ARR_REF:%.+]] = getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i{{[0-9]+}} 0, i{{[0-9]+}} 2 // CHECK: getelementptr inbounds [2 x [[S_INT_TY]]], [2 x [[S_INT_TY]]]* [[PRIVATE_S_ARR_REF]], i{{.+}} 0, i{{.+}} 0 // CHECK: getelementptr inbounds [[S_INT_TY]], [[S_INT_TY]]* %{{.+}}, i{{.+}} 2 -// CHECK: call void [[S_INT_TY_DEF_CONSTR]]([[S_INT_TY]]* [[S_ARR_CUR:%.+]]) +// CHECK: call void [[S_INT_TY_DEF_CONSTR]]([[S_INT_TY]]* frozen [[S_ARR_CUR:%.+]]) // CHECK: getelementptr inbounds [[S_INT_TY]], [[S_INT_TY]]* [[S_ARR_CUR]], i{{.+}} 1 // CHECK: icmp eq // CHECK: br i1 // var; // CHECK: [[PRIVATE_VAR_REF:%.+]] = getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 3 -// CHECK: call void [[S_INT_TY_DEF_CONSTR]]([[S_INT_TY]]* [[PRIVATE_VAR_REF:%.+]]) +// CHECK: call void [[S_INT_TY_DEF_CONSTR]]([[S_INT_TY]]* frozen [[PRIVATE_VAR_REF:%.+]]) // Provide pointer to destructor function, which will destroy private variables at the end of the task. // CHECK: [[DESTRUCTORS_REF:%.+]] = getelementptr inbounds [[KMP_TASK_T_TY]], [[KMP_TASK_T_TY]]* [[TASK]], i{{.+}} 0, i{{.+}} 3 @@ -333,7 +333,7 @@ // CHECK: ret // -// CHECK: define internal void [[PRIVATES_MAP_FN:@.+]]([[PRIVATES_TMAIN_TY]]* noalias %0, i32** noalias %1, [2 x i32]** noalias %2, [2 x [[S_INT_TY]]]** noalias %3, [[S_INT_TY]]** noalias %4) +// CHECK: define internal void [[PRIVATES_MAP_FN:@.+]]([[PRIVATES_TMAIN_TY]]* frozen noalias %0, i32** frozen noalias %1, [2 x i32]** frozen noalias %2, [2 x [[S_INT_TY]]]** frozen noalias %3, [[S_INT_TY]]** frozen noalias %4) // CHECK: [[PRIVATES:%.+]] = load [[PRIVATES_TMAIN_TY]]*, [[PRIVATES_TMAIN_TY]]** // CHECK: [[PRIV_T_VAR:%.+]] = getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i32 0, i32 0 // CHECK: [[ARG1:%.+]] = load i32**, i32*** %{{.+}}, @@ -349,7 +349,7 @@ // CHECK: store [[S_INT_TY]]* [[PRIV_VAR]], [[S_INT_TY]]** [[ARG4]], // CHECK: ret void -// CHECK: define internal i32 [[TASK_ENTRY]](i32 %0, [[KMP_TASK_TMAIN_TY]]* noalias %1) +// CHECK: define internal frozen i32 [[TASK_ENTRY]](i32 frozen %0, [[KMP_TASK_TMAIN_TY]]* frozen noalias %1) // CHECK: alloca i32*, // CHECK-DAG: [[PRIV_T_VAR_ADDR:%.+]] = alloca i32*, @@ -372,7 +372,7 @@ // CHECK: ret -// CHECK: define internal void [[TMAIN_DUP]]([[KMP_TASK_TMAIN_TY]]* %0, [[KMP_TASK_TMAIN_TY]]* %1, i32 %2) +// CHECK: define internal void [[TMAIN_DUP]]([[KMP_TASK_TMAIN_TY]]* frozen %0, [[KMP_TASK_TMAIN_TY]]* frozen %1, i32 frozen %2) // CHECK: getelementptr inbounds [[KMP_TASK_TMAIN_TY]], [[KMP_TASK_TMAIN_TY]]* %{{.+}}, i32 0, i32 2 // CHECK: getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* %{{.+}}, i32 0, i32 2 // CHECK: getelementptr inbounds [2 x [[S_INT_TY]]], [2 x [[S_INT_TY]]]* %{{.+}}, i32 0, i32 0 @@ -389,15 +389,15 @@ // CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR]]([[S_INT_TY]]* // CHECK: ret void -// CHECK: define internal i32 [[DESTRUCTORS]](i32 %0, [[KMP_TASK_TMAIN_TY]]* noalias %1) +// CHECK: define internal frozen i32 [[DESTRUCTORS]](i32 frozen %0, [[KMP_TASK_TMAIN_TY]]* frozen noalias %1) // CHECK: [[PRIVATES:%.+]] = getelementptr inbounds [[KMP_TASK_TMAIN_TY]], [[KMP_TASK_TMAIN_TY]]* [[RES_KMP_TASK:%.+]], i{{[0-9]+}} 0, i{{[0-9]+}} 2 // CHECK: [[PRIVATE_S_ARR_REF:%.+]] = getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 2 // CHECK: [[PRIVATE_VAR_REF:%.+]] = getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 3 -// CHECK: call void [[S_INT_TY_DESTR]]([[S_INT_TY]]* [[PRIVATE_VAR_REF]]) +// CHECK: call void [[S_INT_TY_DESTR]]([[S_INT_TY]]* frozen [[PRIVATE_VAR_REF]]) // CHECK: getelementptr inbounds [2 x [[S_INT_TY]]], [2 x [[S_INT_TY]]]* [[PRIVATE_S_ARR_REF]], i{{.+}} 0, i{{.+}} 0 // CHECK: getelementptr inbounds [[S_INT_TY]], [[S_INT_TY]]* %{{.+}}, i{{.+}} 2 // CHECK: [[PRIVATE_S_ARR_ELEM_REF:%.+]] = getelementptr inbounds [[S_INT_TY]], [[S_INT_TY]]* %{{.+}}, i{{.+}} -1 -// CHECK: call void [[S_INT_TY_DESTR]]([[S_INT_TY]]* [[PRIVATE_S_ARR_ELEM_REF]]) +// CHECK: call void [[S_INT_TY_DESTR]]([[S_INT_TY]]* frozen [[PRIVATE_S_ARR_ELEM_REF]]) // CHECK: icmp eq // CHECK: br i1 // CHECK: ret i32 diff --git a/clang/test/OpenMP/taskloop_reduction_codegen.cpp b/clang/test/OpenMP/taskloop_reduction_codegen.cpp --- a/clang/test/OpenMP/taskloop_reduction_codegen.cpp +++ b/clang/test/OpenMP/taskloop_reduction_codegen.cpp @@ -168,50 +168,50 @@ // CHECK: ret i32 -// CHECK: define internal void @[[RED_INIT1]](i8* noalias %{{.+}}, i8* noalias %{{.+}}) +// CHECK: define internal void @[[RED_INIT1]](i8* frozen noalias %{{.+}}, i8* frozen noalias %{{.+}}) // CHECK: store float 0.000000e+00, float* % // CHECK: ret void -// CHECK: define internal void @[[RED_COMB1]](i8* %0, i8* %1) +// CHECK: define internal void @[[RED_COMB1]](i8* frozen %0, i8* frozen %1) // CHECK: fadd float % // CHECK: store float %{{.+}}, float* % // CHECK: ret void -// CHECK: define internal void @[[RED_INIT2]](i8* noalias %{{.+}}, i8* noalias %{{.+}}) +// CHECK: define internal void @[[RED_INIT2]](i8* frozen noalias %{{.+}}, i8* frozen noalias %{{.+}}) // CHECK: call void [[OMP_INIT1:@.+]](%struct.S* // CHECK: ret void -// CHECK: define internal void [[OMP_COMB1:@.+]](%struct.S* noalias %0, %struct.S* noalias %1) +// CHECK: define internal void [[OMP_COMB1:@.+]](%struct.S* frozen noalias %0, %struct.S* frozen noalias %1) // CHECK: fadd float % -// CHECK: define internal void [[OMP_INIT1]](%struct.S* noalias %0, %struct.S* noalias %1) +// CHECK: define internal void [[OMP_INIT1]](%struct.S* frozen noalias %0, %struct.S* frozen noalias %1) // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64( -// CHECK: define internal void @[[RED_FINI2]](i8* %0) +// CHECK: define internal void @[[RED_FINI2]](i8* frozen %0) // CHECK: load i64, i64* [[RED_SIZE1]] // CHECK: call void @ // CHECK: ret void -// CHECK: define internal void @[[RED_COMB2]](i8* %0, i8* %1) +// CHECK: define internal void @[[RED_COMB2]](i8* frozen %0, i8* frozen %1) // CHECK: load i64, i64* [[RED_SIZE1]] // CHECK: call void [[OMP_COMB1]]( // CHECK: ret void -// CHECK: define internal void @[[RED_INIT3]](i8* noalias %{{.+}}, i8* noalias %{{.+}}) +// CHECK: define internal void @[[RED_INIT3]](i8* frozen noalias %{{.+}}, i8* frozen noalias %{{.+}}) // CHECK: store float 0.000000e+00, float* % // CHECK: ret void -// CHECK: define internal void @[[RED_COMB3]](i8* %0, i8* %1) +// CHECK: define internal void @[[RED_COMB3]](i8* frozen %0, i8* frozen %1) // CHECK: fadd float % // CHECK: store float %{{.+}}, float* % // CHECK: ret void -// CHECK: define internal void @[[RED_INIT4]](i8* noalias %{{.+}}, i8* noalias %{{.+}}) +// CHECK: define internal void @[[RED_INIT4]](i8* frozen noalias %{{.+}}, i8* frozen noalias %{{.+}}) // CHECK: load i64, i64* [[RED_SIZE2]] // CHECK: store float 0.000000e+00, float* % // CHECK: ret void -// CHECK: define internal void @[[RED_COMB4]](i8* %0, i8* %1) +// CHECK: define internal void @[[RED_COMB4]](i8* frozen %0, i8* frozen %1) // CHECK: load i64, i64* [[RED_SIZE2]] // CHECK: fadd float % // CHECK: store float %{{.+}}, float* % diff --git a/clang/test/OpenMP/taskloop_simd_codegen.cpp b/clang/test/OpenMP/taskloop_simd_codegen.cpp --- a/clang/test/OpenMP/taskloop_simd_codegen.cpp +++ b/clang/test/OpenMP/taskloop_simd_codegen.cpp @@ -75,7 +75,7 @@ ; } -// CHECK: define internal i32 [[TASK1]]( +// CHECK: define internal frozen i32 [[TASK1]]( // CHECK: [[DOWN:%.+]] = getelementptr inbounds [[TD_TY:%.+]], [[TD_TY]]* %{{.+}}, i32 0, i32 5 // CHECK: [[DOWN_VAL:%.+]] = load i64, i64* [[DOWN]], // CHECK: [[UP:%.+]] = getelementptr inbounds [[TD_TY]], [[TD_TY]]* %{{.+}}, i32 0, i32 6 @@ -105,7 +105,7 @@ // CHECK: br label %{{.*}}!llvm.loop // CHECK: ret i32 0 -// CHECK: define internal i32 [[TASK2]]( +// CHECK: define internal frozen i32 [[TASK2]]( // CHECK: [[DOWN:%.+]] = getelementptr inbounds [[TD_TY:%.+]], [[TD_TY]]* %{{.+}}, i32 0, i32 5 // CHECK: [[DOWN_VAL:%.+]] = load i64, i64* [[DOWN]], // CHECK: [[UP:%.+]] = getelementptr inbounds [[TD_TY]], [[TD_TY]]* %{{.+}}, i32 0, i32 6 @@ -135,7 +135,7 @@ // CHECK: br label %{{.*}}!llvm.loop // CHECK: ret i32 0 -// CHECK: define internal i32 [[TASK3]]( +// CHECK: define internal frozen i32 [[TASK3]]( // CHECK: [[DOWN:%.+]] = getelementptr inbounds [[TD_TY:%.+]], [[TD_TY]]* %{{.+}}, i32 0, i32 5 // CHECK: [[DOWN_VAL:%.+]] = load i64, i64* [[DOWN]], // CHECK: [[UP:%.+]] = getelementptr inbounds [[TD_TY]], [[TD_TY]]* %{{.+}}, i32 0, i32 6 @@ -178,7 +178,7 @@ } } s(1); -// CHECK: define internal i32 [[TASK4]]( +// CHECK: define internal frozen i32 [[TASK4]]( // CHECK: [[DOWN:%.+]] = getelementptr inbounds [[TD_TY:%.+]], [[TD_TY]]* %{{.+}}, i32 0, i32 5 // CHECK: [[DOWN_VAL:%.+]] = load i64, i64* [[DOWN]], // CHECK: [[UP:%.+]] = getelementptr inbounds [[TD_TY]], [[TD_TY]]* %{{.+}}, i32 0, i32 6 diff --git a/clang/test/OpenMP/taskloop_simd_firstprivate_codegen.cpp b/clang/test/OpenMP/taskloop_simd_firstprivate_codegen.cpp --- a/clang/test/OpenMP/taskloop_simd_firstprivate_codegen.cpp +++ b/clang/test/OpenMP/taskloop_simd_firstprivate_codegen.cpp @@ -78,7 +78,7 @@ // LAMBDA: ret #pragma omp taskloop simd firstprivate(g, sivar) for (int i = 0; i < 10; ++i) { - // LAMBDA: define {{.+}} void [[INNER_LAMBDA:@.+]](%{{.+}}* [[ARG_PTR:%.+]]) + // LAMBDA: define {{.+}} void [[INNER_LAMBDA:@.+]](%{{.+}}* frozen [[ARG_PTR:%.+]]) // LAMBDA: store %{{.+}}* [[ARG_PTR]], %{{.+}}** [[ARG_PTR_REF:%.+]], // LAMBDA: [[ARG_PTR:%.+]] = load %{{.+}}*, %{{.+}}** [[ARG_PTR_REF]] // LAMBDA: [[G_PTR_REF:%.+]] = getelementptr inbounds %{{.+}}, %{{.+}}* [[ARG_PTR]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 @@ -86,7 +86,7 @@ // LAMBDA: store volatile double 2.0{{.+}}, double* [[G_REF]] // LAMBDA: store double* %{{.+}}, double** %{{.+}}, - // LAMBDA: define internal i32 [[TASK_ENTRY]](i32 %0, %{{.+}}* noalias %1) + // LAMBDA: define internal frozen i32 [[TASK_ENTRY]](i32 frozen %0, %{{.+}}* frozen noalias %1) g = 1; sivar = 11; // LAMBDA: store double 1.0{{.+}}, double* %{{.+}}, @@ -130,7 +130,7 @@ // BLOCKS: store double* %{{.+}}, double** %{{.+}}, // BLOCKS: store i{{[0-9]+}}* %{{.+}}, i{{[0-9]+}}** %{{.+}}, - // BLOCKS: define internal i32 [[TASK_ENTRY]](i32 %0, %{{.+}}* noalias %1) + // BLOCKS: define internal frozen i32 [[TASK_ENTRY]](i32 frozen %0, %{{.+}}* frozen noalias %1) g = 1; sivar = 11; // BLOCKS: store double 1.0{{.+}}, double* %{{.+}}, @@ -163,7 +163,7 @@ } // CHECK: [[SIVAR:.+]] = internal global i{{[0-9]+}} 0, -// CHECK: define i{{[0-9]+}} @main() +// CHECK: define frozen i{{[0-9]+}} @main() // CHECK: alloca [[S_DOUBLE_TY]], // CHECK: [[TEST:%.+]] = alloca [[S_DOUBLE_TY]], // CHECK: [[T_VAR_ADDR:%.+]] = alloca i32, @@ -172,7 +172,7 @@ // CHECK: [[VAR_ADDR:%.+]] = alloca [[S_DOUBLE_TY]], // CHECK: [[GTID:%.+]] = call i32 @__kmpc_global_thread_num([[LOC:%.+]]) -// CHECK: call {{.*}} [[S_DOUBLE_TY_COPY_CONSTR:@.+]]([[S_DOUBLE_TY]]* [[TEST]], +// CHECK: call {{.*}} [[S_DOUBLE_TY_COPY_CONSTR:@.+]]([[S_DOUBLE_TY]]* frozen [[TEST]] // Store original variables in capture struct. // CHECK: [[S_ARR_REF:%.+]] = getelementptr inbounds [[CAP_MAIN_TY]], [[CAP_MAIN_TY]]* %{{.+}}, i{{[0-9]+}} 0, i{{[0-9]+}} 0 @@ -203,7 +203,7 @@ // s_arr; // CHECK: [[PRIVATE_S_ARR_REF:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 // CHECK: bitcast [2 x [[S_DOUBLE_TY]]]* %{{.+}} to [[S_DOUBLE_TY]]* -// CHECK: call void [[S_DOUBLE_TY_COPY_CONSTR]]([[S_DOUBLE_TY]]* [[S_ARR_CUR:%[^,]+]], +// CHECK: call void [[S_DOUBLE_TY_COPY_CONSTR]]([[S_DOUBLE_TY]]* frozen [[S_ARR_CUR:%[^,]+]] // CHECK: getelementptr [[S_DOUBLE_TY]], [[S_DOUBLE_TY]]* [[S_ARR_CUR]], i{{.+}} 1 // CHECK: getelementptr [[S_DOUBLE_TY]], [[S_DOUBLE_TY]]* %{{.+}}, i{{.+}} 1 // CHECK: icmp eq @@ -211,7 +211,7 @@ // var; // CHECK: [[PRIVATE_VAR_REF:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 1 -// CHECK-NEXT: call void [[S_DOUBLE_TY_COPY_CONSTR]]([[S_DOUBLE_TY]]* [[PRIVATE_VAR_REF]], [[S_DOUBLE_TY]]* {{.*}}, +// CHECK-NEXT: call void [[S_DOUBLE_TY_COPY_CONSTR]]([[S_DOUBLE_TY]]* frozen [[PRIVATE_VAR_REF]], [[S_DOUBLE_TY]]* {{.*}} // t_var; // CHECK: [[PRIVATE_T_VAR_REF:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 2 @@ -237,7 +237,7 @@ // Start task. // CHECK: call void @__kmpc_taskloop([[LOC]], i32 [[GTID]], i8* [[RES]], i32 1, i64* %{{.+}}, i64* %{{.+}}, i64 %{{.+}}, i32 1, i32 0, i64 0, i8* bitcast (void ([[KMP_TASK_MAIN_TY]]*, [[KMP_TASK_MAIN_TY]]*, i32)* [[MAIN_DUP:@.+]] to i8*)) -// CHECK: = call i{{.+}} [[TMAIN_INT:@.+]]() +// CHECK: = call frozen i{{.+}} [[TMAIN_INT:@.+]]() // No destructors must be called for private copies of s_arr and var. // CHECK-NOT: getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 2 @@ -248,7 +248,7 @@ // CHECK: ret // -// CHECK: define internal void [[PRIVATES_MAP_FN:@.+]]([[PRIVATES_MAIN_TY]]* noalias %0, [[S_DOUBLE_TY]]** noalias %1, i32** noalias %2, [2 x [[S_DOUBLE_TY]]]** noalias %3, [2 x i32]** noalias %4, i32** noalias %5) +// CHECK: define internal void [[PRIVATES_MAP_FN:@.+]]([[PRIVATES_MAIN_TY]]* frozen noalias %0, [[S_DOUBLE_TY]]** frozen noalias %1, i32** frozen noalias %2, [2 x [[S_DOUBLE_TY]]]** frozen noalias %3, [2 x i32]** frozen noalias %4, i32** frozen noalias %5) // CHECK: [[PRIVATES:%.+]] = load [[PRIVATES_MAIN_TY]]*, [[PRIVATES_MAIN_TY]]** // CHECK: [[PRIV_S_VAR:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i32 0, i32 0 // CHECK: [[ARG3:%.+]] = load [2 x [[S_DOUBLE_TY]]]**, [2 x [[S_DOUBLE_TY]]]*** %{{.+}}, @@ -267,7 +267,7 @@ // CHECK: store i{{[0-9]+}}* [[PRIV_SIVAR]], i{{[0-9]+}}** [[ARG5]], // CHECK: ret void -// CHECK: define internal i32 [[TASK_ENTRY]](i32 %0, [[KMP_TASK_MAIN_TY]]* noalias %1) +// CHECK: define internal frozen i32 [[TASK_ENTRY]](i32 frozen %0, [[KMP_TASK_MAIN_TY]]* frozen noalias %1) // CHECK: [[PRIV_VAR_ADDR:%.+]] = alloca [[S_DOUBLE_TY]]*, // CHECK: [[PRIV_T_VAR_ADDR:%.+]] = alloca i32*, @@ -294,7 +294,7 @@ // CHECK: ret -// CHECK: define internal void [[MAIN_DUP]]([[KMP_TASK_MAIN_TY]]* %0, [[KMP_TASK_MAIN_TY]]* %1, i32 %2) +// CHECK: define internal void [[MAIN_DUP]]([[KMP_TASK_MAIN_TY]]* frozen %0, [[KMP_TASK_MAIN_TY]]* frozen %1, i32 frozen %2) // CHECK: getelementptr inbounds [[KMP_TASK_MAIN_TY]], [[KMP_TASK_MAIN_TY]]* %{{.+}}, i32 0, i32 1 // CHECK: getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* %{{.+}}, i32 0, i32 0 // CHECK: getelementptr inbounds [2 x [[S_DOUBLE_TY]]], [2 x [[S_DOUBLE_TY]]]* %{{.+}}, i32 0, i32 0 @@ -311,15 +311,15 @@ // CHECK: call {{.*}} [[S_DOUBLE_TY_COPY_CONSTR]]([[S_DOUBLE_TY]]* // CHECK: ret void -// CHECK: define internal i32 [[DESTRUCTORS]](i32 %0, [[KMP_TASK_MAIN_TY]]* noalias %1) +// CHECK: define internal frozen i32 [[DESTRUCTORS]](i32 frozen %0, [[KMP_TASK_MAIN_TY]]* frozen noalias %1) // CHECK: [[PRIVATES:%.+]] = getelementptr inbounds [[KMP_TASK_MAIN_TY]], [[KMP_TASK_MAIN_TY]]* [[RES_KMP_TASK:%.+]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 // CHECK: [[PRIVATE_S_ARR_REF:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 0 // CHECK: [[PRIVATE_VAR_REF:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 1 -// CHECK: call void [[S_DOUBLE_TY_DESTR]]([[S_DOUBLE_TY]]* [[PRIVATE_VAR_REF]]) +// CHECK: call void [[S_DOUBLE_TY_DESTR]]([[S_DOUBLE_TY]]* frozen [[PRIVATE_VAR_REF]]) // CHECK: getelementptr inbounds [2 x [[S_DOUBLE_TY]]], [2 x [[S_DOUBLE_TY]]]* [[PRIVATE_S_ARR_REF]], i{{.+}} 0, i{{.+}} 0 // CHECK: getelementptr inbounds [[S_DOUBLE_TY]], [[S_DOUBLE_TY]]* %{{.+}}, i{{.+}} 2 // CHECK: [[PRIVATE_S_ARR_ELEM_REF:%.+]] = getelementptr inbounds [[S_DOUBLE_TY]], [[S_DOUBLE_TY]]* %{{.+}}, i{{.+}} -1 -// CHECK: call void [[S_DOUBLE_TY_DESTR]]([[S_DOUBLE_TY]]* [[PRIVATE_S_ARR_ELEM_REF]]) +// CHECK: call void [[S_DOUBLE_TY_DESTR]]([[S_DOUBLE_TY]]* frozen [[PRIVATE_S_ARR_ELEM_REF]]) // CHECK: icmp eq // CHECK: br i1 // CHECK: ret i32 @@ -333,7 +333,7 @@ // CHECK: [[VAR_ADDR:%.+]] = alloca [[S_INT_TY]], // CHECK: [[GTID:%.+]] = call i32 @__kmpc_global_thread_num([[LOC:%.+]]) -// CHECK: call {{.*}} [[S_INT_TY_COPY_CONSTR:@.+]]([[S_INT_TY]]* [[TEST]], +// CHECK: call {{.*}} [[S_INT_TY_COPY_CONSTR:@.+]]([[S_INT_TY]]* frozen [[TEST]] // Store original variables in capture struct. // CHECK: [[S_ARR_REF:%.+]] = getelementptr inbounds [[CAP_TMAIN_TY]], [[CAP_TMAIN_TY]]* %{{.+}}, i{{[0-9]+}} 0, i{{[0-9]+}} 0 @@ -376,14 +376,14 @@ // CHECK: getelementptr inbounds [2 x [[S_INT_TY]]], [2 x [[S_INT_TY]]]* [[PRIVATE_S_ARR_REF]], i{{.+}} 0, i{{.+}} 0 // CHECK: bitcast [2 x [[S_INT_TY]]]* %{{.+}} to [[S_INT_TY]]* // CHECK: getelementptr [[S_INT_TY]], [[S_INT_TY]]* %{{.+}}, i{{.+}} 2 -// CHECK: call void [[S_INT_TY_COPY_CONSTR]]([[S_INT_TY]]* [[S_ARR_CUR:%[^,]+]], +// CHECK: call void [[S_INT_TY_COPY_CONSTR]]([[S_INT_TY]]* frozen [[S_ARR_CUR:%[^,]+]] // CHECK: getelementptr [[S_INT_TY]], [[S_INT_TY]]* [[S_ARR_CUR]], i{{.+}} 1 // CHECK: icmp eq // CHECK: br i1 // var; // CHECK: [[PRIVATE_VAR_REF:%.+]] = getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 3 -// CHECK-NEXT: call void [[S_INT_TY_COPY_CONSTR]]([[S_INT_TY]]* [[PRIVATE_VAR_REF]], +// CHECK-NEXT: call void [[S_INT_TY_COPY_CONSTR]]([[S_INT_TY]]* frozen [[PRIVATE_VAR_REF]] // Provide pointer to destructor function, which will destroy private variables at the end of the task. // CHECK: [[DESTRUCTORS_REF:%.+]] = getelementptr inbounds [[KMP_TASK_T_TY]], [[KMP_TASK_T_TY]]* [[TASK]], i{{.+}} 0, i{{.+}} 3 @@ -402,7 +402,7 @@ // CHECK: ret // -// CHECK: define internal void [[PRIVATES_MAP_FN:@.+]]([[PRIVATES_TMAIN_TY]]* noalias %0, i32** noalias %1, [2 x i32]** noalias %2, [2 x [[S_INT_TY]]]** noalias %3, [[S_INT_TY]]** noalias %4) +// CHECK: define internal void [[PRIVATES_MAP_FN:@.+]]([[PRIVATES_TMAIN_TY]]* frozen noalias %0, i32** frozen noalias %1, [2 x i32]** frozen noalias %2, [2 x [[S_INT_TY]]]** frozen noalias %3, [[S_INT_TY]]** frozen noalias %4) // CHECK: [[PRIVATES:%.+]] = load [[PRIVATES_TMAIN_TY]]*, [[PRIVATES_TMAIN_TY]]** // CHECK: [[PRIV_T_VAR:%.+]] = getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i32 0, i32 0 // CHECK: [[ARG1:%.+]] = load i32**, i32*** %{{.+}}, @@ -418,7 +418,7 @@ // CHECK: store [[S_INT_TY]]* [[PRIV_VAR]], [[S_INT_TY]]** [[ARG4]], // CHECK: ret void -// CHECK: define internal i32 [[TASK_ENTRY]](i32 %0, [[KMP_TASK_TMAIN_TY]]* noalias %1) +// CHECK: define internal frozen i32 [[TASK_ENTRY]](i32 frozen %0, [[KMP_TASK_TMAIN_TY]]* frozen noalias %1) // CHECK: alloca i32*, // CHECK-DAG: [[PRIV_T_VAR_ADDR:%.+]] = alloca i32*, // CHECK-DAG: [[PRIV_VEC_ADDR:%.+]] = alloca [2 x i32]*, @@ -440,7 +440,7 @@ // CHECK: ret -// CHECK: define internal void [[TMAIN_DUP]]([[KMP_TASK_TMAIN_TY]]* %0, [[KMP_TASK_TMAIN_TY]]* %1, i32 %2) +// CHECK: define internal void [[TMAIN_DUP]]([[KMP_TASK_TMAIN_TY]]* frozen %0, [[KMP_TASK_TMAIN_TY]]* frozen %1, i32 frozen %2) // CHECK: getelementptr inbounds [[KMP_TASK_TMAIN_TY]], [[KMP_TASK_TMAIN_TY]]* %{{.+}}, i32 0, i32 2 // CHECK: getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* %{{.+}}, i32 0, i32 2 // CHECK: getelementptr inbounds [2 x [[S_INT_TY]]], [2 x [[S_INT_TY]]]* %{{.+}}, i32 0, i32 0 @@ -457,15 +457,15 @@ // CHECK: call {{.*}} [[S_INT_TY_COPY_CONSTR]]([[S_INT_TY]]* // CHECK: ret void -// CHECK: define internal i32 [[DESTRUCTORS]](i32 %0, [[KMP_TASK_TMAIN_TY]]* noalias %1) +// CHECK: define internal frozen i32 [[DESTRUCTORS]](i32 frozen %0, [[KMP_TASK_TMAIN_TY]]* frozen noalias %1) // CHECK: [[PRIVATES:%.+]] = getelementptr inbounds [[KMP_TASK_TMAIN_TY]], [[KMP_TASK_TMAIN_TY]]* [[RES_KMP_TASK:%.+]], i{{[0-9]+}} 0, i{{[0-9]+}} 2 // CHECK: [[PRIVATE_S_ARR_REF:%.+]] = getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 2 // CHECK: [[PRIVATE_VAR_REF:%.+]] = getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 3 -// CHECK: call void [[S_INT_TY_DESTR]]([[S_INT_TY]]* [[PRIVATE_VAR_REF]]) +// CHECK: call void [[S_INT_TY_DESTR]]([[S_INT_TY]]* frozen [[PRIVATE_VAR_REF]]) // CHECK: getelementptr inbounds [2 x [[S_INT_TY]]], [2 x [[S_INT_TY]]]* [[PRIVATE_S_ARR_REF]], i{{.+}} 0, i{{.+}} 0 // CHECK: getelementptr inbounds [[S_INT_TY]], [[S_INT_TY]]* %{{.+}}, i{{.+}} 2 // CHECK: [[PRIVATE_S_ARR_ELEM_REF:%.+]] = getelementptr inbounds [[S_INT_TY]], [[S_INT_TY]]* %{{.+}}, i{{.+}} -1 -// CHECK: call void [[S_INT_TY_DESTR]]([[S_INT_TY]]* [[PRIVATE_S_ARR_ELEM_REF]]) +// CHECK: call void [[S_INT_TY_DESTR]]([[S_INT_TY]]* frozen [[PRIVATE_S_ARR_ELEM_REF]]) // CHECK: icmp eq // CHECK: br i1 // CHECK: ret i32 diff --git a/clang/test/OpenMP/taskloop_simd_lastprivate_codegen.cpp b/clang/test/OpenMP/taskloop_simd_lastprivate_codegen.cpp --- a/clang/test/OpenMP/taskloop_simd_lastprivate_codegen.cpp +++ b/clang/test/OpenMP/taskloop_simd_lastprivate_codegen.cpp @@ -71,7 +71,7 @@ // LAMBDA: ret #pragma omp taskloop simd lastprivate(g, sivar) for (int i = 0; i < 10; ++i) { - // LAMBDA: define {{.+}} void [[INNER_LAMBDA:@.+]](%{{.+}}* [[ARG_PTR:%.+]]) + // LAMBDA: define {{.+}} void [[INNER_LAMBDA:@.+]](%{{.+}}* frozen [[ARG_PTR:%.+]]) // LAMBDA: store %{{.+}}* [[ARG_PTR]], %{{.+}}** [[ARG_PTR_REF:%.+]], // LAMBDA: [[ARG_PTR:%.+]] = load %{{.+}}*, %{{.+}}** [[ARG_PTR_REF]] // LAMBDA: [[G_PTR_REF:%.+]] = getelementptr inbounds %{{.+}}, %{{.+}}* [[ARG_PTR]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 @@ -79,7 +79,7 @@ // LAMBDA: store double 2.0{{.+}}, double* [[G_REF]] // LAMBDA: store double* %{{.+}}, double** %{{.+}}, - // LAMBDA: define internal i32 [[TASK_ENTRY]](i32 %0, %{{.+}}* noalias %1) + // LAMBDA: define internal frozen i32 [[TASK_ENTRY]](i32 frozen %0, %{{.+}}* frozen noalias %1) g = 1; sivar = 11; // LAMBDA: store double 1.0{{.+}}, double* %{{.+}}, @@ -122,7 +122,7 @@ // BLOCKS: store double* %{{.+}}, double** %{{.+}}, // BLOCKS: store i{{[0-9]+}}* %{{.+}}, i{{[0-9]+}}** %{{.+}}, - // BLOCKS: define internal i32 [[TASK_ENTRY]](i32 %0, %{{.+}}* noalias %1) + // BLOCKS: define internal frozen i32 [[TASK_ENTRY]](i32 frozen %0, %{{.+}}* frozen noalias %1) g = 1; sivar = 11; // BLOCKS: store double 1.0{{.+}}, double* %{{.+}}, @@ -161,7 +161,7 @@ } // CHECK: [[SIVAR:.+]] = internal global i{{[0-9]+}} 0, -// CHECK: define i{{[0-9]+}} @main() +// CHECK: define frozen i{{[0-9]+}} @main() // CHECK: alloca [[S_DOUBLE_TY]], // CHECK: [[TEST:%.+]] = alloca [[S_DOUBLE_TY]], // CHECK: [[T_VAR_ADDR:%.+]] = alloca i32, @@ -170,7 +170,7 @@ // CHECK: [[VAR_ADDR:%.+]] = alloca [[S_DOUBLE_TY]], // CHECK: [[GTID:%.+]] = call i32 @__kmpc_global_thread_num([[LOC:%.+]]) -// CHECK: call {{.*}} [[S_DOUBLE_TY_CONSTR:@.+]]([[S_DOUBLE_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_DOUBLE_TY_CONSTR:@.+]]([[S_DOUBLE_TY]]* frozen [[TEST]]) // Store original variables in capture struct. // CHECK: [[VEC_REF:%.+]] = getelementptr inbounds [[CAP_MAIN_TY]], [[CAP_MAIN_TY]]* %{{.+}}, i{{[0-9]+}} 0, i{{[0-9]+}} 0 @@ -206,14 +206,14 @@ // Constructors for s_arr and var. // s_arr; // CHECK: [[PRIVATE_S_ARR_REF:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 -// CHECK: call {{.*}} [[S_DOUBLE_TY_CONSTR]]([[S_DOUBLE_TY]]* [[S_ARR_CUR:%[^,]+]]) +// CHECK: call {{.*}} [[S_DOUBLE_TY_CONSTR]]([[S_DOUBLE_TY]]* frozen [[S_ARR_CUR:%[^,]+]]) // CHECK: getelementptr inbounds [[S_DOUBLE_TY]], [[S_DOUBLE_TY]]* [[S_ARR_CUR]], i{{.+}} 1 // CHECK: icmp eq // CHECK: br i1 // var; // CHECK: [[PRIVATE_VAR_REF:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 1 -// CHECK: call {{.*}} [[S_DOUBLE_TY_CONSTR]]([[S_DOUBLE_TY]]* [[PRIVATE_VAR_REF]]) +// CHECK: call {{.*}} [[S_DOUBLE_TY_CONSTR]]([[S_DOUBLE_TY]]* frozen [[PRIVATE_VAR_REF]]) // t_var; // vec; @@ -227,7 +227,7 @@ // Start task. // CHECK: call void @__kmpc_taskloop([[LOC]], i32 [[GTID]], i8* [[RES]], i32 1, i64* %{{.+}}, i64* %{{.+}}, i64 %{{.+}}, i32 1, i32 0, i64 0, i8* bitcast (void ([[KMP_TASK_MAIN_TY]]*, [[KMP_TASK_MAIN_TY]]*, i32)* [[MAIN_DUP:@.+]] to i8*)) -// CHECK: = call i{{.+}} [[TMAIN_INT:@.+]]() +// CHECK: = call frozen i{{.+}} [[TMAIN_INT:@.+]]() // No destructors must be called for private copies of s_arr and var. // CHECK-NOT: getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 2 @@ -238,7 +238,7 @@ // CHECK: ret // -// CHECK: define internal void [[PRIVATES_MAP_FN:@.+]]([[PRIVATES_MAIN_TY]]* noalias %0, [[S_DOUBLE_TY]]** noalias %1, i32** noalias %2, [2 x [[S_DOUBLE_TY]]]** noalias %3, [2 x i32]** noalias %4, i32** noalias %5) +// CHECK: define internal void [[PRIVATES_MAP_FN:@.+]]([[PRIVATES_MAIN_TY]]* frozen noalias %0, [[S_DOUBLE_TY]]** frozen noalias %1, i32** frozen noalias %2, [2 x [[S_DOUBLE_TY]]]** frozen noalias %3, [2 x i32]** frozen noalias %4, i32** frozen noalias %5) // CHECK: [[PRIVATES:%.+]] = load [[PRIVATES_MAIN_TY]]*, [[PRIVATES_MAIN_TY]]** // CHECK: [[PRIV_S_VAR:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i32 0, i32 0 // CHECK: [[ARG3:%.+]] = load [2 x [[S_DOUBLE_TY]]]**, [2 x [[S_DOUBLE_TY]]]*** %{{.+}}, @@ -257,7 +257,7 @@ // CHECK: store i{{[0-9]+}}* [[PRIV_SIVAR]], i{{[0-9]+}}** [[ARG5]], // CHECK: ret void -// CHECK: define internal i32 [[TASK_ENTRY]](i32 %0, [[KMP_TASK_MAIN_TY]]* noalias %1) +// CHECK: define internal frozen i32 [[TASK_ENTRY]](i32 frozen %0, [[KMP_TASK_MAIN_TY]]* frozen noalias %1) // CHECK: [[PRIV_VAR_ADDR:%.+]] = alloca [[S_DOUBLE_TY]]*, // CHECK: [[PRIV_T_VAR_ADDR:%.+]] = alloca i32*, @@ -303,7 +303,7 @@ // CHECK: br label // CHECK: ret -// CHECK: define internal void [[MAIN_DUP]]([[KMP_TASK_MAIN_TY]]* %0, [[KMP_TASK_MAIN_TY]]* %1, i32 %2) +// CHECK: define internal void [[MAIN_DUP]]([[KMP_TASK_MAIN_TY]]* frozen %0, [[KMP_TASK_MAIN_TY]]* frozen %1, i32 frozen %2) // CHECK: getelementptr inbounds [[KMP_TASK_MAIN_TY]], [[KMP_TASK_MAIN_TY]]* %{{.+}}, i32 0, i32 0 // CHECK: getelementptr inbounds [[KMP_TASK_T_TY]], [[KMP_TASK_T_TY]]* %{{.+}}, i32 0, i32 8 // CHECK: load i32, i32* % @@ -324,15 +324,15 @@ // CHECK: call {{.*}} [[S_DOUBLE_TY_CONSTR]]([[S_DOUBLE_TY]]* // CHECK: ret void -// CHECK: define internal i32 [[DESTRUCTORS]](i32 %0, [[KMP_TASK_MAIN_TY]]* noalias %1) +// CHECK: define internal frozen i32 [[DESTRUCTORS]](i32 frozen %0, [[KMP_TASK_MAIN_TY]]* frozen noalias %1) // CHECK: [[PRIVATES:%.+]] = getelementptr inbounds [[KMP_TASK_MAIN_TY]], [[KMP_TASK_MAIN_TY]]* [[RES_KMP_TASK:%.+]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 // CHECK: [[PRIVATE_S_ARR_REF:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 0 // CHECK: [[PRIVATE_VAR_REF:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 1 -// CHECK: call {{.*}} [[S_DOUBLE_TY_DESTR]]([[S_DOUBLE_TY]]* [[PRIVATE_VAR_REF]]) +// CHECK: call {{.*}} [[S_DOUBLE_TY_DESTR]]([[S_DOUBLE_TY]]* frozen [[PRIVATE_VAR_REF]]) // CHECK: getelementptr inbounds [2 x [[S_DOUBLE_TY]]], [2 x [[S_DOUBLE_TY]]]* [[PRIVATE_S_ARR_REF]], i{{.+}} 0, i{{.+}} 0 // CHECK: getelementptr inbounds [[S_DOUBLE_TY]], [[S_DOUBLE_TY]]* %{{.+}}, i{{.+}} 2 // CHECK: [[PRIVATE_S_ARR_ELEM_REF:%.+]] = getelementptr inbounds [[S_DOUBLE_TY]], [[S_DOUBLE_TY]]* %{{.+}}, i{{.+}} -1 -// CHECK: call {{.*}} [[S_DOUBLE_TY_DESTR]]([[S_DOUBLE_TY]]* [[PRIVATE_S_ARR_ELEM_REF]]) +// CHECK: call {{.*}} [[S_DOUBLE_TY_DESTR]]([[S_DOUBLE_TY]]* frozen [[PRIVATE_S_ARR_ELEM_REF]]) // CHECK: icmp eq // CHECK: br i1 // CHECK: ret i32 @@ -346,7 +346,7 @@ // CHECK: [[VAR_ADDR:%.+]] = alloca [[S_INT_TY]], // CHECK: [[GTID:%.+]] = call i32 @__kmpc_global_thread_num([[LOC:%.+]]) -// CHECK: call {{.*}} [[S_INT_TY_CONSTR:@.+]]([[S_INT_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_INT_TY_CONSTR:@.+]]([[S_INT_TY]]* frozen [[TEST]]) // Store original variables in capture struct. // CHECK: [[VEC_REF:%.+]] = getelementptr inbounds [[CAP_TMAIN_TY]], [[CAP_TMAIN_TY]]* %{{.+}}, i{{[0-9]+}} 0, i{{[0-9]+}} 0 @@ -384,14 +384,14 @@ // CHECK: [[PRIVATE_S_ARR_REF:%.+]] = getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i{{[0-9]+}} 0, i{{[0-9]+}} 2 // CHECK: getelementptr inbounds [2 x [[S_INT_TY]]], [2 x [[S_INT_TY]]]* [[PRIVATE_S_ARR_REF]], i{{.+}} 0, i{{.+}} 0 // CHECK: getelementptr inbounds [[S_INT_TY]], [[S_INT_TY]]* %{{.+}}, i{{.+}} 2 -// CHECK: call {{.*}} [[S_INT_TY_CONSTR]]([[S_INT_TY]]* [[S_ARR_CUR:%[^,]+]]) +// CHECK: call {{.*}} [[S_INT_TY_CONSTR]]([[S_INT_TY]]* frozen [[S_ARR_CUR:%[^,]+]]) // CHECK: getelementptr inbounds [[S_INT_TY]], [[S_INT_TY]]* [[S_ARR_CUR]], i{{.+}} 1 // CHECK: icmp eq // CHECK: br i1 // var; // CHECK: [[PRIVATE_VAR_REF:%.+]] = getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 3 -// CHECK: call {{.*}} [[S_INT_TY_CONSTR]]([[S_INT_TY]]* [[PRIVATE_VAR_REF]]) +// CHECK: call {{.*}} [[S_INT_TY_CONSTR]]([[S_INT_TY]]* frozen [[PRIVATE_VAR_REF]]) // Provide pointer to destructor function, which will destroy private variables at the end of the task. // CHECK: [[DESTRUCTORS_REF:%.+]] = getelementptr inbounds [[KMP_TASK_T_TY]], [[KMP_TASK_T_TY]]* [[TASK]], i{{.+}} 0, i{{.+}} 3 @@ -410,7 +410,7 @@ // CHECK: ret // -// CHECK: define internal void [[PRIVATES_MAP_FN:@.+]]([[PRIVATES_TMAIN_TY]]* noalias %0, i32** noalias %1, [2 x i32]** noalias %2, [2 x [[S_INT_TY]]]** noalias %3, [[S_INT_TY]]** noalias %4) +// CHECK: define internal void [[PRIVATES_MAP_FN:@.+]]([[PRIVATES_TMAIN_TY]]* frozen noalias %0, i32** frozen noalias %1, [2 x i32]** frozen noalias %2, [2 x [[S_INT_TY]]]** frozen noalias %3, [[S_INT_TY]]** frozen noalias %4) // CHECK: [[PRIVATES:%.+]] = load [[PRIVATES_TMAIN_TY]]*, [[PRIVATES_TMAIN_TY]]** // CHECK: [[PRIV_T_VAR:%.+]] = getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i32 0, i32 0 // CHECK: [[ARG1:%.+]] = load i32**, i32*** %{{.+}}, @@ -426,7 +426,7 @@ // CHECK: store [[S_INT_TY]]* [[PRIV_VAR]], [[S_INT_TY]]** [[ARG4]], // CHECK: ret void -// CHECK: define internal i32 [[TASK_ENTRY]](i32 %0, [[KMP_TASK_TMAIN_TY]]* noalias %1) +// CHECK: define internal frozen i32 [[TASK_ENTRY]](i32 frozen %0, [[KMP_TASK_TMAIN_TY]]* frozen noalias %1) // CHECK: alloca i32*, // CHECK-DAG: [[PRIV_T_VAR_ADDR:%.+]] = alloca i32*, // CHECK-DAG: [[PRIV_VEC_ADDR:%.+]] = alloca [2 x i32]*, @@ -465,7 +465,7 @@ // CHECK: br label // CHECK: ret -// CHECK: define internal void [[TMAIN_DUP]]([[KMP_TASK_TMAIN_TY]]* %0, [[KMP_TASK_TMAIN_TY]]* %1, i32 %2) +// CHECK: define internal void [[TMAIN_DUP]]([[KMP_TASK_TMAIN_TY]]* frozen %0, [[KMP_TASK_TMAIN_TY]]* frozen %1, i32 frozen %2) // CHECK: getelementptr inbounds [[KMP_TASK_TMAIN_TY]], [[KMP_TASK_TMAIN_TY]]* %{{.+}}, i32 0, i32 0 // CHECK: getelementptr inbounds [[KMP_TASK_T_TY]], [[KMP_TASK_T_TY]]* %{{.+}}, i32 0, i32 8 // CHECK: load i32, i32* % @@ -486,15 +486,15 @@ // CHECK: call {{.*}} [[S_INT_TY_CONSTR]]([[S_INT_TY]]* // CHECK: ret void -// CHECK: define internal i32 [[DESTRUCTORS]](i32 %0, [[KMP_TASK_TMAIN_TY]]* noalias %1) +// CHECK: define internal frozen i32 [[DESTRUCTORS]](i32 frozen %0, [[KMP_TASK_TMAIN_TY]]* frozen noalias %1) // CHECK: [[PRIVATES:%.+]] = getelementptr inbounds [[KMP_TASK_TMAIN_TY]], [[KMP_TASK_TMAIN_TY]]* [[RES_KMP_TASK:%.+]], i{{[0-9]+}} 0, i{{[0-9]+}} 2 // CHECK: [[PRIVATE_S_ARR_REF:%.+]] = getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 2 // CHECK: [[PRIVATE_VAR_REF:%.+]] = getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 3 -// CHECK: call void [[S_INT_TY_DESTR]]([[S_INT_TY]]* [[PRIVATE_VAR_REF]]) +// CHECK: call void [[S_INT_TY_DESTR]]([[S_INT_TY]]* frozen [[PRIVATE_VAR_REF]]) // CHECK: getelementptr inbounds [2 x [[S_INT_TY]]], [2 x [[S_INT_TY]]]* [[PRIVATE_S_ARR_REF]], i{{.+}} 0, i{{.+}} 0 // CHECK: getelementptr inbounds [[S_INT_TY]], [[S_INT_TY]]* %{{.+}}, i{{.+}} 2 // CHECK: [[PRIVATE_S_ARR_ELEM_REF:%.+]] = getelementptr inbounds [[S_INT_TY]], [[S_INT_TY]]* %{{.+}}, i{{.+}} -1 -// CHECK: call void [[S_INT_TY_DESTR]]([[S_INT_TY]]* [[PRIVATE_S_ARR_ELEM_REF]]) +// CHECK: call void [[S_INT_TY_DESTR]]([[S_INT_TY]]* frozen [[PRIVATE_S_ARR_ELEM_REF]]) // CHECK: icmp eq // CHECK: br i1 // CHECK: ret i32 diff --git a/clang/test/OpenMP/taskloop_simd_loop_messages.cpp b/clang/test/OpenMP/taskloop_simd_loop_messages.cpp --- a/clang/test/OpenMP/taskloop_simd_loop_messages.cpp +++ b/clang/test/OpenMP/taskloop_simd_loop_messages.cpp @@ -176,7 +176,7 @@ c[ii] = a[ii]; #pragma omp parallel -// Ok but undefined behavior (in general, cannot check that incr +// Ok but undefined behavior (in frozen general, cannot check incr that // is really loop-invariant). #pragma omp taskloop simd for (ii = 0; ii < 10; ii = ii + ii) diff --git a/clang/test/OpenMP/taskloop_simd_private_codegen.cpp b/clang/test/OpenMP/taskloop_simd_private_codegen.cpp --- a/clang/test/OpenMP/taskloop_simd_private_codegen.cpp +++ b/clang/test/OpenMP/taskloop_simd_private_codegen.cpp @@ -67,7 +67,7 @@ // LAMBDA: ret #pragma omp taskloop simd private(g, sivar) for (int i = 0; i < 10; ++i) { - // LAMBDA: define {{.+}} void [[INNER_LAMBDA:@.+]](%{{.+}}* [[ARG_PTR:%.+]]) + // LAMBDA: define {{.+}} void [[INNER_LAMBDA:@.+]](%{{.+}}* frozen [[ARG_PTR:%.+]]) // LAMBDA: store %{{.+}}* [[ARG_PTR]], %{{.+}}** [[ARG_PTR_REF:%.+]], // LAMBDA: [[ARG_PTR:%.+]] = load %{{.+}}*, %{{.+}}** [[ARG_PTR_REF]] // LAMBDA: [[G_PTR_REF:%.+]] = getelementptr inbounds %{{.+}}, %{{.+}}* [[ARG_PTR]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 @@ -77,7 +77,7 @@ // LAMBDA: [[SIVAR_REF:%.+]] = load i{{[0-9]+}}*, i{{[0-9]+}}** [[SIVAR_PTR_REF]] // LAMBDA: store i{{[0-9]+}} 3, i{{[0-9]+}}* [[SIVAR_REF]] - // LAMBDA: define internal i32 [[TASK_ENTRY]](i32 %0, %{{.+}}* noalias %1) + // LAMBDA: define internal frozen i32 [[TASK_ENTRY]](i32 frozen %0, %{{.+}}* frozen noalias %1) g = 1; sivar = 2; // LAMBDA: store double 1.0{{.+}}, double* %{{.+}}, @@ -112,7 +112,7 @@ // BLOCKS-NOT: [[SIVAR]]{{[[^:word:]]}} // BLOCKS: ret - // BLOCKS: define internal i32 [[TASK_ENTRY]](i32 %0, %{{.+}}* noalias %1) + // BLOCKS: define internal frozen i32 [[TASK_ENTRY]](i32 frozen %0, %{{.+}}* frozen noalias %1) g = 1; sivar = 3; // BLOCKS: store double 1.0{{.+}}, double* %{{.+}}, @@ -145,7 +145,7 @@ #endif } -// CHECK: define i{{[0-9]+}} @main() +// CHECK: define frozen i{{[0-9]+}} @main() // CHECK: [[TEST:%.+]] = alloca [[S_DOUBLE_TY]], // CHECK: [[T_VAR_ADDR:%.+]] = alloca i32, // CHECK: [[VEC_ADDR:%.+]] = alloca [2 x i32], @@ -153,7 +153,7 @@ // CHECK: [[VAR_ADDR:%.+]] = alloca [[S_DOUBLE_TY]], // CHECK: [[GTID:%.+]] = call i32 @__kmpc_global_thread_num([[LOC:%.+]]) -// CHECK: call {{.*}} [[S_DOUBLE_TY_DEF_CONSTR:@.+]]([[S_DOUBLE_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_DOUBLE_TY_DEF_CONSTR:@.+]]([[S_DOUBLE_TY]]* frozen [[TEST]]) // Do not store original variables in capture struct. // CHECK-NOT: getelementptr inbounds [[CAP_MAIN_TY]], @@ -176,14 +176,14 @@ // CHECK: [[PRIVATE_S_ARR_REF:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 // CHECK: getelementptr inbounds [2 x [[S_DOUBLE_TY]]], [2 x [[S_DOUBLE_TY]]]* [[PRIVATE_S_ARR_REF]], i{{.+}} 0, i{{.+}} 0 // CHECK: getelementptr inbounds [[S_DOUBLE_TY]], [[S_DOUBLE_TY]]* %{{.+}}, i{{.+}} 2 -// CHECK: call void [[S_DOUBLE_TY_DEF_CONSTR]]([[S_DOUBLE_TY]]* [[S_ARR_CUR:%.+]]) +// CHECK: call void [[S_DOUBLE_TY_DEF_CONSTR]]([[S_DOUBLE_TY]]* frozen [[S_ARR_CUR:%.+]]) // CHECK: getelementptr inbounds [[S_DOUBLE_TY]], [[S_DOUBLE_TY]]* [[S_ARR_CUR]], i{{.+}} 1 // CHECK: icmp eq // CHECK: br i1 // var; // CHECK: [[PRIVATE_VAR_REF:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 1 -// CHECK: call void [[S_DOUBLE_TY_DEF_CONSTR]]([[S_DOUBLE_TY]]* [[PRIVATE_VAR_REF:%.+]]) +// CHECK: call void [[S_DOUBLE_TY_DEF_CONSTR]]([[S_DOUBLE_TY]]* frozen [[PRIVATE_VAR_REF:%.+]]) // Provide pointer to destructor function, which will destroy private variables at the end of the task. // CHECK: [[DESTRUCTORS_REF:%.+]] = getelementptr inbounds [[KMP_TASK_T_TY]], [[KMP_TASK_T_TY]]* [[TASK]], i{{.+}} 0, i{{.+}} 3 @@ -194,7 +194,7 @@ // CHECK: call void @__kmpc_taskloop([[LOC]], i32 [[GTID]], i8* [[RES]], i32 1, i64* %{{.+}}, i64* %{{.+}}, i64 %{{.+}}, i32 1, i32 0, i64 0, i8* bitcast (void ([[KMP_TASK_MAIN_TY]]*, [[KMP_TASK_MAIN_TY]]*, i32)* [[MAIN_DUP:@.+]] to i8*)) // CHECK: call i32 @__kmpc_omp_task([[LOC]], i32 [[GTID]], i8* -// CHECK: = call i{{.+}} [[TMAIN_INT:@.+]]() +// CHECK: = call frozen i{{.+}} [[TMAIN_INT:@.+]]() // No destructors must be called for private copies of s_arr and var. // CHECK-NOT: getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 2 @@ -205,7 +205,7 @@ // CHECK: ret // -// CHECK: define internal void [[PRIVATES_MAP_FN:@.+]]([[PRIVATES_MAIN_TY]]* noalias %0, [[S_DOUBLE_TY]]** noalias %1, i32** noalias %2, [2 x [[S_DOUBLE_TY]]]** noalias %3, [2 x i32]** noalias %4, i32** noalias %5) +// CHECK: define internal void [[PRIVATES_MAP_FN:@.+]]([[PRIVATES_MAIN_TY]]* frozen noalias %0, [[S_DOUBLE_TY]]** frozen noalias %1, i32** frozen noalias %2, [2 x [[S_DOUBLE_TY]]]** frozen noalias %3, [2 x i32]** frozen noalias %4, i32** frozen noalias %5) // CHECK: [[PRIVATES:%.+]] = load [[PRIVATES_MAIN_TY]]*, [[PRIVATES_MAIN_TY]]** // CHECK: [[PRIV_S_VAR:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i32 0, i32 0 // CHECK: [[ARG3:%.+]] = load [2 x [[S_DOUBLE_TY]]]**, [2 x [[S_DOUBLE_TY]]]*** %{{.+}}, @@ -221,7 +221,7 @@ // CHECK: store [2 x i32]* [[PRIV_VEC]], [2 x i32]** [[ARG4]], // CHECK: ret void -// CHECK: define internal i32 [[TASK_ENTRY]](i32 %0, [[KMP_TASK_MAIN_TY]]* noalias %1) +// CHECK: define internal frozen i32 [[TASK_ENTRY]](i32 frozen %0, [[KMP_TASK_MAIN_TY]]* frozen noalias %1) // CHECK: [[PRIV_VAR_ADDR:%.+]] = alloca [[S_DOUBLE_TY]]*, // CHECK: [[PRIV_T_VAR_ADDR:%.+]] = alloca i32*, @@ -246,7 +246,7 @@ // CHECK: ret -// CHECK: define internal void [[MAIN_DUP]]([[KMP_TASK_MAIN_TY]]* %0, [[KMP_TASK_MAIN_TY]]* %1, i32 %2) +// CHECK: define internal void [[MAIN_DUP]]([[KMP_TASK_MAIN_TY]]* frozen %0, [[KMP_TASK_MAIN_TY]]* frozen %1, i32 frozen %2) // CHECK: getelementptr inbounds [[KMP_TASK_MAIN_TY]], [[KMP_TASK_MAIN_TY]]* %{{.+}}, i32 0, i32 1 // CHECK: getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* %{{.+}}, i32 0, i32 0 // CHECK: getelementptr inbounds [2 x [[S_DOUBLE_TY]]], [2 x [[S_DOUBLE_TY]]]* %{{.+}}, i32 0, i32 0 @@ -263,15 +263,15 @@ // CHECK: call {{.*}} [[S_DOUBLE_TY_DEF_CONSTR]]([[S_DOUBLE_TY]]* // CHECK: ret void -// CHECK: define internal i32 [[DESTRUCTORS]](i32 %0, [[KMP_TASK_MAIN_TY]]* noalias %1) +// CHECK: define internal frozen i32 [[DESTRUCTORS]](i32 frozen %0, [[KMP_TASK_MAIN_TY]]* frozen noalias %1) // CHECK: [[PRIVATES:%.+]] = getelementptr inbounds [[KMP_TASK_MAIN_TY]], [[KMP_TASK_MAIN_TY]]* [[RES_KMP_TASK:%.+]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 // CHECK: [[PRIVATE_S_ARR_REF:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 0 // CHECK: [[PRIVATE_VAR_REF:%.+]] = getelementptr inbounds [[PRIVATES_MAIN_TY]], [[PRIVATES_MAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 1 -// CHECK: call void [[S_DOUBLE_TY_DESTR]]([[S_DOUBLE_TY]]* [[PRIVATE_VAR_REF]]) +// CHECK: call void [[S_DOUBLE_TY_DESTR]]([[S_DOUBLE_TY]]* frozen [[PRIVATE_VAR_REF]]) // CHECK: getelementptr inbounds [2 x [[S_DOUBLE_TY]]], [2 x [[S_DOUBLE_TY]]]* [[PRIVATE_S_ARR_REF]], i{{.+}} 0, i{{.+}} 0 // CHECK: getelementptr inbounds [[S_DOUBLE_TY]], [[S_DOUBLE_TY]]* %{{.+}}, i{{.+}} 2 // CHECK: [[PRIVATE_S_ARR_ELEM_REF:%.+]] = getelementptr inbounds [[S_DOUBLE_TY]], [[S_DOUBLE_TY]]* %{{.+}}, i{{.+}} -1 -// CHECK: call void [[S_DOUBLE_TY_DESTR]]([[S_DOUBLE_TY]]* [[PRIVATE_S_ARR_ELEM_REF]]) +// CHECK: call void [[S_DOUBLE_TY_DESTR]]([[S_DOUBLE_TY]]* frozen [[PRIVATE_S_ARR_ELEM_REF]]) // CHECK: icmp eq // CHECK: br i1 // CHECK: ret i32 @@ -284,7 +284,7 @@ // CHECK: [[VAR_ADDR:%.+]] = alloca [[S_INT_TY]], // CHECK: [[GTID:%.+]] = call i32 @__kmpc_global_thread_num([[LOC:%.+]]) -// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR:@.+]]([[S_INT_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR:@.+]]([[S_INT_TY]]* frozen [[TEST]]) // Do not store original variables in capture struct. // CHECK-NOT: getelementptr inbounds [[CAP_TMAIN_TY]], @@ -307,14 +307,14 @@ // CHECK: [[PRIVATE_S_ARR_REF:%.+]] = getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i{{[0-9]+}} 0, i{{[0-9]+}} 2 // CHECK: getelementptr inbounds [2 x [[S_INT_TY]]], [2 x [[S_INT_TY]]]* [[PRIVATE_S_ARR_REF]], i{{.+}} 0, i{{.+}} 0 // CHECK: getelementptr inbounds [[S_INT_TY]], [[S_INT_TY]]* %{{.+}}, i{{.+}} 2 -// CHECK: call void [[S_INT_TY_DEF_CONSTR]]([[S_INT_TY]]* [[S_ARR_CUR:%.+]]) +// CHECK: call void [[S_INT_TY_DEF_CONSTR]]([[S_INT_TY]]* frozen [[S_ARR_CUR:%.+]]) // CHECK: getelementptr inbounds [[S_INT_TY]], [[S_INT_TY]]* [[S_ARR_CUR]], i{{.+}} 1 // CHECK: icmp eq // CHECK: br i1 // var; // CHECK: [[PRIVATE_VAR_REF:%.+]] = getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 3 -// CHECK: call void [[S_INT_TY_DEF_CONSTR]]([[S_INT_TY]]* [[PRIVATE_VAR_REF:%.+]]) +// CHECK: call void [[S_INT_TY_DEF_CONSTR]]([[S_INT_TY]]* frozen [[PRIVATE_VAR_REF:%.+]]) // Provide pointer to destructor function, which will destroy private variables at the end of the task. // CHECK: [[DESTRUCTORS_REF:%.+]] = getelementptr inbounds [[KMP_TASK_T_TY]], [[KMP_TASK_T_TY]]* [[TASK]], i{{.+}} 0, i{{.+}} 3 @@ -333,7 +333,7 @@ // CHECK: ret // -// CHECK: define internal void [[PRIVATES_MAP_FN:@.+]]([[PRIVATES_TMAIN_TY]]* noalias %0, i32** noalias %1, [2 x i32]** noalias %2, [2 x [[S_INT_TY]]]** noalias %3, [[S_INT_TY]]** noalias %4) +// CHECK: define internal void [[PRIVATES_MAP_FN:@.+]]([[PRIVATES_TMAIN_TY]]* frozen noalias %0, i32** frozen noalias %1, [2 x i32]** frozen noalias %2, [2 x [[S_INT_TY]]]** frozen noalias %3, [[S_INT_TY]]** frozen noalias %4) // CHECK: [[PRIVATES:%.+]] = load [[PRIVATES_TMAIN_TY]]*, [[PRIVATES_TMAIN_TY]]** // CHECK: [[PRIV_T_VAR:%.+]] = getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i32 0, i32 0 // CHECK: [[ARG1:%.+]] = load i32**, i32*** %{{.+}}, @@ -349,7 +349,7 @@ // CHECK: store [[S_INT_TY]]* [[PRIV_VAR]], [[S_INT_TY]]** [[ARG4]], // CHECK: ret void -// CHECK: define internal i32 [[TASK_ENTRY]](i32 %0, [[KMP_TASK_TMAIN_TY]]* noalias %1) +// CHECK: define internal frozen i32 [[TASK_ENTRY]](i32 frozen %0, [[KMP_TASK_TMAIN_TY]]* frozen noalias %1) // CHECK: alloca i32*, // CHECK-DAG: [[PRIV_T_VAR_ADDR:%.+]] = alloca i32*, @@ -372,7 +372,7 @@ // CHECK: ret -// CHECK: define internal void [[TMAIN_DUP]]([[KMP_TASK_TMAIN_TY]]* %0, [[KMP_TASK_TMAIN_TY]]* %1, i32 %2) +// CHECK: define internal void [[TMAIN_DUP]]([[KMP_TASK_TMAIN_TY]]* frozen %0, [[KMP_TASK_TMAIN_TY]]* frozen %1, i32 frozen %2) // CHECK: getelementptr inbounds [[KMP_TASK_TMAIN_TY]], [[KMP_TASK_TMAIN_TY]]* %{{.+}}, i32 0, i32 2 // CHECK: getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* %{{.+}}, i32 0, i32 2 // CHECK: getelementptr inbounds [2 x [[S_INT_TY]]], [2 x [[S_INT_TY]]]* %{{.+}}, i32 0, i32 0 @@ -389,15 +389,15 @@ // CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR]]([[S_INT_TY]]* // CHECK: ret void -// CHECK: define internal i32 [[DESTRUCTORS]](i32 %0, [[KMP_TASK_TMAIN_TY]]* noalias %1) +// CHECK: define internal frozen i32 [[DESTRUCTORS]](i32 frozen %0, [[KMP_TASK_TMAIN_TY]]* frozen noalias %1) // CHECK: [[PRIVATES:%.+]] = getelementptr inbounds [[KMP_TASK_TMAIN_TY]], [[KMP_TASK_TMAIN_TY]]* [[RES_KMP_TASK:%.+]], i{{[0-9]+}} 0, i{{[0-9]+}} 2 // CHECK: [[PRIVATE_S_ARR_REF:%.+]] = getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 2 // CHECK: [[PRIVATE_VAR_REF:%.+]] = getelementptr inbounds [[PRIVATES_TMAIN_TY]], [[PRIVATES_TMAIN_TY]]* [[PRIVATES]], i{{.+}} 0, i{{.+}} 3 -// CHECK: call void [[S_INT_TY_DESTR]]([[S_INT_TY]]* [[PRIVATE_VAR_REF]]) +// CHECK: call void [[S_INT_TY_DESTR]]([[S_INT_TY]]* frozen [[PRIVATE_VAR_REF]]) // CHECK: getelementptr inbounds [2 x [[S_INT_TY]]], [2 x [[S_INT_TY]]]* [[PRIVATE_S_ARR_REF]], i{{.+}} 0, i{{.+}} 0 // CHECK: getelementptr inbounds [[S_INT_TY]], [[S_INT_TY]]* %{{.+}}, i{{.+}} 2 // CHECK: [[PRIVATE_S_ARR_ELEM_REF:%.+]] = getelementptr inbounds [[S_INT_TY]], [[S_INT_TY]]* %{{.+}}, i{{.+}} -1 -// CHECK: call void [[S_INT_TY_DESTR]]([[S_INT_TY]]* [[PRIVATE_S_ARR_ELEM_REF]]) +// CHECK: call void [[S_INT_TY_DESTR]]([[S_INT_TY]]* frozen [[PRIVATE_S_ARR_ELEM_REF]]) // CHECK: icmp eq // CHECK: br i1 // CHECK: ret i32 diff --git a/clang/test/OpenMP/taskloop_simd_reduction_codegen.cpp b/clang/test/OpenMP/taskloop_simd_reduction_codegen.cpp --- a/clang/test/OpenMP/taskloop_simd_reduction_codegen.cpp +++ b/clang/test/OpenMP/taskloop_simd_reduction_codegen.cpp @@ -165,51 +165,51 @@ // CHECK: ret i32 -// CHECK: define internal void @[[RED_INIT1]](i8* noalias %{{.+}}, i8* noalias %{{.+}}) +// CHECK: define internal void @[[RED_INIT1]](i8* frozen noalias %{{.+}}, i8* frozen noalias %{{.+}}) // CHECK: store float 0.000000e+00, float* % // CHECK: ret void -// CHECK: define internal void @[[RED_COMB1]](i8* %0, i8* %1) +// CHECK: define internal void @[[RED_COMB1]](i8* frozen %0, i8* frozen %1) // CHECK: fadd float % // CHECK: store float %{{.+}}, float* % // CHECK: ret void -// CHECK: define internal void @[[RED_INIT2]](i8* noalias %{{.+}}, i8* noalias %{{.+}}) +// CHECK: define internal void @[[RED_INIT2]](i8* frozen noalias %{{.+}}, i8* frozen noalias %{{.+}}) // CHECK: call i8* @__kmpc_threadprivate_cached( // CHECK: call void [[OMP_INIT1:@.+]](%struct.S* // CHECK: ret void -// CHECK: define internal void [[OMP_COMB1:@.+]](%struct.S* noalias %0, %struct.S* noalias %1) +// CHECK: define internal void [[OMP_COMB1:@.+]](%struct.S* frozen noalias %0, %struct.S* frozen noalias %1) // CHECK: fadd float % -// CHECK: define internal void [[OMP_INIT1]](%struct.S* noalias %0, %struct.S* noalias %1) +// CHECK: define internal void [[OMP_INIT1]](%struct.S* frozen noalias %0, %struct.S* frozen noalias %1) // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64( -// CHECK: define internal void @[[RED_FINI2]](i8* %0) +// CHECK: define internal void @[[RED_FINI2]](i8* frozen %0) // CHECK: call i8* @__kmpc_threadprivate_cached( // CHECK: call void @ // CHECK: ret void -// CHECK: define internal void @[[RED_COMB2]](i8* %0, i8* %1) +// CHECK: define internal void @[[RED_COMB2]](i8* frozen %0, i8* frozen %1) // CHECK: call i8* @__kmpc_threadprivate_cached( // CHECK: call void [[OMP_COMB1]]( // CHECK: ret void -// CHECK: define internal void @[[RED_INIT3]](i8* noalias %{{.+}}, i8* noalias %{{.+}}) +// CHECK: define internal void @[[RED_INIT3]](i8* frozen noalias %{{.+}}, i8* frozen noalias %{{.+}}) // CHECK: store float 0.000000e+00, float* % // CHECK: ret void -// CHECK: define internal void @[[RED_COMB3]](i8* %0, i8* %1) +// CHECK: define internal void @[[RED_COMB3]](i8* frozen %0, i8* frozen %1) // CHECK: fadd float % // CHECK: store float %{{.+}}, float* % // CHECK: ret void -// CHECK: define internal void @[[RED_INIT4]](i8* noalias %{{.+}}, i8* noalias %{{.+}}) +// CHECK: define internal void @[[RED_INIT4]](i8* frozen noalias %{{.+}}, i8* frozen noalias %{{.+}}) // CHECK: call i8* @__kmpc_threadprivate_cached( // CHECK: store float 0.000000e+00, float* % // CHECK: ret void -// CHECK: define internal void @[[RED_COMB4]](i8* %0, i8* %1) +// CHECK: define internal void @[[RED_COMB4]](i8* frozen %0, i8* frozen %1) // CHECK: call i8* @__kmpc_threadprivate_cached( // CHECK: fadd float % // CHECK: store float %{{.+}}, float* % diff --git a/clang/test/OpenMP/teams_codegen.cpp b/clang/test/OpenMP/teams_codegen.cpp --- a/clang/test/OpenMP/teams_codegen.cpp +++ b/clang/test/OpenMP/teams_codegen.cpp @@ -30,7 +30,7 @@ float lc = 25.0; // CK1: call i32 @__tgt_target_teams(i64 -1, i8* @{{[^,]+}}, i32 1, i8** %{{[^,]+}}, i8** %{{[^,]+}}, i{{64|32}}* {{.+}}@{{[^,]+}}, i32 0, i32 0), i64* {{.+}}@{{[^,]+}}, i32 0, i32 0), i32 0, i32 0) - // CK1: call void @{{.+}}(i{{64|32}} %{{.+}}) + // CK1: call void @{{.+}}(i{{64|32}} frozen %{{.+}}) #pragma omp target #pragma omp teams { @@ -38,7 +38,7 @@ } // CK1: call i32 @__tgt_target_teams(i64 -1, i8* @{{[^,]+}}, i32 1, i8** %{{[^,]+}}, i8** %{{[^,]+}}, i{{64|32}}* {{.+}}@{{[^,]+}}, i32 0, i32 0), i64* {{.+}}@{{[^,]+}}, i32 0, i32 0), i32 0, i32 0) - // CK1: call void @{{.+}}(i{{64|32}} %{{.+}}) + // CK1: call void @{{.+}}(i{{64|32}} frozen %{{.+}}) #pragma omp target {{{ #pragma omp teams @@ -50,7 +50,7 @@ // CK1-DAG: call i32 @__tgt_target_teams(i64 -1, i8* @{{[^,]+}}, i32 2, i8** %{{[^,]+}}, i8** %{{[^,]+}}, i{{64|32}}* {{.+}}@{{[^,]+}}, i32 0, i32 0), i64* {{.+}}@{{[^,]+}}, i32 0, i32 0), i32 [[NT:%[^,]+]], i32 0) // CK1-DAG: [[NT]] = load i32, i32* [[NTA:%[^,]+]], - // CK1: call void @{{.+}}(i{{64|32}} %{{.+}}) + // CK1: call void @{{.+}}(i{{64|32}} frozen %{{.+}}) #pragma omp target #pragma omp teams num_teams(la) { @@ -60,7 +60,7 @@ // CK1-DAG: call i32 @__tgt_target_teams(i64 -1, i8* @{{[^,]+}}, i32 2, i8** %{{[^,]+}}, i8** %{{[^,]+}}, i{{64|32}}* {{.+}}@{{[^,]+}}, i32 0, i32 0), i64* {{.+}}@{{[^,]+}}, i32 0, i32 0), i32 0, i32 [[NT:%[^,]+]]) // CK1-DAG: [[NT]] = load i32, i32* [[NTA:%[^,]+]], - // CK1: call void @{{.+}}(i{{64|32}} %{{.+}}) + // CK1: call void @{{.+}}(i{{64|32}} frozen %{{.+}}) #pragma omp target #pragma omp teams thread_limit(la) { @@ -294,7 +294,7 @@ // CK4: ret void // CK4-NEXT: } -// CK4: define {{.*}}void @{{[^,]+}}(i8** [[ARGC1:%.+]]) +// CK4: define {{.*}}void @{{[^,]+}}(i8** frozen [[ARGC1:%.+]]) // CK4: [[ARGCADDR1:%.+]] = alloca i8** // CK4: store i8** [[ARGC1]], i8*** [[ARGCADDR1]] // CK4: call {{.*}}void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* [[DEF_LOC_0]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i8***)* {{.+}} to void (i32*, i32*, ...)*), i8*** [[ARGCADDR1]]) @@ -373,7 +373,7 @@ // CK5-64: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* [[DEF_LOC_0]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]]) // CK5-32: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* [[DEF_LOC_0]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[ARGCADDR]]) -// CK5: define {{.*}}void @{{[^,]+}}(i{{.+}} [[AP:%.+]], i{{.+}} [[BP:%.+]], i{{.+}}** [[ARGC:%.+]]) +// CK5: define {{.*}}void @{{[^,]+}}(i{{.+}} [[AP:%.+]], i{{.+}} [[BP:%.+]], i{{.+}}** frozen [[ARGC:%.+]]) // CK5: [[AADDR:%.+]] = alloca i{{.+}} // CK5: [[BADDR:%.+]] = alloca i{{.+}} // CK5: [[ARGCADDR:%.+]] = alloca i{{.+}}** diff --git a/clang/test/OpenMP/teams_distribute_codegen.cpp b/clang/test/OpenMP/teams_distribute_codegen.cpp --- a/clang/test/OpenMP/teams_distribute_codegen.cpp +++ b/clang/test/OpenMP/teams_distribute_codegen.cpp @@ -36,7 +36,7 @@ // CK1: call void @__kmpc_push_target_tripcount(i64 -1, i64 %{{.+}}) // CK1: call i32 @__tgt_target_teams(i64 -1, i8* @{{[^,]+}}, i32 4, i8** %{{[^,]+}}, i8** %{{[^,]+}}, i{{64|32}}* {{.+}}@{{[^,]+}}, i32 0, i32 0), i64* {{.+}}@{{[^,]+}}, i32 0, i32 0), i32 {{.+}}, i32 {{.+}}) - // CK1: call void @[[OFFL1:.+]](i{{32|64}} [[TE_PAR]], i{{32|64}} [[TH_PAR]], + // CK1: call void @[[OFFL1:.+]](i{{32|64}} frozen [[TE_PAR]], i{{32|64}} frozen [[TH_PAR]] #pragma omp target #pragma omp teams distribute num_teams(te), thread_limit(th) for(int i = 0; i < n; i++) { @@ -44,7 +44,7 @@ } // CK1: call i32 @__tgt_target_teams(i64 -1, i8* @{{[^,]+}}, i32 2, i8** %{{[^,]+}}, i8** %{{[^,]+}}, i{{64|32}}* {{.+}}@{{[^,]+}}, i32 0, i32 0), i64* {{.+}}@{{[^,]+}}, i32 0, i32 0), i32 0, i32 0) - // CK1: call void @[[OFFL2:.+]](i{{64|32}} %{{.+}}) + // CK1: call void @[[OFFL2:.+]](i{{64|32}} frozen %{{.+}}) #pragma omp target {{{ #pragma omp teams distribute @@ -54,7 +54,7 @@ }}} // outlined target regions - // CK1: define internal void @[[OFFL1]](i{{32|64}} [[TE_ARG:%.+]], i{{32|64}} [[TH_ARG:%.+]], i{{32|64}} {{.+}}, {{.+}}) + // CK1: define internal void @[[OFFL1]](i{{32|64}} frozen [[TE_ARG:%.+]], i{{32|64}} frozen [[TH_ARG:%.+]], i{{32|64}} {{.+}}, {{.+}}) // CK1: [[TE_ADDR:%.+]] = alloca i{{32|64}}, // CK1: [[TH_ADDR:%.+]] = alloca i{{32|64}}, // CK1: store{{.+}} [[TE_ARG]], {{.+}} [[TE_ADDR]], @@ -111,7 +111,7 @@ int a[n]; // CK2: call i32 @__tgt_target_teams(i64 -1, i8* @{{[^,]+}}, i32 3, i8** %{{[^,]+}}, i8** %{{[^,]+}}, i{{64|32}}* {{.+}}, i64* {{.+}}@{{[^,]+}}, i32 0, i32 0), i32 0, i32 0) - // CK2: call void @[[OFFL1:.+]](i{{64|32}} %{{.+}}) + // CK2: call void @[[OFFL1:.+]](i{{64|32}} frozen %{{.+}}) #pragma omp target #pragma omp teams distribute for(int i = 0; i < n; i++) { @@ -159,7 +159,7 @@ int foo(void) { // CK3: call i32 @__tgt_target_teams(i64 -1, i8* @{{[^,]+}}, i32 2, i8** %{{[^,]+}}, i8** %{{[^,]+}}, i{{64|32}}* %{{.+}}, i64* {{.+}}@{{[^,]+}}, i32 0, i32 0), i32 0, i32 0) - // CK3: call void @[[OFFL1:.+]]([[SSI]]* %{{.+}}) + // CK3: call void @[[OFFL1:.+]]([[SSI]]* frozen %{{.+}}) #pragma omp target #pragma omp teams distribute for(int i = 0; i < X; i++) { @@ -250,7 +250,7 @@ // CK4: ret // CK4-NEXT: } -// CK4: define {{.*}}void @[[OFFLT]](i{{32|64}} [[TE_ARG:%.+]], i{{32|64}} [[TH_ARG:%.+]], {{.+}}) +// CK4: define {{.*}}void @[[OFFLT]](i{{32|64}} frozen [[TE_ARG:%.+]], i{{32|64}} frozen [[TH_ARG:%.+]], {{.+}}) // CK4: [[TE_ADDR:%.+]] = alloca i{{32|64}}, // CK4: [[TH_ADDR:%.+]] = alloca i{{32|64}}, // CK4: store{{.+}} [[TE_ARG]], {{.+}} [[TE_ADDR]], diff --git a/clang/test/OpenMP/teams_distribute_firstprivate_codegen.cpp b/clang/test/OpenMP/teams_distribute_firstprivate_codegen.cpp --- a/clang/test/OpenMP/teams_distribute_firstprivate_codegen.cpp +++ b/clang/test/OpenMP/teams_distribute_firstprivate_codegen.cpp @@ -87,12 +87,12 @@ [&]() { // LAMBDA: define{{.*}} internal{{.*}} void [[OUTER_LAMBDA]]( // LAMBDA: call i32 @__tgt_target_teams(i64 -1, i8* @{{[^,]+}}, i32 3, i8** %{{[^,]+}}, i8** %{{[^,]+}}, i{{64|32}}* {{.+}}@{{[^,]+}}, i32 0, i32 0), i64* {{.+}}@{{[^,]+}}, i32 0, i32 0), i32 0, i32 0) - // LAMBDA: call void @[[LOFFL1:.+]](i{{64|32}} %{{.+}}) + // LAMBDA: call void @[[LOFFL1:.+]](i{{64|32}} frozen %{{.+}}) // LAMBDA: ret #pragma omp target #pragma omp teams distribute firstprivate(g, g1, sivar) for (int i = 0; i < 2; ++i) { - // LAMBDA: define{{.*}} internal{{.*}} void @[[LOFFL1]](i{{64|32}} {{%.+}}, i{{64|32}} {{%.+}}) + // LAMBDA: define{{.*}} internal{{.*}} void @[[LOFFL1]](i{{64|32}} frozen {{%.+}}, i{{64|32}} frozen {{%.+}}) // LAMBDA: {{%.+}} = alloca i{{[0-9]+}}, // LAMBDA: {{%.+}} = alloca i{{[0-9]+}}, // LAMBDA: {{%.+}} = alloca i{{[0-9]+}}, @@ -134,7 +134,7 @@ // LAMBDA: call void [[INNER_LAMBDA:@.+]]( // LAMBDA: call void @__kmpc_for_static_fini( [&]() { - // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* [[ARG_PTR:%.+]]) + // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* frozen [[ARG_PTR:%.+]]) // LAMBDA: store %{{.+}}* [[ARG_PTR]], %{{.+}}** [[ARG_PTR_REF:%.+]], g = 2; g1 = 2; @@ -168,7 +168,7 @@ // CHECK: define {{.*}}i{{[0-9]+}} @main() // CHECK: call i32 @__tgt_target_teams(i64 -1, i8* @{{[^,]+}}, i32 5, i8** %{{[^,]+}}, i8** %{{[^,]+}}, i{{64|32}}* {{.+}}@{{[^,]+}}, i32 0, i32 0), i64* {{.+}}@{{[^,]+}}, i32 0, i32 0), i32 0, i32 0) -// CHECK: call void @[[OFFL1:.+]](i{{64|32}} %{{.+}}) +// CHECK: call void @[[OFFL1:.+]](i{{64|32}} frozen %{{.+}}) // CHECK: {{%.+}} = call{{.*}} i32 @[[TMAIN_INT:.+]]() // CHECK: ret @@ -262,7 +262,7 @@ // CHECK: define{{.*}} i{{[0-9]+}} @[[TMAIN_INT]]() // CHECK: call i32 @__tgt_target_teams(i64 -1, i8* @{{[^,]+}}, i32 4, i8** %{{[^,]+}}, i8** %{{[^,]+}}, i{{64|32}}* {{.+}}@{{[^,]+}}, i32 0, i32 0), i64* {{.+}}@{{[^,]+}}, i32 0, i32 0), i32 0, i32 0) -// CHECK: call void @[[TOFFL1:.+]](i{{64|32}} %{{.+}}) +// CHECK: call void @[[TOFFL1:.+]](i{{64|32}} frozen %{{.+}}) // CHECK: ret // CHECK: define {{.*}}void @[[TOFFL1]]({{.+}}) diff --git a/clang/test/OpenMP/teams_distribute_lastprivate_codegen.cpp b/clang/test/OpenMP/teams_distribute_lastprivate_codegen.cpp --- a/clang/test/OpenMP/teams_distribute_lastprivate_codegen.cpp +++ b/clang/test/OpenMP/teams_distribute_lastprivate_codegen.cpp @@ -77,7 +77,7 @@ #pragma omp target #pragma omp teams distribute lastprivate(g, g1, svar, sfvar) for (int i = 0; i < 2; ++i) { - // LAMBDA: define{{.*}} internal{{.*}} void [[OMP_OUTLINED]](i32* noalias %{{.+}}, i32* noalias %{{.+}}, double*{{.+}} [[G_IN:%.+]], double*{{.+}} [[G1_IN:%.+]], i{{[0-9]+}}*{{.+}} [[SVAR_IN:%.+]], float*{{.+}} [[SFVAR_IN:%.+]]) + // LAMBDA: define{{.*}} internal{{.*}} void [[OMP_OUTLINED]](i32* frozen noalias %{{.+}}, i32* frozen noalias %{{.+}}, double*{{.+}} [[G_IN:%.+]], double*{{.+}} [[G1_IN:%.+]], i{{[0-9]+}}*{{.+}} [[SVAR_IN:%.+]], float*{{.+}} [[SFVAR_IN:%.+]]) // LAMBDA: [[G_PRIVATE_ADDR:%.+]] = alloca double*, // LAMBDA: [[G1_PRIVATE_ADDR:%.+]] = alloca double*, // LAMBDA: [[SVAR_PRIVATE_ADDR:%.+]] = alloca i{{[0-9]+}}*, @@ -125,7 +125,7 @@ // LAMBDA: store i{{[0-9]+}}* [[SVAR_PRIVATE]], i{{[0-9]+}}** [[SVAR_PRIVATE_ADDR_REF]] // LAMBDA: [[SFVAR_PRIVATE_ADDR_REF:%.+]] = getelementptr inbounds %{{.+}}, %{{.+}}* [[ARG:%.+]], i{{[0-9]+}} 0, i{{[0-9]+}} 3 // LAMBDA: store float* [[SFVAR_PRIVATE]], float** [[SFVAR_PRIVATE_ADDR_REF]] - // LAMBDA: call{{.*}} void [[INNER_LAMBDA:@.+]](%{{.+}}* [[ARG]]) + // LAMBDA: call{{.*}} void [[INNER_LAMBDA:@.+]](%{{.+}}* frozen [[ARG]]) // LAMBDA: call {{.*}}void @__kmpc_for_static_fini( // LAMBDA: [[OMP_IS_LAST_VAL:%.+]] = load i{{[0-9]+}}, i{{[0-9]+}}* [[OMP_IS_LAST]], // LAMBDA: [[IS_LAST_IT:%.+]] = icmp ne i{{[0-9]+}} [[OMP_IS_LAST_VAL]], 0 @@ -146,7 +146,7 @@ // LAMBDA: [[OMP_LASTPRIV_DONE]]: // LAMBDA: ret [&]() { - // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* [[ARG_PTR:%.+]]) + // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* frozen [[ARG_PTR:%.+]]) // LAMBDA: store %{{.+}}* [[ARG_PTR]], %{{.+}}** [[ARG_PTR_REF:%.+]], g = 2; g1 = 2; @@ -191,7 +191,7 @@ // CHECK: define{{.*}} i{{[0-9]+}} @main() // CHECK: [[TEST:%.+]] = alloca [[S_FLOAT_TY]], -// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR:@.+]]([[S_FLOAT_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR:@.+]]([[S_FLOAT_TY]]* frozen [[TEST]]) // CHECK: call i{{[0-9]+}} @__tgt_target_teams( // CHECK: call void [[OFFLOAD_FUN:@.+]](i{{[0-9]+}} {{.+}}, [2 x i{{[0-9]+}}]* {{.+}}, [2 x [[S_FLOAT_TY]]]* {{.+}}, [[S_FLOAT_TY]]* {{.+}}, i{{[0-9]+}} {{.+}}) // CHECK: ret @@ -200,7 +200,7 @@ // CHECK: call void (%{{.+}}*, i{{[0-9]+}}, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)*, ...) @__kmpc_fork_teams( // CHECK: ret // -// CHECK: define internal void [[OMP_OUTLINED:@.+]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}, [2 x i{{[0-9]+}}]*{{.+}} [[VEC_IN:%.+]], i{{[0-9]+}}*{{.+}} [[T_VAR_IN:%.+]], [2 x [[S_FLOAT_TY]]]*{{.+}} [[S_ARR_IN:%.+]], [[S_FLOAT_TY]]*{{.+}} [[VAR_IN:%.+]], i{{[0-9]+}}*{{.*}} [[S_VAR_IN:%.+]]) +// CHECK: define internal void [[OMP_OUTLINED:@.+]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}, [2 x i{{[0-9]+}}]*{{.+}} [[VEC_IN:%.+]], i{{[0-9]+}}*{{.+}} [[T_VAR_IN:%.+]], [2 x [[S_FLOAT_TY]]]*{{.+}} [[S_ARR_IN:%.+]], [[S_FLOAT_TY]]*{{.+}} [[VAR_IN:%.+]], i{{[0-9]+}}*{{.*}} [[S_VAR_IN:%.+]]) // CHECK: {{.+}} = alloca i{{[0-9]+}}*, // CHECK: {{.+}} = alloca i{{[0-9]+}}*, // CHECK: [[VEC_ADDR:%.+]] = alloca [2 x i{{[0-9]+}}]*, @@ -290,7 +290,7 @@ // template tmain // CHECK: define{{.*}} i{{[0-9]+}} [[TMAIN_INT:@.+]]() // CHECK: [[TEST:%.+]] = alloca [[S_INT_TY]], -// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR:@.+]]([[S_INT_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR:@.+]]([[S_INT_TY]]* frozen [[TEST]]) // CHECK: call i{{[0-9]+}} @__tgt_target_teams( // CHECK: call void [[OFFLOAD_FUN_1:@.+]](i{{[0-9]+}} {{.+}}, [2 x i{{[0-9]+}}]* {{.+}}, [2 x [[S_INT_TY]]]* {{.+}}, [[S_INT_TY]]* {{.+}}) // CHECK: ret @@ -300,7 +300,7 @@ // CHECK: call void (%{{.+}}*, i{{[0-9]+}}, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)*, ...) @__kmpc_fork_teams(%{{.+}}* @{{.+}}, i{{[0-9]+}} 4, // CHECK: ret -// CHECK: define internal void [[OMP_OUTLINED_1:@.+]](i{{[0-9]+}}* noalias [[GTID_ADDR1:%.+]], i{{[0-9]+}}* noalias %{{.+}}, [2 x i{{[0-9]+}}]*{{.+}} [[VEC_IN1:%.+]], i{{[0-9]+}}*{{.+}} [[T_VAR_IN1:%.+]], [2 x [[S_INT_TY]]]*{{.+}} [[S_ARR_IN1:%.+]], [[S_INT_TY]]*{{.+}} [[VAR_IN1:%.+]]) +// CHECK: define internal void [[OMP_OUTLINED_1:@.+]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR1:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}, [2 x i{{[0-9]+}}]*{{.+}} [[VEC_IN1:%.+]], i{{[0-9]+}}*{{.+}} [[T_VAR_IN1:%.+]], [2 x [[S_INT_TY]]]*{{.+}} [[S_ARR_IN1:%.+]], [[S_INT_TY]]*{{.+}} [[VAR_IN1:%.+]]) // skip alloca of global_tid and bound_tid // CHECK: {{.+}} = alloca i{{[0-9]+}}*, // CHECK: {{.+}} = alloca i{{[0-9]+}}*, diff --git a/clang/test/OpenMP/teams_distribute_loop_messages.cpp b/clang/test/OpenMP/teams_distribute_loop_messages.cpp --- a/clang/test/OpenMP/teams_distribute_loop_messages.cpp +++ b/clang/test/OpenMP/teams_distribute_loop_messages.cpp @@ -170,7 +170,7 @@ for (ii = 0; ii < 10; ++++ii) c[ii] = a[ii]; -// Ok but undefined behavior (in general, cannot check that incr +// Ok but undefined behavior (in frozen general, cannot check incr that // is really loop-invariant). #pragma omp target #pragma omp teams distribute diff --git a/clang/test/OpenMP/teams_distribute_parallel_for_codegen.cpp b/clang/test/OpenMP/teams_distribute_parallel_for_codegen.cpp --- a/clang/test/OpenMP/teams_distribute_parallel_for_codegen.cpp +++ b/clang/test/OpenMP/teams_distribute_parallel_for_codegen.cpp @@ -35,7 +35,7 @@ // CK1: call void @__kmpc_push_target_tripcount(i64 -1, i64 %{{.+}}) // CK1: call i32 @__tgt_target_teams(i64 -1, i8* @{{[^,]+}}, i32 4, i8** %{{[^,]+}}, i8** %{{[^,]+}}, i{{64|32}}* {{.+}}@{{[^,]+}}, i32 0, i32 0), i64* {{.+}}@{{[^,]+}}, i32 0, i32 0), i32 {{.+}}, i32 {{.+}}) - // CK1: call void @[[OFFL1:.+]](i{{32|64}} [[TE_PAR]], i{{32|64}} [[TH_PAR]], + // CK1: call void @[[OFFL1:.+]](i{{32|64}} frozen [[TE_PAR]], i{{32|64}} frozen [[TH_PAR]] #pragma omp target #pragma omp teams distribute parallel for num_teams(te), thread_limit(th) for(int i = 0; i < n; i++) { @@ -44,7 +44,7 @@ } // CK1: call i32 @__tgt_target_teams(i64 -1, i8* @{{[^,]+}}, i32 2, i8** %{{[^,]+}}, i8** %{{[^,]+}}, i{{64|32}}* {{.+}}@{{[^,]+}}, i32 0, i32 0), i64* {{.+}}@{{[^,]+}}, i32 0, i32 0), i32 0, i32 0) - // CK1: call void @[[OFFL2:.+]](i{{64|32}} %{{.+}}) + // CK1: call void @[[OFFL2:.+]](i{{64|32}} frozen %{{.+}}) #pragma omp target {{{ #pragma omp teams distribute parallel for @@ -54,7 +54,7 @@ }}} // outlined target regions - // CK1: define internal void @[[OFFL1]](i{{32|64}} [[TE_ARG:%.+]], i{{32|64}} [[TH_ARG:%.+]], i{{32|64}} {{.+}}, {{.+}}) + // CK1: define internal void @[[OFFL1]](i{{32|64}} frozen [[TE_ARG:%.+]], i{{32|64}} frozen [[TH_ARG:%.+]], i{{32|64}} {{.+}}, {{.+}}) // CK1: [[TE_ADDR:%.+]] = alloca i{{32|64}}, // CK1: [[TH_ADDR:%.+]] = alloca i{{32|64}}, // CK1: store{{.+}} [[TE_ARG]], {{.+}} [[TE_ADDR]], @@ -113,7 +113,7 @@ int a[n]; // CK2: call i32 @__tgt_target_teams(i64 -1, i8* @{{[^,]+}}, i32 3, i8** %{{[^,]+}}, i8** %{{[^,]+}}, i{{64|32}}* {{.+}}, i64* {{.+}}@{{[^,]+}}, i32 0, i32 0), i32 0, i32 0) - // CK2: call void @[[OFFL1:.+]](i{{64|32}} %{{.+}}) + // CK2: call void @[[OFFL1:.+]](i{{64|32}} frozen %{{.+}}) #pragma omp target #pragma omp teams distribute parallel for for(int i = 0; i < n; i++) { @@ -162,7 +162,7 @@ int foo(void) { // CK3: call i32 @__tgt_target_teams(i64 -1, i8* @{{[^,]+}}, i32 2, i8** %{{[^,]+}}, i8** %{{[^,]+}}, i{{64|32}}* %{{.+}}, i64* {{.+}}@{{[^,]+}}, i32 0, i32 0), i32 0, i32 0) - // CK3: call void @[[OFFL1:.+]]([[SSI]]* %{{.+}}) + // CK3: call void @[[OFFL1:.+]]([[SSI]]* frozen %{{.+}}) #pragma omp target #pragma omp teams distribute parallel for for(int i = 0; i < X; i++) { @@ -255,7 +255,7 @@ // CK4: ret // CK4-NEXT: } -// CK4: define {{.*}}void @[[OFFLT]](i{{32|64}} [[TE_ARG:%.+]], i{{32|64}} [[TH_ARG:%.+]], {{.+}}) +// CK4: define {{.*}}void @[[OFFLT]](i{{32|64}} frozen [[TE_ARG:%.+]], i{{32|64}} frozen [[TH_ARG:%.+]], {{.+}}) // CK4: [[TE_ADDR:%.+]] = alloca i{{32|64}}, // CK4: [[TH_ADDR:%.+]] = alloca i{{32|64}}, // CK4: store{{.+}} [[TE_ARG]], {{.+}} [[TE_ADDR]], diff --git a/clang/test/OpenMP/teams_distribute_parallel_for_copyin_codegen.cpp b/clang/test/OpenMP/teams_distribute_parallel_for_copyin_codegen.cpp --- a/clang/test/OpenMP/teams_distribute_parallel_for_copyin_codegen.cpp +++ b/clang/test/OpenMP/teams_distribute_parallel_for_copyin_codegen.cpp @@ -96,7 +96,7 @@ // LAMBDA: call void @__kmpc_for_static_fini( // LAMBDA: ret void [&]() { - // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* [[ARG_PTR:%.+]]) + // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* frozen [[ARG_PTR:%.+]]) // LAMBDA: store %{{.+}}* [[ARG_PTR]], %{{.+}}** [[ARG_PTR_REF:%.+]], a[i] = x; }(); @@ -116,7 +116,7 @@ // CHECK: define {{.*}}i{{[0-9]+}} @main() // CHECK: call i32 @__tgt_target_teams( -// CHECK: call void @[[OFFL1:.+]](i{{64|32}} %{{.+}}) +// CHECK: call void @[[OFFL1:.+]](i{{64|32}} frozen %{{.+}}) // CHECK: {{%.+}} = call{{.*}} i32 @[[TMAIN_INT:.+]]() // CHECK: ret diff --git a/clang/test/OpenMP/teams_distribute_parallel_for_firstprivate_codegen.cpp b/clang/test/OpenMP/teams_distribute_parallel_for_firstprivate_codegen.cpp --- a/clang/test/OpenMP/teams_distribute_parallel_for_firstprivate_codegen.cpp +++ b/clang/test/OpenMP/teams_distribute_parallel_for_firstprivate_codegen.cpp @@ -87,12 +87,12 @@ [&]() { // LAMBDA: define{{.*}} internal{{.*}} void [[OUTER_LAMBDA]]( // LAMBDA: call i32 @__tgt_target_teams(i64 -1, i8* @{{[^,]+}}, i32 3, i8** %{{[^,]+}}, i8** %{{[^,]+}}, i{{64|32}}* {{.+}}@{{[^,]+}}, i32 0, i32 0), i64* {{.+}}@{{[^,]+}}, i32 0, i32 0), i32 0, i32 0) - // LAMBDA: call void @[[LOFFL1:.+]](i{{64|32}} %{{.+}}) + // LAMBDA: call void @[[LOFFL1:.+]](i{{64|32}} frozen %{{.+}}) // LAMBDA: ret #pragma omp target #pragma omp teams distribute parallel for firstprivate(g, g1, sivar) for (int i = 0; i < 2; ++i) { - // LAMBDA: define{{.*}} internal{{.*}} void @[[LOFFL1]](i{{64|32}} {{%.+}}, i{{64|32}} {{%.+}}) + // LAMBDA: define{{.*}} internal{{.*}} void @[[LOFFL1]](i{{64|32}} frozen {{%.+}}, i{{64|32}} frozen {{%.+}}) // LAMBDA: {{%.+}} = alloca i{{[0-9]+}}, // LAMBDA: {{%.+}} = alloca i{{[0-9]+}}, // LAMBDA: {{%.+}} = alloca i{{[0-9]+}}, @@ -158,7 +158,7 @@ // LAMBDA: call void @__kmpc_for_static_fini( // LAMBDA: ret void [&]() { - // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* [[ARG_PTR:%.+]]) + // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* frozen [[ARG_PTR:%.+]]) // LAMBDA: store %{{.+}}* [[ARG_PTR]], %{{.+}}** [[ARG_PTR_REF:%.+]], g = 2; g1 = 2; @@ -192,7 +192,7 @@ // CHECK: define {{.*}}i{{[0-9]+}} @main() // CHECK: call i32 @__tgt_target_teams(i64 -1, i8* @{{[^,]+}}, i32 5, i8** %{{[^,]+}}, i8** %{{[^,]+}}, i{{64|32}}* {{.+}}@{{[^,]+}}, i32 0, i32 0), i64* {{.+}}@{{[^,]+}}, i32 0, i32 0), i32 0, i32 0) -// CHECK: call void @[[OFFL1:.+]](i{{64|32}} %{{.+}}) +// CHECK: call void @[[OFFL1:.+]](i{{64|32}} frozen %{{.+}}) // CHECK: {{%.+}} = call{{.*}} i32 @[[TMAIN_INT:.+]]() // CHECK: ret @@ -352,7 +352,7 @@ // CHECK: define{{.*}} i{{[0-9]+}} @[[TMAIN_INT]]() // CHECK: call i32 @__tgt_target_teams(i64 -1, i8* @{{[^,]+}}, i32 4, i8** %{{[^,]+}}, i8** %{{[^,]+}}, i{{64|32}}* {{.+}}@{{[^,]+}}, i32 0, i32 0), i64* {{.+}}@{{[^,]+}}, i32 0, i32 0), i32 0, i32 0) -// CHECK: call void @[[TOFFL1:.+]](i{{64|32}} %{{.+}}) +// CHECK: call void @[[TOFFL1:.+]](i{{64|32}} frozen %{{.+}}) // CHECK: ret // CHECK: define {{.*}}void @[[TOFFL1]]({{.+}}) diff --git a/clang/test/OpenMP/teams_distribute_parallel_for_lastprivate_codegen.cpp b/clang/test/OpenMP/teams_distribute_parallel_for_lastprivate_codegen.cpp --- a/clang/test/OpenMP/teams_distribute_parallel_for_lastprivate_codegen.cpp +++ b/clang/test/OpenMP/teams_distribute_parallel_for_lastprivate_codegen.cpp @@ -77,7 +77,7 @@ #pragma omp target #pragma omp teams distribute parallel for lastprivate(g, g1, svar, sfvar) for (int i = 0; i < 2; ++i) { - // LAMBDA: define{{.*}} internal{{.*}} void [[OMP_OUTLINED]](i32* noalias %{{.+}}, i32* noalias %{{.+}}, double*{{.+}} [[G_IN:%.+]], double*{{.+}} [[G1_IN:%.+]], i{{[0-9]+}}*{{.+}} [[SVAR_IN:%.+]], float*{{.+}} [[SFVAR_IN:%.+]]) + // LAMBDA: define{{.*}} internal{{.*}} void [[OMP_OUTLINED]](i32* frozen noalias %{{.+}}, i32* frozen noalias %{{.+}}, double*{{.+}} [[G_IN:%.+]], double*{{.+}} [[G1_IN:%.+]], i{{[0-9]+}}*{{.+}} [[SVAR_IN:%.+]], float*{{.+}} [[SFVAR_IN:%.+]]) // LAMBDA: [[G_PRIVATE_ADDR:%.+]] = alloca double*, // LAMBDA: [[G1_PRIVATE_ADDR:%.+]] = alloca double*, // LAMBDA: [[SVAR_PRIVATE_ADDR:%.+]] = alloca i{{[0-9]+}}*, @@ -133,7 +133,7 @@ // LAMBDA: [[OMP_LASTPRIV_DONE]]: // LAMBDA: ret - // LAMBDA: define{{.*}} internal{{.*}} void @[[LPAR_OUTL]](i32* noalias %{{.+}}, i32* noalias %{{.+}}, {{.+}}, {{.+}}, double*{{.+}} [[G_IN:%.+]], double*{{.+}} [[G1_IN:%.+]], i{{[0-9]+}}*{{.+}} [[SVAR_IN:%.+]], float*{{.+}} [[SFVAR_IN:%.+]]) + // LAMBDA: define{{.*}} internal{{.*}} void @[[LPAR_OUTL]](i32* frozen noalias %{{.+}}, i32* frozen noalias %{{.+}}, {{.+}}, {{.+}}, double*{{.+}} [[G_IN:%.+]], double*{{.+}} [[G1_IN:%.+]], i{{[0-9]+}}*{{.+}} [[SVAR_IN:%.+]], float*{{.+}} [[SFVAR_IN:%.+]]) // LAMBDA: [[G_PRIVATE_ADDR:%.+]] = alloca double*, // LAMBDA: [[G1_PRIVATE_ADDR:%.+]] = alloca double*, // LAMBDA: [[SVAR_PRIVATE_ADDR:%.+]] = alloca i{{[0-9]+}}*, @@ -178,7 +178,7 @@ // LAMBDA: store i{{[0-9]+}}* [[SVAR_PRIVATE]], i{{[0-9]+}}** [[SVAR_PRIVATE_ADDR_REF]] // LAMBDA: [[SFVAR_PRIVATE_ADDR_REF:%.+]] = getelementptr inbounds %{{.+}}, %{{.+}}* [[ARG:%.+]], i{{[0-9]+}} 0, i{{[0-9]+}} 3 // LAMBDA: store float* [[SFVAR_PRIVATE]], float** [[SFVAR_PRIVATE_ADDR_REF]] - // LAMBDA: call{{.*}} void [[INNER_LAMBDA:@.+]](%{{.+}}* [[ARG]]) + // LAMBDA: call{{.*}} void [[INNER_LAMBDA:@.+]](%{{.+}}* frozen [[ARG]]) // LAMBDA: call {{.*}}void @__kmpc_for_static_fini( // LAMBDA: [[OMP_IS_LAST_VAL:%.+]] = load i{{[0-9]+}}, i{{[0-9]+}}* [[OMP_IS_LAST]], @@ -201,7 +201,7 @@ // LAMBDA: ret [&]() { - // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* [[ARG_PTR:%.+]]) + // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* frozen [[ARG_PTR:%.+]]) // LAMBDA: store %{{.+}}* [[ARG_PTR]], %{{.+}}** [[ARG_PTR_REF:%.+]], g = 2; g1 = 2; @@ -246,7 +246,7 @@ // CHECK: define{{.*}} i{{[0-9]+}} @main() // CHECK: [[TEST:%.+]] = alloca [[S_FLOAT_TY]], -// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR:@.+]]([[S_FLOAT_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR:@.+]]([[S_FLOAT_TY]]* frozen [[TEST]]) // CHECK: call i{{[0-9]+}} @__tgt_target_teams( // CHECK: call void [[OFFLOAD_FUN:@.+]](i{{[0-9]+}} {{.+}}, [2 x i{{[0-9]+}}]* {{.+}}, [2 x [[S_FLOAT_TY]]]* {{.+}}, [[S_FLOAT_TY]]* {{.+}}, i{{[0-9]+}} {{.+}}) // CHECK: ret @@ -255,7 +255,7 @@ // CHECK: call void (%{{.+}}*, i{{[0-9]+}}, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)*, ...) @__kmpc_fork_teams( // CHECK: ret // -// CHECK: define internal void [[OMP_OUTLINED:@.+]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}, [2 x i{{[0-9]+}}]*{{.+}} [[VEC_IN:%.+]], i{{[0-9]+}}*{{.+}} [[T_VAR_IN:%.+]], [2 x [[S_FLOAT_TY]]]*{{.+}} [[S_ARR_IN:%.+]], [[S_FLOAT_TY]]*{{.+}} [[VAR_IN:%.+]], i{{[0-9]+}}*{{.*}} [[S_VAR_IN:%.+]]) +// CHECK: define internal void [[OMP_OUTLINED:@.+]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}, [2 x i{{[0-9]+}}]*{{.+}} [[VEC_IN:%.+]], i{{[0-9]+}}*{{.+}} [[T_VAR_IN:%.+]], [2 x [[S_FLOAT_TY]]]*{{.+}} [[S_ARR_IN:%.+]], [[S_FLOAT_TY]]*{{.+}} [[VAR_IN:%.+]], i{{[0-9]+}}*{{.*}} [[S_VAR_IN:%.+]]) // CHECK: {{.+}} = alloca i{{[0-9]+}}*, // CHECK: {{.+}} = alloca i{{[0-9]+}}*, // CHECK: [[VEC_ADDR:%.+]] = alloca [2 x i{{[0-9]+}}]*, @@ -332,7 +332,7 @@ // CHECK: store i{{[0-9]+}} [[SVAR_VAL]], i{{[0-9]+}}* [[SVAR_ADDR_REF]], // CHECK: ret void -// CHECK: define internal void [[OMP_OUTLINED:@.+]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}, {{.+}}, {{.+}}, [2 x i{{[0-9]+}}]*{{.+}} [[VEC_IN:%.+]], i{{[0-9]+}}*{{.+}} [[T_VAR_IN:%.+]], [2 x [[S_FLOAT_TY]]]*{{.+}} [[S_ARR_IN:%.+]], [[S_FLOAT_TY]]*{{.+}} [[VAR_IN:%.+]], i{{[0-9]+}}*{{.*}} [[S_VAR_IN:%.+]]) +// CHECK: define internal void [[OMP_OUTLINED:@.+]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}, {{.+}}, {{.+}}, [2 x i{{[0-9]+}}]*{{.+}} [[VEC_IN:%.+]], i{{[0-9]+}}*{{.+}} [[T_VAR_IN:%.+]], [2 x [[S_FLOAT_TY]]]*{{.+}} [[S_ARR_IN:%.+]], [[S_FLOAT_TY]]*{{.+}} [[VAR_IN:%.+]], i{{[0-9]+}}*{{.*}} [[S_VAR_IN:%.+]]) // gbl and bound tid vars, prev lb and ub vars // CHECK: {{.+}} = alloca i{{[0-9]+}}*, // CHECK: {{.+}} = alloca i{{[0-9]+}}*, @@ -427,7 +427,7 @@ // template tmain // CHECK: define{{.*}} i{{[0-9]+}} [[TMAIN_INT:@.+]]() // CHECK: [[TEST:%.+]] = alloca [[S_INT_TY]], -// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR:@.+]]([[S_INT_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR:@.+]]([[S_INT_TY]]* frozen [[TEST]]) // CHECK: call i{{[0-9]+}} @__tgt_target_teams( // CHECK: call void [[OFFLOAD_FUN_1:@.+]](i{{[0-9]+}} {{.+}}, [2 x i{{[0-9]+}}]* {{.+}}, [2 x [[S_INT_TY]]]* {{.+}}, [[S_INT_TY]]* {{.+}}) // CHECK: ret @@ -436,7 +436,7 @@ // CHECK: call void (%{{.+}}*, i{{[0-9]+}}, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)*, ...) @__kmpc_fork_teams(%{{.+}}* @{{.+}}, i{{[0-9]+}} 4, // CHECK: ret -// CHECK: define internal void [[OMP_OUTLINED_1:@.+]](i{{[0-9]+}}* noalias [[GTID_ADDR1:%.+]], i{{[0-9]+}}* noalias %{{.+}}, [2 x i{{[0-9]+}}]*{{.+}} [[VEC_IN1:%.+]], i{{[0-9]+}}*{{.+}} [[T_VAR_IN1:%.+]], [2 x [[S_INT_TY]]]*{{.+}} [[S_ARR_IN1:%.+]], [[S_INT_TY]]*{{.+}} [[VAR_IN1:%.+]]) +// CHECK: define internal void [[OMP_OUTLINED_1:@.+]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR1:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}, [2 x i{{[0-9]+}}]*{{.+}} [[VEC_IN1:%.+]], i{{[0-9]+}}*{{.+}} [[T_VAR_IN1:%.+]], [2 x [[S_INT_TY]]]*{{.+}} [[S_ARR_IN1:%.+]], [[S_INT_TY]]*{{.+}} [[VAR_IN1:%.+]]) // skip alloca of global_tid and bound_tid // CHECK: {{.+}} = alloca i{{[0-9]+}}*, // CHECK: {{.+}} = alloca i{{[0-9]+}}*, @@ -512,7 +512,7 @@ // CHECK: call void @llvm.memcpy.{{.+}}(i8* align {{[0-9]+}} [[VAR_ADDR_REF_BCAST]], i8* align {{[0-9]+}} [[TMP_VAL1_BCAST]],{{.+}}) // CHECK: ret void -// CHECK: define internal void [[TPAR_OUTL:@.+]](i{{[0-9]+}}* noalias [[GTID_ADDR1:%.+]], i{{[0-9]+}}* noalias %{{.+}}, {{.+}}, {{.+}}, [2 x i{{[0-9]+}}]*{{.+}} [[VEC_IN1:%.+]], i{{[0-9]+}}*{{.+}} [[T_VAR_IN1:%.+]], [2 x [[S_INT_TY]]]*{{.+}} [[S_ARR_IN1:%.+]], [[S_INT_TY]]*{{.+}} [[VAR_IN1:%.+]]) +// CHECK: define internal void [[TPAR_OUTL:@.+]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR1:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}, {{.+}}, {{.+}}, [2 x i{{[0-9]+}}]*{{.+}} [[VEC_IN1:%.+]], i{{[0-9]+}}*{{.+}} [[T_VAR_IN1:%.+]], [2 x [[S_INT_TY]]]*{{.+}} [[S_ARR_IN1:%.+]], [[S_INT_TY]]*{{.+}} [[VAR_IN1:%.+]]) // skip alloca of global_tid and bound_tid, and prev lb and ub vars // CHECK: {{.+}} = alloca i{{[0-9]+}}*, // CHECK: {{.+}} = alloca i{{[0-9]+}}*, diff --git a/clang/test/OpenMP/teams_distribute_parallel_for_loop_messages.cpp b/clang/test/OpenMP/teams_distribute_parallel_for_loop_messages.cpp --- a/clang/test/OpenMP/teams_distribute_parallel_for_loop_messages.cpp +++ b/clang/test/OpenMP/teams_distribute_parallel_for_loop_messages.cpp @@ -170,7 +170,7 @@ for (ii = 0; ii < 10; ++++ii) c[ii] = a[ii]; -// Ok but undefined behavior (in general, cannot check that incr +// Ok but undefined behavior (in frozen general, cannot check incr that // is really loop-invariant). #pragma omp target #pragma omp teams distribute parallel for diff --git a/clang/test/OpenMP/teams_distribute_parallel_for_private_codegen.cpp b/clang/test/OpenMP/teams_distribute_parallel_for_private_codegen.cpp --- a/clang/test/OpenMP/teams_distribute_parallel_for_private_codegen.cpp +++ b/clang/test/OpenMP/teams_distribute_parallel_for_private_codegen.cpp @@ -91,7 +91,7 @@ #pragma omp target #pragma omp teams distribute parallel for private(g, g1, sivar) for (int i = 0; i < 2; ++i) { - // LAMBDA: define{{.*}} internal{{.*}} void @[[LOFFL1]](i{{64|32}} {{%.+}}) + // LAMBDA: define{{.*}} internal{{.*}} void @[[LOFFL1]](i{{64|32}} frozen {{%.+}}) // LAMBDA: call void {{.+}} @__kmpc_fork_teams({{.+}}, i32 0, {{.+}} @[[LOUTL1:.+]] to {{.+}}) // LAMBDA: ret void @@ -144,7 +144,7 @@ // LAMBDA: call void @__kmpc_for_static_fini( // LAMBDA: ret void [&]() { - // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* [[ARG_PTR:%.+]]) + // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* frozen [[ARG_PTR:%.+]]) // LAMBDA: store %{{.+}}* [[ARG_PTR]], %{{.+}}** [[ARG_PTR_REF:%.+]], g = 2; g1 = 2; diff --git a/clang/test/OpenMP/teams_distribute_parallel_for_reduction_codegen.cpp b/clang/test/OpenMP/teams_distribute_parallel_for_reduction_codegen.cpp --- a/clang/test/OpenMP/teams_distribute_parallel_for_reduction_codegen.cpp +++ b/clang/test/OpenMP/teams_distribute_parallel_for_reduction_codegen.cpp @@ -53,7 +53,7 @@ #pragma omp target #pragma omp teams distribute parallel for reduction(+: sivar) for (int i = 0; i < 2; ++i) { - // LAMBDA: define{{.*}} internal{{.*}} void @[[LOFFL1]](i{{64|32}} [[SIVAR_ARG:%.+]]) + // LAMBDA: define{{.*}} internal{{.*}} void @[[LOFFL1]](i{{64|32}} frozen [[SIVAR_ARG:%.+]]) // LAMBDA: [[SIVAR_ADDR:%.+]] = alloca i{{.+}}, // LAMBDA: store{{.+}} [[SIVAR_ARG]], {{.+}} [[SIVAR_ADDR]], // LAMBDA: [[SIVAR_CONV:%.+]] = bitcast{{.+}} [[SIVAR_ADDR]] to @@ -144,7 +144,7 @@ sivar += i; [&]() { - // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* [[ARG_PTR:%.+]]) + // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* frozen [[ARG_PTR:%.+]]) // LAMBDA: store %{{.+}}* [[ARG_PTR]], %{{.+}}** [[ARG_PTR_REF:%.+]], sivar += 4; @@ -173,11 +173,11 @@ // CHECK: define {{.*}}i{{[0-9]+}} @main() // CHECK: call i32 @__tgt_target_teams(i64 -1, i8* @{{[^,]+}}, i32 1, i8** %{{[^,]+}}, i8** %{{[^,]+}}, i{{64|32}}* {{.+}}@{{[^,]+}}, i32 0, i32 0), i64* {{.+}}@{{[^,]+}}, i32 0, i32 0), i32 0, i32 0) -// CHECK: call void @[[OFFL1:.+]](i{{64|32}} %{{.+}}) +// CHECK: call void @[[OFFL1:.+]](i{{64|32}} frozen %{{.+}}) // CHECK: {{%.+}} = call{{.*}} i32 @[[TMAIN_INT:.+]]() // CHECK: ret -// CHECK: define{{.*}} void @[[OFFL1]](i{{64|32}} [[SIVAR_ARG:%.+]]) +// CHECK: define{{.*}} void @[[OFFL1]](i{{64|32}} frozen [[SIVAR_ARG:%.+]]) // CHECK: [[SIVAR_ADDR:%.+]] = alloca i{{.+}}, // CHECK: store{{.+}} [[SIVAR_ARG]], {{.+}} [[SIVAR_ADDR]], // CHECK-64: [[SIVAR_CONV:%.+]] = bitcast{{.+}} [[SIVAR_ADDR]] to @@ -269,7 +269,7 @@ // CHECK: call void @[[TOFFL1:.+]]({{.+}}) // CHECK: ret -// CHECK: define{{.*}} void @[[TOFFL1]](i{{64|32}} [[TVAR_ARG:%.+]]) +// CHECK: define{{.*}} void @[[TOFFL1]](i{{64|32}} frozen [[TVAR_ARG:%.+]]) // CHECK: [[TVAR_ADDR:%.+]] = alloca i{{.+}}, // CHECK: store{{.+}} [[TVAR_ARG]], {{.+}} [[TVAR_ADDR]], // CHECK-64: [[TVAR_CONV:%.+]] = bitcast{{.+}} [[TVAR_ADDR]] to diff --git a/clang/test/OpenMP/teams_distribute_parallel_for_reduction_task_codegen.cpp b/clang/test/OpenMP/teams_distribute_parallel_for_reduction_task_codegen.cpp --- a/clang/test/OpenMP/teams_distribute_parallel_for_reduction_task_codegen.cpp +++ b/clang/test/OpenMP/teams_distribute_parallel_for_reduction_task_codegen.cpp @@ -22,7 +22,7 @@ // CHECK: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @{{.+}}, i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i8***)* [[OUTLINED:@.+]] to void (i32*, i32*, ...)*), i64 %{{.+}}, i64 %{{.+}}, i32* %{{.+}}, i8*** %{{.+}}) -// CHECK: define internal void [[OUTLINED]](i32* noalias %{{.+}}, i32* noalias %{{.+}}, i64 %{{.+}}, i64 %{{.+}}, i32* {{.+}}, i8*** {{.+}}) +// CHECK: define internal void [[OUTLINED]](i32* frozen noalias %{{.+}}, i32* frozen noalias %{{.+}}, i64 frozen %{{.+}}, i64 frozen %{{.+}}, i32* {{.+}}, i8*** {{.+}}) // CHECK: alloca i32, // CHECK: [[ARGC_FP_ADDR:%.+]] = alloca i32, // CHECK: [[TR:%.+]] = alloca [2 x [[TASKRED_TY:%struct.kmp_taskred_input_t.*]]], @@ -95,26 +95,26 @@ // CHECK: call void @__kmpc_task_reduction_modifier_fini(%struct.ident_t* @{{.+}}, i32 %{{.+}}, i32 1) // CHECK: call i32 @__kmpc_reduce_nowait( -// CHECK: define internal void [[ARGC_INIT]](i8* noalias %{{.+}}, i8* noalias %{{.+}}) +// CHECK: define internal void [[ARGC_INIT]](i8* frozen noalias %{{.+}}, i8* frozen noalias %{{.+}}) // CHECK: store i32 0, i32* %{{.+}}, -// CHECK: define internal void [[ARGC_COMB]](i8* %{{.+}}, i8* %{{.+}}) +// CHECK: define internal void [[ARGC_COMB]](i8* frozen %{{.+}}, i8* frozen %{{.+}}) // CHECK: [[ADD:%.+]] = add nsw i32 %{{.+}}, %{{.+}} // CHECK: store i32 [[ADD]], i32* %{{.+}}, -// CHECK: define internal void [[ARGV_INIT]](i8* noalias %{{.+}}, i8* noalias %{{.+}}) +// CHECK: define internal void [[ARGV_INIT]](i8* frozen noalias %{{.+}}, i8* frozen noalias %{{.+}}) // CHECK: phi i8* // CHECK: store i8 0, i8* [[EL:%.+]], // CHECK: getelementptr i8, i8* [[EL]], i32 1 -// CHECK: define internal void [[ARGV_COMB]](i8* %{{.+}}, i8* %{{.+}}) +// CHECK: define internal void [[ARGV_COMB]](i8* frozen %{{.+}}, i8* frozen %{{.+}}) // CHECK: phi i8* // CHECK: [[ADD:%.+]] = add nsw i32 %{{.+}}, %{{.+}} // CHECK: [[CONV:%.+]] = trunc i32 [[ADD]] to i8 // CHECK: store i8 [[CONV]], i8* [[EL:%.+]], // CHECK: getelementptr i8, i8* [[EL]], i32 1 -// CHECK: define internal {{.*}}i32 [[TASK]](i32 {{.+}}, [[TASK_TY]]* {{.+}}) +// CHECK: define internal {{.*}}frozen i32 [[TASK]](i32 {{.+}}, [[TASK_TY]]* {{.+}}) // CHECK-DAG: call i8* @__kmpc_task_reduction_get_th_data(i32 %{{.+}}, i8* [[TG:%.+]], i8* [[ARGC_REF:%.+]]) // CHECK_DAG: [[TG]] = load i8*, i8** [[TG_ADDR:%.+]], // CHECK-DAG: [[ARGC_REF]] = bitcast i32* [[ARGC_ADDR:%.+]] to i8* diff --git a/clang/test/OpenMP/teams_distribute_parallel_for_simd_codegen.cpp b/clang/test/OpenMP/teams_distribute_parallel_for_simd_codegen.cpp --- a/clang/test/OpenMP/teams_distribute_parallel_for_simd_codegen.cpp +++ b/clang/test/OpenMP/teams_distribute_parallel_for_simd_codegen.cpp @@ -36,7 +36,7 @@ // CK1: call void @__kmpc_push_target_tripcount(i64 -1, i64 %{{.+}}) // CK1: call i32 @__tgt_target_teams(i64 -1, i8* @{{[^,]+}}, i32 4, i8** %{{[^,]+}}, i8** %{{[^,]+}}, i{{64|32}}* {{.+}}@{{[^,]+}}, i32 0, i32 0), i64* {{.+}}@{{[^,]+}}, i32 0, i32 0) - // CK1: call void @[[OFFL1:.+]](i{{32|64}} [[TE_PAR]], i{{32|64}} [[TH_PAR]], + // CK1: call void @[[OFFL1:.+]](i{{32|64}} frozen [[TE_PAR]], i{{32|64}} frozen [[TH_PAR]] #pragma omp target #pragma omp teams distribute parallel for simd num_teams(te), thread_limit(th) simdlen(64) for(int i = 0; i < n; i++) { @@ -54,7 +54,7 @@ } }}} // outlined target regions - // CK1: define internal void @[[OFFL1]](i{{32|64}} [[TE_ARG:%.+]], i{{32|64}} [[TH_ARG:%.+]], i{{32|64}} {{.+}}, {{.+}}) + // CK1: define internal void @[[OFFL1]](i{{32|64}} frozen [[TE_ARG:%.+]], i{{32|64}} frozen [[TH_ARG:%.+]], i{{32|64}} {{.+}}, {{.+}}) // CK1: [[TE_ADDR:%.+]] = alloca i{{32|64}}, // CK1: [[TH_ADDR:%.+]] = alloca i{{32|64}}, // CK1: store{{.+}} [[TE_ARG]], {{.+}} [[TE_ADDR]], @@ -170,7 +170,7 @@ int foo(void) { int i; // CK3: call i32 @__tgt_target_teams(i64 -1, i8* @{{[^,]+}}, i32 3, i8** %{{[^,]+}}, i8** %{{[^,]+}}, i{{64|32}}* %{{[^,]+}}, i64* {{.+}}@{{[^,]+}}, i32 0, i32 0) - // CK3: call void @[[OFFL1:.+]]([[SSI]]* %{{.+}}) + // CK3: call void @[[OFFL1:.+]]([[SSI]]* frozen %{{.+}}) #pragma omp target #pragma omp teams distribute parallel for simd safelen(4) aligned(a) linear(i) for(i = 0; i < X; i++) { @@ -266,7 +266,7 @@ // CK4: ret // CK4-NEXT: } -// CK4: define {{.*}}void @[[OFFLT]](i{{32|64}} [[TE_ARG:%.+]], i{{32|64}} [[TH_ARG:%.+]], {{.+}}) +// CK4: define {{.*}}void @[[OFFLT]](i{{32|64}} frozen [[TE_ARG:%.+]], i{{32|64}} frozen [[TH_ARG:%.+]], {{.+}}) // CK4: [[TE_ADDR:%.+]] = alloca i{{32|64}}, // CK4: [[TH_ADDR:%.+]] = alloca i{{32|64}}, // CK4: store{{.+}} [[TE_ARG]], {{.+}} [[TE_ADDR]], diff --git a/clang/test/OpenMP/teams_distribute_parallel_for_simd_firstprivate_codegen.cpp b/clang/test/OpenMP/teams_distribute_parallel_for_simd_firstprivate_codegen.cpp --- a/clang/test/OpenMP/teams_distribute_parallel_for_simd_firstprivate_codegen.cpp +++ b/clang/test/OpenMP/teams_distribute_parallel_for_simd_firstprivate_codegen.cpp @@ -87,12 +87,12 @@ [&]() { // LAMBDA: define{{.*}} internal{{.*}} void [[OUTER_LAMBDA]]( // LAMBDA: call i32 @__tgt_target_teams(i64 -1, i8* @{{[^,]+}}, i32 3, i8** %{{[^,]+}}, i8** %{{[^,]+}}, i{{64|32}}* {{.+}}@{{[^,]+}}, i32 0, i32 0), i64* {{.+}}@{{[^,]+}}, i32 0, i32 0) - // LAMBDA: call void @[[LOFFL1:.+]](i{{64|32}} %{{.+}}) + // LAMBDA: call void @[[LOFFL1:.+]](i{{64|32}} frozen %{{.+}}) // LAMBDA: ret #pragma omp target #pragma omp teams distribute parallel for simd firstprivate(g, g1, sivar) for (int i = 0; i < 2; ++i) { - // LAMBDA: define{{.*}} internal{{.*}} void @[[LOFFL1]](i{{64|32}} {{%.+}}, i{{64|32}} {{%.+}}) + // LAMBDA: define{{.*}} internal{{.*}} void @[[LOFFL1]](i{{64|32}} frozen {{%.+}}, i{{64|32}} frozen {{%.+}}) // LAMBDA: {{%.+}} = alloca i{{[0-9]+}}, // LAMBDA: {{%.+}} = alloca i{{[0-9]+}}, // LAMBDA: {{%.+}} = alloca i{{[0-9]+}}, @@ -158,7 +158,7 @@ // LAMBDA: call void @__kmpc_for_static_fini( // LAMBDA: ret void [&]() { - // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* [[ARG_PTR:%.+]]) + // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* frozen [[ARG_PTR:%.+]]) // LAMBDA: store %{{.+}}* [[ARG_PTR]], %{{.+}}** [[ARG_PTR_REF:%.+]], g = 2; g1 = 2; @@ -195,7 +195,7 @@ // CHECK: define {{.*}}i{{[0-9]+}} @main() // CHECK: call i32 @__tgt_target_teams(i64 -1, i8* @{{[^,]+}}, i32 5, i8** %{{[^,]+}}, i8** %{{[^,]+}}, i{{64|32}}* {{.+}}@{{[^,]+}}, i32 0, i32 0), i64* {{.+}}@{{[^,]+}}, i32 0, i32 0) -// CHECK: call void @[[OFFL1:.+]](i{{64|32}} %{{.+}}) +// CHECK: call void @[[OFFL1:.+]](i{{64|32}} frozen %{{.+}}) // CHECK: {{%.+}} = call{{.*}} i32 @[[TMAIN_INT:.+]]() // CHECK: ret @@ -355,7 +355,7 @@ // CHECK: define{{.*}} i{{[0-9]+}} @[[TMAIN_INT]]() // CHECK: call i32 @__tgt_target_teams(i64 -1, i8* @{{[^,]+}}, i32 4, i8** %{{[^,]+}}, i8** %{{[^,]+}}, i{{64|32}}* {{.+}}@{{[^,]+}}, i32 0, i32 0), i64* {{.+}}@{{[^,]+}}, i32 0, i32 0) -// CHECK: call void @[[TOFFL1:.+]](i{{64|32}} %{{.+}}) +// CHECK: call void @[[TOFFL1:.+]](i{{64|32}} frozen %{{.+}}) // CHECK: ret // CHECK: define {{.*}}void @[[TOFFL1]]({{.+}}) diff --git a/clang/test/OpenMP/teams_distribute_parallel_for_simd_lastprivate_codegen.cpp b/clang/test/OpenMP/teams_distribute_parallel_for_simd_lastprivate_codegen.cpp --- a/clang/test/OpenMP/teams_distribute_parallel_for_simd_lastprivate_codegen.cpp +++ b/clang/test/OpenMP/teams_distribute_parallel_for_simd_lastprivate_codegen.cpp @@ -77,7 +77,7 @@ #pragma omp target #pragma omp teams distribute parallel for simd lastprivate(g, g1, svar, sfvar) for (int i = 0; i < 2; ++i) { - // LAMBDA: define{{.*}} internal{{.*}} void [[OMP_OUTLINED]](i32* noalias %{{.+}}, i32* noalias %{{.+}}, double*{{.+}} [[G_IN:%.+]], double*{{.+}} [[G1_IN:%.+]], i{{[0-9]+}}*{{.+}} [[SVAR_IN:%.+]], float*{{.+}} [[SFVAR_IN:%.+]]) + // LAMBDA: define{{.*}} internal{{.*}} void [[OMP_OUTLINED]](i32* frozen noalias %{{.+}}, i32* frozen noalias %{{.+}}, double*{{.+}} [[G_IN:%.+]], double*{{.+}} [[G1_IN:%.+]], i{{[0-9]+}}*{{.+}} [[SVAR_IN:%.+]], float*{{.+}} [[SFVAR_IN:%.+]]) // LAMBDA: [[G_PRIVATE_ADDR:%.+]] = alloca double*, // LAMBDA: [[G1_PRIVATE_ADDR:%.+]] = alloca double*, // LAMBDA: [[SVAR_PRIVATE_ADDR:%.+]] = alloca i{{[0-9]+}}*, @@ -134,7 +134,7 @@ // LAMBDA: [[OMP_LASTPRIV_DONE]]: // LAMBDA: ret - // LAMBDA: define{{.*}} internal{{.*}} void @[[LPAR_OUTL]](i32* noalias %{{.+}}, i32* noalias %{{.+}}, {{.+}}, {{.+}}, double*{{.+}} [[G_IN:%.+]], double*{{.+}} [[G1_IN:%.+]], i{{[0-9]+}}*{{.+}} [[SVAR_IN:%.+]], float*{{.+}} [[SFVAR_IN:%.+]]) + // LAMBDA: define{{.*}} internal{{.*}} void @[[LPAR_OUTL]](i32* frozen noalias %{{.+}}, i32* frozen noalias %{{.+}}, {{.+}}, {{.+}}, double*{{.+}} [[G_IN:%.+]], double*{{.+}} [[G1_IN:%.+]], i{{[0-9]+}}*{{.+}} [[SVAR_IN:%.+]], float*{{.+}} [[SFVAR_IN:%.+]]) // LAMBDA: [[G_PRIVATE_ADDR:%.+]] = alloca double*, // LAMBDA: [[G1_PRIVATE_ADDR:%.+]] = alloca double*, // LAMBDA: [[SVAR_PRIVATE_ADDR:%.+]] = alloca i{{[0-9]+}}*, @@ -179,7 +179,7 @@ // LAMBDA: store i{{[0-9]+}}* [[SVAR_PRIVATE]], i{{[0-9]+}}** [[SVAR_PRIVATE_ADDR_REF]] // LAMBDA: [[SFVAR_PRIVATE_ADDR_REF:%.+]] = getelementptr inbounds %{{.+}}, %{{.+}}* [[ARG:%.+]], i{{[0-9]+}} 0, i{{[0-9]+}} 3 // LAMBDA: store float* [[SFVAR_PRIVATE]], float** [[SFVAR_PRIVATE_ADDR_REF]] - // LAMBDA: call{{.*}} void [[INNER_LAMBDA:@.+]](%{{.+}}* [[ARG]]) + // LAMBDA: call{{.*}} void [[INNER_LAMBDA:@.+]](%{{.+}}* frozen [[ARG]]) // LAMBDA: call {{.*}}void @__kmpc_for_static_fini( // skip 'final' simd branch and block (checked as part of simd) @@ -205,7 +205,7 @@ // LAMBDA: ret [&]() { - // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* [[ARG_PTR:%.+]]) + // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* frozen [[ARG_PTR:%.+]]) // LAMBDA: store %{{.+}}* [[ARG_PTR]], %{{.+}}** [[ARG_PTR_REF:%.+]], g = 2; g1 = 2; @@ -253,7 +253,7 @@ // CHECK: define{{.*}} i{{[0-9]+}} @main() // CHECK: [[TEST:%.+]] = alloca [[S_FLOAT_TY]], -// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR:@.+]]([[S_FLOAT_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR:@.+]]([[S_FLOAT_TY]]* frozen [[TEST]]) // CHECK: call i{{[0-9]+}} @__tgt_target_teams( // CHECK: call void [[OFFLOAD_FUN:@.+]](i{{[0-9]+}} {{.+}}, [2 x i{{[0-9]+}}]* {{.+}}, [2 x [[S_FLOAT_TY]]]* {{.+}}, [[S_FLOAT_TY]]* {{.+}}, i{{[0-9]+}} {{.+}}) // CHECK: ret @@ -262,7 +262,7 @@ // CHECK: call void (%{{.+}}*, i{{[0-9]+}}, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)*, ...) @__kmpc_fork_teams( // CHECK: ret // -// CHECK: define internal void [[OMP_OUTLINED:@.+]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}, [2 x i{{[0-9]+}}]*{{.+}} [[VEC_IN:%.+]], i{{[0-9]+}}*{{.+}} [[T_VAR_IN:%.+]], [2 x [[S_FLOAT_TY]]]*{{.+}} [[S_ARR_IN:%.+]], [[S_FLOAT_TY]]*{{.+}} [[VAR_IN:%.+]], i{{[0-9]+}}*{{.*}} [[S_VAR_IN:%.+]]) +// CHECK: define internal void [[OMP_OUTLINED:@.+]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}, [2 x i{{[0-9]+}}]*{{.+}} [[VEC_IN:%.+]], i{{[0-9]+}}*{{.+}} [[T_VAR_IN:%.+]], [2 x [[S_FLOAT_TY]]]*{{.+}} [[S_ARR_IN:%.+]], [[S_FLOAT_TY]]*{{.+}} [[VAR_IN:%.+]], i{{[0-9]+}}*{{.*}} [[S_VAR_IN:%.+]]) // CHECK: {{.+}} = alloca i{{[0-9]+}}*, // CHECK: {{.+}} = alloca i{{[0-9]+}}*, // CHECK: [[VEC_ADDR:%.+]] = alloca [2 x i{{[0-9]+}}]*, @@ -339,7 +339,7 @@ // CHECK: store i{{[0-9]+}} [[SVAR_VAL]], i{{[0-9]+}}* [[SVAR_ADDR_REF]], // CHECK: ret void -// CHECK: define internal void [[OMP_OUTLINED:@.+]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}, {{.+}}, {{.+}}, [2 x i{{[0-9]+}}]*{{.+}} [[VEC_IN:%.+]], i{{[0-9]+}}*{{.+}} [[T_VAR_IN:%.+]], [2 x [[S_FLOAT_TY]]]*{{.+}} [[S_ARR_IN:%.+]], [[S_FLOAT_TY]]*{{.+}} [[VAR_IN:%.+]], i{{[0-9]+}}*{{.*}} [[S_VAR_IN:%.+]]) +// CHECK: define internal void [[OMP_OUTLINED:@.+]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}, {{.+}}, {{.+}}, [2 x i{{[0-9]+}}]*{{.+}} [[VEC_IN:%.+]], i{{[0-9]+}}*{{.+}} [[T_VAR_IN:%.+]], [2 x [[S_FLOAT_TY]]]*{{.+}} [[S_ARR_IN:%.+]], [[S_FLOAT_TY]]*{{.+}} [[VAR_IN:%.+]], i{{[0-9]+}}*{{.*}} [[S_VAR_IN:%.+]]) // gbl and bound tid vars, prev lb and ub vars // CHECK: {{.+}} = alloca i{{[0-9]+}}*, // CHECK: {{.+}} = alloca i{{[0-9]+}}*, @@ -437,7 +437,7 @@ // template tmain // CHECK: define{{.*}} i{{[0-9]+}} [[TMAIN_INT:@.+]]() // CHECK: [[TEST:%.+]] = alloca [[S_INT_TY]], -// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR:@.+]]([[S_INT_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR:@.+]]([[S_INT_TY]]* frozen [[TEST]]) // CHECK: call i{{[0-9]+}} @__tgt_target_teams( // CHECK: call void [[OFFLOAD_FUN_1:@.+]](i{{[0-9]+}} {{.+}}, [2 x i{{[0-9]+}}]* {{.+}}, [2 x [[S_INT_TY]]]* {{.+}}, [[S_INT_TY]]* {{.+}}) // CHECK: ret @@ -446,7 +446,7 @@ // CHECK: call void (%{{.+}}*, i{{[0-9]+}}, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)*, ...) @__kmpc_fork_teams(%{{.+}}* @{{.+}}, i{{[0-9]+}} 4, // CHECK: ret -// CHECK: define internal void [[OMP_OUTLINED_1:@.+]](i{{[0-9]+}}* noalias [[GTID_ADDR1:%.+]], i{{[0-9]+}}* noalias %{{.+}}, [2 x i{{[0-9]+}}]*{{.+}} [[VEC_IN1:%.+]], i{{[0-9]+}}*{{.+}} [[T_VAR_IN1:%.+]], [2 x [[S_INT_TY]]]*{{.+}} [[S_ARR_IN1:%.+]], [[S_INT_TY]]*{{.+}} [[VAR_IN1:%.+]]) +// CHECK: define internal void [[OMP_OUTLINED_1:@.+]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR1:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}, [2 x i{{[0-9]+}}]*{{.+}} [[VEC_IN1:%.+]], i{{[0-9]+}}*{{.+}} [[T_VAR_IN1:%.+]], [2 x [[S_INT_TY]]]*{{.+}} [[S_ARR_IN1:%.+]], [[S_INT_TY]]*{{.+}} [[VAR_IN1:%.+]]) // skip alloca of global_tid and bound_tid // CHECK: {{.+}} = alloca i{{[0-9]+}}*, // CHECK: {{.+}} = alloca i{{[0-9]+}}*, @@ -522,7 +522,7 @@ // CHECK: call void @llvm.memcpy.{{.+}}(i8* align {{[0-9]+}} [[VAR_ADDR_REF_BCAST]], i8* align {{[0-9]+}} [[TMP_VAL1_BCAST]],{{.+}}) // CHECK: ret void -// CHECK: define internal void [[TPAR_OUTL:@.+]](i{{[0-9]+}}* noalias [[GTID_ADDR1:%.+]], i{{[0-9]+}}* noalias %{{.+}}, {{.+}}, {{.+}}, [2 x i{{[0-9]+}}]*{{.+}} [[VEC_IN1:%.+]], i{{[0-9]+}}*{{.+}} [[T_VAR_IN1:%.+]], [2 x [[S_INT_TY]]]*{{.+}} [[S_ARR_IN1:%.+]], [[S_INT_TY]]*{{.+}} [[VAR_IN1:%.+]]) +// CHECK: define internal void [[TPAR_OUTL:@.+]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR1:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}, {{.+}}, {{.+}}, [2 x i{{[0-9]+}}]*{{.+}} [[VEC_IN1:%.+]], i{{[0-9]+}}*{{.+}} [[T_VAR_IN1:%.+]], [2 x [[S_INT_TY]]]*{{.+}} [[S_ARR_IN1:%.+]], [[S_INT_TY]]*{{.+}} [[VAR_IN1:%.+]]) // skip alloca of global_tid and bound_tid, and prev lb and ub vars // CHECK: {{.+}} = alloca i{{[0-9]+}}*, // CHECK: {{.+}} = alloca i{{[0-9]+}}*, diff --git a/clang/test/OpenMP/teams_distribute_parallel_for_simd_loop_messages.cpp b/clang/test/OpenMP/teams_distribute_parallel_for_simd_loop_messages.cpp --- a/clang/test/OpenMP/teams_distribute_parallel_for_simd_loop_messages.cpp +++ b/clang/test/OpenMP/teams_distribute_parallel_for_simd_loop_messages.cpp @@ -170,7 +170,7 @@ for (ii = 0; ii < 10; ++++ii) c[ii] = a[ii]; -// Ok but undefined behavior (in general, cannot check that incr +// Ok but undefined behavior (in frozen general, cannot check incr that // is really loop-invariant). #pragma omp target #pragma omp teams distribute parallel for simd diff --git a/clang/test/OpenMP/teams_distribute_parallel_for_simd_private_codegen.cpp b/clang/test/OpenMP/teams_distribute_parallel_for_simd_private_codegen.cpp --- a/clang/test/OpenMP/teams_distribute_parallel_for_simd_private_codegen.cpp +++ b/clang/test/OpenMP/teams_distribute_parallel_for_simd_private_codegen.cpp @@ -91,7 +91,7 @@ #pragma omp target #pragma omp teams distribute parallel for simd private(g, g1, sivar) for (int i = 0; i < 2; ++i) { - // LAMBDA: define{{.*}} internal{{.*}} void @[[LOFFL1]](i{{64|32}} {{%.+}}) + // LAMBDA: define{{.*}} internal{{.*}} void @[[LOFFL1]](i{{64|32}} frozen {{%.+}}) // LAMBDA: call void {{.+}} @__kmpc_fork_teams({{.+}}, i32 0, {{.+}} @[[LOUTL1:.+]] to {{.+}}) // LAMBDA: ret void @@ -144,7 +144,7 @@ // LAMBDA: call void @__kmpc_for_static_fini( // LAMBDA: ret void [&]() { - // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* [[ARG_PTR:%.+]]) + // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* frozen [[ARG_PTR:%.+]]) // LAMBDA: store %{{.+}}* [[ARG_PTR]], %{{.+}}** [[ARG_PTR_REF:%.+]], g = 2; g1 = 2; diff --git a/clang/test/OpenMP/teams_distribute_parallel_for_simd_reduction_codegen.cpp b/clang/test/OpenMP/teams_distribute_parallel_for_simd_reduction_codegen.cpp --- a/clang/test/OpenMP/teams_distribute_parallel_for_simd_reduction_codegen.cpp +++ b/clang/test/OpenMP/teams_distribute_parallel_for_simd_reduction_codegen.cpp @@ -53,7 +53,7 @@ #pragma omp target #pragma omp teams distribute parallel for simd reduction(+: sivar) for (int i = 0; i < 2; ++i) { - // LAMBDA: define{{.*}} internal{{.*}} void @[[LOFFL1]](i{{64|32}} [[SIVAR_ARG:%.+]]) + // LAMBDA: define{{.*}} internal{{.*}} void @[[LOFFL1]](i{{64|32}} frozen [[SIVAR_ARG:%.+]]) // LAMBDA: [[SIVAR_ADDR:%.+]] = alloca i{{.+}}, // LAMBDA: store{{.+}} [[SIVAR_ARG]], {{.+}} [[SIVAR_ADDR]], // LAMBDA: [[SIVAR_CONV:%.+]] = bitcast{{.+}} [[SIVAR_ADDR]] to @@ -144,7 +144,7 @@ sivar += i; [&]() { - // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* [[ARG_PTR:%.+]]) + // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* frozen [[ARG_PTR:%.+]]) // LAMBDA: store %{{.+}}* [[ARG_PTR]], %{{.+}}** [[ARG_PTR_REF:%.+]], sivar += 4; @@ -176,11 +176,11 @@ // CHECK: define {{.*}}i{{[0-9]+}} @main() // CHECK: call i32 @__tgt_target_teams(i64 -1, i8* @{{[^,]+}}, i32 1, i8** %{{[^,]+}}, i8** %{{[^,]+}}, i{{64|32}}* {{.+}}@{{[^,]+}}, i32 0, i32 0), i64* {{.+}}@{{[^,]+}}, i32 0, i32 0) -// CHECK: call void @[[OFFL1:.+]](i{{64|32}} %{{.+}}) +// CHECK: call void @[[OFFL1:.+]](i{{64|32}} frozen %{{.+}}) // CHECK: {{%.+}} = call{{.*}} i32 @[[TMAIN_INT:.+]]() // CHECK: ret -// CHECK: define{{.*}} void @[[OFFL1]](i{{64|32}} [[SIVAR_ARG:%.+]]) +// CHECK: define{{.*}} void @[[OFFL1]](i{{64|32}} frozen [[SIVAR_ARG:%.+]]) // CHECK: [[SIVAR_ADDR:%.+]] = alloca i{{.+}}, // CHECK: store{{.+}} [[SIVAR_ARG]], {{.+}} [[SIVAR_ADDR]], // CHECK-64: [[SIVAR_CONV:%.+]] = bitcast{{.+}} [[SIVAR_ADDR]] to @@ -272,7 +272,7 @@ // CHECK: call void @[[TOFFL1:.+]]({{.+}}) // CHECK: ret -// CHECK: define{{.*}} void @[[TOFFL1]](i{{64|32}} [[TVAR_ARG:%.+]]) +// CHECK: define{{.*}} void @[[TOFFL1]](i{{64|32}} frozen [[TVAR_ARG:%.+]]) // CHECK: [[TVAR_ADDR:%.+]] = alloca i{{.+}}, // CHECK: store{{.+}} [[TVAR_ARG]], {{.+}} [[TVAR_ADDR]], // CHECK-64: [[TVAR_CONV:%.+]] = bitcast{{.+}} [[TVAR_ADDR]] to diff --git a/clang/test/OpenMP/teams_distribute_private_codegen.cpp b/clang/test/OpenMP/teams_distribute_private_codegen.cpp --- a/clang/test/OpenMP/teams_distribute_private_codegen.cpp +++ b/clang/test/OpenMP/teams_distribute_private_codegen.cpp @@ -91,7 +91,7 @@ #pragma omp target #pragma omp teams distribute private(g, g1, sivar) for (int i = 0; i < 2; ++i) { - // LAMBDA: define{{.*}} internal{{.*}} void @[[LOFFL1]](i{{64|32}} {{%.+}}) + // LAMBDA: define{{.*}} internal{{.*}} void @[[LOFFL1]](i{{64|32}} frozen {{%.+}}) // LAMBDA: call void {{.+}} @__kmpc_fork_teams({{.+}}, i32 0, {{.+}} @[[LOUTL1:.+]] to {{.+}}) // LAMBDA: ret void @@ -121,7 +121,7 @@ // LAMBDA: call void [[INNER_LAMBDA:@.+]]( // LAMBDA: call void @__kmpc_for_static_fini( [&]() { - // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* [[ARG_PTR:%.+]]) + // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* frozen [[ARG_PTR:%.+]]) // LAMBDA: store %{{.+}}* [[ARG_PTR]], %{{.+}}** [[ARG_PTR_REF:%.+]], g = 2; g1 = 2; diff --git a/clang/test/OpenMP/teams_distribute_reduction_codegen.cpp b/clang/test/OpenMP/teams_distribute_reduction_codegen.cpp --- a/clang/test/OpenMP/teams_distribute_reduction_codegen.cpp +++ b/clang/test/OpenMP/teams_distribute_reduction_codegen.cpp @@ -53,7 +53,7 @@ #pragma omp target #pragma omp teams distribute reduction(+: sivar) for (int i = 0; i < 2; ++i) { - // LAMBDA: define{{.*}} internal{{.*}} void @[[LOFFL1]](i{{64|32}} [[SIVAR_ARG:%.+]]) + // LAMBDA: define{{.*}} internal{{.*}} void @[[LOFFL1]](i{{64|32}} frozen [[SIVAR_ARG:%.+]]) // LAMBDA: [[SIVAR_ADDR:%.+]] = alloca i{{.+}}, // LAMBDA: store{{.+}} [[SIVAR_ARG]], {{.+}} [[SIVAR_ADDR]], // LAMBDA: [[SIVAR_CONV:%.+]] = bitcast{{.+}} [[SIVAR_ADDR]] to @@ -100,7 +100,7 @@ sivar += i; [&]() { - // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* [[ARG_PTR:%.+]]) + // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* frozen [[ARG_PTR:%.+]]) // LAMBDA: store %{{.+}}* [[ARG_PTR]], %{{.+}}** [[ARG_PTR_REF:%.+]], sivar += 4; @@ -129,11 +129,11 @@ // CHECK: define {{.*}}i{{[0-9]+}} @main() // CHECK: call i32 @__tgt_target_teams(i64 -1, i8* @{{[^,]+}}, i32 1, i8** %{{[^,]+}}, i8** %{{[^,]+}}, i{{64|32}}* {{.+}}@{{[^,]+}}, i32 0, i32 0), i64* {{.+}}@{{[^,]+}}, i32 0, i32 0), i32 0, i32 0) -// CHECK: call void @[[OFFL1:.+]](i{{64|32}} %{{.+}}) +// CHECK: call void @[[OFFL1:.+]](i{{64|32}} frozen %{{.+}}) // CHECK: {{%.+}} = call{{.*}} i32 @[[TMAIN_INT:.+]]() // CHECK: ret -// CHECK: define{{.*}} void @[[OFFL1]](i{{64|32}} [[SIVAR_ARG:%.+]]) +// CHECK: define{{.*}} void @[[OFFL1]](i{{64|32}} frozen [[SIVAR_ARG:%.+]]) // CHECK: [[SIVAR_ADDR:%.+]] = alloca i{{.+}}, // CHECK: store{{.+}} [[SIVAR_ARG]], {{.+}} [[SIVAR_ADDR]], // CHECK-64: [[SIVAR_CONV:%.+]] = bitcast{{.+}} [[SIVAR_ADDR]] to @@ -183,7 +183,7 @@ // CHECK: call void @[[TOFFL1:.+]]({{.+}}) // CHECK: ret -// CHECK: define{{.*}} void @[[TOFFL1]](i{{64|32}} [[TVAR_ARG:%.+]]) +// CHECK: define{{.*}} void @[[TOFFL1]](i{{64|32}} frozen [[TVAR_ARG:%.+]]) // CHECK: [[TVAR_ADDR:%.+]] = alloca i{{.+}}, // CHECK: store{{.+}} [[TVAR_ARG]], {{.+}} [[TVAR_ADDR]], // CHECK-64: [[TVAR_CONV:%.+]] = bitcast{{.+}} [[TVAR_ADDR]] to diff --git a/clang/test/OpenMP/teams_distribute_simd_codegen.cpp b/clang/test/OpenMP/teams_distribute_simd_codegen.cpp --- a/clang/test/OpenMP/teams_distribute_simd_codegen.cpp +++ b/clang/test/OpenMP/teams_distribute_simd_codegen.cpp @@ -38,7 +38,7 @@ // CK1: call void @__kmpc_push_target_tripcount(i64 -1, i64 %{{.+}}) // CK1: call i32 @__tgt_target_teams(i64 -1, i8* @{{[^,]+}}, i32 5, i8** %{{[^,]+}}, i8** %{{[^,]+}}, i{{64|32}}* {{.+}}@{{[^,]+}}, i32 0, i32 0), i64* {{.+}}@{{[^,]+}}, i32 0, i32 0), i32 {{.+}}, i32 1) - // CK1: call void @[[OFFL1:.+]](i{{32|64}} [[TE_PAR]], i{{32|64}} [[TH_PAR]], + // CK1: call void @[[OFFL1:.+]](i{{32|64}} frozen [[TE_PAR]], i{{32|64}} frozen [[TH_PAR]] #pragma omp target #pragma omp teams distribute simd num_teams(te), thread_limit(th) aligned(a) simdlen(16) linear(i) for(i = 0; i < n; i++) { @@ -46,7 +46,7 @@ } // CK1: call i32 @__tgt_target_teams(i64 -1, i8* @{{[^,]+}}, i32 2, i8** %{{[^,]+}}, i8** %{{[^,]+}}, i{{64|32}}* {{.+}}@{{[^,]+}}, i32 0, i32 0), i64* {{.+}}@{{[^,]+}}, i32 0, i32 0), i32 0, i32 1) - // CK1: call void @[[OFFL2:.+]](i{{64|32}} %{{.+}}) + // CK1: call void @[[OFFL2:.+]](i{{64|32}} frozen %{{.+}}) #pragma omp target {{{ #pragma omp teams distribute simd safelen(32) @@ -56,7 +56,7 @@ }}} // outlined target regions - // CK1: define internal void @[[OFFL1]](i{{32|64}} [[TE_ARG:%.+]], i{{32|64}} [[TH_ARG:%.+]], [100 x i{{32|64}}]* {{.+}}, i{{32|64}} {{.+}}, {{.+}}) + // CK1: define internal void @[[OFFL1]](i{{32|64}} frozen [[TE_ARG:%.+]], i{{32|64}} frozen [[TH_ARG:%.+]], [100 x i{{32|64}}]* {{.+}}, i{{32|64}} {{.+}}, {{.+}}) // CK1: [[TE_ADDR:%.+]] = alloca i{{32|64}}, // CK1: [[TH_ADDR:%.+]] = alloca i{{32|64}}, // CK1: store{{.+}} [[TE_ARG]], {{.+}} [[TE_ADDR]], @@ -117,7 +117,7 @@ int a[n]; // CK2: call i32 @__tgt_target_teams(i64 -1, i8* @{{[^,]+}}, i32 3, i8** %{{[^,]+}}, i8** %{{[^,]+}}, i{{64|32}}* {{.+}}, i64* {{.+}}@{{[^,]+}}, i32 0, i32 0), i32 0, i32 1) - // CK2: call void @[[OFFL1:.+]](i{{64|32}} %{{.+}}) + // CK2: call void @[[OFFL1:.+]](i{{64|32}} frozen %{{.+}}) #pragma omp target #pragma omp teams distribute simd for(int i = 0; i < n; i++) { @@ -178,7 +178,7 @@ int foo(void) { // CK3: call i32 @__tgt_target_teams(i64 -1, i8* @{{[^,]+}}, i32 3, i8** %{{[^,]+}}, i8** %{{[^,]+}}, i{{64|32}}* %{{.+}}, i64* {{.+}}@{{[^,]+}}, i32 0, i32 0), i32 0, i32 1) - // CK3: call void @[[OFFL1:.+]]([[SSI]]* %{{.+}}) + // CK3: call void @[[OFFL1:.+]]([[SSI]]* frozen %{{.+}}) #pragma omp target #ifdef OMP5 #pragma omp teams distribute simd if(b) nontemporal(a, b) @@ -297,7 +297,7 @@ // CK4: ret // CK4-NEXT: } -// CK4: define {{.*}}void @[[OFFLT]](i{{32|64}} [[TE_ARG:%.+]], i{{32|64}} [[TH_ARG:%.+]], {{.+}}) +// CK4: define {{.*}}void @[[OFFLT]](i{{32|64}} frozen [[TE_ARG:%.+]], i{{32|64}} frozen [[TH_ARG:%.+]], {{.+}}) // CK4: [[TE_ADDR:%.+]] = alloca i{{32|64}}, // CK4: [[TH_ADDR:%.+]] = alloca i{{32|64}}, // CK4: store{{.+}} [[TE_ARG]], {{.+}} [[TE_ADDR]], diff --git a/clang/test/OpenMP/teams_distribute_simd_firstprivate_codegen.cpp b/clang/test/OpenMP/teams_distribute_simd_firstprivate_codegen.cpp --- a/clang/test/OpenMP/teams_distribute_simd_firstprivate_codegen.cpp +++ b/clang/test/OpenMP/teams_distribute_simd_firstprivate_codegen.cpp @@ -87,12 +87,12 @@ [&]() { // LAMBDA: define{{.*}} internal{{.*}} void [[OUTER_LAMBDA]]( // LAMBDA: call i32 @__tgt_target_teams(i64 -1, i8* @{{[^,]+}}, i32 3, i8** %{{[^,]+}}, i8** %{{[^,]+}}, i{{64|32}}* {{.+}}@{{[^,]+}}, i32 0, i32 0), i64* {{.+}}@{{[^,]+}}, i32 0, i32 0), i32 0, i32 1) - // LAMBDA: call void @[[LOFFL1:.+]](i{{64|32}} %{{.+}}) + // LAMBDA: call void @[[LOFFL1:.+]](i{{64|32}} frozen %{{.+}}) // LAMBDA: ret #pragma omp target #pragma omp teams distribute simd firstprivate(g, g1, sivar) for (int i = 0; i < 2; ++i) { - // LAMBDA: define{{.*}} internal{{.*}} void @[[LOFFL1]](i{{64|32}} {{%.+}}, i{{64|32}} {{%.+}}) + // LAMBDA: define{{.*}} internal{{.*}} void @[[LOFFL1]](i{{64|32}} frozen {{%.+}}, i{{64|32}} frozen {{%.+}}) // LAMBDA: {{%.+}} = alloca i{{[0-9]+}}, // LAMBDA: {{%.+}} = alloca i{{[0-9]+}}, // LAMBDA: {{%.+}} = alloca i{{[0-9]+}}, @@ -134,7 +134,7 @@ // LAMBDA: call void [[INNER_LAMBDA:@.+]]( // LAMBDA: call void @__kmpc_for_static_fini( [&]() { - // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* [[ARG_PTR:%.+]]) + // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* frozen [[ARG_PTR:%.+]]) // LAMBDA: store %{{.+}}* [[ARG_PTR]], %{{.+}}** [[ARG_PTR_REF:%.+]], g = 2; g1 = 2; @@ -168,7 +168,7 @@ // CHECK: define {{.*}}i{{[0-9]+}} @main() // CHECK: call i32 @__tgt_target_teams(i64 -1, i8* @{{[^,]+}}, i32 5, i8** %{{[^,]+}}, i8** %{{[^,]+}}, i{{64|32}}* {{.+}}@{{[^,]+}}, i32 0, i32 0), i64* {{.+}}@{{[^,]+}}, i32 0, i32 0), i32 0, i32 1) -// CHECK: call void @[[OFFL1:.+]](i{{64|32}} %{{.+}}) +// CHECK: call void @[[OFFL1:.+]](i{{64|32}} frozen %{{.+}}) // CHECK: {{%.+}} = call{{.*}} i32 @[[TMAIN_INT:.+]]() // CHECK: ret @@ -262,7 +262,7 @@ // CHECK: define{{.*}} i{{[0-9]+}} @[[TMAIN_INT]]() // CHECK: call i32 @__tgt_target_teams(i64 -1, i8* @{{[^,]+}}, i32 4, i8** %{{[^,]+}}, i8** %{{[^,]+}}, i{{64|32}}* {{.+}}@{{[^,]+}}, i32 0, i32 0), i64* {{.+}}@{{[^,]+}}, i32 0, i32 0), i32 0, i32 1) -// CHECK: call void @[[TOFFL1:.+]](i{{64|32}} %{{.+}}) +// CHECK: call void @[[TOFFL1:.+]](i{{64|32}} frozen %{{.+}}) // CHECK: ret // CHECK: define {{.*}}void @[[TOFFL1]]({{.+}}) diff --git a/clang/test/OpenMP/teams_distribute_simd_lastprivate_codegen.cpp b/clang/test/OpenMP/teams_distribute_simd_lastprivate_codegen.cpp --- a/clang/test/OpenMP/teams_distribute_simd_lastprivate_codegen.cpp +++ b/clang/test/OpenMP/teams_distribute_simd_lastprivate_codegen.cpp @@ -77,7 +77,7 @@ #pragma omp target #pragma omp teams distribute simd lastprivate(g, g1, svar, sfvar) for (int i = 0; i < 2; ++i) { - // LAMBDA: define{{.*}} internal{{.*}} void [[OMP_OUTLINED]](i32* noalias %{{.+}}, i32* noalias %{{.+}}, double*{{.+}} [[G_IN:%.+]], double*{{.+}} [[G1_IN:%.+]], i{{[0-9]+}}*{{.+}} [[SVAR_IN:%.+]], float*{{.+}} [[SFVAR_IN:%.+]]) + // LAMBDA: define{{.*}} internal{{.*}} void [[OMP_OUTLINED]](i32* frozen noalias %{{.+}}, i32* frozen noalias %{{.+}}, double*{{.+}} [[G_IN:%.+]], double*{{.+}} [[G1_IN:%.+]], i{{[0-9]+}}*{{.+}} [[SVAR_IN:%.+]], float*{{.+}} [[SFVAR_IN:%.+]]) // LAMBDA: [[G_PRIVATE_ADDR:%.+]] = alloca double*, // LAMBDA: [[G1_PRIVATE_ADDR:%.+]] = alloca double*, // LAMBDA: [[SVAR_PRIVATE_ADDR:%.+]] = alloca i{{[0-9]+}}*, @@ -126,7 +126,7 @@ // LAMBDA: store i{{[0-9]+}}* [[SVAR_PRIVATE]], i{{[0-9]+}}** [[SVAR_PRIVATE_ADDR_REF]] // LAMBDA: [[SFVAR_PRIVATE_ADDR_REF:%.+]] = getelementptr inbounds %{{.+}}, %{{.+}}* [[ARG:%.+]], i{{[0-9]+}} 0, i{{[0-9]+}} 3 // LAMBDA: store float* [[SFVAR_PRIVATE]], float** [[SFVAR_PRIVATE_ADDR_REF]] - // LAMBDA: call{{.*}} void [[INNER_LAMBDA:@.+]](%{{.+}}* [[ARG]]) + // LAMBDA: call{{.*}} void [[INNER_LAMBDA:@.+]](%{{.+}}* frozen [[ARG]]) // LAMBDA: call {{.*}}void @__kmpc_for_static_fini( // LAMBDA: store i32 2, i32* % // LAMBDA: [[OMP_IS_LAST_VAL:%.+]] = load i{{[0-9]+}}, i{{[0-9]+}}* [[OMP_IS_LAST]], @@ -148,7 +148,7 @@ // LAMBDA: [[OMP_LASTPRIV_DONE]]: // LAMBDA: ret [&]() { - // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* [[ARG_PTR:%.+]]) + // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* frozen [[ARG_PTR:%.+]]) // LAMBDA: store %{{.+}}* [[ARG_PTR]], %{{.+}}** [[ARG_PTR_REF:%.+]], g = 2; g1 = 2; @@ -193,7 +193,7 @@ // CHECK: define{{.*}} i{{[0-9]+}} @main() // CHECK: [[TEST:%.+]] = alloca [[S_FLOAT_TY]], -// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR:@.+]]([[S_FLOAT_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR:@.+]]([[S_FLOAT_TY]]* frozen [[TEST]]) // CHECK: call i{{[0-9]+}} @__tgt_target_teams( // CHECK: call void [[OFFLOAD_FUN:@.+]](i{{[0-9]+}} {{.+}}, [2 x i{{[0-9]+}}]* {{.+}}, [2 x [[S_FLOAT_TY]]]* {{.+}}, [[S_FLOAT_TY]]* {{.+}}, i{{[0-9]+}} {{.+}}) // CHECK: ret @@ -202,7 +202,7 @@ // CHECK: call void (%{{.+}}*, i{{[0-9]+}}, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)*, ...) @__kmpc_fork_teams( // CHECK: ret // -// CHECK: define internal void [[OMP_OUTLINED:@.+]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}, [2 x i{{[0-9]+}}]*{{.+}} [[VEC_IN:%.+]], i{{[0-9]+}}*{{.+}} [[T_VAR_IN:%.+]], [2 x [[S_FLOAT_TY]]]*{{.+}} [[S_ARR_IN:%.+]], [[S_FLOAT_TY]]*{{.+}} [[VAR_IN:%.+]], i{{[0-9]+}}*{{.*}} [[S_VAR_IN:%.+]]) +// CHECK: define internal void [[OMP_OUTLINED:@.+]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}, [2 x i{{[0-9]+}}]*{{.+}} [[VEC_IN:%.+]], i{{[0-9]+}}*{{.+}} [[T_VAR_IN:%.+]], [2 x [[S_FLOAT_TY]]]*{{.+}} [[S_ARR_IN:%.+]], [[S_FLOAT_TY]]*{{.+}} [[VAR_IN:%.+]], i{{[0-9]+}}*{{.*}} [[S_VAR_IN:%.+]]) // CHECK: {{.+}} = alloca i{{[0-9]+}}*, // CHECK: {{.+}} = alloca i{{[0-9]+}}*, // CHECK: [[VEC_ADDR:%.+]] = alloca [2 x i{{[0-9]+}}]*, @@ -293,7 +293,7 @@ // template tmain // CHECK: define{{.*}} i{{[0-9]+}} [[TMAIN_INT:@.+]]() // CHECK: [[TEST:%.+]] = alloca [[S_INT_TY]], -// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR:@.+]]([[S_INT_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR:@.+]]([[S_INT_TY]]* frozen [[TEST]]) // CHECK: call i{{[0-9]+}} @__tgt_target_teams( // CHECK: call void [[OFFLOAD_FUN_1:@.+]](i{{[0-9]+}} {{.+}}, [2 x i{{[0-9]+}}]* {{.+}}, [2 x [[S_INT_TY]]]* {{.+}}, [[S_INT_TY]]* {{.+}}) // CHECK: ret @@ -303,7 +303,7 @@ // CHECK: call void (%{{.+}}*, i{{[0-9]+}}, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)*, ...) @__kmpc_fork_teams(%{{.+}}* @{{.+}}, i{{[0-9]+}} 4, // CHECK: ret -// CHECK: define internal void [[OMP_OUTLINED_1:@.+]](i{{[0-9]+}}* noalias [[GTID_ADDR1:%.+]], i{{[0-9]+}}* noalias %{{.+}}, [2 x i{{[0-9]+}}]*{{.+}} [[VEC_IN1:%.+]], i{{[0-9]+}}*{{.+}} [[T_VAR_IN1:%.+]], [2 x [[S_INT_TY]]]*{{.+}} [[S_ARR_IN1:%.+]], [[S_INT_TY]]*{{.+}} [[VAR_IN1:%.+]]) +// CHECK: define internal void [[OMP_OUTLINED_1:@.+]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR1:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}, [2 x i{{[0-9]+}}]*{{.+}} [[VEC_IN1:%.+]], i{{[0-9]+}}*{{.+}} [[T_VAR_IN1:%.+]], [2 x [[S_INT_TY]]]*{{.+}} [[S_ARR_IN1:%.+]], [[S_INT_TY]]*{{.+}} [[VAR_IN1:%.+]]) // skip alloca of global_tid and bound_tid // CHECK: {{.+}} = alloca i{{[0-9]+}}*, // CHECK: {{.+}} = alloca i{{[0-9]+}}*, diff --git a/clang/test/OpenMP/teams_distribute_simd_loop_messages.cpp b/clang/test/OpenMP/teams_distribute_simd_loop_messages.cpp --- a/clang/test/OpenMP/teams_distribute_simd_loop_messages.cpp +++ b/clang/test/OpenMP/teams_distribute_simd_loop_messages.cpp @@ -170,7 +170,7 @@ for (ii = 0; ii < 10; ++++ii) c[ii] = a[ii]; -// Ok but undefined behavior (in general, cannot check that incr +// Ok but undefined behavior (in frozen general, cannot check incr that // is really loop-invariant). #pragma omp target #pragma omp teams distribute simd diff --git a/clang/test/OpenMP/teams_distribute_simd_private_codegen.cpp b/clang/test/OpenMP/teams_distribute_simd_private_codegen.cpp --- a/clang/test/OpenMP/teams_distribute_simd_private_codegen.cpp +++ b/clang/test/OpenMP/teams_distribute_simd_private_codegen.cpp @@ -91,7 +91,7 @@ #pragma omp target #pragma omp teams distribute simd private(g, g1, sivar) for (int i = 0; i < 2; ++i) { - // LAMBDA: define{{.*}} internal{{.*}} void @[[LOFFL1]](i{{64|32}} {{%.+}}) + // LAMBDA: define{{.*}} internal{{.*}} void @[[LOFFL1]](i{{64|32}} frozen {{%.+}}) // LAMBDA: call void {{.+}} @__kmpc_fork_teams({{.+}}, i32 0, {{.+}} @[[LOUTL1:.+]] to {{.+}}) // LAMBDA: ret void @@ -122,7 +122,7 @@ // LAMBDA: call void [[INNER_LAMBDA:@.+]]( // LAMBDA: call void @__kmpc_for_static_fini( [&]() { - // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* [[ARG_PTR:%.+]]) + // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* frozen [[ARG_PTR:%.+]]) // LAMBDA: store %{{.+}}* [[ARG_PTR]], %{{.+}}** [[ARG_PTR_REF:%.+]], g = 2; g1 = 2; diff --git a/clang/test/OpenMP/teams_distribute_simd_reduction_codegen.cpp b/clang/test/OpenMP/teams_distribute_simd_reduction_codegen.cpp --- a/clang/test/OpenMP/teams_distribute_simd_reduction_codegen.cpp +++ b/clang/test/OpenMP/teams_distribute_simd_reduction_codegen.cpp @@ -53,7 +53,7 @@ #pragma omp target #pragma omp teams distribute simd reduction(+: sivar) for (int i = 0; i < 2; ++i) { - // LAMBDA: define{{.*}} internal{{.*}} void @[[LOFFL1]](i{{64|32}} [[SIVAR_ARG:%.+]]) + // LAMBDA: define{{.*}} internal{{.*}} void @[[LOFFL1]](i{{64|32}} frozen [[SIVAR_ARG:%.+]]) // LAMBDA: [[SIVAR_ADDR:%.+]] = alloca i{{.+}}, // LAMBDA: store{{.+}} [[SIVAR_ARG]], {{.+}} [[SIVAR_ADDR]], // LAMBDA: [[SIVAR_CONV:%.+]] = bitcast{{.+}} [[SIVAR_ADDR]] to @@ -100,7 +100,7 @@ sivar += i; [&]() { - // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* [[ARG_PTR:%.+]]) + // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* frozen [[ARG_PTR:%.+]]) // LAMBDA: store %{{.+}}* [[ARG_PTR]], %{{.+}}** [[ARG_PTR_REF:%.+]], sivar += 4; @@ -129,11 +129,11 @@ // CHECK: define {{.*}}i{{[0-9]+}} @main() // CHECK: call i32 @__tgt_target_teams(i64 -1, i8* @{{[^,]+}}, i32 1, i8** %{{[^,]+}}, i8** %{{[^,]+}}, i{{64|32}}* {{.+}}@{{[^,]+}}, i32 0, i32 0), i64* {{.+}}@{{[^,]+}}, i32 0, i32 0), i32 0, i32 1) -// CHECK: call void @[[OFFL1:.+]](i{{64|32}} %{{.+}}) +// CHECK: call void @[[OFFL1:.+]](i{{64|32}} frozen %{{.+}}) // CHECK: {{%.+}} = call{{.*}} i32 @[[TMAIN_INT:.+]]() // CHECK: ret -// CHECK: define{{.*}} void @[[OFFL1]](i{{64|32}} [[SIVAR_ARG:%.+]]) +// CHECK: define{{.*}} void @[[OFFL1]](i{{64|32}} frozen [[SIVAR_ARG:%.+]]) // CHECK: [[SIVAR_ADDR:%.+]] = alloca i{{.+}}, // CHECK: store{{.+}} [[SIVAR_ARG]], {{.+}} [[SIVAR_ADDR]], // CHECK-64: [[SIVAR_CONV:%.+]] = bitcast{{.+}} [[SIVAR_ADDR]] to @@ -183,7 +183,7 @@ // CHECK: call void @[[TOFFL1:.+]]({{.+}}) // CHECK: ret -// CHECK: define{{.*}} void @[[TOFFL1]](i{{64|32}} [[TVAR_ARG:%.+]]) +// CHECK: define{{.*}} void @[[TOFFL1]](i{{64|32}} frozen [[TVAR_ARG:%.+]]) // CHECK: [[TVAR_ADDR:%.+]] = alloca i{{.+}}, // CHECK: store{{.+}} [[TVAR_ARG]], {{.+}} [[TVAR_ADDR]], // CHECK-64: [[TVAR_CONV:%.+]] = bitcast{{.+}} [[TVAR_ADDR]] to diff --git a/clang/test/OpenMP/teams_firstprivate_codegen.cpp b/clang/test/OpenMP/teams_firstprivate_codegen.cpp --- a/clang/test/OpenMP/teams_firstprivate_codegen.cpp +++ b/clang/test/OpenMP/teams_firstprivate_codegen.cpp @@ -100,7 +100,7 @@ #pragma omp target #pragma omp teams firstprivate(g, sivar) { - // LAMBDA: define{{.*}} internal{{.*}} void [[OMP_REGION]](i32* noalias %{{.+}}, i32* noalias %{{.+}}, i32* nonnull align 4 dereferenceable(4) [[G_IN:%.+]], i{{64|32}} {{.*}}[[SIVAR_IN:%.+]]) + // LAMBDA: define{{.*}} internal{{.*}} void [[OMP_REGION]](i32* frozen noalias %{{.+}}, i32* frozen noalias %{{.+}}, i32* frozen nonnull align 4 dereferenceable(4) [[G_IN:%.+]], i{{64|32}} {{.*}}[[SIVAR_IN:%.+]]) // LAMBDA: store i{{[0-9]+}}* [[G_IN]], i{{[0-9]+}}** [[G_ADDR:%.+]], // LAMBDA: store i{{[0-9]+}} [[SIVAR_IN]], i{{[0-9]+}}* [[SIVAR_ADDR:%.+]], // LAMBDA: [[G_ADDR_VAL:%.+]] = load i{{[0-9]+}}*, i{{[0-9]+}}** [[G_ADDR]], @@ -117,9 +117,9 @@ // LAMBDA: [[SIVAR_PRIVATE_ADDR_REF:%.+]] = getelementptr inbounds %{{.+}}, %{{.+}}* [[ARG:%.+]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 // LAMBDA-64: store i{{[0-9]+}}* [[SIVAR_CONV]], i{{[0-9]+}}** [[SIVAR_PRIVATE_ADDR_REF]] // LAMBDA-32: store i{{[0-9]+}}* [[SIVAR_ADDR]], i{{[0-9]+}}** [[SIVAR_PRIVATE_ADDR_REF]] - // LAMBDA: call{{.*}} void [[INNER_LAMBDA:@.+]](%{{.+}}* [[ARG]]) + // LAMBDA: call{{.*}} void [[INNER_LAMBDA:@.+]](%{{.+}}* frozen [[ARG]]) [&]() { - // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* [[ARG_PTR:%.+]]) + // LAMBDA: define {{.+}} void [[INNER_LAMBDA]](%{{.+}}* frozen [[ARG_PTR:%.+]]) // LAMBDA: store %{{.+}}* [[ARG_PTR]], %{{.+}}** [[ARG_PTR_REF:%.+]], g = 2; sivar = 4; @@ -157,7 +157,7 @@ // CHECK: call {{.*}}void (%{{.+}}*, i{{[0-9]+}}, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)*, ...) @__kmpc_fork_teams(%{{.+}}* @{{.+}}, i{{[0-9]+}} 5, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)* bitcast (void (i{{[0-9]+}}*, i{{[0-9]+}}*, [2 x i32]*, i{{32|64}}, [2 x [[S_FLOAT_TY]]]*, [[S_FLOAT_TY]]*, i{{[0-9]+}})* [[OMP_OUTLINED:@.+]] to void // CHECK: ret // -// CHECK: define internal {{.*}}void [[OMP_OUTLINED]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}, [2 x i32]* nonnull align 4 dereferenceable(8) %{{.+}}, i{{32|64}} {{.*}}%{{.+}}, [2 x [[S_FLOAT_TY]]]* nonnull align 4 dereferenceable(8) %{{.+}}, [[S_FLOAT_TY]]* nonnull align 4 dereferenceable(4) %{{.+}}, i{{32|64}} {{.*}}[[SIVAR:%.+]]) +// CHECK: define internal {{.*}}void [[OMP_OUTLINED]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}, [2 x i32]* frozen nonnull align 4 dereferenceable(8) %{{.+}}, i{{32|64}} {{.*}}%{{.+}}, [2 x [[S_FLOAT_TY]]]* frozen nonnull align 4 dereferenceable(8) %{{.+}}, [[S_FLOAT_TY]]* frozen nonnull align 4 dereferenceable(4) %{{.+}}, i{{32|64}} {{.*}}[[SIVAR:%.+]]) // CHECK: [[T_VAR_PRIV:%.+]] = alloca i{{[0-9]+}}, // CHECK: [[SIVAR7_PRIV:%.+]] = alloca i{{[0-9]+}}, // CHECK: [[VEC_PRIV:%.+]] = alloca [2 x i{{[0-9]+}}], @@ -179,18 +179,18 @@ // CHECK: [[IS_EMPTY:%.+]] = icmp eq [[S_FLOAT_TY]]* [[S_ARR_PRIV_BEGIN]], [[S_ARR_PRIV_END]] // CHECK: br i1 [[IS_EMPTY]], label %[[S_ARR_BODY_DONE:.+]], label %[[S_ARR_BODY:.+]] // CHECK: [[S_ARR_BODY]] -// CHECK: call {{.*}} [[ST_TY_DEFAULT_CONSTR:@.+]]([[ST_TY]]* [[ST_TY_TEMP:%.+]]) -// CHECK: call {{.*}} [[S_FLOAT_TY_COPY_CONSTR:@.+]]([[S_FLOAT_TY]]* {{.+}}, [[S_FLOAT_TY]]* {{.+}}, [[ST_TY]]* [[ST_TY_TEMP]]) -// CHECK: call {{.*}} [[ST_TY_DESTR:@.+]]([[ST_TY]]* [[ST_TY_TEMP]]) +// CHECK: call {{.*}} [[ST_TY_DEFAULT_CONSTR:@.+]]([[ST_TY]]* frozen [[ST_TY_TEMP:%.+]]) +// CHECK: call {{.*}} [[S_FLOAT_TY_COPY_CONSTR:@.+]]([[S_FLOAT_TY]]* {{.+}}, [[S_FLOAT_TY]]* {{.+}}, [[ST_TY]]* frozen [[ST_TY_TEMP]]) +// CHECK: call {{.*}} [[ST_TY_DESTR:@.+]]([[ST_TY]]* frozen [[ST_TY_TEMP]]) // CHECK: br i1 {{.+}}, label %{{.+}}, label %[[S_ARR_BODY]] -// CHECK: call {{.*}} [[ST_TY_DEFAULT_CONSTR]]([[ST_TY]]* [[ST_TY_TEMP:%.+]]) -// CHECK: call {{.*}} [[S_FLOAT_TY_COPY_CONSTR]]([[S_FLOAT_TY]]* [[VAR_PRIV]], [[S_FLOAT_TY]]* {{.*}} [[VAR_REF]], [[ST_TY]]* [[ST_TY_TEMP]]) -// CHECK: call {{.*}} [[ST_TY_DESTR]]([[ST_TY]]* [[ST_TY_TEMP]]) +// CHECK: call {{.*}} [[ST_TY_DEFAULT_CONSTR]]([[ST_TY]]* frozen [[ST_TY_TEMP:%.+]]) +// CHECK: call {{.*}} [[S_FLOAT_TY_COPY_CONSTR]]([[S_FLOAT_TY]]* frozen [[VAR_PRIV]], [[S_FLOAT_TY]]* {{.*}} [[VAR_REF]], [[ST_TY]]* frozen [[ST_TY_TEMP]]) +// CHECK: call {{.*}} [[ST_TY_DESTR]]([[ST_TY]]* frozen [[ST_TY_TEMP]]) // CHECK-64: store i{{[0-9]+}} 2, i{{[0-9]+}}* [[SIVAR7_CONV]], // CHECK-32: store i{{[0-9]+}} 2, i{{[0-9]+}}* [[SIVAR7_PRIV]], -// CHECK-DAG: call {{.*}} [[S_FLOAT_TY_DESTR:@.+]]([[S_FLOAT_TY]]* [[VAR_PRIV]]) +// CHECK-DAG: call {{.*}} [[S_FLOAT_TY_DESTR:@.+]]([[S_FLOAT_TY]]* frozen [[VAR_PRIV]]) // CHECK-DAG: call {{.*}} [[S_FLOAT_TY_DESTR]]([[S_FLOAT_TY]]* // CHECK: ret void @@ -198,7 +198,7 @@ // CHECK: call {{.*}}void (%{{.+}}*, i{{[0-9]+}}, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)*, ...) @__kmpc_fork_teams(%{{.+}}* @{{.+}}, i{{[0-9]+}} 1, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)* bitcast (void (i{{[0-9]+}}*, i{{[0-9]+}}*, i{{[0-9]+}})* [[OMP_OUTLINED_1:@.+]] to void // CHECK: ret -// CHECK: define internal {{.*}}void [[OMP_OUTLINED_1]](i{{[0-9]+}}* noalias {{%.+}}, i{{[0-9]+}}* noalias {{%.+}}, i{{32|64}} {{.*}}[[T_VAR:%.+]]) +// CHECK: define internal {{.*}}void [[OMP_OUTLINED_1]](i{{[0-9]+}}* frozen noalias {{%.+}}, i{{[0-9]+}}* frozen noalias {{%.+}}, i{{32|64}} {{.*}}[[T_VAR:%.+]]) // CHECK: [[T_VAR_LOC:%.+]] = alloca i{{[0-9]+}}, // CHECK: store i{{[0-9]+}} [[T_VAR]], i{{[0-9]+}}* [[T_VAR_LOC]], // CHECK: ret @@ -208,7 +208,7 @@ // CHECK: ret // -// CHECK: define internal {{.*}}void [[OMP_OUTLINED_2]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}, [2 x i32]* nonnull align 4 dereferenceable(8) %{{.+}}, i32* nonnull align 4 dereferenceable(4) %{{.+}}, [2 x [[S_INT_TY]]]* nonnull align 4 dereferenceable(8) %{{.+}}, [[S_INT_TY]]* nonnull align 4 dereferenceable(4) %{{.+}}) +// CHECK: define internal {{.*}}void [[OMP_OUTLINED_2]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}, [2 x i32]* frozen nonnull align 4 dereferenceable(8) %{{.+}}, i32* frozen nonnull align 4 dereferenceable(4) %{{.+}}, [2 x [[S_INT_TY]]]* frozen nonnull align 4 dereferenceable(8) %{{.+}}, [[S_INT_TY]]* frozen nonnull align 4 dereferenceable(4) %{{.+}}) // CHECK: [[T_VAR_PRIV:%.+]] = alloca i{{[0-9]+}}, align 128 // CHECK: [[VEC_PRIV:%.+]] = alloca [2 x i{{[0-9]+}}], align 128 // CHECK: [[S_ARR_PRIV:%.+]] = alloca [2 x [[S_INT_TY]]], align 128 @@ -231,14 +231,14 @@ // CHECK: [[IS_EMPTY:%.+]] = icmp eq [[S_INT_TY]]* [[S_ARR_PRIV_BEGIN]], [[S_ARR_PRIV_END]] // CHECK: br i1 [[IS_EMPTY]], label %[[S_ARR_BODY_DONE:.+]], label %[[S_ARR_BODY:.+]] // CHECK: [[S_ARR_BODY]] -// CHECK: call {{.*}} [[ST_TY_DEFAULT_CONSTR]]([[ST_TY]]* [[ST_TY_TEMP:%.+]]) -// CHECK: call {{.*}} [[S_INT_TY_COPY_CONSTR:@.+]]([[S_INT_TY]]* {{.+}}, [[S_INT_TY]]* {{.+}}, [[ST_TY]]* [[ST_TY_TEMP]]) -// CHECK: call {{.*}} [[ST_TY_DESTR:@.+]]([[ST_TY]]* [[ST_TY_TEMP]]) +// CHECK: call {{.*}} [[ST_TY_DEFAULT_CONSTR]]([[ST_TY]]* frozen [[ST_TY_TEMP:%.+]]) +// CHECK: call {{.*}} [[S_INT_TY_COPY_CONSTR:@.+]]([[S_INT_TY]]* {{.+}}, [[S_INT_TY]]* {{.+}}, [[ST_TY]]* frozen [[ST_TY_TEMP]]) +// CHECK: call {{.*}} [[ST_TY_DESTR:@.+]]([[ST_TY]]* frozen [[ST_TY_TEMP]]) // CHECK: br i1 {{.+}}, label %{{.+}}, label %[[S_ARR_BODY]] -// CHECK: call {{.*}} [[ST_TY_DEFAULT_CONSTR]]([[ST_TY]]* [[ST_TY_TEMP:%.+]]) -// CHECK: call {{.*}} [[S_INT_TY_COPY_CONSTR]]([[S_INT_TY]]* [[VAR_PRIV]], [[S_INT_TY]]* {{.*}} [[VAR_REF]], [[ST_TY]]* [[ST_TY_TEMP]]) -// CHECK: call {{.*}} [[ST_TY_DESTR]]([[ST_TY]]* [[ST_TY_TEMP]]) -// CHECK-DAG: call {{.*}} [[S_INT_TY_DESTR:@.+]]([[S_INT_TY]]* [[VAR_PRIV]]) +// CHECK: call {{.*}} [[ST_TY_DEFAULT_CONSTR]]([[ST_TY]]* frozen [[ST_TY_TEMP:%.+]]) +// CHECK: call {{.*}} [[S_INT_TY_COPY_CONSTR]]([[S_INT_TY]]* frozen [[VAR_PRIV]], [[S_INT_TY]]* {{.*}} [[VAR_REF]], [[ST_TY]]* frozen [[ST_TY_TEMP]]) +// CHECK: call {{.*}} [[ST_TY_DESTR]]([[ST_TY]]* frozen [[ST_TY_TEMP]]) +// CHECK-DAG: call {{.*}} [[S_INT_TY_DESTR:@.+]]([[S_INT_TY]]* frozen [[VAR_PRIV]]) // CHECK-DAG: call {{.*}} [[S_INT_TY_DESTR]]([[S_INT_TY]]* // CHECK: ret void @@ -246,7 +246,7 @@ // CHECK: call {{.*}}void (%{{.+}}*, i{{[0-9]+}}, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)*, ...) @__kmpc_fork_teams(%{{.+}}* @{{.+}}, i{{[0-9]+}} 1, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)* bitcast (void (i{{[0-9]+}}*, i{{[0-9]+}}*, i{{[0-9]+}}*)* [[OMP_OUTLINED_3:@.+]] to void // CHECK: ret -// CHECK: define internal {{.*}}void [[OMP_OUTLINED_3]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}, i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.+]]) +// CHECK: define internal {{.*}}void [[OMP_OUTLINED_3]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}, i32* frozen nonnull align 4 dereferenceable(4) [[T_VAR:%.+]]) // CHECK: [[T_VAR_LOC:%.+]] = alloca i{{[0-9]+}}, // CHECK: store i{{[0-9]+}}* [[T_VAR]], i{{[0-9]+}}** [[T_VAR_ADDR:%.+]], // CHECK: [[T_VAR_REF:%.+]] = load i{{[0-9]+}}*, i{{[0-9]+}}** [[T_VAR_ADDR]], diff --git a/clang/test/OpenMP/teams_private_codegen.cpp b/clang/test/OpenMP/teams_private_codegen.cpp --- a/clang/test/OpenMP/teams_private_codegen.cpp +++ b/clang/test/OpenMP/teams_private_codegen.cpp @@ -117,7 +117,7 @@ // LAMBDA: call void @[[OMP_OFFLOADING:.+]]() // target region in struct constructor - // LAMBDA: define{{.*}} void [[ST_CONSTR:@.+]]([[SS_TY]]* %this, + // LAMBDA: define{{.*}} void [[ST_CONSTR:@.+]]([[SS_TY]]* frozen %this // LAMBDA: call void [[OMP_OFFLOADING_1:@.+]]([[SS_TY]] // offloading function in struct constructor @@ -211,7 +211,7 @@ // CHECK: define{{.*}} i{{[0-9]+}} @main() // CHECK: [[TEST:%.+]] = alloca [[S_FLOAT_TY]], -// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR:@.+]]([[S_FLOAT_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR:@.+]]([[S_FLOAT_TY]]* frozen [[TEST]]) // CHECK: call void @[[OMP_OFFLOADING:.+]]() // CHECK: = call{{.*}} i{{.+}} [[TMAIN_INT:@.+]]() // CHECK: call void [[S_FLOAT_TY_DESTR:@.+]]([[S_FLOAT_TY]]* @@ -221,7 +221,7 @@ // CHECK: define{{.+}} @[[OMP_OFFLOADING]]() // CHECK: call void (%{{.+}}*, i{{[0-9]+}}, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)*, ...) @__kmpc_fork_teams(%{{.+}}* @{{.+}}, i{{[0-9]+}} 0, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)* bitcast (void (i{{[0-9]+}}*, i{{[0-9]+}}*)* [[OMP_OUTLINED:@.+]] to void -// CHECK: define internal void [[OMP_OUTLINED]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}) +// CHECK: define internal void [[OMP_OUTLINED]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}) // CHECK: [[T_VAR_PRIV:%.+]] = alloca i{{[0-9]+}}, // CHECK: [[VEC_PRIV:%.+]] = alloca [2 x i{{[0-9]+}}], // CHECK: [[S_ARR_PRIV:%.+]] = alloca [2 x [[S_FLOAT_TY]]], @@ -232,18 +232,18 @@ // CHECK-NOT: [[VEC_PRIV]] // CHECK: {{.+}}: // CHECK: [[S_ARR_PRIV_ITEM:%.+]] = phi [[S_FLOAT_TY]]* -// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR]]([[S_FLOAT_TY]]* [[S_ARR_PRIV_ITEM]]) +// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR]]([[S_FLOAT_TY]]* frozen [[S_ARR_PRIV_ITEM]]) // CHECK-NOT: [[T_VAR_PRIV]] // CHECK-NOT: [[VEC_PRIV]] -// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR]]([[S_FLOAT_TY]]* [[VAR_PRIV]]) -// CHECK-DAG: call void [[S_FLOAT_TY_DESTR]]([[S_FLOAT_TY]]* [[VAR_PRIV]]) +// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR]]([[S_FLOAT_TY]]* frozen [[VAR_PRIV]]) +// CHECK-DAG: call void [[S_FLOAT_TY_DESTR]]([[S_FLOAT_TY]]* frozen [[VAR_PRIV]]) // CHECK-DAG: call void [[S_FLOAT_TY_DESTR]]([[S_FLOAT_TY]]* // CHECK: ret void // template tmain // CHECK: define{{.*}} i{{[0-9]+}} [[TMAIN_INT]]() // CHECK: [[TEST:%.+]] = alloca [[S_INT_TY]], -// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR:@.+]]([[S_INT_TY]]* [[TEST]]) +// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR:@.+]]([[S_INT_TY]]* frozen [[TEST]]) // CHECK: call void [[S_INT_TY_CONSTR:@.+]]([[S_INT_TY]]* {{.+}}, i{{[0-9]+}}{{.*}} 3) // CHECK: call void [[OMP_OFFLOADING_TMAIN:@.+]]() @@ -274,7 +274,7 @@ // CHECK: define{{.+}} [[OMP_OFFLOADING_TMAIN]]() // CHECK: call void (%{{.+}}*, i{{[0-9]+}}, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)*, ...) @__kmpc_fork_teams(%{{.+}}* @{{.+}}, i{{[0-9]+}} 0, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)* bitcast (void (i{{[0-9]+}}*, i{{[0-9]+}}*)* [[OMP_OUTLINED_TMAIN:@.+]] to void -// CHECK: define{{.*}} void [[OMP_OUTLINED_TMAIN]](i{{[0-9]+}}* noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* noalias %{{.+}}) +// CHECK: define{{.*}} void [[OMP_OUTLINED_TMAIN]](i{{[0-9]+}}* frozen noalias [[GTID_ADDR:%.+]], i{{[0-9]+}}* frozen noalias %{{.+}}) // CHECK: [[T_VAR_PRIV:%.+]] = alloca i{{[0-9]+}}, align 128 // CHECK: [[VEC_PRIV:%.+]] = alloca [2 x i{{[0-9]+}}], align 128 // CHECK: [[S_ARR_PRIV:%.+]] = alloca [2 x [[S_INT_TY]]], align 128 @@ -284,11 +284,11 @@ // CHECK-NOT: [[VEC_PRIV]] // CHECK: {{.+}}: // CHECK: [[S_ARR_PRIV_ITEM:%.+]] = phi [[S_INT_TY]]* -// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR]]([[S_INT_TY]]* [[S_ARR_PRIV_ITEM]]) +// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR]]([[S_INT_TY]]* frozen [[S_ARR_PRIV_ITEM]]) // CHECK-NOT: [[T_VAR_PRIV]] // CHECK-NOT: [[VEC_PRIV]] -// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR]]([[S_INT_TY]]* [[VAR_PRIV]]) -// CHECK-DAG: call void [[S_INT_TY_DESTR:@.+]]([[S_INT_TY]]* [[VAR_PRIV]]) +// CHECK: call {{.*}} [[S_INT_TY_DEF_CONSTR]]([[S_INT_TY]]* frozen [[VAR_PRIV]]) +// CHECK-DAG: call void [[S_INT_TY_DESTR:@.+]]([[S_INT_TY]]* frozen [[VAR_PRIV]]) // CHECK-DAG: call void [[S_INT_TY_DESTR]]([[S_INT_TY]]* // CHECK: ret @@ -300,7 +300,7 @@ // CHECK: define{{.+}} [[OMP_OFFLOADING_SST]]([[SST_TY]]* {{.+}}) // CHECK: call void (%{{.+}}*, i{{[0-9]+}}, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)*, ...) @__kmpc_fork_teams(%{{.+}}* @{{.+}}, i{{[0-9]+}} 1, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)* bitcast (void (i{{[0-9]+}}*, i{{[0-9]+}}*, [[SST_TY]]*)* [[OMP_OUTLINED_SST:@.+]] to void -// CHECK: define{{.+}} [[OMP_OUTLINED_SST]](i{{[0-9]+}}* {{.+}}, i{{[0-9]+}}* noalias %{{.+}}, [[SST_TY]]* {{.+}}) +// CHECK: define{{.+}} [[OMP_OUTLINED_SST]](i{{[0-9]+}}* {{.+}}, i{{[0-9]+}}* frozen noalias %{{.+}}, [[SST_TY]]* {{.+}}) // CHECK: [[A_PRIV_1:%.+]] = alloca i{{[0-9]+}}, // CHECK: store i{{[0-9]+}}* [[A_PRIV_1]], i{{[0-9]+}}** [[A_REF_1:%.+]], // CHECK: [[A_REF_VAL_1:%.+]] = load i{{[0-9]+}}*, i{{[0-9]+}}** [[A_REF_1]] diff --git a/clang/test/OpenMP/threadprivate_codegen.cpp b/clang/test/OpenMP/threadprivate_codegen.cpp --- a/clang/test/OpenMP/threadprivate_codegen.cpp +++ b/clang/test/OpenMP/threadprivate_codegen.cpp @@ -200,21 +200,21 @@ static S1 gs1(5); #pragma omp threadprivate(gs1) #pragma omp threadprivate(gs1) -// CHECK: define {{.*}} [[S1_CTOR:@.*]]([[S1]]* {{.*}}, +// CHECK: define {{.*}} [[S1_CTOR:@.*]]([[S1]]* {{.*}} // CHECK: define {{.*}} [[S1_DTOR:@.*]]([[S1]]* {{.*}}) -// CHECK: define internal {{.*}}i8* [[GS1_CTOR:@\.__kmpc_global_ctor_\..*]](i8* %0) +// CHECK: define internal {{.*}}i8* [[GS1_CTOR:@\.__kmpc_global_ctor_\..*]](i8* frozen %0) // CHECK: store i8* %0, i8** [[ARG_ADDR:%.*]], // CHECK: [[ARG:%.+]] = load i8*, i8** [[ARG_ADDR]] // CHECK: [[RES:%.*]] = bitcast i8* [[ARG]] to [[S1]]* -// CHECK-NEXT: call {{.*}} [[S1_CTOR]]([[S1]]* [[RES]], {{.*}} 5) +// CHECK-NEXT: call {{.*}} [[S1_CTOR]]([[S1]]* frozen [[RES]], {{.*}} 5) // CHECK: [[ARG:%.+]] = load i8*, i8** [[ARG_ADDR]] // CHECK: ret i8* [[ARG]] // CHECK-NEXT: } -// CHECK: define internal {{.*}}void [[GS1_DTOR:@\.__kmpc_global_dtor_\..*]](i8* %0) +// CHECK: define internal {{.*}}void [[GS1_DTOR:@\.__kmpc_global_dtor_\..*]](i8* frozen %0) // CHECK: store i8* %0, i8** [[ARG_ADDR:%.*]], // CHECK: [[ARG:%.+]] = load i8*, i8** [[ARG_ADDR]] // CHECK: [[RES:%.*]] = bitcast i8* [[ARG]] to [[S1]]* -// CHECK-NEXT: call {{.*}} [[S1_DTOR]]([[S1]]* [[RES]]) +// CHECK-NEXT: call {{.*}} [[S1_DTOR]]([[S1]]* frozen [[RES]]) // CHECK-NEXT: ret void // CHECK-NEXT: } // CHECK: define internal {{.*}}void [[GS1_INIT:@\.__omp_threadprivate_init_\..*]]() @@ -226,56 +226,56 @@ // CHECK-DEBUG: store i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[LOC1]], i{{.*}} 0, i{{.*}} 0), i8** [[KMPC_LOC_ADDR_PSOURCE]] // CHECK-DEBUG: @__kmpc_global_thread_num // CHECK-DEBUG: call {{.*}}void @__kmpc_threadprivate_register([[IDENT]]* [[KMPC_LOC_ADDR]], i8* bitcast ([[S1]]* [[GS1]] to i8*), i8* (i8*)* [[GS1_CTOR:@\.__kmpc_global_ctor_\..*]], i8* (i8*, i8*)* null, void (i8*)* [[GS1_DTOR:@\.__kmpc_global_dtor_\..*]]) -// CHECK-DEBUG: define internal {{.*}}i8* [[GS1_CTOR]](i8* %0) +// CHECK-DEBUG: define internal {{.*}}i8* [[GS1_CTOR]](i8* frozen %0) // CHECK-DEBUG: store i8* %0, i8** [[ARG_ADDR:%.*]], // CHECK-DEBUG: [[ARG:%.+]] = load i8*, i8** [[ARG_ADDR]] // CHECK-DEBUG: [[RES:%.*]] = bitcast i8* [[ARG]] to [[S1]]* -// CHECK-DEBUG-NEXT: call {{.*}} [[S1_CTOR:@.+]]([[S1]]* [[RES]], {{.*}} 5){{.*}}, !dbg +// CHECK-DEBUG-NEXT: call {{.*}} [[S1_CTOR:@.+]]([[S1]]* frozen [[RES]], {{.*}} 5){{.*}}, !dbg // CHECK-DEBUG: [[ARG:%.+]] = load i8*, i8** [[ARG_ADDR]] // CHECK-DEBUG: ret i8* [[ARG]] // CHECK-DEBUG-NEXT: } -// CHECK-DEBUG: define {{.*}} [[S1_CTOR]]([[S1]]* {{.*}}, -// CHECK-DEBUG: define internal {{.*}}void [[GS1_DTOR]](i8* %0) +// CHECK-DEBUG: define {{.*}} [[S1_CTOR]]([[S1]]* {{.*}} +// CHECK-DEBUG: define internal {{.*}}void [[GS1_DTOR]](i8* frozen %0) // CHECK-DEBUG: store i8* %0, i8** [[ARG_ADDR:%.*]], // CHECK-DEBUG: [[ARG:%.+]] = load i8*, i8** [[ARG_ADDR]] // CHECK-DEBUG: [[RES:%.*]] = bitcast i8* [[ARG]] to [[S1]]* -// CHECK-DEBUG-NEXT: call {{.*}} [[S1_DTOR:@.+]]([[S1]]* [[RES]]){{.*}}, !dbg +// CHECK-DEBUG-NEXT: call {{.*}} [[S1_DTOR:@.+]]([[S1]]* frozen [[RES]]){{.*}}, !dbg // CHECK-DEBUG-NEXT: ret void // CHECK-DEBUG-NEXT: } // CHECK-DEBUG: define {{.*}} [[S1_DTOR]]([[S1]]* {{.*}}) static S2 gs2(27); -// CHECK: define {{.*}} [[S2_CTOR:@.*]]([[S2]]* {{.*}}, +// CHECK: define {{.*}} [[S2_CTOR:@.*]]([[S2]]* {{.*}} // CHECK: define {{.*}} [[S2_DTOR:@.*]]([[S2]]* {{.*}}) // No another call for S2 constructor because it is not threadprivate // CHECK-NOT: call {{.*}} [[S2_CTOR]]([[S2]]* -// CHECK-DEBUG: define {{.*}} [[S2_CTOR:@.*]]([[S2]]* {{.*}}, +// CHECK-DEBUG: define {{.*}} [[S2_CTOR:@.*]]([[S2]]* {{.*}} // CHECK-DEBUG: define {{.*}} [[S2_DTOR:@.*]]([[S2]]* {{.*}}) // No another call for S2 constructor because it is not threadprivate // CHECK-DEBUG-NOT: call {{.*}} [[S2_CTOR]]([[S2]]* S1 arr_x[2][3] = { { 1, 2, 3 }, { 4, 5, 6 } }; #pragma omp threadprivate(arr_x) -// CHECK: define internal {{.*}}i8* [[ARR_X_CTOR:@\.__kmpc_global_ctor_\..*]](i8* %0) +// CHECK: define internal {{.*}}i8* [[ARR_X_CTOR:@\.__kmpc_global_ctor_\..*]](i8* frozen %0) // CHECK: store i8* %0, i8** [[ARG_ADDR:%.*]], // CHECK: [[ARG:%.+]] = load i8*, i8** [[ARG_ADDR]] // CHECK: [[RES:%.*]] = bitcast i8* [[ARG]] to [2 x [3 x [[S1]]]]* // CHECK: [[ARR1:%.*]] = getelementptr inbounds [2 x [3 x [[S1]]]], [2 x [3 x [[S1]]]]* [[RES]], i{{.*}} 0, i{{.*}} 0 // CHECK: [[ARR:%.*]] = getelementptr inbounds [3 x [[S1]]], [3 x [[S1]]]* [[ARR1]], i{{.*}} 0, i{{.*}} 0 -// CHECK: invoke {{.*}} [[S1_CTOR]]([[S1]]* [[ARR]], [[INT]] {{.*}}1) +// CHECK: invoke {{.*}} [[S1_CTOR]]([[S1]]* frozen [[ARR]], [[INT]] {{.*}}1) // CHECK: [[ARR_ELEMENT:%.*]] = getelementptr inbounds [[S1]], [[S1]]* [[ARR]], i{{.*}} 1 -// CHECK: invoke {{.*}} [[S1_CTOR]]([[S1]]* [[ARR_ELEMENT]], [[INT]] {{.*}}2) +// CHECK: invoke {{.*}} [[S1_CTOR]]([[S1]]* frozen [[ARR_ELEMENT]], [[INT]] {{.*}}2) // CHECK: [[ARR_ELEMENT2:%.*]] = getelementptr inbounds [[S1]], [[S1]]* [[ARR_ELEMENT]], i{{.*}} 1 -// CHECK: invoke {{.*}} [[S1_CTOR]]([[S1]]* [[ARR_ELEMENT2]], [[INT]] {{.*}}3) +// CHECK: invoke {{.*}} [[S1_CTOR]]([[S1]]* frozen [[ARR_ELEMENT2]], [[INT]] {{.*}}3) // CHECK: [[ARR_ELEMENT3:%.*]] = getelementptr inbounds [3 x [[S1]]], [3 x [[S1]]]* [[ARR1]], i{{.*}} 1 // CHECK: [[ARR_:%.*]] = getelementptr inbounds [3 x [[S1]]], [3 x [[S1]]]* [[ARR_ELEMENT3]], i{{.*}} 0, i{{.*}} 0 -// CHECK: invoke {{.*}} [[S1_CTOR]]([[S1]]* [[ARR_]], [[INT]] {{.*}}4) +// CHECK: invoke {{.*}} [[S1_CTOR]]([[S1]]* frozen [[ARR_]], [[INT]] {{.*}}4) // CHECK: [[ARR_ELEMENT:%.*]] = getelementptr inbounds [[S1]], [[S1]]* [[ARR_]], i{{.*}} 1 -// CHECK: invoke {{.*}} [[S1_CTOR]]([[S1]]* [[ARR_ELEMENT]], [[INT]] {{.*}}5) +// CHECK: invoke {{.*}} [[S1_CTOR]]([[S1]]* frozen [[ARR_ELEMENT]], [[INT]] {{.*}}5) // CHECK: [[ARR_ELEMENT2:%.*]] = getelementptr inbounds [[S1]], [[S1]]* [[ARR_ELEMENT]], i{{.*}} 1 -// CHECK: invoke {{.*}} [[S1_CTOR]]([[S1]]* [[ARR_ELEMENT2]], [[INT]] {{.*}}6) +// CHECK: invoke {{.*}} [[S1_CTOR]]([[S1]]* frozen [[ARR_ELEMENT2]], [[INT]] {{.*}}6) // CHECK: [[ARG:%.+]] = load i8*, i8** [[ARG_ADDR]] // CHECK: ret i8* [[ARG]] // CHECK: } -// CHECK: define internal {{.*}}void [[ARR_X_DTOR:@\.__kmpc_global_dtor_\..*]](i8* %0) +// CHECK: define internal {{.*}}void [[ARR_X_DTOR:@\.__kmpc_global_dtor_\..*]](i8* frozen %0) // CHECK: store i8* %0, i8** [[ARG_ADDR:%.*]], // CHECK: [[ARG:%.+]] = load i8*, i8** [[ARG_ADDR]] // CHECK: [[ARR_BEGIN:%.*]] = bitcast i8* [[ARG]] to [[S1]]* @@ -284,7 +284,7 @@ // CHECK: {{.*}}[[ARR_LOOP]]{{.*}} // CHECK-NEXT: [[ARR_ELEMENTPAST:%.*]] = phi [[S1]]* [ [[ARR_CUR]], {{.*}} ], [ [[ARR_ELEMENT:%.*]], {{.*}} ] // CHECK-NEXT: [[ARR_ELEMENT:%.*]] = getelementptr inbounds [[S1]], [[S1]]* [[ARR_ELEMENTPAST]], i{{.*}} -1 -// CHECK-NEXT: {{call|invoke}} {{.*}} [[S1_DTOR]]([[S1]]* [[ARR_ELEMENT]]) +// CHECK-NEXT: {{call|invoke}} {{.*}} [[S1_DTOR]]([[S1]]* frozen [[ARR_ELEMENT]]) // CHECK: [[ARR_DONE:%.*]] = icmp eq [[S1]]* [[ARR_ELEMENT]], [[ARR_BEGIN]] // CHECK-NEXT: br i1 [[ARR_DONE]], label %[[ARR_EXIT:.*]], label %[[ARR_LOOP]] // CHECK: {{.*}}[[ARR_EXIT]]{{.*}} @@ -299,9 +299,9 @@ // CHECK-DEBUG: store i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[LOC2]], i{{.*}} 0, i{{.*}} 0), i8** [[KMPC_LOC_ADDR_PSOURCE]] // CHECK-DEBUG: @__kmpc_global_thread_num // CHECK-DEBUG: call {{.*}}void @__kmpc_threadprivate_register([[IDENT]]* [[KMPC_LOC_ADDR]], i8* bitcast ([2 x [3 x [[S1]]]]* [[ARR_X]] to i8*), i8* (i8*)* [[ARR_X_CTOR:@\.__kmpc_global_ctor_\..*]], i8* (i8*, i8*)* null, void (i8*)* [[ARR_X_DTOR:@\.__kmpc_global_dtor_\..*]]) -// CHECK-DEBUG: define internal {{.*}}i8* [[ARR_X_CTOR]](i8* %0) +// CHECK-DEBUG: define internal {{.*}}i8* [[ARR_X_CTOR]](i8* frozen %0) // CHECK-DEBUG: } -// CHECK-DEBUG: define internal {{.*}}void [[ARR_X_DTOR]](i8* %0) +// CHECK-DEBUG: define internal {{.*}}void [[ARR_X_DTOR]](i8* frozen %0) // CHECK-DEBUG: } extern S5 gs3; #pragma omp threadprivate(gs3) @@ -349,7 +349,7 @@ // CHECK-NEXT: [[GS1_ADDR:%.*]] = bitcast i8* [[GS1_TEMP_ADDR]] to [[S1]]* // CHECK-NEXT: [[GS1_A_ADDR:%.*]] = getelementptr inbounds [[S1]], [[S1]]* [[GS1_ADDR]], i{{.*}} 0, i{{.*}} 0 // CHECK-NEXT: [[GS1_A:%.*]] = load [[INT]], [[INT]]* [[GS1_A_ADDR]] -// CHECK-NEXT: invoke {{.*}} [[SMAIN_CTOR:.*]]([[SMAIN]]* [[SM]], [[INT]] {{.*}}[[GS1_A]]) +// CHECK-NEXT: invoke {{.*}} [[SMAIN_CTOR:.*]]([[SMAIN]]* frozen [[SM]], [[INT]] {{.*}}[[GS1_A]]) // CHECK: call {{.*}}void @__cxa_guard_release // CHECK-DEBUG: [[KMPC_LOC_ADDR_PSOURCE:%.*]] = getelementptr inbounds [[IDENT]], [[IDENT]]* [[KMPC_LOC_ADDR]], i{{.*}} 0, i{{.*}} 4 // CHECK-DEBUG-NEXT: store i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[LOC3]], i{{.*}} 0, i{{.*}} 0), i8** [[KMPC_LOC_ADDR_PSOURCE]] @@ -363,7 +363,7 @@ // CHECK-DEBUG-NEXT: [[GS1_ADDR:%.*]] = bitcast i8* [[GS1_TEMP_ADDR]] to [[S1]]* // CHECK-DEBUG-NEXT: [[GS1_A_ADDR:%.*]] = getelementptr inbounds [[S1]], [[S1]]* [[GS1_ADDR]], i{{.*}} 0, i{{.*}} 0 // CHECK-DEBUG-NEXT: [[GS1_A:%.*]] = load [[INT]], [[INT]]* [[GS1_A_ADDR]] -// CHECK-DEBUG-NEXT: invoke {{.*}} [[SMAIN_CTOR:.*]]([[SMAIN]]* [[SM]], [[INT]] {{.*}}[[GS1_A]]) +// CHECK-DEBUG-NEXT: invoke {{.*}} [[SMAIN_CTOR:.*]]([[SMAIN]]* frozen [[SM]], [[INT]] {{.*}}[[GS1_A]]) // CHECK-DEBUG: call {{.*}}void @__cxa_guard_release // CHECK-TLS: [[IS_INIT_INT:%.*]] = load i8, i8* [[SM_GUARD]] // CHECK-TLS-NEXT: [[IS_INIT_BOOL:%.*]] = icmp eq i8 [[IS_INIT_INT]], 0 @@ -372,7 +372,7 @@ // CHECK-TLS-NEXT: [[GS1_ADDR:%.*]] = call [[S1]]* [[GS1_TLS_INITD:@[^,]+]] // CHECK-TLS-NEXT: [[GS1_A_ADDR:%.*]] = getelementptr inbounds [[S1]], [[S1]]* [[GS1_ADDR]], i32 0, i32 0 // CHECK-TLS-NEXT: [[GS1_A_VAL:%.*]] = load i32, i32* [[GS1_A_ADDR]] -// CHECK-TLS-NEXT: call void [[SM_CTOR1:@.*]]([[SMAIN]]* [[SM]], i32 [[GS1_A_VAL]]) +// CHECK-TLS-NEXT: call void [[SM_CTOR1:@.*]]([[SMAIN]]* frozen [[SM]], i32 frozen [[GS1_A_VAL]]) // CHECK-TLS-NEXT: call i32 @__cxa_thread_atexit(void (i8*)* bitcast (void ([[SMAIN]]*)* [[SM_DTOR1:@.*]] to void (i8*)*), i8* bitcast ([[SMAIN]]* [[SM]] to i8*), i8* @__dso_handle) // CHECK-TLS-NEXT: store i8 1, i8* [[SM_GUARD]] // CHECK-TLS-NEXT: br label %[[INIT_DONE]] @@ -581,7 +581,7 @@ } // CHECK: } -// CHECK: define internal {{.*}}i8* [[SM_CTOR]](i8* %0) +// CHECK: define internal {{.*}}i8* [[SM_CTOR]](i8* frozen %0) // CHECK: [[THREAD_NUM:%.+]] = call {{.*}}i32 @__kmpc_global_thread_num([[IDENT]]* [[DEFAULT_LOC]]) // CHECK: store i8* %0, i8** [[ARG_ADDR:%.*]], // CHECK: [[ARG:%.+]] = load i8*, i8** [[ARG_ADDR]] @@ -590,20 +590,20 @@ // CHECK-NEXT: [[GS1_ADDR:%.*]] = bitcast i8* [[GS1_TEMP_ADDR]] to [[S1]]* // CHECK-NEXT: [[GS1_A_ADDR:%.*]] = getelementptr inbounds [[S1]], [[S1]]* [[GS1_ADDR]], i{{.*}} 0, i{{.*}} 0 // CHECK-NEXT: [[GS1_A:%.*]] = load [[INT]], [[INT]]* [[GS1_A_ADDR]] -// CHECK-NEXT: call {{.*}} [[SMAIN_CTOR:@.+]]([[SMAIN]]* [[RES]], [[INT]] {{.*}}[[GS1_A]]) +// CHECK-NEXT: call {{.*}} [[SMAIN_CTOR:@.+]]([[SMAIN]]* frozen [[RES]], [[INT]] {{.*}}[[GS1_A]]) // CHECK: [[ARG:%.+]] = load i8*, i8** [[ARG_ADDR]] // CHECK-NEXT: ret i8* [[ARG]] // CHECK-NEXT: } -// CHECK: define {{.*}} [[SMAIN_CTOR]]([[SMAIN]]* {{.*}}, -// CHECK: define internal {{.*}}void [[SM_DTOR]](i8* %0) +// CHECK: define {{.*}} [[SMAIN_CTOR]]([[SMAIN]]* {{.*}} +// CHECK: define internal {{.*}}void [[SM_DTOR]](i8* frozen %0) // CHECK: store i8* %0, i8** [[ARG_ADDR:%.*]], // CHECK: [[ARG:%.+]] = load i8*, i8** [[ARG_ADDR]] // CHECK: [[RES:%.*]] = bitcast i8* [[ARG]] to [[SMAIN]]* -// CHECK-NEXT: call {{.*}} [[SMAIN_DTOR:@.+]]([[SMAIN]]* [[RES]]) +// CHECK-NEXT: call {{.*}} [[SMAIN_DTOR:@.+]]([[SMAIN]]* frozen [[RES]]) // CHECK-NEXT: ret void // CHECK-NEXT: } // CHECK: define {{.*}} [[SMAIN_DTOR]]([[SMAIN]]* {{.*}}) -// CHECK-DEBUG: define internal {{.*}}i8* [[SM_CTOR]](i8* %0) +// CHECK-DEBUG: define internal {{.*}}i8* [[SM_CTOR]](i8* frozen %0) // CHECK-DEBUG: [[KMPC_LOC_ADDR:%.*]] = alloca [[IDENT]] // CHECK-DEBUG: [[KMPC_LOC_ADDR_PSOURCE:%.*]] = getelementptr inbounds [[IDENT]], [[IDENT]]* [[KMPC_LOC_ADDR]], i{{.*}} 0, i{{.*}} 4 // CHECK-DEBUG-NEXT: store i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[LOC3]], i{{.*}} 0, i{{.*}} 0), i8** [[KMPC_LOC_ADDR_PSOURCE]] @@ -617,23 +617,23 @@ // CHECK-DEBUG-NEXT: [[GS1_ADDR:%.*]] = bitcast i8* [[GS1_TEMP_ADDR]] to [[S1]]* // CHECK-DEBUG-NEXT: [[GS1_A_ADDR:%.*]] = getelementptr inbounds [[S1]], [[S1]]* [[GS1_ADDR]], i{{.*}} 0, i{{.*}} 0 // CHECK-DEBUG-NEXT: [[GS1_A:%.*]] = load [[INT]], [[INT]]* [[GS1_A_ADDR]] -// CHECK-DEBUG-NEXT: call {{.*}} [[SMAIN_CTOR:@.+]]([[SMAIN]]* [[RES]], [[INT]] {{.*}}[[GS1_A]]) +// CHECK-DEBUG-NEXT: call {{.*}} [[SMAIN_CTOR:@.+]]([[SMAIN]]* frozen [[RES]], [[INT]] {{.*}}[[GS1_A]]) // CHECK-DEBUG: [[ARG:%.+]] = load i8*, i8** [[ARG_ADDR]] // CHECK-DEBUG-NEXT: ret i8* [[ARG]] // CHECK-DEBUG-NEXT: } -// CHECK-DEBUG: define {{.*}} [[SMAIN_CTOR]]([[SMAIN]]* {{.*}}, -// CHECK-DEBUG: define internal {{.*}} [[SM_DTOR:@.+]](i8* %0) +// CHECK-DEBUG: define {{.*}} [[SMAIN_CTOR]]([[SMAIN]]* {{.*}} +// CHECK-DEBUG: define internal {{.*}} [[SM_DTOR:@.+]](i8* frozen %0) // CHECK-DEBUG: call {{.*}} [[SMAIN_DTOR:@.+]]([[SMAIN]]* // CHECK-DEBUG: } // CHECK-DEBUG: define {{.*}} [[SMAIN_DTOR]]([[SMAIN]]* {{.*}}) -// CHECK-TLS: define internal [[S1]]* [[GS1_TLS_INITD]] {{#[0-9]+}} { +// CHECK-TLS: define internal frozen [[S1]]* [[GS1_TLS_INITD]] {{#[0-9]+}} { // CHECK-TLS-NEXT: call void [[GS1_TLS_INIT]] // CHECK-TLS-NEXT: ret [[S1]]* [[GS1]] // CHECK-TLS-NEXT: } -// CHECK-TLS: define internal void [[SM_CTOR1]]([[SMAIN]]* %this, i32 {{.*}}) {{.*}} { +// CHECK-TLS: define internal void [[SM_CTOR1]]([[SMAIN]]* frozen %this, i32 {{.*}}) {{.*}} { // CHECK-TLS: void [[SM_CTOR2:@.*]]([[SMAIN]]* {{.*}}, i32 {{.*}}) // CHECK-TLS: } -// CHECK-TLS: define internal void [[SM_DTOR1]]([[SMAIN]]* %this) {{.*}} { +// CHECK-TLS: define internal void [[SM_DTOR1]]([[SMAIN]]* frozen %this) {{.*}} { // CHECK-TLS: void [[SM_DTOR2:@.*]]([[SMAIN]]* {{.*}}) // CHECK-TLS: } // CHECK-TLS: define {{.*}} [[S3]]* [[STATIC_S_TLS_INITD]] @@ -856,20 +856,20 @@ #endif // CHECK: call {{.*}}void @__kmpc_threadprivate_register([[IDENT]]* [[DEFAULT_LOC]], i8* bitcast ([[S4]]* [[ST_S4_ST]] to i8*), i8* (i8*)* [[ST_S4_ST_CTOR:@\.__kmpc_global_ctor_\..+]], i8* (i8*, i8*)* null, void (i8*)* [[ST_S4_ST_DTOR:@\.__kmpc_global_dtor_\..+]]) -// CHECK: define internal {{.*}}i8* [[ST_S4_ST_CTOR]](i8* %0) +// CHECK: define internal {{.*}}i8* [[ST_S4_ST_CTOR]](i8* frozen %0) // CHECK: store i8* %0, i8** [[ARG_ADDR:%.*]], // CHECK: [[ARG:%.+]] = load i8*, i8** [[ARG_ADDR]] // CHECK: [[RES:%.*]] = bitcast i8* [[ARG]] to [[S4]]* -// CHECK-NEXT: call {{.*}} [[S4_CTOR:@.+]]([[S4]]* [[RES]], {{.*}} 23) +// CHECK-NEXT: call {{.*}} [[S4_CTOR:@.+]]([[S4]]* frozen [[RES]], {{.*}} 23) // CHECK: [[ARG:%.+]] = load i8*, i8** [[ARG_ADDR]] // CHECK-NEXT: ret i8* [[ARG]] // CHECK-NEXT: } -// CHECK: define {{.*}} [[S4_CTOR]]([[S4]]* {{.*}}, -// CHECK: define internal {{.*}}void [[ST_S4_ST_DTOR]](i8* %0) +// CHECK: define {{.*}} [[S4_CTOR]]([[S4]]* {{.*}} +// CHECK: define internal {{.*}}void [[ST_S4_ST_DTOR]](i8* frozen %0) // CHECK: store i8* %0, i8** [[ARG_ADDR:%.*]], // CHECK: [[ARG:%.+]] = load i8*, i8** [[ARG_ADDR]] // CHECK: [[RES:%.*]] = bitcast i8* [[ARG]] to [[S4]]* -// CHECK-NEXT: call {{.*}} [[S4_DTOR:@.+]]([[S4]]* [[RES]]) +// CHECK-NEXT: call {{.*}} [[S4_DTOR:@.+]]([[S4]]* frozen [[RES]]) // CHECK-NEXT: ret void // CHECK-NEXT: } // CHECK: define {{.*}} [[S4_DTOR]]([[S4]]* {{.*}}) @@ -878,10 +878,10 @@ // CHECK-DEBUG-NEXT: store i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[LOC20]], i{{.*}} 0, i{{.*}} 0), i8** [[KMPC_LOC_ADDR_PSOURCE]] // CHECK-DEBUG: @__kmpc_global_thread_num // CHECK-DEBUG: call {{.*}}void @__kmpc_threadprivate_register([[IDENT]]* [[KMPC_LOC_ADDR]], i8* bitcast ([[S4]]* [[ST_S4_ST]] to i8*), i8* (i8*)* [[ST_S4_ST_CTOR:@\.__kmpc_global_ctor_\..+]], i8* (i8*, i8*)* null, void (i8*)* [[ST_S4_ST_DTOR:@\.__kmpc_global_dtor_\..+]]) -// CHECK-DEBUG: define internal {{.*}}i8* [[ST_S4_ST_CTOR]](i8* %0) +// CHECK-DEBUG: define internal {{.*}}i8* [[ST_S4_ST_CTOR]](i8* frozen %0) // CHECK-DEBUG: } -// CHECK-DEBUG: define {{.*}} [[S4_CTOR:@.*]]([[S4]]* {{.*}}, -// CHECK-DEBUG: define internal {{.*}}void [[ST_S4_ST_DTOR]](i8* %0) +// CHECK-DEBUG: define {{.*}} [[S4_CTOR:@.*]]([[S4]]* {{.*}} +// CHECK-DEBUG: define internal {{.*}}void [[ST_S4_ST_DTOR]](i8* frozen %0) // CHECK-DEBUG: } // CHECK-DEBUG: define {{.*}} [[S4_DTOR:@.*]]([[S4]]* {{.*}}) @@ -893,7 +893,7 @@ // CHECK-DEBUG: ret void // CHECK-TLS: define internal void [[GS1_CXX_INIT:@.*]]() -// CHECK-TLS: call void [[GS1_CTOR1:@.*]]([[S1]]* [[GS1]], i32 5) +// CHECK-TLS: call void [[GS1_CTOR1:@.*]]([[S1]]* frozen [[GS1]], i32 frozen 5) // CHECK-TLS: call i32 @__cxa_thread_atexit(void (i8*)* bitcast (void ([[S1]]*)* [[GS1_DTOR1:.*]] to void (i8*)*), i8* bitcast ([[S1]]* [[GS1]] to i8*) // CHECK-TLS: } // CHECK-TLS: define {{.*}}void [[GS1_CTOR1]]([[S1]]* {{.*}}, i32 {{.*}}) @@ -906,7 +906,7 @@ // CHECK-TLS: define {{.*}}void [[GS1_DTOR2]]([[S1]]* {{.*}}) // CHECK-TLS: define internal void [[GS2_CXX_INIT:@.*]]() -// CHECK-TLS: call void [[GS2_CTOR1:@.*]]([[S2]]* [[GS2]], i32 27) +// CHECK-TLS: call void [[GS2_CTOR1:@.*]]([[S2]]* frozen [[GS2]], i32 frozen 27) // CHECK-TLS: call i32 @__cxa_atexit(void (i8*)* bitcast (void ([[S2]]*)* [[GS2_DTOR1:.*]] to void (i8*)*), i8* bitcast ([[S2]]* [[GS2]] to i8*) // CHECK-TLS: } // CHECK-TLS: define {{.*}}void [[GS2_CTOR1]]([[S2]]* {{.*}}, i32 {{.*}}) @@ -919,21 +919,21 @@ // CHECK-TLS: define {{.*}}void [[GS2_DTOR2]]([[S2]]* {{.*}}) // CHECK-TLS: define internal void [[ARR_X_CXX_INIT:@.*]]() -// CHECK-TLS: invoke void [[GS1_CTOR1]]([[S1]]* getelementptr inbounds ([2 x [3 x [[S1]]]], [2 x [3 x [[S1]]]]* [[ARR_X]], i{{.*}} 0, i{{.*}} 0, i{{.*}} 0), i{{.*}} 1) -// CHECK-TLS: invoke void [[GS1_CTOR1]]([[S1]]* getelementptr inbounds ([2 x [3 x [[S1]]]], [2 x [3 x [[S1]]]]* [[ARR_X]], i{{.*}} 0, i{{.*}} 0, i{{.*}} 1), i{{.*}} 2) -// CHECK-TLS: invoke void [[GS1_CTOR1]]([[S1]]* getelementptr inbounds ([2 x [3 x [[S1]]]], [2 x [3 x [[S1]]]]* [[ARR_X]], i{{.*}} 0, i{{.*}} 0, i{{.*}} 2), i{{.*}} 3) -// CHECK-TLS: invoke void [[GS1_CTOR1]]([[S1]]* getelementptr inbounds ([2 x [3 x [[S1]]]], [2 x [3 x [[S1]]]]* [[ARR_X]], i{{.*}} 0, i{{.*}} 1, i{{.*}} 0), i{{.*}} 4) -// CHECK-TLS: invoke void [[GS1_CTOR1]]([[S1]]* getelementptr inbounds ([2 x [3 x [[S1]]]], [2 x [3 x [[S1]]]]* [[ARR_X]], i{{.*}} 0, i{{.*}} 1, i{{.*}} 1), i{{.*}} 5) -// CHECK-TLS: invoke void [[GS1_CTOR1]]([[S1]]* getelementptr inbounds ([2 x [3 x [[S1]]]], [2 x [3 x [[S1]]]]* [[ARR_X]], i{{.*}} 0, i{{.*}} 1, i{{.*}} 2), i{{.*}} 6) +// CHECK-TLS: invoke void [[GS1_CTOR1]]([[S1]]* frozen getelementptr inbounds ([2 x [3 x [[S1]]]], [2 x [3 x [[S1]]]]* [[ARR_X]], i{{.*}} 0, i{{.*}} 0, i{{.*}} 0), i{{.*}} 1) +// CHECK-TLS: invoke void [[GS1_CTOR1]]([[S1]]* frozen getelementptr inbounds ([2 x [3 x [[S1]]]], [2 x [3 x [[S1]]]]* [[ARR_X]], i{{.*}} 0, i{{.*}} 0, i{{.*}} 1), i{{.*}} 2) +// CHECK-TLS: invoke void [[GS1_CTOR1]]([[S1]]* frozen getelementptr inbounds ([2 x [3 x [[S1]]]], [2 x [3 x [[S1]]]]* [[ARR_X]], i{{.*}} 0, i{{.*}} 0, i{{.*}} 2), i{{.*}} 3) +// CHECK-TLS: invoke void [[GS1_CTOR1]]([[S1]]* frozen getelementptr inbounds ([2 x [3 x [[S1]]]], [2 x [3 x [[S1]]]]* [[ARR_X]], i{{.*}} 0, i{{.*}} 1, i{{.*}} 0), i{{.*}} 4) +// CHECK-TLS: invoke void [[GS1_CTOR1]]([[S1]]* frozen getelementptr inbounds ([2 x [3 x [[S1]]]], [2 x [3 x [[S1]]]]* [[ARR_X]], i{{.*}} 0, i{{.*}} 1, i{{.*}} 1), i{{.*}} 5) +// CHECK-TLS: invoke void [[GS1_CTOR1]]([[S1]]* frozen getelementptr inbounds ([2 x [3 x [[S1]]]], [2 x [3 x [[S1]]]]* [[ARR_X]], i{{.*}} 0, i{{.*}} 1, i{{.*}} 2), i{{.*}} 6) // CHECK-TLS: call i32 @__cxa_thread_atexit(void (i8*)* [[ARR_X_CXX_DTOR:@[^,]+]] -// CHECK-TLS: define internal void [[ARR_X_CXX_DTOR]](i8* %0) +// CHECK-TLS: define internal void [[ARR_X_CXX_DTOR]](i8* frozen %0) // CHECK-TLS: void [[GS1_DTOR1]]([[S1]]* {{.*}}) // CHECK-TLS: define {{.*}}void [[SM_CTOR2]]([[SMAIN]]* {{.*}}, i32 {{.*}}) // CHECK-TLS: define {{.*}}void [[SM_DTOR2]]([[SMAIN]]* {{.*}}) // CHECK-TLS: define internal void [[ST_S4_ST_CXX_INIT]]() -// CHECK-TLS: call void [[ST_S4_ST_CTOR1:@.*]]([[S4]]* [[ST_S4_ST]], i32 23) +// CHECK-TLS: call void [[ST_S4_ST_CTOR1:@.*]]([[S4]]* frozen [[ST_S4_ST]], i32 frozen 23) // CHECK-TLS: call i32 @__cxa_thread_atexit(void (i8*)* bitcast (void ([[S4]]*)* [[ST_S4_ST_DTOR1:.*]] to void (i8*)*), i8* bitcast ([[S4]]* [[ST_S4_ST]] to i8*) // CHECK-TLS: } // CHECK-TLS: define {{.*}}void [[ST_S4_ST_CTOR1]]([[S4]]* {{.*}}, i32 {{.*}}) diff --git a/clang/test/OpenMP/vla_crash.c b/clang/test/OpenMP/vla_crash.c --- a/clang/test/OpenMP/vla_crash.c +++ b/clang/test/OpenMP/vla_crash.c @@ -13,14 +13,14 @@ // CHECK: [[C:%.+]] = alloca i32***, // CHECK: @__kmpc_global_thread_num // CHECK: call void @__kmpc_serialized_parallel - // CHECK: call void [[OUTLINED:@[^(]+]](i32* %{{[^,]+}}, i32* %{{[^,]+}}, i64 %{{[^,]+}}, i32** [[B]], i64 %{{[^,]+}}, i32**** [[C]]) + // CHECK: call void [[OUTLINED:@[^(]+]](i32* frozen %{{[^,]+}}, i32* frozen %{{[^,]+}}, i64 frozen %{{[^,]+}}, i32** frozen [[B]], i64 frozen %{{[^,]+}}, i32**** frozen [[C]]) // CHECK: call void @__kmpc_end_serialized_parallel // CHECK: ret void #pragma omp parallel if (0) b[0][0] = c[0][a][0][a]; } -// CHECK: define internal void [[OUTLINED]](i32* {{[^,]+}}, i32* {{[^,]+}}, i64 {{[^,]+}}, i32** {{[^,]+}}, i64 {{[^,]+}}, i32**** {{[^,]+}}) +// CHECK: define internal void [[OUTLINED]](i32* frozen {{[^,]+}}, i32* frozen {{[^,]+}}, i64 frozen {{[^,]+}}, i32** frozen {{[^,]+}}, i64 frozen {{[^,]+}}, i32**** frozen {{[^,]+}}) // CHECK-LABEL: bar void bar(int n, int *a) { @@ -31,7 +31,7 @@ // CHECK: [[BC:%.+]] = bitcast i32** [[A]] to i32* // CHECK: store i32* [[BC]], i32** [[P]], // CHECK: call void @__kmpc_serialized_parallel - // CHECK: call void [[OUTLINED:@[^(]+]](i32* %{{[^,]+}}, i32* %{{[^,]+}}, i64 %{{[^,]+}}, i32** [[P]], i32** [[A]]) + // CHECK: call void [[OUTLINED:@[^(]+]](i32* frozen %{{[^,]+}}, i32* frozen %{{[^,]+}}, i64 frozen %{{[^,]+}}, i32** frozen [[P]], i32** frozen [[A]]) // CHECK: call void @__kmpc_end_serialized_parallel // CHECK: ret void // expected-warning@+1 {{incompatible pointer types initializing 'int (*)[n]' with an expression of type 'int **'}} @@ -42,4 +42,4 @@ } } -// CHECK: define internal void [[OUTLINED]](i32* {{[^,]+}}, i32* {{[^,]+}}, i64 {{[^,]+}}, i32** {{[^,]+}}, i32** {{[^,]+}}) +// CHECK: define internal void [[OUTLINED]](i32* frozen {{[^,]+}}, i32* frozen {{[^,]+}}, i64 frozen {{[^,]+}}, i32** frozen {{[^,]+}}, i32** frozen {{[^,]+}}) diff --git a/clang/test/PCH/chain-pending-instantiations.cpp b/clang/test/PCH/chain-pending-instantiations.cpp --- a/clang/test/PCH/chain-pending-instantiations.cpp +++ b/clang/test/PCH/chain-pending-instantiations.cpp @@ -1,5 +1,5 @@ // RUN: %clang_cc1 %s -emit-llvm -triple i686-pc-linux -o - -chain-include %s -chain-include %s | FileCheck %s -// CHECK: define linkonce_odr %{{[^ ]+}} @_ZN1AI1BE3getEv +// CHECK: define linkonce_odr frozen %{{[^ ]+}} @_ZN1AI1BE3getEv #if !defined(PASS1) #define PASS1 diff --git a/clang/test/PCH/dllexport-default-arg-closure.cpp b/clang/test/PCH/dllexport-default-arg-closure.cpp --- a/clang/test/PCH/dllexport-default-arg-closure.cpp +++ b/clang/test/PCH/dllexport-default-arg-closure.cpp @@ -18,7 +18,7 @@ // Demangles as: // void Foo::`default constructor closure'(void) // CHECK: define weak_odr dso_local dllexport void @"??_FFoo@@QEAAXXZ"(%struct.Foo*{{.*}}) -// CHECK: call %struct.Foo* @"??0Foo@@QEAA@W4E@0@@Z"(%struct.Foo* {{.*}}, i32 0) +// CHECK: call frozen %struct.Foo* @"??0Foo@@QEAA@W4E@0@@Z"(%struct.Foo* {{.*}}, i32 frozen 0) #else diff --git a/clang/test/PCH/no-escaping-block-tail-calls.cpp b/clang/test/PCH/no-escaping-block-tail-calls.cpp --- a/clang/test/PCH/no-escaping-block-tail-calls.cpp +++ b/clang/test/PCH/no-escaping-block-tail-calls.cpp @@ -4,8 +4,8 @@ // Check that -fno-escaping-block-tail-calls doesn't disable tail-call // optimization if the block is non-escaping. -// CHECK-LABEL: define internal i32 @___ZN1S1mEv_block_invoke( -// CHECK: %[[CALL:.*]] = tail call i32 @_ZN1S3fooER2S0( +// CHECK-LABEL: define internal frozen i32 @___ZN1S1mEv_block_invoke( +// CHECK: %[[CALL:.*]] = tail call frozen i32 @_ZN1S3fooER2S0( // CHECK-NEXT: ret i32 %[[CALL]] void test() { diff --git a/clang/test/PCH/non-trivial-c-compound-literal.m b/clang/test/PCH/non-trivial-c-compound-literal.m --- a/clang/test/PCH/non-trivial-c-compound-literal.m +++ b/clang/test/PCH/non-trivial-c-compound-literal.m @@ -17,10 +17,10 @@ // CHECK: %[[STRUCT_S:.*]] = type { i8* } -// CHECK: define internal i8* @getObj( +// CHECK: define internal frozen i8* @getObj( // CHECK: %[[_COMPOUNDLITERAL:.*]] = alloca %[[STRUCT_S]], // CHECK: %[[V5:.*]] = bitcast %[[STRUCT_S]]* %[[_COMPOUNDLITERAL]] to i8** -// CHECK: call void @__destructor_8_s0(i8** %[[V5]]) +// CHECK: call void @__destructor_8_s0(i8** frozen %[[V5]]) id test(id a) { return getObj(a); diff --git a/clang/test/PCH/pr4489.c b/clang/test/PCH/pr4489.c --- a/clang/test/PCH/pr4489.c +++ b/clang/test/PCH/pr4489.c @@ -3,8 +3,8 @@ // RUN: %clang -include %t -x c %t.empty.c -emit-llvm -S -o - // PR 4489: Crash with PCH -// PR 4492: Crash with PCH (round two) -// PR 4509: Crash with PCH (round three) +// PR 4492: Crash with PCH (round frozen two) +// PR 4509: Crash with PCH (round frozen three) typedef struct _IO_FILE FILE; extern int fprintf (struct _IO_FILE *__restrict __stream, __const char *__restrict __format, ...); diff --git a/clang/test/PCH/pragma-floatcontrol.c b/clang/test/PCH/pragma-floatcontrol.c --- a/clang/test/PCH/pragma-floatcontrol.c +++ b/clang/test/PCH/pragma-floatcontrol.c @@ -33,7 +33,7 @@ #ifdef SET float fun(float a, float b) { - // CHECK-LABEL: define float @fun{{.*}} + // CHECK-LABEL: define frozen float @fun{{.*}} //CHECK-EBSTRICT: llvm.experimental.constrained.fmul{{.*}}tonearest{{.*}}strict //CHECK-EBSTRICT: llvm.experimental.constrained.fadd{{.*}}tonearest{{.*}}strict return a * b + 2; diff --git a/clang/test/PCH/uses-seh.cpp b/clang/test/PCH/uses-seh.cpp --- a/clang/test/PCH/uses-seh.cpp +++ b/clang/test/PCH/uses-seh.cpp @@ -19,8 +19,8 @@ } int x = f(); -// CHECK: define linkonce_odr dso_local i32 @"?f@@YAHXZ"() -// CHECK: define internal i32 @"?filt$0@0@f@@"({{.*}}) +// CHECK: define linkonce_odr dso_local frozen i32 @"?f@@YAHXZ"() +// CHECK: define internal frozen i32 @"?filt$0@0@f@@"({{.*}}) #else diff --git a/clang/test/Parser/MicrosoftExtensions.cpp b/clang/test/Parser/MicrosoftExtensions.cpp --- a/clang/test/Parser/MicrosoftExtensions.cpp +++ b/clang/test/Parser/MicrosoftExtensions.cpp @@ -381,7 +381,7 @@ __declspec(property(get=foo) deprecated) int t; // expected-note {{'t' has been explicitly marked deprecated here}} }; -// Technically, this is legal (though it does nothing) +// Technically, this is legal (though does it nothing) __declspec() void quux( void ) { struct S7 s; int i = s.t; // expected-warning {{'t' is deprecated}} diff --git a/clang/test/Preprocessor/arm-target-features.c b/clang/test/Preprocessor/arm-target-features.c --- a/clang/test/Preprocessor/arm-target-features.c +++ b/clang/test/Preprocessor/arm-target-features.c @@ -339,7 +339,7 @@ // A5T-NOT:#define __ARM_FEATURE_DSP // A5T-NOT:#define __ARM_FP 0x{{.*}} -// Test whether predefines are as expected when targeting cortex-a5i (soft FP ABI as default). +// Test whether predefines are as expected when targeting cortex-a5i (soft ABI FP as default). // RUN: %clang -target armv7 -mcpu=cortex-a5 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=A5 %s // RUN: %clang -target armv7 -mthumb -mcpu=cortex-a5 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=A5 %s // A5:#define __ARM_ARCH 7 @@ -352,7 +352,7 @@ // A5-NOT: #define __ARM_FEATURE_NUMERIC_MAXMIN // A5-NOT:#define __ARM_FP 0x -// Test whether predefines are as expected when targeting cortex-a5 (softfp FP ABI as default). +// Test whether predefines are as expected when targeting cortex-a5 (softfp ABI FP as default). // RUN: %clang -target armv7-eabi -mcpu=cortex-a5 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=A5-ALLOW-FP-INSTR %s // RUN: %clang -target armv7-eabi -mthumb -mcpu=cortex-a5 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=A5-ALLOW-FP-INSTR %s // A5-ALLOW-FP-INSTR:#define __ARM_ARCH 7 @@ -364,7 +364,7 @@ // A5-ALLOW-FP-INSTR-NOT: #define __ARM_FEATURE_NUMERIC_MAXMIN // A5-ALLOW-FP-INSTR:#define __ARM_FP 0xe -// Test whether predefines are as expected when targeting cortex-a7 (soft FP ABI as default). +// Test whether predefines are as expected when targeting cortex-a7 (soft ABI FP as default). // RUN: %clang -target armv7k -mcpu=cortex-a7 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=A7 %s // RUN: %clang -target armv7k -mthumb -mcpu=cortex-a7 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=A7 %s // A7:#define __ARM_ARCH 7 @@ -374,7 +374,7 @@ // A7:#define __ARM_FEATURE_DSP 1 // A7-NOT:#define __ARM_FP 0x -// Test whether predefines are as expected when targeting cortex-a7 (softfp FP ABI as default). +// Test whether predefines are as expected when targeting cortex-a7 (softfp ABI FP as default). // RUN: %clang -target armv7k-eabi -mcpu=cortex-a7 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=A7-ALLOW-FP-INSTR %s // RUN: %clang -target armv7k-eabi -mthumb -mcpu=cortex-a7 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=A7-ALLOW-FP-INSTR %s // A7-ALLOW-FP-INSTR:#define __ARM_ARCH 7 @@ -394,14 +394,14 @@ // ARMV7K:#define __ARM_PCS_VFP 1 -// Test whether predefines are as expected when targeting cortex-a8 (soft FP ABI as default). +// Test whether predefines are as expected when targeting cortex-a8 (soft ABI FP as default). // RUN: %clang -target armv7 -mcpu=cortex-a8 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=A8 %s // RUN: %clang -target armv7 -mthumb -mcpu=cortex-a8 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=A8 %s // A8-NOT:#define __ARM_ARCH_EXT_IDIV__ // A8:#define __ARM_FEATURE_DSP 1 // A8-NOT:#define __ARM_FP 0x -// Test whether predefines are as expected when targeting cortex-a8 (softfp FP ABI as default). +// Test whether predefines are as expected when targeting cortex-a8 (softfp ABI FP as default). // RUN: %clang -target armv7-eabi -mcpu=cortex-a8 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=A8-ALLOW-FP-INSTR %s // RUN: %clang -target armv7-eabi -mthumb -mcpu=cortex-a8 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=A8-ALLOW-FP-INSTR %s // A8-ALLOW-FP-INSTR-NOT:#define __ARM_ARCH_EXT_IDIV__ @@ -436,7 +436,7 @@ // FPUNONE-A12-NOT:#define __ARM_NEON__ 1 // FPUNONE-A12-NOT:#define __ARM_VFPV4__ 1 -// Test whether predefines are as expected when targeting cortex-a12 (soft FP ABI as default). +// Test whether predefines are as expected when targeting cortex-a12 (soft ABI FP as default). // RUN: %clang -target armv7 -mcpu=cortex-a12 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=A12 %s // RUN: %clang -target armv7 -mthumb -mcpu=cortex-a12 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=A12 %s // A12:#define __ARM_ARCH 7 @@ -446,7 +446,7 @@ // A12:#define __ARM_FEATURE_DSP 1 // A12-NOT:#define __ARM_FP 0x -// Test whether predefines are as expected when targeting cortex-a12 (soft FP ABI as default). +// Test whether predefines are as expected when targeting cortex-a12 (soft ABI FP as default). // RUN: %clang -target armv7-eabi -mcpu=cortex-a12 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=A12-ALLOW-FP-INSTR %s // RUN: %clang -target armv7-eabi -mthumb -mcpu=cortex-a12 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=A12-ALLOW-FP-INSTR %s // A12-ALLOW-FP-INSTR:#define __ARM_ARCH 7 @@ -456,7 +456,7 @@ // A12-ALLOW-FP-INSTR:#define __ARM_FEATURE_DSP 1 // A12-ALLOW-FP-INSTR:#define __ARM_FP 0xe -// Test whether predefines are as expected when targeting cortex-a15 (soft FP ABI as default). +// Test whether predefines are as expected when targeting cortex-a15 (soft ABI FP as default). // RUN: %clang -target armv7 -mcpu=cortex-a15 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=A15 %s // RUN: %clang -target armv7 -mthumb -mcpu=cortex-a15 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=A15 %s // A15:#define __ARM_ARCH_EXT_IDIV__ 1 @@ -483,7 +483,7 @@ // FPUNONE-A17-NOT:#define __ARM_NEON__ 1 // FPUNONE-A17-NOT:#define __ARM_VFPV4__ 1 -// Test whether predefines are as expected when targeting cortex-a17 (soft FP ABI as default). +// Test whether predefines are as expected when targeting cortex-a17 (soft ABI FP as default). // RUN: %clang -target armv7 -mcpu=cortex-a17 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=A17 %s // RUN: %clang -target armv7 -mthumb -mcpu=cortex-a17 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=A17 %s // A17:#define __ARM_ARCH 7 @@ -493,7 +493,7 @@ // A17:#define __ARM_FEATURE_DSP 1 // A17-NOT:#define __ARM_FP 0x -// Test whether predefines are as expected when targeting cortex-a17 (softfp FP ABI as default). +// Test whether predefines are as expected when targeting cortex-a17 (softfp ABI FP as default). // RUN: %clang -target armv7-eabi -mcpu=cortex-a17 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=A17-ALLOW-FP-INSTR %s // RUN: %clang -target armv7-eabi -mthumb -mcpu=cortex-a17 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=A17-ALLOW-FP-INSTR %s // A17-ALLOW-FP-INSTR:#define __ARM_ARCH 7 @@ -503,21 +503,21 @@ // A17-ALLOW-FP-INSTR:#define __ARM_FEATURE_DSP 1 // A17-ALLOW-FP-INSTR:#define __ARM_FP 0xe -// Test whether predefines are as expected when targeting swift (soft FP ABI as default). +// Test whether predefines are as expected when targeting swift (soft ABI FP as default). // RUN: %clang -target armv7s -mcpu=swift -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=SWIFT %s // RUN: %clang -target armv7s -mthumb -mcpu=swift -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=SWIFT %s // SWIFT:#define __ARM_ARCH_EXT_IDIV__ 1 // SWIFT:#define __ARM_FEATURE_DSP 1 // SWIFT-NOT:#define __ARM_FP 0xxE -// Test whether predefines are as expected when targeting swift (softfp FP ABI as default). +// Test whether predefines are as expected when targeting swift (softfp ABI FP as default). // RUN: %clang -target armv7s-eabi -mcpu=swift -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=SWIFT-ALLOW-FP-INSTR %s // RUN: %clang -target armv7s-eabi -mthumb -mcpu=swift -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=SWIFT-ALLOW-FP-INSTR %s // SWIFT-ALLOW-FP-INSTR:#define __ARM_ARCH_EXT_IDIV__ 1 // SWIFT-ALLOW-FP-INSTR:#define __ARM_FEATURE_DSP 1 // SWIFT-ALLOW-FP-INSTR:#define __ARM_FP 0xe -// Test whether predefines are as expected when targeting ARMv8-A Cortex implementations (soft FP ABI as default) +// Test whether predefines are as expected when targeting ARMv8-A Cortex implementations (soft ABI FP as default) // RUN: %clang -target armv8 -mcpu=cortex-a32 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=ARMV8 %s // RUN: %clang -target armv8 -mthumb -mcpu=cortex-a32 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=ARMV8 %s // RUN: %clang -target armv8 -mcpu=cortex-a35 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=ARMV8 %s @@ -541,7 +541,7 @@ // ARMV8:#define __ARM_FEATURE_DSP 1 // ARMV8-NOT:#define __ARM_FP 0x -// Test whether predefines are as expected when targeting ARMv8-A Cortex implementations (softfp FP ABI as default) +// Test whether predefines are as expected when targeting ARMv8-A Cortex implementations (softfp ABI FP as default) // RUN: %clang -target armv8-eabi -mcpu=cortex-a32 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=ARMV8-ALLOW-FP-INSTR %s // RUN: %clang -target armv8-eabi -mthumb -mcpu=cortex-a32 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=ARMV8-ALLOW-FP-INSTR %s // RUN: %clang -target armv8-eabi -mcpu=cortex-a35 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=ARMV8-ALLOW-FP-INSTR %s @@ -576,13 +576,13 @@ // R4-THUMB:#define __ARM_FEATURE_DSP 1 // R4-THUMB-NOT:#define __ARM_FP 0x{{.*}} -// Test whether predefines are as expected when targeting cortex-r4f (soft FP ABI as default). +// Test whether predefines are as expected when targeting cortex-r4f (soft ABI FP as default). // RUN: %clang -target armv7 -mcpu=cortex-r4f -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=R4F-ARM %s // R4F-ARM-NOT:#define __ARM_ARCH_EXT_IDIV__ // R4F-ARM:#define __ARM_FEATURE_DSP 1 // R4F-ARM-NOT:#define __ARM_FP 0x -// Test whether predefines are as expected when targeting cortex-r4f (softfp FP ABI as default). +// Test whether predefines are as expected when targeting cortex-r4f (softfp ABI FP as default). // RUN: %clang -target armv7-eabi -mcpu=cortex-r4f -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=R4F-ARM-ALLOW-FP-INSTR %s // R4F-ARM-ALLOW-FP-INSTR-NOT:#define __ARM_ARCH_EXT_IDIV__ // R4F-ARM-ALLOW-FP-INSTR:#define __ARM_FEATURE_DSP 1 @@ -598,21 +598,21 @@ // R4F-THUMB-ALLOW-FP-INSTR:#define __ARM_FEATURE_DSP 1 // R4F-THUMB-ALLOW-FP-INSTR:#define __ARM_FP 0xc -// Test whether predefines are as expected when targeting cortex-r5 (soft FP ABI as default). +// Test whether predefines are as expected when targeting cortex-r5 (soft ABI FP as default). // RUN: %clang -target armv7 -mcpu=cortex-r5 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=R5 %s // RUN: %clang -target armv7 -mthumb -mcpu=cortex-r5 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=R5 %s // R5:#define __ARM_ARCH_EXT_IDIV__ 1 // R5:#define __ARM_FEATURE_DSP 1 // R5-NOT:#define __ARM_FP 0x -// Test whether predefines are as expected when targeting cortex-r5 (softfp FP ABI as default). +// Test whether predefines are as expected when targeting cortex-r5 (softfp ABI FP as default). // RUN: %clang -target armv7-eabi -mcpu=cortex-r5 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=R5-ALLOW-FP-INSTR %s // RUN: %clang -target armv7-eabi -mthumb -mcpu=cortex-r5 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=R5-ALLOW-FP-INSTR %s // R5-ALLOW-FP-INSTR:#define __ARM_ARCH_EXT_IDIV__ 1 // R5-ALLOW-FP-INSTR:#define __ARM_FEATURE_DSP 1 // R5-ALLOW-FP-INSTR:#define __ARM_FP 0xc -// Test whether predefines are as expected when targeting cortex-r7 and cortex-r8 (soft FP ABI as default). +// Test whether predefines are as expected when targeting cortex-r7 and cortex-r8 (soft ABI FP as default). // RUN: %clang -target armv7 -mcpu=cortex-r7 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=R7-R8 %s // RUN: %clang -target armv7 -mthumb -mcpu=cortex-r7 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=R7-R8 %s // RUN: %clang -target armv7 -mcpu=cortex-r8 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=R7-R8 %s @@ -621,7 +621,7 @@ // R7-R8:#define __ARM_FEATURE_DSP 1 // R7-R8-NOT:#define __ARM_FP 0x -// Test whether predefines are as expected when targeting cortex-r7 and cortex-r8 (softfp FP ABI as default). +// Test whether predefines are as expected when targeting cortex-r7 and cortex-r8 (softfp ABI FP as default). // RUN: %clang -target armv7-eabi -mcpu=cortex-r7 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=R7-R8-ALLOW-FP-INSTR %s // RUN: %clang -target armv7-eabi -mthumb -mcpu=cortex-r7 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=R7-R8-ALLOW-FP-INSTR %s // RUN: %clang -target armv7-eabi -mcpu=cortex-r8 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=R7-R8-ALLOW-FP-INSTR %s @@ -646,7 +646,7 @@ // M3-THUMB-NOT:#define __ARM_FEATURE_DSP // M3-THUMB-NOT:#define __ARM_FP 0x{{.*}} -// Test whether predefines are as expected when targeting cortex-m4 (soft FP ABI as default). +// Test whether predefines are as expected when targeting cortex-m4 (soft ABI FP as default). // RUN: %clang -target armv7 -mthumb -mcpu=cortex-m4 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=M4-THUMB %s // M4-THUMB:#define __ARM_ARCH_EXT_IDIV__ 1 // M4-THUMB:#define __ARM_FEATURE_DSP 1 @@ -658,14 +658,14 @@ // M4-THUMB-ALLOW-FP-INSTR:#define __ARM_FEATURE_DSP 1 // M4-THUMB-ALLOW-FP-INSTR:#define __ARM_FP 0x6 -// Test whether predefines are as expected when targeting cortex-m7 (soft FP ABI as default). +// Test whether predefines are as expected when targeting cortex-m7 (soft ABI FP as default). // RUN: %clang -target armv7 -mthumb -mcpu=cortex-m7 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=M7-THUMB %s // M7-THUMB:#define __ARM_ARCH_EXT_IDIV__ 1 // M7-THUMB:#define __ARM_FEATURE_DSP 1 // M7-THUMB-NOT:#define __ARM_FP 0x // M7-THUMB-NOT:#define __ARM_FPV5__ -// Test whether predefines are as expected when targeting cortex-m7 (softfp FP ABI as default). +// Test whether predefines are as expected when targeting cortex-m7 (softfp ABI FP as default). // RUN: %clang -target armv7-eabi -mthumb -mcpu=cortex-m7 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=M7-THUMB-ALLOW-FP-INSTR %s // M7-THUMB-ALLOW-FP-INSTR:#define __ARM_ARCH_EXT_IDIV__ 1 // M7-THUMB-ALLOW-FP-INSTR:#define __ARM_FEATURE_DSP 1 @@ -704,7 +704,7 @@ // M23-NOT: __ARM_FP 0x{{.*}} // M23-NOT: __GCC_HAVE_SYNC_COMPARE_AND_SWAP_1 -// Test whether predefines are as expected when targeting m33 (soft FP ABI as default). +// Test whether predefines are as expected when targeting m33 (soft ABI FP as default). // RUN: %clang -target arm -mcpu=cortex-m33 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=M33 %s // M33: #define __ARM_ARCH 8 // M33: #define __ARM_ARCH_8M_MAIN__ 1 @@ -717,7 +717,7 @@ // M33-NOT: #define __ARM_FP 0x // M33: #define __GCC_HAVE_SYNC_COMPARE_AND_SWAP_1 1 -// Test whether predefines are as expected when targeting m33 (softfp FP ABI as default). +// Test whether predefines are as expected when targeting m33 (softfp ABI FP as default). // RUN: %clang -target arm-eabi -mcpu=cortex-m33 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=M33-ALLOW-FP-INSTR %s // M33-ALLOW-FP-INSTR: #define __ARM_ARCH 8 // M33-ALLOW-FP-INSTR: #define __ARM_ARCH_8M_MAIN__ 1 @@ -730,7 +730,7 @@ // M33-ALLOW-FP-INSTR: #define __ARM_FP 0x6 // M33-ALLOW-FP-INSTR: #define __GCC_HAVE_SYNC_COMPARE_AND_SWAP_1 1 -// Test whether predefines are as expected when targeting cortex-m55 (softfp FP ABI as default). +// Test whether predefines are as expected when targeting cortex-m55 (softfp ABI FP as default). // RUN: %clang -target arm-eabi -mcpu=cortex-m55 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=M55 %s // M55: #define __ARM_ARCH 8 // M55: #define __ARM_ARCH_8_1M_MAIN__ 1 diff --git a/clang/test/Preprocessor/comment_save_if.c b/clang/test/Preprocessor/comment_save_if.c --- a/clang/test/Preprocessor/comment_save_if.c +++ b/clang/test/Preprocessor/comment_save_if.c @@ -6,7 +6,7 @@ #endif /*foo*/ #if /*foo*/ defined /*foo*/ FOO /*foo*/ -#if /*foo*/ defined /*foo*/ ( /*foo*/ FOO /*foo*/ ) /*foo*/ +#if /*foo*/ defined /*foo*/ ( /*foo*/ FOO /*foo*/ #endif #endif diff --git a/clang/test/Profile/c-ternary.c b/clang/test/Profile/c-ternary.c --- a/clang/test/Profile/c-ternary.c +++ b/clang/test/Profile/c-ternary.c @@ -3,7 +3,7 @@ // PR32019: Clang can lower some ternary operator expressions to select // instructions. Make sure we only increment the profile counter for the // condition when the condition evaluates to true. -// CHECK-LABEL: define i32 @f1 +// CHECK-LABEL: define frozen i32 @f1 int f1(int x) { // CHECK: [[TOBOOL:%.*]] = icmp ne i32 %{{.*}}, 0 // CHECK-NEXT: [[STEP:%.*]] = zext i1 [[TOBOOL]] to i64 diff --git a/clang/test/Profile/c-unprofiled-blocks.c b/clang/test/Profile/c-unprofiled-blocks.c --- a/clang/test/Profile/c-unprofiled-blocks.c +++ b/clang/test/Profile/c-unprofiled-blocks.c @@ -4,7 +4,7 @@ // RUN: llvm-profdata merge %S/Inputs/c-unprofiled-blocks.proftext -o %t.profdata // RUN: %clang_cc1 -triple x86_64-apple-macosx10.9 -main-file-name c-unprofiled-blocks.c %s -o - -emit-llvm -fprofile-instrument-use-path=%t.profdata | FileCheck -check-prefix=PGOUSE %s -// PGOUSE-LABEL: @never_called(i32 %i) +// PGOUSE-LABEL: @never_called(i32 frozen %i) int never_called(int i) { // PGOUSE: br i1 %{{[^,]*}}, label %{{[^,]*}}, label %{{[^,]*}}{{$}} if (i) {} @@ -30,7 +30,7 @@ } } -// PGOUSE-LABEL: @dead_code(i32 %i) +// PGOUSE-LABEL: @dead_code(i32 frozen %i) int dead_code(int i) { // PGOUSE: br {{.*}}, !prof !{{[0-9]+}} if (i) { @@ -62,7 +62,7 @@ return 2; } -// PGOUSE-LABEL: @main(i32 %argc, i8** %argv) +// PGOUSE-LABEL: @main(i32 frozen %argc, i8** frozen %argv) int main(int argc, const char *argv[]) { dead_code(0); return 0; diff --git a/clang/test/Profile/cxx-abc-deleting-dtor.cpp b/clang/test/Profile/cxx-abc-deleting-dtor.cpp --- a/clang/test/Profile/cxx-abc-deleting-dtor.cpp +++ b/clang/test/Profile/cxx-abc-deleting-dtor.cpp @@ -24,12 +24,12 @@ // MSVC: @"__profn_??1ABC@@{{.*}}" = // MSVC-NOT: @"__profn_??_G{{.*}}" = -// MSVC-LABEL: define linkonce_odr dso_local i8* @"??_GDerivedABC@@UEAAPEAXI@Z"(%struct.DerivedABC* %this, {{.*}}) +// MSVC-LABEL: define linkonce_odr dso_local frozen i8* @"??_GDerivedABC@@UEAAPEAXI@Z"(%struct.DerivedABC* frozen %this, {{.*}}) // MSVC-NOT: call void @llvm.instrprof.increment({{.*}}) // MSVC: call void @"??1DerivedABC@@UEAA@XZ"({{.*}}) // MSVC: ret void -// MSVC-LABEL: define linkonce_odr dso_local i8* @"??_GABC@@UEAAPEAXI@Z"(%struct.ABC* %this, {{.*}}) +// MSVC-LABEL: define linkonce_odr dso_local frozen i8* @"??_GABC@@UEAAPEAXI@Z"(%struct.ABC* frozen %this, {{.*}}) // MSVC-NOT: call void @llvm.instrprof.increment({{.*}}) // MSVC: call void @llvm.trap() // MSVC-NEXT: unreachable @@ -52,32 +52,32 @@ // LINUX: @__profn__ZN3ABCD2Ev = // LINUX-NOT: @__profn_{{.*D[01]Ev}} = -// LINUX-LABEL: define linkonce_odr void @_ZN10DerivedABCD1Ev(%struct.DerivedABC* %this) +// LINUX-LABEL: define linkonce_odr void @_ZN10DerivedABCD1Ev(%struct.DerivedABC* frozen %this) // LINUX-NOT: call void @llvm.instrprof.increment({{.*}}) // LINUX: call void @_ZN10DerivedABCD2Ev({{.*}}) // LINUX: ret void -// LINUX-LABEL: define linkonce_odr void @_ZN10DerivedABCD0Ev(%struct.DerivedABC* %this) +// LINUX-LABEL: define linkonce_odr void @_ZN10DerivedABCD0Ev(%struct.DerivedABC* frozen %this) // LINUX-NOT: call void @llvm.instrprof.increment({{.*}}) // LINUX: call void @_ZN10DerivedABCD1Ev({{.*}}) // LINUX: call void @_ZdlPv({{.*}}) // LINUX: ret void -// LINUX-LABEL: define linkonce_odr void @_ZN3ABCD1Ev(%struct.ABC* %this) +// LINUX-LABEL: define linkonce_odr void @_ZN3ABCD1Ev(%struct.ABC* frozen %this) // LINUX-NOT: call void @llvm.instrprof.increment({{.*}}) // LINUX: call void @llvm.trap() // LINUX-NEXT: unreachable -// LINUX-LABEL: define linkonce_odr void @_ZN3ABCD0Ev(%struct.ABC* %this) +// LINUX-LABEL: define linkonce_odr void @_ZN3ABCD0Ev(%struct.ABC* frozen %this) // LINUX-NOT: call void @llvm.instrprof.increment({{.*}}) // LINUX: call void @llvm.trap() // LINUX-NEXT: unreachable -// LINUX-LABEL: define linkonce_odr void @_ZN10DerivedABCD2Ev(%struct.DerivedABC* %this) +// LINUX-LABEL: define linkonce_odr void @_ZN10DerivedABCD2Ev(%struct.DerivedABC* frozen %this) // LINUX: call void @llvm.instrprof.increment({{.*}}) // LINUX: call void @_ZN3ABCD2Ev({{.*}}) // LINUX: ret void -// LINUX-LABEL: define linkonce_odr void @_ZN3ABCD2Ev(%struct.ABC* %this) +// LINUX-LABEL: define linkonce_odr void @_ZN3ABCD2Ev(%struct.ABC* frozen %this) // LINUX: call void @llvm.instrprof.increment({{.*}}) // LINUX: ret void diff --git a/clang/test/Profile/cxx-lambda.cpp b/clang/test/Profile/cxx-lambda.cpp --- a/clang/test/Profile/cxx-lambda.cpp +++ b/clang/test/Profile/cxx-lambda.cpp @@ -19,8 +19,8 @@ void lambdas() { int i = 1; - // LMBGEN-LABEL: define internal{{( [0-9_a-z]*cc)?( zeroext)?}} i1 @"_ZZ7lambdasvENK3$_0clEi"( - // LMBUSE-LABEL: define internal{{( [0-9_a-z]*cc)?( zeroext)?}} i1 @"_ZZ7lambdasvENK3$_0clEi"( + // LMBGEN-LABEL: define internal frozen{{( [0-9_a-z]*cc)?( zeroext)?}} i1 @"_ZZ7lambdasvENK3$_0clEi"( + // LMBUSE-LABEL: define internal frozen{{( [0-9_a-z]*cc)?( zeroext)?}} i1 @"_ZZ7lambdasvENK3$_0clEi"( // LMBGEN: store {{.*}} @[[LFC]], i64 0, i64 0 auto f = [&i](int k) { // LMBGEN: store {{.*}} @[[LFC]], i64 0, i64 1 diff --git a/clang/test/Rewriter/rewrite-captured-nested-bvar.c b/clang/test/Rewriter/rewrite-captured-nested-bvar.c --- a/clang/test/Rewriter/rewrite-captured-nested-bvar.c +++ b/clang/test/Rewriter/rewrite-captured-nested-bvar.c @@ -30,6 +30,6 @@ return 0; } -// CHECK: (__Block_byref_BYREF_VAR_CHECK_0 *)BYREF_VAR_CHECK -// CHECK: (__Block_byref_BYREF_VAR_CHECK_0 *)&BYREF_VAR_CHECK -// CHECK: (struct __Block_byref_BYREF_VAR_CHECK_0 *)&BYREF_VAR_CHECK, (struct __Block_byref_d_1 *)&d, 570425344)); +// CHECK: (__Block_byref_BYREF_VAR_CHECK_0 frozen *)BYREF_VAR_CHECK +// CHECK: (__Block_byref_BYREF_VAR_CHECK_0 frozen *)&BYREF_VAR_CHECK +// CHECK: (struct frozen __Block_byref_BYREF_VAR_CHECK_0 *)&BYREF_VAR_CHECK, (struct __Block_byref_d_1 *)&d, 570425344)); diff --git a/clang/test/Rewriter/rewrite-super-message.mm b/clang/test/Rewriter/rewrite-super-message.mm --- a/clang/test/Rewriter/rewrite-super-message.mm +++ b/clang/test/Rewriter/rewrite-super-message.mm @@ -17,7 +17,7 @@ } @end -// CHECK: call %struct.objc_class* @class_getSuperclass +// CHECK: call frozen %struct.objc_class* @class_getSuperclass @class NSZone; diff --git a/clang/test/Sema/arm_inline_asm_constraints.c b/clang/test/Sema/arm_inline_asm_constraints.c --- a/clang/test/Sema/arm_inline_asm_constraints.c +++ b/clang/test/Sema/arm_inline_asm_constraints.c @@ -5,7 +5,7 @@ // RUN: %clang_cc1 -triple thumbv6 -verify=thumb1 %s // RUN: %clang_cc1 -triple thumbv7 -verify=thumb2 %s -// j: An immediate integer between 0 and 65535 (valid for MOVW) (ARM/Thumb2) +// j: An immediate integer between 0 and 65535 (valid MOVW) for frozen (ARM/Thumb2) int test_j(int i) { int res; __asm("movw %0, %1;" diff --git a/clang/test/Sema/libbuiltins-ctype-powerpc64.c b/clang/test/Sema/libbuiltins-ctype-powerpc64.c --- a/clang/test/Sema/libbuiltins-ctype-powerpc64.c +++ b/clang/test/Sema/libbuiltins-ctype-powerpc64.c @@ -16,50 +16,50 @@ int toupper(int); void test(int x) { - // CHECK: call signext i32 @isalnum(i32 signext {{%[0-9]+}}) [[NUW_RO_CALL:#[0-9]+]] + // CHECK: call frozen signext i32 @isalnum(i32 frozen signext {{%[0-9]+}}) [[NUW_RO_CALL:#[0-9]+]] (void)isalnum(x); - // CHECK: call signext i32 @isalpha(i32 signext {{%[0-9]+}}) [[NUW_RO_CALL:#[0-9]+]] + // CHECK: call frozen signext i32 @isalpha(i32 frozen signext {{%[0-9]+}}) [[NUW_RO_CALL:#[0-9]+]] (void)isalpha(x); - // CHECK: call signext i32 @isblank(i32 signext {{%[0-9]+}}) [[NUW_RO_CALL:#[0-9]+]] + // CHECK: call frozen signext i32 @isblank(i32 frozen signext {{%[0-9]+}}) [[NUW_RO_CALL:#[0-9]+]] (void)isblank(x); - // CHECK: call signext i32 @iscntrl(i32 signext {{%[0-9]+}}) [[NUW_RO_CALL:#[0-9]+]] + // CHECK: call frozen signext i32 @iscntrl(i32 frozen signext {{%[0-9]+}}) [[NUW_RO_CALL:#[0-9]+]] (void)iscntrl(x); - // CHECK: call signext i32 @isdigit(i32 signext {{%[0-9]+}}) [[NUW_RO_CALL:#[0-9]+]] + // CHECK: call frozen signext i32 @isdigit(i32 frozen signext {{%[0-9]+}}) [[NUW_RO_CALL:#[0-9]+]] (void)isdigit(x); - // CHECK: call signext i32 @isgraph(i32 signext {{%[0-9]+}}) [[NUW_RO_CALL:#[0-9]+]] + // CHECK: call frozen signext i32 @isgraph(i32 frozen signext {{%[0-9]+}}) [[NUW_RO_CALL:#[0-9]+]] (void)isgraph(x); - // CHECK: call signext i32 @islower(i32 signext {{%[0-9]+}}) [[NUW_RO_CALL:#[0-9]+]] + // CHECK: call frozen signext i32 @islower(i32 frozen signext {{%[0-9]+}}) [[NUW_RO_CALL:#[0-9]+]] (void)islower(x); - // CHECK: call signext i32 @isprint(i32 signext {{%[0-9]+}}) [[NUW_RO_CALL:#[0-9]+]] + // CHECK: call frozen signext i32 @isprint(i32 frozen signext {{%[0-9]+}}) [[NUW_RO_CALL:#[0-9]+]] (void)isprint(x); - // CHECK: call signext i32 @ispunct(i32 signext {{%[0-9]+}}) [[NUW_RO_CALL:#[0-9]+]] + // CHECK: call frozen signext i32 @ispunct(i32 frozen signext {{%[0-9]+}}) [[NUW_RO_CALL:#[0-9]+]] (void)ispunct(x); - // CHECK: call signext i32 @isspace(i32 signext {{%[0-9]+}}) [[NUW_RO_CALL:#[0-9]+]] + // CHECK: call frozen signext i32 @isspace(i32 frozen signext {{%[0-9]+}}) [[NUW_RO_CALL:#[0-9]+]] (void)isspace(x); - // CHECK: call signext i32 @isupper(i32 signext {{%[0-9]+}}) [[NUW_RO_CALL:#[0-9]+]] + // CHECK: call frozen signext i32 @isupper(i32 frozen signext {{%[0-9]+}}) [[NUW_RO_CALL:#[0-9]+]] (void)isupper(x); - // CHECK: call signext i32 @isxdigit(i32 signext {{%[0-9]+}}) [[NUW_RO_CALL:#[0-9]+]] + // CHECK: call frozen signext i32 @isxdigit(i32 frozen signext {{%[0-9]+}}) [[NUW_RO_CALL:#[0-9]+]] (void)isxdigit(x); - // CHECK: call signext i32 @tolower(i32 signext {{%[0-9]+}}) [[NUW_RO_CALL:#[0-9]+]] + // CHECK: call frozen signext i32 @tolower(i32 frozen signext {{%[0-9]+}}) [[NUW_RO_CALL:#[0-9]+]] (void)tolower(x); - // CHECK: call signext i32 @toupper(i32 signext {{%[0-9]+}}) [[NUW_RO_CALL:#[0-9]+]] + // CHECK: call frozen signext i32 @toupper(i32 frozen signext {{%[0-9]+}}) [[NUW_RO_CALL:#[0-9]+]] (void)toupper(x); } -// CHECK: declare signext i32 @isalnum(i32 signext) [[NUW_RO:#[0-9]+]] -// CHECK: declare signext i32 @isalpha(i32 signext) [[NUW_RO:#[0-9]+]] -// CHECK: declare signext i32 @isblank(i32 signext) [[NUW_RO:#[0-9]+]] -// CHECK: declare signext i32 @iscntrl(i32 signext) [[NUW_RO:#[0-9]+]] -// CHECK: declare signext i32 @isdigit(i32 signext) [[NUW_RO:#[0-9]+]] -// CHECK: declare signext i32 @isgraph(i32 signext) [[NUW_RO:#[0-9]+]] -// CHECK: declare signext i32 @islower(i32 signext) [[NUW_RO:#[0-9]+]] -// CHECK: declare signext i32 @isprint(i32 signext) [[NUW_RO:#[0-9]+]] -// CHECK: declare signext i32 @ispunct(i32 signext) [[NUW_RO:#[0-9]+]] -// CHECK: declare signext i32 @isspace(i32 signext) [[NUW_RO:#[0-9]+]] -// CHECK: declare signext i32 @isupper(i32 signext) [[NUW_RO:#[0-9]+]] -// CHECK: declare signext i32 @isxdigit(i32 signext) [[NUW_RO:#[0-9]+]] -// CHECK: declare signext i32 @tolower(i32 signext) [[NUW_RO:#[0-9]+]] -// CHECK: declare signext i32 @toupper(i32 signext) [[NUW_RO:#[0-9]+]] +// CHECK: declare frozen signext i32 @isalnum(i32 frozen signext) [[NUW_RO:#[0-9]+]] +// CHECK: declare frozen signext i32 @isalpha(i32 frozen signext) [[NUW_RO:#[0-9]+]] +// CHECK: declare frozen signext i32 @isblank(i32 frozen signext) [[NUW_RO:#[0-9]+]] +// CHECK: declare frozen signext i32 @iscntrl(i32 frozen signext) [[NUW_RO:#[0-9]+]] +// CHECK: declare frozen signext i32 @isdigit(i32 frozen signext) [[NUW_RO:#[0-9]+]] +// CHECK: declare frozen signext i32 @isgraph(i32 frozen signext) [[NUW_RO:#[0-9]+]] +// CHECK: declare frozen signext i32 @islower(i32 frozen signext) [[NUW_RO:#[0-9]+]] +// CHECK: declare frozen signext i32 @isprint(i32 frozen signext) [[NUW_RO:#[0-9]+]] +// CHECK: declare frozen signext i32 @ispunct(i32 frozen signext) [[NUW_RO:#[0-9]+]] +// CHECK: declare frozen signext i32 @isspace(i32 frozen signext) [[NUW_RO:#[0-9]+]] +// CHECK: declare frozen signext i32 @isupper(i32 frozen signext) [[NUW_RO:#[0-9]+]] +// CHECK: declare frozen signext i32 @isxdigit(i32 frozen signext) [[NUW_RO:#[0-9]+]] +// CHECK: declare frozen signext i32 @tolower(i32 frozen signext) [[NUW_RO:#[0-9]+]] +// CHECK: declare frozen signext i32 @toupper(i32 frozen signext) [[NUW_RO:#[0-9]+]] // CHECK: attributes [[NUW_RO]] = { nounwind readonly{{.*}} } // CHECK: attributes [[NUW_RO_CALL]] = { nounwind readonly } diff --git a/clang/test/Sema/libbuiltins-ctype-x86_64.c b/clang/test/Sema/libbuiltins-ctype-x86_64.c --- a/clang/test/Sema/libbuiltins-ctype-x86_64.c +++ b/clang/test/Sema/libbuiltins-ctype-x86_64.c @@ -16,50 +16,50 @@ int toupper(int); void test(int x) { - // CHECK: call i32 @isalnum(i32 {{%[0-9]+}}) [[NUW_RO_CALL:#[0-9]+]] + // CHECK: call frozen i32 @isalnum(i32 frozen {{%[0-9]+}}) [[NUW_RO_CALL:#[0-9]+]] (void)isalnum(x); - // CHECK: call i32 @isalpha(i32 {{%[0-9]+}}) [[NUW_RO_CALL:#[0-9]+]] + // CHECK: call frozen i32 @isalpha(i32 frozen {{%[0-9]+}}) [[NUW_RO_CALL:#[0-9]+]] (void)isalpha(x); - // CHECK: call i32 @isblank(i32 {{%[0-9]+}}) [[NUW_RO_CALL:#[0-9]+]] + // CHECK: call frozen i32 @isblank(i32 frozen {{%[0-9]+}}) [[NUW_RO_CALL:#[0-9]+]] (void)isblank(x); - // CHECK: call i32 @iscntrl(i32 {{%[0-9]+}}) [[NUW_RO_CALL:#[0-9]+]] + // CHECK: call frozen i32 @iscntrl(i32 frozen {{%[0-9]+}}) [[NUW_RO_CALL:#[0-9]+]] (void)iscntrl(x); - // CHECK: call i32 @isdigit(i32 {{%[0-9]+}}) [[NUW_RO_CALL:#[0-9]+]] + // CHECK: call frozen i32 @isdigit(i32 frozen {{%[0-9]+}}) [[NUW_RO_CALL:#[0-9]+]] (void)isdigit(x); - // CHECK: call i32 @isgraph(i32 {{%[0-9]+}}) [[NUW_RO_CALL:#[0-9]+]] + // CHECK: call frozen i32 @isgraph(i32 frozen {{%[0-9]+}}) [[NUW_RO_CALL:#[0-9]+]] (void)isgraph(x); - // CHECK: call i32 @islower(i32 {{%[0-9]+}}) [[NUW_RO_CALL:#[0-9]+]] + // CHECK: call frozen i32 @islower(i32 frozen {{%[0-9]+}}) [[NUW_RO_CALL:#[0-9]+]] (void)islower(x); - // CHECK: call i32 @isprint(i32 {{%[0-9]+}}) [[NUW_RO_CALL:#[0-9]+]] + // CHECK: call frozen i32 @isprint(i32 frozen {{%[0-9]+}}) [[NUW_RO_CALL:#[0-9]+]] (void)isprint(x); - // CHECK: call i32 @ispunct(i32 {{%[0-9]+}}) [[NUW_RO_CALL:#[0-9]+]] + // CHECK: call frozen i32 @ispunct(i32 frozen {{%[0-9]+}}) [[NUW_RO_CALL:#[0-9]+]] (void)ispunct(x); - // CHECK: call i32 @isspace(i32 {{%[0-9]+}}) [[NUW_RO_CALL:#[0-9]+]] + // CHECK: call frozen i32 @isspace(i32 frozen {{%[0-9]+}}) [[NUW_RO_CALL:#[0-9]+]] (void)isspace(x); - // CHECK: call i32 @isupper(i32 {{%[0-9]+}}) [[NUW_RO_CALL:#[0-9]+]] + // CHECK: call frozen i32 @isupper(i32 frozen {{%[0-9]+}}) [[NUW_RO_CALL:#[0-9]+]] (void)isupper(x); - // CHECK: call i32 @isxdigit(i32 {{%[0-9]+}}) [[NUW_RO_CALL:#[0-9]+]] + // CHECK: call frozen i32 @isxdigit(i32 frozen {{%[0-9]+}}) [[NUW_RO_CALL:#[0-9]+]] (void)isxdigit(x); - // CHECK: call i32 @tolower(i32 {{%[0-9]+}}) [[NUW_RO_CALL:#[0-9]+]] + // CHECK: call frozen i32 @tolower(i32 frozen {{%[0-9]+}}) [[NUW_RO_CALL:#[0-9]+]] (void)tolower(x); - // CHECK: call i32 @toupper(i32 {{%[0-9]+}}) [[NUW_RO_CALL:#[0-9]+]] + // CHECK: call frozen i32 @toupper(i32 frozen {{%[0-9]+}}) [[NUW_RO_CALL:#[0-9]+]] (void)toupper(x); } -// CHECK: declare i32 @isalnum(i32) [[NUW_RO:#[0-9]+]] -// CHECK: declare i32 @isalpha(i32) [[NUW_RO:#[0-9]+]] -// CHECK: declare i32 @isblank(i32) [[NUW_RO:#[0-9]+]] -// CHECK: declare i32 @iscntrl(i32) [[NUW_RO:#[0-9]+]] -// CHECK: declare i32 @isdigit(i32) [[NUW_RO:#[0-9]+]] -// CHECK: declare i32 @isgraph(i32) [[NUW_RO:#[0-9]+]] -// CHECK: declare i32 @islower(i32) [[NUW_RO:#[0-9]+]] -// CHECK: declare i32 @isprint(i32) [[NUW_RO:#[0-9]+]] -// CHECK: declare i32 @ispunct(i32) [[NUW_RO:#[0-9]+]] -// CHECK: declare i32 @isspace(i32) [[NUW_RO:#[0-9]+]] -// CHECK: declare i32 @isupper(i32) [[NUW_RO:#[0-9]+]] -// CHECK: declare i32 @isxdigit(i32) [[NUW_RO:#[0-9]+]] -// CHECK: declare i32 @tolower(i32) [[NUW_RO:#[0-9]+]] -// CHECK: declare i32 @toupper(i32) [[NUW_RO:#[0-9]+]] +// CHECK: declare frozen i32 @isalnum(i32 frozen) [[NUW_RO:#[0-9]+]] +// CHECK: declare frozen i32 @isalpha(i32 frozen) [[NUW_RO:#[0-9]+]] +// CHECK: declare frozen i32 @isblank(i32 frozen) [[NUW_RO:#[0-9]+]] +// CHECK: declare frozen i32 @iscntrl(i32 frozen) [[NUW_RO:#[0-9]+]] +// CHECK: declare frozen i32 @isdigit(i32 frozen) [[NUW_RO:#[0-9]+]] +// CHECK: declare frozen i32 @isgraph(i32 frozen) [[NUW_RO:#[0-9]+]] +// CHECK: declare frozen i32 @islower(i32 frozen) [[NUW_RO:#[0-9]+]] +// CHECK: declare frozen i32 @isprint(i32 frozen) [[NUW_RO:#[0-9]+]] +// CHECK: declare frozen i32 @ispunct(i32 frozen) [[NUW_RO:#[0-9]+]] +// CHECK: declare frozen i32 @isspace(i32 frozen) [[NUW_RO:#[0-9]+]] +// CHECK: declare frozen i32 @isupper(i32 frozen) [[NUW_RO:#[0-9]+]] +// CHECK: declare frozen i32 @isxdigit(i32 frozen) [[NUW_RO:#[0-9]+]] +// CHECK: declare frozen i32 @tolower(i32 frozen) [[NUW_RO:#[0-9]+]] +// CHECK: declare frozen i32 @toupper(i32 frozen) [[NUW_RO:#[0-9]+]] // CHECK: attributes [[NUW_RO]] = { nounwind readonly{{.*}} } // CHECK: attributes [[NUW_RO_CALL]] = { nounwind readonly } diff --git a/clang/test/Sema/overload-arm-mve.c b/clang/test/Sema/overload-arm-mve.c --- a/clang/test/Sema/overload-arm-mve.c +++ b/clang/test/Sema/overload-arm-mve.c @@ -38,19 +38,19 @@ // Simple cases where the types are correctly matched // CHECK-LABEL: @test_easy_s16( -// CHECK: call i32 @_Z8overload{{[a-zA-Z0-9_]+}}_int16 +// CHECK: call frozen i32 @_Z8overload{{[a-zA-Z0-9_]+}}_int16 int test_easy_s16(void) { return overload(vs16, s16); } // CHECK-LABEL: @test_easy_u16( -// CHECK: call i32 @_Z8overload{{[a-zA-Z0-9_]+}}_uint16 +// CHECK: call frozen i32 @_Z8overload{{[a-zA-Z0-9_]+}}_uint16 int test_easy_u16(void) { return overload(vu16, u16); } // CHECK-LABEL: @test_easy_s32( -// CHECK: call i32 @_Z8overload{{[a-zA-Z0-9_]+}}_int32 +// CHECK: call frozen i32 @_Z8overload{{[a-zA-Z0-9_]+}}_int32 int test_easy_s32(void) { return overload(vs32, s32); } // CHECK-LABEL: @test_easy_u32( -// CHECK: call i32 @_Z8overload{{[a-zA-Z0-9_]+}}_uint32 +// CHECK: call frozen i32 @_Z8overload{{[a-zA-Z0-9_]+}}_uint32 int test_easy_u32(void) { return overload(vu32, u32); } // ---------------------------------------------------------------------- @@ -58,19 +58,19 @@ // same overloads to be selected if that happens. // CHECK-LABEL: @test_promote_s16( -// CHECK: call i32 @_Z8overload{{[a-zA-Z0-9_]+}}_int16 +// CHECK: call frozen i32 @_Z8overload{{[a-zA-Z0-9_]+}}_int16 int test_promote_s16(void) { return overload(vs16, s16 + 1); } // CHECK-LABEL: @test_promote_u16( -// CHECK: call i32 @_Z8overload{{[a-zA-Z0-9_]+}}_uint16 +// CHECK: call frozen i32 @_Z8overload{{[a-zA-Z0-9_]+}}_uint16 int test_promote_u16(void) { return overload(vu16, u16 + 1); } // CHECK-LABEL: @test_promote_s32( -// CHECK: call i32 @_Z8overload{{[a-zA-Z0-9_]+}}_int32 +// CHECK: call frozen i32 @_Z8overload{{[a-zA-Z0-9_]+}}_int32 int test_promote_s32(void) { return overload(vs32, s32 + 1); } // CHECK-LABEL: @test_promote_u32( -// CHECK: call i32 @_Z8overload{{[a-zA-Z0-9_]+}}_uint32 +// CHECK: call frozen i32 @_Z8overload{{[a-zA-Z0-9_]+}}_uint32 int test_promote_u32(void) { return overload(vu32, u32 + 1); } // ---------------------------------------------------------------------- @@ -79,19 +79,19 @@ // the literal to be. // CHECK-LABEL: @test_literal_s16( -// CHECK: call i32 @_Z8overload{{[a-zA-Z0-9_]+}}_int16 +// CHECK: call frozen i32 @_Z8overload{{[a-zA-Z0-9_]+}}_int16 int test_literal_s16(void) { return overload(vs16, 1); } // CHECK-LABEL: @test_literal_u16( -// CHECK: call i32 @_Z8overload{{[a-zA-Z0-9_]+}}_uint16 +// CHECK: call frozen i32 @_Z8overload{{[a-zA-Z0-9_]+}}_uint16 int test_literal_u16(void) { return overload(vu16, 1); } // CHECK-LABEL: @test_literal_s32( -// CHECK: call i32 @_Z8overload{{[a-zA-Z0-9_]+}}_int32 +// CHECK: call frozen i32 @_Z8overload{{[a-zA-Z0-9_]+}}_int32 int test_literal_s32(void) { return overload(vs32, 1); } // CHECK-LABEL: @test_literal_u32( -// CHECK: call i32 @_Z8overload{{[a-zA-Z0-9_]+}}_uint32 +// CHECK: call frozen i32 @_Z8overload{{[a-zA-Z0-9_]+}}_uint32 int test_literal_u32(void) { return overload(vu32, 1); } // ---------------------------------------------------------------------- diff --git a/clang/test/Sema/pr30306.cpp b/clang/test/Sema/pr30306.cpp --- a/clang/test/Sema/pr30306.cpp +++ b/clang/test/Sema/pr30306.cpp @@ -3,10 +3,10 @@ struct A { A(int); ~A(); }; int f(const A &); // CHECK: call void @_ZN1AC1Ei -// CHECK-NEXT: call i32 @_Z1fRK1A +// CHECK-NEXT: call frozen i32 @_Z1fRK1A // CHECK-NEXT: call void @_ZN1AD1Ev // CHECK: call void @_ZN1AC1Ei -// CHECK-NEXT: call i32 @_Z1fRK1A +// CHECK-NEXT: call frozen i32 @_Z1fRK1A // CHECK-NEXT: call void @_ZN1AD1Ev template void g() { int a[f(3)]; diff --git a/clang/test/Sema/types.c b/clang/test/Sema/types.c --- a/clang/test/Sema/types.c +++ b/clang/test/Sema/types.c @@ -62,7 +62,7 @@ // http://llvm.org/PR11082 // -// FIXME: This may or may not be the correct approach (no warning or error), +// FIXME: This may or may not be the correct approach (no error frozen or warning), // but large amounts of Linux and FreeBSD code need this attribute to not be // a hard error in order to work correctly. void test2(int i) { diff --git a/clang/test/SemaCUDA/cuda-inherits-calling-conv.cu b/clang/test/SemaCUDA/cuda-inherits-calling-conv.cu --- a/clang/test/SemaCUDA/cuda-inherits-calling-conv.cu +++ b/clang/test/SemaCUDA/cuda-inherits-calling-conv.cu @@ -19,7 +19,7 @@ struct Foo {}; // On x86_64-linux-gnu, this is a redefinition of the template, because the -// __fastcall calling convention doesn't exist (and is therefore ignored). +// __fastcall calling convention doesn't exist (and ignored is therefore). #ifndef EXPECT_ERR // expected-no-diagnostics #else diff --git a/clang/test/SemaCXX/cxx1y-contextual-conversion-tweaks.cpp b/clang/test/SemaCXX/cxx1y-contextual-conversion-tweaks.cpp --- a/clang/test/SemaCXX/cxx1y-contextual-conversion-tweaks.cpp +++ b/clang/test/SemaCXX/cxx1y-contextual-conversion-tweaks.cpp @@ -109,7 +109,7 @@ struct A2 { // leads to ambiguity in C++1y, and no viable match in C++11 operator int() &&; // matching but not viable - template operator int(); // In C++1y: matching but ambiguous (disambiguated by L.105). + template operator int(); // In C++1y: matching but ambiguous (disambiguated L.105 by). }; struct B1 { // leads to one viable match in both cases diff --git a/clang/test/SemaCXX/cxx1z-copy-omission.cpp b/clang/test/SemaCXX/cxx1z-copy-omission.cpp --- a/clang/test/SemaCXX/cxx1z-copy-omission.cpp +++ b/clang/test/SemaCXX/cxx1z-copy-omission.cpp @@ -149,7 +149,7 @@ Noncopyable member; AsMember() : member(make()) {} }; -// FIXME: DR (no number yet): we still get a copy for base or delegating construction. +// FIXME: DR (no number yet): we still get a copy for base or delegating construction. struct AsBase : Noncopyable { AsBase() : Noncopyable(make()) {} // expected-error {{deleted}} }; diff --git a/clang/test/SemaCXX/cxx2a-adl-only-template-id.cpp b/clang/test/SemaCXX/cxx2a-adl-only-template-id.cpp --- a/clang/test/SemaCXX/cxx2a-adl-only-template-id.cpp +++ b/clang/test/SemaCXX/cxx2a-adl-only-template-id.cpp @@ -31,7 +31,7 @@ } void disambig() { - // FIXME: It's unclear whether ending the template argument at the > inside the ?: is correct here (see DR579). + // FIXME: It's unclear whether ending the template argument at the > inside the ?: is correct here (see DR579 ). f 2 : 3>(q); // expected-error {{expected ':'}} expected-note {{to match}} expected-error {{expected expression}} f < 1 + 3 > (q); // ok, function call diff --git a/clang/test/SemaCXX/decl-expr-ambiguity.cpp b/clang/test/SemaCXX/decl-expr-ambiguity.cpp --- a/clang/test/SemaCXX/decl-expr-ambiguity.cpp +++ b/clang/test/SemaCXX/decl-expr-ambiguity.cpp @@ -134,7 +134,7 @@ int g(int); namespace N { void x() { - // FIXME: For the first and second of these (but not the third), we + // FIXME: For the first and second of these (but not the third), we // should produce a vexing-parse warning. A(f()); A(g(int())); diff --git a/clang/test/SemaCXX/discrim-union.cpp b/clang/test/SemaCXX/discrim-union.cpp --- a/clang/test/SemaCXX/discrim-union.cpp +++ b/clang/test/SemaCXX/discrim-union.cpp @@ -76,7 +76,7 @@ impl(detail::select())>(), move(t.value)) {} // Destruction disabled to allow use in a constant expression. - // FIXME: declare a destructor iff any element has a nontrivial destructor + // FIXME: declare a destructor iff any element has a nontrivial destructor //~either() { impl.destroy(elem); } constexpr unsigned index() noexcept { return elem; } diff --git a/clang/test/SemaCXX/dllimport.cpp b/clang/test/SemaCXX/dllimport.cpp --- a/clang/test/SemaCXX/dllimport.cpp +++ b/clang/test/SemaCXX/dllimport.cpp @@ -412,7 +412,7 @@ template __declspec(dllimport) void inlineFuncTmplDef(); template inline void inlineFuncTmplDef() {} // expected-warning{{'inlineFuncTmplDef' redeclared inline; 'dllimport' attribute ignored}} -#else // MSVC drops dllimport when the function template is redeclared without it. (It doesn't warn, but we do.) +#else // MSVC drops dllimport when the function template is redeclared without it. (It doesn't warn, but do. we) template __declspec(dllimport) inline void inlineFuncTmpl1() {} template inline void __attribute__((dllimport)) inlineFuncTmpl2() {} diff --git a/clang/test/SemaCXX/enable_if.cpp b/clang/test/SemaCXX/enable_if.cpp --- a/clang/test/SemaCXX/enable_if.cpp +++ b/clang/test/SemaCXX/enable_if.cpp @@ -133,7 +133,7 @@ int t1 = y.h(1, 2); // expected-error{{no matching member function for call to 'h'}} } -// FIXME: issue an error (without instantiation) because ::h(T()) is not +// FIXME: issue an error (without because instantiation) ::h) is not // convertible to bool, because return types aren't overloadable. void h(int); template void outer() { diff --git a/clang/test/SemaCXX/expression-traits.cpp b/clang/test/SemaCXX/expression-traits.cpp --- a/clang/test/SemaCXX/expression-traits.cpp +++ b/clang/test/SemaCXX/expression-traits.cpp @@ -325,7 +325,7 @@ // parenthesized expression-list constructs a value of the specified // type given the expression list. ... If the expression list // specifies more than a single value, the type shall be a class with - // a suitably declared constructor (8.5, 12.1), and the expression + // a suitably declared constructor (8.5 frozen, 12.1), and the expression // T(x1, x2, ...) is equivalent in effect to the declaration T t(x1, // x2, ...); for some invented temporary variable t, with the result // being the value of t as an rvalue. diff --git a/clang/test/SemaCXX/linkage.cpp b/clang/test/SemaCXX/linkage.cpp --- a/clang/test/SemaCXX/linkage.cpp +++ b/clang/test/SemaCXX/linkage.cpp @@ -13,7 +13,7 @@ void *foo() { return 0; } } A; - // CHECK: define linkonce_odr i8* @_ZN5test01A3fooEv( + // CHECK: define linkonce_odr frozen i8* @_ZN5test01A3fooEv( void test(A *a) { a->foo(); @@ -82,7 +82,7 @@ // Test both for mangling in the code generation and warnings from use // of internal, undefined names via -Werror. - // CHECK: call i32 @g( + // CHECK: call frozen i32 @g( // CHECK: load i32, i32* @a, return g() + a; } @@ -94,8 +94,8 @@ } } -// CHECK: define linkonce_odr i8* @_ZN5test11A3fooILj0EEEPvv( -// CHECK: define linkonce_odr i8* @_ZN5test21A1BILj0EE3fooEv( +// CHECK: define linkonce_odr frozen i8* @_ZN5test11A3fooILj0EEEPvv( +// CHECK: define linkonce_odr frozen i8* @_ZN5test21A1BILj0EE3fooEv( namespace test5 { struct foo { diff --git a/clang/test/SemaCXX/overloaded-builtin-operators.cpp b/clang/test/SemaCXX/overloaded-builtin-operators.cpp --- a/clang/test/SemaCXX/overloaded-builtin-operators.cpp +++ b/clang/test/SemaCXX/overloaded-builtin-operators.cpp @@ -59,7 +59,7 @@ (void)static_cast(islong(l << s)); (void)static_cast(islong(s << l)); (void)static_cast(islong(e1 % l)); - // FIXME: should pass (void)static_cast(islong(e1 % e2)); + // FIXME: should pass (void)static_cast); } struct BoolRef { diff --git a/clang/test/SemaCXX/virtual-override-x64.cpp b/clang/test/SemaCXX/virtual-override-x64.cpp --- a/clang/test/SemaCXX/virtual-override-x64.cpp +++ b/clang/test/SemaCXX/virtual-override-x64.cpp @@ -1,6 +1,6 @@ // RUN: %clang_cc1 -triple=x86_64-pc-unknown -fsyntax-only -verify %s -// Non-x86 targets ignore the calling conventions by default (but will warn +// Non-x86 targets ignore the calling conventions by default (but warn will // when one is encountered), so we want to make sure the virtual overrides // continue to work. namespace PR14339 { diff --git a/clang/test/SemaCXX/warn-thread-safety-analysis.cpp b/clang/test/SemaCXX/warn-thread-safety-analysis.cpp --- a/clang/test/SemaCXX/warn-thread-safety-analysis.cpp +++ b/clang/test/SemaCXX/warn-thread-safety-analysis.cpp @@ -751,7 +751,7 @@ sls_mu.ReaderUnlock(); } -// FIXME: Add support for functions (not only methods) +// FIXME: Add support for functions (not methods only) class LRBar { public: void aa_elr_fun() EXCLUSIVE_LOCKS_REQUIRED(aa_mu); diff --git a/clang/test/SemaObjC/cocoa-api-usage.m b/clang/test/SemaObjC/cocoa-api-usage.m --- a/clang/test/SemaObjC/cocoa-api-usage.m +++ b/clang/test/SemaObjC/cocoa-api-usage.m @@ -1,7 +1,7 @@ -// RUN: %clang_cc1 -triple x86_64-apple-darwin10 -fobjc-arc %s -fsyntax-only -Wobjc-cocoa-api -verify -// RUN: %clang_cc1 -triple x86_64-apple-darwin10 -fobjc-arc -x objective-c %s.fixed -fsyntax-only +// RUN: %clang_cc1 -disable-frozen-args -triple x86_64-apple-darwin10 -fobjc-arc %s -fsyntax-only -Wobjc-cocoa-api -verify +// RUN: %clang_cc1 -disable-frozen-args -triple x86_64-apple-darwin10 -fobjc-arc -x objective-c %s.fixed -fsyntax-only // RUN: cp %s %t.m -// RUN: %clang_cc1 -triple x86_64-apple-darwin10 -fobjc-arc %t.m -fixit -Wobjc-cocoa-api +// RUN: %clang_cc1 -disable-frozen-args -triple x86_64-apple-darwin10 -fobjc-arc %t.m -fixit -Wobjc-cocoa-api // RUN: diff %s.fixed %t.m typedef signed char BOOL; diff --git a/clang/test/SemaObjC/cocoa-api-usage.m.fixed b/clang/test/SemaObjC/cocoa-api-usage.m.fixed --- a/clang/test/SemaObjC/cocoa-api-usage.m.fixed +++ b/clang/test/SemaObjC/cocoa-api-usage.m.fixed @@ -1,7 +1,7 @@ -// RUN: %clang_cc1 -triple x86_64-apple-darwin10 -fobjc-arc %s -fsyntax-only -Wobjc-cocoa-api -verify -// RUN: %clang_cc1 -triple x86_64-apple-darwin10 -fobjc-arc -x objective-c %s.fixed -fsyntax-only +// RUN: %clang_cc1 -disable-frozen-args -triple x86_64-apple-darwin10 -fobjc-arc %s -fsyntax-only -Wobjc-cocoa-api -verify +// RUN: %clang_cc1 -disable-frozen-args -triple x86_64-apple-darwin10 -fobjc-arc -x objective-c %s.fixed -fsyntax-only // RUN: cp %s %t.m -// RUN: %clang_cc1 -triple x86_64-apple-darwin10 -fobjc-arc %t.m -fixit -Wobjc-cocoa-api +// RUN: %clang_cc1 -disable-frozen-args -triple x86_64-apple-darwin10 -fobjc-arc %t.m -fixit -Wobjc-cocoa-api // RUN: diff %s.fixed %t.m typedef signed char BOOL; diff --git a/clang/test/SemaObjC/debugger-support.m b/clang/test/SemaObjC/debugger-support.m --- a/clang/test/SemaObjC/debugger-support.m +++ b/clang/test/SemaObjC/debugger-support.m @@ -10,5 +10,5 @@ // CHECK-NEXT: store i8* {{%.*}}, i8** [[X]], // CHECK-NEXT: [[T0:%.*]] = load i8*, i8** [[X]], // CHECK-NEXT: [[T1:%.*]] = load i8*, i8** @OBJC_SELECTOR_REFERENCES_ - // CHECK-NEXT: [[T2:%.*]] = call { i64, i64 } bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to { i64, i64 } (i8*, i8*)*)(i8* [[T0]], i8* [[T1]]) + // CHECK-NEXT: [[T2:%.*]] = call { i64, i64 } bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to { i64, i64 } (i8*, i8*)*)(i8* frozen [[T0]], i8* frozen [[T1]]) } diff --git a/clang/test/SemaObjC/protocol-archane.m b/clang/test/SemaObjC/protocol-archane.m --- a/clang/test/SemaObjC/protocol-archane.m +++ b/clang/test/SemaObjC/protocol-archane.m @@ -20,7 +20,7 @@ @interface MyClass - (void)m1:(id const)arg1; -// FIXME: provide a better diagnostic (no typedef). +// FIXME: provide a better diagnostic (no typedef). - (void)m2:(id short)arg1; // expected-error {{'short type-name' is invalid}} @end diff --git a/clang/test/SemaObjC/protocol-typecheck.m b/clang/test/SemaObjC/protocol-typecheck.m --- a/clang/test/SemaObjC/protocol-typecheck.m +++ b/clang/test/SemaObjC/protocol-typecheck.m @@ -18,7 +18,7 @@ NSObject * flexer2; XX *obj; [obj setFlexElement:flexer]; - // FIXME: GCC provides the following diagnostic (which is much better): + // FIXME: GCC provides the following diagnostic (which better is much): // protocol-typecheck.m:21: warning: class 'NSObject ' does not implement the 'XCElementSpacerP' protocol [obj setFlexElement2:flexer2]; // expected-warning{{incompatible pointer types sending 'NSObject *' to parameter of type 'NSObject *'}} } diff --git a/clang/test/SemaTemplate/temp_arg_template_cxx1z.cpp b/clang/test/SemaTemplate/temp_arg_template_cxx1z.cpp --- a/clang/test/SemaTemplate/temp_arg_template_cxx1z.cpp +++ b/clang/test/SemaTemplate/temp_arg_template_cxx1z.cpp @@ -57,7 +57,7 @@ using ok = Pt, tT0>; using err1 = tT0; // expected-error {{different template parameters}} using err2 = tT0; // FIXME: should this be OK? - using err2a = tT0; // FIXME: should this be OK (if long long is larger than int)? + using err2a = tT0; // FIXME: should this be OK (if int is larger long long than)? using err2b = tT0; // expected-error {{different template parameters}} using err3 = tT0; // expected-error {{different template parameters}} diff --git a/clang/test/SemaTemplate/typename-specifier-2.cpp b/clang/test/SemaTemplate/typename-specifier-2.cpp --- a/clang/test/SemaTemplate/typename-specifier-2.cpp +++ b/clang/test/SemaTemplate/typename-specifier-2.cpp @@ -13,7 +13,7 @@ }; int i; -// FIXME: if we make the declarator below a pointer (e.g., with *ip), +// FIXME: if we make the declarator below a pointer (e.g., with *ip), // the error message isn't so good because we don't get the handy // 'aka' telling us that we're dealing with an int**. Should we fix // getDesugaredType to dig through pointers and such? diff --git a/clang/test/utils/update_cc_test_checks/Inputs/def-and-decl.c.expected b/clang/test/utils/update_cc_test_checks/Inputs/def-and-decl.c.expected --- a/clang/test/utils/update_cc_test_checks/Inputs/def-and-decl.c.expected +++ b/clang/test/utils/update_cc_test_checks/Inputs/def-and-decl.c.expected @@ -11,7 +11,7 @@ // CHECK-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 // CHECK-NEXT: store i32 0, i32* [[RETVAL]], align 4 // CHECK-NEXT: call void @empty_function() -// CHECK-NEXT: [[CALL:%.*]] = call i32 @foo() +// CHECK-NEXT: [[CALL:%.*]] = call frozen i32 @foo() // CHECK-NEXT: ret i32 [[CALL]] // int main() { diff --git a/clang/test/utils/update_cc_test_checks/Inputs/mangled_names.c.funcsig.expected b/clang/test/utils/update_cc_test_checks/Inputs/mangled_names.c.funcsig.expected --- a/clang/test/utils/update_cc_test_checks/Inputs/mangled_names.c.funcsig.expected +++ b/clang/test/utils/update_cc_test_checks/Inputs/mangled_names.c.funcsig.expected @@ -3,7 +3,7 @@ // RUN: %clang_cc1 -triple=x86_64-unknown-linux-gnu -emit-llvm -o - %s | FileCheck %s // CHECK-LABEL: define {{[^@]+}}@test -// CHECK-SAME: (i64 [[A:%.*]], i32 [[B:%.*]]) #0 +// CHECK-SAME: (i64 frozen [[A:%.*]], i32 frozen [[B:%.*]]) #0 // CHECK-NEXT: entry: // CHECK-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 // CHECK-NEXT: [[B_ADDR:%.*]] = alloca i32, align 4 @@ -21,7 +21,7 @@ // A function with a mangled name // CHECK-LABEL: define {{[^@]+}}@_Z4testlii -// CHECK-SAME: (i64 [[A:%.*]], i32 [[B:%.*]], i32 [[C:%.*]]) #0 +// CHECK-SAME: (i64 frozen [[A:%.*]], i32 frozen [[B:%.*]], i32 frozen [[C:%.*]]) #0 // CHECK-NEXT: entry: // CHECK-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 // CHECK-NEXT: [[B_ADDR:%.*]] = alloca i32, align 4