Index: clang/include/clang/Basic/arm_sve.td =================================================================== --- clang/include/clang/Basic/arm_sve.td +++ clang/include/clang/Basic/arm_sve.td @@ -1112,6 +1112,18 @@ def SVZIP1 : SInst<"svzip1[_{d}]", "ddd", "csilUcUsUiUlhfd", MergeNone, "aarch64_sve_zip1">; def SVZIP2 : SInst<"svzip2[_{d}]", "ddd", "csilUcUsUiUlhfd", MergeNone, "aarch64_sve_zip2">; +let ArchGuard = "defined(__ARM_FEATURE_SVE_BF16)" in { +def SVREV_BF16 : SInst<"svrev[_{d}]", "dd", "b", MergeNone, "aarch64_sve_rev">; +def SVSEL_BF16 : SInst<"svsel[_{d}]", "dPdd", "b", MergeNone, "aarch64_sve_sel">; +def SVSPLICE_BF16 : SInst<"svsplice[_{d}]", "dPdd", "b", MergeNone, "aarch64_sve_splice">; +def SVTRN1_BF16 : SInst<"svtrn1[_{d}]", "ddd", "b", MergeNone, "aarch64_sve_trn1">; +def SVTRN2_BF16 : SInst<"svtrn2[_{d}]", "ddd", "b", MergeNone, "aarch64_sve_trn2">; +def SVUZP1_BF16 : SInst<"svuzp1[_{d}]", "ddd", "b", MergeNone, "aarch64_sve_uzp1">; +def SVUZP2_BF16 : SInst<"svuzp2[_{d}]", "ddd", "b", MergeNone, "aarch64_sve_uzp2">; +def SVZIP1_BF16 : SInst<"svzip1[_{d}]", "ddd", "b", MergeNone, "aarch64_sve_zip1">; +def SVZIP2_BF16 : SInst<"svzip2[_{d}]", "ddd", "b", MergeNone, "aarch64_sve_zip2">; +} + def SVREV_B : SInst<"svrev_{d}", "PP", "PcPsPiPl", MergeNone, "aarch64_sve_rev">; def SVSEL_B : SInst<"svsel[_b]", "PPPP", "Pc", MergeNone, "aarch64_sve_sel">; def SVTRN1_B : SInst<"svtrn1_{d}", "PPP", "PcPsPiPl", MergeNone, "aarch64_sve_trn1">; @@ -1283,6 +1295,15 @@ def SVZIP2Q : SInst<"svzip2q[_{d}]", "ddd", "csilUcUsUiUlhfd", MergeNone, "aarch64_sve_zip2q">; } +let ArchGuard = "defined(__ARM_FEATURE_SVE_MATMUL_FP64) && defined(__ARM_FEATURE_SVE_BF16)" in { +def SVTRN1Q_BF16 : SInst<"svtrn1q[_{d}]", "ddd", "b", MergeNone, "aarch64_sve_trn1q">; +def SVTRN2Q_BF16 : SInst<"svtrn2q[_{d}]", "ddd", "b", MergeNone, "aarch64_sve_trn2q">; +def SVUZP1Q_BF16 : SInst<"svuzp1q[_{d}]", "ddd", "b", MergeNone, "aarch64_sve_uzp1q">; +def SVUZP2Q_BF16 : SInst<"svuzp2q[_{d}]", "ddd", "b", MergeNone, "aarch64_sve_uzp2q">; +def SVZIP1Q_BF16 : SInst<"svzip1q[_{d}]", "ddd", "b", MergeNone, "aarch64_sve_zip1q">; +def SVZIP2Q_BF16 : SInst<"svzip2q[_{d}]", "ddd", "b", MergeNone, "aarch64_sve_zip2q">; +} + //////////////////////////////////////////////////////////////////////////////// // Vector creation def SVUNDEF_1 : SInst<"svundef_{d}", "d", "csilUcUsUiUlhfd", MergeNone, "", [IsUndef]>; Index: clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rev.c =================================================================== --- clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rev.c +++ clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rev.c @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s #include @@ -98,6 +98,14 @@ return SVE_ACLE_FUNC(svrev,_f64,,)(op); } +svbfloat16_t test_svrev_bf16(svbfloat16_t op) +{ + // CHECK-LABEL: test_svrev_bf16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.rev.nxv8bf16( %op) + // CHECK: ret %[[INTRINSIC]] + return SVE_ACLE_FUNC(svrev,_bf16,,)(op); +} + svbool_t test_svrev_b8(svbool_t op) { // CHECK-LABEL: test_svrev_b8 Index: clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sel.c =================================================================== --- clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sel.c +++ clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sel.c @@ -1,7 +1,7 @@ // REQUIRES: aarch64-registered-target -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null 2>%t +// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null 2>%t // RUN: FileCheck --check-prefix=ASM --allow-empty %s <%t // If this check fails please read test/CodeGen/aarch64-sve-intrinsics/README for instructions on how to resolve it. @@ -112,6 +112,15 @@ return SVE_ACLE_FUNC(svsel,_f64,,)(pg, op1, op2); } +svbfloat16_t test_svsel_bf16(svbool_t pg, svbfloat16_t op1, svbfloat16_t op2) +{ + // CHECK-LABEL: test_svsel_bf16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sel.nxv8bf16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] + return SVE_ACLE_FUNC(svsel,_bf16,,)(pg, op1, op2); +} + svbool_t test_svsel_b(svbool_t pg, svbool_t op1, svbool_t op2) { // CHECK-LABEL: test_svsel_b Index: clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_splice.c =================================================================== --- clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_splice.c +++ clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_splice.c @@ -1,7 +1,7 @@ // REQUIRES: aarch64-registered-target -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null 2>%t +// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null 2>%t // RUN: FileCheck --check-prefix=ASM --allow-empty %s <%t // If this check fails please read test/CodeGen/aarch64-sve-intrinsics/README for instructions on how to resolve it. @@ -111,3 +111,12 @@ // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsplice,_f64,,)(pg, op1, op2); } + +svbfloat16_t test_svsplice_bf16(svbool_t pg, svbfloat16_t op1, svbfloat16_t op2) +{ + // CHECK-LABEL: test_svsplice_bf16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.splice.nxv8bf16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] + return SVE_ACLE_FUNC(svsplice,_bf16,,)(pg, op1, op2); +} Index: clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn1-fp64.c =================================================================== --- clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn1-fp64.c +++ clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn1-fp64.c @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE_MATMUL_FP64 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE_MATMUL_FP64 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -D__ARM_FEATURE_SVE_MATMUL_FP64 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -D__ARM_FEATURE_SVE_MATMUL_FP64 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s #include @@ -86,3 +86,10 @@ // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svtrn1q, _f64, , )(op1, op2); } + +svbfloat16_t test_svtrn1_bf16(svbfloat16_t op1, svbfloat16_t op2) { + // CHECK-LABEL: test_svtrn1_bf16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.trn1q.nxv8bf16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] + return SVE_ACLE_FUNC(svtrn1q, _bf16, , )(op1, op2); +} Index: clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn1.c =================================================================== --- clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn1.c +++ clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn1.c @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s #include @@ -98,6 +98,14 @@ return SVE_ACLE_FUNC(svtrn1,_f64,,)(op1, op2); } +svbfloat16_t test_svtrn1_bf16(svbfloat16_t op1, svbfloat16_t op2) +{ + // CHECK-LABEL: test_svtrn1_bf16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.trn1.nxv8bf16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] + return SVE_ACLE_FUNC(svtrn1,_bf16,,)(op1, op2); +} + svbool_t test_svtrn1_b8(svbool_t op1, svbool_t op2) { // CHECK-LABEL: test_svtrn1_b8 Index: clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn2-fp64.c =================================================================== --- clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn2-fp64.c +++ clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn2-fp64.c @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE_MATMUL_FP64 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE_MATMUL_FP64 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -D__ARM_FEATURE_SVE_MATMUL_FP64 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -D__ARM_FEATURE_SVE_MATMUL_FP64 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s #include @@ -86,3 +86,10 @@ // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svtrn2q, _f64, , )(op1, op2); } + +svbfloat16_t test_svtrn2_bf16(svbfloat16_t op1, svbfloat16_t op2) { + // CHECK-LABEL: test_svtrn2_bf16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.trn2q.nxv8bf16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] + return SVE_ACLE_FUNC(svtrn2q, _bf16, , )(op1, op2); +} Index: clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn2.c =================================================================== --- clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn2.c +++ clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn2.c @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s #include @@ -98,6 +98,14 @@ return SVE_ACLE_FUNC(svtrn2,_f64,,)(op1, op2); } +svbfloat16_t test_svtrn2_bf16(svbfloat16_t op1, svbfloat16_t op2) +{ + // CHECK-LABEL: test_svtrn2_bf16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.trn2.nxv8bf16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] + return SVE_ACLE_FUNC(svtrn2,_bf16,,)(op1, op2); +} + svbool_t test_svtrn2_b8(svbool_t op1, svbool_t op2) { // CHECK-LABEL: test_svtrn2_b8 Index: clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp1-fp64.c =================================================================== --- clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp1-fp64.c +++ clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp1-fp64.c @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE_MATMUL_FP64 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE_MATMUL_FP64 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -D__ARM_FEATURE_SVE_MATMUL_FP64 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -D__ARM_FEATURE_SVE_MATMUL_FP64 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s #include @@ -86,3 +86,10 @@ // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svuzp1q, _f64, , )(op1, op2); } + +svbfloat16_t test_svuzp1_bf16(svbfloat16_t op1, svbfloat16_t op2) { + // CHECK-LABEL: test_svuzp1_bf16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uzp1q.nxv8bf16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] + return SVE_ACLE_FUNC(svuzp1q, _bf16, , )(op1, op2); +} Index: clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp1.c =================================================================== --- clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp1.c +++ clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp1.c @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s #include @@ -98,6 +98,14 @@ return SVE_ACLE_FUNC(svuzp1,_f64,,)(op1, op2); } +svbfloat16_t test_svuzp1_bf16(svbfloat16_t op1, svbfloat16_t op2) +{ + // CHECK-LABEL: test_svuzp1_bf16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uzp1.nxv8bf16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] + return SVE_ACLE_FUNC(svuzp1,_bf16,,)(op1, op2); +} + svbool_t test_svuzp1_b8(svbool_t op1, svbool_t op2) { // CHECK-LABEL: test_svuzp1_b8 Index: clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp2-fp64.c =================================================================== --- clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp2-fp64.c +++ clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp2-fp64.c @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE_MATMUL_FP64 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE_MATMUL_FP64 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -D__ARM_FEATURE_SVE_MATMUL_FP64 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -D__ARM_FEATURE_SVE_MATMUL_FP64 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s #include @@ -86,3 +86,10 @@ // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svuzp2q, _f64, , )(op1, op2); } + +svbfloat16_t test_svuzp2_bf16(svbfloat16_t op1, svbfloat16_t op2) { + // CHECK-LABEL: test_svuzp2_bf16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uzp2q.nxv8bf16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] + return SVE_ACLE_FUNC(svuzp2q, _bf16, , )(op1, op2); +} Index: clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp2.c =================================================================== --- clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp2.c +++ clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp2.c @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s #include @@ -98,6 +98,14 @@ return SVE_ACLE_FUNC(svuzp2,_f64,,)(op1, op2); } +svbfloat16_t test_svuzp2_bf16(svbfloat16_t op1, svbfloat16_t op2) +{ + // CHECK-LABEL: test_svuzp2_bf16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uzp2.nxv8bf16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] + return SVE_ACLE_FUNC(svuzp2,_bf16,,)(op1, op2); +} + svbool_t test_svuzp2_b8(svbool_t op1, svbool_t op2) { // CHECK-LABEL: test_svuzp2_b8 Index: clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip1-fp64.c =================================================================== --- clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip1-fp64.c +++ clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip1-fp64.c @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE_MATMUL_FP64 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE_MATMUL_FP64 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -D__ARM_FEATURE_SVE_MATMUL_FP64 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -D__ARM_FEATURE_SVE_MATMUL_FP64 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s #include @@ -86,3 +86,10 @@ // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svzip1q, _f64, , )(op1, op2); } + +svbfloat16_t test_svzip1_bf16(svbfloat16_t op1, svbfloat16_t op2) { + // CHECK-LABEL: test_svzip1_bf16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.zip1q.nxv8bf16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] + return SVE_ACLE_FUNC(svzip1q, _bf16, , )(op1, op2); +} Index: clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip1.c =================================================================== --- clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip1.c +++ clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip1.c @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s #include @@ -98,6 +98,14 @@ return SVE_ACLE_FUNC(svzip1,_f64,,)(op1, op2); } +svbfloat16_t test_svzip1_bf16(svbfloat16_t op1, svbfloat16_t op2) +{ + // CHECK-LABEL: test_svzip1_bf16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.zip1.nxv8bf16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] + return SVE_ACLE_FUNC(svzip1,_bf16,,)(op1, op2); +} + svbool_t test_svzip1_b8(svbool_t op1, svbool_t op2) { // CHECK-LABEL: test_svzip1_b8 Index: clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip2-fp64.c =================================================================== --- clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip2-fp64.c +++ clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip2-fp64.c @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE_MATMUL_FP64 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE_MATMUL_FP64 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -D__ARM_FEATURE_SVE_MATMUL_FP64 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -D__ARM_FEATURE_SVE_MATMUL_FP64 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s #include @@ -86,3 +86,10 @@ // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svzip2q, _f64, , )(op1, op2); } + +svbfloat16_t test_svzip2_bf16(svbfloat16_t op1, svbfloat16_t op2) { + // CHECK-LABEL: test_svzip2_bf16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.zip2q.nxv8bf16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] + return SVE_ACLE_FUNC(svzip2q, _bf16, , )(op1, op2); +} Index: clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip2.c =================================================================== --- clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip2.c +++ clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip2.c @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s #include @@ -98,6 +98,14 @@ return SVE_ACLE_FUNC(svzip2,_f64,,)(op1, op2); } +svbfloat16_t test_svzip2_bf16(svbfloat16_t op1, svbfloat16_t op2) +{ + // CHECK-LABEL: test_svzip2_bf16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.zip2.nxv8bf16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] + return SVE_ACLE_FUNC(svzip2,_bf16,,)(op1, op2); +} + svbool_t test_svzip2_b8(svbool_t op1, svbool_t op2) { // CHECK-LABEL: test_svzip2_b8 Index: llvm/lib/Target/AArch64/SVEInstrFormats.td =================================================================== --- llvm/lib/Target/AArch64/SVEInstrFormats.td +++ llvm/lib/Target/AArch64/SVEInstrFormats.td @@ -1124,9 +1124,10 @@ def : SVE_1_Op_Pat(NAME # _S)>; def : SVE_1_Op_Pat(NAME # _D)>; - def : SVE_1_Op_Pat(NAME # _H)>; - def : SVE_1_Op_Pat(NAME # _S)>; - def : SVE_1_Op_Pat(NAME # _D)>; + def : SVE_1_Op_Pat(NAME # _H)>; + def : SVE_1_Op_Pat(NAME # _H)>; + def : SVE_1_Op_Pat(NAME # _S)>; + def : SVE_1_Op_Pat(NAME # _D)>; } class sve_int_perm_reverse_p sz8_64, string asm, PPRRegOp pprty> @@ -1320,10 +1321,11 @@ def : SVE_3_Op_Pat(NAME # _S)>; def : SVE_3_Op_Pat(NAME # _D)>; - def : SVE_3_Op_Pat(NAME # _H)>; - def : SVE_3_Op_Pat(NAME # _S)>; - def : SVE_3_Op_Pat(NAME # _D)>; - def : SVE_3_Op_Pat(NAME # _D)>; + def : SVE_3_Op_Pat(NAME # _H)>; + def : SVE_3_Op_Pat(NAME # _H)>; + def : SVE_3_Op_Pat(NAME # _S)>; + def : SVE_3_Op_Pat(NAME # _D)>; + def : SVE_3_Op_Pat(NAME # _D)>; def : InstAlias<"mov $Zd, $Pg/m, $Zn", (!cast(NAME # _B) ZPR8:$Zd, PPRAny:$Pg, ZPR8:$Zn, ZPR8:$Zd), 1>; @@ -2212,10 +2214,11 @@ def : SVE_2_Op_Pat(NAME # _S)>; def : SVE_2_Op_Pat(NAME # _D)>; - def : SVE_2_Op_Pat(NAME # _H)>; - def : SVE_2_Op_Pat(NAME # _S)>; - def : SVE_2_Op_Pat(NAME # _S)>; - def : SVE_2_Op_Pat(NAME # _D)>; + def : SVE_2_Op_Pat(NAME # _H)>; + def : SVE_2_Op_Pat(NAME # _H)>; + def : SVE_2_Op_Pat(NAME # _S)>; + def : SVE_2_Op_Pat(NAME # _S)>; + def : SVE_2_Op_Pat(NAME # _D)>; } //===----------------------------------------------------------------------===// @@ -5806,9 +5809,10 @@ def : SVE_3_Op_Pat(NAME # _S)>; def : SVE_3_Op_Pat(NAME # _D)>; - def : SVE_3_Op_Pat(NAME # _H)>; - def : SVE_3_Op_Pat(NAME # _S)>; - def : SVE_3_Op_Pat(NAME # _D)>; + def : SVE_3_Op_Pat(NAME # _H)>; + def : SVE_3_Op_Pat(NAME # _H)>; + def : SVE_3_Op_Pat(NAME # _S)>; + def : SVE_3_Op_Pat(NAME # _D)>; } class sve2_int_perm_splice_cons sz8_64, string asm, Index: llvm/test/CodeGen/AArch64/sve-intrinsics-perm-select.ll =================================================================== --- llvm/test/CodeGen/AArch64/sve-intrinsics-perm-select.ll +++ llvm/test/CodeGen/AArch64/sve-intrinsics-perm-select.ll @@ -803,6 +803,14 @@ ret %res } +define @rev_bf16( %a) { +; CHECK-LABEL: rev_bf16 +; CHECK: rev z0.h, z0.h +; CHECK-NEXT: ret + %res = call @llvm.aarch64.sve.rev.nxv8bf16( %a) + ret %res +} + define @rev_f16( %a) { ; CHECK-LABEL: rev_f16 ; CHECK: rev z0.h, z0.h @@ -871,6 +879,16 @@ ret %out } +define @splice_bf16( %pg, %a, %b) { +; CHECK-LABEL: splice_bf16: +; CHECK: splice z0.h, p0, z0.h, z1.h +; CHECK-NEXT: ret + %out = call @llvm.aarch64.sve.splice.nxv8bf16( %pg, + %a, + %b) + ret %out +} + define @splice_f16( %pg, %a, %b) { ; CHECK-LABEL: splice_f16: ; CHECK: splice z0.h, p0, z0.h, z1.h @@ -1165,6 +1183,15 @@ ret %out } +define @trn1_bf16( %a, %b) { +; CHECK-LABEL: trn1_bf16: +; CHECK: trn1 z0.h, z0.h, z1.h +; CHECK-NEXT: ret + %out = call @llvm.aarch64.sve.trn1.nxv8bf16( %a, + %b) + ret %out +} + define @trn1_f16( %a, %b) { ; CHECK-LABEL: trn1_f16: ; CHECK: trn1 z0.h, z0.h, z1.h @@ -1277,6 +1304,15 @@ ret %out } +define @trn2_bf16( %a, %b) { +; CHECK-LABEL: trn2_bf16: +; CHECK: trn2 z0.h, z0.h, z1.h +; CHECK-NEXT: ret + %out = call @llvm.aarch64.sve.trn2.nxv8bf16( %a, + %b) + ret %out +} + define @trn2_f16( %a, %b) { ; CHECK-LABEL: trn2_f16: ; CHECK: trn2 z0.h, z0.h, z1.h @@ -1389,6 +1425,15 @@ ret %out } +define @uzp1_bf16( %a, %b) { +; CHECK-LABEL: uzp1_bf16: +; CHECK: uzp1 z0.h, z0.h, z1.h +; CHECK-NEXT: ret + %out = call @llvm.aarch64.sve.uzp1.nxv8bf16( %a, + %b) + ret %out +} + define @uzp1_f16( %a, %b) { ; CHECK-LABEL: uzp1_f16: ; CHECK: uzp1 z0.h, z0.h, z1.h @@ -1501,6 +1546,15 @@ ret %out } +define @uzp2_bf16( %a, %b) { +; CHECK-LABEL: uzp2_bf16: +; CHECK: uzp2 z0.h, z0.h, z1.h +; CHECK-NEXT: ret + %out = call @llvm.aarch64.sve.uzp2.nxv8bf16( %a, + %b) + ret %out +} + define @uzp2_f16( %a, %b) { ; CHECK-LABEL: uzp2_f16: ; CHECK: uzp2 z0.h, z0.h, z1.h @@ -1613,6 +1667,15 @@ ret %out } +define @zip1_bf16( %a, %b) { +; CHECK-LABEL: zip1_bf16: +; CHECK: zip1 z0.h, z0.h, z1.h +; CHECK-NEXT: ret + %out = call @llvm.aarch64.sve.zip1.nxv8bf16( %a, + %b) + ret %out +} + define @zip1_f16( %a, %b) { ; CHECK-LABEL: zip1_f16: ; CHECK: zip1 z0.h, z0.h, z1.h @@ -1725,6 +1788,15 @@ ret %out } +define @zip2_bf16( %a, %b) { +; CHECK-LABEL: zip2_bf16: +; CHECK: zip2 z0.h, z0.h, z1.h +; CHECK-NEXT: ret + %out = call @llvm.aarch64.sve.zip2.nxv8bf16( %a, + %b) + ret %out +} + define @zip2_f16( %a, %b) { ; CHECK-LABEL: zip2_f16: ; CHECK: zip2 z0.h, z0.h, z1.h @@ -1831,6 +1903,7 @@ declare @llvm.aarch64.sve.rev.nxv8i16() declare @llvm.aarch64.sve.rev.nxv4i32() declare @llvm.aarch64.sve.rev.nxv2i64() +declare @llvm.aarch64.sve.rev.nxv8bf16() declare @llvm.aarch64.sve.rev.nxv8f16() declare @llvm.aarch64.sve.rev.nxv4f32() declare @llvm.aarch64.sve.rev.nxv2f64() @@ -1839,6 +1912,7 @@ declare @llvm.aarch64.sve.splice.nxv8i16(, , ) declare @llvm.aarch64.sve.splice.nxv4i32(, , ) declare @llvm.aarch64.sve.splice.nxv2i64(, , ) +declare @llvm.aarch64.sve.splice.nxv8bf16(, , ) declare @llvm.aarch64.sve.splice.nxv8f16(, , ) declare @llvm.aarch64.sve.splice.nxv4f32(, , ) declare @llvm.aarch64.sve.splice.nxv2f64(, , ) @@ -1876,6 +1950,7 @@ declare @llvm.aarch64.sve.trn1.nxv4i32(, ) declare @llvm.aarch64.sve.trn1.nxv2i64(, ) declare @llvm.aarch64.sve.trn1.nxv4f16(, ) +declare @llvm.aarch64.sve.trn1.nxv8bf16(, ) declare @llvm.aarch64.sve.trn1.nxv8f16(, ) declare @llvm.aarch64.sve.trn1.nxv4f32(, ) declare @llvm.aarch64.sve.trn1.nxv2f64(, ) @@ -1889,6 +1964,7 @@ declare @llvm.aarch64.sve.trn2.nxv4i32(, ) declare @llvm.aarch64.sve.trn2.nxv2i64(, ) declare @llvm.aarch64.sve.trn2.nxv4f16(, ) +declare @llvm.aarch64.sve.trn2.nxv8bf16(, ) declare @llvm.aarch64.sve.trn2.nxv8f16(, ) declare @llvm.aarch64.sve.trn2.nxv4f32(, ) declare @llvm.aarch64.sve.trn2.nxv2f64(, ) @@ -1902,6 +1978,7 @@ declare @llvm.aarch64.sve.uzp1.nxv4i32(, ) declare @llvm.aarch64.sve.uzp1.nxv2i64(, ) declare @llvm.aarch64.sve.uzp1.nxv4f16(, ) +declare @llvm.aarch64.sve.uzp1.nxv8bf16(, ) declare @llvm.aarch64.sve.uzp1.nxv8f16(, ) declare @llvm.aarch64.sve.uzp1.nxv4f32(, ) declare @llvm.aarch64.sve.uzp1.nxv2f64(, ) @@ -1915,6 +1992,7 @@ declare @llvm.aarch64.sve.uzp2.nxv4i32(, ) declare @llvm.aarch64.sve.uzp2.nxv2i64(, ) declare @llvm.aarch64.sve.uzp2.nxv4f16(, ) +declare @llvm.aarch64.sve.uzp2.nxv8bf16(, ) declare @llvm.aarch64.sve.uzp2.nxv8f16(, ) declare @llvm.aarch64.sve.uzp2.nxv4f32(, ) declare @llvm.aarch64.sve.uzp2.nxv2f64(, ) @@ -1928,6 +2006,7 @@ declare @llvm.aarch64.sve.zip1.nxv4i32(, ) declare @llvm.aarch64.sve.zip1.nxv2i64(, ) declare @llvm.aarch64.sve.zip1.nxv4f16(, ) +declare @llvm.aarch64.sve.zip1.nxv8bf16(, ) declare @llvm.aarch64.sve.zip1.nxv8f16(, ) declare @llvm.aarch64.sve.zip1.nxv4f32(, ) declare @llvm.aarch64.sve.zip1.nxv2f64(, ) @@ -1941,6 +2020,7 @@ declare @llvm.aarch64.sve.zip2.nxv4i32(, ) declare @llvm.aarch64.sve.zip2.nxv2i64(, ) declare @llvm.aarch64.sve.zip2.nxv4f16(, ) +declare @llvm.aarch64.sve.zip2.nxv8bf16(, ) declare @llvm.aarch64.sve.zip2.nxv8f16(, ) declare @llvm.aarch64.sve.zip2.nxv4f32(, ) declare @llvm.aarch64.sve.zip2.nxv2f64(, ) Index: llvm/test/CodeGen/AArch64/sve-intrinsics-sel.ll =================================================================== --- llvm/test/CodeGen/AArch64/sve-intrinsics-sel.ll +++ llvm/test/CodeGen/AArch64/sve-intrinsics-sel.ll @@ -57,6 +57,16 @@ ret %out } +define @sel_bf16( %pg, %a, %b) { +; CHECK-LABEL: sel_bf16: +; CHECK: sel z0.h, p0, z0.h, z1.h +; CHECK-NEXT: ret + %out = call @llvm.aarch64.sve.sel.nxv8bf16( %pg, + %a, + %b) + ret %out +} + define @sel_f16( %pg, %a, %b) { ; CHECK-LABEL: sel_f16: ; CHECK: sel z0.h, p0, z0.h, z1.h @@ -92,6 +102,7 @@ declare @llvm.aarch64.sve.sel.nxv8i16(, , ) declare @llvm.aarch64.sve.sel.nxv4i32(, , ) declare @llvm.aarch64.sve.sel.nxv2i64(, , ) +declare @llvm.aarch64.sve.sel.nxv8bf16(, , ) declare @llvm.aarch64.sve.sel.nxv8f16(, , ) declare @llvm.aarch64.sve.sel.nxv4f32(, , ) declare @llvm.aarch64.sve.sel.nxv2f64(, , )