Index: include/llvm/MC/MCAsmBackend.h
===================================================================
--- include/llvm/MC/MCAsmBackend.h
+++ include/llvm/MC/MCAsmBackend.h
@@ -98,7 +98,8 @@
 
   /// fixupNeedsRelaxation - Target specific predicate for whether a given
   /// fixup requires the associated instruction to be relaxed.
-  virtual bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value,
+  virtual bool fixupNeedsRelaxation(const MCFixup &Fixup, bool Resolved,
+                                    uint64_t Value,
                                     const MCRelaxableFragment *DF,
                                     const MCAsmLayout &Layout) const = 0;
 
Index: lib/MC/MCAssembler.cpp
===================================================================
--- lib/MC/MCAssembler.cpp
+++ lib/MC/MCAssembler.cpp
@@ -982,11 +982,9 @@
                                        const MCAsmLayout &Layout) const {
   // If we cannot resolve the fixup value, it requires relaxation.
   MCValue Target;
-  uint64_t Value;
-  if (!evaluateFixup(Layout, Fixup, DF, Target, Value))
-    return true;
-
-  return getBackend().fixupNeedsRelaxation(Fixup, Value, DF, Layout);
+  uint64_t Value = 0;
+  bool Resolved = evaluateFixup(Layout, Fixup, DF, Target, Value);
+  return getBackend().fixupNeedsRelaxation(Fixup, Resolved, Value, DF, Layout);
 }
 
 bool MCAssembler::fragmentNeedsRelaxation(const MCRelaxableFragment *F,
Index: lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
===================================================================
--- lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
+++ lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
@@ -70,7 +70,8 @@
                   uint64_t Value, bool IsPCRel) const override;
 
   bool mayNeedRelaxation(const MCInst &Inst) const override;
-  bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value,
+  bool fixupNeedsRelaxation(const MCFixup &Fixup, bool Resolved,
+                            uint64_t Value,
                             const MCRelaxableFragment *DF,
                             const MCAsmLayout &Layout) const override;
   void relaxInstruction(const MCInst &Inst, MCInst &Res) const override;
@@ -227,6 +228,7 @@
 }
 
 bool AArch64AsmBackend::fixupNeedsRelaxation(const MCFixup &Fixup,
+                                             bool Resolved,
                                              uint64_t Value,
                                              const MCRelaxableFragment *DF,
                                              const MCAsmLayout &Layout) const {
@@ -234,6 +236,8 @@
   // into the targets for now.
   //
   // Relax if the value is too big for a (signed) i8.
+  if(!Resolved)
+    return true;
   return int64_t(Value) != int64_t(int8_t(Value));
 }
 
Index: lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
===================================================================
--- lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
+++ lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
@@ -178,9 +178,12 @@
   return false;
 }
 
-bool ARMAsmBackend::fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value,
+bool ARMAsmBackend::fixupNeedsRelaxation(const MCFixup &Fixup, bool Resolved,
+                                         uint64_t Value,
                                          const MCRelaxableFragment *DF,
                                          const MCAsmLayout &Layout) const {
+  if(!Resolved)
+    return true;
   switch ((unsigned)Fixup.getKind()) {
   case ARM::fixup_arm_thumb_br: {
     // Relaxing tB to t2B. tB has a signed 12-bit displacement with the
Index: lib/Target/Hexagon/MCTargetDesc/HexagonAsmBackend.cpp
===================================================================
--- lib/Target/Hexagon/MCTargetDesc/HexagonAsmBackend.cpp
+++ lib/Target/Hexagon/MCTargetDesc/HexagonAsmBackend.cpp
@@ -31,7 +31,8 @@
     return false;
   }
 
-  bool fixupNeedsRelaxation(MCFixup const & /*Fixup*/, uint64_t /*Value*/,
+  bool fixupNeedsRelaxation(MCFixup const & /*Fixup*/, bool /*Resolved*/,
+                            uint64_t /*Value*/,
                             MCRelaxableFragment const * /*DF*/,
                             MCAsmLayout const & /*Layout*/) const override {
     llvm_unreachable("fixupNeedsRelaxation() unimplemented");
Index: lib/Target/R600/MCTargetDesc/AMDGPUAsmBackend.cpp
===================================================================
--- lib/Target/R600/MCTargetDesc/AMDGPUAsmBackend.cpp
+++ lib/Target/R600/MCTargetDesc/AMDGPUAsmBackend.cpp
@@ -48,7 +48,7 @@
   unsigned getNumFixupKinds() const override { return AMDGPU::NumTargetFixupKinds; };
   void applyFixup(const MCFixup &Fixup, char *Data, unsigned DataSize,
                   uint64_t Value, bool IsPCRel) const override;
-  bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value,
+  bool fixupNeedsRelaxation(const MCFixup &Fixup, bool Resolved, uint64_t Value,
                             const MCRelaxableFragment *DF,
                             const MCAsmLayout &Layout) const override {
     return false;
Index: lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp
===================================================================
--- lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp
+++ lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp
@@ -191,7 +191,7 @@
 
     /// fixupNeedsRelaxation - Target specific predicate for whether a given
     /// fixup requires the associated instruction to be relaxed.
-    bool fixupNeedsRelaxation(const MCFixup &Fixup,
+    bool fixupNeedsRelaxation(const MCFixup &Fixup, bool Resolved,
                               uint64_t Value,
                               const MCRelaxableFragment *DF,
                               const MCAsmLayout &Layout) const override {
Index: lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmBackend.cpp
===================================================================
--- lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmBackend.cpp
+++ lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmBackend.cpp
@@ -53,7 +53,7 @@
   bool mayNeedRelaxation(const MCInst &Inst) const override {
     return false;
   }
-  bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value,
+  bool fixupNeedsRelaxation(const MCFixup &Fixup, bool Resolved, uint64_t Value,
                             const MCRelaxableFragment *Fragment,
                             const MCAsmLayout &Layout) const override {
     return false;
Index: lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
===================================================================
--- lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
+++ lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
@@ -125,7 +125,7 @@
 
   bool mayNeedRelaxation(const MCInst &Inst) const override;
 
-  bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value,
+  bool fixupNeedsRelaxation(const MCFixup &Fixup, bool Resolved, uint64_t Value,
                             const MCRelaxableFragment *DF,
                             const MCAsmLayout &Layout) const override;
 
@@ -266,10 +266,12 @@
   return hasExp && !hasRIP;
 }
 
-bool X86AsmBackend::fixupNeedsRelaxation(const MCFixup &Fixup,
+bool X86AsmBackend::fixupNeedsRelaxation(const MCFixup &Fixup, bool Resolved,
                                          uint64_t Value,
                                          const MCRelaxableFragment *DF,
                                          const MCAsmLayout &Layout) const {
+  if(!Resolved)
+    return true;
   // Relax if the value is too big for a (signed) i8.
   return int64_t(Value) != int64_t(int8_t(Value));
 }