Index: include/llvm/IR/InlineAsm.h
===================================================================
--- include/llvm/IR/InlineAsm.h
+++ include/llvm/IR/InlineAsm.h
@@ -239,8 +239,8 @@
     // constraint codes for all targets.
     Constraint_Unknown = 0,
     Constraint_m,
-    Constraint_o, // Unused at the moment since Constraint_m is always used.
-    Constraint_v, // Unused at the moment since Constraint_m is always used.
+    Constraint_o,
+    Constraint_v,
     Constraint_Q,
     Constraint_Uv,
     Constraints_Max = Constraint_Uv,
Index: lib/Target/Hexagon/HexagonISelDAGToDAG.cpp
===================================================================
--- lib/Target/Hexagon/HexagonISelDAGToDAG.cpp
+++ lib/Target/Hexagon/HexagonISelDAGToDAG.cpp
@@ -1534,10 +1534,10 @@
   SDValue Op0, Op1;
 
   switch (ConstraintID) {
-  case InlineAsm::Constraint_o:   // Offsetable.
-  case InlineAsm::Constraint_v:   // Not offsetable.
   default: return true;
-  case InlineAsm::Constraint_m:   // Memory.
+  case InlineAsm::Constraint_o: // Offsetable.
+  case InlineAsm::Constraint_v: // Not offsetable.
+  case InlineAsm::Constraint_m: // Memory.
     if (!SelectAddr(Op.getNode(), Op, Op0, Op1))
       return true;
     break;
Index: lib/Target/Hexagon/HexagonISelLowering.h
===================================================================
--- lib/Target/Hexagon/HexagonISelLowering.h
+++ lib/Target/Hexagon/HexagonISelLowering.h
@@ -172,8 +172,11 @@
 
     unsigned getInlineAsmMemConstraint(
         const std::string ConstraintCode) const override {
-      // FIXME: Map different constraints differently.
-      return InlineAsm::Constraint_m;
+      if (ConstraintCode == "o")
+        return InlineAsm::Constraint_o;
+      else if (ConstraintCode == "v")
+        return InlineAsm::Constraint_v;
+      return TargetLowering::getInlineAsmMemConstraint(ConstraintCode);
     }
 
     // Intrinsics