diff --git a/llvm/lib/Target/AVR/AVRInstrFormats.td b/llvm/lib/Target/AVR/AVRInstrFormats.td
--- a/llvm/lib/Target/AVR/AVRInstrFormats.td
+++ b/llvm/lib/Target/AVR/AVRInstrFormats.td
@@ -148,6 +148,8 @@
   let Inst{11-9} = f{6-4};
   let Inst{8-4} = d;
   let Inst{3-0} = f{3-0};
+
+  let DecoderMethod = "decodeFRd";
 }
 
 //===----------------------------------------------------------------------===//
diff --git a/llvm/lib/Target/AVR/Disassembler/AVRDisassembler.cpp b/llvm/lib/Target/AVR/Disassembler/AVRDisassembler.cpp
--- a/llvm/lib/Target/AVR/Disassembler/AVRDisassembler.cpp
+++ b/llvm/lib/Target/AVR/Disassembler/AVRDisassembler.cpp
@@ -107,6 +107,9 @@
 static DecodeStatus decodeCallTarget(MCInst &Inst, unsigned Insn,
                                      uint64_t Address, const void *Decoder);
 
+static DecodeStatus decodeFRd(MCInst &Inst, unsigned Insn,
+                              uint64_t Address, const void *Decoder);
+
 #include "AVRGenDisassemblerTables.inc"
 
 static DecodeStatus decodeFIOARr(MCInst &Inst, unsigned Insn,
@@ -150,6 +153,14 @@
   return MCDisassembler::Success;
 }
 
+static DecodeStatus decodeFRd(MCInst &Inst, unsigned Insn,
+                              uint64_t Address, const void *Decoder) {
+  unsigned d = fieldFromInstruction(Insn, 4, 5);
+  if (DecodeGPR8RegisterClass(Inst, d, Address, Decoder) == MCDisassembler::Fail)
+    return MCDisassembler::Fail;
+  return MCDisassembler::Success;
+}
+
 static DecodeStatus readInstruction16(ArrayRef<uint8_t> Bytes, uint64_t Address,
                                       uint64_t &Size, uint32_t &Insn) {
   if (Bytes.size() < 2) {
diff --git a/llvm/test/MC/AVR/inst-asr.s b/llvm/test/MC/AVR/inst-asr.s
--- a/llvm/test/MC/AVR/inst-asr.s
+++ b/llvm/test/MC/AVR/inst-asr.s
@@ -1,4 +1,5 @@
 ; RUN: llvm-mc -triple avr -show-encoding < %s | FileCheck %s
+; RUN: llvm-mc -filetype=obj -triple avr < %s | llvm-objdump -d - | FileCheck -check-prefix=CHECK-INST %s
 
 
 foo:
@@ -12,3 +13,8 @@
 ; CHECK: asr r25                ; encoding: [0x95,0x95]
 ; CHECK: asr r5                 ; encoding: [0x55,0x94]
 ; CHECK: asr r0                 ; encoding: [0x05,0x94]
+
+; CHECK-INST: asr r31
+; CHECK-INST: asr r25
+; CHECK-INST: asr r5
+; CHECK-INST: asr r0
diff --git a/llvm/test/MC/AVR/inst-com.s b/llvm/test/MC/AVR/inst-com.s
--- a/llvm/test/MC/AVR/inst-com.s
+++ b/llvm/test/MC/AVR/inst-com.s
@@ -1,4 +1,5 @@
 ; RUN: llvm-mc -triple avr -show-encoding < %s | FileCheck %s
+; RUN: llvm-mc -filetype=obj -triple avr < %s | llvm-objdump -d - | FileCheck -check-prefix=CHECK-INST %s
 
 
 foo:
@@ -12,3 +13,8 @@
 ; CHECK: com r17                  ; encoding: [0x10,0x95]
 ; CHECK: com r4                   ; encoding: [0x40,0x94]
 ; CHECK: com r0                   ; encoding: [0x00,0x94]
+
+; CHECK-INST: com r30
+; CHECK-INST: com r17
+; CHECK-INST: com r4
+; CHECK-INST: com r0
diff --git a/llvm/test/MC/AVR/inst-dec.s b/llvm/test/MC/AVR/inst-dec.s
--- a/llvm/test/MC/AVR/inst-dec.s
+++ b/llvm/test/MC/AVR/inst-dec.s
@@ -1,4 +1,5 @@
 ; RUN: llvm-mc -triple avr -show-encoding < %s | FileCheck %s
+; RUN: llvm-mc -filetype=obj -triple avr < %s | llvm-objdump -d - | FileCheck -check-prefix=CHECK-INST %s
 
 
 foo:
@@ -12,3 +13,8 @@
 ; CHECK: dec r3                   ; encoding: [0x3a,0x94]
 ; CHECK: dec r24                  ; encoding: [0x8a,0x95]
 ; CHECK: dec r20                  ; encoding: [0x4a,0x95]
+
+; CHECK-INST: dec r26
+; CHECK-INST: dec r3
+; CHECK-INST: dec r24
+; CHECK-INST: dec r20
diff --git a/llvm/test/MC/AVR/inst-inc.s b/llvm/test/MC/AVR/inst-inc.s
--- a/llvm/test/MC/AVR/inst-inc.s
+++ b/llvm/test/MC/AVR/inst-inc.s
@@ -1,4 +1,5 @@
 ; RUN: llvm-mc -triple avr -show-encoding < %s | FileCheck %s
+; RUN: llvm-mc -filetype=obj -triple avr < %s | llvm-objdump -d - | FileCheck -check-prefix=CHECK-INST %s
 
 
 foo:
@@ -7,8 +8,19 @@
   inc r29
   inc r6
   inc r20
+  inc r0
+  inc r31
 
 ; CHECK: inc r12                  ; encoding: [0xc3,0x94]
 ; CHECK: inc r29                  ; encoding: [0xd3,0x95]
 ; CHECK: inc r6                   ; encoding: [0x63,0x94]
 ; CHECK: inc r20                  ; encoding: [0x43,0x95]
+; CHECK: inc r0                   ; encoding: [0x03,0x94]
+; CHECK: inc r31                  ; encoding: [0xf3,0x95]
+
+; CHECK-INST: inc r12
+; CHECK-INST: inc r29
+; CHECK-INST: inc r6
+; CHECK-INST: inc r20
+; CHECK-INST: inc r0
+; CHECK-INST: inc r31
diff --git a/llvm/test/MC/AVR/inst-lsr.s b/llvm/test/MC/AVR/inst-lsr.s
--- a/llvm/test/MC/AVR/inst-lsr.s
+++ b/llvm/test/MC/AVR/inst-lsr.s
@@ -1,4 +1,5 @@
 ; RUN: llvm-mc -triple avr -show-encoding < %s | FileCheck %s
+; RUN: llvm-mc -filetype=obj -triple avr < %s | llvm-objdump -d - | FileCheck -check-prefix=CHECK-INST %s
 
 
 foo:
@@ -12,3 +13,8 @@
 ; CHECK: lsr r25                ; encoding: [0x96,0x95]
 ; CHECK: lsr r5                 ; encoding: [0x56,0x94]
 ; CHECK: lsr r0                 ; encoding: [0x06,0x94]
+
+; CHECK-INST: lsr r31
+; CHECK-INST: lsr r25
+; CHECK-INST: lsr r5
+; CHECK-INST: lsr r0
diff --git a/llvm/test/MC/AVR/inst-neg.s b/llvm/test/MC/AVR/inst-neg.s
--- a/llvm/test/MC/AVR/inst-neg.s
+++ b/llvm/test/MC/AVR/inst-neg.s
@@ -1,4 +1,5 @@
 ; RUN: llvm-mc -triple avr -show-encoding < %s | FileCheck %s
+; RUN: llvm-mc -filetype=obj -triple avr < %s | llvm-objdump -d - | FileCheck -check-prefix=CHECK-INST %s
 
 foo:
   neg r15
@@ -10,3 +11,8 @@
 ; CHECK: neg r1                   ; encoding: [0x11,0x94]
 ; CHECK: neg r22                  ; encoding: [0x61,0x95]
 ; CHECK: neg r31                  ; encoding: [0xf1,0x95]
+
+; CHECK-INST: neg r15
+; CHECK-INST: neg r1
+; CHECK-INST: neg r22
+; CHECK-INST: neg r31
diff --git a/llvm/test/MC/AVR/inst-pop.s b/llvm/test/MC/AVR/inst-pop.s
--- a/llvm/test/MC/AVR/inst-pop.s
+++ b/llvm/test/MC/AVR/inst-pop.s
@@ -1,4 +1,5 @@
 ; RUN: llvm-mc -triple avr -mattr=sram -show-encoding < %s | FileCheck %s
+; RUN: llvm-mc -filetype=obj -triple avr -mattr=sram < %s | llvm-objdump -d --mattr=sram - | FileCheck -check-prefix=CHECK-INST %s
 
 
 foo:
@@ -12,3 +13,8 @@
 ; CHECK: pop r25                ; encoding: [0x9f,0x91]
 ; CHECK: pop r5                 ; encoding: [0x5f,0x90]
 ; CHECK: pop r0                 ; encoding: [0x0f,0x90]
+
+; CHECK-INST: pop r31
+; CHECK-INST: pop r25
+; CHECK-INST: pop r5
+; CHECK-INST: pop r0
diff --git a/llvm/test/MC/AVR/inst-push.s b/llvm/test/MC/AVR/inst-push.s
--- a/llvm/test/MC/AVR/inst-push.s
+++ b/llvm/test/MC/AVR/inst-push.s
@@ -1,4 +1,5 @@
 ; RUN: llvm-mc -triple avr -mattr=sram -show-encoding < %s | FileCheck %s
+; RUN: llvm-mc -filetype=obj -triple avr -mattr=sram < %s | llvm-objdump -d --mattr=sram - | FileCheck -check-prefix=CHECK-INST %s
 
 
 foo:
@@ -12,3 +13,8 @@
 ; CHECK: push r25                ; encoding: [0x9f,0x93]
 ; CHECK: push r5                 ; encoding: [0x5f,0x92]
 ; CHECK: push r0                 ; encoding: [0x0f,0x92]
+
+; CHECK-INST: push r31
+; CHECK-INST: push r25
+; CHECK-INST: push r5
+; CHECK-INST: push r0
diff --git a/llvm/test/MC/AVR/inst-ror.s b/llvm/test/MC/AVR/inst-ror.s
--- a/llvm/test/MC/AVR/inst-ror.s
+++ b/llvm/test/MC/AVR/inst-ror.s
@@ -1,4 +1,5 @@
 ; RUN: llvm-mc -triple avr -show-encoding < %s | FileCheck %s
+; RUN: llvm-mc -filetype=obj -triple avr < %s | llvm-objdump -d - | FileCheck -check-prefix=CHECK-INST %s
 
 
 foo:
@@ -12,3 +13,8 @@
 ; CHECK: ror r25                ; encoding: [0x97,0x95]
 ; CHECK: ror r5                 ; encoding: [0x57,0x94]
 ; CHECK: ror r0                 ; encoding: [0x07,0x94]
+
+; CHECK-INST: ror r31
+; CHECK-INST: ror r25
+; CHECK-INST: ror r5
+; CHECK-INST: ror r0
diff --git a/llvm/test/MC/AVR/inst-swap.s b/llvm/test/MC/AVR/inst-swap.s
--- a/llvm/test/MC/AVR/inst-swap.s
+++ b/llvm/test/MC/AVR/inst-swap.s
@@ -1,4 +1,5 @@
 ; RUN: llvm-mc -triple avr -show-encoding < %s | FileCheck %s
+; RUN: llvm-mc -filetype=obj -triple avr < %s | llvm-objdump -d - | FileCheck -check-prefix=CHECK-INST %s
 
 
 foo:
@@ -12,3 +13,8 @@
 ; CHECK: swap r25                ; encoding: [0x92,0x95]
 ; CHECK: swap r5                 ; encoding: [0x52,0x94]
 ; CHECK: swap r0                 ; encoding: [0x02,0x94]
+
+; CHECK-INST: swap r31
+; CHECK-INST: swap r25
+; CHECK-INST: swap r5
+; CHECK-INST: swap r0