diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
--- a/llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
@@ -1710,6 +1710,8 @@
   case ISD::LRINT:      Res = ExpandFloatOp_LRINT(N); break;
   case ISD::LLRINT:     Res = ExpandFloatOp_LLRINT(N); break;
   case ISD::SELECT_CC:  Res = ExpandFloatOp_SELECT_CC(N); break;
+  case ISD::STRICT_FSETCC:
+  case ISD::STRICT_FSETCCS:
   case ISD::SETCC:      Res = ExpandFloatOp_SETCC(N); break;
   case ISD::STORE:      Res = ExpandFloatOp_STORE(cast<StoreSDNode>(N),
                                                   OpNo); break;
@@ -1735,7 +1737,8 @@
 void DAGTypeLegalizer::FloatExpandSetCCOperands(SDValue &NewLHS,
                                                 SDValue &NewRHS,
                                                 ISD::CondCode &CCCode,
-                                                const SDLoc &dl) {
+                                                const SDLoc &dl, SDValue &Chain,
+                                                bool IsSignaling) {
   SDValue LHSLo, LHSHi, RHSLo, RHSHi;
   GetExpandedFloat(NewLHS, LHSLo, LHSHi);
   GetExpandedFloat(NewRHS, RHSLo, RHSHi);
@@ -1747,25 +1750,31 @@
   //         BNE crN, L:
   //         FCMPU crN, lo1, lo2
   // The following can be improved, but not that much.
-  SDValue Tmp1, Tmp2, Tmp3;
-  Tmp1 = DAG.getSetCC(dl, getSetCCResultType(LHSHi.getValueType()),
-                      LHSHi, RHSHi, ISD::SETOEQ);
-  Tmp2 = DAG.getSetCC(dl, getSetCCResultType(LHSLo.getValueType()),
-                      LHSLo, RHSLo, CCCode);
+  SDValue Tmp1, Tmp2, Tmp3, OutputChain;
+  Tmp1 = DAG.getSetCC(dl, getSetCCResultType(LHSHi.getValueType()), LHSHi,
+                      RHSHi, ISD::SETOEQ, Chain, IsSignaling);
+  OutputChain = Tmp1->getNumValues() > 1 ? Tmp1.getValue(1) : SDValue();
+  Tmp2 = DAG.getSetCC(dl, getSetCCResultType(LHSLo.getValueType()), LHSLo,
+                      RHSLo, CCCode, OutputChain, IsSignaling);
+  OutputChain = Tmp2->getNumValues() > 1 ? Tmp2.getValue(1) : SDValue();
   Tmp3 = DAG.getNode(ISD::AND, dl, Tmp1.getValueType(), Tmp1, Tmp2);
-  Tmp1 = DAG.getSetCC(dl, getSetCCResultType(LHSHi.getValueType()),
-                      LHSHi, RHSHi, ISD::SETUNE);
-  Tmp2 = DAG.getSetCC(dl, getSetCCResultType(LHSHi.getValueType()),
-                      LHSHi, RHSHi, CCCode);
+  Tmp1 = DAG.getSetCC(dl, getSetCCResultType(LHSHi.getValueType()), LHSHi,
+                      RHSHi, ISD::SETUNE, OutputChain, IsSignaling);
+  OutputChain = Tmp1->getNumValues() > 1 ? Tmp1.getValue(1) : SDValue();
+  Tmp2 = DAG.getSetCC(dl, getSetCCResultType(LHSHi.getValueType()), LHSHi,
+                      RHSHi, CCCode, OutputChain, IsSignaling);
+  OutputChain = Tmp2->getNumValues() > 1 ? Tmp2.getValue(1) : SDValue();
   Tmp1 = DAG.getNode(ISD::AND, dl, Tmp1.getValueType(), Tmp1, Tmp2);
   NewLHS = DAG.getNode(ISD::OR, dl, Tmp1.getValueType(), Tmp1, Tmp3);
   NewRHS = SDValue();   // LHS is the result, not a compare.
+  Chain = OutputChain;
 }
 
 SDValue DAGTypeLegalizer::ExpandFloatOp_BR_CC(SDNode *N) {
   SDValue NewLHS = N->getOperand(2), NewRHS = N->getOperand(3);
   ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(1))->get();
-  FloatExpandSetCCOperands(NewLHS, NewRHS, CCCode, SDLoc(N));
+  SDValue Chain;
+  FloatExpandSetCCOperands(NewLHS, NewRHS, CCCode, SDLoc(N), Chain);
 
   // If ExpandSetCCOperands returned a scalar, we need to compare the result
   // against zero to select between true and false values.
@@ -1863,7 +1872,8 @@
 SDValue DAGTypeLegalizer::ExpandFloatOp_SELECT_CC(SDNode *N) {
   SDValue NewLHS = N->getOperand(0), NewRHS = N->getOperand(1);
   ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(4))->get();
-  FloatExpandSetCCOperands(NewLHS, NewRHS, CCCode, SDLoc(N));
+  SDValue Chain;
+  FloatExpandSetCCOperands(NewLHS, NewRHS, CCCode, SDLoc(N), Chain);
 
   // If ExpandSetCCOperands returned a scalar, we need to compare the result
   // against zero to select between true and false values.
@@ -1879,20 +1889,25 @@
 }
 
 SDValue DAGTypeLegalizer::ExpandFloatOp_SETCC(SDNode *N) {
-  SDValue NewLHS = N->getOperand(0), NewRHS = N->getOperand(1);
-  ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(2))->get();
-  FloatExpandSetCCOperands(NewLHS, NewRHS, CCCode, SDLoc(N));
+  bool IsStrict = N->isStrictFPOpcode();
+  SDValue NewLHS = N->getOperand(IsStrict ? 1 : 0);
+  SDValue NewRHS = N->getOperand(IsStrict ? 2 : 1);
+  SDValue Chain = IsStrict ? N->getOperand(0) : SDValue();
+  ISD::CondCode CCCode =
+      cast<CondCodeSDNode>(N->getOperand(IsStrict ? 3 : 2))->get();
+  FloatExpandSetCCOperands(NewLHS, NewRHS, CCCode, SDLoc(N), Chain,
+                           N->getOpcode() == ISD::STRICT_FSETCCS);
 
-  // If ExpandSetCCOperands returned a scalar, use it.
-  if (!NewRHS.getNode()) {
-    assert(NewLHS.getValueType() == N->getValueType(0) &&
-           "Unexpected setcc expansion!");
-    return NewLHS;
+  // FloatExpandSetCCOperands always returned a scalar.
+  assert(!NewRHS.getNode() && "Expect to return scalar");
+  assert(NewLHS.getValueType() == N->getValueType(0) &&
+         "Unexpected setcc expansion!");
+  if (Chain) {
+    ReplaceValueWith(SDValue(N, 0), NewLHS);
+    ReplaceValueWith(SDValue(N, 1), Chain);
+    return SDValue();
   }
-
-  // Otherwise, update N to have the operands specified.
-  return SDValue(DAG.UpdateNodeOperands(N, NewLHS, NewRHS,
-                                DAG.getCondCode(CCCode)), 0);
+  return NewLHS;
 }
 
 SDValue DAGTypeLegalizer::ExpandFloatOp_STORE(SDNode *N, unsigned OpNo) {
diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h b/llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
--- a/llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
+++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
@@ -628,7 +628,8 @@
   SDValue ExpandFloatOp_STORE(SDNode *N, unsigned OpNo);
 
   void FloatExpandSetCCOperands(SDValue &NewLHS, SDValue &NewRHS,
-                                ISD::CondCode &CCCode, const SDLoc &dl);
+                                ISD::CondCode &CCCode, const SDLoc &dl,
+                                SDValue &Chain, bool IsSignaling = false);
 
   //===--------------------------------------------------------------------===//
   // Float promotion support: LegalizeFloatTypes.cpp
diff --git a/llvm/test/CodeGen/PowerPC/fp-strict-fcmp.ll b/llvm/test/CodeGen/PowerPC/fp-strict-fcmp.ll
--- a/llvm/test/CodeGen/PowerPC/fp-strict-fcmp.ll
+++ b/llvm/test/CodeGen/PowerPC/fp-strict-fcmp.ll
@@ -2689,6 +2689,984 @@
   ret i32 %conv
 }
 
+define i32 @fcmp_olt_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
+; P8-LABEL: fcmp_olt_ppcf128:
+; P8:       # %bb.0:
+; P8-NEXT:    fcmpu cr0, f1, f3
+; P8-NEXT:    fcmpu cr1, f2, f4
+; P8-NEXT:    li r3, 1
+; P8-NEXT:    crand 4*cr5+lt, eq, 4*cr1+lt
+; P8-NEXT:    crandc 4*cr5+gt, lt, eq
+; P8-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
+; P8-NEXT:    isel r3, 0, r3, 4*cr5+lt
+; P8-NEXT:    blr
+;
+; P9-LABEL: fcmp_olt_ppcf128:
+; P9:       # %bb.0:
+; P9-NEXT:    fcmpu cr0, f1, f3
+; P9-NEXT:    fcmpu cr1, f2, f4
+; P9-NEXT:    li r3, 1
+; P9-NEXT:    crand 4*cr5+lt, eq, 4*cr1+lt
+; P9-NEXT:    crandc 4*cr5+gt, lt, eq
+; P9-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
+; P9-NEXT:    isel r3, 0, r3, 4*cr5+lt
+; P9-NEXT:    blr
+;
+; NOVSX-LABEL: fcmp_olt_ppcf128:
+; NOVSX:       # %bb.0:
+; NOVSX-NEXT:    fcmpu cr0, f1, f3
+; NOVSX-NEXT:    fcmpu cr1, f2, f4
+; NOVSX-NEXT:    li r3, 1
+; NOVSX-NEXT:    crand 4*cr5+lt, eq, 4*cr1+lt
+; NOVSX-NEXT:    crandc 4*cr5+gt, lt, eq
+; NOVSX-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
+; NOVSX-NEXT:    isel r3, 0, r3, 4*cr5+lt
+; NOVSX-NEXT:    blr
+  %cmp = call i1 @llvm.experimental.constrained.fcmp.ppcf128(ppc_fp128 %a, ppc_fp128 %b, metadata !"olt", metadata !"fpexcept.strict") #0
+  %conv = zext i1 %cmp to i32
+  ret i32 %conv
+}
+
+define i32 @fcmp_ole_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
+; P8-LABEL: fcmp_ole_ppcf128:
+; P8:       # %bb.0:
+; P8-NEXT:    fcmpu cr0, f2, f4
+; P8-NEXT:    fcmpu cr1, f1, f3
+; P8-NEXT:    li r3, 1
+; P8-NEXT:    crnor 4*cr5+lt, un, gt
+; P8-NEXT:    crnor 4*cr5+gt, 4*cr1+un, 4*cr1+gt
+; P8-NEXT:    crand 4*cr5+lt, 4*cr1+eq, 4*cr5+lt
+; P8-NEXT:    crandc 4*cr5+gt, 4*cr5+gt, 4*cr1+eq
+; P8-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
+; P8-NEXT:    isel r3, 0, r3, 4*cr5+lt
+; P8-NEXT:    blr
+;
+; P9-LABEL: fcmp_ole_ppcf128:
+; P9:       # %bb.0:
+; P9-NEXT:    fcmpu cr0, f2, f4
+; P9-NEXT:    li r3, 1
+; P9-NEXT:    crnor 4*cr5+lt, un, gt
+; P9-NEXT:    fcmpu cr0, f1, f3
+; P9-NEXT:    crnor 4*cr5+gt, un, gt
+; P9-NEXT:    crand 4*cr5+lt, eq, 4*cr5+lt
+; P9-NEXT:    crandc 4*cr5+gt, 4*cr5+gt, eq
+; P9-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
+; P9-NEXT:    isel r3, 0, r3, 4*cr5+lt
+; P9-NEXT:    blr
+;
+; NOVSX-LABEL: fcmp_ole_ppcf128:
+; NOVSX:       # %bb.0:
+; NOVSX-NEXT:    fcmpu cr0, f2, f4
+; NOVSX-NEXT:    fcmpu cr1, f1, f3
+; NOVSX-NEXT:    li r3, 1
+; NOVSX-NEXT:    crnor 4*cr5+lt, un, gt
+; NOVSX-NEXT:    crnor 4*cr5+gt, 4*cr1+un, 4*cr1+gt
+; NOVSX-NEXT:    crand 4*cr5+lt, 4*cr1+eq, 4*cr5+lt
+; NOVSX-NEXT:    crandc 4*cr5+gt, 4*cr5+gt, 4*cr1+eq
+; NOVSX-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
+; NOVSX-NEXT:    isel r3, 0, r3, 4*cr5+lt
+; NOVSX-NEXT:    blr
+  %cmp = call i1 @llvm.experimental.constrained.fcmp.ppcf128(ppc_fp128 %a, ppc_fp128 %b, metadata !"ole", metadata !"fpexcept.strict") #0
+  %conv = zext i1 %cmp to i32
+  ret i32 %conv
+}
+
+define i32 @fcmp_ogt_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
+; P8-LABEL: fcmp_ogt_ppcf128:
+; P8:       # %bb.0:
+; P8-NEXT:    fcmpu cr0, f1, f3
+; P8-NEXT:    fcmpu cr1, f2, f4
+; P8-NEXT:    li r3, 1
+; P8-NEXT:    crand 4*cr5+lt, eq, 4*cr1+gt
+; P8-NEXT:    crandc 4*cr5+gt, gt, eq
+; P8-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
+; P8-NEXT:    isel r3, 0, r3, 4*cr5+lt
+; P8-NEXT:    blr
+;
+; P9-LABEL: fcmp_ogt_ppcf128:
+; P9:       # %bb.0:
+; P9-NEXT:    fcmpu cr0, f1, f3
+; P9-NEXT:    fcmpu cr1, f2, f4
+; P9-NEXT:    li r3, 1
+; P9-NEXT:    crand 4*cr5+lt, eq, 4*cr1+gt
+; P9-NEXT:    crandc 4*cr5+gt, gt, eq
+; P9-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
+; P9-NEXT:    isel r3, 0, r3, 4*cr5+lt
+; P9-NEXT:    blr
+;
+; NOVSX-LABEL: fcmp_ogt_ppcf128:
+; NOVSX:       # %bb.0:
+; NOVSX-NEXT:    fcmpu cr0, f1, f3
+; NOVSX-NEXT:    fcmpu cr1, f2, f4
+; NOVSX-NEXT:    li r3, 1
+; NOVSX-NEXT:    crand 4*cr5+lt, eq, 4*cr1+gt
+; NOVSX-NEXT:    crandc 4*cr5+gt, gt, eq
+; NOVSX-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
+; NOVSX-NEXT:    isel r3, 0, r3, 4*cr5+lt
+; NOVSX-NEXT:    blr
+  %cmp = call i1 @llvm.experimental.constrained.fcmp.ppcf128(ppc_fp128 %a, ppc_fp128 %b, metadata !"ogt", metadata !"fpexcept.strict") #0
+  %conv = zext i1 %cmp to i32
+  ret i32 %conv
+}
+
+define i32 @fcmp_oge_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
+; P8-LABEL: fcmp_oge_ppcf128:
+; P8:       # %bb.0:
+; P8-NEXT:    fcmpu cr0, f2, f4
+; P8-NEXT:    fcmpu cr1, f1, f3
+; P8-NEXT:    li r3, 1
+; P8-NEXT:    crnor 4*cr5+lt, un, lt
+; P8-NEXT:    crnor 4*cr5+gt, 4*cr1+un, 4*cr1+lt
+; P8-NEXT:    crand 4*cr5+lt, 4*cr1+eq, 4*cr5+lt
+; P8-NEXT:    crandc 4*cr5+gt, 4*cr5+gt, 4*cr1+eq
+; P8-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
+; P8-NEXT:    isel r3, 0, r3, 4*cr5+lt
+; P8-NEXT:    blr
+;
+; P9-LABEL: fcmp_oge_ppcf128:
+; P9:       # %bb.0:
+; P9-NEXT:    fcmpu cr0, f2, f4
+; P9-NEXT:    li r3, 1
+; P9-NEXT:    crnor 4*cr5+lt, un, lt
+; P9-NEXT:    fcmpu cr0, f1, f3
+; P9-NEXT:    crnor 4*cr5+gt, un, lt
+; P9-NEXT:    crand 4*cr5+lt, eq, 4*cr5+lt
+; P9-NEXT:    crandc 4*cr5+gt, 4*cr5+gt, eq
+; P9-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
+; P9-NEXT:    isel r3, 0, r3, 4*cr5+lt
+; P9-NEXT:    blr
+;
+; NOVSX-LABEL: fcmp_oge_ppcf128:
+; NOVSX:       # %bb.0:
+; NOVSX-NEXT:    fcmpu cr0, f2, f4
+; NOVSX-NEXT:    fcmpu cr1, f1, f3
+; NOVSX-NEXT:    li r3, 1
+; NOVSX-NEXT:    crnor 4*cr5+lt, un, lt
+; NOVSX-NEXT:    crnor 4*cr5+gt, 4*cr1+un, 4*cr1+lt
+; NOVSX-NEXT:    crand 4*cr5+lt, 4*cr1+eq, 4*cr5+lt
+; NOVSX-NEXT:    crandc 4*cr5+gt, 4*cr5+gt, 4*cr1+eq
+; NOVSX-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
+; NOVSX-NEXT:    isel r3, 0, r3, 4*cr5+lt
+; NOVSX-NEXT:    blr
+  %cmp = call i1 @llvm.experimental.constrained.fcmp.ppcf128(ppc_fp128 %a, ppc_fp128 %b, metadata !"oge", metadata !"fpexcept.strict") #0
+  %conv = zext i1 %cmp to i32
+  ret i32 %conv
+}
+
+define i32 @fcmp_oeq_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
+; P8-LABEL: fcmp_oeq_ppcf128:
+; P8:       # %bb.0:
+; P8-NEXT:    fcmpu cr0, f1, f3
+; P8-NEXT:    fcmpu cr1, f2, f4
+; P8-NEXT:    li r3, 1
+; P8-NEXT:    crand 4*cr5+lt, eq, 4*cr1+eq
+; P8-NEXT:    crandc 4*cr5+gt, eq, eq
+; P8-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
+; P8-NEXT:    isel r3, 0, r3, 4*cr5+lt
+; P8-NEXT:    blr
+;
+; P9-LABEL: fcmp_oeq_ppcf128:
+; P9:       # %bb.0:
+; P9-NEXT:    fcmpu cr0, f1, f3
+; P9-NEXT:    fcmpu cr1, f2, f4
+; P9-NEXT:    li r3, 1
+; P9-NEXT:    crand 4*cr5+lt, eq, 4*cr1+eq
+; P9-NEXT:    crandc 4*cr5+gt, eq, eq
+; P9-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
+; P9-NEXT:    isel r3, 0, r3, 4*cr5+lt
+; P9-NEXT:    blr
+;
+; NOVSX-LABEL: fcmp_oeq_ppcf128:
+; NOVSX:       # %bb.0:
+; NOVSX-NEXT:    fcmpu cr0, f1, f3
+; NOVSX-NEXT:    fcmpu cr1, f2, f4
+; NOVSX-NEXT:    li r3, 1
+; NOVSX-NEXT:    crand 4*cr5+lt, eq, 4*cr1+eq
+; NOVSX-NEXT:    crandc 4*cr5+gt, eq, eq
+; NOVSX-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
+; NOVSX-NEXT:    isel r3, 0, r3, 4*cr5+lt
+; NOVSX-NEXT:    blr
+  %cmp = call i1 @llvm.experimental.constrained.fcmp.ppcf128(ppc_fp128 %a, ppc_fp128 %b, metadata !"oeq", metadata !"fpexcept.strict") #0
+  %conv = zext i1 %cmp to i32
+  ret i32 %conv
+}
+
+define i32 @fcmp_one_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
+; P8-LABEL: fcmp_one_ppcf128:
+; P8:       # %bb.0:
+; P8-NEXT:    fcmpu cr0, f2, f4
+; P8-NEXT:    fcmpu cr1, f1, f3
+; P8-NEXT:    li r3, 1
+; P8-NEXT:    crnor 4*cr5+lt, un, eq
+; P8-NEXT:    crnor 4*cr5+gt, 4*cr1+un, 4*cr1+eq
+; P8-NEXT:    crand 4*cr5+lt, 4*cr1+eq, 4*cr5+lt
+; P8-NEXT:    crandc 4*cr5+gt, 4*cr5+gt, 4*cr1+eq
+; P8-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
+; P8-NEXT:    isel r3, 0, r3, 4*cr5+lt
+; P8-NEXT:    blr
+;
+; P9-LABEL: fcmp_one_ppcf128:
+; P9:       # %bb.0:
+; P9-NEXT:    fcmpu cr0, f2, f4
+; P9-NEXT:    li r3, 1
+; P9-NEXT:    crnor 4*cr5+lt, un, eq
+; P9-NEXT:    fcmpu cr0, f1, f3
+; P9-NEXT:    crnor 4*cr5+gt, un, eq
+; P9-NEXT:    crand 4*cr5+lt, eq, 4*cr5+lt
+; P9-NEXT:    crandc 4*cr5+gt, 4*cr5+gt, eq
+; P9-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
+; P9-NEXT:    isel r3, 0, r3, 4*cr5+lt
+; P9-NEXT:    blr
+;
+; NOVSX-LABEL: fcmp_one_ppcf128:
+; NOVSX:       # %bb.0:
+; NOVSX-NEXT:    fcmpu cr0, f2, f4
+; NOVSX-NEXT:    fcmpu cr1, f1, f3
+; NOVSX-NEXT:    li r3, 1
+; NOVSX-NEXT:    crnor 4*cr5+lt, un, eq
+; NOVSX-NEXT:    crnor 4*cr5+gt, 4*cr1+un, 4*cr1+eq
+; NOVSX-NEXT:    crand 4*cr5+lt, 4*cr1+eq, 4*cr5+lt
+; NOVSX-NEXT:    crandc 4*cr5+gt, 4*cr5+gt, 4*cr1+eq
+; NOVSX-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
+; NOVSX-NEXT:    isel r3, 0, r3, 4*cr5+lt
+; NOVSX-NEXT:    blr
+  %cmp = call i1 @llvm.experimental.constrained.fcmp.ppcf128(ppc_fp128 %a, ppc_fp128 %b, metadata !"one", metadata !"fpexcept.strict") #0
+  %conv = zext i1 %cmp to i32
+  ret i32 %conv
+}
+
+define i32 @fcmp_ult_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
+; P8-LABEL: fcmp_ult_ppcf128:
+; P8:       # %bb.0:
+; P8-NEXT:    fcmpu cr0, f2, f4
+; P8-NEXT:    fcmpu cr1, f1, f3
+; P8-NEXT:    li r3, 1
+; P8-NEXT:    cror 4*cr5+lt, lt, un
+; P8-NEXT:    cror 4*cr5+gt, 4*cr1+lt, 4*cr1+un
+; P8-NEXT:    crand 4*cr5+lt, 4*cr1+eq, 4*cr5+lt
+; P8-NEXT:    crandc 4*cr5+gt, 4*cr5+gt, 4*cr1+eq
+; P8-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
+; P8-NEXT:    isel r3, 0, r3, 4*cr5+lt
+; P8-NEXT:    blr
+;
+; P9-LABEL: fcmp_ult_ppcf128:
+; P9:       # %bb.0:
+; P9-NEXT:    fcmpu cr0, f1, f3
+; P9-NEXT:    fcmpu cr1, f2, f4
+; P9-NEXT:    li r3, 1
+; P9-NEXT:    cror 4*cr5+lt, 4*cr1+lt, 4*cr1+un
+; P9-NEXT:    cror 4*cr5+gt, lt, un
+; P9-NEXT:    crand 4*cr5+lt, eq, 4*cr5+lt
+; P9-NEXT:    crandc 4*cr5+gt, 4*cr5+gt, eq
+; P9-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
+; P9-NEXT:    isel r3, 0, r3, 4*cr5+lt
+; P9-NEXT:    blr
+;
+; NOVSX-LABEL: fcmp_ult_ppcf128:
+; NOVSX:       # %bb.0:
+; NOVSX-NEXT:    fcmpu cr0, f2, f4
+; NOVSX-NEXT:    fcmpu cr1, f1, f3
+; NOVSX-NEXT:    li r3, 1
+; NOVSX-NEXT:    cror 4*cr5+lt, lt, un
+; NOVSX-NEXT:    cror 4*cr5+gt, 4*cr1+lt, 4*cr1+un
+; NOVSX-NEXT:    crand 4*cr5+lt, 4*cr1+eq, 4*cr5+lt
+; NOVSX-NEXT:    crandc 4*cr5+gt, 4*cr5+gt, 4*cr1+eq
+; NOVSX-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
+; NOVSX-NEXT:    isel r3, 0, r3, 4*cr5+lt
+; NOVSX-NEXT:    blr
+  %cmp = call i1 @llvm.experimental.constrained.fcmp.ppcf128(ppc_fp128 %a, ppc_fp128 %b, metadata !"ult", metadata !"fpexcept.strict") #0
+  %conv = zext i1 %cmp to i32
+  ret i32 %conv
+}
+
+define i32 @fcmp_ule_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
+; P8-LABEL: fcmp_ule_ppcf128:
+; P8:       # %bb.0:
+; P8-NEXT:    fcmpu cr0, f2, f4
+; P8-NEXT:    fcmpu cr1, f1, f3
+; P8-NEXT:    li r3, 1
+; P8-NEXT:    crandc 4*cr5+lt, 4*cr1+eq, gt
+; P8-NEXT:    crnor 4*cr5+gt, 4*cr1+gt, 4*cr1+eq
+; P8-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
+; P8-NEXT:    isel r3, 0, r3, 4*cr5+lt
+; P8-NEXT:    blr
+;
+; P9-LABEL: fcmp_ule_ppcf128:
+; P9:       # %bb.0:
+; P9-NEXT:    fcmpu cr0, f2, f4
+; P9-NEXT:    fcmpu cr1, f1, f3
+; P9-NEXT:    li r3, 1
+; P9-NEXT:    crandc 4*cr5+lt, 4*cr1+eq, gt
+; P9-NEXT:    crnor 4*cr5+gt, 4*cr1+gt, 4*cr1+eq
+; P9-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
+; P9-NEXT:    isel r3, 0, r3, 4*cr5+lt
+; P9-NEXT:    blr
+;
+; NOVSX-LABEL: fcmp_ule_ppcf128:
+; NOVSX:       # %bb.0:
+; NOVSX-NEXT:    fcmpu cr0, f2, f4
+; NOVSX-NEXT:    fcmpu cr1, f1, f3
+; NOVSX-NEXT:    li r3, 1
+; NOVSX-NEXT:    crandc 4*cr5+lt, 4*cr1+eq, gt
+; NOVSX-NEXT:    crnor 4*cr5+gt, 4*cr1+gt, 4*cr1+eq
+; NOVSX-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
+; NOVSX-NEXT:    isel r3, 0, r3, 4*cr5+lt
+; NOVSX-NEXT:    blr
+  %cmp = call i1 @llvm.experimental.constrained.fcmp.ppcf128(ppc_fp128 %a, ppc_fp128 %b, metadata !"ule", metadata !"fpexcept.strict") #0
+  %conv = zext i1 %cmp to i32
+  ret i32 %conv
+}
+
+define i32 @fcmp_ugt_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
+; P8-LABEL: fcmp_ugt_ppcf128:
+; P8:       # %bb.0:
+; P8-NEXT:    fcmpu cr0, f2, f4
+; P8-NEXT:    fcmpu cr1, f1, f3
+; P8-NEXT:    li r3, 1
+; P8-NEXT:    cror 4*cr5+lt, gt, un
+; P8-NEXT:    cror 4*cr5+gt, 4*cr1+gt, 4*cr1+un
+; P8-NEXT:    crand 4*cr5+lt, 4*cr1+eq, 4*cr5+lt
+; P8-NEXT:    crandc 4*cr5+gt, 4*cr5+gt, 4*cr1+eq
+; P8-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
+; P8-NEXT:    isel r3, 0, r3, 4*cr5+lt
+; P8-NEXT:    blr
+;
+; P9-LABEL: fcmp_ugt_ppcf128:
+; P9:       # %bb.0:
+; P9-NEXT:    fcmpu cr0, f1, f3
+; P9-NEXT:    fcmpu cr1, f2, f4
+; P9-NEXT:    li r3, 1
+; P9-NEXT:    cror 4*cr5+lt, 4*cr1+gt, 4*cr1+un
+; P9-NEXT:    cror 4*cr5+gt, gt, un
+; P9-NEXT:    crand 4*cr5+lt, eq, 4*cr5+lt
+; P9-NEXT:    crandc 4*cr5+gt, 4*cr5+gt, eq
+; P9-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
+; P9-NEXT:    isel r3, 0, r3, 4*cr5+lt
+; P9-NEXT:    blr
+;
+; NOVSX-LABEL: fcmp_ugt_ppcf128:
+; NOVSX:       # %bb.0:
+; NOVSX-NEXT:    fcmpu cr0, f2, f4
+; NOVSX-NEXT:    fcmpu cr1, f1, f3
+; NOVSX-NEXT:    li r3, 1
+; NOVSX-NEXT:    cror 4*cr5+lt, gt, un
+; NOVSX-NEXT:    cror 4*cr5+gt, 4*cr1+gt, 4*cr1+un
+; NOVSX-NEXT:    crand 4*cr5+lt, 4*cr1+eq, 4*cr5+lt
+; NOVSX-NEXT:    crandc 4*cr5+gt, 4*cr5+gt, 4*cr1+eq
+; NOVSX-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
+; NOVSX-NEXT:    isel r3, 0, r3, 4*cr5+lt
+; NOVSX-NEXT:    blr
+  %cmp = call i1 @llvm.experimental.constrained.fcmp.ppcf128(ppc_fp128 %a, ppc_fp128 %b, metadata !"ugt", metadata !"fpexcept.strict") #0
+  %conv = zext i1 %cmp to i32
+  ret i32 %conv
+}
+
+define i32 @fcmp_uge_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
+; P8-LABEL: fcmp_uge_ppcf128:
+; P8:       # %bb.0:
+; P8-NEXT:    fcmpu cr0, f2, f4
+; P8-NEXT:    fcmpu cr1, f1, f3
+; P8-NEXT:    li r3, 1
+; P8-NEXT:    crandc 4*cr5+lt, 4*cr1+eq, lt
+; P8-NEXT:    crnor 4*cr5+gt, 4*cr1+lt, 4*cr1+eq
+; P8-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
+; P8-NEXT:    isel r3, 0, r3, 4*cr5+lt
+; P8-NEXT:    blr
+;
+; P9-LABEL: fcmp_uge_ppcf128:
+; P9:       # %bb.0:
+; P9-NEXT:    fcmpu cr0, f2, f4
+; P9-NEXT:    fcmpu cr1, f1, f3
+; P9-NEXT:    li r3, 1
+; P9-NEXT:    crandc 4*cr5+lt, 4*cr1+eq, lt
+; P9-NEXT:    crnor 4*cr5+gt, 4*cr1+lt, 4*cr1+eq
+; P9-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
+; P9-NEXT:    isel r3, 0, r3, 4*cr5+lt
+; P9-NEXT:    blr
+;
+; NOVSX-LABEL: fcmp_uge_ppcf128:
+; NOVSX:       # %bb.0:
+; NOVSX-NEXT:    fcmpu cr0, f2, f4
+; NOVSX-NEXT:    fcmpu cr1, f1, f3
+; NOVSX-NEXT:    li r3, 1
+; NOVSX-NEXT:    crandc 4*cr5+lt, 4*cr1+eq, lt
+; NOVSX-NEXT:    crnor 4*cr5+gt, 4*cr1+lt, 4*cr1+eq
+; NOVSX-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
+; NOVSX-NEXT:    isel r3, 0, r3, 4*cr5+lt
+; NOVSX-NEXT:    blr
+  %cmp = call i1 @llvm.experimental.constrained.fcmp.ppcf128(ppc_fp128 %a, ppc_fp128 %b, metadata !"uge", metadata !"fpexcept.strict") #0
+  %conv = zext i1 %cmp to i32
+  ret i32 %conv
+}
+
+define i32 @fcmp_ueq_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
+; P8-LABEL: fcmp_ueq_ppcf128:
+; P8:       # %bb.0:
+; P8-NEXT:    fcmpu cr0, f2, f4
+; P8-NEXT:    fcmpu cr1, f1, f3
+; P8-NEXT:    li r3, 1
+; P8-NEXT:    cror 4*cr5+lt, eq, un
+; P8-NEXT:    cror 4*cr5+gt, 4*cr1+eq, 4*cr1+un
+; P8-NEXT:    crand 4*cr5+lt, 4*cr1+eq, 4*cr5+lt
+; P8-NEXT:    crandc 4*cr5+gt, 4*cr5+gt, 4*cr1+eq
+; P8-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
+; P8-NEXT:    isel r3, 0, r3, 4*cr5+lt
+; P8-NEXT:    blr
+;
+; P9-LABEL: fcmp_ueq_ppcf128:
+; P9:       # %bb.0:
+; P9-NEXT:    fcmpu cr0, f1, f3
+; P9-NEXT:    fcmpu cr1, f2, f4
+; P9-NEXT:    li r3, 1
+; P9-NEXT:    cror 4*cr5+lt, 4*cr1+eq, 4*cr1+un
+; P9-NEXT:    cror 4*cr5+gt, eq, un
+; P9-NEXT:    crand 4*cr5+lt, eq, 4*cr5+lt
+; P9-NEXT:    crandc 4*cr5+gt, 4*cr5+gt, eq
+; P9-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
+; P9-NEXT:    isel r3, 0, r3, 4*cr5+lt
+; P9-NEXT:    blr
+;
+; NOVSX-LABEL: fcmp_ueq_ppcf128:
+; NOVSX:       # %bb.0:
+; NOVSX-NEXT:    fcmpu cr0, f2, f4
+; NOVSX-NEXT:    fcmpu cr1, f1, f3
+; NOVSX-NEXT:    li r3, 1
+; NOVSX-NEXT:    cror 4*cr5+lt, eq, un
+; NOVSX-NEXT:    cror 4*cr5+gt, 4*cr1+eq, 4*cr1+un
+; NOVSX-NEXT:    crand 4*cr5+lt, 4*cr1+eq, 4*cr5+lt
+; NOVSX-NEXT:    crandc 4*cr5+gt, 4*cr5+gt, 4*cr1+eq
+; NOVSX-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
+; NOVSX-NEXT:    isel r3, 0, r3, 4*cr5+lt
+; NOVSX-NEXT:    blr
+  %cmp = call i1 @llvm.experimental.constrained.fcmp.ppcf128(ppc_fp128 %a, ppc_fp128 %b, metadata !"ueq", metadata !"fpexcept.strict") #0
+  %conv = zext i1 %cmp to i32
+  ret i32 %conv
+}
+
+define i32 @fcmp_une_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
+; P8-LABEL: fcmp_une_ppcf128:
+; P8:       # %bb.0:
+; P8-NEXT:    fcmpu cr0, f2, f4
+; P8-NEXT:    fcmpu cr1, f1, f3
+; P8-NEXT:    li r3, 1
+; P8-NEXT:    crandc 4*cr5+lt, 4*cr1+eq, eq
+; P8-NEXT:    crandc 4*cr5+lt, 4*cr1+eq, 4*cr5+lt
+; P8-NEXT:    isel r3, 0, r3, 4*cr5+lt
+; P8-NEXT:    blr
+;
+; P9-LABEL: fcmp_une_ppcf128:
+; P9:       # %bb.0:
+; P9-NEXT:    fcmpu cr0, f2, f4
+; P9-NEXT:    fcmpu cr1, f1, f3
+; P9-NEXT:    li r3, 1
+; P9-NEXT:    crandc 4*cr5+lt, 4*cr1+eq, eq
+; P9-NEXT:    crandc 4*cr5+lt, 4*cr1+eq, 4*cr5+lt
+; P9-NEXT:    isel r3, 0, r3, 4*cr5+lt
+; P9-NEXT:    blr
+;
+; NOVSX-LABEL: fcmp_une_ppcf128:
+; NOVSX:       # %bb.0:
+; NOVSX-NEXT:    fcmpu cr0, f2, f4
+; NOVSX-NEXT:    fcmpu cr1, f1, f3
+; NOVSX-NEXT:    li r3, 1
+; NOVSX-NEXT:    crandc 4*cr5+lt, 4*cr1+eq, eq
+; NOVSX-NEXT:    crandc 4*cr5+lt, 4*cr1+eq, 4*cr5+lt
+; NOVSX-NEXT:    isel r3, 0, r3, 4*cr5+lt
+; NOVSX-NEXT:    blr
+  %cmp = call i1 @llvm.experimental.constrained.fcmp.ppcf128(ppc_fp128 %a, ppc_fp128 %b, metadata !"une", metadata !"fpexcept.strict") #0
+  %conv = zext i1 %cmp to i32
+  ret i32 %conv
+}
+
+define i32 @fcmps_olt_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
+; P8-LABEL: fcmps_olt_ppcf128:
+; P8:       # %bb.0:
+; P8-NEXT:    fcmpo cr0, f1, f3
+; P8-NEXT:    fcmpo cr1, f2, f4
+; P8-NEXT:    li r3, 1
+; P8-NEXT:    crand 4*cr5+lt, eq, 4*cr1+lt
+; P8-NEXT:    crandc 4*cr5+gt, lt, eq
+; P8-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
+; P8-NEXT:    isel r3, 0, r3, 4*cr5+lt
+; P8-NEXT:    blr
+;
+; P9-LABEL: fcmps_olt_ppcf128:
+; P9:       # %bb.0:
+; P9-NEXT:    fcmpo cr0, f1, f3
+; P9-NEXT:    fcmpo cr1, f2, f4
+; P9-NEXT:    li r3, 1
+; P9-NEXT:    crand 4*cr5+lt, eq, 4*cr1+lt
+; P9-NEXT:    crandc 4*cr5+gt, lt, eq
+; P9-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
+; P9-NEXT:    isel r3, 0, r3, 4*cr5+lt
+; P9-NEXT:    blr
+;
+; NOVSX-LABEL: fcmps_olt_ppcf128:
+; NOVSX:       # %bb.0:
+; NOVSX-NEXT:    fcmpo cr0, f1, f3
+; NOVSX-NEXT:    fcmpo cr1, f2, f4
+; NOVSX-NEXT:    li r3, 1
+; NOVSX-NEXT:    crand 4*cr5+lt, eq, 4*cr1+lt
+; NOVSX-NEXT:    crandc 4*cr5+gt, lt, eq
+; NOVSX-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
+; NOVSX-NEXT:    isel r3, 0, r3, 4*cr5+lt
+; NOVSX-NEXT:    blr
+  %cmp = call i1 @llvm.experimental.constrained.fcmps.ppcf128(ppc_fp128 %a, ppc_fp128 %b, metadata !"olt", metadata !"fpexcept.strict") #0
+  %conv = zext i1 %cmp to i32
+  ret i32 %conv
+}
+
+define i32 @fcmps_ole_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
+; P8-LABEL: fcmps_ole_ppcf128:
+; P8:       # %bb.0:
+; P8-NEXT:    fcmpo cr0, f2, f4
+; P8-NEXT:    fcmpo cr1, f1, f3
+; P8-NEXT:    li r3, 1
+; P8-NEXT:    crnor 4*cr5+lt, un, gt
+; P8-NEXT:    crnor 4*cr5+gt, 4*cr1+un, 4*cr1+gt
+; P8-NEXT:    crand 4*cr5+lt, 4*cr1+eq, 4*cr5+lt
+; P8-NEXT:    crandc 4*cr5+gt, 4*cr5+gt, 4*cr1+eq
+; P8-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
+; P8-NEXT:    isel r3, 0, r3, 4*cr5+lt
+; P8-NEXT:    blr
+;
+; P9-LABEL: fcmps_ole_ppcf128:
+; P9:       # %bb.0:
+; P9-NEXT:    fcmpo cr0, f2, f4
+; P9-NEXT:    li r3, 1
+; P9-NEXT:    crnor 4*cr5+lt, un, gt
+; P9-NEXT:    fcmpo cr0, f1, f3
+; P9-NEXT:    crnor 4*cr5+gt, un, gt
+; P9-NEXT:    crand 4*cr5+lt, eq, 4*cr5+lt
+; P9-NEXT:    crandc 4*cr5+gt, 4*cr5+gt, eq
+; P9-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
+; P9-NEXT:    isel r3, 0, r3, 4*cr5+lt
+; P9-NEXT:    blr
+;
+; NOVSX-LABEL: fcmps_ole_ppcf128:
+; NOVSX:       # %bb.0:
+; NOVSX-NEXT:    fcmpo cr0, f2, f4
+; NOVSX-NEXT:    fcmpo cr1, f1, f3
+; NOVSX-NEXT:    li r3, 1
+; NOVSX-NEXT:    crnor 4*cr5+lt, un, gt
+; NOVSX-NEXT:    crnor 4*cr5+gt, 4*cr1+un, 4*cr1+gt
+; NOVSX-NEXT:    crand 4*cr5+lt, 4*cr1+eq, 4*cr5+lt
+; NOVSX-NEXT:    crandc 4*cr5+gt, 4*cr5+gt, 4*cr1+eq
+; NOVSX-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
+; NOVSX-NEXT:    isel r3, 0, r3, 4*cr5+lt
+; NOVSX-NEXT:    blr
+  %cmp = call i1 @llvm.experimental.constrained.fcmps.ppcf128(ppc_fp128 %a, ppc_fp128 %b, metadata !"ole", metadata !"fpexcept.strict") #0
+  %conv = zext i1 %cmp to i32
+  ret i32 %conv
+}
+
+define i32 @fcmps_ogt_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
+; P8-LABEL: fcmps_ogt_ppcf128:
+; P8:       # %bb.0:
+; P8-NEXT:    fcmpo cr0, f1, f3
+; P8-NEXT:    fcmpo cr1, f2, f4
+; P8-NEXT:    li r3, 1
+; P8-NEXT:    crand 4*cr5+lt, eq, 4*cr1+gt
+; P8-NEXT:    crandc 4*cr5+gt, gt, eq
+; P8-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
+; P8-NEXT:    isel r3, 0, r3, 4*cr5+lt
+; P8-NEXT:    blr
+;
+; P9-LABEL: fcmps_ogt_ppcf128:
+; P9:       # %bb.0:
+; P9-NEXT:    fcmpo cr0, f1, f3
+; P9-NEXT:    fcmpo cr1, f2, f4
+; P9-NEXT:    li r3, 1
+; P9-NEXT:    crand 4*cr5+lt, eq, 4*cr1+gt
+; P9-NEXT:    crandc 4*cr5+gt, gt, eq
+; P9-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
+; P9-NEXT:    isel r3, 0, r3, 4*cr5+lt
+; P9-NEXT:    blr
+;
+; NOVSX-LABEL: fcmps_ogt_ppcf128:
+; NOVSX:       # %bb.0:
+; NOVSX-NEXT:    fcmpo cr0, f1, f3
+; NOVSX-NEXT:    fcmpo cr1, f2, f4
+; NOVSX-NEXT:    li r3, 1
+; NOVSX-NEXT:    crand 4*cr5+lt, eq, 4*cr1+gt
+; NOVSX-NEXT:    crandc 4*cr5+gt, gt, eq
+; NOVSX-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
+; NOVSX-NEXT:    isel r3, 0, r3, 4*cr5+lt
+; NOVSX-NEXT:    blr
+  %cmp = call i1 @llvm.experimental.constrained.fcmps.ppcf128(ppc_fp128 %a, ppc_fp128 %b, metadata !"ogt", metadata !"fpexcept.strict") #0
+  %conv = zext i1 %cmp to i32
+  ret i32 %conv
+}
+
+define i32 @fcmps_oge_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
+; P8-LABEL: fcmps_oge_ppcf128:
+; P8:       # %bb.0:
+; P8-NEXT:    fcmpo cr0, f2, f4
+; P8-NEXT:    fcmpo cr1, f1, f3
+; P8-NEXT:    li r3, 1
+; P8-NEXT:    crnor 4*cr5+lt, un, lt
+; P8-NEXT:    crnor 4*cr5+gt, 4*cr1+un, 4*cr1+lt
+; P8-NEXT:    crand 4*cr5+lt, 4*cr1+eq, 4*cr5+lt
+; P8-NEXT:    crandc 4*cr5+gt, 4*cr5+gt, 4*cr1+eq
+; P8-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
+; P8-NEXT:    isel r3, 0, r3, 4*cr5+lt
+; P8-NEXT:    blr
+;
+; P9-LABEL: fcmps_oge_ppcf128:
+; P9:       # %bb.0:
+; P9-NEXT:    fcmpo cr0, f2, f4
+; P9-NEXT:    li r3, 1
+; P9-NEXT:    crnor 4*cr5+lt, un, lt
+; P9-NEXT:    fcmpo cr0, f1, f3
+; P9-NEXT:    crnor 4*cr5+gt, un, lt
+; P9-NEXT:    crand 4*cr5+lt, eq, 4*cr5+lt
+; P9-NEXT:    crandc 4*cr5+gt, 4*cr5+gt, eq
+; P9-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
+; P9-NEXT:    isel r3, 0, r3, 4*cr5+lt
+; P9-NEXT:    blr
+;
+; NOVSX-LABEL: fcmps_oge_ppcf128:
+; NOVSX:       # %bb.0:
+; NOVSX-NEXT:    fcmpo cr0, f2, f4
+; NOVSX-NEXT:    fcmpo cr1, f1, f3
+; NOVSX-NEXT:    li r3, 1
+; NOVSX-NEXT:    crnor 4*cr5+lt, un, lt
+; NOVSX-NEXT:    crnor 4*cr5+gt, 4*cr1+un, 4*cr1+lt
+; NOVSX-NEXT:    crand 4*cr5+lt, 4*cr1+eq, 4*cr5+lt
+; NOVSX-NEXT:    crandc 4*cr5+gt, 4*cr5+gt, 4*cr1+eq
+; NOVSX-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
+; NOVSX-NEXT:    isel r3, 0, r3, 4*cr5+lt
+; NOVSX-NEXT:    blr
+  %cmp = call i1 @llvm.experimental.constrained.fcmps.ppcf128(ppc_fp128 %a, ppc_fp128 %b, metadata !"oge", metadata !"fpexcept.strict") #0
+  %conv = zext i1 %cmp to i32
+  ret i32 %conv
+}
+
+define i32 @fcmps_oeq_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
+; P8-LABEL: fcmps_oeq_ppcf128:
+; P8:       # %bb.0:
+; P8-NEXT:    fcmpo cr0, f1, f3
+; P8-NEXT:    fcmpo cr1, f2, f4
+; P8-NEXT:    li r3, 1
+; P8-NEXT:    crand 4*cr5+lt, eq, 4*cr1+eq
+; P8-NEXT:    crandc 4*cr5+gt, eq, eq
+; P8-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
+; P8-NEXT:    isel r3, 0, r3, 4*cr5+lt
+; P8-NEXT:    blr
+;
+; P9-LABEL: fcmps_oeq_ppcf128:
+; P9:       # %bb.0:
+; P9-NEXT:    fcmpo cr0, f1, f3
+; P9-NEXT:    fcmpo cr1, f2, f4
+; P9-NEXT:    li r3, 1
+; P9-NEXT:    crand 4*cr5+lt, eq, 4*cr1+eq
+; P9-NEXT:    crandc 4*cr5+gt, eq, eq
+; P9-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
+; P9-NEXT:    isel r3, 0, r3, 4*cr5+lt
+; P9-NEXT:    blr
+;
+; NOVSX-LABEL: fcmps_oeq_ppcf128:
+; NOVSX:       # %bb.0:
+; NOVSX-NEXT:    fcmpo cr0, f1, f3
+; NOVSX-NEXT:    fcmpo cr1, f2, f4
+; NOVSX-NEXT:    li r3, 1
+; NOVSX-NEXT:    crand 4*cr5+lt, eq, 4*cr1+eq
+; NOVSX-NEXT:    crandc 4*cr5+gt, eq, eq
+; NOVSX-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
+; NOVSX-NEXT:    isel r3, 0, r3, 4*cr5+lt
+; NOVSX-NEXT:    blr
+  %cmp = call i1 @llvm.experimental.constrained.fcmps.ppcf128(ppc_fp128 %a, ppc_fp128 %b, metadata !"oeq", metadata !"fpexcept.strict") #0
+  %conv = zext i1 %cmp to i32
+  ret i32 %conv
+}
+
+define i32 @fcmps_one_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
+; P8-LABEL: fcmps_one_ppcf128:
+; P8:       # %bb.0:
+; P8-NEXT:    fcmpo cr0, f2, f4
+; P8-NEXT:    fcmpo cr1, f1, f3
+; P8-NEXT:    li r3, 1
+; P8-NEXT:    crnor 4*cr5+lt, un, eq
+; P8-NEXT:    crnor 4*cr5+gt, 4*cr1+un, 4*cr1+eq
+; P8-NEXT:    crand 4*cr5+lt, 4*cr1+eq, 4*cr5+lt
+; P8-NEXT:    crandc 4*cr5+gt, 4*cr5+gt, 4*cr1+eq
+; P8-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
+; P8-NEXT:    isel r3, 0, r3, 4*cr5+lt
+; P8-NEXT:    blr
+;
+; P9-LABEL: fcmps_one_ppcf128:
+; P9:       # %bb.0:
+; P9-NEXT:    fcmpo cr0, f2, f4
+; P9-NEXT:    li r3, 1
+; P9-NEXT:    crnor 4*cr5+lt, un, eq
+; P9-NEXT:    fcmpo cr0, f1, f3
+; P9-NEXT:    crnor 4*cr5+gt, un, eq
+; P9-NEXT:    crand 4*cr5+lt, eq, 4*cr5+lt
+; P9-NEXT:    crandc 4*cr5+gt, 4*cr5+gt, eq
+; P9-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
+; P9-NEXT:    isel r3, 0, r3, 4*cr5+lt
+; P9-NEXT:    blr
+;
+; NOVSX-LABEL: fcmps_one_ppcf128:
+; NOVSX:       # %bb.0:
+; NOVSX-NEXT:    fcmpo cr0, f2, f4
+; NOVSX-NEXT:    fcmpo cr1, f1, f3
+; NOVSX-NEXT:    li r3, 1
+; NOVSX-NEXT:    crnor 4*cr5+lt, un, eq
+; NOVSX-NEXT:    crnor 4*cr5+gt, 4*cr1+un, 4*cr1+eq
+; NOVSX-NEXT:    crand 4*cr5+lt, 4*cr1+eq, 4*cr5+lt
+; NOVSX-NEXT:    crandc 4*cr5+gt, 4*cr5+gt, 4*cr1+eq
+; NOVSX-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
+; NOVSX-NEXT:    isel r3, 0, r3, 4*cr5+lt
+; NOVSX-NEXT:    blr
+  %cmp = call i1 @llvm.experimental.constrained.fcmps.ppcf128(ppc_fp128 %a, ppc_fp128 %b, metadata !"one", metadata !"fpexcept.strict") #0
+  %conv = zext i1 %cmp to i32
+  ret i32 %conv
+}
+
+define i32 @fcmps_ult_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
+; P8-LABEL: fcmps_ult_ppcf128:
+; P8:       # %bb.0:
+; P8-NEXT:    fcmpo cr0, f2, f4
+; P8-NEXT:    fcmpo cr1, f1, f3
+; P8-NEXT:    li r3, 1
+; P8-NEXT:    cror 4*cr5+lt, lt, un
+; P8-NEXT:    cror 4*cr5+gt, 4*cr1+lt, 4*cr1+un
+; P8-NEXT:    crand 4*cr5+lt, 4*cr1+eq, 4*cr5+lt
+; P8-NEXT:    crandc 4*cr5+gt, 4*cr5+gt, 4*cr1+eq
+; P8-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
+; P8-NEXT:    isel r3, 0, r3, 4*cr5+lt
+; P8-NEXT:    blr
+;
+; P9-LABEL: fcmps_ult_ppcf128:
+; P9:       # %bb.0:
+; P9-NEXT:    fcmpo cr0, f1, f3
+; P9-NEXT:    fcmpo cr1, f2, f4
+; P9-NEXT:    li r3, 1
+; P9-NEXT:    cror 4*cr5+lt, 4*cr1+lt, 4*cr1+un
+; P9-NEXT:    cror 4*cr5+gt, lt, un
+; P9-NEXT:    crand 4*cr5+lt, eq, 4*cr5+lt
+; P9-NEXT:    crandc 4*cr5+gt, 4*cr5+gt, eq
+; P9-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
+; P9-NEXT:    isel r3, 0, r3, 4*cr5+lt
+; P9-NEXT:    blr
+;
+; NOVSX-LABEL: fcmps_ult_ppcf128:
+; NOVSX:       # %bb.0:
+; NOVSX-NEXT:    fcmpo cr0, f2, f4
+; NOVSX-NEXT:    fcmpo cr1, f1, f3
+; NOVSX-NEXT:    li r3, 1
+; NOVSX-NEXT:    cror 4*cr5+lt, lt, un
+; NOVSX-NEXT:    cror 4*cr5+gt, 4*cr1+lt, 4*cr1+un
+; NOVSX-NEXT:    crand 4*cr5+lt, 4*cr1+eq, 4*cr5+lt
+; NOVSX-NEXT:    crandc 4*cr5+gt, 4*cr5+gt, 4*cr1+eq
+; NOVSX-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
+; NOVSX-NEXT:    isel r3, 0, r3, 4*cr5+lt
+; NOVSX-NEXT:    blr
+  %cmp = call i1 @llvm.experimental.constrained.fcmps.ppcf128(ppc_fp128 %a, ppc_fp128 %b, metadata !"ult", metadata !"fpexcept.strict") #0
+  %conv = zext i1 %cmp to i32
+  ret i32 %conv
+}
+
+define i32 @fcmps_ule_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
+; P8-LABEL: fcmps_ule_ppcf128:
+; P8:       # %bb.0:
+; P8-NEXT:    fcmpo cr0, f2, f4
+; P8-NEXT:    fcmpo cr1, f1, f3
+; P8-NEXT:    li r3, 1
+; P8-NEXT:    crandc 4*cr5+lt, 4*cr1+eq, gt
+; P8-NEXT:    crnor 4*cr5+gt, 4*cr1+gt, 4*cr1+eq
+; P8-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
+; P8-NEXT:    isel r3, 0, r3, 4*cr5+lt
+; P8-NEXT:    blr
+;
+; P9-LABEL: fcmps_ule_ppcf128:
+; P9:       # %bb.0:
+; P9-NEXT:    fcmpo cr0, f2, f4
+; P9-NEXT:    fcmpo cr1, f1, f3
+; P9-NEXT:    li r3, 1
+; P9-NEXT:    crandc 4*cr5+lt, 4*cr1+eq, gt
+; P9-NEXT:    crnor 4*cr5+gt, 4*cr1+gt, 4*cr1+eq
+; P9-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
+; P9-NEXT:    isel r3, 0, r3, 4*cr5+lt
+; P9-NEXT:    blr
+;
+; NOVSX-LABEL: fcmps_ule_ppcf128:
+; NOVSX:       # %bb.0:
+; NOVSX-NEXT:    fcmpo cr0, f2, f4
+; NOVSX-NEXT:    fcmpo cr1, f1, f3
+; NOVSX-NEXT:    li r3, 1
+; NOVSX-NEXT:    crandc 4*cr5+lt, 4*cr1+eq, gt
+; NOVSX-NEXT:    crnor 4*cr5+gt, 4*cr1+gt, 4*cr1+eq
+; NOVSX-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
+; NOVSX-NEXT:    isel r3, 0, r3, 4*cr5+lt
+; NOVSX-NEXT:    blr
+  %cmp = call i1 @llvm.experimental.constrained.fcmps.ppcf128(ppc_fp128 %a, ppc_fp128 %b, metadata !"ule", metadata !"fpexcept.strict") #0
+  %conv = zext i1 %cmp to i32
+  ret i32 %conv
+}
+
+define i32 @fcmps_ugt_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
+; P8-LABEL: fcmps_ugt_ppcf128:
+; P8:       # %bb.0:
+; P8-NEXT:    fcmpo cr0, f2, f4
+; P8-NEXT:    fcmpo cr1, f1, f3
+; P8-NEXT:    li r3, 1
+; P8-NEXT:    cror 4*cr5+lt, gt, un
+; P8-NEXT:    cror 4*cr5+gt, 4*cr1+gt, 4*cr1+un
+; P8-NEXT:    crand 4*cr5+lt, 4*cr1+eq, 4*cr5+lt
+; P8-NEXT:    crandc 4*cr5+gt, 4*cr5+gt, 4*cr1+eq
+; P8-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
+; P8-NEXT:    isel r3, 0, r3, 4*cr5+lt
+; P8-NEXT:    blr
+;
+; P9-LABEL: fcmps_ugt_ppcf128:
+; P9:       # %bb.0:
+; P9-NEXT:    fcmpo cr0, f1, f3
+; P9-NEXT:    fcmpo cr1, f2, f4
+; P9-NEXT:    li r3, 1
+; P9-NEXT:    cror 4*cr5+lt, 4*cr1+gt, 4*cr1+un
+; P9-NEXT:    cror 4*cr5+gt, gt, un
+; P9-NEXT:    crand 4*cr5+lt, eq, 4*cr5+lt
+; P9-NEXT:    crandc 4*cr5+gt, 4*cr5+gt, eq
+; P9-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
+; P9-NEXT:    isel r3, 0, r3, 4*cr5+lt
+; P9-NEXT:    blr
+;
+; NOVSX-LABEL: fcmps_ugt_ppcf128:
+; NOVSX:       # %bb.0:
+; NOVSX-NEXT:    fcmpo cr0, f2, f4
+; NOVSX-NEXT:    fcmpo cr1, f1, f3
+; NOVSX-NEXT:    li r3, 1
+; NOVSX-NEXT:    cror 4*cr5+lt, gt, un
+; NOVSX-NEXT:    cror 4*cr5+gt, 4*cr1+gt, 4*cr1+un
+; NOVSX-NEXT:    crand 4*cr5+lt, 4*cr1+eq, 4*cr5+lt
+; NOVSX-NEXT:    crandc 4*cr5+gt, 4*cr5+gt, 4*cr1+eq
+; NOVSX-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
+; NOVSX-NEXT:    isel r3, 0, r3, 4*cr5+lt
+; NOVSX-NEXT:    blr
+  %cmp = call i1 @llvm.experimental.constrained.fcmps.ppcf128(ppc_fp128 %a, ppc_fp128 %b, metadata !"ugt", metadata !"fpexcept.strict") #0
+  %conv = zext i1 %cmp to i32
+  ret i32 %conv
+}
+
+define i32 @fcmps_uge_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
+; P8-LABEL: fcmps_uge_ppcf128:
+; P8:       # %bb.0:
+; P8-NEXT:    fcmpo cr0, f2, f4
+; P8-NEXT:    fcmpo cr1, f1, f3
+; P8-NEXT:    li r3, 1
+; P8-NEXT:    crandc 4*cr5+lt, 4*cr1+eq, lt
+; P8-NEXT:    crnor 4*cr5+gt, 4*cr1+lt, 4*cr1+eq
+; P8-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
+; P8-NEXT:    isel r3, 0, r3, 4*cr5+lt
+; P8-NEXT:    blr
+;
+; P9-LABEL: fcmps_uge_ppcf128:
+; P9:       # %bb.0:
+; P9-NEXT:    fcmpo cr0, f2, f4
+; P9-NEXT:    fcmpo cr1, f1, f3
+; P9-NEXT:    li r3, 1
+; P9-NEXT:    crandc 4*cr5+lt, 4*cr1+eq, lt
+; P9-NEXT:    crnor 4*cr5+gt, 4*cr1+lt, 4*cr1+eq
+; P9-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
+; P9-NEXT:    isel r3, 0, r3, 4*cr5+lt
+; P9-NEXT:    blr
+;
+; NOVSX-LABEL: fcmps_uge_ppcf128:
+; NOVSX:       # %bb.0:
+; NOVSX-NEXT:    fcmpo cr0, f2, f4
+; NOVSX-NEXT:    fcmpo cr1, f1, f3
+; NOVSX-NEXT:    li r3, 1
+; NOVSX-NEXT:    crandc 4*cr5+lt, 4*cr1+eq, lt
+; NOVSX-NEXT:    crnor 4*cr5+gt, 4*cr1+lt, 4*cr1+eq
+; NOVSX-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
+; NOVSX-NEXT:    isel r3, 0, r3, 4*cr5+lt
+; NOVSX-NEXT:    blr
+  %cmp = call i1 @llvm.experimental.constrained.fcmps.ppcf128(ppc_fp128 %a, ppc_fp128 %b, metadata !"uge", metadata !"fpexcept.strict") #0
+  %conv = zext i1 %cmp to i32
+  ret i32 %conv
+}
+
+define i32 @fcmps_ueq_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
+; P8-LABEL: fcmps_ueq_ppcf128:
+; P8:       # %bb.0:
+; P8-NEXT:    fcmpo cr0, f2, f4
+; P8-NEXT:    fcmpo cr1, f1, f3
+; P8-NEXT:    li r3, 1
+; P8-NEXT:    cror 4*cr5+lt, eq, un
+; P8-NEXT:    cror 4*cr5+gt, 4*cr1+eq, 4*cr1+un
+; P8-NEXT:    crand 4*cr5+lt, 4*cr1+eq, 4*cr5+lt
+; P8-NEXT:    crandc 4*cr5+gt, 4*cr5+gt, 4*cr1+eq
+; P8-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
+; P8-NEXT:    isel r3, 0, r3, 4*cr5+lt
+; P8-NEXT:    blr
+;
+; P9-LABEL: fcmps_ueq_ppcf128:
+; P9:       # %bb.0:
+; P9-NEXT:    fcmpo cr0, f1, f3
+; P9-NEXT:    fcmpo cr1, f2, f4
+; P9-NEXT:    li r3, 1
+; P9-NEXT:    cror 4*cr5+lt, 4*cr1+eq, 4*cr1+un
+; P9-NEXT:    cror 4*cr5+gt, eq, un
+; P9-NEXT:    crand 4*cr5+lt, eq, 4*cr5+lt
+; P9-NEXT:    crandc 4*cr5+gt, 4*cr5+gt, eq
+; P9-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
+; P9-NEXT:    isel r3, 0, r3, 4*cr5+lt
+; P9-NEXT:    blr
+;
+; NOVSX-LABEL: fcmps_ueq_ppcf128:
+; NOVSX:       # %bb.0:
+; NOVSX-NEXT:    fcmpo cr0, f2, f4
+; NOVSX-NEXT:    fcmpo cr1, f1, f3
+; NOVSX-NEXT:    li r3, 1
+; NOVSX-NEXT:    cror 4*cr5+lt, eq, un
+; NOVSX-NEXT:    cror 4*cr5+gt, 4*cr1+eq, 4*cr1+un
+; NOVSX-NEXT:    crand 4*cr5+lt, 4*cr1+eq, 4*cr5+lt
+; NOVSX-NEXT:    crandc 4*cr5+gt, 4*cr5+gt, 4*cr1+eq
+; NOVSX-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
+; NOVSX-NEXT:    isel r3, 0, r3, 4*cr5+lt
+; NOVSX-NEXT:    blr
+  %cmp = call i1 @llvm.experimental.constrained.fcmps.ppcf128(ppc_fp128 %a, ppc_fp128 %b, metadata !"ueq", metadata !"fpexcept.strict") #0
+  %conv = zext i1 %cmp to i32
+  ret i32 %conv
+}
+
+define i32 @fcmps_une_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
+; P8-LABEL: fcmps_une_ppcf128:
+; P8:       # %bb.0:
+; P8-NEXT:    fcmpo cr0, f2, f4
+; P8-NEXT:    fcmpo cr1, f1, f3
+; P8-NEXT:    li r3, 1
+; P8-NEXT:    crandc 4*cr5+lt, 4*cr1+eq, eq
+; P8-NEXT:    crandc 4*cr5+lt, 4*cr1+eq, 4*cr5+lt
+; P8-NEXT:    isel r3, 0, r3, 4*cr5+lt
+; P8-NEXT:    blr
+;
+; P9-LABEL: fcmps_une_ppcf128:
+; P9:       # %bb.0:
+; P9-NEXT:    fcmpo cr0, f2, f4
+; P9-NEXT:    fcmpo cr1, f1, f3
+; P9-NEXT:    li r3, 1
+; P9-NEXT:    crandc 4*cr5+lt, 4*cr1+eq, eq
+; P9-NEXT:    crandc 4*cr5+lt, 4*cr1+eq, 4*cr5+lt
+; P9-NEXT:    isel r3, 0, r3, 4*cr5+lt
+; P9-NEXT:    blr
+;
+; NOVSX-LABEL: fcmps_une_ppcf128:
+; NOVSX:       # %bb.0:
+; NOVSX-NEXT:    fcmpo cr0, f2, f4
+; NOVSX-NEXT:    fcmpo cr1, f1, f3
+; NOVSX-NEXT:    li r3, 1
+; NOVSX-NEXT:    crandc 4*cr5+lt, 4*cr1+eq, eq
+; NOVSX-NEXT:    crandc 4*cr5+lt, 4*cr1+eq, 4*cr5+lt
+; NOVSX-NEXT:    isel r3, 0, r3, 4*cr5+lt
+; NOVSX-NEXT:    blr
+  %cmp = call i1 @llvm.experimental.constrained.fcmps.ppcf128(ppc_fp128 %a, ppc_fp128 %b, metadata !"une", metadata !"fpexcept.strict") #0
+  %conv = zext i1 %cmp to i32
+  ret i32 %conv
+}
+
 attributes #0 = { strictfp nounwind }
 
 declare i1 @llvm.experimental.constrained.fcmp.f32(float, float, metadata, metadata)
@@ -2697,3 +3675,5 @@
 declare i1 @llvm.experimental.constrained.fcmps.f64(double, double, metadata, metadata)
 declare i1 @llvm.experimental.constrained.fcmps.f128(fp128, fp128, metadata, metadata)
 declare i1 @llvm.experimental.constrained.fcmp.f128(fp128, fp128, metadata, metadata)
+declare i1 @llvm.experimental.constrained.fcmps.ppcf128(ppc_fp128, ppc_fp128, metadata, metadata)
+declare i1 @llvm.experimental.constrained.fcmp.ppcf128(ppc_fp128, ppc_fp128, metadata, metadata)