diff --git a/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp b/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
--- a/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
+++ b/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
@@ -282,14 +282,17 @@
 
     switch (ExtraCode[0]) {
     default: return true;  // Unknown modifier.
-    case 'y': {            // A memory reference for an X-form instruction
+    case 'L': // A memory reference to the upper word of a double word op.
+      O << getDataLayout().getPointerSize() << "(";
+      printOperand(MI, OpNo, O);
+      O << ")";
+      return false;
+    case 'y': // A memory reference for an X-form instruction
       O << "0, ";
       printOperand(MI, OpNo, O);
       return false;
-    }
     case 'U': // Print 'u' for update form.
     case 'X': // Print 'x' for indexed form.
-    {
       // FIXME: Currently for PowerPC memory operands are always loaded
       // into a register, so we never get an update or indexed form.
       // This is bad even for offset forms, since even if we know we
@@ -299,7 +302,6 @@
       assert(MI->getOperand(OpNo).isReg());
       return false;
     }
-    }
   }
 
   assert(MI->getOperand(OpNo).isReg());
diff --git a/llvm/test/CodeGen/PowerPC/inlineasm-output-template.ll b/llvm/test/CodeGen/PowerPC/inlineasm-output-template.ll
--- a/llvm/test/CodeGen/PowerPC/inlineasm-output-template.ll
+++ b/llvm/test/CodeGen/PowerPC/inlineasm-output-template.ll
@@ -1,4 +1,5 @@
-; RUN: llc -mtriple=ppc32-- < %s | FileCheck %s
+; RUN: llc -mtriple=ppc32 < %s | FileCheck %s
+; RUN: llc -mtriple=ppc64 < %s | FileCheck %s --check-prefix=PPC64
 
 ; Test that %c works with immediates
 ; CHECK-LABEL: test_inlineasm_c_output_template0
@@ -24,3 +25,13 @@
   tail call void asm sideeffect "#TEST ${0:n}", "i"(i32 42)
   ret i32 42
 }
+
+; Test that the machine specific %L works with memory operands.
+; CHECK-LABEL: test_inlineasm_L_output_template
+; CHECK: # 4(5)
+; PPC64-LABEL: test_inlineasm_L_output_template
+; PPC64: # 8(4)
+define dso_local void @test_inlineasm_L_output_template(i64 %0, i64* %1) {
+  tail call void asm sideeffect "# ${0:L}", "*m"(i64* %1)
+  ret void
+}