diff --git a/compiler-rt/lib/msan/msan.cpp b/compiler-rt/lib/msan/msan.cpp --- a/compiler-rt/lib/msan/msan.cpp +++ b/compiler-rt/lib/msan/msan.cpp @@ -380,6 +380,28 @@ Die(); } +void __msan_warning_with_origin(u32 origin) { + GET_CALLER_PC_BP_SP; + (void)sp; + PrintWarningWithOrigin(pc, bp, origin); + if (__msan::flags()->halt_on_error) { + if (__msan::flags()->print_stats) + ReportStats(); + Printf("Exiting\n"); + Die(); + } +} + +void __msan_warning_with_origin_noreturn(u32 origin) { + GET_CALLER_PC_BP_SP; + (void)sp; + PrintWarningWithOrigin(pc, bp, origin); + if (__msan::flags()->print_stats) + ReportStats(); + Printf("Exiting\n"); + Die(); +} + static void OnStackUnwind(const SignalContext &sig, const void *, BufferedStackTrace *stack) { stack->Unwind(StackTrace::GetNextInstructionPc(sig.pc), sig.bp, sig.context, diff --git a/compiler-rt/lib/msan/msan_interface_internal.h b/compiler-rt/lib/msan/msan_interface_internal.h --- a/compiler-rt/lib/msan/msan_interface_internal.h +++ b/compiler-rt/lib/msan/msan_interface_internal.h @@ -46,6 +46,12 @@ using __sanitizer::u16; using __sanitizer::u8; +// Versions of the above which take Origin as a parameter +SANITIZER_INTERFACE_ATTRIBUTE +void __msan_warning_with_origin(u32 origin); +SANITIZER_INTERFACE_ATTRIBUTE __attribute__((noreturn)) void +__msan_warning_with_origin_noreturn(u32 origin); + SANITIZER_INTERFACE_ATTRIBUTE void __msan_maybe_warning_1(u8 s, u32 o); SANITIZER_INTERFACE_ATTRIBUTE diff --git a/llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp b/llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp --- a/llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp +++ b/llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp @@ -543,10 +543,6 @@ /// (x86_64-specific). Value *VAArgOverflowSizeTLS; - /// Thread-local space used to pass origin value to the UMR reporting - /// function. - Value *OriginTLS; - /// Are the instrumentation callbacks set up? bool CallbacksInitialized = false; @@ -715,10 +711,7 @@ VAArgTLS = nullptr; VAArgOriginTLS = nullptr; VAArgOverflowSizeTLS = nullptr; - // OriginTLS is unused in the kernel. - OriginTLS = nullptr; - // __msan_warning() in the kernel takes an origin. WarningFn = M.getOrInsertFunction("__msan_warning", IRB.getVoidTy(), IRB.getInt32Ty()); // Requests the per-task context state (kmsan_context_state*) from the @@ -773,12 +766,14 @@ /// Insert declarations for userspace-specific functions and globals. void MemorySanitizer::createUserspaceApi(Module &M) { IRBuilder<> IRB(*C); + // Create the callback. // FIXME: this function should have "Cold" calling conv, // which is not yet implemented. - StringRef WarningFnName = Recover ? "__msan_warning" - : "__msan_warning_noreturn"; - WarningFn = M.getOrInsertFunction(WarningFnName, IRB.getVoidTy()); + StringRef WarningFnName = Recover ? "__msan_warning_with_origin" + : "__msan_warning_with_origin_noreturn"; + WarningFn = + M.getOrInsertFunction(WarningFnName, IRB.getVoidTy(), IRB.getInt32Ty()); // Create the global TLS variables. RetvalTLS = @@ -805,7 +800,6 @@ VAArgOverflowSizeTLS = getOrInsertGlobal(M, "__msan_va_arg_overflow_size_tls", IRB.getInt64Ty()); - OriginTLS = getOrInsertGlobal(M, "__msan_origin_tls", IRB.getInt32Ty()); for (size_t AccessSizeIndex = 0; AccessSizeIndex < kNumberOfAccessSizes; AccessSizeIndex++) { @@ -1216,14 +1210,8 @@ void insertWarningFn(IRBuilder<> &IRB, Value *Origin) { if (!Origin) Origin = (Value *)IRB.getInt32(0); - if (MS.CompileKernel) { - IRB.CreateCall(MS.WarningFn, Origin); - } else { - if (MS.TrackOrigins) { - IRB.CreateStore(Origin, MS.OriginTLS); - } - IRB.CreateCall(MS.WarningFn, {}); - } + assert(Origin->getType()->isIntegerTy()); + IRB.CreateCall(MS.WarningFn, Origin); IRB.CreateCall(MS.EmptyAsm, {}); // FIXME: Insert UnreachableInst if !MS.Recover? // This may invalidate some of the following checks and needs to be done diff --git a/llvm/test/Instrumentation/MemorySanitizer/atomics.ll b/llvm/test/Instrumentation/MemorySanitizer/atomics.ll --- a/llvm/test/Instrumentation/MemorySanitizer/atomics.ll +++ b/llvm/test/Instrumentation/MemorySanitizer/atomics.ll @@ -54,7 +54,7 @@ ; CHECK: store { i32, i1 } zeroinitializer, ; CHECK: icmp ; CHECK: br -; CHECK: @__msan_warning +; CHECK: @__msan_warning_with_origin ; CHECK: cmpxchg {{.*}} seq_cst seq_cst ; CHECK: store i32 0, {{.*}} @__msan_retval_tls ; CHECK: ret i32 @@ -73,7 +73,7 @@ ; CHECK: store { i32, i1 } zeroinitializer, ; CHECK: icmp ; CHECK: br -; CHECK: @__msan_warning +; CHECK: @__msan_warning_with_origin ; CHECK: cmpxchg {{.*}} release monotonic ; CHECK: store i32 0, {{.*}} @__msan_retval_tls ; CHECK: ret i32 diff --git a/llvm/test/Instrumentation/MemorySanitizer/check-constant-shadow.ll b/llvm/test/Instrumentation/MemorySanitizer/check-constant-shadow.ll --- a/llvm/test/Instrumentation/MemorySanitizer/check-constant-shadow.ll +++ b/llvm/test/Instrumentation/MemorySanitizer/check-constant-shadow.ll @@ -14,7 +14,7 @@ } ; CHECK-LABEL: @main -; CHECK: call void @__msan_warning_noreturn +; CHECK: call void @__msan_warning_with_origin_noreturn ; CHECK: ret i32 undef diff --git a/llvm/test/Instrumentation/MemorySanitizer/check_access_address.ll b/llvm/test/Instrumentation/MemorySanitizer/check_access_address.ll --- a/llvm/test/Instrumentation/MemorySanitizer/check_access_address.ll +++ b/llvm/test/Instrumentation/MemorySanitizer/check_access_address.ll @@ -45,7 +45,7 @@ ; CHECK: icmp ; CHECK: br i1 ; CHECK: {{^[0-9]+}}: -; CHECK: call void @__msan_warning_noreturn +; CHECK: call void @__msan_warning_with_origin_noreturn ; CHECK: {{^[0-9]+}}: ; CHECK: xor ; CHECK: store diff --git a/llvm/test/Instrumentation/MemorySanitizer/csr.ll b/llvm/test/Instrumentation/MemorySanitizer/csr.ll --- a/llvm/test/Instrumentation/MemorySanitizer/csr.ll +++ b/llvm/test/Instrumentation/MemorySanitizer/csr.ll @@ -28,7 +28,7 @@ ; ADDR: %[[A:.*]] = load i64, i64* getelementptr inbounds {{.*}} @__msan_param_tls, i32 0, i32 0), align 8 ; ADDR: %[[B:.*]] = icmp ne i64 %[[A]], 0 ; ADDR: br i1 %[[B]], label {{.*}}, label -; ADDR: call void @__msan_warning_noreturn() +; ADDR: call void @__msan_warning_with_origin_noreturn(i32 0) ; ADDR: call void @llvm.x86.sse.stmxcsr( ; ADDR: ret void @@ -44,7 +44,7 @@ ; CHECK: %[[A:.*]] = load i32, i32* %{{.*}}, align 1 ; CHECK: %[[B:.*]] = icmp ne i32 %[[A]], 0 ; CHECK: br i1 %[[B]], label {{.*}}, label -; CHECK: call void @__msan_warning_noreturn() +; CHECK: call void @__msan_warning_with_origin_noreturn(i32 0) ; CHECK: call void @llvm.x86.sse.ldmxcsr( ; CHECK: ret void @@ -52,6 +52,6 @@ ; ADDR: %[[A:.*]] = load i64, i64* getelementptr inbounds {{.*}} @__msan_param_tls, i32 0, i32 0), align 8 ; ADDR: %[[B:.*]] = icmp ne i64 %[[A]], 0 ; ADDR: br i1 %[[B]], label {{.*}}, label -; ADDR: call void @__msan_warning_noreturn() +; ADDR: call void @__msan_warning_with_origin_noreturn(i32 0) ; ADDR: call void @llvm.x86.sse.ldmxcsr( ; ADDR: ret void diff --git a/llvm/test/Instrumentation/MemorySanitizer/masked-store-load.ll b/llvm/test/Instrumentation/MemorySanitizer/masked-store-load.ll --- a/llvm/test/Instrumentation/MemorySanitizer/masked-store-load.ll +++ b/llvm/test/Instrumentation/MemorySanitizer/masked-store-load.ll @@ -54,12 +54,12 @@ ; ADDR: %[[ADDRBAD:.*]] = icmp ne i64 %[[ADDRSHADOW]], 0 ; ADDR: br i1 %[[ADDRBAD]], label {{.*}}, label {{.*}} -; ADDR: call void @__msan_warning_noreturn() +; ADDR: call void @__msan_warning_with_origin_noreturn(i32 0) ; ADDR: %[[MASKSHADOWFLAT:.*]] = bitcast <4 x i1> %[[MASKSHADOW]] to i4 ; ADDR: %[[MASKBAD:.*]] = icmp ne i4 %[[MASKSHADOWFLAT]], 0 ; ADDR: br i1 %[[MASKBAD]], label {{.*}}, label {{.*}} -; ADDR: call void @__msan_warning_noreturn() +; ADDR: call void @__msan_warning_with_origin_noreturn(i32 0) ; ADDR: tail call void @llvm.masked.store.v4i64.p0v4i64(<4 x i64> %v, <4 x i64>* %p, i32 1, <4 x i1> %mask) ; ADDR: ret void @@ -94,12 +94,12 @@ ; ADDR: %[[ADDRBAD:.*]] = icmp ne i64 %[[ADDRSHADOW]], 0 ; ADDR: br i1 %[[ADDRBAD]], label {{.*}}, label {{.*}} -; ADDR: call void @__msan_warning_noreturn() +; ADDR: call void @__msan_warning_with_origin_noreturn(i32 0) ; ADDR: %[[MASKSHADOWFLAT:.*]] = bitcast <4 x i1> %[[MASKSHADOW]] to i4 ; ADDR: %[[MASKBAD:.*]] = icmp ne i4 %[[MASKSHADOWFLAT]], 0 ; ADDR: br i1 %[[MASKBAD]], label {{.*}}, label {{.*}} -; ADDR: call void @__msan_warning_noreturn() +; ADDR: call void @__msan_warning_with_origin_noreturn(i32 0) ; ADDR: = call <4 x double> @llvm.masked.load.v4f64.p0v4f64(<4 x double>* %p, i32 1, <4 x i1> %mask, <4 x double> %v) ; ADDR: ret <4 x double> diff --git a/llvm/test/Instrumentation/MemorySanitizer/msan_basic.ll b/llvm/test/Instrumentation/MemorySanitizer/msan_basic.ll --- a/llvm/test/Instrumentation/MemorySanitizer/msan_basic.ll +++ b/llvm/test/Instrumentation/MemorySanitizer/msan_basic.ll @@ -23,7 +23,6 @@ ; CHECK: @__msan_param_origin_tls = external thread_local(initialexec) global [{{.*}}] ; CHECK: @__msan_va_arg_tls = external thread_local(initialexec) global [{{.*}}] ; CHECK: @__msan_va_arg_overflow_size_tls = external thread_local(initialexec) global i64 -; CHECK: @__msan_origin_tls = external thread_local(initialexec) global i32 ; Check instrumentation of stores @@ -72,7 +71,7 @@ ; CHECK: ret void -; load followed by cmp: check that we load the shadow and call __msan_warning. +; load followed by cmp: check that we load the shadow and call __msan_warning_with_origin. define void @LoadAndCmp(i32* nocapture %a) nounwind uwtable sanitize_memory { entry: %0 = load i32, i32* %a, align 4 @@ -90,11 +89,15 @@ declare void @foo(...) ; CHECK-LABEL: @LoadAndCmp +; CHECK: %0 = load i32, ; CHECK: = load -; CHECK: = load -; CHECK: call void @__msan_warning_noreturn() +; CHECK-ORIGINS: %[[ORIGIN:.*]] = load +; CHECK: call void @__msan_warning_with_origin_noreturn(i32 +; CHECK-ORIGINS-SAME %[[ORIGIN]]) +; CHECK-CONT: ; CHECK-NEXT: call void asm sideeffect ; CHECK-NEXT: unreachable +; CHECK: br i1 %tobool ; CHECK: ret void ; Check that we store the shadow for the retval. @@ -417,7 +420,7 @@ ; CHECK-LABEL: @Div ; CHECK: icmp -; CHECK: call void @__msan_warning +; CHECK: call void @__msan_warning_with_origin ; CHECK-NOT: icmp ; CHECK: udiv ; CHECK-NOT: icmp @@ -464,9 +467,9 @@ ; CHECK-LABEL: @ICmpSLTZero ; CHECK: icmp slt -; CHECK-NOT: call void @__msan_warning +; CHECK-NOT: call void @__msan_warning_with_origin ; CHECK: icmp slt -; CHECK-NOT: call void @__msan_warning +; CHECK-NOT: call void @__msan_warning_with_origin ; CHECK: ret i1 define zeroext i1 @ICmpSGEZero(i32 %x) nounwind uwtable readnone sanitize_memory { @@ -476,9 +479,9 @@ ; CHECK-LABEL: @ICmpSGEZero ; CHECK: icmp slt -; CHECK-NOT: call void @__msan_warning +; CHECK-NOT: call void @__msan_warning_with_origin ; CHECK: icmp sge -; CHECK-NOT: call void @__msan_warning +; CHECK-NOT: call void @__msan_warning_with_origin ; CHECK: ret i1 define zeroext i1 @ICmpSGTZero(i32 %x) nounwind uwtable readnone sanitize_memory { @@ -488,9 +491,9 @@ ; CHECK-LABEL: @ICmpSGTZero ; CHECK: icmp slt -; CHECK-NOT: call void @__msan_warning +; CHECK-NOT: call void @__msan_warning_with_origin ; CHECK: icmp sgt -; CHECK-NOT: call void @__msan_warning +; CHECK-NOT: call void @__msan_warning_with_origin ; CHECK: ret i1 define zeroext i1 @ICmpSLEZero(i32 %x) nounwind uwtable readnone sanitize_memory { @@ -500,9 +503,9 @@ ; CHECK-LABEL: @ICmpSLEZero ; CHECK: icmp slt -; CHECK-NOT: call void @__msan_warning +; CHECK-NOT: call void @__msan_warning_with_origin ; CHECK: icmp sle -; CHECK-NOT: call void @__msan_warning +; CHECK-NOT: call void @__msan_warning_with_origin ; CHECK: ret i1 @@ -515,9 +518,9 @@ ; CHECK-LABEL: @ICmpSLTAllOnes ; CHECK: icmp slt -; CHECK-NOT: call void @__msan_warning +; CHECK-NOT: call void @__msan_warning_with_origin ; CHECK: icmp slt -; CHECK-NOT: call void @__msan_warning +; CHECK-NOT: call void @__msan_warning_with_origin ; CHECK: ret i1 define zeroext i1 @ICmpSGEAllOnes(i32 %x) nounwind uwtable readnone sanitize_memory { @@ -527,9 +530,9 @@ ; CHECK-LABEL: @ICmpSGEAllOnes ; CHECK: icmp slt -; CHECK-NOT: call void @__msan_warning +; CHECK-NOT: call void @__msan_warning_with_origin ; CHECK: icmp sge -; CHECK-NOT: call void @__msan_warning +; CHECK-NOT: call void @__msan_warning_with_origin ; CHECK: ret i1 define zeroext i1 @ICmpSGTAllOnes(i32 %x) nounwind uwtable readnone sanitize_memory { @@ -539,9 +542,9 @@ ; CHECK-LABEL: @ICmpSGTAllOnes ; CHECK: icmp slt -; CHECK-NOT: call void @__msan_warning +; CHECK-NOT: call void @__msan_warning_with_origin ; CHECK: icmp sgt -; CHECK-NOT: call void @__msan_warning +; CHECK-NOT: call void @__msan_warning_with_origin ; CHECK: ret i1 define zeroext i1 @ICmpSLEAllOnes(i32 %x) nounwind uwtable readnone sanitize_memory { @@ -551,9 +554,9 @@ ; CHECK-LABEL: @ICmpSLEAllOnes ; CHECK: icmp slt -; CHECK-NOT: call void @__msan_warning +; CHECK-NOT: call void @__msan_warning_with_origin ; CHECK: icmp sle -; CHECK-NOT: call void @__msan_warning +; CHECK-NOT: call void @__msan_warning_with_origin ; CHECK: ret i1 @@ -567,9 +570,9 @@ ; CHECK-LABEL: @ICmpSLT_vector_Zero ; CHECK: icmp slt <2 x i64> -; CHECK-NOT: call void @__msan_warning +; CHECK-NOT: call void @__msan_warning_with_origin ; CHECK: icmp slt <2 x i32*> -; CHECK-NOT: call void @__msan_warning +; CHECK-NOT: call void @__msan_warning_with_origin ; CHECK: ret <2 x i1> ; Check that we propagate shadow for x<=-1, x>0, etc (i.e. sign bit tests) @@ -582,9 +585,9 @@ ; CHECK-LABEL: @ICmpSLT_vector_AllOnes ; CHECK: icmp slt <2 x i32> -; CHECK-NOT: call void @__msan_warning +; CHECK-NOT: call void @__msan_warning_with_origin ; CHECK: icmp slt <2 x i32> -; CHECK-NOT: call void @__msan_warning +; CHECK-NOT: call void @__msan_warning_with_origin ; CHECK: ret <2 x i1> @@ -599,11 +602,11 @@ ; CHECK-LABEL: @ICmpUGTConst ; CHECK: icmp ugt i32 -; CHECK-NOT: call void @__msan_warning +; CHECK-NOT: call void @__msan_warning_with_origin ; CHECK: icmp ugt i32 -; CHECK-NOT: call void @__msan_warning +; CHECK-NOT: call void @__msan_warning_with_origin ; CHECK: icmp ugt i32 -; CHECK-NOT: call void @__msan_warning +; CHECK-NOT: call void @__msan_warning_with_origin ; CHECK: ret i1 @@ -645,7 +648,7 @@ ; CHECK-LABEL: @ExtractElement ; CHECK: extractelement -; CHECK: call void @__msan_warning +; CHECK: call void @__msan_warning_with_origin ; CHECK: extractelement ; CHECK: ret i32 @@ -656,7 +659,7 @@ ; CHECK-LABEL: @InsertElement ; CHECK: insertelement -; CHECK: call void @__msan_warning +; CHECK: call void @__msan_warning_with_origin ; CHECK: insertelement ; CHECK: ret <4 x i32> @@ -668,7 +671,7 @@ ; CHECK-LABEL: @ShuffleVector ; CHECK: shufflevector -; CHECK-NOT: call void @__msan_warning +; CHECK-NOT: call void @__msan_warning_with_origin ; CHECK: shufflevector ; CHECK: ret <4 x i32> @@ -682,11 +685,11 @@ declare i32 @llvm.bswap.i32(i32) nounwind readnone ; CHECK-LABEL: @BSwap -; CHECK-NOT: call void @__msan_warning +; CHECK-NOT: call void @__msan_warning_with_origin ; CHECK: @llvm.bswap.i32 -; CHECK-NOT: call void @__msan_warning +; CHECK-NOT: call void @__msan_warning_with_origin ; CHECK: @llvm.bswap.i32 -; CHECK-NOT: call void @__msan_warning +; CHECK-NOT: call void @__msan_warning_with_origin ; CHECK: ret i32 ; Test handling of vectors of pointers. @@ -752,7 +755,7 @@ } ; CHECK-LABEL: @VolatileStore -; CHECK-NOT: @__msan_warning +; CHECK-NOT: @__msan_warning_with_origin ; CHECK: ret void @@ -775,9 +778,9 @@ declare void @bar() ; CHECK-LABEL: @NoSanitizeMemory -; CHECK-NOT: @__msan_warning +; CHECK-NOT: @__msan_warning_with_origin ; CHECK: store i32 0, {{.*}} @__msan_retval_tls -; CHECK-NOT: @__msan_warning +; CHECK-NOT: @__msan_warning_with_origin ; CHECK: ret i32 diff --git a/llvm/test/Instrumentation/MemorySanitizer/msan_llvm_is_constant.ll b/llvm/test/Instrumentation/MemorySanitizer/msan_llvm_is_constant.ll --- a/llvm/test/Instrumentation/MemorySanitizer/msan_llvm_is_constant.ll +++ b/llvm/test/Instrumentation/MemorySanitizer/msan_llvm_is_constant.ll @@ -18,7 +18,7 @@ } ; CHECK-LABEL: bar -; CHECK-NOT: call void @__msan_warning +; CHECK-NOT: call void @__msan_warning_with_origin ; Function Attrs: nounwind readnone declare i1 @llvm.is.constant.i32(i32) diff --git a/llvm/test/Instrumentation/MemorySanitizer/msan_llvm_launder_invariant.ll b/llvm/test/Instrumentation/MemorySanitizer/msan_llvm_launder_invariant.ll --- a/llvm/test/Instrumentation/MemorySanitizer/msan_llvm_launder_invariant.ll +++ b/llvm/test/Instrumentation/MemorySanitizer/msan_llvm_launder_invariant.ll @@ -25,7 +25,7 @@ ret %class.Foo* %retval.0 } -; CHECK-NOT: call void @__msan_warning_noreturn +; CHECK-NOT: call void @__msan_warning_with_origin_noreturn declare dso_local zeroext i1 @_Z2f1PPvb(i8**, i1 zeroext) local_unnamed_addr diff --git a/llvm/test/Instrumentation/MemorySanitizer/msan_llvm_strip_invariant.ll b/llvm/test/Instrumentation/MemorySanitizer/msan_llvm_strip_invariant.ll --- a/llvm/test/Instrumentation/MemorySanitizer/msan_llvm_strip_invariant.ll +++ b/llvm/test/Instrumentation/MemorySanitizer/msan_llvm_strip_invariant.ll @@ -14,7 +14,7 @@ ret i8* %0 } -; CHECK-NOT: call void @__msan_warning_noreturn +; CHECK-NOT: call void @__msan_warning_with_origin_noreturn declare i8* @llvm.strip.invariant.group.p0i8(i8*) diff --git a/llvm/test/Instrumentation/MemorySanitizer/return_from_main.ll b/llvm/test/Instrumentation/MemorySanitizer/return_from_main.ll --- a/llvm/test/Instrumentation/MemorySanitizer/return_from_main.ll +++ b/llvm/test/Instrumentation/MemorySanitizer/return_from_main.ll @@ -16,5 +16,5 @@ ; CHECK: call i32 @f() ; CHECK: store i32 0, {{.*}} @__msan_retval_tls ; CHECK: br i1 -; CHECK: call void @__msan_warning_noreturn() +; CHECK: call void @__msan_warning_with_origin_noreturn(i32 0) ; CHECK: ret i32 diff --git a/llvm/test/Instrumentation/MemorySanitizer/vector_cvt.ll b/llvm/test/Instrumentation/MemorySanitizer/vector_cvt.ll --- a/llvm/test/Instrumentation/MemorySanitizer/vector_cvt.ll +++ b/llvm/test/Instrumentation/MemorySanitizer/vector_cvt.ll @@ -22,7 +22,7 @@ ; CHECK: [[S:%[_01-9a-z]+]] = extractelement <2 x i64> {{.*}}, i32 0 ; CHECK: icmp ne {{.*}}[[S]], 0 ; CHECK: br -; CHECK: call void @__msan_warning_noreturn +; CHECK: call void @__msan_warning_with_origin_noreturn ; CHECK: call i32 @llvm.x86.sse2.cvtsd2si ; CHECK: store i32 0, {{.*}} @__msan_retval_tls ; CHECK: ret i32 @@ -41,7 +41,7 @@ ; CHECK: [[S:%[_01-9a-z]+]] = or i32 ; CHECK: icmp ne {{.*}}[[S]], 0 ; CHECK: br -; CHECK: call void @__msan_warning_noreturn +; CHECK: call void @__msan_warning_with_origin_noreturn ; CHECK: call x86_mmx @llvm.x86.sse.cvtps2pi ; CHECK: store i64 0, {{.*}} @__msan_retval_tls ; CHECK: ret x86_mmx