diff --git a/llvm/include/llvm/Analysis/TargetTransformInfoImpl.h b/llvm/include/llvm/Analysis/TargetTransformInfoImpl.h --- a/llvm/include/llvm/Analysis/TargetTransformInfoImpl.h +++ b/llvm/include/llvm/Analysis/TargetTransformInfoImpl.h @@ -861,11 +861,14 @@ case Instruction::AShr: case Instruction::And: case Instruction::Or: - case Instruction::Xor: { - TargetTransformInfo::OperandValueKind Op1VK, Op2VK; - TargetTransformInfo::OperandValueProperties Op1VP, Op2VP; - Op1VK = TTI::getOperandInfo(U->getOperand(0), Op1VP); - Op2VK = TTI::getOperandInfo(U->getOperand(1), Op2VP); + case Instruction::Xor: + case Instruction::FNeg: { + TTI::OperandValueProperties Op1VP = TTI::OP_None; + TTI::OperandValueProperties Op2VP = TTI::OP_None; + TTI::OperandValueKind Op1VK = + TTI::getOperandInfo(U->getOperand(0), Op1VP); + TTI::OperandValueKind Op2VK = Opcode != Instruction::FNeg ? + TTI::getOperandInfo(U->getOperand(1), Op2VP) : TTI::OK_AnyValue; SmallVector Operands(U->operand_values()); return TargetTTI->getArithmeticInstrCost(Opcode, Ty, CostKind, Op1VK, Op2VK, diff --git a/llvm/lib/Analysis/TargetTransformInfo.cpp b/llvm/lib/Analysis/TargetTransformInfo.cpp --- a/llvm/lib/Analysis/TargetTransformInfo.cpp +++ b/llvm/lib/Analysis/TargetTransformInfo.cpp @@ -1250,18 +1250,8 @@ case Instruction::And: case Instruction::Or: case Instruction::Xor: + case Instruction::FNeg: return getUserCost(I, CostKind); - case Instruction::FNeg: { - TargetTransformInfo::OperandValueKind Op1VK, Op2VK; - TargetTransformInfo::OperandValueProperties Op1VP, Op2VP; - Op1VK = getOperandInfo(I->getOperand(0), Op1VP); - Op2VK = OK_AnyValue; - Op2VP = OP_None; - SmallVector Operands(I->operand_values()); - return getArithmeticInstrCost(I->getOpcode(), I->getType(), CostKind, - Op1VK, Op2VK, - Op1VP, Op2VP, Operands, I); - } case Instruction::Select: case Instruction::ICmp: case Instruction::FCmp: diff --git a/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h b/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h --- a/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h +++ b/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h @@ -237,9 +237,6 @@ int getMinMaxReductionCost( VectorType *Ty, VectorType *CondTy, bool IsPairwiseForm, bool IsUnsigned, TTI::TargetCostKind CostKind = TTI::TCK_RecipThroughput); - - unsigned getUserCost(const User *U, ArrayRef Operands, - TTI::TargetCostKind CostKind); }; class R600TTIImpl final : public BasicTTIImplBase { diff --git a/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp b/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp --- a/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp @@ -983,26 +983,6 @@ CommonTTI.getUnrollingPreferences(L, SE, UP); } -unsigned -GCNTTIImpl::getUserCost(const User *U, ArrayRef Operands, - TTI::TargetCostKind CostKind) { - const Instruction *I = dyn_cast(U); - if (!I) - return BaseT::getUserCost(U, Operands, CostKind); - - // Estimate different operations to be optimized out - switch (I->getOpcode()) { - case Instruction::FNeg: - return getArithmeticInstrCost(I->getOpcode(), I->getType(), CostKind, - TTI::OK_AnyValue, TTI::OK_AnyValue, - TTI::OP_None, TTI::OP_None, Operands, I); - default: - break; - } - - return BaseT::getUserCost(U, Operands, CostKind); -} - unsigned R600TTIImpl::getHardwareNumberOfRegisters(bool Vec) const { return 4 * 128; // XXX - 4 channels. Should these count as vector instead? }