Index: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h =================================================================== --- llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h +++ llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h @@ -39,11 +39,12 @@ /// functions MachineIRBuilder &MIRBuilder; + /// To keep track of changes made by the LegalizerHelper. + GISelChangeObserver &Observer; + private: MachineRegisterInfo &MRI; const LegalizerInfo &LI; - /// To keep track of changes made by the LegalizerHelper. - GISelChangeObserver &Observer; public: enum LegalizeResult { Index: llvm/include/llvm/CodeGen/GlobalISel/LegalizerInfo.h =================================================================== --- llvm/include/llvm/CodeGen/GlobalISel/LegalizerInfo.h +++ llvm/include/llvm/CodeGen/GlobalISel/LegalizerInfo.h @@ -35,6 +35,7 @@ extern cl::opt DisableGISelLegalityCheck; +class LegalizerHelper; class MachineInstr; class MachineIRBuilder; class MachineRegisterInfo; @@ -1211,16 +1212,17 @@ const MachineRegisterInfo &MRI) const; /// Called for instructions with the Custom LegalizationAction. - virtual bool legalizeCustom(MachineInstr &MI, MachineRegisterInfo &MRI, - MachineIRBuilder &MIRBuilder, - GISelChangeObserver &Observer) const { + virtual bool legalizeCustom(LegalizerHelper &Helper, + MachineInstr &MI) const { llvm_unreachable("must implement this if custom action is used"); } /// \returns true if MI is either legal or has been legalized and false if not /// legal. - virtual bool legalizeIntrinsic(MachineInstr &MI, MachineIRBuilder &MIRBuilder, - GISelChangeObserver &Observer) const { + /// Return true if MI is either legal or has been legalized and false + /// if not legal. + virtual bool legalizeIntrinsic(LegalizerHelper &Helper, + MachineInstr &MI) const { return true; } Index: llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp =================================================================== --- llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp +++ llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp @@ -85,15 +85,15 @@ LegalizerHelper::LegalizerHelper(MachineFunction &MF, GISelChangeObserver &Observer, MachineIRBuilder &Builder) - : MIRBuilder(Builder), MRI(MF.getRegInfo()), - LI(*MF.getSubtarget().getLegalizerInfo()), Observer(Observer) { + : MIRBuilder(Builder), Observer(Observer), MRI(MF.getRegInfo()), + LI(*MF.getSubtarget().getLegalizerInfo()) { MIRBuilder.setChangeObserver(Observer); } LegalizerHelper::LegalizerHelper(MachineFunction &MF, const LegalizerInfo &LI, GISelChangeObserver &Observer, MachineIRBuilder &B) - : MIRBuilder(B), MRI(MF.getRegInfo()), LI(LI), Observer(Observer) { + : MIRBuilder(B), Observer(Observer), MRI(MF.getRegInfo()), LI(LI) { MIRBuilder.setChangeObserver(Observer); } LegalizerHelper::LegalizeResult @@ -104,8 +104,7 @@ if (MI.getOpcode() == TargetOpcode::G_INTRINSIC || MI.getOpcode() == TargetOpcode::G_INTRINSIC_W_SIDE_EFFECTS) - return LI.legalizeIntrinsic(MI, MIRBuilder, Observer) ? Legalized - : UnableToLegalize; + return LI.legalizeIntrinsic(*this, MI) ? Legalized : UnableToLegalize; auto Step = LI.getAction(MI, MRI); switch (Step.Action) { case Legal: @@ -134,8 +133,7 @@ return moreElementsVector(MI, Step.TypeIdx, Step.NewType); case Custom: LLVM_DEBUG(dbgs() << ".. Custom legalization\n"); - return LI.legalizeCustom(MI, MRI, MIRBuilder, Observer) ? Legalized - : UnableToLegalize; + return LI.legalizeCustom(*this, MI) ? Legalized : UnableToLegalize; default: LLVM_DEBUG(dbgs() << ".. Unable to legalize\n"); return UnableToLegalize; Index: llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.h =================================================================== --- llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.h +++ llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.h @@ -27,12 +27,10 @@ public: AArch64LegalizerInfo(const AArch64Subtarget &ST); - bool legalizeCustom(MachineInstr &MI, MachineRegisterInfo &MRI, - MachineIRBuilder &MIRBuilder, - GISelChangeObserver &Observer) const override; + bool legalizeCustom(LegalizerHelper &Helper, MachineInstr &MI) const override; - bool legalizeIntrinsic(MachineInstr &MI, MachineIRBuilder &MIRBuilder, - GISelChangeObserver &Observer) const override; + bool legalizeIntrinsic(LegalizerHelper &Helper, + MachineInstr &MI) const override; private: bool legalizeVaArg(MachineInstr &MI, MachineRegisterInfo &MRI, Index: llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp =================================================================== --- llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp +++ llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp @@ -624,10 +624,11 @@ verify(*ST.getInstrInfo()); } -bool AArch64LegalizerInfo::legalizeCustom(MachineInstr &MI, - MachineRegisterInfo &MRI, - MachineIRBuilder &MIRBuilder, - GISelChangeObserver &Observer) const { +bool AArch64LegalizerInfo::legalizeCustom(LegalizerHelper &Helper, + MachineInstr &MI) const { + MachineIRBuilder &MIRBuilder = Helper.MIRBuilder; + MachineRegisterInfo &MRI = *MIRBuilder.getMRI(); + GISelChangeObserver &Observer = Helper.Observer; switch (MI.getOpcode()) { default: // No idea what to do. @@ -681,8 +682,8 @@ } bool AArch64LegalizerInfo::legalizeIntrinsic( - MachineInstr &MI, MachineIRBuilder &MIRBuilder, - GISelChangeObserver &Observer) const { + LegalizerHelper &Helper, MachineInstr &MI) const { + MachineIRBuilder &MIRBuilder = Helper.MIRBuilder; switch (MI.getIntrinsicID()) { case Intrinsic::memcpy: case Intrinsic::memset: Index: llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h =================================================================== --- llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h +++ llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h @@ -32,9 +32,7 @@ AMDGPULegalizerInfo(const GCNSubtarget &ST, const GCNTargetMachine &TM); - bool legalizeCustom(MachineInstr &MI, MachineRegisterInfo &MRI, - MachineIRBuilder &B, - GISelChangeObserver &Observer) const override; + bool legalizeCustom(LegalizerHelper &Helper, MachineInstr &MI) const override; Register getSegmentAperture(unsigned AddrSpace, MachineRegisterInfo &MRI, @@ -52,8 +50,7 @@ MachineIRBuilder &B, bool Signed) const; bool legalizeFPTOI(MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B, bool Signed) const; - bool legalizeMinNumMaxNum(MachineInstr &MI, MachineRegisterInfo &MRI, - MachineIRBuilder &B) const; + bool legalizeMinNumMaxNum(LegalizerHelper &Helper, MachineInstr &MI) const; bool legalizeExtractVectorElt(MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B) const; bool legalizeInsertVectorElt(MachineInstr &MI, MachineRegisterInfo &MRI, @@ -175,8 +172,8 @@ bool legalizeDebugTrapIntrinsic(MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B) const; - bool legalizeIntrinsic(MachineInstr &MI, MachineIRBuilder &B, - GISelChangeObserver &Observer) const override; + bool legalizeIntrinsic(LegalizerHelper &Helper, + MachineInstr &MI) const override; }; } // End llvm namespace. #endif Index: llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp =================================================================== --- llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp +++ llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp @@ -1436,10 +1436,12 @@ verify(*ST.getInstrInfo()); } -bool AMDGPULegalizerInfo::legalizeCustom(MachineInstr &MI, - MachineRegisterInfo &MRI, - MachineIRBuilder &B, - GISelChangeObserver &Observer) const { +bool AMDGPULegalizerInfo::legalizeCustom(LegalizerHelper &Helper, + MachineInstr &MI) const { + MachineIRBuilder &B = Helper.MIRBuilder; + MachineRegisterInfo &MRI = *B.getMRI(); + GISelChangeObserver &Observer = Helper.Observer; + switch (MI.getOpcode()) { case TargetOpcode::G_ADDRSPACE_CAST: return legalizeAddrSpaceCast(MI, MRI, B); @@ -1461,7 +1463,7 @@ case TargetOpcode::G_FMAXNUM: case TargetOpcode::G_FMINNUM_IEEE: case TargetOpcode::G_FMAXNUM_IEEE: - return legalizeMinNumMaxNum(MI, MRI, B); + return legalizeMinNumMaxNum(Helper, MI); case TargetOpcode::G_EXTRACT_VECTOR_ELT: return legalizeExtractVectorElt(MI, MRI, B); case TargetOpcode::G_INSERT_VECTOR_ELT: @@ -1842,10 +1844,9 @@ return true; } -bool AMDGPULegalizerInfo::legalizeMinNumMaxNum( - MachineInstr &MI, MachineRegisterInfo &MRI, - MachineIRBuilder &B) const { - MachineFunction &MF = B.getMF(); +bool AMDGPULegalizerInfo::legalizeMinNumMaxNum(LegalizerHelper &Helper, + MachineInstr &MI) const { + MachineFunction &MF = Helper.MIRBuilder.getMF(); const SIMachineFunctionInfo *MFI = MF.getInfo(); const bool IsIEEEOp = MI.getOpcode() == AMDGPU::G_FMINNUM_IEEE || @@ -1859,9 +1860,6 @@ if (IsIEEEOp) return true; - MachineIRBuilder HelperBuilder(MI); - GISelObserverWrapper DummyObserver; - LegalizerHelper Helper(MF, DummyObserver, HelperBuilder); return Helper.lowerFMinNumMaxNum(MI) == LegalizerHelper::Legalized; } @@ -4132,9 +4130,9 @@ return true; } -bool AMDGPULegalizerInfo::legalizeIntrinsic(MachineInstr &MI, - MachineIRBuilder &B, - GISelChangeObserver &Observer) const { +bool AMDGPULegalizerInfo::legalizeIntrinsic(LegalizerHelper &Helper, + MachineInstr &MI) const { + MachineIRBuilder &B = Helper.MIRBuilder; MachineRegisterInfo &MRI = *B.getMRI(); // Replace the use G_BRCOND with the exec manipulate and branch pseudos. @@ -4263,7 +4261,7 @@ return true; } case Intrinsic::amdgcn_s_buffer_load: - return legalizeSBufferLoad(MI, B, Observer); + return legalizeSBufferLoad(MI, B, Helper.Observer); case Intrinsic::amdgcn_raw_buffer_store: case Intrinsic::amdgcn_struct_buffer_store: return legalizeBufferStore(MI, MRI, B, false, false); @@ -4320,7 +4318,7 @@ default: { if (const AMDGPU::ImageDimIntrinsicInfo *ImageDimIntr = AMDGPU::getImageDimIntrinsicInfo(IntrID)) - return legalizeImageIntrinsic(MI, B, Observer, ImageDimIntr); + return legalizeImageIntrinsic(MI, B, Helper.Observer, ImageDimIntr); return true; } } Index: llvm/lib/Target/ARM/ARMLegalizerInfo.h =================================================================== --- llvm/lib/Target/ARM/ARMLegalizerInfo.h +++ llvm/lib/Target/ARM/ARMLegalizerInfo.h @@ -28,9 +28,7 @@ public: ARMLegalizerInfo(const ARMSubtarget &ST); - bool legalizeCustom(MachineInstr &MI, MachineRegisterInfo &MRI, - MachineIRBuilder &MIRBuilder, - GISelChangeObserver &Observer) const override; + bool legalizeCustom(LegalizerHelper &Helper, MachineInstr &MI) const override; private: void setFCmpLibcallsGNU(); Index: llvm/lib/Target/ARM/ARMLegalizerInfo.cpp =================================================================== --- llvm/lib/Target/ARM/ARMLegalizerInfo.cpp +++ llvm/lib/Target/ARM/ARMLegalizerInfo.cpp @@ -357,13 +357,12 @@ llvm_unreachable("Unsupported size for FCmp predicate"); } -bool ARMLegalizerInfo::legalizeCustom(MachineInstr &MI, - MachineRegisterInfo &MRI, - MachineIRBuilder &MIRBuilder, - GISelChangeObserver &Observer) const { +bool ARMLegalizerInfo::legalizeCustom(LegalizerHelper &Helper, + MachineInstr &MI) const { using namespace TargetOpcode; - MIRBuilder.setInstr(MI); + MachineIRBuilder &MIRBuilder = Helper.MIRBuilder; + MachineRegisterInfo &MRI = *MIRBuilder.getMRI(); LLVMContext &Ctx = MIRBuilder.getMF().getFunction().getContext(); switch (MI.getOpcode()) { Index: llvm/lib/Target/Mips/MipsLegalizerInfo.h =================================================================== --- llvm/lib/Target/Mips/MipsLegalizerInfo.h +++ llvm/lib/Target/Mips/MipsLegalizerInfo.h @@ -25,12 +25,10 @@ public: MipsLegalizerInfo(const MipsSubtarget &ST); - bool legalizeCustom(MachineInstr &MI, MachineRegisterInfo &MRI, - MachineIRBuilder &MIRBuilder, - GISelChangeObserver &Observer) const override; + bool legalizeCustom(LegalizerHelper &Helper, MachineInstr &MI) const override; - bool legalizeIntrinsic(MachineInstr &MI, MachineIRBuilder &MIRBuilder, - GISelChangeObserver &Observer) const override; + bool legalizeIntrinsic(LegalizerHelper &Helper, + MachineInstr &MI) const override; }; } // end namespace llvm #endif Index: llvm/lib/Target/Mips/MipsLegalizerInfo.cpp =================================================================== --- llvm/lib/Target/Mips/MipsLegalizerInfo.cpp +++ llvm/lib/Target/Mips/MipsLegalizerInfo.cpp @@ -326,13 +326,13 @@ verify(*ST.getInstrInfo()); } -bool MipsLegalizerInfo::legalizeCustom(MachineInstr &MI, - MachineRegisterInfo &MRI, - MachineIRBuilder &MIRBuilder, - GISelChangeObserver &Observer) const { - +bool MipsLegalizerInfo::legalizeCustom(LegalizerHelper &Helper, + MachineInstr &MI) const { using namespace TargetOpcode; + MachineIRBuilder &MIRBuilder = Helper.MIRBuilder; + MachineRegisterInfo &MRI = *MIRBuilder.getMRI(); + const LLT s32 = LLT::scalar(32); const LLT s64 = LLT::scalar(64); @@ -497,9 +497,9 @@ return true; } -bool MipsLegalizerInfo::legalizeIntrinsic(MachineInstr &MI, - MachineIRBuilder &MIRBuilder, - GISelChangeObserver &Observer) const { +bool MipsLegalizerInfo::legalizeIntrinsic(LegalizerHelper &Helper, + MachineInstr &MI) const { + MachineIRBuilder &MIRBuilder = Helper.MIRBuilder; MachineRegisterInfo &MRI = *MIRBuilder.getMRI(); const MipsSubtarget &ST = static_cast(MI.getMF()->getSubtarget()); Index: llvm/lib/Target/X86/X86LegalizerInfo.h =================================================================== --- llvm/lib/Target/X86/X86LegalizerInfo.h +++ llvm/lib/Target/X86/X86LegalizerInfo.h @@ -32,8 +32,8 @@ public: X86LegalizerInfo(const X86Subtarget &STI, const X86TargetMachine &TM); - bool legalizeIntrinsic(MachineInstr &MI, MachineIRBuilder &MIRBuilder, - GISelChangeObserver &Observer) const override; + bool legalizeIntrinsic(LegalizerHelper &Helper, + MachineInstr &MI) const override; private: void setLegalizerInfo32bit(); Index: llvm/lib/Target/X86/X86LegalizerInfo.cpp =================================================================== --- llvm/lib/Target/X86/X86LegalizerInfo.cpp +++ llvm/lib/Target/X86/X86LegalizerInfo.cpp @@ -85,9 +85,9 @@ verify(*STI.getInstrInfo()); } -bool X86LegalizerInfo::legalizeIntrinsic(MachineInstr &MI, - MachineIRBuilder &MIRBuilder, - GISelChangeObserver &Observer) const { +bool X86LegalizerInfo::legalizeIntrinsic(LegalizerHelper &Helper, + MachineInstr &MI) const { + MachineIRBuilder &MIRBuilder = Helper.MIRBuilder; switch (MI.getIntrinsicID()) { case Intrinsic::memcpy: case Intrinsic::memset: