[SVE] Eliminate calls to default-false VectorType::get() from AMDGPU

[ctetreau]

rebase

llvm/lib/Target/AMDGPU/AMDGPUAtomicOptimizer.cpp

if (IsPixelShader) {
     PixelExitBB = I.getParent();
 
     I.moveBefore(NonHelperTerminator);
     B.SetInsertPoint(&I);
   }
 
   Type *const Ty = I.getType();
   const unsigned TyBitWidth = DL->getTypeSizeInBits(Ty);
-  Type *const VecTy = VectorType::get(B.getInt32Ty(), 2);
+  auto *const VecTy = FixedVectorType::get(B.getInt32Ty(), 2);
 
   // This is the value in the atomic operation we need to combine in order to
   // reduce the number of atomic operations.
   Value *const V = I.getOperand(ValIdx);
 
   // We need to know how many lanes are active within the wavefront, and we do
   // this by doing a ballot of active lanes.
   Type *const WaveTy = B.getIntNTy(ST->getWavefrontSize());

llvm/lib/Target/AMDGPU/AMDGPULibCalls.cpp

bool AMDGPULibCalls::fold_read_write_pipe(CallInst *CI, IRBuilder<> &B,
   unsigned Align = cast<ConstantInt>(PacketAlign)->getZExtValue();
   if (Size != Align || !isPowerOf2_32(Size))
     return false;
 
   Type *PtrElemTy;
   if (Size <= 8)
     PtrElemTy = Type::getIntNTy(Ctx, Size * 8);
   else
-    PtrElemTy = VectorType::get(Type::getInt64Ty(Ctx), Size / 8);
+    PtrElemTy = FixedVectorType::get(Type::getInt64Ty(Ctx), Size / 8);
   unsigned PtrArgLoc = CI->getNumArgOperands() - 3;
   auto PtrArg = CI->getArgOperand(PtrArgLoc);
   unsigned PtrArgAS = PtrArg->getType()->getPointerAddressSpace();
   auto *PtrTy = llvm::PointerType::get(PtrElemTy, PtrArgAS);
 
   SmallVector<llvm::Type *, 6> ArgTys;
   for (unsigned I = 0; I != PtrArgLoc; ++I)
     ArgTys.push_back(CI->getArgOperand(I)->getType());

llvm/lib/Target/AMDGPU/AMDGPULibFunc.cpp

case AMDGPULibFunc::SAMPLER:
     T = StructType::create(C,"ocl_sampler")->getPointerTo(); break;
   case AMDGPULibFunc::EVENT:
     T = StructType::create(C,"ocl_event")->getPointerTo(); break;
   default:
     llvm_unreachable("Unhandeled param type");
     return nullptr;
   }
   if (P.VectorSize > 1)
-    T = VectorType::get(T, P.VectorSize);
+    T = FixedVectorType::get(T, P.VectorSize);
   if (P.PtrKind != AMDGPULibFunc::BYVALUE)
     T = useAddrSpace ? T->getPointerTo((P.PtrKind & AMDGPULibFunc::ADDR_SPACE)
                                        - 1)
                      : T->getPointerTo();
   return T;
 }
 
 FunctionType *AMDGPUMangledLibFunc::getFunctionType(Module &M) const {

llvm/lib/Target/AMDGPU/AMDGPULowerKernelArguments.cpp

for (Argument &Arg : F.args()) {
     } else {
       ArgPtr = Builder.CreateConstInBoundsGEP1_64(
           Builder.getInt8Ty(), KernArgSegment, EltOffset,
           Arg.getName() + ".kernarg.offset");
       AdjustedArgTy = ArgTy;
     }
 
     if (IsV3 && Size >= 32) {
-      V4Ty = VectorType::get(VT->getElementType(), 4);
+      V4Ty = FixedVectorType::get(VT->getElementType(), 4);
       // Use the hack that clang uses to avoid SelectionDAG ruining v3 loads
       AdjustedArgTy = V4Ty;
     }
 
     ArgPtr = Builder.CreateBitCast(ArgPtr, AdjustedArgTy->getPointerTo(AS),
                                    ArgPtr->getName() + ".cast");
     LoadInst *Load =
         Builder.CreateAlignedLoad(AdjustedArgTy, ArgPtr, AdjustedAlign);

llvm/lib/Target/AMDGPU/AMDGPUPrintfRuntimeBinding.cpp

if (ConstExpr) {
               IType = dyn_cast<Type>(Type::getInt64Ty(ArgType->getContext()));
             } else {
               EleCount = 1;
               IType = dyn_cast<Type>(Type::getInt32Ty(ArgType->getContext()));
             }
             break;
           }
           if (EleCount > 1) {
-            IType = dyn_cast<Type>(VectorType::get(IType, EleCount));
+            IType = FixedVectorType::get(IType, EleCount);
           }
           Arg = new BitCastInst(Arg, IType, "PrintArgVect", Brnch);
           WhatToStore.push_back(Arg);
         } else {
           WhatToStore.push_back(Arg);
         }
         for (unsigned I = 0, E = WhatToStore.size(); I != E; ++I) {
           Value *TheBtCast = WhatToStore[I];

llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp

if (MinAlign == 2)
     return Type::getInt16Ty(Context);
 
   // Not all subtargets have 128-bit DS instructions, and we currently don't
   // form them by default.
   if (SrcAddrSpace == AMDGPUAS::LOCAL_ADDRESS ||
       SrcAddrSpace == AMDGPUAS::REGION_ADDRESS ||
       DestAddrSpace == AMDGPUAS::LOCAL_ADDRESS ||
       DestAddrSpace == AMDGPUAS::REGION_ADDRESS) {
-    return VectorType::get(Type::getInt32Ty(Context), 2);
+    return FixedVectorType::get(Type::getInt32Ty(Context), 2);
   }
 
   // Global memory works best with 16-byte accesses. Private memory will also
   // hit this, although they'll be decomposed.
-  return VectorType::get(Type::getInt32Ty(Context), 4);
+  return FixedVectorType::get(Type::getInt32Ty(Context), 4);
 }
 
 void GCNTTIImpl::getMemcpyLoopResidualLoweringType(
   SmallVectorImpl<Type *> &OpsOut, LLVMContext &Context,
   unsigned RemainingBytes, unsigned SrcAddrSpace, unsigned DestAddrSpace,
   unsigned SrcAlign, unsigned DestAlign) const {
   assert(RemainingBytes < 16);