diff --git a/llvm/lib/MC/MCSectionXCOFF.cpp b/llvm/lib/MC/MCSectionXCOFF.cpp
--- a/llvm/lib/MC/MCSectionXCOFF.cpp
+++ b/llvm/lib/MC/MCSectionXCOFF.cpp
@@ -16,7 +16,7 @@
 MCSectionXCOFF::~MCSectionXCOFF() = default;
 
 void MCSectionXCOFF::printCsectDirective(raw_ostream &OS) const {
-  OS << "\t.csect " << QualName->getName() << ", " << Log2_32(getAlignment())
+  OS << "\t.csect " << QualName->getName() << "," << Log2_32(getAlignment())
      << '\n';
 }
 
diff --git a/llvm/test/CodeGen/PowerPC/aix-func-align.ll b/llvm/test/CodeGen/PowerPC/aix-func-align.ll
--- a/llvm/test/CodeGen/PowerPC/aix-func-align.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-func-align.ll
@@ -20,10 +20,10 @@
   ret i32 0
 }
 
-; CHECK:      .csect .text[PR], 6
+; CHECK:      .csect .text[PR],6
 ; CHECK-NEXT: .foo:
 
-; CHECK:      .csect .text[PR], 6
+; CHECK:      .csect .text[PR],6
 ; CHECK-NEXT: .bar:
 
 ; SYMS:       Symbol {{[{][[:space:]] *}}Index: [[#INDX:]]{{[[:space:]] *}}Name: .text
diff --git a/llvm/test/CodeGen/PowerPC/aix-lower-constant-pool-index.ll b/llvm/test/CodeGen/PowerPC/aix-lower-constant-pool-index.ll
--- a/llvm/test/CodeGen/PowerPC/aix-lower-constant-pool-index.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-lower-constant-pool-index.ll
@@ -45,7 +45,7 @@
 ; 64LARGE-MIR: renamable $x[[REG2:[0-9]+]] = LDtocL %const.0, killed renamable $x[[REG1]], implicit $x2 :: (load 8 from got)
 ; 64LARGE-MIR: renamable $f[[REG3:[0-9]+]] = LFS 0, killed renamable $x[[REG2]] :: (load 4 from constant-pool)
 
-; 32SMALL-ASM:         .csect .rodata[RO], 2
+; 32SMALL-ASM:         .csect .rodata[RO],2
 ; 32SMALL-ASM:         .align  2
 ; 32SMALL-ASM: .LCPI0_0:
 ; 32SMALL-ASM:         .long  0x40b00000
@@ -54,7 +54,7 @@
 ; 32SMALL-ASM:         lfs 1, 0([[REG1]])
 ; 32SMALL-ASM:         blr
 
-; 32LARGE-ASM:         .csect .rodata[RO], 2
+; 32LARGE-ASM:         .csect .rodata[RO],2
 ; 32LARGE-ASM:         .align  2
 ; 32LARGE-ASM: .LCPI0_0:
 ; 32LARGE-ASM:         .long   0x40b00000
@@ -64,7 +64,7 @@
 ; 32LARGE-ASM:         lfs 1, 0([[REG2]])
 ; 32LARGE-ASM:         blr
 
-; 64SMALL-ASM:         .csect .rodata[RO], 2
+; 64SMALL-ASM:         .csect .rodata[RO],2
 ; 64SMALL-ASM:         .align  2
 ; 64SMALL-ASM: .LCPI0_0:
 ; 64SMALL-ASM:         .long   0x40b00000
@@ -73,7 +73,7 @@
 ; 64SMALL-ASM:         lfs 1, 0([[REG1]])
 ; 64SMALL-ASM:         blr
 
-; 64LARGE-ASM:         .csect .rodata[RO], 2
+; 64LARGE-ASM:         .csect .rodata[RO],2
 ; 64LARGE-ASM:         .align  2
 ; 64LARGE-ASM: .LCPI0_0:
 ; 64LARGE-ASM:         .long   0x40b00000
diff --git a/llvm/test/CodeGen/PowerPC/aix-lower-jump-table.ll b/llvm/test/CodeGen/PowerPC/aix-lower-jump-table.ll
--- a/llvm/test/CodeGen/PowerPC/aix-lower-jump-table.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-lower-jump-table.ll
@@ -96,7 +96,7 @@
 ; 32SMALL-ASM: LBB0_6:
 ; 32SMALL-ASM: 	    li 3, 0
 ; 32SMALL-ASM: 	    blr
-; 32SMALL-ASM: 	    .csect .rodata[RO], 2
+; 32SMALL-ASM: 	    .csect .rodata[RO],2
 ; 32SMALL-ASM: 	    .align  2
 ; 32SMALL-ASM: .LJTI0_0:
 ; 32SMALL-ASM: 	    .long   LBB0_2-.LJTI0_0
@@ -123,7 +123,7 @@
 ; 32LARGE-ASM: LBB0_6:
 ; 32LARGE-ASM:      li 3, 0
 ; 32LARGE-ASM:      blr
-; 32LARGE-ASM:      .csect .rodata[RO], 2
+; 32LARGE-ASM:      .csect .rodata[RO],2
 ; 32LARGE-ASM:      .align  2
 ; 32LARGE-ASM: .LJTI0_0:
 ; 32LARGE-ASM:      .long   LBB0_2-.LJTI0_0
@@ -149,7 +149,7 @@
 ; 64SMALL-ASM: LBB0_6:
 ; 64SMALL-ASM:      li 3, 0
 ; 64SMALL-ASM:      blr
-; 64SMALL-ASM:      .csect .rodata[RO], 2
+; 64SMALL-ASM:      .csect .rodata[RO],2
 ; 64SMALL-ASM:      .align  2
 ; 64SMALL-ASM: .LJTI0_0:
 ; 64SMALL-ASM:      .long   LBB0_2-.LJTI0_0
@@ -176,7 +176,7 @@
 ; 64LARGE-ASM: LBB0_6:
 ; 64LARGE-ASM:      li 3, 0
 ; 64LARGE-ASM:      blr
-; 64LARGE-ASM:      .csect .rodata[RO], 2
+; 64LARGE-ASM:      .csect .rodata[RO],2
 ; 64LARGE-ASM:      .align  2
 ; 64LARGE-ASM: .LJTI0_0:
 ; 64LARGE-ASM:      .long   LBB0_2-.LJTI0_0
diff --git a/llvm/test/CodeGen/PowerPC/aix-readonly-with-relocation.ll b/llvm/test/CodeGen/PowerPC/aix-readonly-with-relocation.ll
--- a/llvm/test/CodeGen/PowerPC/aix-readonly-with-relocation.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-readonly-with-relocation.ll
@@ -5,14 +5,14 @@
 @b = constant i32* @a
 
 ;CHECK:         .comm   a[RW],4,2
-;CHECK-NEXT:    .csect .data[RW], 2
+;CHECK-NEXT:    .csect .data[RW],2
 ;CHECK-NEXT:    .globl  b
 ;CHECK-NEXT:    .align  2
 ;CHECK-NEXT: b:
 ;CHECK-NEXT:    .long   a
 
 ;CHECK64:       .comm   a[RW],4,2
-;CHECK64-NEXT:  .csect .data[RW], 3
+;CHECK64-NEXT:  .csect .data[RW],3
 ;CHECK64-NEXT:  .globl  b
 ;CHECK64-NEXT:  .align  3
 ;CHECK64-NEXT: b:
diff --git a/llvm/test/CodeGen/PowerPC/aix-reference-func-addr-const.ll b/llvm/test/CodeGen/PowerPC/aix-reference-func-addr-const.ll
--- a/llvm/test/CodeGen/PowerPC/aix-reference-func-addr-const.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-reference-func-addr-const.ll
@@ -11,7 +11,7 @@
 }
 
 
-;CHECK:          .csect .data[RW], 2
+;CHECK:          .csect .data[RW],2
 ;CHECK-NEXT:     .globl  foo_ptr
 ;CHECK-NEXT:     .align  2
 ;CHECK-NEXT:     foo_ptr:
@@ -22,7 +22,7 @@
 ;CHECK-NEXT:     .long   bar[DS]
 ;CHECK-NEXT:     .extern foo[DS]
 
-;CHECK64:         .csect .data[RW], 3
+;CHECK64:         .csect .data[RW],3
 ;CHECK64-NEXT:         .globl  foo_ptr
 ;CHECK64-NEXT:         .align  3
 ;CHECK64-NEXT:    foo_ptr:
diff --git a/llvm/test/CodeGen/PowerPC/aix-xcoff-data.ll b/llvm/test/CodeGen/PowerPC/aix-xcoff-data.ll
--- a/llvm/test/CodeGen/PowerPC/aix-xcoff-data.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-xcoff-data.ll
@@ -38,10 +38,10 @@
 
 ; CHECK-NOT: .toc
 
-; CHECK:      .csect .text[PR], 2
+; CHECK:      .csect .text[PR],2
 ; CHECK-NEXT:  .file
 
-; CHECK:      .csect .data[RW], 5
+; CHECK:      .csect .data[RW],5
 ; CHECK-NEXT: .globl  ivar
 ; CHECK-NEXT: .align  2
 ; CHECK-NEXT: ivar:
diff --git a/llvm/test/CodeGen/PowerPC/aix-xcoff-lower-comm.ll b/llvm/test/CodeGen/PowerPC/aix-xcoff-lower-comm.ll
--- a/llvm/test/CodeGen/PowerPC/aix-xcoff-lower-comm.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-xcoff-lower-comm.ll
@@ -13,8 +13,8 @@
 
 
 ; CHECK:             .comm   common[RW],4,2
-; ASM32-NEXT:        .csect .data[RW], 2
-; ASM64-NEXT:        .csect .data[RW], 3
+; ASM32-NEXT:        .csect .data[RW],2
+; ASM64-NEXT:        .csect .data[RW],3
 ; CHECK-NEXT:        .globl  pointer
 ; ASM32-NEXT:        .align  2
 ; ASM64-NEXT:        .align  3
diff --git a/llvm/test/CodeGen/PowerPC/aix-xcoff-mergeable-const.ll b/llvm/test/CodeGen/PowerPC/aix-xcoff-mergeable-const.ll
--- a/llvm/test/CodeGen/PowerPC/aix-xcoff-mergeable-const.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-xcoff-mergeable-const.ll
@@ -22,7 +22,7 @@
   ret i32 0
 }
 
-;CHECK:         .csect .rodata[RO], 4
+;CHECK:         .csect .rodata[RO],4
 ;CHECK-NEXT:         .align  4
 ;CHECK-NEXT: .L__const.main.cnst32:
 ;CHECK-NEXT:         .llong  4611686018427387954
diff --git a/llvm/test/CodeGen/PowerPC/aix-xcoff-mergeable-str.ll b/llvm/test/CodeGen/PowerPC/aix-xcoff-mergeable-str.ll
--- a/llvm/test/CodeGen/PowerPC/aix-xcoff-mergeable-str.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-xcoff-mergeable-str.ll
@@ -25,21 +25,21 @@
   ret i8 %1
 }
 
-; CHECK:   .csect .rodata.str2.2[RO], 2
+; CHECK:   .csect .rodata.str2.2[RO],2
 ; CHECK-NEXT:   .align  1
 ; CHECK-NEXT: .Lmagic16:
 ; CHECK-NEXT:   .short  264                     # 0x108
 ; CHECK-NEXT:   .short  272                     # 0x110
 ; CHECK-NEXT:   .short  213                     # 0xd5
 ; CHECK-NEXT:   .short  0                       # 0x0
-; CHECK-NEXT:   .csect .rodata.str4.4[RO], 2
+; CHECK-NEXT:   .csect .rodata.str4.4[RO],2
 ; CHECK-NEXT:   .align  2
 ; CHECK-NEXT: .Lmagic32:
 ; CHECK-NEXT:   .long   464                     # 0x1d0
 ; CHECK-NEXT:   .long   472                     # 0x1d8
 ; CHECK-NEXT:   .long   413                     # 0x19d
 ; CHECK-NEXT:   .long   0                       # 0x0
-; CHECK-NEXT:   .csect .rodata.str1.1[RO], 2
+; CHECK-NEXT:   .csect .rodata.str1.1[RO],2
 ; CHECK-NEXT: .LstrA:
 ; CHECK-NEXT: .byte   104
 ; CHECK-NEXT: .byte   101
diff --git a/llvm/test/CodeGen/PowerPC/aix-xcoff-rodata.ll b/llvm/test/CodeGen/PowerPC/aix-xcoff-rodata.ll
--- a/llvm/test/CodeGen/PowerPC/aix-xcoff-rodata.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-xcoff-rodata.ll
@@ -20,7 +20,7 @@
 @const_chrarray = constant [4 x i8] c"abcd", align 1
 @const_dblarr = constant [4 x double] [double 1.000000e+00, double 2.000000e+00, double 3.000000e+00, double 4.000000e+00], align 8
 
-; CHECK:               .csect .rodata[RO], 5
+; CHECK:               .csect .rodata[RO],5
 ; CHECK-NEXT:          .globl  const_ivar
 ; CHECK-NEXT:          .align  2
 ; CHECK-NEXT:  const_ivar:
diff --git a/llvm/test/CodeGen/PowerPC/test_func_desc.ll b/llvm/test/CodeGen/PowerPC/test_func_desc.ll
--- a/llvm/test/CodeGen/PowerPC/test_func_desc.ll
+++ b/llvm/test/CodeGen/PowerPC/test_func_desc.ll
@@ -29,43 +29,43 @@
 
 ; CHECK: .globl foo[DS]
 ; CHECK: .globl .foo
-; 32BIT: .csect foo[DS], 2
+; 32BIT: .csect foo[DS],2
 ; 32BIT-NEXT: .long .foo
 ; 32BIT-NEXT: .long TOC[TC0]
 ; 32BIT-NEXT: .long 0
-; 64BIT: .csect foo[DS], 3
+; 64BIT: .csect foo[DS],3
 ; 64BIT-NEXT: .llong .foo
 ; 64BIT-NEXT: .llong TOC[TC0]
 ; 64BIT-NEXT: .llong 0
-; CHECK-NEXT: .csect .text[PR], 2
+; CHECK-NEXT: .csect .text[PR],2
 ; CHECK-LABEL: .foo:
 
 ; CHECK: .globl main[DS]
 ; CHECK: .globl .main
-; 32BIT: .csect main[DS], 2
+; 32BIT: .csect main[DS],2
 ; 32BIT-NEXT: .long .main
 ; 32BIT-NEXT: .long TOC[TC0]
 ; 32BIT-NEXT: .long 0
-; 64BIT: .csect main[DS], 3
+; 64BIT: .csect main[DS],3
 ; 64BIT-NEXT: .llong .main
 ; 64BIT-NEXT: .llong TOC[TC0]
 ; 64BIT-NEXT: .llong 0
-; CHECK-NEXT: .csect .text[PR], 2
+; CHECK-NEXT: .csect .text[PR],2
 ; CHECK-LABEL: .main:
 ; CHECK: bl .foo
 ; CHECK: bl .extern_foo
 ; CHECK: bl .static_foo
 
 ; CHECK: .lglobl .static_foo
-; 32BIT: .csect static_foo[DS], 2
+; 32BIT: .csect static_foo[DS],2
 ; 32BIT-NEXT: .long .static_foo
 ; 32BIT-NEXT: .long TOC[TC0]
 ; 32BIT-NEXT: .long 0
-; 64BIT: .csect static_foo[DS], 3
+; 64BIT: .csect static_foo[DS],3
 ; 64BIT-NEXT: .llong .static_foo
 ; 64BIT-NEXT: .llong TOC[TC0]
 ; 64BIT-NEXT: .llong 0
-; CHECK-NEXT: .csect .text[PR], 2
+; CHECK-NEXT: .csect .text[PR],2
 ; CHECK-LABEL: .static_foo:
 
 ; CHECK-NOT: .csect extern_foo