Index: llvm/lib/Target/X86/X86ISelLowering.cpp =================================================================== --- llvm/lib/Target/X86/X86ISelLowering.cpp +++ llvm/lib/Target/X86/X86ISelLowering.cpp @@ -35788,6 +35788,26 @@ } } + // Load a scalar integer constant directly to XMM instead of transferring an + // immediate value from GPR. + // TODO: Would it be better to load a 128-bit vector constant instead? + // vzext_movl (scalar_to_vector C) --> vzext_load &C + if (N0.getOpcode() == ISD::SCALAR_TO_VECTOR) { + if (auto *C = dyn_cast(N0.getOperand(0))) { + MVT PVT = DAG.getTargetLoweringInfo().getPointerTy(DAG.getDataLayout()); + SDValue CP = DAG.getConstantPool(C->getConstantIntValue(), PVT); + Align Alignment = cast(CP)->getAlign(); + EVT ScalarVT = N0.getOperand(0).getValueType(); + SDVTList MemTys = DAG.getVTList(VT, MVT::Other); + SDValue MemOps[] = {DAG.getEntryNode(), CP}; + MachinePointerInfo MPI = + MachinePointerInfo::getConstantPool(DAG.getMachineFunction()); + return DAG.getMemIntrinsicNode(X86ISD::VZEXT_LOAD, DL, MemTys, MemOps, + ScalarVT, MPI, Alignment, + MachineMemOperand::MOLoad); + } + } + return SDValue(); } case X86ISD::BLENDI: { Index: llvm/test/CodeGen/X86/avx-load-store.ll =================================================================== --- llvm/test/CodeGen/X86/avx-load-store.ll +++ llvm/test/CodeGen/X86/avx-load-store.ll @@ -220,8 +220,7 @@ ; CHECK-NEXT: testb %al, %al ; CHECK-NEXT: jne .LBB9_4 ; CHECK-NEXT: # %bb.3: # %cif_mixed_test_all -; CHECK-NEXT: movl $-1, %eax -; CHECK-NEXT: vmovd %eax, %xmm0 +; CHECK-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; CHECK-NEXT: vmaskmovps %ymm0, %ymm0, (%rax) ; CHECK-NEXT: .LBB9_4: # %cif_mixed_test_any_check ; @@ -238,13 +237,12 @@ ; CHECK_O0-NEXT: jne .LBB9_3 ; CHECK_O0-NEXT: jmp .LBB9_4 ; CHECK_O0-NEXT: .LBB9_3: # %cif_mixed_test_all -; CHECK_O0-NEXT: movl $-1, %eax -; CHECK_O0-NEXT: vmovd %eax, %xmm0 +; CHECK_O0-NEXT: vmovd {{.*#+}} xmm0 = mem[0],zero,zero,zero ; CHECK_O0-NEXT: vmovdqa %xmm0, %xmm0 ; CHECK_O0-NEXT: vmovaps %xmm0, %xmm1 -; CHECK_O0-NEXT: # implicit-def: $rcx +; CHECK_O0-NEXT: # implicit-def: $rax ; CHECK_O0-NEXT: # implicit-def: $ymm2 -; CHECK_O0-NEXT: vmaskmovps %ymm2, %ymm1, (%rcx) +; CHECK_O0-NEXT: vmaskmovps %ymm2, %ymm1, (%rax) ; CHECK_O0-NEXT: .LBB9_4: # %cif_mixed_test_any_check allocas: br i1 undef, label %cif_mask_all, label %cif_mask_mixed Index: llvm/test/CodeGen/X86/avx2-arith.ll =================================================================== --- llvm/test/CodeGen/X86/avx2-arith.ll +++ llvm/test/CodeGen/X86/avx2-arith.ll @@ -347,15 +347,13 @@ define <8 x i32> @mul_const9(<8 x i32> %x) { ; X32-LABEL: mul_const9: ; X32: # %bb.0: -; X32-NEXT: movl $2, %eax -; X32-NEXT: vmovd %eax, %xmm1 +; X32-NEXT: vmovd {{.*#+}} xmm1 = mem[0],zero,zero,zero ; X32-NEXT: vpmulld %ymm1, %ymm0, %ymm0 ; X32-NEXT: retl ; ; X64-LABEL: mul_const9: ; X64: # %bb.0: -; X64-NEXT: movl $2, %eax -; X64-NEXT: vmovd %eax, %xmm1 +; X64-NEXT: vmovd {{.*#+}} xmm1 = mem[0],zero,zero,zero ; X64-NEXT: vpmulld %ymm1, %ymm0, %ymm0 ; X64-NEXT: retq %y = mul <8 x i32> %x, Index: llvm/test/CodeGen/X86/combine-udiv.ll =================================================================== --- llvm/test/CodeGen/X86/combine-udiv.ll +++ llvm/test/CodeGen/X86/combine-udiv.ll @@ -590,8 +590,7 @@ ; ; XOP-LABEL: combine_vec_udiv_nonuniform2: ; XOP: # %bb.0: -; XOP-NEXT: movl $65535, %eax # imm = 0xFFFF -; XOP-NEXT: vmovd %eax, %xmm1 +; XOP-NEXT: vmovd {{.*#+}} xmm1 = mem[0],zero,zero,zero ; XOP-NEXT: vpshlw %xmm1, %xmm0, %xmm0 ; XOP-NEXT: vpmulhuw {{.*}}(%rip), %xmm0, %xmm0 ; XOP-NEXT: vpshlw {{.*}}(%rip), %xmm0, %xmm0 @@ -678,10 +677,9 @@ ; ; AVX2-LABEL: combine_vec_udiv_nonuniform4: ; AVX2: # %bb.0: -; AVX2-NEXT: movl $171, %eax -; AVX2-NEXT: vmovd %eax, %xmm1 -; AVX2-NEXT: vpmovzxbw {{.*#+}} xmm2 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero -; AVX2-NEXT: vpmullw %xmm1, %xmm2, %xmm1 +; AVX2-NEXT: vpmovzxbw {{.*#+}} xmm1 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero +; AVX2-NEXT: vmovd {{.*#+}} xmm2 = mem[0],zero,zero,zero +; AVX2-NEXT: vpmullw %xmm2, %xmm1, %xmm1 ; AVX2-NEXT: vpsrlw $8, %xmm1, %xmm1 ; AVX2-NEXT: vpackuswb %xmm1, %xmm1, %xmm1 ; AVX2-NEXT: vpsrlw $7, %xmm1, %xmm1 Index: llvm/test/CodeGen/X86/fcmp-constant.ll =================================================================== --- llvm/test/CodeGen/X86/fcmp-constant.ll +++ llvm/test/CodeGen/X86/fcmp-constant.ll @@ -92,8 +92,7 @@ define <2 x i64> @fcmp_ueq_v2f64_undef_elt() { ; CHECK-LABEL: fcmp_ueq_v2f64_undef_elt: ; CHECK: # %bb.0: -; CHECK-NEXT: movq $-1, %rax -; CHECK-NEXT: movq %rax, %xmm0 +; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: retq %1 = fcmp ueq <2 x double> , %2 = sext <2 x i1> %1 to <2 x i64> Index: llvm/test/CodeGen/X86/insert-into-constant-vector.ll =================================================================== --- llvm/test/CodeGen/X86/insert-into-constant-vector.ll +++ llvm/test/CodeGen/X86/insert-into-constant-vector.ll @@ -129,10 +129,9 @@ define <2 x i64> @elt0_v2i64(i64 %x) { ; X32SSE-LABEL: elt0_v2i64: ; X32SSE: # %bb.0: -; X32SSE-NEXT: movl $1, %eax -; X32SSE-NEXT: movd %eax, %xmm1 -; X32SSE-NEXT: movq {{.*#+}} xmm0 = mem[0],zero -; X32SSE-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] +; X32SSE-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero +; X32SSE-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero +; X32SSE-NEXT: movlhps {{.*#+}} xmm0 = xmm0[0],xmm1[0] ; X32SSE-NEXT: retl ; ; X64SSE2-LABEL: elt0_v2i64: @@ -150,10 +149,9 @@ ; ; X32AVX-LABEL: elt0_v2i64: ; X32AVX: # %bb.0: -; X32AVX-NEXT: movl $1, %eax -; X32AVX-NEXT: vmovd %eax, %xmm0 -; X32AVX-NEXT: vmovq {{.*#+}} xmm1 = mem[0],zero -; X32AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0] +; X32AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero +; X32AVX-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero +; X32AVX-NEXT: vmovlhps {{.*#+}} xmm0 = xmm1[0],xmm0[0] ; X32AVX-NEXT: retl ; ; X64AVX-LABEL: elt0_v2i64: @@ -365,10 +363,9 @@ define <8 x i64> @elt5_v8i64(i64 %x) { ; X32SSE-LABEL: elt5_v8i64: ; X32SSE: # %bb.0: -; X32SSE-NEXT: movl $4, %eax -; X32SSE-NEXT: movd %eax, %xmm2 -; X32SSE-NEXT: movq {{.*#+}} xmm0 = mem[0],zero -; X32SSE-NEXT: punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm0[0] +; X32SSE-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero +; X32SSE-NEXT: movss {{.*#+}} xmm2 = mem[0],zero,zero,zero +; X32SSE-NEXT: movlhps {{.*#+}} xmm2 = xmm2[0],xmm0[0] ; X32SSE-NEXT: movaps {{.*#+}} xmm0 = [42,0,1,0] ; X32SSE-NEXT: movaps {{.*#+}} xmm1 = [2,0,3,0] ; X32SSE-NEXT: movaps {{.*#+}} xmm3 = [6,0,7,0] @@ -395,10 +392,9 @@ ; ; X32AVX1-LABEL: elt5_v8i64: ; X32AVX1: # %bb.0: -; X32AVX1-NEXT: movl $4, %eax -; X32AVX1-NEXT: vmovd %eax, %xmm0 -; X32AVX1-NEXT: vmovq {{.*#+}} xmm1 = mem[0],zero -; X32AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] +; X32AVX1-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero +; X32AVX1-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero +; X32AVX1-NEXT: vmovlhps {{.*#+}} xmm0 = xmm1[0],xmm0[0] ; X32AVX1-NEXT: vinsertf128 $1, {{\.LCPI.*}}, %ymm0, %ymm1 ; X32AVX1-NEXT: vmovaps {{.*#+}} ymm0 = [42,0,1,0,2,0,3,0] ; X32AVX1-NEXT: retl @@ -413,11 +409,10 @@ ; ; X32AVX2-LABEL: elt5_v8i64: ; X32AVX2: # %bb.0: -; X32AVX2-NEXT: movl $4, %eax -; X32AVX2-NEXT: vmovd %eax, %xmm0 -; X32AVX2-NEXT: vmovq {{.*#+}} xmm1 = mem[0],zero -; X32AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] -; X32AVX2-NEXT: vinserti128 $1, {{\.LCPI.*}}, %ymm0, %ymm1 +; X32AVX2-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero +; X32AVX2-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero +; X32AVX2-NEXT: vmovlhps {{.*#+}} xmm0 = xmm1[0],xmm0[0] +; X32AVX2-NEXT: vinsertf128 $1, {{\.LCPI.*}}, %ymm0, %ymm1 ; X32AVX2-NEXT: vmovaps {{.*#+}} ymm0 = [42,0,1,0,2,0,3,0] ; X32AVX2-NEXT: retl ; @@ -431,13 +426,12 @@ ; ; X32AVX512F-LABEL: elt5_v8i64: ; X32AVX512F: # %bb.0: -; X32AVX512F-NEXT: vmovdqa {{.*#+}} ymm0 = [42,0,1,0,2,0,3,0] -; X32AVX512F-NEXT: movl $4, %eax -; X32AVX512F-NEXT: vmovd %eax, %xmm1 -; X32AVX512F-NEXT: vmovq {{.*#+}} xmm2 = mem[0],zero -; X32AVX512F-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm2[0] -; X32AVX512F-NEXT: vinserti128 $1, {{\.LCPI.*}}, %ymm1, %ymm1 -; X32AVX512F-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0 +; X32AVX512F-NEXT: vmovaps {{.*#+}} ymm0 = [42,0,1,0,2,0,3,0] +; X32AVX512F-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero +; X32AVX512F-NEXT: vmovss {{.*#+}} xmm2 = mem[0],zero,zero,zero +; X32AVX512F-NEXT: vmovlhps {{.*#+}} xmm1 = xmm2[0],xmm1[0] +; X32AVX512F-NEXT: vinsertf128 $1, {{\.LCPI.*}}, %ymm1, %ymm1 +; X32AVX512F-NEXT: vinsertf64x4 $1, %ymm1, %zmm0, %zmm0 ; X32AVX512F-NEXT: retl ; ; X64AVX512F-LABEL: elt5_v8i64: Index: llvm/test/CodeGen/X86/sad.ll =================================================================== --- llvm/test/CodeGen/X86/sad.ll +++ llvm/test/CodeGen/X86/sad.ll @@ -544,8 +544,7 @@ ; SSE2: # %bb.0: # %entry ; SSE2-NEXT: pxor %xmm0, %xmm0 ; SSE2-NEXT: movq $-1024, %rax # imm = 0xFC00 -; SSE2-NEXT: movl $65535, %ecx # imm = 0xFFFF -; SSE2-NEXT: movd %ecx, %xmm1 +; SSE2-NEXT: movd {{.*#+}} xmm1 = mem[0],zero,zero,zero ; SSE2-NEXT: .p2align 4, 0x90 ; SSE2-NEXT: .LBB3_1: # %vector.body ; SSE2-NEXT: # =>This Inner Loop Header: Depth=1 @@ -1016,8 +1015,7 @@ ; AVX2-NEXT: vpsadbw (%rsi), %xmm0, %xmm0 ; AVX2-NEXT: vmovdqu (%rdx), %xmm1 ; AVX2-NEXT: vpsadbw (%rcx), %xmm1, %xmm1 -; AVX2-NEXT: movl $1, %eax -; AVX2-NEXT: vmovd %eax, %xmm2 +; AVX2-NEXT: vmovd {{.*#+}} xmm2 = mem[0],zero,zero,zero ; AVX2-NEXT: vpaddd %xmm2, %xmm1, %xmm1 ; AVX2-NEXT: vpaddd %xmm1, %xmm0, %xmm0 ; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1] @@ -1033,8 +1031,7 @@ ; AVX512-NEXT: vpsadbw (%rsi), %xmm0, %xmm0 ; AVX512-NEXT: vmovdqu (%rdx), %xmm1 ; AVX512-NEXT: vpsadbw (%rcx), %xmm1, %xmm1 -; AVX512-NEXT: movl $1, %eax -; AVX512-NEXT: vmovd %eax, %xmm2 +; AVX512-NEXT: vmovd {{.*#+}} xmm2 = mem[0],zero,zero,zero ; AVX512-NEXT: vpaddd %xmm2, %xmm1, %xmm1 ; AVX512-NEXT: vpaddd %xmm1, %xmm0, %xmm0 ; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1] Index: llvm/test/CodeGen/X86/shuffle-combine-crash-3.ll =================================================================== --- llvm/test/CodeGen/X86/shuffle-combine-crash-3.ll +++ llvm/test/CodeGen/X86/shuffle-combine-crash-3.ll @@ -12,8 +12,12 @@ define i1 @dont_hit_assert(i24 signext %d) { ; CHECK-LABEL: dont_hit_assert: ; CHECK: # %bb.0: # %for.cond -; CHECK-NEXT: movb $-1, %al -; CHECK-NEXT: negb %al +; CHECK-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero +; CHECK-NEXT: pxor %xmm1, %xmm1 +; CHECK-NEXT: packssdw %xmm1, %xmm0 +; CHECK-NEXT: packsswb %xmm0, %xmm0 +; CHECK-NEXT: pmovmskb %xmm0, %eax +; CHECK-NEXT: cmpb $-1, %al ; CHECK-NEXT: sete %al ; CHECK-NEXT: retq for.cond: Index: llvm/test/CodeGen/X86/vector-shuffle-256-v16.ll =================================================================== --- llvm/test/CodeGen/X86/vector-shuffle-256-v16.ll +++ llvm/test/CodeGen/X86/vector-shuffle-256-v16.ll @@ -713,8 +713,7 @@ ; ; AVX512VL-LABEL: shuffle_v16i16_15_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00: ; AVX512VL: # %bb.0: -; AVX512VL-NEXT: movl $15, %eax -; AVX512VL-NEXT: vmovd %eax, %xmm1 +; AVX512VL-NEXT: vmovd {{.*#+}} xmm1 = mem[0],zero,zero,zero ; AVX512VL-NEXT: vpermw %ymm0, %ymm1, %ymm0 ; AVX512VL-NEXT: retq ; Index: llvm/test/CodeGen/X86/vector-shuffle-256-v32.ll =================================================================== --- llvm/test/CodeGen/X86/vector-shuffle-256-v32.ll +++ llvm/test/CodeGen/X86/vector-shuffle-256-v32.ll @@ -1600,24 +1600,21 @@ ; ; AVX2-LABEL: shuffle_v32i8_31_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00: ; AVX2: # %bb.0: +; AVX2-NEXT: vmovd {{.*#+}} xmm1 = mem[0],zero,zero,zero ; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,3,0,1] -; AVX2-NEXT: movl $15, %eax -; AVX2-NEXT: vmovd %eax, %xmm1 ; AVX2-NEXT: vpshufb %ymm1, %ymm0, %ymm0 ; AVX2-NEXT: retq ; ; AVX512VLBW-LABEL: shuffle_v32i8_31_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00: ; AVX512VLBW: # %bb.0: +; AVX512VLBW-NEXT: vmovd {{.*#+}} xmm1 = mem[0],zero,zero,zero ; AVX512VLBW-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,3,0,1] -; AVX512VLBW-NEXT: movl $15, %eax -; AVX512VLBW-NEXT: vmovd %eax, %xmm1 ; AVX512VLBW-NEXT: vpshufb %ymm1, %ymm0, %ymm0 ; AVX512VLBW-NEXT: retq ; ; AVX512VLVBMI-LABEL: shuffle_v32i8_31_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00: ; AVX512VLVBMI: # %bb.0: -; AVX512VLVBMI-NEXT: movl $31, %eax -; AVX512VLVBMI-NEXT: vmovd %eax, %xmm1 +; AVX512VLVBMI-NEXT: vmovd {{.*#+}} xmm1 = mem[0],zero,zero,zero ; AVX512VLVBMI-NEXT: vpermb %ymm0, %ymm1, %ymm0 ; AVX512VLVBMI-NEXT: retq ; @@ -1632,9 +1629,8 @@ ; ; XOPAVX2-LABEL: shuffle_v32i8_31_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00: ; XOPAVX2: # %bb.0: +; XOPAVX2-NEXT: vmovd {{.*#+}} xmm1 = mem[0],zero,zero,zero ; XOPAVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,3,0,1] -; XOPAVX2-NEXT: movl $15, %eax -; XOPAVX2-NEXT: vmovd %eax, %xmm1 ; XOPAVX2-NEXT: vpshufb %ymm1, %ymm0, %ymm0 ; XOPAVX2-NEXT: retq %shuffle = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> Index: llvm/test/CodeGen/X86/vector-shuffle-256-v8.ll =================================================================== --- llvm/test/CodeGen/X86/vector-shuffle-256-v8.ll +++ llvm/test/CodeGen/X86/vector-shuffle-256-v8.ll @@ -187,9 +187,8 @@ ; ; AVX2OR512VL-LABEL: shuffle_v8f32_70000000: ; AVX2OR512VL: # %bb.0: -; AVX2OR512VL-NEXT: movl $7, %eax -; AVX2OR512VL-NEXT: vmovd %eax, %xmm1 -; AVX2OR512VL-NEXT: vpermd %ymm0, %ymm1, %ymm0 +; AVX2OR512VL-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero +; AVX2OR512VL-NEXT: vpermps %ymm0, %ymm1, %ymm0 ; AVX2OR512VL-NEXT: retq %shuffle = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> ret <8 x float> %shuffle @@ -1510,9 +1509,8 @@ ; ; AVX2OR512VL-LABEL: shuffle_v8i32_70000000: ; AVX2OR512VL: # %bb.0: -; AVX2OR512VL-NEXT: movl $7, %eax -; AVX2OR512VL-NEXT: vmovd %eax, %xmm1 -; AVX2OR512VL-NEXT: vpermd %ymm0, %ymm1, %ymm0 +; AVX2OR512VL-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero +; AVX2OR512VL-NEXT: vpermps %ymm0, %ymm1, %ymm0 ; AVX2OR512VL-NEXT: retq %shuffle = shufflevector <8 x i32> %a, <8 x i32> %b, <8 x i32> ret <8 x i32> %shuffle Index: llvm/test/CodeGen/X86/vector-shuffle-512-v32.ll =================================================================== --- llvm/test/CodeGen/X86/vector-shuffle-512-v32.ll +++ llvm/test/CodeGen/X86/vector-shuffle-512-v32.ll @@ -201,16 +201,14 @@ define <32 x i16> @shuffle_v32i16_0zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz(<32 x i16> %a) { ; KNL-LABEL: shuffle_v32i16_0zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz: ; KNL: ## %bb.0: -; KNL-NEXT: movl $65535, %eax ## imm = 0xFFFF -; KNL-NEXT: vmovd %eax, %xmm1 -; KNL-NEXT: vpand %ymm1, %ymm0, %ymm0 +; KNL-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero +; KNL-NEXT: vandps %ymm1, %ymm0, %ymm0 ; KNL-NEXT: retq ; ; SKX-LABEL: shuffle_v32i16_0zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz: ; SKX: ## %bb.0: -; SKX-NEXT: movl $65535, %eax ## imm = 0xFFFF -; SKX-NEXT: vmovd %eax, %xmm1 -; SKX-NEXT: vpandq %zmm1, %zmm0, %zmm0 +; SKX-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero +; SKX-NEXT: vandps %zmm1, %zmm0, %zmm0 ; SKX-NEXT: retq %shuffle = shufflevector <32 x i16> %a, <32 x i16> zeroinitializer, <32 x i32> ret <32 x i16> %shuffle Index: llvm/test/CodeGen/X86/vector-shuffle-512-v64.ll =================================================================== --- llvm/test/CodeGen/X86/vector-shuffle-512-v64.ll +++ llvm/test/CodeGen/X86/vector-shuffle-512-v64.ll @@ -109,9 +109,8 @@ define <64 x i8> @shuffle_v64i8_0zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz(<64 x i8> %a) { ; AVX512F-LABEL: shuffle_v64i8_0zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz: ; AVX512F: # %bb.0: -; AVX512F-NEXT: movl $255, %eax -; AVX512F-NEXT: vmovd %eax, %xmm1 -; AVX512F-NEXT: vpand %ymm1, %ymm0, %ymm0 +; AVX512F-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero +; AVX512F-NEXT: vandps %ymm1, %ymm0, %ymm0 ; AVX512F-NEXT: retq ; ; AVX512BW-LABEL: shuffle_v64i8_0zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz: @@ -121,9 +120,8 @@ ; ; AVX512DQ-LABEL: shuffle_v64i8_0zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz: ; AVX512DQ: # %bb.0: -; AVX512DQ-NEXT: movl $255, %eax -; AVX512DQ-NEXT: vmovd %eax, %xmm1 -; AVX512DQ-NEXT: vpand %ymm1, %ymm0, %ymm0 +; AVX512DQ-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero +; AVX512DQ-NEXT: vandps %ymm1, %ymm0, %ymm0 ; AVX512DQ-NEXT: retq ; ; AVX512VBMI-LABEL: shuffle_v64i8_0zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz: Index: llvm/test/CodeGen/X86/vector-shuffle-512-v8.ll =================================================================== --- llvm/test/CodeGen/X86/vector-shuffle-512-v8.ll +++ llvm/test/CodeGen/X86/vector-shuffle-512-v8.ll @@ -142,9 +142,8 @@ define <8 x double> @shuffle_v8f64_70000000(<8 x double> %a, <8 x double> %b) { ; ALL-LABEL: shuffle_v8f64_70000000: ; ALL: # %bb.0: -; ALL-NEXT: movl $7, %eax -; ALL-NEXT: vmovd %eax, %xmm1 -; ALL-NEXT: vpermq %zmm0, %zmm1, %zmm0 +; ALL-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero +; ALL-NEXT: vpermpd %zmm0, %zmm1, %zmm0 ; ALL-NEXT: ret{{[l|q]}} %shuffle = shufflevector <8 x double> %a, <8 x double> %b, <8 x i32> ret <8 x double> %shuffle @@ -961,9 +960,8 @@ define <8 x i64> @shuffle_v8i64_70000000(<8 x i64> %a, <8 x i64> %b) { ; ALL-LABEL: shuffle_v8i64_70000000: ; ALL: # %bb.0: -; ALL-NEXT: movl $7, %eax -; ALL-NEXT: vmovd %eax, %xmm1 -; ALL-NEXT: vpermq %zmm0, %zmm1, %zmm0 +; ALL-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero +; ALL-NEXT: vpermpd %zmm0, %zmm1, %zmm0 ; ALL-NEXT: ret{{[l|q]}} %shuffle = shufflevector <8 x i64> %a, <8 x i64> %b, <8 x i32> ret <8 x i64> %shuffle Index: llvm/test/CodeGen/X86/vector-shuffle-combining-avx512f.ll =================================================================== --- llvm/test/CodeGen/X86/vector-shuffle-combining-avx512f.ll +++ llvm/test/CodeGen/X86/vector-shuffle-combining-avx512f.ll @@ -899,12 +899,11 @@ define <8 x double> @combine_vpermi2var_8f64_as_permpd(<8 x double> %x0, <8 x double> %x1, i64 %a2) { ; X86-LABEL: combine_vpermi2var_8f64_as_permpd: ; X86: # %bb.0: -; X86-NEXT: movl $2, %eax -; X86-NEXT: vmovd %eax, %xmm2 -; X86-NEXT: vmovq {{.*#+}} xmm3 = mem[0],zero -; X86-NEXT: vpunpcklqdq {{.*#+}} xmm2 = xmm3[0],xmm2[0] -; X86-NEXT: vinserti128 $1, {{\.LCPI.*}}, %ymm2, %ymm2 -; X86-NEXT: vinserti64x4 $1, {{\.LCPI.*}}, %zmm2, %zmm2 +; X86-NEXT: vmovss {{.*#+}} xmm2 = mem[0],zero,zero,zero +; X86-NEXT: vmovsd {{.*#+}} xmm3 = mem[0],zero +; X86-NEXT: vunpcklpd {{.*#+}} xmm2 = xmm3[0],xmm2[0] +; X86-NEXT: vinsertf128 $1, {{\.LCPI.*}}, %ymm2, %ymm2 +; X86-NEXT: vinsertf64x4 $1, {{\.LCPI.*}}, %zmm2, %zmm2 ; X86-NEXT: vpermi2pd %zmm1, %zmm0, %zmm2 ; X86-NEXT: vpermpd {{.*#+}} zmm0 = zmm2[2,3,1,1,6,7,5,5] ; X86-NEXT: retl Index: llvm/test/CodeGen/X86/vector-shuffle-combining-xop.ll =================================================================== --- llvm/test/CodeGen/X86/vector-shuffle-combining-xop.ll +++ llvm/test/CodeGen/X86/vector-shuffle-combining-xop.ll @@ -133,10 +133,9 @@ define <4 x double> @demandedelts_vpermil2pd256_as_shufpd(<4 x double> %a0, <4 x double> %a1, i64 %a2) { ; X86-AVX-LABEL: demandedelts_vpermil2pd256_as_shufpd: ; X86-AVX: # %bb.0: -; X86-AVX-NEXT: movl $4, %eax -; X86-AVX-NEXT: vmovd %eax, %xmm2 -; X86-AVX-NEXT: vmovq {{.*#+}} xmm3 = mem[0],zero -; X86-AVX-NEXT: vpunpcklqdq {{.*#+}} xmm2 = xmm3[0],xmm2[0] +; X86-AVX-NEXT: vmovss {{.*#+}} xmm2 = mem[0],zero,zero,zero +; X86-AVX-NEXT: vmovsd {{.*#+}} xmm3 = mem[0],zero +; X86-AVX-NEXT: vmovlhps {{.*#+}} xmm2 = xmm3[0],xmm2[0] ; X86-AVX-NEXT: vinsertf128 $1, {{\.LCPI.*}}, %ymm2, %ymm2 ; X86-AVX-NEXT: vpermil2pd $0, %ymm2, %ymm1, %ymm0, %ymm0 ; X86-AVX-NEXT: vpermilpd {{.*#+}} ymm0 = ymm0[1,1,2,3] @@ -144,11 +143,10 @@ ; ; X86-AVX2-LABEL: demandedelts_vpermil2pd256_as_shufpd: ; X86-AVX2: # %bb.0: -; X86-AVX2-NEXT: movl $4, %eax -; X86-AVX2-NEXT: vmovd %eax, %xmm2 -; X86-AVX2-NEXT: vmovq {{.*#+}} xmm3 = mem[0],zero -; X86-AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm2 = xmm3[0],xmm2[0] -; X86-AVX2-NEXT: vinserti128 $1, {{\.LCPI.*}}, %ymm2, %ymm2 +; X86-AVX2-NEXT: vmovss {{.*#+}} xmm2 = mem[0],zero,zero,zero +; X86-AVX2-NEXT: vmovsd {{.*#+}} xmm3 = mem[0],zero +; X86-AVX2-NEXT: vunpcklpd {{.*#+}} xmm2 = xmm3[0],xmm2[0] +; X86-AVX2-NEXT: vinsertf128 $1, {{\.LCPI.*}}, %ymm2, %ymm2 ; X86-AVX2-NEXT: vpermil2pd $0, %ymm2, %ymm1, %ymm0, %ymm0 ; X86-AVX2-NEXT: vpermilpd {{.*#+}} ymm0 = ymm0[1,1,2,3] ; X86-AVX2-NEXT: retl Index: llvm/test/CodeGen/X86/vector-shuffle-v1.ll =================================================================== --- llvm/test/CodeGen/X86/vector-shuffle-v1.ll +++ llvm/test/CodeGen/X86/vector-shuffle-v1.ll @@ -46,7 +46,7 @@ ; AVX512F-NEXT: vpsllq $63, %xmm0, %xmm0 ; AVX512F-NEXT: vptestmq %zmm0, %zmm0, %k1 ; AVX512F-NEXT: vpternlogq $255, %zmm0, %zmm0, %zmm0 {%k1} {z} -; AVX512F-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1 +; AVX512F-NEXT: vmovq {{.*#+}} xmm1 = mem[0],zero ; AVX512F-NEXT: vpalignr {{.*#+}} xmm0 = xmm0[8,9,10,11,12,13,14,15],xmm1[0,1,2,3,4,5,6,7] ; AVX512F-NEXT: vptestmq %zmm0, %zmm0, %k1 ; AVX512F-NEXT: vpternlogq $255, %zmm0, %zmm0, %zmm0 {%k1} {z} @@ -60,8 +60,7 @@ ; AVX512VL-NEXT: vptestmq %xmm0, %xmm0, %k1 ; AVX512VL-NEXT: vpcmpeqd %xmm0, %xmm0, %xmm0 ; AVX512VL-NEXT: vmovdqa64 %xmm0, %xmm1 {%k1} {z} -; AVX512VL-NEXT: movq $-1, %rax -; AVX512VL-NEXT: vmovq %rax, %xmm2 +; AVX512VL-NEXT: vmovq {{.*#+}} xmm2 = mem[0],zero ; AVX512VL-NEXT: vpalignr {{.*#+}} xmm1 = xmm1[8,9,10,11,12,13,14,15],xmm2[0,1,2,3,4,5,6,7] ; AVX512VL-NEXT: vptestmq %xmm1, %xmm1, %k1 ; AVX512VL-NEXT: vmovdqa64 %xmm0, %xmm0 {%k1} {z} @@ -71,10 +70,9 @@ ; VL_BW_DQ: # %bb.0: ; VL_BW_DQ-NEXT: vpsllq $63, %xmm0, %xmm0 ; VL_BW_DQ-NEXT: vpmovq2m %xmm0, %k0 -; VL_BW_DQ-NEXT: movq $-1, %rax -; VL_BW_DQ-NEXT: vmovq %rax, %xmm0 -; VL_BW_DQ-NEXT: vpmovm2q %k0, %xmm1 -; VL_BW_DQ-NEXT: vpalignr {{.*#+}} xmm0 = xmm1[8,9,10,11,12,13,14,15],xmm0[0,1,2,3,4,5,6,7] +; VL_BW_DQ-NEXT: vpmovm2q %k0, %xmm0 +; VL_BW_DQ-NEXT: vmovq {{.*#+}} xmm1 = mem[0],zero +; VL_BW_DQ-NEXT: vpalignr {{.*#+}} xmm0 = xmm0[8,9,10,11,12,13,14,15],xmm1[0,1,2,3,4,5,6,7] ; VL_BW_DQ-NEXT: vpmovq2m %xmm0, %k0 ; VL_BW_DQ-NEXT: vpmovm2q %k0, %xmm0 ; VL_BW_DQ-NEXT: retq