Index: llvm/lib/CodeGen/MachineInstr.cpp
===================================================================
--- llvm/lib/CodeGen/MachineInstr.cpp
+++ llvm/lib/CodeGen/MachineInstr.cpp
@@ -1228,81 +1228,84 @@
   if (TII->areMemAccessesTriviallyDisjoint(*this, Other))
     return false;
 
-  // FIXME: Need to handle multiple memory operands to support all targets.
-  if (!hasOneMemOperand() || !Other.hasOneMemOperand())
+  if (memoperands_empty() || Other.memoperands_empty())
     return true;
 
-  MachineMemOperand *MMOa = *memoperands_begin();
-  MachineMemOperand *MMOb = *Other.memoperands_begin();
-
-  // The following interface to AA is fashioned after DAGCombiner::isAlias
-  // and operates with MachineMemOperand offset with some important
-  // assumptions:
-  //   - LLVM fundamentally assumes flat address spaces.
-  //   - MachineOperand offset can *only* result from legalization and
-  //     cannot affect queries other than the trivial case of overlap
-  //     checking.
-  //   - These offsets never wrap and never step outside
-  //     of allocated objects.
-  //   - There should never be any negative offsets here.
-  //
-  // FIXME: Modify API to hide this math from "user"
-  // Even before we go to AA we can reason locally about some
-  // memory objects. It can save compile time, and possibly catch some
-  // corner cases not currently covered.
-
-  int64_t OffsetA = MMOa->getOffset();
-  int64_t OffsetB = MMOb->getOffset();
-  int64_t MinOffset = std::min(OffsetA, OffsetB);
-
-  uint64_t WidthA = MMOa->getSize();
-  uint64_t WidthB = MMOb->getSize();
-  bool KnownWidthA = WidthA != MemoryLocation::UnknownSize;
-  bool KnownWidthB = WidthB != MemoryLocation::UnknownSize;
-
-  const Value *ValA = MMOa->getValue();
-  const Value *ValB = MMOb->getValue();
-  bool SameVal = (ValA && ValB && (ValA == ValB));
-  if (!SameVal) {
-    const PseudoSourceValue *PSVa = MMOa->getPseudoValue();
-    const PseudoSourceValue *PSVb = MMOb->getPseudoValue();
-    if (PSVa && ValB && !PSVa->mayAlias(&MFI))
-      return false;
-    if (PSVb && ValA && !PSVb->mayAlias(&MFI))
-      return false;
-    if (PSVa && PSVb && (PSVa == PSVb))
-      SameVal = true;
-  }
+  for (auto &&MMOa : memoperands()) {
+    for (auto &&MMOb : Other.memoperands()) {
+      // The following interface to AA is fashioned after DAGCombiner::isAlias
+      // and operates with MachineMemOperand offset with some important
+      // assumptions:
+      //   - LLVM fundamentally assumes flat address spaces.
+      //   - MachineOperand offset can *only* result from legalization and
+      //     cannot affect queries other than the trivial case of overlap
+      //     checking.
+      //   - These offsets never wrap and never step outside
+      //     of allocated objects.
+      //   - There should never be any negative offsets here.
+      //
+      // FIXME: Modify API to hide this math from "user"
+      // Even before we go to AA we can reason locally about some
+      // memory objects. It can save compile time, and possibly catch some
+      // corner cases not currently covered.
+
+      int64_t OffsetA = MMOa->getOffset();
+      int64_t OffsetB = MMOb->getOffset();
+      int64_t MinOffset = std::min(OffsetA, OffsetB);
+
+      uint64_t WidthA = MMOa->getSize();
+      uint64_t WidthB = MMOb->getSize();
+      bool KnownWidthA = WidthA != MemoryLocation::UnknownSize;
+      bool KnownWidthB = WidthB != MemoryLocation::UnknownSize;
+
+      const Value *ValA = MMOa->getValue();
+      const Value *ValB = MMOb->getValue();
+      bool SameVal = (ValA && ValB && (ValA == ValB));
+      if (!SameVal) {
+        const PseudoSourceValue *PSVa = MMOa->getPseudoValue();
+        const PseudoSourceValue *PSVb = MMOb->getPseudoValue();
+        if (PSVa && ValB && !PSVa->mayAlias(&MFI))
+          return false;
+        if (PSVb && ValA && !PSVb->mayAlias(&MFI))
+          return false;
+        if (PSVa && PSVb && (PSVa == PSVb))
+          SameVal = true;
+      }
 
-  if (SameVal) {
-    if (!KnownWidthA || !KnownWidthB)
-      return true;
-    int64_t MaxOffset = std::max(OffsetA, OffsetB);
-    int64_t LowWidth = (MinOffset == OffsetA) ? WidthA : WidthB;
-    return (MinOffset + LowWidth > MaxOffset);
-  }
+      if (SameVal) {
+        if (!KnownWidthA || !KnownWidthB)
+          return true;
+        int64_t MaxOffset = std::max(OffsetA, OffsetB);
+        int64_t LowWidth = (MinOffset == OffsetA) ? WidthA : WidthB;
+        return (MinOffset + LowWidth > MaxOffset);
+      }
 
-  if (!AA)
-    return true;
+      if (!AA)
+        return true;
 
-  if (!ValA || !ValB)
-    return true;
+      if (!ValA || !ValB)
+        return true;
 
-  assert((OffsetA >= 0) && "Negative MachineMemOperand offset");
-  assert((OffsetB >= 0) && "Negative MachineMemOperand offset");
+      assert((OffsetA >= 0) && "Negative MachineMemOperand offset");
+      assert((OffsetB >= 0) && "Negative MachineMemOperand offset");
 
-  int64_t OverlapA = KnownWidthA ? WidthA + OffsetA - MinOffset
-                                 : MemoryLocation::UnknownSize;
-  int64_t OverlapB = KnownWidthB ? WidthB + OffsetB - MinOffset
-                                 : MemoryLocation::UnknownSize;
+      int64_t OverlapA = KnownWidthA ? WidthA + OffsetA - MinOffset
+                                     : MemoryLocation::UnknownSize;
+      int64_t OverlapB = KnownWidthB ? WidthB + OffsetB - MinOffset
+                                     : MemoryLocation::UnknownSize;
 
-  AliasResult AAResult = AA->alias(
-      MemoryLocation(ValA, OverlapA,
-                     UseTBAA ? MMOa->getAAInfo() : AAMDNodes()),
-      MemoryLocation(ValB, OverlapB,
-                     UseTBAA ? MMOb->getAAInfo() : AAMDNodes()));
+      AliasResult AAResult =
+          AA->alias(MemoryLocation(ValA, OverlapA,
+                                   UseTBAA ? MMOa->getAAInfo() : AAMDNodes()),
+                    MemoryLocation(ValB, OverlapB,
+                                   UseTBAA ? MMOb->getAAInfo() : AAMDNodes()));
 
-  return (AAResult != NoAlias);
+      if (AAResult != NoAlias)
+        return true;
+    }
+  }
+
+  return false;
 }
 
 /// hasOrderedMemoryRef - Return true if this instruction may have an ordered
Index: llvm/test/CodeGen/X86/store_op_load_fold2.ll
===================================================================
--- llvm/test/CodeGen/X86/store_op_load_fold2.ll
+++ llvm/test/CodeGen/X86/store_op_load_fold2.ll
@@ -17,13 +17,12 @@
         store i64 %tmp2676.us.us, i64* %tmp2666
         ret i32 0
 
-; INTEL: 	and	{{e..}}, dword ptr [356]
 ; INTEL:	and	dword ptr [360], {{e..}}
-; FIXME:	mov	dword ptr [356], {{e..}}
-; The above line comes out as 'mov 360, eax', but when the register is ecx it works?
+; INTEL: 	and	{{e..}}, dword ptr [356]
+; INTEL:	mov	dword ptr [356], {{e..}}
 
-; ATT: 	andl	356, %{{e..}}
 ; ATT:	andl	%{{e..}}, 360
+; ATT: 	andl	356, %{{e..}}
 ; ATT:	movl	%{{e..}}, 356
 
 }