diff --git a/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCChecker.cpp b/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCChecker.cpp
--- a/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCChecker.cpp
+++ b/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCChecker.cpp
@@ -391,7 +391,7 @@
   for (const auto &I : NewPreds) {
     unsigned P = I;
 
-    if (!Defs.count(P) || LatePreds.count(P)) {
+    if (!Defs.count(P) || LatePreds.count(P) || Defs.count(Hexagon::P3_0)) {
       // Error out if the new predicate register is not defined,
       // or defined "late"
       // (e.g., "{ if (p3.new)... ; p3 = sp1loop0(#r7:2, Rs) }").
diff --git a/llvm/test/MC/Hexagon/c4_newval.s b/llvm/test/MC/Hexagon/c4_newval.s
new file mode 100644
--- /dev/null
+++ b/llvm/test/MC/Hexagon/c4_newval.s
@@ -0,0 +1,19 @@
+# RUN: not llvm-mc -arch=hexagon %s 2>%t; FileCheck --implicit-check-not=error %s <%t
+
+.Lfoo:
+{ p3:0 = r0
+  if (!p0.new) jump:t .Lfoo }
+
+# CHECK: error: register `P0' used with `.new' but not validly modified in the same packet
+
+{ c4 = r0
+  if (!p0.new) jump:t .Lfoo }
+
+# CHECK: error: register `P0' used with `.new' but not validly modified in the same packet
+
+{ c4 = r0
+  p0 = r0
+  if (!p0.new) jump:t .Lfoo }
+
+# CHECK: error: register `P0' used with `.new' but not validly modified in the same packet
+# CHECK: error: register `P3_0' modified more than once
diff --git a/llvm/test/MC/Hexagon/multiple-pc4.s b/llvm/test/MC/Hexagon/multiple-pc4.s
new file mode 100644
--- /dev/null
+++ b/llvm/test/MC/Hexagon/multiple-pc4.s
@@ -0,0 +1,17 @@
+# RUN: llvm-mc -arch=hexagon -filetype=asm %s 2>%t; FileCheck --implicit-check-not=error %s <%t
+
+# Check that multiple changes to a predicate in a packet are caught.
+
+	{ p0 = cmp.eq (r0, r0); p3:0 = r0 }
+# CHECK: rror: register {{.+}} modified more than once
+
+	{ p0 = cmp.eq (r0, r0); c4 = r0 }
+# CHECK: rror: register {{.+}} modified more than once
+
+	p3:0 = r9
+# CHECK-NOT: rror: register {{.+}} modified more than once
+
+# Multiple writes to the same predicate register are permitted:
+
+	{ p0 = cmp.eq (r0, r0); p0 = and(p1, p2) }
+# CHECK-NOT: rror: register {{.+}} modified more than once