Index: llvm/include/llvm/CodeGen/GlobalISel/LegalizerInfo.h =================================================================== --- llvm/include/llvm/CodeGen/GlobalISel/LegalizerInfo.h +++ llvm/include/llvm/CodeGen/GlobalISel/LegalizerInfo.h @@ -430,6 +430,14 @@ immIdx(0); // Inform verifier imm idx 0 is handled. return actionIf(Action, typeInSet(typeIdx(0), Types)); } + + LegalizeRuleSet &actionForTypeWithAnyImm( + LegalizeAction Action, std::initializer_list> Types) { + using namespace LegalityPredicates; + immIdx(0); // Inform verifier imm idx 0 is handled. + return actionIf(Action, typePairInSet(typeIdx(0), typeIdx(1), Types)); + } + /// Use the given action when type indexes 0 and 1 are both in the given list. /// That is, the type pair is in the cartesian product of the list. /// Action should not be an action that requires mutation. @@ -499,6 +507,13 @@ markAllIdxsAsCovered(); return actionForTypeWithAnyImm(LegalizeAction::Legal, Types); } + + LegalizeRuleSet &legalForTypeWithAnyImm( + std::initializer_list> Types) { + markAllIdxsAsCovered(); + return actionForTypeWithAnyImm(LegalizeAction::Legal, Types); + } + /// The instruction is legal when type indexes 0 and 1 along with the memory /// size and minimum alignment is any type and size tuple in the given list. LegalizeRuleSet &legalForTypesWithMemDesc( Index: llvm/include/llvm/Target/GenericOpcodes.td =================================================================== --- llvm/include/llvm/Target/GenericOpcodes.td +++ llvm/include/llvm/Target/GenericOpcodes.td @@ -956,7 +956,7 @@ // register banks have been selected. def G_EXTRACT : GenericInstruction { let OutOperandList = (outs type0:$res); - let InOperandList = (ins type1:$src, unknown:$offset); + let InOperandList = (ins type1:$src, untyped_imm_0:$offset); let hasSideEffects = 0; } @@ -975,7 +975,7 @@ // Insert a smaller register into a larger one at the specified bit-index. def G_INSERT : GenericInstruction { let OutOperandList = (outs type0:$dst); - let InOperandList = (ins type0:$src, type1:$op, unknown:$offset); + let InOperandList = (ins type0:$src, type1:$op, untyped_imm_0:$offset); let hasSideEffects = 0; } Index: llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir =================================================================== --- llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir +++ llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir @@ -76,7 +76,7 @@ # DEBUG-NEXT: .. the first uncovered type index: 1, OK # DEBUG-NEXT: .. the first uncovered imm index: 0, OK # -# DEBUG-NEXT: G_EXTRACT (opcode {{[0-9]+}}): 2 type indices, 0 imm indices +# DEBUG-NEXT: G_EXTRACT (opcode {{[0-9]+}}): 2 type indices, 1 imm index # DEBUG-NEXT: .. type index coverage check SKIPPED: user-defined predicate detected # DEBUG-NEXT: .. imm index coverage check SKIPPED: user-defined predicate detected # @@ -84,7 +84,7 @@ # DEBUG-NEXT: .. type index coverage check SKIPPED: user-defined predicate detected # DEBUG-NEXT: .. imm index coverage check SKIPPED: user-defined predicate detected # -# DEBUG-NEXT: G_INSERT (opcode {{[0-9]+}}): 2 type indices, 0 imm indices +# DEBUG-NEXT: G_INSERT (opcode {{[0-9]+}}): 2 type indices, 1 imm index # DEBUG-NEXT: .. type index coverage check SKIPPED: user-defined predicate detected # DEBUG-NEXT: .. imm index coverage check SKIPPED: user-defined predicate detected # Index: llvm/unittests/CodeGen/GlobalISel/LegalizerHelperTest.cpp =================================================================== --- llvm/unittests/CodeGen/GlobalISel/LegalizerHelperTest.cpp +++ llvm/unittests/CodeGen/GlobalISel/LegalizerHelperTest.cpp @@ -2311,7 +2311,7 @@ // Declare your legalization info DefineLegalizerInfo(A, { getActionDefinitionsBuilder(G_UNMERGE_VALUES).legalFor({{s32, s64}}); - getActionDefinitionsBuilder(G_EXTRACT).legalFor({{s16, s32}}); + getActionDefinitionsBuilder(G_EXTRACT).legalForTypeWithAnyImm({{s16, s32}}); }); LLT S16{LLT::scalar(16)};