diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
@@ -8150,7 +8150,7 @@
             : OpInfo;
     GetRegistersForValue(DAG, getCurSDLoc(), OpInfo, RefOpInfo);
 
-    auto DetectWriteToReservedRegister = [&]() {
+    auto DetectReservedRegister = [&]() {
       const MachineFunction &MF = DAG.getMachineFunction();
       const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo();
       for (unsigned Reg : OpInfo.AssignedRegs.Regs) {
@@ -8190,7 +8190,7 @@
           return;
         }
 
-        if (DetectWriteToReservedRegister())
+        if (DetectReservedRegister())
           return;
 
         // Add information to the INLINEASM node to know that this register is
@@ -8339,7 +8339,9 @@
         return;
       }
 
-      if (DetectWriteToReservedRegister())
+      // Detect the case where the input operand value would lead to a reserved
+      // register being written to.
+      if (InOperandVal && !InOperandVal.isUndef() && DetectReservedRegister())
         return;
 
       SDLoc dl = getCurSDLoc();
diff --git a/llvm/test/CodeGen/ARM/inline-asm-reserved-registers.ll b/llvm/test/CodeGen/ARM/inline-asm-reserved-registers.ll
--- a/llvm/test/CodeGen/ARM/inline-asm-reserved-registers.ll
+++ b/llvm/test/CodeGen/ARM/inline-asm-reserved-registers.ll
@@ -43,3 +43,10 @@
   %0 = call i32 asm sideeffect "mov $0, $1", "=r,{r6}"(i32 %input)
   ret void
 }
+
+; CHECK-ERROR-NOT: error: write to reserved register 'PC'
+define void @test_input_read() {
+entry:
+  %0 = call i32 asm sideeffect "mov $0, $1", "=r,{pc}"(i32 undef)
+  ret void
+}