diff --git a/llvm/include/llvm/CodeGen/MachineConstantPool.h b/llvm/include/llvm/CodeGen/MachineConstantPool.h --- a/llvm/include/llvm/CodeGen/MachineConstantPool.h +++ b/llvm/include/llvm/CodeGen/MachineConstantPool.h @@ -17,6 +17,7 @@ #include "llvm/ADT/DenseSet.h" #include "llvm/MC/SectionKind.h" +#include "llvm/Support/Alignment.h" #include #include @@ -45,7 +46,7 @@ Type *getType() const { return Ty; } virtual int getExistingMachineCPValue(MachineConstantPool *CP, - unsigned Alignment) = 0; + Align Alignment) = 0; virtual void addSelectionDAGCSEId(FoldingSetNodeID &ID) = 0; @@ -71,31 +72,27 @@ MachineConstantPoolValue *MachineCPVal; } Val; - /// The required alignment for this entry. The top bit is set when Val is - /// a target specific MachineConstantPoolValue. - unsigned Alignment; + /// The required alignment for this entry. + Align Alignment; - MachineConstantPoolEntry(const Constant *V, unsigned A) - : Alignment(A) { + bool IsMachineConstantPoolEntry; + + MachineConstantPoolEntry(const Constant *V, Align A) + : Alignment(A), IsMachineConstantPoolEntry(false) { Val.ConstVal = V; } - MachineConstantPoolEntry(MachineConstantPoolValue *V, unsigned A) - : Alignment(A) { + MachineConstantPoolEntry(MachineConstantPoolValue *V, Align A) + : Alignment(A), IsMachineConstantPoolEntry(true) { Val.MachineCPVal = V; - Alignment |= 1U << (sizeof(unsigned) * CHAR_BIT - 1); } /// isMachineConstantPoolEntry - Return true if the MachineConstantPoolEntry /// is indeed a target specific constantpool entry, not a wrapper over a /// Constant. - bool isMachineConstantPoolEntry() const { - return (int)Alignment < 0; - } + bool isMachineConstantPoolEntry() const { return IsMachineConstantPoolEntry; } - int getAlignment() const { - return Alignment & ~(1 << (sizeof(unsigned) * CHAR_BIT - 1)); - } + Align getAlign() const { return Alignment; } Type *getType() const; @@ -118,7 +115,7 @@ /// address of the function constant pool values. /// The machine constant pool. class MachineConstantPool { - unsigned PoolAlignment; ///< The alignment for the pool. + Align PoolAlignment; ///< The alignment for the pool. std::vector Constants; ///< The pool of constants. /// MachineConstantPoolValues that use an existing MachineConstantPoolEntry. DenseSet MachineCPVsSharingEntries; @@ -132,16 +129,15 @@ : PoolAlignment(1), DL(DL) {} ~MachineConstantPool(); - /// getConstantPoolAlignment - Return the alignment required by - /// the whole constant pool, of which the first element must be aligned. - unsigned getConstantPoolAlignment() const { return PoolAlignment; } + /// Return the alignment required by the whole constant pool, of which the + /// first element must be aligned. + Align getConstantPoolAlign() const { return PoolAlignment; } /// getConstantPoolIndex - Create a new entry in the constant pool or return /// an existing one. User must specify the minimum required alignment for /// the object. - unsigned getConstantPoolIndex(const Constant *C, unsigned Alignment); - unsigned getConstantPoolIndex(MachineConstantPoolValue *V, - unsigned Alignment); + unsigned getConstantPoolIndex(const Constant *C, Align Alignment); + unsigned getConstantPoolIndex(MachineConstantPoolValue *V, Align Alignment); /// isEmpty - Return true if this constant pool contains no constants. bool isEmpty() const { return Constants.empty(); } diff --git a/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp b/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp --- a/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp +++ b/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp @@ -1831,7 +1831,7 @@ SmallVector CPSections; for (unsigned i = 0, e = CP.size(); i != e; ++i) { const MachineConstantPoolEntry &CPE = CP[i]; - unsigned Align = CPE.getAlignment(); + unsigned Align = CPE.getAlign().value(); SectionKind Kind = CPE.getSectionKind(&getDataLayout()); @@ -1882,8 +1882,7 @@ MachineConstantPoolEntry CPE = CP[CPI]; // Emit inter-object padding for alignment. - unsigned AlignMask = CPE.getAlignment() - 1; - unsigned NewOffset = (Offset + AlignMask) & ~AlignMask; + unsigned NewOffset = alignTo(Offset, CPE.getAlign()); OutStreamer->emitZeros(NewOffset - Offset); Type *Ty = CPE.getType(); @@ -2904,7 +2903,7 @@ const DataLayout &DL = MF->getDataLayout(); SectionKind Kind = CPE.getSectionKind(&DL); const Constant *C = CPE.Val.ConstVal; - unsigned Align = CPE.Alignment; + unsigned Align = CPE.Alignment.value(); if (const MCSectionCOFF *S = dyn_cast( getObjFileLowering().getSectionForConstant(DL, Kind, C, Align))) { if (MCSymbol *Sym = S->getCOMDATSymbol()) { diff --git a/llvm/lib/CodeGen/MIRParser/MIRParser.cpp b/llvm/lib/CodeGen/MIRParser/MIRParser.cpp --- a/llvm/lib/CodeGen/MIRParser/MIRParser.cpp +++ b/llvm/lib/CodeGen/MIRParser/MIRParser.cpp @@ -841,8 +841,7 @@ const Align PrefTypeAlign = M.getDataLayout().getPrefTypeAlign(Value->getType()); const Align Alignment = YamlConstant.Alignment.getValueOr(PrefTypeAlign); - unsigned Index = - ConstantPool.getConstantPoolIndex(Value, Alignment.value()); + unsigned Index = ConstantPool.getConstantPoolIndex(Value, Alignment); if (!ConstantPoolSlots.insert(std::make_pair(YamlConstant.ID.Value, Index)) .second) return error(YamlConstant.ID.SourceRange.Start, diff --git a/llvm/lib/CodeGen/MIRPrinter.cpp b/llvm/lib/CodeGen/MIRPrinter.cpp --- a/llvm/lib/CodeGen/MIRPrinter.cpp +++ b/llvm/lib/CodeGen/MIRPrinter.cpp @@ -517,7 +517,7 @@ yaml::MachineConstantPoolValue YamlConstant; YamlConstant.ID = ID++; YamlConstant.Value = StrOS.str(); - YamlConstant.Alignment = MaybeAlign(Constant.getAlignment()); + YamlConstant.Alignment = Constant.getAlign(); YamlConstant.IsTargetSpecific = Constant.isMachineConstantPoolEntry(); MF.Constants.push_back(YamlConstant); diff --git a/llvm/lib/CodeGen/MachineFunction.cpp b/llvm/lib/CodeGen/MachineFunction.cpp --- a/llvm/lib/CodeGen/MachineFunction.cpp +++ b/llvm/lib/CodeGen/MachineFunction.cpp @@ -1176,8 +1176,7 @@ /// Create a new entry in the constant pool or return an existing one. /// User must specify the log2 of the minimum required alignment for the object. unsigned MachineConstantPool::getConstantPoolIndex(const Constant *C, - unsigned Alignment) { - assert(Alignment && "Alignment must be specified!"); + Align Alignment) { if (Alignment > PoolAlignment) PoolAlignment = Alignment; // Check to see if we already have this constant. @@ -1186,7 +1185,7 @@ for (unsigned i = 0, e = Constants.size(); i != e; ++i) if (!Constants[i].isMachineConstantPoolEntry() && CanShareConstantPoolEntry(Constants[i].Val.ConstVal, C, DL)) { - if ((unsigned)Constants[i].getAlignment() < Alignment) + if (Constants[i].getAlign() < Alignment) Constants[i].Alignment = Alignment; return i; } @@ -1196,8 +1195,7 @@ } unsigned MachineConstantPool::getConstantPoolIndex(MachineConstantPoolValue *V, - unsigned Alignment) { - assert(Alignment && "Alignment must be specified!"); + Align Alignment) { if (Alignment > PoolAlignment) PoolAlignment = Alignment; // Check to see if we already have this constant. @@ -1223,7 +1221,7 @@ Constants[i].Val.MachineCPVal->print(OS); else Constants[i].Val.ConstVal->printAsOperand(OS, /*PrintType=*/false); - OS << ", align=" << Constants[i].getAlignment(); + OS << ", align=" << Constants[i].getAlign().value(); OS << "\n"; } } diff --git a/llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp b/llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp --- a/llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp @@ -418,9 +418,9 @@ unsigned Idx; MachineConstantPool *MCP = MF->getConstantPool(); if (CP->isMachineConstantPoolEntry()) - Idx = MCP->getConstantPoolIndex(CP->getMachineCPVal(), Alignment.value()); + Idx = MCP->getConstantPoolIndex(CP->getMachineCPVal(), Alignment); else - Idx = MCP->getConstantPoolIndex(CP->getConstVal(), Alignment.value()); + Idx = MCP->getConstantPoolIndex(CP->getConstVal(), Alignment); MIB.addConstantPoolIndex(Idx, Offset, CP->getTargetFlags()); } else if (ExternalSymbolSDNode *ES = dyn_cast(Op)) { MIB.addExternalSymbol(ES->getSymbol(), ES->getTargetFlags()); diff --git a/llvm/lib/Target/AArch64/AArch64FastISel.cpp b/llvm/lib/Target/AArch64/AArch64FastISel.cpp --- a/llvm/lib/Target/AArch64/AArch64FastISel.cpp +++ b/llvm/lib/Target/AArch64/AArch64FastISel.cpp @@ -434,11 +434,9 @@ // Materialize via constant pool. MachineConstantPool wants an explicit // alignment. - unsigned Align = DL.getPrefTypeAlignment(CFP->getType()); - if (Align == 0) - Align = DL.getTypeAllocSize(CFP->getType()); + Align Alignment = DL.getPrefTypeAlign(CFP->getType()); - unsigned CPI = MCP.getConstantPoolIndex(cast(CFP), Align); + unsigned CPI = MCP.getConstantPoolIndex(cast(CFP), Alignment); unsigned ADRPReg = createResultReg(&AArch64::GPR64commonRegClass); BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(AArch64::ADRP), ADRPReg).addConstantPoolIndex(CPI, 0, AArch64II::MO_PAGE); diff --git a/llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp b/llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp --- a/llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp +++ b/llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp @@ -3522,12 +3522,10 @@ AArch64InstructionSelector::emitConstantPoolEntry(Constant *CPVal, MachineFunction &MF) const { Type *CPTy = CPVal->getType(); - unsigned Align = MF.getDataLayout().getPrefTypeAlignment(CPTy); - if (Align == 0) - Align = MF.getDataLayout().getTypeAllocSize(CPTy); + Align Alignment = MF.getDataLayout().getPrefTypeAlign(CPTy); MachineConstantPool *MCP = MF.getConstantPool(); - return MCP->getConstantPoolIndex(CPVal, Align); + return MCP->getConstantPoolIndex(CPVal, Alignment); } MachineInstr *AArch64InstructionSelector::emitLoadFromConstantPool( diff --git a/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp b/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp --- a/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp +++ b/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp @@ -1737,7 +1737,7 @@ cast(ACPV)->getMBB(), PCLabelId, 4); else llvm_unreachable("Unexpected ARM constantpool value type!!"); - CPI = MCP->getConstantPoolIndex(NewCPV, MCPE.getAlignment()); + CPI = MCP->getConstantPoolIndex(NewCPV, MCPE.getAlign()); return PCLabelId; } diff --git a/llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp b/llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp --- a/llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp +++ b/llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp @@ -477,7 +477,7 @@ MachineConstantPool *ConstantPool = MF.getConstantPool(); const Constant *C = ConstantInt::get(Type::getInt32Ty(MF.getFunction().getContext()), Val); - unsigned Idx = ConstantPool->getConstantPoolIndex(C, 4); + unsigned Idx = ConstantPool->getConstantPoolIndex(C, Align(4)); BuildMI(MBB, MBBI, dl, TII.get(ARM::LDRcp)) .addReg(DestReg, getDefRegState(true), SubIdx) diff --git a/llvm/lib/Target/ARM/ARMConstantIslandPass.cpp b/llvm/lib/Target/ARM/ARMConstantIslandPass.cpp --- a/llvm/lib/Target/ARM/ARMConstantIslandPass.cpp +++ b/llvm/lib/Target/ARM/ARMConstantIslandPass.cpp @@ -345,7 +345,7 @@ LLVM_DEBUG(dbgs() << "***** ARMConstantIslands: " << MCP->getConstants().size() << " CP entries, aligned to " - << MCP->getConstantPoolAlignment() << " bytes *****\n"); + << MCP->getConstantPoolAlign().value() << " bytes *****\n"); STI = &static_cast(MF->getSubtarget()); TII = STI->getInstrInfo(); @@ -483,7 +483,7 @@ MF->push_back(BB); // MachineConstantPool measures alignment in bytes. - const Align MaxAlign(MCP->getConstantPoolAlignment()); + const Align MaxAlign = MCP->getConstantPoolAlign(); const unsigned MaxLogAlign = Log2(MaxAlign); // Mark the basic block as required by the const-pool. @@ -507,14 +507,13 @@ const DataLayout &TD = MF->getDataLayout(); for (unsigned i = 0, e = CPs.size(); i != e; ++i) { unsigned Size = TD.getTypeAllocSize(CPs[i].getType()); - unsigned Align = CPs[i].getAlignment(); - assert(isPowerOf2_32(Align) && "Invalid alignment"); + Align Alignment = CPs[i].getAlign(); // Verify that all constant pool entries are a multiple of their alignment. // If not, we would have to pad them out so that instructions stay aligned. - assert((Size % Align) == 0 && "CP Entry not multiple of 4 bytes!"); + assert(isAligned(Alignment, Size) && "CP Entry not multiple of 4 bytes!"); // Insert CONSTPOOL_ENTRY before entries with a smaller alignment. - unsigned LogAlign = Log2_32(Align); + unsigned LogAlign = Log2(Alignment); MachineBasicBlock::iterator InsAt = InsPoint[LogAlign]; MachineInstr *CPEMI = BuildMI(*BB, InsAt, DebugLoc(), TII->get(ARM::CONSTPOOL_ENTRY)) @@ -531,7 +530,7 @@ CPEntries.emplace_back(1, CPEntry(CPEMI, i)); ++NumCPEs; LLVM_DEBUG(dbgs() << "Moved CPI#" << i << " to end of function, size = " - << Size << ", align = " << Align << '\n'); + << Size << ", align = " << Alignment.value() << '\n'); } LLVM_DEBUG(BB->dump()); } @@ -657,7 +656,7 @@ unsigned CPI = getCombinedIndex(CPEMI); assert(CPI < MCP->getConstants().size() && "Invalid constant pool index."); - return Align(MCP->getConstants()[CPI].getAlignment()); + return MCP->getConstants()[CPI].getAlign(); } /// scanFunctionJumpTables - Do a scan of the function, building up diff --git a/llvm/lib/Target/ARM/ARMConstantPoolValue.h b/llvm/lib/Target/ARM/ARMConstantPoolValue.h --- a/llvm/lib/Target/ARM/ARMConstantPoolValue.h +++ b/llvm/lib/Target/ARM/ARMConstantPoolValue.h @@ -76,13 +76,11 @@ bool AddCurrentAddress); template - int getExistingMachineCPValueImpl(MachineConstantPool *CP, - unsigned Alignment) { - unsigned AlignMask = Alignment - 1; + int getExistingMachineCPValueImpl(MachineConstantPool *CP, Align Alignment) { const std::vector &Constants = CP->getConstants(); for (unsigned i = 0, e = Constants.size(); i != e; ++i) { if (Constants[i].isMachineConstantPoolEntry() && - (Constants[i].getAlignment() & AlignMask) == 0) { + Constants[i].getAlign() >= Alignment) { auto *CPV = static_cast(Constants[i].Val.MachineCPVal); if (Derived *APC = dyn_cast(CPV)) @@ -114,7 +112,7 @@ bool isPromotedGlobal() const{ return Kind == ARMCP::CPPromotedGlobal; } int getExistingMachineCPValue(MachineConstantPool *CP, - unsigned Alignment) override; + Align Alignment) override; void addSelectionDAGCSEId(FoldingSetNodeID &ID) override; @@ -187,7 +185,7 @@ } int getExistingMachineCPValue(MachineConstantPool *CP, - unsigned Alignment) override; + Align Alignment) override; /// hasSameValue - Return true if this ARM constpool value can share the same /// constantpool entry as another ARM constpool value. @@ -223,7 +221,7 @@ StringRef getSymbol() const { return S; } int getExistingMachineCPValue(MachineConstantPool *CP, - unsigned Alignment) override; + Align Alignment) override; void addSelectionDAGCSEId(FoldingSetNodeID &ID) override; @@ -259,7 +257,7 @@ const MachineBasicBlock *getMBB() const { return MBB; } int getExistingMachineCPValue(MachineConstantPool *CP, - unsigned Alignment) override; + Align Alignment) override; void addSelectionDAGCSEId(FoldingSetNodeID &ID) override; diff --git a/llvm/lib/Target/ARM/ARMConstantPoolValue.cpp b/llvm/lib/Target/ARM/ARMConstantPoolValue.cpp --- a/llvm/lib/Target/ARM/ARMConstantPoolValue.cpp +++ b/llvm/lib/Target/ARM/ARMConstantPoolValue.cpp @@ -73,7 +73,7 @@ } int ARMConstantPoolValue::getExistingMachineCPValue(MachineConstantPool *CP, - unsigned Alignment) { + Align Alignment) { llvm_unreachable("Shouldn't be calling this directly!"); } @@ -189,7 +189,7 @@ } int ARMConstantPoolConstant::getExistingMachineCPValue(MachineConstantPool *CP, - unsigned Alignment) { + Align Alignment) { int index = getExistingMachineCPValueImpl(CP, Alignment); if (index != -1) { @@ -237,7 +237,7 @@ } int ARMConstantPoolSymbol::getExistingMachineCPValue(MachineConstantPool *CP, - unsigned Alignment) { + Align Alignment) { return getExistingMachineCPValueImpl(CP, Alignment); } @@ -277,7 +277,7 @@ } int ARMConstantPoolMBB::getExistingMachineCPValue(MachineConstantPool *CP, - unsigned Alignment) { + Align Alignment) { return getExistingMachineCPValueImpl(CP, Alignment); } diff --git a/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp b/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp --- a/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp +++ b/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp @@ -1426,9 +1426,10 @@ ARMConstantPoolSymbol::Create(MF->getFunction().getContext(), "__aeabi_read_tp", PCLabelID, 0); Register Reg = MI.getOperand(0).getReg(); - MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(), - TII->get(Thumb ? ARM::tLDRpci : ARM::LDRi12), Reg) - .addConstantPoolIndex(MCP->getConstantPoolIndex(CPV, 4)); + MIB = + BuildMI(MBB, MBBI, MI.getDebugLoc(), + TII->get(Thumb ? ARM::tLDRpci : ARM::LDRi12), Reg) + .addConstantPoolIndex(MCP->getConstantPoolIndex(CPV, Align(4))); if (!Thumb) MIB.addImm(0); MIB.add(predOps(ARMCC::AL)); @@ -1514,7 +1515,7 @@ MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(LDRLITOpc), DstReg) - .addConstantPoolIndex(MCP->getConstantPoolIndex(CPV, 4)); + .addConstantPoolIndex(MCP->getConstantPoolIndex(CPV, Align(4))); if (IsARM) MIB.addImm(0); MIB.add(predOps(ARMCC::AL)); diff --git a/llvm/lib/Target/ARM/ARMFastISel.cpp b/llvm/lib/Target/ARM/ARMFastISel.cpp --- a/llvm/lib/Target/ARM/ARMFastISel.cpp +++ b/llvm/lib/Target/ARM/ARMFastISel.cpp @@ -443,12 +443,8 @@ if (!Subtarget->hasVFP2Base()) return false; // MachineConstantPool wants an explicit alignment. - unsigned Align = DL.getPrefTypeAlignment(CFP->getType()); - if (Align == 0) { - // TODO: Figure out if this is correct. - Align = DL.getTypeAllocSize(CFP->getType()); - } - unsigned Idx = MCP.getConstantPoolIndex(cast(CFP), Align); + Align Alignment = DL.getPrefTypeAlign(CFP->getType()); + unsigned Idx = MCP.getConstantPoolIndex(cast(CFP), Alignment); unsigned DestReg = createResultReg(TLI.getRegClassFor(VT)); unsigned Opc = is64bit ? ARM::VLDRD : ARM::VLDRS; @@ -507,12 +503,8 @@ return 0; // MachineConstantPool wants an explicit alignment. - unsigned Align = DL.getPrefTypeAlignment(C->getType()); - if (Align == 0) { - // TODO: Figure out if this is correct. - Align = DL.getTypeAllocSize(C->getType()); - } - unsigned Idx = MCP.getConstantPoolIndex(C, Align); + Align Alignment = DL.getPrefTypeAlign(C->getType()); + unsigned Idx = MCP.getConstantPoolIndex(C, Alignment); ResultReg = createResultReg(TLI.getRegClassFor(VT)); if (isThumb2) AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, @@ -580,7 +572,7 @@ ARMConstantPoolValue *CPV = ARMConstantPoolConstant::Create(GV, Id, ARMCP::CPValue, PCAdj); - unsigned Idx = MCP.getConstantPoolIndex(CPV, Alignment.value()); + unsigned Idx = MCP.getConstantPoolIndex(CPV, Alignment); // Load value. MachineInstrBuilder MIB; @@ -2953,8 +2945,8 @@ UseGOT_PREL ? ARMCP::GOT_PREL : ARMCP::no_modifier, /*AddCurrentAddress=*/UseGOT_PREL); - unsigned ConstAlign = - MF->getDataLayout().getPrefTypeAlignment(Type::getInt32PtrTy(*Context)); + Align ConstAlign = + MF->getDataLayout().getPrefTypeAlign(Type::getInt32PtrTy(*Context)); unsigned Idx = MF->getConstantPool()->getConstantPoolIndex(CPV, ConstAlign); MachineMemOperand *CPMMO = MF->getMachineMemOperand(MachinePointerInfo::getConstantPool(*MF), diff --git a/llvm/lib/Target/ARM/ARMFrameLowering.cpp b/llvm/lib/Target/ARM/ARMFrameLowering.cpp --- a/llvm/lib/Target/ARM/ARMFrameLowering.cpp +++ b/llvm/lib/Target/ARM/ARMFrameLowering.cpp @@ -2391,7 +2391,7 @@ ARMConstantPoolValue *NewCPV = ARMConstantPoolSymbol::Create( MF.getFunction().getContext(), "__STACK_LIMIT", PCLabelId, 0); MachineConstantPool *MCP = MF.getConstantPool(); - unsigned CPI = MCP->getConstantPoolIndex(NewCPV, 4); + unsigned CPI = MCP->getConstantPoolIndex(NewCPV, Align(4)); // ldr SR0, [pc, offset(STACK_LIMIT)] BuildMI(GetMBB, DL, TII.get(ARM::tLDRpci), ScratchReg0) diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp --- a/llvm/lib/Target/ARM/ARMISelLowering.cpp +++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp @@ -9554,7 +9554,7 @@ unsigned PCAdj = (isThumb || isThumb2) ? 4 : 8; ARMConstantPoolValue *CPV = ARMConstantPoolMBB::Create(F.getContext(), DispatchBB, PCLabelId, PCAdj); - unsigned CPI = MCP->getConstantPoolIndex(CPV, 4); + unsigned CPI = MCP->getConstantPoolIndex(CPV, Align(4)); const TargetRegisterClass *TRC = isThumb ? &ARM::tGPRRegClass : &ARM::GPRRegClass; @@ -9843,10 +9843,8 @@ const Constant *C = ConstantInt::get(Int32Ty, NumLPads); // MachineConstantPool wants an explicit alignment. - unsigned Align = MF->getDataLayout().getPrefTypeAlignment(Int32Ty); - if (Align == 0) - Align = MF->getDataLayout().getTypeAllocSize(C->getType()); - unsigned Idx = ConstantPool->getConstantPoolIndex(C, Align); + Align Alignment = MF->getDataLayout().getPrefTypeAlign(Int32Ty); + unsigned Idx = ConstantPool->getConstantPoolIndex(C, Alignment); Register VReg1 = MRI->createVirtualRegister(TRC); BuildMI(DispatchBB, dl, TII->get(ARM::tLDRpci)) @@ -9945,10 +9943,8 @@ const Constant *C = ConstantInt::get(Int32Ty, NumLPads); // MachineConstantPool wants an explicit alignment. - unsigned Align = MF->getDataLayout().getPrefTypeAlignment(Int32Ty); - if (Align == 0) - Align = MF->getDataLayout().getTypeAllocSize(C->getType()); - unsigned Idx = ConstantPool->getConstantPoolIndex(C, Align); + Align Alignment = MF->getDataLayout().getPrefTypeAlign(Int32Ty); + unsigned Idx = ConstantPool->getConstantPoolIndex(C, Alignment); Register VReg1 = MRI->createVirtualRegister(TRC); BuildMI(DispatchBB, dl, TII->get(ARM::LDRcp)) @@ -10349,7 +10345,7 @@ // MachineConstantPool wants an explicit alignment. Align Alignment = MF->getDataLayout().getPrefTypeAlign(Int32Ty); - unsigned Idx = ConstantPool->getConstantPoolIndex(C, Alignment.value()); + unsigned Idx = ConstantPool->getConstantPoolIndex(C, Alignment); MachineMemOperand *CPMMO = MF->getMachineMemOperand(MachinePointerInfo::getConstantPool(*MF), MachineMemOperand::MOLoad, 4, Align(4)); diff --git a/llvm/lib/Target/ARM/ARMInstructionSelector.cpp b/llvm/lib/Target/ARM/ARMInstructionSelector.cpp --- a/llvm/lib/Target/ARM/ARMInstructionSelector.cpp +++ b/llvm/lib/Target/ARM/ARMInstructionSelector.cpp @@ -639,10 +639,10 @@ auto CPIndex = // For SB relative entries we need a target-specific constant pool. // Otherwise, just use a regular constant pool entry. - IsSBREL ? ConstPool->getConstantPoolIndex( - ARMConstantPoolConstant::Create(GV, ARMCP::SBREL), - Alignment.value()) - : ConstPool->getConstantPoolIndex(GV, Alignment.value()); + IsSBREL + ? ConstPool->getConstantPoolIndex( + ARMConstantPoolConstant::Create(GV, ARMCP::SBREL), Alignment) + : ConstPool->getConstantPoolIndex(GV, Alignment); MIB.addConstantPoolIndex(CPIndex, /*Offset*/ 0, /*TargetFlags*/ 0) .addMemOperand(MF.getMachineMemOperand( MachinePointerInfo::getConstantPool(MF), MachineMemOperand::MOLoad, @@ -996,8 +996,8 @@ auto LoadOpcode = Size == 4 ? ARM::VLDRS : ARM::VLDRD; auto ConstPool = MF.getConstantPool(); - auto CPIndex = ConstPool->getConstantPoolIndex(I.getOperand(1).getFPImm(), - Alignment.value()); + auto CPIndex = + ConstPool->getConstantPoolIndex(I.getOperand(1).getFPImm(), Alignment); MIB->setDesc(TII.get(LoadOpcode)); MIB->RemoveOperand(1); MIB.addConstantPoolIndex(CPIndex, /*Offset*/ 0, /*TargetFlags*/ 0) diff --git a/llvm/lib/Target/ARM/ThumbRegisterInfo.cpp b/llvm/lib/Target/ARM/ThumbRegisterInfo.cpp --- a/llvm/lib/Target/ARM/ThumbRegisterInfo.cpp +++ b/llvm/lib/Target/ARM/ThumbRegisterInfo.cpp @@ -70,7 +70,7 @@ MachineConstantPool *ConstantPool = MF.getConstantPool(); const Constant *C = ConstantInt::get( Type::getInt32Ty(MBB.getParent()->getFunction().getContext()), Val); - unsigned Idx = ConstantPool->getConstantPoolIndex(C, 4); + unsigned Idx = ConstantPool->getConstantPoolIndex(C, Align(4)); BuildMI(MBB, MBBI, dl, TII.get(ARM::tLDRpci)) .addReg(DestReg, getDefRegState(true), SubIdx) @@ -89,7 +89,7 @@ MachineConstantPool *ConstantPool = MF.getConstantPool(); const Constant *C = ConstantInt::get( Type::getInt32Ty(MBB.getParent()->getFunction().getContext()), Val); - unsigned Idx = ConstantPool->getConstantPoolIndex(C, 4); + unsigned Idx = ConstantPool->getConstantPoolIndex(C, Align(4)); BuildMI(MBB, MBBI, dl, TII.get(ARM::t2LDRpci)) .addReg(DestReg, getDefRegState(true), SubIdx) diff --git a/llvm/lib/Target/Mips/MipsConstantIslandPass.cpp b/llvm/lib/Target/Mips/MipsConstantIslandPass.cpp --- a/llvm/lib/Target/Mips/MipsConstantIslandPass.cpp +++ b/llvm/lib/Target/Mips/MipsConstantIslandPass.cpp @@ -529,7 +529,7 @@ MF->push_back(BB); // MachineConstantPool measures alignment in bytes. We measure in log2(bytes). - const Align MaxAlign(MCP->getConstantPoolAlignment()); + const Align MaxAlign = MCP->getConstantPoolAlign(); // Mark the basic block as required by the const-pool. // If AlignConstantIslands isn't set, use 4-byte alignment for everything. @@ -554,14 +554,13 @@ for (unsigned i = 0, e = CPs.size(); i != e; ++i) { unsigned Size = TD.getTypeAllocSize(CPs[i].getType()); assert(Size >= 4 && "Too small constant pool entry"); - unsigned Align = CPs[i].getAlignment(); - assert(isPowerOf2_32(Align) && "Invalid alignment"); + Align Alignment = CPs[i].getAlign(); // Verify that all constant pool entries are a multiple of their alignment. // If not, we would have to pad them out so that instructions stay aligned. - assert((Size % Align) == 0 && "CP Entry not multiple of 4 bytes!"); + assert(isAligned(Alignment, Size) && "CP Entry not multiple of 4 bytes!"); // Insert CONSTPOOL_ENTRY before entries with a smaller alignment. - unsigned LogAlign = Log2_32(Align); + unsigned LogAlign = Log2(Alignment); MachineBasicBlock::iterator InsAt = InsPoint[LogAlign]; MachineInstr *CPEMI = @@ -579,7 +578,7 @@ CPEntries.emplace_back(1, CPEntry(CPEMI, i)); ++NumCPEs; LLVM_DEBUG(dbgs() << "Moved CPI#" << i << " to end of function, size = " - << Size << ", align = " << Align << '\n'); + << Size << ", align = " << Alignment.value() << '\n'); } LLVM_DEBUG(BB->dump()); } @@ -628,7 +627,7 @@ unsigned CPI = CPEMI.getOperand(1).getIndex(); assert(CPI < MCP->getConstants().size() && "Invalid constant pool index."); - return Align(MCP->getConstants()[CPI].getAlignment()); + return MCP->getConstants()[CPI].getAlign(); } /// initializeFunctionInfo - Do the initial scan of the function, building up @@ -1656,7 +1655,7 @@ Type *Int32Ty = Type::getInt32Ty(MF->getFunction().getContext()); const Constant *C = ConstantInt::get(Int32Ty, V); - unsigned index = MCP->getConstantPoolIndex(C, 4); + unsigned index = MCP->getConstantPoolIndex(C, Align(4)); I->getOperand(2).ChangeToImmediate(index); LLVM_DEBUG(dbgs() << "constant island constant " << *I << "\n"); I->setDesc(TII->get(Mips::LwRxPcTcp16)); diff --git a/llvm/lib/Target/PowerPC/PPCFastISel.cpp b/llvm/lib/Target/PowerPC/PPCFastISel.cpp --- a/llvm/lib/Target/PowerPC/PPCFastISel.cpp +++ b/llvm/lib/Target/PowerPC/PPCFastISel.cpp @@ -1997,8 +1997,7 @@ // All FP constants are loaded from the constant pool. Align Alignment = DL.getPrefTypeAlign(CFP->getType()); - unsigned Idx = - MCP.getConstantPoolIndex(cast(CFP), Alignment.value()); + unsigned Idx = MCP.getConstantPoolIndex(cast(CFP), Alignment); const bool HasSPE = PPCSubTarget->hasSPE(); const TargetRegisterClass *RC; if (HasSPE) diff --git a/llvm/lib/Target/SystemZ/SystemZConstantPoolValue.h b/llvm/lib/Target/SystemZ/SystemZConstantPoolValue.h --- a/llvm/lib/Target/SystemZ/SystemZConstantPoolValue.h +++ b/llvm/lib/Target/SystemZ/SystemZConstantPoolValue.h @@ -43,7 +43,7 @@ // Override MachineConstantPoolValue. int getExistingMachineCPValue(MachineConstantPool *CP, - unsigned Alignment) override; + Align Alignment) override; void addSelectionDAGCSEId(FoldingSetNodeID &ID) override; void print(raw_ostream &O) const override; diff --git a/llvm/lib/Target/SystemZ/SystemZConstantPoolValue.cpp b/llvm/lib/Target/SystemZ/SystemZConstantPoolValue.cpp --- a/llvm/lib/Target/SystemZ/SystemZConstantPoolValue.cpp +++ b/llvm/lib/Target/SystemZ/SystemZConstantPoolValue.cpp @@ -25,13 +25,12 @@ return new SystemZConstantPoolValue(GV, Modifier); } -int SystemZConstantPoolValue:: -getExistingMachineCPValue(MachineConstantPool *CP, unsigned Alignment) { - unsigned AlignMask = Alignment - 1; +int SystemZConstantPoolValue::getExistingMachineCPValue(MachineConstantPool *CP, + Align Alignment) { const std::vector &Constants = CP->getConstants(); for (unsigned I = 0, E = Constants.size(); I != E; ++I) { if (Constants[I].isMachineConstantPoolEntry() && - (Constants[I].getAlignment() & AlignMask) == 0) { + Constants[I].getAlign() >= Alignment) { auto *ZCPV = static_cast(Constants[I].Val.MachineCPVal); if (ZCPV->GV == GV && ZCPV->Modifier == Modifier) diff --git a/llvm/lib/Target/X86/X86FastISel.cpp b/llvm/lib/Target/X86/X86FastISel.cpp --- a/llvm/lib/Target/X86/X86FastISel.cpp +++ b/llvm/lib/Target/X86/X86FastISel.cpp @@ -3784,7 +3784,7 @@ PICBase = X86::RIP; // Create the load from the constant pool. - unsigned CPI = MCP.getConstantPoolIndex(CFP, Alignment.value()); + unsigned CPI = MCP.getConstantPoolIndex(CFP, Alignment); unsigned ResultReg = createResultReg(TLI.getRegClassFor(VT.SimpleTy)); if (CM == CodeModel::Large) { diff --git a/llvm/lib/Target/X86/X86InstrInfo.cpp b/llvm/lib/Target/X86/X86InstrInfo.cpp --- a/llvm/lib/Target/X86/X86InstrInfo.cpp +++ b/llvm/lib/Target/X86/X86InstrInfo.cpp @@ -5938,7 +5938,7 @@ Opc == X86::AVX1_SETALLONES); const Constant *C = IsAllOnes ? Constant::getAllOnesValue(Ty) : Constant::getNullValue(Ty); - unsigned CPI = MCP.getConstantPoolIndex(C, Alignment.value()); + unsigned CPI = MCP.getConstantPoolIndex(C, Alignment); // Create operands to load from the constant pool entry. MOs.push_back(MachineOperand::CreateReg(PICBase, false)); diff --git a/llvm/lib/Target/X86/X86InstructionSelector.cpp b/llvm/lib/Target/X86/X86InstructionSelector.cpp --- a/llvm/lib/Target/X86/X86InstructionSelector.cpp +++ b/llvm/lib/Target/X86/X86InstructionSelector.cpp @@ -1444,8 +1444,7 @@ // Create the load from the constant pool. const ConstantFP *CFP = I.getOperand(1).getFPImm(); - unsigned CPI = - MF.getConstantPool()->getConstantPoolIndex(CFP, Alignment.value()); + unsigned CPI = MF.getConstantPool()->getConstantPoolIndex(CFP, Alignment); MachineInstr *LoadInst = nullptr; unsigned char OpFlag = STI.classifyLocalReference(nullptr); diff --git a/llvm/lib/Target/XCore/XCoreInstrInfo.cpp b/llvm/lib/Target/XCore/XCoreInstrInfo.cpp --- a/llvm/lib/Target/XCore/XCoreInstrInfo.cpp +++ b/llvm/lib/Target/XCore/XCoreInstrInfo.cpp @@ -443,7 +443,7 @@ MachineConstantPool *ConstantPool = MBB.getParent()->getConstantPool(); const Constant *C = ConstantInt::get( Type::getInt32Ty(MBB.getParent()->getFunction().getContext()), Value); - unsigned Idx = ConstantPool->getConstantPoolIndex(C, 4); + unsigned Idx = ConstantPool->getConstantPoolIndex(C, Align(4)); return BuildMI(MBB, MI, dl, get(XCore::LDWCP_lru6), Reg) .addConstantPoolIndex(Idx) .getInstr();