diff --git a/llvm/include/llvm/MC/MCInstPrinter.h b/llvm/include/llvm/MC/MCInstPrinter.h --- a/llvm/include/llvm/MC/MCInstPrinter.h +++ b/llvm/include/llvm/MC/MCInstPrinter.h @@ -25,6 +25,7 @@ /// Convert `Bytes' to a hex string and output to `OS' void dumpBytes(ArrayRef Bytes, raw_ostream &OS); +void dumpBytesNoSpace(ArrayRef Bytes, raw_ostream &OS); namespace HexStyle { diff --git a/llvm/lib/MC/MCInstPrinter.cpp b/llvm/lib/MC/MCInstPrinter.cpp --- a/llvm/lib/MC/MCInstPrinter.cpp +++ b/llvm/lib/MC/MCInstPrinter.cpp @@ -34,6 +34,14 @@ } } +void llvm::dumpBytesNoSpace(ArrayRef bytes, raw_ostream &OS) { + static const char hex_rep[] = "0123456789abcdef"; + for (char i : bytes) { + OS << hex_rep[(i & 0xF0) >> 4]; + OS << hex_rep[i & 0xF]; + } +} + MCInstPrinter::~MCInstPrinter() = default; /// getOpcodeName - Return the name of the specified opcode enum (e.g. diff --git a/llvm/test/MC/AArch64/inst-directive-other.s b/llvm/test/MC/AArch64/inst-directive-other.s --- a/llvm/test/MC/AArch64/inst-directive-other.s +++ b/llvm/test/MC/AArch64/inst-directive-other.s @@ -35,8 +35,8 @@ // CHECK-ASM: .{{long|word}} 3573751839 // CHECK-ASM: .inst 0xd503201f -// CHECK-OBJ: 0: 1f 20 03 d5 nop -// CHECK-OBJ-CODE: 4: 1f 20 03 d5 nop -// CHECK-OBJ-DATA: 4: 1f 20 03 d5 .word 0xd503201f -// CHECK-OBJ-BE: 4: d5 03 20 1f .word 0xd503201f -// CHECK-OBJ: 8: 1f 20 03 d5 nop +// CHECK-OBJ: 0: 1f2003d5 nop +// CHECK-OBJ-CODE: 4: 1f2003d5 nop +// CHECK-OBJ-DATA: 4: 1f2003d5 .word 0xd503201f +// CHECK-OBJ-BE: 4: d503201f .word 0xd503201f +// CHECK-OBJ: 8: 1f2003d5 nop diff --git a/llvm/test/MC/ARM/inst-directive-other.s b/llvm/test/MC/ARM/inst-directive-other.s --- a/llvm/test/MC/ARM/inst-directive-other.s +++ b/llvm/test/MC/ARM/inst-directive-other.s @@ -37,11 +37,11 @@ // CHECK-ASM: .short 42 // CHECK-ASM: .inst.w 0xf04f002a -// CHECK-OBJ: 0: 70 47 bx lr -// CHECK-OBJ-CODE: 2: 70 47 bx lr -// CHECK-OBJ-DATA: 2: 70 47 .short 0x4770 -// CHECK-OBJ: 4: 70 47 bx lr -// CHECK-OBJ: 6: 4f f0 2a 00 mov.w r0, #42 -// CHECK-OBJ-CODE: a: 4f f0 2a 00 mov.w r0, #42 -// CHECK-OBJ-DATA: a: 4f f0 2a 00 .word 0x002af04f -// CHECK-OBJ: e: 4f f0 2a 00 mov.w r0, #42 +// CHECK-OBJ: 0: 7047 bx lr +// CHECK-OBJ-CODE: 2: 7047 bx lr +// CHECK-OBJ-DATA: 2: 7047 .short 0x4770 +// CHECK-OBJ: 4: 7047 bx lr +// CHECK-OBJ: 6: 4ff02a00 mov.w r0, #42 +// CHECK-OBJ-CODE: a: 4ff02a00 mov.w r0, #42 +// CHECK-OBJ-DATA: a: 4ff02a00 .word 0x002af04f +// CHECK-OBJ: e: 4ff02a00 mov.w r0, #42 diff --git a/llvm/test/MC/ELF/relax-arith.s b/llvm/test/MC/ELF/relax-arith.s --- a/llvm/test/MC/ELF/relax-arith.s +++ b/llvm/test/MC/ELF/relax-arith.s @@ -7,12 +7,12 @@ // CHECK: Disassembly of section imul: // CHECK-EMPTY: // CHECK-NEXT: : -// CHECK-NEXT: 0: 66 69 db 00 00 imulw $0, %bx, %bx -// CHECK-NEXT: 5: 66 69 1c 25 00 00 00 00 00 00 imulw $0, 0, %bx -// CHECK-NEXT: f: 69 db 00 00 00 00 imull $0, %ebx, %ebx -// CHECK-NEXT: 15: 69 1c 25 00 00 00 00 00 00 00 00 imull $0, 0, %ebx -// CHECK-NEXT: 20: 48 69 db 00 00 00 00 imulq $0, %rbx, %rbx -// CHECK-NEXT: 27: 48 69 1c 25 00 00 00 00 00 00 00 00 imulq $0, 0, %rbx +// CHECK-NEXT: 0: 6669db0000 imulw $0, %bx, %bx +// CHECK-NEXT: 5: 66691c25000000000000 imulw $0, 0, %bx +// CHECK-NEXT: f: 69db00000000 imull $0, %ebx, %ebx +// CHECK-NEXT: 15: 691c250000000000000000 imull $0, 0, %ebx +// CHECK-NEXT: 20: 4869db00000000 imulq $0, %rbx, %rbx +// CHECK-NEXT: 27: 48691c250000000000000000 imulq $0, 0, %rbx .section imul,"x" imul $foo, %bx, %bx imul $foo, bar, %bx @@ -24,12 +24,12 @@ // CHECK: Disassembly of section and: // CHECK-EMPTY: // CHECK-NEXT: : -// CHECK-NEXT: 0: 66 81 e3 00 00 andw $0, %bx -// CHECK-NEXT: 5: 66 81 24 25 00 00 00 00 00 00 andw $0, 0 -// CHECK-NEXT: f: 81 e3 00 00 00 00 andl $0, %ebx -// CHECK-NEXT: 15: 81 24 25 00 00 00 00 00 00 00 00 andl $0, 0 -// CHECK-NEXT: 20: 48 81 e3 00 00 00 00 andq $0, %rbx -// CHECK-NEXT: 27: 48 81 24 25 00 00 00 00 00 00 00 00 andq $0, 0 +// CHECK-NEXT: 0: 6681e30000 andw $0, %bx +// CHECK-NEXT: 5: 66812425000000000000 andw $0, 0 +// CHECK-NEXT: f: 81e300000000 andl $0, %ebx +// CHECK-NEXT: 15: 8124250000000000000000 andl $0, 0 +// CHECK-NEXT: 20: 4881e300000000 andq $0, %rbx +// CHECK-NEXT: 27: 488124250000000000000000 andq $0, 0 .section and,"x" and $foo, %bx andw $foo, bar @@ -39,12 +39,12 @@ andq $foo, bar // CHECK: : -// CHECK-NEXT: 0: 66 81 cb 00 00 orw $0, %bx -// CHECK-NEXT: 5: 66 81 0c 25 00 00 00 00 00 00 orw $0, 0 -// CHECK-NEXT: f: 81 cb 00 00 00 00 orl $0, %ebx -// CHECK-NEXT: 15: 81 0c 25 00 00 00 00 00 00 00 00 orl $0, 0 -// CHECK-NEXT: 20: 48 81 cb 00 00 00 00 orq $0, %rbx -// CHECK-NEXT: 27: 48 81 0c 25 00 00 00 00 00 00 00 00 orq $0, 0 +// CHECK-NEXT: 0: 6681cb0000 orw $0, %bx +// CHECK-NEXT: 5: 66810c25000000000000 orw $0, 0 +// CHECK-NEXT: f: 81cb00000000 orl $0, %ebx +// CHECK-NEXT: 15: 810c250000000000000000 orl $0, 0 +// CHECK-NEXT: 20: 4881cb00000000 orq $0, %rbx +// CHECK-NEXT: 27: 48810c250000000000000000 orq $0, 0 .section or,"x" or $foo, %bx orw $foo, bar @@ -56,12 +56,12 @@ // CHECK: Disassembly of section xor: // CHECK-EMPTY: // CHECK-NEXT: : -// CHECK-NEXT: 0: 66 81 f3 00 00 xorw $0, %bx -// CHECK-NEXT: 5: 66 81 34 25 00 00 00 00 00 00 xorw $0, 0 -// CHECK-NEXT: f: 81 f3 00 00 00 00 xorl $0, %ebx -// CHECK-NEXT: 15: 81 34 25 00 00 00 00 00 00 00 00 xorl $0, 0 -// CHECK-NEXT: 20: 48 81 f3 00 00 00 00 xorq $0, %rbx -// CHECK-NEXT: 27: 48 81 34 25 00 00 00 00 00 00 00 00 xorq $0, 0 +// CHECK-NEXT: 0: 6681f30000 xorw $0, %bx +// CHECK-NEXT: 5: 66813425000000000000 xorw $0, 0 +// CHECK-NEXT: f: 81f300000000 xorl $0, %ebx +// CHECK-NEXT: 15: 8134250000000000000000 xorl $0, 0 +// CHECK-NEXT: 20: 4881f300000000 xorq $0, %rbx +// CHECK-NEXT: 27: 488134250000000000000000 xorq $0, 0 .section xor,"x" xor $foo, %bx xorw $foo, bar @@ -73,29 +73,29 @@ // CHECK: Disassembly of section add: // CHECK-EMPTY: // CHECK-NEXT: : -// CHECK-NEXT: 0: 66 81 c3 00 00 addw $0, %bx -// CHECK-NEXT: 5: 66 81 04 25 00 00 00 00 00 00 addw $0, 0 -// CHECK-NEXT: f: 81 c3 00 00 00 00 addl $0, %ebx -// CHECK-NEXT: 15: 81 04 25 00 00 00 00 00 00 00 00 addl $0, 0 -// CHECK-NEXT: 20: 48 81 c3 00 00 00 00 addq $0, %rbx -// CHECK-NEXT: 27: 48 81 04 25 00 00 00 00 00 00 00 00 addq $0, 0 +// CHECK-NEXT: 0: 6681c30000 addw $0, %bx +// CHECK-NEXT: 5: 66810425000000000000 addw $0, 0 +// CHECK-NEXT: f: 81c300000000 addl $0, %ebx +// CHECK-NEXT: 15: 8104250000000000000000 addl $0, 0 +// CHECK-NEXT: 20: 4881c300000000 addq $0, %rbx +// CHECK-NEXT: 27: 488104250000000000000000 addq $0, 0 .section add,"x" - add $foo, %bx + add $foo, %bx addw $foo, bar - add $foo, %ebx + add $foo, %ebx addl $foo, bar - add $foo, %rbx + add $foo, %rbx addq $foo, bar // CHECK: Disassembly of section sub: // CHECK-EMPTY: // CHECK-NEXT: : -// CHECK-NEXT: 0: 66 81 eb 00 00 subw $0, %bx -// CHECK-NEXT: 5: 66 81 2c 25 00 00 00 00 00 00 subw $0, 0 -// CHECK-NEXT: f: 81 eb 00 00 00 00 subl $0, %ebx -// CHECK-NEXT: 15: 81 2c 25 00 00 00 00 00 00 00 00 subl $0, 0 -// CHECK-NEXT: 20: 48 81 eb 00 00 00 00 subq $0, %rbx -// CHECK-NEXT: 27: 48 81 2c 25 00 00 00 00 00 00 00 00 subq $0, 0 +// CHECK-NEXT: 0: 6681eb0000 subw $0, %bx +// CHECK-NEXT: 5: 66812c25000000000000 subw $0, 0 +// CHECK-NEXT: f: 81eb00000000 subl $0, %ebx +// CHECK-NEXT: 15: 812c250000000000000000 subl $0, 0 +// CHECK-NEXT: 20: 4881eb00000000 subq $0, %rbx +// CHECK-NEXT: 27: 48812c250000000000000000 subq $0, 0 .section sub,"x" sub $foo, %bx subw $foo, bar @@ -107,12 +107,12 @@ // CHECK: Disassembly of section cmp: // CHECK-EMPTY: // CHECK-NEXT: : -// CHECK-NEXT: 0: 66 81 fb 00 00 cmpw $0, %bx -// CHECK-NEXT: 5: 66 81 3c 25 00 00 00 00 00 00 cmpw $0, 0 -// CHECK-NEXT: f: 81 fb 00 00 00 00 cmpl $0, %ebx -// CHECK-NEXT: 15: 81 3c 25 00 00 00 00 00 00 00 00 cmpl $0, 0 -// CHECK-NEXT: 20: 48 81 fb 00 00 00 00 cmpq $0, %rbx -// CHECK-NEXT: 27: 48 81 3c 25 00 00 00 00 00 00 00 00 cmpq $0, 0 +// CHECK-NEXT: 0: 6681fb0000 cmpw $0, %bx +// CHECK-NEXT: 5: 66813c25000000000000 cmpw $0, 0 +// CHECK-NEXT: f: 81fb00000000 cmpl $0, %ebx +// CHECK-NEXT: 15: 813c250000000000000000 cmpl $0, 0 +// CHECK-NEXT: 20: 4881fb00000000 cmpq $0, %rbx +// CHECK-NEXT: 27: 48813c250000000000000000 cmpq $0, 0 .section cmp,"x" cmp $foo, %bx cmpw $foo, bar @@ -124,8 +124,8 @@ // CHECK: Disassembly of section push: // CHECK-EMPTY: // CHECK-NEXT: : -// CHECK-NEXT: 0: 66 68 00 00 pushw $0 -// CHECK-NEXT: 4: 68 00 00 00 00 pushq $0 +// CHECK-NEXT: 0: 66680000 pushw $0 +// CHECK-NEXT: 4: 6800000000 pushq $0 .section push,"x" pushw $foo push $foo @@ -133,33 +133,33 @@ // CHECK: Disassembly of section adc: // CHECK-EMPTY: // CHECK-NEXT: : -// CHECK-NEXT: 0: 66 81 d3 00 00 adcw $0, %bx -// CHECK-NEXT: 5: 66 81 14 25 00 00 00 00 00 00 adcw $0, 0 -// CHECK-NEXT: f: 81 d3 00 00 00 00 adcl $0, %ebx -// CHECK-NEXT: 15: 81 14 25 00 00 00 00 00 00 00 00 adcl $0, 0 -// CHECK-NEXT: 20: 48 81 d3 00 00 00 00 adcq $0, %rbx -// CHECK-NEXT: 27: 48 81 14 25 00 00 00 00 00 00 00 00 adcq $0, 0 +// CHECK-NEXT: 0: 6681d30000 adcw $0, %bx +// CHECK-NEXT: 5: 66811425000000000000 adcw $0, 0 +// CHECK-NEXT: f: 81d300000000 adcl $0, %ebx +// CHECK-NEXT: 15: 8114250000000000000000 adcl $0, 0 +// CHECK-NEXT: 20: 4881d300000000 adcq $0, %rbx +// CHECK-NEXT: 27: 488114250000000000000000 adcq $0, 0 .section adc,"x" - adc $foo, %bx + adc $foo, %bx adcw $foo, bar - adc $foo, %ebx + adc $foo, %ebx adcl $foo, bar - adc $foo, %rbx + adc $foo, %rbx adcq $foo, bar // CHECK: Disassembly of section sbb: // CHECK-EMPTY: // CHECK-NEXT: : -// CHECK-NEXT: 0: 66 81 db 00 00 sbbw $0, %bx -// CHECK-NEXT: 5: 66 81 1c 25 00 00 00 00 00 00 sbbw $0, 0 -// CHECK-NEXT: f: 81 db 00 00 00 00 sbbl $0, %ebx -// CHECK-NEXT: 15: 81 1c 25 00 00 00 00 00 00 00 00 sbbl $0, 0 -// CHECK-NEXT: 20: 48 81 db 00 00 00 00 sbbq $0, %rbx -// CHECK-NEXT: 27: 48 81 1c 25 00 00 00 00 00 00 00 00 sbbq $0, 0 +// CHECK-NEXT: 0: 6681db0000 sbbw $0, %bx +// CHECK-NEXT: 5: 66811c25000000000000 sbbw $0, 0 +// CHECK-NEXT: f: 81db00000000 sbbl $0, %ebx +// CHECK-NEXT: 15: 811c250000000000000000 sbbl $0, 0 +// CHECK-NEXT: 20: 4881db00000000 sbbq $0, %rbx +// CHECK-NEXT: 27: 48811c250000000000000000 sbbq $0, 0 .section sbb,"x" - sbb $foo, %bx + sbb $foo, %bx sbbw $foo, bar - sbb $foo, %ebx + sbb $foo, %ebx sbbl $foo, bar - sbb $foo, %rbx + sbb $foo, %rbx sbbq $foo, bar diff --git a/llvm/test/tools/llvm-objdump/ELF/ARM/v5t-subarch.s b/llvm/test/tools/llvm-objdump/ELF/ARM/v5t-subarch.s --- a/llvm/test/tools/llvm-objdump/ELF/ARM/v5t-subarch.s +++ b/llvm/test/tools/llvm-objdump/ELF/ARM/v5t-subarch.s @@ -6,5 +6,5 @@ clz r0, r1 @ CHECK-LABEL: clz -@ CHECK: 11 0f 6f e1 +@ CHECK: 110f6fe1 diff --git a/llvm/test/tools/llvm-objdump/X86/disassemble-align.s b/llvm/test/tools/llvm-objdump/X86/disassemble-align.s --- a/llvm/test/tools/llvm-objdump/X86/disassemble-align.s +++ b/llvm/test/tools/llvm-objdump/X86/disassemble-align.s @@ -9,11 +9,11 @@ # Instructions are expected to be aligned if the instruction in hex is not too long. # CHECK: 0: c3 |retq -# CHECK-NEXT: 1: 48 8b 05 56 34 12 00 |movq|0x123456(%rip), %rax -# CHECK-NEXT: 8: 48 b8 54 55 55 55 55 55 55 55|movabsq|$0x5555555555555554, %rax -# CHECK-NEXT: 12: 8f ea 00 12 4c 02 40 00 00 00 00 |lwpval|$0x0, 0x40(%rdx,%rax), %r15d -# CHECK-NEXT: 1d: 8f ea 00 12 04 25 f0 1c f0 1c 00 00 00 00 |lwpins|$0x0, 0x1cf01cf0, %r15d -# CHECK-NEXT: 2b: ff ff | +# CHECK-NEXT: 1: 488b0556341200 |movq|0x123456(%rip), %rax +# CHECK-NEXT: 8: 48b85455555555555555 |movabsq|$0x5555555555555554, %rax +# CHECK-NEXT: 12: 8fea00124c024000000000 |lwpval|$0x0, 0x40(%rdx,%rax), %r15d +# CHECK-NEXT: 1d: 8fea00120425f01cf01c00000000 |lwpins|$0x0, 0x1cf01cf0, %r15d +# CHECK-NEXT: 2b: ffff | # NORAW: 0: |retq # NORAW-NEXT: 1: |movq|0x123456(%rip), %rax diff --git a/llvm/test/tools/llvm-objdump/X86/elf-disassemble.test b/llvm/test/tools/llvm-objdump/X86/elf-disassemble.test --- a/llvm/test/tools/llvm-objdump/X86/elf-disassemble.test +++ b/llvm/test/tools/llvm-objdump/X86/elf-disassemble.test @@ -16,7 +16,7 @@ # ALL-NEXT: Disassembly of section .readonly: # ALL-EMPTY: # ALL-NEXT: 0000000000003000 <.readonly>: -# ALL-NEXT: 0: 01 00 addl %eax, (%rax) +# ALL-NEXT: 0: 0100 addl %eax, (%rax) # ALL-EMPTY: # ALL-NEXT: Disassembly of section .nobits: # ALL-EMPTY: diff --git a/llvm/tools/llvm-objdump/llvm-objdump.cpp b/llvm/tools/llvm-objdump/llvm-objdump.cpp --- a/llvm/tools/llvm-objdump/llvm-objdump.cpp +++ b/llvm/tools/llvm-objdump/llvm-objdump.cpp @@ -740,12 +740,15 @@ OS << format("%8" PRIx64 ":", Address.Address); if (!NoShowRawInsn) { OS << ' '; - dumpBytes(Bytes, OS); + if (STI.getTargetTriple().isX86()) + dumpBytesNoSpace(Bytes, OS); + else + dumpBytes(Bytes, OS); } // The output of printInst starts with a tab. Print some spaces so that // the tab has 1 column and advances to the target tab stop. - unsigned TabStop = NoShowRawInsn ? 16 : 40; + unsigned TabStop = NoShowRawInsn ? 16 : 32; unsigned Column = OS.tell() - Start; OS.indent(Column < TabStop - 1 ? TabStop - 1 - Column : 7 - Column % 8);