diff --git a/llvm/include/llvm/CodeGen/SelectionDAG.h b/llvm/include/llvm/CodeGen/SelectionDAG.h --- a/llvm/include/llvm/CodeGen/SelectionDAG.h +++ b/llvm/include/llvm/CodeGen/SelectionDAG.h @@ -1831,6 +1831,12 @@ /// which is split (or expanded) into two not necessarily identical pieces. std::pair GetSplitDestVTs(const EVT &VT) const; + /// Compute the VTs needed for the low/hi parts of a type, dependent on an + /// enveloping VT that has been split into two identical pieces. Sets the + /// HisIsEmpty flag when hi type has zero storage size. + std::pair GetDependentSplitDestVTs(const EVT &VT, const EVT &EnvVT, + bool *HiIsEmpty) const; + /// Split the vector with EXTRACT_SUBVECTOR using the provides /// VTs and return the low/high part. std::pair SplitVector(const SDValue &N, const SDLoc &DL, diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp --- a/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp @@ -1571,7 +1571,9 @@ EVT MemoryVT = MLD->getMemoryVT(); EVT LoMemVT, HiMemVT; - std::tie(LoMemVT, HiMemVT) = DAG.GetSplitDestVTs(MemoryVT); + bool HiIsEmpty = false; + std::tie(LoMemVT, HiMemVT) = + DAG.GetDependentSplitDestVTs(MemoryVT, LoVT, &HiIsEmpty); SDValue PassThruLo, PassThruHi; if (getTypeAction(PassThru.getValueType()) == TargetLowering::TypeSplitVector) @@ -1587,17 +1589,26 @@ MMO, MLD->getAddressingMode(), ExtType, MLD->isExpandingLoad()); - Ptr = TLI.IncrementMemoryAddress(Ptr, MaskLo, dl, LoMemVT, DAG, - MLD->isExpandingLoad()); - unsigned HiOffset = LoMemVT.getStoreSize(); - - MMO = DAG.getMachineFunction().getMachineMemOperand( - MLD->getPointerInfo().getWithOffset(HiOffset), MachineMemOperand::MOLoad, - HiMemVT.getStoreSize(), Alignment, MLD->getAAInfo(), MLD->getRanges()); - - Hi = DAG.getMaskedLoad(HiVT, dl, Ch, Ptr, Offset, MaskHi, PassThruHi, HiMemVT, - MMO, MLD->getAddressingMode(), ExtType, - MLD->isExpandingLoad()); + if (HiIsEmpty) { + // The hi masked load has zero storage size. We therefore simply set + // it to the low masked load and rely on subsequent optimization to + // remove the the unused element in the chain. + Hi = Lo; + } else { + // Generate hi masked load. + Ptr = TLI.IncrementMemoryAddress(Ptr, MaskLo, dl, LoMemVT, DAG, + MLD->isExpandingLoad()); + unsigned HiOffset = LoMemVT.getStoreSize(); + + MMO = DAG.getMachineFunction().getMachineMemOperand( + MLD->getPointerInfo().getWithOffset(HiOffset), + MachineMemOperand::MOLoad, HiMemVT.getStoreSize(), Alignment, + MLD->getAAInfo(), MLD->getRanges()); + + Hi = DAG.getMaskedLoad(HiVT, dl, Ch, Ptr, Offset, MaskHi, PassThruHi, + HiMemVT, MMO, MLD->getAddressingMode(), ExtType, + MLD->isExpandingLoad()); + } // Build a factor node to remember that this load is independent of the // other one. @@ -1607,7 +1618,6 @@ // Legalize the chain result - switch anything that used the old chain to // use the new one. ReplaceValueWith(SDValue(MLD, 1), Ch); - } void DAGTypeLegalizer::SplitVecRes_MGATHER(MaskedGatherSDNode *MGT, diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp --- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp @@ -9461,7 +9461,38 @@ return std::make_pair(LoVT, HiVT); } -/// SplitVector - Split the vector with EXTRACT_SUBVECTOR and return the +/// GetDependentSplitDestVTs - Compute the VTs needed for the low/hi parts of a +/// type, dependent on an enveloping VT that has been split into two identical +/// pieces. Sets the HiIsEmpty flag when hi type has zero storage size. +std::pair +SelectionDAG::GetDependentSplitDestVTs(const EVT &VT, const EVT &EnvVT, + bool *HiIsEmpty) const { + EVT EltTp = VT.getVectorElementType(); + bool IsScalable = VT.isScalableVector(); + // Examples: + // custom VL=8 with enveloping VL=8/8 yields 8/0 (hi empty) + // custom VL=9 with enveloping VL=8/8 yields 8/1 + // custom VL=10 with enveloping VL=8/8 yields 8/2 + // etc. + unsigned VTNumElts = VT.getVectorNumElements(); + unsigned EnvNumElts = EnvVT.getVectorNumElements(); + EVT LoVT, HiVT; + if (VTNumElts > EnvNumElts) { + LoVT = EnvVT; + HiVT = EVT::getVectorVT(*getContext(), EltTp, VTNumElts - EnvNumElts, + IsScalable); + *HiIsEmpty = false; + } else { + // Flag that hi type has zero storage size, but return split envelop type + // (this would be easier if vector types with zero elements were allowed). + LoVT = EVT::getVectorVT(*getContext(), EltTp, VTNumElts, IsScalable); + HiVT = EnvVT; + *HiIsEmpty = true; + } + return std::make_pair(LoVT, HiVT); +} + +/// SplitVector - kSplit the vector with EXTRACT_SUBVECTOR and return the /// low/high part. std::pair SelectionDAG::SplitVector(const SDValue &N, const SDLoc &DL, const EVT &LoVT, diff --git a/llvm/test/CodeGen/X86/pr45563-2.ll b/llvm/test/CodeGen/X86/pr45563-2.ll new file mode 100644 --- /dev/null +++ b/llvm/test/CodeGen/X86/pr45563-2.ll @@ -0,0 +1,62 @@ +; RUN: llc < %s -O3 -mattr=avx | FileCheck %s + +; Bug 45563: +; The SplitVecRes_MLOAD method should split a extended value type +; according to the halving of the enveloping type to avoid all sorts +; of inconsistencies downstream. For example for a extended value type +; with VL=14 and enveloping type VL=16 that is split 8/8, the extended +; type should be split 8/6 and not 7/7. This also accounts for hi masked +; load that get zero storage size (and are unused). + +define <9 x float> @mload_split9(<9 x i1> %mask, <9 x float>* %addr, <9 x float> %dst) { +; CHECK-LABEL: load_split9: +; CHECK: vmaskmovps +; CHECK: vmaskmovps +; CHECK-NOT: vmaskmovps + %res = call <9 x float> @llvm.masked.load.v9f32.p0v9f32(<9 x float>* %addr, i32 4, <9 x i1>%mask, <9 x float> %dst) + ret <9 x float> %res +} + +define <13 x float> @mload_split13(<13 x i1> %mask, <13 x float>* %addr, <13 x float> %dst) { +; CHECK-LABEL: mload_split13: +; CHECK: vmaskmovps +; CHECK: vmaskmovps +; CHECK-NOT: vmaskmovps + %res = call <13 x float> @llvm.masked.load.v13f32.p0v13f32(<13 x float>* %addr, i32 4, <13 x i1>%mask, <13 x float> %dst) + ret <13 x float> %res +} + +define <14 x float> @mload_split14(<14 x i1> %mask, <14 x float>* %addr, <14 x float> %dst) { +; CHECK-LABEL: mload_split14: +; CHECK: vmaskmovps +; CHECK: vmaskmovps +; CHECK-NOT: vmaskmovps + %res = call <14 x float> @llvm.masked.load.v14f32.p0v14f32(<14 x float>* %addr, i32 4, <14 x i1>%mask, <14 x float> %dst) + ret <14 x float> %res +} + +define <17 x float> @mload_split17(<17 x i1> %mask, <17 x float>* %addr, <17 x float> %dst) { +; CHECK-LABEL: mload_split17: +; CHECK: vmaskmovps +; CHECK: vmaskmovps +; CHECK: vmaskmovps +; CHECK-NOT: vmaskmovps + %res = call <17 x float> @llvm.masked.load.v17f32.p0v17f32(<17 x float>* %addr, i32 4, <17 x i1>%mask, <17 x float> %dst) + ret <17 x float> %res +} + +define <23 x float> @mload_split23(<23 x i1> %mask, <23 x float>* %addr, <23 x float> %dst) { +; CHECK-LABEL: mload_split23: +; CHECK: vmaskmovps +; CHECK: vmaskmovps +; CHECK: vmaskmovps +; CHECK-NOT: vmaskmovps + %res = call <23 x float> @llvm.masked.load.v23f32.p0v23f32(<23 x float>* %addr, i32 4, <23 x i1>%mask, <23 x float> %dst) + ret <23 x float> %res +} + +declare <9 x float> @llvm.masked.load.v9f32.p0v9f32(<9 x float>* %addr, i32 %align, <9 x i1> %mask, <9 x float> %dst) +declare <13 x float> @llvm.masked.load.v13f32.p0v13f32(<13 x float>* %addr, i32 %align, <13 x i1> %mask, <13 x float> %dst) +declare <14 x float> @llvm.masked.load.v14f32.p0v14f32(<14 x float>* %addr, i32 %align, <14 x i1> %mask, <14 x float> %dst) +declare <17 x float> @llvm.masked.load.v17f32.p0v17f32(<17 x float>* %addr, i32 %align, <17 x i1> %mask, <17 x float> %dst) +declare <23 x float> @llvm.masked.load.v23f32.p0v23f32(<23 x float>* %addr, i32 %align, <23 x i1> %mask, <23 x float> %dst)