diff --git a/llvm/test/CodeGen/AArch64/jump-table-compress.mir b/llvm/test/CodeGen/AArch64/jump-table-compress.mir
--- a/llvm/test/CodeGen/AArch64/jump-table-compress.mir
+++ b/llvm/test/CodeGen/AArch64/jump-table-compress.mir
@@ -46,6 +46,7 @@
       blocks:          [ '%bb.11' ]
 body:             |
   bb.0 (%ir-block.0):
+    liveins: $x8
 
   bb.1 (%ir-block.0):
     ; CHECK-LABEL: body:
diff --git a/llvm/test/CodeGen/AArch64/machine-copy-remove.mir b/llvm/test/CodeGen/AArch64/machine-copy-remove.mir
--- a/llvm/test/CodeGen/AArch64/machine-copy-remove.mir
+++ b/llvm/test/CodeGen/AArch64/machine-copy-remove.mir
@@ -204,7 +204,7 @@
 tracksRegLiveness: true
 body:             |
   bb.0:
-    liveins: $x0, $x1
+    liveins: $x0, $x1, $x2
 
     $x1 = COPY $x0
     CBNZX $x1, %bb.2
@@ -241,7 +241,7 @@
     CBNZX $x0, %bb.2
 
   bb.1:
-    liveins: $x0, $x2
+    liveins: $x0
 
     $x0 = COPY $xzr
     B %bb.3
diff --git a/llvm/test/CodeGen/AArch64/machine-outliner-regsave.mir b/llvm/test/CodeGen/AArch64/machine-outliner-regsave.mir
--- a/llvm/test/CodeGen/AArch64/machine-outliner-regsave.mir
+++ b/llvm/test/CodeGen/AArch64/machine-outliner-regsave.mir
@@ -40,7 +40,7 @@
 fixedStack:
 body:             |
   bb.0:
-    $x25 = ORRXri $xzr, 1
+    $x9 = ORRXri $xzr, 1
     $lr = ORRXri $xzr, 1
   bb.1:
     liveins: $lr, $w9
diff --git a/llvm/test/CodeGen/AArch64/machine-zero-copy-remove.mir b/llvm/test/CodeGen/AArch64/machine-zero-copy-remove.mir
--- a/llvm/test/CodeGen/AArch64/machine-zero-copy-remove.mir
+++ b/llvm/test/CodeGen/AArch64/machine-zero-copy-remove.mir
@@ -553,6 +553,8 @@
     B %bb.1
 
   bb.3:
+    liveins: $x2
+
     B %bb.1
 
   bb.1:
diff --git a/llvm/test/CodeGen/AArch64/post-ra-machine-sink.mir b/llvm/test/CodeGen/AArch64/post-ra-machine-sink.mir
--- a/llvm/test/CodeGen/AArch64/post-ra-machine-sink.mir
+++ b/llvm/test/CodeGen/AArch64/post-ra-machine-sink.mir
@@ -86,22 +86,22 @@
 # Sink w19 to %bb.1 and w20 to %bb.2.
 # CHECK-LABEL: name: sinkcopy4
 # CHECK-LABEL: bb.0:
-# CHECK-NOT: renamable $w19 = COPY killed $w0
-# CHECK-NOT: renamable $w20 = COPY killed $w1
+# CHECK-NOT: renamable $w19 = COPY $w0
+# CHECK-NOT: renamable $w20 = COPY $w1
 # CHECK-LABEL: bb.1:
 # CHECK: liveins: $w0, $w1
-# CHECK: renamable $w19 = COPY killed $w0
+# CHECK: renamable $w19 = COPY $w0
 # CHECK-LABEL: bb.2:
 # CHECK: liveins: $w0, $w1
-# CHECK: renamable $w20 = COPY killed $w1
+# CHECK: renamable $w20 = COPY $w1
 name: sinkcopy4
 tracksRegLiveness: true
 body: |
   bb.0:
     liveins: $w0, $w1
     $w1 = SUBSWri $w1, 1, 0, implicit-def $nzcv
-    renamable $w19 = COPY killed $w0
-    renamable $w20 = COPY killed $w1
+    renamable $w19 = COPY $w0
+    renamable $w20 = COPY $w1
     Bcc 11, %bb.2, implicit $nzcv
     B %bb.1
 
diff --git a/llvm/test/CodeGen/AArch64/unreachable-emergency-spill-slot.mir b/llvm/test/CodeGen/AArch64/unreachable-emergency-spill-slot.mir
--- a/llvm/test/CodeGen/AArch64/unreachable-emergency-spill-slot.mir
+++ b/llvm/test/CodeGen/AArch64/unreachable-emergency-spill-slot.mir
@@ -13,11 +13,14 @@
   - { id: 1, name: '', size: 32761, alignment: 8 }
 body: |
   bb.0:
+    liveins: $x19, $x20, $x21, $x22, $x23, $x24, $x25, $x26, $x27, $x28
+
     STRXui undef $x8, %stack.0, 0
     ; CHECK: STRXui undef $x8, $fp, 0
     B %bb.1
   bb.1:
-    liveins: $x0, $x1, $x2, $x3, $x4, $x5, $x6, $x7, $x8, $x9, $x10, $x11, $x12, $x13, $x14, $x15, $x16, $x17, $x18, $x19, $x20, $x21, $x22, $x23, $x24, $x25, $x26, $x27, $x28
+    liveins: $x19, $x20, $x21, $x22, $x23, $x24, $x25, $x26, $x27, $x28
+
     RET_ReallyLR implicit $x19, implicit $x20, implicit $x21, implicit $x22, implicit $x23, implicit $x24, implicit $x25, implicit $x26, implicit $x27, implicit $x28
 ...
 ---
diff --git a/llvm/test/CodeGen/AArch64/wineh4.mir b/llvm/test/CodeGen/AArch64/wineh4.mir
--- a/llvm/test/CodeGen/AArch64/wineh4.mir
+++ b/llvm/test/CodeGen/AArch64/wineh4.mir
@@ -203,10 +203,10 @@
     RET_ReallyLR implicit $x0
 
   bb.2:
-    liveins: $x28, $d11
+    liveins: $d11
 
     $x0 = COPY $d11
-    $x0 = ADDXrr $x0, killed $x28
+    $x0 = ADDXrr $x0, $x0
     frame-destroy SEH_EpilogStart
     $x19, $x20 = frame-destroy LDPXi $sp, 12 :: (load 8 from %stack.0), (load 8 from %stack.1)
     frame-destroy SEH_SaveRegP 19, 20, 96
diff --git a/llvm/test/CodeGen/AArch64/wineh8.mir b/llvm/test/CodeGen/AArch64/wineh8.mir
--- a/llvm/test/CodeGen/AArch64/wineh8.mir
+++ b/llvm/test/CodeGen/AArch64/wineh8.mir
@@ -202,10 +202,10 @@
     RET_ReallyLR implicit $x0
 
   bb.2:
-    liveins: $x28, $d11
+    liveins: $d11
 
     $x0 = COPY $d11
-    $x0 = ADDXrr $x0, killed $x28
+    $x0 = ADDXrr $x0, $x0
     frame-destroy SEH_EpilogStart
     $x19, $x20 = frame-destroy LDPXi $sp, 12 :: (load 8 from %stack.0), (load 8 from %stack.1)
     frame-destroy SEH_SaveRegP 19, 20, 96