Index: lldb/trunk/source/Plugins/Process/Utility/CMakeLists.txt =================================================================== --- lldb/trunk/source/Plugins/Process/Utility/CMakeLists.txt +++ lldb/trunk/source/Plugins/Process/Utility/CMakeLists.txt @@ -14,6 +14,7 @@ RegisterContextDarwin_i386.cpp RegisterContextDarwin_x86_64.cpp RegisterContextDummy.cpp + RegisterContextFreeBSD_arm64.cpp RegisterContextFreeBSD_i386.cpp RegisterContextFreeBSD_mips64.cpp RegisterContextFreeBSD_powerpc.cpp Index: lldb/trunk/source/Plugins/Process/Utility/RegisterContextFreeBSD_arm64.h =================================================================== --- lldb/trunk/source/Plugins/Process/Utility/RegisterContextFreeBSD_arm64.h +++ lldb/trunk/source/Plugins/Process/Utility/RegisterContextFreeBSD_arm64.h @@ -0,0 +1,78 @@ +//===-- RegisterContextFreeBSD_arm64.h --------------------------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#ifndef liblldb_RegisterContextFreeBSD_arm64_H_ +#define liblldb_RegisterContextFreeBSD_arm64_H_ + +#include "RegisterContextPOSIX.h" + +class RegisterContextFreeBSD_arm64: + public lldb_private::RegisterInfoInterface +{ +public: + // based on RegisterContextDarwin_arm64.h + struct GPR + { + uint64_t x[29]; // x0-x28 + uint64_t fp; // x29 + uint64_t lr; // x30 + uint64_t sp; // x31 + uint64_t pc; // pc + uint32_t cpsr; // cpsr + }; + + // based on RegisterContextDarwin_arm64.h + struct VReg + { + uint8_t bytes[16]; + }; + + // based on RegisterContextDarwin_arm64.h + struct FPU + { + VReg v[32]; + uint32_t fpsr; + uint32_t fpcr; + }; + + // based on RegisterContextDarwin_arm64.h + struct EXC + { + uint64_t far; // Virtual Fault Address + uint32_t esr; // Exception syndrome + uint32_t exception; // number of arm exception token + }; + + // based on RegisterContextDarwin_arm64.h + struct DBG + { + uint64_t bvr[16]; + uint64_t bcr[16]; + uint64_t wvr[16]; + uint64_t wcr[16]; + uint64_t mdscr_el1; + }; + + RegisterContextFreeBSD_arm64(const lldb_private::ArchSpec &target_arch); + + size_t + GetGPRSize() const override; + + const lldb_private::RegisterInfo * + GetRegisterInfo() const override; + + uint32_t + GetRegisterCount () const override; + +private: + const lldb_private::RegisterInfo *m_register_info_p; + uint32_t m_register_info_count; +}; + +#endif Index: lldb/trunk/source/Plugins/Process/Utility/RegisterContextFreeBSD_arm64.cpp =================================================================== --- lldb/trunk/source/Plugins/Process/Utility/RegisterContextFreeBSD_arm64.cpp +++ lldb/trunk/source/Plugins/Process/Utility/RegisterContextFreeBSD_arm64.cpp @@ -0,0 +1,86 @@ +//===-- RegisterContextFreeBSD_arm64.cpp ----------------------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===---------------------------------------------------------------------===// + +#include +#include "RegisterContextPOSIX_arm64.h" +#include "RegisterContextFreeBSD_arm64.h" + +using namespace lldb; + +// Based on RegisterContextDarwin_arm64.cpp +#define GPR_OFFSET(idx) ((idx) * 8) +#define GPR_OFFSET_NAME(reg) (LLVM_EXTENSION offsetof (RegisterContextFreeBSD_arm64::GPR, reg)) + +#define FPU_OFFSET(idx) ((idx) * 16 + sizeof (RegisterContextFreeBSD_arm64::GPR)) +#define FPU_OFFSET_NAME(reg) (LLVM_EXTENSION offsetof (RegisterContextFreeBSD_arm64::FPU, reg)) + +#define EXC_OFFSET_NAME(reg) (LLVM_EXTENSION offsetof (RegisterContextFreeBSD_arm64::EXC, reg) + sizeof (RegisterContextFreeBSD_arm64::GPR) + sizeof (RegisterContextFreeBSD_arm64::FPU)) +#define DBG_OFFSET_NAME(reg) (LLVM_EXTENSION offsetof (RegisterContextFreeBSD_arm64::DBG, reg) + sizeof (RegisterContextFreeBSD_arm64::GPR) + sizeof (RegisterContextFreeBSD_arm64::FPU) + sizeof (RegisterContextFreeBSD_arm64::EXC)) + +#define DEFINE_DBG(reg, i) #reg, NULL, sizeof(((RegisterContextFreeBSD_arm64::DBG *)NULL)->reg[i]), DBG_OFFSET_NAME(reg[i]), lldb::eEncodingUint, lldb::eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, dbg_##reg##i }, NULL, NULL +#define REG_CONTEXT_SIZE (sizeof (RegisterContextFreeBSD_arm64::GPR) + sizeof (RegisterContextFreeBSD_arm64::FPU) + sizeof (RegisterContextFreeBSD_arm64::EXC)) + +//----------------------------------------------------------------------------- +// Include RegisterInfos_arm64 to declare our g_register_infos_arm64 structure. +//----------------------------------------------------------------------------- +#define DECLARE_REGISTER_INFOS_ARM64_STRUCT +#include "RegisterInfos_arm64.h" +#undef DECLARE_REGISTER_INFOS_ARM64_STRUCT + +static const lldb_private::RegisterInfo * +GetRegisterInfoPtr(const lldb_private::ArchSpec &target_arch) +{ + switch (target_arch.GetMachine()) + { + case llvm::Triple::aarch64: + return g_register_infos_arm64; + default: + assert(false && "Unhandled target architecture."); + return nullptr; + } +} + +static uint32_t +GetRegisterInfoCount(const lldb_private::ArchSpec &target_arch) +{ + switch (target_arch.GetMachine()) + { + case llvm::Triple::aarch64: + return static_cast(sizeof(g_register_infos_arm64) / sizeof(g_register_infos_arm64[0])); + default: + assert(false && "Unhandled target architecture."); + return 0; + } +} + +RegisterContextFreeBSD_arm64::RegisterContextFreeBSD_arm64(const lldb_private::ArchSpec &target_arch) : + RegisterInfoInterface(target_arch), + m_register_info_p(GetRegisterInfoPtr(target_arch)), + m_register_info_count(GetRegisterInfoCount(target_arch)) +{ +} + +size_t +RegisterContextFreeBSD_arm64::GetGPRSize() const +{ + return sizeof(struct RegisterContextFreeBSD_arm64::GPR); +} + +const lldb_private::RegisterInfo * +RegisterContextFreeBSD_arm64::GetRegisterInfo() const +{ + return m_register_info_p; +} + +uint32_t +RegisterContextFreeBSD_arm64::GetRegisterCount() const +{ + return m_register_info_count; +} + Index: lldb/trunk/source/Plugins/Process/elf-core/CMakeLists.txt =================================================================== --- lldb/trunk/source/Plugins/Process/elf-core/CMakeLists.txt +++ lldb/trunk/source/Plugins/Process/elf-core/CMakeLists.txt @@ -5,6 +5,7 @@ add_lldb_library(lldbPluginProcessElfCore ProcessElfCore.cpp ThreadElfCore.cpp + RegisterContextPOSIXCore_arm64.cpp RegisterContextPOSIXCore_mips64.cpp RegisterContextPOSIXCore_powerpc.cpp RegisterContextPOSIXCore_x86_64.cpp Index: lldb/trunk/source/Plugins/Process/elf-core/ProcessElfCore.cpp =================================================================== --- lldb/trunk/source/Plugins/Process/elf-core/ProcessElfCore.cpp +++ lldb/trunk/source/Plugins/Process/elf-core/ProcessElfCore.cpp @@ -424,7 +424,8 @@ ArchSpec &arch) { lldb::offset_t offset = 0; - bool lp64 = (arch.GetMachine() == llvm::Triple::mips64 || + bool lp64 = (arch.GetMachine() == llvm::Triple::aarch64 || + arch.GetMachine() == llvm::Triple::mips64 || arch.GetMachine() == llvm::Triple::ppc64 || arch.GetMachine() == llvm::Triple::x86_64); int pr_version = data.GetU32(&offset); Index: lldb/trunk/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_arm64.h =================================================================== --- lldb/trunk/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_arm64.h +++ lldb/trunk/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_arm64.h @@ -0,0 +1,60 @@ +//===-- RegisterContextCorePOSIX_arm64.h -----------------------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===---------------------------------------------------------------------===// + +#ifndef liblldb_RegisterContextCorePOSIX_arm64_H_ +#define liblldb_RegisterContextCorePOSIX_arm64_H_ + +#include "lldb/Core/DataBufferHeap.h" +#include "Plugins/Process/Utility/RegisterContextPOSIX_arm64.h" + +class RegisterContextCorePOSIX_arm64 : + public RegisterContextPOSIX_arm64 +{ +public: + RegisterContextCorePOSIX_arm64 (lldb_private::Thread &thread, + lldb_private::RegisterInfoInterface *register_info, + const lldb_private::DataExtractor &gpregset, + const lldb_private::DataExtractor &fpregset); + + ~RegisterContextCorePOSIX_arm64(); + + virtual bool + ReadRegister(const lldb_private::RegisterInfo *reg_info, lldb_private::RegisterValue &value); + + virtual bool + WriteRegister(const lldb_private::RegisterInfo *reg_info, const lldb_private::RegisterValue &value); + + bool + ReadAllRegisterValues(lldb::DataBufferSP &data_sp); + + bool + WriteAllRegisterValues(const lldb::DataBufferSP &data_sp); + + bool + HardwareSingleStep(bool enable); + +protected: + bool + ReadGPR(); + + bool + ReadFPR(); + + bool + WriteGPR(); + + bool + WriteFPR(); + +private: + lldb::DataBufferSP m_gpr_buffer; + lldb_private::DataExtractor m_gpr; +}; + +#endif // #ifndef liblldb_RegisterContextCorePOSIX_arm64_H_ Index: lldb/trunk/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_arm64.cpp =================================================================== --- lldb/trunk/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_arm64.cpp +++ lldb/trunk/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_arm64.cpp @@ -0,0 +1,94 @@ +//===-- RegisterContextCorePOSIX_arm64.cpp ----------------------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#include "lldb/Core/DataExtractor.h" +#include "lldb/Core/RegisterValue.h" +#include "lldb/Target/Thread.h" +#include "Plugins/Process/Utility/RegisterContextPOSIX.h" +#include "RegisterContextPOSIXCore_arm64.h" + +using namespace lldb_private; + +RegisterContextCorePOSIX_arm64::RegisterContextCorePOSIX_arm64(Thread &thread, + RegisterInfoInterface *register_info, + const DataExtractor &gpregset, + const DataExtractor &fpregset) + : RegisterContextPOSIX_arm64(thread, 0, register_info) +{ + m_gpr_buffer.reset(new DataBufferHeap(gpregset.GetDataStart(), gpregset.GetByteSize())); + m_gpr.SetData(m_gpr_buffer); + m_gpr.SetByteOrder(gpregset.GetByteOrder()); +} + +RegisterContextCorePOSIX_arm64::~RegisterContextCorePOSIX_arm64() +{ +} + +bool +RegisterContextCorePOSIX_arm64::ReadGPR() +{ + return true; +} + +bool +RegisterContextCorePOSIX_arm64::ReadFPR() +{ + return false; +} + +bool +RegisterContextCorePOSIX_arm64::WriteGPR() +{ + assert(0); + return false; +} + +bool +RegisterContextCorePOSIX_arm64::WriteFPR() +{ + assert(0); + return false; +} + +bool +RegisterContextCorePOSIX_arm64::ReadRegister(const RegisterInfo *reg_info, RegisterValue &value) +{ + lldb::offset_t offset = reg_info->byte_offset; + uint64_t v = m_gpr.GetMaxU64(&offset, reg_info->byte_size); + if (offset == reg_info->byte_offset + reg_info->byte_size) + { + value = v; + return true; + } + return false; +} + +bool +RegisterContextCorePOSIX_arm64::ReadAllRegisterValues(lldb::DataBufferSP &data_sp) +{ + return false; +} + +bool +RegisterContextCorePOSIX_arm64::WriteRegister(const RegisterInfo *reg_info, const RegisterValue &value) +{ + return false; +} + +bool +RegisterContextCorePOSIX_arm64::WriteAllRegisterValues(const lldb::DataBufferSP &data_sp) +{ + return false; +} + +bool +RegisterContextCorePOSIX_arm64::HardwareSingleStep(bool enable) +{ + return false; +} Index: lldb/trunk/source/Plugins/Process/elf-core/ThreadElfCore.cpp =================================================================== --- lldb/trunk/source/Plugins/Process/elf-core/ThreadElfCore.cpp +++ lldb/trunk/source/Plugins/Process/elf-core/ThreadElfCore.cpp @@ -17,10 +17,12 @@ #include "ThreadElfCore.h" #include "ProcessElfCore.h" #include "Plugins/Process/Utility/RegisterContextLinux_x86_64.h" +#include "Plugins/Process/Utility/RegisterContextFreeBSD_arm64.h" #include "Plugins/Process/Utility/RegisterContextFreeBSD_i386.h" #include "Plugins/Process/Utility/RegisterContextFreeBSD_mips64.h" #include "Plugins/Process/Utility/RegisterContextFreeBSD_powerpc.h" #include "Plugins/Process/Utility/RegisterContextFreeBSD_x86_64.h" +#include "RegisterContextPOSIXCore_arm64.h" #include "RegisterContextPOSIXCore_mips64.h" #include "RegisterContextPOSIXCore_powerpc.h" #include "RegisterContextPOSIXCore_x86_64.h" @@ -97,6 +99,9 @@ { switch (arch.GetMachine()) { + case llvm::Triple::aarch64: + reg_interface = new RegisterContextFreeBSD_arm64(arch); + break; case llvm::Triple::ppc: reg_interface = new RegisterContextFreeBSD_powerpc32(arch); break; @@ -144,6 +149,9 @@ switch (arch.GetMachine()) { + case llvm::Triple::aarch64: + m_thread_reg_ctx_sp.reset(new RegisterContextCorePOSIX_arm64 (*this, reg_interface, m_gpregset_data, m_fpregset_data)); + break; case llvm::Triple::mips64: m_thread_reg_ctx_sp.reset(new RegisterContextCorePOSIX_mips64 (*this, reg_interface, m_gpregset_data, m_fpregset_data)); break;