diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -12689,15 +12689,17 @@
       return DAG.getNode(ISD::FNEG, DL, VT, N0);
 
   // -N0 * -N1 --> N0 * N1
+  TargetLowering::NegatibleCost CostN0 =
+      TargetLowering::NegatibleCost::Expensive;
+  TargetLowering::NegatibleCost CostN1 =
+      TargetLowering::NegatibleCost::Expensive;
   SDValue NegN0 =
-      TLI.getCheaperNegatedExpression(N0, DAG, LegalOperations, ForCodeSize);
+      TLI.getNegatedExpression(N0, DAG, LegalOperations, ForCodeSize, CostN0);
   SDValue NegN1 =
-      TLI.getCheaperNegatedExpression(N1, DAG, LegalOperations, ForCodeSize);
-  if (NegN0 && !NegN1)
-    NegN1 = TLI.getNegatedExpression(N1, DAG, LegalOperations, ForCodeSize);
-  else if (NegN1 && !NegN0)
-    NegN0 = TLI.getNegatedExpression(N0, DAG, LegalOperations, ForCodeSize);
-  if (NegN0 && NegN1)
+      TLI.getNegatedExpression(N1, DAG, LegalOperations, ForCodeSize, CostN1);
+  if (NegN0 && NegN1 &&
+      (CostN0 == TargetLowering::NegatibleCost::Cheaper ||
+       CostN1 == TargetLowering::NegatibleCost::Cheaper))
     return DAG.getNode(ISD::FMUL, DL, VT, NegN0, NegN1, Flags);
 
   // fold (fmul X, (select (fcmp X > 0.0), -1.0, 1.0)) -> (fneg (fabs X))
@@ -12777,15 +12779,17 @@
   }
 
   // (-N0 * -N1) + N2 --> (N0 * N1) + N2
+  TargetLowering::NegatibleCost CostN0 =
+      TargetLowering::NegatibleCost::Expensive;
+  TargetLowering::NegatibleCost CostN1 =
+      TargetLowering::NegatibleCost::Expensive;
   SDValue NegN0 =
-      TLI.getCheaperNegatedExpression(N0, DAG, LegalOperations, ForCodeSize);
+      TLI.getNegatedExpression(N0, DAG, LegalOperations, ForCodeSize, CostN0);
   SDValue NegN1 =
-      TLI.getCheaperNegatedExpression(N1, DAG, LegalOperations, ForCodeSize);
-  if (NegN0 && !NegN1)
-    NegN1 = TLI.getNegatedExpression(N1, DAG, LegalOperations, ForCodeSize);
-  else if (NegN1 && !NegN0)
-    NegN0 = TLI.getNegatedExpression(N0, DAG, LegalOperations, ForCodeSize);
-  if (NegN0 && NegN1)
+      TLI.getNegatedExpression(N1, DAG, LegalOperations, ForCodeSize, CostN1);
+  if (NegN0 && NegN1 &&
+      (CostN0 == TargetLowering::NegatibleCost::Cheaper ||
+       CostN1 == TargetLowering::NegatibleCost::Cheaper))
     return DAG.getNode(ISD::FMA, DL, VT, NegN0, NegN1, N2, Flags);
 
   if (UnsafeFPMath) {
@@ -13051,16 +13055,18 @@
   }
 
   // (fdiv (fneg X), (fneg Y)) -> (fdiv X, Y)
-  SDValue Neg0 =
-      TLI.getCheaperNegatedExpression(N0, DAG, LegalOperations, ForCodeSize);
-  SDValue Neg1 =
-      TLI.getCheaperNegatedExpression(N1, DAG, LegalOperations, ForCodeSize);
-  if (Neg0 && !Neg1)
-    Neg1 = TLI.getNegatedExpression(N1, DAG, LegalOperations, ForCodeSize);
-  else if (Neg1 && !Neg0)
-    Neg0 = TLI.getNegatedExpression(N0, DAG, LegalOperations, ForCodeSize);
-  if (Neg0 && Neg1)
-    return DAG.getNode(ISD::FDIV, SDLoc(N), VT, Neg0, Neg1, Flags);
+  TargetLowering::NegatibleCost CostN0 =
+      TargetLowering::NegatibleCost::Expensive;
+  TargetLowering::NegatibleCost CostN1 =
+      TargetLowering::NegatibleCost::Expensive;
+  SDValue NegN0 =
+      TLI.getNegatedExpression(N0, DAG, LegalOperations, ForCodeSize, CostN0);
+  SDValue NegN1 =
+      TLI.getNegatedExpression(N1, DAG, LegalOperations, ForCodeSize, CostN1);
+  if (NegN0 && NegN1 &&
+      (CostN0 == TargetLowering::NegatibleCost::Cheaper ||
+       CostN1 == TargetLowering::NegatibleCost::Cheaper))
+    return DAG.getNode(ISD::FDIV, SDLoc(N), VT, NegN0, NegN1, Flags);
 
   return SDValue();
 }
diff --git a/llvm/test/CodeGen/PowerPC/qpx-recipest.ll b/llvm/test/CodeGen/PowerPC/qpx-recipest.ll
--- a/llvm/test/CodeGen/PowerPC/qpx-recipest.ll
+++ b/llvm/test/CodeGen/PowerPC/qpx-recipest.ll
@@ -65,8 +65,8 @@
 ; CHECK-NEXT:    addi 3, 3, .LCPI2_0@toc@l
 ; CHECK-NEXT:    qvlfsx 0, 0, 3
 ; CHECK-NEXT:    qvfmuls 4, 3, 3
-; CHECK-NEXT:    qvfnmsubs 2, 2, 0, 2
-; CHECK-NEXT:    qvfmadds 0, 2, 4, 0
+; CHECK-NEXT:    qvfmsubs 2, 2, 0, 2
+; CHECK-NEXT:    qvfnmsubs 0, 2, 4, 0
 ; CHECK-NEXT:    qvfmuls 0, 3, 0
 ; CHECK-NEXT:    qvfmul 1, 1, 0
 ; CHECK-NEXT:    blr
@@ -182,8 +182,8 @@
 ; CHECK-NEXT:    addi 3, 3, .LCPI6_0@toc@l
 ; CHECK-NEXT:    qvlfsx 0, 0, 3
 ; CHECK-NEXT:    qvfmuls 4, 3, 3
-; CHECK-NEXT:    qvfnmsubs 2, 2, 0, 2
-; CHECK-NEXT:    qvfmadds 0, 2, 4, 0
+; CHECK-NEXT:    qvfmsubs 2, 2, 0, 2
+; CHECK-NEXT:    qvfnmsubs 0, 2, 4, 0
 ; CHECK-NEXT:    qvfmuls 0, 3, 0
 ; CHECK-NEXT:    qvfmuls 1, 1, 0
 ; CHECK-NEXT:    blr
@@ -408,8 +408,8 @@
 ; CHECK-NEXT:    addis 3, 2, .LCPI16_0@toc@ha
 ; CHECK-NEXT:    addi 3, 3, .LCPI16_0@toc@l
 ; CHECK-NEXT:    qvfmuls 4, 2, 2
-; CHECK-NEXT:    qvfnmsubs 3, 1, 0, 1
-; CHECK-NEXT:    qvfmadds 0, 3, 4, 0
+; CHECK-NEXT:    qvfmsubs 3, 1, 0, 1
+; CHECK-NEXT:    qvfnmsubs 0, 3, 4, 0
 ; CHECK-NEXT:    qvlfsx 3, 0, 3
 ; CHECK-NEXT:    addis 3, 2, .LCPI16_2@toc@ha
 ; CHECK-NEXT:    addi 3, 3, .LCPI16_2@toc@l
@@ -435,8 +435,8 @@
 ; CHECK-NEXT:    addis 3, 2, .LCPI17_0@toc@ha
 ; CHECK-NEXT:    addi 3, 3, .LCPI17_0@toc@l
 ; CHECK-NEXT:    qvfmuls 4, 2, 2
-; CHECK-NEXT:    qvfnmsubs 3, 1, 0, 1
-; CHECK-NEXT:    qvfmadds 0, 3, 4, 0
+; CHECK-NEXT:    qvfmsubs 3, 1, 0, 1
+; CHECK-NEXT:    qvfnmsubs 0, 3, 4, 0
 ; CHECK-NEXT:    qvlfsx 3, 0, 3
 ; CHECK-NEXT:    qvfmuls 0, 2, 0
 ; CHECK-NEXT:    qvfmuls 0, 0, 1