diff --git a/lld/ELF/Arch/ARM.cpp b/lld/ELF/Arch/ARM.cpp --- a/lld/ELF/Arch/ARM.cpp +++ b/lld/ELF/Arch/ARM.cpp @@ -65,6 +65,7 @@ ipltEntrySize = 16; trapInstr = {0xd4, 0xd4, 0xd4, 0xd4}; needsThunks = true; + defaultMaxPageSize = 65536; } uint32_t ARM::calcEFlags() const { diff --git a/lld/test/ELF/arm-abs32-dyn.s b/lld/test/ELF/arm-abs32-dyn.s --- a/lld/test/ELF/arm-abs32-dyn.s +++ b/lld/test/ELF/arm-abs32-dyn.s @@ -24,18 +24,18 @@ // RUN: llvm-readelf -x .data %t.so | FileCheck --check-prefix=HEX %s // CHECK: Dynamic Relocations { -// CHECK-NEXT: 0x3204 R_ARM_RELATIVE -// CHECK-NEXT: 0x3208 R_ARM_RELATIVE -// CHECK-NEXT: 0x3200 R_ARM_ABS32 foo 0x0 +// CHECK-NEXT: 0x30204 R_ARM_RELATIVE +// CHECK-NEXT: 0x30208 R_ARM_RELATIVE +// CHECK-NEXT: 0x30200 R_ARM_ABS32 foo 0x0 // CHECK-NEXT: } // CHECK: Symbols [ // CHECK: Symbol { // CHECK: Name: bar -// CHECK-NEXT: Value: 0x11A8 +// CHECK-NEXT: Value: 0x101A8 // CHECK: Symbol { // CHECK: Name: foo -// CHECK-NEXT: Value: 0x11A8 +// CHECK-NEXT: Value: 0x101A8 -// HEX: 0x00003200 00000000 a8110000 a8110000 +// HEX: 0x00030200 00000000 a8010100 a8010100 diff --git a/lld/test/ELF/arm-adr.s b/lld/test/ELF/arm-adr.s --- a/lld/test/ELF/arm-adr.s +++ b/lld/test/ELF/arm-adr.s @@ -75,37 +75,37 @@ afunc: bx lr -// CHECK: 00011410 : -// CHECK-NEXT: 11410: andeq r0, r0, r0 +// CHECK: 00020410 : +// CHECK-NEXT: 20410: andeq r0, r0, r0 -// CHECK: 00011414 : -// CHECK-NEXT: 11414: andeq r0, r0, r0 +// CHECK: 00020414 : +// CHECK-NEXT: 20414: andeq r0, r0, r0 -// CHECK: 00011800 <_start>: +// CHECK: 00020800 <_start>: /// 0x11800 + 0x8 - 0x3f8 = 0x11410 = dat1 -// CHECK-NEXT: 11800: sub r0, pc, #1016 +// CHECK-NEXT: 20800: sub r0, pc, #1016 /// 0x11804 + 0x8 - 0x3f8 = 0x11414 = dat2 -// CHECK-NEXT: 11804: sub r0, pc, #1016 +// CHECK-NEXT: 20804: sub r0, pc, #1016 /// 0x11808 + 0x8 + 0x400 = 0x11c10 = dat3 -// CHECK-NEXT: 11808: add r0, pc, #1024 +// CHECK-NEXT: 20808: add r0, pc, #1024 /// 0x1180c + 0x8 + 0x400 = 0x11c14 = dat4 -// CHECK-NEXT: 1180c: add r0, pc, #1024 +// CHECK-NEXT: 2080c: add r0, pc, #1024 -// CHECK: 00011c10 : -// CHECK-NEXT: 11c10: andeq r0, r0, r0 +// CHECK: 00020c10 : +// CHECK-NEXT: 20c10: andeq r0, r0, r0 -// CHECK: 00011c14 : -// CHECK-NEXT: 11c14: andeq r0, r0, r0 +// CHECK: 00020c14 : +// CHECK-NEXT: 20c14: andeq r0, r0, r0 -// CHECK: 00011c18 : -// CHECK-NEXT: 11c18: bx lr +// CHECK: 00020c18 : +// CHECK-NEXT: 20c18: bx lr -// CHECK: 00011c1c : +// CHECK: 00020c1c : /// 0x11c1c + 0x8 - 0xb = 11c19 = tfunc -// CHECK-NEXT: 11c1c: sub r0, pc, #11 +// CHECK-NEXT: 20c1c: sub r0, pc, #11 /// 0x11c20 + 0x8 = 0x11c28 = afunc -// CHECK-NEXT: 11c20: add r0, pc, #0 -// CHECK-NEXT: 11c24: bx lr +// CHECK-NEXT: 20c20: add r0, pc, #0 +// CHECK-NEXT: 20c24: bx lr -// CHECK: 00011c28 : -// CHECK-NEXT: 11c28: bx lr +// CHECK: 00020c28 : +// CHECK-NEXT: 20c28: bx lr diff --git a/lld/test/ELF/arm-bl-v6.s b/lld/test/ELF/arm-bl-v6.s --- a/lld/test/ELF/arm-bl-v6.s +++ b/lld/test/ELF/arm-bl-v6.s @@ -1,10 +1,10 @@ // REQUIRES: arm // RUN: llvm-mc -arm-add-build-attributes -filetype=obj -triple=armv6-none-linux-gnueabi %s -o %t // RUN: ld.lld %t -o %t2 -// RUN: llvm-objdump -d --triple=armv6-none-linux-gnueabi --start-address=0x12000 --stop-address=0x12008 %t2 | FileCheck --check-prefix=CHECK-ARM1 %s -// RUN: llvm-objdump -d --triple=thumbv6-none-linux-gnueabi %t2 --start-address=0x12008 --stop-address=0x1200c | FileCheck --check-prefix=CHECK-THUMB1 %s -// RUN: llvm-objdump -d --triple=armv6-none-linux-gnueabi --start-address=0x21200c --stop-address=0x212014 %t2 | FileCheck --check-prefix=CHECK-ARM2 %s -// RUN: llvm-objdump -d --triple=thumbv6-none-linux-gnueabi %t2 --start-address=0x613000 --stop-address=0x613002 | FileCheck --check-prefix=CHECK-THUMB2 %s +// RUN: llvm-objdump -d --triple=armv6-none-linux-gnueabi --start-address=0x21000 --stop-address=0x21008 %t2 | FileCheck --check-prefix=CHECK-ARM1 %s +// RUN: llvm-objdump -d --triple=thumbv6-none-linux-gnueabi %t2 --start-address=0x21008 --stop-address=0x2100c | FileCheck --check-prefix=CHECK-THUMB1 %s +// RUN: llvm-objdump -d --triple=armv6-none-linux-gnueabi --start-address=0x22100c --stop-address=0x221014 %t2 | FileCheck --check-prefix=CHECK-ARM2 %s +// RUN: llvm-objdump -d --triple=thumbv6-none-linux-gnueabi %t2 --start-address=0x622000 --stop-address=0x622002 | FileCheck --check-prefix=CHECK-THUMB2 %s // On Arm v6 the range of a Thumb BL instruction is only 4 megabytes as the // extended range encoding is not supported. The following example has a Thumb @@ -28,8 +28,8 @@ // CHECK-ARM1: Disassembly of section .text: // CHECK-ARM1-EMPTY: // CHECK-ARM1-NEXT: <_start>: -// CHECK-ARM1-NEXT: 12000: 00 00 00 fa blx #0 -// CHECK-ARM1-NEXT: 12004: 1e ff 2f e1 bx lr +// CHECK-ARM1-NEXT: 21000: 00 00 00 fa blx #0 +// CHECK-ARM1-NEXT: 21004: 1e ff 2f e1 bx lr .thumb .section .text.2, "ax", %progbits .globl thumbfunc @@ -38,16 +38,16 @@ bl farthumbfunc // CHECK-THUMB1: : -// CHECK-THUMB1-NEXT: 12008: 00 f2 00 e8 blx #2097152 +// CHECK-THUMB1-NEXT: 21008: 00 f2 00 e8 blx #2097152 // 6 Megabytes, enough to make farthumbfunc out of range of caller // on a v6 Arm, but not on a v7 Arm. .section .text.3, "ax", %progbits .space 0x200000 // CHECK-ARM2: <__ARMv5ABSLongThunk_farthumbfunc>: -// CHECK-ARM2-NEXT: 21200c: 04 f0 1f e5 ldr pc, [pc, #-4] +// CHECK-ARM2-NEXT: 22100c: 04 f0 1f e5 ldr pc, [pc, #-4] // CHECK-ARM2: <$d>: -// CHECK-ARM2-NEXT: 212010: 01 30 61 00 .word 0x00613001 +// CHECK-ARM2-NEXT: 221010: 01 20 62 00 .word 0x00622001 .section .text.4, "ax", %progbits .space 0x200000 @@ -62,4 +62,4 @@ farthumbfunc: bx lr // CHECK-THUMB2: : -// CHECK-THUMB2-NEXT: 613000: 70 47 bx lr +// CHECK-THUMB2-NEXT: 622000: 70 47 bx lr diff --git a/lld/test/ELF/arm-branch-rangethunk.s b/lld/test/ELF/arm-branch-rangethunk.s --- a/lld/test/ELF/arm-branch-rangethunk.s +++ b/lld/test/ELF/arm-branch-rangethunk.s @@ -9,7 +9,7 @@ .syntax unified .section .text, "ax",%progbits .globl _start - .balign 0x10000 + .balign 0x20000 .type _start,%function _start: // address of too_far symbols are just out of range of ARM branch with diff --git a/lld/test/ELF/arm-branch-undef-weak-plt-thunk.s b/lld/test/ELF/arm-branch-undef-weak-plt-thunk.s --- a/lld/test/ELF/arm-branch-undef-weak-plt-thunk.s +++ b/lld/test/ELF/arm-branch-undef-weak-plt-thunk.s @@ -3,7 +3,7 @@ // RUN: ld.lld %t1.o --shared -soname=t1.so -o %t1.so // RUN: llvm-mc -arm-add-build-attributes -filetype=obj -triple=armv7a-none-linux-gnueabi %s -o %t.o // RUN: ld.lld %t.o %t1.so -o %t -// RUN: llvm-objdump -d --triple=armv7a-none-linux-gnueabi --start-address=0x111e4 --stop-address=0x11204 %t | FileCheck %s +// RUN: llvm-objdump -d --triple=armv7a-none-linux-gnueabi --start-address=0x201e4 --stop-address=0x20204 %t | FileCheck %s // When we are dynamic linking, undefined weak references have a PLT entry so // we must create a thunk for the branch to the PLT entry. @@ -24,13 +24,13 @@ // CHECK: Disassembly of section .text: // CHECK-EMPTY: // CHECK-NEXT: <_start>: -// CHECK-NEXT: 111e4: 00 00 00 ea b #0 <__ARMv7ABSLongThunk_undefined_weak_we_expect_a_plt_entry_for> -// CHECK-NEXT: 111e8: 02 00 00 eb bl #8 <__ARMv7ABSLongThunk_bar2> +// CHECK-NEXT: 201e4: 00 00 00 ea b #0 <__ARMv7ABSLongThunk_undefined_weak_we_expect_a_plt_entry_for> +// CHECK-NEXT: 201e8: 02 00 00 eb bl #8 <__ARMv7ABSLongThunk_bar2> // CHECK: <__ARMv7ABSLongThunk_undefined_weak_we_expect_a_plt_entry_for>: -// CHECK-NEXT: 111ec: 30 c2 01 e3 movw r12, #4656 -// CHECK-NEXT: 111f0: 01 c2 40 e3 movt r12, #513 -// CHECK-NEXT: 111f4: 1c ff 2f e1 bx r12 +// CHECK-NEXT: 201ec: 30 c2 00 e3 movw r12, #560 +// CHECK-NEXT: 201f0: 02 c2 40 e3 movt r12, #514 +// CHECK-NEXT: 201f4: 1c ff 2f e1 bx r12 // CHECK: <__ARMv7ABSLongThunk_bar2>: -// CHECK-NEXT: 111f8: 40 c2 01 e3 movw r12, #4672 -// CHECK-NEXT: 111fc: 01 c2 40 e3 movt r12, #513 -// CHECK-NEXT: 11200: 1c ff 2f e1 bx r12 +// CHECK-NEXT: 201f8: 40 c2 00 e3 movw r12, #576 +// CHECK-NEXT: 201fc: 02 c2 40 e3 movt r12, #514 +// CHECK-NEXT: 20200: 1c ff 2f e1 bx r12 diff --git a/lld/test/ELF/arm-copy.s b/lld/test/ELF/arm-copy.s --- a/lld/test/ELF/arm-copy.s +++ b/lld/test/ELF/arm-copy.s @@ -25,7 +25,7 @@ // CHECK-NEXT: SHF_ALLOC // CHECK-NEXT: SHF_WRITE // CHECK-NEXT: ] -// CHECK-NEXT: Address: 0x13220 +// CHECK-NEXT: Address: 0x40220 // CHECK-NEXT: Offset: // CHECK-NEXT: Size: 8 // CHECK-NEXT: Link: @@ -35,13 +35,13 @@ // CHECK: Relocations [ // CHECK-NEXT: Section {{.*}} .rel.dyn { // CHECK-NEXT: Relocation { -// CHECK-NEXT: Offset: 0x13220 +// CHECK-NEXT: Offset: 0x40220 // CHECK-NEXT: Type: R_ARM_COPY // CHECK-NEXT: Symbol: y // CHECK-NEXT: Addend: 0x0 // CHECK-NEXT: } // CHECK-NEXT: Relocation { -// CHECK-NEXT: Offset: 0x13224 +// CHECK-NEXT: Offset: 0x40224 // CHECK-NEXT: Type: R_ARM_COPY // CHECK-NEXT: Symbol: z // CHECK-NEXT: Addend: 0x0 @@ -50,14 +50,14 @@ // CHECK: Symbols [ // CHECK: Name: y -// CHECK-NEXT: Value: 0x13220 +// CHECK-NEXT: Value: 0x40220 // CHECK-NEXT: Size: 4 // CHECK-NEXT: Binding: Global // CHECK-NEXT: Type: Object // CHECK-NEXT: Other: // CHECK-NEXT: Section: .bss // CHECK: Name: z -// CHECK-NEXT: Value: 0x13224 +// CHECK-NEXT: Value: 0x40224 // CHECK-NEXT: Size: 4 // CHECK-NEXT: Binding: Global // CHECK-NEXT: Type: Object @@ -68,12 +68,12 @@ // CODE-EMPTY: // CODE-NEXT: <_start>: // S + A = 0x13220 + 0 = 65536 * 1 + 12832 -// CODE-NEXT: 111b4: movw r2, #12832 -// CODE-NEXT: 111b8: movt r2, #1 -// CODE-NEXT: 111bc: ldr r3, [pc, #4] -// CODE-NEXT: 111c0: ldr r3, [r3] +// CODE-NEXT: 201b4: movw r2, #544 +// CODE-NEXT: 201b8: movt r2, #4 +// CODE-NEXT: 201bc: ldr r3, [pc, #4] +// CODE-NEXT: 201c0: ldr r3, [r3] // RODATA: Contents of section .rodata: // S(z) = 0x13004 -// RODATA-NEXT: 101b0 24320100 +// RODATA-NEXT: 101b0 24020400 diff --git a/lld/test/ELF/arm-execute-only.s b/lld/test/ELF/arm-execute-only.s --- a/lld/test/ELF/arm-execute-only.s +++ b/lld/test/ELF/arm-execute-only.s @@ -10,19 +10,19 @@ // RUN: ld.lld %t.o %t2.o -o %t.so -shared // RUN: llvm-readelf -l %t.so | FileCheck --check-prefix=DIFF --implicit-check-not=LOAD %s -// CHECK: LOAD 0x000000 0x00000000 0x00000000 0x0016d 0x0016d R 0x1000 -// CHECK: LOAD 0x000170 0x00001170 0x00001170 0x{{.*}} 0x{{.*}} R E 0x1000 -// CHECK: LOAD 0x000174 0x00002174 0x00002174 0x{{.*}} 0x{{.*}} E 0x1000 -// CHECK: LOAD 0x000178 0x00003178 0x00003178 0x00038 0x00038 RW 0x1000 +// CHECK: LOAD 0x000000 0x00000000 0x00000000 0x0016d 0x0016d R 0x10000 +// CHECK: LOAD 0x000170 0x00010170 0x00010170 0x{{.*}} 0x{{.*}} R E 0x10000 +// CHECK: LOAD 0x000174 0x00020174 0x00020174 0x{{.*}} 0x{{.*}} E 0x10000 +// CHECK: LOAD 0x000178 0x00030178 0x00030178 0x00038 0x00038 RW 0x10000 // CHECK: 01 .dynsym .gnu.hash .hash .dynstr // CHECK: 02 .text // CHECK: 03 .foo // CHECK: 04 .dynamic -// DIFF: LOAD 0x000000 0x00000000 0x00000000 0x0014d 0x0014d R 0x1000 -// DIFF: LOAD 0x000150 0x00001150 0x00001150 0x0000c 0x0000c R E 0x1000 -// DIFF: LOAD 0x00015c 0x0000215c 0x0000215c 0x00038 0x00038 RW 0x1000 +// DIFF: LOAD 0x000000 0x00000000 0x00000000 0x0014d 0x0014d R 0x10000 +// DIFF: LOAD 0x000150 0x00010150 0x00010150 0x0000c 0x0000c R E 0x10000 +// DIFF: LOAD 0x00015c 0x0002015c 0x0002015c 0x00038 0x00038 RW 0x10000 // DIFF: 01 .dynsym .gnu.hash .hash .dynstr // DIFF: 02 .text .foo diff --git a/lld/test/ELF/arm-exidx-add-missing.s b/lld/test/ELF/arm-exidx-add-missing.s --- a/lld/test/ELF/arm-exidx-add-missing.s +++ b/lld/test/ELF/arm-exidx-add-missing.s @@ -53,14 +53,14 @@ bx lr // f1, f2 -// CHECK: 100d4 28100000 08849780 24100000 01000000 +// CHECK: 100d4 28000100 08849780 24000100 01000000 // f3, __aeabi_unwind_cpp_pr0 -// CHECK-NEXT: 100e4 20100000 01000000 1c100000 01000000 +// CHECK-NEXT: 100e4 20000100 01000000 1c000100 01000000 // sentinel -// CHECK-NEXT: 100f4 18100000 01000000 +// CHECK-NEXT: 100f4 18000100 01000000 // f1, (f2, f3, __aeabi_unwind_cpp_pr0) -// CHECK-MERGE: 100d4 18100000 08849780 14100000 01000000 +// CHECK-MERGE: 100d4 18000100 08849780 14000100 01000000 // sentinel -// CHECK-MERGE-NEXT: 100e4 18100000 01000000 +// CHECK-MERGE-NEXT: 100e4 18000100 01000000 diff --git a/lld/test/ELF/arm-exidx-canunwind.s b/lld/test/ELF/arm-exidx-canunwind.s --- a/lld/test/ELF/arm-exidx-canunwind.s +++ b/lld/test/ELF/arm-exidx-canunwind.s @@ -55,26 +55,26 @@ // CHECK: Disassembly of section .text: // CHECK-EMPTY: // CHECK-NEXT: <_start>: -// CHECK-NEXT: 11108: bl #4 +// CHECK-NEXT: 20108: bl #4 // CHECK-NEXT: bl #4 // CHECK-NEXT: bx lr // CHECK: : -// CHECK-NEXT: 11114: bx lr +// CHECK-NEXT: 20114: bx lr // CHECK: : -// CHECK-NEXT: 11118: bx lr +// CHECK-NEXT: 20118: bx lr // CHECK: <__gxx_personality_v0>: -// CHECK-NEXT: 1111c: bx lr +// CHECK-NEXT: 2011c: bx lr // CHECK: <__aeabi_unwind_cpp_pr0>: -// CHECK-NEXT: 11120: bx lr +// CHECK-NEXT: 20120: bx lr // 100d4 + 0x1034 = 0x11108 = main (linker generated cantunwind) // 100dc + 0x1038 = 0x11114 = func1 (inline unwinding data) -// CHECK-EXIDX: 100d4 34100000 01000000 38100000 08849780 +// CHECK-EXIDX: 100d4 34000100 01000000 38000100 08849780 // 100e4 + 0x1034 = 0x11118 = func2 (100e8 + 14 = 100fc = .ARM.extab entry) // 100ec + 0x1030 = 0x1111c = __gxx_personality_v0 (linker generated cantunwind) -// CHECK-EXIDX-NEXT: 100e4 34100000 14000000 30100000 01000000 +// CHECK-EXIDX-NEXT: 100e4 34000100 14000000 30000100 01000000 // 100f4 + 0x1030 = 1101c = sentinel -// CHECK-EXIDX-NEXT: 100f4 30100000 01000000 +// CHECK-EXIDX-NEXT: 100f4 30000100 01000000 // CHECK-PT: Name: .ARM.exidx // CHECK-PT-NEXT: Type: SHT_ARM_EXIDX (0x70000001) diff --git a/lld/test/ELF/arm-exidx-dedup.s b/lld/test/ELF/arm-exidx-dedup.s --- a/lld/test/ELF/arm-exidx-dedup.s +++ b/lld/test/ELF/arm-exidx-dedup.s @@ -11,19 +11,19 @@ // With duplicate entries // CHECK-DUPS: Contents of section .ARM.exidx: -// CHECK-DUPS-NEXT: 100d4 78100000 01000000 74100000 01000000 -// CHECK-DUPS-NEXT: 100e4 70100000 01000000 6c100000 01000000 -// CHECK-DUPS-NEXT: 100f4 68100000 08849780 64100000 08849780 -// CHECK-DUPS-NEXT: 10104 60100000 08849780 5c100000 24000000 -// CHECK-DUPS-NEXT: 10114 58100000 28000000 54100000 01000000 -// CHECK-DUPS-NEXT: 10124 50100000 01000000 4c100000 01000000 +// CHECK-DUPS-NEXT: 100d4 78000100 01000000 74000100 01000000 +// CHECK-DUPS-NEXT: 100e4 70000100 01000000 6c000100 01000000 +// CHECK-DUPS-NEXT: 100f4 68000100 08849780 64000100 08849780 +// CHECK-DUPS-NEXT: 10104 60000100 08849780 5c000100 24000000 +// CHECK-DUPS-NEXT: 10114 58000100 28000000 54000100 01000000 +// CHECK-DUPS-NEXT: 10124 50000100 01000000 4c000100 01000000 // CHECK-DUPS-NEXT: Contents of section .ARM.extab: // After duplicate entry removal // CHECK: Contents of section .ARM.exidx: -// CHECK-NEXT: 100d4 48100000 01000000 50100000 08849780 -// CHECK-NEXT: 100e4 54100000 1c000000 50100000 20000000 -// CHECK-NEXT: 100f4 4c100000 01000000 4c100000 01000000 +// CHECK-NEXT: 100d4 48000100 01000000 50000100 08849780 +// CHECK-NEXT: 100e4 54000100 1c000000 50000100 20000000 +// CHECK-NEXT: 100f4 4c000100 01000000 4c000100 01000000 // CHECK-NEXT: Contents of section .ARM.extab: .syntax unified diff --git a/lld/test/ELF/arm-exidx-emit-relocs.s b/lld/test/ELF/arm-exidx-emit-relocs.s --- a/lld/test/ELF/arm-exidx-emit-relocs.s +++ b/lld/test/ELF/arm-exidx-emit-relocs.s @@ -64,8 +64,8 @@ bx lr // CHECK: Contents of section .ARM.exidx: -// CHECK-NEXT: 100d4 28100000 08849780 28100000 01000000 -// CHECK-NEXT: 100e4 28100000 08849780 24100000 01000000 -// CHECK-NEXT: 100f4 20100000 01000000 +// CHECK-NEXT: 100d4 28000100 08849780 28000100 01000000 +// CHECK-NEXT: 100e4 28000100 08849780 24000100 01000000 +// CHECK-NEXT: 100f4 20000100 01000000 // CHECK-RELOCS-NOT: Relocation section '.rel.ARM.exidx' diff --git a/lld/test/ELF/arm-exidx-gc.s b/lld/test/ELF/arm-exidx-gc.s --- a/lld/test/ELF/arm-exidx-gc.s +++ b/lld/test/ELF/arm-exidx-gc.s @@ -93,17 +93,17 @@ // CHECK: Disassembly of section .text: // CHECK-EMPTY: // CHECK-NEXT: <_start>: -// CHECK-NEXT: 1110c: bl #4 -// CHECK-NEXT: 11110: bl #4 -// CHECK-NEXT: 11114: bx lr +// CHECK-NEXT: 2010c: bl #4 +// CHECK-NEXT: 20110: bl #4 +// CHECK-NEXT: 20114: bx lr // CHECK: : -// CHECK-NEXT: 11118: bx lr +// CHECK-NEXT: 20118: bx lr // CHECK: : -// CHECK-NEXT: 1111c: bx lr +// CHECK-NEXT: 2011c: bx lr // CHECK: <__gxx_personality_v0>: -// CHECK-NEXT: 11120: bx lr +// CHECK-NEXT: 20120: bx lr // CHECK: <__aeabi_unwind_cpp_pr0>: -// CHECK-NEXT: 11124: bx lr +// CHECK-NEXT: 20124: bx lr // GC should have removed table entries for unusedfunc1, unusedfunc2 // and __gxx_personality_v1 @@ -114,13 +114,13 @@ // CHECK-EXIDX: Contents of section .ARM.exidx: // 100d4 + 1038 = 1110c = _start // 100dc + 103c = 11118 = func1 -// CHECK-EXIDX-NEXT: 100d4 38100000 01000000 3c100000 08849780 +// CHECK-EXIDX-NEXT: 100d4 38000100 01000000 3c000100 08849780 // 100e4 + 1038 = 1111c = func2 (100e8 + 1c = 10104 = .ARM.extab) // 100ec + 1034 = 11120 = __gxx_personality_v0 -// CHECK-EXIDX-NEXT: 100e4 38100000 1c000000 34100000 01000000 +// CHECK-EXIDX-NEXT: 100e4 38000100 1c000000 34000100 01000000 // 100f4 + 1030 = 11018 = __aeabi_unwind_cpp_pr0 // 100fc + 102c = 1101c = __aeabi_unwind_cpp_pr0 + sizeof(__aeabi_unwind_cpp_pr0) -// CHECK-EXIDX-NEXT: 100f4 30100000 01000000 2c100000 01000000 +// CHECK-EXIDX-NEXT: 100f4 30000100 01000000 2c000100 01000000 // CHECK-EXIDX-NEXT: Contents of section .ARM.extab: // 10104 + 101c = 11120 = __gxx_personality_v0 -// CHECK-EXIDX-NEXT: 10104 1c100000 b0b0b000 +// CHECK-EXIDX-NEXT: 10104 1c000100 b0b0b000 diff --git a/lld/test/ELF/arm-exidx-order.s b/lld/test/ELF/arm-exidx-order.s --- a/lld/test/ELF/arm-exidx-order.s +++ b/lld/test/ELF/arm-exidx-order.s @@ -56,29 +56,29 @@ // CHECK: Disassembly of section .text: // CHECK-EMPTY: // CHECK: <_start>: -// CHECK-NEXT: 11124: bx lr +// CHECK-NEXT: 20124: bx lr // CHECK: : -// CHECK-NEXT: 11128: bx lr +// CHECK-NEXT: 20128: bx lr // CHECK: : -// CHECK-NEXT: 1112c: bx lr +// CHECK-NEXT: 2012c: bx lr // CHECK: : -// CHECK-NEXT: 11130: bx lr +// CHECK-NEXT: 20130: bx lr // CHECK: : -// CHECK-NEXT: 11134: bx lr +// CHECK-NEXT: 20134: bx lr // CHECK: : -// CHECK-NEXT: 11138: bx lr +// CHECK-NEXT: 20138: bx lr // CHECK: Disassembly of section .func1: // CHECK-EMPTY: // CHECK-NEXT: : -// CHECK-NEXT: 1113c: bx lr +// CHECK-NEXT: 2013c: bx lr // CHECK: Disassembly of section .func2: // CHECK-EMPTY: // CHECK-NEXT: : -// CHECK-NEXT: 11140: bx lr +// CHECK-NEXT: 20140: bx lr // CHECK: Disassembly of section .func3: // CHECK-EMPTY: // CHECK-NEXT: : -// CHECK-NEXT: 11144: bx lr +// CHECK-NEXT: 20144: bx lr // Each .ARM.exidx section has two 4 byte fields // Field 1 is the 31-bit offset to the function. The top bit is used to @@ -90,18 +90,18 @@ // CHECK-EXIDX: Contents of section .ARM.exidx: // 100d4 + 1050 = 11124 = _start // 100dc + 104c = 11128 = f1 -// CHECK-EXIDX-NEXT: 100d4 50100000 01000000 4c100000 01000000 +// CHECK-EXIDX-NEXT: 100d4 50000100 01000000 4c000100 01000000 // 100e4 + 1048 = 1112c = f2 // 100ec + 1044 = 11130 = f3 -// CHECK-EXIDX-NEXT: 100e4 48100000 01000000 44100000 01000000 +// CHECK-EXIDX-NEXT: 100e4 48000100 01000000 44000100 01000000 // 100f4 + 1040 = 11134 = func4 // 100fc + 103c = 11138 = func5 -// CHECK-EXIDX-NEXT: 100f4 40100000 01000000 3c100000 01000000 +// CHECK-EXIDX-NEXT: 100f4 40000100 01000000 3c000100 01000000 // 10104 + 1038 = 1113c = func1 // 1010c + 1034 = 11140 = func2 -// CHECK-EXIDX-NEXT: 10104 38100000 01000000 34100000 01000000 +// CHECK-EXIDX-NEXT: 10104 38000100 01000000 34000100 01000000 // 10114 + 1030 = 11144 = func3 -// CHECK-EXIDX-NEXT: 10114 30100000 01000000 +// CHECK-EXIDX-NEXT: 10114 30000100 01000000 // Check that PT_ARM_EXIDX program header has been generated that describes // the .ARM.exidx output section diff --git a/lld/test/ELF/arm-exidx-shared.s b/lld/test/ELF/arm-exidx-shared.s --- a/lld/test/ELF/arm-exidx-shared.s +++ b/lld/test/ELF/arm-exidx-shared.s @@ -38,8 +38,8 @@ // CHECK: Relocations [ // CHECK-NEXT: Section {{.*}} .rel.plt { -// CHECK-NEXT: 0x32DC R_ARM_JUMP_SLOT __gxx_personality_v0 +// CHECK-NEXT: 0x302DC R_ARM_JUMP_SLOT __gxx_personality_v0 // CHECK-EXTAB: Contents of section .ARM.extab: -// 0x0238 + 0x1038 = 0x1270 = __gxx_personality_v0(PLT) -// CHECK-EXTAB-NEXT: 0238 38100000 b0b0b000 00000000 +// 0x0238 + 0x1038 = 0x1270 = __gxx_personality_v0(PLT) +// CHECK-EXTAB-NEXT: 0238 38000100 b0b0b000 00000000 diff --git a/lld/test/ELF/arm-fix-cortex-a8-blx.s b/lld/test/ELF/arm-fix-cortex-a8-blx.s --- a/lld/test/ELF/arm-fix-cortex-a8-blx.s +++ b/lld/test/ELF/arm-fix-cortex-a8-blx.s @@ -1,13 +1,13 @@ // REQUIRES: arm // RUN: llvm-mc -filetype=obj -triple=armv7a-linux-gnueabihf --arm-add-build-attributes %s -o %t.o // RUN: ld.lld --fix-cortex-a8 -verbose %t.o -o %t2 2>&1 | FileCheck %s -// RUN: llvm-objdump -d --no-show-raw-insn --start-address=0x12ffa --stop-address=0x13008 %t2 | FileCheck --check-prefix=CHECK-PATCH %s +// RUN: llvm-objdump -d --no-show-raw-insn --start-address=0x21ffa --stop-address=0x22008 %t2 | FileCheck --check-prefix=CHECK-PATCH %s /// Test that the patch can work on an unrelocated BLX. Neither clang or GCC /// will emit these without a relocation, but they could be produced by ELF /// processing tools. -// CHECK: ld.lld: detected cortex-a8-657419 erratum sequence starting at 12FFE in unpatched output. +// CHECK: ld.lld: detected cortex-a8-657419 erratum sequence starting at 21FFE in unpatched output. .syntax unified .text @@ -27,7 +27,7 @@ .inst.n 0xf7ff .inst.n 0xe800 -// CHECK-PATCH: 12ffa: nop.w -// CHECK-PATCH-NEXT: 12ffe: blx #4 -// CHECK-PATCH: 00013004 <__CortexA8657417_12FFE>: -// CHECK-PATCH-NEXT: 13004: b #-4104 +// CHECK-PATCH: 21ffa: nop.w +// CHECK-PATCH-NEXT: 21ffe: blx #4 +// CHECK-PATCH: 00022004 <__CortexA8657417_21FFE>: +// CHECK-PATCH-NEXT: 22004: b #-4104 diff --git a/lld/test/ELF/arm-fix-cortex-a8-nopatch.s b/lld/test/ELF/arm-fix-cortex-a8-nopatch.s --- a/lld/test/ELF/arm-fix-cortex-a8-nopatch.s +++ b/lld/test/ELF/arm-fix-cortex-a8-nopatch.s @@ -1,13 +1,13 @@ // REQUIRES: arm // RUN: llvm-mc -filetype=obj -triple=armv7a-linux-gnueabihf --arm-add-build-attributes %s -o %t.o // RUN: ld.lld --fix-cortex-a8 -verbose %t.o -o %t2 -// RUN: llvm-objdump -d %t2 --start-address=0x12ffa --stop-address=0x13002 --no-show-raw-insn | FileCheck --check-prefix=CALLSITE1 %s -// RUN: llvm-objdump -d %t2 --start-address=0x13ffa --stop-address=0x14002 --no-show-raw-insn | FileCheck --check-prefix=CALLSITE2 %s -// RUN: llvm-objdump -d %t2 --start-address=0x14ffa --stop-address=0x15002 --no-show-raw-insn | FileCheck --check-prefix=CALLSITE3 %s -// RUN: llvm-objdump -d %t2 --start-address=0x15ffa --stop-address=0x16006 --no-show-raw-insn | FileCheck --check-prefix=CALLSITE4 %s -// RUN: llvm-objdump -d %t2 --start-address=0x16ffe --stop-address=0x17002 --no-show-raw-insn | FileCheck --check-prefix=CALLSITE5 %s -// RUN: llvm-objdump -d %t2 --start-address=0x18000 --stop-address=0x18004 --no-show-raw-insn | FileCheck --check-prefix=CALLSITE6 %s -// RUN: llvm-objdump -d %t2 --start-address=0x19002 --stop-address=0x19006 --no-show-raw-insn | FileCheck --check-prefix=CALLSITE7 %s +// RUN: llvm-objdump -d %t2 --start-address=0x21ffa --stop-address=0x22002 --no-show-raw-insn | FileCheck --check-prefix=CALLSITE1 %s +// RUN: llvm-objdump -d %t2 --start-address=0x22ffa --stop-address=0x23002 --no-show-raw-insn | FileCheck --check-prefix=CALLSITE2 %s +// RUN: llvm-objdump -d %t2 --start-address=0x23ffa --stop-address=0x24002 --no-show-raw-insn | FileCheck --check-prefix=CALLSITE3 %s +// RUN: llvm-objdump -d %t2 --start-address=0x24ffa --stop-address=0x25006 --no-show-raw-insn | FileCheck --check-prefix=CALLSITE4 %s +// RUN: llvm-objdump -d %t2 --start-address=0x25ffe --stop-address=0x26002 --no-show-raw-insn | FileCheck --check-prefix=CALLSITE5 %s +// RUN: llvm-objdump -d %t2 --start-address=0x27000 --stop-address=0x28004 --no-show-raw-insn | FileCheck --check-prefix=CALLSITE6 %s +// RUN: llvm-objdump -d %t2 --start-address=0x28002 --stop-address=0x29006 --no-show-raw-insn | FileCheck --check-prefix=CALLSITE7 %s /// Test boundary conditions of the cortex-a8 erratum. The following cases /// should not trigger the Erratum @@ -27,9 +27,9 @@ b.w target b.w target -// CALLSITE1: 00012ffa : -// CALLSITE1-NEXT: 12ffa: b.w #-4 -// CALLSITE1-NEXT: 12ffe: b.w #-8 +// CALLSITE1: 00021ffa : +// CALLSITE1-NEXT: 21ffa: b.w #-4 +// CALLSITE1-NEXT: 21ffe: b.w #-8 .space 4088 .type target2, %function @@ -40,10 +40,10 @@ nop bl target2 -// CALLSITE2: 00013ffa : -// CALLSITE2-NEXT: 13ffa: nop -// CALLSITE2-NEXT: 13ffc: nop -// CALLSITE2-NEXT: 13ffe: bl #-8 +// CALLSITE2: 00022ffa : +// CALLSITE2-NEXT: 22ffa: nop +// CALLSITE2-NEXT: 22ffc: nop +// CALLSITE2-NEXT: 22ffe: bl #-8 .space 4088 .type target3, %function @@ -54,9 +54,9 @@ nop.w beq.w target2 -// CALLSITE3: 00014ffa : -// CALLSITE3-NEXT: 14ffa: nop.w -// CALLSITE3-NEXT: 14ffe: beq.w #-4104 +// CALLSITE3: 00023ffa : +// CALLSITE3-NEXT: 23ffa: nop.w +// CALLSITE3-NEXT: 23ffe: beq.w #-4104 .space 4088 .type source4, %function @@ -69,11 +69,11 @@ target4: nop.w -// CALLSITE4: 00015ffa : -// CALLSITE4-NEXT: 15ffa: nop.w -// CALLSITE4-NEXT: 15ffe: beq.w #0 -// CALLSITE4: 00016002 : -// CALLSITE4-NEXT: 16002: nop.w +// CALLSITE4: 00024ffa : +// CALLSITE4-NEXT: 24ffa: nop.w +// CALLSITE4-NEXT: 24ffe: beq.w #0 +// CALLSITE4: 00025002 : +// CALLSITE4-NEXT: 25002: nop.w .space 4084 .type target5, %function @@ -89,8 +89,8 @@ source5: beq.w target5 -// CALLSITE5: 00016ffe : -// CALLSITE5-NEXT: 16ffe: beq.w #-8 +// CALLSITE5: 00025ffe : +// CALLSITE5-NEXT: 25ffe: beq.w #-8 /// Edge case where two word sequence starts at offset 0xffc, check that /// we don't match. In this case the branch will be completely in the 2nd @@ -104,8 +104,8 @@ target6: bl target6 -// CALLSITE6: 00018000 : -// CALLSITE6-NEXT: 18000: bl #-4 +// CALLSITE6: 00027000 : +// CALLSITE6-NEXT: 27000: bl #-4 /// Edge case where two word sequence starts at offset 0xffe, check that /// we don't match. In this case the branch will be completely in the 2nd @@ -119,5 +119,5 @@ target7: bl target7 -// CALLSITE7: 00019002 : -// CALLSITE7: 19002: bl #-4 +// CALLSITE7: 00028002 : +// CALLSITE7: 28002: bl #-4 diff --git a/lld/test/ELF/arm-fix-cortex-a8-recognize.s b/lld/test/ELF/arm-fix-cortex-a8-recognize.s --- a/lld/test/ELF/arm-fix-cortex-a8-recognize.s +++ b/lld/test/ELF/arm-fix-cortex-a8-recognize.s @@ -1,25 +1,25 @@ // REQUIRES: arm // RUN: llvm-mc -filetype=obj -triple=armv7a-linux-gnueabihf --arm-add-build-attributes %s -o %t.o // RUN: ld.lld --fix-cortex-a8 -verbose %t.o -o %t2 2>&1 | FileCheck %s -// RUN: llvm-objdump -d %t2 --start-address=0x1a004 --stop-address=0x1a024 --no-show-raw-insn | FileCheck --check-prefix=CHECK-PATCHES %s -// RUN: llvm-objdump -d %t2 --start-address=0x12ffa --stop-address=0x13002 --no-show-raw-insn | FileCheck --check-prefix=CALLSITE1 %s -// RUN: llvm-objdump -d %t2 --start-address=0x13ffa --stop-address=0x14002 --no-show-raw-insn | FileCheck --check-prefix=CALLSITE2 %s -// RUN: llvm-objdump -d %t2 --start-address=0x14ffa --stop-address=0x15002 --no-show-raw-insn | FileCheck --check-prefix=CALLSITE3 %s -// RUN: llvm-objdump -d %t2 --start-address=0x15ff4 --stop-address=0x16002 --no-show-raw-insn | FileCheck --check-prefix=CALLSITE4 %s -// RUN: llvm-objdump -d %t2 --start-address=0x16ffa --stop-address=0x17002 --no-show-raw-insn | FileCheck --check-prefix=CALLSITE5 %s -// RUN: llvm-objdump -d %t2 --start-address=0x17ffa --stop-address=0x18002 --no-show-raw-insn | FileCheck --check-prefix=CALLSITE6 %s -// RUN: llvm-objdump -d %t2 --start-address=0x18ffa --stop-address=0x19002 --no-show-raw-insn | FileCheck --check-prefix=CALLSITE7 %s -// RUN: llvm-objdump -d %t2 --start-address=0x19ff4 --stop-address=0x1a002 --no-show-raw-insn | FileCheck --check-prefix=CALLSITE8 %s +// RUN: llvm-objdump -d %t2 --start-address=0x29004 --stop-address=0x29024 --no-show-raw-insn | FileCheck --check-prefix=CHECK-PATCHES %s +// RUN: llvm-objdump -d %t2 --start-address=0x21ffa --stop-address=0x22002 --no-show-raw-insn | FileCheck --check-prefix=CALLSITE1 %s +// RUN: llvm-objdump -d %t2 --start-address=0x22ffa --stop-address=0x23002 --no-show-raw-insn | FileCheck --check-prefix=CALLSITE2 %s +// RUN: llvm-objdump -d %t2 --start-address=0x23ffa --stop-address=0x24002 --no-show-raw-insn | FileCheck --check-prefix=CALLSITE3 %s +// RUN: llvm-objdump -d %t2 --start-address=0x24ff4 --stop-address=0x25002 --no-show-raw-insn | FileCheck --check-prefix=CALLSITE4 %s +// RUN: llvm-objdump -d %t2 --start-address=0x25ffa --stop-address=0x26002 --no-show-raw-insn | FileCheck --check-prefix=CALLSITE5 %s +// RUN: llvm-objdump -d %t2 --start-address=0x26ffa --stop-address=0x27002 --no-show-raw-insn | FileCheck --check-prefix=CALLSITE6 %s +// RUN: llvm-objdump -d %t2 --start-address=0x27ffa --stop-address=0x28002 --no-show-raw-insn | FileCheck --check-prefix=CALLSITE7 %s +// RUN: llvm-objdump -d %t2 --start-address=0x28ff4 --stop-address=0x29002 --no-show-raw-insn | FileCheck --check-prefix=CALLSITE8 %s // RUN: ld.lld --fix-cortex-a8 -verbose -r %t.o -o %t3 2>&1 | FileCheck --check-prefix=CHECK-RELOCATABLE-LLD %s // RUN: llvm-objdump --no-show-raw-insn -d %t3 --start-address=0xffa --stop-address=0x1002 | FileCheck --check-prefix=CHECK-RELOCATABLE %s -// CHECK: ld.lld: detected cortex-a8-657419 erratum sequence starting at 12FFE in unpatched output. -// CHECK-NEXT: ld.lld: detected cortex-a8-657419 erratum sequence starting at 13FFE in unpatched output. -// CHECK-NEXT: ld.lld: detected cortex-a8-657419 erratum sequence starting at 14FFE in unpatched output. -// CHECK-NEXT: ld.lld: detected cortex-a8-657419 erratum sequence starting at 15FFE in unpatched output. -// CHECK-NEXT: ld.lld: detected cortex-a8-657419 erratum sequence starting at 16FFE in unpatched output. -// CHECK-NEXT: ld.lld: detected cortex-a8-657419 erratum sequence starting at 17FFE in unpatched output. -// CHECK-NEXT: ld.lld: detected cortex-a8-657419 erratum sequence starting at 18FFE in unpatched output. +// CHECK: ld.lld: detected cortex-a8-657419 erratum sequence starting at 22FFE in unpatched output. +// CHECK-NEXT: ld.lld: detected cortex-a8-657419 erratum sequence starting at 23FFE in unpatched output. +// CHECK-NEXT: ld.lld: detected cortex-a8-657419 erratum sequence starting at 24FFE in unpatched output. +// CHECK-NEXT: ld.lld: detected cortex-a8-657419 erratum sequence starting at 25FFE in unpatched output. +// CHECK-NEXT: ld.lld: detected cortex-a8-657419 erratum sequence starting at 26FFE in unpatched output. +// CHECK-NEXT: ld.lld: detected cortex-a8-657419 erratum sequence starting at 27FFE in unpatched output. +// CHECK-NEXT: ld.lld: detected cortex-a8-657419 erratum sequence starting at 28FFE in unpatched output. /// We do not detect errors when doing a relocatable link as we don't know what /// the final addresses are. @@ -53,9 +53,9 @@ nop.w b.w target -// CALLSITE1: 00012ffa : -// CALLSITE1-NEXT: 12ffa: nop.w -// CALLSITE1-NEXT: 12ffe: b.w #28674 +// CALLSITE1: 00021ffa : +// CALLSITE1-NEXT: 21ffa: nop.w +// CALLSITE1-NEXT: 21ffe: b.w #28674 /// Expect no patch when doing a relocatable link ld -r. // CHECK-RELOCATABLE: 00000ffa : // CHECK-RELOCATABLE-NEXT: ffa: nop.w @@ -70,9 +70,9 @@ nop.w bl target2 -// CALLSITE2: 00013ffa : -// CALLSITE2-NEXT: 13ffa: nop.w -// CALLSITE2-NEXT: 13ffe: bl #24582 +// CALLSITE2: 00022ffa : +// CALLSITE2-NEXT: 22ffa: nop.w +// CALLSITE2-NEXT: 22ffe: bl #24582 .space 4088 .type target3, %function @@ -83,9 +83,9 @@ nop.w beq.w target3 -// CALLSITE3: 00014ffa : -// CALLSITE3-NEXT: 14ffa: nop.w -// CALLSITE3-NEXT: 14ffe: beq.w #20490 +// CALLSITE3: 00023ffa : +// CALLSITE3-NEXT: 23ffa: nop.w +// CALLSITE3-NEXT: 23ffe: beq.w #20490 .space 4082 .type target4, %function @@ -102,11 +102,11 @@ blx target4 /// Target = 0x19010 __CortexA8657417_15FFE -// CALLSITE4: 00015ff4 : -// CALLSITE4-NEXT: 15ff4: bx lr -// CALLSITE4: 15ff8: 00 00 .short 0x0000 -// CALLSITE4: 15ffa: nop.w -// CALLSITE4-NEXT: 15ffe: blx #16400 +// CALLSITE4: 00024ff4 : +// CALLSITE4-NEXT: 24ff4: bx lr +// CALLSITE4: 24ff8: 00 00 .short 0x0000 +// CALLSITE4: 24ffa: nop.w +// CALLSITE4-NEXT: 24ffe: blx #16400 /// Separate sections for source and destination of branches to force /// a relocation. @@ -125,8 +125,8 @@ b.w target5 /// Target = 0x19014 __CortexA8657417_16FFE -// CALLSITE5: 16ffa: nop.w -// CALLSITE5-NEXT: 16ffe: b.w #12306 +// CALLSITE5: 25ffa: nop.w +// CALLSITE5-NEXT: 25ffe: b.w #12306 .section .text.2, "ax", %progbits .balign 2 @@ -143,8 +143,8 @@ bl target6 /// Target = 0x19018 __CortexA8657417_17FFE -// CALLSITE6: 17ffa: nop.w -// CALLSITE6-NEXT: 17ffe: bl #8214 +// CALLSITE6: 26ffa: nop.w +// CALLSITE6-NEXT: 26ffe: bl #8214 .section .text.4, "ax", %progbits .global target7 @@ -159,8 +159,8 @@ nop.w bne.w target7 -// CALLSITE7: 18ffa: nop.w -// CALLSITE7-NEXT: 18ffe: bne.w #4122 +// CALLSITE7: 27ffa: nop.w +// CALLSITE7-NEXT: 27ffe: bne.w #4122 .section .text.6, "ax", %progbits .space 4082 @@ -180,32 +180,32 @@ nop.w bl target8 -// CALLSITE8: 00019ff4 : -// CALLSITE8-NEXT: 19ff4: bx lr -// CALLSITE8: 19ff8: 00 00 .short 0x0000 -// CALLSITE8: 19ffa: nop.w -// CALLSITE8-NEXT: 19ffe: blx #32 +// CALLSITE8: 00028ff4 : +// CALLSITE8-NEXT: 28ff4: bx lr +// CALLSITE8: 28ff8: 00 00 .short 0x0000 +// CALLSITE8: 28ffa: nop.w +// CALLSITE8-NEXT: 28ffe: blx #32 -// CHECK-PATCHES: 0001a004 <__CortexA8657417_12FFE>: -// CHECK-PATCHES-NEXT: 1a004: b.w #-28686 +// CHECK-PATCHES: 00029004 <__CortexA8657417_21FFE>: +// CHECK-PATCHES-NEXT: 29004: b.w #-28686 -// CHECK-PATCHES: 0001a008 <__CortexA8657417_13FFE>: -// CHECK-PATCHES-NEXT: 1a008: b.w #-24594 +// CHECK-PATCHES: 00029008 <__CortexA8657417_22FFE>: +// CHECK-PATCHES-NEXT: 29008: b.w #-24594 -// CHECK-PATCHES: 0001a00c <__CortexA8657417_14FFE>: -// CHECK-PATCHES-NEXT: 1a00c: b.w #-20502 +// CHECK-PATCHES: 0002900c <__CortexA8657417_23FFE>: +// CHECK-PATCHES-NEXT: 2900c: b.w #-20502 -// CHECK-PATCHES: 0001a010 <__CortexA8657417_15FFE>: -// CHECK-PATCHES-NEXT: 1a010: b #-16420 +// CHECK-PATCHES: 00029010 <__CortexA8657417_24FFE>: +// CHECK-PATCHES-NEXT: 29010: b #-16420 -// CHECK-PATCHES: 0001a014 <__CortexA8657417_16FFE>: -// CHECK-PATCHES-NEXT: 1a014: b.w #-16406 +// CHECK-PATCHES: 00029014 <__CortexA8657417_25FFE>: +// CHECK-PATCHES-NEXT: 29014: b.w #-16406 -// CHECK-PATCHES: 0001a018 <__CortexA8657417_17FFE>: -// CHECK-PATCHES-NEXT: 1a018: b.w #-12314 +// CHECK-PATCHES: 00029018 <__CortexA8657417_26FFE>: +// CHECK-PATCHES-NEXT: 29018: b.w #-12314 -// CHECK-PATCHES: 0001a01c <__CortexA8657417_18FFE>: -// CHECK-PATCHES-NEXT: 1a01c: b.w #-8222 +// CHECK-PATCHES: 0002901c <__CortexA8657417_27FFE>: +// CHECK-PATCHES-NEXT: 2901c: b.w #-8222 -// CHECK-PATCHES: 0001a020 <__CortexA8657417_19FFE>: -// CHECK-PATCHES-NEXT: 1a020: b #-52 +// CHECK-PATCHES: 00029020 <__CortexA8657417_28FFE>: +// CHECK-PATCHES-NEXT: 29020: b #-52 diff --git a/lld/test/ELF/arm-fix-cortex-a8-thunk-align.s b/lld/test/ELF/arm-fix-cortex-a8-thunk-align.s --- a/lld/test/ELF/arm-fix-cortex-a8-thunk-align.s +++ b/lld/test/ELF/arm-fix-cortex-a8-thunk-align.s @@ -22,13 +22,13 @@ b.w thumb_target /// Expect thunk and patch to be inserted here -// CHECK: 00003004 <__ThumbV7PILongThunk_arm_func>: -// CHECK-NEXT: 3004: movw r12, #4088 -// CHECK-NEXT: movt r12, #256 -// CHECK-NEXT: add r12, pc -// CHECK-NEXT: bx r12 -// CHECK: 00004004 <__CortexA8657417_2FFE>: -// CHECK-NEXT: 4004: b.w #-8196 +// CHECK: 00012004 <__ThumbV7PILongThunk_arm_func>: +// CHECK-NEXT: 12004: movw r12, #4088 +// CHECK-NEXT: movt r12, #256 +// CHECK-NEXT: add r12, pc +// CHECK-NEXT: bx r12 +// CHECK: 00013004 <__CortexA8657417_11FFE>: +// CHECK-NEXT: 13004: b.w #-8196 .section .text.02 /// Take us over thunk section spacing .space 16 * 1024 * 1024 diff --git a/lld/test/ELF/arm-fpic-got.s b/lld/test/ELF/arm-fpic-got.s --- a/lld/test/ELF/arm-fpic-got.s +++ b/lld/test/ELF/arm-fpic-got.s @@ -36,7 +36,7 @@ // CHECK-NEXT: SHF_ALLOC // CHECK-NEXT: SHF_WRITE // CHECK-NEXT: ] -// CHECK-NEXT: Address: 0x12128 +// CHECK-NEXT: Address: 0x30128 // CHECK-NEXT: Offset: // CHECK-NEXT: Size: 4 // CHECK-NEXT: Link: @@ -45,7 +45,7 @@ // CHECK-NEXT: EntrySize: // SYMBOLS: Name: val -// SYMBOLS-NEXT: Value: 0x1312C +// SYMBOLS-NEXT: Value: 0x4012C // SYMBOLS-NEXT: Size: 4 // SYMBOLS-NEXT: Binding: Global // SYMBOLS-NEXT: Type: Object @@ -55,10 +55,10 @@ // CODE: Disassembly of section .text: // CODE-EMPTY: // CODE-NEXT: <_start>: -// CODE-NEXT: 11114: ldr r0, [pc, #8] -// CODE-NEXT: 11118: ldr r0, [pc, r0] -// CODE-NEXT: 1111c: ldr r0, [r0] -// CODE-NEXT: 11120: bx lr +// CODE-NEXT: 20114: ldr r0, [pc, #8] +// CODE-NEXT: 20118: ldr r0, [pc, r0] +// CODE-NEXT: 2011c: ldr r0, [r0] +// CODE-NEXT: 20120: bx lr // CODE: <$d.1>: // 0x11124 + 0x1008 + 8 = 0x12128 = .got -// CODE-NEXT: 11124: 08 10 00 00 +// CODE-NEXT: 20124: 08 00 01 00 diff --git a/lld/test/ELF/arm-gnu-ifunc-plt.s b/lld/test/ELF/arm-gnu-ifunc-plt.s --- a/lld/test/ELF/arm-gnu-ifunc-plt.s +++ b/lld/test/ELF/arm-gnu-ifunc-plt.s @@ -10,75 +10,75 @@ // Check that the IRELATIVE relocations are last in the .got // CHECK: Relocations [ // CHECK-NEXT: Section (5) .rel.dyn { -// CHECK-NEXT: 0x122E0 R_ARM_GLOB_DAT bar2 0x0 -// CHECK-NEXT: 0x122E4 R_ARM_GLOB_DAT zed2 0x0 -// CHECK-NEXT: 0x122E8 R_ARM_IRELATIVE - 0x0 -// CHECK-NEXT: 0x122EC R_ARM_IRELATIVE - 0x0 +// CHECK-NEXT: 0x302E0 R_ARM_GLOB_DAT bar2 0x0 +// CHECK-NEXT: 0x302E4 R_ARM_GLOB_DAT zed2 0x0 +// CHECK-NEXT: 0x302E8 R_ARM_IRELATIVE - 0x0 +// CHECK-NEXT: 0x302EC R_ARM_IRELATIVE - 0x0 // CHECK-NEXT: } // CHECK-NEXT: Section (6) .rel.plt { -// CHECK-NEXT: 0x132FC R_ARM_JUMP_SLOT bar2 0x0 -// CHECK-NEXT: 0x13300 R_ARM_JUMP_SLOT zed2 0x0 +// CHECK-NEXT: 0x402FC R_ARM_JUMP_SLOT bar2 0x0 +// CHECK-NEXT: 0x40300 R_ARM_JUMP_SLOT zed2 0x0 // CHECK-NEXT: } // CHECK-NEXT: ] // Check that the GOT entries refer back to the ifunc resolver // GOTPLT: Contents of section .got: -// GOTPLT-NEXT: 122e0 00000000 00000000 dc110100 e0110100 +// GOTPLT-NEXT: 302e0 00000000 00000000 dc010200 e0010200 // GOTPLT: Contents of section .got.plt: -// GOTPLT-NEXT: 132f0 00000000 00000000 00000000 00120100 -// GOTPLT-NEXT: 13300 00120100 +// GOTPLT-NEXT: 402f0 00000000 00000000 00000000 00020200 +// GOTPLT-NEXT: 40300 00020200 // DISASM: Disassembly of section .text: // DISASM-EMPTY: // DISASM-NEXT: : -// DISASM-NEXT: 111dc: bx lr +// DISASM-NEXT: 201dc: bx lr // DISASM: : -// DISASM-NEXT: 111e0: bx lr +// DISASM-NEXT: 201e0: bx lr // DISASM: <_start>: -// DISASM-NEXT: 111e4: bl #84 -// DISASM-NEXT: 111e8: bl #96 +// DISASM-NEXT: 201e4: bl #84 +// DISASM-NEXT: 201e8: bl #96 // DISASM: <$d.1>: -// DISASM-NEXT: 111ec: 00 00 00 00 .word 0x00000000 -// DISASM-NEXT: 111f0: 04 00 00 00 .word 0x00000004 -// DISASM: 111f4: bl #36 -// DISASM-NEXT: 111f8: bl #48 +// DISASM-NEXT: 201ec: 00 00 00 00 .word 0x00000000 +// DISASM-NEXT: 201f0: 04 00 00 00 .word 0x00000004 +// DISASM: 201f4: bl #36 +// DISASM-NEXT: 201f8: bl #48 // DISASM-EMPTY: // DISASM-NEXT: Disassembly of section .plt: // DISASM-EMPTY: // DISASM-NEXT: <$a>: -// DISASM-NEXT: 11200: str lr, [sp, #-4]! -// DISASM-NEXT: 11204: add lr, pc, #0, #12 -// DISASM-NEXT: 11208: add lr, lr, #8192 -// DISASM-NEXT: 1120c: ldr pc, [lr, #236]! +// DISASM-NEXT: 20200: str lr, [sp, #-4]! +// DISASM-NEXT: 20204: add lr, pc, #0, #12 +// DISASM-NEXT: 20208: add lr, lr, #32 +// DISASM-NEXT: 2020c: ldr pc, [lr, #236]! // DISASM: <$d>: -// DISASM-NEXT: 11210: d4 d4 d4 d4 .word 0xd4d4d4d4 -// DISASM-NEXT: 11214: d4 d4 d4 d4 .word 0xd4d4d4d4 -// DISASM-NEXT: 11218: d4 d4 d4 d4 .word 0xd4d4d4d4 -// DISASM-NEXT: 1121c: d4 d4 d4 d4 .word 0xd4d4d4d4 +// DISASM-NEXT: 20210: d4 d4 d4 d4 .word 0xd4d4d4d4 +// DISASM-NEXT: 20214: d4 d4 d4 d4 .word 0xd4d4d4d4 +// DISASM-NEXT: 20218: d4 d4 d4 d4 .word 0xd4d4d4d4 +// DISASM-NEXT: 2021c: d4 d4 d4 d4 .word 0xd4d4d4d4 // DISASM: <$a>: -// DISASM-NEXT: 11220: add r12, pc, #0, #12 -// DISASM-NEXT: 11224: add r12, r12, #8192 -// DISASM-NEXT: 11228: ldr pc, [r12, #212]! +// DISASM-NEXT: 20220: add r12, pc, #0, #12 +// DISASM-NEXT: 20224: add r12, r12, #32 +// DISASM-NEXT: 20228: ldr pc, [r12, #212]! // DISASM: <$d>: -// DISASM-NEXT: 1122c: d4 d4 d4 d4 .word 0xd4d4d4d4 +// DISASM-NEXT: 2022c: d4 d4 d4 d4 .word 0xd4d4d4d4 // DISASM: <$a>: -// DISASM-NEXT: 11230: add r12, pc, #0, #12 -// DISASM-NEXT: 11234: add r12, r12, #8192 -// DISASM-NEXT: 11238: ldr pc, [r12, #200]! +// DISASM-NEXT: 20230: add r12, pc, #0, #12 +// DISASM-NEXT: 20234: add r12, r12, #32 +// DISASM-NEXT: 20238: ldr pc, [r12, #200]! // DISASM: <$d>: -// DISASM-NEXT: 1123c: d4 d4 d4 d4 .word 0xd4d4d4d4 +// DISASM-NEXT: 2023c: d4 d4 d4 d4 .word 0xd4d4d4d4 // DISASM: <$a>: -// DISASM-NEXT: 11240: add r12, pc, #0, #12 -// DISASM-NEXT: 11244: add r12, r12, #4096 -// DISASM-NEXT: 11248: ldr pc, [r12, #160]! +// DISASM-NEXT: 20240: add r12, pc, #0, #12 +// DISASM-NEXT: 20244: add r12, r12, #16 +// DISASM-NEXT: 20248: ldr pc, [r12, #160]! // DISASM: <$d>: -// DISASM-NEXT: 1124c: d4 d4 d4 d4 .word 0xd4d4d4d4 +// DISASM-NEXT: 2024c: d4 d4 d4 d4 .word 0xd4d4d4d4 // DISASM: <$a>: -// DISASM-NEXT: 11250: add r12, pc, #0, #12 -// DISASM-NEXT: 11254: add r12, r12, #4096 -// DISASM-NEXT: 11258: ldr pc, [r12, #148]! +// DISASM-NEXT: 20250: add r12, pc, #0, #12 +// DISASM-NEXT: 20254: add r12, r12, #16 +// DISASM-NEXT: 20258: ldr pc, [r12, #148]! // DISASM: <$d>: -// DISASM-NEXT: 1125c: d4 d4 d4 d4 .word 0xd4d4d4d4 +// DISASM-NEXT: 2025c: d4 d4 d4 d4 .word 0xd4d4d4d4 .syntax unified .text diff --git a/lld/test/ELF/arm-gnu-ifunc.s b/lld/test/ELF/arm-gnu-ifunc.s --- a/lld/test/ELF/arm-gnu-ifunc.s +++ b/lld/test/ELF/arm-gnu-ifunc.s @@ -43,7 +43,7 @@ // CHECK-NEXT: SHF_ALLOC // CHECK-NEXT: SHF_EXECINSTR // CHECK-NEXT: ] -// CHECK-NEXT: Address: 0x11130 +// CHECK-NEXT: Address: 0x20130 // CHECK-NEXT: Offset: 0x130 // CHECK-NEXT: Size: 32 // CHECK: Index: 4 @@ -53,13 +53,13 @@ // CHECK-NEXT: SHF_ALLOC // CHECK-NEXT: SHF_WRITE // CHECK-NEXT: ] -// CHECK-NEXT: Address: 0x12150 +// CHECK-NEXT: Address: 0x30150 // CHECK-NEXT: Offset: 0x150 // CHECK-NEXT: Size: 8 // CHECK: Relocations [ // CHECK-NEXT: Section (1) .rel.dyn { -// CHECK-NEXT: 0x12150 R_ARM_IRELATIVE -// CHECK-NEXT: 0x12154 R_ARM_IRELATIVE +// CHECK-NEXT: 0x30150 R_ARM_IRELATIVE +// CHECK-NEXT: 0x30154 R_ARM_IRELATIVE // CHECK-NEXT: } // CHECK-NEXT: ] // CHECK: Symbol { @@ -86,7 +86,7 @@ // CHECK-NEXT: } // CHECK-NEXT: Symbol { // CHECK-NEXT: Name: _start -// CHECK-NEXT: Value: 0x1110C +// CHECK-NEXT: Value: 0x2010C // CHECK-NEXT: Size: 0 // CHECK-NEXT: Binding: Global // CHECK-NEXT: Type: None @@ -95,7 +95,7 @@ // CHECK-NEXT: } // CHECK-NEXT: Symbol { // CHECK-NEXT: Name: bar -// CHECK-NEXT: Value: 0x11108 +// CHECK-NEXT: Value: 0x20108 // CHECK-NEXT: Size: 0 // CHECK-NEXT: Binding: Global // CHECK-NEXT: Type: GNU_IFunc @@ -104,7 +104,7 @@ // CHECK-NEXT: } // CHECK-NEXT: Symbol { // CHECK-NEXT: Name: foo -// CHECK-NEXT: Value: 0x11104 +// CHECK-NEXT: Value: 0x20104 // CHECK-NEXT: Size: 0 // CHECK-NEXT: Binding: Global // CHECK-NEXT: Type: GNU_IFunc @@ -115,31 +115,31 @@ // DISASM: Disassembly of section .text: // DISASM-EMPTY: // DISASM-NEXT: : -// DISASM-NEXT: 11104: bx lr +// DISASM-NEXT: 20104: bx lr // DISASM: : -// DISASM-NEXT: 11108: bx lr +// DISASM-NEXT: 20108: bx lr // DISASM: <_start>: -// DISASM-NEXT: 1110c: bl #28 -// DISASM-NEXT: 11110: bl #40 +// DISASM-NEXT: 2010c: bl #28 +// DISASM-NEXT: 20110: bl #40 // 1 * 65536 + 244 = 0x100f4 __rel_iplt_start -// DISASM-NEXT: 11114: movw r0, #244 -// DISASM-NEXT: 11118: movt r0, #1 +// DISASM-NEXT: 20114: movw r0, #244 +// DISASM-NEXT: 20118: movt r0, #1 // 1 * 65536 + 260 = 0x10104 __rel_iplt_end -// DISASM-NEXT: 1111c: movw r0, #260 -// DISASM-NEXT: 11120: movt r0, #1 +// DISASM-NEXT: 2011c: movw r0, #260 +// DISASM-NEXT: 20120: movt r0, #1 // DISASM-EMPTY: // DISASM-NEXT: Disassembly of section .iplt: // DISASM-EMPTY: // DISASM-NEXT: <$a>: -// DISASM-NEXT: 11130: add r12, pc, #0, #12 -// DISASM-NEXT: 11134: add r12, r12, #4096 -// DISASM-NEXT: 11138: ldr pc, [r12, #24]! +// DISASM-NEXT: 20130: add r12, pc, #0, #12 +// DISASM-NEXT: 20134: add r12, r12, #16 +// DISASM-NEXT: 20138: ldr pc, [r12, #24]! // DISASM: <$d>: -// DISASM-NEXT: 1113c: d4 d4 d4 d4 .word 0xd4d4d4d4 +// DISASM-NEXT: 2013c: d4 d4 d4 d4 .word 0xd4d4d4d4 // DISASM: <$a>: -// DISASM-NEXT: 11140: add r12, pc, #0, #12 -// DISASM-NEXT: 11144: add r12, r12, #4096 -// DISASM-NEXT: 11148: ldr pc, [r12, #12]! +// DISASM-NEXT: 20140: add r12, pc, #0, #12 +// DISASM-NEXT: 20144: add r12, r12, #16 +// DISASM-NEXT: 20148: ldr pc, [r12, #12]! // DISASM: <$d>: -// DISASM-NEXT: 1114c: d4 d4 d4 d4 .word 0xd4d4d4d4 +// DISASM-NEXT: 2014c: d4 d4 d4 d4 .word 0xd4d4d4d4 diff --git a/lld/test/ELF/arm-got-relative.s b/lld/test/ELF/arm-got-relative.s --- a/lld/test/ELF/arm-got-relative.s +++ b/lld/test/ELF/arm-got-relative.s @@ -28,10 +28,10 @@ bx lr // CHECK: Dynamic Relocations { -// CHECK-NEXT: 0x220C R_ARM_GLOB_DAT function 0x0 +// CHECK-NEXT: 0x2020C R_ARM_GLOB_DAT function 0x0 // CHECK: Name: _GLOBAL_OFFSET_TABLE_ -// CHECK-NEXT: Value: 0x220C +// CHECK-NEXT: Value: 0x2020C // CHECK-NEXT: Size: // CHECK-NEXT: Binding: Local // CHECK-NEXT: Type: None @@ -43,12 +43,12 @@ // CODE: Disassembly of section .text: // CODE-EMPTY: // CODE-NEXT: <_start>: -// CODE-NEXT: 11a0: 08 30 9f e5 ldr r3, [pc, #8] -// CODE-NEXT: 11a4: 08 20 9f e5 ldr r2, [pc, #8] -// CODE-NEXT: 11a8: 03 00 8f e0 add r0, pc, r3 -// CODE-NEXT: 11ac: 1e ff 2f e1 bx lr +// CODE-NEXT: 101a0: 08 30 9f e5 ldr r3, [pc, #8] +// CODE-NEXT: 101a4: 08 20 9f e5 ldr r2, [pc, #8] +// CODE-NEXT: 101a8: 03 00 8f e0 add r0, pc, r3 +// CODE-NEXT: 101ac: 1e ff 2f e1 bx lr // CODE: <$d.1>: // (_GLOBAL_OFFSET_TABLE_ = 0x220c) - (0x11a8 + 8) = 0x105c -// CODE-NEXT: 11b0: 5c 10 00 00 +// CODE-NEXT: 101b0: 5c 00 01 00 // (Got(function) - GotBase = 0x0 -// CODE-NEXT: 11b4: 00 00 00 00 +// CODE-NEXT: 101b4: 00 00 00 00 diff --git a/lld/test/ELF/arm-gotoff.s b/lld/test/ELF/arm-gotoff.s --- a/lld/test/ELF/arm-gotoff.s +++ b/lld/test/ELF/arm-gotoff.s @@ -12,7 +12,7 @@ // CHECK-NEXT: SHF_ALLOC // CHECK-NEXT: SHF_WRITE // CHECK-NEXT: ] -// CHECK-NEXT: Address: 0x12124 +// CHECK-NEXT: Address: 0x30124 // CHECK-NEXT: Offset: 0x124 // CHECK-NEXT: Size: 0 // CHECK-NEXT: Link: @@ -25,7 +25,7 @@ // CHECK-NEXT: SHF_ALLOC // CHECK-NEXT: SHF_WRITE // CHECK-NEXT: ] -// CHECK-NEXT: Address: 0x13124 +// CHECK-NEXT: Address: 0x40124 // CHECK-NEXT: Offset: // CHECK-NEXT: Size: 20 // CHECK-NEXT: Link: @@ -36,7 +36,7 @@ // CHECK: Symbol { // CHECK: Name: bar -// CHECK-NEXT: Value: 0x13124 +// CHECK-NEXT: Value: 0x40124 // CHECK-NEXT: Size: 10 // CHECK-NEXT: Binding: Global // CHECK-NEXT: Type: Object @@ -45,7 +45,7 @@ // CHECK-NEXT: } // CHECK-NEXT: Symbol { // CHECK-NEXT: Name: obj -// CHECK-NEXT: Value: 0x1312E +// CHECK-NEXT: Value: 0x4012E // CHECK-NEXT: Size: 10 // CHECK-NEXT: Binding: Global // CHECK-NEXT: Type: Object diff --git a/lld/test/ELF/arm-icf-exidx.s b/lld/test/ELF/arm-icf-exidx.s --- a/lld/test/ELF/arm-icf-exidx.s +++ b/lld/test/ELF/arm-icf-exidx.s @@ -23,12 +23,12 @@ bx lr // CHECK: Contents of section .ARM.exidx: -// CHECK-NEXT: 100d4 18100000 b0b0b080 14100000 01000000 +// CHECK-NEXT: 100d4 18000100 b0b0b080 14000100 01000000 // CHECK: Disassembly of section .text: // CHECK-EMPTY: // CHECK-NEXT: : -// CHECK-NEXT: 110ec: 1e ff 2f e1 bx lr +// CHECK-NEXT: 200ec: 1e ff 2f e1 bx lr // CHECK: <__aeabi_unwind_cpp_pr0>: -// CHECK-NEXT: 110f0: 00 f0 20 e3 nop -// CHECK-NEXT: 110f4: 1e ff 2f e1 bx lr +// CHECK-NEXT: 200f0: 00 f0 20 e3 nop +// CHECK-NEXT: 200f4: 1e ff 2f e1 bx lr diff --git a/lld/test/ELF/arm-mov-relocs.s b/lld/test/ELF/arm-mov-relocs.s --- a/lld/test/ELF/arm-mov-relocs.s +++ b/lld/test/ELF/arm-mov-relocs.s @@ -28,7 +28,7 @@ movw r4, :lower16:label3 + 4 // CHECK-LABEL: Disassembly of section .R_ARM_MOVW_ABS_NC // CHECK-EMPTY: -// CHECK: 12000: movw r0, #0 +// CHECK: 21000: movw r0, #0 // CHECK: movw r1, #4 // CHECK: movw r2, #12 // CHECK: movw r3, #65532 @@ -44,12 +44,12 @@ movt r4, :upper16:label3 + 4 // CHECK-LABEL: Disassembly of section .R_ARM_MOVT_ABS // CHECK-EMPTY: -// CHECK: 12100: movt r0, #2 -// CHECK: movt r1, #2 -// CHECK: movt r2, #2 -// CHECK: movt r3, #2 +// CHECK: 21100: movt r0, #4 +// CHECK: movt r1, #4 +// CHECK: movt r2, #4 +// CHECK: movt r3, #4 /// :upper16:label3 + 4 = :upper16:0x30000 = 3 -// CHECK: movt r4, #3 +// CHECK: movt r4, #5 .section .R_ARM_MOVW_PREL_NC, "ax",%progbits .align 8 @@ -61,15 +61,15 @@ // CHECK-LABEL: Disassembly of section .R_ARM_MOVW_PREL_NC // CHECK-EMPTY: /// :lower16:label - . = 56832 -// CHECK: 12200: movw r0, #56832 +// CHECK: 21200: movw r0, #60928 /// :lower16:label1 - . = 56832 -// CHECK: movw r1, #56832 -/// :lower16:label2 - . + 4 = 56836 -// CHECK: movw r2, #56836 -/// :lower16:label3 - . = 56816 -// CHECK: movw r3, #56816 -/// :lower16:label3 - . + 0x2214 = :lower16:0x20000 = 0 -// CHECK: movw r4, #0 +// CHECK: movw r1, #60928 +/// :lower16:label2 - . + 4 = 60932 +// CHECK: movw r2, #60932 +/// :lower16:label3 - . = 60912 +// CHECK: movw r3, #60912 +/// :lower16:label3 - . + 0x2214 = :lower16:0x20000 = 4096 +// CHECK: movw r4, #4096 .section .R_ARM_MOVT_PREL, "ax",%progbits .align 8 @@ -80,16 +80,16 @@ movt r4, :upper16:label3 + 0x2314 - . // CHECK-LABEL: Disassembly of section .R_ARM_MOVT_PREL // CHECK-EMPTY: -/// :upper16:label - . = :upper16:0xdd00 = 0 -// CHECK: 12300: movt r0, #0 -/// :upper16:label1 - . = :upper16:0xdd00 = 0 -// CHECK: movt r1, #0 -/// :upper16:label2 - . + 4 = :upper16:0xdd04 = 0 -// CHECK: movt r2, #0 -/// :upper16:label3 - . = :upper16:0x1dcf0 = 1 -// CHECK: movt r3, #1 -/// :upper16:label3 - . + 0x2314 = :upper16:0x20000 = 2 -// CHECK: movt r4, #2 +/// :upper16:label - . = :upper16:0xdd00 = 1 +// CHECK: 21300: movt r0, #1 +/// :upper16:label1 - . = :upper16:0xdd00 = 1 +// CHECK: movt r1, #1 +/// :upper16:label2 - . + 4 = :upper16:0xdd04 = 1 +// CHECK: movt r2, #1 +/// :upper16:label3 - . = :upper16:0x1dcf0 = 2 +// CHECK: movt r3, #2 +/// :upper16:label3 - . + 0x2314 = :upper16:0x20000 = 3 +// CHECK: movt r4, #3 .section .R_ARM_MOVW_BREL_NC, "ax",%progbits .align 8 @@ -102,7 +102,7 @@ // CHECK-EMPTY: // SB = .destination /// :lower16:label - SB = 0 -// CHECK: 12400: movw r0, #0 +// CHECK: 21400: movw r0, #0 /// :lower16:label1 - SB = 4 // CHECK: movw r1, #4 /// :lower16:label2 - SB = 8 @@ -123,7 +123,7 @@ // CHECK-EMPTY: // SB = .destination /// :upper16:label - SB = 0 -// CHECK: 12500: movt r0, #0 +// CHECK: 21500: movt r0, #0 /// :upper16:label1 - SB = 0 // CHECK: movt r1, #0 /// :upper16:label2 - SB = 0 @@ -142,7 +142,7 @@ movw r4, :lower16:label3 + 4 // CHECK-LABEL: Disassembly of section .R_ARM_THM_MOVW_ABS_NC // CHECK-EMPTY: -// CHECK: 12600: movw r0, #0 +// CHECK: 21600: movw r0, #0 // CHECK: movw r1, #4 // CHECK: movw r2, #12 // CHECK: movw r3, #65532 @@ -157,11 +157,11 @@ movt r4, :upper16:label3 + 4 // CHECK-LABEL: Disassembly of section .R_ARM_THM_MOVT_ABS // CHECK-EMPTY: -// CHECK: 12700: movt r0, #2 -// CHECK: movt r1, #2 -// CHECK: movt r2, #2 -// CHECK: movt r3, #2 -// CHECK: movt r4, #3 +// CHECK: 21700: movt r0, #4 +// CHECK: movt r1, #4 +// CHECK: movt r2, #4 +// CHECK: movt r3, #4 +// CHECK: movt r4, #5 .section .R_ARM_THM_MOVW_PREL_NC, "ax",%progbits .align 8 @@ -172,16 +172,16 @@ movw r4, :lower16:label3 + 0x2814 - . // CHECK-LABEL: Disassembly of section .R_ARM_THM_MOVW_PREL_NC // CHECK-EMPTY: -/// :lower16:label - . = 55296 -// CHECK: 12800: movw r0, #55296 -/// :lower16:label1 - . = 55296 -// CHECK: movw r1, #55296 -/// :lower16:label2 - . + 4 = 55300 -// CHECK: movw r2, #55300 -/// :lower16:label3 - . = 55280 -// CHECK: movw r3, #55280 +/// :lower16:label - . = 59392 +// CHECK: 21800: movw r0, #59392 +/// :lower16:label1 - . = 59392 +// CHECK: movw r1, #59392 +/// :lower16:label2 - . + 4 = 59396 +// CHECK: movw r2, #59396 +/// :lower16:label3 - . = 59376 +// CHECK: movw r3, #59376 /// :lower16:label3 - . + 0x2814 = 0x20000 -// CHECK: movw r4, #0 +// CHECK: movw r4, #4096 .section .R_ARM_THM_MOVT_PREL, "ax",%progbits .align 8 @@ -192,16 +192,16 @@ movt r4, :upper16:label3 + 0x2914 - . // CHECK-LABEL: Disassembly of section .R_ARM_THM_MOVT_PREL // CHECK-EMPTY: -/// :upper16:label - . = :upper16:0xd700 = 0 -// CHECK: 12900: movt r0, #0 -/// :upper16:label1 - . = :upper16:0xd700 = 0 -// CHECK: movt r1, #0 -/// :upper16:label2 - . + 4 = :upper16:0xd704 = 0 -// CHECK: movt r2, #0 -/// :upper16:label3 - . = :upper16:0x1d6f0 = 1 -// CHECK: movt r3, #1 -/// :upper16:label3 - . + 0x2914 = :upper16:0x20000 = 2 -// CHECK: movt r4, #2 +/// :upper16:label - . = :upper16:0xd700 = 1 +// CHECK: 21900: movt r0, #1 +/// :upper16:label1 - . = :upper16:0xd700 = 1 +// CHECK: movt r1, #1 +/// :upper16:label2 - . + 4 = :upper16:0xd704 = 1 +// CHECK: movt r2, #1 +/// :upper16:label3 - . = :upper16:0x1d6f0 = 2 +// CHECK: movt r3, #2 +/// :upper16:label3 - . + 0x2914 = :upper16:0x20000 = 3 +// CHECK: movt r4, #3 .section .R_ARM_THM_MOVW_BREL_NC, "ax",%progbits .align 8 @@ -214,7 +214,7 @@ // CHECK-EMPTY: // SB = .destination /// :lower16:label - SB = 0 -// CHECK: 12a00: movw r0, #0 +// CHECK: 21a00: movw r0, #0 /// :lower16:label1 - SB = 4 // CHECK: movw r1, #4 /// :lower16:label2 - SB = 8 @@ -235,7 +235,7 @@ // CHECK-EMPTY: /// SB = .destination /// :upper16:label - SB = 0 -// CHECK: 12b00: movt r0, #0 +// CHECK: 21b00: movt r0, #0 /// :upper16:label1 - SB = 0 // CHECK: movt r1, #0 /// :upper16:label2 - SB = 0 diff --git a/lld/test/ELF/arm-pie-relative.s b/lld/test/ELF/arm-pie-relative.s --- a/lld/test/ELF/arm-pie-relative.s +++ b/lld/test/ELF/arm-pie-relative.s @@ -19,7 +19,7 @@ // CHECK: Relocations [ // CHECK-NEXT: Section (5) .rel.dyn { -// CHECK-NEXT: 0x21DC R_ARM_RELATIVE +// CHECK-NEXT: 0x201DC R_ARM_RELATIVE // GOT: section '.got': -// GOT-NEXT: 0x000021dc e0310000 +// GOT-NEXT: 0x000201dc e0010300 diff --git a/lld/test/ELF/arm-plt-reloc.s b/lld/test/ELF/arm-plt-reloc.s --- a/lld/test/ELF/arm-plt-reloc.s +++ b/lld/test/ELF/arm-plt-reloc.s @@ -22,68 +22,68 @@ // CHECK: Disassembly of section .text: // CHECK-EMPTY: // CHECK-NEXT: : -// CHECK-NEXT: 110b4: bx lr +// CHECK-NEXT: 200b4: bx lr // CHECK: : -// CHECK-NEXT: 110b8: bx lr +// CHECK-NEXT: 200b8: bx lr // CHECK: : -// CHECK-NEXT: 110bc: bx lr +// CHECK-NEXT: 200bc: bx lr // CHECK: <_start>: -// CHECK-NEXT: 110c0: b #-20 -// CHECK-NEXT: 110c4: bl #-20 -// CHECK-NEXT: 110c8: beq #-20 +// CHECK-NEXT: 200c0: b #-20 +// CHECK-NEXT: 200c4: bl #-20 +// CHECK-NEXT: 200c8: beq #-20 // Expect PLT entries as symbols can be preempted // The .got.plt and .plt displacement is small so we can use small PLT entries. // DSO: Disassembly of section .text: // DSO-EMPTY: // DSO-NEXT: : -// DSO-NEXT: 1214: bx lr +// DSO-NEXT: 10214: bx lr // DSO: : -// DSO-NEXT: 1218: bx lr +// DSO-NEXT: 10218: bx lr // DSO: : -// DSO-NEXT: 121c: bx lr +// DSO-NEXT: 1021c: bx lr // DSO: <_start>: -// S(0x1214) - P(0x1220) + A(-8) = 0x2c = 32 -// DSO-NEXT: 1220: b #40 -// S(0x1218) - P(0x1224) + A(-8) = 0x38 = 56 -// DSO-NEXT: 1224: bl #52 -// S(0x121c) - P(0x1228) + A(-8) = 0x44 = 68 -// DSO-NEXT: 1228: beq #64 +// S(0x10214) - P(0x10220) + A(-8) = 0x2c = 32 +// DSO-NEXT: 10220: b #40 +// S(0x10218) - P(0x10224) + A(-8) = 0x38 = 56 +// DSO-NEXT: 10224: bl #52 +// S(0x1021c) - P(0x10228) + A(-8) = 0x44 = 68 +// DSO-NEXT: 10228: beq #64 // DSO-EMPTY: // DSO-NEXT: Disassembly of section .plt: // DSO-EMPTY: // DSO-NEXT: <$a>: -// DSO-NEXT: 1230: str lr, [sp, #-4]! -// (0x1234 + 8) + (0 RoR 12) + 8192 + 164 = 0x32e0 = .got.plt[2] -// DSO-NEXT: 1234: add lr, pc, #0, #12 -// DSO-NEXT: 1238: add lr, lr, #8192 -// DSO-NEXT: 123c: ldr pc, [lr, #164]! +// DSO-NEXT: 10230: str lr, [sp, #-4]! +// (0x10234 + 8) + (0 RoR 12) + 8192 + 164 = 0x32e0 = .got.plt[2] +// DSO-NEXT: 10234: add lr, pc, #0, #12 +// DSO-NEXT: 10238: add lr, lr, #32 +// DSO-NEXT: 1023c: ldr pc, [lr, #164]! // DSO: <$d>: -// DSO-NEXT: 1240: d4 d4 d4 d4 .word 0xd4d4d4d4 -// DSO-NEXT: 1244: d4 d4 d4 d4 .word 0xd4d4d4d4 -// DSO-NEXT: 1248: d4 d4 d4 d4 .word 0xd4d4d4d4 -// DSO-NEXT: 124c: d4 d4 d4 d4 .word 0xd4d4d4d4 +// DSO-NEXT: 10240: d4 d4 d4 d4 .word 0xd4d4d4d4 +// DSO-NEXT: 10244: d4 d4 d4 d4 .word 0xd4d4d4d4 +// DSO-NEXT: 10248: d4 d4 d4 d4 .word 0xd4d4d4d4 +// DSO-NEXT: 1024c: d4 d4 d4 d4 .word 0xd4d4d4d4 // DSO: <$a>: -// (0x1250 + 8) + (0 RoR 12) + 8192 + 140 = 0x32e4 -// DSO-NEXT: 1250: add r12, pc, #0, #12 -// DSO-NEXT: 1254: add r12, r12, #8192 -// DSO-NEXT: 1258: ldr pc, [r12, #140]! +// (0x10250 + 8) + (0 RoR 12) + 8192 + 140 = 0x32e4 +// DSO-NEXT: 10250: add r12, pc, #0, #12 +// DSO-NEXT: 10254: add r12, r12, #32 +// DSO-NEXT: 10258: ldr pc, [r12, #140]! // DSO: <$d>: -// DSO-NEXT: 125c: d4 d4 d4 d4 .word 0xd4d4d4d4 +// DSO-NEXT: 1025c: d4 d4 d4 d4 .word 0xd4d4d4d4 // DSO: <$a>: -// (0x1260 + 8) + (0 RoR 12) + 8192 + 128 = 0x32e8 -// DSO-NEXT: 1260: add r12, pc, #0, #12 -// DSO-NEXT: 1264: add r12, r12, #8192 -// DSO-NEXT: 1268: ldr pc, [r12, #128]! +// (0x10260 + 8) + (0 RoR 12) + 8192 + 128 = 0x32e8 +// DSO-NEXT: 10260: add r12, pc, #0, #12 +// DSO-NEXT: 10264: add r12, r12, #32 +// DSO-NEXT: 10268: ldr pc, [r12, #128]! // DSO: <$d>: -// DSO-NEXT: 126c: d4 d4 d4 d4 .word 0xd4d4d4d4 +// DSO-NEXT: 1026c: d4 d4 d4 d4 .word 0xd4d4d4d4 // DSO: <$a>: -// (0x1270 + 8) + (0 RoR 12) + 8192 + 116 = 0x32ec -// DSO-NEXT: 1270: add r12, pc, #0, #12 -// DSO-NEXT: 1274: add r12, r12, #8192 -// DSO-NEXT: 1278: ldr pc, [r12, #116]! +// (0x10270 + 8) + (0 RoR 12) + 8192 + 116 = 0x32ec +// DSO-NEXT: 10270: add r12, pc, #0, #12 +// DSO-NEXT: 10274: add r12, r12, #32 +// DSO-NEXT: 10278: ldr pc, [r12, #116]! // DSO: <$d>: -// DSO-NEXT: 127c: d4 d4 d4 d4 .word 0xd4d4d4d4 +// DSO-NEXT: 1027c: d4 d4 d4 d4 .word 0xd4d4d4d4 // DSOREL: Name: .got.plt @@ -92,7 +92,7 @@ // DSOREL-NEXT: SHF_ALLOC // DSOREL-NEXT: SHF_WRITE // DSOREL-NEXT: ] -// DSOREL-NEXT: Address: 0x32D8 +// DSOREL-NEXT: Address: 0x302D8 // DSOREL-NEXT: Offset: // DSOREL-NEXT: Size: 24 // DSOREL-NEXT: Link: @@ -101,9 +101,9 @@ // DSOREL-NEXT: EntrySize: // DSOREL: Relocations [ // DSOREL-NEXT: Section {{.*}} .rel.plt { -// DSOREL-NEXT: 0x32E4 R_ARM_JUMP_SLOT func1 0x0 -// DSOREL-NEXT: 0x32E8 R_ARM_JUMP_SLOT func2 0x0 -// DSOREL-NEXT: 0x32EC R_ARM_JUMP_SLOT func3 0x0 +// DSOREL-NEXT: 0x302E4 R_ARM_JUMP_SLOT func1 0x0 +// DSOREL-NEXT: 0x302E8 R_ARM_JUMP_SLOT func2 0x0 +// DSOREL-NEXT: 0x302EC R_ARM_JUMP_SLOT func3 0x0 // Test a large separation between the .plt and .got.plt // The .got.plt and .plt displacement is large but still within the range diff --git a/lld/test/ELF/arm-sbrel32.s b/lld/test/ELF/arm-sbrel32.s --- a/lld/test/ELF/arm-sbrel32.s +++ b/lld/test/ELF/arm-sbrel32.s @@ -33,8 +33,8 @@ // CHECK: Disassembly of section .text: // CHECK-EMPTY: // CHECK-NEXT: <_start>: -// CHECK-NEXT: 110d4: 1e ff 2f e1 bx lr -// CHECK: 110d8: 00 00 00 00 .word 0x00000000 -// CHECK-NEXT: 110dc: 04 00 00 00 .word 0x00000004 -// CHECK-NEXT: 110e0: 08 00 00 00 .word 0x00000008 -// CHECK-NEXT: 110e4: 0c 00 00 00 .word 0x0000000c +// CHECK-NEXT: 200d4: 1e ff 2f e1 bx lr +// CHECK: 200d8: 00 00 00 00 .word 0x00000000 +// CHECK-NEXT: 200dc: 04 00 00 00 .word 0x00000004 +// CHECK-NEXT: 200e0: 08 00 00 00 .word 0x00000008 +// CHECK-NEXT: 200e4: 0c 00 00 00 .word 0x0000000c diff --git a/lld/test/ELF/arm-target1.s b/lld/test/ELF/arm-target1.s --- a/lld/test/ELF/arm-target1.s +++ b/lld/test/ELF/arm-target1.s @@ -26,11 +26,11 @@ // Force generation of $d.0 as section is not all data nop // RELATIVE: SYMBOL TABLE: -// RELATIVE: 00001154 l .text 00000000 patatino +// RELATIVE: 00010154 l .text 00000000 patatino // RELATIVE: Disassembly of section .text: // RELATIVE-EMPTY: // RELATIVE: <$d.0>: -// RELATIVE: 1150: 04 00 00 00 .word 0x00000004 +// RELATIVE: 10150: 04 00 00 00 .word 0x00000004 // ABS: can't create dynamic relocation R_ARM_TARGET1 against symbol: patatino in readonly segment; recompile object files with -fPIC or pass '-Wl,-z,notext' to allow text relocations in the output // ABS: >>> defined in {{.*}}.o diff --git a/lld/test/ELF/arm-target2.s b/lld/test/ELF/arm-target2.s --- a/lld/test/ELF/arm-target2.s +++ b/lld/test/ELF/arm-target2.s @@ -36,15 +36,15 @@ // CHECK: Contents of section .ARM.extab: // 0x1012c + 0x2010 = 0x1213c = .got -// CHECK-NEXT: 10124 14100000 b0b0b000 10200000 +// CHECK-NEXT: 10124 14000100 b0b0b000 10000200 // CHECK-ABS: Contents of section .ARM.extab: // 0x100f0 = .rodata -// CHECK-ABS-NEXT: 100e4 14100000 b0b0b000 f0000100 +// CHECK-ABS-NEXT: 100e4 14000100 b0b0b000 f0000100 // CHECK-REL: Contents of section .ARM.extab: // 0x100ec + 4 = 0x100f0 = .rodata -// CHECK-REL-NEXT: 100e4 14100000 b0b0b000 04000000 +// CHECK-REL-NEXT: 100e4 14000100 b0b0b000 04000000 // CHECK: Contents of section .rodata: // CHECK-NEXT: 10130 00000000 @@ -57,4 +57,4 @@ // CHECK: Contents of section .got: // 10130 = _ZTIi -// CHECK-NEXT: 1213c 30010100 +// CHECK-NEXT: 3013c 30010100 diff --git a/lld/test/ELF/arm-thumb-adr.s b/lld/test/ELF/arm-thumb-adr.s --- a/lld/test/ELF/arm-thumb-adr.s +++ b/lld/test/ELF/arm-thumb-adr.s @@ -31,14 +31,14 @@ nop bx lr -// CHECK: 000110b4 <_start>: -// CHECK-NEXT: 110b4: adr r0, #0 -// CHECK-NEXT: 110b6: adr r1, #1020 +// CHECK: 000200b4 <_start>: +// CHECK-NEXT: 200b4: adr r0, #0 +// CHECK-NEXT: 200b6: adr r1, #1020 -// CHECK: 000110b8 : -// CHECK-NEXT: 110b8: nop -// CHECK-NEXT: 110ba: bx lr +// CHECK: 000200b8 : +// CHECK-NEXT: 200b8: nop +// CHECK-NEXT: 200ba: bx lr -// CHECK: 000114b4 : -// CHECK-NEXT: 114b4: nop -// CHECK-NEXT: 114b6: bx lr +// CHECK: 000204b4 : +// CHECK-NEXT: 204b4: nop +// CHECK-NEXT: 204b6: bx lr diff --git a/lld/test/ELF/arm-thumb-interwork-abs.s b/lld/test/ELF/arm-thumb-interwork-abs.s --- a/lld/test/ELF/arm-thumb-interwork-abs.s +++ b/lld/test/ELF/arm-thumb-interwork-abs.s @@ -27,12 +27,12 @@ blx sym // WARN: branch and link relocation: R_ARM_THM_CALL to non STT_FUNC symbol: sym interworking not performed; consider using directive '.type sym, %function' to give symbol type STT_FUNC if interworking between ARM and Thumb is required -// CHECK: 00012000 : -// CHECK-NEXT: 12000: b #4088 -// CHECK-NEXT: 12004: bl #4084 -// CHECK-NEXT: 12008: blx #4080 +// CHECK: 00021000 : +// CHECK-NEXT: 21000: b #-57352 +// CHECK-NEXT: 21004: bl #-57356 +// CHECK-NEXT: 21008: blx #-57360 -// CHECK: 0001200c : -// CHECK-NEXT: 1200c: b.w #4080 -// CHECK-NEXT: 12010: bl #4076 -// CHECK-NEXT: 12014: blx #4076 +// CHECK: 0002100c : +// CHECK-NEXT: 2100c: b.w #-57360 +// CHECK-NEXT: 21010: bl #-57364 +// CHECK-NEXT: 21014: blx #-57364 diff --git a/lld/test/ELF/arm-thumb-interwork-notfunc.s b/lld/test/ELF/arm-thumb-interwork-notfunc.s --- a/lld/test/ELF/arm-thumb-interwork-notfunc.s +++ b/lld/test/ELF/arm-thumb-interwork-notfunc.s @@ -94,48 +94,48 @@ blx thumb_func_with_notype blx thumb_func_with_explicit_notype -// CHECK: 00012008 <_start>: -// CHECK-NEXT: 12008: b #-16 -// CHECK-NEXT: 1200c: b #-20 -// CHECK-NEXT: 12010: b #-24 -// CHECK-NEXT: 12014: b #-24 -// CHECK-NEXT: 12018: b #-28 -// CHECK-NEXT: 1201c: b #-32 -// CHECK-NEXT: 12020: bl #-40 -// CHECK-NEXT: 12024: bl #-44 -// CHECK-NEXT: 12028: bl #-48 -// CHECK-NEXT: 1202c: bl #-48 -// CHECK-NEXT: 12030: bl #-52 -// CHECK-NEXT: 12034: bl #-56 -// CHECK-NEXT: 12038: blx #-64 -// CHECK-NEXT: 1203c: blx #-68 -// CHECK-NEXT: 12040: blx #-72 -// CHECK-NEXT: 12044: blx #-72 -// CHECK-NEXT: 12048: blx #-76 -// CHECK-NEXT: 1204c: blx #-80 +// CHECK: 00021008 <_start>: +// CHECK-NEXT: 21008: b #-16 +// CHECK-NEXT: 2100c: b #-20 +// CHECK-NEXT: 21010: b #-24 +// CHECK-NEXT: 21014: b #-24 +// CHECK-NEXT: 21018: b #-28 +// CHECK-NEXT: 2101c: b #-32 +// CHECK-NEXT: 21020: bl #-40 +// CHECK-NEXT: 21024: bl #-44 +// CHECK-NEXT: 21028: bl #-48 +// CHECK-NEXT: 2102c: bl #-48 +// CHECK-NEXT: 21030: bl #-52 +// CHECK-NEXT: 21034: bl #-56 +// CHECK-NEXT: 21038: blx #-64 +// CHECK-NEXT: 2103c: blx #-68 +// CHECK-NEXT: 21040: blx #-72 +// CHECK-NEXT: 21044: blx #-72 +// CHECK-NEXT: 21048: blx #-76 +// CHECK-NEXT: 2104c: blx #-80 -// CHECK: 00012050 : -// CHECK-NEXT: 12050: b.w #-84 -// CHECK-NEXT: 12054: b.w #-88 -// CHECK-NEXT: 12058: b.w #-92 -// CHECK-NEXT: 1205c: b.w #-92 -// CHECK-NEXT: 12060: b.w #-96 -// CHECK-NEXT: 12064: b.w #-100 -// CHECK-NEXT: 12068: beq.w #-108 -// CHECK-NEXT: 1206c: beq.w #-112 -// CHECK-NEXT: 12070: beq.w #-116 -// CHECK-NEXT: 12074: beq.w #-116 -// CHECK-NEXT: 12078: beq.w #-120 -// CHECK-NEXT: 1207c: beq.w #-124 -// CHECK-NEXT: 12080: bl #-132 -// CHECK-NEXT: 12084: bl #-136 -// CHECK-NEXT: 12088: bl #-140 -// CHECK-NEXT: 1208c: bl #-140 -// CHECK-NEXT: 12090: bl #-144 -// CHECK-NEXT: 12094: bl #-148 -// CHECK-NEXT: 12098: blx #-156 -// CHECK-NEXT: 1209c: blx #-160 -// CHECK-NEXT: 120a0: blx #-164 -// CHECK-NEXT: 120a4: blx #-164 -// CHECK-NEXT: 120a8: blx #-168 -// CHECK-NEXT: 120ac: blx #-172 +// CHECK: 00021050 : +// CHECK-NEXT: 21050: b.w #-84 +// CHECK-NEXT: 21054: b.w #-88 +// CHECK-NEXT: 21058: b.w #-92 +// CHECK-NEXT: 2105c: b.w #-92 +// CHECK-NEXT: 21060: b.w #-96 +// CHECK-NEXT: 21064: b.w #-100 +// CHECK-NEXT: 21068: beq.w #-108 +// CHECK-NEXT: 2106c: beq.w #-112 +// CHECK-NEXT: 21070: beq.w #-116 +// CHECK-NEXT: 21074: beq.w #-116 +// CHECK-NEXT: 21078: beq.w #-120 +// CHECK-NEXT: 2107c: beq.w #-124 +// CHECK-NEXT: 21080: bl #-132 +// CHECK-NEXT: 21084: bl #-136 +// CHECK-NEXT: 21088: bl #-140 +// CHECK-NEXT: 2108c: bl #-140 +// CHECK-NEXT: 21090: bl #-144 +// CHECK-NEXT: 21094: bl #-148 +// CHECK-NEXT: 21098: blx #-156 +// CHECK-NEXT: 2109c: blx #-160 +// CHECK-NEXT: 210a0: blx #-164 +// CHECK-NEXT: 210a4: blx #-164 +// CHECK-NEXT: 210a8: blx #-168 +// CHECK-NEXT: 210ac: blx #-172 diff --git a/lld/test/ELF/arm-thumb-interwork-shared.s b/lld/test/ELF/arm-thumb-interwork-shared.s --- a/lld/test/ELF/arm-thumb-interwork-shared.s +++ b/lld/test/ELF/arm-thumb-interwork-shared.s @@ -19,17 +19,17 @@ // CHECK: Disassembly of section .text: // CHECK-EMPTY: // CHECK-NEXT: : -// CHECK-NEXT: 11e0: b.w #12 <__ThumbV7PILongThunk_elsewhere> +// CHECK-NEXT: 101e0: b.w #12 <__ThumbV7PILongThunk_elsewhere> // CHECK-NEXT: b.w #20 <__ThumbV7PILongThunk_weakref> // CHECK-NEXT: blx #68 // CHECK-NEXT: blx #80 // CHECK: <__ThumbV7PILongThunk_elsewhere>: -// CHECK-NEXT: 11f0: movw r12, #52 +// CHECK-NEXT: 101f0: movw r12, #52 // CHECK-NEXT: movt r12, #0 // CHECK-NEXT: add r12, pc // CHECK-NEXT: bx r12 // CHECK: <__ThumbV7PILongThunk_weakref>: -// CHECK-NEXT: 11fc: movw r12, #56 +// CHECK-NEXT: 101fc: movw r12, #56 // CHECK-NEXT: movt r12, #0 // CHECK-NEXT: add r12, pc // CHECK-NEXT: bx r12 @@ -37,24 +37,24 @@ // CHECK: Disassembly of section .plt: // CHECK-EMPTY: // CHECK-NEXT: <$a>: -// CHECK-NEXT: 1210: str lr, [sp, #-4]! +// CHECK-NEXT: 10210: str lr, [sp, #-4]! // CHECK-NEXT: add lr, pc, #0, #12 -// CHECK-NEXT: add lr, lr, #8192 +// CHECK-NEXT: add lr, lr, #32 // CHECK-NEXT: ldr pc, [lr, #148]! // CHECK: <$d>: -// CHECK-NEXT: 1220: d4 d4 d4 d4 .word 0xd4d4d4d4 +// CHECK-NEXT: 10220: d4 d4 d4 d4 .word 0xd4d4d4d4 // CHECK-NEXT: .word 0xd4d4d4d4 // CHECK-NEXT: .word 0xd4d4d4d4 // CHECK-NEXT: .word 0xd4d4d4d4 // CHECK: <$a>: -// CHECK-NEXT: 1230: add r12, pc, #0, #12 -// CHECK-NEXT: add r12, r12, #8192 +// CHECK-NEXT: 10230: add r12, pc, #0, #12 +// CHECK-NEXT: add r12, r12, #32 // CHECK-NEXT: ldr pc, [r12, #124]! // CHECK: <$d>: -// CHECK-NEXT: 123c: d4 d4 d4 d4 .word 0xd4d4d4d4 +// CHECK-NEXT: 1023c: d4 d4 d4 d4 .word 0xd4d4d4d4 // CHECK: <$a>: -// CHECK-NEXT: 1240: add r12, pc, #0, #12 -// CHECK-NEXT: add r12, r12, #8192 +// CHECK-NEXT: 10240: add r12, pc, #0, #12 +// CHECK-NEXT: add r12, r12, #32 // CHECK-NEXT: ldr pc, [r12, #112]! // CHECK: <$d>: -// CHECK-NEXT: 124c: d4 d4 d4 d4 .word 0xd4d4d4d4 +// CHECK-NEXT: 1024c: d4 d4 d4 d4 .word 0xd4d4d4d4 diff --git a/lld/test/ELF/arm-thumb-interwork-thunk-v5.s b/lld/test/ELF/arm-thumb-interwork-thunk-v5.s --- a/lld/test/ELF/arm-thumb-interwork-thunk-v5.s +++ b/lld/test/ELF/arm-thumb-interwork-thunk-v5.s @@ -27,34 +27,34 @@ bx lr // CHECK: <_start>: -// CHECK-NEXT: 12000: 03 00 00 ea b #12 <__ARMv5ABSLongThunk_thumb_func> -// CHECK-NEXT: 12004: 01 00 00 fa blx #4 -// CHECK-NEXT: 12008: 00 00 00 fa blx #0 -// CHECK-NEXT: 1200c: 1e ff 2f e1 bx lr +// CHECK-NEXT: 21000: 03 00 00 ea b #12 <__ARMv5ABSLongThunk_thumb_func> +// CHECK-NEXT: 21004: 01 00 00 fa blx #4 +// CHECK-NEXT: 21008: 00 00 00 fa blx #0 +// CHECK-NEXT: 2100c: 1e ff 2f e1 bx lr // CHECK: : -// CHECK-NEXT: 12010: 70 47 bx lr +// CHECK-NEXT: 21010: 70 47 bx lr // CHECK: <__ARMv5ABSLongThunk_thumb_func>: -// CHECK-NEXT: 12014: 04 f0 1f e5 ldr pc, [pc, #-4] +// CHECK-NEXT: 21014: 04 f0 1f e5 ldr pc, [pc, #-4] // CHECK: <$d>: -// CHECK-NEXT: 12018: 11 20 01 00 .word 0x00012011 +// CHECK-NEXT: 21018: 11 10 02 00 .word 0x00021011 // CHECK-PI: <_start>: -// CHECK-PI-NEXT: 2000: 03 00 00 ea b #12 <__ARMV5PILongThunk_thumb_func> -// CHECK-PI-NEXT: 2004: 01 00 00 fa blx #4 -// CHECK-PI-NEXT: 2008: 00 00 00 fa blx #0 -// CHECK-PI-NEXT: 200c: 1e ff 2f e1 bx lr +// CHECK-PI-NEXT: 11000: 03 00 00 ea b #12 <__ARMV5PILongThunk_thumb_func> +// CHECK-PI-NEXT: 11004: 01 00 00 fa blx #4 +// CHECK-PI-NEXT: 11008: 00 00 00 fa blx #0 +// CHECK-PI-NEXT: 1100c: 1e ff 2f e1 bx lr // CHECK-PI: : -// CHECK-PI-NEXT: 2010: 70 47 bx lr +// CHECK-PI-NEXT: 11010: 70 47 bx lr // CHECK-PI: <__ARMV5PILongThunk_thumb_func>: -// CHECK-PI-NEXT: 2014: 04 c0 9f e5 ldr r12, [pc, #4] -// CHECK-PI-NEXT: 2018: 0c c0 8f e0 add r12, pc, r12 -// CHECK-PI-NEXT: 201c: 1c ff 2f e1 bx r12 +// CHECK-PI-NEXT: 11014: 04 c0 9f e5 ldr r12, [pc, #4] +// CHECK-PI-NEXT: 11018: 0c c0 8f e0 add r12, pc, r12 +// CHECK-PI-NEXT: 1101c: 1c ff 2f e1 bx r12 // CHECK-PI: <$d>: -// CHECK-PI-NEXT: 2020: f1 ff ff ff .word 0xfffffff1 +// CHECK-PI-NEXT: 11020: f1 ff ff ff .word 0xfffffff1 .section .text.1, "ax", %progbits .thumb diff --git a/lld/test/ELF/arm-thumb-ldrlit.s b/lld/test/ELF/arm-thumb-ldrlit.s --- a/lld/test/ELF/arm-thumb-ldrlit.s +++ b/lld/test/ELF/arm-thumb-ldrlit.s @@ -31,14 +31,14 @@ nop bx lr -// CHECK: 000110b4 <_start>: -// CHECK-NEXT: 110b4: ldr r0, [pc, #0] -// CHECK-NEXT: 110b6: ldr r1, [pc, #1020] +// CHECK: 000200b4 <_start>: +// CHECK-NEXT: 200b4: ldr r0, [pc, #0] +// CHECK-NEXT: 200b6: ldr r1, [pc, #1020] -// CHECK: 000110b8 : -// CHECK-NEXT: 110b8: nop -// CHECK-NEXT: 110ba: bx lr +// CHECK: 000200b8 : +// CHECK-NEXT: 200b8: nop +// CHECK-NEXT: 200ba: bx lr -// CHECK: 000114b4 : -// CHECK-NEXT: 114b4: nop -// CHECK-NEXT: 114b6: bx lr +// CHECK: 000204b4 : +// CHECK-NEXT: 204b4: nop +// CHECK-NEXT: 204b6: bx lr diff --git a/lld/test/ELF/arm-thumb-no-undefined-thunk.s b/lld/test/ELF/arm-thumb-no-undefined-thunk.s --- a/lld/test/ELF/arm-thumb-no-undefined-thunk.s +++ b/lld/test/ELF/arm-thumb-no-undefined-thunk.s @@ -20,6 +20,6 @@ // CHECK-EMPTY: // CHECK-NEXT: <_start>: // 0x110b8 = next instruction -// CHECK: 110b4: {{.*}} bl #0 -// CHECK-NEXT: 110b8: {{.*}} b.w #0 <_start+0x8> -// CHECK-NEXT: 110bc: {{.*}} b.w #0 <_start+0xc> +// CHECK: 200b4: {{.*}} bl #0 +// CHECK-NEXT: 200b8: {{.*}} b.w #0 <_start+0x8> +// CHECK-NEXT: 200bc: {{.*}} b.w #0 <_start+0xc> diff --git a/lld/test/ELF/arm-thumb-plt-range-thunk-os.s b/lld/test/ELF/arm-thumb-plt-range-thunk-os.s --- a/lld/test/ELF/arm-thumb-plt-range-thunk-os.s +++ b/lld/test/ELF/arm-thumb-plt-range-thunk-os.s @@ -89,7 +89,7 @@ // CHECK4-NEXT: <$a>: // CHECK4-NEXT: 4000010: 04 e0 2d e5 str lr, [sp, #-4]! // CHECK4-NEXT: 4000014: 00 e6 8f e2 add lr, pc, #0, #12 -// CHECK4-NEXT: 4000018: 02 ea 8e e2 add lr, lr, #8192 +// CHECK4-NEXT: 4000018: 20 ea 8e e2 add lr, lr, #32 // CHECK4-NEXT: 400001c: a4 f0 be e5 ldr pc, [lr, #164]! // CHECK4: <$d>: // CHECK4-NEXT: 4000020: d4 d4 d4 d4 .word 0xd4d4d4d4 @@ -98,19 +98,19 @@ // CHECK4-NEXT: 400002c: d4 d4 d4 d4 .word 0xd4d4d4d4 // CHECK4: <$a>: // CHECK4-NEXT: 4000030: 00 c6 8f e2 add r12, pc, #0, #12 -// CHECK4-NEXT: 4000034: 02 ca 8c e2 add r12, r12, #8192 +// CHECK4-NEXT: 4000034: 20 ca 8c e2 add r12, r12, #32 // CHECK4-NEXT: 4000038: 8c f0 bc e5 ldr pc, [r12, #140]! // CHECK4: <$d>: // CHECK4-NEXT: 400003c: d4 d4 d4 d4 .word 0xd4d4d4d4 // CHECK4: <$a>: // CHECK4-NEXT: 4000040: 00 c6 8f e2 add r12, pc, #0, #12 -// CHECK4-NEXT: 4000044: 02 ca 8c e2 add r12, r12, #8192 +// CHECK4-NEXT: 4000044: 20 ca 8c e2 add r12, r12, #32 // CHECK4-NEXT: 4000048: 80 f0 bc e5 ldr pc, [r12, #128]! // CHECK4: <$d>: // CHECK4-NEXT: 400004c: d4 d4 d4 d4 .word 0xd4d4d4d4 // CHECK4: <$a>: // CHECK4-NEXT: 4000050: 00 c6 8f e2 add r12, pc, #0, #12 -// CHECK4-NEXT: 4000054: 02 ca 8c e2 add r12, r12, #8192 +// CHECK4-NEXT: 4000054: 20 ca 8c e2 add r12, r12, #32 // CHECK4-NEXT: 4000058: 74 f0 bc e5 ldr pc, [r12, #116]! // CHECK4: <$d>: // CHECK4-NEXT: 400005c: d4 d4 d4 d4 .word 0xd4d4d4d4 diff --git a/lld/test/ELF/arm-thumb-plt-reloc.s b/lld/test/ELF/arm-thumb-plt-reloc.s --- a/lld/test/ELF/arm-thumb-plt-reloc.s +++ b/lld/test/ELF/arm-thumb-plt-reloc.s @@ -25,19 +25,19 @@ // CHECK: Disassembly of section .text: // CHECK-EMPTY: // CHECK-NEXT: : -// CHECK-NEXT: 110b4: 70 47 bx lr +// CHECK-NEXT: 200b4: 70 47 bx lr // CHECK: : -// CHECK-NEXT: 110b6: 70 47 bx lr +// CHECK-NEXT: 200b6: 70 47 bx lr // CHECK: : -// CHECK-NEXT: 110b8: 70 47 bx lr -// CHECK-NEXT: 110ba: d4 d4 +// CHECK-NEXT: 200b8: 70 47 bx lr +// CHECK-NEXT: 200ba: d4 d4 // CHECK: <_start>: -// . + 4 -12 = 0x110b4 = func1 -// CHECK-NEXT: 110bc: ff f7 fa ff bl #-12 -// . + 4 -14 = 0x110b6 = func2 -// CHECK-NEXT: 110c0: ff f7 f9 ff bl #-14 -// . + 4 -16 = 0x110b8 = func3 -// CHECK-NEXT: 110c4: ff f7 f8 ff bl #-16 +// . + 4 -12 = 0x200b4 = func1 +// CHECK-NEXT: 200bc: ff f7 fa ff bl #-12 +// . + 4 -14 = 0x200b6 = func2 +// CHECK-NEXT: 200c0: ff f7 f9 ff bl #-14 +// . + 4 -16 = 0x200b8 = func3 +// CHECK-NEXT: 200c4: ff f7 f8 ff bl #-16 // Expect PLT entries as symbols can be preempted // .text is Thumb and .plt is ARM, llvm-objdump can currently only disassemble @@ -45,54 +45,54 @@ // DSO: Disassembly of section .text: // DSO-EMPTY: // DSO-NEXT: : -// DSO-NEXT: 1214: 70 47 bx lr +// DSO-NEXT: 10214: 70 47 bx lr // DSO: : -// DSO-NEXT: 1216: 70 47 bx lr +// DSO-NEXT: 10216: 70 47 bx lr // DSO: : -// DSO-NEXT: 1218: 70 47 bx lr -// DSO-NEXT: 121a: d4 d4 bmi #-88 +// DSO-NEXT: 10218: 70 47 bx lr +// DSO-NEXT: 1021a: d4 d4 bmi #-88 // DSO: <_start>: -// . + 48 + 4 = 0x1250 = PLT func1 -// DSO-NEXT: 121c: 00 f0 18 e8 blx #48 -// . + 60 + 4 = 0x1260 = PLT func2 -// DSO-NEXT: 1220: 00 f0 1e e8 blx #60 -// . + 72 + 4 = 0x1270 = PLT func3 -// DSO-NEXT: 1224: 00 f0 24 e8 blx #72 +// . + 48 + 4 = 0x10250 = PLT func1 +// DSO-NEXT: 1021c: 00 f0 18 e8 blx #48 +// . + 60 + 4 = 0x10260 = PLT func2 +// DSO-NEXT: 10220: 00 f0 1e e8 blx #60 +// . + 72 + 4 = 0x10270 = PLT func3 +// DSO-NEXT: 10224: 00 f0 24 e8 blx #72 // DSO: Disassembly of section .plt: // DSO-EMPTY: // DSO-NEXT: <$a>: -// DSO-NEXT: 1230: 04 e0 2d e5 str lr, [sp, #-4]! -// (0x1234 + 8) + (0 RoR 12) + 8192 + 164 = 0x32e0 = .got.plt[3] -// DSO-NEXT: 1234: 00 e6 8f e2 add lr, pc, #0, #12 -// DSO-NEXT: 1238: 02 ea 8e e2 add lr, lr, #8192 -// DSO-NEXT: 123c: a4 f0 be e5 ldr pc, [lr, #164]! +// DSO-NEXT: 10230: 04 e0 2d e5 str lr, [sp, #-4]! +// (0x10234 + 8) + (0 RoR 12) + 8192 + 164 = 0x32e0 = .got.plt[3] +// DSO-NEXT: 10234: 00 e6 8f e2 add lr, pc, #0, #12 +// DSO-NEXT: 10238: 20 ea 8e e2 add lr, lr, #32 +// DSO-NEXT: 1023c: a4 f0 be e5 ldr pc, [lr, #164]! // DSO: <$d>: -// DSO-NEXT: 1240: d4 d4 d4 d4 .word 0xd4d4d4d4 -// DSO-NEXT: 1244: d4 d4 d4 d4 .word 0xd4d4d4d4 -// DSO-NEXT: 1248: d4 d4 d4 d4 .word 0xd4d4d4d4 -// DSO-NEXT: 124c: d4 d4 d4 d4 .word 0xd4d4d4d4 +// DSO-NEXT: 10240: d4 d4 d4 d4 .word 0xd4d4d4d4 +// DSO-NEXT: 10244: d4 d4 d4 d4 .word 0xd4d4d4d4 +// DSO-NEXT: 10248: d4 d4 d4 d4 .word 0xd4d4d4d4 +// DSO-NEXT: 1024c: d4 d4 d4 d4 .word 0xd4d4d4d4 // DSO: <$a>: -// (0x1250 + 8) + (0 RoR 12) + 8192 + 140 = 0x32e4 -// DSO-NEXT: 1250: 00 c6 8f e2 add r12, pc, #0, #12 -// DSO-NEXT: 1254: 02 ca 8c e2 add r12, r12, #8192 -// DSO-NEXT: 1258: 8c f0 bc e5 ldr pc, [r12, #140]! +// (0x10250 + 8) + (0 RoR 12) + 8192 + 140 = 0x32e4 +// DSO-NEXT: 10250: 00 c6 8f e2 add r12, pc, #0, #12 +// DSO-NEXT: 10254: 20 ca 8c e2 add r12, r12, #32 +// DSO-NEXT: 10258: 8c f0 bc e5 ldr pc, [r12, #140]! // DSO: <$d>: -// DSO-NEXT: 125c: d4 d4 d4 d4 .word 0xd4d4d4d4 +// DSO-NEXT: 1025c: d4 d4 d4 d4 .word 0xd4d4d4d4 // DSO: <$a>: -// (0x1260 + 8) + (0 RoR 12) + 8192 + 128 = 0x32e8 -// DSO-NEXT: 1260: 00 c6 8f e2 add r12, pc, #0, #12 -// DSO-NEXT: 1264: 02 ca 8c e2 add r12, r12, #8192 -// DSO-NEXT: 1268: 80 f0 bc e5 ldr pc, [r12, #128]! +// (0x10260 + 8) + (0 RoR 12) + 8192 + 128 = 0x32e8 +// DSO-NEXT: 10260: 00 c6 8f e2 add r12, pc, #0, #12 +// DSO-NEXT: 10264: 20 ca 8c e2 add r12, r12, #32 +// DSO-NEXT: 10268: 80 f0 bc e5 ldr pc, [r12, #128]! // DSO: <$d>: -// DSO-NEXT: 126c: d4 d4 d4 d4 .word 0xd4d4d4d4 +// DSO-NEXT: 1026c: d4 d4 d4 d4 .word 0xd4d4d4d4 // DSO: <$a>: -// (0x1270 + 8) + (0 RoR 12) + 8192 + 116 = 0x32ec -// DSO-NEXT: 1270: 00 c6 8f e2 add r12, pc, #0, #12 -// DSO-NEXT: 1274: 02 ca 8c e2 add r12, r12, #8192 -// DSO-NEXT: 1278: 74 f0 bc e5 ldr pc, [r12, #116]! +// (0x10270 + 8) + (0 RoR 12) + 8192 + 116 = 0x32ec +// DSO-NEXT: 10270: 00 c6 8f e2 add r12, pc, #0, #12 +// DSO-NEXT: 10274: 20 ca 8c e2 add r12, r12, #32 +// DSO-NEXT: 10278: 74 f0 bc e5 ldr pc, [r12, #116]! // DSO: <$d>: -// DSO-NEXT: 127c: d4 d4 d4 d4 .word 0xd4d4d4d4 +// DSO-NEXT: 1027c: d4 d4 d4 d4 .word 0xd4d4d4d4 // DSOREL: Name: .got.plt // DSOREL-NEXT: Type: SHT_PROGBITS @@ -100,7 +100,7 @@ // DSOREL-NEXT: SHF_ALLOC // DSOREL-NEXT: SHF_WRITE // DSOREL-NEXT: ] -// DSOREL-NEXT: Address: 0x32D8 +// DSOREL-NEXT: Address: 0x302D8 // DSOREL-NEXT: Offset: // DSOREL-NEXT: Size: 24 // DSOREL-NEXT: Link: @@ -109,6 +109,6 @@ // DSOREL-NEXT: EntrySize: // DSOREL: Relocations [ // DSOREL-NEXT: Section (5) .rel.plt { -// DSOREL-NEXT: 0x32E4 R_ARM_JUMP_SLOT func1 0x0 -// DSOREL-NEXT: 0x32E8 R_ARM_JUMP_SLOT func2 0x0 -// DSOREL-NEXT: 0x32EC R_ARM_JUMP_SLOT func3 0x0 +// DSOREL-NEXT: 0x302E4 R_ARM_JUMP_SLOT func1 0x0 +// DSOREL-NEXT: 0x302E8 R_ARM_JUMP_SLOT func2 0x0 +// DSOREL-NEXT: 0x302EC R_ARM_JUMP_SLOT func3 0x0 diff --git a/lld/test/ELF/arm-thumb-thunk-empty-pass.s b/lld/test/ELF/arm-thumb-thunk-empty-pass.s --- a/lld/test/ELF/arm-thumb-thunk-empty-pass.s +++ b/lld/test/ELF/arm-thumb-thunk-empty-pass.s @@ -18,13 +18,13 @@ // CHECK: Disassembly of section .text: // CHECK-EMPTY: // CHECK-NEXT: <_start>: -// CHECK-NEXT: 110b4: ff f7 fe ff bl #-4 +// CHECK-NEXT: 200b4: ff f7 fe ff bl #-4 // CHECK: <__Thumbv7ABSLongThunk__start>: -// CHECK-NEXT: 110b8: ff f7 fc bf b.w #-8 <_start> +// CHECK-NEXT: 200b8: ff f7 fc bf b.w #-8 <_start> // CHECK: <__Thumbv7ABSLongThunk__start>: -// CHECK: 10110bc: 41 f2 b5 0c movw r12, #4277 -// CHECK-NEXT: 10110c0: c0 f2 01 0c movt r12, #1 -// CHECK-NEXT: 10110c4: 60 47 bx r12 +// CHECK: 10200bc: 40 f2 b5 0c movw r12, #181 +// CHECK-NEXT: 10200c0: c0 f2 02 0c movt r12, #2 +// CHECK-NEXT: 10200c4: 60 47 bx r12 // CHECK: : -// CHECK-NEXT: 10110c6: ff f7 f9 ff bl #-14 +// CHECK-NEXT: 10200c6: ff f7 f9 ff bl #-14 diff --git a/lld/test/ELF/arm-thumb-thunk-symbols.s b/lld/test/ELF/arm-thumb-thunk-symbols.s --- a/lld/test/ELF/arm-thumb-thunk-symbols.s +++ b/lld/test/ELF/arm-thumb-thunk-symbols.s @@ -25,18 +25,18 @@ b thumb_fn // CHECK: Name: __Thumbv7ABSLongThunk_arm_fn -// CHECK-NEXT: Value: 0x13005 +// CHECK-NEXT: Value: 0x22005 // CHECK-NEXT: Size: 10 // CHECK-NEXT: Binding: Local (0x0) // CHECK-NEXT: Type: Function (0x2) // CHECK: Name: __ARMv7ABSLongThunk_thumb_fn -// CHECK-NEXT: Value: 0x13010 +// CHECK-NEXT: Value: 0x22010 // CHECK-NEXT: Size: 12 // CHECK-NEXT: Binding: Local (0x0) // CHECK-NEXT: Type: Function (0x2) // CHECK-PI: Name: __ThumbV7PILongThunk_arm_fn -// CHECK-PI-NEXT: Value: 0x3005 +// CHECK-PI-NEXT: Value: 0x12005 // CHECK-PI-NEXT: Size: 12 // CHECK-PI-NEXT: Binding: Local (0x0) // CHECK-PI-NEXT: Type: Function (0x2) diff --git a/lld/test/ELF/arm-undefined-weak.s b/lld/test/ELF/arm-undefined-weak.s --- a/lld/test/ELF/arm-undefined-weak.s +++ b/lld/test/ELF/arm-undefined-weak.s @@ -32,10 +32,10 @@ // CHECK: Disassembly of section .text: // CHECK-EMPTY: -// CHECK-NEXT: 100010b4 <_start>: -// CHECK-NEXT: 100010b4: b #-4 -// CHECK-NEXT: 100010b8: bl #-4 -// CHECK-NEXT: 100010bc: bl #-4 -// CHECK-NEXT: 100010c0: movt r0, #0 -// CHECK-NEXT: 100010c4: movw r0, #0 -// CHECK: 100010c8: 00 00 00 00 .word 0x00000000 +// CHECK-NEXT: 100100b4 <_start>: +// CHECK-NEXT: 100100b4: b #-4 +// CHECK-NEXT: 100100b8: bl #-4 +// CHECK-NEXT: 100100bc: bl #-4 +// CHECK-NEXT: 100100c0: movt r0, #0 +// CHECK-NEXT: 100100c4: movw r0, #0 +// CHECK: 100100c8: 00 00 00 00 .word 0x00000000