diff --git a/llvm/lib/Target/X86/X86InterleavedAccess.cpp b/llvm/lib/Target/X86/X86InterleavedAccess.cpp --- a/llvm/lib/Target/X86/X86InterleavedAccess.cpp +++ b/llvm/lib/Target/X86/X86InterleavedAccess.cpp @@ -127,7 +127,7 @@ bool X86InterleavedAccessGroup::isSupported() const { VectorType *ShuffleVecTy = Shuffles[0]->getType(); - Type *ShuffleEltTy = ShuffleVecTy->getVectorElementType(); + Type *ShuffleEltTy = ShuffleVecTy->getElementType(); unsigned ShuffleElemSize = DL.getTypeSizeInBits(ShuffleEltTy); unsigned WideInstSize; @@ -186,7 +186,7 @@ DecomposedVectors.push_back( cast(Builder.CreateShuffleVector( Op0, Op1, - createSequentialMask(Indices[i], SubVecTy->getVectorNumElements(), + createSequentialMask(Indices[i], SubVecTy->getNumElements(), 0)))); return; } @@ -727,8 +727,8 @@ // Try to generate target-sized register(/instruction). decompose(Inst, Factor, ShuffleTy, DecomposedVectors); - Type *ShuffleEltTy = Inst->getType(); - unsigned NumSubVecElems = ShuffleEltTy->getVectorNumElements() / Factor; + auto *ShuffleEltTy = cast(Inst->getType()); + unsigned NumSubVecElems = ShuffleEltTy->getNumElements() / Factor; // Perform matrix-transposition in order to compute interleaved // results by generating some sort of (optimized) target-specific // instructions. @@ -756,8 +756,8 @@ return true; } - Type *ShuffleEltTy = ShuffleTy->getVectorElementType(); - unsigned NumSubVecElems = ShuffleTy->getVectorNumElements() / Factor; + Type *ShuffleEltTy = ShuffleTy->getElementType(); + unsigned NumSubVecElems = ShuffleTy->getNumElements() / Factor; // Lower the interleaved stores: // 1. Decompose the interleaved wide shuffle into individual shuffle @@ -825,7 +825,7 @@ assert(Factor >= 2 && Factor <= getMaxSupportedInterleaveFactor() && "Invalid interleave factor"); - assert(SVI->getType()->getVectorNumElements() % Factor == 0 && + assert(SVI->getType()->getNumElements() % Factor == 0 && "Invalid interleaved store"); // Holds the indices of SVI that correspond to the starting index of each diff --git a/llvm/lib/Target/X86/X86PartialReduction.cpp b/llvm/lib/Target/X86/X86PartialReduction.cpp --- a/llvm/lib/Target/X86/X86PartialReduction.cpp +++ b/llvm/lib/Target/X86/X86PartialReduction.cpp @@ -89,7 +89,7 @@ return false; } - unsigned ElemNum = BO.getType()->getVectorNumElements(); + unsigned ElemNum = cast(BO.getType())->getNumElements(); // Ensure the reduction size is a power of 2. if (!isPowerOf2_32(ElemNum)) return false; @@ -141,7 +141,7 @@ // ElemNumToReduce / 2 elements, and store the result in // ElemNumToReduce / 2 elements in another vector. - unsigned ResultElements = ShufInst->getType()->getVectorNumElements(); + unsigned ResultElements = ShufInst->getType()->getNumElements(); if (ResultElements < ElemNum) return false; @@ -236,8 +236,8 @@ IRBuilder<> Builder(Add); - Type *MulTy = Op->getType(); - unsigned NumElts = MulTy->getVectorNumElements(); + auto *MulTy = cast(Op->getType()); + unsigned NumElts = MulTy->getNumElements(); // Extract even elements and odd elements and add them together. This will // be pattern matched by SelectionDAG to pmaddwd. This instruction will be @@ -272,11 +272,11 @@ return false; // Need at least 8 elements. - if (BO->getType()->getVectorNumElements() < 8) + if (cast(BO->getType())->getNumElements() < 8) return false; // Element type should be i32. - if (!BO->getType()->getVectorElementType()->isIntegerTy(32)) + if (!cast(BO->getType())->getElementType()->isIntegerTy(32)) return false; bool Changed = false; @@ -305,7 +305,9 @@ // Look for zero extend from i8. auto getZeroExtendedVal = [](Value *Op) -> Value * { if (auto *ZExt = dyn_cast(Op)) - if (ZExt->getOperand(0)->getType()->getVectorElementType()->isIntegerTy(8)) + if (cast(ZExt->getOperand(0)->getType()) + ->getElementType() + ->isIntegerTy(8)) return ZExt->getOperand(0); return nullptr; @@ -319,8 +321,8 @@ IRBuilder<> Builder(Add); - Type *OpTy = Op->getType(); - unsigned NumElts = OpTy->getVectorNumElements(); + auto *OpTy = cast(Op->getType()); + unsigned NumElts = OpTy->getNumElements(); unsigned IntrinsicNumElts; Intrinsic::ID IID; @@ -371,7 +373,8 @@ assert(isPowerOf2_32(NumSplits) && "Expected power of 2 splits"); unsigned Stages = Log2_32(NumSplits); for (unsigned s = Stages; s > 0; --s) { - unsigned NumConcatElts = Ops[0]->getType()->getVectorNumElements() * 2; + unsigned NumConcatElts = + cast(Ops[0]->getType())->getNumElements() * 2; for (unsigned i = 0; i != 1U << (s - 1); ++i) { SmallVector ConcatMask(NumConcatElts); std::iota(ConcatMask.begin(), ConcatMask.end(), 0); @@ -381,13 +384,13 @@ // At this point the final value should be in Ops[0]. Now we need to adjust // it to the final original type. - NumElts = OpTy->getVectorNumElements(); + NumElts = cast(OpTy)->getNumElements(); if (NumElts == 2) { // Extract down to 2 elements. Ops[0] = Builder.CreateShuffleVector(Ops[0], Ops[0], ArrayRef{0, 1}); } else if (NumElts >= 8) { SmallVector ConcatMask(NumElts); - unsigned SubElts = Ops[0]->getType()->getVectorNumElements(); + unsigned SubElts = cast(Ops[0]->getType())->getNumElements(); for (unsigned i = 0; i != SubElts; ++i) ConcatMask[i] = i; for (unsigned i = SubElts; i != NumElts; ++i) @@ -411,7 +414,7 @@ // TODO: There's nothing special about i32, any integer type above i16 should // work just as well. - if (!BO->getType()->getVectorElementType()->isIntegerTy(32)) + if (!cast(BO->getType())->getElementType()->isIntegerTy(32)) return false; bool Changed = false; diff --git a/llvm/lib/Target/X86/X86ShuffleDecodeConstantPool.cpp b/llvm/lib/Target/X86/X86ShuffleDecodeConstantPool.cpp --- a/llvm/lib/Target/X86/X86ShuffleDecodeConstantPool.cpp +++ b/llvm/lib/Target/X86/X86ShuffleDecodeConstantPool.cpp @@ -36,17 +36,17 @@ // // <4 x i32> - Type *CstTy = C->getType(); - if (!CstTy->isVectorTy()) + auto *CstTy = dyn_cast(C->getType()); + if (!CstTy) return false; - Type *CstEltTy = CstTy->getVectorElementType(); + Type *CstEltTy = CstTy->getElementType(); if (!CstEltTy->isIntegerTy()) return false; unsigned CstSizeInBits = CstTy->getPrimitiveSizeInBits(); unsigned CstEltSizeInBits = CstTy->getScalarSizeInBits(); - unsigned NumCstElts = CstTy->getVectorNumElements(); + unsigned NumCstElts = CstTy->getNumElements(); assert((CstSizeInBits % MaskEltSizeInBits) == 0 && "Unaligned shuffle mask size"); diff --git a/llvm/lib/Target/X86/X86TargetTransformInfo.cpp b/llvm/lib/Target/X86/X86TargetTransformInfo.cpp --- a/llvm/lib/Target/X86/X86TargetTransformInfo.cpp +++ b/llvm/lib/Target/X86/X86TargetTransformInfo.cpp @@ -925,8 +925,9 @@ return BaseT::getArithmeticInstrCost(Opcode, Ty, Op1Info, Op2Info); } -int X86TTIImpl::getShuffleCost(TTI::ShuffleKind Kind, Type *Tp, int Index, +int X86TTIImpl::getShuffleCost(TTI::ShuffleKind Kind, Type *BaseTp, int Index, Type *SubTp) { + auto *Tp = cast(BaseTp); // 64-bit packed float vectors (v2f32) are widened to type v4f32. // 64-bit packed integer vectors (v2i32) are widened to type v4i32. std::pair LT = TLI->getTypeLegalizationCost(DL, Tp); @@ -958,18 +959,18 @@ // FIXME: Remove some of the alignment restrictions. // FIXME: We can use permq for 64-bit or larger extracts from 256-bit // vectors. - int OrigSubElts = SubTp->getVectorNumElements(); - if (NumSubElts > OrigSubElts && - (Index % OrigSubElts) == 0 && (NumSubElts % OrigSubElts) == 0 && + int OrigSubElts = cast(SubTp)->getNumElements(); + if (NumSubElts > OrigSubElts && (Index % OrigSubElts) == 0 && + (NumSubElts % OrigSubElts) == 0 && LT.second.getVectorElementType() == - SubLT.second.getVectorElementType() && + SubLT.second.getVectorElementType() && LT.second.getVectorElementType().getSizeInBits() == - Tp->getVectorElementType()->getPrimitiveSizeInBits()) { + Tp->getElementType()->getPrimitiveSizeInBits()) { assert(NumElts >= NumSubElts && NumElts > OrigSubElts && "Unexpected number of elements!"); - Type *VecTy = VectorType::get(Tp->getVectorElementType(), + Type *VecTy = VectorType::get(Tp->getElementType(), LT.second.getVectorNumElements()); - Type *SubTy = VectorType::get(Tp->getVectorElementType(), + Type *SubTy = VectorType::get(Tp->getElementType(), SubLT.second.getVectorNumElements()); int ExtractIndex = alignDown((Index % NumElts), NumSubElts); int ExtractCost = getShuffleCost(TTI::SK_ExtractSubvector, VecTy, @@ -1031,8 +1032,8 @@ MVT LegalVT = LT.second; if (LegalVT.isVector() && LegalVT.getVectorElementType().getSizeInBits() == - Tp->getVectorElementType()->getPrimitiveSizeInBits() && - LegalVT.getVectorNumElements() < Tp->getVectorNumElements()) { + Tp->getElementType()->getPrimitiveSizeInBits() && + LegalVT.getVectorNumElements() < Tp->getNumElements()) { unsigned VecTySize = DL.getTypeStoreSize(Tp); unsigned LegalVTSize = LegalVT.getStoreSize(); @@ -1041,8 +1042,8 @@ // Number of destination vectors after legalization: unsigned NumOfDests = LT.first; - Type *SingleOpTy = VectorType::get(Tp->getVectorElementType(), - LegalVT.getVectorNumElements()); + Type *SingleOpTy = + VectorType::get(Tp->getElementType(), LegalVT.getVectorNumElements()); unsigned NumOfShuffles = (NumOfSrcs - 1) * NumOfDests; return NumOfShuffles * @@ -2675,7 +2676,7 @@ const Instruction *I) { // Handle non-power-of-two vectors such as <3 x float> if (VectorType *VTy = dyn_cast(Src)) { - unsigned NumElem = VTy->getVectorNumElements(); + unsigned NumElem = VTy->getNumElements(); // Handle a few common cases: // <3 x float> @@ -2725,7 +2726,7 @@ // To calculate scalar take the regular cost, without mask return getMemoryOpCost(Opcode, SrcTy, MaybeAlign(Alignment), AddressSpace); - unsigned NumElem = SrcVTy->getVectorNumElements(); + unsigned NumElem = SrcVTy->getNumElements(); VectorType *MaskTy = VectorType::get(Type::getInt8Ty(SrcVTy->getContext()), NumElem); if ((IsLoad && !isLegalMaskedLoad(SrcVTy, MaybeAlign(Alignment))) || @@ -2756,7 +2757,7 @@ getShuffleCost(TTI::SK_PermuteTwoSrc, MaskTy, 0, nullptr); else if (LT.second.getVectorNumElements() > NumElem) { - VectorType *NewMaskTy = VectorType::get(MaskTy->getVectorElementType(), + VectorType *NewMaskTy = VectorType::get(MaskTy->getElementType(), LT.second.getVectorNumElements()); // Expanding requires fill mask with zeroes Cost += getShuffleCost(TTI::SK_InsertSubvector, NewMaskTy, 0, MaskTy); @@ -2861,12 +2862,14 @@ MVT MTy = LT.second; + auto *ValVTy = cast(ValTy); + unsigned ArithmeticCost = 0; if (LT.first != 1 && MTy.isVector() && - MTy.getVectorNumElements() < ValTy->getVectorNumElements()) { + MTy.getVectorNumElements() < ValVTy->getNumElements()) { // Type needs to be split. We need LT.first - 1 arithmetic ops. - Type *SingleOpTy = VectorType::get(ValTy->getVectorElementType(), - MTy.getVectorNumElements()); + Type *SingleOpTy = + VectorType::get(ValVTy->getElementType(), MTy.getVectorNumElements()); ArithmeticCost = getArithmeticInstrCost(Opcode, SingleOpTy); ArithmeticCost *= LT.first - 1; } @@ -2930,13 +2933,13 @@ }; // Handle bool allof/anyof patterns. - if (ValTy->getVectorElementType()->isIntegerTy(1)) { + if (ValVTy->getElementType()->isIntegerTy(1)) { unsigned ArithmeticCost = 0; if (LT.first != 1 && MTy.isVector() && - MTy.getVectorNumElements() < ValTy->getVectorNumElements()) { + MTy.getVectorNumElements() < ValVTy->getNumElements()) { // Type needs to be split. We need LT.first - 1 arithmetic ops. - Type *SingleOpTy = VectorType::get(ValTy->getVectorElementType(), - MTy.getVectorNumElements()); + Type *SingleOpTy = + VectorType::get(ValVTy->getElementType(), MTy.getVectorNumElements()); ArithmeticCost = getArithmeticInstrCost(Opcode, SingleOpTy); ArithmeticCost *= LT.first - 1; } @@ -2954,25 +2957,24 @@ if (const auto *Entry = CostTableLookup(SSE2BoolReduction, ISD, MTy)) return ArithmeticCost + Entry->Cost; - return BaseT::getArithmeticReductionCost(Opcode, ValTy, IsPairwise); + return BaseT::getArithmeticReductionCost(Opcode, ValVTy, IsPairwise); } - unsigned NumVecElts = ValTy->getVectorNumElements(); - unsigned ScalarSize = ValTy->getScalarSizeInBits(); + unsigned NumVecElts = ValVTy->getNumElements(); + unsigned ScalarSize = ValVTy->getScalarSizeInBits(); // Special case power of 2 reductions where the scalar type isn't changed // by type legalization. if (!isPowerOf2_32(NumVecElts) || ScalarSize != MTy.getScalarSizeInBits()) - return BaseT::getArithmeticReductionCost(Opcode, ValTy, IsPairwise); + return BaseT::getArithmeticReductionCost(Opcode, ValVTy, IsPairwise); unsigned ReductionCost = 0; - Type *Ty = ValTy; + auto *Ty = ValVTy; if (LT.first != 1 && MTy.isVector() && - MTy.getVectorNumElements() < ValTy->getVectorNumElements()) { + MTy.getVectorNumElements() < ValVTy->getNumElements()) { // Type needs to be split. We need LT.first - 1 arithmetic ops. - Ty = VectorType::get(ValTy->getVectorElementType(), - MTy.getVectorNumElements()); + Ty = VectorType::get(ValVTy->getElementType(), MTy.getVectorNumElements()); ReductionCost = getArithmeticInstrCost(Opcode, Ty); ReductionCost *= LT.first - 1; NumVecElts = MTy.getVectorNumElements(); @@ -2986,32 +2988,32 @@ NumVecElts /= 2; // If we're reducing from 256/512 bits, use an extract_subvector. if (Size > 128) { - Type *SubTy = VectorType::get(ValTy->getVectorElementType(), NumVecElts); + auto *SubTy = VectorType::get(ValVTy->getElementType(), NumVecElts); ReductionCost += getShuffleCost(TTI::SK_ExtractSubvector, Ty, NumVecElts, SubTy); Ty = SubTy; } else if (Size == 128) { // Reducing from 128 bits is a permute of v2f64/v2i64. - Type *ShufTy; - if (ValTy->isFloatingPointTy()) - ShufTy = VectorType::get(Type::getDoubleTy(ValTy->getContext()), 2); + VectorType *ShufTy; + if (ValVTy->isFloatingPointTy()) + ShufTy = VectorType::get(Type::getDoubleTy(ValVTy->getContext()), 2); else - ShufTy = VectorType::get(Type::getInt64Ty(ValTy->getContext()), 2); + ShufTy = VectorType::get(Type::getInt64Ty(ValVTy->getContext()), 2); ReductionCost += getShuffleCost(TTI::SK_PermuteSingleSrc, ShufTy, 0, nullptr); } else if (Size == 64) { // Reducing from 64 bits is a shuffle of v4f32/v4i32. - Type *ShufTy; - if (ValTy->isFloatingPointTy()) - ShufTy = VectorType::get(Type::getFloatTy(ValTy->getContext()), 4); + VectorType *ShufTy; + if (ValVTy->isFloatingPointTy()) + ShufTy = VectorType::get(Type::getFloatTy(ValVTy->getContext()), 4); else - ShufTy = VectorType::get(Type::getInt32Ty(ValTy->getContext()), 4); + ShufTy = VectorType::get(Type::getInt32Ty(ValVTy->getContext()), 4); ReductionCost += getShuffleCost(TTI::SK_PermuteSingleSrc, ShufTy, 0, nullptr); } else { // Reducing from smaller size is a shift by immediate. - Type *ShiftTy = VectorType::get( - Type::getIntNTy(ValTy->getContext(), Size), 128 / Size); + auto *ShiftTy = VectorType::get( + Type::getIntNTy(ValVTy->getContext(), Size), 128 / Size); ReductionCost += getArithmeticInstrCost( Instruction::LShr, ShiftTy, TargetTransformInfo::OK_AnyValue, TargetTransformInfo::OK_UniformConstantValue, @@ -3230,17 +3232,17 @@ return Entry->Cost; } - unsigned NumVecElts = ValTy->getVectorNumElements(); + auto *ValVTy = cast(ValTy); + unsigned NumVecElts = ValVTy->getNumElements(); - Type *Ty = ValTy; + auto *Ty = ValVTy; unsigned MinMaxCost = 0; if (LT.first != 1 && MTy.isVector() && - MTy.getVectorNumElements() < ValTy->getVectorNumElements()) { + MTy.getVectorNumElements() < ValVTy->getNumElements()) { // Type needs to be split. We need LT.first - 1 operations ops. - Ty = VectorType::get(ValTy->getVectorElementType(), - MTy.getVectorNumElements()); - Type *SubCondTy = VectorType::get(CondTy->getVectorElementType(), - MTy.getVectorNumElements()); + Ty = VectorType::get(ValVTy->getElementType(), MTy.getVectorNumElements()); + Type *SubCondTy = VectorType::get( + cast(CondTy)->getElementType(), MTy.getVectorNumElements()); MinMaxCost = getMinMaxCost(Ty, SubCondTy, IsUnsigned); MinMaxCost *= LT.first - 1; NumVecElts = MTy.getVectorNumElements(); @@ -3266,7 +3268,7 @@ // Special case power of 2 reductions where the scalar type isn't changed // by type legalization. - if (!isPowerOf2_32(ValTy->getVectorNumElements()) || + if (!isPowerOf2_32(ValVTy->getNumElements()) || ScalarSize != MTy.getScalarSizeInBits()) return BaseT::getMinMaxReductionCost(ValTy, CondTy, IsPairwise, IsUnsigned); @@ -3278,7 +3280,7 @@ NumVecElts /= 2; // If we're reducing from 256/512 bits, use an extract_subvector. if (Size > 128) { - Type *SubTy = VectorType::get(ValTy->getVectorElementType(), NumVecElts); + auto *SubTy = VectorType::get(ValVTy->getElementType(), NumVecElts); MinMaxCost += getShuffleCost(TTI::SK_ExtractSubvector, Ty, NumVecElts, SubTy); Ty = SubTy; @@ -3311,8 +3313,8 @@ } // Add the arithmetic op for this level. - Type *SubCondTy = VectorType::get(CondTy->getVectorElementType(), - Ty->getVectorNumElements()); + auto *SubCondTy = VectorType::get( + cast(CondTy)->getElementType(), Ty->getNumElements()); MinMaxCost += getMinMaxCost(Ty, SubCondTy, IsUnsigned); } @@ -3519,7 +3521,7 @@ unsigned Alignment, unsigned AddressSpace) { assert(isa(SrcVTy) && "Unexpected type in getGSVectorCost"); - unsigned VF = SrcVTy->getVectorNumElements(); + unsigned VF = cast(SrcVTy)->getNumElements(); // Try to reduce index size from 64 bit (default for GEP) // to 32. It is essential for VF 16. If the index can't be reduced to 32, the @@ -3540,8 +3542,8 @@ if (isa(GEP->getOperand(i))) continue; Type *IndxTy = GEP->getOperand(i)->getType(); - if (IndxTy->isVectorTy()) - IndxTy = IndxTy->getVectorElementType(); + if (auto *IndexVTy = dyn_cast(IndxTy)) + IndxTy = IndexVTy->getElementType(); if ((IndxTy->getPrimitiveSizeInBits() == 64 && !isa(GEP->getOperand(i))) || ++NumOfVarIndices > 1) @@ -3589,7 +3591,7 @@ int X86TTIImpl::getGSScalarCost(unsigned Opcode, Type *SrcVTy, bool VariableMask, unsigned Alignment, unsigned AddressSpace) { - unsigned VF = SrcVTy->getVectorNumElements(); + unsigned VF = cast(SrcVTy)->getNumElements(); int MaskUnpackCost = 0; if (VariableMask) { @@ -3628,10 +3630,11 @@ unsigned Alignment, const Instruction *I = nullptr) { assert(SrcVTy->isVectorTy() && "Unexpected data type for Gather/Scatter"); - unsigned VF = SrcVTy->getVectorNumElements(); + unsigned VF = cast(SrcVTy)->getNumElements(); PointerType *PtrTy = dyn_cast(Ptr->getType()); if (!PtrTy && Ptr->getType()->isVectorTy()) - PtrTy = dyn_cast(Ptr->getType()->getVectorElementType()); + PtrTy = dyn_cast( + cast(Ptr->getType())->getElementType()); assert(PtrTy && "Unexpected type for Ptr argument"); unsigned AddressSpace = PtrTy->getAddressSpace(); @@ -3677,7 +3680,8 @@ return false; // The backend can't handle a single element vector. - if (isa(DataTy) && DataTy->getVectorNumElements() == 1) + if (isa(DataTy) && + cast(DataTy)->getNumElements() == 1) return false; Type *ScalarTy = DataTy->getScalarType(); @@ -3742,10 +3746,10 @@ return false; // The backend can't handle a single element vector. - if (DataTy->getVectorNumElements() == 1) + if (cast(DataTy)->getNumElements() == 1) return false; - Type *ScalarTy = DataTy->getVectorElementType(); + Type *ScalarTy = cast(DataTy)->getElementType(); if (ScalarTy->isFloatTy() || ScalarTy->isDoubleTy()) return true; @@ -3781,8 +3785,8 @@ // In this case we can reject non-power-of-2 vectors. // We also reject single element vectors as the type legalizer can't // scalarize it. - if (isa(DataTy)) { - unsigned NumElts = DataTy->getVectorNumElements(); + if (auto *DataVTy = dyn_cast(DataTy)) { + unsigned NumElts = DataVTy->getNumElements(); if (NumElts == 1 || !isPowerOf2_32(NumElts)) return false; } @@ -3921,8 +3925,8 @@ return BaseT::getInterleavedMemoryOpCost(Opcode, VecTy, Factor, Indices, Alignment, AddressSpace); - unsigned VF = VecTy->getVectorNumElements() / Factor; - Type *ScalarTy = VecTy->getVectorElementType(); + unsigned VF = cast(VecTy)->getNumElements() / Factor; + Type *ScalarTy = cast(VecTy)->getElementType(); // Calculate the number of memory operations (NumOfMemOps), required // for load/store the VecTy. @@ -3931,8 +3935,9 @@ unsigned NumOfMemOps = (VecTySize + LegalVTSize - 1) / LegalVTSize; // Get the cost of one memory operation. - Type *SingleMemOpTy = VectorType::get(VecTy->getVectorElementType(), - LegalVT.getVectorNumElements()); + Type *SingleMemOpTy = + VectorType::get(cast(VecTy)->getElementType(), + LegalVT.getVectorNumElements()); unsigned MemOpCost = getMemoryOpCost(Opcode, SingleMemOpTy, MaybeAlign(Alignment), AddressSpace); @@ -4031,12 +4036,13 @@ unsigned NumOfMemOps = (VecTySize + LegalVTSize - 1) / LegalVTSize; // Get the cost of one memory operation. - Type *SingleMemOpTy = VectorType::get(VecTy->getVectorElementType(), - LegalVT.getVectorNumElements()); + Type *SingleMemOpTy = + VectorType::get(cast(VecTy)->getElementType(), + LegalVT.getVectorNumElements()); unsigned MemOpCost = getMemoryOpCost(Opcode, SingleMemOpTy, MaybeAlign(Alignment), AddressSpace); - unsigned VF = VecTy->getVectorNumElements() / Factor; + unsigned VF = cast(VecTy)->getNumElements() / Factor; MVT VT = MVT::getVectorVT(MVT::getVT(VecTy->getScalarType()), VF); if (Opcode == Instruction::Load) { @@ -4068,8 +4074,9 @@ unsigned NumOfLoadsInInterleaveGrp = Indices.size() ? Indices.size() : Factor; - Type *ResultTy = VectorType::get(VecTy->getVectorElementType(), - VecTy->getVectorNumElements() / Factor); + Type *ResultTy = + VectorType::get(cast(VecTy)->getElementType(), + cast(VecTy)->getNumElements() / Factor); unsigned NumOfResults = getTLI()->getTypeLegalizationCost(DL, ResultTy).first * NumOfLoadsInInterleaveGrp; @@ -4139,7 +4146,7 @@ bool UseMaskForCond, bool UseMaskForGaps) { auto isSupportedOnAVX512 = [](Type *VecTy, bool HasBW) { - Type *EltTy = VecTy->getVectorElementType(); + Type *EltTy = cast(VecTy)->getElementType(); if (EltTy->isFloatTy() || EltTy->isDoubleTy() || EltTy->isIntegerTy(64) || EltTy->isIntegerTy(32) || EltTy->isPointerTy()) return true;