diff --git a/llvm/lib/Target/PowerPC/PPCCallingConv.td b/llvm/lib/Target/PowerPC/PPCCallingConv.td --- a/llvm/lib/Target/PowerPC/PPCCallingConv.td +++ b/llvm/lib/Target/PowerPC/PPCCallingConv.td @@ -283,15 +283,6 @@ def CSR_Altivec : CalleeSavedRegs<(add V20, V21, V22, V23, V24, V25, V26, V27, V28, V29, V30, V31)>; -def CSR_Darwin32 : CalleeSavedRegs<(add R13, R14, R15, R16, R17, R18, R19, R20, - R21, R22, R23, R24, R25, R26, R27, R28, - R29, R30, R31, F14, F15, F16, F17, F18, - F19, F20, F21, F22, F23, F24, F25, F26, - F27, F28, F29, F30, F31, CR2, CR3, CR4 - )>; - -def CSR_Darwin32_Altivec : CalleeSavedRegs<(add CSR_Darwin32, CSR_Altivec)>; - // SPE does not use FPRs, so break out the common register set as base. def CSR_SVR432_COMM : CalleeSavedRegs<(add R14, R15, R16, R17, R18, R19, R20, R21, R22, R23, R24, R25, R26, R27, @@ -316,15 +307,6 @@ F27, F28, F29, F30, F31, CR2, CR3, CR4 )>; -def CSR_Darwin64 : CalleeSavedRegs<(add X13, X14, X15, X16, X17, X18, X19, X20, - X21, X22, X23, X24, X25, X26, X27, X28, - X29, X30, X31, F14, F15, F16, F17, F18, - F19, F20, F21, F22, F23, F24, F25, F26, - F27, F28, F29, F30, F31, CR2, CR3, CR4 - )>; - -def CSR_Darwin64_Altivec : CalleeSavedRegs<(add CSR_Darwin64, CSR_Altivec)>; - def CSR_SVR464 : CalleeSavedRegs<(add X14, X15, X16, X17, X18, X19, X20, X21, X22, X23, X24, X25, X26, X27, X28, X29, X30, X31, F14, F15, F16, F17, F18, @@ -332,13 +314,6 @@ F27, F28, F29, F30, F31, CR2, CR3, CR4 )>; -def CSR_AIX64 : CalleeSavedRegs<(add X14, X15, X16, X17, X18, X19, X20, - X21, X22, X23, X24, X25, X26, X27, X28, - X29, X30, X31, F14, F15, F16, F17, F18, - F19, F20, F21, F22, F23, F24, F25, F26, - F27, F28, F29, F30, F31, CR2, CR3, CR4 - )>; - // CSRs that are handled by prologue, epilogue. def CSR_SRV464_TLS_PE : CalleeSavedRegs<(add)>; diff --git a/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp b/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp --- a/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp +++ b/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp @@ -224,7 +224,7 @@ if (Subtarget.isAIXABI()) { assert(!Subtarget.hasAltivec() && "Altivec is not implemented on AIX yet."); - return TM.isPPC64() ? CSR_AIX64_RegMask : CSR_AIX32_RegMask; + return TM.isPPC64() ? CSR_SVR464_RegMask : CSR_AIX32_RegMask; } if (CC == CallingConv::Cold) { diff --git a/llvm/test/CodeGen/PowerPC/aix-cc-abi.ll b/llvm/test/CodeGen/PowerPC/aix-cc-abi.ll --- a/llvm/test/CodeGen/PowerPC/aix-cc-abi.ll +++ b/llvm/test/CodeGen/PowerPC/aix-cc-abi.ll @@ -33,7 +33,7 @@ ; 64BIT: $x4 = LI8 97 ; 64BIT: $x5 = LI8 97 ; 64BIT: $x6 = LI8 97 -; 64BIT: BL8_NOP , csr_aix64, implicit-def dead $lr8, implicit $rm, implicit killed $x3, implicit killed $x4, implicit killed $x5, implicit killed $x6, implicit $x2, implicit-def $r1 +; 64BIT: BL8_NOP , csr_svr464, implicit-def dead $lr8, implicit $rm, implicit killed $x3, implicit killed $x4, implicit killed $x5, implicit killed $x6, implicit $x2, implicit-def $r1 ; 64BIT: ADJCALLSTACKUP 112, 0, implicit-def dead $r1, implicit $r1 define signext i8 @test_chars(i8 signext %c1, i8 signext %c2, i8 signext %c3, i8 signext %c4) { @@ -90,7 +90,7 @@ ; 64BIT: $x4 = LI8 225 ; 64BIT: $x5 = LI8 97 ; 64BIT: $x6 = LI8 -31 -; 64BIT: BL8_NOP , csr_aix64, implicit-def dead $lr8, implicit $rm, implicit killed $x3, implicit killed $x4, implicit killed $x5, implicit killed $x6, implicit $x2, implicit-def $r1 +; 64BIT: BL8_NOP , csr_svr464, implicit-def dead $lr8, implicit $rm, implicit killed $x3, implicit killed $x4, implicit killed $x5, implicit killed $x6, implicit $x2, implicit-def $r1 ; 64BIT: ADJCALLSTACKUP 112, 0, implicit-def dead $r1, implicit $r1 define signext i8 @test_chars_mix(i8 signext %c1, i8 zeroext %c2, i8 zeroext %c3, i8 signext %c4) { @@ -165,7 +165,7 @@ ; 64BIT: ADJCALLSTACKDOWN 112, 0, implicit-def dead $r1, implicit $r1 ; 64BIT: $x3 = LI8 1 -; 64BIT: BL8_NOP , csr_aix64, implicit-def dead $lr8, implicit $rm, implicit killed $x3, implicit $x2, implicit-def $r1 +; 64BIT: BL8_NOP , csr_svr464, implicit-def dead $lr8, implicit $rm, implicit killed $x3, implicit $x2, implicit-def $r1 ; 64BIT: ADJCALLSTACKUP 112, 0, implicit-def dead $r1, implicit $r1 define void @test_i1zext(i1 zeroext %b) { @@ -249,7 +249,7 @@ ; 64BIT: $x8 = LI8 1 ; 64BIT: $x9 = LI8 1 ; 64BIT: $x10 = LI8 1 -; 64BIT: BL8_NOP , csr_aix64, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit killed $x4, implicit $x5, implicit killed $x6, implicit killed $x7, implicit killed $x8, implicit killed $x9, implicit killed $x10, implicit $x2, implicit-def $r1, implicit-def dead $x3 +; 64BIT: BL8_NOP , csr_svr464, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit killed $x4, implicit $x5, implicit killed $x6, implicit killed $x7, implicit killed $x8, implicit killed $x9, implicit killed $x10, implicit $x2, implicit-def $r1, implicit-def dead $x3 ; 64BIT: ADJCALLSTACKUP 112, 0, implicit-def dead $r1, implicit $r1 define void @call_test_i64() { @@ -277,7 +277,7 @@ ; 64BIT: $x4 = LI8 2 ; 64BIT: $x5 = LI8 3 ; 64BIT: $x6 = LI8 4 -; 64BIT: BL8_NOP , csr_aix64, implicit-def dead $lr8, implicit $rm, implicit killed $x3, implicit killed $x4, implicit killed $x5, implicit killed $x6, implicit $x2, implicit-def $r1 +; 64BIT: BL8_NOP , csr_svr464, implicit-def dead $lr8, implicit $rm, implicit killed $x3, implicit killed $x4, implicit killed $x5, implicit killed $x6, implicit $x2, implicit-def $r1 ; 64BIT: ADJCALLSTACKUP 112, 0, implicit-def dead $r1, implicit $r1 define i64 @test_i64(i64 %a, i64 %b, i64 %c, i64 %d) { @@ -329,7 +329,7 @@ ; 64BIT: ADJCALLSTACKDOWN 112, 0, implicit-def dead $r1, implicit $r1 ; 64BIT: renamable $x3 = ADDI8 %stack.0.b, 0 -; 64BIT: BL8_NOP , csr_aix64, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit $x2, implicit-def $r1 +; 64BIT: BL8_NOP , csr_svr464, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit $x2, implicit-def $r1 ; 64BIT: ADJCALLSTACKUP 112, 0, implicit-def dead $r1, implicit $r1 define void @test_int_ptr(i32* %a) { @@ -390,7 +390,7 @@ ; 64BIT-NEXT: bb.0.entry: ; 64BIT-NEXT: liveins: $x3 ; 64BIT: ADJCALLSTACKDOWN 112, 0, implicit-def dead $r1, implicit $r1 -; 64BIT: BL8_NOP , csr_aix64, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit $x2, implicit-def $r1, implicit-def $x3 +; 64BIT: BL8_NOP , csr_svr464, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit $x2, implicit-def $r1, implicit-def $x3 ; 64BIT: ADJCALLSTACKUP 112, 0, implicit-def dead $r1, implicit $r1 @f1 = global float 0.000000e+00, align 4 @@ -418,7 +418,7 @@ ; 64BIT-NEXT: ADJCALLSTACKDOWN 112, 0, implicit-def dead $r1, implicit $r1 ; 64BIT-NEXT: $f2 = COPY renamable $f1 ; 64BIT-NEXT: $f3 = COPY renamable $f1 -; 64BIT-NEXT: BL8_NOP , csr_aix64, implicit-def dead $lr8, implicit $rm, implicit $f1, implicit killed $f2, implicit killed $f3, implicit $x2, implicit-def $r1 +; 64BIT-NEXT: BL8_NOP , csr_svr464, implicit-def dead $lr8, implicit $rm, implicit $f1, implicit killed $f2, implicit killed $f3, implicit $x2, implicit-def $r1 ; 64BIT-NEXT: ADJCALLSTACKUP 112, 0, implicit-def dead $r1, implicit $r1 define float @test_floats(float %f1, float %f2, float %f3) { @@ -524,7 +524,7 @@ ; 64BIT-DAG: $f11 = COPY renamable $f1 ; 64BIT-DAG: $f12 = COPY renamable $f1 ; 64BIT-DAG: $f13 = COPY renamable $f1 -; 64BIT-NEXT: BL8_NOP , csr_aix64, implicit-def dead $lr8, implicit $rm, implicit $f1, implicit killed $f2, implicit killed $f3, implicit killed $f4, implicit killed $f5, implicit killed $f6, implicit killed $f7, implicit killed $f8, implicit killed $f9, implicit killed $f10, implicit killed $f11, implicit killed $f12, implicit killed $f13, implicit $x2, implicit-def $r1 +; 64BIT-NEXT: BL8_NOP , csr_svr464, implicit-def dead $lr8, implicit $rm, implicit $f1, implicit killed $f2, implicit killed $f3, implicit killed $f4, implicit killed $f5, implicit killed $f6, implicit killed $f7, implicit killed $f8, implicit killed $f9, implicit killed $f10, implicit killed $f11, implicit killed $f12, implicit killed $f13, implicit $x2, implicit-def $r1 ; 64BIT-NEXT: ADJCALLSTACKUP 152, 0, implicit-def dead $r1, implicit $r1 ; ASM64PWR4: stdu 1, -160(1) @@ -615,7 +615,7 @@ ; 64BIT-NEXT: ADJCALLSTACKDOWN 112, 0, implicit-def dead $r1, implicit $r1 ; 64BIT-NEXT: $x4 = LI8 1 ; 64BIT-NEXT: $x6 = LI8 97 -; 64BIT-NEXT: BL8_NOP , csr_aix64, implicit-def dead $lr8, implicit $rm, implicit $f1, implicit $x4, implicit $f2, implicit killed $x6, implicit $x2, implicit-def $r1 +; 64BIT-NEXT: BL8_NOP , csr_svr464, implicit-def dead $lr8, implicit $rm, implicit $f1, implicit $x4, implicit $f2, implicit killed $x6, implicit $x2, implicit-def $r1 ; 64BIT-NEXT: ADJCALLSTACKUP 112, 0, implicit-def dead $r1, implicit $r1 define i32 @test_mix(float %f, i32 signext %i, double %d, i8 signext %c) { @@ -742,7 +742,7 @@ ; 64BIT-NEXT: renamable $x5 = LD 0, %stack.[[SLOT2]] :: (load 8 from %stack.[[SLOT2]]) ; 64BIT-NEXT: ADJCALLSTACKDOWN 112, 0, implicit-def dead $r1, implicit $r1 ; 64BIT-NEXT: $x3 = LI8 42 -; 64BIT-NEXT: BL8_NOP , csr_aix64, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit $f1, implicit $x4, implicit $f2, implicit $x5, implicit $x2, implicit-def $r1 +; 64BIT-NEXT: BL8_NOP , csr_svr464, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit $f1, implicit $x4, implicit $f2, implicit $x5, implicit $x2, implicit-def $r1 ; 64BIT-NEXT: ADJCALLSTACKUP 112, 0, implicit-def dead $r1, implicit $r1 ; ASM64PWR4: stdu 1, -128(1) @@ -812,7 +812,7 @@ ; 64BIT-NEXT: ADJCALLSTACKDOWN 112, 0, implicit-def dead $r1, implicit $r1 ; 64BIT-NEXT: $x3 = LI8 42 ; 64BIT-NEXT: $x5 = LI8 42 -; 64BIT-NEXT: BL8_NOP , csr_aix64, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit $f1, implicit $x4, implicit killed $x5, implicit $f2, implicit $x6, implicit $x2, implicit-def $r1 +; 64BIT-NEXT: BL8_NOP , csr_svr464, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit $f1, implicit $x4, implicit killed $x5, implicit $f2, implicit $x6, implicit $x2, implicit-def $r1 ; 64BIT-NEXT: ADJCALLSTACKUP 112, 0, implicit-def dead $r1, implicit $r1 ; ASM64PWR4: stdu 1, -128(1) @@ -885,7 +885,7 @@ ; 64BIT-NEXT: ADJCALLSTACKDOWN 112, 0, implicit-def dead $r1, implicit $r1 ; 64BIT-NEXT: $x3 = LI8 42 ; 64BIT-NEXT: $x5 = LI8 42 -; 64BIT-NEXT: BL8_NOP , csr_aix64, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit $f1, implicit $x4, implicit killed $x5, implicit $f2, implicit $x6, implicit $x2, implicit-def $r1 +; 64BIT-NEXT: BL8_NOP , csr_svr464, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit $f1, implicit $x4, implicit killed $x5, implicit $f2, implicit $x6, implicit $x2, implicit-def $r1 ; 64BIT-NEXT: ADJCALLSTACKUP 112, 0, implicit-def dead $r1, implicit $r1 ; ASM64PWR4: stdu 1, -128(1) @@ -935,7 +935,7 @@ ; 64BIT-NEXT: renamable $x4 = LWZ8 0, %stack.[[SLOT]] :: (load 4 from %stack.[[SLOT]]) ; 64BIT-NEXT: ADJCALLSTACKDOWN 112, 0, implicit-def dead $r1, implicit $r1 ; 64BIT-NEXT: $x3 = LI8 42 -; 64BIT-NEXT: BL8_NOP , csr_aix64, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit $f1, implicit $x4, implicit $x2, implicit-def $r1 +; 64BIT-NEXT: BL8_NOP , csr_svr464, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit $f1, implicit $x4, implicit $x2, implicit-def $r1 ; 64BIT-NEXT: ADJCALLSTACKUP 112, 0, implicit-def dead $r1, implicit $r1 ; ASM64PWR4: stdu 1, -128(1) @@ -1051,7 +1051,7 @@ ; 64BIT-DAG: renamable $x[[REGLLI:[0-9]+]] = LD 0, killed renamable $x[[REGLLIADDR]] :: (dereferenceable load 8 from @lli) ; 64BIT-DAG: STD killed renamable $x[[REGLLI]], 136, $x1 :: (store 8) ; 64BIT-DAG: STD renamable $x[[REGI]], 144, $x1 :: (store 8) -; 64BIT-NEXT: BL8_NOP , csr_aix64, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit $x4, implicit $x5, implicit $x6, implicit $x7, implicit $x8, implicit $x9, implicit $x10, implicit $x2, implicit-def $r1 +; 64BIT-NEXT: BL8_NOP , csr_svr464, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit $x4, implicit $x5, implicit $x6, implicit $x7, implicit $x8, implicit $x9, implicit $x10, implicit $x2, implicit-def $r1 ; 64BIT-NEXT: ADJCALLSTACKUP 152, 0, implicit-def dead $r1, implicit $r1 ; The DAG block permits some invalid inputs for the benefit of allowing more valid orderings. @@ -1151,7 +1151,7 @@ ; 64BIT-DAG: renamable $f2 = LFD 0, killed renamable $x[[REGD]] :: (dereferenceable load 8 from @d) ; 64BIT-DAG: STFS renamable $f1, 112, $x1 :: (store 4) ; 64BIT-DAG: STFD renamable $f2, 120, $x1 :: (store 8) -; 64BIT-NEXT: BL8_NOP , csr_aix64, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit $x4, implicit killed $x5, implicit killed $x6, implicit killed $x7, implicit killed $x8, implicit killed $x9, implicit killed $x10, implicit $f1, implicit $f2, implicit $x2, implicit-def $r1 +; 64BIT-NEXT: BL8_NOP , csr_svr464, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit $x4, implicit killed $x5, implicit killed $x6, implicit killed $x7, implicit killed $x8, implicit killed $x9, implicit killed $x10, implicit $f1, implicit $f2, implicit $x2, implicit-def $r1 ; 64BIT-NEXT: ADJCALLSTACKUP 128, 0, implicit-def dead $r1, implicit $r1 ; The DAG block permits some invalid inputs for the benefit of allowing more valid orderings. @@ -1232,7 +1232,7 @@ ; 64BIT-DAG: renamable $f1 = LFD 0, killed renamable $x[[REG]] :: (dereferenceable load 8 from @d) ; 64BIT-DAG: STFD renamable $f1, 0, %stack.0 :: (store 8 into %stack.0) ; 64BIT-DAG: renamable $x9 = LD 0, %stack.0 :: (load 8 from %stack.0) -; 64BIT-NEXT: BL8_NOP , csr_aix64, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit killed $x4, implicit killed $x5, implicit killed $x6, implicit killed $x7, implicit killed $x8, implicit $f1, implicit $x9, implicit $x2, implicit-def $r1 +; 64BIT-NEXT: BL8_NOP , csr_svr464, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit killed $x4, implicit killed $x5, implicit killed $x6, implicit killed $x7, implicit killed $x8, implicit $f1, implicit $x9, implicit $x2, implicit-def $r1 ; 64BIT-NEXT: ADJCALLSTACKUP 112, 0, implicit-def dead $r1, implicit $r1 ; The DAG block permits some invalid inputs for the benefit of allowing more valid orderings. @@ -1325,7 +1325,7 @@ ; 64BIT-DAG: STFS renamable $f2, 112, $x1 :: (store 4) ; 64BIT-DAG: STFD renamable $f1, 0, %stack.0 :: (store 8 into %stack.0) ; 64BIT-DAG: renamable $x10 = LD 0, %stack.0 :: (load 8 from %stack.0) -; 64BIT-NEXT: BL8_NOP , csr_aix64, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit killed $x4, implicit killed $x5, implicit killed $x6, implicit killed $x7, implicit killed $x8, implicit killed $x9, implicit $f1, implicit $x10, implicit $f2, implicit $x2, implicit-def $r1 +; 64BIT-NEXT: BL8_NOP , csr_svr464, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit killed $x4, implicit killed $x5, implicit killed $x6, implicit killed $x7, implicit killed $x8, implicit killed $x9, implicit $f1, implicit $x10, implicit $f2, implicit $x2, implicit-def $r1 ; 64BIT-NEXT: ADJCALLSTACKUP 120, 0, implicit-def dead $r1, implicit $r1 @@ -1547,7 +1547,7 @@ ; 64BIT-DAG: renamable $x[[REGI:[0-9]+]] = LWZ8 0, killed renamable $x[[REGIADDR]] :: (dereferenceable load 4 from @i1) ; 64BIT-DAG: STD killed renamable $x[[REGI]], 168, $x1 :: (store 8) ; 64BIT-DAG: ADJCALLSTACKDOWN 176, 0, implicit-def dead $r1, implicit $r1 -; 64BIT-NEXT: BL8_NOP , csr_aix64, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit $x4, implicit $x5, implicit $x6, implicit $x7, implicit $x8, implicit $x9, implicit $x10, implicit $x2, implicit-def $r1, implicit-def dead $x3 +; 64BIT-NEXT: BL8_NOP , csr_svr464, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit $x4, implicit $x5, implicit $x6, implicit $x7, implicit $x8, implicit $x9, implicit $x10, implicit $x2, implicit-def $r1, implicit-def dead $x3 ; 64BIT-NEXT: ADJCALLSTACKUP 176, 0, implicit-def dead $r1, implicit $r1 ; 64BIT-NEXT: BLR8 implicit $lr8, implicit $rm @@ -1714,7 +1714,7 @@ ; 64BIT-DAG: $x10 = LI8 8 ; 64BIT-DAG: renamable $x[[REGBOOLADDR:[0-9]+]] = LI8 1 ; 64BIT-DAG: STD killed renamable $x[[REGBOOLADDR]], 112, $x1 :: (store 8) -; 64BIT-DAG: BL8_NOP , csr_aix64, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit $x4, implicit $x5, implicit $x6, implicit $x7, implicit $x8, implicit $x9, implicit $x10, implicit $x2, implicit-def $r1 +; 64BIT-DAG: BL8_NOP , csr_svr464, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit $x4, implicit $x5, implicit $x6, implicit $x7, implicit $x8, implicit $x9, implicit $x10, implicit $x2, implicit-def $r1 ; 64BIT-DAG: ADJCALLSTACKUP 120, 0, implicit-def dead $r1, implicit $r1 ; CHECKASM-LABEL: .call_test_i1_stack: @@ -1915,7 +1915,7 @@ ; 64BIT-DAG: renamable $f11 = LFD 0, killed renamable $x[[SCRATCHREG:[0-9]+]] :: (load 8 from constant-pool) ; 64BIT-DAG: renamable $f12 = LFD 0, killed renamable $x[[SCRATCHREG:[0-9]+]] :: (load 8 from constant-pool) ; 64BIT-DAG: renamable $f13 = LFD 0, killed renamable $x[[SCRATCHREG:[0-9]+]] :: (load 8 from constant-pool) -; 64BIT-DAG: BL8_NOP , csr_aix64, implicit-def dead $lr8, implicit $rm, implicit $f1, implicit $f2, implicit $f3, implicit $f4, implicit $f5, implicit $f6, implicit $f7, implicit $f8, implicit $f9, implicit killed $f10, implicit $f11, implicit $f12, implicit $f13, implicit $x2, implicit-def $r1, implicit-def dead $f1 +; 64BIT-DAG: BL8_NOP , csr_svr464, implicit-def dead $lr8, implicit $rm, implicit $f1, implicit $f2, implicit $f3, implicit $f4, implicit $f5, implicit $f6, implicit $f7, implicit $f8, implicit $f9, implicit killed $f10, implicit $f11, implicit $f12, implicit $f13, implicit $x2, implicit-def $r1, implicit-def dead $f1 ; 64BIT-NEXT: ADJCALLSTACKUP 176, 0, implicit-def dead $r1, implicit $r1 ; 64BIT-NEXT: BLR8 implicit $lr8, implicit $rm @@ -2297,7 +2297,7 @@ ; 64BIT-DAG: STD killed renamable $x[[REG13:[0-9]+]], 200, $x1 :: (store 8) ; 64BIT-DAG: STD killed renamable $x[[REG14:[0-9]+]], 208, $x1 :: (store 8) ; 64BIT-DAG: STD killed renamable $x[[REG15:[0-9]+]], 216, $x1 :: (store 8) -; 64BIT-DAG: BL8_NOP , csr_aix64, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit $x4, implicit $x5, implicit $x6, implicit $x7, implicit $x8, implicit $x9, implicit $x10, implicit $f1, implicit $f2, implicit $f3, implicit $f4, implicit $f5, implicit $f6, implicit $f7, implicit $f8, implicit $f9, implicit $f10, implicit $f11, implicit $f12, implicit $f13, implicit $x2, implicit-def $r1, implicit-def dead $x3 +; 64BIT-DAG: BL8_NOP , csr_svr464, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit $x4, implicit $x5, implicit $x6, implicit $x7, implicit $x8, implicit $x9, implicit $x10, implicit $f1, implicit $f2, implicit $f3, implicit $f4, implicit $f5, implicit $f6, implicit $f7, implicit $f8, implicit $f9, implicit $f10, implicit $f11, implicit $f12, implicit $f13, implicit $x2, implicit-def $r1, implicit-def dead $x3 ; 64BIT-NEXT: ADJCALLSTACKUP 224, 0, implicit-def dead $r1, implicit $r1 ; CHEKASM-LABEL: .mix_floats_caller: diff --git a/llvm/test/CodeGen/PowerPC/aix-cc-byval.ll b/llvm/test/CodeGen/PowerPC/aix-cc-byval.ll --- a/llvm/test/CodeGen/PowerPC/aix-cc-byval.ll +++ b/llvm/test/CodeGen/PowerPC/aix-cc-byval.ll @@ -50,7 +50,7 @@ ; 64BIT-NEXT: renamable $x[[REG:[0-9]+]] = LDtoc @gS1, $x2 :: (load 8 from got) ; 64BIT-NEXT: renamable $x3 = LBZ8 0, killed renamable $x[[REG]] :: (load 1) ; 64BIT-NEXT: renamable $x3 = RLDICR killed renamable $x3, 56, 7 -; 64BIT-NEXT: BL8_NOP , csr_aix64, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit $x2, implicit-def $r1 +; 64BIT-NEXT: BL8_NOP , csr_svr464, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit $x2, implicit-def $r1 ; 64BIT-NEXT: ADJCALLSTACKUP 112, 0, implicit-def dead $r1, implicit $r1 ; ASM64: std 0, 16(1) @@ -138,7 +138,7 @@ ; 64BIT-NEXT: renamable $x[[REG:[0-9]+]] = LDtoc @gS2, $x2 :: (load 8 from got) ; 64BIT-NEXT: renamable $x3 = LHZ8 0, killed renamable $x[[REG]] :: (load 2) ; 64BIT-NEXT: renamable $x3 = RLDICR killed renamable $x3, 48, 15 -; 64BIT-NEXT: BL8_NOP , csr_aix64, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit $x2, implicit-def $r1 +; 64BIT-NEXT: BL8_NOP , csr_svr464, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit $x2, implicit-def $r1 ; 64BIT-NEXT: ADJCALLSTACKUP 112, 0, implicit-def dead $r1, implicit $r1 ; ASM64: std 0, 16(1) @@ -226,7 +226,7 @@ ; 64BIT-DAG: renamable $x[[REG2:[0-9]+]] = LBZ8 2, renamable $x[[REGADDR]] :: (load 1) ; 64BIT-DAG: renamable $x3 = RLDIC killed renamable $x[[REG2]], 40, 16 ; 64BIT-DAG: renamable $x3 = RLDIMI killed renamable $x3, killed renamable $x[[REG1]], 48, 0 -; 64BIT-NEXT: BL8_NOP , csr_aix64, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit $x2, implicit-def $r1 +; 64BIT-NEXT: BL8_NOP , csr_svr464, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit $x2, implicit-def $r1 ; 64BIT-NEXT: ADJCALLSTACKUP 112, 0, implicit-def dead $r1, implicit $r1 ; The DAG block permits some invalid inputs for the benefit of allowing more valid orderings. @@ -315,7 +315,7 @@ ; 64BIT-DAG: renamable $x[[LD2:[0-9]+]] = LWZ8 0, %stack.1.s4a :: (load 4 from %stack.1.s4a, align 8) ; 64BIT-DAG: renamable $x3 = RLDICR killed renamable $x[[LD1]], 32, 31 ; 64BIT-DAG: renamable $x4 = RLDICR killed renamable $x[[LD2]], 32, 31 -; 64BIT-NEXT: BL8_NOP , csr_aix64, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit $x4, implicit $x2, implicit-def $r1 +; 64BIT-NEXT: BL8_NOP , csr_svr464, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit $x4, implicit $x2, implicit-def $r1 ; 64BIT-NEXT: ADJCALLSTACKUP 112, 0, implicit-def dead $r1, implicit $r1 ; ASM64: stdu 1, -128(1) diff --git a/llvm/test/CodeGen/PowerPC/aix-indirect-call.ll b/llvm/test/CodeGen/PowerPC/aix-indirect-call.ll --- a/llvm/test/CodeGen/PowerPC/aix-indirect-call.ll +++ b/llvm/test/CodeGen/PowerPC/aix-indirect-call.ll @@ -43,7 +43,7 @@ ; MIR64-DAG: renamable $[[REG:x[0-9]+]] = LD 0, renamable $x3 :: (dereferenceable invariant load 8 from %ir.0) ; MIR64-DAG: $x2 = LD 8, killed renamable $x3 :: (dereferenceable invariant load 8 from %ir.0 + 8) ; MIR64-DAG: MTCTR8 killed renamable $[[REG]], implicit-def $ctr8 -; MIR64-NEXT: BCTRL8_LDinto_toc 40, $x1, csr_aix64, implicit-def dead $lr8, implicit-def dead $x2, implicit $ctr8, implicit $rm, implicit $x11, implicit $x2, implicit-def $r1, implicit-def $x3 +; MIR64-NEXT: BCTRL8_LDinto_toc 40, $x1, csr_svr464, implicit-def dead $lr8, implicit-def dead $x2, implicit $ctr8, implicit $rm, implicit $x11, implicit $x2, implicit-def $r1, implicit-def $x3 ; MIR64-NEXT: ADJCALLSTACKUP 112, 0, implicit-def dead $r1, implicit $r1 ; CHECKASM-LABEL: .callThroughPtr: @@ -110,7 +110,7 @@ ; MIR64-DAG: $x3 = LI8 1 ; MIR64-DAG: $x4 = LI8 2 ; MIR64-DAG: $x5 = LI8 3 -; MIR64-NEXT: BCTRL8_LDinto_toc 40, $x1, csr_aix64, implicit-def dead $lr8, implicit-def dead $x2, implicit $ctr8, implicit $rm, implicit $x11, implicit $x3, implicit $x4, implicit $x5, implicit $x2, implicit-def $r1 +; MIR64-NEXT: BCTRL8_LDinto_toc 40, $x1, csr_svr464, implicit-def dead $lr8, implicit-def dead $x2, implicit $ctr8, implicit $rm, implicit $x11, implicit $x3, implicit $x4, implicit $x5, implicit $x2, implicit-def $r1 ; MIR64-NEXT: ADJCALLSTACKUP 112, 0, implicit-def dead $r1, implicit $r1 ; CHECKASM-LABEL: .callThroughPtrWithArgs: diff --git a/llvm/test/CodeGen/PowerPC/aix-sret-param.ll b/llvm/test/CodeGen/PowerPC/aix-sret-param.ll --- a/llvm/test/CodeGen/PowerPC/aix-sret-param.ll +++ b/llvm/test/CodeGen/PowerPC/aix-sret-param.ll @@ -45,7 +45,7 @@ ; MIR64: bb.0.entry: ; MIR64-NEXT: ADJCALLSTACKDOWN 112, 0, implicit-def dead $r1, implicit $r1 ; MIR64-NEXT: renamable $x3 = ADDI8 %stack.0.s, 0 -; MIR64-NEXT: BL8_NOP , csr_aix64, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit $x2, implicit-def $r1 +; MIR64-NEXT: BL8_NOP , csr_svr464, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit $x2, implicit-def $r1 ; MIR64-NEXT: ADJCALLSTACKUP 112, 0, implicit-def dead $r1, implicit $r1 @@ -78,7 +78,7 @@ ; MIR64: bb.0.entry: ; MIR64-NEXT: ADJCALLSTACKDOWN 112, 0, implicit-def dead $r1, implicit $r1 ; MIR64-NEXT: renamable $x3 = ADDI8 %stack.0.t, 0 -; MIR64-NEXT: BL8_NOP , csr_aix64, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit $x2, implicit-def $r1 +; MIR64-NEXT: BL8_NOP , csr_svr464, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit $x2, implicit-def $r1 ; MIR64-NEXT: ADJCALLSTACKUP 112, 0, implicit-def dead $r1, implicit $r1 diff --git a/llvm/test/CodeGen/PowerPC/aix64-cc-byval.ll b/llvm/test/CodeGen/PowerPC/aix64-cc-byval.ll --- a/llvm/test/CodeGen/PowerPC/aix64-cc-byval.ll +++ b/llvm/test/CodeGen/PowerPC/aix64-cc-byval.ll @@ -27,7 +27,7 @@ ; CHECK-DAG: renamable $x[[REG2:[0-9]+]] = LBZ8 4, renamable $x[[REGADDR]] :: (load 1) ; CHECK-DAG: renamable $x3 = RLWINM8 killed renamable $x[[REG2]], 24, 0, 7 ; CHECK-DAG: renamable $x3 = RLDIMI killed renamable $x3, killed renamable $x[[REG1]], 32, 0 -; CHECK-NEXT: BL8_NOP , csr_aix64, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit $x2, implicit-def $r1 +; CHECK-NEXT: BL8_NOP , csr_svr464, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit $x2, implicit-def $r1 ; CHECK-NEXT: ADJCALLSTACKUP 112, 0, implicit-def dead $r1, implicit $r1 ; The DAG block permits some invalid inputs for the benefit of allowing more valid orderings. @@ -85,7 +85,7 @@ ; CHECK-DAG: renamable $x[[REG2:[0-9]+]] = LHZ8 4, renamable $x[[REGADDR]] :: (load 2) ; CHECK-DAG: renamable $x3 = RLWINM8 killed renamable $x[[REG2]], 16, 0, 15 ; CHECK-DAG: renamable $x3 = RLDIMI killed renamable $x3, killed renamable $x[[REG1]], 32, 0 -; CHECK-NEXT: BL8_NOP , csr_aix64, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit $x2, implicit-def $r1 +; CHECK-NEXT: BL8_NOP , csr_svr464, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit $x2, implicit-def $r1 ; CHECK-NEXT: ADJCALLSTACKUP 112, 0, implicit-def dead $r1, implicit $r1 ; The DAG block permits some invalid inputs for the benefit of allowing more valid orderings. @@ -144,7 +144,7 @@ ; CHECK-DAG: renamable $x3 = RLWINM8 killed renamable $x[[REG3]], 8, 16, 23 ; CHECK-DAG: renamable $x3 = RLWIMI8 killed renamable $x3, killed renamable $x[[REG2]], 16, 0, 15 ; CHECK-DAG: renamable $x3 = RLDIMI killed renamable $x3, killed renamable $x[[REG1]], 32, 0 -; CHECK-NEXT: BL8_NOP , csr_aix64, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit $x2, implicit-def $r1 +; CHECK-NEXT: BL8_NOP , csr_svr464, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit $x2, implicit-def $r1 ; CHECK-NEXT: ADJCALLSTACKUP 112, 0, implicit-def dead $r1, implicit $r1 ; The DAG block permits some invalid inputs for the benefit of allowing more valid orderings. @@ -200,7 +200,7 @@ ; CHECK: ADJCALLSTACKDOWN 112, 0, implicit-def dead $r1, implicit $r1 ; CHECK-NEXT: renamable $x[[REGADDR:[0-9]+]] = LDtoc @gS8, $x2 :: (load 8 from got) ; CHECK-NEXT: renamable $x3 = LD 0, killed renamable $x[[REGADDR]] :: (load 8) -; CHECK-NEXT: BL8_NOP , csr_aix64, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit $x2, implicit-def $r1 +; CHECK-NEXT: BL8_NOP , csr_svr464, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit $x2, implicit-def $r1 ; CHECK-NEXT: ADJCALLSTACKUP 112, 0, implicit-def dead $r1, implicit $r1 ; ASM: stdu 1, -112(1) diff --git a/llvm/test/CodeGen/PowerPC/test_call_aix.ll b/llvm/test/CodeGen/PowerPC/test_call_aix.ll --- a/llvm/test/CodeGen/PowerPC/test_call_aix.ll +++ b/llvm/test/CodeGen/PowerPC/test_call_aix.ll @@ -16,7 +16,7 @@ ; 32BIT: ADJCALLSTACKUP 56, 0, implicit-def dead $r1, implicit $r1 ; 64BIT: ADJCALLSTACKDOWN 112, 0, implicit-def dead $r1, implicit $r1 -; 64BIT: BL8_NOP , csr_aix64, implicit-def dead $lr8, implicit $rm, implicit $x2, implicit-def $r1 +; 64BIT: BL8_NOP , csr_svr464, implicit-def dead $lr8, implicit $rm, implicit $x2, implicit-def $r1 ; 64BIT: ADJCALLSTACKUP 112, 0, implicit-def dead $r1, implicit $r1 ; CHECK-LABEL: test_call @@ -39,7 +39,7 @@ ; 32BIT: ADJCALLSTACKUP 56, 0, implicit-def dead $r1, implicit $r1 ; 64BIT: ADJCALLSTACKDOWN 112, 0, implicit-def dead $r1, implicit $r1 -; 64BIT: BL8 , csr_aix64, implicit-def dead $lr8, implicit $rm, implicit $x2, implicit-def $r1 +; 64BIT: BL8 , csr_svr464, implicit-def dead $lr8, implicit $rm, implicit $x2, implicit-def $r1 ; 64BIT: ADJCALLSTACKUP 112, 0, implicit-def dead $r1, implicit $r1 ; CHECK-LABEL: test_local_call