diff --git a/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp b/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp --- a/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp +++ b/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp @@ -1200,7 +1200,7 @@ MachineMemOperand::MODereferenceable; MachineMemOperand *MemRef = MF->getMachineMemOperand(MPInfo, Flags, DL->getPointerSizeInBits() / 8, - DL->getPointerABIAlignment(0).value()); + DL->getPointerABIAlignment(0)); MIB.setMemRefs({MemRef}); } @@ -1384,8 +1384,9 @@ // FIXME: Get alignment MIRBuilder.buildInstr(TargetOpcode::G_VASTART, {}, {getOrCreateVReg(*Ptr)}) - .addMemOperand(MF->getMachineMemOperand( - MachinePointerInfo(Ptr), MachineMemOperand::MOStore, ListSize, 1)); + .addMemOperand(MF->getMachineMemOperand(MachinePointerInfo(Ptr), + MachineMemOperand::MOStore, + ListSize, Align(1))); return true; } case Intrinsic::dbg_value: { @@ -1711,14 +1712,12 @@ TargetLowering::IntrinsicInfo Info; // TODO: Add a GlobalISel version of getTgtMemIntrinsic. if (TLI.getTgtMemIntrinsic(Info, CI, *MF, ID)) { - MaybeAlign Align = Info.align; - if (!Align) - Align = MaybeAlign( - DL->getABITypeAlignment(Info.memVT.getTypeForEVT(F->getContext()))); + Align Alignment = Info.align.getValueOr( + DL->getABITypeAlign(Info.memVT.getTypeForEVT(F->getContext()))); uint64_t Size = Info.memVT.getStoreSize(); - MIB.addMemOperand(MF->getMachineMemOperand( - MachinePointerInfo(Info.ptrVal), Info.flags, Size, Align->value())); + MIB.addMemOperand(MF->getMachineMemOperand(MachinePointerInfo(Info.ptrVal), + Info.flags, Size, Alignment)); } return true; diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp --- a/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp @@ -1525,14 +1525,13 @@ } Lo = DAG.getLoad(ISD::UNINDEXED, ExtType, LoVT, dl, Ch, Ptr, Offset, - LD->getPointerInfo(), LoMemVT, Alignment.value(), MMOFlags, - AAInfo); + LD->getPointerInfo(), LoMemVT, Alignment, MMOFlags, AAInfo); unsigned IncrementSize = LoMemVT.getSizeInBits()/8; Ptr = DAG.getObjectPtrOffset(dl, Ptr, IncrementSize); Hi = DAG.getLoad(ISD::UNINDEXED, ExtType, HiVT, dl, Ch, Ptr, Offset, LD->getPointerInfo().getWithOffset(IncrementSize), HiMemVT, - Alignment.value(), MMOFlags, AAInfo); + Alignment, MMOFlags, AAInfo); // Build a factor node to remember that this load is independent of the // other one. @@ -1583,7 +1582,7 @@ MachineMemOperand *MMO = DAG.getMachineFunction().getMachineMemOperand( MLD->getPointerInfo(), MachineMemOperand::MOLoad, LoMemVT.getStoreSize(), - Alignment.value(), MLD->getAAInfo(), MLD->getRanges()); + Alignment, MLD->getAAInfo(), MLD->getRanges()); Lo = DAG.getMaskedLoad(LoVT, dl, Ch, Ptr, Offset, MaskLo, PassThruLo, LoMemVT, MMO, MLD->getAddressingMode(), ExtType, @@ -1595,8 +1594,7 @@ MMO = DAG.getMachineFunction().getMachineMemOperand( MLD->getPointerInfo().getWithOffset(HiOffset), MachineMemOperand::MOLoad, - HiMemVT.getStoreSize(), Alignment.value(), MLD->getAAInfo(), - MLD->getRanges()); + HiMemVT.getStoreSize(), Alignment, MLD->getAAInfo(), MLD->getRanges()); Hi = DAG.getMaskedLoad(HiVT, dl, Ch, Ptr, Offset, MaskHi, PassThruHi, HiMemVT, MMO, MLD->getAddressingMode(), ExtType, @@ -1652,7 +1650,7 @@ MachineMemOperand *MMO = DAG.getMachineFunction().getMachineMemOperand( MGT->getPointerInfo(), MachineMemOperand::MOLoad, - MemoryLocation::UnknownSize, Alignment.value(), MGT->getAAInfo(), + MemoryLocation::UnknownSize, Alignment, MGT->getAAInfo(), MGT->getRanges()); SDValue OpsLo[] = {Ch, PassThruLo, MaskLo, Ptr, IndexLo, Scale}; @@ -2282,7 +2280,7 @@ MachineMemOperand *MMO = DAG.getMachineFunction().getMachineMemOperand( MGT->getPointerInfo(), MachineMemOperand::MOLoad, LoMemVT.getStoreSize(), - Alignment.value(), MGT->getAAInfo(), MGT->getRanges()); + Alignment, MGT->getAAInfo(), MGT->getRanges()); SDValue OpsLo[] = {Ch, PassThruLo, MaskLo, Ptr, IndexLo, Scale}; SDValue Lo = DAG.getMaskedGather(DAG.getVTList(LoVT, MVT::Other), LoVT, dl, @@ -2290,7 +2288,7 @@ MMO = DAG.getMachineFunction().getMachineMemOperand( MGT->getPointerInfo(), MachineMemOperand::MOLoad, HiMemVT.getStoreSize(), - Alignment.value(), MGT->getAAInfo(), MGT->getRanges()); + Alignment, MGT->getAAInfo(), MGT->getRanges()); SDValue OpsHi[] = {Ch, PassThruHi, MaskHi, Ptr, IndexHi, Scale}; SDValue Hi = DAG.getMaskedGather(DAG.getVTList(HiVT, MVT::Other), HiVT, dl, @@ -2348,7 +2346,7 @@ SDValue Lo, Hi; MachineMemOperand *MMO = DAG.getMachineFunction().getMachineMemOperand( N->getPointerInfo(), MachineMemOperand::MOStore, LoMemVT.getStoreSize(), - Alignment.value(), N->getAAInfo(), N->getRanges()); + Alignment, N->getAAInfo(), N->getRanges()); Lo = DAG.getMaskedStore(Ch, DL, DataLo, Ptr, Offset, MaskLo, LoMemVT, MMO, N->getAddressingMode(), N->isTruncatingStore(), @@ -2360,8 +2358,7 @@ MMO = DAG.getMachineFunction().getMachineMemOperand( N->getPointerInfo().getWithOffset(HiOffset), MachineMemOperand::MOStore, - HiMemVT.getStoreSize(), Alignment.value(), N->getAAInfo(), - N->getRanges()); + HiMemVT.getStoreSize(), Alignment, N->getAAInfo(), N->getRanges()); Hi = DAG.getMaskedStore(Ch, DL, DataHi, Ptr, Offset, MaskHi, HiMemVT, MMO, N->getAddressingMode(), N->isTruncatingStore(), @@ -2412,8 +2409,7 @@ SDValue Lo; MachineMemOperand *MMO = DAG.getMachineFunction().getMachineMemOperand( N->getPointerInfo(), MachineMemOperand::MOStore, - MemoryLocation::UnknownSize, Alignment.value(), N->getAAInfo(), - N->getRanges()); + MemoryLocation::UnknownSize, Alignment, N->getAAInfo(), N->getRanges()); SDValue OpsLo[] = {Ch, DataLo, MaskLo, Ptr, IndexLo, Scale}; Lo = DAG.getMaskedScatter(DAG.getVTList(MVT::Other), DataLo.getValueType(), @@ -2453,10 +2449,10 @@ if (isTruncating) Lo = DAG.getTruncStore(Ch, DL, Lo, Ptr, N->getPointerInfo(), LoMemVT, - Alignment.value(), MMOFlags, AAInfo); + Alignment, MMOFlags, AAInfo); else - Lo = DAG.getStore(Ch, DL, Lo, Ptr, N->getPointerInfo(), Alignment.value(), - MMOFlags, AAInfo); + Lo = DAG.getStore(Ch, DL, Lo, Ptr, N->getPointerInfo(), Alignment, MMOFlags, + AAInfo); // Increment the pointer to the other half. Ptr = DAG.getObjectPtrOffset(DL, Ptr, IncrementSize); @@ -2464,11 +2460,11 @@ if (isTruncating) Hi = DAG.getTruncStore(Ch, DL, Hi, Ptr, N->getPointerInfo().getWithOffset(IncrementSize), - HiMemVT, Alignment.value(), MMOFlags, AAInfo); + HiMemVT, Alignment, MMOFlags, AAInfo); else Hi = DAG.getStore(Ch, DL, Hi, Ptr, N->getPointerInfo().getWithOffset(IncrementSize), - Alignment.value(), MMOFlags, AAInfo); + Alignment, MMOFlags, AAInfo); return DAG.getNode(ISD::TokenFactor, DL, MVT::Other, Lo, Hi); } diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp --- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp @@ -6822,8 +6822,8 @@ uint64_t Size = MemoryLocation::getSizeOrUnknown(MemVT.getStoreSize()); MachineFunction &MF = getMachineFunction(); - MachineMemOperand *MMO = MF.getMachineMemOperand( - PtrInfo, MMOFlags, Size, Alignment.value(), AAInfo, Ranges); + MachineMemOperand *MMO = MF.getMachineMemOperand(PtrInfo, MMOFlags, Size, + Alignment, AAInfo, Ranges); return getLoad(AM, ExtType, VT, dl, Chain, Ptr, Offset, MemVT, MMO); } @@ -6943,8 +6943,8 @@ MachineFunction &MF = getMachineFunction(); uint64_t Size = MemoryLocation::getSizeOrUnknown(Val.getValueType().getStoreSize()); - MachineMemOperand *MMO = MF.getMachineMemOperand(PtrInfo, MMOFlags, Size, - Alignment.value(), AAInfo); + MachineMemOperand *MMO = + MF.getMachineMemOperand(PtrInfo, MMOFlags, Size, Alignment, AAInfo); return getStore(Chain, dl, Val, Ptr, MMO); } @@ -6994,7 +6994,7 @@ MachineFunction &MF = getMachineFunction(); MachineMemOperand *MMO = MF.getMachineMemOperand( - PtrInfo, MMOFlags, SVT.getStoreSize(), Alignment.value(), AAInfo); + PtrInfo, MMOFlags, SVT.getStoreSize(), Alignment, AAInfo); return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO); } diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp --- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp @@ -2512,7 +2512,7 @@ auto Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOInvariant | MachineMemOperand::MODereferenceable; MachineMemOperand *MemRef = MF.getMachineMemOperand( - MPInfo, Flags, PtrTy.getSizeInBits() / 8, DAG.getEVTAlignment(PtrTy)); + MPInfo, Flags, PtrTy.getSizeInBits() / 8, DAG.getEVTAlign(PtrTy)); DAG.setNodeMemRefs(Node, {MemRef}); } if (PtrTy != PtrMemTy) @@ -4574,13 +4574,10 @@ auto Flags = TLI.getLoadMemOperandFlags(I, DAG.getDataLayout()); - MachineMemOperand *MMO = - DAG.getMachineFunction(). - getMachineMemOperand(MachinePointerInfo(I.getPointerOperand()), - Flags, MemVT.getStoreSize(), - I.getAlignment() ? I.getAlignment() : - DAG.getEVTAlignment(MemVT), - AAMDNodes(), nullptr, SSID, Order); + MachineMemOperand *MMO = DAG.getMachineFunction().getMachineMemOperand( + MachinePointerInfo(I.getPointerOperand()), Flags, MemVT.getStoreSize(), + I.getAlign().getValueOr(DAG.getEVTAlign(MemVT)), AAMDNodes(), nullptr, + SSID, Order); InChain = TLI.prepareVolatileOrAtomicLoad(InChain, dl, DAG); @@ -4631,10 +4628,9 @@ auto Flags = TLI.getStoreMemOperandFlags(I, DAG.getDataLayout()); MachineFunction &MF = DAG.getMachineFunction(); - MachineMemOperand *MMO = - MF.getMachineMemOperand(MachinePointerInfo(I.getPointerOperand()), Flags, - MemVT.getStoreSize(), I.getAlignment(), AAMDNodes(), - nullptr, SSID, Ordering); + MachineMemOperand *MMO = MF.getMachineMemOperand( + MachinePointerInfo(I.getPointerOperand()), Flags, MemVT.getStoreSize(), + *I.getAlign(), AAMDNodes(), nullptr, SSID, Ordering); SDValue Val = getValue(I.getValueOperand()); if (Val.getValueType() != MemVT) diff --git a/llvm/lib/CodeGen/SelectionDAG/StatepointLowering.cpp b/llvm/lib/CodeGen/SelectionDAG/StatepointLowering.cpp --- a/llvm/lib/CodeGen/SelectionDAG/StatepointLowering.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/StatepointLowering.cpp @@ -314,9 +314,9 @@ auto MMOFlags = MachineMemOperand::MOStore | MachineMemOperand::MOLoad | MachineMemOperand::MOVolatile; auto &MFI = MF.getFrameInfo(); - return MF.getMachineMemOperand(PtrInfo, MMOFlags, + return MF.getMachineMemOperand(PtrInfo, MMOFlags, MFI.getObjectSize(FI.getIndex()), - MFI.getObjectAlignment(FI.getIndex())); + MFI.getObjectAlign(FI.getIndex())); } /// Spill a value incoming to the statepoint. It might be either part of @@ -354,10 +354,9 @@ // slots with preferred alignments larger than frame alignment.. auto &MF = Builder.DAG.getMachineFunction(); auto PtrInfo = MachinePointerInfo::getFixedStack(MF, Index); - auto *StoreMMO = - MF.getMachineMemOperand(PtrInfo, MachineMemOperand::MOStore, - MFI.getObjectSize(Index), - MFI.getObjectAlignment(Index)); + auto *StoreMMO = MF.getMachineMemOperand( + PtrInfo, MachineMemOperand::MOStore, MFI.getObjectSize(Index), + MFI.getObjectAlign(Index)); Chain = Builder.DAG.getStore(Chain, Builder.getCurSDLoc(), Incoming, Loc, StoreMMO); @@ -1002,10 +1001,9 @@ auto &MF = DAG.getMachineFunction(); auto &MFI = MF.getFrameInfo(); auto PtrInfo = MachinePointerInfo::getFixedStack(MF, Index); - auto *LoadMMO = - MF.getMachineMemOperand(PtrInfo, MachineMemOperand::MOLoad, - MFI.getObjectSize(Index), - MFI.getObjectAlignment(Index)); + auto *LoadMMO = MF.getMachineMemOperand(PtrInfo, MachineMemOperand::MOLoad, + MFI.getObjectSize(Index), + MFI.getObjectAlign(Index)); auto LoadVT = DAG.getTargetLoweringInfo().getValueType(DAG.getDataLayout(), Relocate.getType()); diff --git a/llvm/lib/Target/Hexagon/HexagonSplitDouble.cpp b/llvm/lib/Target/Hexagon/HexagonSplitDouble.cpp --- a/llvm/lib/Target/Hexagon/HexagonSplitDouble.cpp +++ b/llvm/lib/Target/Hexagon/HexagonSplitDouble.cpp @@ -690,10 +690,10 @@ MachineMemOperand::Flags F = MO->getFlags(); Align A = MO->getAlign(); - auto *Tmp1 = MF.getMachineMemOperand(Ptr, F, 4 /*size*/, A.value()); + auto *Tmp1 = MF.getMachineMemOperand(Ptr, F, 4 /*size*/, A); LowI->addMemOperand(MF, Tmp1); - auto *Tmp2 = MF.getMachineMemOperand(Ptr, F, 4 /*size*/, - std::min(A, Align(4)).value()); + auto *Tmp2 = + MF.getMachineMemOperand(Ptr, F, 4 /*size*/, std::min(A, Align(4))); HighI->addMemOperand(MF, Tmp2); } } diff --git a/llvm/lib/Target/Hexagon/HexagonStoreWidening.cpp b/llvm/lib/Target/Hexagon/HexagonStoreWidening.cpp --- a/llvm/lib/Target/Hexagon/HexagonStoreWidening.cpp +++ b/llvm/lib/Target/Hexagon/HexagonStoreWidening.cpp @@ -416,9 +416,9 @@ MachineInstr *FirstSt = OG.front(); DebugLoc DL = OG.back()->getDebugLoc(); const MachineMemOperand &OldM = getStoreTarget(FirstSt); - MachineMemOperand *NewM = MF->getMachineMemOperand( - OldM.getPointerInfo(), OldM.getFlags(), TotalSize, - OldM.getAlign().value(), OldM.getAAInfo()); + MachineMemOperand *NewM = + MF->getMachineMemOperand(OldM.getPointerInfo(), OldM.getFlags(), + TotalSize, OldM.getAlign(), OldM.getAAInfo()); if (Acc < 0x10000) { // Create mem[hw] = #Acc diff --git a/llvm/lib/Target/MSP430/MSP430InstrInfo.cpp b/llvm/lib/Target/MSP430/MSP430InstrInfo.cpp --- a/llvm/lib/Target/MSP430/MSP430InstrInfo.cpp +++ b/llvm/lib/Target/MSP430/MSP430InstrInfo.cpp @@ -73,7 +73,7 @@ MachineMemOperand *MMO = MF.getMachineMemOperand( MachinePointerInfo::getFixedStack(MF, FrameIdx), MachineMemOperand::MOLoad, MFI.getObjectSize(FrameIdx), - MFI.getObjectAlignment(FrameIdx)); + MFI.getObjectAlign(FrameIdx)); if (RC == &MSP430::GR16RegClass) BuildMI(MBB, MI, DL, get(MSP430::MOV16rm)) diff --git a/llvm/lib/Target/Mips/MipsCallLowering.cpp b/llvm/lib/Target/Mips/MipsCallLowering.cpp --- a/llvm/lib/Target/Mips/MipsCallLowering.cpp +++ b/llvm/lib/Target/Mips/MipsCallLowering.cpp @@ -180,8 +180,8 @@ const TargetFrameLowering *TFL = MF.getSubtarget().getFrameLowering(); Align Alignment = commonAlignment(TFL->getStackAlign(), Offset); - MMO = MF.getMachineMemOperand(MPO, MachineMemOperand::MOLoad, Size, - Alignment.value()); + MMO = + MF.getMachineMemOperand(MPO, MachineMemOperand::MOLoad, Size, Alignment); return MIRBuilder.buildFrameIndex(LLT::pointer(0, 32), FI).getReg(0); } diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp --- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp @@ -7900,7 +7900,7 @@ if (i32Stack) { MachineFunction &MF = DAG.getMachineFunction(); MachineMemOperand *MMO = - MF.getMachineMemOperand(MPI, MachineMemOperand::MOStore, 4, 4); + MF.getMachineMemOperand(MPI, MachineMemOperand::MOStore, 4, Align(4)); SDValue Ops[] = { DAG.getEntryNode(), Tmp, FIPtr }; Chain = DAG.getMemIntrinsicNode(PPCISD::STFIWX, dl, DAG.getVTList(MVT::Other), Ops, MVT::i32, MMO); @@ -12036,9 +12036,9 @@ int FrameIdx = MFI.CreateStackObject(8, 8, false); MachineMemOperand *MMOStore = F->getMachineMemOperand( - MachinePointerInfo::getFixedStack(*F, FrameIdx, 0), - MachineMemOperand::MOStore, MFI.getObjectSize(FrameIdx), - MFI.getObjectAlignment(FrameIdx)); + MachinePointerInfo::getFixedStack(*F, FrameIdx, 0), + MachineMemOperand::MOStore, MFI.getObjectSize(FrameIdx), + MFI.getObjectAlign(FrameIdx)); // Store the SrcReg into the stack. BuildMI(*BB, MI, dl, TII->get(StoreOp)) @@ -12048,9 +12048,9 @@ .addMemOperand(MMOStore); MachineMemOperand *MMOLoad = F->getMachineMemOperand( - MachinePointerInfo::getFixedStack(*F, FrameIdx, 0), - MachineMemOperand::MOLoad, MFI.getObjectSize(FrameIdx), - MFI.getObjectAlignment(FrameIdx)); + MachinePointerInfo::getFixedStack(*F, FrameIdx, 0), + MachineMemOperand::MOLoad, MFI.getObjectSize(FrameIdx), + MFI.getObjectAlign(FrameIdx)); // Load from the stack where SrcReg is stored, and save to DestReg, // so we have done the RegClass conversion from RegClass::SrcReg to diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp --- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp +++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp @@ -1206,7 +1206,7 @@ RI); MachineMemOperand *MMO = MF.getMachineMemOperand(MachinePointerInfo::getFixedStack(MF, FI), - MachineMemOperand::MOLoad, 8, 8); + MachineMemOperand::MOLoad, 8, Align(8)); BuildMI(*BB, MI, DL, TII.get(RISCV::LW), LoReg) .addFrameIndex(FI) .addImm(0) @@ -1236,7 +1236,7 @@ MachineMemOperand *MMO = MF.getMachineMemOperand(MachinePointerInfo::getFixedStack(MF, FI), - MachineMemOperand::MOStore, 8, 8); + MachineMemOperand::MOStore, 8, Align(8)); BuildMI(*BB, MI, DL, TII.get(RISCV::SW)) .addReg(LoReg, getKillRegState(MI.getOperand(1).isKill())) .addFrameIndex(FI) diff --git a/llvm/lib/Target/Sparc/SparcInstrInfo.cpp b/llvm/lib/Target/Sparc/SparcInstrInfo.cpp --- a/llvm/lib/Target/Sparc/SparcInstrInfo.cpp +++ b/llvm/lib/Target/Sparc/SparcInstrInfo.cpp @@ -403,7 +403,7 @@ const MachineFrameInfo &MFI = MF->getFrameInfo(); MachineMemOperand *MMO = MF->getMachineMemOperand( MachinePointerInfo::getFixedStack(*MF, FI), MachineMemOperand::MOStore, - MFI.getObjectSize(FI), MFI.getObjectAlignment(FI)); + MFI.getObjectSize(FI), MFI.getObjectAlign(FI)); // On the order of operands here: think "[FrameIdx + 0] = SrcReg". if (RC == &SP::I64RegsRegClass) @@ -442,7 +442,7 @@ const MachineFrameInfo &MFI = MF->getFrameInfo(); MachineMemOperand *MMO = MF->getMachineMemOperand( MachinePointerInfo::getFixedStack(*MF, FI), MachineMemOperand::MOLoad, - MFI.getObjectSize(FI), MFI.getObjectAlignment(FI)); + MFI.getObjectSize(FI), MFI.getObjectAlign(FI)); if (RC == &SP::I64RegsRegClass) BuildMI(MBB, I, DL, get(SP::LDXri), DestReg).addFrameIndex(FI).addImm(0) diff --git a/llvm/lib/Target/SystemZ/SystemZInstrBuilder.h b/llvm/lib/Target/SystemZ/SystemZInstrBuilder.h --- a/llvm/lib/Target/SystemZ/SystemZInstrBuilder.h +++ b/llvm/lib/Target/SystemZ/SystemZInstrBuilder.h @@ -36,7 +36,7 @@ int64_t Offset = 0; MachineMemOperand *MMO = MF.getMachineMemOperand( MachinePointerInfo::getFixedStack(MF, FI, Offset), Flags, - MFFrame.getObjectSize(FI), MFFrame.getObjectAlignment(FI)); + MFFrame.getObjectSize(FI), MFFrame.getObjectAlign(FI)); return MIB.addFrameIndex(FI).addImm(Offset).addReg(0).addMemOperand(MMO); } diff --git a/llvm/lib/Target/X86/X86CallLowering.cpp b/llvm/lib/Target/X86/X86CallLowering.cpp --- a/llvm/lib/Target/X86/X86CallLowering.cpp +++ b/llvm/lib/Target/X86/X86CallLowering.cpp @@ -148,11 +148,11 @@ MachinePointerInfo &MPO, CCValAssign &VA) override { MachineFunction &MF = MIRBuilder.getMF(); Register ExtReg = extendRegister(ValVReg, VA); - unsigned Align = inferAlignmentFromPtrInfo(MF, MPO); + unsigned Alignment = inferAlignmentFromPtrInfo(MF, MPO); - auto MMO = MF.getMachineMemOperand( - MPO, MachineMemOperand::MOStore, VA.getLocVT().getStoreSize(), - Align); + auto MMO = + MF.getMachineMemOperand(MPO, MachineMemOperand::MOStore, + VA.getLocVT().getStoreSize(), Align(Alignment)); MIRBuilder.buildStore(ExtReg, Addr, *MMO); } diff --git a/llvm/lib/Target/X86/X86FastISel.cpp b/llvm/lib/Target/X86/X86FastISel.cpp --- a/llvm/lib/Target/X86/X86FastISel.cpp +++ b/llvm/lib/Target/X86/X86FastISel.cpp @@ -3423,7 +3423,7 @@ AM.Base.Reg = RegInfo->getStackRegister(); AM.Disp = LocMemOffset; ISD::ArgFlagsTy Flags = OutFlags[VA.getValNo()]; - unsigned Alignment = DL.getABITypeAlignment(ArgVal->getType()); + Align Alignment = DL.getABITypeAlign(ArgVal->getType()); MachineMemOperand *MMO = FuncInfo.MF->getMachineMemOperand( MachinePointerInfo::getStack(*FuncInfo.MF, LocMemOffset), MachineMemOperand::MOStore, ArgVT.getStoreSize(), Alignment); @@ -3775,11 +3775,7 @@ } // MachineConstantPool wants an explicit alignment. - unsigned Align = DL.getPrefTypeAlignment(CFP->getType()); - if (Align == 0) { - // Alignment of vector types. FIXME! - Align = DL.getTypeAllocSize(CFP->getType()); - } + Align Alignment = DL.getPrefTypeAlign(CFP->getType()); // x86-32 PIC requires a PIC base register for constant pools. unsigned PICBase = 0; @@ -3792,7 +3788,7 @@ PICBase = X86::RIP; // Create the load from the constant pool. - unsigned CPI = MCP.getConstantPoolIndex(CFP, Align); + unsigned CPI = MCP.getConstantPoolIndex(CFP, Alignment.value()); unsigned ResultReg = createResultReg(TLI.getRegClassFor(VT.SimpleTy)); if (CM == CodeModel::Large) { @@ -3805,7 +3801,7 @@ addDirectMem(MIB, AddrReg); MachineMemOperand *MMO = FuncInfo.MF->getMachineMemOperand( MachinePointerInfo::getConstantPool(*FuncInfo.MF), - MachineMemOperand::MOLoad, DL.getPointerSize(), Align); + MachineMemOperand::MOLoad, DL.getPointerSize(), Alignment); MIB->addMemOperand(*FuncInfo.MF, MMO); return ResultReg; } diff --git a/llvm/lib/Target/X86/X86FrameLowering.cpp b/llvm/lib/Target/X86/X86FrameLowering.cpp --- a/llvm/lib/Target/X86/X86FrameLowering.cpp +++ b/llvm/lib/Target/X86/X86FrameLowering.cpp @@ -1514,17 +1514,17 @@ addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64rm), Establisher), Establisher, false, PSPSlotOffset) .addMemOperand(MF.getMachineMemOperand( - NoInfo, MachineMemOperand::MOLoad, SlotSize, SlotSize)); + NoInfo, MachineMemOperand::MOLoad, SlotSize, Align(SlotSize))); ; // Save the root establisher back into the current funclet's (mostly // empty) frame, in case a sub-funclet or the GC needs it. addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64mr)), StackPtr, false, PSPSlotOffset) .addReg(Establisher) - .addMemOperand( - MF.getMachineMemOperand(NoInfo, MachineMemOperand::MOStore | - MachineMemOperand::MOVolatile, - SlotSize, SlotSize)); + .addMemOperand(MF.getMachineMemOperand( + NoInfo, + MachineMemOperand::MOStore | MachineMemOperand::MOVolatile, + SlotSize, Align(SlotSize))); } SPOrEstablisher = Establisher; } else { @@ -1614,7 +1614,7 @@ .addReg(StackPtr) .addMemOperand(MF.getMachineMemOperand( PSPInfo, MachineMemOperand::MOStore | MachineMemOperand::MOVolatile, - SlotSize, SlotSize)); + SlotSize, Align(SlotSize))); } // Realign stack after we spilled callee-saved registers (so that we'll be diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -19232,7 +19232,7 @@ std::pair X86TargetLowering::BuildFILD( EVT DstVT, EVT SrcVT, const SDLoc &DL, SDValue Chain, SDValue Pointer, - MachinePointerInfo PtrInfo, unsigned Align, SelectionDAG &DAG) const { + MachinePointerInfo PtrInfo, unsigned Alignment, SelectionDAG &DAG) const { // Build the FILD SDVTList Tys; bool useSSE = isScalarFPTypeInSSEReg(DstVT); @@ -19244,7 +19244,7 @@ SDValue FILDOps[] = {Chain, Pointer}; SDValue Result = DAG.getMemIntrinsicNode(X86ISD::FILD, DL, Tys, FILDOps, SrcVT, PtrInfo, - Align, MachineMemOperand::MOLoad); + Alignment, MachineMemOperand::MOLoad); Chain = Result.getValue(1); if (useSSE) { @@ -19257,7 +19257,7 @@ SDValue FSTOps[] = {Chain, Result, StackSlot}; MachineMemOperand *StoreMMO = DAG.getMachineFunction().getMachineMemOperand( MachinePointerInfo::getFixedStack(DAG.getMachineFunction(), SSFI), - MachineMemOperand::MOStore, SSFISize, SSFISize); + MachineMemOperand::MOStore, SSFISize, Align(SSFISize)); Chain = DAG.getMemIntrinsicNode(X86ISD::FST, DL, Tys, FSTOps, DstVT, StoreMMO); @@ -19900,14 +19900,14 @@ unsigned FLDSize = TheVT.getStoreSize(); assert(FLDSize <= MemSize && "Stack slot not big enough"); MachineMemOperand *MMO = MF.getMachineMemOperand( - MPI, MachineMemOperand::MOLoad, FLDSize, FLDSize); + MPI, MachineMemOperand::MOLoad, FLDSize, Align(FLDSize)); Value = DAG.getMemIntrinsicNode(X86ISD::FLD, DL, Tys, Ops, TheVT, MMO); Chain = Value.getValue(1); } // Build the FP_TO_INT*_IN_MEM MachineMemOperand *MMO = MF.getMachineMemOperand( - MPI, MachineMemOperand::MOStore, MemSize, MemSize); + MPI, MachineMemOperand::MOStore, MemSize, Align(MemSize)); SDValue Ops[] = { Chain, Value, StackSlot }; SDValue FIST = DAG.getMemIntrinsicNode(X86ISD::FP_TO_INT_IN_MEM, DL, DAG.getVTList(MVT::Other), @@ -31069,7 +31069,7 @@ MachineMemOperand *MMO = F->getMachineMemOperand( MachinePointerInfo::getFixedStack(*F, RegSaveFrameIndex, Offset), MachineMemOperand::MOStore, - /*Size=*/16, /*Align=*/16); + /*Size=*/16, Align(16)); BuildMI(XMMSaveMBB, DL, TII->get(MOVOpc)) .addFrameIndex(RegSaveFrameIndex) .addImm(/*Scale=*/1) diff --git a/llvm/lib/Target/X86/X86InstrBuilder.h b/llvm/lib/Target/X86/X86InstrBuilder.h --- a/llvm/lib/Target/X86/X86InstrBuilder.h +++ b/llvm/lib/Target/X86/X86InstrBuilder.h @@ -207,7 +207,7 @@ Flags |= MachineMemOperand::MOStore; MachineMemOperand *MMO = MF.getMachineMemOperand( MachinePointerInfo::getFixedStack(MF, FI, Offset), Flags, - MFI.getObjectSize(FI), MFI.getObjectAlignment(FI)); + MFI.getObjectSize(FI), MFI.getObjectAlign(FI)); return addOffset(MIB.addFrameIndex(FI), Offset) .addMemOperand(MMO); } diff --git a/llvm/lib/Target/X86/X86InstrInfo.cpp b/llvm/lib/Target/X86/X86InstrInfo.cpp --- a/llvm/lib/Target/X86/X86InstrInfo.cpp +++ b/llvm/lib/Target/X86/X86InstrInfo.cpp @@ -4473,7 +4473,7 @@ MachineMemOperand::MODereferenceable | MachineMemOperand::MOInvariant; MachineMemOperand *MMO = MBB.getParent()->getMachineMemOperand( - MachinePointerInfo::getGOT(*MBB.getParent()), Flags, 8, 8); + MachinePointerInfo::getGOT(*MBB.getParent()), Flags, 8, Align(8)); MachineBasicBlock::iterator I = MIB.getInstr(); BuildMI(MBB, I, DL, TII.get(X86::MOV64rm), Reg).addReg(X86::RIP).addImm(1) diff --git a/llvm/lib/Target/X86/X86InstructionSelector.cpp b/llvm/lib/Target/X86/X86InstructionSelector.cpp --- a/llvm/lib/Target/X86/X86InstructionSelector.cpp +++ b/llvm/lib/Target/X86/X86InstructionSelector.cpp @@ -1458,7 +1458,7 @@ MachineMemOperand *MMO = MF.getMachineMemOperand( MachinePointerInfo::getConstantPool(MF), MachineMemOperand::MOLoad, - MF.getDataLayout().getPointerSize(), Alignment.value()); + MF.getDataLayout().getPointerSize(), Alignment); LoadInst = addDirectMem(BuildMI(*I.getParent(), I, DbgLoc, TII.get(Opc), DstReg), diff --git a/llvm/lib/Target/XCore/XCoreFrameLowering.cpp b/llvm/lib/Target/XCore/XCoreFrameLowering.cpp --- a/llvm/lib/Target/XCore/XCoreFrameLowering.cpp +++ b/llvm/lib/Target/XCore/XCoreFrameLowering.cpp @@ -179,7 +179,7 @@ const MachineFrameInfo &MFI = MF->getFrameInfo(); MachineMemOperand *MMO = MF->getMachineMemOperand( MachinePointerInfo::getFixedStack(*MF, FrameIndex), flags, - MFI.getObjectSize(FrameIndex), MFI.getObjectAlignment(FrameIndex)); + MFI.getObjectSize(FrameIndex), MFI.getObjectAlign(FrameIndex)); return MMO; } diff --git a/llvm/lib/Target/XCore/XCoreISelDAGToDAG.cpp b/llvm/lib/Target/XCore/XCoreISelDAGToDAG.cpp --- a/llvm/lib/Target/XCore/XCoreISelDAGToDAG.cpp +++ b/llvm/lib/Target/XCore/XCoreISelDAGToDAG.cpp @@ -152,7 +152,7 @@ CurDAG->getEntryNode()); MachineMemOperand *MemOp = MF->getMachineMemOperand(MachinePointerInfo::getConstantPool(*MF), - MachineMemOperand::MOLoad, 4, 4); + MachineMemOperand::MOLoad, 4, Align(4)); CurDAG->setNodeMemRefs(cast(node), {MemOp}); ReplaceNode(N, node); return; diff --git a/llvm/lib/Target/XCore/XCoreInstrInfo.cpp b/llvm/lib/Target/XCore/XCoreInstrInfo.cpp --- a/llvm/lib/Target/XCore/XCoreInstrInfo.cpp +++ b/llvm/lib/Target/XCore/XCoreInstrInfo.cpp @@ -370,7 +370,7 @@ MachineMemOperand *MMO = MF->getMachineMemOperand( MachinePointerInfo::getFixedStack(*MF, FrameIndex), MachineMemOperand::MOStore, MFI.getObjectSize(FrameIndex), - MFI.getObjectAlignment(FrameIndex)); + MFI.getObjectAlign(FrameIndex)); BuildMI(MBB, I, DL, get(XCore::STWFI)) .addReg(SrcReg, getKillRegState(isKill)) .addFrameIndex(FrameIndex) @@ -392,7 +392,7 @@ MachineMemOperand *MMO = MF->getMachineMemOperand( MachinePointerInfo::getFixedStack(*MF, FrameIndex), MachineMemOperand::MOLoad, MFI.getObjectSize(FrameIndex), - MFI.getObjectAlignment(FrameIndex)); + MFI.getObjectAlign(FrameIndex)); BuildMI(MBB, I, DL, get(XCore::LDWFI), DestReg) .addFrameIndex(FrameIndex) .addImm(0) diff --git a/llvm/unittests/CodeGen/GlobalISel/LegalizerHelperTest.cpp b/llvm/unittests/CodeGen/GlobalISel/LegalizerHelperTest.cpp --- a/llvm/unittests/CodeGen/GlobalISel/LegalizerHelperTest.cpp +++ b/llvm/unittests/CodeGen/GlobalISel/LegalizerHelperTest.cpp @@ -2578,7 +2578,7 @@ DefineLegalizerInfo(A, {}); MachineMemOperand *MMO = B.getMF().getMachineMemOperand( - MachinePointerInfo(), MachineMemOperand::MOLoad, 4, 4); + MachinePointerInfo(), MachineMemOperand::MOLoad, 4, Align(4)); auto Load = B.buildLoad(V4S8, Ptr, *MMO); AInfo Info(MF->getSubtarget()); @@ -2611,7 +2611,7 @@ DefineLegalizerInfo(A, {}); MachineMemOperand *MMO = B.getMF().getMachineMemOperand( - MachinePointerInfo(), MachineMemOperand::MOStore, 4, 4); + MachinePointerInfo(), MachineMemOperand::MOStore, 4, Align(4)); auto Val = B.buildUndef(V4S8); auto Store = B.buildStore(Val, Ptr, *MMO); diff --git a/llvm/unittests/CodeGen/GlobalISel/MachineIRBuilderTest.cpp b/llvm/unittests/CodeGen/GlobalISel/MachineIRBuilderTest.cpp --- a/llvm/unittests/CodeGen/GlobalISel/MachineIRBuilderTest.cpp +++ b/llvm/unittests/CodeGen/GlobalISel/MachineIRBuilderTest.cpp @@ -302,11 +302,10 @@ SmallVector Copies; collectCopies(Copies, MF); - MachineMemOperand *MMO = - MF->getMachineMemOperand( + MachineMemOperand *MMO = MF->getMachineMemOperand( MachinePointerInfo(), - MachineMemOperand::MOLoad | MachineMemOperand::MOStore, - 8, 8, AAMDNodes(), nullptr, SyncScope::System, AtomicOrdering::Unordered); + MachineMemOperand::MOLoad | MachineMemOperand::MOStore, 8, Align(8), + AAMDNodes(), nullptr, SyncScope::System, AtomicOrdering::Unordered); auto Ptr = B.buildUndef(P0); B.buildAtomicRMWFAdd(S64, Ptr, Copies[0], *MMO); diff --git a/llvm/unittests/CodeGen/MachineInstrTest.cpp b/llvm/unittests/CodeGen/MachineInstrTest.cpp --- a/llvm/unittests/CodeGen/MachineInstrTest.cpp +++ b/llvm/unittests/CodeGen/MachineInstrTest.cpp @@ -261,7 +261,7 @@ auto MAI = MCAsmInfo(); auto MC = createMCContext(&MAI); auto MMO = MF->getMachineMemOperand(MachinePointerInfo(), - MachineMemOperand::MOLoad, 8, 8); + MachineMemOperand::MOLoad, 8, Align(8)); SmallVector MMOs; MMOs.push_back(MMO); MCSymbol *Sym1 = MC->createTempSymbol("pre_label", false); @@ -308,7 +308,7 @@ auto MAI = MCAsmInfo(); auto MC = createMCContext(&MAI); auto MMO = MF->getMachineMemOperand(MachinePointerInfo(), - MachineMemOperand::MOLoad, 8, 8); + MachineMemOperand::MOLoad, 8, Align(8)); SmallVector MMOs; MMOs.push_back(MMO); MCSymbol *Sym1 = MC->createTempSymbol("pre_label", false); @@ -345,7 +345,7 @@ auto MAI = MCAsmInfo(); auto MC = createMCContext(&MAI); auto MMO = MF->getMachineMemOperand(MachinePointerInfo(), - MachineMemOperand::MOLoad, 8, 8); + MachineMemOperand::MOLoad, 8, Align(8)); SmallVector MMOs; MMOs.push_back(MMO); MMOs.push_back(MMO);