diff --git a/llvm/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp b/llvm/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp --- a/llvm/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp +++ b/llvm/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp @@ -60,6 +60,13 @@ createPPCLEDisassembler); } +static DecodeStatus decodeCondBrOperand(MCInst &Inst, unsigned Imm, + uint64_t /*Addr*/, + const void * /*Decoder*/) { + Inst.addOperand(MCOperand::createImm(SignExtend32<14>(Imm))); + return MCDisassembler::Success; +} + static DecodeStatus DecodePCRel24BranchTarget(MCInst &Inst, unsigned Imm, uint64_t Addr, const void *Decoder) { diff --git a/llvm/lib/Target/PowerPC/PPCInstrInfo.td b/llvm/lib/Target/PowerPC/PPCInstrInfo.td --- a/llvm/lib/Target/PowerPC/PPCInstrInfo.td +++ b/llvm/lib/Target/PowerPC/PPCInstrInfo.td @@ -764,7 +764,9 @@ def condbrtarget : Operand { let PrintMethod = "printBranchOperand"; let EncoderMethod = "getCondBrEncoding"; + let DecoderMethod = "decodeCondBrOperand"; let ParserMatchClass = PPCCondBrAsmOperand; + let OperandType = "OPERAND_PCREL"; } def abscondbrtarget : Operand { let PrintMethod = "printAbsBranchOperand"; diff --git a/llvm/test/CodeGen/PowerPC/aix-return55.ll b/llvm/test/CodeGen/PowerPC/aix-return55.ll --- a/llvm/test/CodeGen/PowerPC/aix-return55.ll +++ b/llvm/test/CodeGen/PowerPC/aix-return55.ll @@ -31,7 +31,7 @@ ;CHECKOBJ-NEXT: 18: 00 01 23 45 ;CHECKOBJ-NEXT: 1c: 67 8a bc de oris 10, 28, 48350{{[[:space:]] *}} ;CHECKOBJ-NEXT: 00000020 : -;CHECKOBJ-NEXT: 20: 40 14 00 00 bdnzf 20, .+0 +;CHECKOBJ-NEXT: 20: 40 14 00 00 bdnzf 20, 0x20 ;CHECKOBJ-NEXT: 24: 00 00 00 00 {{[[:space:]] *}} ;CHECKOBJ-NEXT: 00000028 : ;CHECKOBJ-NEXT: 28: 00 00 00 00 diff --git a/llvm/test/CodeGen/PowerPC/alignlongjumptest.mir b/llvm/test/CodeGen/PowerPC/alignlongjumptest.mir --- a/llvm/test/CodeGen/PowerPC/alignlongjumptest.mir +++ b/llvm/test/CodeGen/PowerPC/alignlongjumptest.mir @@ -70,12 +70,12 @@ ... # Check for the long branch. -# CHECK-LE: 08 00 82 4{{[01]}} b{{[tf]}} 2, .+8 +# CHECK-LE: 08 00 82 4{{[01]}} b{{[tf]}} 2, 0xc # CHECK-LE-NEXT: fc 7f 00 48 b .+32764 # CHECK-LE-DAG: paddi 3, 3, 13, 0 # CHECK-LE-DAG: paddi 3, 3, 21, 0 # CHECK-LE: blr -# CHECK-BE: 4{{[01]}} 82 00 08 b{{[tf]}} 2, .+8 +# CHECK-BE: 4{{[01]}} 82 00 08 b{{[tf]}} 2, 0xc # CHECK-BE-NEXT: 48 00 7f fc b .+32764 # CHECK-BE-DAG: paddi 3, 3, 13, 0 # CHECK-BE-DAG: paddi 3, 3, 21, 0 diff --git a/llvm/test/MC/PowerPC/ppc64-prefix-align.s b/llvm/test/MC/PowerPC/ppc64-prefix-align.s --- a/llvm/test/MC/PowerPC/ppc64-prefix-align.s +++ b/llvm/test/MC/PowerPC/ppc64-prefix-align.s @@ -13,10 +13,10 @@ beq 0, LAB1 # 4 beq 1, LAB2 # 8 -# CHECK-BE: 0: 41 82 00 c0 bt 2, .+192 -# CHECK-BE-NEXT: 4: 41 86 00 f8 bt 6, .+248 -# CHECK-LE: 0: c0 00 82 41 bt 2, .+192 -# CHECK-LE-NEXT: 4: f8 00 86 41 bt 6, .+248 +# CHECK-BE: 0: 41 82 00 c0 bt 2, 0xc0 +# CHECK-BE-NEXT: 4: 41 86 00 f8 bt 6, 0xfc +# CHECK-LE: 0: c0 00 82 41 bt 2, 0xc0 +# CHECK-LE-NEXT: 4: f8 00 86 41 bt 6, 0xfc paddi 1, 2, 8589934576, 0 # 16 paddi 1, 2, 8589934576, 0 # 24 paddi 1, 2, 8589934576, 0 # 32 diff --git a/llvm/test/tools/llvm-objdump/ELF/PowerPC/branch-offset.s b/llvm/test/tools/llvm-objdump/ELF/PowerPC/branch-offset.s --- a/llvm/test/tools/llvm-objdump/ELF/PowerPC/branch-offset.s +++ b/llvm/test/tools/llvm-objdump/ELF/PowerPC/branch-offset.s @@ -29,7 +29,9 @@ b .+4 # CHECK-LABEL: : -# CHECK-NEXT: bt 2, .+65532 +# CHECK-NEXT: 18: bt 2, 0x14 +# CHECK-NEXT: 1c: bt 1, 0x20 bt: bt 2, .-4 + bgt .+4 diff --git a/llvm/test/tools/llvm-objdump/XCOFF/disassemble-all.test b/llvm/test/tools/llvm-objdump/XCOFF/disassemble-all.test --- a/llvm/test/tools/llvm-objdump/XCOFF/disassemble-all.test +++ b/llvm/test/tools/llvm-objdump/XCOFF/disassemble-all.test @@ -48,7 +48,7 @@ CHECK-NEXT: ... CHECK: Disassembly of section .tdata: CHECK: 00000000 : -CHECK-NEXT: 0: 40 09 21 f9 bdnzfl 9, .+8696 +CHECK-NEXT: 0: 40 09 21 f9 bdnzfl 9, 0x21f8 CHECK-NEXT: 4: f0 1b 86 6e CHECK: Disassembly of section .tbss: CHECK: 00000008 :