Index: lld/test/ELF/arm-thumb-adr-err.s =================================================================== --- lld/test/ELF/arm-thumb-adr-err.s +++ /dev/null @@ -1,31 +0,0 @@ -// REQUIRES: arm -// RUN: llvm-mc -g --triple=thumbv6m-none-eabi --arm-add-build-attributes -filetype=obj -o %t.o %s -// RUN: not ld.lld %t.o -o /dev/null 2>&1 | FileCheck %s - - .section .text.0, "ax", %progbits - .balign 4 - .thumb_func -low: - bx lr - - .section .text.1, "ax", %progbits - .balign 2 - .global _start - .thumb_func -_start: -// CHECK: {{.*}}.s:[[# @LINE+1]]:(.text.1+0x0): relocation R_ARM_THM_PC8 out of range: 18446744073709551612 is not in [0, 1023] - adr r0, low -// CHECK: {{.*}}.s:[[# @LINE+1]]:(.text.1+0x2): improper alignment for relocation R_ARM_THM_PC8: 0x2 is not aligned to 4 bytes - adr r1, unaligned -// CHECK: {{.*}}.s:[[# @LINE+1]]:(.text.1+0x4): relocation R_ARM_THM_PC8 out of range: 1024 is not in [0, 1023] - adr r2, range - - .section .text.2, "ax", %progbits - .balign 4 - nop - .thumb_func -unaligned: - bx lr - .space 1020 -range: - bx lr Index: lld/test/ELF/arm-thumb-adr-err.test =================================================================== --- /dev/null +++ lld/test/ELF/arm-thumb-adr-err.test @@ -0,0 +1,109 @@ +# REQUIRES: arm +# RUN: yaml2obj %s -o %t.o +# RUN: not ld.lld %t.o -o /dev/null 2>&1 | FileCheck %s + +## Check error conditions for the R_ARM_THM_PC8 relocation. We do this in yaml +## as llvm-mc does not produce the relocation. It is the equivalent of the +## following program. + +## .section .text.0, "ax", %progbits +## .balign 4 +## .thumb_func +## low: +## bx lr + +## .section .text.1, "ax", %progbits +## .balign 2 +## .global _start +## .thumb_func +## _start: +## adr r0, low +## adr r1, unaligned +## adr r2, range + +## .section .text.2, "ax", %progbits +## .balign 4 +## nop +## .thumb_func +## unaligned: +## bx lr +## .space 1020 +## range: +## bx lr + +--- !ELF +FileHeader: + Class: ELFCLASS32 + Data: ELFDATA2LSB + Type: ET_REL + Machine: EM_ARM + Flags: [ EF_ARM_EABI_VER5 ] +Sections: + - Name: .text + Type: SHT_PROGBITS + Flags: [ SHF_ALLOC, SHF_EXECINSTR ] + AddressAlign: 0x0000000000000004 + - Name: .text.0 + Type: SHT_PROGBITS + Flags: [ SHF_ALLOC, SHF_EXECINSTR ] + AddressAlign: 0x0000000000000004 + Content: '7047' + - Name: .text.1 + Type: SHT_PROGBITS + Flags: [ SHF_ALLOC, SHF_EXECINSTR ] + AddressAlign: 0x0000000000000002 + Content: FFA0FFA1FFA2 + - Name: .rel.text.1 + Type: SHT_REL + Link: .symtab + AddressAlign: 0x0000000000000004 + Info: .text.1 + Relocations: + - Symbol: low + Type: R_ARM_THM_PC8 + - Offset: 0x0000000000000002 + Symbol: unaligned + Type: R_ARM_THM_PC8 + - Offset: 0x0000000000000004 + Symbol: range + Type: R_ARM_THM_PC8 + - Name: .text.2 + Type: SHT_PROGBITS + Flags: [ SHF_ALLOC, SHF_EXECINSTR ] + AddressAlign: 0x0000000000000004 + Content: 00BF7047 + - Name: .text.3 + Type: SHT_PROGBITS + Flags: [ SHF_ALLOC, SHF_EXECINSTR ] + AddressAlign: 0x0000000000000001 + Size: 1020 + - Name: .text.4 + Type: SHT_PROGBITS + Flags: [ SHF_ALLOC, SHF_EXECINSTR ] + AddressAlign: 0x0000000000000001 + Content: '7047' + - Name: .ARM.attributes + Type: SHT_ARM_ATTRIBUTES + AddressAlign: 0x0000000000000001 + Content: 4119000000616561626900010F000000060C074D080009012200 +Symbols: + - Name: low + Type: STT_FUNC + Section: .text.0 + Value: 0x0000000000000001 + - Name: range + Section: .text.4 + - Name: unaligned + Type: STT_FUNC + Section: .text.2 + Value: 0x0000000000000003 + - Name: _start + Type: STT_FUNC + Section: .text.1 + Binding: STB_GLOBAL + Value: 0x0000000000000001 + + +# CHECK: {{.*}}.o:(.text.1+0x0): relocation R_ARM_THM_PC8 out of range: 18446744073709551612 is not in [0, 1023] +# CHECK: {{.*}}.o:(.text.1+0x2): improper alignment for relocation R_ARM_THM_PC8: 0x2 is not aligned to 4 bytes +# CHECK: {{.*}}.o:(.text.1+0x4): relocation R_ARM_THM_PC8 out of range: 1024 is not in [0, 1023] Index: lld/test/ELF/arm-thumb-adr.s =================================================================== --- lld/test/ELF/arm-thumb-adr.s +++ /dev/null @@ -1,41 +0,0 @@ -// REQUIRES: arm -// RUN: llvm-mc --triple=thumbv6m-none-eabi --arm-add-build-attributes -filetype=obj -o %t.o %s -// RUN: ld.lld %t.o -o %t -// RUN: llvm-objdump -d --no-show-raw-insn %t --triple=thumbv6m-none-eabi | FileCheck %s - -/// Test R_ARM_THM_PC8 as used in the adr pseudo instruction. Only positive -/// 4-byte aligned offsets are permitted. - .section .text.01, "ax", %progbits - .balign 4 - .global _start - .thumb_func -_start: - adr r0, target1 - adr r1, target2 - - .section .text.02, "ax", %progbits - .balign 4 - .global target1 - .type target1, %function -target1: - nop - bx lr - .section .text.03, "ax", %progbits - .balign 4 - .space 1016 - .type target2, %function -target2: - nop - bx lr - -// CHECK: 000110b4 <_start>: -// CHECK-NEXT: 110b4: adr r0, #0 -// CHECK-NEXT: 110b6: adr r1, #1020 - -// CHECK: 000110b8 : -// CHECK-NEXT: 110b8: nop -// CHECK-NEXT: 110ba: bx lr - -// CHECK: 000114b4 : -// CHECK-NEXT: 114b4: nop -// CHECK-NEXT: 114b6: bx lr Index: lld/test/ELF/arm-thumb-adr.test =================================================================== --- /dev/null +++ lld/test/ELF/arm-thumb-adr.test @@ -0,0 +1,109 @@ +# REQUIRES: arm +# RUN: yaml2obj %s -o %t.o +# RUN: ld.lld %t.o -o %t +# RUN: llvm-objdump -d --no-show-raw-insn %t --triple=thumbv6m-none-eabi | FileCheck %s + +## Test R_ARM_THM_PC8 as used in the adr pseudo instruction. Only positive +## 4-byte aligned offsets are permitted. We use yaml2obj as llvm-mc does not +## produce the relocation. It is the equivalent of the following program. + +## .section .text.01, "ax", %progbits +## .balign 4 +## .global _start +## .thumb_func +## _start: +## adr r0, target1 +## adr r1, target2 + +## .section .text.02, "ax", %progbits +## .balign 4 +## .global target1 +## .type target1, %function +## target1: +## nop +## bx lr +## .section .text.03, "ax", %progbits +## .balign 4 +## .space 1016 + +## .section .text.04, "ax", %progbits +## .balign 2 +## .type target2, %function +## target2: +## nop +## bx lr + +--- !ELF +FileHeader: + Class: ELFCLASS32 + Data: ELFDATA2LSB + Type: ET_REL + Machine: EM_ARM + Flags: [ EF_ARM_EABI_VER5 ] +Sections: + - Name: .text + Type: SHT_PROGBITS + Flags: [ SHF_ALLOC, SHF_EXECINSTR ] + AddressAlign: 0x0000000000000004 + - Name: .text.01 + Type: SHT_PROGBITS + Flags: [ SHF_ALLOC, SHF_EXECINSTR ] + AddressAlign: 0x0000000000000004 + Content: FFA0FFA1 + - Name: .rel.text.01 + Type: SHT_REL + Link: .symtab + AddressAlign: 0x0000000000000004 + Info: .text.01 + Relocations: + - Symbol: target1 + Type: R_ARM_THM_PC8 + - Offset: 0x0000000000000002 + Symbol: target2 + Type: R_ARM_THM_PC8 + - Name: .text.02 + Type: SHT_PROGBITS + Flags: [ SHF_ALLOC, SHF_EXECINSTR ] + AddressAlign: 0x0000000000000004 + Content: 00BF7047 + - Name: .text.03 + Type: SHT_PROGBITS + Flags: [ SHF_ALLOC, SHF_EXECINSTR ] + AddressAlign: 0x0000000000000004 + Size: 1016 + - Name: .text.04 + Type: SHT_PROGBITS + Flags: [ SHF_ALLOC, SHF_EXECINSTR ] + AddressAlign: 0x0000000000000002 + Content: 00BF7047 + - Name: .ARM.attributes + Type: SHT_ARM_ATTRIBUTES + AddressAlign: 0x0000000000000001 + Content: 4119000000616561626900010F000000060C074D080009012200 +Symbols: + - Name: target2 + Type: STT_FUNC + Section: .text.04 + Value: 0x0000000000000001 + - Name: _start + Type: STT_FUNC + Section: .text.01 + Binding: STB_GLOBAL + Value: 0x0000000000000001 + - Name: target1 + Type: STT_FUNC + Section: .text.02 + Binding: STB_GLOBAL + Value: 0x0000000000000001 + +# CHECK: 000110b4 <_start>: +# CHECK-NEXT: 110b4: adr r0, #0 +# CHECK-NEXT: 110b6: adr r1, #1020 + +# CHECK: 000110b8 : +# CHECK-NEXT: 110b8: nop +# CHECK-NEXT: 110ba: bx lr + +# CHECK: 000114b4 : +# CHECK-NEXT: 114b4: nop +# CHECK-NEXT: 114b6: bx lr Index: lld/test/ELF/arm-thumb-ldrlit-err.s =================================================================== --- lld/test/ELF/arm-thumb-ldrlit-err.s +++ /dev/null @@ -1,31 +0,0 @@ -// REQUIRES: arm -// RUN: llvm-mc -g --triple=thumbv6m-none-eabi --arm-add-build-attributes -filetype=obj -o %t.o %s -// RUN: not ld.lld %t.o -o /dev/null 2>&1 | FileCheck %s - - .section .text.0, "ax", %progbits - .balign 4 - .thumb_func -low: - bx lr - - .section .text.1, "ax", %progbits - .balign 2 - .global _start - .thumb_func -_start: -// CHECK: {{.*}}.s:[[# @LINE+1]]:(.text.1+0x0): relocation R_ARM_THM_PC8 out of range: 18446744073709551612 is not in [0, 1023] - ldr r0, low -// CHECK: {{.*}}.s:[[# @LINE+1]]:(.text.1+0x2): improper alignment for relocation R_ARM_THM_PC8: 0x2 is not aligned to 4 bytes - ldr r1, unaligned -// CHECK: {{.*}}.s:[[# @LINE+1]]:(.text.1+0x4): relocation R_ARM_THM_PC8 out of range: 1024 is not in [0, 1023] - ldr r2, range - - .section .text.2, "ax", %progbits - .balign 4 - nop - .thumb_func -unaligned: - bx lr - .space 1020 -range: - bx lr Index: lld/test/ELF/arm-thumb-ldrlit-err.test =================================================================== --- /dev/null +++ lld/test/ELF/arm-thumb-ldrlit-err.test @@ -0,0 +1,113 @@ +# REQUIRES: arm +# RUN: yaml2obj %s -o %t.o +# RUN: not ld.lld %t.o -o /dev/null 2>&1 | FileCheck %s + +## Check error conditions for the R_ARM_THM_PC8 relocation. We do this in yaml +## as llvm-mc does not produce the relocation. It is the equivalent of the +## following program. + +## .section .text.0, "ax", %progbits +## .balign 4 +## .thumb_func +## low: +## bx lr + +## .section .text.1, "ax", %progbits +## .balign 2 +## .global _start +## .thumb_func +## _start: +## ldr r0, low +## ldr r1, unaligned +## ldr r2, range + +## .section .text.2, "ax", %progbits +## .balign 4 +## nop +## .thumb_func +## unaligned: +## bx lr + +## .section .text.3, "ax", %progbits +## .space 1020 + +## .section .text.4, "ax", %progbits +## range: +## bx lr + +--- !ELF +FileHeader: + Class: ELFCLASS32 + Data: ELFDATA2LSB + Type: ET_REL + Machine: EM_ARM + Flags: [ EF_ARM_EABI_VER5 ] +Sections: + - Name: .text + Type: SHT_PROGBITS + Flags: [ SHF_ALLOC, SHF_EXECINSTR ] + AddressAlign: 0x0000000000000004 + - Name: .text.0 + Type: SHT_PROGBITS + Flags: [ SHF_ALLOC, SHF_EXECINSTR ] + AddressAlign: 0x0000000000000004 + Content: '7047' + - Name: .text.1 + Type: SHT_PROGBITS + Flags: [ SHF_ALLOC, SHF_EXECINSTR ] + AddressAlign: 0x0000000000000002 + Content: FF48FF49FF4A + - Name: .rel.text.1 + Type: SHT_REL + Link: .symtab + AddressAlign: 0x0000000000000004 + Info: .text.1 + Relocations: + - Symbol: low + Type: R_ARM_THM_PC8 + - Offset: 0x0000000000000002 + Symbol: unaligned + Type: R_ARM_THM_PC8 + - Offset: 0x0000000000000004 + Symbol: range + Type: R_ARM_THM_PC8 + - Name: .text.2 + Type: SHT_PROGBITS + Flags: [ SHF_ALLOC, SHF_EXECINSTR ] + AddressAlign: 0x0000000000000004 + Content: 00BF7047 + - Name: .text.3 + Type: SHT_PROGBITS + Flags: [ SHF_ALLOC, SHF_EXECINSTR ] + AddressAlign: 0x0000000000000001 + Size: 1020 + - Name: .text.4 + Type: SHT_PROGBITS + Flags: [ SHF_ALLOC, SHF_EXECINSTR ] + AddressAlign: 0x0000000000000001 + Content: '7047' + - Name: .ARM.attributes + Type: SHT_ARM_ATTRIBUTES + AddressAlign: 0x0000000000000001 + Content: 4119000000616561626900010F000000060C074D080009012200 +Symbols: + - Name: low + Type: STT_FUNC + Section: .text.0 + Value: 0x0000000000000001 + - Name: range + Section: .text.4 + - Name: unaligned + Type: STT_FUNC + Section: .text.2 + Value: 0x0000000000000003 + - Name: _start + Type: STT_FUNC + Section: .text.1 + Binding: STB_GLOBAL + Value: 0x0000000000000001 + + +# CHECK: {{.*}}.o:(.text.1+0x0): relocation R_ARM_THM_PC8 out of range: 18446744073709551612 is not in [0, 1023] +# CHECK: {{.*}}.o:(.text.1+0x2): improper alignment for relocation R_ARM_THM_PC8: 0x2 is not aligned to 4 bytes +# CHECK: {{.*}}.o:(.text.1+0x4): relocation R_ARM_THM_PC8 out of range: 1024 is not in [0, 1023] Index: lld/test/ELF/arm-thumb-ldrlit.s =================================================================== --- lld/test/ELF/arm-thumb-ldrlit.s +++ /dev/null @@ -1,41 +0,0 @@ -// REQUIRES: arm -// RUN: llvm-mc --triple=thumbv6m-none-eabi --arm-add-build-attributes -filetype=obj -o %t.o %s -// RUN: ld.lld %t.o -o %t -// RUN: llvm-objdump -d --no-show-raw-insn %t --triple=thumbv6m-none-eabi | FileCheck %s - -/// Test R_ARM_THM_PC8 as used in the ldr pseudo instruction. Only positive -/// 4-byte aligned offsets are permitted. - .section .text.01, "ax", %progbits - .balign 4 - .global _start - .thumb_func -_start: - ldr r0, target1 - ldr r1, target2 - - .section .text.02, "ax", %progbits - .balign 4 - .global target1 - .type target1, %function -target1: - nop - bx lr - .section .text.03, "ax", %progbits - .balign 4 - .space 1016 - .type target2, %function -target2: - nop - bx lr - -// CHECK: 000110b4 <_start>: -// CHECK-NEXT: 110b4: ldr r0, [pc, #0] -// CHECK-NEXT: 110b6: ldr r1, [pc, #1020] - -// CHECK: 000110b8 : -// CHECK-NEXT: 110b8: nop -// CHECK-NEXT: 110ba: bx lr - -// CHECK: 000114b4 : -// CHECK-NEXT: 114b4: nop -// CHECK-NEXT: 114b6: bx lr Index: lld/test/ELF/arm-thumb-ldrlit.test =================================================================== --- /dev/null +++ lld/test/ELF/arm-thumb-ldrlit.test @@ -0,0 +1,110 @@ +# REQUIRES: arm +# RUN: yaml2obj %s -o %t.o +# RUN: ld.lld %t.o -o %t +# RUN: llvm-objdump -d --no-show-raw-insn %t --triple=thumbv6m-none-eabi | FileCheck %s + +## Test R_ARM_THM_PC8 as used in the ldr pseudo instruction. Only positive +## 4-byte aligned offsets are permitted. We use yaml2obj as llvm-mc does not +## produce the relocation. It is the equivalent of the following program. + +## .section .text.01, "ax", %progbits +## .balign 4 +## .global _start +## .thumb_func +## _start: +## ldr r0, target1 +## ldr r1, target2 + +## .section .text.02, "ax", %progbits +## .balign 4 +## .global target1 +## .type target1, %function +## target1: +## nop +## bx lr +## .section .text.03, "ax", %progbits +## .balign 4 +## .space 1016 + +## .section .text.04, "ax", %progbits +## .balign 2 +## .type target2, %function +## target2: +## nop +## bx lr + +--- !ELF +FileHeader: + Class: ELFCLASS32 + Data: ELFDATA2LSB + Type: ET_REL + Machine: EM_ARM + Flags: [ EF_ARM_EABI_VER5 ] +Sections: + - Name: .text + Type: SHT_PROGBITS + Flags: [ SHF_ALLOC, SHF_EXECINSTR ] + AddressAlign: 0x0000000000000004 + - Name: .text.01 + Type: SHT_PROGBITS + Flags: [ SHF_ALLOC, SHF_EXECINSTR ] + AddressAlign: 0x0000000000000004 + Content: FF48FF49 + - Name: .rel.text.01 + Type: SHT_REL + Link: .symtab + AddressAlign: 0x0000000000000004 + Info: .text.01 + Relocations: + - Symbol: target1 + Type: R_ARM_THM_PC8 + - Offset: 0x0000000000000002 + Symbol: target2 + Type: R_ARM_THM_PC8 + - Name: .text.02 + Type: SHT_PROGBITS + Flags: [ SHF_ALLOC, SHF_EXECINSTR ] + AddressAlign: 0x0000000000000004 + Content: 00BF7047 + - Name: .text.03 + Type: SHT_PROGBITS + Flags: [ SHF_ALLOC, SHF_EXECINSTR ] + AddressAlign: 0x0000000000000004 + Size: 1016 + - Name: .text.04 + Type: SHT_PROGBITS + Flags: [ SHF_ALLOC, SHF_EXECINSTR ] + AddressAlign: 0x0000000000000002 + Content: 00BF7047 + - Name: .ARM.attributes + Type: SHT_ARM_ATTRIBUTES + AddressAlign: 0x0000000000000001 + Content: 4119000000616561626900010F000000060C074D080009012200 +Symbols: + - Name: target2 + Type: STT_FUNC + Section: .text.04 + Value: 0x0000000000000001 + - Name: _start + Type: STT_FUNC + Section: .text.01 + Binding: STB_GLOBAL + Value: 0x0000000000000001 + - Name: target1 + Type: STT_FUNC + Section: .text.02 + Binding: STB_GLOBAL + Value: 0x0000000000000001 + + +## CHECK: 000110b4 <_start>: +## CHECK-NEXT: 110b4: ldr r0, [pc, #0] +## CHECK-NEXT: 110b6: ldr r1, [pc, #1020] + +## CHECK: 000110b8 : +## CHECK-NEXT: 110b8: nop +## CHECK-NEXT: 110ba: bx lr + +## CHECK: 000114b4 : +## CHECK-NEXT: 114b4: nop +## CHECK-NEXT: 114b6: bx lr Index: lld/test/ELF/arm-thumb2-adr-err.s =================================================================== --- lld/test/ELF/arm-thumb2-adr-err.s +++ /dev/null @@ -1,26 +0,0 @@ -// REQUIRES: arm -// RUN: llvm-mc -g --triple=thumbv7m-none-eabi --arm-add-build-attributes -filetype=obj -o %t.o %s -// RUN: not ld.lld %t.o -o /dev/null 2>&1 | FileCheck %s - - .section .text.0, "ax", %progbits - .thumb_func - .balign 4 -low: - bx lr - nop - nop - - .section .text.1, "ax", %progbits - .global _start - .thumb_func -_start: -// CHECK: {{.*}}.s:[[# @LINE+1]]:(.text.1+0x0): relocation R_ARM_THM_ALU_PREL_11_0 out of range: 4098 is not in [0, 4095] - adr.w r0, low - 4091 -// CHECK: {{.*}}.s:[[# @LINE+1]]:(.text.1+0x4): relocation R_ARM_THM_ALU_PREL_11_0 out of range: 4096 is not in [0, 4095] - adr.w r0, high + 4091 - - .section .text.2 - .thumb_func - .balign 4 -high: - bx lr Index: lld/test/ELF/arm-thumb2-adr-err.test =================================================================== --- /dev/null +++ lld/test/ELF/arm-thumb2-adr-err.test @@ -0,0 +1,88 @@ +# REQUIRES: arm +# RUN: yaml2obj %s -o %t.o +# RUN: not ld.lld %t.o -o /dev/null 2>&1 | FileCheck %s + +## Test error cases of R_ARM_THM_PC12 as used in the adr pseudo instruction. +## We use yaml2obj as llvm-mc does not produce the relocation. It is the +## equivalent of the following program. + +## .section .text.0, "ax", %progbits +## .thumb_func +## .balign 4 +## low: +## bx lr +## nop +## nop + +## .section .text.1, "ax", %progbits +## .global _start +## .thumb_func +## _start: +## adr.w r0, low - 4091 +## adr.w r0, high + 4091 + +## .section .text.2 +## .thumb_func +## .balign 4 +## high: +## bx lr + +--- !ELF +FileHeader: + Class: ELFCLASS32 + Data: ELFDATA2LSB + Type: ET_REL + Machine: EM_ARM + Flags: [ EF_ARM_EABI_VER5 ] +Sections: + - Name: .text + Type: SHT_PROGBITS + Flags: [ SHF_ALLOC, SHF_EXECINSTR ] + AddressAlign: 0x0000000000000004 + - Name: .text.0 + Type: SHT_PROGBITS + Flags: [ SHF_ALLOC, SHF_EXECINSTR ] + AddressAlign: 0x0000000000000004 + Content: 704700BF00BF + - Name: .text.1 + Type: SHT_PROGBITS + Flags: [ SHF_ALLOC, SHF_EXECINSTR ] + AddressAlign: 0x0000000000000001 + Content: AFF6FF700FF6F770 + - Name: .rel.text.1 + Type: SHT_REL + Link: .symtab + AddressAlign: 0x0000000000000004 + Info: .text.1 + Relocations: + - Symbol: low + Type: R_ARM_THM_ALU_PREL_11_0 + - Offset: 0x0000000000000004 + Symbol: high + Type: R_ARM_THM_ALU_PREL_11_0 + - Name: .text.2 + Type: SHT_PROGBITS + Flags: [ SHF_ALLOC, SHF_EXECINSTR ] + AddressAlign: 0x0000000000000004 + Content: '7047' + - Name: .ARM.attributes + Type: SHT_ARM_ATTRIBUTES + AddressAlign: 0x0000000000000001 + Content: 4119000000616561626900010F000000060A074D080009022201 +Symbols: + - Name: high + Type: STT_FUNC + Section: .text.2 + Value: 0x0000000000000001 + - Name: low + Type: STT_FUNC + Section: .text.0 + Value: 0x0000000000000001 + - Name: _start + Type: STT_FUNC + Section: .text.1 + Binding: STB_GLOBAL + Value: 0x0000000000000001 + +# CHECK: {{.*}}.o:(.text.1+0x0): relocation R_ARM_THM_ALU_PREL_11_0 out of range: 4098 is not in [0, 4095] +# CHECK: {{.*}}.o:(.text.1+0x4): relocation R_ARM_THM_ALU_PREL_11_0 out of range: 4096 is not in [0, 4095] Index: lld/test/ELF/arm-thumb2-adr.s =================================================================== --- lld/test/ELF/arm-thumb2-adr.s +++ /dev/null @@ -1,157 +0,0 @@ -// REQUIRES: arm -// RUN: llvm-mc --triple=thumbv7m-none-eabi --arm-add-build-attributes -filetype=obj -o %t.o %s -// RUN: echo "SECTIONS { \ -// RUN: .rodata.low 0x8012 : { *(.rodata.low) } \ -// RUN: .text.low 0x8f00 : { *(.text.low) } \ -// RUN: .text.neg 0x9000 : { *(.text.neg) } \ -// RUN: .text.pos 0x10000 : { *(.text.pos) } \ -// RUN: .text.high 0x10100 : { *(.text.high) } \ -// RUN: .data_high 0x1100f : { *(.data.high) } \ -// RUN: } " > %t.script -// RUN: ld.lld --script %t.script %t.o -o %t -// RUN: llvm-readobj --symbols %t | FileCheck %s --check-prefix=SYMS -// RUN: llvm-objdump -d --no-show-raw-insn --triple=thumbv7m-none-eabi %t -// RUN: llvm-objdump -d --no-show-raw-insn --triple=thumbv7m-none-eabi %t | FileCheck %s - -/// Test the various legal cases for the R_ARM_THM_ALU_PREL_11_0 relocation -/// Interesting things to note -/// Range is +- 4095 bytes -/// The expression is S + A - Pa where Pa is AlignDown(PC, 4) so we will use -/// 2-byte nops to make some of the adr psuedo instructions 2-byte aligned. - .section .rodata.low, "a", %progbits -dat1: - .byte 0 -dat2: - .byte 1 -dat3: - .byte 2 -dat4: - .byte 3 - - .section .text.low, "ax", %progbits - .balign 4 - .global target1 - .type target1, %function -target1: - bx lr - .type target2, %function -target2: - bx lr - - .section .text.neg, "ax", %progbits - .balign 4 - .global _start - .thumb_func -_start: - nop - adr.w r0, dat1 - adr.w r1, dat2 - nop - adr.w r2, dat3 - adr.w r3, dat4 - .balign 4 - adr.w r0, target1 - nop - adr.w r1, target2 - - .section .text.pos, "ax", %progbits - .balign 4 - .global pos - .thumb_func -pos: - adr.w r2, target3 - nop - adr.w r3, target4 - .balign 4 - adr.w r0, dat5 - adr.w r1, dat6 - nop - adr.w r2, dat7 - adr.w r3, dat8 -/// positive addend in instruction, all others are -4 (PC bias) - adr.w r4, dat5 + 8 - - .section .text.high, "ax", %progbits - .balign 4 - .thumb_func - .global target3 -target3: - bx lr - .thumb_func -target4: - bx lr - - .section .data.high, "aw", %progbits -dat5: - .byte 0 -dat6: - .byte 1 -dat7: - .byte 2 -dat8: - .byte 3 - -// SYMS: Name: dat1 -// SYMS-NEXT: Value: 0x8012 -// SYMS: Name: dat2 -// SYMS-NEXT: Value: 0x8013 -// SYMS: Name: dat3 -// SYMS-NEXT: Value: 0x8014 -// SYMS: Name: dat4 -// SYMS-NEXT: Value: 0x8015 - -// CHECK: 00008f00 : -// CHECK-NEXT: 8f00: bx lr -// CHECK: 00008f02 : -// CHECK-NEXT: 8f02: bx lr - -// CHECK: 00009000 <_start>: -// CHECK-NEXT: 9000: nop -/// AlignDown(0x9002+4, 4) - 0xff2 = 0x8012 -// CHECK-NEXT: 9002: adr.w r0, #-4082 -/// AlignDown(0x9006+4, 4) - 0xff5 = 0x8013 -// CHECK-NEXT: 9006: adr.w r1, #-4085 -// CHECK-NEXT: 900a: nop -/// AlignDown(0x900c+4, 4) - 0xffc = 0x8014 -// CHECK-NEXT: 900c: adr.w r2, #-4092 -/// AlignDown(0x9010+4, 4) - 0xfff = 0x8015 -// CHECK-NEXT: 9010: adr.w r3, #-4095 -/// AlignDown(0x9014+4, 4) - 0x117 = 0x8f01 -// CHECK-NEXT: 9014: adr.w r0, #-279 -// CHECK-NEXT: 9018: nop -/// AlignDown(0x901a+4, 4) - 0x119 = 0x8f03 -// CHECK-NEXT: 901a: adr.w r1, #-281 - -// CHECK: 00010000 : -/// AlignDown(0x10000+4, 4) + 0xfd = 0x10101 -// CHECK-NEXT: 10000: adr.w r2, #253 -// CHECK-NEXT: 10004: nop -/// AlignDown(0x10006+4, 4) + 0xfb = 0x10103 -// CHECK-NEXT: 10006: adr.w r3, #251 -// CHECK-NEXT: 1000a: nop -/// AlignDown(0x1000c+4, 4) + 0xfff = 0x1100f -// CHECK-NEXT: 1000c: adr.w r0, #4095 -/// AlignDown(0x10010+4, 4) + 0xffc = 0x11010 -// CHECK-NEXT: 10010: adr.w r1, #4092 -// CHECK-NEXT: 10014: nop -/// AlignDown(0x10016+4, 4) + 0xff9 = 0x11011 -// CHECK-NEXT: 10016: adr.w r2, #4089 -/// AlignDown(0x1001a+4, 4) + 0xff6 = 0x11012 -// CHECK-NEXT: 1001a: adr.w r3, #4086 -/// AlignDown(0x1001e+4, 4) + 0xff7 = 0x11017 = dat5 + 8 -// CHECK-NEXT: 1001e: adr.w r4, #4087 - -// CHECK: 00010100 : -// CHECK-NEXT: 10100: bx lr - -// CHECK: 00010102 : -// CHECK-NEXT: 10102: bx lr - -// SYMS: Name: dat5 -// SYMS-NEXT: Value: 0x1100F -// SYMS: Name: dat6 -// SYMS-NEXT: Value: 0x11010 -// SYMS: Name: dat7 -// SYMS-NEXT: Value: 0x11011 -// SYMS: Name: dat8 -// SYMS-NEXT: Value: 0x11012 Index: lld/test/ELF/arm-thumb2-adr.test =================================================================== --- /dev/null +++ lld/test/ELF/arm-thumb2-adr.test @@ -0,0 +1,307 @@ +# REQUIRES: arm +# RUN: yaml2obj %s -o %t.o +# RUN: echo "SECTIONS { \ +# RUN: .rodata.low 0x8012 : { *(.rodata.low) } \ +# RUN: .text.low 0x8f00 : { *(.text.low) } \ +# RUN: .text.neg 0x9000 : { *(.text.neg) } \ +# RUN: .text.pos 0x10000 : { *(.text.pos) } \ +# RUN: .text.high 0x10100 : { *(.text.high) } \ +# RUN: .data_high 0x1100f : { *(.data.high) } \ +# RUN: } " > %t.script +# RUN: ld.lld --script %t.script %t.o -o %t +# RUN: llvm-readobj --symbols %t | FileCheck %s --check-prefix=SYMS +# RUN: llvm-objdump -d --no-show-raw-insn --triple=thumbv7m-none-eabi %t | FileCheck %s + +## Test the various legal cases for the R_ARM_THM_ALU_PREL_11_0 relocation +## Interesting things to note +## Range is +- 4095 bytes +## The expression is S + A - Pa where Pa is AlignDown(PC, 4) so we will use +## 2-byte nops to make some of the adr psuedo instructions 2-byte aligned. +## We use yaml2obj as llvm-mc does not produce the relocation. It is the +## equivalent of the following program. + +## .section .rodata.low, "a", %progbits +## dat1: +## .byte 0 +## dat2: +## .byte 1 +## dat3: +## .byte 2 +## dat4: +## .byte 3 + +## .section .text.low, "ax", %progbits +## .balign 4 +## .global target1 +## .type target1, %function +## target1: +## bx lr +## .type target2, %function +## target2: +## bx lr + +## .section .text.neg, "ax", %progbits +## .balign 4 +## .global _start +## .thumb_func +## _start: +## nop +## adr.w r0, dat1 +## adr.w r1, dat2 +## nop +## adr.w r2, dat3 +## adr.w r3, dat4 +## .balign 4 +## adr.w r0, target1 +## nop +## adr.w r1, target2 + +## .section .text.pos, "ax", %progbits +## .balign 4 +## .global pos +## .thumb_func +## pos: +## adr.w r2, target3 +## nop +## adr.w r3, target4 +## .balign 4 +## adr.w r0, dat5 +## adr.w r1, dat6 +## nop +## adr.w r2, dat7 +## adr.w r3, dat8 +## ## positive addend in instruction, all others are -4 (PC bias) +## adr.w r4, dat5 + 8 + +## .section .text.high, "ax", %progbits +## .balign 4 +## .thumb_func +## .global target3 +## target3: +## bx lr +## .thumb_func +## target4: +## bx lr + +## .section .data.high, "aw", %progbits +## dat5: +## .byte 0 +## dat6: +## .byte 1 +## dat7: +## .byte 2 +## dat8: +## .byte 3 + +--- !ELF +FileHeader: + Class: ELFCLASS32 + Data: ELFDATA2LSB + Type: ET_REL + Machine: EM_ARM + Flags: [ EF_ARM_EABI_VER5 ] +Sections: + - Name: .text + Type: SHT_PROGBITS + Flags: [ SHF_ALLOC, SHF_EXECINSTR ] + AddressAlign: 0x0000000000000004 + - Name: .rodata.low + Type: SHT_PROGBITS + Flags: [ SHF_ALLOC ] + AddressAlign: 0x0000000000000001 + Content: '00010203' + - Name: .text.low + Type: SHT_PROGBITS + Flags: [ SHF_ALLOC, SHF_EXECINSTR ] + AddressAlign: 0x0000000000000004 + Content: '70477047' + - Name: .text.neg + Type: SHT_PROGBITS + Flags: [ SHF_ALLOC, SHF_EXECINSTR ] + AddressAlign: 0x0000000000000004 + Content: 00BFAFF20400AFF2040100BFAFF20402AFF20403AFF2040000BFAFF20401 + - Name: .rel.text.neg + Type: SHT_REL + Link: .symtab + AddressAlign: 0x0000000000000004 + Info: .text.neg + Relocations: + - Offset: 0x0000000000000002 + Symbol: dat1 + Type: R_ARM_THM_ALU_PREL_11_0 + - Offset: 0x0000000000000006 + Symbol: dat2 + Type: R_ARM_THM_ALU_PREL_11_0 + - Offset: 0x000000000000000C + Symbol: dat3 + Type: R_ARM_THM_ALU_PREL_11_0 + - Offset: 0x0000000000000010 + Symbol: dat4 + Type: R_ARM_THM_ALU_PREL_11_0 + - Offset: 0x0000000000000014 + Symbol: target1 + Type: R_ARM_THM_ALU_PREL_11_0 + - Offset: 0x000000000000001A + Symbol: target2 + Type: R_ARM_THM_ALU_PREL_11_0 + - Name: .text.pos + Type: SHT_PROGBITS + Flags: [ SHF_ALLOC, SHF_EXECINSTR ] + AddressAlign: 0x0000000000000004 + Content: AFF2040200BFAFF2040300BFAFF20400AFF2040100BFAFF20402AFF204030FF20404 + - Name: .rel.text.pos + Type: SHT_REL + Link: .symtab + AddressAlign: 0x0000000000000004 + Info: .text.pos + Relocations: + - Symbol: target3 + Type: R_ARM_THM_ALU_PREL_11_0 + - Offset: 0x0000000000000006 + Symbol: target4 + Type: R_ARM_THM_ALU_PREL_11_0 + - Offset: 0x000000000000000C + Symbol: dat5 + Type: R_ARM_THM_ALU_PREL_11_0 + - Offset: 0x0000000000000010 + Symbol: dat6 + Type: R_ARM_THM_ALU_PREL_11_0 + - Offset: 0x0000000000000016 + Symbol: dat7 + Type: R_ARM_THM_ALU_PREL_11_0 + - Offset: 0x000000000000001A + Symbol: dat8 + Type: R_ARM_THM_ALU_PREL_11_0 + - Offset: 0x000000000000001E + Symbol: dat5 + Type: R_ARM_THM_ALU_PREL_11_0 + - Name: .text.high + Type: SHT_PROGBITS + Flags: [ SHF_ALLOC, SHF_EXECINSTR ] + AddressAlign: 0x0000000000000004 + Content: '70477047' + - Name: .data.high + Type: SHT_PROGBITS + Flags: [ SHF_WRITE, SHF_ALLOC ] + AddressAlign: 0x0000000000000001 + Content: '00010203' + - Name: .ARM.attributes + Type: SHT_ARM_ATTRIBUTES + AddressAlign: 0x0000000000000001 + Content: 4119000000616561626900010F000000060A074D080009022201 +Symbols: + - Name: dat1 + Section: .rodata.low + - Name: dat2 + Section: .rodata.low + Value: 0x0000000000000001 + - Name: dat3 + Section: .rodata.low + Value: 0x0000000000000002 + - Name: dat4 + Section: .rodata.low + Value: 0x0000000000000003 + - Name: dat5 + Section: .data.high + - Name: dat6 + Section: .data.high + Value: 0x0000000000000001 + - Name: dat7 + Section: .data.high + Value: 0x0000000000000002 + - Name: dat8 + Section: .data.high + Value: 0x0000000000000003 + - Name: target2 + Type: STT_FUNC + Section: .text.low + Value: 0x0000000000000003 + - Name: target4 + Type: STT_FUNC + Section: .text.high + Value: 0x0000000000000003 + - Name: _start + Type: STT_FUNC + Section: .text.neg + Binding: STB_GLOBAL + Value: 0x0000000000000001 + - Name: pos + Type: STT_FUNC + Section: .text.pos + Binding: STB_GLOBAL + Value: 0x0000000000000001 + - Name: target1 + Type: STT_FUNC + Section: .text.low + Binding: STB_GLOBAL + Value: 0x0000000000000001 + - Name: target3 + Type: STT_FUNC + Section: .text.high + Binding: STB_GLOBAL + Value: 0x0000000000000001 + +# SYMS: Name: dat1 +# SYMS-NEXT: Value: 0x8012 +# SYMS: Name: dat2 +# SYMS-NEXT: Value: 0x8013 +# SYMS: Name: dat3 +# SYMS-NEXT: Value: 0x8014 +# SYMS: Name: dat4 +# SYMS-NEXT: Value: 0x8015 + +# CHECK: 00008f00 : +# CHECK-NEXT: 8f00: bx lr +# CHECK: 00008f02 : +# CHECK-NEXT: 8f02: bx lr + +# CHECK: 00009000 <_start>: +# CHECK-NEXT: 9000: nop +## AlignDown(0x9002+4, 4) - 0xff2 = 0x8012 +# CHECK-NEXT: 9002: adr.w r0, #-4082 +## AlignDown(0x9006+4, 4) - 0xff5 = 0x8013 +# CHECK-NEXT: 9006: adr.w r1, #-4085 +# CHECK-NEXT: 900a: nop +## AlignDown(0x900c+4, 4) - 0xffc = 0x8014 +# CHECK-NEXT: 900c: adr.w r2, #-4092 +## AlignDown(0x9010+4, 4) - 0xfff = 0x8015 +# CHECK-NEXT: 9010: adr.w r3, #-4095 +## AlignDown(0x9014+4, 4) - 0x117 = 0x8f01 +# CHECK-NEXT: 9014: adr.w r0, #-279 +# CHECK-NEXT: 9018: nop +## AlignDown(0x901a+4, 4) - 0x119 = 0x8f03 +# CHECK-NEXT: 901a: adr.w r1, #-281 + +# CHECK: 00010000 : +## AlignDown(0x10000+4, 4) + 0xfd = 0x10101 +# CHECK-NEXT: 10000: adr.w r2, #253 +# CHECK-NEXT: 10004: nop +## AlignDown(0x10006+4, 4) + 0xfb = 0x10103 +# CHECK-NEXT: 10006: adr.w r3, #251 +# CHECK-NEXT: 1000a: nop +## AlignDown(0x1000c+4, 4) + 0xfff = 0x1100f +# CHECK-NEXT: 1000c: adr.w r0, #4095 +## AlignDown(0x10010+4, 4) + 0xffc = 0x11010 +# CHECK-NEXT: 10010: adr.w r1, #4092 +# CHECK-NEXT: 10014: nop +## AlignDown(0x10016+4, 4) + 0xff9 = 0x11011 +# CHECK-NEXT: 10016: adr.w r2, #4089 +## AlignDown(0x1001a+4, 4) + 0xff6 = 0x11012 +# CHECK-NEXT: 1001a: adr.w r3, #4086 +## AlignDown(0x1001e+4, 4) + 0xff7 = 0x11017 = dat5 + 8 +# CHECK-NEXT: 1001e: adr.w r4, #4087 + +# CHECK: 00010100 : +# CHECK-NEXT: 10100: bx lr + +# CHECK: 00010102 : +# CHECK-NEXT: 10102: bx lr + +# SYMS: Name: dat5 +# SYMS-NEXT: Value: 0x1100F +# SYMS: Name: dat6 +# SYMS-NEXT: Value: 0x11010 +# SYMS: Name: dat7 +# SYMS-NEXT: Value: 0x11011 +# SYMS: Name: dat8 +# SYMS-NEXT: Value: 0x11012 Index: lld/test/ELF/arm-thumb2-ldrlit-err.s =================================================================== --- lld/test/ELF/arm-thumb2-ldrlit-err.s +++ /dev/null @@ -1,26 +0,0 @@ -// REQUIRES: arm -// RUN: llvm-mc -g --triple=thumbv7m-none-eabi --arm-add-build-attributes -filetype=obj -o %t.o %s -// RUN: not ld.lld %t.o -o /dev/null 2>&1 | FileCheck %s - - .section .text.0, "ax", %progbits - .thumb_func - .balign 4 -low: - bx lr - nop - nop - - .section .text.1, "ax", %progbits - .global _start - .thumb_func -_start: -// CHECK: {{.*}}.s:[[# @LINE+1]]:(.text.1+0x0): relocation R_ARM_THM_PC12 out of range: 4098 is not in [0, 4095] - ldr.w r0, low - 4091 -// CHECK: {{.*}}.s:[[# @LINE+1]]:(.text.1+0x4): relocation R_ARM_THM_PC12 out of range: 4096 is not in [0, 4095] - ldr.w r0, high + 4091 - - .section .text.2 - .thumb_func - .balign 4 -high: - bx lr Index: lld/test/ELF/arm-thumb2-ldrlit-err.test =================================================================== --- /dev/null +++ lld/test/ELF/arm-thumb2-ldrlit-err.test @@ -0,0 +1,89 @@ +# REQUIRES: arm +# RUN: yaml2obj %s -o %t.o +# RUN: not ld.lld %t.o -o /dev/null 2>&1 | FileCheck %s + +## Test error cases of R_ARM_THM_PC12 as used in the ldr pseudo instruction. +## We use yaml2obj as llvm-mc does not produce the relocation. It is the +## equivalent of the following program. + +## .section .text.0, "ax", %progbits +## .thumb_func +## .balign 4 +## low: +## bx lr +## nop +## nop + +## .section .text.1, "ax", %progbits +## .global _start +## .thumb_func +## _start: +## ldr.w r0, low - 4091 +## ldr.w r0, high + 4091 + +## .section .text.2 +## .thumb_func +## .balign 4 +## high: +## bx lr + +--- !ELF +FileHeader: + Class: ELFCLASS32 + Data: ELFDATA2LSB + Type: ET_REL + Machine: EM_ARM + Flags: [ EF_ARM_EABI_VER5 ] +Sections: + - Name: .text + Type: SHT_PROGBITS + Flags: [ SHF_ALLOC, SHF_EXECINSTR ] + AddressAlign: 0x0000000000000004 + - Name: .text.0 + Type: SHT_PROGBITS + Flags: [ SHF_ALLOC, SHF_EXECINSTR ] + AddressAlign: 0x0000000000000004 + Content: 704700BF00BF + - Name: .text.1 + Type: SHT_PROGBITS + Flags: [ SHF_ALLOC, SHF_EXECINSTR ] + AddressAlign: 0x0000000000000001 + Content: 5FF8FF0FDFF8F70F + - Name: .rel.text.1 + Type: SHT_REL + Link: .symtab + AddressAlign: 0x0000000000000004 + Info: .text.1 + Relocations: + - Symbol: low + Type: R_ARM_THM_PC12 + - Offset: 0x0000000000000004 + Symbol: high + Type: R_ARM_THM_PC12 + - Name: .text.2 + Type: SHT_PROGBITS + Flags: [ SHF_ALLOC, SHF_EXECINSTR ] + AddressAlign: 0x0000000000000004 + Content: '7047' + - Name: .ARM.attributes + Type: SHT_ARM_ATTRIBUTES + AddressAlign: 0x0000000000000001 + Content: 4119000000616561626900010F000000060A074D080009022201 +Symbols: + - Name: high + Type: STT_FUNC + Section: .text.2 + Value: 0x0000000000000001 + - Name: low + Type: STT_FUNC + Section: .text.0 + Value: 0x0000000000000001 + - Name: _start + Type: STT_FUNC + Section: .text.1 + Binding: STB_GLOBAL + Value: 0x0000000000000001 + + +# CHECK: {{.*}}.o:(.text.1+0x0): relocation R_ARM_THM_PC12 out of range: 4098 is not in [0, 4095] +# CHECK: {{.*}}.o:(.text.1+0x4): relocation R_ARM_THM_PC12 out of range: 4096 is not in [0, 4095] Index: lld/test/ELF/arm-thumb2-ldrlit.s =================================================================== --- lld/test/ELF/arm-thumb2-ldrlit.s +++ /dev/null @@ -1,157 +0,0 @@ -// REQUIRES: arm -// RUN: llvm-mc --triple=thumbv7m-none-eabi --arm-add-build-attributes -filetype=obj -o %t.o %s -// RUN: echo "SECTIONS { \ -// RUN: .rodata.low 0x8012 : { *(.rodata.low) } \ -// RUN: .text.low 0x8f00 : { *(.text.low) } \ -// RUN: .text.neg 0x9000 : { *(.text.neg) } \ -// RUN: .text.pos 0x10000 : { *(.text.pos) } \ -// RUN: .text.high 0x10100 : { *(.text.high) } \ -// RUN: .data_high 0x1100f : { *(.data.high) } \ -// RUN: } " > %t.script -// RUN: ld.lld --script %t.script %t.o -o %t -// RUN: llvm-readobj --symbols %t | FileCheck %s --check-prefix=SYMS -// RUN: llvm-objdump -d --no-show-raw-insn --triple=thumbv7m-none-eabi %t | FileCheck %s - -/// Test the various legal cases for the R_ARM_THM_PC12 relocation -/// Interesting things to note -/// Range is +- 4095 bytes -/// The Thumb bit for function symbols is ignored -/// The expression is S + A - Pa where Pa is AlignDown(PC, 4) so we will use -/// 2-byte nops to make some of the ldr instructions 2-byte aligned. - .section .rodata.low, "a", %progbits -dat1: - .byte 0 -dat2: - .byte 1 -dat3: - .byte 2 -dat4: - .byte 3 - - .section .text.low, "ax", %progbits - .balign 4 - .global target1 - .type target1, %function -target1: - bx lr - .type target2, %function -target2: - bx lr - - .section .text.neg, "ax", %progbits - .balign 4 - .global _start - .thumb_func -_start: - nop - ldr r0, dat1 - ldr r1, dat2 - nop - ldr r2, dat3 - ldr r3, dat4 - .balign 4 - ldr r0, target1 - nop - ldr r1, target2 - - .section .text.pos, "ax", %progbits - .balign 4 - .global pos - .thumb_func -pos: - ldr r2, target3 - nop - ldr r3, target4 - .balign 4 - ldr r0, dat5 - ldr r1, dat6 - nop - ldr r2, dat7 - ldr r3, dat8 -/// positive addend in instruction, all others are -4 (PC bias) - ldr.w r4, dat5 + 8 - - .section .text.high, "ax", %progbits - .balign 4 - .thumb_func - .global target3 -target3: - bx lr - .thumb_func -target4: - bx lr - - .section .data.high, "aw", %progbits -dat5: - .byte 0 -dat6: - .byte 1 -dat7: - .byte 2 -dat8: - .byte 3 - -// SYMS: Name: dat1 -// SYMS-NEXT: Value: 0x8012 -// SYMS: Name: dat2 -// SYMS-NEXT: Value: 0x8013 -// SYMS: Name: dat3 -// SYMS-NEXT: Value: 0x8014 -// SYMS: Name: dat4 -// SYMS-NEXT: Value: 0x8015 - -// CHECK: 00008f00 : -// CHECK-NEXT: 8f00: bx lr -// CHECK: 00008f02 : -// CHECK-NEXT: 8f02: bx lr - -// CHECK: 00009000 <_start>: -// CHECK-NEXT: 9000: nop -/// AlignDown(0x9002+4, 4) - 0xff2 = 0x8012 -// CHECK-NEXT: 9002: ldr.w r0, [pc, #-4082] -/// AlignDown(0x9006+4, 4) - 0xff5 = 0x8013 -// CHECK-NEXT: 9006: ldr.w r1, [pc, #-4085] -// CHECK-NEXT: 900a: nop -/// AlignDown(0x900c+4, 4) - 0xffc = 0x8014 -// CHECK-NEXT: 900c: ldr.w r2, [pc, #-4092] -/// AlignDown(0x9010+4, 4) - 0xfff = 0x8015 -// CHECK-NEXT: 9010: ldr.w r3, [pc, #-4095] -/// AlignDown(0x9014+4, 4) - 0x118 = 0x8f00 -// CHECK-NEXT: 9014: ldr.w r0, [pc, #-280] -// CHECK-NEXT: 9018: nop -/// AlignDown(0x901a+4, 4) - 0x11a = 0x8f02 -// CHECK-NEXT: 901a: ldr.w r1, [pc, #-282] - -// CHECK: 00010000 : -/// AlignDown(0x10000+4, 4) + 0x1c = 0x10100 -// CHECK-NEXT: 10000: ldr.w r2, [pc, #252] -// CHECK-NEXT: 10004: nop -/// AlignDown(0x10006+4, 4) + 0x1a = 0x10122 -// CHECK-NEXT: 10006: ldr.w r3, [pc, #250] -// CHECK-NEXT: 1000a: nop -/// AlignDown(0x1000c+4, 4) + 0xfff = 0x1100f -// CHECK-NEXT: 1000c: ldr.w r0, [pc, #4095] -/// AlignDown(0x10010+4, 4) + 0xffc = 0x11010 -// CHECK-NEXT: 10010: ldr.w r1, [pc, #4092] -// CHECK-NEXT: 10014: nop -/// AlignDown(0x10016+4, 4) + 0xff9 = 0x11011 -// CHECK-NEXT: 10016: ldr.w r2, [pc, #4089] -/// AlignDown(0x1001a+4, 4) + 0xff6 = 0x11012 -// CHECK-NEXT: 1001a: ldr.w r3, [pc, #4086] -/// AlignDown(0x1001e+4, 4) + 0xff7 = 0x11017 = dat5 + 8 -// CHECK-NEXT: 1001e: ldr.w r4, [pc, #4087] - -// CHECK: 00010100 : -// CHECK-NEXT: 10100: bx lr - -// CHECK: 00010102 : -// CHECK-NEXT: 10102: bx lr - -// SYMS: Name: dat5 -// SYMS-NEXT: Value: 0x1100F -// SYMS: Name: dat6 -// SYMS-NEXT: Value: 0x11010 -// SYMS: Name: dat7 -// SYMS-NEXT: Value: 0x11011 -// SYMS: Name: dat8 -// SYMS-NEXT: Value: 0x11012 Index: lld/test/ELF/arm-thumb2-ldrlit.test =================================================================== --- /dev/null +++ lld/test/ELF/arm-thumb2-ldrlit.test @@ -0,0 +1,308 @@ +# REQUIRES: arm +# RUN: yaml2obj %s -o %t.o +# RUN: echo "SECTIONS { \ +# RUN: .rodata.low 0x8012 : { *(.rodata.low) } \ +# RUN: .text.low 0x8f00 : { *(.text.low) } \ +# RUN: .text.neg 0x9000 : { *(.text.neg) } \ +# RUN: .text.pos 0x10000 : { *(.text.pos) } \ +# RUN: .text.high 0x10100 : { *(.text.high) } \ +# RUN: .data_high 0x1100f : { *(.data.high) } \ +# RUN: } " > %t.script +# RUN: ld.lld --script %t.script %t.o -o %t +# RUN: llvm-readobj --symbols %t | FileCheck %s --check-prefix=SYMS +# RUN: llvm-objdump -d --no-show-raw-insn --triple=thumbv7m-none-eabi %t | FileCheck %s + +## Test the various legal cases for the R_ARM_THM_PC12 relocation +## Interesting things to note +## Range is +- 4095 bytes +## The Thumb bit for function symbols is ignored +## The expression is S + A - Pa where Pa is AlignDown(PC, 4) so we will use +## 2-byte nops to make some of the ldr instructions 2-byte aligned. +## We use yaml2obj as llvm-mc does not produce the relocation. It is the +## equivalent of the following program. + +## .section .rodata.low, "a", %progbits +## dat1: +## .byte 0 +## dat2: +## .byte 1 +## dat3: +## .byte 2 +## dat4: +## .byte 3 + +## .section .text.low, "ax", %progbits +## .balign 4 +## .global target1 +## .type target1, %function +## target1: +## bx lr +## .type target2, %function +## target2: +## bx lr + +## .section .text.neg, "ax", %progbits +## .balign 4 +## .global _start +## .thumb_func +## _start: +## nop +## ldr r0, dat1 +## ldr r1, dat2 +## nop +## ldr r2, dat3 +## ldr r3, dat4 +## .balign 4 +## ldr r0, target1 +## nop +## ldr r1, target2 + +## .section .text.pos, "ax", %progbits +## .balign 4 +## .global pos +## .thumb_func +## pos: +## ldr r2, target3 +## nop +## ldr r3, target4 +## .balign 4 +## ldr r0, dat5 +## ldr r1, dat6 +## nop +## ldr r2, dat7 +## ldr r3, dat8 +## ## positive addend in instruction, all others are -4 (PC bias) +## ldr.w r4, dat5 + 8 + +## .section .text.high, "ax", %progbits +## .balign 4 +## .thumb_func +## .global target3 +## target3: +## bx lr +## .thumb_func +## target4: +## bx lr + +## .section .data.high, "aw", %progbits +## dat5: +## .byte 0 +## dat6: +## .byte 1 +## dat7: +## .byte 2 +## dat8: +## .byte 3 + +--- !ELF +FileHeader: + Class: ELFCLASS32 + Data: ELFDATA2LSB + Type: ET_REL + Machine: EM_ARM + Flags: [ EF_ARM_EABI_VER5 ] +Sections: + - Name: .text + Type: SHT_PROGBITS + Flags: [ SHF_ALLOC, SHF_EXECINSTR ] + AddressAlign: 0x0000000000000004 + - Name: .rodata.low + Type: SHT_PROGBITS + Flags: [ SHF_ALLOC ] + AddressAlign: 0x0000000000000001 + Content: '00010203' + - Name: .text.low + Type: SHT_PROGBITS + Flags: [ SHF_ALLOC, SHF_EXECINSTR ] + AddressAlign: 0x0000000000000004 + Content: '70477047' + - Name: .text.neg + Type: SHT_PROGBITS + Flags: [ SHF_ALLOC, SHF_EXECINSTR ] + AddressAlign: 0x0000000000000004 + Content: 00BF5FF804005FF8041000BF5FF804205FF804305FF8040000BF5FF80410 + - Name: .rel.text.neg + Type: SHT_REL + Link: .symtab + AddressAlign: 0x0000000000000004 + Info: .text.neg + Relocations: + - Offset: 0x0000000000000002 + Symbol: dat1 + Type: R_ARM_THM_PC12 + - Offset: 0x0000000000000006 + Symbol: dat2 + Type: R_ARM_THM_PC12 + - Offset: 0x000000000000000C + Symbol: dat3 + Type: R_ARM_THM_PC12 + - Offset: 0x0000000000000010 + Symbol: dat4 + Type: R_ARM_THM_PC12 + - Offset: 0x0000000000000014 + Symbol: target1 + Type: R_ARM_THM_PC12 + - Offset: 0x000000000000001A + Symbol: target2 + Type: R_ARM_THM_PC12 + - Name: .text.pos + Type: SHT_PROGBITS + Flags: [ SHF_ALLOC, SHF_EXECINSTR ] + AddressAlign: 0x0000000000000004 + Content: 5FF8042000BF5FF8043000BF5FF804005FF8041000BF5FF804205FF80430DFF80440 + - Name: .rel.text.pos + Type: SHT_REL + Link: .symtab + AddressAlign: 0x0000000000000004 + Info: .text.pos + Relocations: + - Symbol: target3 + Type: R_ARM_THM_PC12 + - Offset: 0x0000000000000006 + Symbol: target4 + Type: R_ARM_THM_PC12 + - Offset: 0x000000000000000C + Symbol: dat5 + Type: R_ARM_THM_PC12 + - Offset: 0x0000000000000010 + Symbol: dat6 + Type: R_ARM_THM_PC12 + - Offset: 0x0000000000000016 + Symbol: dat7 + Type: R_ARM_THM_PC12 + - Offset: 0x000000000000001A + Symbol: dat8 + Type: R_ARM_THM_PC12 + - Offset: 0x000000000000001E + Symbol: dat5 + Type: R_ARM_THM_PC12 + - Name: .text.high + Type: SHT_PROGBITS + Flags: [ SHF_ALLOC, SHF_EXECINSTR ] + AddressAlign: 0x0000000000000004 + Content: '70477047' + - Name: .data.high + Type: SHT_PROGBITS + Flags: [ SHF_WRITE, SHF_ALLOC ] + AddressAlign: 0x0000000000000001 + Content: '00010203' + - Name: .ARM.attributes + Type: SHT_ARM_ATTRIBUTES + AddressAlign: 0x0000000000000001 + Content: 4119000000616561626900010F000000060A074D080009022201 +Symbols: + - Name: dat1 + Section: .rodata.low + - Name: dat2 + Section: .rodata.low + Value: 0x0000000000000001 + - Name: dat3 + Section: .rodata.low + Value: 0x0000000000000002 + - Name: dat4 + Section: .rodata.low + Value: 0x0000000000000003 + - Name: dat5 + Section: .data.high + - Name: dat6 + Section: .data.high + Value: 0x0000000000000001 + - Name: dat7 + Section: .data.high + Value: 0x0000000000000002 + - Name: dat8 + Section: .data.high + Value: 0x0000000000000003 + - Name: target2 + Type: STT_FUNC + Section: .text.low + Value: 0x0000000000000003 + - Name: target4 + Type: STT_FUNC + Section: .text.high + Value: 0x0000000000000003 + - Name: _start + Type: STT_FUNC + Section: .text.neg + Binding: STB_GLOBAL + Value: 0x0000000000000001 + - Name: pos + Type: STT_FUNC + Section: .text.pos + Binding: STB_GLOBAL + Value: 0x0000000000000001 + - Name: target1 + Type: STT_FUNC + Section: .text.low + Binding: STB_GLOBAL + Value: 0x0000000000000001 + - Name: target3 + Type: STT_FUNC + Section: .text.high + Binding: STB_GLOBAL + Value: 0x0000000000000001 + +# SYMS: Name: dat1 +# SYMS-NEXT: Value: 0x8012 +# SYMS: Name: dat2 +# SYMS-NEXT: Value: 0x8013 +# SYMS: Name: dat3 +# SYMS-NEXT: Value: 0x8014 +# SYMS: Name: dat4 +# SYMS-NEXT: Value: 0x8015 + +# CHECK: 00008f00 : +# CHECK-NEXT: 8f00: bx lr +# CHECK: 00008f02 : +# CHECK-NEXT: 8f02: bx lr + +# CHECK: 00009000 <_start>: +# CHECK-NEXT: 9000: nop +## AlignDown(0x9002+4, 4) - 0xff2 = 0x8012 +# CHECK-NEXT: 9002: ldr.w r0, [pc, #-4082] +## AlignDown(0x9006+4, 4) - 0xff5 = 0x8013 +# CHECK-NEXT: 9006: ldr.w r1, [pc, #-4085] +# CHECK-NEXT: 900a: nop +## AlignDown(0x900c+4, 4) - 0xffc = 0x8014 +# CHECK-NEXT: 900c: ldr.w r2, [pc, #-4092] +## AlignDown(0x9010+4, 4) - 0xfff = 0x8015 +# CHECK-NEXT: 9010: ldr.w r3, [pc, #-4095] +## AlignDown(0x9014+4, 4) - 0x118 = 0x8f00 +# CHECK-NEXT: 9014: ldr.w r0, [pc, #-280] +# CHECK-NEXT: 9018: nop +## AlignDown(0x901a+4, 4) - 0x11a = 0x8f02 +# CHECK-NEXT: 901a: ldr.w r1, [pc, #-282] + +# CHECK: 00010000 : +## AlignDown(0x10000+4, 4) + 0x1c = 0x10100 +# CHECK-NEXT: 10000: ldr.w r2, [pc, #252] +# CHECK-NEXT: 10004: nop +## AlignDown(0x10006+4, 4) + 0x1a = 0x10122 +# CHECK-NEXT: 10006: ldr.w r3, [pc, #250] +# CHECK-NEXT: 1000a: nop +## AlignDown(0x1000c+4, 4) + 0xfff = 0x1100f +# CHECK-NEXT: 1000c: ldr.w r0, [pc, #4095] +## AlignDown(0x10010+4, 4) + 0xffc = 0x11010 +# CHECK-NEXT: 10010: ldr.w r1, [pc, #4092] +# CHECK-NEXT: 10014: nop +## AlignDown(0x10016+4, 4) + 0xff9 = 0x11011 +# CHECK-NEXT: 10016: ldr.w r2, [pc, #4089] +## AlignDown(0x1001a+4, 4) + 0xff6 = 0x11012 +# CHECK-NEXT: 1001a: ldr.w r3, [pc, #4086] +## AlignDown(0x1001e+4, 4) + 0xff7 = 0x11017 = dat5 + 8 +# CHECK-NEXT: 1001e: ldr.w r4, [pc, #4087] + +# CHECK: 00010100 : +# CHECK-NEXT: 10100: bx lr + +# CHECK: 00010102 : +# CHECK-NEXT: 10102: bx lr + +# SYMS: Name: dat5 +# SYMS-NEXT: Value: 0x1100F +# SYMS: Name: dat6 +# SYMS-NEXT: Value: 0x11010 +# SYMS: Name: dat7 +# SYMS-NEXT: Value: 0x11011 +# SYMS: Name: dat8 +# SYMS-NEXT: Value: 0x11012