diff --git a/llvm/lib/DebugInfo/DWARF/DWARFExpression.cpp b/llvm/lib/DebugInfo/DWARF/DWARFExpression.cpp
--- a/llvm/lib/DebugInfo/DWARF/DWARFExpression.cpp
+++ b/llvm/lib/DebugInfo/DWARF/DWARFExpression.cpp
@@ -455,6 +455,28 @@
       S << "CFA";
       break;
     }
+    case dwarf::DW_OP_consts:
+    case dwarf::DW_OP_const1s:
+    case dwarf::DW_OP_const2s:
+    case dwarf::DW_OP_const4s:
+    case dwarf::DW_OP_const8s: {
+      // Signed constant.
+      int64_t Val = Op.getRawOperand(0);
+      raw_svector_ostream S(Stack.emplace_back().String);
+      S << Val;
+      break;
+    }
+    case dwarf::DW_OP_constu:
+    case dwarf::DW_OP_const1u:
+    case dwarf::DW_OP_const2u:
+    case dwarf::DW_OP_const4u:
+    case dwarf::DW_OP_const8u: {
+      // Unsigned constant.
+      uint64_t Val = Op.getRawOperand(0);
+      raw_svector_ostream S(Stack.emplace_back().String);
+      S << Val;
+      break;
+    }
     default:
       if (Opcode >= dwarf::DW_OP_reg0 && Opcode <= dwarf::DW_OP_reg31) {
         // DW_OP_reg<N>: A register, with the register num implied by the
@@ -480,6 +502,11 @@
         S << MRI.getName(*LLVMRegNum);
         if (Offset)
           S << format("%+" PRId64, Offset);
+      } else if (Opcode >= dwarf::DW_OP_lit0 && Opcode <= dwarf::DW_OP_lit31) {
+        // Small unsigned constant.
+        unsigned Val = Opcode - dwarf::DW_OP_lit0;
+        raw_svector_ostream S(Stack.emplace_back().String);
+        S << Val;
       } else {
         // If we hit an unknown operand, we don't know its effect on the stack,
         // so bail out on the whole expression.
diff --git a/llvm/unittests/DebugInfo/DWARF/DWARFExpressionCompactPrinterTest.cpp b/llvm/unittests/DebugInfo/DWARF/DWARFExpressionCompactPrinterTest.cpp
--- a/llvm/unittests/DebugInfo/DWARF/DWARFExpressionCompactPrinterTest.cpp
+++ b/llvm/unittests/DebugInfo/DWARF/DWARFExpressionCompactPrinterTest.cpp
@@ -156,3 +156,40 @@
 TEST_F(DWARFExpressionCompactPrinterTest, Test_OP_fbreg_cfa) {
   TestExprPrinter({DW_OP_fbreg, 0x78}, "[CFA-8]", {DW_OP_call_frame_cfa});
 }
+
+TEST_F(DWARFExpressionCompactPrinterTest, Test_OP_constu) {
+  TestExprPrinter({DW_OP_constu, 0x2a, DW_OP_stack_value}, "42");
+  TestExprPrinter({DW_OP_constu, 0x7f, DW_OP_stack_value}, "127");
+  TestExprPrinter({DW_OP_constu, 0x80, 0x01, DW_OP_stack_value}, "128");
+}
+
+TEST_F(DWARFExpressionCompactPrinterTest, Test_OP_consts) {
+  TestExprPrinter({DW_OP_consts, 0x2a, DW_OP_stack_value}, "42");
+  TestExprPrinter({DW_OP_consts, 0x7f, DW_OP_stack_value}, "-1");
+  TestExprPrinter({DW_OP_consts, 0x80, 0x01, DW_OP_stack_value}, "128");
+}
+
+TEST_F(DWARFExpressionCompactPrinterTest, Test_OP_constNu) {
+  TestExprPrinter({DW_OP_const1u, 0x2a, DW_OP_stack_value}, "42");
+  TestExprPrinter({DW_OP_const2u, 0x00, 0x80, DW_OP_stack_value}, "32768");
+  TestExprPrinter({DW_OP_const4u, 0x00, 0x00, 0x00, 0x80, DW_OP_stack_value},
+                  "2147483648");
+  TestExprPrinter({DW_OP_const8u, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+                   0x80, DW_OP_stack_value},
+                  "9223372036854775808");
+}
+
+TEST_F(DWARFExpressionCompactPrinterTest, Test_OP_constNs) {
+  TestExprPrinter({DW_OP_const1s, 0x80, DW_OP_stack_value}, "-128");
+  TestExprPrinter({DW_OP_const2s, 0x00, 0x80, DW_OP_stack_value}, "-32768");
+  TestExprPrinter({DW_OP_const4s, 0x00, 0x00, 0x00, 0x80, DW_OP_stack_value},
+                  "-2147483648");
+  TestExprPrinter({DW_OP_const8s, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+                   0x80, DW_OP_stack_value},
+                  "-9223372036854775808");
+}
+
+TEST_F(DWARFExpressionCompactPrinterTest, Test_OP_lit) {
+  TestExprPrinter({DW_OP_lit0, DW_OP_stack_value}, "0");
+  TestExprPrinter({DW_OP_lit31, DW_OP_stack_value}, "31");
+}