Index: llvm/lib/Target/ARM/ARMBaseInstrInfo.h =================================================================== --- llvm/lib/Target/ARM/ARMBaseInstrInfo.h +++ llvm/lib/Target/ARM/ARMBaseInstrInfo.h @@ -503,16 +503,16 @@ // the ArmARM. -inline static unsigned getARMVPTBlockMask(unsigned NumInsts) { +inline static ARM::PredBlockMask getARMVPTBlockMask(unsigned NumInsts) { switch (NumInsts) { case 1: - return ARMVCC::T; + return ARM::PredBlockMask::T; case 2: - return ARMVCC::TT; + return ARM::PredBlockMask::TT; case 3: - return ARMVCC::TTT; + return ARM::PredBlockMask::TTT; case 4: - return ARMVCC::TTTT; + return ARM::PredBlockMask::TTTT; default: break; }; Index: llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp =================================================================== --- llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp +++ llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp @@ -1118,7 +1118,7 @@ if (isVCTP(Divergent->MI)) { // The vctp will be removed, so the size of the vpt block needs to be // modified. - uint64_t Size = getARMVPTBlockMask(Block.size() - 1); + uint64_t Size = (uint64_t)getARMVPTBlockMask(Block.size() - 1); Block.getVPST()->getOperand(0).setImm(Size); LLVM_DEBUG(dbgs() << "ARM Loops: Modified VPT block mask.\n"); } else if (Block.IsOnlyPredicatedOn(LoLoop.VCTP)) { @@ -1147,7 +1147,7 @@ MachineInstrBuilder MIB = BuildMI(*InsertAt->getParent(), InsertAt, InsertAt->getDebugLoc(), TII->get(ARM::MVE_VPST)); - MIB.addImm(getARMVPTBlockMask(Size)); + MIB.addImm((uint64_t)getARMVPTBlockMask(Size)); LLVM_DEBUG(dbgs() << "ARM Loops: Removing VPST: " << *Block.getVPST()); LLVM_DEBUG(dbgs() << "ARM Loops: Created VPST: " << *MIB); LoLoop.ToRemove.insert(Block.getVPST()); Index: llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp =================================================================== --- llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp +++ llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp @@ -6977,6 +6977,8 @@ // ITx -> x100 (ITT -> 0100, ITE -> 1100) // ITxy -> xy10 (e.g. ITET -> 1010) // ITxyz -> xyz1 (e.g. ITEET -> 1101) + // Note: See the ARM::PredBlockMask enum in + // /lib/Target/ARM/Utils/ARMBaseInfo.h if (Mnemonic == "it" || Mnemonic.startswith("vpt") || Mnemonic.startswith("vpst")) { SMLoc Loc = Mnemonic == "it" ? SMLoc::getFromPointer(NameLoc.getPointer() + 2) : Index: llvm/lib/Target/ARM/Utils/ARMBaseInfo.h =================================================================== --- llvm/lib/Target/ARM/Utils/ARMBaseInfo.h +++ llvm/lib/Target/ARM/Utils/ARMBaseInfo.h @@ -91,25 +91,35 @@ Then, Else }; - - enum VPTMaskValue { - T = 8, // 0b1000 - TT = 4, // 0b0100 - TE = 12, // 0b1100 - TTT = 2, // 0b0010 - TTE = 6, // 0b0110 - TEE = 10, // 0b1010 - TET = 14, // 0b1110 - TTTT = 1, // 0b0001 - TTTE = 3, // 0b0011 - TTEE = 5, // 0b0101 - TTET = 7, // 0b0111 - TEEE = 9, // 0b1001 - TEET = 11, // 0b1011 - TETT = 13, // 0b1101 - TETE = 15 // 0b1111 +} // namespace ARMVCC + +namespace ARM { + /// Mask values for IT and VPT Blocks, to be used by MCOperands. + /// Note that this is different from the "real" encoding used by the + /// instructions. In this encoding, the lowest set bit indicates the end of + /// the encoding, and above that, "1" indicates an else, while "0" indicates + /// a then. + /// Tx = x100 + /// Txy = xy10 + /// Txyz = xyz1 + enum class PredBlockMask { + T = 0b1000, + TT = 0b0100, + TE = 0b1100, + TTT = 0b0010, + TTE = 0b0110, + TEE = 0b1110, + TET = 0b1010, + TTTT = 0b0001, + TTTE = 0b0011, + TTEE = 0b0111, + TTET = 0b0101, + TEEE = 0b1111, + TEET = 0b1101, + TETT = 0b1001, + TETE = 0b1011 }; -} +} // namespace ARM inline static const char *ARMVPTPredToString(ARMVCC::VPTCodes CC) { switch (CC) {