Index: clang/include/clang/Basic/TargetInfo.h =================================================================== --- clang/include/clang/Basic/TargetInfo.h +++ clang/include/clang/Basic/TargetInfo.h @@ -210,6 +210,8 @@ unsigned HasAArch64SVETypes : 1; + unsigned ARMCDECorpocMask : 8; + // TargetInfo Constructor. Default initializes all fields. TargetInfo(const llvm::Triple &T); @@ -808,6 +810,10 @@ /// available on this target. bool hasAArch64SVETypes() const { return HasAArch64SVETypes; } + /// For ARM targets returns a mask defining which coprocessors are configured + /// as Custom Datapath. + uint32_t getARMCDECorpocMask() const { return ARMCDECorpocMask; } + /// Returns whether the passed in string is a valid clobber in an /// inline asm statement. /// Index: clang/lib/Basic/TargetInfo.cpp =================================================================== --- clang/lib/Basic/TargetInfo.cpp +++ clang/lib/Basic/TargetInfo.cpp @@ -113,6 +113,7 @@ HasBuiltinMSVaList = false; IsRenderScriptTarget = false; HasAArch64SVETypes = false; + ARMCDECorpocMask = 0; // Default to no types using fpret. RealTypeUsesObjCFPRet = 0; Index: clang/lib/Basic/Targets/ARM.h =================================================================== --- clang/lib/Basic/Targets/ARM.h +++ clang/lib/Basic/Targets/ARM.h @@ -108,6 +108,7 @@ bool supportsThumb2() const; bool hasMVE() const; bool hasMVEFloat() const; + bool hasCDE() const; StringRef getCPUAttr() const; StringRef getCPUProfile() const; Index: clang/lib/Basic/Targets/ARM.cpp =================================================================== --- clang/lib/Basic/Targets/ARM.cpp +++ clang/lib/Basic/Targets/ARM.cpp @@ -154,6 +154,10 @@ return hasMVE() && (MVE & MVE_FP); } +bool ARMTargetInfo::hasCDE() const { + return getARMCDECorpocMask() != 0; +} + bool ARMTargetInfo::isThumb() const { return ArchISA == llvm::ARM::ISAKind::THUMB; } @@ -422,6 +426,7 @@ HWDiv = 0; DotProd = 0; HasFloat16 = true; + ARMCDECorpocMask = 0; // This does not diagnose illegal cases like having both // "+vfpv2" and "+vfpv3" or having "+neon" and "-fp64". @@ -486,6 +491,9 @@ FPU |= FPARMV8; MVE |= MVE_INT | MVE_FP; HW_FP |= HW_FP_SP | HW_FP_HP; + } else if (Feature >= "+cdecp0" && Feature <= "+cdecp7") { + unsigned Coproc = Feature.back() - '0'; + ARMCDECorpocMask |= (1U << Coproc); } } @@ -758,6 +766,12 @@ Builder.defineMacro("__ARM_FEATURE_MVE", hasMVEFloat() ? "3" : "1"); } + if (hasCDE()) { + Builder.defineMacro("__ARM_FEATURE_CDE", "1"); + Builder.defineMacro("__ARM_FEATURE_CDE_COPROC", + "0x" + Twine::utohexstr(getARMCDECorpocMask())); + } + Builder.defineMacro("__ARM_SIZEOF_WCHAR_T", Twine(Opts.WCharSize ? Opts.WCharSize : 4)); Index: clang/test/Preprocessor/arm-target-features.c =================================================================== --- clang/test/Preprocessor/arm-target-features.c +++ clang/test/Preprocessor/arm-target-features.c @@ -800,6 +800,18 @@ // CHECK-V81M-MVE-NODSP-NOT: #define __ARM_FEATURE_MVE // CHECK-V81M-MVE-NODSP-NOT: #define __ARM_FEATURE_DSP +// Test CDE (Custom Datapath Extension) feature test macros + +// RUN: %clang -target arm-arm-none-eabi -march=armv8m.main -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-V8M-NOCDE %s +// CHECK-V8M-NOCDE-NOT: #define __ARM_FEATURE_CDE +// CHECK-V8M-NOCDE-NOT: #define __ARM_FEATURE_CDE_CORPOC +// RUN: %clang -target arm-arm-none-eabi -march=armv8m.main+cdecp0+cdecp1+cdecp7 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=CHECK-V8M-CDE-MASK1 %s +// CHECK-V8M-CDE-MASK1: #define __ARM_FEATURE_CDE 1 +// CHECK-V8M-CDE-MASK1: #define __ARM_FEATURE_CDE_COPROC 0x83 +// RUN: %clang -target arm-arm-none-eabi -march=armv8m.main+cdecp0+cdecp1+cdecp2+cdecp3+cdecp4+cdecp5+cdecp6+cdecp7 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=CHECK-V8M-CDE-MASK2 %s +// CHECK-V8M-CDE-MASK2: #define __ARM_FEATURE_CDE 1 +// CHECK-V8M-CDE-MASK2: #define __ARM_FEATURE_CDE_COPROC 0xff + // RUN: %clang -target armv8.1a-none-none-eabi -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=CHECK-V81A %s // CHECK-V81A: #define __ARM_ARCH 8 // CHECK-V81A: #define __ARM_ARCH_8_1A__ 1